Info: constraining clock net 'CLK_12mhz' to 12.00 MHz

Info: Logic utilisation before packing:
Info:     Total LUT4s:        49/83640     0%
Info:         logic LUTs:     25/83640     0%
Info:         carry LUTs:     24/83640     0%
Info:           RAM LUTs:      0/10455     0%
Info:          RAMW LUTs:      0/20910     0%

Info:      Total DFFs:        25/83640     0%

Info: Packing IOs..
Info: pin 'uart_tx$tr_io' constrained to Bel 'X0/Y92/PIOC'.
Info: pin 'uart_rx$tr_io' constrained to Bel 'X0/Y92/PIOB'.
Info: pin 'led[7]$tr_io' constrained to Bel 'X114/Y0/PIOA'.
Info: pin 'led[6]$tr_io' constrained to Bel 'X116/Y0/PIOA'.
Info: pin 'led[5]$tr_io' constrained to Bel 'X114/Y0/PIOB'.
Info: pin 'led[4]$tr_io' constrained to Bel 'X116/Y0/PIOB'.
Info: pin 'led[3]$tr_io' constrained to Bel 'X119/Y0/PIOA'.
Info: pin 'led[2]$tr_io' constrained to Bel 'X119/Y0/PIOB'.
Info: pin 'led[1]$tr_io' constrained to Bel 'X76/Y0/PIOA'.
Info: pin 'led[0]$tr_io' constrained to Bel 'X76/Y0/PIOB'.
Info: pin 'btn$tr_io' constrained to Bel 'X0/Y92/PIOD'.
Info: pin 'GSR_N$tr_io' constrained to Bel 'X0/Y47/PIOA'.
Info: pin 'CLK_12mhz$tr_io' constrained to Bel 'X63/Y0/PIOA'.
Info: Packing constants..
Info: Packing carries...
Info: Packing LUTs...
Info: Packing LUT5-7s...
Info: Packing FFs...
Info:     24 FFs paired with LUTs.
Info: Generating derived timing constraints...
Info: Promoting globals...
Info:     promoting clock net CLK_12mhz$TRELLIS_IO_IN to global network
Info: Checksum: 0x44c894ed

Info: Device utilisation:
Info: 	          TRELLIS_IO:      13/    365     3%
Info: 	                DCCA:       1/     56     1%
Info: 	              DP16KD:       0/    208     0%
Info: 	          MULT18X18D:       0/    156     0%
Info: 	              ALU54B:       0/     78     0%
Info: 	             EHXPLLL:       0/      4     0%
Info: 	             EXTREFB:       0/      2     0%
Info: 	                DCUA:       0/      2     0%
Info: 	           PCSCLKDIV:       0/      2     0%
Info: 	             IOLOGIC:       0/    224     0%
Info: 	            SIOLOGIC:       0/    141     0%
Info: 	                 GSR:       1/      1   100%
Info: 	               JTAGG:       0/      1     0%
Info: 	                OSCG:       0/      1     0%
Info: 	               SEDGA:       0/      1     0%
Info: 	                 DTR:       0/      1     0%
Info: 	             USRMCLK:       0/      1     0%
Info: 	             CLKDIVF:       0/      4     0%
Info: 	           ECLKSYNCB:       0/     10     0%
Info: 	             DLLDELD:       0/      8     0%
Info: 	              DDRDLL:       0/      4     0%
Info: 	             DQSBUFM:       0/     14     0%
Info: 	     TRELLIS_ECLKBUF:       0/      8     0%
Info: 	        ECLKBRIDGECS:       0/      2     0%
Info: 	                DCSC:       0/      2     0%
Info: 	          TRELLIS_FF:      25/  83640     0%
Info: 	        TRELLIS_COMB:      55/  83640     0%
Info: 	        TRELLIS_RAMW:       0/  10455     0%

Info: Placed 14 cells based on constraints.
Info: Creating initial analytic placement for 20 cells, random placement wirelen = 3833.
Info:     at initial placer iter 0, wirelen = 465
Info:     at initial placer iter 1, wirelen = 456
Info:     at initial placer iter 2, wirelen = 451
Info:     at initial placer iter 3, wirelen = 453
Info: Running main analytical placer, max placement attempts per cell = 10000.
Info:     at iteration #1, type ALL: wirelen solved = 448, spread = 694, legal = 661; time = 0.02s
Info:     at iteration #2, type ALL: wirelen solved = 458, spread = 630, legal = 626; time = 0.00s
Info:     at iteration #3, type ALL: wirelen solved = 452, spread = 544, legal = 553; time = 0.00s
Info: HeAP Placer Time: 0.12s
Info:   of which solving equations: 0.00s
Info:   of which spreading cells: 0.01s
Info:   of which strict legalisation: 0.00s

Info: Running simulated annealing placer for refinement.
Info:   at iteration #1: temp = 0.000000, timing cost = 11, wirelen = 553
Info:   at iteration #5: temp = 0.000000, timing cost = 13, wirelen = 507
Info:   at iteration #5: temp = 0.000000, timing cost = 12, wirelen = 502 
Info: SA placement time 0.02s

Info: Max frequency for clock '$glbnet$CLK_12mhz$TRELLIS_IO_IN': 410.17 MHz (PASS at 12.00 MHz)

Info: Max delay <async>                                 -> <async>                                : 3.50 ns
Info: Max delay <async>                                 -> posedge $glbnet$CLK_12mhz$TRELLIS_IO_IN: 8.90 ns
Info: Max delay posedge $glbnet$CLK_12mhz$TRELLIS_IO_IN -> <async>                                : 1.90 ns

Info: Slack histogram:
Info:  legend: * represents 1 endpoint(s)
Info:          + represents [1,1) endpoint(s)
Info: [ 80895,  80995) |* 
Info: [ 80995,  81095) |* 
Info: [ 81095,  81195) |*** 
Info: [ 81195,  81295) |*** 
Info: [ 81295,  81395) | 
Info: [ 81395,  81495) | 
Info: [ 81495,  81595) | 
Info: [ 81595,  81695) |** 
Info: [ 81695,  81795) |**** 
Info: [ 81795,  81895) |** 
Info: [ 81895,  81995) |** 
Info: [ 81995,  82095) |***** 
Info: [ 82095,  82195) | 
Info: [ 82195,  82295) | 
Info: [ 82295,  82395) | 
Info: [ 82395,  82495) | 
Info: [ 82495,  82595) | 
Info: [ 82595,  82695) | 
Info: [ 82695,  82795) | 
Info: [ 82795,  82895) |** 
Info: Checksum: 0x7de224e2
Info: Routing globals...
Info:     routing clock net $glbnet$CLK_12mhz$TRELLIS_IO_IN using global 0

Info: Routing..
Info: Setting up routing queue.
Info: Routing 158 arcs.
Info:            |   (re-)routed arcs  |   delta    | remaining|       time spent     |
Info:    IterCnt |  w/ripup   wo/ripup |  w/r  wo/r |      arcs| batch(sec) total(sec)|
Info:        224 |       64        141 |   64   141 |         0|       0.05       0.05|
Info: Routing complete.
Info: Router1 time 0.05s
Info: Checksum: 0x5a0aacdd

Info: Critical path report for clock '$glbnet$CLK_12mhz$TRELLIS_IO_IN' (posedge -> posedge):
Info: curr total
Info:  0.3  0.3  Source blinky_c_TRELLIS_FF_Q_22.Q
Info:  0.6  0.9    Net blinky_c[0] (76,4) -> (76,3)
Info:                Sink blinky_c$D_IN_CCU2C_S1_2$CCU2_COMB0.A
Info:                Defined in:
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_map.v:108.23-108.24
Info:  0.3  1.2  Source blinky_c$D_IN_CCU2C_S1_2$CCU2_COMB0.FCO
Info:  0.0  1.2    Net blinky_c$D_IN_CCU2C_S1_2$CCU2_FCI_INT (76,3) -> (76,3)
Info:                Sink blinky_c$D_IN_CCU2C_S1_2$CCU2_COMB1.FCI
Info:  0.0  1.2  Source blinky_c$D_IN_CCU2C_S1_2$CCU2_COMB1.FCO
Info:  0.0  1.2    Net blinky_c$D_IN_CCU2C_S1_2_COUT (76,3) -> (76,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_3$CCU2_COMB0.FCI
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:89.43-89.59
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/arith_map.v:74.7-80.4
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_sim.v:82.9-82.13
Info:  0.0  1.2  Source blinky_c$D_IN_CCU2C_S0_3$CCU2_COMB0.FCO
Info:  0.0  1.2    Net blinky_c$D_IN_CCU2C_S0_3$CCU2_FCI_INT (76,3) -> (76,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_3$CCU2_COMB1.FCI
Info:  0.0  1.2  Source blinky_c$D_IN_CCU2C_S0_3$CCU2_COMB1.FCO
Info:  0.0  1.2    Net blinky_c$D_IN_CCU2C_S0_3_COUT (76,3) -> (76,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_2$CCU2_COMB0.FCI
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:89.43-89.59
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/arith_map.v:74.7-80.4
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_sim.v:82.9-82.13
Info:  0.0  1.3  Source blinky_c$D_IN_CCU2C_S0_2$CCU2_COMB0.FCO
Info:  0.0  1.3    Net blinky_c$D_IN_CCU2C_S0_2$CCU2_FCI_INT (76,3) -> (76,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_2$CCU2_COMB1.FCI
Info:  0.0  1.3  Source blinky_c$D_IN_CCU2C_S0_2$CCU2_COMB1.FCO
Info:  0.0  1.3    Net blinky_c$D_IN_CCU2C_S0_2_COUT (76,3) -> (77,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_1$CCU2_COMB0.FCI
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:89.43-89.59
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/arith_map.v:74.7-80.4
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_sim.v:82.9-82.13
Info:  0.0  1.3  Source blinky_c$D_IN_CCU2C_S0_1$CCU2_COMB0.FCO
Info:  0.0  1.3    Net blinky_c$D_IN_CCU2C_S0_1$CCU2_FCI_INT (77,3) -> (77,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_1$CCU2_COMB1.FCI
Info:  0.0  1.3  Source blinky_c$D_IN_CCU2C_S0_1$CCU2_COMB1.FCO
Info:  0.0  1.3    Net blinky_c$D_IN_CCU2C_S0_1_COUT (77,3) -> (77,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0$CCU2_COMB0.FCI
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:89.43-89.59
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/arith_map.v:74.7-80.4
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_sim.v:82.9-82.13
Info:  0.0  1.4  Source blinky_c$D_IN_CCU2C_S0$CCU2_COMB0.FCO
Info:  0.0  1.4    Net blinky_c$D_IN_CCU2C_S0$CCU2_FCI_INT (77,3) -> (77,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0$CCU2_COMB1.FCI
Info:  0.0  1.4  Source blinky_c$D_IN_CCU2C_S0$CCU2_COMB1.FCO
Info:  0.0  1.4    Net blinky_c$D_IN_CCU2C_S0_COUT (77,3) -> (77,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_7$CCU2_COMB0.FCI
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:89.43-89.59
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/arith_map.v:74.7-80.4
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_sim.v:82.9-82.13
Info:  0.0  1.4  Source blinky_c$D_IN_CCU2C_S0_7$CCU2_COMB0.FCO
Info:  0.0  1.4    Net blinky_c$D_IN_CCU2C_S0_7$CCU2_FCI_INT (77,3) -> (77,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_7$CCU2_COMB1.FCI
Info:  0.0  1.4  Source blinky_c$D_IN_CCU2C_S0_7$CCU2_COMB1.FCO
Info:  0.0  1.4    Net blinky_c$D_IN_CCU2C_S0_7_COUT (77,3) -> (77,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_7_COUT_CCU2C_CIN$CCU2_COMB0.FCI
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:89.43-89.59
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/arith_map.v:74.7-80.4
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_sim.v:82.9-82.13
Info:  0.0  1.4  Source blinky_c$D_IN_CCU2C_S0_7_COUT_CCU2C_CIN$CCU2_COMB0.FCO
Info:  0.0  1.4    Net blinky_c$D_IN_CCU2C_S0_7_COUT_CCU2C_CIN$CCU2_FCI_INT (77,3) -> (77,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_7_COUT_CCU2C_CIN$CCU2_COMB1.FCI
Info:  0.0  1.4  Source blinky_c$D_IN_CCU2C_S0_7_COUT_CCU2C_CIN$CCU2_COMB1.FCO
Info:  0.0  1.4    Net blinky_c$D_IN_CCU2C_S1_1_CIN (77,3) -> (78,3)
Info:                Sink blinky_c$D_IN_CCU2C_S1_1$CCU2_COMB0.FCI
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:89.43-89.59
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/arith_map.v:74.7-80.4
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_sim.v:82.9-82.13
Info:  0.0  1.5  Source blinky_c$D_IN_CCU2C_S1_1$CCU2_COMB0.FCO
Info:  0.0  1.5    Net blinky_c$D_IN_CCU2C_S1_1$CCU2_FCI_INT (78,3) -> (78,3)
Info:                Sink blinky_c$D_IN_CCU2C_S1_1$CCU2_COMB1.FCI
Info:  0.0  1.5  Source blinky_c$D_IN_CCU2C_S1_1$CCU2_COMB1.FCO
Info:  0.0  1.5    Net blinky_c$D_IN_CCU2C_S1_1_COUT (78,3) -> (78,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_6$CCU2_COMB0.FCI
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:89.43-89.59
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/arith_map.v:74.7-80.4
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_sim.v:82.9-82.13
Info:  0.0  1.5  Source blinky_c$D_IN_CCU2C_S0_6$CCU2_COMB0.FCO
Info:  0.0  1.5    Net blinky_c$D_IN_CCU2C_S0_6$CCU2_FCI_INT (78,3) -> (78,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_6$CCU2_COMB1.FCI
Info:  0.0  1.5  Source blinky_c$D_IN_CCU2C_S0_6$CCU2_COMB1.FCO
Info:  0.0  1.5    Net blinky_c$D_IN_CCU2C_S0_6_COUT (78,3) -> (78,3)
Info:                Sink blinky_c$D_IN_CCU2C_S1$CCU2_COMB0.FCI
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:89.43-89.59
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/arith_map.v:74.7-80.4
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_sim.v:82.9-82.13
Info:  0.0  1.6  Source blinky_c$D_IN_CCU2C_S1$CCU2_COMB0.FCO
Info:  0.0  1.6    Net blinky_c$D_IN_CCU2C_S1$CCU2_FCI_INT (78,3) -> (78,3)
Info:                Sink blinky_c$D_IN_CCU2C_S1$CCU2_COMB1.FCI
Info:  0.0  1.6  Source blinky_c$D_IN_CCU2C_S1$CCU2_COMB1.FCO
Info:  0.0  1.6    Net blinky_c$D_IN_CCU2C_S1_COUT (78,3) -> (78,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_5$CCU2_COMB0.FCI
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:89.43-89.59
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/arith_map.v:74.7-80.4
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_sim.v:82.9-82.13
Info:  0.0  1.6  Source blinky_c$D_IN_CCU2C_S0_5$CCU2_COMB0.FCO
Info:  0.0  1.6    Net blinky_c$D_IN_CCU2C_S0_5$CCU2_FCI_INT (78,3) -> (78,3)
Info:                Sink blinky_c$D_IN_CCU2C_S0_5$CCU2_COMB1.FCI
Info:  0.2  1.9  Source blinky_c$D_IN_CCU2C_S0_5$CCU2_COMB1.F
Info:  0.5  2.3    Net blinky_c$D_IN_CCU2C_S0_5_S1[2] (78,3) -> (78,2)
Info:                Sink blinky_c$D_IN_LUT4_Z_2.D
Info:                Defined in:
Info:                  /work/oxidecomputer/quartz/oss-cad-suite/lib/../share/yosys/ecp5/cells_map.v:108.23-108.24
Info:  0.1  2.5  Source blinky_c$D_IN_LUT4_Z_2.F
Info:  0.1  2.6    Net blinky_c$D_IN[21] (78,2) -> (78,2)
Info:                Sink blinky_c_TRELLIS_FF_Q_1.DI
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:64.17-64.30
Info:  0.0  2.6  Setup blinky_c_TRELLIS_FF_Q_1.DI
Info: 1.4 ns logic, 1.2 ns routing

Info: Critical path report for cross-domain path '<async>' -> '<async>':
Info: curr total
Info:  0.0  0.0  Source GSR_N$tr_io.O
Info:  2.6  2.6    Net GSR_N$TRELLIS_IO_IN (0,47) -> (4,94)
Info:                Sink gsr.GSR
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:44.10-44.15
Info: 0.0 ns logic, 2.6 ns routing

Info: Critical path report for cross-domain path '<async>' -> 'posedge $glbnet$CLK_12mhz$TRELLIS_IO_IN':
Info: curr total
Info:  0.0  0.0  Source btn$tr_io.O
Info:  6.2  6.2    Net btn$TRELLIS_IO_IN (0,92) -> (73,13)
Info:                Sink blinky_d1_TRELLIS_FF_Q.M
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:50.10-50.13
Info:  0.0  6.2  Setup blinky_d1_TRELLIS_FF_Q.M
Info: 0.0 ns logic, 6.2 ns routing

Info: Critical path report for cross-domain path 'posedge $glbnet$CLK_12mhz$TRELLIS_IO_IN' -> '<async>':
Info: curr total
Info:  0.3  0.3  Source blinky_d1_TRELLIS_FF_Q.Q
Info:  1.2  1.5    Net blinky_d1 (73,13) -> (76,0)
Info:                Sink led[1]$tr_io.I
Info:                Defined in:
Info:                  ./env/365cfec5e27ba62ea22ca8241d49403d6a569816/hdl/projects/ecp5_evn/mkBlinky.v:76.16-76.27
Info: 0.3 ns logic, 1.2 ns routing

Info: Max frequency for clock '$glbnet$CLK_12mhz$TRELLIS_IO_IN': 385.06 MHz (PASS at 12.00 MHz)

Info: Max delay <async>                                 -> <async>                                : 2.62 ns
Info: Max delay <async>                                 -> posedge $glbnet$CLK_12mhz$TRELLIS_IO_IN: 6.19 ns
Info: Max delay posedge $glbnet$CLK_12mhz$TRELLIS_IO_IN -> <async>                                : 1.49 ns

Info: Slack histogram:
Info:  legend: * represents 1 endpoint(s)
Info:          + represents [1,1) endpoint(s)
Info: [ 80736,  80831) |** 
Info: [ 80831,  80926) |*** 
Info: [ 80926,  81021) |** 
Info: [ 81021,  81116) |* 
Info: [ 81116,  81211) | 
Info: [ 81211,  81306) | 
Info: [ 81306,  81401) |** 
Info: [ 81401,  81496) |** 
Info: [ 81496,  81591) |** 
Info: [ 81591,  81686) |*** 
Info: [ 81686,  81781) |**** 
Info: [ 81781,  81876) |** 
Info: [ 81876,  81971) | 
Info: [ 81971,  82066) | 
Info: [ 82066,  82161) | 
Info: [ 82161,  82256) | 
Info: [ 82256,  82351) | 
Info: [ 82351,  82446) | 
Info: [ 82446,  82541) |* 
Info: [ 82541,  82636) |* 

Info: Program finished normally.