Max level shown:
1 +---------------------------------------------------------------------+
2 | Log file: mau.resources.log |
3 | Compiler version: 9.13.4 |
4 | Created on: Thu Dec 18 07:13:54 2025 |
5 | Run ID: 2744ebb868064575 |
6 +---------------------------------------------------------------------+
7 
8 
9 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
10 | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Exact Match Search Bus | Exact Match Result Bus | Tind Result Bus | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
11 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
12 | 0 | 25 | 25 | 9 | 1 | 15 | 6 | 4 | 6 | 6 | 0 | 2 | 0 | 14 | 3 | 6 | 4 | 0 | 0 | 0 | 16 |
13 | 1 | 12 | 18 | 79 | 2 | 6 | 24 | 8 | 4 | 5 | 0 | 4 | 0 | 5 | 5 | 4 | 47 | 0 | 0 | 0 | 10 |
14 | 2 | 29 | 2 | 107 | 2 | 7 | 40 | 10 | 1 | 8 | 0 | 4 | 0 | 7 | 5 | 3 | 56 | 0 | 0 | 0 | 8 |
15 | 3 | 10 | 24 | 9 | 1 | 3 | 17 | 9 | 24 | 2 | 0 | 4 | 0 | 3 | 2 | 2 | 52 | 0 | 0 | 0 | 5 |
16 | 4 | 6 | 11 | 9 | 1 | 2 | 10 | 4 | 7 | 4 | 0 | 2 | 0 | 2 | 2 | 2 | 33 | 0 | 0 | 0 | 4 |
17 | 5 | 14 | 3 | 29 | 1 | 12 | 10 | 6 | 1 | 5 | 0 | 3 | 0 | 12 | 4 | 9 | 12 | 0 | 0 | 0 | 15 |
18 | 6 | 4 | 0 | 0 | 0 | 2 | 4 | 0 | 0 | 3 | 0 | 0 | 0 | 2 | 0 | 6 | 49 | 0 | 0 | 0 | 6 |
19 | 7 | 43 | 16 | 41 | 0 | 8 | 22 | 7 | 6 | 11 | 0 | 3 | 0 | 9 | 1 | 9 | 24 | 0 | 0 | 0 | 11 |
20 | 8 | 60 | 0 | 66 | 2 | 1 | 15 | 3 | 0 | 2 | 0 | 1 | 0 | 2 | 1 | 1 | 15 | 0 | 0 | 0 | 1 |
21 | 9 | 3 | 7 | 0 | 0 | 2 | 1 | 0 | 2 | 4 | 0 | 0 | 0 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 3 |
22 | 10 | 3 | 0 | 10 | 0 | 1 | 2 | 0 | 0 | 6 | 0 | 0 | 0 | 1 | 1 | 0 | 8 | 0 | 0 | 0 | 1 |
23 | 11 | 52 | 20 | 26 | 2 | 8 | 12 | 7 | 22 | 5 | 0 | 2 | 0 | 8 | 4 | 5 | 14 | 0 | 0 | 0 | 11 |
24 | 12 | 24 | 16 | 80 | 0 | 5 | 21 | 8 | 3 | 9 | 0 | 3 | 0 | 6 | 2 | 11 | 17 | 0 | 0 | 0 | 14 |
25 | 13 | 5 | 0 | 80 | 0 | 2 | 12 | 0 | 0 | 6 | 0 | 0 | 0 | 2 | 2 | 5 | 37 | 0 | 0 | 0 | 8 |
26 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 2 |
27 | 15 | 4 | 0 | 80 | 0 | 0 | 24 | 8 | 0 | 4 | 0 | 2 | 0 | 2 | 2 | 0 | 28 | 0 | 0 | 0 | 2 |
28 | 16 | 3 | 0 | 0 | 0 | 2 | 4 | 0 | 0 | 6 | 0 | 0 | 0 | 2 | 0 | 8 | 34 | 0 | 0 | 0 | 8 |
29 | 17 | 20 | 0 | 80 | 0 | 0 | 22 | 6 | 0 | 4 | 0 | 2 | 0 | 2 | 2 | 0 | 17 | 0 | 0 | 0 | 2 |
30 | 18 | 8 | 0 | 36 | 3 | 5 | 10 | 8 | 0 | 2 | 0 | 4 | 0 | 4 | 4 | 3 | 6 | 0 | 0 | 0 | 5 |
31 | | | | | | | | | | | | | | | | | | | | | |
32 | Totals | 325 | 142 | 741 | 15 | 81 | 256 | 88 | 76 | 94 | 0 | 36 | 0 | 85 | 40 | 77 | 453 | 0 | 0 | 0 | 132 |
33 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
34 
35 
36 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
37 | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Exact Match Search Bus | Exact Match Result Bus | Tind Result Bus | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
38 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
39 | 0 | 19.53% | 37.88% | 2.16% | 16.67% | 93.75% | 7.50% | 8.33% | 25.00% | 18.75% | 0.00% | 50.00% | 0.00% | 87.50% | 18.75% | 37.50% | 3.12% | 0.00% | 0.00% | 0.00% | 100.00% |
40 | 1 | 9.38% | 27.27% | 18.99% | 33.33% | 37.50% | 30.00% | 16.67% | 16.67% | 15.62% | 0.00% | 100.00% | 0.00% | 31.25% | 31.25% | 25.00% | 36.72% | 0.00% | 0.00% | 0.00% | 62.50% |
41 | 2 | 22.66% | 3.03% | 25.72% | 33.33% | 43.75% | 50.00% | 20.83% | 4.17% | 25.00% | 0.00% | 100.00% | 0.00% | 43.75% | 31.25% | 18.75% | 43.75% | 0.00% | 0.00% | 0.00% | 50.00% |
42 | 3 | 7.81% | 36.36% | 2.16% | 16.67% | 18.75% | 21.25% | 18.75% | 100.00% | 6.25% | 0.00% | 100.00% | 0.00% | 18.75% | 12.50% | 12.50% | 40.62% | 0.00% | 0.00% | 0.00% | 31.25% |
43 | 4 | 4.69% | 16.67% | 2.16% | 16.67% | 12.50% | 12.50% | 8.33% | 29.17% | 12.50% | 0.00% | 50.00% | 0.00% | 12.50% | 12.50% | 12.50% | 25.78% | 0.00% | 0.00% | 0.00% | 25.00% |
44 | 5 | 10.94% | 4.55% | 6.97% | 16.67% | 75.00% | 12.50% | 12.50% | 4.17% | 15.62% | 0.00% | 75.00% | 0.00% | 75.00% | 25.00% | 56.25% | 9.38% | 0.00% | 0.00% | 0.00% | 93.75% |
45 | 6 | 3.12% | 0.00% | 0.00% | 0.00% | 12.50% | 5.00% | 0.00% | 0.00% | 9.38% | 0.00% | 0.00% | 0.00% | 12.50% | 0.00% | 37.50% | 38.28% | 0.00% | 0.00% | 0.00% | 37.50% |
46 | 7 | 33.59% | 24.24% | 9.86% | 0.00% | 50.00% | 27.50% | 14.58% | 25.00% | 34.38% | 0.00% | 75.00% | 0.00% | 56.25% | 6.25% | 56.25% | 18.75% | 0.00% | 0.00% | 0.00% | 68.75% |
47 | 8 | 46.88% | 0.00% | 15.87% | 33.33% | 6.25% | 18.75% | 6.25% | 0.00% | 6.25% | 0.00% | 25.00% | 0.00% | 12.50% | 6.25% | 6.25% | 11.72% | 0.00% | 0.00% | 0.00% | 6.25% |
48 | 9 | 2.34% | 10.61% | 0.00% | 0.00% | 12.50% | 1.25% | 0.00% | 8.33% | 12.50% | 0.00% | 0.00% | 0.00% | 12.50% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 0.00% | 18.75% |
49 | 10 | 2.34% | 0.00% | 2.40% | 0.00% | 6.25% | 2.50% | 0.00% | 0.00% | 18.75% | 0.00% | 0.00% | 0.00% | 6.25% | 6.25% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 6.25% |
50 | 11 | 40.62% | 30.30% | 6.25% | 33.33% | 50.00% | 15.00% | 14.58% | 91.67% | 15.62% | 0.00% | 50.00% | 0.00% | 50.00% | 25.00% | 31.25% | 10.94% | 0.00% | 0.00% | 0.00% | 68.75% |
51 | 12 | 18.75% | 24.24% | 19.23% | 0.00% | 31.25% | 26.25% | 16.67% | 12.50% | 28.12% | 0.00% | 75.00% | 0.00% | 37.50% | 12.50% | 68.75% | 13.28% | 0.00% | 0.00% | 0.00% | 87.50% |
52 | 13 | 3.91% | 0.00% | 19.23% | 0.00% | 12.50% | 15.00% | 0.00% | 0.00% | 18.75% | 0.00% | 0.00% | 0.00% | 12.50% | 12.50% | 31.25% | 28.91% | 0.00% | 0.00% | 0.00% | 50.00% |
53 | 14 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
54 | 15 | 3.12% | 0.00% | 19.23% | 0.00% | 0.00% | 30.00% | 16.67% | 0.00% | 12.50% | 0.00% | 50.00% | 0.00% | 12.50% | 12.50% | 0.00% | 21.88% | 0.00% | 0.00% | 0.00% | 12.50% |
55 | 16 | 2.34% | 0.00% | 0.00% | 0.00% | 12.50% | 5.00% | 0.00% | 0.00% | 18.75% | 0.00% | 0.00% | 0.00% | 12.50% | 0.00% | 50.00% | 26.56% | 0.00% | 0.00% | 0.00% | 50.00% |
56 | 17 | 15.62% | 0.00% | 19.23% | 0.00% | 0.00% | 27.50% | 12.50% | 0.00% | 12.50% | 0.00% | 50.00% | 0.00% | 12.50% | 12.50% | 0.00% | 13.28% | 0.00% | 0.00% | 0.00% | 12.50% |
57 | 18 | 6.25% | 0.00% | 8.65% | 50.00% | 31.25% | 12.50% | 16.67% | 0.00% | 6.25% | 0.00% | 100.00% | 0.00% | 25.00% | 25.00% | 18.75% | 4.69% | 0.00% | 0.00% | 0.00% | 31.25% |
58 | | | | | | | | | | | | | | | | | | | | | |
59 | Average | 13.36% | 11.32% | 9.38% | 13.16% | 26.64% | 16.84% | 9.65% | 16.67% | 15.46% | 0.00% | 47.37% | 0.00% | 27.96% | 13.16% | 25.33% | 18.63% | 0.00% | 0.00% | 0.00% | 43.42% |
60 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
61 
62 
63 Allocated Resource Usage
64 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
65 | Table | Stage | Crossbar | Hash | Gateways | RAMs | TCAMs | Map | Action | VLIW | Exm | Exm | Tind |
66 | Name | Number | Bytes | Bits | | | | RAMs | Data | Slots | Search | Result | Result |
67 | | | | | | | | | Bus | | Bus | Bus | Bus |
68 | | | | | | | | | Bytes | | | | |
69 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
70 | IngressParser.$PORT_METADATA | -1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
71 | Egress.mcast_egress.mcast_tag_check | 0 | 19 | 0 | 0 | 1 | 4 | 0 | 0 | 1 | 0 | 0 | 1 |
72 | Ingress.filter.drop_mcast_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
73 | Ingress.filter.ipv4_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
74 | Ingress.filter.switch_ipv4_addr | 0 | 6 | 0 | 0 | 1 | 2 | 0 | 0 | 3 | 0 | 0 | 1 |
75 | cond-128 | 0 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
76 | cond-129 | 0 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
77 | cond-71 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
78 | cond-72 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
79 | cond-73 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
80 | cond-74 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
81 | cond-75 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
82 | cond-76 | 0 | 6 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
83 | cond-77 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
84 | cond-78 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
85 | cond-79 | 0 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
86 | cond-80 | 0 | 8 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
87 | tbl_filter_drop_bad_mac | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
88 | tbl_filter_drop_bad_mac_0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
89 | tbl_filter_drop_bad_mac_1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
90 | tbl_sidecar190 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
91 | tbl_sidecar190-gateway | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
92 | tbl_sidecar1964 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
93 | tbl_sidecar211 | 0 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
94 | tbl_sidecar211-gateway | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
95 | tbl_sidecar225 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
96 | tbl_sidecar225-gateway | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
97 | Egress.mac_rewrite.ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
98 | Egress.mac_rewrite.mac_rewrite | 1 | 2 | 10 | 0 | 1 | 0 | 0 | 6 | 2 | 1 | 1 | 0 |
99 | Egress.mac_rewrite.mac_rewrite$action | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
100 | Egress.mcast_egress.asic_id_to_port | 1 | 2 | 10 | 0 | 1 | 0 | 0 | 1 | 2 | 1 | 1 | 0 |
101 | Egress.mcast_egress.tbl_decap_ports | 1 | 2 | 40 | 0 | 4 | 0 | 0 | 34 | 3 | 1 | 1 | 0 |
102 | Egress.mcast_egress.tbl_decap_ports$action | 1 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
103 | Ingress.filter.ipv6_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
104 | Ingress.filter.switch_ipv6_addr | 1 | 18 | 0 | 0 | 1 | 4 | 0 | 0 | 3 | 0 | 0 | 1 |
105 | Ingress.ingress_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
106 | Ingress.packet_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
107 | cond-127 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
108 | cond-135 | 1 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
109 | cond-81 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
110 | cond-82 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
111 | tbl_sidecar1960 | 1 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
112 | tbl_sidecar1960-gateway | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
113 | tbl_sidecar1961 | 1 | 2 | 10 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
114 | tbl_sidecar1961-gateway | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
115 | tbl_sidecar2156 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | 0 | 0 | 1 |
116 | tbl_sidecar2164 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
117 | tbl_sidecar2173 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
118 | Egress.drop_port_ctr | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
119 | Egress.drop_reason_ctr | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
120 | Egress.mcast_egress.port_bitmap_check | 2 | 1 | 10 | 0 | 1 | 0 | 0 | 4 | 9 | 1 | 1 | 0 |
121 | Ingress.nat_ingress.icmp_dst_port | 2 | 2 | 0 | 0 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 1 |
122 | Ingress.nat_ingress.ingress_ipv4_mcast | 2 | 4 | 40 | 0 | 4 | 0 | 0 | 26 | 2 | 1 | 1 | 0 |
123 | Ingress.nat_ingress.ingress_ipv4_mcast$action | 2 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
124 | Ingress.nat_ingress.ingress_ipv6_mcast | 2 | 16 | 40 | 0 | 8 | 0 | 0 | 26 | 2 | 1 | 1 | 0 |
125 | Ingress.nat_ingress.ingress_ipv6_mcast$action | 2 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
126 | Ingress.nat_ingress.mcast_ipv4_ingress_ctr | 2 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
127 | Ingress.nat_ingress.mcast_ipv6_ingress_ctr | 2 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
128 | cond-136 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
129 | cond-83 | 2 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
130 | cond-84 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
131 | cond-85 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
132 | cond-86 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
133 | cond-87 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
134 | tbl_sidecar2179 | 2 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
135 | tbl_sidecar2179-gateway | 2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
136 | tbl_sidecar2180 | 2 | 1 | 8 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
137 | Egress.mcast_ctr | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
138 | Egress.unicast_ctr | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
139 | Ingress.nat_ingress.ingress_ipv4 | 3 | 8 | 0 | 0 | 0 | 4 | 0 | 26 | 2 | 0 | 0 | 0 |
140 | Ingress.nat_ingress.ingress_ipv4$action | 3 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
141 | Ingress.nat_ingress.ingress_ipv6 | 3 | 20 | 0 | 0 | 0 | 20 | 0 | 26 | 2 | 0 | 0 | 0 |
142 | Ingress.nat_ingress.ingress_ipv6$action | 3 | 0 | 0 | 0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
143 | Ingress.nat_ingress.ipv4_ingress_ctr | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
144 | Ingress.nat_ingress.ipv6_ingress_ctr | 3 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
145 | cond-130 | 3 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
146 | cond-137 | 3 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
147 | tbl_sidecar1929 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
148 | tbl_sidecar2182 | 3 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
149 | tbl_sidecar2196 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
150 | tbl_sidecar2196-gateway | 3 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
151 | Egress.link_local_mcast_ctr | 4 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
152 | Egress.mcast_egress.modify_hdr | 4 | 3 | 0 | 0 | 1 | 1 | 0 | 6 | 5 | 0 | 0 | 1 |
153 | Egress.mcast_egress.modify_hdr$action | 4 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
154 | Ingress.nat_ingress.ingress_ipv4 | 4 | 8 | 0 | 0 | 0 | 6 | 0 | 26 | 2 | 0 | 0 | 0 |
155 | Ingress.nat_ingress.ingress_ipv4$action | 4 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
156 | Ingress.nat_ingress.ipv4_ingress_ctr | 4 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
157 | cond-138 | 4 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
158 | egresshdr.inner_ipv4.hdr_checksum_encode_update_condition_5-gateway | 4 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
159 | egresshdr.inner_ipv4.hdr_checksum_encode_update_condition_5_egress | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 1 | 0 |
160 | tbl_sidecar2185 | 4 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
161 | Egress.external_mcast_ctr | 5 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
162 | Egress.underlay_mcast_ctr | 5 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
163 | Ingress.nat_ingress.CalculateIPv4Len.ipv4_set_len | 5 | 1 | 10 | 0 | 1 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
164 | Ingress.nat_ingress.ingress_hit | 5 | 3 | 0 | 0 | 1 | 1 | 0 | 8 | 4 | 0 | 0 | 1 |
165 | Ingress.nat_ingress.ingress_hit$action | 5 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
166 | Ingress.nat_ingress.nat_only | 5 | 2 | 10 | 0 | 1 | 0 | 0 | 0 | 2 | 1 | 1 | 0 |
167 | Ingress.nat_ingress.nat_only_ctr | 5 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
168 | cond-126 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
169 | cond-131 | 5 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
170 | cond-132 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
171 | cond-133 | 5 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
172 | cond-134 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
173 | cond-139 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
174 | cond-140 | 5 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
175 | cond-88 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
176 | cond-91 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
177 | cond-92 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
178 | cond-93 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
179 | cond-96 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
180 | tbl_sidecar1483 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
181 | tbl_sidecar1485 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
182 | tbl_sidecar1488 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
183 | tbl_sidecar1498_0 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
184 | tbl_sidecar1500_0 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
185 | tbl_sidecar2043 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
186 | tbl_sidecar2187 | 5 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
187 | tbl_sidecar2191 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
188 | cond-89 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
189 | cond-94 | 6 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
190 | tbl_nat_ingress_CalculateIPv4Len_invert | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
191 | tbl_nat_ingress_encap_ipv4 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 23 | 1 | 0 | 0 | 1 |
192 | tbl_nat_ingress_encap_ipv4$action | 6 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
193 | tbl_nat_ingress_encap_ipv6 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 23 | 1 | 0 | 0 | 1 |
194 | tbl_nat_ingress_encap_ipv6$action | 6 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
195 | tbl_sidecar1488_0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
196 | tbl_sidecar1503 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | 0 | 0 | 1 |
197 | tbl_sidecar408 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
198 | Ingress.mcast_ingress.mcast_ipv4_ssm_ctr | 7 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
199 | Ingress.mcast_ingress.mcast_ipv6_ssm_ctr | 7 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
200 | Ingress.mcast_ingress.mcast_source_filter_ipv4 | 7 | 8 | 0 | 0 | 1 | 4 | 0 | 1 | 2 | 0 | 0 | 1 |
201 | Ingress.mcast_ingress.mcast_source_filter_ipv6 | 7 | 32 | 40 | 0 | 12 | 0 | 0 | 1 | 2 | 1 | 1 | 0 |
202 | Ingress.services.service | 7 | 8 | 0 | 0 | 1 | 2 | 0 | 20 | 7 | 0 | 0 | 1 |
203 | Ingress.services.service$action | 7 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
204 | Ingress.services.service_ctr | 7 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
205 | cond-100 | 7 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
206 | cond-101 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
207 | cond-102 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
208 | cond-90 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
209 | cond-95 | 7 | 5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
210 | cond-97 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
211 | cond-98 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
212 | cond-99 | 7 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
213 | tbl_mcast_ingress_drop_mcastv4_no_group | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
214 | tbl_mcast_ingress_drop_mcastv6_no_group | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
215 | tbl_sidecar1707 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
216 | tbl_sidecar1716 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
217 | tbl_sidecar412 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
218 | tbl_sidecar686 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
219 | Ingress.mcast_ingress.mcast_ipv6_ctr | 8 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
220 | Ingress.mcast_ingress.mcast_replication_ipv6 | 8 | 58 | 66 | 0 | 8 | 0 | 0 | 15 | 2 | 1 | 1 | 0 |
221 | Ingress.mcast_ingress.mcast_replication_ipv6$action | 8 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
222 | cond-103 | 8 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
223 | mcast_ingress_mcast_replication_ipv6 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
224 | Ingress.mcast_ingress.mcast_tag_check | 9 | 7 | 0 | 0 | 1 | 2 | 0 | 0 | 5 | 0 | 0 | 1 |
225 | cond-104 | 9 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
226 | cond-105 | 9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
227 | Ingress.nat_egress.nat_egress | 10 | 2 | 10 | 0 | 1 | 0 | 0 | 8 | 7 | 1 | 1 | 0 |
228 | Ingress.nat_egress.nat_egress$action | 10 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
229 | cond-106 | 10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
230 | Ingress.l3_router.Router4.lookup_idx.index_ctr | 11 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 |
231 | Ingress.l3_router.Router4.lookup_idx.lookup | 11 | 4 | 0 | 0 | 1 | 16 | 0 | 4 | 2 | 0 | 0 | 1 |
232 | Ingress.l3_router.Router4.lookup_idx.lookup$action | 11 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
233 | Ingress.l3_router.Router6.lookup_idx.index_ctr | 11 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
234 | Ingress.l3_router.Router6.lookup_idx.lookup | 11 | 16 | 0 | 0 | 1 | 6 | 0 | 6 | 2 | 0 | 0 | 1 |
235 | cond-107 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
236 | cond-108 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
237 | cond-109 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
238 | cond-110 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
239 | cond-116 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
240 | cond-117 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
241 | cond-118 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
242 | ingresshdr.icmp.hdr_checksum_encode_update_condition_4-gateway | 11 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
243 | ingresshdr.icmp.hdr_checksum_encode_update_condition_4_ingress | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 1 | 0 |
244 | ingresshdr.udp.checksum_encode_update_condition_3_ingress | 11 | 3 | 10 | 0 | 1 | 0 | 0 | 1 | 2 | 1 | 1 | 0 |
245 | tbl_sidecar1154$precompute | 11 | 12 | 8 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
246 | tbl_sidecar1237 | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
247 | tbl_sidecar1294$precompute | 11 | 36 | 8 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
248 | tbl_sidecar1375 | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
249 | Ingress.l3_router.MulticastRouter4.ctr | 12 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
250 | Ingress.l3_router.MulticastRouter4.tbl | 12 | 4 | 40 | 0 | 4 | 0 | 0 | 2 | 3 | 1 | 1 | 0 |
251 | Ingress.l3_router.MulticastRouter6.ctr | 12 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
252 | Ingress.l3_router.MulticastRouter6.tbl | 12 | 16 | 40 | 0 | 8 | 0 | 0 | 2 | 3 | 1 | 1 | 0 |
253 | Ingress.l3_router.Router6.lookup_idx.index_ctr | 12 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
254 | Ingress.l3_router.Router6.lookup_idx.lookup | 12 | 16 | 0 | 0 | 1 | 3 | 0 | 6 | 2 | 0 | 0 | 1 |
255 | cond-111 | 12 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
256 | cond-112 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
257 | cond-113 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
258 | cond-114 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
259 | cond-119 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
260 | tbl_sidecar1154 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
261 | tbl_sidecar1167 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
262 | tbl_sidecar1243 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
263 | tbl_sidecar1248 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
264 | tbl_sidecar1253 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
265 | tbl_sidecar1255 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
266 | tbl_sidecar1294 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
267 | tbl_sidecar1381 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
268 | tbl_sidecar1386 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
269 | tbl_sidecar1391 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
270 | Ingress.l3_router.Router4.lookup_idx.select_route | 13 | 2 | 40 | 0 | 4 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
271 | Ingress.l3_router.Router6.lookup_idx.select_route | 13 | 2 | 40 | 0 | 4 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
272 | cond-120 | 13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
273 | cond-121 | 13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
274 | tbl_l3_router_MulticastRouter4_icmp_error | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
275 | tbl_l3_router_MulticastRouter4_icmp_error$action | 13 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
276 | tbl_l3_router_MulticastRouter4_icmp_error_0 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
277 | tbl_l3_router_MulticastRouter4_icmp_error_0$action | 13 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
278 | tbl_l3_router_MulticastRouter6_icmp_error | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
279 | tbl_l3_router_MulticastRouter6_icmp_error$action | 13 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
280 | tbl_l3_router_MulticastRouter6_icmp_error_0 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
281 | tbl_l3_router_MulticastRouter6_icmp_error_0$action | 13 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
282 | tbl_sidecar1305 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
283 | tbl_sidecar1019 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
284 | tbl_sidecar924 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
285 | Ingress.l3_router.Router4.lookup_idx.forward_ctr | 15 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 |
286 | Ingress.l3_router.Router4.lookup_idx.route | 15 | 2 | 40 | 0 | 4 | 0 | 0 | 8 | 3 | 1 | 1 | 0 |
287 | Ingress.l3_router.Router4.lookup_idx.route$action | 15 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
288 | Ingress.l3_router.Router6.lookup_idx.forward_ctr | 15 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
289 | Ingress.l3_router.Router6.lookup_idx.route | 15 | 2 | 40 | 0 | 4 | 0 | 0 | 20 | 3 | 1 | 1 | 0 |
290 | Ingress.l3_router.Router6.lookup_idx.route$action | 15 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
291 | cond-115 | 16 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
292 | cond-122 | 16 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
293 | tbl_l3_router_Router4_icmp_error | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
294 | tbl_l3_router_Router4_icmp_error$action | 16 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
295 | tbl_l3_router_Router4_icmp_error_0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
296 | tbl_l3_router_Router4_icmp_error_0$action | 16 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
297 | tbl_l3_router_Router6_icmp_error | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
298 | tbl_l3_router_Router6_icmp_error$action | 16 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
299 | tbl_l3_router_Router6_icmp_error_0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
300 | tbl_l3_router_Router6_icmp_error_0$action | 16 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
301 | tbl_sidecar1172 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
302 | tbl_sidecar1174 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
303 | tbl_sidecar1310 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
304 | tbl_sidecar1314 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
305 | Ingress.l3_router.Router4.Arp.ctr | 17 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
306 | Ingress.l3_router.Router4.Arp.tbl | 17 | 4 | 40 | 0 | 4 | 0 | 0 | 8 | 3 | 1 | 1 | 0 |
307 | Ingress.l3_router.Router4.Arp.tbl$action | 17 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
308 | Ingress.l3_router.Router6.Ndp.ctr | 17 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
309 | Ingress.l3_router.Router6.Ndp.tbl | 17 | 16 | 40 | 0 | 8 | 0 | 0 | 9 | 3 | 1 | 1 | 0 |
310 | Ingress.l3_router.Router6.Ndp.tbl$action | 17 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
311 | Ingress.drop_port_ctr | 18 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
312 | Ingress.drop_reason_ctr | 18 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
313 | Ingress.egress_ctr | 18 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
314 | Ingress.mac_rewrite.ctr | 18 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
315 | Ingress.mac_rewrite.mac_rewrite | 18 | 2 | 10 | 0 | 1 | 0 | 0 | 6 | 2 | 1 | 1 | 0 |
316 | Ingress.mac_rewrite.mac_rewrite$action | 18 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
317 | cond-123 | 18 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
318 | cond-124 | 18 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
319 | cond-125 | 18 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
320 | tbl_sidecar1999 | 18 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
321 | tbl_sidecar1999-gateway | 18 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
322 | tbl_sidecar2001 | 18 | 1 | 8 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
323 | tbl_sidecar2003 | 18 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
324 | tbl_sidecar2003-gateway | 18 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
325 | tbl_sidecar2007 | 18 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
326 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
327