Max level shown:
1 +---------------------------------------------------------------------+
2 | Log file: mau.resources.log |
3 | Compiler version: 9.13.4 |
4 | Created on: Fri Jan 16 01:12:12 2026 |
5 | Run ID: 43a32bf9f53c4e96 |
6 +---------------------------------------------------------------------+
7 
8 
9 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
10 | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Exact Match Search Bus | Exact Match Result Bus | Tind Result Bus | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
11 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
12 | 0 | 22 | 6 | 19 | 2 | 15 | 7 | 6 | 2 | 5 | 0 | 3 | 0 | 13 | 4 | 5 | 0 | 0 | 0 | 0 | 16 |
13 | 1 | 16 | 56 | 59 | 1 | 8 | 29 | 8 | 16 | 3 | 0 | 4 | 0 | 8 | 3 | 5 | 91 | 0 | 0 | 0 | 10 |
14 | 2 | 30 | 2 | 100 | 0 | 6 | 40 | 8 | 1 | 8 | 0 | 3 | 0 | 9 | 4 | 5 | 66 | 0 | 0 | 0 | 9 |
15 | 3 | 11 | 24 | 17 | 2 | 4 | 18 | 9 | 24 | 2 | 0 | 4 | 0 | 3 | 2 | 3 | 52 | 0 | 0 | 0 | 5 |
16 | 4 | 6 | 11 | 9 | 1 | 3 | 13 | 8 | 7 | 4 | 0 | 4 | 0 | 3 | 3 | 2 | 30 | 0 | 0 | 0 | 5 |
17 | 5 | 16 | 2 | 29 | 1 | 12 | 10 | 6 | 1 | 5 | 0 | 3 | 0 | 12 | 5 | 10 | 13 | 0 | 0 | 0 | 15 |
18 | 6 | 4 | 0 | 0 | 0 | 3 | 4 | 0 | 0 | 3 | 0 | 0 | 0 | 3 | 0 | 6 | 48 | 0 | 0 | 0 | 7 |
19 | 7 | 42 | 18 | 41 | 0 | 7 | 22 | 7 | 6 | 9 | 0 | 3 | 0 | 8 | 1 | 8 | 10 | 0 | 0 | 0 | 10 |
20 | 8 | 60 | 0 | 66 | 2 | 1 | 15 | 3 | 0 | 2 | 0 | 1 | 0 | 2 | 1 | 1 | 14 | 0 | 0 | 0 | 1 |
21 | 9 | 0 | 7 | 0 | 0 | 0 | 1 | 0 | 2 | 4 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
22 | 10 | 4 | 0 | 0 | 0 | 3 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 3 |
23 | 11 | 3 | 0 | 10 | 0 | 1 | 2 | 0 | 0 | 6 | 0 | 0 | 0 | 1 | 1 | 0 | 8 | 0 | 0 | 0 | 1 |
24 | 12 | 48 | 20 | 16 | 2 | 8 | 11 | 7 | 22 | 5 | 0 | 2 | 0 | 8 | 3 | 5 | 12 | 0 | 0 | 0 | 10 |
25 | 13 | 27 | 16 | 90 | 0 | 5 | 22 | 8 | 3 | 9 | 0 | 3 | 0 | 6 | 3 | 9 | 12 | 0 | 0 | 0 | 13 |
26 | 14 | 5 | 0 | 80 | 0 | 2 | 12 | 0 | 0 | 8 | 0 | 0 | 0 | 2 | 2 | 7 | 36 | 0 | 0 | 0 | 10 |
27 | 15 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 2 |
28 | 16 | 4 | 0 | 80 | 0 | 0 | 24 | 8 | 0 | 4 | 0 | 2 | 0 | 2 | 2 | 0 | 30 | 0 | 0 | 0 | 2 |
29 | 17 | 3 | 0 | 0 | 0 | 2 | 4 | 0 | 0 | 6 | 0 | 0 | 0 | 2 | 0 | 8 | 32 | 0 | 0 | 0 | 8 |
30 | 18 | 20 | 0 | 80 | 0 | 0 | 22 | 6 | 0 | 4 | 0 | 2 | 0 | 2 | 2 | 0 | 16 | 0 | 0 | 0 | 2 |
31 | 19 | 8 | 0 | 36 | 3 | 5 | 10 | 8 | 0 | 2 | 0 | 4 | 0 | 4 | 4 | 3 | 6 | 0 | 0 | 0 | 5 |
32 | | | | | | | | | | | | | | | | | | | | | |
33 | Totals | 329 | 162 | 732 | 14 | 85 | 266 | 92 | 84 | 92 | 0 | 38 | 0 | 91 | 40 | 81 | 476 | 0 | 0 | 0 | 135 |
34 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
35 
36 
37 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
38 | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Exact Match Search Bus | Exact Match Result Bus | Tind Result Bus | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
39 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
40 | 0 | 17.19% | 9.09% | 4.57% | 33.33% | 93.75% | 8.75% | 12.50% | 8.33% | 15.62% | 0.00% | 75.00% | 0.00% | 81.25% | 25.00% | 31.25% | 0.00% | 0.00% | 0.00% | 0.00% | 100.00% |
41 | 1 | 12.50% | 84.85% | 14.18% | 16.67% | 50.00% | 36.25% | 16.67% | 66.67% | 9.38% | 0.00% | 100.00% | 0.00% | 50.00% | 18.75% | 31.25% | 71.09% | 0.00% | 0.00% | 0.00% | 62.50% |
42 | 2 | 23.44% | 3.03% | 24.04% | 0.00% | 37.50% | 50.00% | 16.67% | 4.17% | 25.00% | 0.00% | 75.00% | 0.00% | 56.25% | 25.00% | 31.25% | 51.56% | 0.00% | 0.00% | 0.00% | 56.25% |
43 | 3 | 8.59% | 36.36% | 4.09% | 33.33% | 25.00% | 22.50% | 18.75% | 100.00% | 6.25% | 0.00% | 100.00% | 0.00% | 18.75% | 12.50% | 18.75% | 40.62% | 0.00% | 0.00% | 0.00% | 31.25% |
44 | 4 | 4.69% | 16.67% | 2.16% | 16.67% | 18.75% | 16.25% | 16.67% | 29.17% | 12.50% | 0.00% | 100.00% | 0.00% | 18.75% | 18.75% | 12.50% | 23.44% | 0.00% | 0.00% | 0.00% | 31.25% |
45 | 5 | 12.50% | 3.03% | 6.97% | 16.67% | 75.00% | 12.50% | 12.50% | 4.17% | 15.62% | 0.00% | 75.00% | 0.00% | 75.00% | 31.25% | 62.50% | 10.16% | 0.00% | 0.00% | 0.00% | 93.75% |
46 | 6 | 3.12% | 0.00% | 0.00% | 0.00% | 18.75% | 5.00% | 0.00% | 0.00% | 9.38% | 0.00% | 0.00% | 0.00% | 18.75% | 0.00% | 37.50% | 37.50% | 0.00% | 0.00% | 0.00% | 43.75% |
47 | 7 | 32.81% | 27.27% | 9.86% | 0.00% | 43.75% | 27.50% | 14.58% | 25.00% | 28.12% | 0.00% | 75.00% | 0.00% | 50.00% | 6.25% | 50.00% | 7.81% | 0.00% | 0.00% | 0.00% | 62.50% |
48 | 8 | 46.88% | 0.00% | 15.87% | 33.33% | 6.25% | 18.75% | 6.25% | 0.00% | 6.25% | 0.00% | 25.00% | 0.00% | 12.50% | 6.25% | 6.25% | 10.94% | 0.00% | 0.00% | 0.00% | 6.25% |
49 | 9 | 0.00% | 10.61% | 0.00% | 0.00% | 0.00% | 1.25% | 0.00% | 8.33% | 12.50% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 0.00% | 6.25% |
50 | 10 | 3.12% | 0.00% | 0.00% | 0.00% | 18.75% | 0.00% | 0.00% | 0.00% | 3.12% | 0.00% | 0.00% | 0.00% | 18.75% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 0.00% | 18.75% |
51 | 11 | 2.34% | 0.00% | 2.40% | 0.00% | 6.25% | 2.50% | 0.00% | 0.00% | 18.75% | 0.00% | 0.00% | 0.00% | 6.25% | 6.25% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 6.25% |
52 | 12 | 37.50% | 30.30% | 3.85% | 33.33% | 50.00% | 13.75% | 14.58% | 91.67% | 15.62% | 0.00% | 50.00% | 0.00% | 50.00% | 18.75% | 31.25% | 9.38% | 0.00% | 0.00% | 0.00% | 62.50% |
53 | 13 | 21.09% | 24.24% | 21.63% | 0.00% | 31.25% | 27.50% | 16.67% | 12.50% | 28.12% | 0.00% | 75.00% | 0.00% | 37.50% | 18.75% | 56.25% | 9.38% | 0.00% | 0.00% | 0.00% | 81.25% |
54 | 14 | 3.91% | 0.00% | 19.23% | 0.00% | 12.50% | 15.00% | 0.00% | 0.00% | 25.00% | 0.00% | 0.00% | 0.00% | 12.50% | 12.50% | 43.75% | 28.12% | 0.00% | 0.00% | 0.00% | 62.50% |
55 | 15 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
56 | 16 | 3.12% | 0.00% | 19.23% | 0.00% | 0.00% | 30.00% | 16.67% | 0.00% | 12.50% | 0.00% | 50.00% | 0.00% | 12.50% | 12.50% | 0.00% | 23.44% | 0.00% | 0.00% | 0.00% | 12.50% |
57 | 17 | 2.34% | 0.00% | 0.00% | 0.00% | 12.50% | 5.00% | 0.00% | 0.00% | 18.75% | 0.00% | 0.00% | 0.00% | 12.50% | 0.00% | 50.00% | 25.00% | 0.00% | 0.00% | 0.00% | 50.00% |
58 | 18 | 15.62% | 0.00% | 19.23% | 0.00% | 0.00% | 27.50% | 12.50% | 0.00% | 12.50% | 0.00% | 50.00% | 0.00% | 12.50% | 12.50% | 0.00% | 12.50% | 0.00% | 0.00% | 0.00% | 12.50% |
59 | 19 | 6.25% | 0.00% | 8.65% | 50.00% | 31.25% | 12.50% | 16.67% | 0.00% | 6.25% | 0.00% | 100.00% | 0.00% | 25.00% | 25.00% | 18.75% | 4.69% | 0.00% | 0.00% | 0.00% | 31.25% |
60 | | | | | | | | | | | | | | | | | | | | | |
61 | Average | 12.85% | 12.27% | 8.80% | 11.67% | 26.56% | 16.62% | 9.58% | 17.50% | 14.37% | 0.00% | 47.50% | 0.00% | 28.44% | 12.50% | 25.31% | 18.59% | 0.00% | 0.00% | 0.00% | 42.19% |
62 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
63 
64 
65 Allocated Resource Usage
66 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
67 | Table | Stage | Crossbar | Hash | Gateways | RAMs | TCAMs | Map | Action | VLIW | Exm | Exm | Tind |
68 | Name | Number | Bytes | Bits | | | | RAMs | Data | Slots | Search | Result | Result |
69 | | | | | | | | | Bus | | Bus | Bus | Bus |
70 | | | | | | | | | Bytes | | | | |
71 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
72 | IngressParser.$PORT_METADATA | -1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
73 | Ingress.filter.drop_mcast_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
74 | Ingress.filter.ipv4_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
75 | Ingress.filter.switch_ipv4_addr | 0 | 6 | 0 | 0 | 1 | 2 | 0 | 0 | 3 | 0 | 0 | 1 |
76 | Ingress.packet_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
77 | cond-75 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
78 | cond-76 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
79 | cond-77 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
80 | cond-78 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
81 | cond-79 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
82 | cond-80 | 0 | 6 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
83 | cond-81 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
84 | cond-82 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
85 | cond-83 | 0 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
86 | cond-84 | 0 | 8 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
87 | cond-87 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
88 | tbl_filter_drop_bad_mac | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
89 | tbl_filter_drop_bad_mac_0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
90 | tbl_filter_drop_bad_mac_1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
91 | tbl_sidecar191 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
92 | tbl_sidecar191-gateway | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
93 | tbl_sidecar2015 | 0 | 2 | 10 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
94 | tbl_sidecar2015-gateway | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
95 | tbl_sidecar2018 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
96 | tbl_sidecar212 | 0 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
97 | tbl_sidecar212-gateway | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
98 | tbl_sidecar226 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
99 | tbl_sidecar226-gateway | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
100 | Egress.mcast_egress.asic_id_to_port | 1 | 2 | 10 | 0 | 1 | 0 | 0 | 1 | 2 | 1 | 1 | 0 |
101 | Egress.mcast_egress.mcast_tag_check | 1 | 19 | 0 | 0 | 1 | 4 | 0 | 0 | 1 | 0 | 0 | 1 |
102 | Egress.mcast_egress.tbl_decap_ports | 1 | 2 | 40 | 0 | 4 | 0 | 0 | 34 | 3 | 1 | 1 | 0 |
103 | Egress.mcast_egress.tbl_decap_ports$action | 1 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
104 | Ingress.attached_subnet_ingress.attached_subnets_v4 | 1 | 4 | 0 | 0 | 1 | 2 | 0 | 26 | 2 | 0 | 0 | 1 |
105 | Ingress.attached_subnet_ingress.attached_subnets_v4$action | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
106 | Ingress.attached_subnet_ingress.attached_subnets_v4_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
107 | Ingress.attached_subnet_ingress.attached_subnets_v6 | 1 | 16 | 0 | 0 | 1 | 6 | 0 | 26 | 2 | 0 | 0 | 1 |
108 | Ingress.attached_subnet_ingress.attached_subnets_v6$action | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
109 | Ingress.attached_subnet_ingress.attached_subnets_v6_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
110 | Ingress.filter.ipv6_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
111 | Ingress.filter.switch_ipv6_addr | 1 | 18 | 0 | 0 | 1 | 4 | 0 | 0 | 3 | 0 | 0 | 1 |
112 | Ingress.ingress_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
113 | cond-135 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
114 | cond-136 | 1 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
115 | cond-137 | 1 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
116 | cond-85 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
117 | cond-86 | 1 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
118 | cond-88 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
119 | cond-89 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
120 | tbl_sidecar2014 | 1 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
121 | tbl_sidecar2014-gateway | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
122 | tbl_sidecar2214 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | 0 | 0 | 1 |
123 | Egress.mac_rewrite.ctr | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
124 | Egress.mac_rewrite.mac_rewrite | 2 | 2 | 10 | 0 | 1 | 0 | 0 | 6 | 2 | 1 | 1 | 0 |
125 | Egress.mac_rewrite.mac_rewrite$action | 2 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
126 | Egress.mcast_egress.port_bitmap_check | 2 | 1 | 10 | 0 | 1 | 0 | 0 | 4 | 9 | 1 | 1 | 0 |
127 | Ingress.nat_ingress.icmp_dst_port | 2 | 2 | 0 | 0 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 1 |
128 | Ingress.nat_ingress.ingress_ipv4_mcast | 2 | 4 | 40 | 0 | 4 | 0 | 0 | 26 | 2 | 1 | 1 | 0 |
129 | Ingress.nat_ingress.ingress_ipv4_mcast$action | 2 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
130 | Ingress.nat_ingress.ingress_ipv6_mcast | 2 | 16 | 40 | 0 | 8 | 0 | 0 | 26 | 2 | 1 | 1 | 0 |
131 | Ingress.nat_ingress.ingress_ipv6_mcast$action | 2 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
132 | Ingress.nat_ingress.mcast_ipv4_ingress_ctr | 2 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
133 | Ingress.nat_ingress.mcast_ipv6_ingress_ctr | 2 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
134 | cond-143 | 2 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
135 | cond-90 | 2 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
136 | cond-91 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
137 | cond-92 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
138 | cond-94 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
139 | cond-95 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
140 | tbl_sidecar2222 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | 0 | 0 | 1 |
141 | tbl_sidecar2231 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | 0 | 0 | 1 |
142 | Egress.drop_port_ctr | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
143 | Egress.drop_reason_ctr | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
144 | Ingress.nat_ingress.ingress_ipv4 | 3 | 8 | 0 | 0 | 1 | 4 | 0 | 26 | 2 | 0 | 0 | 1 |
145 | Ingress.nat_ingress.ingress_ipv4$action | 3 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
146 | Ingress.nat_ingress.ingress_ipv6 | 3 | 20 | 0 | 0 | 0 | 20 | 0 | 26 | 2 | 0 | 0 | 0 |
147 | Ingress.nat_ingress.ingress_ipv6$action | 3 | 0 | 0 | 0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
148 | Ingress.nat_ingress.ipv4_ingress_ctr | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
149 | Ingress.nat_ingress.ipv6_ingress_ctr | 3 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
150 | cond-138 | 3 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
151 | cond-144 | 3 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
152 | cond-93 | 3 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
153 | tbl_sidecar1982 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
154 | tbl_sidecar2237 | 3 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
155 | tbl_sidecar2237-gateway | 3 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
156 | tbl_sidecar2238 | 3 | 2 | 8 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
157 | Egress.link_local_mcast_ctr | 4 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
158 | Egress.mcast_ctr | 4 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
159 | Egress.mcast_egress.modify_hdr | 4 | 3 | 0 | 0 | 1 | 1 | 0 | 4 | 5 | 0 | 0 | 1 |
160 | Egress.unicast_ctr | 4 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
161 | Ingress.nat_ingress.ingress_ipv4 | 4 | 8 | 0 | 0 | 0 | 6 | 0 | 26 | 2 | 0 | 0 | 0 |
162 | Ingress.nat_ingress.ingress_ipv4$action | 4 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
163 | Ingress.nat_ingress.ipv4_ingress_ctr | 4 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
164 | cond-145 | 4 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
165 | cond-146 | 4 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
166 | tbl_sidecar2240 | 4 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
167 | tbl_sidecar2243 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
168 | tbl_sidecar2254 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
169 | tbl_sidecar2254-gateway | 4 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
170 | Egress.external_mcast_ctr | 5 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
171 | Egress.underlay_mcast_ctr | 5 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
172 | Ingress.nat_ingress.CalculateIPv4Len.ipv4_set_len | 5 | 1 | 10 | 0 | 1 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
173 | Ingress.nat_ingress.ingress_hit | 5 | 2 | 0 | 0 | 1 | 1 | 0 | 8 | 4 | 0 | 0 | 1 |
174 | Ingress.nat_ingress.ingress_hit$action | 5 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
175 | Ingress.nat_ingress.nat_only | 5 | 2 | 10 | 0 | 1 | 0 | 0 | 0 | 2 | 1 | 1 | 0 |
176 | Ingress.nat_ingress.nat_only_ctr | 5 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
177 | cond-100 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
178 | cond-101 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
179 | cond-134 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
180 | cond-139 | 5 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
181 | cond-140 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
182 | cond-141 | 5 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
183 | cond-142 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
184 | cond-147 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
185 | cond-148 | 5 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
186 | cond-96 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
187 | cond-99 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
188 | egresshdr.inner_ipv4.hdr_checksum_encode_update_condition_5-gateway | 5 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
189 | egresshdr.inner_ipv4.hdr_checksum_encode_update_condition_5_egress | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 1 | 0 |
190 | tbl_sidecar1536 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
191 | tbl_sidecar1538 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
192 | tbl_sidecar1541 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
193 | tbl_sidecar1551_0 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
194 | tbl_sidecar1553_0 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
195 | tbl_sidecar2101 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
196 | tbl_sidecar2245 | 5 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
197 | tbl_sidecar2249 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
198 | cond-102 | 6 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
199 | cond-104 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
200 | cond-97 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
201 | tbl_nat_ingress_CalculateIPv4Len_invert | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
202 | tbl_nat_ingress_encap_ipv4 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 23 | 1 | 0 | 0 | 1 |
203 | tbl_nat_ingress_encap_ipv4$action | 6 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
204 | tbl_nat_ingress_encap_ipv6 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 23 | 1 | 0 | 0 | 1 |
205 | tbl_nat_ingress_encap_ipv6$action | 6 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
206 | tbl_sidecar1541_0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
207 | tbl_sidecar1556 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | 0 | 0 | 1 |
208 | tbl_sidecar409 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
209 | Ingress.mcast_ingress.mcast_ipv4_ssm_ctr | 7 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
210 | Ingress.mcast_ingress.mcast_ipv6_ssm_ctr | 7 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
211 | Ingress.mcast_ingress.mcast_source_filter_ipv4 | 7 | 8 | 0 | 0 | 1 | 4 | 0 | 0 | 2 | 0 | 0 | 1 |
212 | Ingress.mcast_ingress.mcast_source_filter_ipv6 | 7 | 32 | 40 | 0 | 12 | 0 | 0 | 0 | 2 | 1 | 1 | 0 |
213 | Ingress.services.service | 7 | 10 | 0 | 0 | 1 | 2 | 0 | 10 | 7 | 0 | 0 | 1 |
214 | Ingress.services.service$action | 7 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
215 | Ingress.services.service_ctr | 7 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
216 | cond-103 | 7 | 5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
217 | cond-105 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
218 | cond-106 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
219 | cond-107 | 7 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
220 | cond-108 | 7 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
221 | cond-109 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
222 | cond-110 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
223 | tbl_mcast_ingress_drop_mcastv4_no_group | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
224 | tbl_mcast_ingress_drop_mcastv6_no_group | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
225 | tbl_sidecar1760 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
226 | tbl_sidecar1769 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
227 | tbl_sidecar413 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
228 | Ingress.mcast_ingress.mcast_ipv6_ctr | 8 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
229 | Ingress.mcast_ingress.mcast_replication_ipv6 | 8 | 58 | 66 | 0 | 8 | 0 | 0 | 14 | 2 | 1 | 1 | 0 |
230 | Ingress.mcast_ingress.mcast_replication_ipv6$action | 8 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
231 | cond-111 | 8 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
232 | mcast_ingress_mcast_replication_ipv6 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
233 | Ingress.mcast_ingress.mcast_tag_check | 9 | 7 | 0 | 0 | 1 | 2 | 0 | 0 | 5 | 0 | 0 | 1 |
234 | cond-112 | 10 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
235 | cond-113 | 10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
236 | cond-98 | 10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
237 | tbl_sidecar739 | 10 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
238 | Ingress.nat_egress.nat_egress | 11 | 2 | 10 | 0 | 1 | 0 | 0 | 8 | 7 | 1 | 1 | 0 |
239 | Ingress.nat_egress.nat_egress$action | 11 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
240 | cond-114 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
241 | Ingress.l3_router.Router4.lookup_idx.index_ctr | 12 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 |
242 | Ingress.l3_router.Router4.lookup_idx.lookup | 12 | 4 | 0 | 0 | 1 | 16 | 0 | 4 | 2 | 0 | 0 | 1 |
243 | Ingress.l3_router.Router4.lookup_idx.lookup$action | 12 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
244 | Ingress.l3_router.Router6.lookup_idx.index_ctr | 12 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
245 | Ingress.l3_router.Router6.lookup_idx.lookup | 12 | 16 | 0 | 0 | 1 | 6 | 0 | 4 | 2 | 0 | 0 | 1 |
246 | cond-115 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
247 | cond-116 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
248 | cond-117 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
249 | cond-118 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
250 | cond-124 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
251 | cond-125 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
252 | cond-126 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
253 | ingresshdr.icmp.hdr_checksum_encode_update_condition_4-gateway | 12 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
254 | ingresshdr.icmp.hdr_checksum_encode_update_condition_4_ingress | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 1 | 0 |
255 | tbl_sidecar1207$precompute | 12 | 12 | 8 | 0 | 0 | 0 | 0 | 2 | 1 | 0 | 1 | 0 |
256 | tbl_sidecar1290 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
257 | tbl_sidecar1347$precompute | 12 | 36 | 8 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
258 | tbl_sidecar1428 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
259 | Ingress.l3_router.MulticastRouter4.ctr | 13 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
260 | Ingress.l3_router.MulticastRouter4.tbl | 13 | 4 | 40 | 0 | 4 | 0 | 0 | 2 | 3 | 1 | 1 | 0 |
261 | Ingress.l3_router.MulticastRouter6.ctr | 13 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
262 | Ingress.l3_router.MulticastRouter6.tbl | 13 | 16 | 40 | 0 | 8 | 0 | 0 | 2 | 3 | 1 | 1 | 0 |
263 | Ingress.l3_router.Router6.lookup_idx.index_ctr | 13 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
264 | Ingress.l3_router.Router6.lookup_idx.lookup | 13 | 16 | 0 | 0 | 1 | 3 | 0 | 4 | 2 | 0 | 0 | 1 |
265 | cond-119 | 13 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
266 | cond-120 | 13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
267 | cond-121 | 13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
268 | cond-122 | 13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
269 | cond-127 | 13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
270 | ingresshdr.udp.checksum_encode_update_condition_3_ingress | 13 | 3 | 10 | 0 | 1 | 0 | 0 | 1 | 2 | 1 | 1 | 0 |
271 | tbl_sidecar1207 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | 0 | 0 | 1 |
272 | tbl_sidecar1220 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
273 | tbl_sidecar1296 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
274 | tbl_sidecar1301 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
275 | tbl_sidecar1308 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
276 | tbl_sidecar1347 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
277 | tbl_sidecar1434 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
278 | tbl_sidecar1439 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
279 | Ingress.l3_router.Router4.lookup_idx.select_route | 14 | 2 | 40 | 0 | 4 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
280 | Ingress.l3_router.Router6.lookup_idx.select_route | 14 | 2 | 40 | 0 | 4 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
281 | cond-128 | 14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
282 | cond-129 | 14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
283 | tbl_l3_router_MulticastRouter4_icmp_error | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
284 | tbl_l3_router_MulticastRouter4_icmp_error$action | 14 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
285 | tbl_l3_router_MulticastRouter4_icmp_error_0 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
286 | tbl_l3_router_MulticastRouter4_icmp_error_0$action | 14 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
287 | tbl_l3_router_MulticastRouter6_icmp_error | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
288 | tbl_l3_router_MulticastRouter6_icmp_error$action | 14 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
289 | tbl_l3_router_MulticastRouter6_icmp_error_0 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
290 | tbl_l3_router_MulticastRouter6_icmp_error_0$action | 14 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
291 | tbl_sidecar1306 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
292 | tbl_sidecar1358 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
293 | tbl_sidecar1444 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
294 | tbl_sidecar1072 | 15 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
295 | tbl_sidecar977 | 15 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
296 | Ingress.l3_router.Router4.lookup_idx.forward_ctr | 16 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 |
297 | Ingress.l3_router.Router4.lookup_idx.route | 16 | 2 | 40 | 0 | 4 | 0 | 0 | 8 | 3 | 1 | 1 | 0 |
298 | Ingress.l3_router.Router4.lookup_idx.route$action | 16 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
299 | Ingress.l3_router.Router6.lookup_idx.forward_ctr | 16 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
300 | Ingress.l3_router.Router6.lookup_idx.route | 16 | 2 | 40 | 0 | 4 | 0 | 0 | 22 | 3 | 1 | 1 | 0 |
301 | Ingress.l3_router.Router6.lookup_idx.route$action | 16 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
302 | cond-123 | 17 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
303 | cond-130 | 17 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
304 | tbl_l3_router_Router4_icmp_error | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
305 | tbl_l3_router_Router4_icmp_error$action | 17 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
306 | tbl_l3_router_Router4_icmp_error_0 | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
307 | tbl_l3_router_Router4_icmp_error_0$action | 17 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
308 | tbl_l3_router_Router6_icmp_error | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
309 | tbl_l3_router_Router6_icmp_error$action | 17 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
310 | tbl_l3_router_Router6_icmp_error_0 | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
311 | tbl_l3_router_Router6_icmp_error_0$action | 17 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
312 | tbl_sidecar1225 | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
313 | tbl_sidecar1227 | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
314 | tbl_sidecar1363 | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
315 | tbl_sidecar1367 | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
316 | Ingress.l3_router.Router4.Arp.ctr | 18 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
317 | Ingress.l3_router.Router4.Arp.tbl | 18 | 4 | 40 | 0 | 4 | 0 | 0 | 8 | 3 | 1 | 1 | 0 |
318 | Ingress.l3_router.Router4.Arp.tbl$action | 18 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
319 | Ingress.l3_router.Router6.Ndp.ctr | 18 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
320 | Ingress.l3_router.Router6.Ndp.tbl | 18 | 16 | 40 | 0 | 8 | 0 | 0 | 8 | 3 | 1 | 1 | 0 |
321 | Ingress.l3_router.Router6.Ndp.tbl$action | 18 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
322 | Ingress.drop_port_ctr | 19 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
323 | Ingress.drop_reason_ctr | 19 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
324 | Ingress.egress_ctr | 19 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
325 | Ingress.mac_rewrite.ctr | 19 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
326 | Ingress.mac_rewrite.mac_rewrite | 19 | 2 | 10 | 0 | 1 | 0 | 0 | 6 | 2 | 1 | 1 | 0 |
327 | Ingress.mac_rewrite.mac_rewrite$action | 19 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
328 | cond-131 | 19 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
329 | cond-132 | 19 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
330 | cond-133 | 19 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
331 | tbl_sidecar2057 | 19 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
332 | tbl_sidecar2057-gateway | 19 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
333 | tbl_sidecar2059 | 19 | 1 | 8 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
334 | tbl_sidecar2061 | 19 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
335 | tbl_sidecar2061-gateway | 19 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
336 | tbl_sidecar2065 | 19 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
337 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
338