Max level shown:
1 +---------------------------------------------------------------------+
2 | Log file: mau.resources.log |
3 | Compiler version: 9.13.4 |
4 | Created on: Thu Jan 29 15:24:29 2026 |
5 | Run ID: aa47bcc430784ad8 |
6 +---------------------------------------------------------------------+
7 
8 
9 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
10 | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Exact Match Search Bus | Exact Match Result Bus | Tind Result Bus | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
11 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
12 | 0 | 5 | 27 | 0 | 0 | 9 | 16 | 8 | 14 | 5 | 0 | 4 | 0 | 9 | 0 | 5 | 52 | 0 | 0 | 0 | 10 |
13 | 1 | 6 | 2 | 19 | 2 | 4 | 5 | 4 | 1 | 1 | 0 | 2 | 0 | 3 | 2 | 1 | 0 | 0 | 0 | 0 | 4 |
14 | 2 | 2 | 28 | 0 | 0 | 2 | 15 | 5 | 24 | 2 | 0 | 2 | 0 | 2 | 0 | 2 | 52 | 0 | 0 | 0 | 2 |
15 | 3 | 0 | 8 | 0 | 0 | 0 | 6 | 2 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 26 | 0 | 0 | 0 | 1 |
16 | 4 | 7 | 2 | 20 | 0 | 5 | 6 | 2 | 1 | 4 | 0 | 1 | 0 | 5 | 2 | 3 | 10 | 0 | 0 | 0 | 6 |
17 | 5 | 1 | 0 | 0 | 0 | 1 | 4 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 0 | 3 | 58 | 0 | 0 | 0 | 3 |
18 | 6 | 6 | 8 | 1 | 0 | 2 | 4 | 2 | 2 | 7 | 0 | 1 | 0 | 2 | 0 | 3 | 22 | 0 | 0 | 0 | 3 |
19 | 7 | 4 | 0 | 0 | 0 | 3 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 3 |
20 | 8 | 3 | 0 | 10 | 0 | 1 | 2 | 0 | 0 | 7 | 0 | 0 | 0 | 1 | 1 | 0 | 10 | 0 | 0 | 0 | 1 |
21 | 9 | 40 | 20 | 16 | 2 | 4 | 11 | 7 | 22 | 5 | 0 | 2 | 0 | 4 | 3 | 3 | 13 | 0 | 0 | 0 | 6 |
22 | 10 | 4 | 16 | 10 | 0 | 1 | 4 | 2 | 3 | 4 | 0 | 1 | 0 | 1 | 1 | 4 | 13 | 0 | 0 | 0 | 5 |
23 | 11 | 5 | 0 | 80 | 0 | 3 | 8 | 0 | 0 | 2 | 0 | 0 | 0 | 3 | 2 | 1 | 4 | 0 | 0 | 0 | 3 |
24 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 2 |
25 | 13 | 4 | 0 | 80 | 0 | 0 | 40 | 8 | 0 | 6 | 0 | 2 | 0 | 2 | 2 | 0 | 48 | 0 | 0 | 0 | 2 |
26 | 14 | 5 | 0 | 0 | 0 | 2 | 6 | 0 | 0 | 6 | 0 | 0 | 0 | 2 | 0 | 8 | 56 | 0 | 0 | 0 | 8 |
27 | 15 | 21 | 0 | 80 | 0 | 2 | 22 | 6 | 0 | 4 | 0 | 2 | 0 | 2 | 2 | 1 | 24 | 0 | 0 | 0 | 3 |
28 | 16 | 8 | 0 | 36 | 3 | 5 | 10 | 8 | 0 | 2 | 0 | 4 | 0 | 4 | 4 | 3 | 6 | 0 | 0 | 0 | 5 |
29 | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
30 | 18 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
31 | 19 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
32 | | | | | | | | | | | | | | | | | | | | | |
33 | Totals | 121 | 111 | 352 | 7 | 44 | 159 | 54 | 73 | 61 | 0 | 22 | 0 | 44 | 19 | 40 | 394 | 0 | 0 | 0 | 67 |
34 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
35 
36 
37 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
38 | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Exact Match Search Bus | Exact Match Result Bus | Tind Result Bus | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
39 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
40 | 0 | 3.91% | 40.91% | 0.00% | 0.00% | 56.25% | 20.00% | 16.67% | 58.33% | 15.62% | 0.00% | 100.00% | 0.00% | 56.25% | 0.00% | 31.25% | 40.62% | 0.00% | 0.00% | 0.00% | 62.50% |
41 | 1 | 4.69% | 3.03% | 4.57% | 33.33% | 25.00% | 6.25% | 8.33% | 4.17% | 3.12% | 0.00% | 50.00% | 0.00% | 18.75% | 12.50% | 6.25% | 0.00% | 0.00% | 0.00% | 0.00% | 25.00% |
42 | 2 | 1.56% | 42.42% | 0.00% | 0.00% | 12.50% | 18.75% | 10.42% | 100.00% | 6.25% | 0.00% | 50.00% | 0.00% | 12.50% | 0.00% | 12.50% | 40.62% | 0.00% | 0.00% | 0.00% | 12.50% |
43 | 3 | 0.00% | 12.12% | 0.00% | 0.00% | 0.00% | 7.50% | 4.17% | 25.00% | 3.12% | 0.00% | 25.00% | 0.00% | 0.00% | 0.00% | 0.00% | 20.31% | 0.00% | 0.00% | 0.00% | 6.25% |
44 | 4 | 5.47% | 3.03% | 4.81% | 0.00% | 31.25% | 7.50% | 4.17% | 4.17% | 12.50% | 0.00% | 25.00% | 0.00% | 31.25% | 12.50% | 18.75% | 7.81% | 0.00% | 0.00% | 0.00% | 37.50% |
45 | 5 | 0.78% | 0.00% | 0.00% | 0.00% | 6.25% | 5.00% | 0.00% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 6.25% | 0.00% | 18.75% | 45.31% | 0.00% | 0.00% | 0.00% | 18.75% |
46 | 6 | 4.69% | 12.12% | 0.24% | 0.00% | 12.50% | 5.00% | 4.17% | 8.33% | 21.88% | 0.00% | 25.00% | 0.00% | 12.50% | 0.00% | 18.75% | 17.19% | 0.00% | 0.00% | 0.00% | 18.75% |
47 | 7 | 3.12% | 0.00% | 0.00% | 0.00% | 18.75% | 0.00% | 0.00% | 0.00% | 3.12% | 0.00% | 0.00% | 0.00% | 18.75% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 0.00% | 18.75% |
48 | 8 | 2.34% | 0.00% | 2.40% | 0.00% | 6.25% | 2.50% | 0.00% | 0.00% | 21.88% | 0.00% | 0.00% | 0.00% | 6.25% | 6.25% | 0.00% | 7.81% | 0.00% | 0.00% | 0.00% | 6.25% |
49 | 9 | 31.25% | 30.30% | 3.85% | 33.33% | 25.00% | 13.75% | 14.58% | 91.67% | 15.62% | 0.00% | 50.00% | 0.00% | 25.00% | 18.75% | 18.75% | 10.16% | 0.00% | 0.00% | 0.00% | 37.50% |
50 | 10 | 3.12% | 24.24% | 2.40% | 0.00% | 6.25% | 5.00% | 4.17% | 12.50% | 12.50% | 0.00% | 25.00% | 0.00% | 6.25% | 6.25% | 25.00% | 10.16% | 0.00% | 0.00% | 0.00% | 31.25% |
51 | 11 | 3.91% | 0.00% | 19.23% | 0.00% | 18.75% | 10.00% | 0.00% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 18.75% | 12.50% | 6.25% | 3.12% | 0.00% | 0.00% | 0.00% | 18.75% |
52 | 12 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% | 0.00% | 0.00% | 0.00% | 0.00% | 12.50% |
53 | 13 | 3.12% | 0.00% | 19.23% | 0.00% | 0.00% | 50.00% | 16.67% | 0.00% | 18.75% | 0.00% | 50.00% | 0.00% | 12.50% | 12.50% | 0.00% | 37.50% | 0.00% | 0.00% | 0.00% | 12.50% |
54 | 14 | 3.91% | 0.00% | 0.00% | 0.00% | 12.50% | 7.50% | 0.00% | 0.00% | 18.75% | 0.00% | 0.00% | 0.00% | 12.50% | 0.00% | 50.00% | 43.75% | 0.00% | 0.00% | 0.00% | 50.00% |
55 | 15 | 16.41% | 0.00% | 19.23% | 0.00% | 12.50% | 27.50% | 12.50% | 0.00% | 12.50% | 0.00% | 50.00% | 0.00% | 12.50% | 12.50% | 6.25% | 18.75% | 0.00% | 0.00% | 0.00% | 18.75% |
56 | 16 | 6.25% | 0.00% | 8.65% | 50.00% | 31.25% | 12.50% | 16.67% | 0.00% | 6.25% | 0.00% | 100.00% | 0.00% | 25.00% | 25.00% | 18.75% | 4.69% | 0.00% | 0.00% | 0.00% | 31.25% |
57 | 17 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
58 | 18 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
59 | 19 | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% | 0.00% |
60 | | | | | | | | | | | | | | | | | | | | | |
61 | Average | 5.56% | 9.89% | 4.98% | 6.86% | 16.18% | 11.69% | 6.62% | 17.89% | 11.21% | 0.00% | 32.35% | 0.00% | 16.18% | 6.99% | 14.71% | 18.11% | 0.00% | 0.00% | 0.00% | 24.63% |
62 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
63 
64 
65 Allocated Resource Usage
66 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------
67 | Table | Stage | Crossbar | Hash | Gateways | RAMs | TCAMs | Map | Action | VLIW | Exm | Exm | Tind |
68 | Name | Number | Bytes | Bits | | | | RAMs | Data | Slots | Search | Result | Result |
69 | | | | | | | | | Bus | | Bus | Bus | Bus |
70 | | | | | | | | | Bytes | | | | |
71 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------
72 | IngressParser.$PORT_METADATA | -1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
73 | Ingress.attached_subnet_ingress.attached_subnets_v4 | 0 | 4 | 0 | 0 | 1 | 2 | 0 | 26 | 2 | 0 | 0 | 1 |
74 | Ingress.attached_subnet_ingress.attached_subnets_v4$action | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
75 | Ingress.attached_subnet_ingress.attached_subnets_v4_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
76 | Ingress.attached_subnet_ingress.attached_subnets_v6 | 0 | 16 | 0 | 0 | 1 | 6 | 0 | 26 | 2 | 0 | 0 | 1 |
77 | Ingress.attached_subnet_ingress.attached_subnets_v6$action | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
78 | Ingress.attached_subnet_ingress.attached_subnets_v6_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
79 | Ingress.filter.ipv4_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
80 | Ingress.filter.ipv6_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
81 | Ingress.filter.switch_ipv4_addr | 0 | 6 | 0 | 0 | 1 | 2 | 0 | 0 | 3 | 0 | 0 | 1 |
82 | Ingress.filter.switch_ipv6_addr | 0 | 18 | 0 | 0 | 1 | 4 | 0 | 0 | 3 | 0 | 0 | 1 |
83 | cond-40 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
84 | cond-41 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
85 | cond-42 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
86 | cond-43 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
87 | cond-44 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
88 | cond-45 | 0 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
89 | cond-46 | 0 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
90 | cond-47 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
91 | cond-48 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
92 | tbl_sidecar2089 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
93 | Ingress.ingress_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
94 | Ingress.nat_ingress.icmp_dst_port | 1 | 2 | 0 | 0 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 1 |
95 | Ingress.packet_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
96 | cond-49 | 1 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
97 | cond-50 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
98 | tbl_sidecar2085 | 1 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
99 | tbl_sidecar2085-gateway | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
100 | tbl_sidecar2086 | 1 | 2 | 10 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
101 | tbl_sidecar2086-gateway | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
102 | Ingress.nat_ingress.ingress_ipv4 | 2 | 8 | 0 | 0 | 1 | 4 | 0 | 26 | 2 | 0 | 0 | 1 |
103 | Ingress.nat_ingress.ingress_ipv4$action | 2 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
104 | Ingress.nat_ingress.ingress_ipv6 | 2 | 20 | 0 | 0 | 1 | 20 | 0 | 26 | 2 | 0 | 0 | 1 |
105 | Ingress.nat_ingress.ingress_ipv6$action | 2 | 0 | 0 | 0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
106 | Ingress.nat_ingress.ipv4_ingress_ctr | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
107 | Ingress.nat_ingress.ipv6_ingress_ctr | 2 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
108 | cond-51 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
109 | cond-52 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
110 | Ingress.nat_ingress.ingress_ipv4 | 3 | 8 | 0 | 0 | 0 | 6 | 0 | 26 | 2 | 0 | 0 | 0 |
111 | Ingress.nat_ingress.ingress_ipv4$action | 3 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
112 | Ingress.nat_ingress.ipv4_ingress_ctr | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
113 | Ingress.nat_ingress.CalculateIPv4Len.ipv4_set_len | 4 | 1 | 10 | 0 | 1 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
114 | Ingress.nat_ingress.ingress_hit | 4 | 2 | 0 | 0 | 1 | 1 | 0 | 8 | 4 | 0 | 0 | 1 |
115 | Ingress.nat_ingress.ingress_hit$action | 4 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
116 | Ingress.nat_ingress.nat_only | 4 | 2 | 10 | 0 | 1 | 0 | 0 | 0 | 2 | 1 | 1 | 0 |
117 | Ingress.nat_ingress.nat_only_ctr | 4 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
118 | cond-53 | 4 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
119 | cond-56 | 4 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
120 | cond-57 | 4 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
121 | cond-58 | 4 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
122 | cond-78 | 4 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
123 | tbl_sidecar2174 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
124 | cond-54 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
125 | tbl_nat_ingress_CalculateIPv4Len_invert | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
126 | tbl_nat_ingress_encap_ipv4 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 29 | 1 | 0 | 0 | 1 |
127 | tbl_nat_ingress_encap_ipv4$action | 5 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
128 | tbl_nat_ingress_encap_ipv6 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 29 | 1 | 0 | 0 | 1 |
129 | tbl_nat_ingress_encap_ipv6$action | 5 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
130 | Ingress.services.service | 6 | 8 | 0 | 0 | 1 | 2 | 0 | 18 | 7 | 0 | 0 | 1 |
131 | Ingress.services.service$action | 6 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
132 | Ingress.services.service_ctr | 6 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
133 | cond-59 | 6 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
134 | cond-60 | 6 | 5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
135 | tbl_sidecar417 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | 0 | 0 | 1 |
136 | tbl_sidecar421 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
137 | cond-55 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
138 | cond-61 | 7 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
139 | cond-62 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
140 | tbl_sidecar761 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
141 | Ingress.nat_egress.nat_egress | 8 | 2 | 10 | 0 | 1 | 0 | 0 | 10 | 7 | 1 | 1 | 0 |
142 | Ingress.nat_egress.nat_egress$action | 8 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
143 | cond-63 | 8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
144 | Ingress.l3_router.Router4.lookup_idx.index_ctr | 9 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 |
145 | Ingress.l3_router.Router4.lookup_idx.lookup | 9 | 4 | 0 | 0 | 1 | 16 | 0 | 4 | 2 | 0 | 0 | 1 |
146 | Ingress.l3_router.Router4.lookup_idx.lookup$action | 9 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
147 | Ingress.l3_router.Router6.lookup_idx.index_ctr | 9 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
148 | Ingress.l3_router.Router6.lookup_idx.lookup | 9 | 16 | 0 | 0 | 1 | 6 | 0 | 6 | 2 | 0 | 0 | 1 |
149 | cond-64 | 9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
150 | cond-65 | 9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
151 | cond-69 | 9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
152 | ingresshdr.icmp.hdr_checksum_encode_update_condition_3-gateway | 9 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
153 | ingresshdr.icmp.hdr_checksum_encode_update_condition_3_ingress | 9 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 1 | 0 |
154 | tbl_sidecar1243$precompute | 9 | 12 | 8 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
155 | tbl_sidecar1397$precompute | 9 | 36 | 8 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
156 | Ingress.l3_router.Router6.lookup_idx.index_ctr | 10 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
157 | Ingress.l3_router.Router6.lookup_idx.lookup | 10 | 16 | 0 | 0 | 1 | 3 | 0 | 6 | 2 | 0 | 0 | 1 |
158 | cond-67 | 10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
159 | ingresshdr.udp.checksum_encode_update_condition_2_ingress | 10 | 3 | 10 | 0 | 1 | 0 | 0 | 1 | 2 | 1 | 1 | 0 |
160 | tbl_sidecar1243 | 10 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
161 | tbl_sidecar1267 | 10 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | 0 | 0 | 1 |
162 | tbl_sidecar1397 | 10 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
163 | Ingress.l3_router.Router4.lookup_idx.select_route | 11 | 2 | 40 | 0 | 4 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
164 | Ingress.l3_router.Router6.lookup_idx.select_route | 11 | 2 | 40 | 0 | 4 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
165 | cond-66 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
166 | cond-70 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
167 | cond-71 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
168 | tbl_sidecar1408 | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
169 | tbl_sidecar1117 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
170 | tbl_sidecar999 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
171 | Ingress.l3_router.Router4.lookup_idx.forward_ctr | 13 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 |
172 | Ingress.l3_router.Router4.lookup_idx.route | 13 | 2 | 40 | 0 | 4 | 0 | 0 | 24 | 5 | 1 | 1 | 0 |
173 | Ingress.l3_router.Router4.lookup_idx.route$action | 13 | 0 | 0 | 0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
174 | Ingress.l3_router.Router6.lookup_idx.forward_ctr | 13 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
175 | Ingress.l3_router.Router6.lookup_idx.route | 13 | 2 | 40 | 0 | 4 | 0 | 0 | 24 | 3 | 1 | 1 | 0 |
176 | Ingress.l3_router.Router6.lookup_idx.route$action | 13 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
177 | cond-68 | 14 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
178 | cond-72 | 14 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
179 | tbl_l3_router_Router4_icmp_error | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 1 | 0 | 0 | 1 |
180 | tbl_l3_router_Router4_icmp_error$action | 14 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
181 | tbl_l3_router_Router4_icmp_error_0 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 1 | 0 | 0 | 1 |
182 | tbl_l3_router_Router4_icmp_error_0$action | 14 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
183 | tbl_l3_router_Router6_icmp_error | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 1 | 0 | 0 | 1 |
184 | tbl_l3_router_Router6_icmp_error$action | 14 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
185 | tbl_l3_router_Router6_icmp_error_0 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 1 | 0 | 0 | 1 |
186 | tbl_l3_router_Router6_icmp_error_0$action | 14 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
187 | tbl_sidecar1272 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
188 | tbl_sidecar1274 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
189 | tbl_sidecar1274$action | 14 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
190 | tbl_sidecar1413 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
191 | tbl_sidecar1417 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
192 | tbl_sidecar1417$action | 14 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
193 | Ingress.l3_router.Arp.ctr | 15 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
194 | Ingress.l3_router.Arp.tbl | 15 | 4 | 40 | 0 | 4 | 0 | 0 | 12 | 3 | 1 | 1 | 0 |
195 | Ingress.l3_router.Arp.tbl$action | 15 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
196 | Ingress.l3_router.Ndp.ctr | 15 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
197 | Ingress.l3_router.Ndp.tbl | 15 | 16 | 40 | 0 | 8 | 0 | 0 | 12 | 3 | 1 | 1 | 0 |
198 | Ingress.l3_router.Ndp.tbl$action | 15 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
199 | cond-73 | 15 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
200 | cond-74 | 15 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
201 | Ingress.drop_port_ctr | 16 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
202 | Ingress.drop_reason_ctr | 16 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
203 | Ingress.egress_ctr | 16 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
204 | Ingress.mac_rewrite.ctr | 16 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
205 | Ingress.mac_rewrite.mac_rewrite | 16 | 2 | 10 | 0 | 1 | 0 | 0 | 6 | 2 | 1 | 1 | 0 |
206 | Ingress.mac_rewrite.mac_rewrite$action | 16 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
207 | cond-75 | 16 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
208 | cond-76 | 16 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
209 | cond-77 | 16 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
210 | tbl_sidecar2130 | 16 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
211 | tbl_sidecar2130-gateway | 16 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
212 | tbl_sidecar2132 | 16 | 1 | 8 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
213 | tbl_sidecar2134 | 16 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
214 | tbl_sidecar2134-gateway | 16 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
215 | tbl_sidecar2138 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
216 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------
217