March 2, 2026 at 06:52:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 653 0 30 3834 127 3984 55 273 1236 16 5507 14 9 0 77 1 883 0 89 1030 13 3053 15 340 1219 17 6642 4 6 0 89 2 938 0 31 745 13 3010 14 281 1244 11 5842 5 5 0 90 3 797 0 424 1160 416 3023 19 282 1177 22 6696 3 6 0 91 4 937 0 78 955 25 3018 15 309 1227 16 7074 3 6 0 91 5 663 0 144 2913 2191 2197 16 246 1412 10 6276 8 8 0 84 6 621 0 397 943 10 3365 18 342 1151 4 6487 5 6 0 89 7 691 0 33 1627 19 4475 24 304 1251 16 4543 2 6 0 91 March 2, 2026 at 06:52:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11603 0 61 2627 103 1395 23 286 1965 139 4598 8 11 0 81 1 10418 0 125 607 18 1185 20 217 748 81 3135 10 6 0 84 2 5072 0 29 575 18 1192 19 238 684 113 2596 11 4 0 85 3 8687 0 47 915 377 944 18 186 2532 117 3391 10 34 0 57 4 11147 0 83 562 49 1345 44 287 2771 141 4329 9 13 0 78 5 6417 0 54 482 25 1324 19 287 1497 160 2432 7 5 0 87 6 12525 0 60 608 39 1513 28 300 2209 123 3921 11 12 0 76 7 5594 0 19 397 2 1017 15 225 2179 67 1928 10 5 0 85 March 2, 2026 at 06:52:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2206 106 370 0 87 753 0 296 0 2 0 98 1 40 0 0 435 4 919 0 97 759 1 310 0 2 0 98 2 0 0 0 98 2 257 0 92 838 1 296 0 2 0 98 3 0 0 0 445 339 282 0 100 751 0 0 0 2 0 98 4 30 0 10 300 106 245 2 76 807 1 855 0 2 0 98 5 0 0 0 105 0 252 0 93 685 0 0 0 1 0 99 6 0 0 17 369 136 327 0 99 763 0 266 0 2 0 98 7 20 0 0 96 0 290 0 84 804 0 734 0 2 0 98 March 2, 2026 at 06:52:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2229 135 349 2 84 577 3 298 0 2 0 98 1 0 0 0 506 5 972 1 87 532 0 302 0 2 0 98 2 0 0 0 98 1 235 1 78 561 1 294 0 2 0 98 3 0 0 0 425 329 256 2 82 580 5 0 0 2 0 98 4 27 0 9 304 104 286 1 95 518 3 1546 0 2 0 98 5 0 0 0 95 1 233 1 84 510 2 0 0 1 0 99 6 0 0 18 330 118 289 3 88 568 2 266 0 2 0 98 7 0 0 0 97 1 250 3 89 565 3 6 0 2 0 98 March 2, 2026 at 06:52:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 101 107 1 20 104 0 303 0 1 0 99 1 0 0 0 262 2 409 0 27 146 0 300 0 1 0 99 2 0 0 0 57 2 97 0 14 171 0 294 0 0 0 100 3 0 0 0 167 96 136 1 23 177 0 0 0 1 0 99 4 0 0 10 277 107 167 0 26 170 0 1555 0 1 0 99 5 0 0 0 60 7 97 0 23 129 0 8 0 0 0 100 6 0 0 17 383 152 253 0 24 131 0 278 0 1 0 99 7 0 0 0 53 1 98 1 22 157 0 0 0 0 0 100 March 2, 2026 at 06:52:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2177 102 187 0 38 179 0 299 0 1 0 99 1 0 0 0 162 3 233 0 38 193 0 302 0 2 0 98 2 0 0 0 76 2 146 0 31 229 0 294 0 2 0 98 3 0 0 0 205 136 137 0 33 194 0 0 0 2 0 98 4 0 0 9 434 118 476 0 43 172 0 1550 0 1 0 99 5 0 0 0 68 1 129 0 26 192 0 0 0 2 0 98 6 0 0 18 351 139 223 0 30 241 0 266 0 2 0 98 7 0 0 0 82 1 154 1 30 194 0 0 0 2 0 98 March 2, 2026 at 06:52:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4378 0 12 2369 104 612 12 102 220 48 2092 6 7 0 87 1 2327 0 6 289 3 549 8 93 141 31 1931 2 2 0 96 2 5084 0 21 299 5 565 10 80 162 48 2420 5 4 0 91 3 715 0 10 376 20 685 5 93 151 45 1932 2 2 0 97 4 5486 0 14 504 130 593 8 85 181 46 3033 4 3 0 94 5 464 0 19 296 10 595 1 80 110 41 1785 2 1 0 97 6 1300 0 71 458 107 525 3 84 95 38 1312 3 1 0 96 7 1615 0 13 208 4 417 4 58 115 35 1090 1 1 0 97 March 2, 2026 at 06:52:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 103 108 0 0 4 0 307 0 1 0 99 1 0 0 0 23 4 18 0 4 0 0 317 0 0 0 100 2 0 0 0 38 2 30 0 6 1 0 303 0 0 0 100 3 0 0 4 63 21 60 1 6 0 0 15 0 0 0 100 4 13 0 2 303 140 126 1 3 0 0 1437 0 1 0 99 5 0 0 14 27 5 20 0 3 0 0 271 0 0 0 100 6 69 0 46 218 105 13 0 2 0 0 328 0 0 0 100 7 0 0 0 19 3 6 0 1 0 0 9 0 0 0 100 March 2, 2026 at 06:52:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 108 0 1 1 0 310 0 1 0 99 1 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 2 0 0 0 17 2 10 0 0 0 0 294 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 4 14 0 2 332 161 156 1 1 1 0 1433 0 0 0 99 5 10 0 7 13 3 10 0 1 0 0 309 0 0 0 100 6 0 0 18 209 102 6 0 1 0 0 266 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:52:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 116 0 0 3 0 294 0 1 0 99 1 0 0 0 19 5 14 0 0 0 0 311 0 0 0 100 2 0 0 0 11 2 6 0 0 4 0 294 0 0 0 100 3 0 0 1 11 2 8 0 0 0 0 8 0 0 0 100 4 0 0 2 244 116 66 1 0 0 0 1442 0 0 0 99 5 0 0 7 112 55 102 0 1 0 0 260 0 0 0 100 6 0 0 18 208 102 4 0 0 0 0 266 0 0 0 100 7 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:52:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 19 2165 102 231 2 27 84 6 376 0 1 0 99 1 14 0 0 88 4 171 3 25 81 6 413 0 0 0 99 2 28 0 2 74 3 141 0 23 79 3 359 0 0 0 100 3 26 0 16 135 65 131 1 28 91 2 80 0 1 0 99 4 20 0 4 350 111 282 5 30 63 1 1513 0 1 0 99 5 31 0 10 149 44 192 3 25 63 4 334 0 0 0 99 6 29 0 18 291 102 176 2 29 68 16 352 0 1 0 99 7 302 0 7 72 14 108 4 20 85 2 125 0 0 0 100 March 2, 2026 at 06:52:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 101 115 0 1 3 0 303 0 1 0 99 1 0 0 0 16 3 6 0 0 0 0 302 0 0 0 100 2 0 0 0 14 2 8 0 0 13 0 294 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 4 0 0 2 216 103 34 1 0 1 0 1345 0 0 0 100 5 0 0 7 12 3 8 0 0 0 0 260 0 0 0 100 6 0 0 18 211 102 6 0 0 1 0 266 0 0 0 100 7 0 0 0 115 51 116 0 2 0 0 0 0 0 0 100 March 2, 2026 at 06:52:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 115 144 0 3 4 0 299 0 1 0 99 1 0 0 0 13 2 8 0 1 0 0 300 0 0 0 100 2 0 0 0 14 3 8 0 0 4 0 295 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 2 213 103 32 1 0 1 0 1339 0 0 0 100 5 0 0 7 12 3 8 0 0 0 0 259 0 0 0 100 6 0 0 18 211 102 4 0 0 0 0 266 0 0 0 100 7 0 0 7 81 37 77 0 2 0 0 0 0 0 0 100 March 2, 2026 at 06:52:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 151 220 0 1 5 0 299 0 1 0 99 1 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 2 0 0 0 12 2 6 0 0 9 0 294 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 2 213 103 32 1 0 0 0 1342 0 0 0 100 5 0 0 7 12 3 8 0 0 0 0 259 0 0 0 100 6 0 0 18 207 102 2 0 0 0 0 266 0 0 0 100 7 0 0 7 14 2 10 0 0 0 0 1 0 0 0 100 March 2, 2026 at 06:52:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 105 124 0 0 4 0 308 0 1 0 99 1 0 0 0 107 48 108 0 2 0 0 300 0 0 0 100 2 0 0 0 13 2 8 0 0 2 0 294 0 0 0 100 3 0 0 0 15 3 10 0 0 0 0 7 0 0 0 100 4 0 0 2 218 103 44 1 1 1 0 1353 0 0 0 100 5 0 0 7 19 9 12 0 1 0 0 264 0 0 0 100 6 0 0 18 206 102 2 0 0 0 0 266 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:52:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 599 0 0 2592 101 942 22 131 68 7 2185 6 2 0 91 1 269 0 0 555 45 885 18 116 46 1 1962 7 1 0 92 2 2902 0 8 404 4 670 12 81 60 12 1914 6 2 0 92 3 328 0 1 498 4 894 19 113 96 6 1968 6 1 0 93 4 108 0 2 613 107 723 15 106 46 7 2953 5 1 0 94 5 134 0 7 379 6 628 7 76 47 5 1912 4 2 0 94 6 286 0 368 581 103 749 18 101 52 4 2409 4 2 0 95 7 2378 0 1 294 4 460 8 69 103 3 1626 4 1 0 95 March 2, 2026 at 06:52:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 107 0 0 2413 101 598 15 102 21 1 1269 6 2 0 93 1 278 0 0 492 46 745 22 102 59 0 1845 4 1 0 95 2 0 0 3 327 6 506 15 69 23 0 1420 4 1 0 95 3 45 0 0 322 8 505 15 64 50 0 1306 11 1 0 88 4 139 0 7 543 114 527 11 84 19 0 1180 12 1 0 87 5 9 0 7 274 5 459 5 62 45 0 2756 6 1 0 92 6 40 0 315 483 105 535 11 73 22 0 1360 6 1 0 93 7 21 0 0 246 3 385 7 50 68 1 1192 3 1 0 96 March 2, 2026 at 06:52:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 20 7 12 1 0 2 0 597 0 0 0 100 2 0 0 0 13 2 8 0 1 2 0 294 0 0 0 100 3 0 0 0 60 25 62 0 2 0 0 8 0 0 0 100 4 0 0 2 268 131 60 0 1 0 0 0 0 0 0 100 5 1 0 7 14 4 40 1 0 0 0 1684 0 0 0 99 6 0 0 18 210 104 6 0 0 0 0 266 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 1 0 0 0 100 March 2, 2026 at 06:52:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 3 0 603 0 0 0 100 2 0 0 0 13 2 8 0 0 3 0 294 0 0 0 100 3 0 0 0 29 12 24 0 0 0 0 11 0 0 0 100 4 0 0 2 310 152 102 0 0 0 0 0 0 0 0 100 5 0 0 7 15 4 42 1 0 1 0 1683 0 1 0 99 6 0 0 18 210 103 6 0 0 0 0 266 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:52:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 116 0 0 0 0 1 0 1 0 99 1 0 0 0 11 3 6 0 0 2 0 608 0 0 0 100 2 0 0 0 11 2 6 0 0 9 0 294 0 0 0 100 3 0 0 0 32 12 28 0 1 1 0 13 0 0 0 100 4 0 0 2 317 152 116 0 2 0 0 9 0 0 0 100 5 0 0 7 27 11 48 1 0 0 0 1688 0 1 0 99 6 0 0 18 210 103 8 0 0 0 0 274 0 0 0 100 7 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:52:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 297 0 3 2176 101 217 5 26 69 1 137 0 1 0 99 1 26 0 5 78 2 132 1 16 65 5 634 0 0 0 99 2 14 0 7 81 3 142 2 25 73 12 372 0 1 0 99 3 14 0 25 144 67 163 0 29 81 10 90 0 1 0 99 4 7 0 2 439 152 355 0 27 65 3 61 0 0 0 99 5 16 0 12 92 8 166 2 20 90 3 1749 0 1 0 99 6 8 0 24 277 103 135 1 30 66 1 301 0 0 0 100 7 0 0 8 68 2 117 0 22 59 0 69 0 0 0 99 March 2, 2026 at 06:52:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 15 3 8 1 1 7 0 599 0 0 0 100 2 0 0 0 15 2 8 0 1 13 0 294 0 0 0 100 3 0 0 7 11 1 7 0 3 0 0 0 0 0 0 100 4 0 0 2 313 153 104 0 0 0 0 1 0 0 0 100 5 0 0 7 16 4 40 1 0 0 0 1602 0 1 0 99 6 0 0 18 211 103 4 0 0 0 0 266 0 0 0 100 7 0 0 0 12 1 4 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:52:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 12 2 6 0 0 10 0 603 0 0 0 100 2 0 0 0 15 3 8 0 0 9 0 295 0 0 0 100 3 0 0 7 11 1 7 0 0 0 0 0 0 0 0 100 4 0 0 2 312 152 102 0 1 0 0 0 0 0 0 100 5 0 0 7 20 4 46 1 1 0 0 1599 0 0 0 100 6 0 0 18 216 103 16 0 2 0 0 266 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:52:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 112 0 0 0 0 0 0 1 0 99 1 0 0 0 12 3 6 0 0 4 0 602 0 0 0 100 2 0 0 0 12 2 6 0 0 15 0 294 0 0 0 100 3 0 0 7 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 2 312 153 102 0 0 0 0 1 0 0 0 100 5 0 0 7 15 4 40 1 0 0 0 1601 0 0 0 100 6 0 0 18 211 103 6 0 0 0 0 266 0 0 0 100 7 0 0 0 14 1 14 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:52:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 116 0 0 0 0 0 0 1 0 99 1 8 0 0 11 3 6 0 0 2 0 626 0 0 0 100 2 0 0 0 12 2 8 0 0 4 0 297 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 2 322 156 114 0 0 0 0 11 0 0 0 100 5 0 0 7 23 10 48 2 0 0 0 1607 0 0 0 100 6 0 0 18 210 103 8 0 0 0 0 274 0 0 0 100 7 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:52:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5478 0 9 3042 103 1704 82 242 131 8 5638 29 5 0 66 1 1077 0 1 1141 4 1958 113 331 195 6 6186 26 4 0 71 2 237 0 0 917 6 1556 98 271 192 5 5305 32 3 0 65 3 273 0 0 1215 45 2124 81 255 178 4 5611 24 3 0 72 4 106 0 3 1196 119 1640 85 263 117 3 5186 28 3 0 69 5 239 0 7 1028 18 1855 77 237 149 7 6280 18 3 0 78 6 290 0 998 989 109 1616 88 244 140 3 4648 17 3 0 80 7 109 0 0 832 10 1365 55 218 152 3 4176 10 2 0 88 March 2, 2026 at 06:53:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 0 3597 104 2707 94 337 94 0 7405 28 5 0 67 1 17 0 0 1346 6 2339 92 334 136 0 7286 42 4 0 54 2 35 0 0 1392 14 2322 96 321 177 0 6797 33 4 0 63 3 18 0 0 1492 10 2637 84 330 122 0 7233 25 4 0 71 4 6 0 9 1562 110 2384 85 362 123 0 7430 29 4 0 67 5 13 0 0 1125 18 1861 81 266 144 0 7949 31 4 0 66 6 46 0 1424 1351 118 2379 96 317 146 0 7104 30 5 0 65 7 10 0 14 1003 8 1580 75 196 165 0 6847 36 3 0 60 March 2, 2026 at 06:53:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 3385 105 2194 79 321 97 0 7168 37 5 0 58 1 9 0 0 1763 19 3151 74 412 176 0 7504 23 5 0 72 2 2 0 7 1424 6 2529 69 337 143 0 7685 28 4 0 68 3 5 0 0 1255 12 2122 91 323 126 0 7660 43 4 0 54 4 3 0 3 1320 108 1801 77 292 106 0 6829 45 3 0 52 5 2 0 0 1697 10 3146 81 336 149 0 8390 14 4 0 82 6 7 0 1417 1125 113 1811 72 267 134 0 6555 41 4 0 55 7 6 0 14 1161 10 1915 64 261 154 0 7574 31 3 0 66 March 2, 2026 at 06:53:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 3624 108 2756 91 353 117 0 7769 35 5 0 59 1 5 0 0 1681 6 3000 70 315 134 0 7734 36 5 0 60 2 11 0 7 1262 9 2164 73 319 195 0 7454 39 4 0 57 3 3 0 0 1293 8 2266 84 352 145 0 8002 44 4 0 52 4 5 0 1 1640 117 2532 83 378 142 0 8754 26 4 0 69 5 1 0 0 1378 6 2421 52 344 136 0 6772 20 4 0 76 6 1 0 1405 1244 107 2167 82 303 153 0 7105 35 4 0 60 7 3 0 14 1093 13 1750 51 271 122 0 7189 31 3 0 66 March 2, 2026 at 06:53:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 3542 105 2548 43 306 84 0 6126 30 5 0 65 1 7 0 21 1156 4 1928 79 281 137 0 6649 51 4 0 45 2 6 0 0 1370 12 2309 56 346 121 0 5770 21 4 0 75 3 7 0 0 1356 15 2319 65 277 102 0 6030 31 4 0 65 4 2 0 3 1614 117 2446 59 312 105 0 7633 29 4 0 67 5 3 0 0 1220 21 2019 41 289 114 0 5963 17 3 0 80 6 8 0 1332 916 105 1475 47 211 92 0 5393 56 4 0 40 7 5 0 0 1153 8 1919 41 234 124 0 6182 19 3 0 78 March 2, 2026 at 06:53:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3608 106 2730 86 407 138 0 6735 28 5 0 67 1 6 0 14 1540 15 2715 115 392 112 0 7169 28 4 0 68 2 8 0 7 1209 7 1978 92 287 158 0 6326 40 4 0 56 3 2 0 0 1344 53 2255 112 323 142 0 6409 26 4 0 70 4 5 0 2 1452 112 2099 82 277 148 0 6665 43 4 0 54 5 3 0 0 1243 12 2172 60 273 127 0 7543 27 4 0 69 6 4 0 1390 1270 109 2180 75 272 164 0 6209 28 4 0 67 7 1 0 0 1122 18 1785 76 220 173 0 5832 34 3 0 63 March 2, 2026 at 06:53:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 3630 108 2855 56 355 95 0 7879 28 5 0 67 1 10 0 7 1246 10 2122 82 324 135 0 7953 48 4 0 48 2 87 0 14 1355 12 2306 75 283 123 0 7121 33 4 0 63 3 4 0 0 1300 4 2242 79 271 130 0 7362 43 4 0 53 4 3 0 3 1346 113 1885 41 196 104 0 6542 37 3 0 60 5 8 0 0 1277 8 2234 60 269 114 1 8114 20 4 0 76 6 5 0 1334 1411 114 2480 66 307 118 0 6540 29 5 0 67 7 4 0 0 1065 14 1771 70 257 107 0 5998 24 3 0 73 March 2, 2026 at 06:53:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3746 109 3021 88 400 100 0 7632 27 6 0 67 1 3 0 7 1482 15 2613 74 297 138 0 7605 30 4 0 65 2 0 0 14 1152 5 1859 80 282 97 0 6918 48 4 0 49 3 3 0 0 1282 5 2170 82 293 153 0 7147 34 4 0 62 4 1 0 3 1573 112 2534 74 303 117 0 7451 34 4 0 62 5 0 0 0 1332 9 2353 65 292 102 0 7869 25 4 0 71 6 4 0 1347 979 110 1538 60 220 91 0 5970 38 4 0 58 7 1 0 0 1245 12 2080 64 271 152 0 6456 23 3 0 74 March 2, 2026 at 06:53:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3843 111 3274 102 476 117 0 7731 20 6 0 74 1 5 0 0 1402 11 2426 94 361 189 0 7338 41 4 0 55 2 1 0 0 1461 10 2475 92 392 113 0 6776 23 4 0 73 3 1 0 14 1538 11 2712 88 374 102 0 7321 32 4 0 63 4 1 0 10 1260 109 1780 71 294 126 0 8513 55 4 0 41 5 1 0 0 1350 7 2383 65 323 157 0 7078 27 4 0 70 6 9 0 1411 1204 111 2134 64 250 111 0 6635 39 4 0 56 7 6 0 0 1041 12 1637 70 221 140 0 6546 37 3 0 60 March 2, 2026 at 06:53:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 3498 106 2523 68 379 110 0 7111 30 5 0 64 1 0 0 0 1287 12 2196 47 328 101 0 6340 34 4 0 62 2 0 0 0 1231 5 2095 50 242 85 0 6417 35 4 0 61 3 4 0 0 1093 10 1769 84 296 130 0 6239 52 3 0 45 4 0 0 16 1330 111 1886 72 289 94 0 5809 39 3 0 58 5 0 0 7 1353 17 2316 76 276 87 0 6129 28 3 0 69 6 2 0 1361 1359 111 2431 55 318 94 0 7619 17 5 0 79 7 4 0 0 1099 7 1869 48 231 127 0 6108 26 3 0 71 March 2, 2026 at 06:53:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3466 111 2452 62 409 102 0 6450 29 5 0 66 1 6 0 0 1269 10 2174 94 316 204 0 8773 39 4 0 56 2 2 0 0 1351 3 2313 97 345 187 0 6748 34 4 0 61 3 4 0 0 1402 60 2389 96 311 128 0 6303 38 4 0 58 4 3 0 3 1200 105 1592 58 262 112 0 6262 50 3 0 47 5 0 0 14 1370 21 2302 64 344 191 0 6083 23 4 0 73 6 0 0 1383 1320 116 2294 81 349 226 0 6623 25 5 0 70 7 2 0 0 1232 12 2091 64 290 139 0 5932 19 3 0 78 March 2, 2026 at 06:53:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3412 101 2286 80 309 128 0 7626 44 5 0 51 1 3 0 0 1715 14 3162 69 422 159 0 9264 27 5 0 68 2 2 0 0 1395 6 2491 59 302 132 0 7377 29 4 0 67 3 1 0 0 1369 7 2397 66 339 124 0 7891 36 4 0 59 4 5 0 14 1567 121 2294 70 332 130 0 7416 29 4 0 67 5 0 0 14 1309 11 2240 54 273 146 0 6951 32 4 0 64 6 0 0 1393 1392 115 2406 68 289 146 0 7122 36 5 0 59 7 1 0 0 978 13 1543 33 223 135 0 6758 36 3 0 61 March 2, 2026 at 06:53:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 3407 108 2244 82 329 126 0 7173 44 5 0 51 1 3 0 0 1746 16 3186 91 404 165 0 9006 24 5 0 71 2 0 0 0 1251 9 2092 65 322 116 0 7168 30 4 0 66 3 1 0 0 1244 15 2122 56 266 128 0 6743 39 4 0 57 4 3 0 3 1482 109 2158 65 342 104 0 6620 28 4 0 68 5 1 0 21 1467 5 2600 62 310 134 0 6885 26 4 0 70 6 1 0 1388 1001 109 1587 88 223 97 0 6232 56 4 0 40 7 2 0 0 1256 9 2202 57 256 126 0 6491 21 3 0 76 March 2, 2026 at 06:53:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3759 109 3117 88 408 124 0 7746 25 6 0 69 1 0 0 0 1313 6 2288 80 278 144 0 8057 52 4 0 44 2 2 0 7 1270 2 2247 78 343 161 0 8481 33 4 0 62 3 1 0 0 1435 17 2498 95 314 174 0 7818 36 4 0 60 4 0 0 1 1762 117 2773 88 359 130 0 7446 30 4 0 65 5 1 0 14 1387 17 2408 58 341 105 0 6391 16 4 0 80 6 1 0 1377 1117 108 1808 68 250 126 0 7005 45 4 0 50 7 0 0 0 1071 2 1819 63 254 118 0 6617 31 3 0 66 March 2, 2026 at 06:53:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 3410 105 2285 56 257 97 0 6399 25 5 0 71 1 1 0 7 1228 13 2056 66 262 70 0 5661 34 4 0 62 2 0 0 0 1040 5 1651 56 190 73 0 7171 33 4 0 63 3 3 0 0 1117 5 1865 62 210 96 0 5761 46 3 0 51 4 0 0 3 1453 118 2091 44 265 131 0 5264 27 3 0 70 5 1 0 14 947 19 1506 48 211 63 0 5196 36 3 0 61 6 0 0 1376 1237 108 2129 47 242 63 0 5321 23 4 0 73 7 0 0 0 1162 16 1923 29 220 98 0 5022 12 3 0 86 March 2, 2026 at 06:53:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3514 110 2432 75 316 182 0 6635 37 5 0 58 1 0 0 0 1493 7 2579 81 383 187 0 6691 33 4 0 62 2 2 0 0 1411 20 2505 82 377 162 0 7870 30 4 0 66 3 2 0 0 1205 57 1900 68 267 146 0 6620 44 4 0 52 4 0 0 3 1594 111 2390 104 392 180 0 6148 25 4 0 70 5 1 0 0 1272 11 2155 63 296 150 0 6349 33 4 0 63 6 0 0 1396 1337 114 2263 80 304 178 0 7163 32 5 0 64 7 2 0 14 1150 7 1900 59 273 163 0 5908 22 3 0 75 March 2, 2026 at 06:53:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3224 107 1926 56 257 90 0 6513 46 4 0 50 1 1 0 0 1377 5 2375 83 379 91 0 6047 32 4 0 64 2 0 0 0 1607 9 2913 94 394 176 0 8581 24 5 0 71 3 1 0 0 1326 15 2274 98 313 182 0 7331 42 4 0 54 4 1 0 3 1555 113 2318 74 318 83 0 6134 26 4 0 70 5 0 0 0 878 2 1307 69 199 113 0 5985 53 3 0 44 6 1 0 1340 1606 117 2931 67 323 156 0 7675 22 5 0 73 7 0 0 14 1142 15 1981 69 304 194 0 6942 22 3 0 74 March 2, 2026 at 06:53:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 3644 108 2798 85 378 98 0 7500 28 5 0 66 1 4 0 0 1333 5 2314 67 348 118 0 7323 40 4 0 56 2 0 0 0 1468 12 2541 67 322 166 0 8869 34 4 0 61 3 2 0 0 1367 9 2365 76 306 153 0 7713 39 4 0 57 4 2 0 3 1463 117 2119 64 301 102 0 6992 39 4 0 57 5 0 0 0 1186 8 1976 57 265 120 0 6828 36 3 0 61 6 0 0 1463 1138 115 1921 73 277 148 0 6789 32 4 0 63 7 4 0 14 1406 10 2361 41 262 182 0 6730 16 3 0 81 March 2, 2026 at 06:53:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 7 3501 104 2586 66 331 138 0 7716 41 5 0 54 1 1 0 0 1440 8 2626 98 347 120 0 7823 35 4 0 60 2 1 0 0 1229 10 2082 53 265 75 0 7848 31 4 0 66 3 0 0 0 1283 15 2262 79 311 166 0 8163 40 4 0 56 4 0 0 2 1562 114 2399 48 350 113 0 6455 21 4 0 76 5 0 0 0 1088 8 1807 62 298 113 0 6107 36 3 0 61 6 1 0 1306 1200 110 2089 36 231 93 0 7021 36 4 0 59 7 0 0 0 1132 8 1835 50 262 157 0 6195 21 3 0 76 March 2, 2026 at 06:53:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 3434 107 2349 90 381 89 0 6613 28 5 0 67 1 3 0 0 1278 11 2167 77 304 119 0 6086 37 4 0 60 2 2 0 0 1238 12 2044 67 287 162 0 7673 23 4 0 73 3 9 0 0 1322 13 2198 72 268 114 0 6332 26 4 0 71 4 0 0 2 1260 109 1699 77 278 97 0 5542 41 3 0 56 5 4 0 0 1074 10 1774 74 257 137 0 5307 28 3 0 69 6 0 0 1419 1248 115 2127 73 319 148 0 6248 29 4 0 66 7 3 0 0 1046 10 1692 72 210 95 0 5381 30 3 0 68 March 2, 2026 at 06:53:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3303 111 2034 86 288 114 0 6392 48 5 0 47 1 1 0 7 1499 16 2545 105 344 158 0 7328 40 5 0 56 2 0 0 14 1410 15 2440 75 306 156 0 8162 24 4 0 72 3 0 0 0 1465 53 2539 98 335 202 0 7029 27 4 0 69 4 3 0 2 1437 107 2122 82 306 114 0 5534 34 4 0 62 5 1 0 0 1229 7 2125 92 278 145 0 6113 28 4 0 69 6 0 0 1389 1365 113 2350 74 270 141 0 6231 32 5 0 64 7 0 0 0 1181 23 1893 78 260 187 0 6381 29 3 0 68 March 2, 2026 at 06:53:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3727 106 2953 76 380 115 0 7925 35 6 0 60 1 29 0 0 1090 12 1761 93 285 149 1 7607 54 4 0 42 2 2 0 0 1428 8 2479 76 357 161 0 7227 33 4 0 62 3 25 0 0 1356 11 2352 106 336 126 0 7978 45 4 0 50 4 6 0 16 1568 112 2409 81 359 137 0 8980 33 4 0 63 5 12 0 0 1293 11 2225 88 341 111 0 6907 22 4 0 74 6 13 0 1389 1436 112 2567 84 319 229 0 7070 29 5 0 66 7 3 0 7 1311 11 2273 82 309 144 0 7168 19 4 0 78 March 2, 2026 at 06:53:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 3618 104 2825 53 341 93 0 7206 34 5 0 61 1 2 0 7 1431 12 2509 70 395 106 0 7725 34 4 0 61 2 1 0 0 1153 13 1923 64 247 144 0 7296 42 4 0 55 3 0 0 0 1390 11 2517 83 353 159 0 7245 27 4 0 69 4 4 0 17 1588 106 2547 75 332 101 0 8653 20 4 0 76 5 2 0 0 1093 11 1748 71 233 96 0 6723 41 3 0 56 6 0 0 1320 1200 108 2053 70 308 178 0 6888 28 4 0 68 7 1 0 0 1114 13 1858 52 224 166 0 6226 33 3 0 64 March 2, 2026 at 06:53:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 3584 107 2608 77 323 125 0 7253 33 5 0 62 1 6 0 0 1464 4 2544 77 334 150 0 7838 37 4 0 59 2 7 0 0 1335 7 2313 83 261 107 0 7245 40 4 0 56 3 12 0 0 1540 16 2785 75 329 112 0 7176 31 4 0 65 4 3 0 23 1489 115 2215 72 314 105 0 7642 36 4 0 60 5 2 0 0 1283 13 2155 55 243 164 0 7026 33 3 0 64 6 3 0 1376 1302 110 2246 63 282 86 0 8133 24 5 0 71 7 6 0 0 1027 5 1685 41 213 96 0 6334 34 3 0 63 March 2, 2026 at 06:53:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3129 106 1702 71 235 72 0 5511 46 4 0 49 1 1 0 0 1249 10 1996 61 256 38 0 5107 45 4 0 52 2 7 0 0 1276 10 2186 65 259 110 0 5811 27 4 0 70 3 14 0 0 1196 11 2000 78 267 112 0 5624 33 3 0 64 4 2 0 9 1318 111 1861 55 263 80 0 5540 23 3 0 73 5 15 0 14 986 12 1492 35 186 73 0 5121 22 3 0 76 6 5 0 1362 1166 121 1913 63 271 94 0 6809 24 4 0 72 7 7 0 0 1157 10 1878 55 212 114 0 4846 22 3 0 76 March 2, 2026 at 06:53:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 3503 105 2513 67 352 156 0 7257 28 5 0 67 1 3 0 0 1342 10 2327 78 333 130 0 6380 35 4 0 61 2 3 0 0 1082 7 1731 64 252 96 0 6270 32 4 0 64 3 6 0 0 1349 63 2211 85 274 176 0 6397 33 4 0 63 4 2 0 9 1539 113 2275 68 287 178 0 6414 29 4 0 67 5 1 0 14 1043 13 1632 55 193 145 0 5706 38 3 0 59 6 2 0 1376 1140 115 1887 68 259 149 0 5903 30 4 0 66 7 3 0 0 1182 16 1964 78 250 137 0 5166 18 3 0 79 March 2, 2026 at 06:53:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 3698 117 2978 72 444 98 0 7623 18 6 0 76 1 3 0 0 1240 7 2189 61 282 115 0 7838 41 4 0 55 2 0 0 0 1434 7 2489 67 293 111 0 6516 25 4 0 71 3 0 0 7 1157 8 1983 60 274 111 0 8750 39 4 0 57 4 0 0 2 1339 106 1959 66 272 109 0 6921 45 4 0 52 5 2 0 14 1132 12 1866 44 253 102 0 6639 28 3 0 69 6 1 0 1348 1478 122 2611 61 287 91 0 6771 28 5 0 67 7 2 0 0 1083 3 1786 55 243 122 0 6175 34 3 0 63 March 2, 2026 at 06:53:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 7 3743 114 3111 88 398 108 0 7934 30 5 0 64 1 3 0 0 1257 5 2146 69 362 150 0 7902 40 4 0 56 2 3 0 0 1314 6 2272 64 310 116 0 6862 30 4 0 66 3 5 0 0 1323 8 2345 98 333 146 0 7648 43 4 0 53 4 1 0 4 1478 110 2227 75 327 98 0 7935 30 4 0 66 5 0 0 14 1133 12 1932 61 308 143 0 7340 35 3 0 61 6 5 0 1360 1220 112 2094 57 285 121 0 7004 35 4 0 60 7 0 0 0 1209 7 2091 59 270 172 0 6368 24 3 0 73 March 2, 2026 at 06:53:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 3547 119 2577 91 368 136 0 7131 31 5 0 64 1 0 0 0 996 8 1569 62 217 76 0 7137 52 4 0 44 2 2 0 0 1232 12 2072 58 283 122 0 5355 29 4 0 68 3 0 0 0 1119 5 1829 64 247 110 0 6278 46 3 0 51 4 3 0 54 1542 115 2299 84 339 164 0 6339 21 4 0 76 5 7 0 14 1087 11 1803 60 269 78 0 5384 21 3 0 76 6 0 0 1330 1069 107 1790 46 243 117 0 6074 29 4 0 67 7 0 0 0 1140 9 1921 80 254 86 0 5029 20 3 0 77 March 2, 2026 at 06:53:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 107 0 7 2756 110 1216 24 179 40 0 3100 7 3 0 90 1 115 0 0 563 8 1006 27 119 35 3 3973 16 2 0 82 2 6 0 0 545 7 894 27 128 62 0 3175 13 2 0 85 3 160 0 0 601 13 982 21 124 40 0 2653 10 2 0 89 4 50 0 2 680 133 720 29 81 40 1 3244 21 2 0 77 5 175 0 14 502 10 822 21 100 35 0 2660 19 1 0 79 6 96 0 593 650 110 912 29 133 43 0 2943 11 2 0 87 7 104 0 0 351 2 511 17 70 45 0 2373 18 1 0 81 March 2, 2026 at 06:53:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2144 102 190 0 16 68 0 263 0 1 0 99 1 0 0 0 43 2 105 1 14 65 0 1431 0 1 0 99 2 0 0 0 77 20 92 2 11 44 0 335 0 0 0 99 3 0 0 0 92 47 168 0 12 57 0 302 0 0 0 100 4 0 0 2 355 154 193 0 13 64 0 5 0 0 0 100 5 0 0 14 45 1 86 0 9 57 0 269 0 0 0 100 6 0 0 4 250 103 83 0 14 63 0 297 0 0 0 100 7 0 0 0 44 0 71 0 8 44 0 3 0 0 0 100 March 2, 2026 at 06:53:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 102 130 0 2 0 0 260 0 1 0 99 1 0 0 0 15 4 36 1 0 2 0 1426 0 0 0 100 2 0 0 0 34 14 26 0 0 1 0 313 0 0 0 100 3 0 0 0 16 4 8 0 0 3 0 300 0 0 0 100 4 0 0 7 259 126 48 0 0 1 0 2 0 0 0 100 5 0 0 14 12 4 4 0 0 1 0 267 0 0 0 100 6 0 0 7 274 134 70 0 2 2 0 297 0 0 0 100 7 0 0 0 14 2 4 0 0 1 0 0 0 0 0 100 March 2, 2026 at 06:53:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 102 116 0 0 0 0 260 0 1 0 99 1 0 0 0 8 1 32 1 0 0 0 1424 0 0 0 100 2 0 0 0 25 10 20 0 0 0 0 309 0 0 0 100 3 0 0 0 11 3 6 0 0 2 0 301 0 0 0 100 4 0 0 2 214 104 6 0 0 0 0 2 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 267 0 0 0 100 6 0 0 4 250 123 44 0 0 4 0 294 0 0 0 100 7 0 0 0 66 29 62 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:53:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 288 0 21 2130 103 154 3 10 8 3 387 0 1 0 98 1 11 0 18 34 2 61 2 7 2 6 1478 0 1 0 99 2 27 0 0 45 9 58 0 11 2 8 391 0 0 0 100 3 3 0 8 27 4 31 1 6 16 3 355 0 0 0 100 4 15 0 4 231 103 30 0 4 3 4 43 0 0 0 100 5 5 0 24 30 5 46 4 5 3 3 319 0 0 0 100 6 22 0 6 229 104 39 3 12 6 6 354 0 0 0 100 7 1 0 0 120 50 121 3 4 6 4 56 0 0 0 100 March 2, 2026 at 06:53:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 114 0 0 0 0 260 0 1 0 99 1 0 0 7 24 2 51 1 5 1 0 1346 0 0 0 100 2 0 0 0 12 1 4 0 1 0 0 300 0 0 0 100 3 0 0 0 23 3 18 0 1 4 0 316 0 0 0 100 4 0 0 3 223 104 20 0 2 0 0 5 0 0 0 100 5 0 0 14 21 8 12 0 0 0 0 273 0 0 0 100 6 0 0 4 213 103 4 0 0 2 0 294 0 0 0 100 7 0 0 0 111 50 106 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:53:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 102 118 0 2 2 0 259 0 1 0 99 1 0 0 7 15 1 37 1 1 0 0 1340 0 0 0 100 2 0 0 0 10 1 4 0 1 0 0 300 0 0 0 100 3 0 0 0 24 7 22 0 0 5 0 307 0 0 0 100 4 0 0 2 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 6 0 0 4 219 106 14 0 0 5 0 298 0 0 0 100 7 0 0 0 109 50 106 0 1 2 0 0 0 0 0 100 March 2, 2026 at 06:53:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 116 0 0 0 0 259 0 1 0 99 1 0 0 7 10 1 34 1 0 0 0 1340 0 0 0 99 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 12 3 6 0 0 6 0 304 0 0 0 100 4 0 0 2 217 104 8 0 1 0 0 2 0 0 0 100 5 1 0 14 12 1 14 0 1 0 0 284 0 0 0 100 6 0 0 4 212 103 4 0 0 2 0 294 0 0 0 100 7 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:53:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 118 1 1 0 0 259 0 1 0 99 1 0 0 0 10 1 34 1 0 0 0 1340 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 12 3 6 1 0 4 0 294 0 0 0 100 4 0 0 2 216 104 6 0 0 0 0 1 0 0 0 100 5 1 0 14 7 1 4 0 1 0 0 266 0 0 0 100 6 0 0 4 215 103 14 0 1 9 0 294 0 0 0 100 7 0 0 0 108 50 104 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:53:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2312 0 8 2432 103 606 26 82 52 5 2618 16 2 0 81 1 3621 0 8 343 4 573 22 100 63 13 3880 20 2 0 78 2 521 0 1 324 2 534 13 95 50 23 2557 12 1 0 87 3 243 0 0 329 3 513 16 107 26 8 2580 19 1 0 80 4 250 0 2 522 117 489 7 109 38 8 1999 8 1 0 91 5 256 0 14 291 6 431 11 76 45 2 2283 9 1 0 90 6 325 0 382 477 106 504 15 93 30 1 2374 11 1 0 88 7 154 0 0 321 29 459 16 70 37 4 1887 7 1 0 92 March 2, 2026 at 06:53:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 167 0 7 2342 111 418 16 71 23 2 2065 17 1 0 82 1 132 0 0 262 6 393 23 68 24 0 3434 32 1 0 67 2 104 0 0 245 12 311 16 56 15 0 1347 21 1 0 79 3 135 0 0 276 8 422 14 71 6 1 1844 20 1 0 79 4 188 0 17 465 106 386 21 77 7 0 1862 37 1 0 62 5 245 0 14 269 20 404 7 58 16 0 1833 9 1 0 90 6 197 0 284 450 108 405 30 67 21 0 2079 50 1 0 50 7 129 0 0 221 10 311 11 54 23 2 1571 20 1 0 80 March 2, 2026 at 06:53:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 7 2380 107 484 29 88 64 0 1715 26 1 0 72 1 59 0 0 395 5 508 24 101 110 0 1664 31 1 0 68 2 9 0 0 280 10 339 29 77 93 0 1529 40 1 0 59 3 6 0 0 383 70 465 24 86 85 0 1820 22 1 0 78 4 54 0 2 467 109 368 24 83 41 0 2653 34 1 0 65 5 8 0 0 291 12 379 25 69 53 0 1769 16 1 0 83 6 8 0 411 460 108 471 19 84 83 0 1853 26 1 0 72 7 7 0 14 309 15 451 17 71 68 0 1619 9 1 0 91 March 2, 2026 at 06:53:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 1 2368 104 386 25 79 28 0 1604 32 1 0 67 1 18 0 0 314 13 339 34 84 47 0 2301 56 1 0 43 2 0 0 0 302 19 348 20 77 44 0 1734 27 1 0 72 3 1 0 5 346 28 436 18 93 33 0 2557 21 1 0 78 4 14 0 2 491 108 396 24 88 30 0 3206 26 1 0 73 5 28 0 0 283 5 334 17 60 40 0 1511 15 1 0 84 6 36 0 536 419 107 394 22 82 39 0 1697 17 1 0 82 7 59 0 14 309 9 386 20 65 63 0 2381 22 1 0 77 March 2, 2026 at 06:53:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 2389 109 461 22 89 60 0 1395 16 2 0 83 1 95 0 0 321 10 409 27 81 23 0 2030 21 1 0 78 2 159 0 0 259 2 299 24 68 38 0 1834 35 1 0 64 3 48 0 0 321 11 381 24 78 19 0 2096 33 1 0 66 4 29 0 23 474 111 333 28 78 64 0 2215 39 1 0 60 5 103 0 0 276 7 328 36 60 23 0 3267 39 1 0 60 6 389 0 494 436 117 391 20 87 50 0 1797 22 1 0 77 7 91 0 0 283 17 333 26 73 25 0 1876 27 1 0 72 March 2, 2026 at 06:53:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35 0 0 2370 117 463 19 84 27 0 1391 16 2 0 82 1 102 0 0 294 8 354 40 78 42 0 2182 41 1 0 58 2 210 0 0 299 12 413 26 74 27 0 3255 32 1 0 66 3 31 0 0 281 5 320 31 71 43 0 1851 42 1 0 57 4 68 0 9 463 111 311 31 67 36 0 2023 36 1 0 63 5 35 0 0 235 10 270 15 57 35 0 1544 27 1 0 73 6 31 0 452 389 110 321 26 64 19 0 1791 32 1 0 67 7 100 0 0 247 10 327 20 55 48 0 1793 18 1 0 81 March 2, 2026 at 06:53:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2349 104 440 22 78 37 0 1489 24 1 0 74 1 5 0 0 302 11 366 38 84 29 0 1711 41 1 0 58 2 3 0 0 307 19 359 29 72 44 0 1568 36 1 0 63 3 2 0 0 296 11 424 30 79 16 0 2961 30 1 0 69 4 4 0 10 456 113 303 30 82 39 0 1960 39 1 0 60 5 60 0 0 234 15 266 18 67 16 0 1972 21 1 0 78 6 5 0 395 403 109 326 36 72 51 0 1994 26 1 0 73 7 3 0 0 202 6 230 20 42 21 0 2037 33 0 0 67 March 2, 2026 at 06:53:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2481 104 599 39 133 98 0 2396 40 2 0 58 1 6 0 0 460 5 681 37 143 129 0 2941 43 1 0 55 2 7 0 0 468 10 665 23 124 104 0 2379 19 1 0 80 3 3 0 0 464 69 618 35 126 99 0 3948 43 1 0 55 4 4 0 2 652 116 680 33 120 73 0 2519 25 1 0 74 5 9 0 0 392 9 569 26 104 93 0 2109 18 1 0 81 6 7 0 501 532 116 620 41 144 136 0 2879 30 1 0 68 7 2 0 14 332 15 456 22 90 80 0 2545 23 1 0 76 March 2, 2026 at 06:53:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 45 2395 105 435 21 85 22 0 1676 22 1 0 77 1 63 0 0 315 5 391 29 90 23 0 2465 33 1 0 66 2 3 0 0 290 4 384 13 76 21 0 1810 18 1 0 81 3 21 0 0 326 14 414 32 79 14 0 2453 42 1 0 57 4 1 0 2 498 109 374 26 67 13 0 3751 47 1 0 52 5 31 0 0 280 13 369 8 67 33 0 1665 9 1 0 90 6 58 0 403 444 121 413 18 81 28 0 1941 19 1 0 80 7 0 0 14 267 8 348 8 58 18 0 1887 10 1 0 89 March 2, 2026 at 06:53:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2357 103 429 23 70 10 0 2018 17 1 0 81 1 0 0 0 284 16 366 19 64 14 0 1514 29 1 0 70 2 0 0 0 272 13 351 14 55 51 0 1244 14 1 0 85 3 1 0 0 240 5 324 26 70 9 0 1561 29 1 0 71 4 51 0 3 455 118 333 21 54 13 0 3039 24 1 0 75 5 2 0 0 230 7 312 15 46 11 0 1482 19 1 0 80 6 2 0 332 366 106 255 29 55 45 0 1995 44 1 0 55 7 1 0 14 212 10 256 19 38 11 0 2100 26 0 0 74 March 2, 2026 at 06:53:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2424 107 511 24 95 22 0 2221 18 2 0 81 1 0 0 0 306 10 363 27 76 27 0 2138 32 1 0 66 2 1 0 0 306 8 347 31 81 46 0 2115 41 1 0 58 3 2 0 0 350 16 444 30 98 16 0 2100 37 1 0 62 4 0 0 2 524 119 406 28 73 19 0 3414 30 1 0 69 5 0 0 0 303 8 395 13 67 34 0 2087 18 1 0 82 6 0 0 564 404 106 330 28 64 40 0 1864 32 1 0 67 7 0 0 21 282 11 367 13 66 16 0 2366 15 1 0 84 March 2, 2026 at 06:53:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 95 0 7 2365 103 427 29 76 15 0 1714 26 2 0 72 1 27 0 0 356 17 426 25 98 43 0 2261 37 1 0 62 2 23 0 0 312 18 339 25 70 26 0 2205 31 1 0 69 3 11 0 0 300 6 406 29 84 25 0 2147 28 1 0 71 4 27 0 3 475 106 354 31 71 29 0 3334 39 1 0 60 5 22 0 0 274 9 345 22 60 29 0 1669 20 1 0 79 6 45 0 479 383 106 316 20 71 18 0 2206 29 1 0 70 7 0 0 14 261 19 325 19 57 17 0 1852 22 1 0 77 March 2, 2026 at 06:53:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 62 0 0 2431 107 509 31 99 107 0 1937 26 2 0 72 1 34 0 7 394 12 485 32 96 113 0 2042 33 1 0 66 2 2 0 0 345 11 462 26 77 94 0 2030 31 1 0 68 3 0 0 0 401 71 485 26 103 148 0 2156 24 1 0 75 4 3 0 2 544 116 440 33 92 72 0 1643 36 1 0 63 5 34 0 0 275 6 385 23 76 97 0 3079 39 1 0 60 6 0 0 466 473 111 497 28 103 108 0 1815 26 1 0 73 7 1 0 14 255 10 312 21 58 122 0 2281 26 1 0 74 March 2, 2026 at 06:53:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2349 107 438 21 76 13 0 1460 17 2 0 81 1 4 0 7 309 11 380 32 79 25 0 2142 38 1 0 61 2 22 0 0 275 8 359 19 64 38 0 1729 11 1 0 88 3 3 0 0 248 4 323 25 73 11 0 1956 38 1 0 61 4 3 0 7 462 119 301 42 62 11 0 2102 51 1 0 48 5 3 0 14 236 5 320 21 54 24 0 3864 34 1 0 65 6 1 0 357 392 109 306 30 64 43 0 2066 40 1 0 59 7 3 0 0 269 24 340 19 48 26 0 1292 19 1 0 81 March 2, 2026 at 06:53:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2443 104 543 27 127 7 0 2173 28 2 0 70 1 6 0 7 385 10 536 23 122 25 0 2724 24 1 0 75 2 8 0 0 387 5 545 18 101 35 0 2754 19 1 0 80 3 8 0 0 414 6 606 24 98 39 0 2827 31 1 0 68 4 3 0 2 548 114 453 32 95 12 0 2515 38 1 0 61 5 6 0 0 344 13 474 37 86 41 0 3581 31 1 0 68 6 2 0 480 469 108 460 33 97 32 0 3027 42 1 0 57 7 3 0 14 305 16 405 22 72 27 0 2413 30 1 0 70 March 2, 2026 at 06:53:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2383 105 473 18 83 20 0 1774 18 1 0 80 1 42 0 7 317 7 413 22 80 13 0 2333 30 1 0 69 2 3 0 0 257 2 348 16 61 36 0 1780 18 1 0 82 3 41 0 0 289 9 392 36 75 36 0 2397 37 1 0 62 4 34 0 3 501 118 394 22 85 25 0 2051 34 1 0 66 5 48 0 0 271 14 425 9 59 19 0 3156 17 1 0 82 6 118 0 325 440 114 399 19 80 38 0 2136 27 1 0 72 7 1 0 14 284 14 406 18 65 37 0 2227 19 1 0 81 March 2, 2026 at 06:53:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 13 2347 115 392 37 81 31 0 2123 30 1 0 68 1 5 0 21 313 11 398 18 83 14 0 2211 25 1 0 74 2 2 0 0 290 16 370 14 60 9 0 1249 15 1 0 84 3 2 0 0 266 10 353 18 84 39 0 1855 16 1 0 83 4 5 0 3 493 109 383 22 78 31 0 1997 26 1 0 73 5 54 0 0 260 14 355 14 56 14 0 2811 22 1 0 78 6 54 0 367 388 111 326 22 60 22 0 1722 27 1 0 72 7 4 0 0 240 6 285 28 59 27 0 1555 42 1 0 57 March 2, 2026 at 06:53:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2426 111 476 42 105 56 0 1815 39 2 0 59 1 4 0 21 320 8 442 27 102 49 0 3948 29 1 0 70 2 9 0 0 331 8 430 23 75 61 0 1947 21 1 0 78 3 2 0 0 393 48 539 35 116 97 0 2296 32 1 0 67 4 2 0 2 568 115 502 24 121 102 0 2047 30 1 0 69 5 21 0 0 377 12 515 14 89 122 0 2245 16 1 0 83 6 5 0 535 467 112 453 30 118 95 0 2138 27 1 0 71 7 6 0 0 334 7 425 27 85 65 0 2002 30 1 0 69 March 2, 2026 at 06:53:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 2343 104 329 30 94 50 0 1865 32 1 0 66 1 13 0 0 334 10 411 22 89 18 0 2009 28 1 0 72 2 4 0 14 276 3 360 22 64 56 0 3498 21 1 0 78 3 52 0 0 309 17 360 29 75 16 0 1699 40 1 0 59 4 12 0 2 510 111 403 26 97 31 0 2137 29 1 0 70 5 5 0 0 288 14 320 31 80 37 0 2075 34 1 0 65 6 27 0 488 428 111 372 29 95 51 0 2205 38 1 0 61 7 28 0 0 262 6 336 14 67 26 0 1776 16 1 0 83 March 2, 2026 at 06:53:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43 0 0 2343 110 328 35 74 21 0 1703 41 1 0 58 1 7 0 0 356 9 451 24 89 39 0 2130 26 1 0 73 2 32 0 14 336 11 446 21 70 17 0 1999 23 1 0 76 3 4 0 0 264 10 333 25 75 29 0 2229 34 1 0 66 4 4 0 2 501 111 396 17 73 11 0 1640 19 1 0 80 5 84 0 0 254 10 278 32 63 36 0 1886 44 1 0 55 6 65 0 459 397 110 309 34 68 22 0 2524 35 1 0 64 7 6 0 0 253 5 349 19 66 18 0 3009 20 1 0 80 March 2, 2026 at 06:53:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2325 108 343 26 80 37 0 2078 31 1 0 68 1 6 0 0 347 13 444 26 83 73 0 2086 24 1 0 75 2 53 0 14 257 11 322 25 66 22 0 1977 31 1 0 69 3 2 0 0 284 10 369 36 83 8 0 1580 44 1 0 55 4 7 0 3 472 114 352 31 81 17 0 1874 35 1 0 64 5 1 0 0 247 7 294 25 63 72 0 1585 36 1 0 63 6 5 0 346 417 110 365 31 76 30 0 2126 26 1 0 73 7 7 0 0 225 9 307 23 53 22 0 3305 28 1 0 71 March 2, 2026 at 06:53:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2509 110 654 33 130 34 0 2378 29 2 0 69 1 9 0 0 430 9 622 35 141 39 0 3084 35 1 0 64 2 29 0 0 393 6 506 27 104 66 0 3229 34 1 0 65 3 4 0 50 422 12 565 38 129 10 0 3075 28 1 0 71 4 28 0 3 578 107 486 31 111 49 0 2565 36 1 0 63 5 6 0 0 370 23 469 20 92 33 0 2210 18 1 0 81 6 72 0 527 511 108 566 29 108 57 0 4276 30 2 0 68 7 0 0 0 360 9 534 28 93 14 0 2452 22 1 0 77 March 2, 2026 at 06:53:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 125 0 0 2440 106 540 35 98 63 0 2031 36 2 0 62 1 72 0 0 414 4 647 25 133 126 0 2094 26 1 0 72 2 7 0 0 349 16 498 18 97 71 0 1963 17 1 0 82 3 31 0 14 502 130 655 24 116 95 0 1961 24 1 0 75 4 30 0 2 496 109 417 17 108 103 0 1695 24 1 0 75 5 31 0 0 324 10 482 13 97 139 0 1363 20 1 0 80 6 11 0 347 477 114 511 31 102 106 0 3645 29 2 0 70 7 130 0 0 289 4 439 26 81 109 0 2260 25 1 0 74 March 2, 2026 at 06:54:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2362 105 412 21 87 15 0 1831 16 2 0 83 1 7 0 0 295 4 376 30 79 37 0 2059 38 1 0 61 2 52 0 0 328 10 391 26 73 37 0 2650 34 1 0 65 3 1 0 0 296 13 388 23 74 11 0 1549 32 1 0 67 4 3 0 17 502 120 404 20 77 29 0 1950 25 1 0 74 5 5 0 0 285 16 357 20 63 31 0 1577 19 1 0 80 6 5 0 444 410 114 387 20 77 15 0 2958 19 1 0 80 7 60 0 0 260 4 340 23 61 31 0 2157 25 1 0 74 March 2, 2026 at 06:54:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2369 104 580 20 88 20 0 2072 24 2 0 74 1 2 0 7 312 4 374 32 89 48 0 2309 41 1 0 58 2 0 0 0 323 7 380 19 75 12 0 1802 22 1 0 77 3 3 0 0 347 19 454 24 97 9 0 2524 21 1 0 78 4 2 0 3 533 117 416 27 89 29 0 2329 39 1 0 60 5 58 0 14 310 15 397 17 78 55 0 2378 21 1 0 78 6 0 0 536 420 110 344 35 76 16 0 1900 38 1 0 61 7 3 0 0 276 8 379 22 64 11 0 3158 24 1 0 75 March 2, 2026 at 06:54:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2395 112 439 19 88 35 0 1643 21 2 0 77 1 2 0 0 355 14 472 32 95 12 0 3139 28 1 0 70 2 0 0 0 290 8 328 28 63 14 0 1524 35 1 0 64 3 1 0 0 312 12 385 31 98 20 0 2791 36 1 0 63 4 22 0 10 493 111 359 26 88 32 0 2291 39 1 0 60 5 50 0 14 311 10 374 30 74 27 0 2677 27 1 0 72 6 3 0 513 420 114 366 33 82 28 0 1920 34 1 0 65 7 0 0 0 247 7 295 21 55 18 0 1752 18 1 0 81 March 2, 2026 at 06:54:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2359 116 404 26 81 31 0 1844 34 1 0 65 1 1 0 0 303 5 403 27 78 11 0 3262 29 1 0 70 2 3 0 0 266 1 314 26 65 12 0 1855 39 1 0 60 3 36 0 0 275 9 338 23 67 48 0 2046 30 1 0 69 4 2 0 10 469 110 335 29 85 27 0 1813 35 1 0 64 5 2 0 0 297 18 357 24 61 18 0 2163 30 1 0 69 6 0 0 437 415 116 377 27 74 24 0 2036 18 1 0 81 7 1 0 0 257 11 311 26 64 36 0 1727 36 1 0 64 March 2, 2026 at 06:54:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2404 107 497 20 107 75 0 1711 18 2 0 80 1 4 0 0 305 12 420 35 96 56 0 3307 39 1 0 60 2 4 0 0 292 2 418 23 92 151 0 1837 33 1 0 66 3 1 0 0 370 86 505 38 97 100 0 1669 42 1 0 57 4 1 0 9 526 116 477 34 106 114 0 1887 31 1 0 68 5 2 0 24 277 8 367 34 77 77 0 1584 30 1 0 69 6 0 0 340 491 112 463 31 99 118 0 2437 37 1 0 62 7 3 0 0 272 8 369 22 76 93 0 2252 25 1 0 74 March 2, 2026 at 06:54:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2491 108 603 29 119 29 0 2741 31 2 0 68 1 3 0 0 505 20 742 29 142 33 0 4398 22 2 0 76 2 1 0 0 474 9 676 23 106 38 0 2606 17 1 0 82 3 1 0 0 438 6 638 32 128 52 0 3284 42 1 0 57 4 0 0 2 608 109 580 25 122 17 0 2201 28 1 0 71 5 2 0 7 330 6 453 22 95 48 0 2790 30 1 0 69 6 40 0 536 492 111 505 24 112 41 0 2934 25 1 0 74 7 30 0 14 300 9 410 19 84 59 0 3148 22 1 0 77 March 2, 2026 at 06:54:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2371 105 449 25 63 9 0 1588 22 1 0 76 1 8 0 0 281 18 380 21 76 47 0 1940 35 1 0 65 2 2 0 0 299 11 454 22 65 10 0 2883 23 1 0 76 3 42 0 0 261 7 355 25 69 16 0 1860 34 1 0 65 4 6 0 3 432 114 310 16 72 15 0 2220 18 1 0 81 5 25 0 7 245 12 311 16 48 56 0 1527 20 0 0 79 6 5 0 269 384 105 308 23 62 12 0 1493 30 1 0 69 7 39 0 14 196 7 233 11 34 16 0 2023 17 1 0 83 March 2, 2026 at 06:54:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 53 0 0 2401 104 427 24 89 21 0 2323 21 2 0 78 1 7 0 14 315 8 373 28 88 12 0 2196 46 1 0 53 2 0 0 0 367 21 439 21 82 25 0 3043 28 1 0 71 3 1 0 0 403 15 532 13 100 47 0 1967 15 1 0 85 4 49 0 2 510 112 381 27 95 28 0 2026 34 1 0 65 5 0 0 7 313 7 415 17 88 35 0 2087 15 1 0 84 6 47 0 579 410 104 359 25 82 19 0 1874 34 1 0 65 7 0 0 0 285 10 345 15 67 48 0 2509 20 1 0 80 March 2, 2026 at 06:54:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 2409 119 488 34 92 23 0 2001 33 2 0 65 1 19 0 14 350 12 428 34 105 23 0 2476 41 1 0 58 2 3 0 0 334 5 410 28 80 47 0 2265 27 1 0 72 3 8 0 0 301 3 385 24 100 42 0 2160 27 1 0 72 4 1 0 3 521 113 378 27 81 29 0 2196 31 1 0 69 5 2 0 7 288 13 348 17 56 21 0 1800 14 1 0 85 6 69 0 548 407 112 348 25 78 40 0 1665 33 1 0 66 7 22 0 0 285 7 365 23 69 40 0 3232 28 1 0 71 March 2, 2026 at 06:54:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 2385 103 423 36 80 51 0 2204 35 2 0 63 1 34 0 14 363 15 475 33 107 74 0 2445 41 1 0 58 2 31 0 0 318 4 393 31 97 101 0 2212 33 1 0 66 3 9 0 0 395 61 502 24 101 92 0 1871 27 1 0 72 4 27 0 2 593 115 500 37 100 73 0 1981 37 1 0 62 5 0 0 7 275 7 341 21 86 70 0 1725 20 1 0 79 6 3 0 480 505 112 558 29 122 141 0 1921 19 1 0 80 7 30 0 0 274 7 369 28 66 58 0 3529 26 1 0 73 March 2, 2026 at 06:54:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2357 109 406 37 90 13 0 3318 30 2 0 68 1 4 0 14 297 8 384 30 76 50 0 2118 33 1 0 67 2 5 0 7 336 23 413 15 62 23 0 1523 20 1 0 79 3 2 0 0 289 12 401 26 82 49 0 2093 36 1 0 64 4 2 0 7 483 114 388 26 70 35 0 2017 34 1 0 65 5 3 0 0 255 15 324 21 60 41 0 1600 36 1 0 63 6 7 0 357 391 112 321 29 78 30 0 2192 35 1 0 64 7 7 0 0 215 7 248 27 51 69 0 2141 32 1 0 67 March 2, 2026 at 06:54:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2444 109 617 31 107 34 0 3909 29 2 0 69 1 3 0 0 373 9 484 36 111 105 0 2543 51 1 0 48 2 4 0 14 347 5 486 24 97 41 0 2344 25 1 0 74 3 2 0 0 353 6 542 31 112 60 0 2623 17 1 0 82 4 4 0 3 555 115 487 31 96 44 0 2680 34 1 0 65 5 5 0 25 376 12 526 15 83 106 0 2427 17 1 0 82 6 4 0 423 461 114 441 31 94 45 0 2686 36 1 0 63 7 50 0 0 270 6 370 28 77 49 0 2337 35 1 0 64 March 2, 2026 at 06:54:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2424 108 542 22 86 27 0 3447 20 2 0 78 1 4 0 0 394 9 554 20 98 17 0 2293 19 1 0 80 2 3 0 0 322 16 415 10 79 53 0 2238 11 1 0 88 3 1 0 0 328 12 436 36 82 21 0 2045 29 1 0 70 4 0 0 1 482 105 391 24 97 22 0 2186 38 1 0 61 5 0 0 7 261 11 322 25 65 21 0 2202 35 1 0 65 6 5 0 383 487 115 503 28 93 53 0 2735 30 1 0 69 7 51 0 14 259 7 365 14 70 16 0 1814 21 1 0 78 March 2, 2026 at 06:54:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 14 2413 114 494 18 94 23 0 2542 10 2 0 88 1 45 0 0 353 17 465 29 91 15 0 2244 33 1 0 66 2 102 0 0 299 10 329 20 64 39 0 1958 31 1 0 68 3 2 0 0 308 5 418 21 86 36 0 2089 22 1 0 77 4 3 0 2 500 111 382 28 87 28 0 2124 38 1 0 61 5 1 0 7 278 10 363 18 65 19 0 2455 19 1 0 80 6 55 0 452 443 109 425 22 81 23 0 2065 23 1 0 76 7 7 0 0 279 6 352 24 60 44 0 1866 32 1 0 68 March 2, 2026 at 06:54:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2423 108 503 35 117 70 0 1867 26 2 0 72 1 46 0 14 416 15 535 29 119 57 0 2537 27 1 0 72 2 17 0 0 335 7 429 31 97 106 0 2210 33 1 0 66 3 0 0 0 421 56 566 31 110 82 0 2316 32 1 0 67 4 6 0 2 562 116 505 31 121 84 0 2255 29 1 0 70 5 1 0 7 353 14 472 33 102 61 0 2197 32 1 0 67 6 1 0 522 474 113 478 45 113 80 0 2387 28 1 0 71 7 1 0 0 298 2 447 20 83 103 0 3330 20 1 0 79 March 2, 2026 at 06:54:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2395 112 499 21 93 37 0 3323 19 2 0 79 1 0 0 0 349 8 468 27 102 50 0 2503 34 1 0 65 2 1 0 14 298 4 338 33 76 55 0 2635 26 1 0 73 3 0 0 0 330 14 410 28 89 33 0 2035 31 1 0 68 4 2 0 2 496 114 342 27 80 35 0 1468 28 1 0 71 5 2 0 7 299 17 360 17 65 50 0 1986 20 1 0 80 6 1 0 523 423 107 379 26 80 27 0 2070 40 1 0 58 7 1 0 0 286 5 333 29 61 19 0 2331 40 1 0 59 March 2, 2026 at 06:54:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2363 104 407 28 86 13 0 1969 30 1 0 68 1 0 0 0 267 3 311 29 79 12 0 1924 48 1 0 52 2 1 0 14 322 17 426 30 74 70 0 3684 27 1 0 72 3 1 0 0 301 7 377 35 84 12 0 1924 42 1 0 57 4 2 0 3 473 111 313 26 80 10 0 1950 35 1 0 64 5 2 0 7 265 11 319 25 65 9 0 1772 24 1 0 75 6 0 0 423 400 116 322 23 69 63 0 1955 32 1 0 67 7 0 0 0 278 10 354 22 66 28 0 1707 19 1 0 81 March 2, 2026 at 06:54:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2338 105 414 25 82 21 0 1915 17 2 0 82 1 0 0 0 254 8 293 37 71 11 0 1826 47 1 0 52 2 0 0 14 253 9 368 23 69 30 0 3515 29 1 0 70 3 1 0 0 320 18 410 39 95 42 0 1857 44 1 0 55 4 2 0 2 466 107 329 37 82 17 0 2209 52 1 0 47 5 0 0 7 266 15 351 27 72 21 0 1882 25 1 0 74 6 94 0 326 408 112 327 30 74 30 0 1658 29 1 0 70 7 10 0 0 246 8 311 19 59 38 0 1684 18 1 0 82 March 2, 2026 at 06:54:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2486 107 620 22 112 24 0 3071 20 2 0 78 1 67 0 7 446 14 643 27 127 35 0 3155 30 1 0 69 2 28 0 14 359 9 453 41 90 103 0 4351 55 1 0 44 3 98 0 0 455 12 654 30 136 42 0 3558 39 1 0 60 4 40 0 3 697 121 717 25 142 26 0 3110 17 1 0 82 5 29 0 0 388 9 572 16 102 52 0 2587 18 1 0 81 6 33 0 521 496 106 562 19 105 79 0 2630 23 1 0 76 7 4 0 0 349 9 490 19 88 41 0 2584 16 1 0 83 March 2, 2026 at 06:54:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 0 2405 113 473 29 104 84 0 2029 28 1 0 71 1 1 0 7 352 14 459 35 107 63 0 3186 36 1 0 62 2 4 0 14 371 16 483 26 95 80 0 2202 20 1 0 79 3 3 0 0 416 66 555 22 98 104 0 2186 24 1 0 75 4 4 0 3 523 111 448 18 94 69 0 1891 19 1 0 80 5 2 0 54 275 9 395 24 75 57 0 1207 24 1 0 75 6 38 0 325 455 107 404 28 93 94 0 1965 28 1 0 71 7 4 0 0 232 2 327 19 69 58 0 1569 22 1 0 77 March 2, 2026 at 06:54:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2441 104 437 38 98 34 0 2509 41 2 0 58 1 0 0 14 374 7 459 31 95 25 0 2311 37 1 0 62 2 0 0 0 384 18 493 18 91 32 0 3450 20 1 0 79 3 0 0 0 354 7 494 25 85 18 0 2402 33 1 0 66 4 0 0 6 528 110 424 23 99 26 0 2226 21 1 0 78 5 0 0 0 315 15 350 21 65 46 0 2107 27 1 0 73 6 0 0 638 470 118 451 24 96 21 0 2429 24 1 0 75 7 0 0 7 290 11 361 21 79 40 0 2271 19 1 0 80 March 2, 2026 at 06:54:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2365 106 379 27 79 39 0 1709 32 1 0 67 1 0 0 0 324 4 409 25 94 49 0 2738 36 1 0 63 2 0 0 14 374 18 480 19 79 55 0 3315 18 1 0 80 3 0 0 0 338 19 458 29 86 63 0 2524 25 1 0 74 4 0 0 2 503 117 376 29 70 45 0 2424 36 1 0 63 5 0 0 0 277 5 350 26 80 48 0 1955 34 1 0 65 6 0 0 494 447 105 422 29 86 59 0 2066 31 1 0 67 7 0 0 7 245 7 281 16 59 54 0 2176 27 1 0 72 March 2, 2026 at 06:54:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2413 113 441 33 92 13 0 1760 33 2 0 66 1 0 0 0 306 6 384 31 91 12 0 2320 44 1 0 55 2 0 0 0 279 5 369 33 75 22 0 3147 30 1 0 69 3 0 0 0 307 9 355 30 93 24 0 1937 40 1 0 59 4 0 0 3 513 116 405 24 83 12 0 2255 26 1 0 73 5 0 0 52 264 11 306 21 72 18 0 2263 27 1 0 72 6 0 0 423 429 112 377 26 88 23 0 2161 30 1 0 69 7 0 0 7 306 14 410 21 62 26 0 2275 16 1 0 83 March 2, 2026 at 06:54:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2341 106 403 15 75 53 0 1800 15 1 0 84 1 0 0 0 277 2 398 22 86 41 0 2044 25 1 0 74 2 0 0 0 282 8 379 28 58 75 0 3061 26 1 0 73 3 0 0 0 309 8 419 37 89 29 0 2360 40 1 0 59 4 0 0 2 472 114 341 34 77 52 0 1817 49 1 0 50 5 0 0 0 262 16 326 28 66 42 0 2047 38 1 0 61 6 0 0 368 440 118 356 38 81 78 0 2144 41 1 0 58 7 0 0 21 278 16 386 18 70 35 0 2437 23 1 0 77 March 2, 2026 at 06:54:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2520 107 613 36 130 93 0 2637 31 2 0 67 1 0 0 0 451 9 656 36 142 100 0 2989 30 1 0 69 2 3 0 0 454 12 636 36 111 74 0 4261 32 2 0 66 3 1 0 0 534 75 756 36 154 59 0 3030 24 1 0 75 4 0 0 2 676 112 699 37 145 116 0 3055 38 1 0 61 5 0 0 0 358 7 492 25 97 94 0 2299 29 1 0 70 6 1 0 535 532 111 622 31 129 111 0 2486 26 1 0 73 7 0 0 21 410 15 606 19 103 112 0 3127 18 1 0 81 March 2, 2026 at 06:54:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2343 107 348 30 66 25 0 2146 44 1 0 55 1 2 0 14 264 7 320 25 59 69 0 2565 41 1 0 58 2 0 0 0 260 5 358 15 63 27 0 2750 19 1 0 80 3 13 0 0 310 15 435 21 62 9 0 2140 26 1 0 73 4 0 0 2 468 110 363 13 66 15 0 1417 18 1 0 82 5 40 0 0 231 4 317 14 54 66 0 1503 15 1 0 85 6 9 0 368 447 119 417 18 69 32 0 2066 27 1 0 72 7 6 0 7 256 9 341 6 64 9 0 2027 10 1 0 90 March 2, 2026 at 06:54:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 50 0 0 2402 105 444 24 102 18 0 2048 29 2 0 69 1 51 0 14 398 8 499 27 94 43 0 2424 33 1 0 66 2 5 0 0 384 11 494 17 93 37 0 3321 17 1 0 81 3 1 0 0 355 11 432 30 95 25 0 2449 25 1 0 74 4 12 0 3 558 113 445 25 94 24 0 1897 26 1 0 73 5 1 0 0 304 9 382 21 80 62 0 2078 21 1 0 78 6 0 0 620 432 109 372 35 92 34 0 2170 34 1 0 65 7 1 0 7 290 14 322 20 66 11 0 2399 32 1 0 67 March 2, 2026 at 06:54:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2363 104 355 24 91 79 0 2445 33 2 0 66 1 3 0 21 417 12 573 31 123 49 0 2918 31 1 0 68 2 1 0 0 356 10 452 27 82 48 0 3536 34 1 0 65 3 2 0 0 334 10 433 24 94 29 0 1707 31 1 0 68 4 3 0 3 556 129 442 32 90 70 0 2463 35 1 0 64 5 1 0 0 285 5 366 16 75 64 0 2253 15 1 0 85 6 45 0 534 423 110 382 26 85 43 0 1880 25 1 0 74 7 0 0 0 261 5 319 21 56 34 0 2069 31 1 0 68 March 2, 2026 at 06:54:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2385 118 501 25 99 21 0 3511 20 2 0 79 1 3 0 14 327 11 407 26 91 28 0 2539 28 1 0 71 2 35 0 7 338 12 389 29 75 12 0 2167 32 1 0 67 3 57 0 0 328 8 415 26 91 9 0 1957 31 1 0 68 4 31 0 1 528 110 410 29 93 40 0 2242 34 1 0 65 5 2 0 0 321 18 389 22 81 17 0 2088 26 1 0 73 6 2 0 538 403 104 329 34 72 23 0 1996 42 1 0 57 7 3 0 0 270 7 317 24 64 8 0 2015 38 1 0 62 March 2, 2026 at 06:54:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2413 108 518 17 112 135 0 1726 21 2 0 78 1 1 0 0 374 9 572 36 131 140 0 3158 33 1 0 65 2 3 0 7 377 16 508 26 95 97 0 2337 17 1 0 82 3 1 0 0 399 114 434 42 98 45 0 1909 40 1 0 59 4 2 0 15 557 109 535 41 120 109 0 2135 38 1 0 61 5 1 0 0 346 8 505 36 102 139 0 1970 41 1 0 58 6 2 0 341 483 110 449 41 109 89 0 1908 40 1 0 59 7 3 0 22 295 5 424 34 95 78 0 1539 25 1 0 74 March 2, 2026 at 06:54:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2467 107 583 25 105 111 0 2623 37 2 0 61 1 1 0 0 458 10 643 35 129 31 0 4048 30 2 0 68 2 0 0 7 398 12 512 32 97 17 0 2729 43 1 0 56 3 3 0 0 426 19 568 33 122 40 0 3799 44 1 0 55 4 1 0 21 580 117 508 17 128 80 0 2949 21 1 0 78 5 9 0 0 377 8 517 28 87 48 0 2551 21 1 0 78 6 5 0 538 485 109 513 28 100 22 0 2761 24 1 0 75 7 0 0 0 338 15 473 16 89 24 0 2198 16 1 0 83 March 2, 2026 at 06:54:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2357 114 403 22 70 9 0 1754 32 1 0 67 1 0 0 0 287 5 408 20 83 66 0 2125 26 1 0 73 2 0 0 7 321 16 475 16 78 47 0 3577 15 1 0 84 3 0 0 0 253 2 363 16 67 11 0 1969 21 1 0 78 4 0 0 17 524 118 432 19 81 12 0 2524 20 1 0 79 5 0 0 0 254 11 313 18 55 95 0 2458 26 1 0 73 6 0 0 353 409 107 341 26 62 50 0 2090 43 1 0 56 7 11 0 0 233 5 326 12 56 4 0 1523 17 1 0 82 March 2, 2026 at 06:54:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2441 111 492 31 103 12 0 2104 22 2 0 77 1 2 0 0 327 3 438 23 103 55 0 3454 31 1 0 68 2 5 0 7 429 7 510 20 78 18 0 2161 17 1 0 82 3 15 0 0 393 17 502 27 107 22 0 2314 28 1 0 71 4 61 0 16 565 115 446 27 94 23 0 2308 35 1 0 64 5 0 0 0 333 14 424 24 80 66 0 2445 17 1 0 82 6 2 0 591 396 109 322 24 78 13 0 2414 36 1 0 63 7 50 0 0 304 7 392 18 77 29 0 1827 27 1 0 72 March 2, 2026 at 06:54:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 135 0 0 2407 109 463 24 100 59 0 2189 28 2 0 70 1 2 0 0 315 4 375 31 97 10 0 2356 37 1 0 62 2 9 0 0 301 4 388 28 82 38 0 3485 23 1 0 76 3 4 0 7 332 11 423 36 86 10 0 2299 43 1 0 56 4 0 0 16 533 116 422 27 93 22 0 2711 35 1 0 65 5 4 0 0 343 19 426 23 80 19 0 1970 20 1 0 79 6 1 0 536 487 119 499 22 97 55 0 2473 18 1 0 81 7 0 0 0 272 4 319 26 67 14 0 2060 32 1 0 67 March 2, 2026 at 06:54:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2426 110 485 30 100 49 0 2191 28 2 0 71 1 36 0 0 368 7 511 26 106 60 0 1902 27 1 0 72 2 71 0 0 390 22 522 23 96 106 0 3359 15 1 0 83 3 1 0 0 379 69 426 40 107 47 0 2087 47 1 0 52 4 15 0 9 563 113 525 23 110 100 0 2361 29 1 0 70 5 1 0 0 325 5 445 34 92 91 0 2066 33 1 0 67 6 0 0 466 487 106 545 28 108 120 0 2914 36 1 0 63 7 1 0 0 326 15 442 30 82 84 0 1652 32 1 0 67 March 2, 2026 at 06:54:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2319 105 361 22 74 28 0 1662 20 2 0 78 1 49 0 14 285 7 353 32 80 24 0 2424 44 1 0 55 2 1 0 0 273 12 369 25 57 26 0 3314 27 1 0 72 3 4 0 0 264 8 376 25 76 18 0 1573 32 1 0 68 4 3 0 10 474 116 353 28 79 31 0 2201 36 1 0 63 5 1 0 0 295 18 374 26 72 18 0 1553 28 1 0 71 6 0 0 339 410 109 343 30 77 15 0 2239 37 1 0 62 7 6 0 0 212 1 267 20 53 17 0 1921 31 1 0 68 March 2, 2026 at 06:54:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2493 107 615 35 123 29 0 2770 30 2 0 68 1 3 0 0 394 7 538 27 128 45 0 2469 31 1 0 68 2 2 0 0 395 4 589 26 104 21 0 3919 22 2 0 76 3 2 0 0 414 18 584 30 114 46 0 3015 31 1 0 68 4 4 0 2 622 120 577 24 128 31 0 2875 27 1 0 72 5 2 0 21 349 8 475 25 100 39 0 3346 32 1 0 67 6 0 0 508 479 105 482 33 107 25 0 2759 40 1 0 59 7 1 0 0 360 10 506 23 86 39 0 2654 24 1 0 75 March 2, 2026 at 06:54:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2356 111 400 17 83 42 0 2087 15 1 0 83 1 0 0 0 358 11 459 23 85 23 0 2404 34 1 0 65 2 0 0 0 303 13 397 21 74 60 0 3305 36 1 0 63 3 0 0 0 302 11 449 30 91 13 0 2034 31 1 0 68 4 0 0 2 503 109 417 25 83 38 0 2402 34 1 0 65 5 0 0 21 257 12 361 17 60 22 0 1977 13 1 0 86 6 0 0 326 417 114 384 17 80 74 0 2348 14 1 0 85 7 0 0 21 216 8 273 13 51 2 0 1302 22 0 0 78 March 2, 2026 at 06:54:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2435 107 483 24 94 42 0 2441 17 2 0 81 1 0 0 0 354 2 489 30 114 25 0 2240 34 1 0 65 2 0 0 0 375 11 483 17 98 19 0 1799 19 1 0 80 3 0 0 0 400 18 480 40 96 20 0 2527 46 1 0 53 4 1 0 4 586 117 519 22 116 22 0 2400 26 1 0 73 5 0 0 7 350 20 402 30 81 36 0 2310 25 1 0 74 6 0 0 636 455 111 434 27 98 17 0 2693 34 1 0 65 7 0 0 0 301 9 395 20 80 23 0 3557 17 1 0 82 March 2, 2026 at 06:54:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2488 108 650 38 136 136 0 2565 20 2 0 78 1 0 0 0 421 13 521 46 132 65 0 2220 32 1 0 66 2 0 0 0 350 10 414 37 96 66 0 2124 26 1 0 73 3 0 0 0 504 112 626 25 140 107 0 2108 22 1 0 77 4 0 0 2 627 110 582 44 127 120 0 1885 52 1 0 47 5 0 0 0 358 12 483 20 104 102 0 1902 17 1 0 82 6 0 0 592 547 106 670 24 141 153 0 2452 35 1 0 63 7 0 0 21 349 6 521 28 108 82 0 3920 29 1 0 70 March 2, 2026 at 06:54:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2395 113 472 19 95 32 0 2491 22 2 0 76 1 0 0 0 308 5 402 32 99 105 0 2401 36 1 0 63 2 0 0 0 334 11 418 28 88 51 0 2038 26 1 0 73 3 0 0 0 313 10 422 35 95 13 0 2661 44 1 0 55 4 0 0 2 538 115 471 31 102 16 0 2028 28 1 0 71 5 0 0 0 279 11 336 25 70 119 0 1964 40 1 0 60 6 0 0 424 407 107 363 33 85 42 0 3186 38 1 0 61 7 0 0 21 279 14 378 13 58 9 0 2028 14 1 0 86 March 2, 2026 at 06:54:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2353 112 435 31 87 47 0 4029 29 2 0 70 1 0 0 0 292 5 377 48 70 30 0 1990 55 1 0 44 2 0 0 0 309 11 376 36 68 45 0 2044 48 1 0 51 3 0 0 0 335 12 484 35 90 15 0 2010 23 1 0 76 4 0 0 9 487 109 389 34 88 25 0 2324 32 1 0 67 5 0 0 0 258 8 329 25 73 50 0 1837 20 1 0 79 6 0 0 354 420 117 332 19 80 36 0 1765 19 1 0 80 7 0 0 14 266 12 336 24 61 20 0 2012 34 1 0 66 March 2, 2026 at 06:54:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 12 2447 107 561 32 111 18 0 4329 35 2 0 63 1 0 0 0 397 7 522 35 114 13 0 2782 42 1 0 57 2 0 0 0 506 10 693 29 124 21 0 2852 32 1 0 67 3 0 0 0 439 10 594 33 141 51 0 3181 37 1 0 62 4 0 0 9 616 117 546 34 111 24 0 2971 32 1 0 67 5 0 0 0 401 21 561 15 105 23 0 2489 12 1 0 87 6 0 0 577 484 109 491 32 107 21 0 2500 25 1 0 73 7 0 0 14 351 12 482 17 96 43 0 2837 19 1 0 80 March 2, 2026 at 06:54:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2386 117 474 28 71 18 0 3797 26 2 0 72 1 0 0 0 318 6 411 28 81 37 0 1953 34 1 0 65 2 0 0 0 258 8 338 14 62 8 0 1549 21 1 0 79 3 0 0 0 274 7 378 24 84 26 0 2150 32 1 0 68 4 0 0 9 499 115 404 15 78 13 0 1954 20 1 0 79 5 0 0 0 277 11 355 14 58 36 0 1672 20 1 0 79 6 0 0 368 433 113 383 24 67 10 0 1602 30 1 0 69 7 0 0 14 266 13 357 18 57 25 0 2146 22 1 0 78 March 2, 2026 at 06:54:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 41 0 14 2476 108 514 31 129 115 0 3000 28 2 0 70 1 0 0 0 413 6 556 34 138 125 0 2594 29 1 0 70 2 0 0 0 398 3 557 30 114 72 0 1946 26 1 0 73 3 0 0 0 486 76 675 22 140 146 0 2478 20 1 0 79 4 1 0 9 619 119 589 28 127 89 0 2288 24 1 0 75 5 0 0 0 419 16 583 25 112 99 0 3887 23 1 0 75 6 0 0 591 486 105 525 30 127 67 0 2249 28 1 0 71 7 0 0 0 349 6 445 34 111 126 0 2380 47 1 0 52 March 2, 2026 at 06:54:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2414 104 489 24 95 24 0 2249 19 2 0 79 1 1 0 0 346 6 447 34 104 23 0 2774 38 1 0 61 2 0 0 0 343 3 424 30 89 8 0 2258 37 1 0 62 3 0 0 0 324 4 395 32 96 65 0 2680 30 1 0 69 4 59 0 3 545 113 429 30 92 24 0 1963 40 1 0 59 5 0 0 0 357 18 480 23 86 55 0 3182 23 1 0 76 6 1 0 584 430 114 386 20 91 14 0 2374 26 1 0 72 7 0 0 0 320 17 384 28 75 69 0 2041 28 1 0 71 March 2, 2026 at 06:54:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2356 110 407 29 78 56 0 2408 34 2 0 64 1 5 0 0 323 9 407 40 103 31 0 2243 41 1 0 58 2 0 0 0 316 6 416 23 72 26 0 2082 24 1 0 76 3 4 0 0 334 14 450 29 87 99 0 2170 36 1 0 63 4 24 0 3 517 113 384 30 82 78 0 2003 41 1 0 59 5 2 0 0 281 8 383 25 68 61 0 3270 29 1 0 70 6 2 0 402 435 112 413 24 81 20 0 2204 26 1 0 73 7 2 0 0 247 9 311 25 56 95 0 1847 28 1 0 71 March 2, 2026 at 06:54:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2322 106 312 26 74 15 0 2060 32 1 0 66 1 4 0 0 328 10 407 32 93 71 0 1856 28 1 0 71 2 7 0 68 299 8 385 18 63 17 0 1982 22 1 0 77 3 0 0 0 276 14 351 23 74 26 0 1942 34 1 0 65 4 5 0 3 464 116 367 27 81 22 0 1680 29 1 0 70 5 3 0 0 236 9 317 27 60 80 0 3232 44 1 0 55 6 1 0 297 420 110 361 39 75 29 0 2322 35 1 0 64 7 5 0 0 233 14 299 27 65 50 0 1801 30 1 0 69 March 2, 2026 at 06:54:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2499 105 612 33 119 46 0 3018 37 2 0 61 1 2 0 0 465 15 672 27 129 45 0 2921 24 1 0 74 2 0 0 0 404 4 543 25 111 19 0 2169 17 1 0 82 3 0 0 0 460 9 705 29 129 82 0 4349 28 1 0 71 4 0 0 15 624 110 584 32 126 42 0 3373 31 1 0 68 5 4 0 0 387 16 527 23 105 45 0 2726 23 1 0 76 6 1 0 523 517 115 572 24 120 16 0 3142 33 1 0 66 7 0 0 0 347 10 471 29 93 91 0 2627 26 1 0 73 March 2, 2026 at 06:54:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2447 107 516 32 105 84 0 2170 24 2 0 74 1 0 0 0 383 8 558 30 126 101 0 2148 28 1 0 71 2 0 0 0 352 4 437 35 92 67 0 1876 37 1 0 62 3 0 0 0 432 63 573 43 110 76 0 3583 43 1 0 55 4 40 0 17 591 115 545 24 124 63 0 2326 24 1 0 75 5 0 0 0 344 6 476 17 86 119 0 1747 18 1 0 81 6 0 0 479 471 117 485 16 88 60 0 2135 15 1 0 84 7 0 0 0 281 4 370 18 72 71 0 1696 20 1 0 80 March 2, 2026 at 06:54:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 57 0 7 2448 107 511 24 106 28 0 2282 26 2 0 72 1 0 0 0 367 5 462 32 106 17 0 3672 40 1 0 58 2 0 0 0 327 8 403 13 80 20 0 2263 25 1 0 74 3 0 0 0 383 6 502 19 101 15 0 2382 23 1 0 76 4 0 0 21 561 120 437 24 98 30 0 2718 26 1 0 73 5 0 0 0 335 11 386 34 73 17 0 2063 40 1 0 60 6 0 0 623 479 111 491 28 95 33 0 2672 32 1 0 66 7 0 0 0 350 20 453 20 94 11 0 2532 21 1 0 78 March 2, 2026 at 06:54:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2407 115 442 23 93 14 0 1763 31 1 0 67 1 15 0 7 368 11 489 24 106 19 0 2304 25 1 0 74 2 0 0 0 304 7 339 26 70 38 0 1840 30 1 0 69 3 0 0 0 359 14 456 22 92 25 0 2064 33 1 0 66 4 0 0 2 533 115 458 31 97 14 0 3174 34 1 0 65 5 0 0 14 305 5 391 17 82 29 0 2229 26 1 0 73 6 0 0 522 414 105 360 35 79 35 0 2533 38 1 0 61 7 0 0 0 279 7 348 22 65 42 0 2824 26 1 0 73 March 2, 2026 at 06:54:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2361 109 386 28 87 11 0 1726 38 1 0 60 1 4 0 0 346 19 486 25 97 40 0 1909 25 1 0 74 2 1 0 0 311 16 417 36 91 59 0 1803 26 1 0 73 3 1 0 0 304 5 419 30 93 36 0 2319 26 1 0 73 4 0 0 9 487 115 353 28 79 19 0 2406 32 1 0 68 5 0 0 14 252 7 293 28 66 28 0 1929 33 1 0 67 6 0 0 340 415 110 383 33 79 56 0 3546 37 1 0 62 7 42 0 0 245 6 312 34 57 66 0 2392 41 1 0 58 March 2, 2026 at 06:54:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2440 102 524 26 95 38 0 2170 29 2 0 69 1 0 0 0 384 8 519 40 107 15 0 3287 47 1 0 52 2 0 0 0 353 6 423 34 91 39 0 2297 41 1 0 58 3 3 0 35 425 10 588 35 107 26 0 2656 43 1 0 56 4 0 0 2 621 115 571 25 125 45 0 2707 26 1 0 73 5 1 0 14 392 26 485 22 83 14 0 2284 18 1 0 81 6 2 0 536 474 115 500 28 99 42 0 3615 24 2 0 75 7 0 0 0 309 2 394 23 72 45 0 2668 26 1 0 73 March 2, 2026 at 06:54:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2458 111 612 21 128 100 0 2243 18 2 0 80 1 1 0 0 398 5 593 31 116 90 0 3259 33 1 0 66 2 1 0 0 372 13 539 20 108 125 0 1516 14 1 0 85 3 1 0 0 380 57 448 35 106 24 0 2451 36 1 0 63 4 1 0 3 556 113 507 26 109 75 0 1816 22 1 0 77 5 0 0 14 356 21 503 13 97 106 0 1754 16 1 0 83 6 0 0 388 461 104 488 28 96 105 0 4402 44 2 0 55 7 1 0 0 328 3 485 23 86 67 0 2140 20 1 0 79 March 2, 2026 at 06:54:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2455 108 499 18 105 32 0 2450 20 2 0 78 1 0 0 0 390 10 502 36 107 20 0 2933 30 1 0 68 2 0 0 0 425 19 533 17 94 20 0 2243 18 1 0 81 3 0 0 0 356 5 427 35 98 41 0 2657 41 1 0 58 4 0 0 2 576 116 495 31 122 17 0 2268 27 1 0 72 5 0 0 14 405 13 546 26 102 27 0 2613 23 1 0 76 6 0 0 655 448 112 464 25 95 20 0 3836 24 2 0 74 7 0 0 0 333 6 410 28 82 46 0 1739 37 1 0 63 March 2, 2026 at 06:54:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2417 114 448 39 102 45 0 2597 41 2 0 58 1 0 0 0 366 5 477 26 113 103 0 2483 35 1 0 64 2 0 0 0 345 11 433 29 98 16 0 2858 32 1 0 67 3 0 0 7 371 7 472 35 107 17 0 2395 31 1 0 68 4 0 0 3 581 107 495 29 103 38 0 1922 20 1 0 79 5 0 0 14 328 15 405 11 86 114 0 2402 17 1 0 82 6 0 0 591 465 111 475 23 79 10 0 3204 29 2 0 69 7 0 0 0 310 11 373 26 71 41 0 2039 36 1 0 63 March 2, 2026 at 06:54:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2397 108 485 32 108 35 0 2147 21 2 0 77 1 0 0 0 328 6 450 31 102 37 0 2149 33 1 0 66 2 0 0 0 359 10 448 13 78 29 0 2034 18 1 0 81 3 39 0 7 293 7 367 31 91 59 0 2842 36 1 0 63 4 0 0 2 520 118 406 32 77 27 0 1835 36 1 0 63 5 0 0 14 276 7 376 27 63 20 0 1864 25 1 0 74 6 0 0 424 420 111 358 26 89 29 0 2324 48 1 0 51 7 0 0 0 285 15 378 39 56 52 0 3286 40 1 0 59 March 2, 2026 at 06:54:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2384 113 494 23 91 37 0 2352 22 2 0 76 1 81 0 0 294 5 360 28 80 20 0 1807 40 1 0 59 2 0 0 0 282 14 327 24 63 29 0 1780 34 1 0 65 3 0 0 0 268 6 339 31 93 44 0 2668 41 1 0 58 4 0 0 9 499 116 405 21 79 37 0 2097 29 1 0 70 5 0 0 14 270 17 336 23 65 22 0 2783 37 1 0 62 6 0 0 382 414 109 350 31 68 14 0 1786 24 1 0 75 7 0 0 0 237 6 312 21 49 50 0 2379 26 1 0 73 March 2, 2026 at 06:54:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2511 106 677 31 131 58 0 4077 22 2 0 76 1 0 0 0 474 9 622 37 141 91 0 2831 35 1 0 63 2 0 0 0 477 15 663 21 120 104 0 2495 23 1 0 76 3 0 0 0 548 89 712 31 139 105 0 3182 27 1 0 72 4 0 0 10 710 115 770 23 141 59 0 2692 26 1 0 72 5 0 0 0 490 17 689 29 133 123 0 3052 36 1 0 63 6 0 0 563 585 111 693 30 153 108 0 2895 22 2 0 77 7 1 0 14 383 5 548 33 117 111 0 3008 26 1 0 73 March 2, 2026 at 06:55:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2408 105 442 28 99 14 0 3044 26 2 0 72 1 0 0 0 382 14 509 23 107 8 0 2122 19 1 0 80 2 0 0 0 352 8 426 32 86 24 0 2122 30 1 0 69 3 0 0 0 371 8 483 27 102 66 0 2338 32 1 0 67 4 0 0 23 529 109 411 26 87 36 0 2775 30 1 0 69 5 0 0 0 328 12 408 19 79 14 0 2264 17 1 0 82 6 0 0 550 460 111 434 31 89 20 0 1893 36 1 0 63 7 0 0 0 322 18 416 19 80 55 0 2467 20 1 0 80 March 2, 2026 at 06:55:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2429 104 520 37 104 20 0 3707 32 2 0 66 1 0 0 0 382 11 474 32 104 27 0 2540 37 1 0 62 2 0 0 0 362 12 454 24 86 16 0 2238 33 1 0 66 3 0 0 3 368 9 492 20 109 24 0 2325 28 1 0 71 4 0 0 2 583 120 467 23 108 14 0 2144 30 1 0 69 5 0 0 7 352 9 433 22 80 23 0 2811 21 1 0 79 6 0 0 648 436 106 395 25 96 20 0 2120 29 1 0 70 7 0 0 14 361 12 440 26 79 23 0 2649 25 1 0 75 March 2, 2026 at 06:55:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2389 106 502 21 101 16 0 1697 25 2 0 74 1 0 0 0 328 11 372 45 75 38 0 3059 46 1 0 53 2 0 0 0 347 10 436 35 82 17 0 2275 41 1 0 58 3 0 0 0 341 9 455 26 98 68 0 2209 31 1 0 68 4 0 0 2 571 123 551 25 116 42 0 2505 20 1 0 79 5 0 0 0 300 7 393 27 81 47 0 2570 26 1 0 73 6 0 0 459 437 118 383 25 84 27 0 2376 32 1 0 67 7 0 0 14 240 9 278 19 56 69 0 2506 30 1 0 70 March 2, 2026 at 06:55:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2394 110 492 23 98 28 0 2195 20 2 0 79 1 71 0 0 323 6 440 39 103 24 0 2154 40 1 0 59 2 0 0 0 288 12 347 27 79 108 0 1998 29 1 0 71 3 0 0 0 295 9 409 24 86 22 0 1543 22 1 0 77 4 2 0 3 486 114 366 25 88 9 0 1691 34 1 0 65 5 0 0 0 264 11 350 27 66 26 0 3267 34 1 0 65 6 0 0 325 403 107 332 37 76 116 0 2525 41 1 0 58 7 1 0 21 270 16 365 33 74 34 0 2597 35 1 0 64 March 2, 2026 at 06:55:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2482 111 603 47 122 62 0 2961 37 2 0 62 1 0 0 14 436 8 646 27 148 78 0 2994 34 1 0 64 2 0 0 0 466 12 692 32 120 77 0 2807 31 1 0 68 3 0 0 0 471 58 679 40 137 105 0 3097 24 1 0 75 4 0 0 3 626 107 603 39 119 65 0 2233 33 1 0 66 5 0 0 0 406 5 637 24 130 95 0 4084 17 1 0 82 6 0 0 521 538 112 604 23 131 90 0 2845 24 1 0 75 7 0 0 0 367 22 496 26 99 107 0 2178 34 1 0 65 March 2, 2026 at 06:55:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2448 131 551 16 100 20 0 2053 8 2 0 91 1 0 0 14 365 7 479 27 96 10 0 3061 36 1 0 63 2 0 0 0 309 4 390 27 74 64 0 2073 36 1 0 63 3 0 0 0 339 7 445 35 93 10 0 2520 47 1 0 53 4 0 0 3 518 108 450 19 98 9 0 2489 28 1 0 71 5 0 0 0 368 15 485 14 82 11 0 2915 10 1 0 89 6 0 0 493 415 104 398 20 72 59 0 2376 25 1 0 74 7 0 0 0 268 2 350 19 66 23 0 1706 14 1 0 86 March 2, 2026 at 06:55:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2439 109 473 28 98 37 0 2858 33 2 0 66 1 0 0 14 426 19 560 26 126 38 0 2841 24 1 0 75 2 0 0 0 396 5 504 30 104 22 0 2422 30 1 0 68 3 0 0 0 372 2 512 36 113 22 0 2331 32 1 0 67 4 0 0 3 607 114 578 26 115 29 0 4031 22 1 0 76 5 0 0 0 352 10 437 22 87 35 0 2766 29 1 0 70 6 0 0 647 448 107 442 24 101 28 0 2230 30 1 0 69 7 0 0 0 315 7 371 19 67 15 0 2196 32 1 0 68 March 2, 2026 at 06:55:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2429 112 517 24 104 37 0 2382 27 2 0 72 1 0 0 0 357 6 464 32 107 37 0 2096 35 1 0 64 2 0 0 7 303 4 368 25 86 51 0 2011 26 1 0 74 3 0 0 0 344 7 453 36 121 20 0 2371 34 1 0 65 4 0 0 16 546 119 443 29 102 31 0 4214 36 1 0 62 5 0 0 0 287 9 360 15 70 35 0 2318 22 1 0 77 6 0 0 494 466 119 444 28 95 39 0 2145 33 1 0 66 7 0 0 0 308 10 388 30 73 23 0 2199 36 1 0 64 March 2, 2026 at 06:55:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2345 104 402 28 72 9 0 1806 34 1 0 64 1 0 0 0 341 8 441 27 95 32 0 1894 26 1 0 73 2 0 0 0 288 8 354 27 80 19 0 1870 39 1 0 60 3 0 0 0 350 12 479 30 87 88 0 2558 29 1 0 70 4 0 0 2 509 125 364 25 88 10 0 1830 35 1 0 64 5 0 0 14 286 14 376 33 84 36 0 4070 42 1 0 57 6 0 0 410 423 106 392 35 78 25 0 1942 29 1 0 70 7 0 0 7 253 3 348 14 67 75 0 2409 22 1 0 78 March 2, 2026 at 06:55:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 50 0 0 2496 104 610 28 131 67 0 2878 29 2 0 69 1 0 0 0 474 9 655 31 159 64 0 2517 33 1 0 66 2 2 0 0 445 7 630 33 122 93 0 2445 28 1 0 71 3 0 0 0 470 60 592 50 128 103 0 3368 57 1 0 42 4 84 0 2 598 108 560 31 150 85 0 2096 26 1 0 72 5 0 0 14 431 15 647 30 118 82 0 4101 25 1 0 73 6 2 0 579 578 117 666 30 145 72 0 3208 21 2 0 78 7 0 0 7 391 11 547 30 107 67 0 2586 23 1 0 76 March 2, 2026 at 06:55:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2453 107 549 16 93 13 0 2421 10 2 0 89 1 0 0 0 358 10 465 28 98 47 0 2824 45 1 0 54 2 0 0 0 337 4 413 25 77 24 0 1917 26 1 0 73 3 0 0 0 342 5 425 35 90 41 0 2502 44 1 0 55 4 0 0 7 541 113 465 15 104 30 0 2446 23 1 0 76 5 0 0 0 357 22 486 19 84 31 0 3337 12 1 0 87 6 0 0 553 449 110 404 18 78 28 0 2462 30 1 0 69 7 0 0 0 317 15 401 16 71 41 0 1831 16 1 0 84 March 2, 2026 at 06:55:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2453 111 504 25 109 21 0 2371 33 2 0 66 1 0 0 14 451 13 601 31 133 17 0 2719 25 1 0 74 2 0 0 0 402 12 500 25 97 42 0 2245 25 1 0 74 3 0 0 0 422 10 549 21 119 96 0 2421 24 1 0 75 4 0 0 3 593 120 493 31 115 21 0 2329 29 1 0 70 5 0 0 7 328 8 392 25 86 27 0 2526 32 1 0 67 6 0 0 675 460 108 496 25 110 52 0 4246 28 2 0 70 7 0 0 0 334 3 423 29 93 97 0 2900 33 1 0 66 March 2, 2026 at 06:55:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2397 109 420 30 100 50 0 2171 35 2 0 64 1 0 0 0 348 7 476 28 114 27 0 2706 34 1 0 65 2 0 0 0 355 4 457 22 86 16 0 2035 29 1 0 70 3 0 0 14 367 16 510 21 108 51 0 2696 26 1 0 73 4 0 0 2 512 107 363 41 90 36 0 2276 51 1 0 48 5 0 0 7 283 8 374 23 78 44 0 2357 25 1 0 74 6 0 0 521 482 115 432 26 88 10 0 2095 29 1 0 70 7 0 0 0 325 17 421 21 72 40 0 3396 19 1 0 80 March 2, 2026 at 06:55:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2395 105 461 32 95 10 0 1882 22 2 0 76 1 0 0 0 340 16 435 28 101 12 0 1995 31 1 0 68 2 0 0 0 316 6 387 22 72 35 0 1953 27 1 0 72 3 0 0 14 339 14 486 28 92 27 0 2700 35 1 0 64 4 0 0 3 487 110 353 45 88 15 0 1914 50 1 0 49 5 0 0 0 288 17 369 31 73 22 0 2471 38 1 0 61 6 0 0 402 459 113 453 38 97 40 0 2746 30 1 0 69 7 0 0 0 296 8 390 21 73 27 0 3622 25 1 0 74 March 2, 2026 at 06:55:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2479 108 595 37 121 58 0 2302 28 2 0 70 1 0 0 7 438 11 586 39 136 98 0 3064 34 1 0 65 2 0 0 0 334 3 417 29 95 40 0 2249 38 1 0 61 3 0 0 14 502 77 694 33 133 129 0 3289 39 1 0 60 4 0 0 1 676 122 734 29 139 116 0 3623 21 1 0 78 5 0 0 0 374 6 545 32 109 148 0 2506 34 1 0 65 6 0 0 522 509 104 561 41 115 71 0 2435 37 1 0 61 7 0 0 0 402 6 599 19 109 133 0 2596 16 1 0 83 March 2, 2026 at 06:55:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2427 113 533 24 94 13 0 2423 24 2 0 74 1 0 0 7 384 9 514 26 115 39 0 3029 26 1 0 73 2 0 0 0 310 4 412 16 80 9 0 1667 16 1 0 83 3 0 0 14 321 7 428 29 96 113 0 3051 42 1 0 57 4 0 0 1 531 112 459 21 88 26 0 3630 32 1 0 67 5 1 0 0 322 12 452 16 81 56 0 1950 28 1 0 72 6 0 0 453 486 110 517 30 107 10 0 2430 26 1 0 73 7 0 0 0 333 16 460 11 86 128 0 2279 13 1 0 86 March 2, 2026 at 06:55:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2474 109 554 26 120 15 0 2237 18 2 0 80 1 0 0 7 440 11 533 31 129 25 0 3145 30 1 0 69 2 0 0 0 389 5 475 39 103 45 0 2802 37 1 0 62 3 0 0 14 394 13 498 25 119 46 0 3195 26 1 0 73 4 0 0 2 606 117 518 21 122 21 0 2519 31 1 0 68 5 0 0 0 370 8 470 32 93 15 0 3702 36 1 0 62 6 0 0 704 472 111 461 28 112 37 0 2500 38 1 0 61 7 0 0 0 360 3 488 27 99 48 0 2620 22 1 0 77 March 2, 2026 at 06:55:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2434 110 491 30 108 21 0 1976 30 2 0 69 1 0 0 0 372 11 470 33 109 18 0 2502 38 1 0 61 2 1 0 0 370 8 411 23 92 132 0 2224 28 1 0 71 3 27 0 0 374 12 498 35 115 26 0 2494 39 1 0 60 4 0 0 24 547 115 472 30 101 25 0 2881 30 1 0 69 5 0 0 0 315 7 423 30 82 21 0 3666 30 1 0 69 6 0 0 549 487 124 457 38 108 125 0 2562 38 1 0 60 7 0 0 0 287 6 362 22 78 22 0 2329 21 1 0 78 March 2, 2026 at 06:55:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2353 108 434 31 100 17 0 3454 27 2 0 72 1 3 0 0 324 11 453 29 87 24 0 2097 30 1 0 69 2 1 0 0 328 8 419 25 82 57 0 1873 23 1 0 76 3 0 0 0 274 4 359 32 74 38 0 2486 51 1 0 49 4 1 0 10 494 111 363 31 89 17 0 2447 33 1 0 66 5 0 0 14 274 15 348 34 77 19 0 2423 29 1 0 70 6 1 0 381 419 116 371 27 84 39 0 1963 39 1 0 60 7 74 0 0 295 13 418 29 83 43 0 2164 28 1 0 71 March 2, 2026 at 06:55:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 49 0 3 2545 113 714 35 136 106 0 4271 32 2 0 65 1 4 0 0 479 9 651 32 146 83 0 2410 22 1 0 77 2 0 0 0 432 10 556 41 128 79 0 2595 36 1 0 63 3 3 0 0 478 51 613 38 132 83 0 2908 37 1 0 61 4 0 0 10 637 117 630 29 136 108 0 3109 29 1 0 69 5 0 0 0 404 10 540 37 101 74 0 2627 37 1 0 62 6 1 0 605 495 109 543 33 127 65 0 2883 30 1 0 69 7 1 0 0 421 17 615 17 120 111 0 2163 15 1 0 84 March 2, 2026 at 06:55:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2448 106 529 23 91 40 0 2231 26 2 0 73 1 0 0 0 418 12 588 24 108 40 0 4065 26 1 0 73 2 0 0 0 368 8 479 24 96 23 0 2164 27 1 0 72 3 0 0 0 363 11 458 30 94 54 0 2814 46 1 0 53 4 1 0 2 572 111 524 16 104 47 0 2300 20 1 0 79 5 0 0 7 364 24 464 10 84 53 0 2531 16 1 0 83 6 0 0 535 434 109 396 29 78 12 0 2209 31 1 0 68 7 0 0 14 272 7 348 12 67 51 0 2508 16 1 0 84 March 2, 2026 at 06:55:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2483 112 558 34 118 19 0 2415 37 2 0 61 1 0 0 0 422 11 559 32 133 35 0 4544 33 2 0 66 2 0 0 0 391 7 476 17 109 21 0 2380 18 1 0 81 3 0 0 14 378 7 478 40 128 19 0 3262 41 1 0 58 4 0 0 2 584 112 496 22 129 17 0 2744 23 1 0 76 5 0 0 7 398 8 507 26 96 28 0 2566 17 1 0 82 6 0 0 705 436 105 392 41 96 18 0 2491 52 1 0 47 7 0 0 0 418 17 533 20 84 15 0 1922 17 1 0 82 March 2, 2026 at 06:55:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2378 108 411 35 91 35 0 2588 41 2 0 58 1 0 0 0 353 14 411 29 88 70 0 2246 35 1 0 64 2 0 0 5 348 12 479 28 98 25 0 3830 22 1 0 76 3 0 0 14 320 9 415 34 102 61 0 3119 45 1 0 54 4 0 0 3 517 108 429 28 86 31 0 2122 27 1 0 72 5 0 0 2 295 10 378 30 74 76 0 1912 36 1 0 64 6 0 0 465 508 115 520 26 112 17 0 2350 22 1 0 77 7 0 0 0 339 13 441 27 78 47 0 2242 28 1 0 72 March 2, 2026 at 06:55:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2378 107 447 31 91 12 0 2024 33 1 0 66 1 0 0 14 283 7 337 33 89 34 0 2549 48 1 0 51 2 0 0 0 335 12 453 20 79 16 0 3709 19 1 0 80 3 0 0 0 306 5 400 26 89 14 0 1967 35 1 0 65 4 0 0 10 505 115 402 26 84 12 0 2291 28 1 0 71 5 0 0 0 299 21 385 24 80 37 0 1777 21 1 0 78 6 0 0 423 429 113 402 30 92 13 0 2049 41 1 0 58 7 0 0 0 249 11 313 25 65 11 0 2570 32 1 0 67 March 2, 2026 at 06:55:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2492 109 559 31 128 83 0 3144 38 2 0 60 1 0 0 21 506 7 732 42 155 101 0 3631 26 1 0 72 2 0 0 0 430 6 567 35 105 70 0 4412 40 2 0 59 3 0 0 0 487 62 656 30 155 91 0 2817 29 1 0 70 4 0 0 1 658 117 668 31 153 87 0 2750 29 1 0 70 5 0 0 0 392 19 520 22 108 102 0 2564 24 1 0 75 6 0 0 566 571 107 709 26 131 73 0 2504 19 1 0 79 7 0 0 0 372 6 543 22 110 75 0 2139 23 1 0 76 March 2, 2026 at 06:55:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2457 111 539 27 101 39 0 2168 26 2 0 73 1 0 0 14 425 26 585 19 112 32 0 3406 19 1 0 80 2 0 0 0 384 7 500 25 91 27 0 3388 20 1 0 78 3 0 0 0 397 4 547 29 106 16 0 2105 29 1 0 70 4 0 0 2 552 104 409 35 92 36 0 2388 42 1 0 57 5 0 0 0 390 13 514 22 87 46 0 2239 21 1 0 78 6 0 0 662 448 109 410 29 84 21 0 3002 46 1 0 53 7 0 0 7 319 5 397 13 69 19 0 2588 13 1 0 86 March 2, 2026 at 06:55:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2440 104 499 27 117 59 0 2326 30 2 0 68 1 0 0 14 435 20 570 22 128 147 0 5158 34 2 0 64 2 0 0 0 391 12 450 30 98 25 0 2252 28 1 0 71 3 0 0 0 424 8 555 41 122 28 0 2703 30 1 0 69 4 0 0 2 601 111 541 32 111 46 0 2693 30 1 0 69 5 0 0 0 348 3 459 16 93 125 0 2562 25 1 0 74 6 0 0 675 473 112 470 33 115 39 0 2653 36 1 0 63 7 0 0 7 357 11 435 25 87 15 0 2367 29 1 0 70 March 2, 2026 at 06:55:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2387 110 452 32 108 26 0 2337 28 2 0 70 1 0 0 0 340 16 434 35 102 46 0 4128 48 1 0 51 2 0 0 0 315 8 393 29 97 36 0 2296 31 1 0 68 3 0 0 14 351 13 470 30 111 44 0 2491 32 1 0 67 4 0 0 2 544 116 456 24 106 30 0 2352 27 1 0 72 5 0 0 0 305 10 401 26 83 35 0 1897 24 1 0 76 6 0 0 452 450 109 408 44 85 22 0 2086 40 1 0 59 7 0 0 0 282 11 343 31 72 34 0 2284 40 1 0 59 March 2, 2026 at 06:55:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2383 106 433 26 82 15 0 1822 27 2 0 71 1 0 0 0 302 15 338 29 81 98 0 2266 41 1 0 58 2 0 0 0 349 14 443 26 78 20 0 1826 27 1 0 72 3 0 0 0 303 6 414 36 80 20 0 4012 45 1 0 54 4 0 0 2 499 116 362 31 73 12 0 2035 37 1 0 63 5 0 0 0 262 12 312 19 70 68 0 2138 22 1 0 77 6 0 0 480 421 111 383 31 84 18 0 2416 33 1 0 65 7 0 0 0 264 6 326 17 73 22 0 1800 19 1 0 81 March 2, 2026 at 06:55:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2576 105 828 25 153 77 0 3909 26 2 0 72 1 24 0 7 533 17 757 29 155 134 0 3355 25 2 0 74 2 17 0 0 428 16 592 36 123 63 0 2860 30 1 0 69 3 0 0 0 512 77 685 34 146 82 0 2807 35 1 0 64 4 0 0 3 619 110 604 25 139 100 0 3117 28 1 0 70 5 1 0 0 395 5 557 26 99 125 0 2878 28 1 0 71 6 0 0 563 571 113 695 29 146 74 0 2648 25 1 0 74 7 0 0 14 353 3 484 27 98 61 0 2611 23 1 0 76 March 2, 2026 at 06:55:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2464 106 533 24 111 20 0 3920 29 2 0 69 1 0 0 0 447 9 566 28 123 52 0 2907 32 1 0 67 2 0 0 0 410 12 529 26 90 45 0 2385 19 1 0 80 3 0 0 7 443 15 590 21 136 36 0 2941 21 1 0 77 4 0 0 7 568 110 459 29 100 14 0 2370 30 1 0 69 5 0 0 0 393 20 478 20 99 63 0 2858 32 1 0 67 6 0 0 736 454 106 470 29 107 46 0 2979 33 2 0 66 7 0 0 0 346 11 418 16 87 32 0 2890 24 1 0 75 March 2, 2026 at 06:55:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2418 106 507 34 114 18 0 3184 29 2 0 69 1 0 0 0 370 10 467 33 125 35 0 2555 36 1 0 63 2 0 0 0 365 10 440 24 93 40 0 2475 32 1 0 67 3 0 0 0 359 10 480 25 123 27 0 2573 35 1 0 64 4 0 0 3 550 111 464 23 115 30 0 2798 28 1 0 71 5 0 0 6 287 6 326 26 77 37 0 2564 43 1 0 56 6 0 0 564 456 116 430 28 111 59 0 2847 37 2 0 62 7 0 0 14 339 7 474 22 86 39 0 2152 17 1 0 82 March 2, 2026 at 06:55:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2370 107 415 28 87 30 0 1835 36 1 0 62 1 0 0 14 311 5 400 37 99 71 0 2557 40 1 0 59 2 0 0 0 361 24 485 21 85 36 0 2214 17 1 0 82 3 0 0 0 315 15 456 29 99 35 0 3381 37 1 0 62 4 0 0 3 481 115 341 18 82 40 0 2383 31 1 0 68 5 0 0 7 263 13 314 24 62 65 0 2507 33 1 0 67 6 0 0 423 431 109 380 32 90 56 0 2332 34 1 0 65 7 0 0 0 258 7 336 24 68 16 0 2174 29 1 0 70 March 2, 2026 at 06:55:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2452 102 555 25 94 25 0 2197 23 2 0 75 1 0 0 14 332 5 414 32 99 61 0 3092 42 1 0 57 2 0 0 0 351 10 448 20 85 26 0 2608 21 1 0 78 3 0 0 0 360 13 423 37 88 35 0 2412 42 1 0 57 4 0 0 3 557 119 465 28 111 20 0 3828 33 1 0 66 5 0 0 0 350 12 465 27 75 35 0 2347 22 1 0 77 6 0 0 585 492 122 495 29 98 30 0 2923 30 2 0 69 7 0 0 0 320 8 393 32 75 31 0 1711 33 1 0 66 March 2, 2026 at 06:55:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2533 105 688 25 134 102 0 2586 14 2 0 84 1 0 0 15 421 3 604 33 125 130 0 3120 38 1 0 60 2 0 0 0 437 7 619 21 112 80 0 3139 22 1 0 77 3 35 0 0 454 52 575 29 113 71 0 2599 32 1 0 66 4 1 0 9 579 110 545 26 123 68 0 2631 26 1 0 73 5 1 0 0 382 11 539 18 91 125 0 1999 34 1 0 65 6 0 0 578 563 119 659 33 128 71 0 3957 22 2 0 76 7 0 0 0 391 17 547 19 107 39 0 2601 19 1 0 80 March 2, 2026 at 06:55:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2471 114 585 25 126 22 0 2419 18 2 0 80 1 3 0 14 425 13 538 17 125 59 0 3160 28 1 0 71 2 3 0 0 402 9 540 26 107 52 0 4288 26 1 0 72 3 5 0 7 367 5 484 32 128 45 0 3296 37 1 0 62 4 1 0 2 623 117 556 23 115 15 0 2534 32 1 0 67 5 0 0 0 358 6 430 29 95 69 0 2174 36 1 0 63 6 0 0 746 454 107 446 37 115 95 0 2970 41 2 0 57 7 4 0 0 364 8 477 16 90 49 0 2456 22 1 0 77 March 2, 2026 at 06:55:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 60 0 0 2389 107 434 32 106 38 0 2116 33 2 0 65 1 3 0 0 340 9 461 32 111 63 0 2625 43 1 0 56 2 62 0 14 332 12 448 29 101 49 0 2562 29 1 0 70 3 6 0 7 316 11 428 33 96 23 0 3897 40 1 0 58 4 3 0 2 495 110 400 29 88 22 0 2069 30 1 0 70 5 2 0 0 326 8 430 22 93 83 0 2048 17 1 0 83 6 0 0 438 460 112 427 26 96 43 0 2364 31 1 0 68 7 0 0 0 268 13 332 28 76 17 0 2288 34 1 0 65 March 2, 2026 at 06:55:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2350 107 370 29 77 15 0 2199 32 1 0 67 1 0 0 16 334 7 422 27 87 8 0 2026 34 1 0 65 2 7 0 0 298 10 353 15 69 29 0 1928 28 1 0 71 3 9 0 7 331 21 439 39 89 44 0 3877 34 1 0 65 4 44 0 2 486 112 339 27 71 10 0 1581 33 1 0 66 5 4 0 0 291 12 338 26 69 6 0 1900 31 1 0 68 6 0 0 466 397 111 321 29 73 42 0 2268 37 1 0 62 7 75 0 0 266 11 313 21 71 56 0 2018 25 1 0 75 March 2, 2026 at 06:55:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2504 109 650 27 123 96 0 2632 22 2 0 76 1 1 0 0 422 5 585 26 122 48 0 2834 33 1 0 66 2 2 0 14 375 5 473 18 97 47 0 2792 23 1 0 76 3 0 0 7 421 9 605 25 129 33 0 3511 28 1 0 71 4 1 0 2 621 107 613 37 119 112 0 4222 38 1 0 60 5 0 0 0 349 12 474 23 91 77 0 2485 30 1 0 69 6 0 0 563 542 116 612 35 112 47 0 2841 29 1 0 69 7 0 0 0 391 27 527 11 96 27 0 2592 16 1 0 83 March 2, 2026 at 06:55:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2526 106 640 34 150 111 0 2281 33 2 0 65 1 0 0 0 507 7 683 42 175 78 0 2700 32 1 0 67 2 0 0 0 483 11 685 28 142 108 0 2171 18 1 0 81 3 0 0 14 551 81 664 37 155 120 0 3489 32 1 0 67 4 0 0 2 649 107 641 35 150 78 0 4118 30 2 0 69 5 0 0 0 413 9 533 23 124 96 0 2352 21 1 0 78 6 0 0 725 533 114 597 27 149 87 0 3035 39 2 0 59 7 0 0 0 382 13 493 24 115 87 0 2373 20 1 0 80 March 2, 2026 at 06:55:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2456 109 512 32 123 13 0 2518 32 2 0 66 1 0 0 0 403 9 514 35 128 43 0 2880 34 1 0 65 2 0 0 0 431 14 578 33 125 25 0 2320 30 1 0 69 3 0 0 0 366 15 456 26 122 99 0 2872 42 1 0 57 4 0 0 17 589 116 499 28 115 21 0 2677 27 1 0 72 5 0 0 0 338 10 446 22 96 66 0 4073 26 1 0 73 6 0 0 585 458 107 440 32 101 38 0 2585 38 1 0 61 7 0 0 0 326 11 402 28 83 105 0 2855 29 1 0 70 March 2, 2026 at 06:55:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2378 107 416 32 88 5 0 1753 32 2 0 66 1 0 0 0 329 16 418 32 103 24 0 2032 39 1 0 60 2 0 0 0 321 8 385 35 77 33 0 2038 42 1 0 57 3 0 0 0 300 6 398 27 93 30 0 2458 33 1 0 66 4 0 0 16 515 116 434 25 99 15 0 3907 25 1 0 74 5 0 0 0 280 8 351 20 72 46 0 2558 27 1 0 72 6 0 0 473 430 109 356 29 83 36 0 2210 29 1 0 70 7 0 0 0 277 15 326 17 66 35 0 1964 27 1 0 72 March 2, 2026 at 06:55:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2434 105 521 24 107 26 0 2205 29 2 0 69 1 0 0 0 409 5 559 22 125 52 0 2496 30 1 0 68 2 2 0 0 391 15 481 38 95 57 0 2894 38 1 0 61 3 2 0 7 409 15 560 25 113 31 0 2733 25 1 0 74 4 0 0 2 579 120 451 25 99 30 0 2399 33 1 0 66 5 44 0 0 363 12 492 26 91 50 0 4595 27 1 0 72 6 2 0 578 496 107 553 21 105 47 0 2962 20 1 0 78 7 0 0 0 300 3 387 34 91 18 0 2093 34 1 0 66 March 2, 2026 at 06:55:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2520 107 653 23 118 19 0 2272 20 2 0 78 1 0 0 1 433 8 523 33 116 16 0 2812 41 1 0 58 2 0 0 0 425 14 554 29 117 81 0 2844 22 1 0 77 3 0 0 0 418 6 546 39 117 35 0 2917 42 1 0 56 4 0 0 10 600 116 520 20 116 28 0 2778 23 1 0 76 5 0 0 0 414 24 561 30 94 30 0 4172 21 1 0 78 6 0 0 716 501 108 558 25 103 57 0 3317 28 2 0 71 7 0 0 0 341 7 437 14 87 37 0 2239 19 1 0 80 March 2, 2026 at 06:55:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2476 102 534 26 113 80 0 2351 39 2 0 59 1 0 0 0 443 10 555 29 146 105 0 2742 41 1 0 58 2 0 0 0 477 11 613 28 118 92 0 2555 27 1 0 72 3 0 0 0 482 65 577 28 132 51 0 2950 29 1 0 70 4 0 0 10 655 117 610 34 132 123 0 2845 41 1 0 57 5 0 0 0 428 16 607 24 116 102 0 4402 21 1 0 78 6 0 0 676 517 109 561 28 133 81 0 2616 31 2 0 67 7 0 0 14 388 7 542 26 120 47 0 2871 26 1 0 73 March 2, 2026 at 06:55:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2372 111 428 26 95 39 0 2608 31 2 0 68 1 0 0 0 359 12 431 36 94 40 0 2205 32 1 0 67 2 0 0 0 294 7 353 25 80 60 0 1963 35 1 0 64 3 0 0 0 310 3 416 25 93 22 0 2133 30 1 0 69 4 0 0 8 493 110 381 30 86 38 0 2079 28 1 0 71 5 0 0 0 277 10 347 32 68 46 0 2618 39 1 0 60 6 0 0 467 459 115 466 40 96 63 0 3925 34 1 0 65 7 0 0 0 286 9 361 23 70 32 0 2154 28 1 0 72 March 2, 2026 at 06:55:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2369 108 392 20 75 9 0 2000 20 1 0 79 1 0 0 2 302 9 383 23 86 13 0 1834 29 1 0 70 2 0 0 0 297 4 363 22 80 26 0 2031 25 1 0 74 3 0 0 0 312 6 398 24 81 50 0 1763 28 1 0 72 4 0 0 10 473 114 299 23 72 11 0 2096 42 1 0 57 5 0 0 0 284 16 351 29 75 14 0 2250 21 1 0 78 6 0 0 507 411 109 328 38 70 18 0 1943 43 1 0 56 7 0 0 0 239 9 290 28 60 60 0 3557 38 1 0 61 March 2, 2026 at 06:55:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2579 108 743 34 145 16 0 2550 30 2 0 68 1 0 0 14 523 4 694 39 164 72 0 3305 29 2 0 70 2 0 0 0 504 7 694 23 117 17 0 2697 23 1 0 76 3 0 0 0 520 11 720 35 157 74 0 3857 29 2 0 70 4 0 0 9 709 118 711 29 152 29 0 3171 26 1 0 73 5 0 0 0 448 16 582 33 112 67 0 3567 39 1 0 60 6 0 0 746 570 116 694 18 136 27 0 3298 20 2 0 78 7 0 0 0 403 8 571 20 101 64 0 4379 22 1 0 77 March 2, 2026 at 06:55:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2476 108 524 24 110 41 0 2521 27 2 0 72 1 0 0 0 458 9 579 48 132 36 0 2787 45 1 0 54 2 0 0 0 478 11 588 26 111 35 0 2354 21 1 0 78 3 0 0 14 438 9 597 20 133 32 0 2950 25 1 0 74 4 0 0 10 635 117 564 35 134 44 0 3187 32 1 0 67 5 0 0 0 387 16 473 23 113 37 0 2578 23 1 0 76 6 0 0 731 478 113 467 36 121 64 0 2882 39 1 0 59 7 0 0 0 357 8 458 23 95 53 0 4659 33 1 0 66 March 2, 2026 at 06:55:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2420 107 505 27 133 87 0 2161 28 2 0 70 1 0 0 0 378 9 566 31 124 99 0 1975 31 1 0 68 2 0 0 0 399 3 580 38 116 109 0 2360 31 1 0 68 3 0 0 7 458 75 537 42 138 91 0 2836 29 1 0 70 4 0 0 2 553 113 481 46 124 43 0 3636 43 1 0 56 5 0 0 0 319 10 418 30 113 71 0 2293 39 1 0 61 6 0 0 466 507 112 565 33 140 89 0 2467 36 1 0 63 7 0 0 0 342 17 473 25 110 122 0 2784 24 1 0 75 March 2, 2026 at 06:55:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2384 107 408 19 70 7 0 1440 24 1 0 75 1 4 0 2 318 8 373 23 89 21 0 1859 33 1 0 66 2 70 0 0 277 5 327 21 76 39 0 1486 23 1 0 77 3 5 0 0 294 5 335 27 76 42 0 2178 42 1 0 57 4 0 0 17 469 111 320 22 81 21 0 2749 33 1 0 66 5 4 0 0 264 4 303 31 65 6 0 1922 44 1 0 55 6 0 0 500 449 124 430 31 79 36 0 3583 29 1 0 70 7 1 0 0 290 28 309 24 55 51 0 2429 18 1 0 81 March 2, 2026 at 06:55:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2487 105 582 36 139 34 0 2530 30 2 0 68 1 0 0 6 485 11 711 35 141 37 0 4152 35 1 0 64 2 1 0 0 412 3 563 15 113 33 0 2684 20 1 0 79 3 0 0 0 483 13 689 32 131 33 0 2953 36 1 0 63 4 0 0 15 631 111 582 27 125 38 0 3263 32 1 0 67 5 0 0 0 380 11 511 19 104 46 0 2382 13 1 0 86 6 1 0 664 541 111 638 31 120 49 0 4547 35 2 0 63 7 0 0 1 441 11 604 19 111 29 0 2621 15 1 0 84 March 2, 2026 at 06:55:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2471 111 493 32 124 92 0 3142 36 2 0 62 1 3 0 7 504 12 710 26 154 27 0 3977 28 2 0 70 2 1 0 0 444 11 584 26 126 37 0 2777 21 1 0 78 3 0 0 0 441 11 575 38 130 75 0 2954 38 1 0 61 4 0 0 2 636 113 575 35 126 114 0 2766 33 1 0 66 5 0 0 14 407 12 554 21 113 14 0 2814 21 1 0 78 6 0 0 746 533 117 570 39 128 29 0 3810 36 2 0 62 7 1 0 0 387 8 476 29 96 75 0 2758 26 1 0 73 March 2, 2026 at 06:55:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2434 114 506 20 101 29 0 2666 15 2 0 84 1 1 0 7 350 12 470 30 108 18 0 4445 34 1 0 64 2 0 0 0 324 17 415 29 93 23 0 2371 33 1 0 66 3 0 0 0 333 6 445 28 94 22 0 2222 32 1 0 67 4 1 0 17 523 109 400 40 98 32 0 2606 56 1 0 43 5 0 0 0 353 9 458 26 91 26 0 2167 29 1 0 70 6 0 0 506 471 109 453 33 114 19 0 2548 30 1 0 69 7 0 0 0 302 8 359 28 74 38 0 2226 34 1 0 66 March 2, 2026 at 06:55:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2420 113 521 32 113 104 0 1807 18 2 0 80 1 0 0 7 397 16 521 46 113 36 0 2832 25 1 0 73 2 0 0 0 324 7 397 32 88 80 0 2307 31 1 0 68 3 0 0 0 391 64 461 23 103 95 0 2154 34 1 0 65 4 0 0 17 577 112 506 30 112 97 0 2214 36 1 0 63 5 0 0 0 306 7 403 26 98 86 0 1798 37 1 0 63 6 0 0 536 467 115 454 33 105 78 0 1977 34 1 0 65 7 0 0 0 292 5 395 25 82 48 0 3298 34 1 0 65 March 2, 2026 at 06:55:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2513 104 623 32 122 33 0 2465 30 2 0 68 1 0 0 0 479 16 642 37 134 38 0 3169 26 2 0 72 2 0 0 0 434 9 560 26 117 28 0 3013 24 1 0 75 3 0 0 7 441 6 592 37 117 42 0 3562 37 1 0 62 4 0 0 16 624 112 589 17 127 52 0 3407 29 1 0 70 5 0 0 0 375 9 513 16 105 36 0 2720 20 1 0 79 6 0 0 633 513 110 596 26 128 40 0 2898 28 1 0 71 7 0 0 0 375 11 551 19 94 25 0 3581 21 1 0 78 March 2, 2026 at 06:55:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2501 106 630 37 135 40 0 4201 29 2 0 69 1 0 0 0 445 5 601 33 152 74 0 3135 33 1 0 65 2 0 0 0 432 13 538 20 135 21 0 3084 27 1 0 72 3 0 0 7 456 12 646 31 135 34 0 3210 21 1 0 78 4 0 0 16 635 118 546 31 119 41 0 3223 31 1 0 68 5 0 0 0 366 10 474 22 104 73 0 2823 27 1 0 72 6 0 0 719 486 105 521 32 122 19 0 2873 42 1 0 57 7 0 0 0 406 14 553 24 109 55 0 2762 31 1 0 68 March 2, 2026 at 06:55:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 60 0 0 2418 108 427 40 98 12 0 2136 43 2 0 56 1 0 0 0 364 9 496 31 124 71 0 2919 29 1 0 70 2 0 0 0 366 14 460 24 94 47 0 2350 32 1 0 67 3 0 0 7 354 18 486 25 106 24 0 4403 36 1 0 63 4 2 0 16 542 112 425 31 108 8 0 2618 32 1 0 67 5 0 0 0 366 9 484 19 93 77 0 2807 27 1 0 72 6 37 0 563 470 109 483 25 112 32 0 2673 28 1 0 71 7 0 0 0 326 4 411 34 89 32 0 2317 34 1 0 65 March 2, 2026 at 06:55:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2389 104 456 21 92 40 0 1811 18 2 0 80 1 2 0 0 313 6 366 33 95 51 0 2129 38 1 0 61 2 2 0 0 300 9 352 24 75 49 0 1889 26 1 0 73 3 4 0 0 299 13 347 32 81 46 0 2236 35 1 0 64 4 0 0 24 505 109 401 25 87 36 0 2656 26 1 0 73 5 0 0 0 263 18 287 21 67 56 0 2205 27 1 0 73 6 0 0 522 439 115 445 32 93 59 0 3334 39 1 0 60 7 2 0 0 305 14 375 23 58 33 0 1869 34 1 0 66 March 2, 2026 at 06:55:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2608 108 761 24 142 100 0 2638 18 2 0 80 1 0 0 0 563 7 832 43 181 112 0 3462 40 2 0 59 2 0 0 0 515 8 731 29 143 80 0 3019 29 1 0 69 3 1 0 0 549 72 711 48 159 105 0 3880 39 1 0 60 4 0 0 16 748 121 791 27 160 78 0 3195 26 1 0 73 5 2 0 7 452 12 619 23 143 135 0 3072 21 1 0 77 6 0 0 717 551 109 664 39 136 122 0 4309 28 2 0 70 7 0 0 0 405 5 550 22 113 112 0 2535 22 1 0 77 March 2, 2026 at 06:56:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2536 111 600 34 139 69 0 3140 31 2 0 67 1 0 0 0 487 9 668 39 145 34 0 2688 31 1 0 67 2 0 0 0 420 6 526 23 126 20 0 3018 31 1 0 68 3 1 0 0 471 18 596 25 145 112 0 3327 31 1 0 68 4 0 0 17 682 112 640 28 151 70 0 3685 34 1 0 64 5 1 0 7 423 14 520 30 116 35 0 3185 30 1 0 69 6 0 0 773 522 111 581 34 131 28 0 3025 36 2 0 62 7 0 0 0 416 13 556 38 118 115 0 4394 31 1 0 68 March 2, 2026 at 06:56:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2408 109 634 27 101 45 0 2683 28 2 0 71 1 0 0 0 392 16 541 26 126 76 0 4307 35 1 0 64 2 0 0 0 296 3 343 36 87 32 0 2186 37 1 0 62 3 0 0 0 338 6 440 34 105 56 0 2713 35 1 0 64 4 0 0 24 590 126 473 30 109 56 0 3116 26 1 0 73 5 0 0 0 329 11 423 17 82 50 0 1738 21 1 0 79 6 0 0 550 433 106 409 35 97 36 0 2738 40 1 0 59 7 0 0 0 264 5 323 23 75 55 0 2151 33 1 0 66 March 2, 2026 at 06:56:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2346 104 337 26 80 22 0 1962 33 1 0 65 1 0 0 0 331 13 423 21 84 15 0 2242 24 1 0 75 2 0 0 0 293 5 385 24 73 9 0 3218 31 1 0 68 3 0 0 6 278 5 335 30 86 12 0 2160 44 1 0 55 4 0 0 23 504 120 374 21 88 17 0 2593 35 1 0 65 5 0 0 0 290 15 359 24 64 21 0 2122 30 1 0 69 6 0 0 466 452 115 433 27 86 8 0 1882 24 1 0 75 7 0 0 0 274 9 340 29 63 28 0 2287 28 1 0 71 March 2, 2026 at 06:56:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2575 109 697 27 162 66 0 3101 19 2 0 79 1 0 0 7 534 12 712 31 157 107 0 3846 26 2 0 72 2 0 0 0 492 10 699 31 130 25 0 4521 22 2 0 76 3 0 0 0 482 7 611 37 134 87 0 3758 39 1 0 60 4 0 0 16 721 120 727 25 146 53 0 3488 27 1 0 72 5 0 0 0 484 17 656 27 126 77 0 3426 20 1 0 78 6 0 0 816 601 109 732 24 153 17 0 3241 30 2 0 68 7 0 0 0 430 7 564 23 102 69 0 2500 30 1 0 69 March 2, 2026 at 06:56:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2553 113 653 35 162 68 0 2522 26 2 0 72 1 0 0 7 513 12 687 42 177 137 0 3392 38 2 0 61 2 0 0 0 496 10 644 45 140 89 0 3311 39 1 0 60 3 0 0 0 566 72 727 37 163 101 0 3128 32 1 0 66 4 0 0 2 705 110 730 46 166 96 0 4263 30 2 0 68 5 0 0 14 454 6 623 24 128 123 0 3043 30 1 0 69 6 0 0 774 550 116 631 42 147 61 0 3151 34 2 0 65 7 0 0 0 410 6 558 26 126 111 0 2882 33 1 0 66 March 2, 2026 at 06:56:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2413 111 432 27 97 36 0 2056 30 2 0 69 1 1 0 10 379 6 473 23 117 12 0 2866 30 1 0 69 2 2 0 0 335 10 394 27 89 26 0 2364 33 1 0 66 3 0 0 0 343 8 458 33 104 60 0 3486 36 1 0 63 4 60 0 2 556 114 440 26 102 36 0 2599 30 1 0 69 5 40 0 0 301 7 342 30 74 14 0 2253 35 1 0 64 6 0 0 605 456 114 450 27 97 18 0 2756 24 1 0 75 7 0 0 0 280 5 338 25 77 61 0 2409 29 1 0 70 March 2, 2026 at 06:56:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2426 112 520 24 94 11 0 2058 25 2 0 73 1 0 0 7 361 13 470 24 96 100 0 2459 28 1 0 71 2 2 0 0 322 4 382 27 81 59 0 2379 26 1 0 73 3 2 0 0 338 8 495 24 114 46 0 4211 22 1 0 77 4 4 0 16 517 110 383 27 86 38 0 2207 33 1 0 66 5 0 0 0 277 5 315 26 61 103 0 1862 37 1 0 62 6 4 0 523 460 112 447 26 88 63 0 2683 35 1 0 64 7 2 0 0 297 15 357 24 63 64 0 1918 30 1 0 69 March 2, 2026 at 06:56:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2592 113 738 29 150 70 0 3452 25 2 0 72 1 0 0 0 558 5 787 43 180 34 0 3432 23 2 0 75 2 0 0 7 530 13 710 35 139 120 0 4009 27 2 0 72 3 0 0 0 538 10 718 38 159 62 0 3992 40 1 0 58 4 0 0 16 701 112 681 36 150 64 0 4826 28 2 0 70 5 0 0 0 490 15 656 20 120 24 0 3064 29 1 0 69 6 0 0 844 560 111 632 35 146 112 0 3927 36 2 0 62 7 0 0 0 455 18 607 17 118 64 0 2853 17 1 0 82 March 2, 2026 at 06:56:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2488 110 593 40 128 92 0 2480 39 2 0 59 1 0 0 0 407 6 527 34 137 104 0 3041 49 1 0 50 2 0 0 7 390 9 493 40 114 112 0 3473 41 1 0 58 3 0 0 0 411 8 572 34 131 47 0 2944 31 1 0 68 4 0 0 2 614 107 563 22 136 99 0 4357 29 1 0 69 5 0 0 0 347 15 423 21 106 95 0 3066 22 1 0 77 6 0 0 662 473 113 484 22 115 113 0 3024 26 1 0 72 7 0 0 0 361 12 506 16 95 30 0 2091 19 1 0 80 March 2, 2026 at 06:56:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2376 107 380 25 85 39 0 1866 34 2 0 65 1 0 0 14 383 12 496 33 127 85 0 2376 38 1 0 61 2 61 0 0 364 12 461 33 90 88 0 2332 37 1 0 62 3 62 0 0 419 63 494 31 112 94 0 1862 37 1 0 62 4 1 0 9 595 119 524 26 110 54 0 3008 25 1 0 74 5 0 0 0 339 8 458 22 90 88 0 2150 27 1 0 72 6 2 0 550 469 108 506 25 106 87 0 3624 24 1 0 74 7 0 0 0 349 6 485 25 87 77 0 2352 23 1 0 76 March 2, 2026 at 06:56:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2515 112 669 22 125 41 0 2728 22 2 0 76 1 0 0 14 412 12 527 37 114 29 0 3249 35 1 0 64 2 4 0 0 409 7 528 18 102 21 0 2142 16 1 0 83 3 0 0 0 412 6 554 25 115 66 0 3247 32 1 0 66 4 1 0 14 671 121 670 27 131 37 0 3329 23 1 0 75 5 0 0 0 373 14 484 23 97 36 0 2041 23 1 0 76 6 4 0 623 488 109 466 39 103 31 0 3492 49 1 0 50 7 48 0 0 368 10 523 26 103 77 0 4341 29 1 0 70 March 2, 2026 at 06:56:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2542 101 628 32 148 7 0 3060 25 2 0 73 1 0 0 14 537 10 732 31 174 88 0 3703 29 2 0 69 2 0 0 0 531 11 706 33 142 33 0 2869 26 1 0 73 3 0 0 0 509 7 692 30 157 22 0 3401 36 1 0 63 4 0 0 2 673 118 570 33 139 24 0 3271 32 1 0 67 5 0 0 0 422 7 525 29 128 85 0 3339 35 1 0 64 6 0 0 878 560 105 646 28 145 58 0 4317 36 2 0 62 7 0 0 0 444 20 601 24 134 25 0 4530 22 2 0 76 March 2, 2026 at 06:56:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2429 110 520 31 111 54 0 3756 29 2 0 69 1 0 0 14 398 13 506 25 125 76 0 3226 34 1 0 65 2 0 0 0 394 14 489 21 104 21 0 2172 20 1 0 79 3 0 0 0 335 10 398 32 102 71 0 2378 31 1 0 68 4 0 0 2 603 115 533 20 119 56 0 2314 28 1 0 71 5 0 0 0 336 10 425 21 95 69 0 2581 25 1 0 74 6 0 0 628 490 111 510 28 115 12 0 3002 36 1 0 62 7 0 0 0 322 15 358 36 84 82 0 3328 50 1 0 49 March 2, 2026 at 06:56:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2399 115 453 27 72 16 0 2244 24 2 0 75 1 0 0 3 282 3 341 30 86 29 0 2615 37 1 0 62 2 0 0 14 327 14 391 18 74 32 0 2510 18 1 0 81 3 0 0 0 317 11 380 27 77 28 0 1925 42 1 0 57 4 0 0 2 505 107 382 25 82 24 0 2073 30 1 0 70 5 0 0 0 265 11 293 24 69 32 0 2022 35 1 0 64 6 0 0 550 442 118 425 32 89 21 0 3011 33 1 0 66 7 0 0 7 293 10 365 16 64 29 0 2197 21 1 0 78 March 2, 2026 at 06:56:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2623 109 764 38 188 97 0 3230 21 2 0 76 1 0 0 7 612 13 870 29 195 80 0 4373 24 2 0 74 2 0 0 14 582 10 776 29 149 60 0 3302 24 1 0 74 3 0 0 0 644 52 989 38 186 116 0 4754 26 2 0 72 4 0 0 2 814 117 864 33 180 104 0 3266 26 1 0 73 5 0 0 0 524 9 719 27 145 127 0 3324 29 1 0 70 6 0 0 872 604 107 738 35 152 64 0 4036 37 2 0 61 7 0 0 0 515 10 685 36 135 125 0 3187 33 1 0 66 March 2, 2026 at 06:56:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2489 110 598 25 137 29 0 2610 29 2 0 69 1 0 0 0 428 10 556 31 145 83 0 3920 38 1 0 60 2 0 0 14 427 17 561 31 127 43 0 3457 32 1 0 67 3 0 0 7 402 12 573 33 144 43 0 4652 43 1 0 56 4 0 0 2 639 106 622 29 135 23 0 2797 31 1 0 68 5 0 0 0 381 7 492 26 112 82 0 2727 28 1 0 71 6 0 0 662 503 109 543 28 127 39 0 2892 34 1 0 65 7 0 0 0 383 9 498 23 115 27 0 2890 24 1 0 76 March 2, 2026 at 06:56:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2404 112 445 22 101 8 0 1785 23 2 0 75 1 0 0 14 331 6 402 25 103 71 0 3264 36 1 0 63 2 0 0 0 344 5 411 27 89 13 0 2194 35 1 0 64 3 0 0 7 382 19 479 19 95 31 0 4271 19 1 0 80 4 0 0 3 520 109 401 28 94 8 0 2214 38 1 0 61 5 0 0 0 298 11 377 25 81 68 0 2539 28 1 0 71 6 0 0 577 437 107 406 25 86 11 0 1962 30 1 0 68 7 0 0 0 297 12 335 36 74 13 0 1895 32 1 0 68 March 2, 2026 at 06:56:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2475 107 524 16 113 17 0 2045 26 2 0 72 1 0 0 0 450 11 589 26 132 47 0 2601 30 1 0 69 2 0 0 0 425 15 559 15 103 33 0 3338 16 1 0 83 3 0 0 0 400 8 551 31 126 97 0 5132 36 2 0 63 4 0 0 23 679 120 651 28 124 33 0 3027 22 1 0 77 5 0 0 0 377 7 450 33 88 47 0 2627 40 1 0 59 6 0 0 676 498 107 535 31 119 44 0 2414 33 1 0 66 7 0 0 0 410 20 532 26 92 111 0 2409 20 1 0 79 March 2, 2026 at 06:56:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2578 109 683 36 150 32 0 2966 31 2 0 67 1 0 0 0 586 21 808 23 154 46 0 3010 24 2 0 74 2 0 0 0 537 7 735 37 151 37 0 3336 30 1 0 69 3 0 0 0 493 5 645 35 171 69 0 4331 43 1 0 56 4 0 0 16 712 115 738 29 168 33 0 5314 25 2 0 73 5 0 0 7 443 7 564 24 129 42 0 3619 30 1 0 68 6 0 0 871 550 112 638 33 148 41 0 3541 35 2 0 63 7 0 0 0 438 9 544 26 113 95 0 3229 31 1 0 68 March 2, 2026 at 06:56:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2529 114 608 31 126 109 0 2511 29 2 0 69 1 0 0 3 413 5 526 40 130 178 0 2807 46 1 0 53 2 0 0 0 427 14 500 41 112 73 0 2650 41 1 0 58 3 0 0 0 507 78 667 30 162 78 0 2798 23 1 0 76 4 0 0 2 628 115 573 36 135 94 0 4025 31 1 0 68 5 0 0 7 405 7 518 21 123 160 0 2299 22 1 0 78 6 0 0 746 465 106 458 42 119 27 0 2744 32 1 0 67 7 0 0 0 362 2 489 34 101 77 0 2274 26 1 0 73 March 2, 2026 at 06:56:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2371 107 376 22 70 22 0 2377 29 2 0 70 1 0 0 0 343 11 389 31 92 28 0 2043 38 1 0 60 2 0 0 0 302 4 374 18 71 47 0 2402 30 1 0 69 3 0 0 0 316 9 383 27 90 13 0 2124 30 1 0 70 4 0 0 7 567 121 505 26 95 20 0 3547 16 1 0 83 5 0 0 0 290 10 326 27 64 25 0 2029 34 1 0 66 6 0 0 568 409 108 345 26 70 37 0 2269 37 1 0 62 7 0 0 7 294 14 349 20 62 8 0 1856 24 1 0 75 March 2, 2026 at 06:56:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2640 103 810 41 178 36 0 3533 30 2 0 68 1 0 0 0 611 5 845 42 196 33 0 4212 41 2 0 57 2 0 0 0 597 18 809 30 173 77 0 3560 27 2 0 71 3 0 0 0 608 9 856 38 201 68 0 4316 32 2 0 66 4 0 0 2 800 110 849 38 178 55 0 4230 29 2 0 69 5 0 0 0 574 23 757 26 135 23 0 3483 23 1 0 76 6 0 0 949 634 111 839 28 182 52 0 5513 32 2 0 65 7 0 0 14 492 10 674 14 143 67 0 4053 19 1 0 80 March 2, 2026 at 06:56:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2424 107 430 35 113 109 0 2653 40 2 0 58 1 0 0 0 462 15 597 21 145 67 0 2732 26 1 0 73 2 0 0 0 408 15 512 30 107 19 0 2815 33 1 0 66 3 0 0 0 381 16 474 30 114 29 0 2948 35 1 0 64 4 0 0 2 595 111 526 32 131 93 0 2815 26 1 0 73 5 0 0 0 370 9 455 31 97 55 0 2367 35 1 0 64 6 0 0 676 472 113 510 26 107 7 0 3673 30 2 0 69 7 0 0 21 323 10 396 29 85 30 0 3429 33 1 0 66 March 2, 2026 at 06:56:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2387 102 410 21 97 23 0 1812 22 2 0 77 1 1 0 0 380 19 450 25 96 11 0 2019 30 1 0 69 2 0 0 0 357 7 444 23 95 16 0 2002 32 1 0 67 3 65 0 0 311 14 395 20 84 21 0 2819 36 1 0 63 4 0 0 2 507 111 395 24 85 24 0 2553 30 1 0 69 5 0 0 0 325 11 404 32 83 21 0 2404 27 1 0 73 6 0 0 563 458 116 443 39 95 28 0 3532 36 1 0 63 7 0 0 21 284 9 351 18 69 13 0 2510 23 1 0 77 March 2, 2026 at 06:56:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2626 112 765 41 164 71 0 3676 30 2 0 67 1 52 0 0 641 4 914 51 195 87 0 3831 33 2 0 65 2 0 0 0 592 19 789 18 177 83 0 3365 23 2 0 75 3 0 0 0 614 75 749 35 175 129 0 3588 34 2 0 64 4 0 0 3 817 107 924 36 182 104 0 3382 26 2 0 72 5 0 0 0 519 5 733 32 169 99 0 3282 32 1 0 67 6 0 0 871 693 118 956 39 190 84 0 5338 26 2 0 72 7 2 0 7 491 8 687 31 136 134 0 3120 21 1 0 78 March 2, 2026 at 06:56:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2526 111 641 29 139 6 0 2786 24 2 0 74 1 0 0 0 446 9 573 23 160 98 0 3443 31 1 0 68 2 0 0 0 398 5 495 35 116 135 0 2894 40 1 0 59 3 0 0 0 480 18 636 37 155 57 0 3736 35 1 0 64 4 0 0 2 605 112 491 26 128 19 0 2960 41 1 0 58 5 0 0 0 386 8 486 29 112 100 0 3002 34 1 0 65 6 0 0 747 510 109 579 31 123 140 0 4511 26 2 0 72 7 0 0 0 376 10 466 33 106 48 0 2600 22 1 0 77 March 2, 2026 at 06:56:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2417 112 455 24 91 42 0 3045 24 2 0 74 1 0 0 3 359 5 435 20 111 22 0 2386 26 1 0 72 2 0 0 0 388 13 465 23 89 22 0 1867 17 1 0 82 3 0 0 0 348 8 436 32 88 40 0 4005 42 1 0 56 4 0 0 2 554 113 429 29 100 47 0 2380 39 1 0 60 5 0 0 0 329 14 401 26 77 21 0 1900 33 1 0 66 6 0 0 634 441 110 418 30 97 21 0 2745 37 1 0 62 7 0 0 0 299 6 383 22 73 50 0 1822 16 1 0 83 March 2, 2026 at 06:56:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2598 110 759 32 149 55 0 3186 23 2 0 75 1 0 0 0 539 10 740 34 156 65 0 3424 30 2 0 69 2 0 0 0 529 15 629 36 125 57 0 2829 34 1 0 64 3 0 0 0 497 10 677 43 154 66 0 5251 38 2 0 60 4 0 0 2 691 110 625 41 155 62 0 2984 43 1 0 56 5 0 0 7 463 16 577 21 121 59 0 3392 24 1 0 75 6 0 0 857 547 109 649 20 133 67 0 3571 19 2 0 80 7 0 0 0 465 15 626 24 110 40 0 2485 13 1 0 86 March 2, 2026 at 06:56:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2540 105 648 41 144 35 0 3368 39 2 0 59 1 0 0 0 446 5 573 42 155 35 0 3367 46 1 0 52 2 0 0 0 477 5 647 32 141 26 0 3064 31 1 0 68 3 0 0 0 515 12 686 48 164 58 0 3967 38 1 0 60 4 0 0 2 688 109 648 37 172 44 0 3279 28 1 0 70 5 0 0 7 468 12 677 27 141 45 0 4830 23 1 0 76 6 0 0 802 548 121 610 36 147 32 0 4139 23 2 0 75 7 0 0 0 424 11 541 27 119 53 0 3004 26 1 0 73 March 2, 2026 at 06:56:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2462 106 541 31 115 84 0 2594 29 2 0 69 1 0 0 0 410 9 543 24 142 67 0 2323 32 1 0 67 2 0 0 0 356 7 449 31 105 89 0 2027 38 1 0 61 3 0 0 0 467 79 548 30 119 71 0 2466 29 1 0 70 4 0 0 2 634 125 590 22 133 102 0 2308 21 1 0 78 5 0 0 7 348 9 485 37 93 59 0 3663 27 1 0 72 6 0 0 635 524 113 554 32 124 121 0 2737 32 1 0 66 7 0 0 0 353 5 465 22 99 86 0 2378 28 1 0 71 March 2, 2026 at 06:56:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2567 116 719 28 136 67 0 2917 22 2 0 76 1 0 0 0 483 7 660 39 142 48 0 3116 32 1 0 66 2 0 0 0 450 8 566 27 117 44 0 2800 29 1 0 70 3 0 0 14 514 14 715 31 140 29 0 3644 23 1 0 76 4 0 0 7 641 108 585 32 121 54 0 2738 32 1 0 67 5 0 0 7 440 16 549 35 96 54 0 2918 39 1 0 60 6 0 0 761 504 110 615 29 125 33 0 4353 23 2 0 74 7 0 0 0 376 17 459 24 104 37 0 2860 24 1 0 75 March 2, 2026 at 06:56:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2557 105 674 31 149 39 0 3330 25 2 0 73 1 0 0 0 504 11 684 34 181 58 0 3776 36 2 0 62 2 0 0 0 471 6 586 22 150 110 0 3659 34 1 0 65 3 0 0 14 479 9 663 45 170 59 0 4118 38 1 0 60 4 0 0 3 679 116 621 35 145 34 0 3074 42 1 0 56 5 0 0 7 497 15 670 24 145 80 0 3647 29 1 0 70 6 0 0 815 568 111 696 24 158 117 0 3745 26 2 0 72 7 0 0 0 429 5 598 16 134 48 0 4500 23 1 0 76 March 2, 2026 at 06:56:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2426 112 504 30 110 18 0 3980 33 2 0 65 1 0 0 0 386 9 468 36 113 36 0 2766 31 1 0 67 2 0 0 0 367 9 459 24 102 19 0 2179 23 1 0 76 3 0 0 21 402 23 488 24 105 58 0 3283 24 1 0 75 4 0 0 2 558 107 413 22 102 8 0 2379 33 1 0 66 5 0 0 0 353 12 455 21 88 25 0 2040 26 1 0 73 6 0 0 663 444 110 447 28 101 23 0 2384 29 1 0 70 7 0 0 0 326 9 398 23 79 68 0 2268 34 1 0 65 March 2, 2026 at 06:56:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2485 112 600 24 123 39 0 4061 25 2 0 73 1 0 0 0 479 12 665 35 139 29 0 3225 26 1 0 73 2 0 0 0 464 8 594 29 109 27 0 2113 16 1 0 83 3 0 0 21 425 12 597 28 114 102 0 3816 35 1 0 64 4 0 0 2 597 108 538 32 120 38 0 2776 35 1 0 64 5 0 0 0 385 15 468 25 92 43 0 2542 28 1 0 71 6 0 0 675 500 110 531 29 111 37 0 2913 40 1 0 59 7 0 0 0 328 13 388 19 80 102 0 2399 26 1 0 73 March 2, 2026 at 06:56:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2663 108 840 43 175 57 0 4875 28 3 0 69 1 0 0 2 604 11 873 41 211 189 0 4351 35 2 0 63 2 0 0 0 633 4 892 37 195 170 0 4013 32 2 0 66 3 0 0 7 641 73 840 49 192 134 0 4764 39 2 0 59 4 0 0 16 803 112 873 33 203 90 0 4056 27 2 0 72 5 0 0 0 520 15 677 35 152 192 0 3420 25 1 0 73 6 0 0 943 619 112 764 41 178 134 0 3555 38 2 0 60 7 0 0 0 505 7 699 29 173 126 0 3482 27 1 0 72 March 2, 2026 at 06:56:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2421 112 447 24 113 20 0 2295 26 2 0 72 1 0 0 0 433 13 535 31 122 21 0 3809 35 1 0 64 2 0 0 0 354 9 402 27 96 17 0 2379 32 1 0 66 3 0 0 0 364 9 428 26 87 43 0 2870 34 1 0 65 4 0 0 3 533 112 389 24 99 28 0 2314 33 1 0 66 5 0 0 21 332 5 412 25 84 26 0 3122 22 1 0 77 6 0 0 703 424 108 388 32 86 19 0 2328 30 1 0 68 7 0 0 0 316 11 386 14 87 50 0 2153 24 1 0 76 March 2, 2026 at 06:56:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2446 102 514 25 108 24 0 2485 24 2 0 74 1 0 0 0 387 7 568 27 107 40 0 3812 27 1 0 72 2 0 0 0 426 3 537 39 103 31 0 2413 29 1 0 70 3 0 0 0 405 14 570 37 125 39 0 3567 34 1 0 65 4 0 0 2 585 110 516 22 114 19 0 2572 37 1 0 62 5 0 0 21 366 12 450 32 106 44 0 3280 33 1 0 66 6 0 0 607 531 107 578 31 115 53 0 2772 28 1 0 71 7 0 0 0 367 19 462 10 85 31 0 2030 12 1 0 87 March 2, 2026 at 06:56:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2628 116 748 39 170 38 0 3322 32 2 0 66 1 0 0 0 611 10 896 40 193 52 0 5261 29 2 0 69 2 0 0 7 526 12 671 29 155 40 0 3902 22 2 0 77 3 0 0 0 578 16 765 41 180 113 0 4591 33 2 0 65 4 0 0 16 704 109 668 47 171 46 0 3658 44 1 0 55 5 0 0 0 503 8 662 26 147 46 0 3565 30 1 0 69 6 0 0 955 626 111 766 29 196 60 0 4095 30 2 0 68 7 0 0 0 490 10 603 31 141 87 0 3557 34 1 0 65 March 2, 2026 at 06:56:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2445 109 510 27 114 59 0 2759 28 2 0 71 1 0 0 0 419 16 577 37 121 21 0 3883 29 2 0 70 2 0 0 7 379 13 432 31 98 22 0 2353 27 1 0 72 3 0 0 0 352 6 454 25 119 37 0 2913 37 1 0 62 4 0 0 16 557 110 453 25 111 64 0 2968 34 1 0 65 5 0 0 0 359 14 431 22 96 17 0 2503 26 1 0 74 6 0 0 662 460 110 448 22 102 23 0 2384 28 1 0 71 7 0 0 0 310 8 383 23 71 24 0 2117 26 1 0 73 March 2, 2026 at 06:56:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2540 107 626 40 144 42 0 3126 28 2 0 70 1 0 0 0 496 7 676 34 155 124 0 2925 29 2 0 69 2 0 0 7 500 15 678 28 147 105 0 3560 19 1 0 79 3 0 0 0 671 72 784 38 163 154 0 3125 30 1 0 69 4 0 0 16 641 110 609 34 151 62 0 3366 33 1 0 66 5 0 0 202 419 5 583 34 118 80 0 2496 30 1 0 69 6 0 0 688 556 110 687 25 150 144 0 2928 22 2 0 77 7 0 0 0 505 7 570 24 124 144 0 2735 32 1 0 67 March 2, 2026 at 06:56:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2592 105 730 38 168 84 0 3530 34 2 0 64 1 0 0 0 561 17 784 37 199 41 0 4276 32 2 0 67 2 0 0 7 529 10 742 45 165 36 0 4924 32 2 0 66 3 0 0 0 514 10 698 39 186 74 0 4518 34 1 0 65 4 0 0 16 730 114 704 39 181 119 0 3791 32 1 0 67 5 0 0 0 503 11 667 28 162 54 0 3355 28 1 0 71 6 0 0 885 566 107 675 28 167 35 0 3732 34 2 0 64 7 0 0 0 501 14 637 26 137 76 0 3425 29 1 0 70 March 2, 2026 at 06:56:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2412 106 412 27 93 22 0 2189 32 2 0 66 1 0 0 0 408 7 529 31 121 26 0 2528 35 1 0 64 2 0 0 7 361 11 468 28 87 33 0 3748 32 1 0 67 3 0 0 0 367 13 478 33 120 31 0 3346 30 1 0 69 4 0 0 37 594 117 455 44 121 24 0 2460 38 1 0 61 5 0 0 0 390 11 458 16 101 37 0 2210 16 1 0 83 6 0 0 635 517 120 519 24 117 39 0 2875 18 1 0 80 7 0 0 0 315 10 390 23 84 47 0 2430 30 1 0 69 March 2, 2026 at 06:56:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2574 110 755 30 150 38 0 3321 24 2 0 74 1 0 0 0 518 10 721 33 150 28 0 3224 29 1 0 69 2 0 0 0 481 9 653 22 134 108 0 3240 19 1 0 80 3 0 0 0 498 13 687 28 151 46 0 4211 36 1 0 63 4 0 0 2 748 123 784 39 167 44 0 4842 27 2 0 72 5 0 0 7 475 10 634 25 126 39 0 3443 30 1 0 68 6 0 0 746 564 109 651 40 151 148 0 3400 42 2 0 56 7 0 0 32 454 10 615 28 120 34 0 3183 23 1 0 76 March 2, 2026 at 06:56:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2569 113 734 29 130 40 0 3346 23 2 0 75 1 0 0 0 508 10 689 33 171 29 0 3642 32 2 0 66 2 0 0 0 456 5 584 25 125 73 0 3362 30 1 0 69 3 0 0 0 470 14 620 26 158 23 0 3395 31 1 0 67 4 0 0 2 642 111 594 38 159 53 0 5311 44 2 0 54 5 0 0 7 490 17 647 24 156 44 0 3931 21 1 0 78 6 0 0 829 550 118 627 31 154 73 0 3723 30 2 0 68 7 0 0 0 404 5 480 34 111 22 0 2943 36 1 0 63 March 2, 2026 at 06:56:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2476 112 587 37 137 82 0 2675 25 2 0 74 1 0 0 0 425 18 558 33 138 139 0 2630 24 1 0 74 2 0 0 7 385 9 509 31 118 72 0 2740 31 1 0 68 3 0 0 0 480 75 628 32 133 75 0 2217 20 1 0 79 4 0 0 3 602 111 530 28 120 106 0 1981 28 1 0 71 5 0 0 0 327 6 419 30 89 120 0 2147 33 1 0 66 6 5 0 580 477 112 549 22 116 94 0 3501 19 2 0 80 7 0 0 0 284 3 314 39 85 64 0 2137 47 1 0 53 March 2, 2026 at 06:56:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2648 108 819 26 174 60 0 3959 22 2 0 76 1 0 0 0 605 6 833 41 182 49 0 3890 26 2 0 72 2 0 0 7 601 12 861 38 172 28 0 3780 29 2 0 69 3 0 0 0 515 8 717 38 167 79 0 3400 40 1 0 59 4 0 0 1 751 116 763 45 180 44 0 4042 35 1 0 64 5 0 0 14 512 16 727 34 163 54 0 3918 23 1 0 75 6 0 0 831 629 115 814 32 169 31 0 5475 30 2 0 68 7 0 0 0 467 4 648 33 137 85 0 3633 31 1 0 68 March 2, 2026 at 06:56:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2489 105 575 25 146 21 0 2763 26 2 0 72 1 0 0 0 455 7 618 28 153 35 0 3182 29 1 0 70 2 0 0 7 397 8 487 32 124 36 0 3313 33 1 0 66 3 0 0 14 405 6 523 36 140 50 0 3471 33 1 0 66 4 0 0 2 657 114 608 28 152 21 0 2884 27 1 0 72 5 0 0 0 385 11 467 23 109 34 0 2629 24 1 0 75 6 0 0 761 520 119 534 22 136 44 0 2929 29 2 0 69 7 0 0 0 396 11 517 32 110 21 0 4313 33 1 0 66 March 2, 2026 at 06:56:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2394 104 416 27 88 27 0 2271 28 2 0 71 1 0 0 0 322 7 418 25 104 35 0 2273 27 1 0 72 2 0 0 7 335 11 432 22 93 25 0 2481 19 1 0 80 3 0 0 0 370 12 480 15 117 17 0 2661 14 1 0 85 4 0 0 15 543 118 419 24 81 23 0 2381 28 1 0 71 5 0 0 0 302 6 361 35 69 28 0 1765 38 1 0 61 6 0 0 564 482 124 474 27 97 20 0 2344 26 1 0 73 7 0 0 0 269 13 310 27 61 5 0 3681 41 1 0 59 March 2, 2026 at 06:56:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2651 110 816 35 190 68 0 3938 27 2 0 70 1 0 0 0 650 10 972 36 206 78 0 4363 30 2 0 68 2 0 0 0 656 10 901 33 170 67 0 4006 32 2 0 67 3 0 0 14 614 9 919 40 200 89 0 4424 26 2 0 72 4 2 0 3 814 115 855 40 200 57 0 4692 36 2 0 63 5 0 0 0 544 10 757 24 165 73 0 3964 31 1 0 68 6 0 0 928 643 110 870 33 208 73 0 4336 26 2 0 72 7 0 0 7 516 8 730 34 158 103 0 5999 30 2 0 68 March 2, 2026 at 06:56:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 0 2489 108 556 36 134 59 0 2831 30 2 0 68 1 0 0 0 489 10 635 36 149 95 0 2735 32 1 0 67 2 0 0 0 453 11 602 22 137 106 0 2610 24 1 0 74 3 4 0 0 529 79 644 31 149 102 0 2922 35 1 0 64 4 1 0 2 653 112 656 19 150 116 0 2833 21 1 0 78 5 0 0 14 357 7 421 30 102 85 0 2879 40 1 0 59 6 0 0 690 529 113 599 41 136 76 0 2560 27 2 0 71 7 0 0 7 397 15 547 34 109 62 0 3766 24 1 0 74 March 2, 2026 at 06:56:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2503 106 590 23 120 41 0 3155 23 2 0 76 1 0 0 0 485 15 647 41 141 45 0 3446 37 1 0 61 2 0 0 0 444 9 541 31 123 36 0 2780 29 2 0 70 3 0 0 0 486 12 663 17 134 28 0 3206 22 1 0 77 4 0 0 7 663 115 669 25 142 34 0 3329 28 1 0 70 5 0 0 14 427 20 562 18 112 38 0 3199 11 1 0 88 6 0 0 721 508 110 590 29 125 38 0 2938 36 2 0 63 7 0 0 7 377 7 482 29 91 29 0 3551 36 1 0 63 March 2, 2026 at 06:56:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2566 104 692 23 167 41 0 4225 30 2 0 68 1 0 0 0 580 11 778 32 185 24 0 3905 31 2 0 67 2 0 0 0 540 18 734 38 177 46 0 3660 33 2 0 65 3 0 0 0 519 8 703 33 192 100 0 4288 34 2 0 64 4 0 0 2 725 109 733 29 175 21 0 3543 29 1 0 70 5 0 0 14 471 6 673 25 138 32 0 4853 28 2 0 70 6 0 0 885 568 110 680 41 165 41 0 3536 27 2 0 71 7 0 0 0 449 10 602 26 128 97 0 3566 31 1 0 67 March 2, 2026 at 06:56:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2442 118 529 20 103 32 0 2619 17 2 0 81 1 0 0 0 343 5 433 33 108 38 0 2403 30 1 0 69 2 3 0 0 375 9 480 18 98 25 0 2035 26 1 0 72 3 0 0 14 348 13 444 21 100 23 0 3003 27 1 0 73 4 0 0 3 560 112 468 25 114 71 0 2835 31 1 0 68 5 0 0 0 328 11 377 35 75 47 0 1932 37 1 0 62 6 0 0 592 482 117 522 30 109 38 0 3931 24 2 0 74 7 0 0 0 313 10 400 23 84 13 0 2218 26 1 0 73 March 2, 2026 at 06:56:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2638 111 832 33 172 22 0 5851 38 3 0 59 1 0 0 0 618 15 875 39 199 66 0 3823 33 2 0 65 2 0 0 0 641 7 937 32 188 27 0 3292 17 2 0 81 3 0 0 0 596 16 850 35 189 48 0 4428 26 2 0 72 4 0 0 16 746 114 781 35 201 30 0 4132 32 1 0 67 5 0 0 0 522 10 706 34 149 71 0 4358 32 1 0 67 6 0 0 858 604 111 762 36 175 18 0 4220 30 2 0 68 7 0 0 0 515 8 727 34 157 39 0 3616 30 1 0 69 March 2, 2026 at 06:56:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2526 114 627 40 143 73 0 4007 29 2 0 69 1 0 0 7 498 16 687 29 175 91 0 3980 28 2 0 71 2 0 0 0 479 11 621 29 135 144 0 2544 26 1 0 73 3 0 0 0 581 107 823 26 176 76 0 2875 28 2 0 70 4 0 0 17 699 109 700 34 156 74 0 3222 23 1 0 76 5 0 0 0 413 4 578 22 131 106 0 2529 33 1 0 66 6 0 0 731 503 109 576 32 154 134 0 2928 30 2 0 68 7 0 0 0 465 14 644 22 126 127 0 2650 30 1 0 70 March 2, 2026 at 06:56:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2484 106 663 29 120 26 0 3431 11 2 0 87 1 0 0 7 379 7 483 28 105 42 0 3448 34 1 0 65 2 0 0 0 387 22 504 21 87 46 0 2305 17 1 0 81 3 0 0 0 411 11 609 25 133 16 0 2743 16 1 0 83 4 0 0 3 579 115 452 40 107 37 0 3194 45 1 0 54 5 0 0 0 335 3 430 26 92 39 0 2281 44 1 0 55 6 0 0 605 484 108 540 26 116 44 0 2847 26 1 0 72 7 0 0 0 332 7 427 25 79 7 0 2234 26 1 0 73 March 2, 2026 at 06:56:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2670 112 893 24 193 38 0 5196 24 3 0 74 1 0 0 7 645 10 913 27 228 41 0 4240 21 2 0 77 2 0 0 0 552 8 765 37 165 65 0 3833 30 2 0 68 3 0 0 0 589 5 834 43 203 71 0 4367 36 2 0 62 4 0 0 3 767 109 835 30 188 66 0 4991 30 2 0 68 5 0 0 0 496 9 642 27 152 35 0 4166 37 1 0 62 6 0 0 969 612 113 767 39 185 77 0 4949 34 2 0 64 7 0 0 0 502 9 693 29 154 82 0 3944 24 1 0 75 March 2, 2026 at 06:56:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2456 106 532 21 100 26 0 3925 16 2 0 82 1 0 0 7 401 13 554 29 127 71 0 2799 15 1 0 84 2 0 0 0 360 8 442 22 91 27 0 2396 32 1 0 67 3 0 0 0 320 7 398 25 106 77 0 2403 35 1 0 64 4 0 0 2 620 129 553 30 106 15 0 2534 22 1 0 77 5 0 0 0 328 10 393 27 69 89 0 3025 36 1 0 63 6 0 0 591 453 115 448 27 91 25 0 2470 27 1 0 72 7 0 0 0 278 11 303 21 68 60 0 1946 35 1 0 65 March 2, 2026 at 06:56:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2626 109 823 37 189 48 0 4809 28 3 0 70 1 0 0 0 704 12 1050 45 239 49 0 4693 26 2 0 72 2 0 0 0 557 7 740 38 173 29 0 4045 36 2 0 62 3 0 0 7 626 10 902 54 205 102 0 4543 32 2 0 66 4 0 0 3 796 114 879 34 200 66 0 4172 29 2 0 69 5 0 0 0 523 18 687 26 153 34 0 4534 26 1 0 73 6 0 0 858 642 114 829 33 197 26 0 4446 25 2 0 73 7 0 0 14 471 9 666 21 140 80 0 3969 27 1 0 71 March 2, 2026 at 06:56:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2482 111 530 29 127 51 0 2612 31 2 0 67 1 0 0 7 450 7 612 29 161 81 0 4939 36 2 0 63 2 0 0 0 461 11 634 25 147 78 0 2501 19 1 0 80 3 0 0 0 508 62 720 29 164 155 0 3048 35 1 0 63 4 0 0 2 660 108 621 42 160 84 0 2858 34 1 0 65 5 0 0 0 441 13 627 25 115 112 0 2969 16 1 0 82 6 0 0 676 530 108 615 34 148 95 0 2766 24 2 0 74 7 0 0 14 424 14 570 27 112 137 0 2584 22 1 0 77 March 2, 2026 at 06:57:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2576 109 732 33 181 33 0 3610 23 2 0 74 1 0 0 7 569 11 847 42 176 70 0 5146 36 2 0 62 2 0 0 0 495 7 684 44 145 74 0 3673 39 1 0 60 3 0 0 0 498 13 709 39 177 53 0 4279 35 1 0 64 4 0 0 7 728 125 754 35 172 37 0 3496 24 1 0 75 5 0 0 0 406 11 550 17 126 56 0 3094 16 1 0 82 6 0 0 665 561 104 676 33 145 32 0 3273 25 2 0 74 7 0 0 14 412 11 580 26 131 39 0 3646 29 1 0 70 March 2, 2026 at 06:57:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2547 109 644 41 163 34 0 3554 32 2 0 66 1 0 0 0 513 10 737 40 179 28 0 5319 26 2 0 72 2 0 0 0 497 3 667 22 153 36 0 3063 20 1 0 79 3 0 0 7 450 8 575 38 159 16 0 4015 36 1 0 63 4 0 0 2 689 112 656 35 154 35 0 3332 32 1 0 67 5 0 0 0 420 9 563 22 124 37 0 3166 26 1 0 73 6 0 0 815 563 117 655 35 167 40 0 3729 29 2 0 69 7 0 0 0 425 17 521 27 116 32 0 3072 24 1 0 75 March 2, 2026 at 06:57:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2412 117 449 27 98 17 0 2356 33 2 0 65 1 0 0 0 355 7 522 30 119 20 0 4213 39 1 0 60 2 0 0 0 352 19 427 17 94 19 0 2256 19 1 0 80 3 0 0 7 387 14 530 40 118 53 0 2738 28 1 0 71 4 0 0 3 542 112 410 32 105 14 0 2457 23 1 0 76 5 47 0 0 295 17 382 21 76 29 0 2300 24 1 0 76 6 45 0 508 467 107 478 28 99 20 0 2348 33 1 0 66 7 0 0 0 294 5 388 24 84 42 0 2229 18 1 0 81 March 2, 2026 at 06:57:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2682 112 905 40 210 77 0 4653 26 3 0 71 1 0 0 0 671 9 981 43 229 76 0 4940 34 2 0 64 2 0 0 0 584 4 762 33 167 68 0 6010 36 2 0 62 3 0 0 7 663 8 960 46 204 45 0 5503 30 2 0 68 4 0 0 3 871 120 967 31 218 84 0 4454 22 2 0 76 5 0 0 0 621 19 918 34 176 99 0 4394 23 1 0 76 6 0 0 912 664 110 896 37 201 61 0 4736 21 2 0 77 7 0 0 0 525 7 734 23 137 59 0 4311 34 1 0 65 March 2, 2026 at 06:57:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2483 117 609 28 130 28 0 2420 23 2 0 76 1 1 0 0 470 9 664 26 154 137 0 2838 23 1 0 76 2 0 0 0 354 7 451 25 114 61 0 2706 32 1 0 67 3 0 0 0 444 63 656 34 143 103 0 4072 22 1 0 77 4 0 0 9 634 117 641 29 147 87 0 2907 26 1 0 73 5 0 0 0 360 7 515 33 109 123 0 2626 29 1 0 70 6 0 0 523 506 110 586 31 141 70 0 2562 21 1 0 77 7 0 0 0 307 6 401 32 108 101 0 2051 38 1 0 61 March 2, 2026 at 06:57:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2609 108 777 35 146 51 0 3175 24 2 0 74 1 0 0 0 582 13 809 36 165 43 0 3478 31 2 0 68 2 0 0 0 535 8 678 33 128 71 0 2930 36 2 0 63 3 0 0 0 571 9 828 34 151 70 0 3018 23 2 0 75 4 0 0 9 740 110 772 47 137 41 0 4992 35 2 0 63 5 0 0 0 485 9 658 19 109 47 0 2755 14 1 0 85 6 0 0 872 558 105 655 43 135 62 0 3121 27 2 0 71 7 0 0 0 439 16 555 33 111 101 0 3399 32 1 0 67 March 2, 2026 at 06:57:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2420 106 457 23 85 29 0 1751 35 2 0 64 1 0 0 0 363 14 455 17 84 49 0 2262 24 1 0 75 2 0 0 15 392 15 523 20 83 10 0 1992 20 1 0 79 3 0 0 0 352 7 448 36 89 31 0 1933 33 1 0 66 4 0 0 10 499 111 351 23 75 21 0 3370 27 1 0 72 5 0 0 0 288 13 392 10 61 62 0 2167 10 1 0 90 6 0 0 563 418 107 382 24 70 20 0 1940 29 1 0 70 7 0 0 0 288 12 324 25 47 30 0 1632 34 1 0 66 March 2, 2026 at 06:57:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2569 109 699 41 151 63 0 2733 38 2 0 60 1 0 0 0 521 10 698 41 154 41 0 2722 33 1 0 66 2 0 0 14 507 15 676 30 121 24 0 2677 17 1 0 82 3 0 0 0 499 8 701 56 138 49 0 3216 42 1 0 57 4 0 0 3 690 120 650 26 150 63 0 3143 20 1 0 79 5 0 0 0 444 9 672 25 125 48 0 3566 14 1 0 84 6 0 0 737 548 109 625 41 129 62 0 3352 33 2 0 65 7 0 0 1 408 10 530 32 98 42 0 2602 16 1 0 83 March 2, 2026 at 06:57:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2418 102 475 29 82 24 0 1647 37 2 0 61 1 0 0 0 371 4 498 14 100 41 0 2177 22 1 0 77 2 0 0 0 391 6 467 29 80 57 0 2356 29 1 0 70 3 0 0 14 353 15 428 25 84 100 0 2366 43 1 0 56 4 0 0 2 556 111 457 17 77 25 0 2427 24 1 0 75 5 0 0 0 353 29 451 11 73 20 0 3004 11 1 0 88 6 0 0 655 464 109 478 23 92 36 0 2282 26 1 0 73 7 0 0 0 340 7 455 19 80 97 0 2084 20 1 0 79 March 2, 2026 at 06:57:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2583 112 745 32 126 84 0 2158 23 2 0 75 1 0 0 0 499 10 624 27 127 153 0 2933 28 1 0 70 2 0 0 0 487 6 675 27 118 197 0 2450 17 1 0 81 3 0 0 0 521 50 719 25 133 99 0 2532 24 1 0 75 4 0 0 16 674 108 694 23 127 117 0 3285 21 1 0 78 5 0 0 0 409 11 563 30 103 129 0 3646 28 1 0 70 6 0 0 732 509 124 532 29 106 157 0 2096 25 1 0 73 7 0 0 7 340 7 412 29 80 61 0 2558 35 1 0 64 March 2, 2026 at 06:57:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2438 111 436 30 90 33 0 2098 40 2 0 59 1 0 0 0 411 15 494 22 110 32 0 2298 15 1 0 84 2 0 0 0 337 4 362 22 81 25 0 2068 23 1 0 75 3 0 0 14 372 9 429 20 88 42 0 2222 30 1 0 69 4 0 0 7 588 113 490 19 100 24 0 2319 12 1 0 86 5 0 0 0 333 18 371 28 74 38 0 3619 39 1 0 60 6 0 0 721 439 111 425 23 94 29 0 2198 27 1 0 72 7 0 0 7 330 15 391 14 74 30 0 1946 16 1 0 83 March 2, 2026 at 06:57:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2457 104 578 21 111 32 0 2003 18 2 0 81 1 0 0 0 365 6 445 42 103 25 0 2080 42 1 0 56 2 0 0 0 334 5 440 25 89 23 0 2376 27 1 0 72 3 0 0 0 382 8 490 34 110 41 0 2308 34 1 0 65 4 0 0 3 560 110 458 32 107 21 0 2126 33 1 0 66 5 0 0 0 348 18 421 28 82 16 0 1771 32 1 0 68 6 0 0 590 462 125 487 17 98 15 0 2867 10 1 0 89 7 0 0 7 300 5 436 15 66 63 0 3762 9 1 0 90 March 2, 2026 at 06:57:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2445 111 479 23 95 32 0 2303 26 2 0 73 1 0 0 0 419 12 497 31 104 109 0 2225 29 1 0 70 2 0 0 1 366 3 436 20 81 90 0 1858 23 1 0 76 3 0 0 0 357 6 461 23 103 50 0 2612 26 1 0 73 4 0 0 2 589 117 475 29 94 23 0 2078 28 1 0 71 5 0 0 0 313 2 360 23 69 113 0 2285 34 1 0 65 6 0 0 705 489 118 496 34 106 84 0 2537 29 1 0 70 7 0 0 21 338 19 429 16 82 29 0 3513 10 1 0 89 March 2, 2026 at 06:57:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2496 104 550 25 112 27 0 1981 21 2 0 77 1 0 0 14 449 3 621 36 116 86 0 2881 34 1 0 65 2 0 0 0 440 24 512 23 83 18 0 2133 20 1 0 79 3 0 0 0 407 8 549 37 121 80 0 2477 34 1 0 65 4 0 0 2 553 112 462 28 102 30 0 3538 31 1 0 67 5 0 0 0 312 19 354 18 71 86 0 2089 16 1 0 84 6 0 0 662 501 108 537 29 107 8 0 3078 30 1 0 68 7 0 0 7 327 10 423 17 75 84 0 2160 16 1 0 83 March 2, 2026 at 06:57:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2525 119 656 22 124 79 0 1768 14 2 0 84 1 0 0 14 453 9 645 35 121 89 0 4272 26 2 0 73 2 0 0 0 375 5 434 21 93 78 0 1768 20 1 0 79 3 0 0 0 445 64 468 35 113 46 0 2222 37 1 0 62 4 0 0 2 643 113 596 25 125 84 0 2227 27 1 0 72 5 0 0 0 429 15 573 21 109 102 0 1957 22 1 0 77 6 0 0 718 512 115 530 31 107 91 0 2980 35 2 0 63 7 0 0 7 344 5 422 26 79 69 0 2088 24 1 0 76 March 2, 2026 at 06:57:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2513 103 622 28 105 17 0 2367 28 2 0 70 1 0 0 21 453 13 614 36 127 47 0 4869 35 2 0 64 2 0 0 0 412 15 490 37 96 58 0 2579 33 1 0 66 3 0 0 0 408 6 545 32 110 75 0 2771 29 1 0 70 4 0 0 3 641 112 575 26 117 24 0 2147 18 1 0 82 5 0 0 0 437 22 570 15 95 39 0 2010 10 1 0 89 6 0 0 717 460 106 465 28 96 47 0 2410 27 2 0 71 7 0 0 0 312 9 356 16 74 73 0 2310 21 1 0 78 March 2, 2026 at 06:57:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2448 111 537 28 89 43 0 2003 20 2 0 78 1 0 0 7 359 10 443 28 90 33 0 4151 44 1 0 55 2 1 0 0 350 9 392 27 83 37 0 2143 28 1 0 71 3 0 0 0 333 9 407 19 92 68 0 2187 27 1 0 72 4 0 0 2 546 109 439 14 102 28 0 2450 20 1 0 79 5 0 0 0 315 5 385 15 75 29 0 1857 20 1 0 79 6 0 0 662 457 115 463 23 91 41 0 2166 22 1 0 77 7 1 0 0 313 6 356 19 65 69 0 1496 23 1 0 77 March 2, 2026 at 06:57:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2481 107 517 31 115 26 0 2219 29 2 0 69 1 0 0 14 497 18 690 34 135 45 0 4339 32 2 0 67 2 0 0 2 468 11 580 27 121 40 0 2472 21 1 0 78 3 0 0 7 483 11 616 33 139 60 0 3305 29 1 0 70 4 0 0 2 661 113 630 30 124 29 0 3065 33 1 0 66 5 0 0 0 377 8 478 16 96 31 0 2076 15 1 0 84 6 0 0 760 479 114 503 26 109 38 0 2582 29 2 0 70 7 0 0 0 355 9 451 17 100 85 0 2346 16 1 0 84 March 2, 2026 at 06:57:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2399 104 445 26 87 14 0 1447 19 1 0 80 1 0 0 14 354 5 432 23 80 58 0 2314 30 1 0 69 2 0 0 0 278 3 332 25 59 26 0 3217 36 1 0 63 3 0 0 7 310 7 395 23 80 101 0 2277 27 1 0 72 4 0 0 1 526 125 367 18 83 11 0 1586 26 1 0 73 5 1 0 0 305 17 378 10 83 69 0 1800 19 1 0 80 6 0 0 564 460 120 423 34 89 28 0 2401 26 1 0 73 7 0 0 0 255 7 290 17 54 87 0 1530 21 1 0 78 March 2, 2026 at 06:57:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2551 102 649 48 153 107 0 2612 31 2 0 66 1 0 0 0 602 7 870 44 184 133 0 3516 28 2 0 71 2 0 0 14 532 19 713 35 139 95 0 2878 35 1 0 63 3 0 0 0 641 108 823 31 167 147 0 4208 28 2 0 70 4 1 0 2 748 115 726 29 155 106 0 2360 22 1 0 77 5 0 0 0 458 13 597 18 128 107 0 2542 18 1 0 81 6 0 0 810 556 109 673 40 141 127 0 3370 26 2 0 73 7 46 0 0 492 7 738 21 121 135 0 2240 16 1 0 83 March 2, 2026 at 06:57:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2385 108 377 22 67 18 0 1376 22 1 0 76 1 0 0 0 356 10 436 22 81 21 0 2109 26 1 0 73 2 0 0 0 276 7 317 22 66 25 0 1317 28 1 0 72 3 0 0 0 306 11 395 28 72 22 0 3388 36 1 0 63 4 0 0 17 525 118 361 26 67 32 0 2123 29 1 0 71 5 0 0 0 260 9 279 16 63 28 0 1764 24 1 0 75 6 0 0 541 438 113 427 28 82 34 0 2549 22 1 0 77 7 0 0 0 278 16 327 15 59 14 0 1453 17 1 0 82 March 2, 2026 at 06:57:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2550 105 616 28 124 70 0 2585 21 2 0 77 1 0 0 7 499 9 593 37 137 45 0 3520 31 1 0 67 2 0 0 1 493 13 627 26 116 58 0 2736 20 1 0 78 3 0 0 0 492 9 654 33 135 24 0 3161 34 1 0 65 4 0 0 17 672 114 583 36 123 80 0 3509 33 1 0 66 5 0 0 0 415 9 516 22 102 60 0 3003 27 1 0 72 6 0 0 900 511 109 626 21 119 47 0 4509 21 2 0 77 7 0 0 0 449 10 594 19 109 29 0 2107 15 1 0 84 March 2, 2026 at 06:57:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2530 108 637 27 119 36 0 2333 17 2 0 81 1 0 0 7 481 12 629 34 135 57 0 3418 25 1 0 74 2 0 0 0 471 8 652 22 127 47 0 2199 18 1 0 81 3 0 0 0 441 9 538 40 117 46 0 2952 40 1 0 59 4 0 0 17 631 108 537 32 113 50 0 2651 30 1 0 69 5 0 0 0 406 16 464 25 91 82 0 2501 25 1 0 74 6 0 0 814 526 119 588 28 110 34 0 4696 23 2 0 75 7 0 0 0 357 11 412 20 95 27 0 2128 25 1 0 74 March 2, 2026 at 06:57:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2406 111 430 29 89 75 0 2252 27 2 0 71 1 0 0 0 370 10 520 27 116 15 0 2878 20 1 0 78 2 0 0 7 378 7 487 19 87 12 0 1827 13 1 0 86 3 0 0 0 364 18 423 39 73 15 0 2150 42 1 0 57 4 0 0 16 517 109 388 21 81 79 0 2535 38 1 0 61 5 0 0 0 278 8 302 15 65 14 0 1801 27 1 0 72 6 0 0 620 423 116 381 25 84 17 0 1978 24 1 0 75 7 0 0 0 254 6 293 16 61 8 0 2198 10 1 0 89 March 2, 2026 at 06:57:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2597 110 688 45 144 128 0 2881 35 2 0 63 1 0 0 0 536 13 746 43 169 146 0 4408 26 2 0 72 2 0 0 0 502 6 652 25 130 79 0 2662 20 1 0 78 3 0 0 7 603 71 776 41 173 91 0 3289 33 1 0 66 4 0 0 16 740 117 761 33 162 149 0 3194 25 2 0 74 5 0 0 0 453 10 567 25 99 96 0 2399 26 1 0 73 6 0 0 844 530 106 626 31 141 98 0 3097 23 2 0 75 7 0 0 0 433 12 571 27 116 102 0 2533 16 1 0 84 March 2, 2026 at 06:57:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2520 111 637 30 124 62 0 2589 22 2 0 76 1 4 0 0 461 8 612 26 127 38 0 4583 17 2 0 81 2 0 0 0 437 5 612 27 120 33 0 2305 22 1 0 76 3 2 0 0 396 4 502 42 115 90 0 2578 35 1 0 64 4 27 0 9 592 108 498 26 112 54 0 2722 36 1 0 63 5 2 0 0 403 18 510 18 94 21 0 2485 18 1 0 81 6 0 0 732 480 108 504 29 118 48 0 2860 30 1 0 69 7 4 0 0 390 14 511 21 92 124 0 2683 23 1 0 76 March 2, 2026 at 06:57:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2415 104 477 25 98 60 0 1684 26 2 0 73 1 0 0 0 371 11 464 25 108 30 0 2144 34 1 0 64 2 0 0 1 328 11 388 26 84 26 0 1742 28 1 0 71 3 0 0 0 309 4 376 31 94 50 0 2678 37 1 0 62 4 0 0 3 536 113 428 23 93 71 0 2501 23 1 0 76 5 0 0 0 358 19 449 13 78 31 0 1780 14 1 0 85 6 28 0 613 422 118 427 23 100 14 0 3977 24 1 0 74 7 1 0 0 254 4 311 9 65 45 0 1737 15 1 0 84 March 2, 2026 at 06:57:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2555 106 692 35 142 29 0 2634 20 2 0 78 1 0 0 0 484 6 629 39 142 27 0 3257 37 1 0 62 2 2 0 0 497 18 637 21 123 73 0 2654 22 1 0 76 3 0 0 0 522 16 666 34 149 48 0 3084 27 1 0 71 4 0 0 2 639 111 525 44 130 37 0 2967 31 1 0 68 5 0 0 0 385 10 467 26 108 54 0 2531 23 1 0 76 6 0 0 850 519 115 613 27 125 72 0 4478 24 2 0 74 7 0 0 0 408 12 541 24 115 34 0 2547 20 1 0 79 March 2, 2026 at 06:57:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2554 114 666 33 140 31 0 2442 24 2 0 74 1 0 0 0 484 8 597 37 140 106 0 2874 37 1 0 62 2 0 0 0 444 8 524 26 119 20 0 2352 19 1 0 79 3 0 0 0 468 7 632 42 139 84 0 2945 28 1 0 71 4 0 0 3 632 114 556 37 123 21 0 2994 33 1 0 66 5 0 0 0 451 14 592 28 107 93 0 2362 24 1 0 75 6 0 0 823 551 114 676 27 134 25 0 4526 17 2 0 81 7 0 0 14 392 10 484 29 99 53 0 2989 26 1 0 74 March 2, 2026 at 06:57:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2547 112 704 32 138 107 0 2429 21 2 0 77 1 0 0 0 511 4 705 32 163 98 0 2608 25 2 0 73 2 0 0 0 461 11 614 28 135 109 0 2249 23 1 0 76 3 0 0 0 463 48 528 39 121 69 0 3242 29 1 0 70 4 0 0 3 620 109 542 30 113 66 0 2450 35 1 0 64 5 0 0 0 454 21 621 18 111 122 0 2327 19 1 0 80 6 0 0 717 530 113 615 32 124 99 0 3720 30 2 0 69 7 0 0 21 400 10 566 21 106 108 0 2932 20 1 0 79 March 2, 2026 at 06:57:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2481 110 565 23 118 21 0 2374 18 2 0 80 1 0 0 0 416 12 514 29 102 33 0 3764 23 2 0 75 2 0 0 0 357 5 442 19 87 28 0 1865 22 1 0 77 3 0 0 0 374 15 458 29 97 51 0 2456 26 1 0 73 4 0 0 3 555 112 434 28 90 39 0 1922 31 1 0 68 5 0 0 0 311 8 358 17 70 36 0 1985 29 1 0 71 6 0 0 703 464 118 424 29 86 28 0 2278 37 1 0 61 7 0 0 7 310 14 370 11 70 56 0 2307 14 1 0 85 March 2, 2026 at 06:57:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2567 111 656 35 134 80 0 3527 33 2 0 65 1 0 0 0 521 12 698 44 134 37 0 4228 29 2 0 69 2 0 0 0 505 3 648 24 110 17 0 2336 11 1 0 87 3 0 0 0 484 11 626 29 128 50 0 3282 29 1 0 70 4 0 0 2 640 109 553 31 115 77 0 2730 32 1 0 66 5 0 0 0 394 4 463 21 88 22 0 2703 24 1 0 75 6 0 0 872 542 112 662 27 117 13 0 2852 32 2 0 66 7 0 0 7 438 20 556 19 93 58 0 2909 15 1 0 84 March 2, 2026 at 06:57:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2554 115 655 27 146 71 0 3323 26 2 0 72 1 0 0 0 513 6 671 39 142 53 0 3249 29 2 0 70 2 0 0 0 517 15 670 25 122 40 0 3883 26 2 0 72 3 0 0 0 510 12 672 43 140 76 0 3334 33 1 0 66 4 0 0 1 657 112 577 36 138 58 0 2351 30 1 0 69 5 0 0 0 425 9 506 33 115 55 0 2402 22 1 0 77 6 0 0 887 530 105 585 42 131 41 0 2642 26 2 0 72 7 0 0 7 391 12 460 17 108 75 0 2669 19 1 0 80 March 2, 2026 at 06:57:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 15 2565 105 702 29 138 30 0 2819 17 2 0 81 1 0 0 0 518 17 671 41 153 42 0 3170 23 2 0 75 2 0 0 0 473 3 634 40 117 45 0 4108 28 2 0 70 3 0 0 0 503 11 681 28 143 38 0 3099 21 1 0 78 4 0 0 3 635 109 558 39 141 36 0 2872 36 1 0 63 5 0 0 0 474 20 601 22 118 41 0 2689 13 1 0 86 6 0 0 871 493 103 516 39 107 64 0 3176 42 2 0 56 7 0 0 7 423 19 502 25 82 33 0 2741 28 1 0 71 March 2, 2026 at 06:57:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2613 107 727 32 160 103 0 3168 26 2 0 71 1 0 0 0 612 13 801 37 164 117 0 3102 24 2 0 74 2 0 0 0 543 16 748 25 146 104 0 3908 13 2 0 86 3 0 0 0 555 71 661 34 160 79 0 3332 33 1 0 65 4 0 0 3 694 108 640 37 140 125 0 3157 34 2 0 64 5 0 0 0 465 7 616 25 129 136 0 2727 18 1 0 81 6 0 0 913 577 111 670 41 137 123 0 2996 35 2 0 63 7 0 0 7 500 10 685 30 126 102 0 2644 21 1 0 78 March 2, 2026 at 06:57:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2570 105 656 33 123 54 0 2499 28 2 0 69 1 0 0 0 522 7 669 40 158 74 0 3710 29 2 0 69 2 0 0 0 526 13 694 30 137 41 0 4431 23 2 0 76 3 0 0 0 526 13 717 33 149 60 0 3683 25 1 0 73 4 0 0 3 661 111 536 30 133 60 0 2592 30 1 0 69 5 0 0 0 480 16 571 23 121 95 0 2322 15 1 0 84 6 0 0 927 504 110 562 26 126 30 0 2779 33 2 0 65 7 0 0 7 411 11 493 24 108 38 0 2858 18 1 0 81 March 2, 2026 at 06:57:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2544 105 588 46 115 35 0 3441 34 2 0 64 1 0 0 0 534 14 723 23 149 36 0 3489 26 2 0 72 2 0 0 0 494 10 600 28 120 71 0 3035 17 1 0 81 3 0 0 0 459 8 607 42 140 54 0 4747 32 2 0 66 4 0 0 3 651 106 553 34 140 51 0 2673 36 1 0 63 5 0 0 0 469 9 582 21 117 44 0 2463 17 1 0 82 6 0 0 927 516 116 549 39 132 65 0 2836 30 2 0 68 7 0 0 0 441 10 549 19 105 43 0 2331 19 1 0 80 March 2, 2026 at 06:57:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2552 109 587 39 147 43 0 3114 34 2 0 64 1 0 0 14 544 9 737 29 175 23 0 3151 21 2 0 77 2 0 0 0 479 9 550 28 126 37 0 3106 28 1 0 71 3 0 0 0 466 7 595 35 131 68 0 5365 39 2 0 59 4 0 0 2 696 109 670 35 160 49 0 2980 26 1 0 72 5 0 0 0 499 27 615 25 115 47 0 2611 17 1 0 82 6 0 0 942 550 113 616 27 133 52 0 2718 21 2 0 77 7 0 0 0 413 8 533 28 117 49 0 2437 24 1 0 75 March 2, 2026 at 06:57:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2653 106 799 46 184 33 0 3429 30 2 0 67 1 0 0 21 622 10 828 45 185 70 0 4684 36 2 0 62 2 0 0 0 600 9 765 39 163 22 0 3458 29 2 0 69 3 0 0 0 564 13 728 50 171 138 0 3750 41 2 0 58 4 0 0 3 808 117 851 36 169 28 0 4568 21 2 0 77 5 0 0 0 548 11 757 21 140 63 0 2936 8 1 0 90 6 1 0 1038 596 110 764 27 175 44 0 3452 21 2 0 77 7 0 0 0 492 11 620 26 121 130 0 3507 21 1 0 78 March 2, 2026 at 06:57:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2624 107 742 37 168 98 0 2589 22 2 0 75 1 0 0 0 593 13 808 44 168 169 0 5091 29 2 0 69 2 0 0 7 556 13 677 22 152 77 0 3082 20 1 0 79 3 0 0 0 570 48 795 25 161 78 0 3203 30 2 0 69 4 0 0 16 720 117 697 31 156 112 0 2966 27 1 0 72 5 0 0 0 479 16 608 32 143 162 0 3139 26 1 0 73 6 0 0 957 582 109 719 41 158 102 0 2958 30 2 0 68 7 0 0 0 498 6 688 23 128 51 0 2321 20 1 0 79 March 2, 2026 at 06:57:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2661 104 849 29 167 73 0 3316 21 2 0 77 1 0 0 7 584 9 782 40 179 45 0 5358 35 2 0 63 2 0 0 0 563 14 705 29 150 140 0 3035 25 2 0 74 3 0 0 0 565 14 755 45 169 53 0 3415 33 2 0 65 4 0 0 17 762 114 735 31 161 57 0 4143 36 2 0 63 5 0 0 0 542 25 703 23 135 27 0 3188 15 1 0 84 6 0 0 1010 602 109 759 39 157 136 0 3361 28 2 0 70 7 0 0 0 451 5 594 22 129 34 0 2692 16 1 0 83 March 2, 2026 at 06:57:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2554 109 590 37 131 66 0 3236 32 2 0 66 1 0 0 7 553 11 718 40 172 31 0 4241 40 2 0 58 2 0 0 0 586 16 776 29 151 65 0 4925 23 2 0 76 3 0 0 0 587 11 795 26 155 32 0 3128 25 2 0 74 4 0 0 16 752 113 728 31 162 76 0 3222 23 1 0 76 5 0 0 0 459 10 555 25 112 41 0 2553 16 1 0 83 6 0 0 1026 551 109 662 37 140 50 0 3085 32 2 0 66 7 0 0 0 474 9 629 13 112 26 0 2764 14 1 0 85 March 2, 2026 at 06:57:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2706 109 893 53 169 79 0 3262 29 3 0 68 1 0 0 0 645 8 830 38 172 90 0 4026 28 2 0 71 2 0 0 21 622 26 836 31 149 47 0 5466 22 2 0 76 3 0 0 0 682 20 967 41 196 98 0 4171 21 2 0 77 4 0 0 3 750 106 698 34 157 100 0 3355 36 2 0 63 5 0 0 0 560 7 724 21 149 81 0 3530 21 1 0 77 6 0 0 1124 589 105 740 37 170 67 0 3939 26 2 0 72 7 0 0 0 500 6 626 24 132 93 0 3661 22 1 0 76 March 2, 2026 at 06:57:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2730 105 917 39 181 61 0 3851 33 3 0 64 1 0 0 0 665 7 898 42 227 111 0 4222 29 2 0 69 2 0 0 21 638 9 866 49 169 43 0 4040 28 2 0 70 3 0 0 0 639 18 891 50 195 71 0 6073 37 2 0 60 4 0 0 2 885 115 968 33 198 45 0 3745 23 2 0 75 5 0 0 0 622 17 807 25 172 110 0 3818 21 1 0 78 6 0 0 1137 646 118 849 29 198 54 0 4261 20 2 0 77 7 0 0 0 548 6 746 20 149 56 0 3726 15 1 0 83 March 2, 2026 at 06:57:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2829 104 1108 41 250 88 0 3317 17 3 0 80 1 0 0 0 790 12 1093 45 245 111 0 4577 28 2 0 70 2 0 0 21 774 22 1067 32 206 126 0 4463 18 2 0 80 3 0 0 0 767 68 978 54 215 73 0 4773 38 2 0 60 4 0 0 2 925 107 973 51 249 88 0 4511 37 2 0 61 5 0 0 0 677 2 937 43 190 129 0 5418 24 2 0 74 6 0 0 1251 734 114 1016 40 216 113 0 4091 31 2 0 67 7 0 0 0 674 14 970 23 191 97 0 3697 13 1 0 85 March 2, 2026 at 06:57:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2852 106 1097 46 234 61 0 4577 25 3 0 72 1 0 0 0 849 8 1231 40 259 58 0 5252 21 2 0 76 2 0 0 14 767 19 1030 32 207 73 0 4829 22 2 0 76 3 0 0 7 756 6 1025 55 230 125 0 5110 42 2 0 56 4 0 0 3 972 109 1093 50 251 69 0 4846 27 2 0 71 5 0 0 0 699 10 965 30 198 49 0 5842 19 2 0 80 6 0 0 1333 781 110 1104 38 232 62 0 4938 31 3 0 66 7 0 0 0 665 12 905 31 175 106 0 4332 23 1 0 76 March 2, 2026 at 06:57:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 148 0 0 2993 105 1403 54 282 90 0 5555 25 3 0 72 1 3 0 0 951 2 1406 78 308 139 0 5569 34 3 0 63 2 3 0 14 880 7 1248 56 233 86 0 5492 28 2 0 70 3 15 0 0 969 18 1513 58 303 122 0 6097 30 3 0 68 4 108 0 9 1098 116 1330 41 284 86 1 5953 25 2 0 72 5 0 0 0 734 5 1059 32 225 131 0 4617 26 2 0 72 6 39 0 1277 878 122 1362 45 284 88 1 6518 22 3 0 75 7 7 0 0 703 10 973 34 194 117 0 5175 19 2 0 79 March 2, 2026 at 06:57:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 101 107 1 2 0 0 11 0 1 0 99 1 0 0 0 31 2 26 0 5 4 0 27 0 0 0 100 2 0 0 14 16 3 12 0 1 2 0 588 0 0 0 100 3 0 0 0 120 52 119 2 5 1 0 23 0 0 0 100 4 0 0 9 232 108 23 1 3 1 0 575 0 0 0 100 5 0 0 0 22 4 16 0 3 2 0 21 0 0 0 100 6 0 0 32 227 107 56 1 3 1 0 1449 0 1 0 99 7 0 0 0 36 6 36 1 4 0 0 311 0 0 0 100 March 2, 2026 at 06:57:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 116 0 2 0 0 0 0 1 0 99 1 0 0 0 17 0 14 0 0 1 0 7 0 0 0 100 2 0 0 14 9 3 6 0 0 1 0 564 0 0 0 100 3 0 0 0 115 54 112 0 0 0 0 7 0 0 0 100 4 0 0 9 214 105 6 0 0 0 0 554 0 0 0 100 5 0 0 0 14 5 4 0 0 0 0 5 0 0 0 100 6 0 0 4 226 108 54 2 0 0 0 1442 0 0 0 99 7 0 0 0 25 5 22 0 1 0 0 307 0 0 0 100 March 2, 2026 at 06:57:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2188 101 256 0 8 40 0 1 0 1 0 99 1 0 0 0 47 1 70 0 11 52 0 4 0 0 0 100 2 0 0 14 36 4 63 0 10 33 0 568 0 0 0 100 3 0 0 0 179 91 169 0 15 53 0 16 0 0 0 99 4 0 0 9 249 105 77 0 15 50 0 554 0 0 0 100 5 0 0 0 38 0 66 0 13 49 0 0 0 0 0 100 6 0 0 4 273 114 136 1 8 52 0 1420 0 0 0 99 7 0 0 0 39 5 60 0 9 38 0 300 0 0 0 100 March 2, 2026 at 06:57:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 298 0 86 2140 101 150 0 18 19 9 146 0 1 0 98 1 23 0 16 67 5 67 0 14 4 12 90 0 1 0 99 2 16 0 14 69 6 37 2 8 7 2 614 0 0 0 99 3 9 0 10 67 10 50 1 6 2 3 51 0 0 0 100 4 4 0 28 246 105 23 0 4 5 0 579 0 0 0 100 5 6 0 13 49 4 26 1 6 2 4 48 0 0 0 100 6 2 0 22 338 152 181 5 11 2 4 1490 0 1 0 99 7 12 0 38 46 7 45 3 10 11 3 388 0 0 0 100 March 2, 2026 at 06:57:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 65 0 2 0 0 1 0 1 0 99 1 0 0 7 18 1 14 0 3 0 0 2 0 0 0 100 2 0 0 14 70 3 68 0 2 2 0 566 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 9 215 105 6 0 0 1 0 554 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 6 0 0 4 210 102 32 1 0 1 0 1336 0 0 0 100 7 0 0 0 17 5 12 0 0 0 0 300 0 0 0 100 March 2, 2026 at 06:57:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 101 15 0 1 0 0 1 0 1 0 99 1 0 0 0 113 0 106 0 0 0 0 0 0 0 0 100 2 0 0 14 11 3 8 0 1 0 0 568 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 9 217 105 6 0 0 0 0 554 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 4 214 103 34 1 0 0 0 1334 0 0 0 100 7 0 0 0 19 5 12 0 0 0 0 299 0 0 0 100 March 2, 2026 at 06:57:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 100 118 0 1 0 0 8 0 1 0 99 1 0 0 0 15 2 8 0 0 0 0 3 0 0 0 100 2 0 0 14 12 3 8 0 0 0 0 564 0 0 0 100 3 0 0 0 110 50 108 0 1 0 0 0 0 0 0 100 4 0 0 9 215 105 6 0 0 1 0 553 0 0 0 100 5 0 0 0 18 6 10 0 0 1 0 15 0 0 0 100 6 0 0 4 220 105 42 1 0 1 0 1340 0 0 0 100 7 0 0 0 19 5 14 0 1 0 0 300 0 0 0 100 March 2, 2026 at 06:57:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 118 0 0 1 0 0 0 1 0 99 1 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 2 0 0 14 10 3 6 1 0 0 0 564 0 0 0 100 3 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 4 0 0 10 220 106 18 0 1 1 0 553 0 0 0 100 5 0 0 0 6 0 3 0 1 0 0 0 0 0 0 100 6 0 0 3 212 103 36 1 0 2 0 1332 0 0 0 100 7 0 0 0 19 6 16 1 1 1 0 300 0 0 0 100 March 2, 2026 at 06:57:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2349 0 1 2115 101 128 0 3 40 2 298 0 1 0 98 1 552 0 0 18 1 22 0 2 11 3 157 0 0 0 99 2 13 0 14 16 3 20 0 2 3 4 600 0 0 0 100 3 1540 0 8 113 50 116 1 2 9 2 74 1 0 0 99 4 35 0 10 230 107 30 0 5 4 2 612 0 0 0 100 5 1 0 0 12 2 8 0 2 1 0 14 0 0 0 100 6 0 0 4 216 102 44 1 2 0 0 1361 0 0 0 100 7 0 0 0 20 5 18 0 0 10 0 373 0 0 0 100 March 2, 2026 at 06:57:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 337 0 0 2695 103 1081 68 241 26 6 4401 19 3 0 78 1 388 0 0 653 1 1074 75 243 37 2 4769 20 2 0 78 2 165 0 14 631 7 970 54 205 49 3 5028 23 2 0 75 3 1347 0 0 635 2 1085 54 248 119 7 4868 21 2 0 77 4 342 0 9 805 111 962 51 233 42 4 4716 25 2 0 73 5 200 0 0 548 5 860 51 174 37 9 4044 19 1 0 79 6 395 0 675 704 106 1028 56 231 62 4 5976 16 2 0 81 7 224 0 0 618 38 989 53 185 124 4 4461 14 2 0 85 March 2, 2026 at 06:57:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 112 0 2 2 0 15 0 1 0 99 1 0 0 0 41 8 38 0 2 0 0 327 0 0 0 100 2 36 0 14 22 5 16 0 0 6 0 580 0 0 0 100 3 0 0 0 13 0 12 0 2 1 0 17 0 0 0 100 4 0 0 9 223 106 12 0 3 4 0 574 0 0 0 100 5 0 0 0 13 0 4 0 1 0 0 1 0 0 0 100 6 0 0 32 218 103 40 1 2 1 0 1415 0 0 0 100 7 0 0 0 127 54 125 0 2 0 0 18 0 0 0 100 March 2, 2026 at 06:57:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 112 1 1 0 0 11 0 1 0 99 1 0 0 0 38 11 34 0 1 0 0 313 0 0 0 100 2 0 0 14 11 3 8 1 0 2 0 566 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 2 0 0 0 100 4 0 0 9 214 105 6 0 0 5 0 554 0 0 0 100 5 0 0 0 10 5 0 0 0 0 0 0 0 0 0 100 6 0 0 4 219 105 42 1 0 0 0 1419 0 0 0 100 7 0 0 0 116 52 114 1 1 0 0 1 0 0 0 100 March 2, 2026 at 06:57:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2212 100 320 0 14 53 0 0 0 1 0 99 1 0 0 0 77 10 116 0 16 67 0 311 0 0 0 99 2 0 0 14 49 3 92 0 11 78 0 568 0 0 0 100 3 0 0 0 111 62 84 0 13 67 0 0 0 0 0 100 4 0 0 9 250 106 77 0 15 58 0 554 0 0 0 100 5 0 0 0 44 0 78 0 15 56 0 0 0 0 0 100 6 0 0 4 257 103 124 2 14 67 0 1414 0 1 0 99 7 0 0 0 157 53 196 0 12 60 0 0 0 0 0 100 March 2, 2026 at 06:58:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 17 2141 102 153 0 11 7 3 82 0 1 0 99 1 311 0 3 64 13 91 1 16 11 13 494 0 0 0 99 2 5 0 23 33 6 43 2 6 12 5 612 0 0 0 100 3 3 0 2 21 2 27 2 7 2 5 56 0 0 0 100 4 1 0 21 223 105 20 5 4 8 1 576 0 0 0 100 5 11 0 8 34 6 35 1 11 3 4 61 0 0 0 100 6 1 0 10 239 104 69 4 7 2 2 1501 0 0 0 99 7 6 0 8 134 54 140 0 6 1 3 56 0 1 0 99 March 2, 2026 at 06:58:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 277 0 0 0 0 332 0 1 0 99 1 0 0 0 18 3 12 0 2 0 0 302 0 0 0 100 2 0 0 14 12 3 8 0 1 2 0 569 0 0 0 100 3 0 0 0 11 1 2 0 0 0 0 2 0 0 0 100 4 0 0 16 217 105 8 0 1 0 0 553 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 4 212 103 34 1 0 0 0 1336 0 0 0 100 7 0 0 0 111 52 106 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 101 99 0 4 0 0 1 0 1 0 99 1 0 0 0 33 2 22 0 1 2 0 300 0 0 0 100 2 0 0 14 16 3 14 1 1 5 0 561 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 9 218 105 8 0 1 4 0 553 0 0 0 100 5 0 0 7 13 3 8 0 1 0 0 4 0 0 0 100 6 0 0 4 217 103 40 1 3 0 0 1334 0 0 0 99 7 0 0 0 115 52 112 0 0 0 0 2 0 0 0 100 March 2, 2026 at 06:58:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 100 120 0 1 0 0 0 0 1 0 99 1 0 0 0 26 7 20 0 0 0 0 312 0 0 0 100 2 0 0 14 13 3 10 0 1 9 0 573 0 0 0 100 3 0 0 0 9 0 12 0 1 2 0 0 0 0 0 100 4 0 0 9 216 105 8 0 1 1 0 556 0 0 0 100 5 0 0 0 12 4 2 0 0 0 0 0 0 0 0 100 6 0 0 4 218 104 44 1 1 1 0 1343 0 0 0 100 7 0 0 0 116 52 110 0 0 2 0 0 0 0 0 100 March 2, 2026 at 06:58:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 118 0 0 2 0 0 0 1 0 99 1 0 0 0 16 4 12 0 0 0 0 304 0 0 0 100 2 0 0 14 10 3 8 0 1 3 0 568 0 0 0 100 3 0 0 0 8 1 4 0 0 2 0 0 0 0 0 100 4 0 0 9 214 105 6 1 0 3 0 553 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 4 220 107 44 1 0 5 0 1336 0 0 0 100 7 0 0 0 114 53 112 0 0 2 0 21 0 0 0 100 March 2, 2026 at 06:58:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 341 0 0 2372 100 507 7 44 57 24 1056 5 2 0 93 1 1939 0 1 297 8 416 20 63 57 17 1653 13 5 0 82 2 623 0 14 321 11 463 3 58 34 16 1828 6 1 0 93 3 687 0 8 280 5 377 7 56 59 16 1265 7 3 0 90 4 234 0 10 482 105 407 10 58 72 18 1468 4 1 0 95 5 110 0 0 222 3 295 6 52 44 11 832 4 1 0 95 6 118 0 507 361 103 331 8 48 41 4 2228 6 1 0 92 7 49 0 0 271 35 306 7 35 22 6 605 2 0 0 98 March 2, 2026 at 06:58:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 83 0 0 2695 103 839 23 116 35 1 1806 23 3 0 74 1 96 0 0 737 9 923 26 117 43 0 1951 19 2 0 79 2 86 0 0 623 14 727 14 87 61 1 2002 15 2 0 83 3 94 0 42 766 13 1047 20 105 123 1 2450 18 2 0 80 4 74 0 2 839 127 757 18 96 42 0 2000 13 2 0 85 5 58 0 7 521 9 577 15 72 46 1 1742 14 1 0 85 6 114 0 1419 570 107 719 19 81 65 0 3675 19 3 0 78 7 56 0 0 483 9 523 5 60 148 0 1575 7 1 0 92 March 2, 2026 at 06:58:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 95 0 0 2647 109 723 16 96 34 0 1855 22 3 0 76 1 110 0 0 600 14 692 22 101 36 0 1904 21 2 0 77 2 86 0 0 658 16 759 15 79 48 0 1605 10 2 0 88 3 114 0 21 550 17 618 17 80 49 0 2317 11 2 0 87 4 79 0 2 772 114 654 13 89 38 0 1879 17 1 0 82 5 36 0 0 521 5 576 13 60 32 0 1302 11 1 0 88 6 136 0 1418 627 116 814 17 74 51 0 3482 20 3 0 78 7 108 0 0 585 15 698 16 53 68 0 1684 15 1 0 83 March 2, 2026 at 06:58:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 7 2689 118 778 24 103 45 0 1869 15 3 0 83 1 35 0 0 668 7 846 22 99 28 0 1955 22 2 0 75 2 12 0 0 573 7 655 23 71 29 0 1740 15 2 0 83 3 19 0 0 631 7 794 25 95 74 0 2136 18 2 0 80 4 12 0 2 877 114 862 24 102 52 0 2104 21 2 0 77 5 16 0 0 514 17 543 12 67 54 0 1883 10 1 0 88 6 29 0 1431 608 126 748 22 87 48 0 3605 16 3 0 81 7 26 0 0 551 15 634 8 73 56 0 1725 10 1 0 89 March 2, 2026 at 06:58:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2702 110 821 23 119 99 0 1766 19 3 0 78 1 4 0 0 741 14 939 17 120 88 0 1880 19 2 0 79 2 3 0 0 625 6 783 21 89 122 0 1689 16 2 0 82 3 3 0 0 756 81 926 19 120 95 0 2113 19 2 0 80 4 2 0 2 853 112 833 15 117 135 0 1802 14 2 0 85 5 4 0 0 609 17 725 12 84 83 0 2024 13 2 0 85 6 2 0 1425 671 119 883 24 101 108 0 3530 19 3 0 78 7 1 0 14 536 6 604 8 78 93 0 1768 9 1 0 90 March 2, 2026 at 06:58:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 14 2687 110 776 24 116 39 0 2459 19 3 0 78 1 36 0 2 694 16 841 26 98 43 0 2009 26 2 0 72 2 37 0 0 606 11 702 15 71 87 0 1700 14 2 0 84 3 46 0 7 641 15 769 18 86 31 0 2372 17 2 0 81 4 49 0 2 803 113 718 24 91 48 0 1841 17 2 0 81 5 22 0 0 559 27 628 9 63 68 0 1741 10 1 0 89 6 28 0 1418 633 116 822 14 93 55 0 2193 16 2 0 81 7 21 0 0 580 17 711 10 71 21 0 2887 10 2 0 88 March 2, 2026 at 06:58:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2748 116 870 18 97 38 0 1732 24 3 0 73 1 2 0 14 668 21 823 28 104 66 0 2269 17 2 0 81 2 5 0 0 603 13 634 14 68 62 0 1568 17 2 0 81 3 2 0 7 677 24 838 22 104 49 0 2353 20 2 0 78 4 1 0 2 749 119 615 11 101 59 0 1597 9 1 0 90 5 1 0 0 540 10 587 18 43 51 0 1910 15 1 0 83 6 2 0 1419 570 116 681 10 77 66 0 2077 14 2 0 84 7 0 0 0 508 6 590 10 51 57 0 2923 11 1 0 88 March 2, 2026 at 06:58:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2663 111 699 14 97 16 0 1622 16 3 0 82 1 1 0 14 708 23 821 26 92 79 0 2108 20 2 0 78 2 4 0 0 524 15 538 11 80 21 0 1369 13 1 0 85 3 2 0 7 681 28 858 22 94 49 0 2282 14 2 0 85 4 6 0 2 852 114 810 15 95 37 0 2422 16 2 0 82 5 0 0 0 521 9 589 17 56 56 0 2692 12 1 0 87 6 5 0 1418 590 117 703 19 82 29 0 2082 24 2 0 74 7 3 0 0 521 7 591 10 64 63 0 1652 13 1 0 86 March 2, 2026 at 06:58:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 54 0 0 2677 110 775 33 104 70 0 1931 20 3 0 77 1 90 0 14 733 13 953 37 129 46 0 2347 21 2 0 77 2 53 0 0 654 21 748 17 90 35 0 1669 18 2 0 80 3 61 0 7 689 36 832 26 93 65 0 2263 17 2 0 81 4 66 0 2 822 125 746 25 109 64 0 3437 18 2 0 81 5 47 0 0 491 22 463 16 64 36 0 1791 13 1 0 86 6 58 0 1418 621 112 801 18 95 62 0 2389 12 2 0 86 7 46 0 0 564 10 662 16 71 62 0 1438 10 1 0 89 March 2, 2026 at 06:58:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 107 0 0 2725 109 886 19 100 98 0 1719 20 3 0 77 1 116 0 0 702 15 855 19 123 56 0 1700 20 2 0 78 2 60 0 14 666 27 808 15 81 113 1 1899 14 2 0 84 3 79 0 0 671 76 768 14 110 91 0 1674 15 2 0 84 4 38 0 9 856 119 856 17 115 123 0 3581 10 2 0 88 5 84 0 0 565 12 664 17 82 72 1 1625 15 1 0 84 6 43 0 1418 630 118 786 19 105 122 0 1983 16 2 0 81 7 86 0 0 589 8 717 21 63 43 0 1852 16 1 0 83 March 2, 2026 at 06:58:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 90 0 0 2758 112 922 20 104 68 1 2342 21 3 0 76 1 123 0 0 661 13 815 24 110 24 0 1983 23 2 0 75 2 92 0 0 583 18 639 21 87 47 0 1563 21 2 0 77 3 57 0 14 692 13 908 21 109 45 0 2163 20 2 0 78 4 31 0 9 751 124 621 10 102 62 0 3366 9 2 0 89 5 41 0 0 535 20 566 18 60 42 0 1801 11 1 0 88 6 42 0 1417 615 122 761 14 89 49 0 2028 9 2 0 88 7 69 0 0 506 13 550 17 65 47 0 1648 14 1 0 84 March 2, 2026 at 06:58:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2706 124 759 16 96 36 0 1810 18 3 0 79 1 1 0 0 702 26 855 25 103 39 0 2177 21 2 0 77 2 4 0 0 588 24 630 15 67 30 0 1685 20 2 0 79 3 1 0 14 592 17 664 21 91 48 0 1946 13 2 0 85 4 5 0 8 867 123 811 22 88 29 0 3441 18 2 0 80 5 1 0 0 542 17 565 12 73 61 0 1768 14 1 0 85 6 6 0 1420 593 120 688 11 86 47 0 1865 12 2 0 86 7 0 0 0 560 14 631 20 58 52 0 1559 12 1 0 87 March 2, 2026 at 06:58:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2678 114 721 18 97 18 0 1777 22 3 0 75 1 3 0 0 723 20 883 17 122 33 0 1878 15 2 0 83 2 5 0 0 596 17 666 20 87 13 0 2307 22 2 0 76 3 3 0 0 706 21 909 21 95 84 0 1970 16 2 0 82 4 7 0 23 800 124 669 17 87 13 0 2233 17 1 0 81 5 1 0 0 574 23 630 9 67 38 0 1579 11 1 0 87 6 5 0 1418 568 122 651 16 85 25 0 3075 12 2 0 85 7 0 0 0 544 12 625 9 52 66 0 2007 11 1 0 88 March 2, 2026 at 06:58:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1268 0 4 2464 106 571 22 81 68 14 1522 16 2 0 82 1 2580 0 14 425 32 614 17 83 32 16 1393 9 1 0 90 2 679 0 2 444 17 592 11 74 53 17 2381 7 1 0 92 3 220 0 18 309 10 444 18 65 25 12 1159 7 1 0 92 4 114 0 40 490 110 373 18 69 11 11 1668 10 2 0 89 5 119 0 19 318 54 362 12 60 32 10 1019 11 1 0 88 6 405 0 512 434 109 443 13 76 48 10 2679 11 2 0 87 7 2699 0 4 346 17 531 13 54 66 17 1591 9 1 0 89 March 2, 2026 at 06:58:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 101 215 0 20 69 0 1 0 1 0 99 1 0 0 0 171 52 219 0 23 73 0 2 0 0 0 100 2 0 0 0 65 5 102 1 14 67 0 607 0 0 0 100 3 0 0 0 121 75 224 0 15 66 0 8 0 0 0 100 4 0 0 23 280 106 121 0 13 59 0 590 0 0 0 99 5 35 0 0 72 9 110 0 14 53 0 16 0 0 0 100 6 7 0 18 253 102 117 1 15 59 0 1422 0 1 0 99 7 0 0 7 45 1 73 1 15 42 0 302 0 0 0 100 March 2, 2026 at 06:58:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 124 0 1 1 0 3 0 1 0 99 1 0 0 0 117 52 114 0 1 1 0 0 0 0 0 100 2 0 0 0 18 5 12 0 2 3 0 602 0 0 0 100 3 0 0 0 13 3 4 0 0 1 0 1 0 0 0 100 4 0 0 28 214 105 6 0 0 1 0 525 0 0 0 100 5 0 0 7 30 11 23 0 0 1 0 10 0 0 0 100 6 0 0 7 214 103 34 1 0 2 0 1420 0 0 0 100 7 0 0 0 14 2 4 0 0 5 0 294 0 0 0 100 March 2, 2026 at 06:58:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 116 0 0 0 0 1 0 1 0 99 1 0 0 0 51 21 44 0 0 1 0 0 0 0 0 100 2 0 0 0 22 5 20 0 2 1 0 601 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 4 0 0 23 215 106 8 1 0 0 0 529 0 0 0 100 5 0 0 7 27 10 22 0 0 0 0 10 0 0 0 100 6 0 0 4 209 102 32 0 0 2 0 1419 0 0 0 100 7 0 0 0 68 30 64 0 1 0 0 294 0 0 0 100 March 2, 2026 at 06:58:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1337 0 1 2237 119 346 13 49 30 9 750 1 1 0 98 1 635 0 4 156 6 260 10 45 21 12 755 8 1 0 91 2 205 0 9 186 4 348 18 56 22 21 1413 11 1 0 88 3 365 0 18 135 4 217 10 49 32 4 866 1 0 0 98 4 452 0 4 350 104 244 15 45 12 5 719 8 0 0 91 5 186 0 31 160 49 210 6 34 18 7 760 1 1 0 98 6 66 0 39 304 102 218 7 42 34 11 2496 1 1 0 98 7 5196 0 33 150 28 224 10 27 89 8 1438 6 2 0 92 March 2, 2026 at 06:58:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2136 121 152 0 4 0 0 9 0 1 0 99 1 0 0 0 76 31 70 0 2 0 0 17 0 0 0 100 2 36 0 0 43 12 34 3 4 13 0 630 0 0 0 99 3 0 0 14 21 2 24 0 4 1 0 278 0 0 0 100 4 0 0 2 223 104 8 0 0 0 0 9 0 0 0 100 5 0 0 7 40 9 30 0 0 0 0 280 0 0 0 100 6 0 0 39 231 106 56 1 3 4 0 1444 0 0 0 99 7 0 0 0 22 1 20 0 5 19 0 307 0 0 0 100 March 2, 2026 at 06:58:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 101 183 0 15 51 0 0 0 1 0 99 1 0 0 0 154 51 200 0 15 66 0 0 0 0 0 100 2 0 0 0 76 12 118 0 13 83 0 613 0 0 0 99 3 0 0 14 116 77 217 0 16 51 0 266 0 0 0 100 4 0 0 2 256 102 96 0 19 89 0 0 0 0 0 100 5 0 0 7 66 2 113 0 15 84 0 260 0 0 0 100 6 0 0 4 277 105 158 1 26 61 0 1421 0 1 0 99 7 0 0 7 41 3 66 0 15 49 0 315 0 0 0 100 March 2, 2026 at 06:58:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 0 0 0 0 0 1 0 99 1 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 2 0 0 0 34 14 28 0 0 2 0 610 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 4 0 0 2 212 103 2 0 0 0 0 2 0 0 0 100 5 0 0 7 17 2 12 0 0 0 0 260 0 0 0 100 6 0 0 4 214 104 36 1 0 0 0 1420 0 0 0 100 7 0 0 7 10 1 6 0 0 1 0 295 0 0 0 100 March 2, 2026 at 06:58:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2418 0 32 2331 102 497 7 79 74 49 1394 1 2 0 97 1 3032 0 133 316 39 570 9 90 75 49 1614 1 2 0 97 2 5238 0 18 277 15 475 11 78 68 49 1965 4 2 0 94 3 239 0 34 262 12 479 2 86 47 52 1738 0 1 0 99 4 138 0 9 400 104 346 4 61 45 32 822 0 1 0 99 5 3162 0 28 236 36 382 14 61 70 45 1403 2 2 0 96 6 993 0 8 379 104 421 6 75 48 48 2449 2 1 0 97 7 2217 0 30 200 2 404 11 71 106 34 1490 2 1 0 97 March 2, 2026 at 06:58:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2111 103 35 0 4 2 0 1 0 1 0 99 1 0 0 0 99 1 88 0 1 3 0 0 0 0 0 100 2 0 0 0 19 3 6 1 0 4 0 596 0 0 0 100 3 0 0 14 114 52 104 0 0 0 0 266 0 0 0 100 4 0 0 2 220 104 2 0 0 0 0 2 0 0 0 100 5 0 0 7 21 2 12 0 0 0 0 259 0 0 0 100 6 49 0 4 235 111 50 0 1 0 0 1345 0 0 0 99 7 0 0 0 22 1 16 0 1 8 0 294 0 0 0 100 March 2, 2026 at 06:58:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2146 103 108 0 2 1 0 5 0 1 0 99 1 0 0 231 17 1 12 1 2 1 0 8 0 0 0 100 2 0 0 0 64 3 26 1 2 5 0 627 0 0 0 100 3 1 0 14 144 52 106 0 0 0 0 268 0 0 0 100 4 0 0 2 252 103 8 0 1 0 0 7 0 0 0 100 5 0 0 7 58 8 14 0 1 0 0 263 0 0 0 100 6 0 0 4 261 110 48 1 0 0 0 1337 0 0 0 99 7 0 0 0 47 1 6 0 0 6 0 294 0 0 0 100 March 2, 2026 at 06:58:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 101 212 0 13 47 0 0 0 1 0 99 1 0 0 0 75 1 137 0 20 64 0 0 0 0 0 100 2 0 0 0 71 4 122 0 14 76 0 590 0 0 0 100 3 0 0 14 242 148 377 0 17 49 0 266 0 0 0 99 4 0 0 2 275 104 132 0 19 66 0 2 0 0 0 100 5 0 0 7 70 4 118 0 17 50 0 260 0 0 0 100 6 0 0 4 296 111 191 1 18 79 0 1338 0 1 0 99 7 0 0 0 47 1 82 0 16 46 0 294 0 0 0 100 March 2, 2026 at 06:58:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 116 0 0 2 0 3 0 1 0 99 1 0 0 0 17 2 16 0 2 1 0 1 0 0 0 100 2 0 0 0 16 5 8 0 0 3 0 602 0 0 0 100 3 0 0 14 112 54 106 0 0 1 0 267 0 0 0 100 4 0 0 7 212 103 2 0 0 1 0 1 0 0 0 100 5 0 0 7 20 3 12 0 0 1 0 260 0 0 0 100 6 0 0 7 233 113 56 2 1 1 0 1339 0 0 0 99 7 0 0 0 10 2 2 0 0 8 0 294 0 0 0 100 March 2, 2026 at 06:58:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 105 114 0 0 0 0 5 0 1 0 99 1 0 0 0 12 1 8 1 1 0 0 3 0 0 0 100 2 0 0 0 13 3 8 1 1 1 0 603 0 0 0 100 3 0 0 14 118 55 118 0 0 0 0 277 0 0 0 100 4 0 0 2 215 103 10 0 0 0 0 15 0 0 0 100 5 0 0 7 16 2 12 0 0 0 0 260 0 0 0 100 6 0 0 4 225 109 50 1 0 1 0 1342 0 0 0 99 7 0 0 0 8 1 4 0 0 1 0 294 0 0 0 100 March 2, 2026 at 06:58:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 2157 113 161 0 7 6 3 155 0 1 0 99 1 1915 0 0 57 2 78 2 13 11 9 486 0 1 0 99 2 746 0 116 34 3 81 0 14 10 12 839 0 0 0 99 3 94 0 14 140 46 152 0 8 6 16 379 0 0 0 100 4 44 0 2 241 102 36 0 9 7 3 73 0 0 0 100 5 0 0 7 39 2 22 1 4 3 1 291 0 0 0 100 6 7 0 4 238 104 55 1 2 3 0 1350 0 0 0 99 7 641 0 0 29 1 18 1 2 0 3 452 1 0 0 98 March 2, 2026 at 06:58:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 122 152 0 0 0 0 5 0 1 0 99 1 1 0 0 71 31 70 0 1 0 0 8 0 0 0 100 2 0 0 0 22 5 22 0 0 1 0 613 0 0 0 100 3 0 0 14 22 6 28 0 1 0 0 283 0 0 0 100 4 0 0 2 217 103 10 0 0 0 0 16 0 0 0 100 5 0 0 7 24 9 14 0 0 0 0 265 0 0 0 100 6 0 0 4 223 109 46 1 0 1 0 1415 0 0 0 99 7 0 0 0 11 1 8 0 0 1 0 294 0 0 0 100 March 2, 2026 at 06:58:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 108 0 1 1 0 0 0 1 0 99 1 0 0 0 109 51 106 0 1 0 0 0 0 0 0 100 2 0 0 0 13 3 10 0 0 1 0 600 0 0 0 100 3 0 0 14 17 7 16 0 1 0 0 274 0 0 0 100 4 0 0 2 216 104 10 0 0 0 0 6 0 0 0 100 5 0 0 7 19 3 16 0 0 0 0 260 0 0 0 100 6 0 0 4 215 104 40 1 1 2 0 1402 0 0 0 99 7 0 0 0 8 1 4 0 0 3 0 294 0 0 0 100 March 2, 2026 at 06:58:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 0 0 0 0 0 1 0 99 1 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 2 0 0 0 12 3 6 1 0 6 0 597 0 0 0 100 3 0 0 14 10 2 8 0 0 0 0 280 0 0 0 100 4 0 0 2 227 109 24 0 1 0 0 11 0 0 0 100 5 0 0 7 16 2 12 0 0 0 0 260 0 0 0 100 6 0 0 4 218 105 42 1 0 1 0 1402 0 0 0 100 7 0 0 0 8 1 4 0 0 3 0 294 0 0 0 100 March 2, 2026 at 06:58:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 143 0 0 2205 103 281 8 23 1 0 505 4 1 0 95 1 171 0 0 209 48 304 7 31 10 2 559 4 0 0 96 2 14 0 0 129 10 229 0 24 10 0 1055 1 0 0 99 3 616 0 14 93 4 166 2 20 7 2 661 1 1 0 99 4 243 0 2 308 103 183 4 17 6 0 490 4 0 0 96 5 221 0 7 104 33 116 1 17 11 1 713 1 0 0 99 6 118 0 32 333 110 277 8 17 20 1 2100 8 1 0 92 7 127 0 0 106 1 185 4 13 8 0 866 5 0 0 95 March 2, 2026 at 06:58:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2114 102 112 1 3 0 0 21 0 1 0 99 1 31 0 0 29 6 20 0 2 0 0 25 0 0 0 100 2 10 0 0 129 54 124 0 1 2 0 625 0 0 0 100 3 4 0 14 18 3 8 1 2 0 0 318 0 0 0 100 4 0 0 2 225 107 12 0 1 1 0 18 0 0 0 100 5 0 0 7 34 4 32 0 2 0 0 295 0 0 0 100 6 0 0 32 217 104 38 1 2 2 0 1433 0 0 0 99 7 0 0 0 23 4 19 0 3 2 0 322 0 0 0 100 March 2, 2026 at 06:58:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 110 0 0 0 0 0 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 120 55 116 0 0 0 0 608 0 0 0 100 3 0 0 14 10 2 10 0 0 0 0 274 0 0 0 100 4 0 0 2 219 107 10 0 0 0 0 8 0 0 0 100 5 0 0 7 28 7 22 1 0 0 0 270 0 0 0 100 6 0 0 4 216 103 44 1 1 0 0 1421 0 0 0 100 7 0 0 0 18 4 18 0 0 0 0 299 0 0 0 100 March 2, 2026 at 06:58:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 102 179 0 13 52 0 1 0 1 0 99 1 0 0 0 50 1 90 0 14 67 0 0 0 0 0 100 2 0 0 0 161 53 201 2 9 56 0 599 0 0 0 100 3 0 0 14 97 60 183 0 15 44 0 266 0 0 0 100 4 0 0 2 264 107 104 0 17 71 0 10 0 0 0 100 5 0 0 7 52 3 85 0 9 67 0 260 0 0 0 100 6 0 0 4 254 103 123 1 11 52 0 1421 0 0 0 99 7 0 0 0 48 8 69 0 12 41 0 306 0 0 0 100 March 2, 2026 at 06:58:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 726 0 121 2193 104 252 2 28 14 22 346 0 2 0 98 1 48 0 26 86 3 148 2 30 13 29 373 0 1 0 99 2 28 0 22 183 59 214 1 27 21 16 1015 0 1 0 99 3 3106 0 18 76 3 92 3 19 49 12 1065 1 1 0 98 4 50 0 5 302 109 134 0 19 10 13 300 0 0 0 99 5 90 0 23 99 14 135 0 26 8 21 588 0 0 0 99 6 37 0 11 284 103 158 3 27 16 17 1724 0 1 0 99 7 16 0 3 68 3 87 0 18 9 15 434 0 0 0 100 March 2, 2026 at 06:58:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 218 0 22 2342 102 465 5 89 705 70 3197 1 3 0 96 1 61 0 9 299 2 517 10 160 100 72 2278 1 1 0 98 2 369 0 153 250 9 487 17 129 259 49 2610 1 3 0 96 3 6481 0 259 235 5 520 5 112 516 68 3457 3 3 0 94 4 274 0 16 446 104 404 3 85 1030 63 3279 1 2 0 98 5 121 0 29 267 26 473 1 128 903 66 3467 1 2 0 98 6 98 0 15 531 125 631 1 133 808 78 3506 1 2 0 98 7 39 0 30 351 27 630 1 108 862 75 2094 1 1 0 98 March 2, 2026 at 06:58:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2267 103 135 0 5 9 2 313 0 1 0 99 1 4 0 0 175 2 48 0 2 2 2 13 0 0 0 100 2 2 0 14 177 3 28 0 2 9 1 586 0 1 0 99 3 3 0 1036 21 2 23 0 3 9 1 316 0 1 0 99 4 3 0 2 363 102 12 0 1 4 1 10 0 0 0 100 5 14 0 7 169 4 24 0 0 5 5 271 0 0 0 100 6 14 0 4 370 103 57 1 2 3 5 779 0 0 0 99 7 10 0 7 266 50 124 0 3 3 4 37 0 0 0 100 March 2, 2026 at 06:58:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 102 110 0 2 7 0 294 0 1 0 99 1 0 0 0 22 2 10 0 0 0 0 9 0 0 0 100 2 0 0 70 23 4 19 0 0 0 0 7 0 1 0 99 3 0 0 14 23 3 10 1 1 11 0 864 0 0 0 100 4 0 0 2 228 103 16 0 1 0 0 16 0 0 0 100 5 0 0 7 27 9 4 0 0 1 0 259 0 0 0 100 6 0 0 4 229 104 42 1 2 0 0 755 0 0 0 100 7 0 0 0 119 50 108 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 112 1 3 14 0 312 0 1 0 99 1 0 0 0 15 2 14 0 2 3 0 9 0 0 0 100 2 0 0 0 19 2 16 0 1 0 0 0 0 0 0 100 3 0 0 14 18 4 22 0 3 7 0 867 0 0 0 100 4 0 0 2 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 6 0 0 4 215 104 38 0 1 1 0 756 0 0 0 100 7 0 0 0 108 51 104 0 1 1 0 21 0 0 0 100 March 2, 2026 at 06:58:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 108 0 0 11 0 294 0 1 0 99 1 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 3 0 0 14 13 4 10 0 0 10 0 867 0 0 0 100 4 0 0 2 216 104 12 0 1 0 0 3 0 0 0 100 5 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 6 0 0 4 211 103 34 1 0 1 0 754 0 0 0 100 7 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7612 0 540 3342 113 1544 106 335 3479 120 9340 5 14 0 82 1 6374 0 266 1175 12 1381 79 315 4994 103 11290 5 14 0 80 2 12098 0 149 1195 6 1579 95 316 4766 157 20287 8 17 0 75 3 9805 0 1318 1268 290 1409 86 359 4495 138 12073 5 16 0 79 4 6119 0 522 1292 107 1662 97 360 4627 155 7028 5 11 0 84 5 10841 0 706 1105 11 1542 96 315 4521 128 14075 5 15 0 80 6 4433 0 1095 1149 111 1264 76 308 3906 98 11523 5 13 0 82 7 9812 0 31 1062 9 1246 87 253 3530 105 12202 5 13 0 83 March 2, 2026 at 06:58:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 118 109 0 14 0 0 294 0 1 0 99 1 0 0 84 85 25 76 0 11 6 0 0 0 1 0 99 2 0 0 0 52 10 30 0 4 0 0 0 0 0 0 100 3 0 0 0 31 4 14 1 1 9 0 599 0 0 0 99 4 0 0 16 230 105 10 0 0 0 0 268 0 0 0 100 5 0 0 16 25 3 40 2 2 0 0 1635 0 1 0 99 6 0 0 4 220 101 2 0 0 0 0 0 0 0 0 100 7 0 0 0 21 1 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2239 112 113 0 8 2 0 294 0 1 0 99 1 0 0 49 150 9 30 0 7 2 0 0 0 1 0 99 2 0 0 0 201 33 74 0 4 0 0 0 0 0 0 100 3 0 0 785 27 3 16 0 2 5 0 601 0 1 0 99 4 0 0 16 338 106 12 0 0 0 0 273 0 0 0 100 5 0 0 7 144 8 52 1 2 1 0 1650 0 1 0 99 6 0 0 4 329 101 6 0 2 0 0 5 0 0 0 100 7 0 0 0 131 0 12 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:58:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 111 111 0 6 0 0 294 0 1 0 99 1 0 0 0 36 7 30 0 6 0 0 0 0 0 0 100 2 0 0 0 85 35 76 0 3 0 0 0 0 0 0 100 3 0 0 0 13 4 8 0 0 3 0 599 0 0 0 100 4 0 0 16 213 105 6 0 0 0 0 268 0 0 0 100 5 0 0 7 13 4 38 1 0 1 0 1638 0 0 0 100 6 0 0 4 207 101 2 0 0 0 0 0 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 106 124 0 6 5 0 294 0 1 0 99 1 0 0 0 12 1 2 0 0 1 0 0 0 0 0 100 2 0 0 0 44 15 34 0 3 1 0 0 0 0 0 100 3 0 0 0 84 38 76 0 1 3 0 603 0 0 0 100 4 0 0 21 212 104 4 0 0 1 0 266 0 0 0 100 5 0 0 7 16 5 36 1 0 1 0 1635 0 0 0 100 6 0 0 7 212 101 8 0 3 0 0 1 0 0 0 100 7 0 0 0 10 1 2 0 1 1 0 0 0 0 0 100 March 2, 2026 at 06:58:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2474 0 14 3104 103 1893 43 241 501 36 4676 9 6 0 85 1 8058 0 17 701 1 1274 20 206 539 51 5323 20 6 0 74 2 2706 0 15 808 3 1457 27 205 545 52 4329 9 4 0 87 3 690 0 20 947 121 1577 29 231 452 55 4509 5 4 0 91 4 9757 0 31 963 114 1368 25 208 527 55 5157 10 6 0 84 5 820 0 10 679 13 1176 17 169 355 46 5380 9 5 0 86 6 1837 0 466 901 114 1415 23 209 560 53 3830 6 5 0 89 7 1271 0 29 670 2 1196 16 125 376 34 2982 11 3 0 86 March 2, 2026 at 06:58:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 397 0 0 3491 107 2765 67 549 6817 0 2988 11 14 0 74 1 209 0 23 1307 9 2608 72 571 7244 1 3410 7 14 0 79 2 117 0 16 1208 13 2502 101 477 4785 1 2701 10 11 0 80 3 162 0 12 1821 667 2466 73 561 6965 3 3974 7 15 0 78 4 165 0 2 1245 106 2095 79 496 5101 2 2884 11 12 0 77 5 200 0 0 1011 11 2071 55 432 6927 2 3929 8 14 0 79 6 172 0 607 1132 104 2083 66 509 7292 2 2526 13 14 0 73 7 153 0 2 1046 7 2128 33 421 7459 1 1986 9 12 0 79 March 2, 2026 at 06:58:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 118 116 1 6 0 0 10 0 1 0 99 1 0 0 14 30 9 22 0 2 0 0 561 0 0 0 100 2 0 0 0 11 0 7 0 4 0 0 0 0 0 0 100 3 0 0 8 71 28 64 4 4 5 0 862 0 1 0 99 4 0 0 2 244 107 38 0 3 0 0 10 0 0 0 100 5 0 0 0 47 21 66 1 1 0 0 1411 0 0 0 100 6 0 0 4 211 102 8 0 0 0 0 9 0 0 0 100 7 0 0 0 20 1 16 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:58:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 109 122 0 0 0 0 9 0 1 0 99 1 0 0 14 23 2 4 0 0 0 0 560 0 0 0 100 2 0 0 112 7 0 3 0 0 0 0 0 0 0 0 100 3 0 0 7 35 7 14 0 0 0 0 863 0 0 0 100 4 0 0 2 227 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 128 53 136 1 0 0 0 1406 0 0 0 100 6 0 0 4 225 102 4 0 0 0 0 1 0 0 0 100 7 0 0 0 31 1 12 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:58:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2135 122 124 1 1 0 0 11 0 1 0 99 1 0 0 14 10 2 6 0 1 0 0 560 0 0 0 100 2 0 0 7 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 22 7 14 1 0 1 0 856 0 0 0 100 4 0 0 2 216 103 12 0 1 0 0 0 0 0 0 100 5 0 0 0 111 40 134 1 3 0 0 1403 0 0 0 100 6 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 7 0 0 0 18 1 12 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 3010 131 1470 35 160 336 0 3776 12 4 0 84 1 10 0 14 957 12 1574 49 154 95 0 4819 13 4 0 83 2 2 0 0 842 9 1317 29 125 357 0 2933 8 3 0 90 3 18 0 0 468 9 627 35 82 372 0 3976 38 3 0 59 4 9 0 9 1009 109 1303 33 116 363 1 3351 8 3 0 89 5 31 0 0 752 11 1142 10 81 350 0 3966 7 3 0 91 6 1 0 829 910 113 1361 26 103 389 0 3855 8 4 0 88 7 0 0 0 407 4 502 6 39 184 0 2033 5 2 0 93 March 2, 2026 at 06:58:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2565 127 944 31 226 2866 0 858 2 7 0 92 1 37 0 14 418 2 889 19 220 2865 0 874 2 6 0 92 2 32 0 0 424 6 870 29 183 2729 0 766 3 6 0 91 3 18 0 0 675 314 925 48 222 2150 2 1540 4 5 0 90 4 3 0 9 712 109 996 27 184 2532 0 1533 3 7 0 90 5 101 0 0 393 4 825 27 174 2550 1 2346 4 6 0 89 6 23 0 200 613 109 875 28 206 2440 0 845 2 5 0 92 7 75 0 0 411 17 765 16 176 2730 0 460 2 6 0 93 March 2, 2026 at 06:58:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 815 0 0 2159 106 142 2 15 6 9 6567 2 2 0 96 1 31 0 15 97 18 109 2 17 9 5 391 0 0 0 100 2 8 0 0 105 35 91 0 4 2 5 29 0 0 0 100 3 9 0 0 45 5 33 0 3 6 0 704 0 0 0 100 4 1308 0 9 260 110 40 2 5 7 0 766 0 0 0 99 5 1305 0 113 39 9 96 1 3 7 12 1751 1 1 0 99 6 167 0 4 256 101 95 0 15 10 18 219 0 0 0 100 7 20 0 3 63 1 82 0 11 7 14 147 0 0 0 100 March 2, 2026 at 06:58:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 112 0 3 0 0 0 0 0 0 100 1 3 0 14 25 9 22 0 1 0 0 275 0 0 0 100 2 0 0 0 80 34 78 0 3 0 0 0 0 0 0 100 3 0 0 0 43 18 38 1 1 5 0 601 0 0 0 100 4 0 0 9 218 107 10 0 0 9 0 554 0 0 0 100 5 0 0 0 12 3 36 1 0 0 0 1489 0 0 0 100 6 0 0 4 207 101 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:59:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 116 0 3 1 0 1 0 0 0 100 1 0 0 14 42 19 38 0 1 1 0 274 0 0 0 100 2 0 0 0 10 2 4 0 0 1 0 2 0 0 0 100 3 0 0 0 95 43 88 0 2 4 0 606 0 0 0 100 4 0 0 9 218 107 10 0 0 9 0 555 0 0 0 100 5 0 0 0 13 3 36 1 0 1 0 1489 0 0 0 100 6 0 0 4 207 101 2 0 0 1 0 0 0 0 0 100 7 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 March 2, 2026 at 06:59:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 107 0 0 5925 107 8080 112 292 422 0 19798 19 13 0 68 1 119 0 0 4528 16 9569 89 334 233 0 21913 19 13 0 67 2 87 0 14 3255 8 6407 39 206 252 0 15678 14 10 0 76 3 30 0 0 3377 19 6902 65 274 207 0 16561 13 10 0 77 4 101 0 2 2577 119 4804 38 219 207 0 13394 12 8 0 79 5 530 0 0 1277 11 2691 23 112 177 0 7329 6 5 0 89 6 441 0 11 3624 112 7561 43 198 409 0 23891 13 9 0 78 7 396 0 0 1882 8 4012 16 88 202 0 10528 9 7 0 84 March 2, 2026 at 06:59:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 0 6709 108 9798 122 577 2454 0 26284 24 18 0 58 1 25 0 0 5322 12 11293 109 652 2265 0 24028 20 16 0 64 2 19 0 14 4084 11 8365 85 473 2518 0 19584 17 14 0 69 3 24 0 0 4814 248 9777 87 554 2331 0 19789 16 15 0 69 4 62 0 155 2957 112 5726 61 471 2378 0 12777 12 11 0 78 5 9 0 0 2361 12 5010 49 363 2254 0 10603 10 9 0 81 6 12 0 10 3323 116 6721 80 459 2502 0 15649 13 12 0 76 7 14 0 0 2114 14 4589 57 316 2289 0 9748 10 9 0 82 March 2, 2026 at 06:59:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 1 6812 116 10024 54 315 155 0 24998 25 15 0 60 1 21 0 0 4961 11 10568 55 380 122 0 26919 21 14 0 65 2 12 0 14 3927 11 8065 33 237 130 0 19208 16 11 0 73 3 13 0 0 4278 10 8978 43 286 84 0 19510 16 11 0 73 4 8 0 2 2899 116 5541 31 242 98 0 13214 12 8 0 80 5 7 0 0 2121 16 4365 20 114 89 0 10181 9 6 0 85 6 6 0 4 3405 118 6820 31 222 108 0 16918 13 9 0 77 7 7 0 7 2450 13 5072 24 123 72 0 11388 9 6 0 84 March 2, 2026 at 06:59:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 3240 113 2456 18 95 37 0 6759 5 4 0 91 1 5 0 0 1483 14 2913 9 81 26 0 6624 4 3 0 93 2 2 0 14 700 10 1557 10 58 32 0 3920 3 2 0 94 3 7 0 0 896 23 1983 13 69 15 0 5733 5 3 0 92 4 15 0 3 893 106 1420 4 56 30 0 4003 3 2 0 95 5 0 0 0 456 9 941 6 37 27 0 3037 2 1 0 97 6 20 0 3 879 104 1444 5 47 39 0 4133 3 2 0 95 7 4 0 7 331 7 670 5 26 7 0 2556 2 1 0 97 March 2, 2026 at 06:59:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 127 124 0 14 10 0 308 0 1 0 99 1 0 0 0 80 23 102 1 8 9 0 2091 0 0 0 99 2 0 0 14 48 13 38 0 7 0 0 266 0 0 0 100 3 0 0 0 10 1 6 0 0 0 0 4 0 0 0 100 4 0 0 2 211 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 6 0 0 4 217 101 14 0 1 0 0 0 0 0 0 100 7 0 0 7 15 5 12 0 0 0 0 260 0 0 0 100 March 2, 2026 at 06:59:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 112 130 0 7 130 0 303 0 1 0 99 1 0 0 0 113 48 138 1 9 150 0 2098 0 1 0 99 2 0 0 14 23 4 25 0 5 119 0 286 0 0 0 100 3 0 0 0 21 4 19 0 2 26 0 9 0 0 0 100 4 0 0 2 214 103 7 0 2 36 0 1 0 0 0 100 5 0 0 0 14 2 11 0 2 137 0 4 0 0 0 100 6 0 0 4 211 101 8 0 4 136 0 4 0 0 0 100 7 0 0 7 20 5 18 1 2 101 0 260 0 0 0 100 March 2, 2026 at 06:59:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 62 0 0 3760 111 3008 92 539 3133 1 5274 13 11 0 76 1 6 0 0 1379 15 2397 104 459 3202 3 5994 25 10 0 65 2 14 0 14 1314 9 2238 83 399 2752 1 6965 17 10 0 73 3 15 0 14 1912 348 3127 120 504 3158 9 5855 11 11 0 79 4 79 0 23 1554 108 2429 91 410 2987 1 5640 20 9 0 71 5 20 0 0 1143 12 1966 82 344 2940 3 4476 23 8 0 69 6 12 0 1069 1349 115 2381 75 432 2833 0 6111 20 11 0 70 7 57 0 7 1229 16 2153 52 307 3063 0 5253 11 9 0 79 March 2, 2026 at 06:59:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2437 110 787 15 202 2934 0 0 0 8 0 92 1 0 0 0 380 12 818 4 207 3036 1 297 0 7 0 93 2 0 0 0 423 20 897 2 167 2785 0 1716 0 7 0 93 3 0 0 0 674 353 962 6 217 3023 1 300 0 7 0 93 4 2 0 16 633 118 926 4 204 2981 0 282 0 7 0 93 5 0 0 7 358 7 802 3 205 2829 1 7 0 5 0 95 6 0 0 4 510 101 737 4 211 2949 1 0 0 7 0 93 7 0 0 7 360 5 827 5 183 2850 0 269 0 6 0 94 March 2, 2026 at 06:59:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 100 104 0 1 0 0 0 0 1 0 99 1 0 0 0 28 2 8 0 0 0 0 306 0 0 0 100 2 0 0 0 131 53 140 1 2 1 0 1709 0 0 0 99 3 0 0 112 23 3 19 0 0 0 0 304 0 0 0 100 4 0 0 16 235 106 11 1 1 1 0 276 0 0 0 100 5 0 0 0 27 1 6 0 1 0 0 6 0 0 0 100 6 0 0 4 255 116 36 0 2 0 0 24 0 0 0 100 7 0 0 7 29 3 12 0 1 2 0 263 0 0 0 100 March 2, 2026 at 06:59:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 122 114 0 6 1 0 0 0 1 0 99 1 0 0 1 88 18 84 0 6 1 0 298 0 0 0 100 2 0 0 0 47 17 64 1 1 2 0 1710 0 0 0 99 3 0 0 7 17 3 8 0 1 1 0 300 0 0 0 100 4 0 0 21 211 103 2 0 0 1 0 266 0 0 0 100 5 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 6 0 0 7 230 112 22 0 0 1 0 10 0 0 0 100 7 0 0 7 19 5 10 1 0 1 0 261 0 0 0 100 March 2, 2026 at 06:59:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2296 132 368 4 30 4 0 895 2 1 0 97 1 0 0 0 144 18 132 8 15 4 0 755 9 1 0 91 2 1 0 0 148 9 215 3 16 15 0 2457 3 1 0 96 3 0 0 0 227 6 377 9 20 12 0 1082 2 1 0 98 4 0 0 16 394 114 294 5 15 4 0 815 1 1 0 98 5 0 0 0 39 2 18 0 4 0 0 30 0 0 0 100 6 0 0 158 360 108 285 2 12 0 0 426 1 0 0 98 7 0 0 7 56 3 48 2 5 2 0 506 0 0 0 99 March 2, 2026 at 06:59:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 3182 111 1928 42 316 2434 1 3774 11 9 0 80 1 1 0 0 1218 16 2163 58 352 2550 1 4482 11 9 0 80 2 3 0 0 1065 16 1842 48 261 2319 0 5122 10 9 0 81 3 9 0 0 1355 305 1999 94 342 3083 0 4379 24 9 0 66 4 0 0 16 1257 109 1887 43 301 2721 0 4128 19 8 0 74 5 3 0 0 867 8 1493 40 237 2440 2 2831 11 8 0 81 6 0 0 872 1066 109 1798 46 290 2388 0 3321 12 8 0 80 7 1 0 0 658 5 1103 25 206 2776 1 2743 9 8 0 83 March 2, 2026 at 06:59:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1924 0 7 2156 106 162 3 10 3 7 670 0 1 0 98 1 1514 0 113 44 7 74 2 13 18 14 6925 2 1 0 96 2 78 0 0 92 16 142 2 14 23 9 1890 0 1 0 99 3 53 0 2 52 2 64 0 13 7 6 232 0 0 0 100 4 43 0 18 272 110 73 15 11 7 4 326 0 1 0 99 5 5 0 0 71 20 56 0 8 5 5 321 0 0 0 100 6 5 0 4 274 119 66 0 5 2 4 65 0 0 0 100 7 0 0 0 40 4 26 0 3 3 0 26 0 0 0 100 March 2, 2026 at 06:59:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 105 116 0 0 0 0 279 0 1 0 99 1 0 0 0 12 2 8 0 0 3 0 311 0 0 0 100 2 0 0 0 130 62 154 1 0 1 0 1804 0 0 0 99 3 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 4 0 0 16 215 103 4 0 0 1 0 266 0 0 0 100 5 0 0 1 10 1 6 1 1 0 0 300 0 0 0 100 6 0 0 4 218 103 12 0 0 0 0 1 0 0 0 100 7 0 0 0 8 1 6 0 1 0 0 1 0 0 0 100 March 2, 2026 at 06:59:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 104 114 0 1 0 0 260 0 1 0 99 1 0 0 0 8 1 4 0 1 2 0 300 0 0 0 100 2 0 0 0 131 62 154 2 0 3 0 1798 0 0 0 99 3 0 0 0 12 2 8 0 0 0 0 2 0 0 0 100 4 0 0 16 209 103 2 0 0 0 0 266 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 6 0 0 4 212 102 4 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 March 2, 2026 at 06:59:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 84 0 7 3689 106 3393 39 120 45 0 9350 8 6 0 87 1 716 0 0 2014 10 4352 24 126 43 0 13677 8 5 0 87 2 10 0 0 1397 47 2968 30 76 38 0 10688 6 4 0 90 3 15 0 0 1344 7 2828 15 110 23 0 7391 6 4 0 90 4 59 0 16 1092 106 1802 12 83 38 0 4945 4 3 0 93 5 9 0 0 902 3 1949 5 41 38 0 5139 4 3 0 93 6 51 0 4 1473 108 2734 15 92 43 0 6205 5 4 0 91 7 85 0 0 500 0 1002 10 36 15 0 4642 7 2 0 91 March 2, 2026 at 06:59:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 7026 118 10536 195 693 2692 0 24828 23 18 0 59 1 26 0 0 4663 22 9654 134 683 2958 0 23692 20 17 0 63 2 14 0 0 4211 11 8628 123 547 2631 0 18477 15 14 0 71 3 40 0 0 4291 299 8828 119 590 2822 1 21023 18 16 0 66 4 9 0 16 3098 118 6229 94 541 2747 0 13939 13 12 0 75 5 9 0 7 2126 11 4599 60 382 2392 0 10478 9 10 0 81 6 13 0 4 3734 108 7697 81 501 2496 0 14434 13 13 0 74 7 6 0 0 2215 6 4723 54 354 2667 0 12065 11 11 0 78 March 2, 2026 at 06:59:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 6851 112 10331 49 316 122 0 26722 24 16 0 60 1 13 0 0 4950 16 10226 80 375 108 0 23952 20 13 0 67 2 9 0 0 3651 10 7473 42 248 133 0 18325 16 10 0 73 3 10 0 0 4649 13 9796 43 308 89 0 22159 19 12 0 69 4 2 0 9 2835 119 5235 30 255 85 0 12267 11 7 0 82 5 7 0 0 2115 16 4441 14 130 55 0 12693 10 7 0 83 6 2 0 18 3748 116 7632 27 238 118 0 18068 15 10 0 75 7 2 0 0 1646 6 3405 17 115 55 0 9571 8 5 0 87 March 2, 2026 at 06:59:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 14 5218 110 6625 42 257 93 0 16069 15 10 0 75 1 12 0 0 3349 32 7018 32 262 67 0 16658 14 9 0 76 2 3 0 0 2719 10 5521 23 178 69 0 12167 11 7 0 82 3 6 0 0 2432 10 5047 37 194 88 0 13759 11 7 0 82 4 3 0 9 2149 114 4050 16 156 83 0 10483 9 6 0 85 5 3 0 0 1400 10 2915 9 85 53 0 9038 5 4 0 90 6 6 0 4 2251 106 4335 19 148 60 0 11576 9 6 0 85 7 4 0 0 1600 7 3414 21 95 66 0 8928 8 5 0 88 March 2, 2026 at 06:59:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 105 106 0 3 1 0 266 0 1 0 99 1 0 0 0 69 25 64 1 5 11 0 297 0 0 0 100 2 0 0 0 82 36 76 0 2 0 0 11 0 0 0 100 3 0 0 0 15 4 6 0 0 9 0 294 0 0 0 100 4 0 0 10 213 104 4 0 0 1 0 260 0 0 0 100 5 0 0 0 20 3 42 1 1 2 0 1800 0 0 0 99 6 0 0 3 208 102 2 0 0 1 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 1 0 0 0 0 0 100 March 2, 2026 at 06:59:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2765 111 1168 27 168 22 0 3167 11 3 0 86 1 0 0 0 637 7 1121 42 177 38 0 4301 14 2 0 84 2 2 0 0 762 46 1164 27 150 33 0 3288 7 2 0 91 3 3 0 0 668 5 1152 45 163 42 0 3486 10 2 0 88 4 2 0 10 800 110 940 20 132 24 0 2703 8 2 0 91 5 41 0 0 541 6 872 21 103 33 0 4133 4 2 0 94 6 12 0 522 678 105 899 29 119 26 0 2591 8 2 0 90 7 12 0 0 385 1 538 10 52 37 0 2430 8 2 0 91 March 2, 2026 at 06:59:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 24 3088 104 1982 85 466 4953 0 2639 14 14 0 72 1 6 0 0 1024 16 1977 80 471 5070 3 3199 11 13 0 76 2 35 0 0 958 13 1800 59 411 4723 3 2699 13 12 0 74 3 4 0 0 1550 555 2105 96 501 5119 0 2916 7 12 0 81 4 4 0 23 1241 114 2078 49 499 5323 0 2576 6 12 0 82 5 2 0 0 1068 6 2133 46 401 5066 0 3881 5 13 0 82 6 9 0 550 996 110 1840 91 467 5158 0 2153 10 12 0 78 7 4 0 7 836 5 1722 47 400 5124 1 2357 6 11 0 83 March 2, 2026 at 06:59:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2125 111 123 0 11 0 0 266 0 1 0 99 1 0 0 0 81 35 74 0 4 6 0 299 0 0 0 100 2 0 0 0 49 17 46 0 4 0 0 24 0 0 0 100 3 0 0 0 35 6 26 0 3 1 0 294 0 0 0 100 4 0 0 9 218 104 13 0 2 0 0 267 0 0 0 100 5 0 0 0 32 10 50 1 1 1 0 1724 0 0 0 100 6 0 0 4 212 103 4 0 0 0 0 1 0 0 0 100 7 0 0 0 14 0 8 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:59:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2125 103 114 0 3 0 0 273 0 1 0 99 1 0 0 0 76 25 54 1 4 1 0 299 0 0 0 100 2 0 0 0 99 37 78 1 1 0 0 16 0 0 0 100 3 0 0 0 28 3 8 0 0 2 0 297 0 0 0 100 4 0 0 121 215 104 9 0 1 0 0 260 0 0 0 100 5 0 0 0 44 5 50 1 0 0 0 1723 0 0 0 100 6 0 0 4 227 103 6 0 0 0 0 2 0 0 0 100 7 0 0 0 24 1 6 0 1 0 0 24 0 0 0 100 March 2, 2026 at 06:59:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 105 108 0 3 2 0 266 0 1 0 99 1 0 0 0 14 2 12 0 1 0 0 300 0 0 0 100 2 0 0 0 106 46 98 0 3 0 0 10 0 0 0 100 3 0 0 0 35 14 30 0 1 1 0 294 0 0 0 100 4 0 0 16 215 104 8 1 0 0 0 260 0 0 0 100 5 0 0 0 21 3 44 1 0 0 0 1716 0 0 0 100 6 0 0 4 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:59:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 3074 113 1668 42 207 193 0 3964 8 5 0 87 1 0 0 0 721 10 1105 48 111 336 0 4172 32 4 0 65 2 1 0 0 817 8 1242 25 118 269 0 4374 12 5 0 84 3 0 0 0 1160 51 1908 50 166 284 0 4963 8 6 0 86 4 0 0 2 952 110 1141 35 124 269 0 3244 19 4 0 77 5 9 0 0 543 9 710 12 78 358 0 2536 6 4 0 90 6 1 0 880 753 110 1036 39 108 305 1 3892 15 5 0 80 7 7 0 0 673 10 1152 46 83 302 0 2651 5 2 0 92 March 2, 2026 at 06:59:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2529 110 954 20 188 2184 1 1679 3 6 0 91 1 1 0 0 333 10 655 26 171 2323 0 702 4 5 0 91 2 0 0 0 384 5 814 18 167 2245 1 2043 1 5 0 94 3 0 0 0 641 301 903 17 183 2338 0 822 2 5 0 93 4 0 0 2 607 130 777 12 195 2275 0 396 1 4 0 94 5 0 0 0 301 6 629 5 167 2139 0 1077 2 4 0 94 6 2 0 151 534 106 749 16 188 2502 0 963 3 5 0 92 7 6 0 0 305 1 593 16 142 2085 0 524 5 4 0 91 March 2, 2026 at 06:59:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 118 0 0 0 0 266 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 120 54 148 1 0 1 0 1428 0 0 0 100 3 0 0 0 33 12 32 0 1 6 0 310 0 0 0 100 4 0 0 2 213 103 6 0 0 0 0 5 0 0 0 100 5 0 0 0 24 10 12 1 0 6 0 604 0 0 0 100 6 0 0 11 214 104 8 0 0 0 0 260 0 0 0 100 7 0 0 0 9 0 6 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:59:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 105 118 0 3 0 0 266 0 1 0 99 1 0 0 0 47 19 42 0 1 0 0 0 0 0 0 100 2 0 0 0 73 30 94 1 2 1 0 1414 0 0 0 100 3 0 0 0 30 11 24 1 0 6 0 307 0 0 0 100 4 0 0 2 216 103 12 0 1 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 3 0 594 0 0 0 100 6 0 0 11 214 105 10 0 0 0 0 262 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:59:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 110 114 0 6 1 0 266 0 1 0 99 1 0 0 0 93 34 82 0 5 1 0 0 0 0 0 100 2 0 0 0 34 13 56 1 1 1 0 1415 0 0 0 100 3 0 0 0 30 12 22 0 0 2 0 310 0 0 0 100 4 0 0 7 212 103 2 0 0 1 0 0 0 0 0 100 5 0 0 0 17 6 6 0 0 1 0 598 0 0 0 100 6 0 0 14 213 104 10 0 1 0 0 260 0 0 0 100 7 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 March 2, 2026 at 06:59:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2127 102 158 1 16 279 0 342 0 2 0 98 1 0 0 0 24 1 47 1 17 249 0 0 0 1 0 99 2 0 0 0 148 61 193 2 12 282 0 1429 0 2 0 98 3 0 0 0 67 32 61 1 14 332 0 322 0 2 0 98 4 0 0 2 243 104 79 1 23 289 0 0 0 1 0 99 5 0 0 0 45 6 68 1 7 182 0 604 0 2 0 98 6 0 0 11 264 105 134 0 21 289 0 268 0 1 0 99 7 0 0 0 28 1 48 1 11 244 0 1 0 1 0 99 March 2, 2026 at 06:59:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 16 2347 111 593 3 133 2007 10 457 0 4 0 96 1 13 0 0 269 1 587 2 140 2173 8 162 0 4 0 96 2 13 0 0 296 11 624 5 112 1827 4 1552 0 4 0 96 3 6 0 0 385 183 453 3 118 1956 4 338 0 4 0 96 4 6 0 2 426 103 450 3 113 2056 1 64 0 4 0 96 5 0 0 0 196 5 397 2 101 1844 0 614 0 3 0 96 6 3385 0 125 478 110 581 6 121 1679 8 7134 3 5 0 92 7 154 0 0 303 34 557 2 120 1955 15 198 0 4 0 96 March 2, 2026 at 06:59:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2116 113 91 0 11 0 0 266 0 1 0 99 1 0 0 0 41 5 35 0 4 0 0 0 0 0 0 100 2 0 0 0 53 22 82 0 1 1 0 1520 0 0 0 99 3 0 0 0 10 2 4 1 0 6 0 300 0 0 0 100 4 0 0 2 213 103 6 0 0 0 0 5 0 0 0 100 5 0 0 0 17 6 8 0 0 1 0 599 0 0 0 100 6 0 0 11 217 106 12 0 0 0 0 263 0 0 0 100 7 0 0 0 89 26 79 0 9 0 0 0 0 0 0 100 March 2, 2026 at 06:59:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 108 0 4 0 0 267 0 1 0 99 1 0 0 0 16 1 10 0 1 0 0 0 0 0 0 100 2 0 0 0 131 63 156 0 0 0 0 1511 0 0 0 99 3 0 0 0 9 2 4 0 0 5 0 303 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 3 0 594 0 0 0 100 6 0 0 11 220 105 14 1 2 0 0 261 0 0 0 100 7 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:59:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39 0 0 5714 107 7694 79 315 102 0 24721 25 14 0 61 1 39 0 0 4004 12 8719 74 326 80 0 28579 19 11 0 70 2 530 0 14 3617 22 7246 50 233 80 0 14581 13 8 0 79 3 160 0 0 3828 15 8048 55 259 85 0 21012 15 11 0 74 4 12 0 2 2750 109 5084 36 214 50 0 10226 10 6 0 84 5 9 0 0 1720 9 3599 17 114 55 0 11796 10 6 0 84 6 8 0 11 2947 113 5814 39 202 101 0 15865 13 8 0 79 7 9 0 0 2230 7 4617 23 115 51 0 8744 8 5 0 87 March 2, 2026 at 06:59:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 6716 108 9906 86 383 341 0 24980 23 16 0 62 1 12 0 0 5259 9 11026 88 455 308 0 25041 20 13 0 66 2 5 0 0 4008 9 8060 54 285 235 0 20557 19 12 0 69 3 14 0 14 4461 34 9295 52 337 270 0 24863 19 13 0 68 4 16 0 2 2917 115 5579 39 294 287 0 14360 13 9 0 79 5 10 0 0 2142 18 4428 30 171 227 1 10180 9 7 0 84 6 4 0 11 3068 115 6183 38 265 288 1 14208 13 9 0 78 7 2 0 0 2172 19 4413 23 146 231 0 10970 9 7 0 84 March 2, 2026 at 06:59:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 2 6994 109 10546 80 428 519 0 26606 25 16 0 59 1 6 0 0 5180 17 10548 93 478 488 0 22898 19 13 0 68 2 9 0 0 4040 11 8099 42 314 458 0 19388 17 11 0 72 3 6 0 21 4475 118 9171 72 403 495 0 25300 18 13 0 68 4 6 0 199 3245 112 6310 48 313 456 0 14375 14 9 0 77 5 5 0 0 1865 7 3807 20 181 412 0 10813 9 6 0 85 6 5 0 3 3228 119 6425 50 297 459 0 16216 13 9 0 78 7 2 0 0 2407 19 4916 26 200 492 0 9222 8 6 0 86 March 2, 2026 at 06:59:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2474 109 817 10 39 8 0 2556 2 2 0 96 1 4 0 0 383 11 760 5 44 27 0 2637 2 1 0 97 2 1 0 0 406 5 781 9 29 1 0 1333 1 1 0 98 3 0 0 21 333 7 630 5 26 11 0 3270 1 1 0 98 4 0 0 2 432 106 430 4 24 17 0 1574 1 1 0 98 5 0 0 0 219 8 450 8 23 4 0 1275 1 1 0 98 6 3 0 4 425 110 420 1 20 12 0 1792 1 1 0 99 7 2 0 0 415 29 805 3 22 6 0 2419 2 1 0 97 March 2, 2026 at 06:59:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 3557 109 2582 115 447 2174 2 5594 18 10 0 72 1 18 0 25 1380 21 2438 147 447 2258 1 5703 24 8 0 68 2 6 0 0 1216 10 2036 95 348 2335 1 5127 22 9 0 69 3 51 0 21 1639 248 2581 118 429 2057 0 8358 17 10 0 74 4 1 0 3 1521 114 2278 103 389 2572 3 5451 14 9 0 77 5 32 0 0 1243 6 2091 67 295 2323 1 5212 14 8 0 77 6 4 0 1074 1203 111 1962 95 345 2144 1 5384 16 9 0 75 7 4 0 0 909 8 1555 80 256 2062 0 4766 17 6 0 77 March 2, 2026 at 06:59:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2424 101 720 1 162 2794 0 301 0 7 0 92 1 0 0 0 346 24 742 0 199 2988 0 15 0 7 0 93 2 0 0 0 360 19 781 2 166 2804 0 1419 0 7 0 92 3 2 0 14 682 370 1154 3 215 2875 0 570 0 7 0 92 4 0 0 14 566 103 843 2 216 3159 0 3 0 6 0 94 5 0 0 0 345 1 782 1 166 2874 0 3 0 7 0 93 6 0 0 14 560 108 755 1 173 3041 0 260 0 7 0 93 7 0 0 0 312 18 662 1 157 2485 0 300 0 5 0 95 March 2, 2026 at 06:59:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 110 113 0 5 2 0 308 0 1 0 99 1 0 0 112 38 13 33 0 2 0 0 10 0 0 0 100 2 0 0 0 37 6 44 1 2 1 0 1419 0 0 0 99 3 0 0 14 36 3 18 1 2 4 0 566 0 0 0 100 4 0 0 2 235 104 8 0 1 0 0 1 0 0 0 100 5 0 0 0 27 3 4 0 0 0 0 1 0 0 0 100 6 0 0 11 233 105 12 0 0 0 0 260 0 0 0 100 7 0 0 0 135 49 118 0 5 0 0 308 0 0 0 100 March 2, 2026 at 06:59:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 107 108 0 5 7 0 294 0 1 0 99 1 0 0 7 125 52 114 0 4 0 0 9 0 0 0 100 2 0 0 0 24 7 48 1 1 0 0 1418 0 0 0 100 3 0 0 14 16 2 12 0 0 1 0 567 0 0 0 100 4 0 0 2 210 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 6 0 0 11 213 104 8 0 0 0 0 260 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 March 2, 2026 at 06:59:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2317 112 430 1 36 1 0 1074 1 1 0 97 1 0 0 0 244 17 380 6 30 2 0 1040 2 1 0 97 2 0 0 0 176 42 199 2 14 1 0 1627 1 1 0 99 3 0 0 14 236 6 388 4 26 3 0 1286 1 1 0 98 4 0 0 2 359 105 232 2 17 1 0 522 1 0 0 99 5 0 0 0 140 9 197 2 12 1 0 493 1 0 0 99 6 0 0 193 223 105 15 6 2 0 0 743 12 1 0 88 7 0 0 0 78 4 78 2 5 2 0 710 1 0 0 99 March 2, 2026 at 06:59:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3255 112 2094 48 308 2343 1 4394 15 10 0 75 1 0 0 0 1168 25 2095 65 351 2584 0 4372 13 8 0 79 2 2 0 0 962 18 1642 46 242 2606 1 5393 15 10 0 75 3 0 0 14 1167 324 1564 54 270 2548 0 3607 28 9 0 63 4 0 0 2 1248 107 1864 44 298 2544 0 3458 7 8 0 84 5 3 0 0 938 3 1755 48 259 2437 1 3451 12 7 0 81 6 1 0 837 1077 106 1792 49 267 2728 0 3863 12 10 0 78 7 0 0 0 763 5 1320 13 213 2553 1 1978 3 7 0 90 March 2, 2026 at 06:59:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2676 0 0 2183 130 155 4 10 8 9 6806 3 2 0 95 1 23 0 0 44 2 47 0 10 6 6 386 0 0 0 100 2 15 0 0 140 26 164 1 12 6 1 1490 0 0 0 99 3 731 0 127 48 9 79 0 10 4 10 467 0 0 0 99 4 103 0 2 244 103 43 1 8 11 10 405 0 0 0 100 5 53 0 2 41 0 39 0 11 6 3 129 0 0 0 100 6 9 0 11 238 104 41 0 10 5 4 410 0 0 0 100 7 6 0 0 42 6 35 0 3 2 3 345 0 0 0 100 March 2, 2026 at 06:59:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 115 93 0 9 0 0 9 0 1 0 99 1 0 0 0 53 21 46 0 3 8 0 294 0 0 0 100 2 0 0 0 42 9 66 1 5 1 0 1505 0 0 0 100 3 0 0 14 53 22 48 0 3 0 0 268 0 0 0 100 4 0 0 2 213 103 4 0 1 5 0 302 0 0 0 100 5 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 6 0 0 11 236 104 34 0 2 0 0 260 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 March 2, 2026 at 06:59:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 110 112 0 2 0 0 11 0 1 0 99 1 0 0 0 9 2 4 0 0 7 0 294 0 0 0 100 2 0 0 0 10 1 34 1 0 0 0 1499 0 0 0 100 3 0 0 14 114 53 116 0 1 0 0 266 0 0 0 100 4 0 0 2 213 103 4 0 0 4 0 301 0 0 0 100 5 0 0 0 15 1 10 0 0 0 0 1 0 0 0 100 6 0 0 11 225 104 18 0 0 0 0 260 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 300 0 0 0 100 March 2, 2026 at 06:59:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 107 0 0 3810 109 3827 45 160 55 0 13398 14 7 0 79 1 38 0 0 2296 9 4710 48 187 56 0 9288 8 5 0 87 2 87 0 0 1493 5 3024 38 113 31 0 8044 7 4 0 89 3 35 0 14 1600 40 3196 22 133 34 0 7846 6 4 0 90 4 15 0 3 925 107 1391 11 79 32 0 5841 4 2 0 94 5 480 0 0 582 14 1127 5 46 15 0 4305 3 2 0 94 6 259 0 10 1782 109 3903 24 92 42 0 15065 7 4 0 88 7 3 0 0 766 7 1579 17 67 24 0 3777 3 2 0 95 March 2, 2026 at 06:59:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 6752 113 9932 127 679 2431 0 25857 23 19 0 58 1 7 0 0 4647 11 9461 161 709 2671 0 21561 19 16 0 65 2 12 0 0 3735 13 7634 91 490 2500 0 16508 15 14 0 72 3 7 0 14 4540 287 9169 123 608 2429 0 21989 18 16 0 66 4 10 0 2 3207 112 6233 102 503 2473 0 14665 13 12 0 75 5 18 0 0 2529 9 5424 77 416 2529 0 13890 13 11 0 76 6 10 0 11 3754 124 7800 108 541 2563 0 16018 13 12 0 75 7 4 0 0 2383 15 5086 82 376 2477 0 11030 10 10 0 79 March 2, 2026 at 06:59:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 4 6169 107 8676 58 354 144 0 23374 21 14 0 66 1 21 0 0 4799 12 10044 64 365 128 0 24258 20 13 0 67 2 6 0 0 3867 11 7826 39 241 92 0 17476 16 9 0 75 3 8 0 14 4881 11 10233 38 284 95 0 21631 18 12 0 70 4 18 0 7 3221 118 6383 34 272 129 0 18314 17 10 0 73 5 9 0 0 1996 13 4146 19 151 103 0 11048 10 6 0 84 6 5 0 7 3802 116 7506 24 232 91 0 17881 13 9 0 77 7 1 0 7 2132 21 4351 26 142 60 0 12401 10 6 0 84 March 2, 2026 at 06:59:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 14 5354 113 6605 80 397 144 0 20933 23 12 0 64 1 43 0 0 3363 18 6752 111 428 115 0 17315 21 10 0 70 2 4 0 0 2815 27 5309 55 289 89 0 14678 14 8 0 79 3 8 0 0 3166 10 6361 53 317 80 0 16050 24 9 0 67 4 5 0 3 2299 112 3979 38 245 107 0 10697 17 6 0 76 5 2 0 0 2144 11 4189 23 184 90 0 9877 11 6 0 83 6 3 0 564 2366 113 4486 60 272 82 0 12615 16 7 0 77 7 4 0 7 2037 10 3974 28 133 50 0 8817 20 5 0 75 March 2, 2026 at 06:59:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 3120 104 2035 82 491 4947 0 2919 10 14 0 76 1 0 0 7 1042 6 2006 67 511 5128 0 2642 9 12 0 79 2 1 0 0 897 8 1739 51 424 4766 0 2487 9 12 0 79 3 0 0 0 1517 573 2074 83 502 4620 2 2996 8 13 0 79 4 0 0 24 1274 118 2113 64 468 4723 0 2459 10 12 0 78 5 27 0 0 889 15 1924 95 380 4853 0 2642 10 10 0 79 6 6 0 530 1186 110 2131 61 442 5131 0 2649 6 14 0 80 7 0 0 0 765 7 1516 38 339 5090 2 2670 7 13 0 80 March 2, 2026 at 06:59:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2180 105 209 2 32 336 0 284 0 2 0 98 1 0 0 7 175 44 250 0 31 311 0 271 0 1 0 99 2 0 0 0 151 19 200 0 29 275 0 302 0 1 0 99 3 0 0 0 160 83 143 2 34 348 0 300 0 1 0 99 4 0 0 2 292 110 147 0 34 211 0 13 0 1 0 99 5 0 0 7 88 8 180 1 28 348 0 1722 0 1 0 99 6 0 0 4 320 102 240 0 41 312 0 9 0 1 0 99 7 0 0 0 121 0 232 0 23 255 0 0 0 1 0 99 March 2, 2026 at 06:59:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2129 110 107 0 4 0 0 267 0 1 0 99 1 0 0 7 97 33 76 1 2 0 0 270 0 0 0 100 2 0 0 0 82 24 58 0 2 0 0 300 0 0 0 100 3 0 0 0 27 1 6 0 0 3 0 300 0 0 0 100 4 0 0 114 211 102 3 0 0 0 0 0 0 0 0 100 5 0 0 0 33 4 42 0 1 7 0 1710 0 0 0 99 6 0 0 4 223 101 2 0 1 0 0 0 0 0 0 100 7 0 0 0 32 5 14 0 1 0 0 6 0 0 0 100 March 2, 2026 at 06:59:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2130 124 118 0 4 0 0 267 0 1 0 99 1 0 0 7 45 14 34 0 2 0 0 272 0 0 0 100 2 0 0 0 103 31 98 0 3 0 0 300 0 0 0 100 3 0 0 0 15 2 10 0 0 6 0 308 0 0 0 100 4 0 0 9 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 15 4 38 1 0 4 0 1713 0 0 0 100 6 0 0 4 209 101 2 0 0 0 0 0 0 0 0 100 7 0 0 0 12 0 12 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:59:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2965 111 1539 112 171 287 0 5329 29 6 0 66 1 3 0 0 1121 33 1870 87 232 332 0 5009 23 5 0 72 2 2 0 0 832 9 1323 36 166 292 0 3675 24 5 0 71 3 0 0 0 1263 59 2083 67 205 402 0 5002 9 6 0 86 4 0 0 10 1009 111 1184 24 152 364 0 3295 6 5 0 89 5 0 0 0 661 12 916 16 84 387 0 3066 4 4 0 92 6 1 0 913 734 107 1021 35 122 215 0 3467 8 5 0 88 7 11 0 0 571 8 853 22 96 358 0 2182 5 4 0 91 March 2, 2026 at 06:59:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2342 102 555 14 147 2193 0 1242 5 6 0 88 1 0 0 0 383 11 761 6 183 2524 1 332 1 5 0 94 2 2 0 0 367 19 738 7 185 2205 1 651 1 5 0 95 3 0 0 0 690 319 856 11 190 2309 0 522 1 5 0 94 4 1 0 9 522 123 650 7 174 2132 0 418 4 4 0 92 5 0 0 0 426 3 885 11 156 2068 1 1293 3 6 0 91 6 0 0 102 525 110 746 5 181 2413 0 1676 1 5 0 94 7 0 0 0 330 1 714 4 142 2087 1 808 1 5 0 93 March 2, 2026 at 06:59:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 104 107 1 5 0 0 270 0 1 0 99 1 0 0 0 34 7 32 0 3 0 0 0 0 0 0 100 2 0 0 0 91 42 86 0 1 0 0 300 0 0 0 100 3 0 0 0 21 3 14 0 0 1 0 305 0 0 0 100 4 0 0 9 226 108 16 0 2 0 0 260 0 0 0 100 5 0 0 0 19 9 10 0 0 8 0 301 0 0 0 100 6 0 0 4 232 111 54 2 0 0 0 1431 0 0 0 99 7 0 0 0 12 0 13 0 1 0 0 9 0 0 0 100 March 2, 2026 at 06:59:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 105 112 0 4 0 0 266 0 1 0 99 1 0 0 0 38 15 34 0 3 0 0 2 0 0 0 100 2 0 0 0 89 36 86 0 4 0 0 300 0 0 0 100 3 0 0 0 14 1 8 0 1 1 0 299 0 0 0 100 4 0 0 9 214 104 4 1 0 0 0 260 0 0 0 100 5 0 0 0 11 3 6 0 0 3 0 294 0 0 0 100 6 0 0 4 227 111 50 1 0 0 0 1426 0 0 0 99 7 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 March 2, 2026 at 07:00:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 105 112 0 5 1 0 266 0 1 0 99 1 0 0 0 82 34 72 0 4 1 0 0 0 0 0 100 2 0 0 0 43 18 36 0 1 1 0 300 0 0 0 100 3 0 0 0 19 5 12 0 0 4 0 306 0 0 0 100 4 0 0 10 212 104 4 0 0 1 0 260 0 0 0 100 5 0 0 0 13 4 8 0 1 0 0 294 0 0 0 100 6 0 0 3 229 112 52 1 0 1 0 1428 0 0 0 99 7 0 0 0 8 1 2 0 0 1 0 0 0 0 0 100 March 2, 2026 at 07:00:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2160 107 413 2 44 453 0 680 0 2 0 98 1 0 0 0 97 3 195 2 37 360 0 19 0 2 0 98 2 0 0 0 106 30 159 1 34 465 0 301 0 2 0 98 3 0 0 0 151 68 167 0 38 425 0 278 0 2 0 98 4 0 0 9 255 105 106 1 34 464 0 263 0 2 0 98 5 0 0 0 49 5 93 1 23 338 0 264 0 2 0 98 6 0 0 4 276 114 146 5 25 503 0 1438 0 2 0 97 7 0 0 0 60 1 132 2 34 438 0 1 0 1 0 99 March 2, 2026 at 07:00:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 14 2331 104 486 0 114 1876 2 662 0 5 0 95 1 17 0 0 421 10 824 1 133 1688 2 376 0 4 0 96 2 4 0 0 228 17 443 1 106 1827 4 326 0 4 0 96 3 8 0 0 428 199 471 1 120 2077 0 78 0 4 0 96 4 2602 0 122 448 132 501 3 135 1777 5 664 1 4 0 95 5 109 0 0 260 7 503 1 112 1473 13 130 0 3 0 97 6 799 0 7 424 103 491 6 123 1736 9 8103 2 5 0 93 7 69 0 0 214 0 446 1 86 1743 6 169 0 3 0 97 March 2, 2026 at 07:00:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2124 119 117 1 7 4 0 567 0 1 0 99 1 0 0 0 12 3 8 0 1 2 0 306 0 0 0 100 2 0 0 0 29 12 24 0 0 0 0 311 0 0 0 100 3 0 0 0 15 2 12 0 0 0 0 4 0 0 0 100 4 0 0 9 224 106 13 1 3 0 0 260 0 0 0 100 5 1 0 0 108 37 94 1 5 0 0 7 0 0 0 100 6 0 0 4 228 105 50 1 3 0 0 1511 0 0 0 99 7 0 0 0 17 3 16 0 0 0 0 7 0 0 0 100 March 2, 2026 at 07:00:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 108 120 0 5 1 0 583 0 1 0 99 1 0 0 0 29 9 22 0 3 3 0 296 0 0 0 100 2 0 0 0 106 50 102 0 1 0 0 309 0 0 0 100 3 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 4 0 0 9 215 104 4 0 0 0 0 260 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 6 0 0 4 215 102 42 1 1 0 0 1499 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 1 0 0 0 100 March 2, 2026 at 07:00:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 14 6412 112 9098 85 353 126 0 22488 19 13 0 68 1 91 0 0 4481 11 8978 71 375 111 0 20317 16 11 0 73 2 73 0 0 3167 21 6493 46 228 79 0 14682 14 8 0 78 3 8 0 0 3748 10 7714 69 265 73 0 19942 14 10 0 75 4 245 0 9 3070 112 6460 36 234 78 0 20861 12 7 0 80 5 10 0 0 1887 14 3909 29 138 94 0 10603 10 6 0 83 6 466 0 4 3006 114 6028 42 219 69 0 17700 14 9 0 77 7 86 0 0 1895 17 3889 22 110 96 0 13015 13 6 0 81 March 2, 2026 at 07:00:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 16 6401 115 8969 73 417 328 0 24054 22 15 0 63 1 9 0 0 4819 10 9841 82 426 326 0 23844 20 14 0 66 2 6 0 7 3880 14 7914 61 305 305 0 17792 14 10 0 76 3 5 0 0 4431 50 9234 66 346 280 0 21546 18 12 0 70 4 2 0 2 3615 115 7110 55 290 318 0 16059 15 10 0 74 5 6 0 0 2012 12 4189 40 196 407 0 11630 11 7 0 82 6 5 0 4 3676 120 7429 50 275 285 0 17908 14 10 0 75 7 7 0 0 1832 19 3812 17 148 272 0 11604 9 7 0 85 March 2, 2026 at 07:00:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2710 108 1313 21 117 322 0 3381 3 3 0 94 1 8 0 0 707 5 1400 28 128 361 0 2347 2 2 0 96 2 0 0 7 630 53 1225 19 88 450 0 3078 2 2 0 96 3 18 0 0 630 114 1052 13 98 408 0 2151 2 2 0 97 4 4 0 2 676 106 932 15 96 483 0 1759 2 2 0 97 5 2 0 0 353 3 774 12 79 427 0 1484 1 2 0 97 6 9 0 4 603 103 831 11 89 413 0 1530 1 2 0 97 7 26 0 0 261 14 555 9 63 384 0 3090 1 2 0 97 March 2, 2026 at 07:00:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 105 128 1 1 0 0 282 0 1 0 99 1 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 2 0 0 7 118 54 118 0 1 0 0 554 0 0 0 100 3 0 0 0 17 1 10 0 0 1 0 300 0 0 0 100 4 0 0 2 211 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 17 6 8 0 0 0 0 7 0 0 0 100 6 0 0 4 211 101 6 0 0 0 0 5 0 0 0 100 7 0 0 0 34 12 58 2 1 1 0 1800 0 0 0 99 March 2, 2026 at 07:00:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 103 114 0 0 0 0 266 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 7 114 55 110 0 0 3 0 556 0 0 0 100 3 0 0 0 11 1 6 0 1 4 0 298 0 0 0 100 4 0 0 2 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 4 207 101 2 0 0 0 0 0 0 0 0 100 7 0 0 0 34 14 60 0 0 1 0 1802 0 0 0 99 March 2, 2026 at 07:00:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 103 116 0 0 1 0 266 0 1 0 99 1 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 2 0 0 7 117 55 110 0 0 1 0 554 0 0 0 100 3 0 0 0 19 2 16 0 1 6 0 300 0 0 0 100 4 0 0 7 210 102 0 0 0 1 0 0 0 0 0 100 5 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 6 0 0 7 208 101 4 0 1 0 0 0 0 0 0 100 7 0 0 0 38 15 58 1 0 1 0 1802 0 0 0 99 March 2, 2026 at 07:00:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2151 107 180 0 18 84 0 280 0 1 0 99 1 0 0 0 51 0 94 1 21 107 0 0 0 0 0 100 2 0 0 7 133 40 167 0 16 98 0 557 0 0 0 99 3 0 0 0 134 64 123 1 20 92 0 302 0 0 0 99 4 0 0 2 264 102 114 0 20 109 0 0 0 0 0 100 5 0 0 0 85 2 156 0 17 97 0 1 0 0 0 100 6 0 0 4 256 103 95 0 20 73 0 1 0 1 0 99 7 2 0 0 70 13 135 2 15 106 0 1806 0 1 0 99 March 2, 2026 at 07:00:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2130 103 159 0 8 24 0 266 0 1 0 99 1 0 0 0 19 0 29 0 8 16 0 0 0 0 0 100 2 0 0 7 25 3 34 1 3 10 0 535 0 0 0 100 3 0 0 0 161 88 132 1 5 24 0 307 0 0 0 100 4 0 0 2 227 103 34 0 6 21 0 1 0 0 0 100 5 0 0 0 58 1 103 0 8 15 0 0 0 0 0 100 6 0 0 4 241 102 72 0 11 39 0 42 0 0 0 100 7 0 0 0 52 14 94 1 10 22 0 1802 0 0 0 99 March 2, 2026 at 07:00:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2122 112 135 1 4 0 0 278 0 1 0 99 1 0 0 0 20 6 16 0 2 0 0 0 0 0 0 100 2 0 0 7 14 5 10 0 0 0 0 263 0 0 0 100 3 0 0 0 92 39 84 0 2 4 0 298 0 0 0 100 4 0 0 2 212 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 18 5 16 0 1 0 0 7 0 0 0 100 6 0 0 4 215 103 10 0 0 3 0 300 0 0 0 100 7 0 0 0 39 14 64 2 1 0 0 1802 0 0 0 99 March 2, 2026 at 07:00:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2116 109 122 0 8 0 0 285 0 1 0 99 1 0 0 0 44 14 38 0 3 0 0 9 0 0 0 100 2 0 0 7 49 21 44 0 3 0 0 260 0 0 0 100 3 0 0 0 38 15 34 0 1 4 0 302 0 0 0 100 4 0 0 2 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 6 0 0 4 214 102 14 0 1 1 0 294 0 0 0 100 7 0 0 0 32 13 58 1 1 1 0 1801 0 0 0 99 March 2, 2026 at 07:00:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2117 109 120 0 7 0 0 269 0 1 0 99 1 0 0 0 42 16 38 0 4 0 0 0 0 0 0 100 2 0 0 7 12 4 8 0 0 0 0 262 0 0 0 100 3 0 0 0 64 27 56 1 3 7 0 295 0 0 0 100 4 0 0 2 225 107 14 0 3 0 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 4 209 102 4 0 0 1 0 294 0 0 0 100 7 0 0 0 36 14 60 2 0 0 0 1802 0 0 0 99 March 2, 2026 at 07:00:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 103 116 0 1 0 0 266 0 1 0 99 1 0 0 0 12 3 6 0 0 0 0 0 0 0 0 100 2 0 0 7 107 51 104 0 1 0 0 260 0 0 0 100 3 0 0 0 14 2 10 0 1 6 0 304 0 0 0 100 4 0 0 2 212 102 4 0 0 4 0 0 0 0 0 100 5 0 0 0 11 2 8 0 0 2 0 1 0 0 0 100 6 0 0 4 211 102 6 0 0 1 0 294 0 0 0 100 7 0 0 0 39 13 70 1 1 4 0 1804 0 0 0 99 March 2, 2026 at 07:00:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 51 0 0 6430 112 9020 86 351 117 0 22651 21 13 0 66 1 30 0 14 4890 15 10584 83 355 119 0 29476 18 12 0 70 2 163 0 7 3029 16 6042 48 228 105 0 19149 18 9 0 73 3 43 0 0 3604 15 7576 64 276 82 0 18424 15 11 0 74 4 24 0 3 2630 109 4910 29 219 78 0 11839 10 7 0 83 5 343 0 0 1629 8 3356 18 136 83 0 10128 9 6 0 86 6 28 0 3 2927 123 5706 56 244 79 0 13898 12 7 0 81 7 95 0 0 2074 12 4348 30 127 91 0 12167 9 6 0 84 March 2, 2026 at 07:00:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 6694 111 9851 59 384 140 0 26961 25 16 0 59 1 5 0 14 4917 13 10581 48 411 87 0 28621 23 15 0 62 2 9 0 0 4291 20 8659 40 282 72 0 19788 16 10 0 74 3 11 0 7 4609 18 9339 46 331 69 0 21152 16 11 0 73 4 5 0 2 2942 118 5468 45 273 142 0 14084 12 8 0 80 5 7 0 0 1666 19 3316 16 129 71 0 9342 8 5 0 87 6 9 0 4 3315 110 6578 37 235 86 0 17092 14 9 0 77 7 6 0 0 2561 10 5434 15 144 84 0 11435 10 6 0 83 March 2, 2026 at 07:00:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6565 109 9774 65 390 137 0 25044 23 15 0 62 1 7 0 0 5136 25 10766 81 422 158 0 27831 21 14 0 64 2 21 0 0 4106 20 8284 50 274 91 0 19290 17 11 0 72 3 8 0 21 4615 18 9574 51 341 115 0 20494 16 11 0 73 4 8 0 1 3036 113 5594 33 240 88 0 13505 11 8 0 82 5 12 0 4 1702 11 3552 24 139 78 0 10380 10 6 0 84 6 6 0 5 3309 119 6765 27 232 118 0 17766 15 10 0 75 7 5 0 0 2336 9 4901 27 147 77 0 12803 11 6 0 83 March 2, 2026 at 07:00:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2169 104 218 2 12 7 0 805 0 1 0 98 1 0 0 0 77 12 155 4 10 1 0 2178 1 1 0 98 2 0 0 0 49 3 69 1 7 0 0 240 0 0 0 100 3 0 0 21 153 7 283 3 11 44 0 1776 1 1 0 99 4 1 0 7 245 104 63 0 9 6 0 337 0 0 0 99 5 1 0 0 47 2 78 3 10 2 0 334 0 0 0 99 6 0 0 7 280 102 146 2 6 17 0 1092 0 0 0 99 7 1 0 0 175 52 231 0 7 57 0 1315 0 1 0 99 March 2, 2026 at 07:00:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2135 111 144 0 19 181 0 302 0 2 0 98 1 1 0 0 49 13 94 1 11 199 0 1803 0 2 0 98 2 0 0 0 56 2 110 0 18 206 0 1 0 1 0 99 3 0 0 21 68 34 66 0 20 232 0 529 0 1 0 99 4 0 0 2 227 103 47 0 16 216 0 0 0 1 0 99 5 0 0 0 29 1 45 0 11 160 0 1 0 1 0 99 6 0 0 4 230 102 50 0 17 237 0 4 0 1 0 99 7 0 0 0 130 46 149 0 16 232 0 296 0 1 0 99 March 2, 2026 at 07:00:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2285 108 462 2 90 780 0 312 0 2 0 98 1 0 0 0 204 8 420 2 92 723 0 1799 0 2 0 98 2 0 0 0 456 35 860 0 90 719 0 6 0 2 0 98 3 0 0 21 429 242 393 2 82 910 0 544 0 2 0 98 4 0 0 2 397 106 416 4 104 864 0 3 0 2 0 98 5 0 0 0 175 0 361 2 76 801 0 4 0 1 0 98 6 0 0 4 365 101 342 4 99 693 0 0 0 2 0 98 7 0 0 0 164 4 338 2 73 860 0 294 0 2 0 98 March 2, 2026 at 07:00:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 113 2 1 4 0 304 0 1 0 99 1 0 0 0 10 2 34 1 0 0 0 1797 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 1 0 0 0 100 3 0 0 21 35 15 34 0 0 0 0 539 0 0 0 100 4 0 0 2 213 102 4 0 0 1 0 0 0 0 0 100 5 0 0 0 22 5 18 0 1 0 0 0 0 0 0 100 6 0 0 4 211 102 8 0 1 0 0 8 0 0 0 100 7 0 0 0 19 4 20 0 1 2 0 306 0 0 0 100 March 2, 2026 at 07:00:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 108 0 0 5 0 323 0 1 0 99 1 0 0 0 10 2 34 1 0 0 0 1793 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 3 0 0 21 33 14 30 1 0 0 0 536 0 0 0 100 4 0 0 2 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 6 0 0 4 207 101 2 0 0 0 0 0 0 0 0 100 7 0 0 0 13 4 10 0 1 8 0 295 0 0 0 100 March 2, 2026 at 07:00:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 113 109 0 8 4 0 301 0 1 0 99 1 0 0 0 38 13 64 0 3 0 0 1804 0 0 0 100 2 0 0 0 84 31 76 0 6 0 0 0 0 0 0 100 3 0 0 21 20 6 18 0 0 0 0 536 0 0 0 100 4 0 0 2 238 114 32 1 1 0 0 17 0 0 0 100 5 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 6 0 0 4 214 101 14 0 2 0 0 3 0 0 0 100 7 0 0 0 14 4 10 0 1 0 0 299 0 0 0 100 March 2, 2026 at 07:00:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 112 0 2 7 0 308 0 1 0 99 1 0 0 0 10 2 34 1 0 0 0 1795 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 21 19 6 18 0 0 0 0 529 0 0 0 100 4 0 0 2 229 110 22 0 0 0 0 9 0 0 0 100 5 0 0 0 14 0 8 0 0 2 0 0 0 0 0 100 6 0 0 4 210 101 6 0 1 1 0 0 0 0 0 100 7 0 0 0 22 5 25 0 3 3 0 299 0 0 0 100 March 2, 2026 at 07:00:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3138 0 0 2615 115 815 441 41 186 6 3174 84 5 0 11 1 1626 0 0 473 12 679 332 61 142 9 4212 86 3 0 11 2 2225 0 6 685 22 1250 611 55 85 10 2078 86 3 0 11 3 3228 0 21 609 14 1012 510 43 117 8 2879 85 3 0 11 4 3390 0 3 682 114 704 377 42 180 2 3050 85 4 0 11 5 2334 0 5 538 9 933 436 50 114 6 2477 86 3 0 11 6 6206 0 702 531 105 840 408 57 167 15 3106 84 4 0 11 7 5302 0 0 614 18 1075 516 65 204 15 2413 85 4 0 11 March 2, 2026 at 07:00:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2237 0 0 2644 113 871 468 32 31 0 2547 96 4 0 0 1 3 0 0 416 8 529 288 37 25 0 4031 97 3 0 0 2 784 0 7 592 13 1194 600 42 78 1 3021 96 4 0 0 3 503 0 14 665 32 997 548 49 30 1 2552 97 3 0 0 4 332 0 3 651 110 660 366 50 35 0 2684 97 3 0 0 5 331 0 0 571 16 796 437 36 27 0 1821 98 2 0 0 6 4 0 774 654 110 849 455 26 31 0 2277 97 3 0 0 7 4 0 0 438 6 570 328 34 36 0 2567 98 2 0 0 March 2, 2026 at 07:00:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 2550 107 823 432 58 56 0 2791 96 4 0 0 1 279 0 0 518 13 789 396 59 62 0 4599 96 4 0 0 2 797 0 7 609 12 1086 545 49 65 0 3300 97 3 0 0 3 287 0 0 523 5 888 445 46 66 0 2357 98 2 0 0 4 28 0 24 734 116 838 423 56 71 0 2883 97 3 0 0 5 5 0 0 495 21 701 381 45 25 0 1952 98 2 0 0 6 311 0 758 670 108 938 497 50 39 0 3016 96 4 0 0 7 340 0 0 548 18 865 466 46 66 0 2856 97 3 0 0 March 2, 2026 at 07:00:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 258 0 0 2444 110 473 270 36 16 0 1599 97 3 0 0 1 258 0 0 477 12 723 375 41 76 0 4336 96 4 0 0 2 725 0 7 626 16 1027 541 38 35 0 2605 97 3 0 0 3 271 0 0 424 6 568 320 52 81 0 2831 96 4 0 0 4 485 0 2 709 114 788 414 42 34 0 2866 96 4 0 0 5 780 0 14 507 24 745 403 34 68 1 2274 97 3 0 0 6 262 0 760 563 104 682 386 30 31 0 2220 96 4 0 0 7 73 0 0 638 13 1073 559 35 91 0 2755 97 3 0 0 March 2, 2026 at 07:00:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2603 113 817 445 42 49 0 2525 96 4 0 0 1 0 0 0 510 19 800 419 44 34 0 3973 96 4 0 0 2 0 0 7 512 8 804 423 44 38 0 2584 97 3 0 0 3 4 0 0 440 8 566 328 42 72 0 2749 97 3 0 0 4 3 0 2 644 110 604 332 41 43 0 2612 97 3 0 0 5 0 0 14 539 10 842 458 44 22 0 2132 98 2 0 0 6 0 0 747 627 113 791 438 36 33 0 2241 97 3 0 0 7 1 0 0 532 13 731 404 36 81 0 2563 97 3 0 0 March 2, 2026 at 07:00:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 111 185 47 12 1 0 219 14 1 0 85 1 0 0 0 172 38 229 58 17 4 0 2150 14 1 0 85 2 1 0 7 93 14 109 30 14 2 0 584 13 0 0 87 3 0 0 0 94 5 139 67 10 4 0 563 16 0 0 84 4 0 0 2 284 110 83 24 7 6 0 365 17 0 0 82 5 0 0 14 71 6 93 40 6 0 0 566 14 0 0 85 6 0 0 88 270 104 99 43 13 7 0 285 16 0 0 83 7 14 0 0 66 3 69 27 11 7 0 492 15 0 0 85 March 2, 2026 at 07:00:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 107 114 0 3 0 0 0 0 1 0 99 1 0 0 0 107 43 132 1 4 3 0 1830 0 1 0 99 2 0 0 7 32 10 32 1 1 0 0 276 0 0 0 100 3 0 0 0 15 1 8 1 1 0 0 305 0 0 0 100 4 0 0 2 231 113 22 0 0 0 0 10 0 0 0 100 5 0 0 14 13 7 4 0 1 0 0 266 0 0 0 100 6 0 0 4 211 102 4 0 1 0 0 1 0 0 0 100 7 0 0 0 12 2 8 0 1 3 0 294 0 0 0 100 March 2, 2026 at 07:00:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 104 112 0 3 0 0 0 0 1 0 99 1 0 0 0 26 8 50 1 1 3 0 1830 0 1 0 99 2 1 0 7 99 45 92 0 2 0 0 260 0 0 0 100 3 0 0 0 10 1 4 1 0 0 0 300 0 0 0 100 4 0 0 2 242 116 32 1 1 1 0 12 0 0 0 100 5 0 0 14 9 1 10 0 1 2 0 266 0 0 0 100 6 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 7 0 0 0 12 3 8 0 0 7 0 294 0 0 0 100 March 2, 2026 at 07:00:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 116 0 0 0 0 5 0 1 0 99 1 0 0 0 117 54 142 2 0 4 0 1824 0 1 0 99 2 0 0 7 15 3 10 0 0 0 0 266 0 0 0 100 3 0 0 0 12 1 10 0 0 0 0 307 0 0 0 100 4 3 0 2 226 109 16 1 0 0 0 13 0 0 0 100 5 0 0 14 28 11 28 0 3 1 0 302 0 0 0 100 6 0 0 4 214 101 14 0 1 1 0 3 0 0 0 100 7 0 0 0 10 2 6 0 0 8 0 297 0 0 0 100 March 2, 2026 at 07:00:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 3388 106 2279 116 397 1504 2 6493 22 10 0 68 1 4 0 0 1291 22 2202 151 387 1268 1 5889 26 8 0 67 2 2 0 0 1308 11 2210 106 307 1379 2 5366 17 7 0 77 3 1 0 0 1392 191 2399 172 351 1469 1 7801 22 8 0 70 4 31 0 2 1283 111 1750 99 332 1435 2 4809 22 7 0 71 5 2 0 21 935 14 1453 55 232 1338 0 4640 19 7 0 75 6 7 0 1027 1182 112 1946 89 309 1381 1 5032 18 8 0 74 7 30 0 0 880 19 1443 64 237 1361 3 4805 18 7 0 76 March 2, 2026 at 07:00:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2565 115 1021 14 251 4227 0 603 3 8 0 89 1 0 0 0 728 9 1556 19 267 3873 0 397 4 8 0 88 2 0 0 14 430 6 944 12 233 3931 0 272 2 8 0 90 3 0 0 0 930 493 997 18 240 3957 0 2216 4 9 0 88 4 2 0 2 755 114 1217 10 292 4467 1 616 2 7 0 91 5 1 0 21 488 17 1038 21 265 3622 0 1096 4 8 0 89 6 0 0 18 640 110 945 21 245 4005 0 616 4 8 0 88 7 3 0 7 422 6 917 13 229 3853 1 439 2 8 0 90 March 2, 2026 at 07:00:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 108 114 0 8 1 0 0 0 1 0 99 1 0 0 0 79 30 78 0 7 1 0 6 0 0 0 100 2 0 0 0 40 13 33 0 4 0 0 0 0 0 0 100 3 0 0 0 25 3 50 1 0 6 0 2033 0 0 0 99 4 1 0 2 220 104 10 0 1 10 0 384 0 0 0 100 5 0 0 21 43 22 32 0 0 1 0 539 0 0 0 100 6 0 0 4 212 102 4 0 1 0 0 0 0 0 0 100 7 0 0 0 21 3 20 0 1 0 0 4 0 0 0 100 March 2, 2026 at 07:00:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 116 108 0 7 0 0 0 0 1 0 99 1 0 0 0 98 24 72 0 4 0 0 2 0 0 0 100 2 0 0 112 7 0 3 0 0 0 0 0 0 0 0 100 3 0 0 0 58 15 64 1 1 1 0 2026 0 0 0 99 4 0 0 3 239 104 12 1 3 0 0 219 0 0 0 100 5 0 0 21 57 19 40 0 0 0 0 542 0 0 0 100 6 0 0 3 227 102 6 0 0 0 0 1 0 0 0 100 7 0 0 0 24 1 4 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:00:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 2117 105 120 0 5 2 0 10 0 1 0 99 1 0 0 0 72 31 66 0 2 0 0 0 0 0 0 100 2 0 0 7 15 1 12 0 2 1 0 0 0 0 0 100 3 0 0 0 59 21 74 2 2 8 0 2024 0 0 0 99 4 0 0 7 218 105 8 0 0 16 0 308 0 0 0 100 5 0 0 21 43 17 40 1 0 1 0 550 0 0 0 100 6 0 0 7 215 102 10 0 1 1 0 18 0 0 0 100 7 0 0 0 20 4 12 0 1 1 0 21 0 0 0 100 March 2, 2026 at 07:00:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 3488 110 2549 78 365 1334 1 5270 9 9 0 82 1 0 0 0 1024 12 1648 70 271 1303 0 4136 17 8 0 75 2 0 0 0 751 5 1175 28 172 1531 2 3024 24 7 0 69 3 0 0 0 1277 207 1950 68 284 1546 1 6441 13 8 0 79 4 26 0 3 1291 112 1833 46 268 1421 3 4599 9 8 0 83 5 0 0 14 988 17 1657 58 234 1484 0 3659 18 5 0 76 6 6 0 997 1103 123 1825 91 269 1206 0 4858 16 8 0 76 7 0 0 7 729 7 1208 37 179 1590 2 3130 17 6 0 77 March 2, 2026 at 07:00:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2225 102 350 1 72 1115 0 0 0 3 0 97 1 0 0 0 206 45 351 1 78 988 0 0 0 2 0 98 2 0 0 0 132 0 278 1 56 1254 0 0 0 2 0 98 3 0 0 0 325 181 344 2 74 1362 0 2021 0 3 0 97 4 0 0 2 341 103 312 0 77 1279 0 291 0 3 0 97 5 0 0 14 305 3 629 2 69 1075 0 267 0 2 0 98 6 0 0 4 355 116 290 2 75 1053 0 9 0 2 0 98 7 0 0 7 128 5 260 2 60 1089 0 260 0 2 0 98 March 2, 2026 at 07:00:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 757 0 119 2121 102 154 0 12 6 14 124 0 1 0 99 1 107 0 0 156 51 160 0 11 8 5 171 0 0 0 100 2 32 0 2 41 1 40 0 9 7 5 142 0 0 0 100 3 21 0 0 50 3 80 1 10 12 4 2198 0 0 0 99 4 747 0 2 253 107 47 3 8 7 5 6840 2 1 0 97 5 1884 0 14 53 8 47 2 9 3 2 633 0 1 0 99 6 16 0 4 257 109 57 0 10 8 5 109 0 0 0 100 7 8 0 7 47 4 47 0 7 8 3 331 0 0 0 100 March 2, 2026 at 07:00:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 113 0 1 0 0 39 0 1 0 99 1 0 0 0 82 31 83 0 2 0 0 12 0 0 0 100 2 0 0 0 48 21 44 0 1 0 0 0 0 0 0 100 3 0 0 0 14 3 36 1 0 8 0 2106 0 0 0 99 4 0 0 2 213 104 4 0 0 2 0 300 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 6 0 0 4 220 107 14 0 0 0 0 8 0 0 0 100 7 0 0 7 19 5 20 0 2 0 0 265 0 0 0 100 March 2, 2026 at 07:00:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38 0 0 2905 107 1731 15 62 24 0 3971 5 3 0 92 1 13 0 0 1124 5 2369 18 73 22 0 7853 4 3 0 93 2 137 0 0 648 45 1145 7 42 17 0 2766 2 1 0 97 3 73 0 0 847 6 2047 7 65 11 0 8642 3 2 0 95 4 5 0 2 499 104 572 12 48 39 0 3805 6 2 0 93 5 221 0 14 227 2 467 5 29 17 0 3107 2 1 0 97 6 195 0 4 963 106 1608 13 44 21 0 4246 3 2 0 95 7 3 0 7 463 5 966 3 24 6 0 2224 2 1 0 97 March 2, 2026 at 07:00:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 71 0 0 6814 104 9997 172 632 1986 0 24840 23 18 0 59 1 16 0 7 4722 17 9644 129 646 2305 0 22281 19 17 0 64 2 7 0 0 3888 19 7740 98 428 2137 0 16846 16 14 0 71 3 40 0 0 4230 215 8677 146 582 2299 0 20954 18 16 0 66 4 11 0 3 2978 117 5735 83 447 2223 1 15437 12 12 0 75 5 11 0 14 2474 13 5359 178 381 2194 0 12817 11 10 0 79 6 9 0 3 3446 112 7052 79 493 2237 0 15608 13 13 0 74 7 7 0 0 2333 16 4948 68 338 2227 1 9847 9 10 0 81 March 2, 2026 at 07:00:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 5791 104 7743 65 355 525 0 19568 18 13 0 69 1 22 0 0 3672 16 7516 67 346 416 1 17493 16 10 0 74 2 2 0 0 3124 10 6323 38 253 444 1 13957 12 9 0 79 3 4 0 7 3875 127 7894 54 311 479 1 18058 15 11 0 74 4 0 0 3 2485 113 4769 43 269 490 0 12862 11 8 0 82 5 3 0 0 1936 6 4038 38 178 485 1 10393 9 7 0 84 6 10 0 17 2598 112 5148 39 269 470 0 13342 11 7 0 82 7 14 0 0 2016 20 4121 30 167 386 0 9985 8 6 0 86 March 2, 2026 at 07:00:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 110 0 1 0 0 0 0 1 0 99 1 1 0 0 10 1 6 0 0 0 0 5 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 3 0 0 7 14 2 12 0 0 0 0 285 0 0 0 100 4 0 0 2 242 114 42 0 2 0 0 39 0 0 0 100 5 0 0 0 20 6 10 0 1 4 0 302 0 0 0 100 6 0 0 18 214 104 44 1 0 0 0 2086 0 0 0 99 7 0 0 0 114 51 110 0 1 10 0 294 0 0 0 100 March 2, 2026 at 07:00:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 106 0 0 0 0 0 0 1 0 99 1 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 2 0 0 0 13 2 12 0 1 1 0 2 0 0 0 100 3 0 0 7 11 2 10 0 0 0 0 263 0 0 0 100 4 0 0 2 214 104 6 0 0 0 0 6 0 0 0 100 5 0 0 0 15 1 10 0 0 8 0 302 0 0 0 100 6 0 0 18 266 131 94 1 1 2 0 2086 0 1 0 99 7 0 0 0 68 31 62 0 0 11 0 294 0 0 0 100 March 2, 2026 at 07:00:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 0 1 0 0 0 1 0 99 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 0 0 0 12 2 2 0 1 1 0 0 0 0 0 100 3 0 0 7 15 3 10 0 0 1 0 263 0 0 0 100 4 0 0 7 221 104 18 0 1 1 0 4 0 0 0 100 5 0 0 0 18 2 12 0 1 4 0 301 0 0 0 100 6 0 0 21 326 161 152 1 0 1 0 2085 0 1 0 99 7 0 0 0 12 2 6 0 1 6 0 294 0 0 0 100 March 2, 2026 at 07:00:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2214 102 319 2 53 425 0 12 0 2 0 98 1 0 0 0 125 4 244 3 60 449 0 0 0 2 0 98 2 0 0 0 218 1 431 1 52 360 0 8 0 1 0 99 3 0 0 7 285 151 250 1 56 444 0 269 0 1 0 99 4 0 0 3 328 104 259 1 59 443 0 4 0 1 0 99 5 0 0 0 126 5 251 3 50 398 0 301 0 1 0 99 6 0 0 17 436 154 414 3 54 432 0 2078 0 2 0 98 7 0 0 0 107 3 227 2 50 488 0 303 0 2 0 98 March 2, 2026 at 07:00:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 114 0 0 0 0 7 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 8 0 6 0 0 0 0 9 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 4 0 0 2 217 105 8 0 0 0 0 1 0 0 0 100 5 0 0 0 22 2 22 0 1 9 0 335 0 0 0 100 6 0 0 18 309 153 136 1 0 1 0 2061 0 0 0 99 7 0 0 0 23 8 20 0 0 6 0 310 0 0 0 99 March 2, 2026 at 07:00:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 109 126 0 0 0 0 15 0 1 0 99 1 0 0 0 9 1 6 0 0 0 0 6 0 0 0 100 2 0 0 0 11 2 8 0 0 0 0 5 0 0 0 100 3 0 0 7 13 2 10 0 0 0 0 266 0 0 0 100 4 1 0 2 224 107 20 0 0 0 0 15 0 0 0 100 5 0 0 0 25 7 12 0 0 1 0 271 0 0 0 100 6 0 0 18 315 154 148 1 1 0 0 2060 0 0 0 99 7 0 0 0 14 2 12 0 0 0 0 304 0 0 0 100 March 2, 2026 at 07:00:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 128 162 0 1 0 0 19 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 7 0 0 0 100 3 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 4 0 0 2 215 104 6 0 0 0 0 0 0 0 0 100 5 0 0 0 16 1 12 0 0 1 0 300 0 0 0 100 6 0 0 18 215 106 38 1 0 0 0 2063 0 0 0 99 7 0 0 0 70 31 68 0 1 1 0 309 0 0 0 100 March 2, 2026 at 07:00:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 153 224 0 1 0 0 18 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 24 9 20 0 0 1 0 24 0 0 0 100 3 0 0 7 10 2 6 1 0 0 0 260 0 0 0 100 4 0 0 2 217 105 8 0 0 0 0 1 0 0 0 100 5 0 0 0 16 1 10 1 0 5 0 295 0 0 0 100 6 0 0 18 213 104 38 1 0 0 0 2061 0 0 0 99 7 0 0 0 13 2 12 0 0 3 0 298 0 0 0 100 March 2, 2026 at 07:00:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 151 214 0 0 0 0 4 0 1 0 99 1 0 0 0 15 2 14 0 1 1 0 1 0 0 0 100 2 0 0 0 9 0 8 0 1 0 0 3 0 0 0 100 3 0 0 7 12 3 8 0 0 0 0 261 0 0 0 100 4 0 0 2 218 105 10 0 0 3 0 1 0 0 0 100 5 0 0 0 15 1 10 0 0 2 0 302 0 0 0 100 6 0 0 18 215 105 40 2 0 2 0 2059 0 1 0 99 7 0 0 0 30 10 30 0 1 3 0 306 0 0 0 100 March 2, 2026 at 07:00:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2930 144 1888 19 59 15 0 5014 4 3 0 93 1 6 0 0 677 4 1336 12 72 28 0 4132 3 2 0 95 2 19 0 0 773 10 1556 14 51 15 0 3095 3 2 0 95 3 0 0 7 664 2 1331 8 46 10 0 3437 2 2 0 96 4 12 0 2 1038 112 1894 11 42 11 0 7990 3 2 0 95 5 21 0 0 304 2 573 11 27 17 0 3058 2 3 0 96 6 1 0 18 580 104 783 11 33 24 0 5389 6 2 0 93 7 13 0 0 382 5 805 8 26 32 0 4082 3 2 0 95 March 2, 2026 at 07:00:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 14 6747 114 9818 88 369 154 0 25560 23 15 0 62 1 11 0 0 5164 17 10641 83 391 87 0 24281 20 14 0 66 2 12 0 0 3947 6 7954 51 255 124 0 17638 16 10 0 74 3 8 0 0 4324 9 9052 65 327 115 0 22712 19 12 0 69 4 5 0 2 2991 114 5564 34 241 134 0 14633 13 8 0 79 5 0 0 0 1948 25 3995 23 146 61 0 11772 10 6 0 83 6 2 0 11 3558 112 7194 38 232 99 0 17420 13 9 0 78 7 0 0 0 2064 10 4385 16 124 98 0 11646 10 7 0 83 March 2, 2026 at 07:00:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 6899 109 10150 61 356 155 0 26550 24 16 0 60 1 12 0 0 4699 14 9382 60 397 72 0 21015 17 12 0 71 2 7 0 0 3625 13 7400 33 250 157 0 19393 18 11 0 71 3 7 0 0 3882 14 8064 49 312 69 0 18346 14 10 0 75 4 7 0 2 2388 110 4541 31 239 98 0 13211 12 7 0 81 5 9 0 0 3003 7 6219 33 167 70 0 13852 12 8 0 79 6 4 0 25 3272 110 6470 35 215 127 0 16633 13 9 0 78 7 1 0 0 2615 15 5564 15 119 84 0 15915 12 8 0 80 March 2, 2026 at 07:01:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 14 6013 104 8311 54 290 75 0 20975 19 13 0 69 1 6 0 0 3614 15 7495 38 297 97 0 18842 15 10 0 75 2 10 0 0 3015 10 6207 32 210 60 0 14006 12 8 0 79 3 5 0 0 3407 16 7189 46 283 61 0 15101 12 8 0 80 4 5 0 2 2110 108 3857 25 202 67 0 10341 9 6 0 85 5 8 0 0 1742 17 3621 17 136 104 0 11047 10 6 0 84 6 2 0 11 2520 113 4982 20 179 51 0 14289 11 7 0 82 7 8 0 0 1119 11 2377 13 85 77 0 8839 6 4 0 90 March 2, 2026 at 07:01:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2359 102 660 1 84 994 0 273 0 3 0 97 1 0 0 0 160 2 345 1 91 1058 0 2 0 3 0 97 2 0 0 0 197 1 400 0 72 861 0 0 0 3 0 97 3 0 0 0 337 196 296 1 84 900 0 308 0 3 0 97 4 0 0 2 370 103 359 0 84 1019 0 2 0 3 0 97 5 0 0 0 216 36 397 1 78 985 0 1 0 2 0 98 6 0 0 11 387 128 361 1 89 1051 0 863 0 3 0 97 7 0 0 0 155 3 372 2 75 1050 0 1496 0 3 0 96 March 2, 2026 at 07:01:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2131 102 144 0 5 18 0 274 0 1 0 99 1 0 0 0 62 1 107 0 8 27 0 16 0 0 0 100 2 0 0 0 42 2 68 0 11 22 0 211 0 0 0 100 3 0 0 0 66 37 49 1 8 20 0 104 0 0 0 100 4 0 0 2 236 102 56 0 9 31 0 3 0 0 0 100 5 0 0 0 30 4 42 0 9 19 0 5 0 0 0 100 6 0 0 11 266 118 81 1 8 34 0 844 0 0 0 100 7 0 0 0 129 49 178 1 7 35 0 1497 0 1 0 99 March 2, 2026 at 07:01:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2135 126 172 0 2 0 0 270 0 1 0 99 1 0 0 0 55 24 50 0 1 6 0 296 0 0 0 100 2 0 0 0 14 3 8 1 1 10 0 296 0 0 0 100 3 0 0 0 17 5 14 1 0 0 0 18 0 0 0 100 4 0 0 2 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 20 9 14 0 0 1 0 16 0 0 0 100 6 0 0 11 228 106 25 1 2 0 0 571 0 0 0 100 7 0 0 0 23 6 48 1 0 1 0 1495 0 0 0 100 March 2, 2026 at 07:01:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 107 118 0 3 0 0 301 0 1 0 99 1 0 0 0 111 53 106 0 0 11 0 295 0 0 0 100 2 0 0 0 14 2 10 0 0 13 0 301 0 0 0 100 3 0 0 0 12 0 14 0 1 1 0 4 0 0 0 100 4 0 0 2 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 6 0 0 11 225 105 20 0 2 0 0 576 0 0 0 100 7 0 0 0 13 3 38 1 0 2 0 1495 0 0 0 100 March 2, 2026 at 07:01:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2118 104 122 0 5 1 0 286 0 1 0 99 1 0 0 0 117 53 115 0 3 6 0 300 0 0 0 100 2 0 0 0 12 2 8 0 1 10 0 300 0 0 0 100 3 0 0 0 22 7 18 0 0 2 0 16 0 0 0 100 4 0 0 2 221 104 18 0 3 0 0 6 0 0 0 100 5 0 0 0 9 1 6 0 0 0 0 3 0 0 0 100 6 0 0 11 219 105 11 0 1 1 0 565 0 0 0 100 7 0 0 0 12 2 38 1 0 1 0 1499 0 0 0 100 March 2, 2026 at 07:01:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 110 0 0 0 0 272 0 1 0 99 1 0 0 0 39 13 34 0 0 6 0 306 0 0 0 100 2 0 0 0 62 27 58 0 1 6 0 304 0 0 0 100 3 0 0 0 56 22 56 0 2 0 0 5 0 0 0 100 4 0 0 2 218 105 10 0 0 0 0 3 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 11 213 104 10 0 0 0 0 561 0 0 0 100 7 0 0 0 15 2 44 1 0 1 0 1495 0 0 0 100 March 2, 2026 at 07:01:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1875 0 14 2166 102 174 45 8 6 0 553 18 2 0 80 1 2 0 0 141 6 204 92 12 6 0 640 19 0 0 81 2 1 0 6 115 7 198 70 8 19 0 678 19 0 0 81 3 4 0 7 265 51 365 128 13 7 0 499 18 1 0 81 4 2 0 2 314 104 175 86 6 10 0 432 18 1 0 81 5 21 0 0 104 6 152 60 16 6 0 295 19 0 0 81 6 3 0 123 270 105 251 45 14 2 0 1263 18 1 0 81 7 0 0 0 113 5 203 85 10 2 0 1914 19 1 0 80 March 2, 2026 at 07:01:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 14 2593 104 829 445 33 24 0 1968 97 3 0 0 1 0 0 7 582 22 912 493 28 38 0 2096 98 2 0 0 2 22 0 0 601 5 961 516 33 24 0 2058 98 2 0 0 3 8 0 0 426 0 569 330 33 17 0 1317 98 2 0 0 4 0 0 3 887 111 1181 608 32 18 0 1922 98 2 0 0 5 0 0 0 466 38 602 341 35 14 0 1281 98 2 0 0 6 3 0 675 640 105 913 487 32 24 0 2052 98 2 0 0 7 4 0 0 408 5 533 291 33 9 0 2623 98 2 0 0 March 2, 2026 at 07:01:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2613 109 912 487 33 22 0 2011 97 3 0 0 1 2 0 7 528 21 821 448 34 21 0 2054 98 2 0 0 2 0 0 0 463 11 696 383 28 21 0 1690 98 2 0 0 3 0 0 0 448 2 646 361 36 15 0 1284 98 2 0 0 4 1 0 2 620 106 568 326 28 29 0 1141 98 2 0 0 5 0 0 0 420 3 538 311 32 12 0 1063 98 2 0 0 6 0 0 648 609 132 726 397 30 17 0 1626 98 2 0 0 7 0 0 0 462 6 673 356 34 13 0 2776 97 3 0 0 March 2, 2026 at 07:01:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2465 108 608 330 36 22 0 1174 97 3 0 0 1 2 0 0 473 7 735 405 29 25 0 1842 98 2 0 0 2 4 0 0 486 30 808 407 52 37 0 2212 97 3 0 0 3 120 0 0 443 6 688 373 49 17 0 1509 98 2 0 0 4 93 0 14 625 112 654 348 48 23 0 1277 98 2 0 0 5 588 0 0 461 10 693 375 38 35 0 1787 97 3 0 0 6 6 0 539 551 103 613 349 33 28 0 1639 97 3 0 0 7 5 0 21 462 19 664 364 38 31 0 3281 97 3 0 0 March 2, 2026 at 07:01:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2443 104 522 298 41 18 0 1016 97 3 0 0 1 9 0 0 535 8 899 464 43 37 0 1796 97 3 0 0 2 0 0 0 450 10 658 353 40 32 0 1510 97 3 0 0 3 0 0 0 518 43 747 404 37 29 0 1307 98 2 0 0 4 259 0 3 733 115 815 438 34 28 0 1513 97 3 0 0 5 2 0 0 544 10 878 463 37 35 0 1781 97 3 0 0 6 4 0 619 504 105 541 303 43 29 0 1680 97 3 0 0 7 3 0 21 505 9 713 379 40 31 0 3316 97 3 0 0 March 2, 2026 at 07:01:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2439 106 499 287 40 28 0 1405 96 4 0 0 1 0 0 0 454 9 689 375 41 27 0 1564 98 2 0 0 2 1 0 0 468 16 718 392 31 23 0 1814 97 3 0 0 3 0 0 0 533 12 742 414 40 33 0 1363 97 3 0 0 4 0 0 2 696 125 693 393 30 22 0 1224 98 2 0 0 5 0 0 0 385 6 537 305 31 16 0 1216 98 2 0 0 6 0 0 592 551 110 638 352 26 17 0 1227 98 2 0 0 7 1 0 14 406 19 557 298 37 38 0 3162 97 3 0 0 March 2, 2026 at 07:01:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 7 2218 108 313 120 27 12 0 1032 42 2 0 56 1 0 0 0 145 4 161 95 18 24 0 651 43 1 0 56 2 0 0 0 136 6 151 75 16 7 0 603 43 0 0 56 3 0 0 0 205 2 298 155 19 6 0 521 45 1 0 54 4 0 0 2 447 136 337 140 21 13 0 560 43 1 0 56 5 0 0 0 163 8 181 103 14 14 0 358 45 1 0 54 6 0 0 242 419 124 336 180 12 3 0 552 45 1 0 54 7 0 0 14 163 4 265 129 11 6 0 2545 44 1 0 55 March 2, 2026 at 07:01:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 108 0 0 0 0 278 0 1 0 99 1 0 0 0 18 5 14 0 0 6 0 304 0 0 0 100 2 0 0 0 12 3 8 0 0 3 0 304 0 0 0 100 3 0 0 0 23 3 20 0 0 0 0 5 0 0 0 100 4 0 0 2 309 151 102 0 1 0 0 0 0 0 0 100 5 0 0 0 30 10 22 1 1 0 0 9 0 0 0 100 6 0 0 4 212 101 10 0 1 0 0 0 0 0 0 100 7 0 0 14 14 4 42 1 0 0 0 2087 0 1 0 99 March 2, 2026 at 07:01:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 104 108 0 0 0 0 262 0 1 0 99 1 0 0 0 15 5 10 0 0 1 0 295 0 0 0 100 2 0 0 0 15 3 10 1 0 3 0 320 0 0 0 100 3 0 0 0 38 10 32 1 0 0 0 30 0 0 0 100 4 0 0 2 327 158 126 1 2 0 0 17 0 0 0 100 5 0 0 0 13 1 14 0 0 0 0 7 0 0 0 100 6 0 0 4 208 101 4 0 0 1 0 4 0 0 0 100 7 0 0 14 13 3 40 2 0 1 0 2091 0 1 0 99 March 2, 2026 at 07:01:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 104 0 0 0 0 260 0 1 0 99 1 0 0 0 15 5 10 0 0 1 0 295 0 0 0 100 2 0 0 0 11 2 8 0 0 2 0 311 0 0 0 100 3 0 0 0 21 1 18 0 0 0 0 3 0 0 0 100 4 0 0 2 332 162 126 0 0 0 0 14 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 7 0 0 14 18 3 52 1 1 0 0 2088 0 0 0 99 March 2, 2026 at 07:01:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2938 108 1465 65 202 223 0 3354 16 5 0 79 1 26 0 7 872 14 1557 107 231 263 2 4672 12 4 0 83 2 0 0 0 908 9 1484 37 177 265 0 3737 8 5 0 87 3 0 0 0 809 25 1268 59 180 216 1 3671 15 6 0 79 4 0 0 2 818 135 844 34 108 220 0 3078 21 5 0 74 5 0 0 0 696 11 1042 25 111 328 0 2806 11 4 0 84 6 6 0 760 874 109 1291 42 154 347 0 3543 8 5 0 86 7 2 0 14 691 16 1079 25 83 228 0 4712 6 5 0 89 March 2, 2026 at 07:01:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3027 106 2038 45 430 3940 0 1253 7 10 0 84 1 1 0 7 800 9 1705 47 443 4066 1 2252 7 11 0 82 2 0 0 0 790 8 1689 35 417 3869 6 1575 5 10 0 85 3 0 0 10 1397 620 1917 59 440 4226 1 1970 6 12 0 82 4 1 0 23 1134 107 1952 37 466 4013 1 1414 5 10 0 84 5 20 0 0 814 15 1686 35 391 4181 4 1596 5 10 0 85 6 0 0 284 973 130 1712 43 411 4130 0 1558 5 11 0 84 7 1 0 14 714 9 1511 37 358 3782 2 3101 4 9 0 87 March 2, 2026 at 07:01:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2349 137 626 1 118 1278 0 0 0 3 0 97 1 0 0 7 277 5 580 0 112 1243 0 262 0 3 0 97 2 0 0 0 176 1 393 2 90 1124 0 1077 0 3 0 97 3 0 0 0 428 232 451 1 95 1286 0 305 0 3 0 97 4 0 0 2 493 104 588 1 141 1201 0 294 0 3 0 97 5 0 0 7 251 10 517 1 102 1001 0 9 0 2 0 98 6 0 0 4 459 109 527 1 104 1179 0 0 0 3 0 97 7 0 0 14 234 8 486 3 97 1060 0 921 0 3 0 97 March 2, 2026 at 07:01:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2115 111 129 0 2 1 0 3 0 1 0 99 1 0 0 7 68 22 46 0 2 1 0 260 0 0 0 100 2 0 0 0 75 25 82 1 2 1 0 1434 0 0 0 99 3 0 0 0 30 2 8 1 3 5 0 303 0 0 0 100 4 0 0 3 244 106 16 0 1 2 0 298 0 0 0 100 5 0 0 0 51 13 28 1 2 1 0 18 0 0 0 100 6 0 0 3 232 101 14 0 1 1 0 3 0 0 0 100 7 0 0 14 28 3 10 0 1 1 0 570 0 0 0 100 March 2, 2026 at 07:01:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 102 106 0 0 0 0 1 0 1 0 99 1 21 0 7 23 5 18 0 1 0 0 268 0 0 0 100 2 0 0 0 29 11 50 1 0 0 0 1434 0 0 0 100 3 0 0 0 96 43 92 0 1 0 0 306 0 0 0 100 4 0 0 2 220 106 10 0 0 0 0 295 0 0 0 100 5 0 0 0 28 11 22 0 0 0 0 10 0 0 0 100 6 0 0 4 211 102 4 0 0 0 0 1 0 0 0 100 7 0 0 14 9 2 6 0 0 0 0 565 0 0 0 100 March 2, 2026 at 07:01:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3120 107 1732 67 256 764 1 4332 13 7 0 80 1 0 0 0 1074 13 1860 79 232 839 2 4448 20 6 0 74 2 1 0 0 911 19 1463 41 180 829 0 4693 13 6 0 81 3 0 0 7 1116 129 1665 80 206 649 1 5300 12 7 0 81 4 0 0 2 977 113 1180 59 177 711 1 4454 31 6 0 64 5 0 0 0 768 10 1121 37 119 648 1 4340 16 7 0 77 6 1 0 1012 1102 121 1788 35 194 911 0 3436 7 6 0 87 7 0 0 14 945 7 1589 53 142 777 0 4068 13 4 0 82 March 2, 2026 at 07:01:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2436 150 839 1 165 1785 1 300 0 4 0 96 1 0 0 0 345 2 754 2 170 1913 0 9 0 4 0 96 2 0 0 0 280 3 662 3 160 1888 1 1425 0 4 0 96 3 0 0 7 640 360 726 1 167 1773 1 260 0 4 0 96 4 0 0 2 587 107 850 2 192 1937 1 315 0 4 0 96 5 0 0 0 369 16 768 1 144 1846 0 305 0 3 0 96 6 0 0 4 515 102 705 1 179 1868 1 6 0 4 0 96 7 0 0 14 292 2 642 1 135 1838 1 266 0 4 0 96 March 2, 2026 at 07:01:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 152 204 0 0 0 0 321 0 1 0 99 1 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 21 7 44 1 0 1 0 1430 0 0 0 100 3 0 0 7 18 2 14 0 0 0 0 260 0 0 0 100 4 0 0 2 217 106 8 0 0 1 0 301 0 0 0 100 5 0 0 0 25 9 18 0 0 0 0 302 0 0 0 100 6 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 7 0 0 14 10 2 10 0 0 0 0 268 0 0 0 100 March 2, 2026 at 07:01:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 152 204 0 0 0 0 301 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 10 2 34 1 0 1 0 1424 0 0 0 100 3 0 0 7 19 2 16 0 0 0 0 260 0 0 0 100 4 0 0 2 221 108 12 1 0 3 0 299 0 0 0 100 5 0 0 0 25 10 20 0 0 3 0 303 0 0 0 100 6 0 0 4 210 101 4 0 0 0 0 0 0 0 0 100 7 0 0 14 10 1 12 0 1 0 0 266 0 0 0 100 March 2, 2026 at 07:01:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 210 0 1 1 0 300 0 1 0 99 1 0 0 0 12 2 8 0 1 0 0 76 0 0 0 100 2 0 0 0 16 4 40 2 0 0 0 1436 0 0 0 100 3 0 0 7 22 3 18 0 0 0 0 261 0 0 0 100 4 0 0 2 219 106 10 0 1 2 0 301 0 0 0 100 5 0 0 0 27 10 22 0 0 2 0 307 0 0 0 100 6 0 0 4 217 104 12 0 0 0 0 10 0 0 0 100 7 0 0 14 11 1 12 0 0 0 0 272 0 0 0 100 March 2, 2026 at 07:01:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2285 151 467 1 87 1105 0 300 0 4 0 96 1 0 0 0 139 2 322 2 83 1324 0 2 0 4 0 96 2 0 0 0 146 2 356 3 80 1180 0 1424 0 4 0 96 3 0 0 7 293 140 343 2 101 1156 0 260 0 3 0 97 4 0 0 2 361 107 362 2 89 1433 0 298 0 4 0 96 5 0 0 0 123 1 289 2 69 1124 0 294 0 3 0 97 6 0 0 4 347 108 323 2 82 1285 0 6 0 4 0 96 7 0 0 14 271 4 598 2 80 1107 0 270 0 3 0 97 March 2, 2026 at 07:01:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2334 133 576 8 90 1100 0 70 0 3 0 97 1 0 0 0 234 2 502 2 93 1111 0 0 0 3 0 97 2 0 0 0 204 5 421 3 82 1094 0 10 0 2 0 98 3 0 0 7 421 211 514 1 103 1089 0 272 0 3 0 97 4 0 0 2 413 107 454 5 84 1250 0 1723 0 3 0 97 5 0 0 0 179 7 333 3 66 1012 0 294 0 2 0 98 6 0 0 4 398 112 389 2 86 1197 0 5 0 2 0 98 7 0 0 14 265 12 530 0 74 1003 0 525 0 2 0 98 March 2, 2026 at 07:01:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 151 202 0 0 0 0 1 0 1 0 99 1 0 0 0 11 2 6 0 0 1 0 2 0 0 0 100 2 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 3 0 0 7 20 2 16 1 0 0 0 260 0 0 0 100 4 0 0 2 221 107 40 2 0 2 0 1715 0 0 0 99 5 0 0 0 7 1 2 0 0 1 0 294 0 0 0 100 6 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 7 0 0 14 25 11 24 0 0 0 0 575 0 0 0 100 March 2, 2026 at 07:01:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 150 206 0 2 1 0 6 0 1 0 99 1 0 0 0 13 2 8 0 1 1 0 76 0 0 0 100 2 0 0 0 17 5 10 0 0 1 0 9 0 0 0 100 3 0 0 7 29 6 22 0 1 1 0 267 0 0 0 100 4 0 0 7 221 107 40 1 0 6 0 1719 0 0 0 99 5 0 0 0 14 3 6 0 0 4 0 301 0 0 0 100 6 0 0 7 210 101 6 0 1 0 0 0 0 0 0 100 7 0 0 14 34 14 26 0 0 1 0 583 0 0 0 100 March 2, 2026 at 07:01:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 111 122 0 0 0 0 1 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 3 0 0 0 100 2 0 0 0 9 1 4 0 1 1 0 0 0 0 0 100 3 0 0 7 83 32 84 0 2 1 0 270 0 0 0 100 4 0 0 2 261 127 82 1 1 0 0 1720 0 0 0 99 5 0 0 0 12 2 6 0 0 0 0 295 0 0 0 100 6 0 0 4 210 102 4 0 0 0 0 1 0 0 0 100 7 0 0 14 9 2 4 0 0 0 0 566 0 0 0 100 March 2, 2026 at 07:01:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 18 5 16 0 0 1 0 12 0 0 0 100 3 0 0 7 43 13 40 0 0 2 0 275 0 0 0 100 4 0 0 2 328 158 152 2 1 0 0 1723 0 0 0 99 5 0 0 0 14 4 10 0 0 2 0 301 0 0 0 100 6 0 0 4 209 101 4 0 0 3 0 0 0 0 0 100 7 0 0 14 8 2 6 0 0 0 0 566 0 0 0 100 March 2, 2026 at 07:01:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 118 1 2 0 0 15 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 4 0 0 0 100 3 1 0 7 38 10 36 1 0 0 0 275 0 0 0 100 4 0 0 2 321 157 140 2 0 1 0 1708 0 0 0 99 5 0 0 0 17 9 2 0 0 3 0 294 0 0 0 100 6 0 0 4 217 102 10 0 1 0 0 6 0 0 0 100 7 0 0 14 11 2 10 0 0 0 0 568 0 0 0 100 March 2, 2026 at 07:01:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 0 0 0 6 0 1 0 99 1 0 0 0 13 2 8 1 0 0 0 76 0 0 0 100 2 0 0 0 23 8 19 0 1 0 0 21 0 0 0 100 3 0 0 7 40 11 34 1 0 0 0 273 0 0 0 100 4 0 0 2 324 157 144 1 1 2 0 1698 0 0 0 99 5 0 0 0 12 1 12 0 1 3 0 294 0 0 0 100 6 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 7 0 0 14 9 3 8 0 1 0 0 566 0 0 0 100 March 2, 2026 at 07:01:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 104 0 0 0 0 1 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 25 10 20 0 0 0 0 9 0 0 0 100 3 0 0 7 18 2 14 1 0 0 0 260 0 0 0 100 4 0 0 2 323 158 144 1 0 1 0 1704 0 0 0 99 5 4 0 0 14 3 10 0 0 2 0 299 0 0 0 100 6 0 0 4 214 101 12 0 2 0 0 0 0 0 0 100 7 0 0 14 7 2 4 0 0 0 0 589 0 0 0 100 March 2, 2026 at 07:01:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 738 0 0 2132 100 108 2 5 5 4 6501 2 2 0 96 1 0 0 0 50 2 34 0 7 5 0 35 0 0 0 100 2 0 0 0 45 11 28 0 1 2 0 29 0 0 0 100 3 2605 0 119 43 3 73 2 4 7 10 714 1 1 0 98 4 109 0 2 283 118 131 0 10 19 17 1826 0 0 0 99 5 75 0 2 124 40 136 0 10 14 7 484 0 0 0 100 6 35 0 4 245 101 56 0 11 7 7 193 0 0 0 100 7 14 0 14 38 2 35 0 6 10 5 615 0 0 0 100 March 2, 2026 at 07:01:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 0 0 1 0 1 0 99 1 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 2 0 0 0 28 10 24 0 0 2 0 9 0 0 0 100 3 0 0 7 23 3 22 0 1 0 0 260 0 0 0 100 4 0 0 2 222 107 42 2 1 9 0 1787 0 0 0 99 5 0 0 0 108 51 104 0 0 6 0 294 0 0 0 100 6 0 0 4 210 101 4 0 0 0 0 0 0 0 0 100 7 0 0 14 14 3 16 0 1 0 0 567 0 0 0 100 March 2, 2026 at 07:01:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 103 144 4 8 10 0 1890 3 1 0 96 1 1 0 0 37 1 23 1 5 0 0 138 0 0 0 100 2 0 0 0 419 9 1133 3 7 3 0 5950 1 1 0 98 3 0 0 7 160 4 477 2 7 4 0 2812 1 0 0 99 4 0 0 2 226 108 50 1 4 13 0 2603 0 1 0 99 5 0 0 0 121 56 121 0 5 1 0 372 0 0 0 100 6 99 0 4 217 101 14 0 1 19 0 840 0 0 0 100 7 3 0 14 21 2 24 1 3 16 0 1396 0 0 0 100 March 2, 2026 at 07:01:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 6542 106 9397 71 387 141 0 24456 23 15 0 62 1 12 0 14 4804 9 10001 91 396 147 0 26151 22 14 0 64 2 30 0 0 3515 7 7217 56 293 78 0 18184 17 10 0 73 3 254 0 7 4270 25 8853 76 387 118 0 20099 17 11 0 72 4 54 0 2 3193 122 6085 38 275 101 0 16546 14 9 0 77 5 18 0 0 2617 15 5293 23 158 132 0 11728 10 7 0 83 6 11 0 4 3440 112 6922 54 258 62 0 17494 14 10 0 76 7 3 0 0 1946 10 4124 23 127 158 0 10331 8 5 0 86 March 2, 2026 at 07:01:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 7049 107 10489 60 368 149 0 24194 23 15 0 62 1 12 0 0 5094 13 10621 54 389 105 0 22889 20 13 0 67 2 19 0 14 3374 14 6992 38 252 113 0 19123 17 11 0 72 3 17 0 7 4644 21 9724 49 314 136 0 23096 18 13 0 69 4 16 0 7 2805 121 5239 27 246 109 0 13821 12 8 0 79 5 10 0 0 1994 19 4083 18 134 86 0 13628 11 7 0 82 6 2 0 7 2876 110 5750 26 209 105 0 15080 12 9 0 79 7 5 0 0 1382 6 2777 9 104 48 0 7451 6 4 0 90 March 2, 2026 at 07:01:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 8 0 2 0 0 2 0 1 0 99 1 0 0 0 23 3 18 0 2 1 0 3 0 0 0 100 2 0 0 14 19 4 22 0 3 0 0 266 0 0 0 100 3 0 0 7 128 11 124 2 0 6 0 568 0 0 0 100 4 0 0 2 320 154 112 0 3 0 0 4 0 0 0 100 5 0 0 0 20 6 44 1 2 3 0 1790 0 0 0 100 6 0 0 4 211 102 8 0 1 0 0 3 0 0 0 100 7 0 0 0 9 2 4 0 1 0 0 300 0 0 0 100 March 2, 2026 at 07:01:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2267 102 410 2 44 559 0 4 0 2 0 98 1 0 0 0 88 0 193 1 52 620 0 0 0 1 0 99 2 0 0 14 85 3 172 1 33 582 0 266 0 2 0 98 3 0 0 7 228 109 214 1 38 504 0 581 0 2 0 98 4 0 0 2 377 153 267 1 46 489 0 2 0 2 0 98 5 0 0 0 84 5 194 3 47 509 0 1790 0 2 0 98 6 0 0 4 275 101 171 1 48 625 0 4 0 2 0 98 7 0 0 0 68 1 149 0 41 506 0 303 0 2 0 98 March 2, 2026 at 07:01:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 102 218 1 13 158 0 13 0 1 0 99 1 0 0 0 88 1 168 0 24 147 0 2 0 0 0 100 2 0 0 14 163 4 301 0 27 165 0 267 0 1 0 99 3 0 0 7 174 105 131 1 25 137 0 573 0 1 0 99 4 0 0 2 279 108 130 0 20 147 0 4 0 0 0 100 5 0 0 0 171 55 248 1 15 160 0 1791 0 1 0 99 6 0 0 4 264 103 111 0 16 149 0 8 0 0 0 100 7 0 0 0 65 1 113 0 13 91 0 300 0 0 0 100 March 2, 2026 at 07:01:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 108 0 0 0 0 39 0 1 0 99 1 0 0 0 10 1 8 0 0 0 0 9 0 0 0 100 2 0 0 14 15 3 10 0 0 1 0 294 0 0 0 100 3 0 0 7 13 4 10 0 0 3 0 566 0 0 0 100 4 0 0 2 228 110 22 0 1 0 0 9 0 0 0 100 5 0 0 0 117 54 142 1 0 1 0 1789 0 0 0 99 6 0 0 4 212 102 9 0 0 0 0 4 0 0 0 100 7 0 0 0 14 2 14 0 1 0 0 301 0 0 0 100 March 2, 2026 at 07:01:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 110 0 1 0 0 2 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 14 3 12 1 0 3 0 563 0 0 0 100 4 0 0 2 237 112 24 1 0 0 0 13 0 0 0 100 5 0 0 0 117 54 142 1 1 3 0 1787 0 0 0 99 6 0 0 4 210 102 6 0 0 0 0 2 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 2, 2026 at 07:01:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 12 1 14 0 1 0 0 1 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 16 4 14 0 0 4 0 574 0 0 0 100 4 0 0 2 231 112 22 0 1 0 0 14 0 0 0 100 5 0 0 0 44 18 66 1 0 1 0 1791 0 0 0 99 6 0 0 4 285 139 82 0 1 0 0 4 0 0 0 100 7 0 0 0 10 1 6 0 1 2 0 300 0 0 0 100 March 2, 2026 at 07:01:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 1 0 99 1 0 0 0 13 2 10 0 0 1 0 2 0 0 0 100 2 0 0 14 13 1 18 0 1 3 0 266 0 0 0 100 3 0 0 7 13 3 12 0 1 3 0 558 0 0 0 100 4 4 0 2 222 108 14 0 0 4 0 10 0 0 0 100 5 0 0 0 20 5 46 1 1 2 0 1789 0 0 0 100 6 0 0 4 320 157 116 0 0 0 0 7 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 March 2, 2026 at 07:01:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 115 1 1 0 0 3 0 1 0 99 1 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 13 3 12 0 0 2 0 562 0 0 0 100 4 0 0 2 214 103 8 0 1 0 0 9 0 0 0 100 5 0 0 0 28 10 48 2 1 1 0 1789 0 0 0 100 6 0 0 4 324 158 118 0 0 0 0 17 0 0 0 100 7 0 0 0 14 2 13 0 1 0 0 310 0 0 0 100 March 2, 2026 at 07:01:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 2 0 0 14 7 1 4 0 0 1 0 266 0 0 0 100 3 0 0 7 19 3 22 1 1 3 0 564 0 0 0 100 4 0 0 2 215 103 8 0 0 0 0 2 0 0 0 100 5 0 0 0 25 5 48 1 0 5 0 1787 0 0 0 99 6 0 0 4 325 160 120 0 1 0 0 13 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 March 2, 2026 at 07:01:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2405 102 891 2 10 1 0 4198 1 1 0 98 1 3 0 0 30 2 12 0 2 9 0 849 0 2 0 98 2 0 0 14 21 2 27 1 10 1 0 317 0 0 0 100 3 0 0 7 23 4 27 1 6 8 0 1473 0 0 0 99 4 0 0 7 227 103 26 0 5 1 0 63 0 0 0 100 5 0 0 0 32 5 61 2 3 7 0 1842 0 1 0 99 6 0 0 7 339 161 137 3 4 18 0 1833 2 1 0 98 7 0 0 0 14 2 8 0 3 1 0 324 0 0 0 100 March 2, 2026 at 07:01:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 7215 112 11229 66 348 138 0 33652 27 17 0 55 1 7 0 0 5108 16 10640 95 414 86 0 25572 20 14 0 65 2 21 0 14 3950 13 7883 54 262 66 0 17795 16 10 0 74 3 7 0 7 4211 11 8884 74 325 114 0 21082 17 11 0 71 4 4 0 2 2573 132 4622 32 214 98 0 11443 10 7 0 83 5 1 0 0 2152 21 4399 24 111 64 0 10785 9 6 0 85 6 2 0 4 3124 110 6139 36 207 82 0 15448 15 9 0 76 7 19 0 0 2114 11 4335 36 132 87 0 11959 10 6 0 83 March 2, 2026 at 07:01:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 6272 107 8768 99 464 593 0 22953 22 15 0 63 1 14 0 0 4751 8 9790 74 448 578 0 23650 21 15 0 64 2 9 0 0 3673 12 7456 42 307 619 0 17774 14 11 0 75 3 10 0 14 4456 108 9391 77 380 771 0 22930 18 13 0 69 4 10 0 9 3146 115 6162 53 317 726 0 18500 16 12 0 72 5 8 0 0 2581 18 5244 33 210 702 0 11129 10 8 0 82 6 7 0 4 3219 120 6448 61 329 725 0 15670 13 9 0 78 7 11 0 0 2381 18 4996 33 224 600 0 10046 9 7 0 84 March 2, 2026 at 07:01:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 6561 109 9432 64 395 179 0 22641 21 14 0 65 1 8 0 0 4694 10 9685 73 431 209 0 22979 19 13 0 68 2 8 0 0 3591 12 7327 45 278 167 0 19368 16 11 0 73 3 6 0 14 4028 70 8366 57 341 187 0 20210 15 11 0 74 4 11 0 3 3095 119 5943 49 275 235 0 15836 13 9 0 78 5 4 0 7 2027 17 4296 21 162 201 0 12183 11 7 0 83 6 6 0 3 3293 122 6390 30 247 159 0 13326 12 8 0 80 7 3 0 0 2000 14 4126 31 166 146 0 13181 12 7 0 81 March 2, 2026 at 07:01:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 104 0 5 6 0 595 0 1 0 99 1 0 0 0 73 30 64 0 2 0 0 0 0 0 0 100 2 0 0 0 10 2 2 1 0 0 0 1 0 0 0 100 3 0 0 14 12 3 38 1 1 13 0 2060 0 0 0 99 4 0 0 2 213 104 4 0 0 0 0 1 0 0 0 100 5 0 0 7 10 3 6 1 0 0 0 260 0 0 0 100 6 0 0 4 273 132 66 1 3 0 0 9 0 0 0 100 7 0 0 0 16 1 10 0 1 0 0 1 0 0 0 100 March 2, 2026 at 07:01:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 105 122 0 3 10 0 600 0 1 0 99 1 1 0 0 13 3 10 0 0 0 0 6 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 13 3 42 0 1 15 0 2069 0 0 0 99 4 0 0 2 212 103 4 0 0 0 0 3 0 0 0 100 5 0 0 7 12 3 10 0 0 0 0 266 0 0 0 100 6 0 0 4 341 161 134 1 1 0 0 14 0 0 0 100 7 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 March 2, 2026 at 07:01:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 111 126 1 0 10 0 603 0 1 0 99 1 0 0 0 15 2 16 0 1 0 0 1 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 16 4 42 1 0 7 0 2058 0 0 0 99 4 0 0 2 213 103 4 0 1 0 0 0 0 0 0 100 5 0 0 7 11 3 8 0 0 0 0 260 0 0 0 100 6 0 0 4 316 152 110 0 1 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:01:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2218 111 313 0 43 427 0 604 0 2 0 98 1 0 0 0 127 3 266 0 51 472 0 2 0 1 0 99 2 0 0 0 96 0 187 0 41 363 0 0 0 1 0 99 3 0 0 14 248 134 275 2 55 437 0 2066 0 1 0 98 4 0 0 2 316 103 234 0 52 458 0 0 0 1 0 99 5 0 0 7 109 3 218 0 42 472 0 260 0 1 0 99 6 0 0 4 416 152 339 0 52 508 0 0 0 1 0 99 7 0 0 0 217 1 442 0 36 355 0 1 0 1 0 99 March 2, 2026 at 07:01:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 106 124 0 0 8 0 606 0 0 0 99 1 0 0 0 11 1 9 0 1 1 0 4 0 0 0 100 2 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 3 0 0 14 18 4 46 1 1 6 0 2072 0 0 0 99 4 1 0 2 223 106 21 0 1 0 0 47 0 0 0 100 5 0 0 7 22 9 14 0 0 1 0 269 0 0 0 100 6 0 0 4 329 156 128 0 1 0 0 18 0 0 0 100 7 0 0 0 11 1 10 0 1 0 0 1 0 0 0 100 March 2, 2026 at 07:01:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 108 0 0 6 0 594 0 0 0 100 1 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 14 18 3 50 1 1 9 0 2058 0 0 0 100 4 0 0 2 213 103 6 0 0 0 0 9 0 0 0 100 5 0 0 7 16 6 12 1 0 0 0 268 0 0 0 100 6 0 0 4 332 158 126 0 0 0 0 10 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:02:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 105 154 11 12 5 0 781 3 1 0 96 1 4 0 0 36 6 95 10 5 1 0 359 3 0 0 97 2 1595 0 0 26 1 22 9 6 1 1 223 3 1 0 97 3 259 0 14 29 6 166 20 6 14 0 2501 3 1 0 96 4 8 0 7 244 106 60 5 13 3 0 133 3 0 0 97 5 0 0 7 40 4 56 4 13 1 0 353 3 0 0 97 6 1 0 49 342 157 143 2 8 0 0 56 3 0 0 97 7 0 0 0 25 2 43 2 12 3 0 150 3 0 0 97 March 2, 2026 at 07:02:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2461 123 664 285 42 29 0 2285 97 3 0 0 1 0 0 0 614 9 1052 542 49 23 0 1740 98 2 0 0 2 0 0 0 565 12 1106 557 36 49 0 1893 97 3 0 0 3 2 0 14 529 7 802 438 32 33 0 1784 98 2 0 0 4 1 0 2 697 110 768 398 36 41 0 3403 98 2 0 0 5 3 0 7 511 9 789 423 41 30 0 1932 98 2 0 0 6 6 0 662 636 124 780 415 32 31 0 1691 98 2 0 0 7 22 0 0 405 14 488 285 46 25 0 1361 98 2 0 0 March 2, 2026 at 07:02:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2475 105 568 309 42 15 0 1947 97 3 0 0 1 0 0 0 535 22 813 449 36 20 0 1689 98 2 0 0 2 20 0 0 501 16 716 381 32 21 0 1126 98 2 0 0 3 0 0 14 515 8 805 435 30 28 0 1780 98 2 0 0 4 0 0 3 613 109 605 320 31 18 0 2831 98 2 0 0 5 4 0 7 494 12 683 386 25 17 0 1713 98 2 0 0 6 0 0 606 515 108 609 335 35 26 0 1754 98 2 0 0 7 9 0 0 490 25 697 379 36 22 0 1441 98 2 0 0 March 2, 2026 at 07:02:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2543 126 779 422 29 29 0 1984 97 3 0 0 1 4 0 0 345 5 466 256 30 27 0 1254 98 2 0 0 2 3 0 0 526 12 871 462 29 46 0 1442 98 2 0 0 3 0 0 14 433 14 631 359 28 46 0 1435 98 2 0 0 4 0 0 2 651 111 633 351 25 34 0 3153 98 2 0 0 5 0 0 7 460 13 666 360 30 44 0 1869 98 2 0 0 6 0 0 620 627 119 787 433 32 30 0 1517 98 2 0 0 7 0 0 0 417 15 573 317 25 34 0 1343 98 2 0 0 March 2, 2026 at 07:02:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2531 126 734 392 52 49 0 2170 96 4 0 0 1 1 0 0 354 11 424 254 34 22 0 1125 98 2 0 0 2 2 0 0 472 5 757 395 35 43 0 1113 97 3 0 0 3 0 0 14 575 13 975 510 45 42 0 2160 98 2 0 0 4 0 0 3 654 111 662 346 54 66 0 3306 97 3 0 0 5 0 0 7 566 21 913 481 56 65 0 2397 98 2 0 0 6 0 0 619 612 107 734 404 43 41 0 1447 98 2 0 0 7 2 0 0 429 5 620 351 40 41 0 1455 98 2 0 0 March 2, 2026 at 07:02:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2434 121 486 281 31 34 0 1518 97 3 0 0 1 257 0 0 435 7 663 353 31 45 0 1294 98 2 0 0 2 0 0 0 573 12 1164 596 36 111 0 1764 97 3 0 0 3 2 0 0 384 4 494 293 37 82 0 1130 98 2 0 0 4 2 0 16 691 112 737 392 43 45 0 3119 97 3 0 0 5 0 0 7 356 10 471 282 37 39 0 1635 98 2 0 0 6 0 0 570 611 112 775 425 34 68 0 1956 97 3 0 0 7 0 0 0 411 29 489 284 35 83 0 1174 98 2 0 0 March 2, 2026 at 07:02:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2499 119 616 344 30 28 0 1807 97 3 0 0 1 0 0 0 446 22 567 318 27 46 0 1143 98 2 0 0 2 2 0 0 524 4 817 440 36 46 0 1160 98 2 0 0 3 0 0 0 489 6 711 392 32 61 0 1211 98 2 0 0 4 0 0 17 673 130 694 365 30 39 0 3158 97 3 0 0 5 0 0 7 398 8 610 338 41 35 0 1972 97 3 0 0 6 0 0 634 569 105 712 387 37 37 0 1657 98 2 0 0 7 0 0 0 417 5 599 314 42 38 0 1628 97 3 0 0 March 2, 2026 at 07:02:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 103 151 62 12 7 0 893 24 1 0 75 1 0 0 0 99 2 150 70 18 9 0 353 24 0 0 76 2 0 0 0 157 40 231 73 16 9 0 318 23 1 0 77 3 0 0 0 79 2 86 46 10 3 0 246 24 0 0 75 4 0 0 16 296 111 145 50 9 4 0 1996 24 1 0 76 5 0 0 7 114 15 115 37 15 4 0 469 21 0 0 78 6 0 0 88 254 103 77 41 9 12 0 571 24 0 0 75 7 0 0 0 97 7 113 58 8 1 0 194 24 0 0 76 March 2, 2026 at 07:02:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 112 0 3 5 0 597 0 1 0 99 1 0 0 0 12 3 8 0 1 0 0 8 0 0 0 100 2 0 0 0 109 50 106 0 1 0 0 3 0 0 0 100 3 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 4 0 0 17 247 115 74 1 3 0 0 1817 0 0 0 99 5 0 0 7 23 9 12 1 0 0 0 268 0 0 0 100 6 0 0 3 219 104 14 0 1 3 0 321 0 0 0 100 7 0 0 0 24 4 24 0 2 1 0 16 0 0 0 100 March 2, 2026 at 07:02:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 104 0 0 4 0 594 0 0 0 100 1 0 0 0 12 3 8 0 0 0 0 4 0 0 0 100 2 0 0 0 110 51 106 0 0 0 0 2 0 0 0 100 3 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 4 0 0 16 214 105 36 1 0 0 0 1788 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 6 0 0 4 211 103 4 1 0 8 0 259 0 0 0 100 7 0 0 0 29 10 26 0 0 0 0 13 0 0 0 100 March 2, 2026 at 07:02:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 108 0 1 19 0 596 0 1 0 99 1 0 0 0 19 2 16 0 1 1 0 9 0 0 0 100 2 0 0 0 116 53 112 0 1 0 0 8 0 0 0 100 3 0 0 0 19 2 12 0 0 1 0 0 0 0 0 100 4 0 0 21 218 106 40 1 0 1 0 1788 0 0 0 99 5 0 0 7 21 7 16 0 0 1 0 269 0 0 0 100 6 0 0 7 215 104 8 0 0 16 0 304 0 0 0 100 7 0 0 0 30 10 22 0 0 1 0 15 0 0 0 100 March 2, 2026 at 07:02:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3339 108 2224 105 353 972 1 6110 24 8 0 68 1 26 0 0 1223 7 2029 94 380 967 2 4707 16 8 0 76 2 2 0 0 1174 24 1873 78 273 1040 2 5119 20 8 0 72 3 17 0 0 1484 157 2355 121 353 1170 1 5425 15 7 0 78 4 2 0 23 1361 118 1911 54 305 1289 5 5652 11 8 0 80 5 0 0 0 848 8 1432 103 220 958 0 5201 24 5 0 71 6 0 0 1072 1107 110 1841 70 263 1129 2 4979 13 8 0 79 7 0 0 0 872 5 1437 44 198 1242 0 3695 14 6 0 79 March 2, 2026 at 07:02:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3521 104 2622 136 549 5586 2 4615 28 12 0 60 1 0 0 0 1702 5 3219 113 628 5413 1 6120 19 13 0 68 2 0 0 0 1277 5 2255 104 511 3589 1 4514 21 10 0 69 3 2 0 0 1978 620 2736 112 606 5405 0 4424 14 12 0 74 4 0 0 15 1601 118 2708 84 539 3760 1 4252 11 10 0 79 5 0 0 7 1169 23 2197 51 484 5772 0 3511 8 12 0 80 6 0 0 1090 1281 111 2340 101 522 5452 0 4730 15 12 0 72 7 0 0 0 1061 3 2012 74 408 5581 0 2903 14 11 0 76 March 2, 2026 at 07:02:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2347 101 650 6 128 1351 0 1431 0 4 0 96 1 0 0 0 264 8 528 5 131 1531 0 599 0 3 0 97 2 0 0 0 274 7 529 2 120 1356 0 13 0 3 0 97 3 0 0 7 551 292 585 0 123 1444 0 283 0 3 0 97 4 653 0 16 634 107 890 2 151 1451 0 437 0 4 0 96 5 0 0 0 351 58 631 1 132 1456 0 6 0 3 0 97 6 0 0 4 515 104 645 2 137 1376 0 301 0 3 0 97 7 0 0 0 245 0 509 0 120 1241 0 3 0 2 0 98 March 2, 2026 at 07:02:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 743 0 7 2138 102 95 4 10 9 7 8029 2 2 0 96 1 12 0 0 108 2 101 0 9 8 7 382 0 0 0 100 2 32 0 0 57 8 53 0 3 0 5 71 0 0 0 100 3 0 0 7 31 3 12 0 3 0 0 336 0 0 0 100 4 1953 0 130 238 104 60 1 2 3 13 504 1 1 0 99 5 118 0 0 152 52 166 0 10 8 12 421 0 0 0 100 6 27 0 6 257 103 60 0 11 10 7 480 0 0 0 100 7 16 0 0 41 2 37 0 7 3 3 116 0 0 0 100 March 2, 2026 at 07:02:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 138 1 1 0 0 1513 0 1 0 99 1 0 0 0 10 2 4 0 0 16 0 300 0 0 0 100 2 0 0 0 31 11 26 0 0 0 0 11 0 0 0 100 3 0 0 7 14 5 10 0 0 0 0 263 0 0 0 100 4 2 0 16 215 106 8 0 0 0 0 271 0 0 0 100 5 0 0 0 112 53 108 0 0 0 0 300 0 0 0 100 6 0 0 4 215 103 6 0 1 15 0 294 0 0 0 100 7 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 March 2, 2026 at 07:02:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43 0 0 2774 103 1533 23 78 24 0 7405 4 4 0 92 1 10 0 0 1369 7 3143 12 80 27 0 11542 5 3 0 92 2 8 0 0 703 12 1337 17 64 21 0 4131 3 2 0 95 3 266 0 7 829 10 1721 19 81 22 0 4805 3 2 0 94 4 4 0 16 644 107 829 10 59 22 0 4917 7 2 0 92 5 68 0 0 306 44 501 5 35 19 0 1695 2 1 0 98 6 242 0 4 943 105 1605 12 66 14 0 4575 3 2 0 95 7 89 0 0 349 3 680 3 28 20 0 2730 2 1 0 97 March 2, 2026 at 07:02:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 6884 108 10210 170 702 2035 0 25929 23 20 0 57 1 6 0 0 4881 13 10249 212 793 2407 0 24490 20 16 0 63 2 16 0 0 3444 15 7266 119 632 2296 0 18618 17 14 0 69 3 9 0 0 4226 340 8325 139 630 2351 0 16844 14 14 0 72 4 5 0 16 3058 115 6054 80 584 2508 1 12922 12 12 0 76 5 2 0 0 2623 15 5518 84 425 2172 0 9273 8 10 0 82 6 4 0 4 3582 111 7546 103 578 2313 0 19393 16 15 0 69 7 4 0 7 2625 14 5707 79 407 2378 0 12803 11 11 0 78 March 2, 2026 at 07:02:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 6007 109 8199 74 407 445 0 19997 18 13 0 69 1 8 0 7 3901 13 8193 63 435 429 0 21192 18 12 0 70 2 11 0 0 2989 13 6194 54 280 458 0 18245 14 10 0 76 3 5 0 0 3672 157 7519 62 391 433 0 16664 13 10 0 77 4 4 0 16 2702 114 5075 33 290 499 0 11049 10 7 0 84 5 2 0 0 1812 17 3703 34 210 393 0 8531 8 6 0 86 6 2 0 4 2631 121 5136 39 281 455 0 10524 9 7 0 84 7 6 0 0 1700 11 3680 33 172 411 0 10549 9 6 0 85 March 2, 2026 at 07:02:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 22 0 4 0 0 0 0 1 0 99 1 0 0 7 12 2 8 0 1 0 0 260 0 0 0 100 2 0 0 0 111 13 132 2 0 4 0 2125 0 0 0 99 3 0 0 0 112 52 106 0 0 0 0 2 0 0 0 100 4 0 0 16 226 105 24 0 4 0 0 266 0 0 0 100 5 0 0 0 10 0 2 0 0 0 0 0 0 0 0 100 6 0 0 4 210 102 2 0 0 0 0 0 0 0 0 100 7 0 0 0 17 2 8 0 1 0 0 294 0 0 0 100 March 2, 2026 at 07:02:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 108 0 0 1 0 0 0 1 0 99 1 0 0 7 14 4 8 0 0 1 0 260 0 0 0 100 2 0 0 0 37 13 58 1 1 8 0 2128 0 1 0 99 3 0 0 0 110 52 104 0 1 0 0 0 0 0 0 100 4 0 0 21 217 105 8 0 0 1 0 266 0 0 0 100 5 0 0 0 13 1 10 0 1 1 0 0 0 0 0 100 6 0 0 7 211 102 4 0 0 1 0 0 0 0 0 100 7 0 0 0 13 2 4 0 0 12 0 294 0 0 0 100 March 2, 2026 at 07:02:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 0 0 0 0 4 0 1 0 99 1 0 0 7 13 4 10 1 0 0 0 261 0 0 0 100 2 0 0 0 39 14 62 3 0 4 0 2121 0 0 0 99 3 0 0 0 111 52 108 0 1 1 0 6 0 0 0 100 4 0 0 16 217 106 10 0 1 0 0 271 0 0 0 100 5 0 0 0 8 0 8 0 0 0 0 7 0 0 0 100 6 0 0 4 209 102 4 0 1 0 0 3 0 0 0 100 7 21 0 0 16 4 10 0 1 7 0 305 0 0 0 100 March 2, 2026 at 07:02:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2215 100 340 0 65 483 0 0 0 2 0 98 1 0 0 7 133 5 283 2 58 577 0 265 0 2 0 98 2 0 0 0 146 13 312 2 43 551 0 2121 0 2 0 98 3 1 0 0 311 172 575 1 71 487 0 6 0 1 0 99 4 0 0 16 332 107 260 0 72 612 0 271 0 2 0 98 5 0 0 0 130 1 270 0 55 491 0 5 0 2 0 98 6 0 0 4 394 128 338 1 75 516 0 6 0 2 0 98 7 0 0 0 103 1 227 0 61 571 0 294 0 1 0 99 March 2, 2026 at 07:02:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 1 0 99 1 0 0 7 11 3 8 0 0 0 0 260 0 0 0 100 2 0 0 0 37 14 60 2 0 4 0 2109 0 0 0 99 3 0 0 0 26 8 26 0 0 0 0 24 0 0 0 100 4 0 0 16 214 105 8 0 0 0 0 266 0 0 0 100 5 0 0 0 16 6 6 0 0 0 0 7 0 0 0 100 6 0 0 4 317 153 112 0 0 0 0 12 0 0 0 100 7 0 0 0 16 1 18 0 1 9 0 294 0 0 0 100 March 2, 2026 at 07:02:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 0 0 0 21 0 1 0 99 1 0 0 7 11 3 8 0 0 0 0 260 0 0 0 100 2 0 0 0 40 16 64 1 0 10 0 2107 0 0 0 99 3 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 4 0 0 16 213 105 6 0 0 0 0 266 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 4 310 152 104 0 1 0 0 0 0 0 0 100 7 0 0 0 11 2 6 0 0 5 0 295 0 0 0 100 March 2, 2026 at 07:02:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 118 0 1 0 0 1 0 1 0 99 1 0 0 7 13 4 10 0 0 0 0 261 0 0 0 100 2 0 0 0 35 12 56 4 0 1 0 2101 0 0 0 99 3 0 0 0 11 2 4 0 0 0 0 2 0 0 0 100 4 0 0 16 213 105 6 0 0 0 0 266 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 4 308 152 102 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 6 0 0 5 0 294 0 0 0 100 March 2, 2026 at 07:02:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 113 1 1 0 0 8 0 1 0 99 1 0 0 7 18 4 18 0 1 1 0 261 0 0 0 100 2 0 0 0 40 14 64 2 0 11 0 2117 0 0 0 99 3 0 0 0 15 4 10 0 1 0 0 6 0 0 0 100 4 0 0 16 216 105 12 0 1 1 0 271 0 0 0 100 5 0 0 0 11 1 8 0 1 0 0 7 0 0 0 100 6 0 0 4 308 152 102 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 8 0 0 5 0 294 0 0 0 100 March 2, 2026 at 07:02:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 108 0 2 1 0 0 0 1 0 99 1 0 0 7 12 3 8 1 0 0 0 260 0 0 0 100 2 0 0 0 39 15 64 1 0 1 0 2109 0 0 0 99 3 0 0 0 71 32 68 0 1 0 0 6 0 0 0 100 4 0 0 16 214 105 8 0 0 0 0 269 0 0 0 100 5 0 0 0 9 1 6 0 0 0 0 0 0 0 0 100 6 0 0 4 258 124 50 0 1 2 0 0 0 0 0 100 7 0 0 0 14 2 12 0 0 4 0 295 0 0 0 100 March 2, 2026 at 07:02:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2726 100 1350 10 67 5 0 3237 3 2 0 95 1 0 0 7 811 4 1707 17 72 28 0 5155 4 3 0 94 2 0 0 0 528 14 1052 14 45 17 0 4273 2 2 0 96 3 5 0 0 831 46 1594 13 52 29 0 2957 2 3 0 95 4 0 0 16 599 106 807 8 29 26 0 4825 6 2 0 92 5 0 0 0 345 11 695 4 32 11 0 1745 2 1 0 97 6 4 0 4 1271 102 2807 12 39 8 0 12239 4 3 0 93 7 20 0 0 478 3 1017 6 29 31 0 3763 3 2 0 95 March 2, 2026 at 07:02:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 6712 110 9394 68 370 100 0 22279 21 13 0 66 1 7 0 0 4611 15 9428 82 393 94 0 24015 19 13 0 68 2 27 0 7 3160 13 6420 54 235 128 0 19930 16 10 0 73 3 6 0 0 4108 21 8421 76 326 107 0 20914 17 11 0 72 4 7 0 17 3637 116 7076 37 259 96 0 15540 13 9 0 77 5 2 0 0 3076 27 6297 27 161 75 0 13205 13 8 0 80 6 6 0 3 3241 116 6564 34 248 115 0 18139 15 10 0 75 7 0 0 0 2348 11 4919 20 152 82 0 11270 10 6 0 84 March 2, 2026 at 07:02:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 2 6627 111 9700 64 393 140 0 24726 23 15 0 62 1 8 0 0 5202 13 10742 86 417 88 0 26080 22 14 0 64 2 7 0 21 4028 17 8206 32 275 95 0 21738 17 11 0 71 3 11 0 0 4477 13 9306 69 314 91 0 20808 17 11 0 72 4 5 0 3 2770 119 5158 39 257 102 0 14917 12 8 0 80 5 2 0 0 2121 24 4322 18 143 69 0 10385 9 6 0 85 6 10 0 3 3136 123 6280 38 245 118 0 16182 14 9 0 77 7 4 0 0 2192 11 4586 23 144 50 0 11587 10 6 0 84 March 2, 2026 at 07:02:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 5597 107 7389 44 291 95 0 19249 18 12 0 70 1 6 0 0 3644 12 7535 62 309 56 0 18247 15 10 0 75 2 10 0 21 3078 16 6288 30 220 67 0 18046 14 9 0 78 3 5 0 0 2983 15 6222 33 236 70 0 15021 12 8 0 80 4 3 0 2 2351 120 4314 27 198 57 0 10290 9 6 0 85 5 17 0 0 1588 20 3414 18 109 64 0 9085 8 5 0 86 6 3 0 4 2251 109 4313 16 164 51 0 9469 8 5 0 87 7 2 0 0 1801 19 3749 17 104 59 0 9757 8 5 0 86 March 2, 2026 at 07:02:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2260 102 412 2 107 1054 0 294 0 4 0 96 1 0 0 0 197 11 424 4 103 1090 0 11 0 3 0 96 2 0 0 21 170 6 421 2 97 1067 0 2319 0 4 0 96 3 0 0 0 401 234 673 1 116 921 0 0 0 3 0 97 4 0 0 2 423 102 458 0 118 1183 0 0 0 3 0 97 5 0 0 0 181 3 383 2 91 991 0 0 0 3 0 97 6 0 0 4 383 106 420 2 110 1194 0 301 0 4 0 96 7 0 0 0 329 50 602 0 87 953 0 0 0 2 0 98 March 2, 2026 at 07:02:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 108 0 0 9 0 297 0 1 0 99 1 0 0 0 28 10 22 0 0 0 0 17 0 0 0 100 2 0 0 21 24 8 50 2 0 11 0 2322 0 1 0 99 3 0 0 0 20 6 16 0 0 0 0 9 0 0 0 100 4 0 0 2 213 102 8 0 1 0 0 10 0 0 0 100 5 0 0 0 27 8 18 0 0 0 0 5 0 0 0 100 6 0 0 4 221 106 20 0 1 0 0 320 0 0 0 100 7 0 0 0 110 50 108 0 1 0 0 5 0 0 0 100 March 2, 2026 at 07:02:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 148 198 0 1 6 0 294 0 1 0 99 1 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 2 0 0 21 20 7 48 1 0 12 0 2323 0 0 0 99 3 0 0 0 29 12 24 0 0 0 0 11 0 0 0 100 4 0 0 2 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 24 3 22 0 1 0 0 0 0 0 0 100 6 0 0 4 216 106 10 0 0 0 0 303 0 0 0 100 7 0 0 0 13 4 6 0 0 0 0 1 0 0 0 100 March 2, 2026 at 07:02:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 152 208 0 1 10 0 295 0 1 0 99 1 0 0 0 10 2 6 0 0 0 0 3 0 0 0 100 2 1 0 21 19 7 46 1 0 14 0 2343 0 0 0 99 3 0 0 0 31 13 26 0 0 0 0 12 0 0 0 100 4 0 0 2 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 6 0 0 4 216 103 14 0 1 0 0 300 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:02:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 212 0 0 13 0 297 0 1 0 99 1 0 0 0 13 2 10 0 0 0 0 8 0 0 0 100 2 0 0 21 20 7 48 1 1 12 0 2326 0 0 0 99 3 0 0 0 32 12 28 1 1 0 0 20 0 0 0 100 4 0 0 2 220 106 14 0 1 0 0 7 0 0 0 100 5 0 0 0 14 2 10 0 1 0 0 4 0 0 0 100 6 0 0 4 211 103 6 0 1 0 0 303 0 0 0 100 7 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 March 2, 2026 at 07:02:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 222 0 1 14 0 294 0 1 0 99 1 0 0 0 9 1 6 0 0 2 0 2 0 0 0 100 2 0 0 21 21 7 48 2 1 8 0 2319 0 0 0 99 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 2 231 113 22 0 0 0 0 11 0 0 0 100 5 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 6 0 0 4 215 104 10 0 0 4 0 300 0 0 0 100 7 0 0 0 11 1 10 0 1 3 0 1 0 0 0 100 March 2, 2026 at 07:02:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2230 142 291 65 9 10 0 726 19 2 0 79 1 0 0 0 159 6 295 131 23 16 0 402 20 1 0 80 2 2 0 21 125 10 228 77 14 20 0 3008 19 1 0 79 3 1 0 0 116 3 171 84 12 7 0 363 20 0 0 80 4 0 0 2 342 117 160 77 12 4 0 429 20 1 0 80 5 0 0 0 129 11 304 78 10 3 0 987 19 1 0 80 6 0 0 144 290 107 166 53 20 8 0 724 20 1 0 80 7 2 0 0 95 3 134 63 12 10 0 374 20 0 0 80 March 2, 2026 at 07:02:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2473 109 637 356 27 26 0 1865 97 3 0 0 1 0 0 0 409 9 673 364 31 58 0 1224 98 2 0 0 2 0 0 21 479 24 724 388 33 32 0 3716 98 2 0 0 3 0 0 0 469 8 755 419 33 32 0 1651 98 2 0 0 4 0 0 3 655 108 693 382 23 23 0 1378 98 2 0 0 5 0 0 0 447 39 640 355 29 39 0 1544 98 2 0 0 6 0 0 479 407 104 335 199 29 29 0 1582 98 2 0 0 7 0 0 0 418 1 655 363 32 30 0 1282 98 2 0 0 March 2, 2026 at 07:02:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2467 108 586 332 31 34 0 1644 97 3 0 0 1 3 0 7 483 7 812 434 31 44 0 1591 97 3 0 0 2 1 0 21 402 9 620 339 33 42 0 3779 97 3 0 0 3 0 0 0 349 6 419 260 30 25 0 1316 98 2 0 0 4 0 0 7 595 105 546 312 34 30 0 1391 98 2 0 0 5 67 0 0 497 30 726 390 36 16 0 1362 98 2 0 0 6 0 0 497 576 125 661 369 32 29 0 1676 98 2 0 0 7 0 0 0 488 11 766 427 32 31 0 1636 98 2 0 0 March 2, 2026 at 07:02:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2373 105 415 242 39 41 0 1217 97 3 0 0 1 0 0 0 552 21 962 509 27 68 0 1304 98 2 0 0 2 0 0 14 453 15 707 384 29 35 0 3448 97 3 0 0 3 0 0 0 489 27 725 404 36 42 0 1696 98 2 0 0 4 0 0 3 655 127 734 406 26 50 0 1649 98 2 0 0 5 2 0 0 325 6 465 273 26 30 0 1259 98 2 0 0 6 0 0 472 618 115 765 423 29 32 0 1998 97 3 0 0 7 0 0 0 351 4 561 299 45 39 0 1969 97 3 0 0 March 2, 2026 at 07:02:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 262 0 0 2386 102 536 295 40 32 0 1710 97 3 0 0 1 14 0 0 452 6 755 409 41 29 0 1714 98 2 0 0 2 263 0 14 480 25 806 415 40 31 0 3746 97 3 0 0 3 4 0 0 410 4 659 342 46 52 0 2022 97 3 0 0 4 3 0 2 605 110 645 332 44 39 0 1635 98 2 0 0 5 1 0 0 386 25 533 311 34 16 0 1499 98 2 0 0 6 298 0 424 518 108 566 332 37 28 0 1369 98 2 0 0 7 70 0 7 394 13 591 329 44 27 0 2095 98 2 0 0 March 2, 2026 at 07:02:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 41 0 0 2526 109 802 439 32 39 0 1657 97 3 0 0 1 0 0 0 387 6 576 320 29 26 0 1414 98 2 0 0 2 0 0 14 429 9 712 372 30 30 0 3483 98 2 0 0 3 151 0 0 428 9 682 371 36 52 0 1763 98 2 0 0 4 0 0 2 537 103 432 255 36 20 0 1323 98 2 0 0 5 73 0 0 421 42 562 315 27 17 0 1386 98 2 0 0 6 0 0 466 563 118 610 352 28 24 0 1514 98 2 0 0 7 1 0 7 389 20 529 293 36 33 0 2023 98 2 0 0 March 2, 2026 at 07:02:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2404 105 525 300 36 25 0 1570 97 3 0 0 1 0 0 0 437 7 773 418 28 39 0 1483 98 2 0 0 2 0 0 0 357 16 517 289 34 38 0 3202 97 3 0 0 3 0 0 0 417 11 632 344 31 38 0 1566 98 2 0 0 4 0 0 3 551 103 487 285 30 36 0 1158 98 2 0 0 5 0 0 14 451 8 730 394 38 31 0 1705 98 2 0 0 6 0 0 367 578 126 689 371 38 33 0 1547 97 3 0 0 7 0 0 7 485 26 801 426 37 32 0 2226 98 2 0 0 March 2, 2026 at 07:02:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2275 119 305 158 23 8 0 482 68 2 0 30 1 257 0 0 266 24 402 199 25 15 0 1030 68 2 0 30 2 0 0 0 260 9 439 231 19 15 0 2890 69 2 0 29 3 0 0 0 256 6 383 220 14 18 0 1071 69 1 0 29 4 0 0 10 446 107 327 191 16 6 0 1082 69 1 0 30 5 0 0 14 209 3 261 152 22 6 0 1059 68 1 0 31 6 1 0 213 402 120 312 169 24 22 0 701 70 1 0 29 7 0 0 0 207 5 253 154 23 21 0 936 70 1 0 29 March 2, 2026 at 07:02:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 112 0 0 1 0 8 0 1 0 99 1 0 0 0 115 52 112 0 1 1 0 15 0 0 0 100 2 0 0 0 33 9 62 1 3 2 0 1848 0 0 0 99 3 0 0 0 44 12 46 1 5 3 0 329 0 0 0 100 4 0 0 9 223 105 20 0 2 0 0 285 0 0 0 100 5 11 0 14 15 3 16 0 3 0 0 282 0 0 0 100 6 0 0 4 210 102 6 0 1 2 0 10 0 0 0 100 7 0 0 0 14 1 12 0 2 0 0 308 0 0 0 100 March 2, 2026 at 07:02:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 114 0 1 0 0 1 0 1 0 99 1 0 0 0 109 52 104 0 0 0 0 2 0 0 0 100 2 0 0 0 30 12 54 1 0 1 0 1831 0 0 0 99 3 0 0 0 12 2 8 0 1 1 0 294 0 0 0 100 4 0 0 9 221 104 16 0 1 0 0 260 0 0 0 100 5 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 6 0 0 4 211 103 6 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 10 0 0 0 0 301 0 0 0 100 March 2, 2026 at 07:02:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 125 1 1 0 0 7 0 1 0 99 1 0 0 0 108 51 104 0 1 0 0 3 0 0 0 100 2 5 0 0 41 17 64 1 0 1 0 1849 0 0 0 99 3 0 0 0 15 2 16 0 0 0 0 308 0 0 0 100 4 0 0 9 214 104 6 0 0 0 0 259 0 0 0 100 5 0 0 14 27 12 22 0 0 0 0 281 0 0 0 100 6 0 0 4 213 102 6 0 0 0 0 5 0 0 0 100 7 0 0 0 16 2 16 1 2 0 0 313 0 0 0 100 March 2, 2026 at 07:02:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 207 0 4 3066 101 2105 25 104 48 13 7071 5 5 0 90 1 85 0 22 1322 49 2755 24 100 32 9 4443 4 3 0 93 2 73 0 8 708 3 1419 25 65 40 11 7187 4 4 0 91 3 226 0 8 1065 2 2336 14 78 25 6 7856 5 5 0 90 4 101 0 18 832 105 1283 9 71 32 4 4774 4 2 0 93 5 4823 0 31 403 17 752 7 46 44 14 3219 4 2 0 94 6 392 0 45 958 104 1605 10 68 58 17 4589 4 3 0 94 7 84 0 5 346 1 706 7 44 34 18 2525 2 1 0 97 March 2, 2026 at 07:02:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1535 0 0 5971 104 8063 102 373 113 0 20229 39 12 0 49 1 1041 0 0 4455 5 9110 126 379 133 1 21464 37 12 0 52 2 522 0 3 3069 10 6304 91 287 109 0 16310 32 9 0 59 3 1057 0 0 3377 16 7000 103 296 98 3 17702 34 10 0 57 4 1559 0 7 2468 120 4597 71 232 128 3 10906 29 7 0 64 5 1521 0 14 1552 24 3084 52 151 90 1 7420 26 4 0 69 6 593 0 14 2493 113 4700 58 196 72 1 12645 30 7 0 63 7 1041 0 7 1531 5 3157 50 100 78 2 9310 29 5 0 66 March 2, 2026 at 07:02:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3384 0 0 2250 105 276 168 20 39 0 588 98 2 0 0 1 4260 0 0 251 5 452 249 29 39 1 1122 98 2 0 0 2 1421 0 0 293 4 428 248 14 11 0 638 99 1 0 0 3 4104 0 7 160 4 190 115 17 11 2 2638 98 2 0 0 4 2677 0 3 467 139 298 178 24 16 2 770 99 1 0 0 5 3652 0 14 242 8 364 214 24 28 1 864 98 2 0 0 6 2302 0 248 434 117 375 201 34 14 3 1091 98 2 0 0 7 2381 0 0 138 2 129 88 19 5 0 549 99 1 0 0 March 2, 2026 at 07:02:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 523 0 0 2456 107 639 346 68 342 0 591 97 3 0 0 1 436 0 0 526 17 901 479 71 233 0 1163 98 2 0 0 2 1288 0 0 307 4 455 252 60 286 0 583 97 3 0 0 3 259 0 7 548 223 491 260 74 327 0 2898 97 3 0 0 4 2 0 2 539 111 492 265 69 299 0 1051 98 2 0 0 5 1998 0 14 393 7 620 328 82 327 0 1053 97 3 0 0 6 2205 0 340 623 126 824 411 82 245 0 1061 97 3 0 0 7 1245 0 7 323 7 519 274 75 342 0 855 97 3 0 0 March 2, 2026 at 07:02:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2437 0 14 2564 129 1048 524 97 661 0 1021 96 4 0 0 1 660 0 0 467 3 820 414 90 657 0 493 98 2 0 0 2 1506 0 0 501 29 894 433 96 681 1 1067 97 3 0 0 3 1039 0 7 735 358 721 354 99 719 0 2586 97 3 0 0 4 150 0 2 609 105 764 381 84 742 0 830 98 2 0 0 5 661 0 0 381 11 714 365 95 655 0 804 98 2 0 0 6 791 0 200 528 105 703 337 92 693 0 577 98 2 0 0 7 1255 0 0 399 5 717 354 84 676 0 654 98 2 0 0 March 2, 2026 at 07:02:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 264 0 0 2309 106 365 213 21 14 0 942 98 2 0 0 1 706 0 14 300 16 410 237 32 34 0 915 99 1 0 0 2 1889 0 0 274 8 357 208 26 10 0 1101 99 1 0 0 3 2637 0 7 289 11 414 239 31 18 0 1365 98 2 0 0 4 610 0 3 486 120 388 212 31 24 0 2423 99 1 0 0 5 1390 0 0 238 5 353 204 24 48 0 788 99 1 0 0 6 2653 0 255 410 111 300 187 22 18 0 748 98 2 0 0 7 551 0 0 307 13 452 252 20 13 0 736 99 1 0 0 March 2, 2026 at 07:02:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2282 104 311 190 35 10 0 847 98 2 0 0 1 3 0 0 282 10 410 241 30 4 0 816 99 1 0 0 2 1 0 14 239 13 305 180 37 6 1 1164 99 1 0 0 3 5 0 0 337 7 500 289 29 9 1 1270 98 2 0 0 4 4 0 9 469 114 384 202 38 6 0 2669 99 1 0 0 5 775 0 0 203 2 261 161 29 7 0 511 99 1 0 0 6 1733 0 242 384 125 285 166 28 12 2 779 98 2 0 0 7 99 0 0 201 6 270 156 36 3 0 866 99 1 0 0 March 2, 2026 at 07:02:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2364 119 495 277 28 9 0 903 98 2 0 0 1 16 0 7 282 22 369 216 32 4 0 865 99 1 0 0 2 259 0 0 227 4 272 168 32 10 0 1030 99 1 0 0 3 143 0 0 262 4 341 201 34 6 1 816 99 1 0 0 4 174 0 2 393 106 253 134 31 16 0 2598 99 1 0 0 5 234 0 14 225 7 337 189 39 11 0 1292 99 1 0 0 6 0 0 242 421 118 373 217 30 12 0 660 99 1 0 0 7 145 0 7 234 4 281 177 28 10 1 553 99 1 0 0 March 2, 2026 at 07:02:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 258 0 0 2292 117 366 201 55 290 0 403 97 3 0 0 1 514 0 0 331 14 523 267 69 420 0 728 96 4 0 0 2 257 0 0 288 7 460 242 63 404 0 1167 96 4 0 0 3 371 0 0 402 182 328 180 51 331 0 525 97 3 0 0 4 0 0 10 497 108 455 221 68 373 0 2448 96 4 0 0 5 1905 0 0 246 4 391 198 56 426 0 1096 96 4 0 0 6 514 0 255 536 108 643 341 67 331 0 1074 98 2 0 0 7 113 0 0 488 26 786 400 75 211 0 570 99 1 0 0 March 2, 2026 at 07:02:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 771 0 14 2400 114 658 336 84 501 0 1032 97 3 0 0 1 771 0 0 380 3 681 340 90 461 0 849 98 2 0 0 2 257 0 0 527 16 935 471 86 416 1 763 98 2 0 0 3 0 0 0 718 355 864 424 94 417 0 811 98 2 0 0 4 514 0 3 643 106 784 391 83 485 0 1576 98 2 0 0 5 12 0 7 420 22 731 352 95 548 0 2773 98 2 0 0 6 0 0 255 534 107 649 326 78 454 0 723 98 2 0 0 7 257 0 0 345 5 610 300 84 487 0 741 98 2 0 0 March 2, 2026 at 07:02:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2432 111 735 360 109 1127 1 904 96 4 0 0 1 0 0 21 435 8 769 375 113 2187 1 1136 97 3 0 0 2 0 0 0 513 16 851 426 113 1411 0 622 98 2 0 0 3 260 0 0 881 391 1086 544 97 1709 0 1043 97 3 0 0 4 0 0 2 721 117 900 446 106 1135 0 1352 98 2 0 0 5 5 0 0 480 19 862 416 102 1784 0 2722 97 3 0 0 6 0 0 312 632 108 834 421 101 1786 1 876 97 3 0 0 7 0 0 0 634 10 1146 580 103 1466 1 889 97 3 0 0 March 2, 2026 at 07:03:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2446 118 749 368 91 2289 0 586 97 3 0 0 1 0 0 0 408 6 709 343 90 3119 0 733 97 3 0 0 2 0 0 0 425 6 755 373 97 2218 0 915 97 3 0 0 3 0 0 0 802 396 1192 584 101 3433 0 633 96 4 0 0 4 0 0 10 773 108 1047 519 94 2780 0 1476 97 3 0 0 5 0 0 0 462 24 830 390 105 3126 0 2603 97 3 0 0 6 4 0 269 667 115 934 462 105 1801 0 1218 97 3 0 0 7 0 0 0 421 4 764 388 93 2667 1 733 97 3 0 0 March 2, 2026 at 07:03:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2456 120 744 380 90 1683 0 978 97 3 0 0 1 0 0 0 476 19 871 434 94 2411 0 637 97 3 0 0 2 0 0 0 477 11 840 417 78 2411 0 772 97 3 0 0 3 0 0 14 877 417 1496 735 104 2323 0 2750 96 4 0 0 4 1 0 3 678 106 852 426 88 2415 0 649 98 2 0 0 5 0 0 7 500 4 898 454 88 1960 0 1117 97 3 0 0 6 0 0 241 679 111 895 441 98 1718 0 1247 98 2 0 0 7 1 0 0 520 11 985 485 83 1588 0 1077 97 3 0 0 March 2, 2026 at 07:03:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2395 102 568 295 56 374 0 800 96 4 0 0 1 0 0 0 369 2 554 298 64 373 0 704 96 4 0 0 2 0 0 0 395 11 647 332 76 218 0 753 98 2 0 0 3 0 0 0 586 225 601 314 64 317 0 789 97 3 0 0 4 0 0 3 658 110 822 408 66 434 0 2506 95 5 0 0 5 1 0 14 501 23 871 450 66 279 1 1074 96 4 0 0 6 0 0 297 527 107 549 311 55 336 0 1546 97 3 0 0 7 0 0 7 371 6 615 319 71 361 0 1380 98 2 0 0 March 2, 2026 at 07:03:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2366 102 601 296 92 1079 0 1440 97 3 0 0 1 1 0 1 355 6 616 309 87 622 0 915 98 2 0 0 2 0 0 0 363 10 620 323 75 761 1 1670 97 3 0 0 3 0 0 0 741 357 771 395 92 839 0 1484 97 3 0 0 4 20 0 2 624 114 769 373 90 835 0 3098 97 3 0 0 5 0 0 14 432 12 759 389 86 960 0 1708 98 2 0 0 6 1 0 228 745 115 994 501 85 969 1 1354 98 2 0 0 7 1 0 7 436 17 700 364 77 761 1 2317 98 2 0 0 March 2, 2026 at 07:03:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2425 107 628 330 84 2261 0 727 97 3 0 0 1 0 0 0 478 5 833 427 91 2356 0 967 97 3 0 0 2 0 0 7 738 6 1299 663 94 3220 0 703 97 3 0 0 3 1 0 0 844 403 793 413 87 2450 0 908 97 3 0 0 4 3 0 2 849 127 1164 576 97 2536 0 2209 97 3 0 0 5 3 0 0 464 14 801 408 99 2951 0 618 97 3 0 0 6 0 0 354 562 116 673 354 82 3227 0 1244 97 3 0 0 7 1 0 7 478 17 801 413 97 2622 0 1679 97 3 0 0 March 2, 2026 at 07:03:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 7 3234 106 2133 163 441 3916 0 5587 35 6 0 58 1 30 0 0 1165 10 1997 169 434 4271 1 4861 38 6 0 56 2 1 0 0 1173 16 2062 181 390 5379 4 5044 39 6 0 55 3 1 0 0 1431 552 1733 143 360 5038 1 5357 49 6 0 45 4 4 0 2 1264 115 1821 117 388 3797 1 4577 39 5 0 56 5 1 0 0 947 5 1630 132 318 5520 2 4322 38 6 0 57 6 4 0 817 1188 116 2050 143 400 4761 1 4476 26 6 0 68 7 20 0 0 1017 21 1826 101 336 4032 2 4144 33 5 0 63 March 2, 2026 at 07:03:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 2718 105 1203 51 266 2724 7 2503 7 8 0 85 1 10 0 7 592 8 1106 33 249 2848 4 1970 7 7 0 85 2 23 0 14 704 27 1232 24 241 3155 1 1418 4 5 0 91 3 4 0 0 1082 527 1520 44 267 2530 2 1878 4 7 0 89 4 2 0 10 864 108 1252 27 212 2981 1 1635 6 8 0 86 5 6 0 0 486 5 889 39 218 2337 0 1414 7 7 0 87 6 1 0 368 766 109 1220 38 270 2491 4 4365 6 6 0 89 7 1 0 0 536 15 999 34 211 2626 2 1988 5 6 0 88 March 2, 2026 at 07:03:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2226 103 394 3 107 658 0 507 0 3 0 97 1 0 0 0 158 5 359 1 108 634 0 3 0 2 0 98 2 0 0 7 261 56 465 2 103 624 0 5 0 2 0 98 3 0 0 0 502 356 348 4 99 686 0 20 0 3 0 97 4 0 0 2 603 102 865 3 111 656 0 0 0 2 0 98 5 0 0 0 228 1 523 2 106 701 0 2 0 2 0 98 6 0 0 18 342 105 369 6 100 747 0 1720 0 3 0 97 7 0 0 0 170 4 348 1 99 627 0 638 0 2 0 98 March 2, 2026 at 07:03:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2265 103 428 1 131 780 0 555 0 3 0 97 1 0 0 0 216 1 436 3 133 616 0 5 0 2 0 98 2 0 0 0 244 27 470 2 122 731 0 12 0 2 0 98 3 0 0 112 583 375 457 2 134 699 0 6 0 3 0 97 4 0 0 2 590 129 751 3 137 745 0 1 0 2 0 98 5 0 0 0 381 6 805 2 132 660 0 0 0 2 0 98 6 0 0 18 468 111 585 2 148 712 0 1195 0 3 0 97 7 0 0 0 223 12 460 3 124 739 0 1116 0 2 0 98 March 2, 2026 at 07:03:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2244 104 464 0 123 559 0 854 0 3 0 97 1 0 0 0 157 1 377 1 124 694 0 0 0 2 0 98 2 0 0 0 153 2 377 1 102 727 0 0 0 2 0 98 3 0 0 7 565 382 423 1 119 718 0 9 0 3 0 97 4 0 0 2 778 138 1132 1 128 588 0 0 0 2 0 98 5 0 0 0 148 1 383 2 120 672 0 1434 0 3 0 97 6 0 0 18 350 103 373 0 123 726 0 266 0 2 0 98 7 1 0 0 149 3 346 2 93 755 0 306 0 2 0 98 March 2, 2026 at 07:03:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2249 104 437 0 106 697 0 614 0 3 0 97 1 2 0 0 169 4 379 0 113 632 1 156 0 2 0 98 2 1 0 0 167 11 370 2 111 651 0 38 0 2 0 98 3 11 0 0 535 365 649 3 122 674 0 53 0 2 0 98 4 28 0 7 540 153 648 1 135 680 0 841 0 3 0 97 5 0 0 0 244 3 572 2 121 678 0 1475 0 3 0 97 6 4 0 28 445 106 528 1 120 653 0 1367 0 3 0 97 7 0 0 0 148 2 358 1 118 682 0 355 0 2 0 98 March 2, 2026 at 07:03:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2258 102 470 1 114 706 0 595 0 3 0 97 1 0 0 0 252 49 472 1 115 813 0 1 0 2 0 98 2 0 0 0 195 16 417 1 115 732 0 13 0 2 0 98 3 0 0 0 535 375 1110 0 106 638 0 1 0 2 0 98 4 0 0 3 363 103 378 1 116 788 0 0 0 2 0 98 5 0 0 0 170 2 402 2 101 748 0 22 0 3 0 97 6 0 0 24 371 105 436 3 126 791 0 1938 0 3 0 97 7 0 0 0 168 3 387 1 113 711 0 337 0 2 0 98 March 2, 2026 at 07:03:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2278 108 429 0 96 1079 0 600 0 3 0 97 1 0 0 0 191 1 447 1 108 858 0 0 0 2 0 98 2 0 0 0 287 34 486 0 96 1029 0 2 0 2 0 98 3 0 0 0 565 381 979 1 107 1022 0 0 0 3 0 97 4 0 0 2 394 102 421 3 115 1115 0 0 0 3 0 97 5 0 0 0 160 0 365 2 85 743 0 1 0 2 0 98 6 0 0 25 472 112 598 2 102 1043 0 1911 0 3 0 97 7 0 0 0 210 21 414 1 95 1062 0 336 0 2 0 98 March 2, 2026 at 07:03:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 112 72 0 2 3 0 604 0 1 0 99 1 21 0 0 15 3 10 0 0 0 0 15 0 0 0 100 2 0 0 0 18 3 18 0 1 0 0 15 0 0 0 100 3 0 0 0 9 1 6 0 0 0 0 7 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 1 0 0 0 100 5 0 0 0 21 7 10 0 0 0 0 2 0 0 0 100 6 0 0 25 217 106 18 0 1 1 0 528 0 0 0 100 7 0 0 0 181 52 204 1 0 12 0 1731 0 0 0 99 March 2, 2026 at 07:03:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2119 106 124 0 2 6 0 626 0 1 0 99 1 0 0 0 36 13 34 0 1 0 0 23 0 0 0 100 2 0 0 0 11 1 8 0 0 0 0 1 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 2 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 6 0 0 25 224 107 24 0 2 0 0 541 0 0 0 100 7 0 0 0 120 53 150 2 1 14 0 1752 0 0 0 99 March 2, 2026 at 07:03:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 116 0 0 9 0 600 0 1 0 99 1 0 0 0 31 12 26 0 0 0 0 14 0 0 0 100 2 0 0 0 13 2 10 0 0 0 0 7 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 3 0 0 0 100 4 0 0 2 210 102 2 0 0 0 0 3 0 0 0 100 5 0 0 0 12 2 8 0 0 0 0 2 0 0 0 100 6 0 0 25 211 105 8 0 0 0 0 527 0 0 0 100 7 0 0 0 111 52 136 1 0 14 0 1737 0 0 0 99 March 2, 2026 at 07:03:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 128 0 3 12 0 604 0 1 0 99 1 0 0 0 31 13 26 0 0 0 0 16 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 5 0 0 0 100 3 0 0 0 14 4 8 0 0 0 0 6 0 0 0 100 4 0 0 2 215 104 4 0 0 0 0 6 0 0 0 100 5 0 0 0 12 2 8 0 0 0 0 5 0 0 0 100 6 0 0 25 219 109 16 0 0 0 0 533 0 0 0 100 7 21 0 0 114 53 138 1 0 13 0 1699 0 0 0 100 March 2, 2026 at 07:03:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 118 150 0 1 9 0 594 0 1 0 99 1 0 0 0 35 12 34 1 1 0 0 11 0 0 0 100 2 0 0 0 12 1 10 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 6 0 0 1 0 0 0 0 0 100 4 0 0 2 210 102 2 0 0 2 0 0 0 0 0 100 5 0 0 0 12 2 8 0 0 0 0 2 0 0 0 100 6 0 0 25 216 107 14 0 0 2 0 532 0 0 0 100 7 0 0 0 80 37 104 0 0 9 0 1685 0 0 0 99 March 2, 2026 at 07:03:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 152 218 0 0 6 0 594 0 1 0 99 1 0 0 0 31 11 26 0 0 0 0 16 0 0 0 100 2 0 0 0 18 3 18 0 0 0 0 14 0 0 0 100 3 0 0 0 9 1 6 0 0 0 0 7 0 0 0 100 4 0 0 2 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 16 7 6 0 0 0 0 0 0 0 0 100 6 0 0 25 215 107 12 0 0 0 0 530 0 0 0 100 7 0 0 0 16 3 40 2 1 18 0 1722 0 0 0 100 March 2, 2026 at 07:03:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 152 214 0 1 7 0 595 0 1 0 99 1 0 0 0 30 11 24 1 0 0 0 10 0 0 0 100 2 0 0 0 16 1 14 0 1 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 2 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 12 2 8 0 0 0 0 2 0 0 0 100 6 0 0 25 213 105 10 1 0 0 0 527 0 0 0 100 7 0 0 0 11 2 36 1 0 12 0 1690 0 0 0 100 March 2, 2026 at 07:03:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 162 240 0 0 15 0 606 0 1 0 99 1 0 0 0 19 6 10 0 0 1 0 11 0 0 0 100 2 0 0 0 17 3 12 0 0 1 0 9 0 0 0 100 3 0 0 0 17 2 19 2 1 2 0 5 0 0 0 100 4 0 0 7 216 104 8 0 1 1 0 12 0 0 0 100 5 0 0 0 13 2 6 0 0 1 0 0 0 0 0 100 6 0 0 28 218 108 16 0 1 0 0 529 0 0 0 100 7 0 0 0 13 3 34 1 0 11 0 1696 0 0 0 99 March 2, 2026 at 07:03:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2177 161 232 1 0 6 0 605 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 4 0 0 2 211 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 13 2 10 0 0 0 0 3 0 0 0 100 6 0 0 25 215 107 12 0 0 0 0 528 0 0 0 100 7 0 0 0 15 4 40 1 0 6 0 1724 0 0 0 100 March 2, 2026 at 07:03:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 163 236 0 0 5 0 604 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 4 0 0 2 214 102 10 0 1 0 0 0 0 0 0 100 5 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 6 0 0 25 217 108 14 0 0 0 0 533 0 0 0 100 7 0 0 0 12 2 36 3 1 14 0 1703 0 0 0 100 March 2, 2026 at 07:03:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 162 240 1 0 8 0 604 0 1 0 99 1 0 0 0 11 1 6 0 0 0 0 5 0 0 0 100 2 0 0 0 16 3 16 0 0 0 0 14 0 0 0 100 3 0 0 0 9 1 6 0 0 0 0 7 0 0 0 100 4 0 0 2 213 103 4 0 1 0 0 1 0 0 0 100 5 0 0 0 24 9 18 0 1 0 0 2 0 0 0 100 6 0 0 25 213 106 10 0 0 0 0 526 0 0 0 100 7 0 0 0 15 2 42 1 0 8 0 1687 0 0 0 100 March 2, 2026 at 07:03:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 5292 122 6645 61 275 63 0 19698 18 12 0 71 1 26 0 0 3501 13 7109 60 301 51 0 15966 14 9 0 77 2 8 0 2 2737 16 5497 37 196 70 0 13750 12 9 0 80 3 120 0 0 3420 14 7520 47 232 64 0 22404 14 10 0 76 4 0 0 3 1809 111 3195 29 165 45 0 9280 12 5 0 84 5 5 0 0 1489 7 3136 21 94 44 0 8295 8 5 0 87 6 0 0 3 2465 112 4708 31 169 69 0 12341 9 6 0 85 7 1 0 7 1822 7 3845 23 104 59 0 10682 7 5 0 88 March 2, 2026 at 07:03:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 6694 110 9554 61 360 70 0 22294 21 14 0 65 1 0 0 0 4980 17 10265 73 393 97 0 25456 22 14 0 64 2 0 0 0 4006 27 7976 44 292 103 0 18518 16 10 0 74 3 0 0 0 3560 14 7335 64 324 58 0 18107 16 10 0 74 4 0 0 3 3245 116 6182 39 252 62 0 14241 11 8 0 80 5 0 0 0 2000 9 4114 21 144 76 0 10733 9 6 0 85 6 0 0 3 3315 114 6598 33 227 98 0 17202 14 10 0 76 7 0 0 21 2322 11 5054 25 144 78 0 15873 12 9 0 79 March 2, 2026 at 07:03:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 6505 108 9212 65 353 119 0 23888 22 15 0 63 1 0 0 0 4500 14 9251 64 386 119 0 22743 19 12 0 69 2 0 0 0 3724 16 7606 41 231 80 0 16747 15 10 0 75 3 0 0 0 4036 14 8533 29 280 91 0 20468 17 12 0 72 4 2 0 9 2929 113 5630 41 260 100 0 15149 14 9 0 77 5 0 0 0 2362 11 4934 19 131 74 0 12806 11 8 0 81 6 0 0 18 3189 111 6389 30 222 56 0 15618 12 8 0 79 7 0 0 0 2431 17 5214 23 148 78 0 14452 11 8 0 81 March 2, 2026 at 07:03:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3189 115 2273 21 106 204 1 7477 6 6 0 89 1 0 0 0 963 7 1943 16 94 105 0 5398 5 4 0 91 2 0 0 0 678 4 1315 12 60 178 0 4111 3 3 0 94 3 8 0 0 989 34 2001 13 75 104 0 4778 4 3 0 93 4 1 0 9 1284 107 2243 5 98 179 0 6001 5 4 0 92 5 0 0 0 919 5 1958 10 71 156 0 4116 4 3 0 93 6 1 0 18 1241 108 2244 9 88 146 0 5957 5 4 0 91 7 0 0 0 608 28 1224 8 42 179 0 4154 2 3 0 94 March 2, 2026 at 07:03:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2237 122 348 1 89 494 0 0 0 2 0 98 1 0 0 0 205 3 368 2 87 417 0 7 0 2 0 98 2 0 0 0 188 31 358 5 85 485 0 324 0 2 0 98 3 0 0 0 480 344 657 1 97 484 0 301 0 2 0 98 4 0 0 9 504 106 650 2 100 517 0 582 0 2 0 98 5 0 0 0 150 15 326 4 101 500 0 9 0 2 0 98 6 0 0 18 326 104 302 2 98 521 0 266 0 2 0 98 7 0 0 0 132 3 337 2 97 496 0 1411 0 2 0 98 March 2, 2026 at 07:03:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2246 100 454 0 110 600 0 0 0 2 0 98 1 0 0 0 173 7 386 1 116 702 0 17 0 2 0 98 2 0 0 0 145 2 340 0 99 560 0 281 0 2 0 98 3 0 0 0 518 364 435 2 104 640 0 290 0 2 0 97 4 0 0 9 776 154 1105 1 107 617 0 574 0 2 0 98 5 0 0 0 147 1 347 1 98 667 0 0 0 2 0 98 6 0 0 4 361 105 373 1 104 674 0 4 0 2 0 98 7 0 0 14 147 2 382 2 94 585 0 1679 0 2 0 98 March 2, 2026 at 07:03:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2206 103 292 1 14 39 0 280 0 1 0 99 1 0 0 0 197 61 264 1 22 65 0 20 0 0 0 99 2 0 0 0 58 2 106 0 12 53 0 3 0 0 0 100 3 0 0 0 136 75 102 0 19 53 0 30 0 0 0 100 4 0 0 9 247 106 70 0 15 51 0 871 0 1 0 99 5 0 0 0 35 1 54 0 9 34 0 0 0 0 0 100 6 0 0 4 259 103 100 0 10 60 0 11 0 0 0 99 7 0 0 14 58 6 120 1 11 33 0 1676 0 0 0 99 March 2, 2026 at 07:03:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 126 58 126 0 1 0 0 10 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 23 4 20 0 0 7 0 301 0 0 0 100 4 0 0 9 217 106 8 1 0 6 0 851 0 0 0 100 5 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 6 0 0 4 214 103 10 0 0 0 0 2 0 0 0 100 7 0 0 14 15 5 42 1 0 0 0 1678 0 0 0 100 March 2, 2026 at 07:03:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 105 1 2 0 0 7 0 1 0 99 1 0 0 0 117 54 112 1 1 0 0 12 0 0 0 100 2 0 0 0 18 2 20 0 1 0 0 1 0 0 0 100 3 0 0 0 22 2 22 0 0 9 0 304 0 0 0 100 4 0 0 9 221 107 16 0 1 6 0 870 0 0 0 100 5 0 0 0 9 0 6 0 0 2 0 0 0 0 0 100 6 0 0 4 229 109 27 0 1 1 0 15 0 0 0 100 7 0 0 14 13 3 42 1 2 1 0 1682 0 0 0 100 March 2, 2026 at 07:03:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 111 51 106 0 0 0 0 6 0 0 0 100 2 2 0 0 15 3 14 0 0 0 0 15 0 0 0 100 3 0 0 0 24 3 22 1 0 9 0 305 0 0 0 100 4 0 0 9 220 107 14 0 0 6 0 865 0 0 0 100 5 0 0 0 14 6 4 0 0 0 0 0 0 0 0 100 6 0 0 4 229 111 22 1 0 0 0 10 0 0 0 100 7 0 0 14 14 3 42 1 0 2 0 1674 0 0 0 99 March 2, 2026 at 07:03:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 2220 102 267 135 17 11 0 324 74 1 0 25 1 1 0 14 168 18 159 100 15 6 0 513 75 0 0 25 2 0 0 0 214 5 228 154 15 3 0 533 74 1 0 25 3 16 0 0 185 18 195 120 15 18 0 539 75 0 0 25 4 0 0 2 360 106 177 124 12 16 0 1019 74 1 0 25 5 0 0 0 177 20 234 131 21 12 0 384 74 1 0 25 6 3 0 165 378 114 341 173 19 11 0 931 74 1 0 25 7 1 0 0 144 5 190 100 14 3 0 1690 74 1 0 25 March 2, 2026 at 07:03:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2232 124 277 174 12 12 0 442 99 1 0 0 1 0 0 14 152 6 187 137 9 12 0 655 100 0 0 0 2 0 0 0 109 1 76 89 14 2 0 125 100 0 0 0 3 0 0 0 139 5 127 111 6 6 0 483 100 0 0 0 4 0 0 2 330 105 107 106 5 5 0 790 100 0 0 0 5 0 0 0 254 32 277 187 9 8 0 288 99 1 0 0 6 0 0 88 351 111 167 132 8 12 0 231 100 0 0 0 7 0 0 0 160 8 171 116 7 9 0 1583 99 1 0 0 March 2, 2026 at 07:03:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2191 116 164 130 9 9 0 403 99 1 0 0 1 0 0 14 157 5 168 130 12 7 0 510 100 0 0 0 2 0 0 0 157 10 143 112 16 9 0 241 100 0 0 0 3 0 0 0 116 3 101 98 10 1 0 436 100 0 0 0 4 0 0 2 333 108 125 109 7 4 0 847 100 0 0 0 5 0 0 0 142 4 103 101 9 3 0 140 99 1 0 0 6 0 0 116 391 135 198 147 9 1 0 262 100 0 0 0 7 0 0 0 132 11 105 83 8 5 0 1480 99 1 0 0 March 2, 2026 at 07:03:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2248 137 259 172 11 8 0 193 99 1 0 0 1 0 0 14 114 4 82 90 9 2 0 385 100 0 0 0 2 0 0 0 172 6 158 125 11 10 0 246 100 0 0 0 3 0 0 0 129 7 92 100 6 16 0 473 100 0 0 0 4 0 0 2 333 112 90 96 7 9 0 777 100 0 0 0 5 0 0 7 214 20 220 153 13 10 0 435 99 1 0 0 6 0 0 116 337 104 141 116 8 10 0 239 100 0 0 0 7 0 0 0 137 4 168 115 11 7 0 1679 99 1 0 0 March 2, 2026 at 07:03:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2205 103 183 147 3 8 0 139 99 1 0 0 1 0 0 14 155 2 167 133 11 4 0 598 100 0 0 0 2 0 0 0 139 6 114 107 10 9 0 190 100 0 0 0 3 0 0 0 167 11 221 159 9 5 0 676 99 1 0 0 4 0 0 3 321 105 78 89 7 6 0 759 100 0 0 0 5 0 0 7 268 29 255 170 12 9 0 437 100 0 0 0 6 0 0 115 344 128 117 108 9 8 0 123 100 0 0 0 7 0 0 0 127 3 127 101 4 5 0 1555 99 1 0 0 March 2, 2026 at 07:03:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2213 111 249 168 9 8 0 220 99 1 0 0 1 0 0 14 156 6 147 120 9 10 0 480 100 0 0 0 2 0 0 0 128 3 100 93 10 1 0 186 100 0 0 0 3 0 0 0 100 4 56 71 6 3 0 437 100 0 0 0 4 0 0 3 331 104 88 96 7 15 0 748 100 0 0 0 5 0 0 7 173 6 157 130 7 7 0 479 100 0 0 0 6 0 0 122 410 138 242 157 12 10 0 204 100 0 0 0 7 0 0 0 182 12 216 141 10 9 0 1803 99 1 0 0 March 2, 2026 at 07:03:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2207 105 204 135 14 12 0 179 99 1 0 0 1 2 0 14 151 6 123 107 14 4 0 479 100 0 0 0 2 0 0 0 190 25 146 121 14 6 0 148 100 0 0 0 3 0 0 0 135 5 105 102 7 9 0 473 100 0 0 0 4 0 0 2 387 111 185 142 7 10 0 878 100 0 0 0 5 0 0 7 138 3 103 106 5 4 0 439 100 0 0 0 6 1 0 116 379 117 248 171 12 10 0 387 99 1 0 0 7 0 0 0 208 24 256 168 16 5 0 1718 99 1 0 0 March 2, 2026 at 07:03:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 103 239 164 9 7 0 145 99 1 0 0 1 2 0 14 143 7 115 106 12 3 0 486 100 0 0 0 2 0 0 0 196 31 155 128 7 7 0 144 100 0 0 0 3 3 0 0 132 6 83 89 7 10 0 428 100 0 0 0 4 0 0 2 386 116 209 155 8 7 0 653 100 0 0 0 5 0 0 7 116 5 85 91 5 12 0 704 100 0 0 0 6 2 0 130 357 121 160 129 4 11 0 157 100 0 0 0 7 0 0 0 169 9 245 141 12 4 0 1781 99 1 0 0 March 2, 2026 at 07:03:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2231 133 328 195 9 6 0 1536 98 2 0 0 1 0 0 14 103 2 56 80 3 4 0 387 100 0 0 0 2 0 0 0 125 5 99 98 5 1 0 158 100 0 0 0 3 0 0 7 171 22 167 129 14 7 0 498 100 0 0 0 4 0 0 2 366 114 183 134 14 3 0 598 100 0 0 0 5 0 0 7 142 5 144 118 14 9 0 848 100 0 0 0 6 0 0 116 309 103 119 106 11 6 0 193 100 0 0 0 7 0 0 0 169 13 167 133 6 7 0 277 100 0 0 0 March 2, 2026 at 07:03:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2218 103 315 204 15 26 0 286 99 1 0 0 1 0 0 14 147 3 147 118 15 9 0 1895 99 1 0 0 2 0 0 0 195 19 210 156 12 13 0 276 100 0 0 0 3 0 0 0 199 25 145 127 7 5 0 465 100 0 0 0 4 0 0 2 352 122 118 104 6 4 0 456 100 0 0 0 5 0 0 7 233 18 234 161 8 7 0 883 100 0 0 0 6 0 0 130 293 104 82 82 11 3 0 182 100 0 0 0 7 0 0 0 151 8 143 109 19 3 0 209 100 0 0 0 March 2, 2026 at 07:03:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 105 196 136 11 14 0 192 99 1 0 0 1 0 0 14 175 9 191 133 11 11 0 1941 99 1 0 0 2 0 0 0 159 16 136 110 12 4 0 216 100 0 0 0 3 0 0 0 161 14 132 113 13 7 0 498 100 0 0 0 4 0 0 3 406 135 179 134 11 12 0 467 100 0 0 0 5 0 0 7 190 6 173 136 11 11 0 750 100 0 0 0 6 0 0 129 333 104 160 129 6 7 0 318 100 0 0 0 7 0 0 0 156 4 133 116 8 1 0 196 100 0 0 0 March 2, 2026 at 07:03:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2209 105 209 152 11 12 0 233 99 1 0 0 1 0 0 21 156 5 150 114 5 3 0 2071 99 1 0 0 2 0 0 0 204 6 217 158 7 11 0 274 100 0 0 0 3 0 0 0 227 33 200 145 11 8 0 577 100 0 0 0 4 0 0 2 380 128 158 123 11 5 0 474 100 0 0 0 5 0 0 0 145 4 88 96 11 5 0 440 100 0 0 0 6 0 0 130 323 106 121 113 8 3 0 239 100 0 0 0 7 0 0 0 144 7 122 109 9 2 0 212 100 0 0 0 March 2, 2026 at 07:03:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2208 103 226 155 10 15 0 163 99 1 0 0 1 0 0 21 138 4 151 114 11 8 0 2139 99 1 0 0 2 0 0 0 144 1 123 114 8 6 0 162 100 0 0 0 3 0 0 0 199 12 242 171 13 11 0 695 100 0 0 0 4 0 0 3 514 159 317 205 12 12 0 607 100 0 0 0 5 0 0 0 138 4 134 111 12 16 0 547 100 0 0 0 6 0 0 129 347 104 142 118 11 8 0 204 100 0 0 0 7 0 0 0 199 7 227 164 8 10 0 322 100 0 0 0 March 2, 2026 at 07:03:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2216 115 256 177 10 7 0 186 99 1 0 0 1 0 0 7 178 6 192 136 12 10 0 1928 99 1 0 0 2 0 0 0 135 3 107 103 12 5 0 272 100 0 0 0 3 0 0 0 138 5 146 119 11 8 0 546 100 0 0 0 4 0 0 17 375 111 165 131 11 2 0 528 100 0 0 0 5 0 0 0 163 29 130 110 11 6 0 745 100 0 0 0 6 0 0 129 319 106 127 111 11 5 0 169 100 0 0 0 7 0 0 0 192 20 213 156 9 10 0 313 100 0 0 0 March 2, 2026 at 07:03:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2225 118 358 209 14 25 0 361 99 1 0 0 1 0 0 0 224 21 229 163 13 6 0 1677 99 1 0 0 2 0 0 0 122 1 96 95 10 2 0 158 100 0 0 0 3 1 0 0 167 4 203 145 10 12 0 588 100 0 0 0 4 0 0 16 346 108 119 112 11 4 0 462 100 0 0 0 5 0 0 0 139 28 77 90 11 4 0 699 100 0 0 0 6 0 0 116 313 104 87 94 6 2 0 122 100 0 0 0 7 0 0 7 169 10 168 137 8 4 0 465 100 0 0 0 March 2, 2026 at 07:03:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2238 106 259 179 9 12 0 229 99 1 0 0 1 0 0 7 193 21 212 142 15 6 0 1886 99 1 0 0 2 0 0 7 175 11 174 127 10 8 0 256 100 0 0 0 3 0 0 0 138 6 82 93 10 7 0 448 100 0 0 0 4 0 0 16 345 106 114 107 11 6 0 517 100 0 0 0 5 0 0 0 195 33 170 130 15 8 0 756 100 0 0 0 6 0 0 116 324 103 114 106 10 4 0 161 100 0 0 0 7 0 0 0 148 4 139 118 13 6 0 212 100 0 0 0 March 2, 2026 at 07:03:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 104 194 144 4 10 0 149 99 1 0 0 1 0 0 7 224 29 237 153 7 3 0 1955 99 1 0 0 2 0 0 0 144 4 150 115 16 12 0 276 100 0 0 0 3 0 0 0 199 34 176 135 15 5 0 535 100 0 0 0 4 0 0 21 378 107 189 147 12 9 0 524 100 0 0 0 5 0 0 0 166 5 145 121 10 6 0 794 100 0 0 0 6 2 0 119 310 103 79 88 11 5 0 147 100 0 0 0 7 0 0 0 140 8 90 96 6 4 0 123 100 0 0 0 March 2, 2026 at 07:03:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2210 103 215 146 20 8 0 187 99 1 0 0 1 0 0 7 214 34 222 138 15 6 0 1829 99 1 0 0 2 0 0 0 211 26 212 152 14 11 0 260 100 0 0 0 3 0 0 0 176 9 177 137 9 15 0 619 100 0 0 0 4 0 0 17 358 107 149 121 6 2 0 486 100 0 0 0 5 0 0 0 152 4 110 108 7 9 0 767 100 0 0 0 6 0 0 115 335 105 146 118 14 13 0 235 99 1 0 0 7 0 0 28 132 4 107 96 15 6 0 152 100 0 0 0 March 2, 2026 at 07:03:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 104 138 101 16 4 0 115 99 1 0 0 1 0 0 0 125 5 162 100 20 6 0 1671 99 1 0 0 2 1 0 0 164 4 163 122 22 5 0 147 100 0 0 0 3 0 0 7 174 7 171 118 29 6 0 731 100 0 0 0 4 2 0 17 380 127 172 126 20 4 0 472 100 0 0 0 5 7 0 0 190 13 219 148 27 9 0 967 99 1 0 0 6 5 0 115 310 105 108 93 20 4 0 285 99 1 0 0 7 2 0 0 179 17 167 120 21 6 0 238 100 0 0 0 March 2, 2026 at 07:03:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2232 133 271 160 26 3 0 221 99 1 0 0 1 0 0 0 181 3 227 139 20 5 0 1731 99 1 0 0 2 3 0 0 214 22 311 191 19 12 0 468 99 1 0 0 3 0 0 7 206 7 232 165 19 4 0 976 99 1 0 0 4 0 0 16 389 107 205 144 20 12 0 546 99 1 0 0 5 0 0 0 206 16 263 161 21 4 0 999 99 1 0 0 6 0 0 158 331 102 175 118 22 21 0 322 99 1 0 0 7 0 0 0 164 5 255 133 24 2 0 385 100 0 0 0 March 2, 2026 at 07:03:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2190 111 154 122 9 3 0 242 99 1 0 0 1 1 0 0 161 3 172 117 12 10 0 1647 99 1 0 0 2 0 0 14 131 7 106 102 8 6 0 461 100 0 0 0 3 0 0 0 211 32 213 145 11 6 0 495 100 0 0 0 4 0 0 3 325 104 80 92 9 5 0 133 100 0 0 0 5 0 0 14 164 27 118 108 8 5 0 1042 100 0 0 0 6 0 0 129 326 101 99 99 7 4 0 140 99 1 0 0 7 0 0 0 146 7 152 128 6 4 0 227 100 0 0 0 March 2, 2026 at 07:03:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 105 100 100 7 5 0 125 99 1 0 0 1 0 0 0 161 3 196 132 9 5 0 1691 99 1 0 0 2 0 0 0 177 22 179 139 8 9 0 199 100 0 0 0 3 0 0 7 155 14 113 110 5 5 0 792 100 0 0 0 4 0 0 3 361 110 133 110 14 0 0 164 100 0 0 0 5 0 0 14 208 31 236 169 14 9 0 1246 99 1 0 0 6 0 0 115 340 108 107 102 13 4 0 127 99 1 0 0 7 0 0 0 133 4 90 96 8 9 0 148 100 0 0 0 March 2, 2026 at 07:03:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 104 77 88 10 3 0 148 99 1 0 0 1 0 0 7 240 27 290 175 13 8 0 1998 99 1 0 0 2 0 0 0 217 22 287 196 8 16 0 379 99 1 0 0 3 0 0 0 119 4 86 100 12 11 0 546 99 1 0 0 4 0 0 3 356 107 159 129 8 3 0 217 100 0 0 0 5 0 0 14 165 13 132 109 16 12 0 1079 99 1 0 0 6 0 0 115 330 112 88 92 11 2 0 71 99 1 0 0 7 0 0 0 194 4 207 147 13 3 0 290 99 1 0 0 March 2, 2026 at 07:03:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 105 118 103 9 7 0 230 99 1 0 0 1 0 0 7 212 25 243 149 19 9 0 1920 99 1 0 0 2 0 0 0 193 19 184 140 9 3 0 173 100 0 0 0 3 0 0 0 149 19 112 104 14 3 0 459 100 0 0 0 4 0 0 3 327 104 100 97 8 2 0 175 100 0 0 0 5 3 0 14 189 15 200 151 12 11 0 1250 99 1 0 0 6 0 0 115 337 103 152 123 11 6 0 255 99 1 0 0 7 0 0 0 170 2 135 116 7 14 0 173 100 0 0 0 March 2, 2026 at 07:03:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 104 112 99 15 4 0 154 99 1 0 0 1 0 0 7 179 9 193 131 12 8 0 1921 99 1 0 0 2 0 0 0 161 23 122 112 7 4 0 114 100 0 0 0 3 0 0 0 223 25 269 181 12 5 0 688 99 1 0 0 4 1 0 3 340 114 80 89 8 2 0 119 100 0 0 0 5 0 0 14 134 10 86 95 8 8 0 1062 100 0 0 0 6 0 0 136 347 112 143 123 6 3 0 188 99 1 0 0 7 0 0 0 184 4 185 139 13 9 0 220 100 0 0 0 March 2, 2026 at 07:03:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2199 111 147 115 9 4 0 259 99 1 0 0 1 0 0 7 165 5 151 129 8 3 0 496 100 0 0 0 2 2 0 0 199 31 214 139 16 4 0 1635 99 1 0 0 3 0 0 0 167 10 158 122 14 13 0 578 100 0 0 0 4 0 0 3 360 103 126 110 14 6 0 148 100 0 0 0 5 0 0 14 167 24 138 118 9 8 0 1011 100 0 0 0 6 0 0 129 319 105 90 94 8 3 0 157 100 0 0 0 7 0 0 0 138 8 103 98 9 7 0 131 100 0 0 0 March 2, 2026 at 07:04:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 107 149 121 8 13 0 277 99 1 0 0 1 0 0 7 158 13 136 113 9 10 0 486 100 0 0 0 2 0 0 0 186 16 219 135 10 5 0 1628 99 1 0 0 3 0 0 0 148 14 107 102 9 8 0 451 100 0 0 0 4 0 0 7 372 105 145 123 14 14 0 303 99 1 0 0 5 0 0 0 186 33 136 117 9 7 0 715 100 0 0 0 6 0 0 133 303 101 88 92 7 7 0 164 99 1 0 0 7 0 0 14 160 6 143 124 9 11 0 440 100 0 0 0 March 2, 2026 at 07:04:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 103 278 104 12 8 0 472 99 1 0 0 1 0 0 0 154 7 144 122 8 2 0 199 100 0 0 0 2 0 0 7 165 9 208 135 11 9 0 1891 99 1 0 0 3 0 0 0 235 54 193 144 10 7 0 474 99 1 0 0 4 0 0 2 420 113 229 161 13 11 0 331 100 0 0 0 5 0 0 0 144 4 122 110 9 10 0 840 99 1 0 0 6 0 0 144 296 102 86 88 11 7 0 188 99 1 0 0 7 0 0 14 164 7 174 139 11 7 0 587 99 1 0 0 March 2, 2026 at 07:04:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 102 118 107 17 1 0 120 99 1 0 0 1 0 0 0 147 4 145 119 15 6 0 207 100 0 0 0 2 0 0 7 194 13 245 153 12 13 0 1984 99 1 0 0 3 0 0 0 263 52 291 194 9 9 0 586 100 0 0 0 4 0 0 3 366 111 103 104 8 0 0 160 100 0 0 0 5 0 0 0 121 2 70 85 3 6 0 726 100 0 0 0 6 0 0 129 293 103 70 84 6 5 0 154 100 0 0 0 7 0 0 28 136 7 149 114 17 3 0 546 99 1 0 0 March 2, 2026 at 07:04:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2192 103 130 121 10 7 0 201 99 1 0 0 1 0 0 0 185 5 202 151 11 12 0 308 99 1 0 0 2 0 0 7 198 13 264 163 7 16 0 1945 99 1 0 0 3 0 0 0 173 8 151 134 10 4 0 284 99 1 0 0 4 0 0 3 436 134 190 134 17 9 0 525 99 1 0 0 5 0 0 0 124 7 74 91 11 6 0 721 100 0 0 0 6 0 0 129 361 105 160 126 14 5 0 203 100 0 0 0 7 0 0 14 179 25 184 138 12 10 0 500 100 0 0 0 March 2, 2026 at 07:04:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 117 136 116 9 4 0 189 99 1 0 0 1 0 0 0 171 3 124 113 13 7 0 174 100 0 0 0 2 0 0 7 165 12 252 157 10 14 0 1977 99 1 0 0 3 0 0 0 156 7 103 100 11 4 0 135 100 0 0 0 4 0 0 2 384 110 157 128 9 5 0 532 100 0 0 0 5 0 0 0 135 3 113 109 5 5 0 803 100 0 0 0 6 0 0 116 308 103 62 84 4 2 0 112 100 0 0 0 7 0 0 14 201 44 187 133 9 2 0 483 100 0 0 0 March 2, 2026 at 07:04:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2224 134 218 155 12 5 0 264 99 1 0 0 1 0 0 0 187 22 176 134 10 7 0 236 100 0 0 0 2 0 0 7 160 8 202 132 11 9 0 1897 99 1 0 0 3 0 0 0 166 4 114 103 12 8 0 144 100 0 0 0 4 0 0 2 366 109 126 118 6 15 0 534 100 0 0 0 5 0 0 0 156 6 151 125 11 13 0 805 100 0 0 0 6 0 0 144 308 102 119 102 18 10 0 295 99 1 0 0 7 0 0 14 180 9 165 135 11 10 0 463 100 0 0 0 March 2, 2026 at 07:04:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2169 104 98 101 7 3 0 239 99 1 0 0 1 0 0 0 204 21 187 141 10 2 0 230 100 0 0 0 2 0 0 0 165 20 190 129 9 5 0 1624 99 1 0 0 3 0 0 7 185 10 155 125 10 0 0 477 100 0 0 0 4 0 0 3 368 125 140 118 8 11 0 444 100 0 0 0 5 0 0 0 135 2 83 96 5 5 0 714 100 0 0 0 6 0 0 87 311 104 113 98 5 3 0 223 99 1 0 0 7 0 0 14 169 6 195 144 8 4 0 489 100 0 0 0 March 2, 2026 at 07:04:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 103 69 86 9 4 0 153 99 1 0 0 1 0 0 0 132 0 67 84 9 1 0 124 100 0 0 0 2 0 0 0 207 20 213 137 9 4 0 1554 99 1 0 0 3 0 0 7 193 13 186 143 11 2 0 538 99 1 0 0 4 0 0 10 420 137 188 141 8 8 0 493 100 0 0 0 5 0 0 0 155 4 127 102 12 7 0 832 99 1 0 0 6 0 0 157 352 110 160 129 6 8 0 298 100 0 0 0 7 0 0 14 178 8 201 139 10 9 0 654 99 1 0 0 March 2, 2026 at 07:04:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 104 138 114 11 6 0 258 99 1 0 0 1 0 0 0 163 4 135 110 19 3 0 183 100 0 0 0 2 0 0 0 169 9 187 126 14 2 0 1585 99 1 0 0 3 0 0 7 194 33 155 123 10 5 0 389 100 0 0 0 4 0 0 2 362 105 133 115 9 9 0 544 100 0 0 0 5 0 0 0 180 24 171 136 8 10 0 790 100 0 0 0 6 0 0 116 319 109 97 101 4 1 0 175 100 0 0 0 7 0 0 14 172 11 151 128 7 5 0 518 100 0 0 0 March 2, 2026 at 07:04:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2192 106 138 116 8 4 0 180 99 1 0 0 1 2 0 0 168 9 147 116 7 6 0 175 100 0 0 0 2 0 0 0 128 6 188 116 14 17 0 1694 99 1 0 0 3 0 0 7 146 6 106 112 13 2 0 458 100 0 0 0 4 2 0 3 372 108 141 123 9 7 0 520 100 0 0 0 5 0 0 0 189 31 136 114 10 6 0 697 100 0 0 0 6 0 0 115 285 102 51 77 6 1 0 90 100 0 0 0 7 0 0 14 172 25 135 119 6 3 0 380 100 0 0 0 March 2, 2026 at 07:04:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 119 97 96 7 8 0 106 99 1 0 0 1 0 0 0 109 3 87 84 7 6 0 162 100 0 0 0 2 0 0 0 128 3 111 90 12 6 0 1493 99 1 0 0 3 0 0 7 176 9 152 122 10 5 0 429 100 0 0 0 4 0 0 7 365 114 140 126 7 12 0 636 100 0 0 0 5 0 0 0 132 4 77 87 7 5 0 688 100 0 0 0 6 0 0 91 314 101 91 88 9 4 0 98 100 0 0 0 7 0 0 14 184 38 145 121 8 4 0 356 100 0 0 0 March 2, 2026 at 07:04:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2133 117 95 42 5 0 0 57 47 1 0 52 1 0 0 0 47 2 28 27 10 0 0 112 45 0 0 55 2 2 0 7 52 2 65 27 3 1 0 1577 36 0 0 64 3 3 0 7 99 17 95 36 11 1 0 415 30 0 0 69 4 0 0 2 313 123 105 32 11 1 0 404 35 0 0 65 5 0 0 0 88 7 80 29 8 3 0 723 31 0 0 68 6 0 0 32 268 108 44 27 5 1 0 78 42 0 0 58 7 1 0 14 50 5 44 22 3 3 0 314 33 0 0 66 March 2, 2026 at 07:04:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 108 0 1 0 0 0 0 1 0 99 1 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 10 1 36 1 0 1 0 1412 0 0 0 100 3 0 0 7 17 5 14 0 1 0 0 266 0 0 0 100 4 0 0 2 346 169 138 0 0 0 0 318 0 0 0 100 5 0 0 0 20 2 14 0 0 2 0 606 0 0 0 100 6 0 0 4 214 103 8 0 1 0 0 4 0 0 0 100 7 0 0 14 11 3 10 0 0 0 0 269 0 0 0 100 March 2, 2026 at 07:04:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 102 126 0 1 0 0 0 0 1 0 99 1 0 0 0 13 2 12 0 0 0 0 13 0 0 0 100 2 0 0 0 12 1 36 1 0 0 0 1419 0 0 0 100 3 0 0 7 15 4 12 0 0 0 0 269 0 0 0 100 4 0 0 2 340 167 130 1 0 9 0 330 0 0 0 99 5 0 0 0 18 6 8 0 1 6 0 596 0 0 0 100 6 0 0 4 209 102 4 0 0 0 0 1 0 0 0 100 7 0 0 14 15 3 14 0 2 0 0 266 0 0 0 100 March 2, 2026 at 07:04:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2150 102 159 0 9 3 3 105 0 1 0 99 1 406 0 0 51 2 55 0 10 4 3 154 0 0 0 100 2 12 0 0 35 1 56 1 6 6 2 1563 0 0 0 100 3 1462 0 120 58 14 90 2 7 3 15 6890 3 3 0 95 4 1603 0 2 289 121 94 2 14 12 12 654 0 1 0 99 5 25 0 2 48 3 45 0 7 6 6 722 0 0 0 100 6 15 0 4 303 136 108 0 12 5 2 143 0 0 0 100 7 15 0 14 33 3 29 0 8 4 4 289 0 0 0 100 March 2, 2026 at 07:04:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3062 110 1687 64 227 259 2 3955 11 6 0 82 1 0 0 0 781 6 1209 47 175 250 0 3390 18 5 0 77 2 0 0 0 867 6 1503 119 153 325 0 4543 11 5 0 84 3 0 0 0 849 34 1372 64 165 261 0 5181 17 5 0 77 4 0 0 9 919 112 1065 33 128 160 0 3423 16 5 0 79 5 0 0 0 761 8 1209 33 102 125 0 3407 10 4 0 86 6 0 0 775 896 137 1245 50 145 312 0 3554 11 4 0 84 7 0 0 14 555 5 819 13 87 320 0 2589 4 4 0 91 March 2, 2026 at 07:04:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2716 104 1334 20 306 1363 3 1971 5 6 0 89 1 0 0 8 844 2 1744 30 311 1383 0 1304 4 5 0 91 2 0 0 0 560 8 1133 22 262 1411 6 1510 6 5 0 89 3 2 0 0 1226 681 1597 19 298 1356 3 3518 6 7 0 87 4 1 0 9 706 112 1058 14 297 1430 6 1341 5 4 0 91 5 0 0 7 443 3 872 19 234 1246 1 1204 6 4 0 90 6 0 0 270 721 105 1120 11 248 1482 1 1920 2 5 0 92 7 0 0 14 529 21 1035 12 232 1296 2 1461 4 4 0 92 March 2, 2026 at 07:04:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2320 111 560 1 135 3099 0 1 0 4 0 96 1 0 0 0 608 1 1284 2 165 2906 0 1 0 4 0 96 2 0 0 0 211 1 503 3 154 2717 0 192 0 3 0 97 3 0 0 0 630 384 570 4 152 2830 0 1417 0 4 0 96 4 0 0 9 458 129 518 3 147 3118 0 68 0 4 0 96 5 0 0 0 184 1 420 3 137 2566 0 0 0 3 0 97 6 0 0 4 423 104 508 1 152 2469 0 645 0 4 0 96 7 0 0 21 295 36 585 2 123 2565 0 571 0 3 0 96 March 2, 2026 at 07:04:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2445 115 841 3 133 2269 0 488 0 5 0 95 1 0 0 0 458 2 941 3 151 2678 0 13 0 6 0 94 2 0 0 7 272 2 603 4 142 2265 0 1036 0 5 0 95 3 0 0 0 661 413 570 3 149 2168 0 165 0 6 0 94 4 0 0 2 448 103 516 2 140 2378 0 0 0 4 0 96 5 0 0 0 261 4 493 1 118 2252 0 4 0 5 0 95 6 0 0 4 452 114 489 2 125 2239 0 545 0 6 0 94 7 0 0 14 295 41 532 2 118 2308 0 570 0 5 0 94 March 2, 2026 at 07:04:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2342 114 643 1 178 1535 0 266 0 5 0 95 1 0 0 0 649 0 1385 0 194 1355 0 0 0 4 0 96 2 0 0 0 220 3 534 2 180 1493 1 199 0 4 0 96 3 0 0 7 659 423 621 1 177 1408 0 1487 0 4 0 95 4 0 0 2 430 103 564 0 192 1456 0 0 0 4 0 96 5 0 0 0 291 0 623 0 176 1287 0 0 0 3 0 97 6 0 0 4 509 141 655 1 186 1565 0 598 0 4 0 96 7 0 0 0 237 2 567 2 157 1447 0 294 0 3 0 97 March 2, 2026 at 07:04:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2322 142 560 2 113 731 0 312 0 2 0 98 1 0 0 0 263 4 560 5 101 742 0 599 0 2 0 98 2 0 0 0 167 2 370 1 93 692 0 522 0 2 0 98 3 0 0 7 444 269 417 5 90 840 0 2243 0 2 0 97 4 0 0 2 379 105 383 3 100 826 0 294 0 2 0 98 5 0 0 0 183 5 409 2 89 751 0 361 0 2 0 98 6 0 0 4 590 122 764 3 110 604 0 443 0 2 0 98 7 0 0 0 178 2 407 3 112 765 0 61 0 2 0 98 March 2, 2026 at 07:04:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2175 162 234 0 0 0 0 277 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 3 0 0 7 17 5 40 1 0 1 0 1678 0 0 0 100 4 0 0 2 213 104 4 0 0 14 0 294 0 0 0 100 5 0 0 0 9 1 4 0 1 6 0 304 0 0 0 100 6 0 0 4 213 104 8 0 0 0 0 301 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 1 0 0 0 100 March 2, 2026 at 07:04:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2178 162 234 0 0 0 0 276 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 7 11 3 36 1 0 1 0 1677 0 0 0 100 4 0 0 2 213 104 4 0 0 10 0 294 0 0 0 100 5 0 0 0 17 4 12 0 0 13 0 301 0 0 0 100 6 0 0 4 216 104 20 0 1 0 0 301 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:04:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2179 162 240 1 0 2 0 276 0 1 0 99 1 2 0 0 15 3 14 0 0 0 0 12 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 7 0 0 0 100 3 0 0 7 18 4 48 1 2 3 0 1683 0 0 0 100 4 0 0 2 216 105 8 0 1 11 0 295 0 0 0 100 5 0 0 0 16 5 8 1 0 9 0 296 0 0 0 100 6 0 0 4 218 105 14 0 0 0 0 301 0 0 0 100 7 0 0 0 13 0 14 0 1 0 0 0 0 0 0 100 March 2, 2026 at 07:04:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2163 155 224 0 0 0 0 278 0 1 0 99 1 0 0 0 17 4 12 1 1 0 0 26 0 0 0 100 2 0 0 0 10 1 6 0 0 0 0 25 0 0 0 100 3 0 0 7 12 3 36 2 0 1 0 1675 0 0 0 100 4 0 0 2 213 104 4 0 0 2 0 294 0 0 0 100 5 0 0 0 21 4 20 0 0 10 0 319 0 0 0 100 6 0 0 4 211 103 6 0 0 0 0 300 0 0 0 100 7 0 0 0 22 8 20 0 1 0 0 9 0 0 0 100 March 2, 2026 at 07:04:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2178 160 236 0 0 0 0 277 0 1 0 99 1 0 0 0 14 2 16 0 1 2 0 7 0 0 0 100 2 0 0 0 10 1 6 0 0 1 0 3 0 0 0 100 3 0 0 7 13 4 38 1 0 0 0 1675 0 0 0 100 4 0 0 2 213 104 4 0 0 5 0 294 0 0 0 100 5 0 0 0 9 1 4 0 0 9 0 302 0 0 0 100 6 0 0 4 212 103 8 0 1 0 0 303 0 0 0 100 7 0 0 0 17 4 12 0 1 0 0 10 0 0 0 100 March 2, 2026 at 07:04:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2173 161 234 1 1 0 0 276 0 1 0 99 1 0 0 0 13 3 8 0 0 1 0 10 0 0 0 100 2 1 0 0 13 1 16 0 3 1 0 10 0 0 0 100 3 0 0 7 15 5 40 1 0 1 0 1668 0 0 0 100 4 0 0 3 219 105 8 0 1 1 0 295 0 0 0 100 5 0 0 0 15 4 10 0 0 6 0 313 0 0 0 100 6 0 0 3 211 103 6 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:04:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2183 164 238 0 0 0 0 278 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 7 12 4 7 0 0 0 0 282 0 0 0 100 4 0 0 2 213 104 4 0 0 1 0 294 0 0 0 100 5 0 0 0 11 1 6 1 0 0 0 288 0 0 0 100 6 0 0 4 213 103 8 0 1 0 0 300 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:04:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2184 163 244 1 0 2 0 277 0 1 0 99 1 0 0 0 14 2 10 0 1 0 0 6 0 0 0 100 2 0 0 0 13 1 12 0 0 1 0 10 0 0 0 100 3 0 0 7 18 2 51 2 1 4 0 1648 0 0 0 100 4 0 0 2 213 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 20 9 10 0 0 5 0 308 0 0 0 100 6 0 0 4 214 104 10 0 0 0 0 300 0 0 0 100 7 0 0 0 11 1 8 0 0 0 0 1 0 0 0 100 March 2, 2026 at 07:04:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2173 161 232 0 0 0 0 275 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 7 15 4 40 1 1 3 0 1662 0 0 0 100 4 0 0 2 217 104 16 0 1 2 0 294 0 0 0 100 5 0 0 0 9 1 4 0 0 2 0 301 0 0 0 100 6 0 0 4 211 103 6 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:04:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2144 124 164 1 0 1 0 286 0 1 0 99 1 0 0 0 17 3 12 1 0 1 0 17 0 0 0 100 2 0 0 0 89 41 85 0 1 2 0 3 0 0 0 100 3 0 0 7 14 4 36 1 0 2 0 1660 0 0 0 99 4 0 0 7 215 104 4 0 0 3 0 294 0 0 0 100 5 0 0 0 18 5 10 0 0 7 0 302 0 0 0 100 6 0 0 7 213 103 10 0 1 0 0 303 0 0 0 100 7 0 0 0 14 2 6 0 0 1 0 19 0 0 0 100 March 2, 2026 at 07:04:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2122 110 129 1 0 0 0 274 0 1 0 99 1 0 0 0 14 4 10 0 1 0 0 4 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 7 15 5 40 1 0 0 0 1661 0 0 0 100 4 0 0 2 215 104 6 0 0 4 0 294 0 0 0 100 5 0 0 0 17 1 16 1 1 6 0 294 0 0 0 100 6 0 0 4 213 104 8 0 0 0 0 301 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 2, 2026 at 07:04:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 114 0 0 0 0 266 0 1 0 99 1 0 0 0 27 11 22 0 0 0 0 10 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 7 11 3 36 1 0 1 0 1662 0 0 0 100 4 0 0 2 213 104 4 0 0 1 0 294 0 0 0 100 5 0 0 0 17 4 12 0 0 3 0 306 0 0 0 100 6 0 0 4 217 104 18 0 1 0 0 301 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:04:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 118 0 0 0 0 266 0 1 0 99 1 0 0 0 36 13 30 1 0 0 0 17 0 0 0 100 2 0 0 0 118 53 118 0 0 1 0 14 0 0 0 100 3 1 0 7 17 4 46 1 0 1 0 1667 0 0 0 99 4 0 0 2 215 105 6 0 0 0 0 295 0 0 0 100 5 0 0 0 19 9 8 0 0 0 0 305 0 0 0 100 6 0 0 4 216 105 12 0 0 0 0 301 0 0 0 100 7 0 0 0 9 0 6 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:04:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 70 0 14 5636 108 7556 73 300 116 0 20993 18 13 0 69 1 35 0 0 3855 16 7887 64 314 76 0 20063 15 11 0 74 2 12 0 0 2859 23 5567 51 200 100 0 14965 16 8 0 75 3 21 0 7 3022 14 6216 48 248 51 0 16896 12 8 0 79 4 213 0 2 2092 115 3855 23 181 73 0 9713 9 6 0 85 5 83 0 0 1608 10 3245 28 104 69 0 7890 7 4 0 89 6 54 0 4 2649 115 5168 28 194 74 0 11534 10 7 0 83 7 17 0 0 2205 7 5187 25 91 56 0 17187 10 6 0 84 March 2, 2026 at 07:04:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 6698 109 9783 78 363 131 0 25541 22 15 0 62 1 10 0 0 4657 13 9567 81 462 60 0 22736 19 13 0 68 2 7 0 0 4365 14 8793 43 256 86 0 17606 16 10 0 74 3 12 0 21 4370 15 9199 73 325 84 0 23605 18 13 0 69 4 9 0 2 3321 123 6268 45 266 80 0 14684 14 9 0 77 5 0 0 0 1892 17 3894 21 130 52 0 10935 10 6 0 84 6 7 0 4 3179 117 6240 31 251 114 0 16611 13 8 0 78 7 3 0 0 2105 6 4429 23 133 87 0 13443 11 7 0 82 March 2, 2026 at 07:04:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 6857 110 10029 65 376 146 0 25027 24 15 0 61 1 9 0 7 4558 12 9476 69 385 137 0 23617 19 13 0 68 2 14 0 0 3470 10 6959 38 245 62 0 18252 15 10 0 75 3 8 0 0 4278 21 8953 64 304 75 0 20649 17 12 0 71 4 13 0 16 3089 122 5841 35 250 89 0 15022 14 9 0 78 5 3 0 0 2426 9 5040 25 141 108 0 12343 11 7 0 82 6 7 0 4 3027 111 5932 34 225 71 0 14821 13 8 0 79 7 3 0 0 2444 11 5099 26 135 77 0 12381 11 7 0 82 March 2, 2026 at 07:04:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 3005 109 1958 16 106 20 0 4722 4 3 0 92 1 0 0 7 898 6 1752 20 101 16 0 4625 4 3 0 94 2 0 0 0 768 3 1619 9 59 33 0 4587 3 2 0 94 3 1 0 0 794 43 1609 4 61 48 0 5830 3 3 0 94 4 1 0 16 901 106 1385 11 48 8 0 2528 2 2 0 96 5 1 0 0 295 7 593 4 33 31 0 2871 2 1 0 97 6 0 0 4 811 106 1276 7 60 27 0 3946 4 2 0 94 7 2 0 0 552 4 1122 9 36 17 0 3724 3 2 0 96 March 2, 2026 at 07:04:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2211 104 350 0 47 323 0 9 0 2 0 98 1 0 0 7 79 4 167 0 49 315 0 564 0 2 0 98 2 1 0 0 73 3 149 1 43 291 0 15 0 2 0 98 3 0 0 0 338 219 369 1 52 273 0 1417 0 2 0 98 4 0 0 16 273 103 149 1 53 340 0 266 0 1 0 99 5 0 0 0 69 5 140 0 44 302 1 0 0 2 0 98 6 0 0 4 362 111 327 0 46 297 0 9 0 2 0 98 7 0 0 0 70 4 161 0 50 333 0 595 0 2 0 98 March 2, 2026 at 07:04:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2228 119 412 0 87 421 0 6 0 2 0 98 1 0 0 7 181 4 414 1 91 495 0 563 0 2 0 98 2 0 0 0 118 1 277 1 75 472 0 0 0 2 0 98 3 0 0 0 496 361 351 2 86 498 0 1408 0 3 0 97 4 0 0 16 531 114 690 1 79 516 0 268 0 2 0 98 5 0 0 0 117 0 285 0 88 484 0 0 0 2 0 98 6 0 0 4 423 114 460 1 79 467 0 20 0 2 0 98 7 0 0 0 122 3 295 2 86 473 0 597 0 2 0 98 March 2, 2026 at 07:04:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2247 105 423 1 73 476 0 0 0 2 0 98 1 0 0 0 267 10 541 1 92 552 0 319 0 2 0 98 2 0 0 7 364 3 754 0 82 526 0 260 0 2 0 98 3 0 0 0 477 298 421 2 88 550 0 1420 0 2 0 98 4 0 0 21 381 103 369 0 81 546 0 279 0 2 0 98 5 0 0 0 248 47 417 2 78 441 0 8 0 2 0 98 6 0 0 7 365 106 362 0 91 461 0 4 0 2 0 98 7 0 0 0 165 4 346 3 72 519 0 594 0 2 0 98 March 2, 2026 at 07:04:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 0 0 0 0 1 0 99 1 0 0 0 29 10 24 0 2 12 0 313 0 0 0 100 2 0 0 7 22 6 24 0 2 0 0 262 0 0 0 100 3 0 0 0 17 3 44 1 0 1 0 1414 0 0 0 100 4 0 0 16 215 105 10 0 0 0 0 270 0 0 0 100 5 0 0 0 109 51 106 0 1 0 0 0 0 0 0 100 6 0 0 4 214 105 8 0 0 1 0 1 0 0 0 100 7 0 0 0 15 4 12 0 1 10 0 596 0 0 0 100 March 2, 2026 at 07:04:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 1 0 0 4 0 1 0 99 1 0 0 0 18 4 16 0 0 13 0 310 0 0 0 100 2 0 0 7 12 3 10 0 1 0 0 264 0 0 0 100 3 0 0 0 15 2 42 1 1 0 0 1417 0 0 0 100 4 0 0 16 227 111 22 0 0 0 0 284 0 0 0 100 5 0 0 0 118 55 114 0 1 0 0 9 0 0 0 100 6 0 0 4 214 104 8 0 1 0 0 1 0 0 0 100 7 0 0 0 12 3 8 0 0 3 0 593 0 0 0 100 March 2, 2026 at 07:04:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 100 116 0 0 3 0 0 0 1 0 99 1 0 0 0 17 2 14 1 0 9 0 305 0 0 0 100 2 0 0 7 22 5 24 0 2 0 0 275 0 0 0 100 3 0 0 0 16 1 50 0 1 0 0 1411 0 0 0 100 4 0 0 16 229 112 24 0 1 0 0 287 0 0 0 100 5 0 0 0 119 57 108 0 0 1 0 0 0 0 0 100 6 0 0 4 213 104 8 0 0 2 0 1 0 0 0 100 7 0 0 0 14 3 10 0 1 14 0 594 0 0 0 100 March 2, 2026 at 07:04:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2249 102 280 164 13 5 0 564 77 2 0 22 1 13 0 0 207 9 299 152 19 32 2 937 77 1 0 22 2 495 0 7 141 9 139 94 15 3 1 588 78 0 0 22 3 2 0 0 220 23 371 204 19 5 0 2060 78 1 0 21 4 6 0 16 419 126 239 137 24 10 0 680 78 1 0 22 5 0 0 0 199 17 192 106 19 0 0 243 78 0 0 22 6 1085 0 186 309 106 117 83 18 4 0 319 77 1 0 22 7 40 0 0 118 4 77 76 10 10 1 880 78 0 0 22 March 2, 2026 at 07:04:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 106 136 120 4 1 0 123 99 1 0 0 1 0 0 0 137 7 136 119 9 6 0 559 100 0 0 0 2 0 0 7 206 19 234 163 13 8 0 504 100 0 0 0 3 0 0 0 130 6 137 101 14 6 0 1586 99 1 0 0 4 0 0 17 338 113 97 99 8 0 0 437 100 0 0 0 5 0 0 0 159 30 134 119 10 1 0 233 100 0 0 0 6 0 0 101 327 107 136 121 8 8 0 220 100 0 0 0 7 0 0 0 104 3 60 81 6 1 0 734 100 0 0 0 March 2, 2026 at 07:04:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 104 73 91 5 1 0 144 99 1 0 0 1 0 0 0 156 7 147 123 6 6 0 537 100 0 0 0 2 0 0 7 176 6 160 124 8 4 0 423 100 0 0 0 3 0 0 0 170 24 217 136 16 4 0 1669 99 1 0 0 4 0 0 17 429 140 211 150 14 5 0 553 100 0 0 0 5 0 0 0 112 1 74 85 10 2 0 157 100 0 0 0 6 0 0 115 360 109 191 146 7 7 0 339 100 0 0 0 7 0 0 0 107 3 59 83 4 8 0 735 100 0 0 0 March 2, 2026 at 07:04:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2169 104 109 102 9 2 0 189 99 1 0 0 1 0 0 0 112 4 60 84 1 5 0 393 100 0 0 0 2 0 0 0 228 9 245 176 7 5 0 351 99 1 0 0 3 0 0 0 181 31 188 124 7 5 0 1635 99 1 0 0 4 0 0 17 348 107 132 116 5 4 0 492 100 0 0 0 5 0 0 0 142 5 137 113 14 5 0 251 100 0 0 0 6 0 0 101 314 106 106 98 15 8 0 251 100 0 0 0 7 0 0 7 184 30 177 130 15 6 0 1044 100 0 0 0 March 2, 2026 at 07:04:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 127 158 114 12 7 0 244 99 1 0 0 1 0 0 0 190 20 183 143 11 3 0 511 100 0 0 0 2 0 0 0 196 11 185 139 11 6 0 191 100 0 0 0 3 0 0 0 181 5 223 145 8 2 0 1767 99 1 0 0 4 0 0 16 347 110 145 118 14 7 0 522 100 0 0 0 5 0 0 0 144 7 99 97 16 1 0 227 100 0 0 0 6 0 0 130 297 103 60 82 7 5 0 116 100 0 0 0 7 0 0 7 197 17 215 156 9 14 0 1213 100 0 0 0 March 2, 2026 at 07:04:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 100 184 144 6 3 0 179 99 1 0 0 1 0 0 0 176 27 168 134 6 6 0 489 100 0 0 0 2 0 0 0 192 25 180 140 8 12 0 183 100 0 0 0 3 0 0 0 120 3 135 100 14 2 0 1684 99 1 0 0 4 0 0 16 366 116 159 131 13 1 0 571 100 0 0 0 5 0 0 0 144 7 166 129 13 4 0 317 100 0 0 0 6 0 0 130 286 103 62 77 3 2 0 100 100 0 0 0 7 0 0 7 119 5 91 96 3 5 0 993 100 0 0 0 March 2, 2026 at 07:04:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 104 145 127 6 2 0 116 99 1 0 0 1 0 0 0 189 34 170 129 6 8 0 473 100 0 0 0 2 0 0 0 170 10 171 135 12 2 0 282 100 0 0 0 3 0 0 0 149 8 177 111 15 4 0 1751 99 1 0 0 4 0 0 21 379 126 198 142 19 3 0 646 99 1 0 0 5 0 0 0 154 6 137 114 14 3 0 151 100 0 0 0 6 0 0 133 318 106 92 98 9 7 0 241 100 0 0 0 7 0 0 7 181 9 195 146 8 18 0 1123 100 0 0 0 March 2, 2026 at 07:04:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 105 114 101 10 4 0 205 99 1 0 0 1 0 0 0 117 3 65 85 7 3 0 471 100 0 0 0 2 0 0 0 127 2 108 105 5 6 0 182 100 0 0 0 3 3 0 0 108 4 81 77 6 2 0 1523 99 1 0 0 4 5 0 17 327 105 83 95 6 2 0 405 100 0 0 0 5 0 0 14 230 15 254 174 12 2 0 566 100 0 0 0 6 0 0 115 433 131 268 178 12 4 0 320 100 0 0 0 7 0 0 0 186 24 201 141 16 9 0 899 100 0 0 0 March 2, 2026 at 07:04:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 103 113 98 15 5 0 150 99 1 0 0 1 0 0 0 154 13 100 100 15 12 0 419 100 0 0 0 2 0 0 0 171 11 265 159 14 5 0 443 99 1 0 0 3 0 0 0 142 12 137 100 8 6 0 1620 99 1 0 0 4 0 0 16 345 106 134 120 8 4 0 494 100 0 0 0 5 0 0 7 161 3 107 109 4 2 0 440 100 0 0 0 6 0 0 130 407 136 212 157 9 6 0 177 100 0 0 0 7 0 0 0 133 8 105 97 10 5 0 775 100 0 0 0 March 2, 2026 at 07:04:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 104 251 163 11 19 0 874 99 1 0 0 1 0 0 0 140 6 124 113 11 11 0 502 100 0 0 0 2 0 0 0 173 7 229 160 6 16 0 378 100 0 0 0 3 0 0 0 188 30 178 133 9 1 0 1606 99 1 0 0 4 0 0 16 326 110 95 98 11 10 0 542 100 0 0 0 5 0 0 7 165 30 118 110 9 7 0 351 100 0 0 0 6 0 0 130 319 105 131 116 7 10 0 194 100 0 0 0 7 0 0 0 168 5 223 160 8 8 0 372 100 0 0 0 March 2, 2026 at 07:04:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 109 252 162 8 3 0 868 99 1 0 0 1 0 0 0 149 7 157 126 7 4 0 576 99 1 0 0 2 0 0 0 162 24 152 127 6 3 0 233 100 0 0 0 3 0 0 0 175 12 209 138 9 4 0 1739 99 1 0 0 4 0 0 17 347 117 110 105 11 1 0 446 100 0 0 0 5 0 0 7 175 14 178 139 8 3 0 497 100 0 0 0 6 0 0 129 307 114 73 86 5 1 0 155 100 0 0 0 7 0 0 0 111 2 72 86 4 0 0 158 100 0 0 0 March 2, 2026 at 07:04:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 106 207 150 10 5 0 779 99 1 0 0 1 0 0 0 128 3 117 105 10 12 0 517 99 1 0 0 2 0 0 0 207 32 232 169 9 7 0 211 100 0 0 0 3 0 0 0 169 23 185 128 9 3 0 1640 99 1 0 0 4 0 0 17 331 108 112 109 5 0 0 497 100 0 0 0 5 0 0 7 149 10 148 119 10 3 0 500 100 0 0 0 6 0 0 115 317 106 118 105 13 4 0 315 100 0 0 0 7 0 0 0 146 5 148 122 10 4 0 286 100 0 0 0 March 2, 2026 at 07:04:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 104 120 109 8 5 0 687 99 1 0 0 1 0 0 0 158 7 139 120 10 7 0 550 99 1 0 0 2 0 0 0 143 2 145 120 14 12 0 249 100 0 0 0 3 0 0 7 213 22 228 151 10 5 0 1897 99 1 0 0 4 0 0 16 340 109 123 108 8 6 0 445 100 0 0 0 5 0 0 0 188 36 139 120 5 4 0 189 100 0 0 0 6 0 0 158 335 106 152 123 7 3 0 215 100 0 0 0 7 0 0 0 125 5 104 88 10 2 0 318 100 0 0 0 March 2, 2026 at 07:04:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 107 138 118 14 8 0 826 99 1 0 0 1 0 0 0 142 3 92 98 11 0 0 261 99 1 0 0 2 0 0 0 138 3 102 100 7 7 0 471 100 0 0 0 3 0 0 7 234 26 247 162 7 1 0 1642 99 1 0 0 4 0 0 24 357 108 146 121 11 2 0 700 100 0 0 0 5 0 0 0 235 33 223 164 12 1 0 346 100 0 0 0 6 0 0 143 351 112 181 141 7 2 0 375 99 1 0 0 7 0 0 0 170 5 149 125 11 6 0 222 100 0 0 0 March 2, 2026 at 07:04:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 102 126 114 5 5 0 694 99 1 0 0 1 0 0 0 132 3 113 105 6 7 0 160 100 0 0 0 2 0 0 7 221 29 246 167 9 8 0 828 100 0 0 0 3 0 0 0 156 14 188 131 4 10 0 1719 99 1 0 0 4 0 0 16 406 123 226 166 7 2 0 688 100 0 0 0 5 0 0 0 164 19 135 116 6 4 0 143 100 0 0 0 6 0 0 116 337 105 148 122 5 3 0 260 100 0 0 0 7 0 0 0 124 2 90 86 8 3 0 190 100 0 0 0 March 2, 2026 at 07:04:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 102 87 98 5 4 0 742 99 1 0 0 1 0 0 0 127 2 88 92 8 5 0 158 99 1 0 0 2 0 0 7 195 15 241 169 8 11 0 869 100 0 0 0 3 0 0 0 176 27 142 112 6 3 0 1541 99 1 0 0 4 0 0 16 347 110 164 118 14 3 0 545 100 0 0 0 5 0 0 0 211 25 227 156 16 4 0 286 100 0 0 0 6 0 0 116 334 105 139 115 13 1 0 278 100 0 0 0 7 0 0 0 139 0 98 98 9 1 0 151 100 0 0 0 March 2, 2026 at 07:05:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 104 99 99 10 4 0 762 99 1 0 0 1 0 0 0 204 14 229 151 13 6 0 449 99 1 0 0 2 3 0 7 204 13 202 152 8 6 0 831 100 0 0 0 3 0 0 0 203 25 218 144 13 4 0 1683 99 1 0 0 4 0 0 16 359 112 103 101 8 1 0 412 100 0 0 0 5 0 0 0 137 2 81 92 4 4 0 129 100 0 0 0 6 0 0 172 365 119 143 124 4 4 0 199 100 0 0 0 7 0 0 0 189 15 201 140 12 3 0 373 100 0 0 0 March 2, 2026 at 07:05:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2169 103 92 97 6 5 0 771 99 1 0 0 1 0 0 0 136 8 150 101 16 2 0 371 99 1 0 0 2 0 0 7 220 9 208 151 11 6 0 791 100 0 0 0 3 1 0 0 167 6 161 118 12 3 0 1639 99 1 0 0 4 0 0 16 408 138 184 144 8 6 0 483 100 0 0 0 5 0 0 0 147 1 122 106 11 3 0 250 100 0 0 0 6 0 0 158 352 124 129 116 6 2 0 164 100 0 0 0 7 0 0 0 150 3 116 107 7 1 0 175 100 0 0 0 March 2, 2026 at 07:05:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 104 178 120 20 3 0 889 99 1 0 0 1 2 0 0 215 39 209 143 22 1 0 291 100 0 0 0 2 0 0 0 147 7 120 99 14 2 0 489 100 0 0 0 3 0 0 0 116 3 126 90 15 1 0 1574 99 1 0 0 4 0 0 16 352 106 175 121 18 5 0 520 100 0 0 0 5 0 0 7 133 2 139 111 19 5 0 578 100 0 0 0 6 0 0 102 395 122 233 159 18 8 0 268 100 0 0 0 7 0 0 0 140 3 158 113 18 0 0 283 100 0 0 0 March 2, 2026 at 07:05:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2215 108 203 147 14 3 0 974 99 1 0 0 1 0 0 0 177 22 249 124 12 1 0 347 99 1 0 0 2 0 0 0 128 4 104 93 13 8 0 533 100 0 0 0 3 0 0 0 181 23 221 132 12 6 0 1752 99 1 0 0 4 6 0 17 387 119 168 118 13 3 0 540 99 1 0 0 5 0 0 7 152 10 136 109 8 7 0 448 100 0 0 0 6 0 0 157 364 104 198 142 11 3 0 281 99 1 0 0 7 0 0 0 175 1 188 135 14 5 0 290 100 0 0 0 March 2, 2026 at 07:05:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 104 85 96 5 7 0 740 99 1 0 0 1 0 0 7 125 4 106 100 6 7 0 239 100 0 0 0 2 0 0 0 129 6 118 107 9 6 0 518 100 0 0 0 3 0 0 0 212 38 248 150 7 3 0 1653 99 1 0 0 4 2 0 17 392 132 214 154 12 5 0 675 99 1 0 0 5 0 0 0 123 3 111 102 14 0 0 226 100 0 0 0 6 0 0 101 317 103 123 106 15 6 0 165 100 0 0 0 7 0 0 7 200 2 170 131 7 1 0 374 100 0 0 0 March 2, 2026 at 07:05:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2209 105 213 146 17 5 0 912 99 1 0 0 1 0 0 7 204 22 200 144 19 5 0 506 99 1 0 0 2 0 0 0 146 6 129 117 10 12 0 600 99 1 0 0 3 0 0 0 132 4 132 101 9 4 0 1645 99 1 0 0 4 0 0 16 383 132 136 120 5 2 0 509 100 0 0 0 5 0 0 0 128 5 97 99 6 4 0 160 100 0 0 0 6 0 0 130 344 104 178 124 12 4 0 236 99 1 0 0 7 0 0 0 186 4 183 132 19 5 0 223 100 0 0 0 March 2, 2026 at 07:05:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2194 104 123 112 3 4 0 822 99 1 0 0 1 0 0 0 256 36 282 191 5 3 0 437 99 1 0 0 2 0 0 0 149 6 128 110 12 6 0 572 99 1 0 0 3 0 0 7 147 9 134 101 14 6 0 1906 99 1 0 0 4 0 0 16 383 126 176 129 16 6 0 504 100 0 0 0 5 0 0 0 133 2 105 101 9 3 0 156 100 0 0 0 6 0 0 130 323 103 117 105 9 5 0 166 100 0 0 0 7 0 0 0 143 0 104 103 8 3 0 165 100 0 0 0 March 2, 2026 at 07:05:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2201 129 163 128 14 6 0 803 99 1 0 0 1 0 0 0 136 4 106 111 7 0 0 210 100 0 0 0 2 1 0 0 108 4 102 102 8 4 0 530 100 0 0 0 3 0 0 0 121 2 120 93 6 3 0 1537 99 1 0 0 4 0 0 23 410 140 195 147 9 3 0 762 100 0 0 0 5 0 0 0 185 3 193 141 12 6 0 261 100 0 0 0 6 0 0 102 324 104 157 126 13 3 0 261 99 1 0 0 7 0 0 0 145 6 120 104 16 0 0 200 100 0 0 0 March 2, 2026 at 07:05:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 133 256 165 15 2 0 814 99 1 0 0 1 0 0 0 155 4 160 130 13 6 0 205 100 0 0 0 2 0 0 0 178 25 175 133 10 7 0 576 99 1 0 0 3 0 0 0 108 1 96 84 8 4 0 1576 99 1 0 0 4 0 0 17 330 109 109 106 9 3 0 532 99 1 0 0 5 0 0 7 110 9 52 77 10 4 0 362 100 0 0 0 6 0 0 87 313 104 96 100 5 5 0 89 100 0 0 0 7 0 0 0 150 6 176 138 7 1 0 318 100 0 0 0 March 2, 2026 at 07:05:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2192 108 168 134 9 7 0 824 99 1 0 0 1 0 0 0 141 3 104 104 5 2 0 183 100 0 0 0 2 0 0 0 197 14 236 159 9 13 0 696 99 1 0 0 3 0 0 0 160 11 148 100 15 5 0 1658 99 1 0 0 4 0 0 17 369 126 139 120 10 3 0 458 100 0 0 0 5 0 0 7 150 8 127 118 8 7 0 438 100 0 0 0 6 0 0 115 359 123 142 120 11 8 0 161 100 0 0 0 7 0 0 0 119 1 78 89 9 7 0 140 100 0 0 0 March 2, 2026 at 07:05:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 103 99 102 16 5 0 786 99 1 0 0 1 0 0 0 138 3 123 110 12 4 0 213 100 0 0 0 2 0 0 0 148 6 102 99 10 6 0 506 100 0 0 0 3 0 0 0 139 3 103 94 10 2 0 1544 99 1 0 0 4 0 0 16 336 106 120 110 9 3 0 483 100 0 0 0 5 0 0 7 204 27 203 145 14 5 0 473 100 0 0 0 6 0 0 116 395 140 241 165 8 10 0 265 99 1 0 0 7 0 0 0 164 6 196 137 20 5 0 364 99 1 0 0 March 2, 2026 at 07:05:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 102 217 134 13 11 0 333 99 1 0 0 1 0 0 0 161 7 165 127 21 5 0 840 100 0 0 0 2 0 0 0 152 7 147 126 12 4 0 495 100 0 0 0 3 0 0 0 147 5 161 119 11 9 0 1719 99 1 0 0 4 0 0 17 315 106 77 90 7 6 0 444 100 0 0 0 5 0 0 7 144 9 116 106 5 2 0 447 100 0 0 0 6 0 0 101 397 135 254 176 4 14 0 326 99 1 0 0 7 0 0 0 158 22 118 114 5 3 0 163 100 0 0 0 March 2, 2026 at 07:05:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 101 116 98 14 4 0 137 99 1 0 0 1 0 0 7 196 8 193 147 14 17 0 959 99 1 0 0 2 0 0 0 132 4 119 107 13 7 0 226 100 0 0 0 3 0 0 0 193 28 224 145 11 5 0 1943 99 1 0 0 4 0 0 17 355 110 123 115 9 3 0 557 99 1 0 0 5 0 0 7 150 4 124 108 15 6 0 505 99 1 0 0 6 0 0 115 347 111 155 123 15 6 0 166 100 0 0 0 7 0 0 0 194 30 181 142 10 8 0 221 100 0 0 0 March 2, 2026 at 07:05:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 102 148 120 15 1 0 129 99 1 0 0 1 0 0 0 176 8 183 138 18 5 0 821 100 0 0 0 2 0 0 0 203 21 229 161 14 5 0 312 99 1 0 0 3 0 0 0 173 16 190 131 16 7 0 2025 99 1 0 0 4 0 0 17 394 126 179 136 15 3 0 579 100 0 0 0 5 21 0 7 144 15 102 102 15 5 0 493 99 1 0 0 6 0 0 143 325 104 122 113 8 2 0 211 99 1 0 0 7 0 0 0 150 4 130 117 6 7 0 185 100 0 0 0 March 2, 2026 at 07:05:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 102 139 121 10 7 0 287 99 1 0 0 1 0 0 0 167 9 166 129 15 5 0 840 100 0 0 0 2 0 0 0 200 31 141 120 10 7 0 118 100 0 0 0 3 0 0 0 222 28 246 155 10 4 0 1948 99 1 0 0 4 0 0 16 347 110 111 112 6 5 0 494 100 0 0 0 5 0 0 0 149 5 115 107 8 6 0 228 100 0 0 0 6 0 0 102 329 104 126 105 11 14 0 182 100 0 0 0 7 0 0 7 154 8 153 125 14 3 0 508 100 0 0 0 March 2, 2026 at 07:05:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 105 122 104 9 3 0 273 99 1 0 0 1 0 0 0 201 4 212 156 15 2 0 849 99 1 0 0 2 0 0 0 190 8 177 139 9 6 0 342 99 1 0 0 3 0 0 0 226 56 202 139 9 8 0 1884 99 1 0 0 4 0 0 17 344 107 133 115 7 2 0 499 100 0 0 0 5 0 0 0 137 1 99 102 8 8 0 197 100 0 0 0 6 0 0 115 314 103 94 98 7 4 0 93 100 0 0 0 7 0 0 7 134 6 101 101 4 7 0 434 100 0 0 0 March 2, 2026 at 07:05:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 104 140 128 7 6 0 220 99 1 0 0 1 0 0 0 157 23 107 106 8 4 0 751 99 1 0 0 2 0 0 0 184 3 168 135 7 1 0 220 100 0 0 0 3 0 0 0 148 14 138 108 6 12 0 1888 99 1 0 0 4 0 0 16 385 123 157 130 7 7 0 457 100 0 0 0 5 0 0 0 158 12 154 118 11 5 0 264 100 0 0 0 6 0 0 116 383 110 263 168 11 14 0 373 99 1 0 0 7 0 0 7 148 3 100 107 8 11 0 411 100 0 0 0 March 2, 2026 at 07:05:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2188 103 141 125 7 9 0 229 99 1 0 0 1 0 0 0 192 28 184 141 6 11 0 815 99 1 0 0 2 0 0 0 205 30 186 141 8 7 0 189 100 0 0 0 3 0 0 0 143 4 162 108 15 5 0 1968 99 1 0 0 4 0 0 17 335 108 111 105 15 7 0 436 100 0 0 0 5 0 0 0 164 8 133 114 13 3 0 193 100 0 0 0 6 0 0 101 346 108 181 137 5 10 0 281 100 0 0 0 7 0 0 7 119 2 69 89 8 8 0 424 100 0 0 0 March 2, 2026 at 07:05:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2198 103 148 122 7 2 0 326 99 1 0 0 1 0 0 7 145 8 115 94 13 5 0 1059 99 1 0 0 2 0 0 0 241 49 240 160 16 6 0 257 99 1 0 0 3 0 0 0 160 9 151 106 13 7 0 1832 99 1 0 0 4 1 0 16 346 108 119 109 13 3 0 546 100 0 0 0 5 0 0 0 238 16 229 163 5 5 0 293 100 0 0 0 6 0 0 130 336 104 141 123 5 7 0 198 99 1 0 0 7 0 0 0 182 7 199 151 7 9 0 299 100 0 0 0 March 2, 2026 at 07:05:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 103 148 119 15 3 0 255 99 1 0 0 1 0 0 7 148 10 128 108 13 6 0 1082 99 1 0 0 2 0 0 0 200 22 181 141 10 4 0 255 99 1 0 0 3 0 0 0 175 8 214 144 9 3 0 1803 99 1 0 0 4 0 0 17 379 134 134 117 7 11 0 721 100 0 0 0 5 0 0 0 184 5 149 125 6 2 0 152 100 0 0 0 6 0 0 115 330 103 162 122 9 14 0 199 99 1 0 0 7 0 0 0 138 5 134 108 17 3 0 283 100 0 0 0 March 2, 2026 at 07:05:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 107 117 104 11 3 0 138 99 1 0 0 1 0 0 7 208 31 179 134 16 7 0 975 99 1 0 0 2 0 0 0 116 12 75 83 11 2 0 152 100 0 0 0 3 0 0 0 111 11 94 79 8 2 0 1512 99 1 0 0 4 0 0 21 332 121 71 88 3 3 0 627 100 0 0 0 5 0 0 0 146 9 91 101 3 2 0 90 100 0 0 0 6 0 0 49 304 103 66 85 3 3 0 83 100 0 0 0 7 0 0 7 86 3 52 68 6 1 0 72 100 0 0 0 March 2, 2026 at 07:05:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 105 75 32 18 2 0 246 39 1 0 60 1 0 0 7 167 23 155 37 8 3 0 1068 25 0 0 75 2 0 0 0 65 4 58 33 16 0 0 144 42 0 0 58 3 0 0 0 58 10 41 15 7 0 0 106 28 0 0 72 4 0 0 16 303 133 88 16 7 3 0 628 28 0 0 72 5 0 0 0 57 3 45 26 14 1 0 141 40 0 0 60 6 0 0 32 244 105 36 20 4 1 0 14 26 0 0 74 7 0 0 0 50 4 77 20 19 8 0 1550 28 0 0 72 March 2, 2026 at 07:05:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 122 0 0 2 0 17 0 1 0 99 1 0 0 7 19 4 26 1 1 8 0 858 0 0 0 100 2 0 0 0 19 5 16 0 1 0 0 12 0 0 0 100 3 0 0 0 9 1 6 0 1 0 0 4 0 0 0 100 4 0 0 16 314 155 108 0 0 8 0 570 0 0 0 100 5 0 0 0 27 3 24 0 0 0 0 9 0 0 0 100 6 0 0 4 212 103 8 0 1 0 0 11 0 0 0 100 7 0 0 0 13 3 40 1 1 1 0 1416 0 0 0 100 March 2, 2026 at 07:05:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 110 124 0 0 0 0 10 0 1 0 99 1 0 0 7 15 4 12 0 0 8 0 854 0 0 0 100 2 0 0 0 16 0 16 0 1 0 0 5 0 0 0 100 3 0 0 0 12 1 8 0 1 0 0 0 0 0 0 100 4 0 0 16 318 156 112 1 0 15 0 571 0 0 0 100 5 1 0 0 36 10 32 0 0 0 0 18 0 0 0 100 6 0 0 4 210 103 4 0 0 0 0 1 0 0 0 100 7 0 0 0 15 3 40 1 1 0 0 1413 0 0 0 100 March 2, 2026 at 07:05:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 113 126 0 0 0 0 15 0 1 0 99 1 0 0 7 17 6 14 0 0 1 0 876 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 8 0 0 0 0 4 0 0 0 100 4 0 0 16 313 155 106 0 0 0 0 568 0 0 0 100 5 0 0 0 20 2 14 1 0 0 0 6 0 0 0 100 6 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 7 0 0 0 12 3 36 1 0 0 0 1413 0 0 0 100 March 2, 2026 at 07:05:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3090 102 1808 69 214 335 0 4307 13 7 0 80 1 0 0 0 702 8 1074 78 174 258 0 4287 29 4 0 67 2 0 0 10 898 7 1484 59 162 129 1 3776 19 4 0 77 3 0 0 0 936 40 1457 72 178 323 0 3877 14 5 0 81 4 2 0 15 1147 136 1514 38 185 321 1 4047 7 5 0 88 5 1 0 0 753 2 1131 26 109 333 0 3211 7 5 0 87 6 0 0 803 854 106 1313 70 126 76 0 3294 9 4 0 87 7 27 0 0 654 4 1053 24 97 329 0 4548 6 5 0 89 March 2, 2026 at 07:05:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 710 0 21 2633 103 1084 20 266 1201 6 1886 7 5 0 88 1 91 0 0 582 7 1209 28 301 1362 7 2778 4 5 0 92 2 1841 0 14 512 5 999 20 241 1255 15 1972 3 6 0 91 3 122 0 0 1272 675 1352 30 251 1172 5 7342 4 7 0 89 4 554 0 16 894 111 1354 27 249 1235 6 1855 7 6 0 87 5 28 0 0 491 5 960 15 231 1322 2 1368 4 5 0 91 6 165 0 368 761 105 1265 22 263 1276 10 1078 6 5 0 90 7 112 0 2 545 14 1075 21 240 1314 9 2063 4 5 0 91 March 2, 2026 at 07:05:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2294 101 467 2 147 896 0 1 0 3 0 97 1 0 0 7 224 6 548 7 153 1010 1 2016 0 3 0 97 2 0 0 7 188 3 456 4 144 925 0 553 0 3 0 97 3 0 0 0 689 444 1348 4 166 909 0 0 0 3 0 97 4 0 0 16 441 120 538 4 152 1120 0 276 0 3 0 96 5 0 0 0 216 2 476 0 130 954 0 3 0 3 0 97 6 0 0 4 447 102 520 3 154 977 0 0 0 3 0 97 7 0 0 0 202 5 480 3 140 856 0 4 0 2 0 98 March 2, 2026 at 07:05:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2300 100 501 4 125 1511 0 0 0 6 0 94 1 0 0 0 262 4 536 3 131 1456 0 2022 0 5 0 95 2 0 0 7 231 3 480 3 132 1440 0 558 0 5 0 95 3 0 0 0 668 429 1265 0 138 1303 0 0 0 4 0 96 4 0 0 16 515 140 589 3 152 1551 0 277 0 6 0 94 5 1 0 0 316 31 608 1 131 1377 1 12 0 4 0 96 6 0 0 4 449 101 538 3 143 1530 0 5 0 5 0 95 7 0 0 0 244 4 488 3 129 1300 0 6 0 5 0 95 March 2, 2026 at 07:05:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2488 100 950 1 148 1210 0 0 0 4 0 96 1 0 0 0 231 4 555 2 152 1362 0 2006 0 4 0 96 2 0 0 7 197 3 471 1 134 1258 0 554 0 3 0 97 3 0 0 0 630 406 906 0 157 1392 0 5 0 4 0 96 4 0 0 17 411 109 499 4 157 1414 1 271 0 4 0 96 5 0 0 0 270 32 554 2 141 1263 0 2 0 3 0 97 6 0 0 3 412 102 523 2 148 1416 0 0 0 4 0 96 7 0 0 0 234 21 520 0 140 1211 0 0 0 3 0 97 March 2, 2026 at 07:05:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2362 106 691 1 107 747 0 1005 0 3 0 97 1 0 0 0 259 8 531 3 100 742 0 1092 0 2 0 97 2 0 0 7 352 4 737 1 93 693 0 653 0 2 0 98 3 0 0 0 624 354 576 1 109 777 0 873 0 3 0 96 4 0 0 16 417 104 445 0 104 799 0 323 0 2 0 98 5 0 0 0 191 2 425 0 93 794 0 55 0 2 0 98 6 0 0 4 374 104 388 1 109 797 0 74 0 2 0 98 7 0 0 0 207 15 411 0 85 809 0 817 0 2 0 98 March 2, 2026 at 07:05:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 138 1 2 0 0 1416 0 1 0 99 1 0 0 0 31 12 26 1 0 0 0 310 0 0 0 100 2 0 0 7 12 3 8 0 1 0 0 261 0 0 0 100 3 0 0 0 114 53 108 1 0 9 0 299 0 0 0 100 4 0 0 16 212 103 4 0 1 0 0 265 0 0 0 100 5 0 0 0 12 2 8 0 0 0 0 3 0 0 0 100 6 0 0 4 217 105 10 0 0 12 0 296 0 0 0 100 7 0 0 0 16 3 16 0 1 0 0 1 0 0 0 100 March 2, 2026 at 07:05:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 150 1 1 0 0 1415 0 1 0 99 1 0 0 0 28 11 24 0 0 0 0 310 0 0 0 100 2 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 3 0 0 0 112 52 108 0 0 6 0 303 0 0 0 100 4 0 0 16 209 103 2 0 0 0 0 266 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 4 216 106 10 0 0 8 0 300 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:05:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 146 1 0 3 0 1415 0 1 0 99 1 0 0 0 30 12 26 0 0 0 0 310 0 0 0 100 2 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 3 0 0 0 111 52 106 0 0 7 0 299 0 0 0 100 4 0 0 16 214 104 10 0 0 0 0 267 0 0 0 100 5 0 0 0 25 9 18 0 0 4 0 16 0 0 0 100 6 0 0 4 217 105 14 0 0 9 0 300 0 0 0 100 7 0 0 0 16 2 16 0 1 0 0 5 0 0 0 100 March 2, 2026 at 07:05:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 70 1 1 1 0 1414 0 1 0 99 1 0 0 0 113 15 114 1 3 1 0 326 0 0 0 100 2 0 0 7 14 3 12 0 1 0 0 294 0 0 0 100 3 0 0 0 118 53 116 0 2 9 0 310 0 0 0 100 4 0 0 16 210 103 4 0 1 0 0 270 0 0 0 100 5 0 0 0 13 2 10 0 1 0 0 6 0 0 0 100 6 0 0 4 216 105 10 0 2 12 0 296 0 0 0 100 7 0 0 0 9 2 6 0 1 0 0 0 0 0 0 100 March 2, 2026 at 07:05:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 54 1 2 0 0 1416 0 1 0 99 1 0 0 0 117 13 112 0 0 1 0 314 0 0 0 100 2 0 0 7 13 2 12 0 1 1 0 260 0 0 0 100 3 0 0 0 113 52 108 1 0 13 0 303 0 0 0 100 4 1 0 16 214 104 6 1 0 0 0 301 0 0 0 100 5 0 0 0 12 2 8 0 0 0 0 3 0 0 0 100 6 0 0 4 221 102 16 0 1 12 0 301 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 3 0 0 0 100 March 2, 2026 at 07:05:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 142 1 1 0 0 1409 0 1 0 99 1 0 0 0 33 12 28 2 0 0 0 316 0 0 0 99 2 0 0 7 11 2 6 0 1 0 0 260 0 0 0 100 3 0 0 0 116 53 112 0 0 10 0 303 0 0 0 100 4 0 0 16 211 104 4 0 0 0 0 267 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 4 228 108 20 0 0 7 0 305 0 0 0 100 7 0 0 0 11 3 6 0 0 0 0 5 0 0 0 100 March 2, 2026 at 07:05:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 138 1 1 0 0 1401 0 1 0 99 1 0 0 0 34 11 30 0 2 0 0 309 0 0 0 100 2 0 0 7 12 3 8 0 0 0 0 260 0 0 0 100 3 0 0 0 116 52 116 0 1 8 0 300 0 0 0 100 4 0 0 16 209 103 2 0 0 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 2 0 0 0 100 6 0 0 4 208 102 2 0 0 6 0 294 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:05:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 143 2 2 1 0 1401 0 1 0 99 1 0 0 0 39 13 34 1 1 0 0 311 0 0 0 99 2 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 3 0 0 0 113 52 108 0 0 8 0 300 0 0 0 100 4 0 0 16 217 103 18 0 1 1 0 266 0 0 0 100 5 0 0 0 23 8 14 0 0 2 0 8 0 0 0 100 6 0 0 4 217 105 14 0 0 6 0 307 0 0 0 100 7 0 0 0 18 2 19 1 1 2 0 10 0 0 0 100 March 2, 2026 at 07:05:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 88 2 4 0 0 1400 0 1 0 99 1 0 0 0 85 12 78 0 3 0 0 309 0 0 0 100 2 0 0 7 11 2 6 1 0 0 0 260 0 0 0 100 3 0 0 0 112 52 106 1 0 13 0 298 0 0 0 100 4 0 0 16 209 103 2 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 2 0 0 0 100 6 0 0 4 209 102 2 1 0 8 0 294 0 0 0 100 7 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 March 2, 2026 at 07:05:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 136 0 0 1 0 1399 0 1 0 99 1 0 0 0 42 10 38 1 2 1 0 318 0 0 0 100 2 0 0 7 11 3 4 0 0 1 0 260 0 0 0 100 3 0 0 0 116 53 108 0 0 14 0 305 0 0 0 100 4 0 0 21 215 103 8 0 0 1 0 280 0 0 0 100 5 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 6 0 0 7 228 110 26 0 1 3 0 311 0 0 0 100 7 0 0 0 13 3 6 0 0 1 0 3 0 0 0 100 March 2, 2026 at 07:05:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 138 0 1 0 0 1400 0 1 0 99 1 0 0 0 22 3 18 0 0 1 0 300 0 0 0 100 2 0 0 7 19 5 18 0 1 0 0 261 0 0 0 100 3 0 0 0 117 54 110 0 0 11 0 301 0 0 0 100 4 0 0 16 212 104 6 0 1 2 0 266 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 6 0 0 4 238 116 32 1 1 4 0 308 0 0 0 100 7 0 0 0 15 4 10 0 1 0 0 1 0 0 0 100 March 2, 2026 at 07:05:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 137 1 1 0 0 1400 0 1 0 99 1 0 0 0 16 2 10 0 0 0 0 300 0 0 0 100 2 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 3 0 0 0 111 52 106 0 0 11 0 301 0 0 0 100 4 0 0 16 209 103 2 0 0 0 0 266 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 4 234 114 28 0 0 6 0 309 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:05:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 147 2 2 0 0 1400 0 1 0 99 1 0 0 0 11 2 8 0 1 0 0 300 0 0 0 100 2 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 3 0 0 0 119 52 116 1 2 11 0 296 0 0 0 100 4 0 0 16 216 105 10 1 0 0 0 290 0 0 0 100 5 0 0 0 20 7 10 0 0 0 0 7 0 0 0 100 6 0 0 4 234 113 30 1 0 3 0 311 0 0 0 100 7 0 0 0 19 4 19 0 1 0 0 13 0 0 0 100 March 2, 2026 at 07:05:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 5666 108 7778 69 278 75 0 24188 19 13 0 68 1 40 0 0 4556 12 9450 69 329 73 1 23203 16 11 0 73 2 20 0 21 3364 5 6987 57 236 95 0 18435 16 10 0 75 3 5 0 0 2788 25 5640 55 247 84 0 16002 16 8 0 76 4 62 0 3 2464 110 4558 30 201 60 1 11384 10 7 0 84 5 9 0 0 1622 4 3415 30 130 62 0 8929 8 5 0 86 6 340 0 3 2266 121 4207 28 176 56 0 10026 8 6 0 86 7 20 0 0 1957 6 4062 19 109 52 0 10291 8 6 0 86 March 2, 2026 at 07:05:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 6341 109 9007 61 351 138 0 27809 24 16 0 60 1 6 0 0 4766 10 9805 83 404 214 0 25838 21 14 0 66 2 5 0 21 3991 15 8201 53 259 107 0 19074 16 11 0 73 3 13 0 2 4331 25 9019 68 349 68 0 21207 17 12 0 71 4 2 0 2 3369 122 6388 27 256 111 0 14004 13 8 0 79 5 5 0 0 1917 13 3918 20 135 178 0 11325 10 6 0 83 6 7 0 4 3640 119 7085 33 241 75 0 14078 12 8 0 80 7 3 0 0 2024 9 4306 25 138 54 0 11183 10 6 0 84 March 2, 2026 at 07:05:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 6543 114 9450 62 361 138 0 25049 22 15 0 63 1 9 0 0 4814 14 10095 56 373 105 0 25036 20 14 0 67 2 24 0 14 3933 13 8221 41 251 132 0 23471 19 13 0 68 3 9 0 7 4528 16 9350 53 331 76 0 20169 17 11 0 72 4 6 0 2 2968 118 5682 27 240 108 0 14432 12 8 0 80 5 5 0 0 2467 7 5197 28 136 105 0 13802 12 8 0 80 6 3 0 4 3375 115 6547 35 225 108 0 13157 11 7 0 82 7 6 0 0 1821 10 3830 17 125 65 0 10816 9 6 0 85 March 2, 2026 at 07:05:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2756 106 1518 16 64 40 0 5373 4 3 0 93 1 2 0 0 668 5 1321 8 72 43 0 3850 3 2 0 95 2 2 0 14 512 6 1087 5 39 10 0 3405 3 2 0 96 3 3 0 7 676 8 1401 6 54 3 0 3026 2 2 0 96 4 0 0 2 587 109 792 4 31 32 0 3352 2 2 0 96 5 0 0 0 482 48 914 4 25 42 0 2203 2 1 0 97 6 0 0 4 582 110 773 6 42 14 0 2348 2 1 0 97 7 1 0 0 408 6 816 5 26 14 0 2346 2 1 0 97 March 2, 2026 at 07:05:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2194 122 319 4 50 311 0 1437 0 3 0 97 1 0 0 0 72 1 159 1 55 244 0 0 0 2 0 98 2 0 0 14 72 3 159 1 46 325 0 573 0 2 0 98 3 0 0 7 237 169 158 1 51 327 0 260 0 2 0 98 4 0 0 2 445 102 487 0 51 298 0 0 0 1 0 99 5 0 0 0 147 41 226 2 48 300 0 5 0 2 0 98 6 0 0 4 273 107 148 0 41 322 0 318 0 1 0 99 7 0 0 0 69 2 158 2 40 293 0 311 0 2 0 98 March 2, 2026 at 07:05:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2251 130 427 2 95 564 0 1415 0 3 0 97 1 0 0 0 201 1 395 0 91 555 0 0 0 2 0 98 2 0 0 14 154 13 346 0 81 595 0 583 0 2 0 98 3 0 0 7 485 356 862 0 94 464 0 260 0 2 0 98 4 0 0 2 406 102 458 1 110 562 0 0 0 2 0 98 5 0 0 0 165 22 336 0 97 495 0 0 0 2 0 98 6 0 0 4 324 104 296 0 97 497 0 301 0 2 0 98 7 0 0 0 118 1 281 0 82 475 0 298 0 1 0 98 March 2, 2026 at 07:05:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2273 111 449 3 64 439 0 1427 0 2 0 97 1 0 0 0 197 24 389 0 81 475 0 4 0 1 0 99 2 0 0 14 174 6 335 0 69 434 0 573 0 2 0 98 3 0 0 0 464 313 924 0 78 429 0 5 0 2 0 98 4 0 0 10 361 107 343 0 87 496 0 259 0 2 0 98 5 0 0 0 169 19 313 0 73 434 0 0 0 1 0 99 6 0 0 3 357 103 338 1 83 432 0 380 0 2 0 98 7 0 0 0 135 2 294 1 64 413 0 302 0 1 0 99 March 2, 2026 at 07:05:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 154 0 0 0 0 1421 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 2 0 0 14 13 4 12 0 0 0 0 571 0 0 0 100 3 0 0 0 14 3 10 0 0 0 0 1 0 0 0 100 4 0 0 9 212 104 4 1 0 0 0 260 0 0 0 100 5 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 6 0 0 4 215 105 8 1 0 4 0 231 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 297 0 0 0 100 March 2, 2026 at 07:05:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 107 142 2 2 0 0 1423 0 1 0 99 1 0 0 0 110 51 108 0 1 0 0 6 0 0 0 100 2 0 0 14 28 3 25 1 2 0 0 571 0 0 0 100 3 0 0 0 21 5 18 0 1 1 0 6 0 0 0 100 4 0 0 9 217 104 14 0 1 0 0 260 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 4 214 104 8 0 1 5 0 328 0 0 0 100 7 0 0 0 21 6 18 0 0 2 0 311 0 0 0 100 March 2, 2026 at 07:05:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2118 103 160 2 0 2 0 1422 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 2 0 0 14 9 3 6 0 0 0 0 566 0 0 0 100 3 0 0 0 15 3 12 0 0 1 0 0 0 0 0 100 4 0 0 9 219 105 14 0 1 2 0 261 0 0 0 100 5 0 0 0 23 6 18 0 1 3 0 7 0 0 0 100 6 0 0 4 217 105 14 0 0 6 0 310 0 0 0 100 7 0 0 0 29 10 26 0 1 6 0 304 0 0 0 100 March 2, 2026 at 07:05:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 2250 104 397 194 19 5 0 1970 79 2 0 19 1 0 0 0 204 16 227 135 14 4 0 493 80 1 0 20 2 1 0 14 201 23 205 130 13 3 0 1055 80 1 0 19 3 1342 0 0 224 22 249 164 8 3 1 555 80 1 0 19 4 25 0 9 380 107 187 122 14 8 1 611 80 1 0 20 5 4 0 7 181 5 268 153 22 4 0 592 79 1 0 20 6 1 0 200 300 105 83 72 16 4 0 486 80 0 0 20 7 0 0 0 156 9 140 97 15 7 0 650 80 0 0 19 March 2, 2026 at 07:05:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 104 120 97 6 5 0 1623 98 2 0 0 1 0 0 0 136 4 114 105 6 4 0 157 100 0 0 0 2 0 0 21 214 41 221 162 6 3 0 1058 100 0 0 0 3 0 0 0 170 18 150 121 6 1 0 232 100 0 0 0 4 0 0 2 347 115 103 99 9 2 0 239 100 0 0 0 5 0 0 0 194 1 189 136 6 4 0 224 100 0 0 0 6 0 0 116 305 106 77 89 7 3 0 414 100 0 0 0 7 0 0 0 131 3 107 107 7 6 0 539 100 0 0 0 March 2, 2026 at 07:05:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 102 115 95 7 3 0 1541 99 1 0 0 1 0 0 0 169 4 153 124 6 5 0 222 100 0 0 0 2 0 0 21 210 30 182 142 10 4 0 1033 100 0 0 0 3 0 0 0 189 11 189 143 9 6 0 326 100 0 0 0 4 0 0 3 374 121 170 134 8 7 0 243 100 0 0 0 5 0 0 0 178 14 135 121 7 1 0 256 100 0 0 0 6 0 0 129 326 105 118 104 7 12 0 558 100 0 0 0 7 0 0 0 151 4 124 111 7 3 0 478 100 0 0 0 March 2, 2026 at 07:05:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2199 108 187 121 11 5 0 1696 98 2 0 0 1 0 0 0 164 4 195 144 12 10 0 292 100 0 0 0 2 0 0 21 157 16 118 113 11 3 0 1069 100 0 0 0 3 0 0 0 274 40 271 178 9 0 0 290 99 1 0 0 4 0 0 3 328 106 100 103 7 3 0 267 100 0 0 0 5 0 0 0 160 11 156 124 12 5 0 292 100 0 0 0 6 0 0 115 308 104 102 101 11 6 0 526 100 0 0 0 7 0 0 0 132 3 101 105 6 8 0 465 100 0 0 0 March 2, 2026 at 07:05:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2228 108 273 162 14 0 0 1823 98 2 0 0 1 0 0 0 159 5 160 128 11 5 0 218 100 0 0 0 2 0 0 21 153 7 132 116 5 4 0 1053 100 0 0 0 3 0 0 0 195 34 138 119 7 2 0 223 99 1 0 0 4 0 0 2 383 122 149 122 5 7 0 230 100 0 0 0 5 0 0 0 131 8 93 101 4 5 0 216 100 0 0 0 6 0 0 130 372 112 171 134 5 11 0 494 100 0 0 0 7 0 0 0 119 5 85 83 7 12 0 499 100 0 0 0 March 2, 2026 at 07:05:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 102 158 119 4 7 0 1617 98 2 0 0 1 0 0 0 186 7 233 151 9 5 0 347 100 0 0 0 2 0 0 21 151 12 131 118 11 7 0 1197 99 1 0 0 3 0 0 0 142 4 124 113 10 1 0 265 99 1 0 0 4 0 0 2 408 136 204 146 13 6 0 218 100 0 0 0 5 0 0 0 132 19 82 92 7 2 0 112 100 0 0 0 6 0 0 130 388 111 204 147 9 4 0 602 99 1 0 0 7 0 0 0 129 2 107 103 5 5 0 464 100 0 0 0 March 2, 2026 at 07:06:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 102 128 98 16 4 0 1669 98 2 0 0 1 0 0 0 137 4 112 106 10 4 0 218 100 0 0 0 2 0 0 14 128 7 83 93 8 5 0 695 100 0 0 0 3 0 0 7 214 23 214 153 11 8 0 491 99 1 0 0 4 0 0 7 351 108 120 107 6 2 0 187 100 0 0 0 5 0 0 0 133 19 116 96 10 3 0 232 100 0 0 0 6 0 0 119 412 128 208 155 10 10 0 541 100 0 0 0 7 0 0 7 180 8 201 146 16 7 0 712 100 0 0 0 March 2, 2026 at 07:06:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2193 109 405 146 18 3 0 2175 98 2 0 0 1 0 0 0 167 6 191 149 10 5 0 260 100 0 0 0 2 0 0 14 133 7 114 105 10 1 0 793 100 0 0 0 3 0 0 0 192 32 188 148 9 3 0 261 99 1 0 0 4 0 0 3 318 105 61 86 10 2 0 141 100 0 0 0 5 0 0 7 124 8 90 92 8 2 0 403 100 0 0 0 6 0 0 101 348 119 124 112 5 5 0 442 100 0 0 0 7 0 0 0 135 7 138 110 7 4 0 547 100 0 0 0 March 2, 2026 at 07:06:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2164 104 133 102 11 0 0 1561 98 2 0 0 1 0 0 0 128 5 110 102 8 1 0 177 100 0 0 0 2 0 0 14 135 4 106 105 6 4 0 733 100 0 0 0 3 0 0 0 104 2 62 83 4 0 0 122 100 0 0 0 4 0 0 3 373 112 217 146 9 3 0 398 100 0 0 0 5 0 0 7 161 12 142 119 5 2 0 525 100 0 0 0 6 1 0 101 363 117 155 123 13 5 0 551 100 0 0 0 7 0 0 0 252 32 277 182 14 1 0 661 100 0 0 0 March 2, 2026 at 07:06:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2184 117 172 112 18 1 0 1655 98 2 0 0 1 0 0 0 130 3 135 112 13 1 0 202 100 0 0 0 2 0 0 14 140 4 113 103 12 0 0 796 100 0 0 0 3 0 0 0 140 4 114 108 10 4 0 233 99 1 0 0 4 0 0 3 403 114 194 143 9 6 0 295 100 0 0 0 5 0 0 0 143 8 81 94 4 0 0 256 100 0 0 0 6 0 0 129 417 134 239 158 12 5 0 550 100 0 0 0 7 1 0 7 168 14 149 126 12 2 0 864 100 0 0 0 March 2, 2026 at 07:06:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2207 113 249 149 12 7 0 1828 98 2 0 0 1 0 0 7 174 6 164 131 18 4 0 496 100 0 0 0 2 0 0 14 245 42 242 164 14 5 0 807 100 0 0 0 3 0 0 0 133 5 97 98 9 7 0 190 99 1 0 0 4 0 0 2 358 106 126 115 6 1 0 153 100 0 0 0 5 0 0 0 113 2 64 85 5 0 0 189 100 0 0 0 6 0 0 130 317 104 82 92 5 6 0 524 100 0 0 0 7 1 0 0 199 13 217 157 7 20 0 744 99 1 0 0 March 2, 2026 at 07:06:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2195 108 181 128 6 0 0 1692 98 2 0 0 1 0 0 0 226 29 227 157 15 8 0 296 99 1 0 0 2 0 0 21 202 26 206 149 17 3 0 1059 100 0 0 0 3 0 0 0 109 1 79 82 11 3 0 156 100 0 0 0 4 0 0 3 350 116 105 106 9 7 0 201 100 0 0 0 5 0 0 0 129 1 136 114 10 4 0 320 100 0 0 0 6 0 0 129 363 103 146 121 8 2 0 482 100 0 0 0 7 0 0 0 109 3 66 82 7 2 0 476 100 0 0 0 March 2, 2026 at 07:06:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 103 146 105 17 6 0 1646 98 2 0 0 1 0 0 0 174 2 198 147 9 12 0 261 100 0 0 0 2 0 0 21 223 37 175 137 10 0 0 1017 100 0 0 0 3 0 0 0 184 22 149 121 15 3 0 217 100 0 0 0 4 0 0 2 352 108 123 111 10 7 0 244 100 0 0 0 5 0 0 0 148 5 164 129 10 4 0 297 100 0 0 0 6 2 0 144 334 111 133 114 7 5 0 644 99 1 0 0 7 0 0 0 152 4 146 114 11 3 0 608 100 0 0 0 March 2, 2026 at 07:06:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 104 130 101 5 5 0 1559 99 1 0 0 1 0 0 0 123 3 94 95 3 1 0 111 100 0 0 0 2 0 0 21 163 5 181 133 7 4 0 1110 100 0 0 0 3 0 0 0 214 42 206 146 7 9 0 261 100 0 0 0 4 0 0 2 364 114 137 113 11 3 0 215 100 0 0 0 5 0 0 0 146 9 127 114 12 6 0 242 100 0 0 0 6 0 0 102 306 104 69 84 7 6 0 413 100 0 0 0 7 0 0 0 149 6 155 127 8 3 0 692 100 0 0 0 March 2, 2026 at 07:06:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 112 106 93 9 0 0 1600 98 2 0 0 1 0 0 0 137 1 124 110 5 1 0 219 100 0 0 0 2 0 0 14 147 4 97 100 5 3 0 679 100 0 0 0 3 0 0 0 139 6 108 105 8 3 0 165 100 0 0 0 4 0 0 3 381 114 213 153 7 4 0 394 100 0 0 0 5 0 0 0 145 18 125 108 8 3 0 213 100 0 0 0 6 0 0 101 379 122 176 135 12 6 0 620 100 0 0 0 7 0 0 14 208 18 223 157 12 6 0 837 100 0 0 0 March 2, 2026 at 07:06:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2202 136 223 143 12 1 0 1905 98 2 0 0 1 0 0 0 164 13 190 136 13 9 0 256 100 0 0 0 2 0 0 14 149 12 143 114 15 1 0 801 100 0 0 0 3 0 0 0 119 2 71 88 7 4 0 146 100 0 0 0 4 0 0 2 383 111 215 156 8 3 0 437 99 1 0 0 5 0 0 0 118 0 80 86 7 2 0 123 100 0 0 0 6 0 0 74 344 110 133 117 5 10 0 466 100 0 0 0 7 0 0 0 143 4 113 109 6 12 0 541 100 0 0 0 March 2, 2026 at 07:06:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2195 105 167 119 6 2 0 1993 98 2 0 0 1 0 0 0 159 9 100 102 9 5 0 150 100 0 0 0 2 0 0 0 230 39 208 135 9 0 0 250 100 0 0 0 3 0 0 14 188 17 158 132 15 6 0 787 100 0 0 0 4 3 0 7 363 105 158 124 11 14 0 296 100 0 0 0 5 0 0 0 160 4 146 125 8 2 0 270 100 0 0 0 6 0 0 161 340 107 137 116 11 11 0 587 100 0 0 0 7 0 0 0 191 10 210 154 8 6 0 649 100 0 0 0 March 2, 2026 at 07:06:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2186 108 153 117 9 2 0 1876 98 2 0 0 1 0 0 0 142 2 139 117 11 3 0 250 100 0 0 0 2 0 0 0 206 19 213 156 11 7 0 289 100 0 0 0 3 0 0 14 173 22 152 126 8 3 0 840 100 0 0 0 4 0 0 2 370 125 121 108 8 1 0 202 100 0 0 0 5 0 0 0 109 1 70 85 8 0 0 195 100 0 0 0 6 0 0 116 355 105 160 117 17 5 0 515 100 0 0 0 7 0 0 0 165 4 188 138 19 7 0 585 100 0 0 0 March 2, 2026 at 07:06:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 102 151 100 15 0 0 1751 98 2 0 0 1 0 0 0 131 1 109 96 17 3 0 234 100 0 0 0 2 0 0 7 168 5 147 112 19 1 0 501 100 0 0 0 3 0 0 14 167 8 175 131 15 0 0 816 100 0 0 0 4 0 0 3 390 133 181 129 16 1 0 252 100 0 0 0 5 0 0 0 134 5 173 117 17 5 0 393 100 0 0 0 6 0 0 115 403 127 196 136 20 2 0 466 100 0 0 0 7 0 0 0 143 4 171 124 14 3 0 600 100 0 0 0 March 2, 2026 at 07:06:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2222 109 337 187 22 2 0 1899 98 2 0 0 1 6 0 0 146 1 137 111 22 4 0 270 100 0 0 0 2 0 0 0 133 1 117 98 15 0 0 191 100 0 0 0 3 1 0 14 124 7 88 87 14 2 0 719 100 0 0 0 4 0 0 9 335 109 124 92 22 1 0 544 100 0 0 0 5 0 0 0 178 29 199 120 24 11 0 389 100 0 0 0 6 0 0 158 391 129 252 162 19 6 0 732 99 1 0 0 7 0 0 0 162 7 166 126 15 14 0 658 100 0 0 0 March 2, 2026 at 07:06:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 121 160 115 9 1 0 1600 98 2 0 0 1 0 0 0 148 6 118 111 10 5 0 261 100 0 0 0 2 0 0 0 173 2 199 142 12 7 0 390 99 1 0 0 3 2 0 14 158 6 136 115 9 0 0 728 100 0 0 0 4 0 0 9 347 109 128 112 9 2 0 564 100 0 0 0 5 0 0 0 166 15 151 129 9 5 0 421 99 1 0 0 6 0 0 102 375 130 154 120 10 4 0 451 100 0 0 0 7 0 0 0 163 11 179 133 14 5 0 544 100 0 0 0 March 2, 2026 at 07:06:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2219 133 224 138 7 1 0 1753 98 2 0 0 1 0 0 0 141 2 106 99 9 1 0 191 100 0 0 0 2 0 0 0 139 3 128 116 4 5 0 245 100 0 0 0 3 0 0 14 194 12 175 140 10 2 0 851 100 0 0 0 4 0 0 2 337 110 130 112 16 3 0 307 100 0 0 0 5 0 0 0 132 0 106 97 15 3 0 165 100 0 0 0 6 0 0 109 369 122 153 120 10 2 0 744 99 1 0 0 7 0 0 0 115 6 71 85 6 1 0 411 100 0 0 0 March 2, 2026 at 07:06:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 102 115 95 11 2 0 1648 98 2 0 0 1 0 0 0 137 5 86 95 8 1 0 190 100 0 0 0 2 0 0 0 179 6 181 140 8 3 0 320 100 0 0 0 3 0 0 14 172 9 142 122 7 6 0 479 100 0 0 0 4 0 0 10 337 109 100 96 9 3 0 486 100 0 0 0 5 0 0 0 162 1 177 132 9 2 0 358 100 0 0 0 6 0 0 136 405 137 207 149 10 10 0 809 99 1 0 0 7 0 0 0 195 22 173 134 12 5 0 548 100 0 0 0 March 2, 2026 at 07:06:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 109 139 105 11 4 0 1667 98 2 0 0 1 0 0 0 133 2 86 89 10 2 0 132 100 0 0 0 2 0 0 0 186 11 188 145 8 5 0 221 100 0 0 0 3 0 0 14 156 6 146 128 6 6 0 541 100 0 0 0 4 0 0 3 317 105 52 80 6 9 0 470 100 0 0 0 5 1 0 0 146 3 107 104 6 6 0 231 100 0 0 0 6 0 0 136 331 106 134 111 12 2 0 789 100 0 0 0 7 0 0 0 264 50 262 177 10 6 0 693 99 1 0 0 March 2, 2026 at 07:06:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 130 138 105 10 2 0 1598 98 2 0 0 1 0 0 0 138 2 93 96 5 3 0 174 100 0 0 0 2 0 0 0 166 11 124 113 8 6 0 199 100 0 0 0 3 0 0 14 202 22 191 145 10 6 0 502 99 1 0 0 4 0 0 2 352 111 155 114 11 3 0 572 100 0 0 0 5 0 0 0 152 7 154 125 14 3 0 318 100 0 0 0 6 0 0 123 323 112 113 101 11 3 0 710 100 0 0 0 7 0 0 0 161 6 132 115 12 5 0 547 100 0 0 0 March 2, 2026 at 07:06:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2198 123 244 145 16 8 0 1767 98 2 0 0 1 0 0 0 136 4 107 106 10 5 0 184 100 0 0 0 2 0 0 0 154 1 125 106 11 4 0 200 100 0 0 0 3 0 0 14 153 5 141 121 9 3 0 552 99 1 0 0 4 0 0 2 333 105 81 89 6 7 0 431 100 0 0 0 5 0 0 0 176 29 166 126 14 8 0 227 100 0 0 0 6 0 0 102 309 106 92 97 7 2 0 492 100 0 0 0 7 0 0 7 170 14 145 124 10 6 0 831 99 1 0 0 March 2, 2026 at 07:06:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2210 118 253 151 14 6 0 1962 98 2 0 0 1 0 0 0 234 44 234 164 11 5 0 274 99 1 0 0 2 0 0 0 144 3 134 99 14 11 0 276 100 0 0 0 3 0 0 14 118 4 98 93 11 5 0 518 99 1 0 0 4 0 0 7 363 108 133 118 10 6 0 527 100 0 0 0 5 0 0 0 146 6 130 117 8 6 0 345 100 0 0 0 6 0 0 105 319 104 103 101 11 12 0 562 99 1 0 0 7 0 0 0 132 6 90 97 6 6 0 483 100 0 0 0 March 2, 2026 at 07:06:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2167 104 114 97 6 1 0 1886 98 2 0 0 1 0 0 0 166 17 158 126 11 5 0 278 100 0 0 0 2 0 0 0 241 40 236 155 14 7 0 289 99 1 0 0 3 0 0 14 144 3 116 108 10 1 0 479 99 1 0 0 4 0 0 2 354 112 121 113 9 3 0 513 100 0 0 0 5 0 0 0 160 3 170 128 13 8 0 323 100 0 0 0 6 0 0 144 302 107 105 96 9 2 0 570 99 1 0 0 7 0 0 0 159 7 133 117 7 2 0 477 100 0 0 0 March 2, 2026 at 07:06:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2165 106 158 106 11 3 0 1936 98 2 0 0 1 0 0 0 142 6 136 113 17 5 0 227 100 0 0 0 2 0 0 0 213 9 208 154 7 4 0 236 99 1 0 0 3 0 0 14 146 23 103 98 10 1 0 406 99 1 0 0 4 0 0 3 327 109 95 99 6 2 0 487 100 0 0 0 5 0 0 0 159 13 173 133 9 8 0 239 100 0 0 0 6 0 0 101 336 111 143 124 7 14 0 585 99 1 0 0 7 0 0 0 166 17 135 118 7 4 0 571 100 0 0 0 March 2, 2026 at 07:06:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2177 103 136 105 10 1 0 1610 98 2 0 0 1 20 0 0 138 4 105 104 5 14 0 202 100 0 0 0 2 0 0 0 179 7 163 134 9 3 0 258 100 0 0 0 3 0 0 21 151 11 140 111 12 3 0 731 99 1 0 0 4 0 0 3 327 111 80 89 10 1 0 513 100 0 0 0 5 0 0 0 205 11 216 158 11 9 0 325 100 0 0 0 6 0 0 101 319 108 98 102 5 4 0 463 100 0 0 0 7 0 0 0 215 43 208 141 8 8 0 553 99 1 0 0 March 2, 2026 at 07:06:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2210 108 204 135 12 4 0 1694 98 2 0 0 1 0 0 7 136 2 86 89 11 8 0 218 100 0 0 0 2 0 0 0 149 5 130 113 11 5 0 311 100 0 0 0 3 0 0 7 178 10 156 129 9 2 0 494 99 1 0 0 4 0 0 17 384 126 177 136 11 3 0 756 100 0 0 0 5 0 0 0 184 9 162 122 9 7 0 334 99 1 0 0 6 0 0 115 293 104 61 80 11 3 0 440 100 0 0 0 7 0 0 0 163 32 124 109 5 3 0 454 100 0 0 0 March 2, 2026 at 07:06:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2187 107 141 110 8 3 0 1607 98 2 0 0 1 0 0 0 153 4 145 114 15 6 0 377 99 1 0 0 2 0 0 0 151 1 133 109 14 1 0 235 100 0 0 0 3 0 0 0 157 2 165 131 12 13 0 263 99 1 0 0 4 0 0 9 395 125 186 142 16 3 0 885 99 1 0 0 5 0 0 14 187 11 168 137 13 5 0 561 100 0 0 0 6 0 0 116 338 104 142 122 12 8 0 485 100 0 0 0 7 0 0 0 187 31 151 125 8 6 0 481 99 1 0 0 March 2, 2026 at 07:06:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 119 137 105 13 0 0 1635 98 2 0 0 1 0 0 0 158 9 169 132 12 0 0 354 100 0 0 0 2 0 0 0 166 5 135 120 8 2 0 259 100 0 0 0 3 0 0 0 161 5 132 116 11 2 0 282 99 1 0 0 4 0 0 10 347 109 98 100 6 3 0 714 100 0 0 0 5 0 0 14 142 4 109 99 7 2 0 438 100 0 0 0 6 0 0 115 389 130 200 139 15 5 0 589 99 1 0 0 7 0 0 0 207 18 206 148 15 7 0 614 100 0 0 0 March 2, 2026 at 07:06:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 103 121 94 10 9 0 1581 98 2 0 0 1 0 0 0 215 28 261 175 13 2 0 332 100 0 0 0 2 0 0 0 166 7 170 133 8 4 0 275 100 0 0 0 3 0 0 0 176 3 163 132 8 11 0 242 100 0 0 0 4 0 0 2 332 106 58 83 6 8 0 496 100 0 0 0 5 0 0 21 124 3 96 99 6 2 0 782 100 0 0 0 6 0 0 130 371 133 128 112 10 4 0 405 100 0 0 0 7 0 0 0 148 8 112 98 11 14 0 558 100 0 0 0 March 2, 2026 at 07:06:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 102 154 107 11 12 0 1700 98 2 0 0 1 2 0 0 223 28 177 137 14 7 0 239 100 0 0 0 2 0 0 0 190 30 162 128 14 4 0 222 100 0 0 0 3 0 0 0 127 2 108 107 9 2 0 217 100 0 0 0 4 0 0 3 355 107 137 123 6 4 0 512 100 0 0 0 5 0 0 21 131 8 102 103 10 11 0 767 100 0 0 0 6 2 0 101 363 106 166 121 14 3 0 522 100 0 0 0 7 0 0 0 173 7 170 138 8 8 0 589 100 0 0 0 March 2, 2026 at 07:06:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2204 112 135 116 12 2 0 309 99 1 0 0 1 0 0 0 114 3 77 91 5 4 0 202 100 0 0 0 2 0 0 0 240 32 233 162 9 1 0 304 100 0 0 0 3 0 0 0 144 3 198 130 11 4 0 1680 99 1 0 0 4 0 0 2 353 106 106 102 6 0 0 154 100 0 0 0 5 0 0 14 132 9 113 106 10 3 0 732 100 0 0 0 6 0 0 81 326 105 112 95 13 3 0 514 100 0 0 0 7 0 0 7 157 25 160 120 17 7 0 752 100 0 0 0 March 2, 2026 at 07:06:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 123 172 135 13 2 0 222 99 1 0 0 1 0 0 0 103 3 64 84 7 6 0 141 100 0 0 0 2 0 0 0 154 3 103 107 4 3 0 141 100 0 0 0 3 0 0 0 145 10 100 103 4 3 0 164 100 0 0 0 4 0 0 2 316 110 68 78 10 1 0 132 100 0 0 0 5 0 0 14 116 5 101 84 14 2 0 2065 99 1 0 0 6 0 0 74 309 107 69 84 7 2 0 396 100 0 0 0 7 0 0 7 203 37 157 128 5 9 0 676 100 0 0 0 March 2, 2026 at 07:06:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 114 91 42 14 3 0 134 39 1 0 60 1 0 0 0 63 8 58 13 14 1 0 314 26 0 0 74 2 0 0 0 60 4 39 19 6 0 0 68 23 0 0 77 3 0 0 0 173 34 164 17 8 5 0 46 29 0 0 71 4 0 0 2 246 104 17 20 4 0 0 56 33 0 0 67 5 0 0 14 48 4 61 23 3 0 0 2033 32 0 0 67 6 0 0 32 258 108 64 33 13 9 0 434 31 0 0 68 7 0 0 7 66 9 57 37 10 6 0 672 37 0 0 62 March 2, 2026 at 07:06:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 100 114 0 2 2 0 3 0 1 0 99 1 0 0 0 22 7 16 0 0 0 0 15 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 126 59 126 0 1 0 0 21 0 0 0 100 4 0 0 2 218 104 8 0 1 0 0 8 0 0 0 100 5 0 0 14 18 3 44 1 0 0 0 1979 0 0 0 100 6 0 0 4 215 104 12 0 0 0 0 337 0 0 0 100 7 0 0 7 15 4 14 0 2 0 0 557 0 0 0 100 March 2, 2026 at 07:06:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 106 0 2 0 0 5 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 136 64 132 1 0 0 0 12 0 0 0 100 4 0 0 2 220 103 12 0 2 0 0 1 0 0 0 100 5 0 0 14 26 9 46 1 0 0 0 1982 0 0 0 99 6 0 0 4 219 105 18 0 0 3 0 322 0 0 0 100 7 0 0 7 20 5 20 0 1 6 0 562 0 0 0 100 March 2, 2026 at 07:06:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2136 114 136 1 1 1 0 18 0 1 0 99 1 0 0 0 13 2 12 0 1 0 0 0 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 113 53 108 0 0 0 0 1 0 0 0 100 4 0 0 2 215 104 6 0 0 0 0 5 0 0 0 100 5 0 0 14 21 4 46 2 0 1 0 1980 0 0 0 100 6 0 0 4 209 102 4 0 0 0 0 299 0 0 0 100 7 0 0 7 12 4 8 0 0 1 0 554 0 0 0 100 March 2, 2026 at 07:06:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 3075 124 1730 76 230 209 1 4634 21 5 0 74 1 0 0 0 957 6 1594 78 256 301 0 4641 21 6 0 73 2 0 0 0 1012 2 1636 47 180 369 0 4312 10 6 0 84 3 0 0 0 917 59 1359 50 166 268 1 3514 11 5 0 84 4 0 0 2 1060 104 1343 56 175 242 0 3671 11 5 0 83 5 3 0 14 713 8 1181 53 123 306 2 4728 8 3 0 88 6 0 0 843 992 111 1572 52 183 412 0 3751 7 6 0 88 7 29 0 0 644 5 987 35 91 216 0 3448 20 5 0 75 March 2, 2026 at 07:06:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 15 2557 109 1096 19 277 1401 0 1007 5 6 0 89 1 5 0 0 594 19 1253 32 276 1529 2 1504 4 6 0 90 2 1 0 7 423 22 866 20 237 1307 0 803 9 4 0 87 3 0 0 0 1145 671 1241 24 278 1437 0 1202 4 5 0 91 4 0 0 2 822 106 1325 13 280 1299 1 1359 2 5 0 93 5 2 0 14 377 7 826 13 226 1303 0 2117 3 4 0 93 6 34 0 186 656 104 1015 18 243 1383 1 1827 5 6 0 89 7 0 0 14 617 6 1299 15 253 1361 2 1525 3 5 0 91 March 2, 2026 at 07:06:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2268 102 527 1 136 892 0 260 0 3 0 97 1 0 0 0 236 3 548 1 148 1004 0 0 0 2 0 98 2 0 0 0 554 52 1066 1 127 856 0 0 0 3 0 97 3 0 0 7 573 386 454 0 157 984 0 0 0 3 0 97 4 0 0 2 389 107 445 3 139 944 0 306 0 3 0 97 5 0 0 14 203 9 502 1 134 1010 0 1603 0 3 0 97 6 0 0 4 378 102 437 1 135 900 0 300 0 3 0 97 7 0 0 0 256 3 589 0 136 933 0 296 0 3 0 97 March 2, 2026 at 07:06:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 249 0 7 2375 102 591 3 153 1293 7 386 0 5 0 94 1 276 0 0 387 3 720 8 158 1254 6 6473 1 6 0 93 2 51 0 0 404 29 747 2 143 1319 3 72 0 4 0 96 3 7 0 0 687 432 743 2 165 1277 2 94 0 5 0 95 4 445 0 2 634 108 858 3 167 1348 2 380 0 5 0 94 5 482 0 140 298 23 571 2 140 1331 6 1119 0 6 0 94 6 2016 0 4 528 120 629 9 147 1214 11 747 1 5 0 94 7 23 0 114 245 2 550 6 145 1262 7 1143 0 5 0 95 March 2, 2026 at 07:06:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2333 128 621 1 160 1391 0 260 0 4 0 96 1 0 0 0 242 4 551 3 154 1487 0 0 0 3 0 97 2 0 0 0 195 3 483 2 139 1433 0 0 0 3 0 97 3 0 0 0 613 401 519 2 156 1430 1 0 0 4 0 96 4 0 0 2 823 103 1324 4 169 1420 0 303 0 3 0 97 5 0 0 14 227 13 516 3 156 1448 1 279 0 3 0 96 6 0 0 4 433 115 552 3 165 1577 1 300 0 3 0 97 7 0 0 7 231 14 535 3 144 1346 0 1711 0 3 0 96 March 2, 2026 at 07:06:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2360 157 630 2 77 552 1 598 0 2 0 98 1 0 0 0 174 7 360 1 86 648 0 231 0 2 0 98 2 0 0 0 140 3 293 0 83 597 0 86 0 1 0 99 3 0 0 0 386 225 368 1 96 677 0 1227 0 1 0 98 4 0 0 7 427 104 480 0 88 714 0 443 0 1 0 99 5 0 0 14 166 11 346 5 78 693 0 1632 0 2 0 98 6 0 0 7 447 105 506 2 96 701 0 1673 0 2 0 98 7 0 0 0 142 3 332 1 68 665 0 1739 0 1 0 98 March 2, 2026 at 07:06:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2186 164 252 0 2 0 0 271 0 1 0 99 1 0 0 0 17 5 14 0 1 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 14 3 10 0 0 0 0 300 0 0 0 100 4 0 0 2 215 105 6 0 0 5 0 297 0 0 0 100 5 0 0 14 9 2 4 0 1 0 0 266 0 0 0 100 6 0 0 4 213 103 4 0 0 0 0 1 0 0 0 100 7 0 0 0 19 5 44 1 1 8 0 1712 0 0 0 100 March 2, 2026 at 07:06:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2174 162 234 1 0 0 0 271 0 1 0 99 1 0 0 0 14 4 10 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 14 2 10 0 0 0 0 300 0 0 0 100 4 0 0 2 213 103 4 0 0 9 0 306 0 0 0 100 5 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 6 0 0 4 214 104 8 0 0 0 0 6 0 0 0 100 7 0 0 0 10 2 34 1 0 9 0 1709 0 0 0 100 March 2, 2026 at 07:06:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2181 162 244 0 0 0 0 275 0 1 0 99 1 0 0 0 19 4 20 0 1 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 8 0 0 2 0 300 0 0 0 100 4 0 0 2 215 104 6 1 0 7 0 295 0 0 0 100 5 0 0 14 17 8 12 0 1 1 0 267 0 0 0 100 6 0 0 4 217 104 16 0 0 0 0 15 0 0 0 100 7 0 0 0 18 3 46 1 0 6 0 1720 0 0 0 99 March 2, 2026 at 07:06:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2167 156 224 1 0 0 0 290 0 1 0 99 1 0 0 0 18 4 16 0 1 0 0 2 0 0 0 100 2 0 0 0 27 8 28 0 1 0 0 39 0 0 0 100 3 0 0 0 18 4 18 0 1 0 0 336 0 0 0 100 4 0 0 3 214 103 6 1 0 10 0 321 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 267 0 0 0 100 6 0 0 3 219 104 20 0 0 0 0 15 0 0 0 100 7 0 0 0 13 2 42 0 1 6 0 1717 0 0 0 99 March 2, 2026 at 07:06:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2176 161 240 1 0 0 0 282 0 1 0 99 1 0 0 0 17 4 16 0 0 0 0 9 0 0 0 100 2 0 0 0 15 4 10 0 0 0 0 11 0 0 0 100 3 0 0 0 12 2 8 0 0 0 0 303 0 0 0 100 4 0 0 2 211 103 2 0 0 6 0 295 0 0 0 100 5 0 0 14 6 1 4 0 0 1 0 269 0 0 0 100 6 0 0 4 210 102 6 0 0 0 0 7 0 0 0 100 7 0 0 0 16 3 44 1 0 7 0 1718 0 0 0 100 March 2, 2026 at 07:06:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2182 163 222 0 2 0 0 279 0 1 0 99 1 0 0 0 31 4 24 0 2 0 0 0 0 0 0 100 2 0 0 0 13 3 8 0 0 1 0 15 0 0 0 100 3 0 0 0 21 3 24 1 1 1 0 301 0 0 0 100 4 0 0 2 211 103 2 0 0 8 0 304 0 0 0 100 5 0 0 14 7 1 6 0 2 0 0 266 0 0 0 100 6 0 0 4 210 103 4 0 0 0 0 5 0 0 0 100 7 0 0 0 10 2 34 1 0 5 0 1692 0 0 0 100 March 2, 2026 at 07:06:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2177 162 234 1 0 0 0 271 0 1 0 99 1 0 0 0 14 4 10 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 4 0 0 2 219 104 14 1 1 4 0 295 0 0 0 100 5 0 0 14 6 1 4 0 0 0 0 266 0 0 0 100 6 0 0 4 206 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 12 3 36 1 0 4 0 1696 0 0 0 100 March 2, 2026 at 07:06:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2180 161 236 0 2 0 0 274 0 1 0 99 1 0 0 0 14 4 10 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 13 2 10 0 0 1 0 300 0 0 0 100 4 0 0 2 220 104 12 0 2 7 0 371 0 0 0 100 5 0 0 14 16 7 8 0 0 3 0 266 0 0 0 100 6 0 0 4 224 107 24 0 0 0 0 20 0 0 0 100 7 1 0 0 16 2 44 1 0 8 0 1701 0 0 0 100 March 2, 2026 at 07:06:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2177 161 228 2 2 0 0 269 0 0 0 99 1 0 0 0 14 4 10 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 4 0 0 2 213 103 4 0 0 3 0 303 0 0 0 100 5 0 0 14 10 1 12 0 1 0 0 266 0 0 0 100 6 0 0 4 215 102 8 0 1 0 0 1 0 0 0 100 7 0 0 0 12 3 38 1 0 1 0 1698 0 0 0 100 March 2, 2026 at 07:06:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2185 165 242 0 0 1 0 283 0 1 0 99 1 0 0 0 20 6 16 0 0 1 0 5 0 0 0 100 2 0 0 0 11 1 8 0 0 1 0 9 0 0 0 100 3 0 0 0 14 3 10 0 1 1 0 303 0 0 0 100 4 0 0 2 213 104 2 0 0 1 0 237 0 0 0 100 5 0 0 14 11 2 6 0 0 2 0 269 0 0 0 100 6 0 0 4 214 102 14 0 1 1 0 10 0 0 0 100 7 0 0 0 15 3 40 1 0 2 0 1703 0 0 0 100 March 2, 2026 at 07:06:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2177 163 238 0 1 0 0 273 0 1 0 99 1 0 0 0 14 4 10 0 0 0 0 0 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 12 2 6 1 0 0 0 300 0 0 0 100 4 0 0 2 214 104 4 1 0 2 0 293 0 0 0 100 5 0 0 14 6 1 4 0 0 0 0 266 0 0 0 100 6 0 0 4 206 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 12 3 36 1 0 3 0 1694 0 0 0 100 March 2, 2026 at 07:06:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2174 161 234 1 1 0 0 269 0 1 0 99 1 0 0 0 14 4 10 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 4 0 0 2 211 103 2 0 0 4 0 298 0 0 0 100 5 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 6 0 0 4 218 104 14 0 0 1 0 4 0 0 0 100 7 0 0 0 10 2 34 1 0 4 0 1694 0 0 0 100 March 2, 2026 at 07:06:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2186 163 238 0 1 0 0 276 0 1 0 99 1 0 0 0 19 4 14 0 2 0 0 0 0 0 0 100 2 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 4 0 0 2 214 104 6 0 0 4 0 305 0 0 0 100 5 0 0 14 17 8 8 0 0 0 0 267 0 0 0 100 6 0 0 4 221 105 20 0 1 0 0 18 0 0 0 100 7 0 0 0 23 3 56 1 1 9 0 1703 0 0 0 100 March 2, 2026 at 07:06:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 63 0 0 5746 123 7757 80 316 67 0 21752 19 13 0 68 1 109 0 7 3841 16 7963 78 358 63 0 19870 16 11 0 74 2 50 0 0 3581 12 7890 43 227 61 0 21854 13 9 0 78 3 23 0 0 3456 8 7054 58 279 51 0 15378 12 8 0 79 4 214 0 3 2162 110 4064 24 212 50 0 11647 11 7 0 82 5 76 0 0 1192 6 2380 20 106 56 0 9806 11 4 0 84 6 3 0 17 2598 110 5160 40 193 46 0 13606 11 7 0 82 7 40 0 0 2301 13 4738 20 111 55 0 11527 9 6 0 86 March 2, 2026 at 07:06:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6594 108 9577 77 350 151 0 28583 27 17 0 57 1 5 0 7 4996 13 10522 87 397 106 0 27421 22 15 0 64 2 10 0 0 4527 8 9187 50 273 79 0 18652 17 11 0 73 3 8 0 0 4353 22 9032 60 356 74 0 23273 19 12 0 69 4 6 0 2 2649 124 4884 38 242 94 0 12003 11 7 0 82 5 5 0 0 1814 9 3653 21 124 54 0 9613 8 5 0 87 6 5 0 4 4020 124 7889 38 264 95 0 15158 12 9 0 79 7 5 0 14 1801 8 3917 18 117 81 0 11541 9 6 0 85 March 2, 2026 at 07:06:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 14 6769 108 9901 53 360 114 0 27966 25 16 0 59 1 8 0 0 4937 11 10294 56 412 80 0 24632 19 13 0 68 2 6 0 7 4039 14 8413 38 275 97 0 20791 18 12 0 70 3 8 0 0 4343 10 9282 41 314 90 0 20952 17 11 0 72 4 7 0 2 2914 122 5485 31 273 77 0 13462 11 7 0 81 5 8 0 0 2032 9 4148 23 150 79 0 12011 11 6 0 83 6 0 0 4 3363 110 6605 36 237 86 0 16035 14 9 0 77 7 3 0 0 2093 21 4376 14 132 71 0 10923 9 6 0 85 March 2, 2026 at 07:06:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 14 2726 110 1357 9 53 9 0 2857 3 2 0 95 1 2 0 0 606 5 1232 7 63 14 0 4197 2 2 0 96 2 3 0 7 420 7 820 3 30 11 0 2563 2 1 0 97 3 0 0 0 476 46 932 6 41 4 0 2312 2 1 0 97 4 0 0 2 490 107 547 5 32 6 0 1417 1 1 0 98 5 0 0 0 153 2 317 0 11 2 0 1264 1 0 0 99 6 0 0 4 524 102 696 1 25 14 0 1877 2 1 0 97 7 1 0 0 220 4 442 3 15 11 0 1465 1 1 0 98 March 2, 2026 at 07:06:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2191 111 250 2 55 293 0 281 0 2 0 98 1 0 0 0 101 3 194 1 49 288 0 843 0 2 0 98 2 0 0 7 73 3 166 2 43 313 0 260 0 2 0 98 3 0 0 0 318 222 605 0 58 332 0 0 0 1 0 99 4 0 0 2 278 106 165 1 54 336 0 5 0 2 0 98 5 0 0 0 77 8 199 3 52 350 0 1159 0 2 0 98 6 0 0 4 321 122 229 2 58 372 0 12 0 2 0 98 7 0 0 0 91 3 174 1 52 272 0 270 0 2 0 98 March 2, 2026 at 07:06:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2251 113 419 0 104 435 0 281 0 2 0 97 1 0 0 0 172 2 355 1 106 504 0 294 0 2 0 98 2 0 0 7 136 3 341 0 101 530 0 261 0 2 0 98 3 0 0 0 488 349 462 1 100 561 0 3 0 2 0 98 4 0 0 2 617 103 868 1 104 484 0 30 0 2 0 98 5 0 0 0 140 4 363 3 102 530 0 1710 0 2 0 98 6 0 0 4 370 121 360 0 117 509 0 0 0 2 0 98 7 0 0 0 188 34 365 0 92 497 0 214 0 2 0 98 March 2, 2026 at 07:07:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2238 119 410 1 72 388 1 278 0 2 0 98 1 0 0 0 142 5 288 0 73 455 0 305 0 1 0 98 2 0 0 7 186 35 331 1 66 424 0 572 0 1 0 99 3 0 0 0 394 262 303 0 71 485 0 4 0 2 0 98 4 0 0 2 604 105 819 2 77 438 0 312 0 2 0 98 5 0 0 0 160 8 363 2 70 483 0 1419 0 2 0 98 6 0 0 4 349 101 318 0 72 497 0 0 0 2 0 98 7 0 0 0 138 10 281 0 64 458 0 7 0 1 0 99 March 2, 2026 at 07:07:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 103 114 0 2 0 0 268 0 1 0 99 1 0 0 0 12 3 8 0 0 5 0 294 0 0 0 100 2 0 0 7 114 54 110 0 0 0 0 561 0 0 0 100 3 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 4 0 0 2 227 111 18 0 0 1 0 315 0 0 0 100 5 0 0 0 14 3 40 1 0 1 0 1428 0 0 0 100 6 0 0 4 216 102 10 0 2 0 0 4 0 0 0 100 7 0 0 0 12 3 8 0 0 0 0 2 0 0 0 100 March 2, 2026 at 07:07:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 94 0 2 0 0 266 0 1 0 99 1 0 0 0 13 3 10 0 0 1 0 303 0 0 0 100 2 0 0 7 113 53 110 1 0 0 0 562 0 0 0 100 3 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 4 0 0 2 236 113 32 0 1 1 0 312 0 0 0 100 5 0 0 0 14 3 40 1 0 0 0 1413 0 0 0 100 6 0 0 4 234 103 30 0 2 0 0 10 0 0 0 100 7 0 0 0 14 4 10 0 0 0 0 4 0 0 0 100 March 2, 2026 at 07:07:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 101 123 0 2 1 0 271 0 1 0 99 1 0 0 0 12 3 8 0 0 2 0 294 0 0 0 100 2 0 0 7 110 53 106 0 0 0 0 561 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 2 226 110 18 0 1 4 0 328 0 0 0 100 5 0 0 0 25 8 48 1 0 0 0 1412 0 0 0 100 6 0 0 4 226 104 26 0 2 1 0 18 0 0 0 100 7 0 0 0 20 4 18 1 0 1 0 7 0 0 0 100 March 2, 2026 at 07:07:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2173 104 127 92 12 5 0 497 80 1 0 19 1 0 0 0 177 23 209 132 17 12 0 698 80 1 0 19 2 0 0 0 126 14 85 75 8 5 0 760 80 1 0 19 3 257 0 0 120 4 118 89 16 7 0 407 80 1 0 19 4 2 0 3 367 109 127 85 13 8 0 550 80 0 0 19 5 257 0 7 245 26 485 190 29 16 0 2625 79 2 0 19 6 0 0 115 393 108 264 162 23 9 0 511 80 1 0 20 7 0 0 0 164 7 233 129 21 4 0 492 80 1 0 20 March 2, 2026 at 07:07:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2180 118 133 119 6 3 0 517 99 1 0 0 1 0 0 0 142 3 149 117 12 9 0 597 99 1 0 0 2 0 0 0 141 6 135 113 13 5 0 505 100 0 0 0 3 0 0 0 123 4 107 102 10 13 0 231 100 0 0 0 4 0 0 3 315 104 79 92 9 7 0 492 100 0 0 0 5 0 0 7 167 4 219 144 8 5 0 1955 99 1 0 0 6 0 0 73 363 127 130 115 10 1 0 228 99 1 0 0 7 0 0 0 188 25 201 152 10 12 0 287 100 0 0 0 March 2, 2026 at 07:07:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2188 131 166 128 11 1 0 498 99 1 0 0 1 0 0 0 141 5 163 128 11 12 0 617 99 1 0 0 2 0 0 0 178 26 160 129 9 3 0 554 100 0 0 0 3 0 0 0 121 4 77 88 7 0 0 221 100 0 0 0 4 0 0 2 344 106 140 120 9 8 0 521 100 0 0 0 5 0 0 0 168 9 177 122 10 7 0 1675 99 1 0 0 6 0 0 88 307 102 60 81 9 2 0 166 100 0 0 0 7 0 0 7 145 3 130 110 10 5 0 514 100 0 0 0 March 2, 2026 at 07:07:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2187 106 167 134 8 7 0 484 99 1 0 0 1 0 0 7 106 3 72 85 8 7 0 699 99 1 0 0 2 0 0 0 208 51 179 136 6 11 0 453 100 0 0 0 3 0 0 0 156 3 167 132 5 12 0 310 100 0 0 0 4 0 0 3 361 111 159 129 6 2 0 591 100 0 0 0 5 0 0 0 157 5 216 148 6 13 0 1731 99 1 0 0 6 0 0 59 329 104 128 118 8 3 0 275 99 1 0 0 7 0 0 0 141 4 94 97 11 5 0 214 100 0 0 0 March 2, 2026 at 07:07:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2212 108 172 136 8 2 0 506 99 1 0 0 1 0 0 0 129 3 88 94 11 5 0 583 100 0 0 0 2 0 0 7 218 34 192 142 11 4 0 830 99 1 0 0 3 0 0 0 212 9 217 158 7 0 0 460 99 1 0 0 4 0 0 3 361 119 123 113 8 8 0 535 100 0 0 0 5 0 0 0 147 7 163 111 11 24 0 1637 99 1 0 0 6 0 0 122 319 106 124 110 9 9 0 338 99 1 0 0 7 0 0 0 170 6 156 129 9 2 0 180 100 0 0 0 March 2, 2026 at 07:07:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2213 120 221 159 14 19 0 658 99 1 0 0 1 0 0 0 172 8 175 142 11 8 0 522 100 0 0 0 2 0 0 7 162 11 178 142 7 4 0 856 100 0 0 0 3 0 0 0 163 3 149 122 14 6 0 292 100 0 0 0 4 0 0 3 411 135 182 132 17 13 0 567 99 1 0 0 5 0 0 0 115 2 113 94 9 6 0 1670 99 1 0 0 6 0 0 87 306 103 73 87 10 1 0 152 100 0 0 0 7 0 0 0 157 10 123 110 10 2 0 186 100 0 0 0 March 2, 2026 at 07:07:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2171 105 166 130 4 3 0 503 99 1 0 0 1 0 0 0 192 35 188 135 8 14 0 536 100 0 0 0 2 0 0 0 125 9 88 97 9 2 0 561 100 0 0 0 3 0 0 7 138 9 114 104 12 2 0 487 100 0 0 0 4 0 0 7 350 106 141 117 11 4 0 549 100 0 0 0 5 0 0 0 164 12 201 129 14 11 0 1689 99 1 0 0 6 0 0 91 325 115 91 95 9 3 0 234 100 0 0 0 7 0 0 0 125 4 101 100 9 3 0 197 100 0 0 0 March 2, 2026 at 07:07:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2198 137 184 138 12 6 0 439 99 1 0 0 1 0 0 0 124 9 95 101 7 11 0 540 100 0 0 0 2 0 0 0 111 2 76 86 7 2 0 465 100 0 0 0 3 2 0 7 128 3 90 98 3 1 0 425 100 0 0 0 4 0 0 3 339 107 146 108 11 8 0 529 100 0 0 0 5 3 0 0 145 7 178 126 13 11 0 1733 99 1 0 0 6 0 0 73 353 115 170 127 19 3 0 333 99 1 0 0 7 0 0 0 202 10 208 153 12 4 0 350 99 1 0 0 March 2, 2026 at 07:07:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2193 106 148 126 9 1 0 544 99 1 0 0 1 0 0 0 148 11 115 103 12 6 0 500 100 0 0 0 2 0 0 0 166 21 142 114 12 4 0 535 100 0 0 0 3 0 0 0 146 2 128 108 9 2 0 257 100 0 0 0 4 0 0 3 371 111 161 130 9 5 0 501 100 0 0 0 5 0 0 7 136 10 146 106 12 4 0 2014 99 1 0 0 6 0 0 94 366 120 163 129 10 4 0 269 99 1 0 0 7 0 0 0 129 3 82 92 9 6 0 184 100 0 0 0 March 2, 2026 at 07:07:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2186 106 137 115 10 8 0 532 99 1 0 0 1 0 0 0 141 2 110 106 11 3 0 525 100 0 0 0 2 0 0 2 194 20 212 154 7 8 0 639 99 1 0 0 3 0 0 0 192 10 205 155 10 2 0 448 99 1 0 0 4 0 0 3 345 105 93 96 6 6 0 200 100 0 0 0 5 0 0 7 153 11 189 124 12 3 0 2250 99 1 0 0 6 0 0 129 402 133 212 150 17 4 0 227 99 1 0 0 7 0 0 0 148 5 121 102 15 4 0 211 100 0 0 0 March 2, 2026 at 07:07:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2195 105 158 128 8 4 0 590 99 1 0 0 1 0 0 7 177 8 176 132 15 18 0 936 99 1 0 0 2 0 0 0 223 21 224 153 18 4 0 469 100 0 0 0 3 0 0 0 205 37 197 145 10 5 0 303 100 0 0 0 4 1 0 3 360 106 92 98 9 3 0 229 100 0 0 0 5 0 0 0 116 7 117 90 9 12 0 1929 99 1 0 0 6 0 0 87 314 105 98 101 7 2 0 200 100 0 0 0 7 0 0 0 111 4 77 88 7 5 0 147 100 0 0 0 March 2, 2026 at 07:07:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2200 105 169 129 14 9 0 590 99 1 0 0 1 0 0 7 172 6 157 128 9 4 0 798 100 0 0 0 2 0 0 0 226 16 198 148 7 12 0 625 99 1 0 0 3 0 0 0 166 21 135 120 4 12 0 163 100 0 0 0 4 0 0 3 355 112 162 123 11 4 0 307 100 0 0 0 5 0 0 0 139 6 158 111 17 6 0 2047 99 1 0 0 6 0 0 101 317 106 129 105 16 7 0 326 99 1 0 0 7 0 0 0 170 23 149 118 18 12 0 241 99 1 0 0 March 2, 2026 at 07:07:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2177 103 111 105 7 1 0 516 99 1 0 0 1 0 0 0 136 5 128 112 14 6 0 614 100 0 0 0 2 0 0 0 172 3 189 144 13 12 0 672 99 1 0 0 3 0 0 0 140 0 131 116 7 6 0 250 100 0 0 0 4 0 0 2 340 105 99 105 6 7 0 186 100 0 0 0 5 0 0 7 164 13 193 119 13 5 0 2304 99 1 0 0 6 0 0 74 346 110 156 126 7 5 0 235 100 0 0 0 7 0 0 0 248 43 235 162 11 3 0 234 99 1 0 0 March 2, 2026 at 07:07:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2164 104 97 96 5 4 0 474 99 1 0 0 1 0 0 0 112 1 72 89 4 4 0 379 100 0 0 0 2 0 0 0 116 3 110 102 4 2 0 493 100 0 0 0 3 0 0 0 212 4 188 136 12 7 0 233 100 0 0 0 4 0 0 2 307 104 62 82 10 4 0 250 100 0 0 0 5 0 0 0 127 5 145 109 9 4 0 1927 99 1 0 0 6 0 0 81 325 107 145 120 10 4 0 555 100 0 0 0 7 0 0 7 233 56 213 155 9 3 0 413 99 1 0 0 March 2, 2026 at 07:07:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2205 121 170 136 13 1 0 502 99 1 0 0 1 0 0 0 138 6 104 100 15 8 0 539 100 0 0 0 2 0 0 0 149 4 134 115 9 0 0 500 100 0 0 0 3 0 0 0 177 6 143 116 8 1 0 184 100 0 0 0 4 0 0 2 365 105 134 115 5 3 0 287 100 0 0 0 5 0 0 0 122 9 101 89 4 12 0 1897 99 1 0 0 6 0 0 123 349 108 178 142 7 1 0 623 99 1 0 0 7 0 0 0 215 34 217 150 8 5 0 280 99 1 0 0 March 2, 2026 at 07:07:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2173 108 121 105 7 4 0 555 99 1 0 0 1 0 0 0 213 33 224 148 13 4 0 617 99 1 0 0 2 0 0 0 137 3 129 109 16 5 0 644 99 1 0 0 3 0 0 0 159 0 124 111 8 3 0 242 100 0 0 0 4 0 0 3 323 105 84 92 8 2 0 172 100 0 0 0 5 0 0 7 132 5 130 98 11 5 0 2153 99 1 0 0 6 0 0 115 372 126 178 135 8 4 0 245 100 0 0 0 7 0 0 0 198 7 165 135 7 1 0 300 100 0 0 0 March 2, 2026 at 07:07:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2154 102 77 89 6 6 0 453 99 1 0 0 1 0 0 7 234 30 269 185 15 26 0 1007 99 1 0 0 2 0 0 0 188 13 190 142 12 5 0 491 100 0 0 0 3 0 0 0 153 5 146 119 15 9 0 352 99 1 0 0 4 0 0 7 339 105 131 102 14 4 0 280 100 0 0 0 5 3 0 0 118 5 93 86 11 19 0 1973 99 1 0 0 6 0 0 91 310 109 63 81 13 3 0 82 100 0 0 0 7 0 0 0 224 30 181 139 9 10 0 214 100 0 0 0 March 2, 2026 at 07:07:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2155 105 108 100 13 1 0 556 99 1 0 0 1 0 0 7 133 3 123 105 9 3 0 755 99 1 0 0 2 1 0 0 160 5 132 120 6 0 0 527 100 0 0 0 3 0 0 0 162 7 142 109 8 8 0 244 100 0 0 0 4 0 0 3 382 119 168 137 8 7 0 184 100 0 0 0 5 0 0 0 165 24 162 117 9 0 0 1932 99 1 0 0 6 0 0 87 332 121 106 96 11 1 0 214 100 0 0 0 7 0 0 0 144 4 123 113 8 3 0 172 100 0 0 0 March 2, 2026 at 07:07:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2232 123 270 170 19 10 0 275 99 1 0 0 1 297 0 0 189 13 219 148 19 7 1 607 99 1 0 0 2 1 0 0 200 6 308 185 25 14 0 672 99 1 0 0 3 0 0 0 169 2 200 140 19 4 0 338 100 0 0 0 4 24 0 2 316 105 105 91 23 2 0 366 100 0 0 0 5 1 0 0 149 4 194 119 20 7 1 1968 99 1 0 0 6 4 0 88 339 112 155 112 19 5 0 260 100 0 0 0 7 3 0 21 224 19 239 163 25 8 0 863 99 1 0 0 March 2, 2026 at 07:07:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2208 106 226 158 14 7 0 418 99 1 0 0 1 7 0 0 180 18 202 141 15 18 0 732 99 1 0 0 2 0 0 0 171 12 187 131 16 3 0 522 100 0 0 0 3 0 0 0 152 15 210 131 18 7 0 390 100 0 0 0 4 258 0 2 378 119 173 129 17 7 0 235 99 1 0 0 5 0 0 0 153 15 201 122 15 11 0 2010 99 1 0 0 6 0 0 102 347 105 203 135 16 4 0 337 100 0 0 0 7 1 0 21 178 9 188 135 12 6 0 865 99 1 0 0 March 2, 2026 at 07:07:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 103 116 97 10 10 0 225 99 1 0 0 1 0 0 0 148 8 164 131 8 10 0 603 99 1 0 0 2 0 0 0 170 4 214 149 17 17 0 561 100 0 0 0 3 0 0 7 202 27 197 144 16 4 0 516 100 0 0 0 4 0 0 2 408 132 173 134 7 7 0 190 100 0 0 0 5 0 0 0 140 5 153 115 6 10 0 1935 99 1 0 0 6 0 0 74 309 105 80 94 6 6 0 249 100 0 0 0 7 0 0 14 171 15 158 127 9 5 0 544 99 1 0 0 March 2, 2026 at 07:07:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 117 138 114 14 8 0 227 99 1 0 0 1 0 0 0 105 1 68 86 5 9 0 507 99 1 0 0 2 0 0 0 187 7 216 151 7 4 0 528 100 0 0 0 3 0 0 0 221 36 236 156 6 5 0 397 99 1 0 0 4 0 0 3 377 108 182 144 11 6 0 275 100 0 0 0 5 0 0 0 162 15 174 117 9 14 0 2019 99 1 0 0 6 0 0 87 332 103 151 117 12 9 0 260 100 0 0 0 7 0 0 28 171 11 188 135 9 5 0 832 99 1 0 0 March 2, 2026 at 07:07:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2222 128 265 169 11 5 0 213 99 1 0 0 1 12 0 0 165 12 139 120 11 13 0 604 99 1 0 0 2 0 0 0 174 23 169 136 8 5 0 434 100 0 0 0 3 0 0 0 115 3 72 86 5 8 0 200 100 0 0 0 4 0 0 2 337 107 139 116 8 9 0 238 100 0 0 0 5 0 0 0 131 3 177 123 10 9 0 2035 99 1 0 0 6 0 0 88 330 105 139 117 11 7 0 221 100 0 0 0 7 1 0 21 115 11 114 108 9 4 0 889 99 1 0 0 March 2, 2026 at 07:07:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 103 182 131 19 4 0 181 99 1 0 0 1 2 0 0 164 5 173 139 9 9 0 630 99 1 0 0 2 0 0 0 223 34 244 166 10 9 0 568 99 1 0 0 3 0 0 0 113 1 64 85 8 8 0 154 100 0 0 0 4 0 0 3 335 105 94 106 9 4 0 209 100 0 0 0 5 0 0 0 157 11 190 120 14 8 0 2012 99 1 0 0 6 0 0 101 381 124 203 146 23 17 0 389 99 1 0 0 7 0 0 21 138 8 151 113 26 12 0 822 99 1 0 0 March 2, 2026 at 07:07:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 106 160 132 14 13 0 266 99 1 0 0 1 0 0 0 163 2 152 127 14 11 0 521 99 1 0 0 2 0 0 0 181 3 214 152 12 15 0 528 100 0 0 0 3 0 0 0 139 2 124 112 11 12 0 227 100 0 0 0 4 0 0 2 339 105 121 106 11 18 0 268 99 1 0 0 5 0 0 7 190 31 177 124 11 3 0 1821 99 1 0 0 6 0 0 116 404 136 212 148 14 25 0 655 99 1 0 0 7 0 0 14 171 12 223 153 15 9 0 651 99 1 0 0 March 2, 2026 at 07:07:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 106 96 98 5 6 0 232 99 1 0 0 1 0 0 0 156 3 179 137 13 12 0 561 100 0 0 0 2 0 0 0 185 1 258 177 5 16 0 610 99 1 0 0 3 0 0 0 145 2 151 129 8 4 0 275 100 0 0 0 4 0 0 3 358 106 190 127 9 8 0 316 100 0 0 0 5 0 0 7 164 9 167 118 10 6 0 1897 99 1 0 0 6 0 0 59 406 149 168 129 9 11 0 558 99 1 0 0 7 0 0 21 148 8 132 110 11 7 0 495 100 0 0 0 March 2, 2026 at 07:07:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2153 105 67 88 6 4 0 453 99 1 0 0 1 0 0 0 168 5 138 118 10 9 0 505 100 0 0 0 2 0 0 0 188 11 209 153 7 9 0 506 100 0 0 0 3 0 0 0 150 6 145 123 11 10 0 246 100 0 0 0 4 0 0 7 421 129 261 181 8 16 0 429 99 1 0 0 5 0 0 7 164 10 147 110 14 2 0 1978 99 1 0 0 6 0 0 77 337 109 127 118 11 9 0 525 100 0 0 0 7 5 0 0 228 35 207 143 10 7 0 246 99 1 0 0 March 2, 2026 at 07:07:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2164 109 119 91 16 6 0 595 99 1 0 0 1 0 0 0 142 2 117 105 13 16 0 557 100 0 0 0 2 0 0 0 156 7 173 127 15 11 0 535 100 0 0 0 3 0 0 0 148 4 180 135 13 7 0 310 100 0 0 0 4 0 0 2 397 127 219 153 15 6 0 294 100 0 0 0 5 0 0 7 185 8 199 135 10 13 0 1898 99 1 0 0 6 0 0 102 360 132 132 110 7 9 0 440 100 0 0 0 7 0 0 0 171 5 139 125 7 5 0 185 100 0 0 0 March 2, 2026 at 07:07:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2162 103 80 94 7 1 0 476 99 1 0 0 1 0 0 0 113 1 83 93 6 10 0 487 100 0 0 0 2 0 0 0 174 5 236 150 12 7 0 540 100 0 0 0 3 0 0 0 180 11 191 145 14 3 0 423 100 0 0 0 4 0 0 3 403 133 181 121 24 6 0 321 99 1 0 0 5 0 0 7 168 4 148 106 18 8 0 1841 99 1 0 0 6 0 0 101 400 126 245 170 16 16 0 664 99 1 0 0 7 0 0 0 144 2 148 122 11 7 0 241 100 0 0 0 March 2, 2026 at 07:07:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2199 126 153 118 12 5 0 553 99 1 0 0 1 0 0 0 121 2 90 94 9 3 0 464 100 0 0 0 2 0 0 0 155 3 158 130 5 13 0 506 100 0 0 0 3 0 0 0 148 7 135 124 7 2 0 271 100 0 0 0 4 0 0 3 372 111 156 120 12 14 0 307 100 0 0 0 5 0 0 7 202 15 212 148 12 8 0 604 99 1 0 0 6 0 0 87 334 112 144 105 14 3 0 1944 99 1 0 0 7 0 0 0 238 34 243 176 13 3 0 284 99 1 0 0 March 2, 2026 at 07:07:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2247 117 272 182 8 12 0 662 99 1 0 0 1 0 0 0 223 45 206 147 18 3 0 271 99 1 0 0 2 0 0 0 178 6 201 146 9 13 0 172 100 0 0 0 3 0 0 0 183 8 217 149 10 14 0 1018 99 1 0 0 4 0 0 2 327 103 87 95 6 4 0 240 99 1 0 0 5 0 0 0 175 9 135 117 8 6 0 194 100 0 0 0 6 0 0 109 352 108 216 141 8 21 0 2299 99 1 0 0 7 0 0 7 156 8 115 108 7 8 0 219 100 0 0 0 March 2, 2026 at 07:07:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2163 101 93 101 4 7 0 469 99 1 0 0 1 0 0 0 199 28 181 138 6 12 0 207 100 0 0 0 2 0 0 0 206 8 274 165 15 28 0 347 99 1 0 0 3 0 0 0 166 11 169 130 16 20 0 963 99 1 0 0 4 0 0 2 342 106 138 112 13 7 0 221 100 0 0 0 5 0 0 0 156 4 143 120 13 9 0 276 100 0 0 0 6 0 0 123 329 125 123 98 7 11 0 2125 99 1 0 0 7 0 0 0 136 3 80 92 5 2 0 128 100 0 0 0 March 2, 2026 at 07:07:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2181 115 131 116 9 4 0 524 99 1 0 0 1 0 0 0 200 17 235 162 12 14 0 271 100 0 0 0 2 0 0 0 218 16 313 197 13 20 0 248 99 1 0 0 3 0 0 0 167 12 172 135 11 14 0 984 99 1 0 0 4 0 0 3 323 109 96 93 18 10 0 253 100 0 0 0 5 0 0 0 151 6 107 107 16 1 0 253 100 0 0 0 6 0 0 73 347 112 157 114 13 6 0 1932 99 1 0 0 7 0 0 7 164 11 148 123 11 5 0 540 99 1 0 0 March 2, 2026 at 07:07:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2165 102 160 121 8 11 0 739 99 1 0 0 1 0 0 0 147 2 154 126 10 7 0 319 99 1 0 0 2 0 0 0 164 3 290 176 12 21 0 358 99 1 0 0 3 0 0 0 160 5 164 123 14 8 0 853 100 0 0 0 4 0 0 2 402 130 221 163 6 9 0 249 100 0 0 0 5 0 0 0 127 10 67 89 9 6 0 221 100 0 0 0 6 0 0 102 337 118 149 113 6 7 0 1912 99 1 0 0 7 0 0 0 144 12 122 103 5 4 0 184 100 0 0 0 March 2, 2026 at 07:07:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2188 111 124 115 8 8 0 507 99 1 0 0 1 0 0 0 162 8 130 119 8 7 0 109 100 0 0 0 2 0 0 0 160 1 146 124 9 5 0 185 100 0 0 0 3 0 0 0 167 11 214 154 9 4 0 961 99 1 0 0 4 0 0 2 311 105 103 95 15 7 0 286 100 0 0 0 5 3 0 7 146 10 119 108 12 4 0 473 100 0 0 0 6 0 0 60 362 122 209 131 14 10 0 1990 99 1 0 0 7 0 0 0 225 26 225 161 9 4 0 337 99 1 0 0 March 2, 2026 at 07:07:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2174 102 118 111 12 3 0 508 99 1 0 0 1 0 0 0 144 3 156 127 11 17 0 225 100 0 0 0 2 0 0 0 168 2 229 157 10 11 0 286 99 1 0 0 3 0 0 0 221 19 219 158 9 10 0 625 99 1 0 0 4 0 0 2 346 112 125 117 7 3 0 611 100 0 0 0 5 0 0 7 200 10 203 146 14 11 0 538 99 1 0 0 6 0 0 74 362 136 178 115 14 8 0 1904 99 1 0 0 7 0 0 0 170 8 132 105 11 7 0 233 100 0 0 0 March 2, 2026 at 07:07:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2138 102 71 85 6 8 0 332 99 1 0 0 1 0 0 7 139 10 100 100 11 2 0 359 100 0 0 0 2 0 0 0 162 19 178 126 11 3 0 145 100 0 0 0 3 0 0 0 155 20 140 117 9 2 0 502 100 0 0 0 4 0 0 10 311 105 82 81 17 2 0 424 100 0 0 0 5 0 0 0 165 34 104 97 13 1 0 140 100 0 0 0 6 0 0 59 286 104 62 68 9 10 0 1808 99 1 0 0 7 0 0 0 112 4 44 72 7 1 0 50 100 0 0 0 March 2, 2026 at 07:07:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2122 104 123 16 7 0 0 365 31 1 0 68 1 0 0 7 63 6 54 17 8 0 0 360 29 0 0 71 2 6 0 0 77 20 81 32 9 2 0 131 28 0 0 72 3 0 0 0 109 32 93 27 9 2 0 443 41 0 0 59 4 0 0 2 263 106 63 39 8 6 0 396 39 0 0 61 5 0 0 0 62 8 52 35 7 2 0 47 33 0 0 67 6 0 0 18 259 111 77 20 5 3 0 1874 39 1 0 61 7 0 0 0 49 6 31 21 2 0 0 43 31 0 0 68 March 2, 2026 at 07:07:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2110 103 114 0 0 0 0 267 0 1 0 99 1 0 0 7 18 7 14 0 0 0 0 266 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 122 58 116 0 0 0 0 306 0 0 0 100 4 0 0 2 218 106 10 0 1 3 0 298 0 0 0 100 5 0 0 0 12 4 4 0 0 0 0 0 0 0 0 100 6 0 0 4 216 104 40 1 1 2 0 1709 0 0 0 99 7 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:07:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 103 125 2 1 0 0 275 0 1 0 99 1 0 0 7 9 2 4 1 0 0 0 260 0 0 0 100 2 0 0 0 12 0 6 0 1 0 0 5 0 0 0 100 3 0 0 0 112 51 112 0 1 0 0 300 0 0 0 100 4 0 0 2 235 115 26 0 0 1 0 307 0 0 0 100 5 0 0 0 20 9 12 0 0 0 0 1 0 0 0 100 6 0 0 4 216 104 38 1 0 4 0 1726 0 0 0 99 7 0 0 0 22 5 23 0 2 0 0 14 0 0 0 100 March 2, 2026 at 07:07:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 102 116 0 1 0 0 287 0 1 0 99 1 0 0 7 14 4 10 0 0 0 0 269 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 137 63 136 0 2 0 0 321 0 0 0 99 4 0 0 2 230 109 24 0 1 0 0 319 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 4 218 105 40 2 0 0 0 1696 0 0 0 99 7 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:07:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3101 105 1803 79 231 308 1 4257 15 7 0 78 1 26 0 14 944 7 1602 96 232 153 0 4602 22 4 0 74 2 0 0 7 761 10 1276 81 149 266 0 4333 26 4 0 70 3 2 0 0 1149 82 1829 63 213 268 0 5858 8 6 0 86 4 0 0 2 1135 106 1515 32 156 301 0 3755 6 5 0 88 5 0 0 0 709 8 1073 33 104 269 0 3349 10 5 0 84 6 0 0 816 691 109 872 31 118 344 0 2916 10 5 0 85 7 3 0 0 724 5 1193 20 94 369 1 3234 8 5 0 87 March 2, 2026 at 07:07:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 16 2623 104 1073 66 279 1308 5 1402 16 5 0 79 1 493 0 14 599 32 1112 72 294 1223 1 2198 18 4 0 77 2 101 0 14 501 8 956 58 259 1147 11 2448 15 4 0 81 3 2535 0 307 1077 605 1128 72 266 1359 10 9285 17 9 0 74 4 21 0 2 811 110 1065 56 265 1432 2 1404 8 5 0 87 5 148 0 0 496 5 867 53 234 1431 5 1829 16 5 0 79 6 128 0 228 946 107 1554 90 272 1273 14 2156 18 5 0 78 7 152 0 8 542 10 933 62 256 1324 4 2479 15 6 0 79 March 2, 2026 at 07:07:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2299 104 490 1 141 932 0 6 0 3 0 97 1 0 0 14 383 48 679 1 143 961 0 266 0 3 0 97 2 0 0 0 202 1 471 1 134 869 0 0 0 2 0 98 3 0 0 7 605 395 504 4 142 980 0 2012 0 3 0 96 4 0 0 9 411 110 467 2 146 881 0 266 0 3 0 97 5 0 0 0 194 3 451 0 131 794 0 0 0 2 0 98 6 0 0 4 786 102 1262 1 143 783 0 297 0 3 0 97 7 0 0 0 198 3 474 0 139 950 0 2 0 2 0 98 March 2, 2026 at 07:07:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2332 116 534 4 134 1322 0 12 0 6 0 94 1 0 0 21 313 1 614 4 150 1435 0 531 0 4 0 96 2 0 0 0 212 0 451 2 128 1186 0 5 0 4 0 96 3 0 0 0 632 416 497 4 123 1367 0 2015 0 6 0 94 4 0 0 2 508 140 553 4 132 1378 0 13 0 5 0 95 5 0 0 0 418 8 833 2 138 1075 1 0 0 5 0 95 6 0 0 4 683 113 981 3 149 1363 0 293 0 4 0 96 7 0 0 0 220 1 466 3 125 1385 0 0 0 5 0 95 March 2, 2026 at 07:07:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2355 130 674 1 177 1427 0 0 0 4 0 96 1 0 0 21 230 3 565 1 186 1479 0 525 0 3 0 97 2 0 0 0 266 0 585 3 161 1495 0 0 0 4 0 96 3 0 0 0 642 413 854 3 171 1490 0 1806 0 5 0 95 4 0 0 2 468 114 606 1 184 1568 0 11 0 4 0 95 5 0 0 0 519 25 1117 1 173 1351 0 197 0 4 0 96 6 0 0 4 464 102 641 2 179 1593 0 327 0 4 0 96 7 0 0 7 238 3 574 1 156 1363 0 2 0 4 0 96 March 2, 2026 at 07:07:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2301 118 501 4 96 764 0 617 0 3 0 97 1 0 0 21 213 6 437 6 93 871 0 1552 0 2 0 97 2 0 0 0 202 1 437 2 100 753 0 298 0 2 0 98 3 0 0 0 427 264 796 2 96 773 0 744 0 2 0 97 4 0 0 7 472 149 471 3 105 783 0 842 0 2 0 97 5 0 0 0 182 4 411 2 86 675 0 1478 0 2 0 98 6 0 0 7 398 104 428 1 98 787 0 1205 0 2 0 97 7 0 0 0 169 2 362 0 80 712 0 853 0 2 0 98 March 2, 2026 at 07:07:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2135 116 142 1 1 9 0 320 0 1 0 99 1 0 0 21 12 3 10 1 1 0 0 528 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 11 2 4 0 0 0 0 300 0 0 0 100 4 0 0 2 310 152 102 0 0 0 0 0 0 0 0 100 5 0 0 0 16 4 40 1 0 1 0 1415 0 0 0 100 6 0 0 4 210 102 4 0 0 13 0 316 0 0 0 100 7 3 0 0 11 3 6 0 0 0 0 7 0 0 0 100 March 2, 2026 at 07:07:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 116 140 0 0 8 0 311 0 1 0 99 1 0 0 21 12 3 10 0 0 0 0 526 0 0 0 100 2 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 2 312 152 104 0 0 0 0 0 0 0 0 100 5 0 0 0 12 3 36 2 0 0 0 1415 0 0 0 100 6 0 0 4 213 103 6 1 0 7 0 305 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:07:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 114 156 1 1 8 0 320 0 1 0 99 1 0 0 21 13 3 14 0 0 4 0 532 0 0 0 100 2 0 0 0 11 0 6 0 0 0 0 5 0 0 0 100 3 0 0 0 14 2 14 0 1 0 0 300 0 0 0 100 4 0 0 2 310 152 102 0 0 0 0 0 0 0 0 100 5 0 0 0 23 10 42 1 0 3 0 1415 0 0 0 100 6 0 0 4 215 103 10 0 0 9 0 291 0 0 0 100 7 0 0 0 13 2 10 0 0 0 0 2 0 0 0 100 March 2, 2026 at 07:07:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 116 152 0 0 13 0 320 0 1 0 99 1 0 0 21 15 4 14 0 1 0 0 538 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 3 0 0 0 100 3 0 0 0 12 3 8 0 1 0 0 302 0 0 0 100 4 0 0 3 310 152 102 0 0 0 0 0 0 0 0 100 5 0 0 0 12 3 36 1 0 1 0 1413 0 0 0 100 6 0 0 3 218 104 18 0 0 9 0 317 0 0 0 100 7 0 0 0 8 1 6 0 2 0 0 26 0 0 0 100 March 2, 2026 at 07:07:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 109 130 1 2 1 0 310 0 1 0 99 1 0 0 21 14 3 16 0 1 1 0 534 0 0 0 100 2 0 0 0 8 1 3 0 1 0 0 4 0 0 0 100 3 0 0 0 30 10 26 0 1 0 0 319 0 0 0 100 4 0 0 2 317 153 106 0 2 0 0 3 0 0 0 100 5 0 0 0 18 3 48 1 1 0 0 1415 0 0 0 100 6 0 0 4 212 103 6 0 1 5 0 302 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 March 2, 2026 at 07:07:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 124 0 0 1 0 305 0 1 0 99 1 20 0 21 13 4 10 0 0 0 0 530 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 5 0 0 0 100 3 0 0 0 28 11 22 1 0 0 0 310 0 0 0 100 4 0 0 2 312 152 104 0 0 0 0 0 0 0 0 100 5 0 0 0 16 3 40 1 2 0 0 1400 0 0 0 100 6 0 0 4 218 104 16 1 1 8 0 339 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:07:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 114 0 0 1 0 294 0 1 0 99 1 0 0 21 10 3 8 0 0 0 0 527 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 29 12 24 0 0 0 0 310 0 0 0 100 4 0 0 2 310 152 102 0 0 0 0 0 0 0 0 100 5 0 0 0 13 3 38 1 0 2 0 1400 0 0 0 100 6 0 0 4 211 103 4 0 0 0 0 275 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 March 2, 2026 at 07:07:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 106 140 2 1 0 0 309 0 1 0 99 1 0 0 21 13 3 14 0 0 3 0 533 0 0 0 100 2 0 0 0 9 0 4 0 0 0 0 5 0 0 0 100 3 0 0 0 32 13 26 1 0 0 0 311 0 0 0 100 4 0 0 2 313 153 104 1 0 0 0 23 0 0 0 100 5 0 0 0 17 7 38 2 0 3 0 1400 0 0 0 100 6 0 0 4 218 102 18 0 0 5 0 308 0 0 0 100 7 0 0 0 12 1 10 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:07:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 116 0 0 1 0 295 0 1 0 99 1 0 0 21 10 3 8 0 0 0 0 525 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 32 13 26 1 0 0 0 312 0 0 0 100 4 0 0 2 310 152 102 0 0 0 0 0 0 0 0 100 5 0 0 0 13 3 38 1 0 2 0 1399 0 0 0 100 6 0 0 4 210 102 4 0 1 5 0 298 0 0 0 100 7 0 0 0 13 2 14 0 1 2 0 2 0 0 0 100 March 2, 2026 at 07:08:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 126 0 1 0 0 302 0 1 0 99 1 0 0 21 20 6 20 0 0 1 0 538 0 0 0 100 2 0 0 0 9 1 4 0 1 2 0 6 0 0 0 100 3 0 0 0 27 9 24 0 0 1 0 319 0 0 0 100 4 0 0 2 323 157 120 0 1 1 0 13 0 0 0 100 5 0 0 0 14 4 36 1 0 1 0 1401 0 0 0 100 6 0 0 4 212 102 8 2 1 5 0 307 0 0 0 100 7 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 March 2, 2026 at 07:08:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 104 292 0 1 4 0 626 0 1 0 99 1 0 0 21 10 3 8 0 0 0 0 527 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 2 335 163 126 1 1 0 0 11 0 0 0 100 5 0 0 0 16 5 11 0 0 1 0 122 0 0 0 100 6 0 0 4 208 102 2 0 0 1 0 302 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 March 2, 2026 at 07:08:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 105 122 0 0 0 0 300 0 1 0 99 1 0 0 21 13 3 14 0 1 1 0 526 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 2 332 163 124 0 0 0 0 12 0 0 0 100 5 0 0 0 11 2 35 2 0 1 0 1281 0 0 0 100 6 0 0 4 212 104 6 0 0 4 0 300 0 0 0 100 7 0 0 0 13 3 12 0 2 0 0 6 0 0 0 100 March 2, 2026 at 07:08:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 105 139 1 0 13 0 308 0 1 0 99 1 0 0 21 12 3 12 0 0 0 0 532 0 0 0 100 2 0 0 0 9 0 4 0 0 0 0 5 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 2 331 162 122 1 0 0 0 10 0 0 0 99 5 0 0 0 19 8 40 1 0 0 0 1401 0 0 0 100 6 0 0 4 212 103 8 0 0 2 0 298 0 0 0 100 7 0 0 0 12 2 8 0 0 0 0 2 0 0 0 100 March 2, 2026 at 07:08:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 69 0 0 4467 109 4974 53 190 48 0 12431 11 8 0 82 1 138 0 0 2540 5 5215 44 205 45 0 12335 11 7 0 82 2 110 0 21 1713 4 3452 39 135 55 0 9547 8 5 0 87 3 31 0 0 2411 6 4909 47 168 57 0 11020 8 6 0 86 4 220 0 3 1677 142 2871 27 125 43 0 6367 6 4 0 90 5 10 0 0 911 16 1828 18 69 16 0 6491 5 3 0 92 6 41 0 3 2001 110 4423 21 100 66 0 17066 8 5 0 87 7 0 0 0 838 4 1782 16 55 45 0 7231 9 3 0 88 March 2, 2026 at 07:08:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 6955 118 10138 76 397 138 0 22625 21 14 0 65 1 4 0 0 4822 20 10048 76 403 141 0 24688 21 14 0 65 2 9 0 2 3376 17 6892 48 244 134 0 18119 17 10 0 73 3 8 0 0 4308 23 8905 55 327 89 0 22107 17 11 0 71 4 7 0 7 3568 122 6837 46 289 119 0 14982 13 9 0 78 5 8 0 0 2169 17 4442 22 160 89 0 15583 13 8 0 79 6 12 0 4 3501 115 6875 46 275 109 0 17254 14 9 0 77 7 4 0 14 2194 16 4584 22 128 74 0 11333 10 6 0 84 March 2, 2026 at 07:08:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 6681 112 9713 93 372 129 0 25979 24 15 0 60 1 4 0 0 4921 15 10022 68 408 119 0 22989 19 12 0 69 2 5 0 7 3916 10 8088 46 279 95 0 20459 18 12 0 70 3 12 0 0 4333 21 8954 59 314 79 0 18954 15 10 0 74 4 5 0 3 2964 120 5683 39 243 89 0 14915 12 8 0 80 5 7 0 0 2474 10 5121 26 149 78 0 14002 12 8 0 81 6 3 0 3 3156 120 6236 39 255 108 0 16604 13 9 0 78 7 4 0 14 2269 11 4767 20 126 53 0 12515 10 7 0 83 March 2, 2026 at 07:08:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 3805 105 3531 25 150 54 0 9291 8 6 0 86 1 6 0 0 1928 39 3860 20 164 42 0 10741 9 6 0 85 2 4 0 7 1469 19 2888 20 106 25 0 8082 7 4 0 89 3 0 0 0 1899 12 4069 22 151 57 0 8951 7 5 0 88 4 1 0 2 1585 111 2784 8 98 59 0 6809 6 4 0 91 5 1 0 0 991 4 2111 12 70 37 0 5944 4 3 0 93 6 2 0 4 1447 107 2609 7 77 34 0 5570 4 3 0 92 7 1 0 14 900 7 1891 5 39 36 0 5281 4 3 0 93 March 2, 2026 at 07:08:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 102 235 2 51 355 0 4 0 3 0 97 1 0 0 0 182 52 276 1 53 329 0 301 0 2 0 98 2 0 0 7 111 13 203 1 43 327 0 276 0 2 0 98 3 0 0 0 243 176 137 1 43 325 0 2 0 2 0 98 4 0 0 2 281 103 158 1 54 321 0 301 0 1 0 99 5 0 0 0 79 8 183 2 37 295 0 1409 0 2 0 98 6 0 0 4 392 101 402 1 48 257 0 0 0 2 0 98 7 0 0 14 123 3 263 0 54 293 0 575 0 1 0 98 March 2, 2026 at 07:08:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2228 101 423 0 108 460 0 3 0 2 0 98 1 0 0 0 345 18 712 3 115 526 0 297 0 2 0 98 2 0 0 7 174 21 367 5 106 492 1 249 0 2 0 98 3 0 0 0 500 362 340 1 101 526 1 27 0 2 0 98 4 0 0 2 344 104 331 1 105 480 0 298 0 2 0 98 5 0 0 0 139 2 372 1 94 458 1 1409 0 2 0 98 6 0 0 4 405 130 406 1 102 458 0 0 0 2 0 98 7 0 0 14 313 2 670 1 96 455 0 566 0 2 0 98 March 2, 2026 at 07:08:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2216 102 341 1 66 475 0 9 0 2 0 98 1 0 0 0 180 10 338 1 63 517 0 310 0 2 0 98 2 0 0 0 129 9 258 1 59 462 0 16 0 1 0 98 3 0 0 7 392 276 685 0 71 453 1 273 0 2 0 98 4 0 0 2 332 103 286 2 76 512 0 309 0 2 0 98 5 0 0 0 130 3 313 2 72 410 0 1409 0 2 0 98 6 0 0 4 439 131 449 1 83 483 1 3 0 2 0 98 7 0 0 14 179 24 348 1 70 429 1 568 0 1 0 99 March 2, 2026 at 07:08:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 106 0 0 0 0 1 0 1 0 99 1 0 0 0 23 5 16 0 1 11 0 297 0 0 0 100 2 0 0 0 27 10 22 1 1 0 0 11 0 0 0 100 3 0 0 7 14 4 10 0 1 0 0 261 0 0 0 100 4 0 0 2 216 103 12 0 1 6 0 299 0 0 0 100 5 0 0 0 16 4 42 1 0 0 0 1410 0 0 0 100 6 0 0 4 206 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 107 52 104 0 0 0 0 565 0 0 0 100 March 2, 2026 at 07:08:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 2 0 0 0 0 1 0 99 1 0 0 0 17 2 12 0 0 7 0 294 0 0 0 100 2 0 0 0 28 10 22 1 1 0 0 9 0 0 0 100 3 0 0 7 15 5 10 1 0 0 0 265 0 0 0 100 4 0 0 2 217 103 6 1 2 3 0 296 0 0 0 100 5 0 0 0 13 3 38 1 0 1 0 1409 0 0 0 100 6 0 0 4 208 102 2 0 0 0 0 1 0 0 0 100 7 0 0 14 108 52 106 0 0 0 0 567 0 0 0 100 March 2, 2026 at 07:08:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 100 117 1 2 0 0 8 0 1 0 99 1 0 0 0 22 3 20 0 0 7 0 303 0 0 0 100 2 0 0 0 31 11 26 0 0 0 0 15 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 2 213 103 4 0 0 15 0 300 0 0 0 100 5 0 0 0 28 9 58 1 1 2 0 1410 0 0 0 100 6 0 0 4 211 103 6 0 0 1 0 1 0 0 0 100 7 0 0 14 118 54 120 0 1 4 0 572 0 0 0 100 March 2, 2026 at 07:08:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2222 104 351 163 15 9 0 510 50 1 0 49 1 0 0 0 90 3 83 57 10 13 0 409 51 0 0 49 2 518 0 0 132 11 138 87 10 3 0 394 50 1 0 49 3 0 0 7 164 27 144 94 12 0 0 593 51 0 0 49 4 0 0 2 279 104 66 48 16 15 0 562 51 0 0 49 5 2 0 0 168 10 261 126 18 11 0 1871 50 1 0 49 6 0 0 102 282 106 102 68 13 5 0 261 50 0 0 49 7 0 0 14 157 31 162 86 12 1 0 778 51 0 0 49 March 2, 2026 at 07:08:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2218 106 176 139 7 7 0 316 99 1 0 0 1 0 0 0 175 9 189 140 8 11 0 626 99 1 0 0 2 0 0 0 156 2 156 132 5 6 0 236 100 0 0 0 3 0 0 0 254 33 224 162 9 4 0 245 99 1 0 0 4 0 0 9 351 113 108 104 10 8 0 730 100 0 0 0 5 0 0 0 148 5 175 124 7 8 0 1588 99 1 0 0 6 0 0 144 340 113 149 120 9 4 0 240 100 0 0 0 7 0 0 14 142 6 112 107 10 4 0 745 100 0 0 0 March 2, 2026 at 07:08:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 100 111 107 8 6 0 202 99 1 0 0 1 0 0 0 144 2 90 97 6 4 0 422 100 0 0 0 2 0 0 0 187 24 149 122 7 1 0 160 100 0 0 0 3 0 0 0 135 2 137 119 3 5 0 262 100 0 0 0 4 0 0 9 388 110 208 151 12 7 0 639 100 0 0 0 5 0 0 7 156 9 179 123 14 10 0 1895 99 1 0 0 6 0 0 130 368 111 169 136 14 6 0 283 99 1 0 0 7 0 0 14 164 25 126 113 9 0 0 766 100 0 0 0 March 2, 2026 at 07:08:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2213 106 183 142 6 3 0 265 99 1 0 0 1 0 0 0 153 16 118 107 9 4 0 498 100 0 0 0 2 0 0 0 227 32 197 144 11 4 0 186 100 0 0 0 3 0 0 0 143 3 136 121 8 5 0 245 100 0 0 0 4 0 0 2 334 107 84 90 8 8 0 167 100 0 0 0 5 0 0 7 169 11 269 154 18 9 0 2307 99 1 0 0 6 0 0 116 348 106 175 133 16 2 0 281 100 0 0 0 7 0 0 14 167 12 157 124 16 6 0 902 100 0 0 0 March 2, 2026 at 07:08:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2190 104 153 115 8 3 0 251 99 1 0 0 1 0 0 7 244 40 222 155 9 7 0 709 100 0 0 0 2 0 0 0 164 9 145 115 10 5 0 285 100 0 0 0 3 0 0 0 132 1 106 99 9 3 0 200 100 0 0 0 4 0 0 3 362 113 131 115 13 3 0 261 100 0 0 0 5 0 0 0 148 11 167 121 7 10 0 1891 99 1 0 0 6 0 0 115 308 108 111 93 11 7 0 323 99 1 0 0 7 0 0 14 147 4 123 109 14 10 0 726 100 0 0 0 March 2, 2026 at 07:08:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2194 103 160 136 7 2 0 272 99 1 0 0 1 0 0 0 215 29 170 132 9 2 0 479 100 0 0 0 2 0 0 7 162 9 145 120 11 5 0 418 100 0 0 0 3 0 0 0 154 17 159 125 13 0 0 221 100 0 0 0 4 0 0 2 345 113 102 101 9 1 0 268 100 0 0 0 5 0 0 0 146 10 188 115 12 6 0 1860 99 1 0 0 6 0 0 102 309 103 78 91 10 4 0 190 99 1 0 0 7 0 0 14 131 3 109 101 8 6 0 819 100 0 0 0 March 2, 2026 at 07:08:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 101 102 100 9 5 0 223 99 1 0 0 1 0 0 0 163 5 183 137 10 11 0 642 99 1 0 0 2 0 0 7 203 7 173 137 5 2 0 453 100 0 0 0 3 0 0 0 157 10 149 118 10 8 0 297 99 1 0 0 4 0 0 2 329 106 101 97 12 7 0 251 100 0 0 0 5 0 0 0 188 22 227 145 12 10 0 1946 99 1 0 0 6 0 0 116 387 134 172 141 12 4 0 192 100 0 0 0 7 0 0 14 168 10 143 122 7 5 0 731 100 0 0 0 March 2, 2026 at 07:08:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2212 112 214 152 15 11 0 451 99 1 0 0 1 0 0 0 132 4 115 108 11 8 0 479 100 0 0 0 2 0 0 7 163 7 129 116 8 4 0 388 100 0 0 0 3 0 0 0 158 12 175 131 12 3 0 211 100 0 0 0 4 0 0 2 326 103 81 91 6 3 0 141 100 0 0 0 5 0 0 0 146 15 150 109 11 8 0 1916 99 1 0 0 6 0 0 88 334 104 160 127 10 6 0 302 100 0 0 0 7 0 0 14 185 29 141 115 11 2 0 761 100 0 0 0 March 2, 2026 at 07:08:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2197 102 161 127 10 5 0 207 99 1 0 0 1 0 0 0 147 3 123 115 12 6 0 566 100 0 0 0 2 0 0 7 143 9 122 108 13 1 0 462 100 0 0 0 3 0 0 0 172 18 112 105 13 3 0 157 100 0 0 0 4 0 0 3 351 106 127 111 10 2 0 206 100 0 0 0 5 0 0 0 169 17 199 136 4 9 0 1947 99 1 0 0 6 0 0 115 366 129 157 130 10 4 0 190 100 0 0 0 7 0 0 14 175 6 171 135 8 7 0 848 99 1 0 0 March 2, 2026 at 07:08:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2209 114 156 135 7 5 0 297 99 1 0 0 1 0 0 0 157 6 145 120 7 4 0 477 100 0 0 0 2 0 0 7 206 22 225 148 13 4 0 551 100 0 0 0 3 0 0 0 221 25 228 164 13 5 0 299 99 1 0 0 4 0 0 3 358 110 128 115 9 4 0 195 100 0 0 0 5 0 0 0 167 11 171 121 8 14 0 1885 99 1 0 0 6 0 0 115 306 107 78 90 5 2 0 243 99 1 0 0 7 0 0 21 127 2 82 91 9 3 0 738 100 0 0 0 March 2, 2026 at 07:08:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2157 101 74 89 14 2 0 704 99 1 0 0 1 0 0 0 171 7 151 125 9 7 0 217 100 0 0 0 2 0 0 7 266 52 264 173 15 10 0 887 99 1 0 0 3 0 0 0 201 16 209 152 17 9 0 283 100 0 0 0 4 1 0 3 368 105 174 137 12 6 0 245 100 0 0 0 5 0 0 0 163 7 232 151 9 26 0 1957 99 1 0 0 6 0 0 129 323 104 114 113 10 13 0 237 99 1 0 0 7 0 0 0 155 5 131 115 11 6 0 290 100 0 0 0 March 2, 2026 at 07:08:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2194 115 169 125 12 5 0 862 99 1 0 0 1 0 0 0 157 9 166 129 14 2 0 327 99 1 0 0 2 0 0 0 161 15 115 104 8 15 0 456 100 0 0 0 3 0 0 0 160 7 149 122 13 1 0 323 100 0 0 0 4 0 0 2 378 121 161 127 14 2 0 177 100 0 0 0 5 0 0 0 159 8 179 124 9 6 0 1898 99 1 0 0 6 0 0 116 327 105 112 107 6 7 0 195 99 1 0 0 7 0 0 7 186 9 184 144 10 1 0 525 100 0 0 0 March 2, 2026 at 07:08:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2207 112 224 147 21 5 0 892 99 1 0 0 1 0 0 0 148 5 136 118 13 5 0 210 100 0 0 0 2 0 0 0 136 4 103 105 12 10 0 524 100 0 0 0 3 0 0 0 134 1 108 104 9 6 0 151 100 0 0 0 4 0 0 2 330 105 84 90 8 9 0 170 100 0 0 0 5 0 0 7 204 21 246 158 8 16 0 2154 99 1 0 0 6 0 0 102 345 122 117 106 11 3 0 155 99 1 0 0 7 0 0 0 191 17 217 151 16 5 0 312 100 0 0 0 March 2, 2026 at 07:08:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2182 107 191 138 6 4 0 821 99 1 0 0 1 0 0 0 176 8 203 148 14 1 0 407 99 1 0 0 2 0 0 7 179 19 156 122 14 7 0 748 100 0 0 0 3 0 0 0 193 29 194 148 13 1 0 254 100 0 0 0 4 0 0 2 344 111 129 109 6 8 0 230 100 0 0 0 5 0 0 0 127 6 115 92 6 18 0 1824 99 1 0 0 6 0 0 116 296 104 72 87 4 3 0 162 99 1 0 0 7 0 0 0 126 2 87 97 4 3 0 124 100 0 0 0 March 2, 2026 at 07:08:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2169 104 99 98 8 6 0 766 99 1 0 0 1 0 0 0 105 2 59 80 12 4 0 79 100 0 0 0 2 0 0 7 197 10 216 159 13 5 0 853 100 0 0 0 3 0 0 0 199 6 173 136 7 0 0 164 100 0 0 0 4 0 0 3 396 136 179 137 10 4 0 245 99 1 0 0 5 0 0 0 213 26 261 160 15 14 0 1963 99 1 0 0 6 0 0 115 315 104 100 102 12 1 0 211 99 1 0 0 7 0 0 0 149 4 140 105 14 5 0 313 99 1 0 0 March 2, 2026 at 07:08:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2160 102 101 103 11 6 0 720 99 1 0 0 1 0 0 0 125 3 109 105 13 10 0 190 100 0 0 0 2 0 0 0 175 8 191 145 8 8 0 626 100 0 0 0 3 0 0 7 205 22 177 134 8 4 0 448 100 0 0 0 4 0 0 9 360 108 138 118 11 5 0 231 100 0 0 0 5 0 0 0 208 33 198 138 13 8 0 457 100 0 0 0 6 0 0 88 346 113 185 128 15 7 0 1719 99 1 0 0 7 0 0 0 138 0 105 104 12 10 0 201 100 0 0 0 March 2, 2026 at 07:08:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2170 123 106 100 8 2 0 479 99 1 0 0 1 0 0 0 127 5 90 97 7 4 0 187 100 0 0 0 2 0 0 0 157 6 142 127 10 7 0 813 100 0 0 0 3 0 0 0 182 19 174 138 9 4 0 336 100 0 0 0 4 0 0 10 430 107 233 159 13 5 0 505 100 0 0 0 5 0 0 0 150 16 163 122 17 11 0 560 99 1 0 0 6 3 0 115 329 117 163 113 17 7 0 1699 99 1 0 0 7 0 0 0 153 2 180 135 16 6 0 294 100 0 0 0 March 2, 2026 at 07:08:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2176 106 103 102 9 3 0 430 99 1 0 0 1 0 0 0 188 32 161 130 7 8 0 156 100 0 0 0 2 0 0 0 155 10 155 120 7 9 0 557 100 0 0 0 3 0 0 0 127 3 89 95 8 20 0 440 100 0 0 0 4 0 0 2 435 119 190 144 10 1 0 244 99 1 0 0 5 0 0 7 172 10 237 146 14 7 0 596 100 0 0 0 6 0 0 130 304 105 111 94 14 10 0 1874 99 1 0 0 7 0 0 0 127 2 152 121 16 4 0 355 100 0 0 0 March 2, 2026 at 07:08:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 288 0 0 2172 116 181 126 25 0 0 399 99 1 0 0 1 11 0 0 125 2 96 88 15 0 0 153 100 0 0 0 2 0 0 0 107 3 75 80 21 1 0 469 100 0 0 0 3 23 0 0 160 18 148 113 26 3 0 538 100 0 0 0 4 0 0 2 328 106 125 95 15 1 0 171 100 0 0 0 5 23 0 0 157 16 171 123 22 4 0 344 100 0 0 0 6 0 0 81 343 113 185 120 24 8 0 2258 99 1 0 0 7 6 0 14 166 8 240 157 24 4 0 755 100 0 0 0 March 2, 2026 at 07:08:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2219 112 239 143 31 3 0 579 98 2 0 0 1 0 0 0 172 4 213 139 24 5 0 345 100 0 0 0 2 0 0 0 152 3 173 112 23 0 0 626 100 0 0 0 3 0 0 0 203 20 249 155 22 5 0 631 100 0 0 0 4 1 0 2 346 110 145 108 24 2 0 376 99 1 0 0 5 0 0 0 200 15 237 144 25 6 0 340 100 0 0 0 6 2 0 130 347 109 204 116 23 4 0 2100 99 1 0 0 7 2 0 21 220 27 268 167 27 1 0 917 99 1 0 0 March 2, 2026 at 07:08:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2177 134 161 111 11 3 0 583 99 1 0 0 1 258 0 0 142 4 124 113 12 1 0 252 100 0 0 0 2 0 0 0 149 6 160 130 11 5 0 560 100 0 0 0 3 0 0 7 156 4 150 123 11 7 0 510 100 0 0 0 4 1 0 2 332 103 83 91 10 2 0 272 100 0 0 0 5 0 0 0 134 6 85 95 6 0 0 203 100 0 0 0 6 1 0 102 431 129 261 167 13 6 0 1971 99 1 0 0 7 0 0 14 128 6 85 94 6 2 0 487 100 0 0 0 March 2, 2026 at 07:08:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2214 117 182 140 14 5 0 291 99 1 0 0 1 0 0 0 186 23 208 143 14 4 0 315 100 0 0 0 2 0 0 0 165 8 163 130 11 9 0 641 100 0 0 0 3 1 0 0 138 4 105 105 11 4 0 638 99 1 0 0 4 0 0 2 321 103 71 87 7 3 0 166 100 0 0 0 5 0 0 0 104 0 63 82 6 0 0 166 100 0 0 0 6 0 0 102 357 108 174 124 3 6 0 1949 99 1 0 0 7 0 0 21 212 25 210 143 16 5 0 844 99 1 0 0 March 2, 2026 at 07:08:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 104 124 108 13 2 0 287 99 1 0 0 1 0 0 0 203 17 217 153 12 2 0 391 100 0 0 0 2 0 0 0 145 4 139 116 11 10 0 262 100 0 0 0 3 0 0 0 181 30 151 120 13 13 0 838 100 0 0 0 4 0 0 2 326 104 105 104 7 2 0 249 100 0 0 0 5 0 0 0 150 15 112 108 5 2 0 206 100 0 0 0 6 0 0 74 319 106 128 98 12 9 0 1887 99 1 0 0 7 0 0 21 179 14 184 141 13 9 0 851 100 0 0 0 March 2, 2026 at 07:08:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 7 2202 105 150 124 13 3 0 269 99 1 0 0 1 0 0 7 138 9 108 100 16 1 0 567 99 1 0 0 2 0 0 0 145 8 116 96 19 5 0 327 99 1 0 0 3 0 0 0 174 23 154 117 23 3 0 823 100 0 0 0 4 1 0 2 331 104 105 106 15 3 0 325 100 0 0 0 5 0 0 0 217 33 213 154 13 1 0 228 100 0 0 0 6 0 0 102 355 112 213 143 10 1 0 2051 99 1 0 0 7 0 0 14 147 8 102 102 8 8 0 491 100 0 0 0 March 2, 2026 at 07:08:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2201 108 153 129 5 7 0 279 99 1 0 0 1 0 0 7 160 5 144 120 8 4 0 563 99 1 0 0 2 0 0 0 162 3 144 115 15 3 0 355 99 1 0 0 3 0 0 0 216 34 202 145 19 5 0 798 100 0 0 0 4 0 0 3 375 124 137 110 14 7 0 285 99 1 0 0 5 0 0 0 187 13 178 139 13 2 0 275 100 0 0 0 6 0 0 115 347 112 189 132 7 2 0 2081 99 1 0 0 7 0 0 14 142 3 106 107 9 2 0 549 99 1 0 0 March 2, 2026 at 07:08:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 101 84 90 6 0 0 244 99 1 0 0 1 0 0 7 144 6 162 124 14 4 0 659 99 1 0 0 2 0 0 0 133 3 113 102 13 6 0 253 100 0 0 0 3 0 0 0 139 6 120 107 11 13 0 767 100 0 0 0 4 0 0 2 391 132 145 120 8 1 0 169 100 0 0 0 5 0 0 0 118 2 90 99 6 1 0 154 100 0 0 0 6 0 0 102 341 112 172 120 5 4 0 2019 99 1 0 0 7 0 0 14 206 22 180 132 12 2 0 557 99 1 0 0 March 2, 2026 at 07:08:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 114 108 102 9 3 0 248 99 1 0 0 1 0 0 7 118 6 94 96 7 3 0 500 100 0 0 0 2 0 0 0 153 5 131 110 13 5 0 226 100 0 0 0 3 0 0 0 202 14 244 169 11 8 0 958 100 0 0 0 4 6 0 7 387 117 152 120 16 5 0 356 100 0 0 0 5 0 0 0 125 4 83 91 8 4 0 233 100 0 0 0 6 0 0 77 338 114 142 111 9 3 0 1868 99 1 0 0 7 0 0 14 201 24 215 160 7 5 0 569 100 0 0 0 March 2, 2026 at 07:08:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2202 123 239 148 14 2 0 351 99 1 0 0 1 0 0 7 116 5 86 93 12 5 0 562 100 0 0 0 2 0 0 0 112 4 79 88 9 10 0 186 100 0 0 0 3 0 0 0 180 7 204 153 10 7 0 932 100 0 0 0 4 0 0 2 344 109 121 116 9 11 0 189 100 0 0 0 5 0 0 0 108 2 65 80 9 5 0 269 100 0 0 0 6 0 0 88 328 111 169 121 7 11 0 2018 99 1 0 0 7 0 0 14 203 29 176 138 8 2 0 462 100 0 0 0 March 2, 2026 at 07:08:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2191 109 177 135 14 3 0 282 99 1 0 0 1 0 0 0 184 29 148 126 8 4 0 255 99 1 0 0 2 0 0 7 233 26 259 175 12 7 0 578 100 0 0 0 3 0 0 0 153 4 150 128 6 1 0 302 100 0 0 0 4 0 0 3 349 108 125 105 15 6 0 915 100 0 0 0 5 0 0 0 178 3 219 155 15 12 0 343 100 0 0 0 6 0 0 129 298 106 96 85 15 4 0 1984 99 1 0 0 7 0 0 14 105 3 58 80 11 3 0 454 100 0 0 0 March 2, 2026 at 07:08:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2216 110 171 134 12 2 0 313 99 1 0 0 1 0 0 0 131 2 107 107 7 9 0 286 100 0 0 0 2 0 0 0 182 6 186 144 6 4 0 337 100 0 0 0 3 0 0 0 184 31 164 132 5 5 0 280 100 0 0 0 4 0 0 9 385 127 155 129 9 0 0 1104 100 0 0 0 5 0 0 0 176 10 161 120 10 14 0 375 100 0 0 0 6 0 0 116 354 109 185 126 15 4 0 1962 99 1 0 0 7 0 0 14 158 3 119 110 11 7 0 615 99 1 0 0 March 2, 2026 at 07:08:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2188 111 196 133 11 5 0 282 99 1 0 0 1 0 0 0 124 7 97 94 10 1 0 194 100 0 0 0 2 0 0 0 160 5 182 144 11 11 0 319 100 0 0 0 3 0 0 0 133 4 121 108 11 4 0 319 100 0 0 0 4 0 0 9 339 111 134 116 8 4 0 904 100 0 0 0 5 0 0 0 181 31 147 120 10 5 0 568 100 0 0 0 6 0 0 88 329 112 147 107 8 2 0 1535 99 1 0 0 7 0 0 14 166 17 147 125 10 7 0 846 100 0 0 0 March 2, 2026 at 07:08:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 107 144 108 14 5 0 155 99 1 0 0 1 0 0 0 165 14 171 132 18 3 0 352 99 1 0 0 2 0 0 0 179 16 219 160 12 3 0 369 100 0 0 0 3 0 0 0 140 16 97 97 12 8 0 284 100 0 0 0 4 0 0 9 384 126 181 132 15 2 0 883 99 1 0 0 5 0 0 0 153 4 139 122 11 6 0 564 100 0 0 0 6 0 0 88 317 106 124 100 9 1 0 1759 99 1 0 0 7 0 0 14 133 2 102 102 6 4 0 814 100 0 0 0 March 2, 2026 at 07:08:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2167 104 102 105 10 0 0 231 99 1 0 0 1 0 0 0 117 2 56 81 6 3 0 145 100 0 0 0 2 0 0 0 151 7 111 105 6 2 0 217 100 0 0 0 3 0 0 7 171 10 171 130 15 8 0 598 99 1 0 0 4 0 0 2 390 130 189 135 13 1 0 692 99 1 0 0 5 0 0 0 177 22 151 125 15 3 0 456 100 0 0 0 6 0 0 144 333 108 149 106 12 0 0 1710 99 1 0 0 7 0 0 14 183 3 143 120 9 8 0 794 100 0 0 0 March 2, 2026 at 07:08:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 103 91 92 13 6 0 229 99 1 0 0 1 0 0 0 103 2 66 81 9 3 0 240 100 0 0 0 2 0 0 0 135 6 109 103 9 5 0 247 100 0 0 0 3 0 0 0 144 6 125 113 9 3 0 244 100 0 0 0 4 0 0 10 341 107 102 103 7 17 0 764 100 0 0 0 5 0 0 0 214 34 225 156 7 4 0 610 100 0 0 0 6 0 0 73 367 118 219 130 12 3 0 1656 99 1 0 0 7 0 0 14 169 11 169 135 10 10 0 865 100 0 0 0 March 2, 2026 at 07:08:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 106 94 97 10 2 0 253 99 1 0 0 1 0 0 0 146 4 139 108 12 2 0 248 100 0 0 0 2 0 0 0 171 6 169 130 16 4 0 386 99 1 0 0 3 0 0 0 214 22 187 136 17 7 0 281 100 0 0 0 4 0 0 2 344 106 112 108 7 4 0 602 99 1 0 0 5 0 0 7 141 10 129 111 12 10 0 866 100 0 0 0 6 0 0 130 325 109 158 111 12 2 0 1638 99 1 0 0 7 0 0 14 211 35 216 154 11 10 0 878 99 1 0 0 March 2, 2026 at 07:08:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 105 143 111 13 11 0 292 99 1 0 0 1 0 0 0 180 17 167 131 16 2 0 200 100 0 0 0 2 3 0 0 140 3 96 98 7 0 0 219 100 0 0 0 3 3 0 0 219 34 223 152 10 5 0 301 100 0 0 0 4 0 0 2 359 105 141 114 13 4 0 607 99 1 0 0 5 0 0 0 145 6 105 95 12 8 0 556 100 0 0 0 6 0 0 130 296 104 101 82 9 3 0 1654 99 1 0 0 7 0 0 21 147 9 111 105 8 5 0 1003 100 0 0 0 March 2, 2026 at 07:08:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 104 108 103 16 3 0 234 99 1 0 0 1 0 0 0 222 38 191 149 11 3 0 229 100 0 0 0 2 0 0 7 166 9 139 120 15 2 0 491 100 0 0 0 3 0 0 0 200 27 183 141 7 5 0 195 100 0 0 0 4 0 0 7 328 105 66 86 6 6 0 476 100 0 0 0 5 0 0 0 112 2 79 78 9 6 0 533 100 0 0 0 6 0 0 77 308 105 141 102 14 3 0 1638 99 1 0 0 7 0 0 14 141 6 107 107 14 6 0 687 100 0 0 0 March 2, 2026 at 07:08:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2121 104 54 38 11 5 0 376 63 1 0 36 1 0 0 0 82 5 50 58 5 1 0 65 72 0 0 28 2 0 0 0 114 5 82 53 11 1 0 133 61 0 0 39 3 0 0 7 146 34 123 72 13 2 0 509 64 0 0 35 4 0 0 2 313 123 77 37 6 0 0 425 59 0 0 41 5 0 0 0 66 2 23 39 2 1 0 324 60 0 0 40 6 0 0 18 257 103 59 45 3 1 0 1453 66 1 0 33 7 0 0 14 70 7 65 43 7 1 0 400 55 0 0 45 March 2, 2026 at 07:08:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 0 2157 102 163 1 12 14 10 376 0 1 0 99 1 12 0 3 42 1 30 0 8 3 3 126 0 0 0 100 2 25 0 0 44 1 35 0 5 6 3 48 0 0 0 100 3 4 0 7 49 6 40 0 5 2 3 301 0 0 0 100 4 1897 0 2 364 163 157 3 7 8 5 687 1 1 0 99 5 23 0 0 45 1 52 0 8 8 5 469 0 0 0 100 6 1452 0 131 244 102 102 5 10 15 13 8032 3 3 0 94 7 144 0 14 59 3 93 0 17 10 17 417 0 0 0 100 March 2, 2026 at 07:08:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 102 128 0 1 4 0 306 0 1 0 99 1 0 0 0 11 2 8 0 0 0 0 9 0 0 0 100 2 0 0 0 27 3 26 0 0 0 0 13 0 0 0 100 3 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 4 0 0 2 334 164 124 1 0 0 0 312 0 0 0 100 5 0 0 0 13 6 4 0 0 1 0 295 0 0 0 100 6 0 0 4 212 103 36 1 0 1 0 1498 0 0 0 99 7 0 0 14 18 3 18 0 1 0 0 266 0 0 0 100 March 2, 2026 at 07:08:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 104 0 0 1 0 302 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 20 2 16 0 0 0 0 4 0 0 0 100 3 0 0 7 18 6 16 1 0 0 0 265 0 0 0 100 4 0 0 2 340 167 132 0 0 0 0 317 0 0 0 100 5 0 0 0 10 2 6 0 0 5 0 298 0 0 0 100 6 0 0 4 212 103 36 1 0 0 0 1496 0 0 0 100 7 0 0 14 11 3 8 0 0 0 0 267 0 0 0 100 March 2, 2026 at 07:08:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 105 0 53 2183 120 318 16 51 234 22 802 1 4 0 95 1 18 0 33 105 4 157 4 34 1475 10 197 0 1 0 99 2 92 0 20 66 2 104 4 24 1650 8 152 0 1 0 99 3 41 0 29 63 4 116 11 34 1993 12 389 0 1 0 99 4 7 0 12 360 148 201 2 35 1657 11 498 0 1 0 99 5 6 0 16 67 12 73 6 18 1203 8 397 0 1 0 99 6 8 0 17 263 103 137 3 31 1777 3 1637 0 1 0 98 7 1867 0 30 74 7 142 12 32 1082 9 709 2 1 0 97 March 2, 2026 at 07:08:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2187 152 218 1 8 11 5 323 0 1 0 99 1 13 0 98 29 1 29 0 4 15 1 26 0 2 0 98 2 4 0 6 43 1 30 5 4 12 1 39 0 2 0 98 3 2 0 7 35 3 18 0 1 1 1 267 0 0 0 100 4 26 0 9 243 105 33 1 1 5 4 333 0 0 0 100 5 5 0 7 27 1 14 0 5 5 1 301 0 0 0 100 6 1 0 4 233 103 45 2 1 1 1 840 0 0 0 100 7 29 0 14 75 22 72 0 6 10 11 301 0 0 0 100 March 2, 2026 at 07:08:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2279 152 208 0 1 3 0 292 0 1 0 99 1 0 0 70 125 2 6 0 0 2 0 2 0 2 0 98 2 0 0 791 23 2 8 0 0 2 0 0 0 1 0 99 3 0 0 7 134 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 335 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 135 1 6 0 1 3 0 294 0 0 0 100 6 0 0 11 333 102 36 0 1 0 0 748 0 0 0 100 7 0 0 14 179 21 50 0 0 0 0 286 0 0 0 100 March 2, 2026 at 07:08:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 152 226 0 1 2 0 310 0 1 0 99 1 0 0 0 9 1 4 0 1 0 0 3 0 0 0 100 2 0 0 0 14 2 8 0 1 0 0 0 0 0 0 100 3 0 0 8 14 3 14 0 1 0 0 259 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 12 6 2 0 0 3 0 294 0 0 0 100 6 0 0 4 212 102 36 1 1 0 0 746 0 0 0 100 7 1 0 14 62 24 65 0 3 0 0 299 0 0 0 100 March 2, 2026 at 07:08:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 152 212 0 0 4 0 306 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 12 3 8 0 0 0 0 259 0 0 0 100 4 0 0 2 218 104 12 0 1 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 3 0 294 0 0 0 100 6 0 0 4 211 103 34 0 0 0 0 747 0 0 0 100 7 0 0 14 50 22 48 0 0 0 0 287 0 0 0 100 March 2, 2026 at 07:09:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 152 218 1 0 3 0 294 0 0 0 99 1 0 0 0 12 2 6 0 0 1 0 5 0 0 0 100 2 0 0 0 16 3 8 0 0 1 0 0 0 0 0 100 3 0 0 7 14 4 6 1 0 1 0 259 0 0 0 100 4 0 0 7 212 103 2 0 0 1 0 300 0 0 0 100 5 0 0 0 15 5 4 0 0 1 0 294 0 0 0 100 6 0 0 7 211 102 36 1 1 1 0 745 0 0 0 100 7 0 0 14 51 22 46 0 0 1 0 290 0 0 0 100 March 2, 2026 at 07:09:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 152 212 0 0 4 0 300 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 103 4 0 1 1 0 300 0 0 0 100 5 0 0 0 13 2 14 0 1 2 0 296 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 746 0 0 0 100 7 0 0 14 50 21 46 0 0 0 0 286 0 0 0 100 March 2, 2026 at 07:09:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 159 228 0 1 4 0 312 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 13 2 10 0 0 0 0 2 0 0 0 100 3 0 0 7 11 3 8 0 0 0 0 259 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 5 0 294 0 0 0 100 6 0 0 4 214 102 44 0 1 0 0 746 0 0 0 100 7 0 0 14 39 17 34 0 0 0 0 283 0 0 0 100 March 2, 2026 at 07:09:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2206 172 271 1 1 4 0 331 0 1 0 99 1 1 0 0 17 4 12 0 1 0 0 13 0 0 0 100 2 0 0 0 12 2 8 0 1 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 17 8 4 0 0 2 0 295 0 0 0 100 6 0 0 4 212 103 36 1 0 0 0 748 0 0 0 100 7 0 0 14 16 2 18 0 0 0 0 270 0 0 0 100 March 2, 2026 at 07:09:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 174 256 1 0 0 0 340 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 12 4 8 0 0 0 0 260 0 0 0 100 4 0 0 3 211 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 6 0 294 0 0 0 100 6 0 0 3 212 102 36 1 0 0 0 745 0 0 0 100 7 0 0 14 12 1 16 0 2 0 0 266 0 0 0 100 March 2, 2026 at 07:09:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2201 172 260 0 1 6 0 319 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 6 0 294 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 746 0 0 0 100 7 0 0 14 10 1 8 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2198 172 256 0 0 3 0 322 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 13 2 8 0 0 0 0 0 0 0 0 100 3 0 0 7 11 3 8 0 0 0 0 259 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 2 0 294 0 0 0 100 6 0 0 4 211 103 36 0 0 0 0 747 0 1 0 99 7 0 0 14 9 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2197 172 254 0 0 8 0 321 0 1 0 99 1 0 0 0 12 2 14 0 1 2 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 7 0 294 0 0 0 100 6 0 0 4 210 102 34 1 0 1 0 747 0 1 0 99 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2207 173 272 2 0 9 0 334 0 1 0 99 1 0 0 0 11 1 8 0 0 0 0 7 0 0 0 100 2 0 0 0 20 2 20 0 1 0 0 5 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 14 6 2 0 0 2 0 294 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 746 0 0 0 99 7 0 0 14 14 2 14 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2199 172 252 0 0 1 0 319 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 4 210 102 34 1 0 1 0 745 0 1 0 99 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2198 172 254 0 1 1 0 322 0 1 0 99 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 0 0 0 16 3 8 0 0 1 0 0 0 0 0 100 3 0 0 7 19 4 16 0 1 1 0 259 0 0 0 100 4 0 0 7 212 103 2 0 0 1 0 300 0 0 0 100 5 0 0 0 10 2 2 0 0 1 0 294 0 0 0 100 6 0 0 7 210 102 34 0 0 1 0 747 0 1 0 99 7 0 0 14 10 2 4 0 0 1 0 266 0 0 0 100 March 2, 2026 at 07:09:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2195 172 252 0 0 0 0 319 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 1 0 0 0 100 3 0 0 7 12 3 8 0 1 0 0 259 0 0 0 100 4 0 0 2 212 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 12 1 12 0 1 1 0 294 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 746 0 0 0 99 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2201 173 254 1 0 4 0 320 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 746 0 0 0 99 7 0 0 14 10 2 8 0 0 0 0 267 0 0 0 100 March 2, 2026 at 07:09:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2210 174 276 1 0 1 0 335 0 1 0 99 1 0 0 0 11 2 8 0 0 0 0 9 0 0 0 100 2 0 0 0 15 2 12 0 0 0 0 5 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 211 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 19 8 6 0 0 1 0 295 0 0 0 100 6 0 0 4 215 103 46 0 1 1 0 746 0 1 0 99 7 0 0 14 14 2 14 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2195 172 252 1 0 1 0 321 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 16 5 14 0 0 0 0 269 0 0 0 100 4 0 0 2 213 103 6 0 0 0 0 318 0 0 0 100 5 0 0 0 7 1 2 0 0 4 0 294 0 0 0 100 6 0 0 4 212 102 36 1 0 1 0 747 0 0 0 100 7 0 0 14 12 1 16 0 2 0 0 266 0 0 0 100 March 2, 2026 at 07:09:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2197 171 250 0 0 1 0 305 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 212 103 3 0 1 0 0 315 0 0 0 100 5 0 0 0 7 1 2 0 0 3 0 294 0 0 0 100 6 0 0 4 209 102 34 0 0 0 0 746 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 171 263 0 1 0 0 21 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 1 0 617 0 0 0 100 5 0 0 0 7 1 2 0 0 2 0 294 0 0 0 100 6 0 0 4 212 103 36 1 0 0 0 746 0 0 0 100 7 0 0 14 12 1 10 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 171 252 0 0 1 0 20 0 1 0 99 1 0 0 0 13 2 16 0 1 1 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 214 104 4 1 0 0 0 598 0 0 0 100 5 0 0 0 7 1 2 0 0 1 0 294 0 0 0 100 6 0 0 4 210 102 34 1 0 2 0 747 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 154 230 1 0 0 0 14 0 1 0 99 1 0 0 0 9 1 6 0 0 0 0 7 0 0 0 100 2 0 0 0 15 2 10 0 0 0 0 5 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 2 0 603 0 0 0 100 5 0 0 0 52 26 42 0 1 1 0 314 0 0 0 100 6 0 0 4 209 102 34 0 0 0 0 746 0 0 0 100 7 0 0 14 14 2 14 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 11 2 6 0 0 1 0 2 0 0 0 100 2 0 0 0 17 2 18 0 1 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 0 0 598 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 314 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 745 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 152 214 0 1 0 0 1 0 1 0 99 1 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 2 0 0 0 15 3 8 0 0 1 0 0 0 0 0 100 3 0 0 7 16 4 14 0 1 1 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 6 0 602 0 0 0 100 5 0 0 0 49 22 42 0 0 9 0 314 0 0 0 100 6 0 0 4 210 102 34 1 0 1 0 747 0 0 0 100 7 0 0 14 10 2 4 0 0 1 0 266 0 0 0 100 March 2, 2026 at 07:09:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 214 104 4 1 0 6 0 599 0 0 0 100 5 0 0 0 47 21 42 0 0 5 0 314 0 0 0 100 6 0 0 4 209 102 34 0 0 0 0 745 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 12 3 8 0 0 1 0 259 0 0 0 100 4 0 0 2 217 104 12 0 1 2 0 600 0 0 0 100 5 0 0 0 47 21 42 0 0 1 0 314 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 747 0 0 0 100 7 0 0 14 10 2 8 0 0 0 0 267 0 0 0 100 March 2, 2026 at 07:09:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 153 230 1 0 0 0 13 0 1 0 99 1 0 0 0 11 2 8 0 0 0 0 9 0 0 0 100 2 0 0 0 15 2 10 0 0 0 0 5 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 215 104 6 0 0 1 0 598 0 0 0 100 5 0 0 0 58 27 54 0 1 1 0 315 0 0 0 100 6 0 0 4 212 103 36 1 0 0 0 747 0 0 0 100 7 0 0 14 14 2 14 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 152 214 0 0 0 0 22 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 12 4 8 0 0 0 0 260 0 0 0 100 4 0 0 2 213 104 4 0 0 3 0 601 0 0 0 100 5 0 0 0 47 21 44 0 1 3 0 314 0 0 0 100 6 0 0 4 209 102 34 0 0 0 0 746 0 0 0 100 7 0 0 14 7 1 4 0 0 0 0 265 0 0 0 100 March 2, 2026 at 07:09:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 151 212 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 214 104 4 1 0 1 0 599 0 0 0 100 5 0 0 0 49 21 44 0 0 2 0 314 0 0 0 100 6 0 0 4 215 102 44 1 1 0 0 746 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 2 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 13 2 8 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 216 104 6 0 1 4 0 603 0 0 0 100 5 0 0 0 47 21 42 0 0 5 0 314 0 0 0 100 6 0 0 4 215 103 38 2 0 1 0 746 0 0 0 100 7 0 0 14 14 1 16 0 1 0 0 266 0 0 0 100 March 2, 2026 at 07:09:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 3 0 597 0 0 0 100 5 0 0 0 49 21 44 0 0 2 0 314 0 0 0 100 6 0 0 4 209 102 34 0 0 1 0 746 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 153 240 1 1 0 0 15 0 1 0 99 1 0 0 0 9 1 6 0 0 0 0 5 0 0 0 100 2 0 0 0 15 2 10 0 0 0 0 5 0 0 0 100 3 0 0 7 11 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 215 105 6 0 0 4 0 624 0 0 0 100 5 0 0 0 56 27 44 0 0 0 0 315 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 747 0 1 0 99 7 0 0 14 15 2 14 0 0 1 0 266 0 0 0 100 March 2, 2026 at 07:09:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 151 212 0 0 0 0 0 0 1 0 99 1 0 0 0 14 2 14 0 1 0 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 214 104 4 1 0 0 0 599 0 0 0 100 5 0 0 0 47 21 42 0 0 1 0 314 0 0 0 100 6 0 0 4 209 102 34 0 0 0 0 745 0 0 0 99 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 151 210 0 0 1 0 0 0 1 0 99 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 0 0 0 14 3 6 0 0 1 0 0 0 0 0 100 3 0 0 7 13 4 6 0 0 1 0 259 0 0 0 100 4 0 0 7 214 104 4 0 0 4 0 602 0 0 0 100 5 0 0 0 50 22 42 0 0 6 0 314 0 0 0 100 6 0 0 7 211 102 36 1 1 0 0 747 0 1 0 99 7 0 0 14 11 2 4 0 0 1 0 266 0 0 0 100 March 2, 2026 at 07:09:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 2 0 0 0 18 3 18 0 1 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 4 0 599 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 314 0 0 0 100 6 0 0 4 209 102 34 0 0 0 0 746 0 0 0 99 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 152 212 0 0 0 0 1 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 13 2 8 0 0 0 0 0 0 0 0 100 3 0 0 7 15 3 16 0 1 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 3 0 599 0 0 0 100 5 0 0 0 50 22 46 0 0 0 0 315 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 746 0 0 0 99 7 0 0 14 9 2 6 0 0 0 0 267 0 0 0 100 March 2, 2026 at 07:09:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2169 153 234 1 0 1 0 15 0 1 0 99 1 0 0 0 11 2 8 0 0 0 0 9 0 0 0 100 2 0 0 0 16 2 12 1 0 0 0 5 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 214 104 4 1 0 1 0 600 0 0 0 100 5 0 0 0 57 28 44 0 0 0 0 315 0 0 0 100 6 0 0 4 212 103 36 1 0 1 0 746 0 1 0 99 7 0 0 14 14 2 14 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 14 4 10 0 0 0 0 260 0 0 0 100 4 0 0 3 218 104 14 0 1 1 0 603 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 314 0 0 0 100 6 0 0 3 209 102 34 0 0 0 0 747 0 1 0 99 7 0 0 14 7 1 6 0 1 0 0 266 0 0 0 100 March 2, 2026 at 07:09:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 212 0 1 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 216 104 4 1 0 0 0 597 0 0 0 100 5 0 0 0 51 21 52 0 1 2 0 314 0 0 0 100 6 0 0 4 211 102 34 1 0 0 0 746 0 0 0 100 7 0 0 14 9 1 6 1 0 0 0 300 0 0 0 100 March 2, 2026 at 07:09:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 152 214 0 0 0 0 1 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 1 0 0 0 259 0 0 0 100 4 0 0 2 215 105 4 0 0 1 0 605 0 0 0 100 5 0 0 0 48 21 44 0 0 0 0 314 0 0 0 100 6 0 0 4 213 103 36 1 0 0 0 746 0 0 0 100 7 0 0 14 9 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 214 104 4 1 0 2 0 596 0 0 0 100 5 0 0 0 50 21 44 1 0 1 0 314 0 0 0 100 6 0 0 4 214 102 44 0 1 0 0 747 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 153 236 2 1 0 0 13 0 1 0 99 1 0 0 0 9 1 6 0 0 0 0 7 0 0 0 100 2 0 0 0 15 2 10 0 0 0 0 5 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 9 0 601 0 0 0 100 5 0 0 0 53 27 42 0 0 6 0 314 0 0 0 100 6 0 0 4 216 102 42 1 0 1 0 746 0 0 0 100 7 0 0 14 15 2 16 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 13 2 8 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 0 0 598 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 314 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 746 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 152 214 0 3 0 0 1 0 1 0 99 1 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 2 0 0 0 13 3 6 0 0 1 0 0 0 0 0 100 3 0 0 7 12 4 6 0 0 1 0 259 0 0 0 100 4 0 0 3 216 104 6 0 1 4 0 603 0 0 0 100 5 0 0 0 50 22 42 0 0 4 0 314 0 0 0 100 6 0 0 3 216 102 42 1 0 1 0 746 0 0 0 100 7 0 0 14 9 2 4 0 0 1 0 266 0 0 0 100 March 2, 2026 at 07:09:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 152 212 0 0 1 0 0 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 2 0 0 0 18 5 14 0 1 1 0 1 0 0 0 100 3 0 0 7 12 4 8 0 0 1 0 259 0 0 0 100 4 0 0 2 216 105 6 1 0 3 0 598 0 0 0 100 5 0 0 0 49 22 44 0 0 9 0 314 0 0 0 100 6 0 0 4 214 103 38 1 1 1 0 746 0 0 0 100 7 0 0 14 16 2 18 0 1 2 0 266 0 0 0 100 March 2, 2026 at 07:09:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 0 0 610 0 0 0 100 5 0 0 0 49 21 44 0 0 1 0 314 0 0 0 100 6 0 0 4 209 102 34 0 0 0 0 746 0 0 0 100 7 0 0 14 10 2 8 0 0 0 0 267 0 0 0 100 March 2, 2026 at 07:09:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 153 240 1 1 1 0 12 0 1 0 99 1 0 0 0 11 2 8 0 0 0 0 8 0 0 0 100 2 0 0 0 15 2 10 0 0 0 0 7 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 258 0 0 0 100 4 0 0 2 213 104 4 0 0 7 0 591 0 0 0 100 5 0 0 0 53 26 44 0 0 8 0 315 0 0 0 100 6 0 0 4 212 103 36 1 0 1 0 747 0 0 0 100 7 0 0 14 16 2 16 0 0 1 0 266 0 0 0 100 March 2, 2026 at 07:09:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 152 214 0 0 0 0 21 0 1 0 99 1 0 0 0 11 1 10 0 1 1 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 16 5 14 0 0 0 0 269 0 0 0 100 4 0 0 2 215 104 8 0 0 2 0 616 0 0 0 100 5 0 0 0 49 23 42 0 0 1 0 314 0 0 0 100 6 0 0 4 210 102 34 1 0 1 0 745 0 0 0 100 7 0 0 14 7 1 6 0 1 0 0 266 0 0 0 100 March 2, 2026 at 07:09:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 152 214 0 0 0 0 1 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 214 104 4 1 0 3 0 600 0 0 0 100 5 0 0 0 47 21 42 0 0 9 0 314 0 0 0 100 6 0 0 4 209 102 34 0 0 0 0 746 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 151 212 0 0 0 0 0 0 1 0 99 1 0 0 0 9 1 4 0 0 1 0 0 0 0 0 100 2 0 0 0 17 2 16 0 1 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 8 0 603 0 0 0 100 5 0 0 0 47 21 42 0 0 12 0 314 0 0 0 100 6 0 0 4 212 103 36 1 0 0 0 747 0 0 0 100 7 0 0 14 10 1 8 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 13 2 8 0 0 0 0 0 0 0 0 100 3 0 0 7 15 3 16 0 1 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 6 0 598 0 0 0 100 5 0 0 0 47 21 42 0 0 10 0 314 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 746 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2168 152 226 0 0 0 0 6 0 1 0 99 1 1 0 0 9 1 6 0 0 0 0 8 0 0 0 100 2 0 0 0 15 2 14 0 0 0 0 10 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 9 0 599 0 0 0 100 5 0 0 0 52 26 42 0 0 8 0 314 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 747 0 0 0 99 7 0 0 14 14 2 14 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 1 0 0 0 100 3 0 0 7 12 3 8 0 0 0 0 259 0 0 0 100 4 0 0 2 218 104 14 1 1 10 0 602 0 0 0 100 5 0 0 0 47 21 42 0 0 11 0 314 0 0 0 100 6 0 0 4 209 102 34 0 0 1 0 746 0 1 0 99 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 212 0 1 0 0 0 0 1 0 99 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 0 0 0 14 3 6 0 0 1 0 0 0 0 0 100 3 0 0 7 13 4 6 0 0 1 0 259 0 0 0 100 4 0 0 7 216 104 6 0 1 6 0 602 0 0 0 100 5 0 0 0 55 22 52 0 1 8 0 314 0 0 0 100 6 0 0 7 211 102 34 1 0 2 0 745 0 1 0 99 7 0 0 14 10 2 4 0 0 1 0 266 0 0 0 100 March 2, 2026 at 07:09:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 2 0 598 0 0 0 100 5 0 0 0 47 21 42 0 0 6 0 314 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 747 0 1 0 99 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 13 2 8 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 8 0 598 0 0 0 100 5 0 0 0 49 21 44 0 0 6 0 314 0 0 0 100 6 0 0 4 215 102 44 1 1 0 0 746 0 0 0 99 7 0 0 14 10 2 8 0 0 0 0 267 0 0 0 100 March 2, 2026 at 07:09:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 151 226 0 0 0 0 5 0 1 0 99 1 0 0 0 11 2 8 0 0 0 0 9 0 0 0 100 2 0 0 0 20 4 20 0 0 0 0 14 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 214 104 4 1 0 10 0 600 0 0 0 100 5 0 0 0 55 28 44 0 0 8 0 315 0 0 0 100 6 0 0 4 213 103 38 0 1 0 0 746 0 1 0 99 7 0 0 14 20 2 26 0 1 0 0 266 0 0 0 100 March 2, 2026 at 07:09:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 12 4 8 0 0 0 0 260 0 0 0 100 4 0 0 2 216 105 4 1 0 11 0 601 0 0 0 100 5 0 0 0 47 21 42 0 0 8 0 314 0 0 0 100 6 0 0 4 212 103 34 1 0 0 0 746 0 1 0 99 7 0 0 14 7 1 6 0 1 0 0 266 0 0 0 100 March 2, 2026 at 07:09:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 151 222 0 1 0 0 0 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 3 215 105 4 0 0 7 0 622 0 0 0 100 5 0 0 0 47 21 42 0 0 9 0 314 0 0 0 100 6 0 0 3 212 103 34 1 0 0 0 747 0 0 0 100 7 0 0 14 10 1 8 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 151 214 0 0 1 0 0 0 1 0 99 1 0 0 0 11 1 12 0 1 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 1 0 582 0 0 0 100 5 0 0 0 47 21 42 0 0 3 0 314 0 0 0 100 6 0 0 4 211 103 36 0 0 0 0 747 0 0 0 100 7 0 0 14 10 1 8 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 216 105 4 1 0 10 0 608 0 0 0 100 5 0 0 0 49 21 44 0 0 5 0 314 0 0 0 100 6 0 0 4 212 103 34 1 0 0 0 745 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 151 222 0 0 0 0 5 0 1 0 99 1 0 0 0 11 1 8 0 0 0 0 5 0 0 0 100 2 0 0 0 23 4 26 0 1 0 0 12 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 2 0 588 0 0 0 100 5 0 0 0 53 27 42 0 0 4 0 314 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 747 0 0 0 100 7 0 0 14 14 2 14 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:09:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 15 2 10 0 0 1 0 0 0 0 0 100 3 0 0 7 14 3 16 0 1 0 0 259 0 0 0 100 4 0 0 2 213 104 4 0 0 7 0 600 0 0 0 100 5 0 0 0 47 21 42 0 0 7 0 314 0 0 0 100 6 0 0 4 210 102 34 1 0 0 0 746 0 0 0 100 7 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 March 2, 2026 at 07:10:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 144 216 0 0 3 0 0 0 1 0 99 1 0 0 0 25 9 18 0 1 1 0 0 0 0 0 100 2 19 0 0 23 3 22 0 0 1 0 36 0 0 0 100 3 1293 0 8 26 4 34 1 3 1 1 488 0 0 0 99 4 17 0 8 233 104 40 2 3 9 1 769 1 0 0 99 5 1 0 0 110 82 40 0 1 11 0 318 0 0 0 100 6 0 0 7 210 102 36 0 1 0 0 746 0 0 0 100 7 0 0 14 20 2 20 0 0 1 0 266 0 0 0 100 March 2, 2026 at 07:10:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2868 103 1676 3 0 15 0 71 0 1 0 99 1 0 0 0 155 51 196 0 1 15 0 337 0 0 0 99 2 0 0 0 18 3 14 0 1 0 0 3 0 0 0 100 3 0 0 7 13 3 10 0 0 0 0 260 0 0 0 100 4 2566 0 2 335 107 228 4 1 79 0 1554 1 2 0 97 5 0 0 0 1166 1155 141 0 3 140 0 559 0 1 0 99 6 0 0 4 211 102 36 1 2 1 0 747 0 0 0 100 7 0 0 14 750 1 1486 0 0 86 0 266 0 2 0 98 March 2, 2026 at 07:10:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2443 101 795 0 0 4 0 0 0 1 0 99 1 0 0 0 13 1 4 1 0 6 0 52 0 0 0 100 2 0 0 0 79 4 130 0 1 37 0 505 0 0 0 99 3 0 0 7 107 51 104 0 1 0 0 259 0 0 0 100 4 0 0 2 219 104 6 0 1 4 0 609 0 0 0 100 5 0 0 2 482 470 11 0 2 60 0 294 0 0 0 100 6 0 0 4 213 103 36 1 0 0 0 746 0 0 0 100 7 0 0 14 352 4 688 0 1 36 0 273 0 1 0 99 March 2, 2026 at 07:10:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2195 101 286 0 9 62 0 0 0 1 0 99 1 0 0 0 57 2 100 0 12 72 0 2 0 0 0 100 2 0 0 0 54 5 78 0 7 43 0 6 0 0 0 100 3 0 0 7 215 114 189 0 17 35 0 272 0 0 0 100 4 0 0 2 257 104 90 0 14 67 0 597 0 0 0 100 5 0 0 0 194 146 83 0 10 51 0 305 0 0 0 100 6 0 0 4 325 104 258 1 15 51 0 836 0 1 0 99 7 0 0 14 85 2 156 0 6 41 0 266 0 0 0 100 March 2, 2026 at 07:10:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 102 204 0 0 1 0 21 0 1 0 99 1 0 0 0 25 4 26 0 1 0 0 59 0 0 0 100 2 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 3 0 0 7 117 54 114 0 0 0 0 275 0 0 0 100 4 0 0 3 215 104 6 1 0 4 0 604 0 0 0 100 5 0 0 0 153 142 8 0 0 9 0 296 0 0 0 100 6 0 0 3 224 105 50 1 2 0 0 758 0 0 0 100 7 0 0 14 52 1 96 0 1 2 0 266 0 0 0 100 March 2, 2026 at 07:10:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 101 228 0 0 2 0 0 0 1 0 99 1 0 0 0 16 4 10 0 0 0 0 13 0 0 0 100 2 0 0 0 14 2 10 0 0 0 0 0 0 0 0 100 3 0 0 7 111 53 108 0 1 0 0 261 0 0 0 100 4 0 0 2 215 104 6 1 0 2 0 603 0 0 0 100 5 0 0 0 177 168 4 0 0 14 0 294 0 0 0 100 6 0 0 4 232 103 74 1 0 2 0 856 0 0 0 99 7 0 0 14 72 1 134 0 2 8 0 266 0 0 0 100 March 2, 2026 at 07:10:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 101 206 0 1 2 0 0 0 1 0 99 1 0 0 0 23 1 30 0 0 2 0 79 0 0 0 100 2 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 3 0 0 7 111 53 108 0 0 0 0 261 0 0 0 100 4 0 0 2 214 104 6 0 0 3 0 597 0 0 0 100 5 0 0 0 132 124 4 0 0 12 0 294 0 0 0 100 6 0 0 4 219 105 42 1 0 0 0 759 0 0 0 100 7 0 0 14 57 1 98 0 0 3 0 266 0 0 0 100 March 2, 2026 at 07:10:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 0 1 0 0 0 1 0 99 1 0 0 0 20 4 20 0 1 0 0 13 0 0 0 100 2 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 3 0 0 7 111 53 108 0 0 0 0 261 0 0 0 100 4 0 0 2 214 104 6 0 0 2 0 595 0 0 0 100 5 0 0 0 22 14 4 0 0 0 0 294 0 0 0 100 6 0 0 4 218 102 46 1 0 0 0 775 0 0 0 100 7 0 0 14 11 1 10 0 1 2 0 266 0 0 0 100 March 2, 2026 at 07:10:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 124 0 0 0 0 0 0 1 0 99 1 0 0 0 20 4 18 0 0 4 0 20 0 0 0 100 2 0 0 0 16 2 22 0 1 1 0 0 0 0 0 100 3 0 0 7 115 53 116 0 1 0 0 267 0 0 0 100 4 0 0 2 217 105 10 0 0 3 0 604 0 0 0 100 5 0 0 0 44 35 6 0 0 1 0 294 0 0 0 100 6 0 0 4 223 104 52 2 0 1 0 781 0 0 0 100 7 0 0 14 20 1 24 0 0 1 0 266 0 0 0 100 March 2, 2026 at 07:10:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2277 101 458 0 0 5 0 0 0 1 0 99 1 0 0 0 54 3 84 2 0 20 0 306 0 0 0 99 2 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 3 0 0 7 111 53 108 1 0 0 0 261 0 0 0 100 4 0 0 2 216 104 6 2 0 4 0 599 0 0 0 100 5 0 0 0 374 366 4 0 1 40 0 294 0 0 0 100 6 0 0 4 216 104 40 0 1 1 0 758 0 0 0 100 7 0 0 14 181 1 348 0 0 20 0 266 0 1 0 99 March 2, 2026 at 07:10:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 110 0 0 1 0 0 0 1 0 99 1 0 0 0 17 4 10 0 1 0 0 11 0 0 0 100 2 0 0 0 17 3 10 0 0 1 0 0 0 0 0 100 3 0 0 7 122 55 122 0 1 2 0 266 0 0 0 100 4 7 0 7 217 105 8 0 0 4 0 606 0 0 0 100 5 0 0 0 25 15 4 0 0 1 0 294 0 0 0 100 6 0 0 7 218 102 46 1 0 2 0 776 0 0 0 99 7 0 0 14 12 2 6 0 0 1 0 266 0 0 0 100 March 2, 2026 at 07:10:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2205 101 315 0 0 0 0 0 0 1 0 99 1 0 0 0 35 2 52 0 0 7 0 153 0 0 0 100 2 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 3 0 0 7 113 53 110 0 0 0 0 261 0 0 0 100 4 0 0 2 218 104 16 0 1 11 0 606 0 0 0 100 5 0 0 0 215 205 6 0 0 22 0 295 0 0 0 100 6 0 0 4 216 104 40 1 0 0 0 756 0 0 0 100 7 0 0 14 108 1 206 0 0 10 0 266 0 0 0 100 March 2, 2026 at 07:10:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 101 168 0 0 0 0 0 0 1 0 99 1 1 0 0 18 3 16 0 0 0 0 25 0 0 0 100 2 0 0 0 14 2 10 0 0 0 0 0 0 0 0 100 3 0 0 7 112 53 110 0 0 0 0 263 0 0 0 100 4 0 0 2 214 104 6 0 0 2 0 590 0 0 0 100 5 0 0 0 127 116 6 0 1 6 0 294 0 0 0 100 6 1 0 4 221 102 52 1 1 1 0 795 0 0 0 100 7 0 0 14 40 2 70 0 0 0 0 267 0 0 0 100