March 2, 2026 at 06:52:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1303 0 92 4391 138 6283 63 364 1341 7 5905 6 10 0 84 1 1139 0 159 1148 17 3239 29 338 1398 12 7457 16 8 0 76 2 818 0 76 899 25 3203 18 399 1414 6 6536 3 6 0 91 3 940 0 44 1330 508 3925 17 522 1444 13 8442 4 7 0 90 4 926 0 65 1132 20 3989 17 452 1473 8 8210 5 7 0 88 5 945 0 188 4006 3155 3439 19 303 1571 7 9009 3 10 0 87 6 696 0 129 1147 16 3326 24 352 1450 13 9056 12 7 0 81 7 764 0 44 2233 15 6371 40 353 1447 8 6626 6 10 0 84 March 2, 2026 at 06:52:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7426 0 39 2522 101 900 22 214 893 70 2722 12 6 0 81 1 5231 0 40 517 11 1170 12 246 1496 91 1961 7 5 0 89 2 6692 0 66 408 44 686 22 180 869 50 3251 9 12 0 79 3 2776 0 4 665 397 576 23 147 631 20 2752 13 4 0 83 4 5347 0 63 539 6 1287 6 224 1143 90 2085 2 6 0 92 5 6590 0 29 591 24 832 21 171 698 65 2349 9 32 0 59 6 8140 0 24 488 7 715 15 178 646 52 1916 5 23 0 72 7 3731 0 57 530 53 1015 13 214 1371 81 2290 4 7 0 90 March 2, 2026 at 06:52:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2197 104 307 0 96 502 0 2 0 2 0 98 1 40 0 0 143 18 282 1 93 485 0 310 0 2 0 98 2 0 0 18 304 103 244 1 81 579 0 266 0 2 0 98 3 31 0 0 426 330 284 0 78 620 0 1058 0 2 0 98 4 0 0 0 428 3 898 1 86 588 0 300 0 2 0 98 5 0 0 0 104 1 257 2 82 624 0 294 0 2 0 98 6 0 0 0 167 30 324 0 92 554 0 0 0 2 0 98 7 0 0 9 322 106 271 0 95 553 0 259 0 2 0 98 March 2, 2026 at 06:52:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2234 121 392 0 126 749 0 0 0 5 0 95 1 0 0 0 229 18 475 0 123 826 0 300 0 2 0 98 2 0 0 18 698 113 1010 1 136 727 0 266 0 2 0 98 3 26 0 0 502 353 402 1 143 838 0 1041 0 3 0 97 4 0 0 0 139 4 350 2 126 752 0 300 0 2 0 98 5 0 0 0 137 2 350 1 127 776 0 295 0 2 0 98 6 0 0 0 142 2 352 1 130 705 0 0 0 2 0 98 7 0 0 9 339 104 338 2 120 646 0 259 0 2 0 98 March 2, 2026 at 06:52:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 108 161 0 35 175 0 2 0 1 0 99 1 0 0 0 76 2 144 0 30 172 0 300 0 0 0 100 2 0 0 17 372 102 338 0 24 137 0 266 0 1 0 99 3 0 0 0 257 118 213 1 37 189 0 15 0 1 0 99 4 0 0 0 162 37 231 0 42 214 0 300 0 1 0 99 5 0 0 0 80 7 179 1 38 181 0 1290 0 1 0 99 6 0 0 0 76 3 141 0 32 152 0 15 0 0 0 99 7 0 0 10 278 105 147 0 33 164 0 308 0 1 0 99 March 2, 2026 at 06:52:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2190 116 239 1 45 195 0 0 0 3 0 97 1 0 0 0 104 12 169 1 34 199 0 301 0 2 0 98 2 0 0 18 315 118 166 1 25 193 0 266 0 2 0 98 3 0 0 0 203 120 389 0 32 183 0 0 0 1 0 99 4 0 0 0 74 4 137 1 34 201 0 300 0 2 0 98 5 0 0 0 114 9 213 1 28 183 0 1038 0 1 0 99 6 0 0 0 67 1 132 1 33 191 0 0 0 2 0 98 7 0 0 9 269 105 123 1 27 189 0 552 0 2 0 98 March 2, 2026 at 06:52:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 980 0 6 2314 121 494 4 77 73 45 915 1 2 0 98 1 830 0 7 247 11 428 5 57 96 24 1301 2 2 0 96 2 2692 0 55 365 103 313 7 51 79 31 1463 2 2 0 95 3 213 0 8 150 1 267 2 48 18 24 796 1 1 0 98 4 530 0 4 161 7 281 6 53 103 19 788 1 1 0 98 5 1320 0 4 142 14 269 3 44 79 17 1640 1 1 0 98 6 3947 0 14 239 19 404 8 57 111 24 1205 3 2 0 95 7 3478 0 34 384 105 387 8 52 88 40 1960 2 7 0 91 March 2, 2026 at 06:52:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2124 110 87 0 9 0 0 8 0 1 0 99 1 0 0 0 86 30 76 0 7 0 0 301 0 0 0 100 2 0 0 32 228 110 22 0 3 0 0 267 0 0 0 100 3 14 0 0 52 11 42 0 4 0 0 24 0 0 0 100 4 0 0 0 17 4 8 0 1 0 0 302 0 0 0 100 5 0 0 0 16 1 44 1 1 0 0 1137 0 1 0 99 6 0 0 0 34 2 24 0 0 2 0 9 0 0 0 100 7 0 0 16 220 105 10 0 1 1 0 609 0 0 0 100 March 2, 2026 at 06:52:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 28 0 7 0 0 2 0 1 0 99 1 0 0 0 107 40 100 0 6 0 0 300 0 0 0 100 2 0 0 17 219 104 14 0 4 0 0 266 0 0 0 100 3 0 0 0 108 16 97 0 3 0 0 9 0 0 0 100 4 0 0 0 13 3 8 0 1 0 0 300 0 0 0 100 5 7 0 0 16 2 48 0 1 0 0 1118 0 1 0 99 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 10 214 104 8 0 0 0 0 554 0 0 0 100 March 2, 2026 at 06:52:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 117 116 1 9 0 0 9 0 1 0 99 1 0 0 1 111 33 104 0 5 0 0 308 0 0 0 100 2 0 0 18 216 106 12 0 2 0 0 267 0 0 0 100 3 0 0 0 21 6 16 0 0 0 0 8 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 5 0 0 0 16 6 36 1 0 0 0 1116 0 1 0 99 6 0 0 0 22 4 22 0 1 0 0 8 0 0 0 100 7 0 0 9 216 104 12 0 2 0 0 555 0 0 0 100 March 2, 2026 at 06:52:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 14 2177 110 224 0 29 41 9 51 0 1 0 99 1 22 0 0 166 44 223 1 26 53 1 333 0 0 0 99 2 22 0 18 274 105 117 2 18 54 2 287 0 0 0 100 3 8 0 9 144 83 251 0 24 53 3 44 0 0 0 99 4 22 0 8 90 4 146 1 24 68 2 345 0 1 0 99 5 6 0 5 73 5 145 1 20 54 4 1152 0 1 0 99 6 5 0 2 68 1 127 0 22 62 4 45 0 0 0 100 7 301 0 9 260 104 92 1 19 71 2 662 0 0 0 99 March 2, 2026 at 06:52:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 107 105 0 12 0 0 1 0 1 0 99 1 0 0 0 39 14 30 0 1 0 0 300 0 0 0 100 2 0 0 18 216 104 10 0 3 0 0 266 0 0 0 100 3 0 0 0 12 1 6 0 0 0 0 0 0 0 0 100 4 0 0 7 15 4 10 0 1 0 0 301 0 0 0 100 5 0 0 0 10 1 34 1 0 0 0 1064 0 1 0 99 6 0 0 0 51 18 44 0 4 0 0 0 0 0 0 100 7 0 0 9 255 118 47 0 8 0 0 553 0 0 0 100 March 2, 2026 at 06:52:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 105 98 0 8 0 0 2 0 1 0 99 1 0 0 0 95 41 86 0 4 0 0 300 0 0 0 100 2 0 0 18 249 110 40 0 4 0 0 266 0 0 0 100 3 0 0 0 11 1 6 0 2 0 0 0 0 0 0 100 4 0 0 0 13 3 6 0 1 0 0 300 0 0 0 100 5 0 0 0 13 1 36 2 1 2 0 1061 0 1 0 99 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 9 220 104 16 0 0 0 0 552 0 0 0 100 March 2, 2026 at 06:52:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 120 105 0 7 0 0 0 0 1 0 99 1 0 0 0 88 28 78 0 6 0 0 300 0 0 0 100 2 0 0 18 240 107 36 0 3 0 0 267 0 0 0 100 3 0 0 0 15 2 10 0 2 0 0 0 0 0 0 100 4 0 0 0 11 3 4 0 0 0 0 300 0 0 0 100 5 0 0 0 11 1 36 1 0 0 0 1059 0 1 0 99 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 9 213 104 6 0 0 0 0 554 0 0 0 100 March 2, 2026 at 06:52:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 106 112 1 7 0 0 18 0 1 0 99 1 0 0 0 19 4 18 0 1 0 0 308 0 0 0 100 2 0 0 18 226 103 22 0 3 0 0 267 0 0 0 100 3 0 0 0 109 46 98 0 2 0 0 0 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 5 0 0 0 14 6 34 1 0 0 0 1059 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 9 223 104 22 0 1 0 0 554 0 0 0 100 March 2, 2026 at 06:52:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 836 0 0 2472 104 685 27 100 106 4 1523 10 2 0 87 1 306 0 0 445 33 696 19 102 108 3 1694 6 1 0 93 2 299 0 324 501 113 530 17 78 70 1 1635 6 1 0 93 3 102 0 0 415 73 587 14 84 96 0 1263 4 1 0 95 4 4824 0 8 338 4 564 19 88 109 8 1854 8 2 0 90 5 329 0 1 334 5 578 20 63 128 4 2325 6 1 0 93 6 198 0 0 339 3 588 9 66 94 7 1159 3 1 0 95 7 313 0 12 508 107 485 10 64 105 2 1931 3 1 0 96 March 2, 2026 at 06:52:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2119 106 52 0 9 0 0 7 0 1 0 99 1 0 0 0 93 39 83 0 4 6 0 312 0 0 0 100 2 0 0 35 302 110 93 1 7 1 0 271 0 0 0 100 3 0 0 0 20 4 10 0 0 1 0 6 0 0 0 100 4 0 0 0 16 4 6 0 1 2 0 308 0 0 0 100 5 0 0 0 16 3 38 0 1 2 0 1130 0 0 0 100 6 0 0 0 18 3 8 0 2 1 0 7 0 0 0 100 7 37 0 14 241 114 31 0 3 1 0 564 0 0 0 100 March 2, 2026 at 06:52:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 104 88 0 4 0 0 0 0 1 0 99 1 0 0 0 102 43 100 1 8 0 0 300 0 0 0 100 2 0 0 18 253 110 50 0 8 0 0 266 0 0 0 100 3 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 301 0 0 0 100 5 0 0 0 10 1 34 1 0 0 0 1116 0 0 0 100 6 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 7 0 0 9 230 110 30 0 1 0 0 565 0 0 0 100 March 2, 2026 at 06:53:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 130 0 3 0 0 9 0 1 0 99 1 0 0 0 112 51 104 0 0 0 0 300 0 0 0 100 2 0 0 18 211 103 6 0 0 0 0 266 0 0 0 100 3 0 0 0 13 2 6 0 1 0 0 0 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 5 1 0 0 12 2 38 1 0 0 0 1131 0 0 0 100 6 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 7 0 0 9 221 107 12 1 1 0 0 557 0 0 0 100 March 2, 2026 at 06:53:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 2164 130 141 0 9 7 3 44 0 1 0 99 1 14 0 0 80 27 86 0 12 0 5 332 0 0 0 100 2 2 0 19 285 108 93 0 10 2 1 318 0 0 0 100 3 10 0 0 32 3 41 0 6 2 3 59 0 0 0 100 4 290 0 2 29 3 26 3 7 17 2 413 0 0 0 100 5 0 0 6 33 10 55 1 4 2 2 1150 0 0 0 99 6 29 0 14 23 2 22 0 5 3 2 60 0 0 0 100 7 12 0 26 229 104 40 1 10 3 8 580 0 0 0 99 March 2, 2026 at 06:53:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 104 180 0 19 51 0 12 0 1 0 99 1 0 0 0 170 48 227 0 20 55 0 321 0 0 0 100 2 0 0 18 295 107 136 0 18 58 0 284 0 0 0 100 3 0 0 0 119 79 67 0 15 52 0 0 0 0 0 100 4 0 0 0 70 3 113 0 15 52 0 300 0 0 0 100 5 0 0 0 56 1 129 1 11 51 0 1076 0 0 0 99 6 0 0 7 59 2 108 0 19 68 0 0 0 0 0 100 7 0 0 9 327 104 229 0 15 55 0 555 0 1 0 99 March 2, 2026 at 06:53:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 96 0 2 0 0 0 0 1 0 99 1 0 0 0 11 1 4 1 1 0 0 300 0 0 0 100 2 0 0 18 234 105 30 0 1 0 0 267 0 0 0 100 3 0 0 0 111 51 107 0 2 0 0 0 0 0 0 100 4 0 0 0 15 4 8 0 0 0 0 301 0 0 0 100 5 0 0 0 9 1 34 0 0 0 0 1071 0 0 0 100 6 0 0 0 12 1 6 0 1 0 0 0 0 0 0 100 7 0 0 16 216 104 11 0 1 0 0 553 0 0 0 100 March 2, 2026 at 06:53:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 110 102 0 12 0 0 2 0 1 0 99 1 0 0 0 58 25 52 0 1 0 0 300 0 0 0 100 2 0 0 17 211 103 6 0 1 0 0 266 0 0 0 100 3 0 0 0 21 5 12 0 4 0 0 0 0 0 0 100 4 0 0 0 18 6 10 0 1 0 0 300 0 0 0 100 5 0 0 0 10 1 34 1 0 0 0 1072 0 0 0 100 6 0 0 0 28 9 20 0 3 0 0 0 0 0 0 100 7 0 0 17 250 107 40 1 5 0 0 553 0 0 0 100 March 2, 2026 at 06:53:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 115 111 0 16 0 0 0 0 1 0 99 1 0 0 0 83 26 72 0 12 0 0 300 0 0 0 100 2 0 0 18 232 110 27 0 4 0 0 268 0 0 0 100 3 0 0 0 32 6 28 0 3 3 0 0 0 0 0 100 4 0 0 0 11 3 4 1 0 0 0 300 0 0 0 100 5 0 0 0 10 1 36 1 0 0 0 1070 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 9 212 104 6 0 0 0 0 552 0 0 0 100 March 2, 2026 at 06:53:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 208 0 0 2230 104 290 4 34 8 5 505 3 1 0 96 1 208 0 0 160 33 208 5 26 8 1 847 2 0 0 97 2 57 0 130 281 110 127 5 19 10 2 608 1 0 0 99 3 318 0 0 145 8 226 2 19 23 4 618 2 1 0 97 4 2595 0 1 142 4 232 2 18 40 5 1091 2 1 0 97 5 685 0 0 99 11 167 9 15 32 4 1697 5 1 0 94 6 2879 0 8 192 1 365 4 28 14 10 956 2 1 0 97 7 242 0 10 342 108 234 4 20 10 8 1172 1 0 0 98 March 2, 2026 at 06:53:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 63 0 0 3194 105 1795 43 182 97 0 4096 17 4 0 79 1 26 0 0 1216 8 2024 54 189 115 0 4484 20 3 0 77 2 25 0 1348 1086 119 1668 34 125 85 0 4491 16 3 0 80 3 129 0 0 1029 74 1516 62 123 94 0 5765 40 3 0 56 4 24 0 0 912 4 1407 37 140 123 0 4511 20 3 0 78 5 51 0 0 930 3 1467 28 115 90 0 4465 13 3 0 84 6 46 0 0 909 9 1394 33 141 122 0 4150 14 2 0 84 7 200 0 9 881 116 900 11 83 76 1 3412 8 2 0 90 March 2, 2026 at 06:53:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 3039 109 1493 24 124 36 0 4427 15 4 0 82 1 34 0 0 680 4 931 56 108 76 0 6689 72 3 0 24 2 4 0 1360 973 113 1440 23 123 52 0 4060 15 3 0 81 3 10 0 0 1008 14 1604 37 138 68 0 4139 11 3 0 87 4 13 0 0 991 22 1492 17 127 34 0 3549 7 2 0 90 5 1 0 0 686 3 914 8 91 41 0 2808 6 2 0 92 6 7 0 0 997 5 1670 23 120 58 0 5028 10 2 0 87 7 7 0 10 1055 109 1345 13 86 41 0 3586 8 2 0 90 March 2, 2026 at 06:53:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 3112 106 1614 25 133 47 0 4229 17 4 0 79 1 5 0 0 920 4 1357 45 137 46 0 5231 38 3 0 59 2 2 0 1363 765 107 1053 25 119 41 0 3368 9 3 0 88 3 3 0 0 1182 8 1946 45 137 56 0 4182 14 3 0 83 4 1 0 0 1032 9 1655 29 141 39 0 3837 9 3 0 88 5 9 0 0 714 4 996 23 67 47 0 3602 13 2 0 85 6 1 0 0 837 17 1235 37 106 53 0 5039 35 2 0 62 7 12 0 9 1135 117 1446 16 94 39 0 4981 9 2 0 89 March 2, 2026 at 06:53:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2982 105 1386 30 154 51 1 5254 29 4 0 67 1 10 0 10 1138 7 1860 40 180 71 0 4244 10 3 0 87 2 1 0 1306 950 121 1442 25 113 39 0 4683 25 3 0 72 3 3 0 0 852 13 1272 46 128 56 0 4988 35 3 0 63 4 5 0 0 977 12 1464 28 129 47 0 3905 14 2 0 83 5 4 0 0 937 8 1455 22 100 80 0 3584 9 2 0 89 6 8 0 0 758 3 1089 16 113 31 0 2969 13 2 0 85 7 25 0 9 937 110 1055 11 75 45 1 3565 11 2 0 87 March 2, 2026 at 06:53:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 3055 114 1544 31 159 46 0 4440 24 4 0 72 1 2 0 0 1002 4 1574 24 171 24 0 4489 13 3 0 84 2 0 0 1305 966 108 1466 28 116 69 0 3869 26 3 0 71 3 3 0 0 958 14 1465 27 135 60 0 3914 14 3 0 84 4 5 0 0 909 18 1345 25 141 46 0 4352 9 2 0 88 5 9 0 14 700 8 960 26 64 43 0 3608 34 2 0 64 6 3 0 0 890 12 1365 23 136 63 0 3479 8 2 0 90 7 2 0 9 1082 112 1342 23 85 55 0 3288 22 2 0 76 March 2, 2026 at 06:53:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 3168 106 1694 47 153 72 0 5134 26 4 0 70 1 3 0 0 1095 18 1723 26 187 134 0 4595 17 3 0 80 2 2 0 1320 980 107 1545 15 144 113 0 4268 6 3 0 91 3 1 0 0 1216 75 1924 30 175 129 0 4189 13 3 0 84 4 3 0 0 889 4 1324 21 132 93 0 4963 23 2 0 75 5 2 0 0 862 13 1264 22 86 123 0 3936 25 2 0 73 6 0 0 14 1076 10 1789 37 144 126 0 4787 22 3 0 76 7 3 0 3 1035 109 1277 30 85 121 0 3929 18 2 0 79 March 2, 2026 at 06:53:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 7 3139 114 1730 12 158 42 0 4415 12 4 0 84 1 0 0 0 854 8 1253 38 142 76 0 5011 30 3 0 67 2 2 0 1293 899 105 1359 18 103 48 0 3662 8 3 0 89 3 0 0 0 1003 7 1661 36 134 77 0 5683 22 3 0 75 4 2 0 0 942 14 1398 26 111 34 0 4719 22 3 0 76 5 6 0 0 853 8 1260 17 77 42 0 3258 11 2 0 87 6 4 0 14 833 5 1271 38 101 59 0 5095 33 2 0 64 7 1 0 2 919 108 1022 8 73 63 0 3160 9 2 0 89 March 2, 2026 at 06:53:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3141 105 1719 24 131 39 0 4090 12 4 0 85 1 1 0 0 909 8 1409 36 133 56 0 4882 32 3 0 65 2 0 0 1269 952 110 1405 29 111 59 0 4512 29 3 0 68 3 1 0 0 891 14 1393 44 109 62 0 5951 38 3 0 59 4 1 0 0 1060 15 1721 28 147 55 0 4031 7 2 0 91 5 5 0 0 728 4 1039 13 85 27 0 2885 9 2 0 90 6 0 0 0 884 9 1362 32 118 41 0 3255 7 2 0 91 7 0 0 17 807 106 831 13 75 22 0 2904 12 2 0 87 March 2, 2026 at 06:53:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 3264 107 1969 36 183 37 0 3884 6 4 0 90 1 7 0 10 1026 16 1599 48 160 60 0 4982 32 3 0 65 2 1 0 1312 886 121 1175 42 104 58 0 4723 36 3 0 61 3 1 0 0 903 11 1407 33 125 52 0 5673 19 3 0 78 4 4 0 0 802 6 1211 21 117 54 0 4870 19 2 0 78 5 1 0 0 735 2 1038 18 90 59 0 3074 9 2 0 89 6 1 0 0 1014 8 1675 29 119 50 0 3289 6 2 0 92 7 10 0 3 830 108 804 14 56 49 0 3540 18 2 0 80 March 2, 2026 at 06:53:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 3139 109 1732 38 142 34 0 4477 25 4 0 72 1 9 0 0 821 17 1213 39 112 28 0 3457 34 3 0 64 2 0 0 1284 954 113 1385 20 95 45 0 3791 16 3 0 81 3 1 0 0 959 9 1465 54 157 60 0 3552 22 3 0 75 4 3 0 0 918 10 1393 24 127 27 0 3729 8 2 0 89 5 0 0 0 676 13 885 14 73 24 0 3457 8 2 0 90 6 26 0 0 758 9 1090 28 104 35 0 3864 16 2 0 82 7 1 0 3 899 106 982 23 70 71 0 2849 17 2 0 81 March 2, 2026 at 06:53:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2905 106 1205 31 111 82 0 5938 51 4 0 45 1 2 0 14 1211 8 2004 35 180 136 0 4338 15 3 0 82 2 0 0 1320 1006 112 1589 22 145 96 0 4221 15 3 0 82 3 9 0 0 1275 76 2027 34 173 116 0 4019 10 3 0 87 4 1 0 7 797 17 1134 23 148 112 0 3754 10 2 0 87 5 1 0 0 911 5 1397 19 111 105 0 3435 13 2 0 85 6 0 0 0 855 6 1313 33 117 101 0 5181 22 2 0 75 7 3 0 2 1010 109 1178 12 95 102 0 2894 8 2 0 90 March 2, 2026 at 06:53:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2945 103 1279 27 125 37 0 4807 28 4 0 68 1 1 0 14 1041 10 1674 43 148 77 0 5473 37 3 0 60 2 0 0 1361 1116 114 1732 18 117 60 0 3943 12 3 0 85 3 1 0 0 1030 7 1602 34 116 40 0 4005 13 3 0 85 4 0 0 0 880 24 1290 22 104 55 0 3669 14 2 0 83 5 1 0 0 688 5 926 20 84 55 0 3062 10 2 0 88 6 0 0 7 874 7 1355 16 106 75 0 5601 12 2 0 85 7 1 0 3 960 109 1086 17 60 43 0 2916 19 2 0 79 March 2, 2026 at 06:53:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3073 112 1546 30 146 53 0 4631 20 4 0 76 1 0 0 0 895 3 1367 34 148 80 0 6306 32 3 0 65 2 0 0 1319 859 109 1233 14 105 43 0 4224 19 3 0 78 3 0 0 0 1117 7 1814 30 139 44 0 4209 17 3 0 80 4 0 0 0 872 6 1302 27 120 41 0 2962 17 2 0 81 5 0 0 0 748 23 1027 23 91 70 0 3475 18 2 0 80 6 0 0 0 972 10 1575 26 133 43 0 4125 8 2 0 90 7 1 0 10 912 107 1008 16 94 32 0 3036 14 2 0 85 March 2, 2026 at 06:53:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2948 107 1294 35 129 25 0 4103 22 3 0 74 1 0 0 0 1017 17 1620 31 119 52 0 4378 17 3 0 80 2 9 0 1248 883 112 1310 24 96 39 0 5744 23 3 0 74 3 1 0 0 986 6 1575 48 143 74 0 4753 29 3 0 68 4 1 0 0 863 3 1315 36 111 39 0 3987 27 2 0 71 5 0 0 0 889 10 1359 18 85 48 0 2678 5 2 0 93 6 1 0 0 801 5 1212 22 89 30 0 4392 15 2 0 83 7 8 0 10 897 109 972 6 86 41 0 2927 6 2 0 93 March 2, 2026 at 06:53:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3007 109 1442 38 154 39 0 3790 18 3 0 78 1 0 0 14 932 10 1427 47 138 39 0 4238 40 3 0 57 2 1 0 1265 857 118 1236 24 128 31 0 4414 12 3 0 85 3 0 0 0 1025 11 1575 34 136 67 0 3580 26 3 0 71 4 0 0 7 851 11 1253 36 115 46 0 3614 18 2 0 80 5 2 0 0 707 9 992 14 82 20 0 2299 5 2 0 94 6 3 0 0 703 13 1013 26 92 37 0 3762 19 2 0 79 7 0 0 2 951 109 1099 15 88 38 0 3038 7 2 0 92 March 2, 2026 at 06:53:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3153 110 1738 40 200 84 0 3781 10 4 0 87 1 2 0 0 924 5 1360 36 162 85 0 4213 15 3 0 83 2 3 0 1320 901 111 1315 32 114 114 0 4218 29 3 0 68 3 1 0 0 1091 70 1807 63 177 106 0 5819 27 3 0 70 4 0 0 7 986 8 1551 31 138 106 0 4699 28 3 0 69 5 0 0 0 892 6 1369 30 121 128 0 3570 18 2 0 79 6 1 0 0 881 9 1389 25 146 122 0 3883 12 2 0 86 7 1 0 3 892 114 939 11 103 123 0 3065 5 2 0 93 March 2, 2026 at 06:53:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3093 117 1576 29 166 73 0 4341 17 4 0 80 1 0 0 0 954 8 1465 49 167 48 0 4610 22 3 0 76 2 0 0 1305 910 120 1289 20 109 41 0 3425 15 3 0 82 3 2 0 0 918 7 1425 41 135 50 0 4078 24 3 0 73 4 1 0 7 837 11 1199 32 117 54 0 5545 25 3 0 72 5 0 0 0 709 3 968 25 94 79 0 3241 25 2 0 73 6 1 0 0 953 4 1546 26 143 59 0 3670 12 2 0 86 7 0 0 2 1106 106 1415 24 93 52 0 4036 8 2 0 90 March 2, 2026 at 06:53:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3077 108 1557 34 166 60 0 4153 12 3 0 85 1 0 0 0 1101 11 1786 35 182 50 0 4139 7 3 0 90 2 1 0 1320 873 108 1307 29 82 40 0 5046 27 3 0 70 3 0 0 0 980 12 1496 36 129 47 0 4524 24 3 0 73 4 3 0 7 915 5 1420 32 107 43 0 6052 29 3 0 68 5 1 0 0 979 9 1507 20 82 89 0 4506 22 2 0 75 6 1 0 0 979 9 1583 18 119 34 0 3466 8 2 0 90 7 0 0 2 973 111 1134 13 77 51 0 4464 20 2 0 78 March 2, 2026 at 06:53:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3003 111 1443 29 178 50 0 4071 8 3 0 88 1 3 0 0 943 12 1429 50 135 63 0 5295 35 3 0 62 2 0 0 1265 950 112 1421 42 90 53 0 5121 33 3 0 63 3 1 0 0 1124 11 1879 32 131 61 0 4557 19 3 0 78 4 17 0 0 1191 12 2019 31 131 53 0 5929 17 3 0 80 5 0 0 0 781 3 1124 23 97 114 0 3272 15 2 0 83 6 0 0 7 719 4 1051 15 109 44 0 3770 11 2 0 87 7 1 0 1 955 106 1122 23 75 40 0 3836 11 2 0 87 March 2, 2026 at 06:53:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2985 109 1378 48 153 36 0 3872 34 3 0 62 1 2 0 0 1172 11 1915 36 187 63 0 4626 11 3 0 86 2 1 0 1291 866 105 1294 26 122 37 0 3703 16 3 0 81 3 0 0 0 835 11 1168 40 111 55 0 3709 33 2 0 64 4 0 0 0 988 23 1539 26 137 40 0 3369 10 2 0 87 5 0 0 0 854 15 1223 18 91 69 0 3378 8 2 0 90 6 3 0 0 801 12 1211 22 110 29 0 4198 14 2 0 84 7 1 0 10 836 106 839 22 71 32 0 3114 21 2 0 78 March 2, 2026 at 06:53:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3197 111 1864 41 183 84 0 4151 7 4 0 89 1 0 0 5 1005 7 1601 45 158 113 0 4841 23 3 0 74 2 0 0 1206 703 104 905 29 92 66 0 4417 29 3 0 68 3 0 0 14 947 58 1427 38 127 97 0 5168 32 3 0 65 4 2 0 0 1189 6 1985 32 160 116 0 3718 8 3 0 90 5 1 0 0 888 23 1338 15 111 145 0 3540 12 2 0 86 6 0 0 0 872 6 1375 42 115 77 0 3951 26 2 0 72 7 0 0 11 896 111 1057 15 95 87 0 4075 9 2 0 89 March 2, 2026 at 06:53:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 3193 104 1847 35 164 48 1 5312 11 4 0 85 1 13 0 0 1016 11 1574 30 133 52 0 4696 21 3 0 76 2 0 0 1295 788 102 1094 37 89 55 0 4209 31 3 0 66 3 0 0 0 990 8 1596 32 130 70 0 4216 14 3 0 84 4 0 0 0 918 14 1448 26 118 45 0 4519 20 2 0 78 5 0 0 0 771 12 1096 10 79 38 0 3472 9 2 0 89 6 0 0 0 866 13 1327 28 106 73 0 4035 21 2 0 76 7 16 0 7 948 116 1069 26 82 47 0 3885 20 2 0 79 March 2, 2026 at 06:53:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 3104 106 1654 30 153 37 0 4130 10 3 0 87 1 5 0 0 820 2 1180 38 118 49 0 4638 29 3 0 68 2 0 0 1305 837 104 1236 23 109 21 0 3372 9 3 0 88 3 1 0 0 1034 6 1682 40 119 47 0 3866 13 3 0 84 4 4 0 0 1016 11 1654 29 131 43 0 4850 8 3 0 90 5 1 0 0 621 12 808 23 68 43 0 3972 29 2 0 70 6 7 0 0 874 13 1324 27 103 39 0 4396 25 2 0 72 7 1 0 10 851 114 880 12 70 27 0 3806 21 2 0 78 March 2, 2026 at 06:53:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3089 108 1616 28 150 50 0 4597 21 4 0 75 1 0 0 0 901 11 1354 42 157 43 0 4104 20 3 0 78 2 1 0 1306 909 106 1344 23 108 38 0 3741 10 3 0 87 3 1 0 0 998 6 1591 38 125 74 0 4256 22 3 0 75 4 2 0 0 844 13 1307 30 119 34 0 4995 19 3 0 78 5 3 0 0 819 9 1207 25 91 52 0 3891 23 2 0 74 6 1 0 7 1007 7 1603 34 120 59 0 4860 22 2 0 76 7 1 0 3 848 110 875 13 77 46 0 3008 9 2 0 89 March 2, 2026 at 06:53:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3041 106 1500 24 145 20 0 3342 17 4 0 79 1 0 0 0 1049 14 1607 41 147 34 0 3502 23 3 0 74 2 3 0 1346 960 115 1420 21 110 30 0 3608 8 3 0 89 3 6 0 0 808 5 1175 37 119 27 0 3172 27 2 0 71 4 6 0 0 868 14 1248 17 124 37 0 4419 11 2 0 86 5 0 0 0 801 17 1140 16 101 36 0 2561 5 2 0 93 6 0 0 7 789 14 1106 36 107 44 0 4038 30 2 0 68 7 0 0 3 766 112 660 21 67 37 0 2718 24 1 0 74 March 2, 2026 at 06:53:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 12 3298 110 1997 45 153 84 0 4625 22 4 0 74 1 5 0 0 858 11 1255 46 113 106 0 5261 34 3 0 63 2 0 0 1306 817 108 1142 50 140 100 0 4419 33 3 0 64 3 1 0 0 1050 78 1625 32 173 126 0 3426 9 3 0 89 4 0 0 0 972 16 1533 28 166 109 0 4514 6 3 0 91 5 0 0 0 879 5 1351 22 116 114 0 2495 5 2 0 93 6 16 0 7 888 5 1383 43 136 109 0 4350 19 2 0 78 7 1 0 2 1118 109 1378 28 89 102 0 4210 17 2 0 81 March 2, 2026 at 06:53:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3056 106 1565 42 146 47 0 4063 16 3 0 81 1 3 0 0 1033 3 1663 46 146 51 0 4769 20 3 0 77 2 1 0 1264 837 106 1162 40 110 60 0 4854 38 3 0 60 3 4 0 0 1049 4 1725 19 116 46 0 4969 16 3 0 81 4 0 0 0 1097 22 1799 27 134 33 0 5291 14 3 0 84 5 0 0 0 809 16 1154 21 85 44 0 3393 18 2 0 80 6 1 0 0 747 6 1088 25 101 52 0 3504 13 2 0 85 7 0 0 9 838 108 868 16 57 18 0 3567 12 2 0 86 March 2, 2026 at 06:53:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3076 106 1597 25 137 49 0 4543 22 4 0 74 1 0 0 14 980 8 1529 20 134 40 0 4550 20 3 0 78 2 1 0 1306 865 112 1225 18 96 46 0 3854 18 3 0 79 3 0 0 0 917 4 1453 44 128 50 0 5549 21 3 0 76 4 0 0 0 931 12 1427 25 133 34 0 4384 16 2 0 81 5 2 0 0 714 6 1019 18 68 51 0 3767 17 2 0 81 6 0 0 0 909 9 1421 29 105 33 0 3453 17 2 0 81 7 0 0 9 992 115 1153 13 70 42 0 3937 15 2 0 84 March 2, 2026 at 06:53:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3058 104 1499 20 128 59 0 3972 16 4 0 80 1 1 0 0 1104 7 1727 25 156 24 0 4121 10 3 0 87 2 0 0 1348 992 122 1508 29 129 54 0 3653 8 3 0 89 3 1 0 0 977 11 1546 36 83 48 0 6383 41 3 0 56 4 0 0 7 937 14 1409 32 155 50 0 4062 14 3 0 83 5 2 0 0 744 4 1028 18 78 26 0 3838 26 2 0 72 6 2 0 0 884 8 1360 42 126 50 0 3529 29 2 0 69 7 0 0 2 953 106 1080 17 75 28 0 2686 6 2 0 92 March 2, 2026 at 06:53:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3048 107 1518 33 130 41 0 3605 20 3 0 77 1 3 0 0 996 9 1567 25 143 37 0 3762 11 3 0 86 2 0 0 1333 701 106 948 20 79 30 0 3231 21 3 0 77 3 0 0 7 940 7 1493 35 106 32 0 5032 26 3 0 71 4 2 0 0 855 17 1285 24 150 50 0 3942 11 2 0 87 5 0 0 0 788 19 1121 21 95 33 0 2812 15 2 0 84 6 3 0 0 785 8 1116 43 111 39 0 3846 37 2 0 61 7 0 0 3 896 120 864 17 83 24 0 2462 5 1 0 94 March 2, 2026 at 06:53:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3086 106 1608 42 174 111 0 4368 22 4 0 75 1 4 0 0 1126 19 1756 40 191 53 0 4614 17 3 0 80 2 0 0 1278 957 107 1476 34 139 65 0 3909 17 3 0 80 3 0 0 0 1144 69 1858 37 164 119 0 4866 9 3 0 88 4 2 0 7 905 8 1411 34 130 62 0 4477 14 2 0 83 5 0 0 0 852 2 1306 24 113 90 0 3064 9 2 0 89 6 4 0 0 687 7 976 33 127 82 0 4714 34 2 0 64 7 3 0 2 1075 112 1302 28 101 109 0 4236 24 2 0 74 March 2, 2026 at 06:53:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 3325 102 2121 37 152 42 0 5244 19 4 0 77 1 7 0 0 1141 3 1877 39 176 66 0 4482 15 3 0 82 2 3 0 1323 807 105 1096 19 110 43 0 3492 16 3 0 82 3 0 0 0 875 15 1307 45 104 57 0 4665 34 3 0 64 4 4 0 7 960 16 1441 19 124 48 0 3491 7 2 0 90 5 40 0 14 862 14 1264 21 92 84 0 4317 15 2 0 82 6 10 0 0 914 8 1464 22 86 56 0 5659 18 3 0 79 7 0 0 7 803 117 738 25 78 51 0 3665 22 2 0 76 March 2, 2026 at 06:53:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 14 3051 109 1443 42 132 26 0 3936 28 4 0 68 1 10 0 0 1142 6 1790 37 150 41 0 4181 15 3 0 82 2 17 0 1347 861 105 1228 30 109 34 0 3823 16 3 0 81 3 10 0 0 814 10 1128 39 120 38 0 4016 36 2 0 61 4 21 0 7 858 9 1276 26 124 21 0 4241 13 2 0 84 5 2 0 14 859 17 1267 21 82 54 0 3473 13 2 0 85 6 9 0 0 1026 7 1655 36 123 58 0 4868 11 3 0 86 7 1 0 3 1002 118 1167 23 68 26 0 3447 17 2 0 81 March 2, 2026 at 06:53:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3228 113 1880 34 156 48 0 3916 14 4 0 82 1 2 0 0 852 7 1269 48 110 36 0 5578 39 3 0 58 2 0 0 1335 1093 109 1716 25 119 53 0 3767 18 3 0 79 3 0 0 0 1111 16 1773 28 133 35 0 3705 8 3 0 90 4 0 0 7 1034 7 1662 37 124 46 0 5645 12 3 0 85 5 0 0 0 596 6 721 18 80 30 0 3456 11 2 0 87 6 0 0 14 781 9 1157 37 127 41 0 4114 20 2 0 78 7 0 0 2 929 105 1057 30 85 50 0 4216 26 2 0 72 March 2, 2026 at 06:53:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3043 110 1492 37 160 53 0 3611 17 3 0 80 1 0 0 0 1184 16 1914 47 161 60 0 4058 10 3 0 87 2 0 0 1292 801 110 1139 15 95 28 0 3141 14 3 0 84 3 0 0 0 679 5 921 54 91 42 0 4265 49 2 0 49 4 0 0 7 1016 17 1586 31 152 32 0 3481 6 2 0 92 5 0 0 0 769 16 1094 21 89 59 0 4322 10 2 0 88 6 1 0 14 905 13 1371 22 94 34 0 3756 15 2 0 83 7 0 0 2 750 109 642 16 61 21 0 2635 25 1 0 74 March 2, 2026 at 06:53:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3186 109 1838 58 175 110 0 4394 23 4 0 73 1 0 0 0 1000 3 1575 40 176 117 0 4881 25 3 0 72 2 4 0 1249 841 106 1225 23 98 104 0 4611 25 3 0 72 3 2 0 0 1015 54 1541 65 176 65 0 4873 28 3 0 69 4 0 0 7 914 17 1416 29 166 108 0 3848 15 2 0 82 5 1 0 0 874 12 1318 19 115 94 0 3552 12 2 0 86 6 1 0 14 846 11 1275 26 132 84 0 4427 12 2 0 86 7 0 0 2 918 114 1040 22 111 76 0 2671 6 1 0 93 March 2, 2026 at 06:53:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3030 108 1474 42 142 47 0 3714 32 3 0 65 1 2 0 7 1072 11 1734 29 180 39 0 4502 11 3 0 86 2 2 0 1264 916 116 1383 28 120 35 0 3430 15 3 0 82 3 1 0 0 875 5 1302 34 110 71 0 4249 32 3 0 65 4 3 0 0 840 8 1224 24 129 37 0 3130 8 2 0 89 5 0 0 0 826 11 1246 17 93 34 0 3277 8 2 0 90 6 3 0 14 764 6 1142 32 103 31 0 4629 20 2 0 78 7 0 0 2 817 111 808 18 64 109 0 3378 21 2 0 78 March 2, 2026 at 06:53:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2968 106 1309 32 119 66 0 5360 36 4 0 60 1 0 0 7 1221 17 2016 45 169 67 0 5254 15 3 0 82 2 17 0 1335 956 111 1388 24 118 37 0 3306 10 3 0 87 3 1 0 0 905 13 1367 41 132 45 0 4445 26 3 0 71 4 3 0 0 958 6 1490 13 108 45 0 3579 9 2 0 89 5 2 0 0 732 3 1031 12 79 60 0 3154 8 2 0 90 6 3 0 14 898 7 1425 18 73 39 0 4544 21 2 0 76 7 3 0 2 907 105 1038 19 66 35 0 4542 20 2 0 78 March 2, 2026 at 06:53:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 5 2918 103 1193 25 153 32 0 4304 14 3 0 82 1 1 0 7 1204 11 1971 41 171 45 0 4495 9 3 0 88 2 0 0 1305 989 115 1497 29 124 37 0 2832 5 3 0 92 3 5 0 0 972 5 1533 35 111 73 0 5103 27 3 0 70 4 1 0 0 723 12 956 43 90 55 0 4904 55 2 0 42 5 0 0 0 844 12 1235 12 88 39 0 3210 11 2 0 87 6 0 0 14 1017 6 1678 45 100 47 0 5275 18 2 0 80 7 0 0 2 923 104 1094 14 76 58 0 3725 7 2 0 91 March 2, 2026 at 06:53:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3137 105 1671 30 148 25 0 3559 18 3 0 79 1 1 0 0 1038 22 1590 44 173 41 0 4237 25 3 0 72 2 2 0 1312 906 109 1309 31 117 41 0 4049 24 3 0 74 3 3 0 0 772 7 1123 28 137 32 0 3312 19 2 0 78 4 1 0 0 869 13 1257 20 116 39 0 3257 10 2 0 87 5 1 0 0 730 13 1024 14 84 47 0 3244 9 2 0 89 6 1 0 14 846 14 1285 21 119 36 0 3578 13 2 0 85 7 1 0 3 913 108 1038 26 73 23 0 4016 28 2 0 70 March 2, 2026 at 06:53:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3002 106 1414 34 184 74 0 4130 23 4 0 74 1 4 0 0 1005 13 1597 50 141 52 0 3982 33 3 0 65 2 37 0 1200 878 110 1250 18 126 108 0 3873 12 3 0 85 3 0 0 0 1011 78 1612 41 181 127 0 3541 22 3 0 76 4 3 0 0 850 6 1333 31 124 88 0 3634 29 2 0 68 5 1 0 0 715 9 1014 17 116 91 0 3086 8 2 0 90 6 2 0 14 911 8 1437 31 131 81 0 3321 15 2 0 83 7 42 0 2 909 111 1071 18 91 89 0 3607 4 2 0 94 March 2, 2026 at 06:53:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3100 103 1616 30 154 35 0 3765 10 4 0 87 1 11 0 0 1069 16 1703 27 145 83 0 4643 15 3 0 82 2 1 0 1292 1021 115 1551 35 123 40 0 4423 11 3 0 86 3 3 0 7 881 7 1324 56 102 105 0 6324 46 3 0 50 4 11 0 0 856 12 1253 37 116 40 0 5669 41 3 0 56 5 0 0 0 858 9 1254 12 104 56 0 3318 6 2 0 92 6 2 0 14 984 7 1556 26 117 42 0 4173 13 2 0 84 7 0 0 3 903 110 994 15 72 78 0 2558 6 2 0 93 March 2, 2026 at 06:53:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3071 102 1554 43 141 60 0 5638 44 4 0 52 1 9 0 0 1121 8 1783 44 178 62 0 5041 21 3 0 76 2 5 0 1362 1021 112 1562 32 150 88 0 5275 15 3 0 82 3 0 0 7 1103 8 1792 46 156 88 0 5678 32 3 0 65 4 0 0 0 960 5 1469 13 152 44 0 4443 8 3 0 89 5 8 0 0 901 4 1342 20 104 52 0 3754 11 2 0 87 6 1 0 14 965 13 1490 27 141 65 0 4315 14 2 0 83 7 0 0 2 984 120 1112 14 96 52 0 2904 8 2 0 91 March 2, 2026 at 06:53:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3057 109 1571 31 158 51 0 3779 10 4 0 86 1 1 0 0 869 11 1249 56 104 78 0 6115 50 3 0 47 2 2 0 1263 1000 110 1475 21 108 40 0 4390 12 3 0 85 3 1 0 7 1052 8 1761 51 144 53 0 4580 12 3 0 85 4 2 0 0 800 8 1199 36 107 40 0 5403 34 3 0 63 5 1 0 0 725 2 1027 12 78 61 0 2912 6 2 0 92 6 8 0 0 1056 10 1744 27 140 39 0 3522 6 2 0 92 7 0 0 17 883 116 958 21 85 40 0 3258 15 2 0 84 March 2, 2026 at 06:53:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 21 3158 109 1712 47 164 31 0 3933 12 4 0 84 1 4 0 0 853 19 1216 30 128 28 0 3433 23 3 0 75 2 0 0 1306 1032 115 1526 41 133 43 0 3887 8 3 0 89 3 3 0 7 792 9 1098 53 119 36 0 3953 30 2 0 68 4 3 0 0 928 20 1379 37 132 42 0 3442 17 2 0 81 5 1 0 0 699 11 946 23 79 26 0 4231 19 2 0 79 6 2 0 0 956 6 1490 38 119 48 0 3592 13 2 0 85 7 0 0 17 885 107 936 15 65 39 0 2953 25 2 0 74 March 2, 2026 at 06:53:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3215 105 1861 41 154 81 0 4346 14 4 0 82 1 4 0 0 874 6 1331 48 136 61 0 5205 34 3 0 63 2 3 0 1290 840 111 1181 22 115 107 0 3706 24 3 0 73 3 1 0 7 1146 82 1715 45 141 89 0 4022 14 3 0 84 4 1 0 0 937 9 1418 26 129 107 0 3479 9 2 0 89 5 0 0 0 824 11 1214 20 107 90 0 3950 5 2 0 93 6 0 0 0 912 1 1452 36 114 96 0 4356 19 2 0 79 7 0 0 17 966 104 1127 33 80 81 0 4401 28 2 0 70 March 2, 2026 at 06:53:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2909 103 1221 27 114 55 0 4519 24 3 0 73 1 2 0 0 1024 4 1626 37 145 48 0 4597 24 3 0 72 2 1 0 1304 893 111 1312 29 100 61 0 5138 21 3 0 76 3 1 0 7 1062 10 1711 42 147 54 0 4623 18 3 0 79 4 4 0 0 941 13 1450 23 130 53 0 4927 18 3 0 80 5 2 0 0 810 8 1212 16 89 55 0 3814 14 2 0 84 6 1 0 0 834 11 1238 27 110 48 0 3676 21 2 0 77 7 1 0 17 1126 110 1421 19 84 42 0 3094 6 2 0 92 March 2, 2026 at 06:53:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3015 107 1473 30 145 58 0 4358 22 3 0 74 1 1 0 0 1075 9 1706 45 140 40 0 4850 25 3 0 72 2 1 0 1307 952 113 1440 31 126 60 0 4747 20 3 0 77 3 1 0 7 961 8 1511 43 129 69 0 4748 24 3 0 73 4 2 0 0 838 14 1219 27 119 55 0 3962 23 2 0 75 5 0 0 0 701 10 944 22 84 44 0 3184 17 2 0 81 6 1 0 0 922 4 1533 29 127 33 0 4364 8 2 0 90 7 0 0 16 915 104 1022 17 93 55 0 3248 6 2 0 93 March 2, 2026 at 06:53:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 0 2361 109 494 4 52 11 0 1113 3 2 0 96 1 132 0 0 305 5 503 10 48 15 1 923 4 1 0 95 2 3 0 284 334 103 218 10 20 8 0 1137 17 1 0 83 3 149 0 7 257 4 392 12 42 13 0 1704 6 1 0 93 4 71 0 0 177 5 235 2 24 7 1 851 4 0 0 96 5 1 0 0 192 2 282 5 18 9 0 816 2 0 0 98 6 51 0 0 231 33 331 5 34 15 0 2012 3 1 0 97 7 4 0 16 383 112 243 6 22 11 0 1314 5 1 0 95 March 2, 2026 at 06:53:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 112 103 0 20 0 0 3 0 1 0 99 1 0 0 0 81 29 70 0 11 1 0 3 0 0 0 100 2 0 0 4 244 110 34 0 11 0 0 0 0 0 0 100 3 0 0 7 30 4 32 0 0 0 0 577 0 0 0 100 4 0 0 0 19 5 14 1 0 0 0 298 0 0 0 100 5 0 0 0 26 8 20 0 2 0 0 9 0 0 0 100 6 0 0 0 36 11 60 2 0 0 0 1159 0 0 0 99 7 0 0 16 219 104 16 1 1 0 0 571 0 0 0 100 March 2, 2026 at 06:53:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 101 217 0 15 47 0 0 0 1 0 99 1 0 0 0 133 36 186 1 25 61 0 1 0 0 0 100 2 0 0 4 268 102 110 0 14 72 0 0 0 0 0 100 3 0 0 7 135 69 194 0 20 58 0 561 0 0 0 100 4 0 0 0 68 6 116 1 15 60 0 295 0 0 0 100 5 0 0 0 55 1 91 1 12 47 0 0 0 0 0 100 6 0 0 0 89 21 157 1 13 48 0 1140 0 0 0 99 7 0 0 16 246 104 70 1 10 45 0 566 0 0 0 100 March 2, 2026 at 06:53:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 107 91 0 12 0 0 0 0 1 0 99 1 0 0 0 58 23 52 0 5 1 0 0 0 0 0 100 2 0 0 7 221 102 12 0 3 1 0 0 0 0 0 100 3 0 0 7 25 5 16 1 0 1 0 561 0 0 0 100 4 0 0 0 19 7 10 0 0 1 0 295 0 0 0 100 5 0 0 0 16 5 8 0 0 1 0 4 0 0 0 100 6 0 0 0 52 23 72 0 0 1 0 1140 0 0 0 99 7 0 0 21 242 110 32 1 5 1 0 567 0 0 0 100 March 2, 2026 at 06:53:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 18 2124 110 122 0 15 3 0 14 0 1 0 99 1 4 0 8 94 34 85 0 10 0 0 29 0 0 0 100 2 1 0 10 253 112 46 0 17 2 5 45 0 0 0 100 3 20 0 9 43 3 43 0 10 11 4 611 0 0 0 100 4 292 0 7 32 5 29 2 9 18 3 429 0 0 0 100 5 5 0 0 34 4 22 1 4 1 1 18 0 0 0 100 6 14 0 7 38 5 79 1 8 2 6 1127 0 1 0 99 7 29 0 32 230 104 44 0 8 5 5 592 0 0 0 100 March 2, 2026 at 06:54:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 107 0 13 0 0 0 0 1 0 99 1 0 0 7 75 30 68 0 5 0 0 0 0 0 0 100 2 0 0 4 230 105 19 0 6 0 0 0 0 0 0 100 3 0 0 7 44 10 38 0 3 0 0 560 0 0 0 100 4 0 0 0 24 8 16 1 1 0 0 298 0 0 0 100 5 0 0 0 12 2 8 0 1 0 0 5 0 0 0 100 6 0 0 0 11 2 34 1 0 1 0 1071 0 0 0 100 7 0 0 16 218 104 12 0 1 0 0 567 0 0 0 100 March 2, 2026 at 06:54:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2123 115 55 0 8 0 0 0 0 1 0 99 1 0 0 0 25 3 20 0 5 0 0 0 0 0 0 100 2 0 0 3 209 101 2 0 1 0 0 0 0 0 0 100 3 0 0 7 22 3 18 0 1 0 0 559 0 0 0 100 4 0 0 0 25 8 18 0 0 0 0 302 0 0 0 100 5 0 0 0 105 21 91 0 4 0 0 8 0 0 0 100 6 0 0 0 71 20 96 1 3 0 0 1083 0 0 0 100 7 0 0 17 218 104 12 0 0 0 0 566 0 0 0 100 March 2, 2026 at 06:54:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2123 110 112 0 11 0 0 9 0 1 0 99 1 0 0 0 59 17 54 0 7 0 0 0 0 0 0 100 2 0 0 4 234 109 27 0 6 0 0 18 0 0 0 100 3 0 0 7 59 20 52 1 2 1 0 560 0 0 0 100 4 0 0 0 18 6 12 0 0 1 0 294 0 0 0 100 5 0 0 0 13 2 10 0 0 1 0 2 0 0 0 100 6 0 0 0 14 3 38 1 0 3 0 1093 0 0 0 100 7 0 0 16 216 104 10 1 2 0 0 566 0 0 0 100 March 2, 2026 at 06:54:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 113 100 0 6 0 0 0 0 1 0 99 1 0 0 0 88 28 82 0 5 0 0 0 0 0 0 100 2 0 0 3 241 110 38 0 5 0 0 0 0 0 0 100 3 0 0 7 20 3 16 0 1 0 0 559 0 0 0 100 4 0 0 0 16 6 10 0 0 0 0 295 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 32 1 0 1 0 1070 0 0 0 100 7 0 0 17 213 104 8 0 0 0 0 566 0 0 0 100 March 2, 2026 at 06:54:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 521 0 19 2427 112 607 19 98 20 5 1780 14 2 0 85 1 2978 0 8 367 17 537 24 87 32 10 2789 28 1 0 70 2 424 0 410 438 106 426 18 77 36 9 2297 19 1 0 80 3 283 0 0 313 3 466 28 97 63 4 2830 29 1 0 70 4 2694 0 1 337 13 449 27 104 70 4 2968 17 2 0 81 5 768 0 7 280 12 408 12 69 33 5 2398 11 1 0 88 6 103 0 0 264 5 403 13 82 29 2 3203 15 1 0 84 7 374 0 17 448 104 348 11 56 51 6 2542 10 1 0 89 March 2, 2026 at 06:54:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 301 0 0 2319 102 307 16 50 38 0 1676 15 1 0 83 1 205 0 0 218 11 277 14 56 31 1 1915 28 1 0 71 2 8 0 281 426 111 299 11 50 7 0 1305 13 1 0 87 3 168 0 0 251 14 311 23 54 23 1 1971 38 1 0 61 4 101 0 0 257 11 286 17 64 42 0 1430 30 1 0 70 5 47 0 75 227 10 301 27 53 22 0 1796 20 1 0 79 6 5 0 0 249 7 332 33 52 3 0 1693 48 1 0 52 7 94 0 17 392 109 301 10 44 8 0 2702 7 1 0 92 March 2, 2026 at 06:54:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2387 107 433 23 81 45 0 2186 33 2 0 65 1 55 0 0 368 7 519 27 96 42 0 2622 35 1 0 64 2 28 0 493 484 115 473 24 77 50 0 2782 28 1 0 70 3 40 0 0 382 6 539 34 103 10 0 3347 39 1 0 60 4 35 0 0 357 13 491 20 92 47 0 2234 18 1 0 81 5 55 0 0 320 15 400 17 72 28 0 2035 20 1 0 79 6 113 0 7 332 8 492 13 88 38 0 3145 13 1 0 86 7 152 0 17 486 111 349 19 59 13 0 3308 18 1 0 80 March 2, 2026 at 06:54:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 73 0 0 2346 104 398 20 79 47 0 1229 13 1 0 86 1 71 0 0 267 12 355 29 84 93 0 1579 27 1 0 72 2 64 0 284 456 108 384 20 66 48 0 1981 22 1 0 77 3 9 0 0 364 72 497 23 94 81 0 2069 26 1 0 73 4 39 0 0 293 8 410 32 80 72 0 1991 33 1 0 66 5 136 0 0 221 2 309 20 56 114 0 1599 33 1 0 66 6 6 0 0 292 17 437 24 86 82 0 2789 34 1 0 66 7 32 0 23 465 115 385 8 56 71 0 1522 9 1 0 90 March 2, 2026 at 06:54:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2424 110 475 17 79 17 0 2108 17 2 0 81 1 155 0 33 388 8 558 27 97 33 0 2877 33 1 0 65 2 104 0 536 492 118 456 27 77 29 0 3212 33 1 0 66 3 33 0 0 351 12 471 20 93 18 0 2974 25 1 0 74 4 73 0 0 360 10 477 28 88 21 0 3663 33 1 0 66 5 108 0 0 295 6 341 26 59 30 0 2040 25 1 0 74 6 2 0 0 335 13 426 19 85 33 0 2308 25 1 0 75 7 5 0 24 516 118 412 14 58 36 0 2412 16 1 0 83 March 2, 2026 at 06:54:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2336 105 353 14 50 13 0 1265 25 1 0 74 1 12 0 0 269 10 381 27 69 24 0 1816 30 1 0 69 2 33 0 312 390 108 290 29 53 27 0 2080 33 1 0 66 3 56 0 0 251 12 295 27 60 11 0 2020 47 1 0 53 4 38 0 0 228 9 469 20 69 16 0 3312 31 1 0 68 5 79 0 0 215 18 244 12 46 13 0 1668 13 1 0 86 6 47 0 7 214 8 256 11 54 33 0 1596 17 0 0 82 7 3 0 16 420 113 283 4 39 1 0 1485 4 0 0 96 March 2, 2026 at 06:54:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35 0 0 2418 106 470 31 96 29 0 2965 31 2 0 67 1 104 0 0 388 15 568 22 114 14 0 2707 22 1 0 76 2 31 0 496 457 106 424 23 77 76 0 2736 32 1 0 66 3 33 0 0 352 12 461 32 97 14 0 3129 38 1 0 61 4 31 0 14 383 15 561 28 108 28 0 3724 24 1 0 74 5 46 0 0 336 8 436 19 73 13 0 2259 22 1 0 77 6 43 0 7 346 8 463 12 88 68 0 2867 14 1 0 85 7 107 0 3 505 111 413 15 78 18 0 1861 17 1 0 82 March 2, 2026 at 06:54:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2293 101 265 24 53 16 0 2009 42 1 0 57 1 37 0 0 259 9 351 13 69 25 0 1461 11 1 0 88 2 86 0 283 409 116 327 7 53 20 0 1356 6 1 0 93 3 7 0 0 227 10 298 19 52 24 0 1900 22 1 0 78 4 125 0 14 238 18 285 15 55 10 0 1686 18 1 0 82 5 4 0 0 242 14 309 22 43 31 0 2660 34 1 0 65 6 3 0 7 197 12 245 26 51 25 0 2041 42 1 0 58 7 2 0 3 405 106 258 19 49 20 0 1269 23 0 0 76 March 2, 2026 at 06:54:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2446 107 543 31 113 51 0 2532 30 2 0 69 1 30 0 0 392 5 557 25 123 98 0 2979 18 1 0 80 2 2 0 494 475 109 443 15 88 59 0 2305 24 1 0 75 3 38 0 0 429 68 563 33 99 100 0 3618 36 1 0 62 4 21 0 21 418 12 613 15 122 86 0 3041 12 1 0 86 5 59 0 0 373 16 541 31 92 92 0 3654 35 1 0 63 6 46 0 0 433 8 655 28 111 95 0 2672 33 1 0 66 7 3 0 2 531 112 471 11 85 82 0 1686 15 1 0 84 March 2, 2026 at 06:54:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2402 110 458 27 92 10 0 2087 24 2 0 75 1 5 0 12 357 11 479 24 89 11 0 2576 26 1 0 73 2 5 0 494 429 107 343 24 70 39 0 2424 28 1 0 71 3 10 0 0 358 12 451 25 80 8 0 2865 35 1 0 64 4 4 0 21 296 11 360 22 77 8 0 2506 31 1 0 68 5 8 0 0 284 8 383 14 64 13 0 2618 19 1 0 80 6 5 0 0 286 3 390 29 80 33 0 2213 26 1 0 73 7 46 0 2 503 115 367 11 64 5 0 1714 15 1 0 84 March 2, 2026 at 06:54:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2351 108 376 24 76 31 0 1844 34 1 0 64 1 3 0 0 298 11 367 24 71 8 0 2728 35 1 0 64 2 31 0 394 421 115 331 21 56 5 0 1968 28 1 0 71 3 5 0 0 308 15 398 23 85 42 0 2270 24 1 0 75 4 2 0 21 296 13 394 13 74 21 0 2425 18 1 0 82 5 30 0 0 261 6 352 11 58 7 0 2794 15 1 0 84 6 2 0 0 255 5 340 21 69 2 0 1754 20 1 0 80 7 66 0 4 431 106 284 20 50 33 0 2186 32 1 0 67 March 2, 2026 at 06:54:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2391 105 425 29 81 8 0 2116 31 2 0 67 1 4 0 0 352 7 469 26 92 39 0 3664 39 1 0 59 2 3 0 521 455 107 412 27 74 52 0 2696 29 1 0 70 3 5 0 0 338 8 460 25 86 13 0 2974 28 1 0 71 4 2 0 14 337 15 456 17 86 17 0 2677 16 1 0 83 5 5 0 7 329 13 434 16 72 48 0 3864 12 1 0 87 6 4 0 0 364 13 540 18 92 64 0 2298 29 1 0 70 7 6 0 3 520 110 415 20 69 16 0 1842 16 1 0 84 March 2, 2026 at 06:54:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 63 0 0 2337 110 360 18 71 10 0 1647 16 1 0 82 1 38 0 0 260 10 334 28 68 13 0 2072 35 1 0 64 2 3 0 325 436 119 353 15 58 15 0 2175 23 1 0 76 3 62 0 0 242 7 295 26 54 47 0 2026 34 1 0 65 4 68 0 14 231 6 296 27 63 7 0 2358 42 1 0 57 5 35 0 0 206 14 233 19 47 9 0 2714 21 1 0 78 6 30 0 7 243 10 336 10 64 15 0 1874 12 1 0 87 7 37 0 3 421 109 253 12 46 49 0 1389 20 0 0 80 March 2, 2026 at 06:54:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2452 109 520 22 103 79 0 2432 23 2 0 76 1 1 0 0 427 8 610 23 112 72 0 2748 26 1 0 72 2 76 0 549 519 112 505 23 91 83 0 2905 22 1 0 76 3 2 0 0 430 50 569 25 117 88 0 3331 27 1 0 72 4 3 0 14 330 7 436 33 93 52 0 3025 36 1 0 63 5 1 0 0 357 12 497 22 92 70 0 3327 20 1 0 79 6 38 0 7 427 10 655 30 135 64 0 3209 26 1 0 72 7 2 0 2 607 116 583 17 92 73 0 2101 22 1 0 77 March 2, 2026 at 06:54:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 7 2403 109 428 24 87 7 0 2678 25 2 0 74 1 6 0 24 356 10 481 19 95 46 0 2311 26 1 0 73 2 11 0 511 510 110 507 25 86 19 0 2110 22 1 0 77 3 1 0 0 347 7 430 40 78 16 0 3188 48 1 0 51 4 21 0 14 384 14 513 14 92 8 0 2532 14 1 0 85 5 15 0 0 309 14 402 20 51 39 0 3659 30 1 0 68 6 23 0 0 324 11 440 23 95 22 0 2959 23 1 0 76 7 1 0 0 492 111 365 14 56 16 0 1788 14 1 0 85 March 2, 2026 at 06:54:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 7 2354 112 419 20 63 7 0 2340 25 1 0 74 1 4 0 0 275 12 353 27 74 40 0 2367 44 1 0 55 2 73 0 326 410 108 319 23 65 27 0 1682 20 1 0 79 3 4 0 0 254 12 315 27 68 26 0 2289 32 1 0 68 4 1 0 14 240 15 335 10 54 5 0 2528 15 1 0 84 5 0 0 0 211 6 259 12 48 31 0 1975 12 1 0 87 6 6 0 0 229 7 310 17 71 23 0 1996 30 1 0 69 7 28 0 2 433 110 292 21 52 17 0 1921 22 1 0 78 March 2, 2026 at 06:54:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2409 106 455 32 69 19 0 3068 40 2 0 59 1 1 0 0 399 9 558 26 105 30 0 3064 37 1 0 62 2 2 0 494 463 112 434 20 83 23 0 2012 17 1 0 82 3 1 0 7 352 11 496 22 90 29 0 2931 33 1 0 66 4 0 0 0 366 18 480 20 96 13 0 2490 18 1 0 81 5 0 0 0 344 13 500 13 85 7 0 3537 9 1 0 90 6 1 0 0 352 9 485 15 97 29 0 2775 17 1 0 82 7 2 0 16 463 105 324 21 58 26 0 3070 30 1 0 69 March 2, 2026 at 06:54:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2399 107 453 27 87 60 0 2723 32 2 0 66 1 0 0 14 373 11 536 26 103 39 0 2940 23 1 0 76 2 0 0 493 485 113 456 14 79 38 0 2220 22 1 0 77 3 3 0 7 323 9 434 27 88 12 0 3128 34 1 0 65 4 7 0 0 348 12 459 21 88 49 0 2948 24 1 0 75 5 2 0 0 346 16 480 21 73 28 0 3335 15 1 0 84 6 0 0 0 358 6 500 29 89 23 0 2540 38 1 0 62 7 1 0 3 501 108 382 15 65 20 0 2128 14 1 0 85 March 2, 2026 at 06:54:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2409 105 468 31 103 33 0 2922 31 2 0 68 1 2 0 0 372 6 516 28 110 66 0 2474 27 1 0 72 2 1 0 423 500 111 484 26 107 74 0 2259 21 1 0 78 3 1 0 7 466 82 683 38 132 94 0 2663 33 1 0 66 4 42 0 0 388 9 553 21 122 39 0 2231 18 1 0 81 5 39 0 0 312 9 437 20 82 91 0 1972 29 1 0 71 6 2 0 0 375 7 605 29 117 95 0 3571 26 1 0 73 7 51 0 3 513 115 407 12 81 96 0 1604 21 1 0 78 March 2, 2026 at 06:54:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2371 108 410 24 83 23 0 2112 28 2 0 70 1 37 0 0 340 8 475 26 89 10 0 2601 25 1 0 74 2 0 0 423 417 113 330 16 72 47 0 2479 19 1 0 80 3 1 0 7 278 9 352 22 79 52 0 3114 31 1 0 68 4 1 0 0 317 12 411 16 93 13 0 2231 23 1 0 76 5 1 0 0 267 8 328 13 65 7 0 1506 14 1 0 85 6 2 0 0 291 8 433 32 66 57 0 3669 37 1 0 62 7 3 0 3 474 111 377 14 67 53 0 1802 23 1 0 76 March 2, 2026 at 06:54:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2427 118 493 25 92 14 0 2520 21 2 0 77 1 1 0 6 393 13 528 31 101 6 0 3130 33 1 0 66 2 0 0 591 436 108 375 26 67 35 0 2895 42 1 0 57 3 1 0 0 356 8 480 24 107 31 0 2598 24 1 0 75 4 0 0 7 361 14 464 15 91 9 0 2975 21 1 0 78 5 0 0 0 344 10 448 7 66 3 0 1848 9 1 0 90 6 0 0 0 324 8 402 23 75 16 0 2182 29 1 0 70 7 0 0 3 501 113 387 18 63 29 0 3744 22 1 0 77 March 2, 2026 at 06:54:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 0 2437 110 514 18 95 19 0 2658 17 2 0 81 1 1 0 7 362 2 512 23 98 28 0 2994 23 1 0 76 2 0 0 549 481 116 472 22 91 11 0 2164 20 1 0 79 3 0 0 0 384 16 512 25 105 58 0 2637 24 1 0 75 4 0 0 0 362 13 471 25 94 12 0 2814 36 1 0 63 5 2 0 0 338 7 430 24 76 32 0 2357 34 1 0 66 6 15 0 0 356 7 492 20 105 21 0 3148 24 1 0 75 7 1 0 4 500 106 422 24 74 61 0 3503 22 1 0 77 March 2, 2026 at 06:54:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 0 2461 110 538 28 95 18 0 2593 29 2 0 70 1 2 0 0 384 12 540 24 125 36 0 2985 26 1 0 73 2 1 0 604 477 109 441 21 81 13 0 2126 23 1 0 76 3 2 0 14 392 6 519 30 100 27 0 3502 44 1 0 55 4 0 0 7 360 15 470 16 111 20 0 3099 22 1 0 77 5 0 0 0 327 15 395 12 75 19 0 2130 11 1 0 88 6 0 0 0 360 7 447 32 82 14 0 2883 31 1 0 68 7 1 0 3 519 111 427 14 72 30 0 3222 15 1 0 84 March 2, 2026 at 06:54:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2462 108 570 29 102 81 0 2899 33 2 0 65 1 0 0 0 462 7 683 30 110 71 0 2309 29 1 0 70 2 2 0 522 495 106 482 22 91 102 0 2311 29 1 0 70 3 1 0 0 448 81 587 18 102 79 0 2630 19 1 0 80 4 31 0 21 431 18 619 30 118 113 0 3757 27 1 0 72 5 0 0 0 340 14 436 26 72 97 0 2360 34 1 0 65 6 0 0 0 378 4 533 30 114 93 0 2265 21 1 0 78 7 0 0 2 580 114 546 15 90 99 0 3284 10 1 0 89 March 2, 2026 at 06:54:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2417 107 447 22 87 37 0 2394 23 2 0 75 1 1 0 0 397 18 518 16 105 7 0 2084 15 1 0 84 2 1 0 553 439 108 401 17 76 29 0 2557 20 1 0 79 3 0 0 0 361 11 489 19 96 25 0 2637 24 1 0 75 4 0 0 7 358 16 446 25 99 37 0 3546 41 1 0 58 5 0 0 14 315 7 410 21 88 11 0 2534 22 1 0 77 6 0 0 0 356 10 474 27 82 39 0 2646 32 1 0 67 7 0 0 7 527 115 413 25 67 39 0 3640 28 1 0 71 March 2, 2026 at 06:54:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2392 107 431 23 78 35 0 2654 36 2 0 63 1 0 0 0 376 13 544 17 109 38 0 3934 26 1 0 72 2 0 0 521 418 106 353 18 74 40 0 2343 26 1 0 72 3 0 0 0 385 6 536 27 111 54 0 3582 32 1 0 66 4 0 0 7 399 15 536 22 113 42 0 3076 21 1 0 78 5 0 0 14 305 10 398 7 70 32 0 2059 12 1 0 88 6 0 0 0 373 3 541 26 95 42 0 2874 33 1 0 66 7 0 0 3 507 117 398 15 74 45 0 2720 17 1 0 82 March 2, 2026 at 06:54:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2431 102 474 23 93 56 0 2719 28 2 0 70 1 0 0 0 389 9 558 30 119 40 0 4142 34 2 0 65 2 22 0 634 496 108 496 18 94 45 0 2614 20 1 0 78 3 0 0 0 404 9 529 36 99 30 0 3321 41 1 0 58 4 0 0 7 427 14 583 19 99 39 0 2785 16 1 0 83 5 0 0 14 334 16 401 17 77 52 0 3131 17 1 0 82 6 0 0 0 364 7 471 27 112 47 0 3391 32 1 0 67 7 0 0 2 554 111 447 16 84 24 0 2183 14 1 0 85 March 2, 2026 at 06:54:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2450 110 498 30 91 14 0 2375 28 2 0 70 1 0 0 0 409 12 560 18 92 31 0 2859 29 1 0 70 2 3 0 593 481 109 483 20 80 112 0 2564 25 1 0 74 3 0 0 0 344 5 462 20 100 16 0 3511 38 1 0 61 4 0 0 7 401 13 587 21 104 5 0 3852 16 1 0 82 5 0 0 14 338 18 404 15 72 20 0 3130 19 1 0 80 6 0 0 0 335 9 429 29 89 116 0 3091 39 1 0 60 7 0 0 2 542 109 465 15 78 21 0 2494 9 1 0 90 March 2, 2026 at 06:54:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2469 106 548 22 115 94 0 2817 26 2 0 72 1 0 0 0 416 7 559 37 123 82 0 2783 38 1 0 61 2 0 0 535 525 117 525 24 94 62 0 2241 23 1 0 76 3 0 0 14 441 61 549 29 110 49 0 3486 30 1 0 69 4 0 0 0 419 16 603 21 134 78 0 2477 24 1 0 74 5 0 0 7 395 16 541 21 108 79 0 3086 20 1 0 79 6 0 0 0 408 9 584 28 121 78 0 3950 27 1 0 72 7 0 0 2 574 107 516 19 88 51 0 2280 17 1 0 82 March 2, 2026 at 06:54:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2499 105 616 22 113 22 0 2824 24 2 0 74 1 0 0 0 446 12 628 25 128 20 0 2717 27 1 0 71 2 0 0 647 554 113 620 20 99 25 0 2518 20 1 0 79 3 0 0 0 453 13 659 35 128 26 0 4040 37 1 0 62 4 0 0 14 381 6 516 25 117 16 0 3384 25 1 0 74 5 0 0 7 350 13 439 19 86 29 0 3116 21 1 0 78 6 0 0 0 390 7 535 34 105 41 0 4300 32 1 0 67 7 0 0 3 525 105 366 11 76 27 0 2570 15 1 0 84 March 2, 2026 at 06:54:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2479 108 596 27 101 25 0 3448 23 2 0 75 1 1 0 0 416 7 585 31 117 49 0 3368 40 1 0 58 2 2 0 591 529 114 575 21 103 28 0 2468 16 1 0 83 3 3 0 0 424 8 612 26 125 36 0 3086 25 1 0 74 4 2 0 14 406 12 571 25 121 28 0 3146 25 1 0 74 5 0 0 7 354 17 448 17 84 50 0 2990 13 1 0 86 6 0 0 0 362 8 512 27 101 24 0 4465 33 1 0 66 7 0 0 2 495 102 375 22 63 28 0 2321 25 1 0 74 March 2, 2026 at 06:54:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2503 111 621 29 121 17 0 3701 20 2 0 78 1 6 0 0 437 10 620 35 121 11 0 3630 38 1 0 61 2 0 0 663 502 110 490 31 105 29 0 3215 31 2 0 67 3 2 0 0 473 5 684 29 121 50 0 3457 36 1 0 63 4 4 0 21 464 14 677 25 138 15 0 3748 21 1 0 78 5 0 0 0 434 12 579 26 111 11 0 2813 21 1 0 78 6 3 0 0 422 11 609 28 110 40 0 2922 26 1 0 73 7 1 0 2 510 109 421 15 93 34 0 3862 16 1 0 83 March 2, 2026 at 06:54:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2462 107 520 29 104 12 0 3369 36 2 0 63 1 2 0 0 468 5 665 28 128 27 0 3685 30 1 0 69 2 1 0 661 489 109 456 15 88 28 0 3013 18 1 0 81 3 3 0 0 418 13 538 36 108 51 0 3683 38 1 0 61 4 3 0 21 500 24 719 16 126 12 0 3738 18 1 0 81 5 1 0 0 368 12 471 19 93 27 0 2546 19 1 0 80 6 3 0 0 438 11 664 15 119 28 0 3479 24 1 0 75 7 1 0 2 577 102 539 16 88 60 0 3629 24 1 0 75 March 2, 2026 at 06:54:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2610 111 768 34 151 65 0 3651 28 2 0 69 1 4 0 0 571 9 790 35 147 119 0 3878 37 2 0 62 2 3 0 817 581 106 681 25 121 73 0 3496 25 2 0 73 3 2 0 0 630 80 824 34 162 114 0 4883 34 2 0 64 4 2 0 7 512 8 748 12 171 76 0 3721 19 1 0 80 5 3 0 14 449 8 574 26 135 100 0 3783 25 1 0 73 6 0 0 0 590 15 882 26 163 93 0 3434 20 1 0 78 7 0 0 2 706 122 711 16 126 119 0 3956 13 1 0 86 March 2, 2026 at 06:54:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2520 112 633 26 120 44 0 4248 30 2 0 68 1 2 0 0 557 12 799 30 148 85 0 4117 21 2 0 78 2 1 0 731 587 111 674 24 115 25 0 3308 24 2 0 75 3 4 0 0 479 6 696 37 132 51 0 4561 39 2 0 59 4 7 0 0 510 10 749 21 143 39 0 3385 19 1 0 80 5 3 0 21 416 7 568 20 111 89 0 3964 18 1 0 81 6 0 0 0 478 14 699 25 151 33 0 3824 30 1 0 69 7 1 0 3 623 117 552 24 100 60 0 2958 23 1 0 76 March 2, 2026 at 06:54:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 7 2677 108 964 24 159 33 0 5229 14 3 0 83 1 6 0 0 605 15 875 40 183 31 0 4850 31 2 0 67 2 0 0 871 649 115 770 31 147 70 0 4118 26 2 0 72 3 6 0 0 568 7 807 29 163 51 0 4855 30 2 0 68 4 3 0 0 573 15 799 36 171 67 0 4492 31 2 0 67 5 2 0 0 520 7 730 19 118 35 0 3411 19 1 0 80 6 1 0 14 531 8 777 36 164 53 0 4832 32 1 0 66 7 2 0 3 699 111 684 25 125 79 0 3790 22 1 0 76 March 2, 2026 at 06:54:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2753 115 963 38 198 48 0 4749 25 3 0 72 1 2 0 0 703 15 1058 31 199 81 0 6567 31 2 0 66 2 3 0 1094 707 109 943 23 170 59 0 4816 20 2 0 78 3 6 0 0 737 8 1058 43 187 66 0 5354 27 2 0 71 4 2 0 0 699 8 1034 26 205 64 0 5382 21 2 0 78 5 4 0 0 641 9 904 21 178 116 0 4696 18 2 0 80 6 6 0 14 648 5 962 34 203 63 0 5642 34 2 0 64 7 3 0 4 776 113 775 23 150 47 0 4436 22 1 0 76 March 2, 2026 at 06:54:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 7 2317 117 362 11 60 6 0 1702 7 1 0 91 1 27 0 0 202 4 315 12 49 6 1 2428 7 1 0 92 2 71 0 298 349 105 259 9 48 44 1 1757 5 1 0 94 3 135 0 0 216 3 301 18 54 14 0 1528 10 1 0 89 4 2 0 0 212 5 312 5 54 11 0 1654 4 1 0 95 5 9 0 0 257 30 318 2 49 3 0 1131 3 0 0 97 6 1 0 14 254 12 371 9 60 28 0 1514 7 1 0 93 7 5 0 2 426 111 279 5 44 24 0 1154 4 0 0 96 March 2, 2026 at 06:54:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2180 128 167 1 20 47 0 562 0 1 0 99 1 0 0 0 81 12 152 2 15 65 0 1141 0 1 0 99 2 0 0 4 252 105 81 0 14 59 0 294 0 0 0 100 3 0 0 0 150 77 122 0 17 53 0 0 0 0 0 100 4 0 0 0 134 6 236 0 16 49 0 300 0 0 0 100 5 0 0 0 40 2 63 0 8 49 0 0 0 0 0 100 6 0 0 14 78 5 128 1 20 65 0 289 0 0 0 100 7 0 0 2 344 111 194 1 21 60 0 0 0 0 0 100 March 2, 2026 at 06:54:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 104 16 0 1 0 0 561 0 1 0 99 1 0 0 0 28 9 56 1 2 0 0 1142 0 0 0 100 2 0 0 4 212 103 6 0 0 0 0 294 0 0 0 100 3 0 0 0 106 11 96 0 3 0 0 0 0 0 0 100 4 0 0 0 10 2 2 1 0 0 0 300 0 0 0 100 5 0 0 0 91 31 84 0 3 0 0 0 0 0 0 100 6 0 0 14 26 11 24 0 1 0 0 271 0 0 0 100 7 0 0 2 213 102 6 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:54:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 108 48 0 2 0 0 572 0 1 0 99 1 0 0 0 121 17 146 1 1 0 0 1142 0 0 0 99 2 0 0 4 216 104 10 1 0 0 0 298 0 0 0 100 3 0 0 0 9 0 4 1 1 2 0 3 0 0 0 100 4 0 0 0 9 2 4 0 0 1 0 303 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 14 97 40 92 0 2 0 0 266 0 0 0 100 7 0 0 2 216 102 10 0 0 0 0 4 0 0 0 100 March 2, 2026 at 06:54:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 11 2170 138 148 2 10 9 2 597 0 1 0 99 1 30 0 17 59 14 102 2 13 1 7 1126 0 1 0 99 2 2 0 27 300 109 110 0 12 4 2 320 0 0 0 99 3 6 0 0 33 1 25 1 2 4 2 45 0 0 0 100 4 278 0 4 24 2 16 1 4 17 2 407 0 0 0 100 5 13 0 4 24 5 19 0 3 3 1 38 0 0 0 100 6 7 0 22 22 3 30 0 9 2 6 309 0 0 0 100 7 17 0 3 223 103 22 0 4 4 4 29 0 0 0 100 March 2, 2026 at 06:54:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 112 100 1 4 0 0 567 0 1 0 99 1 0 0 0 28 4 46 2 3 1 0 1073 0 0 0 100 2 1 0 4 248 108 42 0 6 0 0 302 0 0 0 100 3 0 0 7 98 37 96 0 8 0 0 1 0 0 0 100 4 0 0 0 14 2 8 0 1 0 0 309 0 0 0 100 5 0 0 0 15 7 4 0 0 0 0 0 0 0 0 100 6 0 0 14 9 1 4 0 1 0 0 266 0 0 0 100 7 0 0 2 215 102 6 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:54:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 103 18 0 1 0 0 559 0 1 0 99 1 0 0 0 21 2 46 1 3 3 0 1071 0 0 0 100 2 0 0 11 214 103 9 0 1 0 0 294 0 0 0 100 3 0 0 0 39 7 30 0 6 0 0 0 0 0 0 100 4 0 0 0 94 43 88 0 2 0 0 301 0 0 0 100 5 0 0 0 12 2 8 0 1 0 0 0 0 0 0 100 6 0 0 14 108 5 106 0 6 2 0 266 0 0 0 100 7 0 0 2 213 102 6 0 1 2 0 0 0 0 0 100 March 2, 2026 at 06:54:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 105 98 0 2 0 0 562 0 1 0 99 1 0 0 0 18 5 40 0 0 1 0 1074 0 0 0 100 2 0 0 10 216 104 10 1 1 1 0 295 0 0 0 100 3 0 0 0 11 1 2 0 1 2 0 0 0 0 0 100 4 0 0 0 18 3 14 1 1 2 0 300 0 0 0 100 5 0 0 0 112 53 104 0 0 1 0 0 0 0 0 100 6 0 0 14 33 2 24 0 0 1 0 266 0 0 0 100 7 0 0 3 212 102 4 0 0 1 0 0 0 0 0 100 March 2, 2026 at 06:54:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 114 0 0 0 0 559 0 1 0 99 1 0 0 0 15 3 38 2 0 0 0 1074 0 0 0 100 2 0 0 3 211 103 6 0 0 0 0 294 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 6 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 7 0 0 3 211 102 4 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:54:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 487 0 7 2680 108 933 46 204 27 6 5079 23 3 0 74 1 2478 0 8 629 9 915 47 223 32 9 5303 25 2 0 73 2 264 0 832 664 111 902 41 192 50 5 6024 20 2 0 78 3 312 0 0 636 7 968 47 213 32 7 5264 25 2 0 73 4 457 0 1 591 8 882 55 225 28 2 4736 21 2 0 77 5 1037 0 0 532 19 811 35 173 26 10 4094 16 2 0 82 6 189 0 0 544 8 846 44 174 55 9 4455 25 2 0 73 7 2496 0 16 741 103 813 38 152 23 11 4374 18 2 0 80 March 2, 2026 at 06:54:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2120 106 138 0 2 0 0 574 0 1 0 99 1 0 0 0 13 1 8 0 1 0 0 4 0 0 0 100 2 1 0 17 219 104 44 1 1 1 0 1443 0 0 0 99 3 37 0 0 123 54 119 0 1 4 0 27 0 0 0 100 4 0 0 0 23 5 20 0 3 1 0 329 0 0 0 100 5 0 0 0 27 10 12 0 2 0 0 5 0 0 0 100 6 0 0 0 22 2 14 1 1 3 0 13 0 0 0 100 7 0 0 17 218 104 8 0 1 0 0 267 0 0 0 100 March 2, 2026 at 06:54:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2168 125 170 0 22 47 0 569 0 1 0 99 1 0 0 0 70 4 110 0 19 65 0 2 0 0 0 100 2 0 0 4 265 107 121 2 9 48 0 1423 0 0 0 99 3 0 0 0 205 84 183 0 24 70 0 0 0 0 0 100 4 0 0 0 118 8 208 0 17 55 0 300 0 0 0 100 5 0 0 0 49 2 81 0 13 41 0 0 0 0 0 100 6 0 0 0 66 1 121 0 20 81 0 1 0 0 0 100 7 0 0 16 250 102 89 0 15 68 0 266 0 1 0 99 March 2, 2026 at 06:54:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2127 113 110 0 3 0 0 569 0 1 0 99 1 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 2 0 0 3 214 104 36 1 0 0 0 1423 0 0 0 100 3 0 0 0 26 0 18 0 0 0 0 0 0 0 0 100 4 0 0 0 9 2 2 1 0 0 0 300 0 0 0 100 5 0 0 0 112 49 108 0 2 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 7 0 0 17 215 102 16 0 2 0 0 266 0 0 0 100 March 2, 2026 at 06:54:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 290 0 7 2143 112 73 0 10 9 8 695 0 1 0 99 1 8 0 1 45 7 62 0 8 1 6 42 0 0 0 100 2 5 0 9 227 105 61 1 7 9 8 1470 0 1 0 99 3 3 0 2 17 0 19 1 5 6 0 23 0 0 0 100 4 18 0 6 25 3 29 1 6 0 2 333 0 0 0 100 5 5 0 14 108 17 106 0 10 1 4 48 0 0 0 100 6 6 0 9 117 34 123 0 16 3 3 48 0 1 0 99 7 11 0 19 229 102 28 1 5 4 2 310 0 1 0 99 March 2, 2026 at 06:54:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 107 59 0 7 0 0 559 0 1 0 99 1 0 0 0 109 48 102 0 2 0 0 0 0 0 0 100 2 0 0 3 215 104 36 1 0 1 0 1371 0 0 0 100 3 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 12 2 4 0 0 0 0 300 0 0 0 100 5 0 0 7 21 2 14 0 2 0 0 0 0 0 0 100 6 0 0 0 70 1 60 0 0 0 0 0 0 0 0 100 7 0 0 17 209 102 4 0 0 0 0 266 0 0 0 100 March 2, 2026 at 06:54:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2132 123 121 1 10 0 0 559 0 1 0 99 1 0 0 0 55 20 46 0 3 0 0 2 0 0 0 100 2 0 0 3 274 112 98 2 6 1 0 1375 0 0 0 99 3 0 0 0 27 5 16 0 2 0 0 0 0 0 0 100 4 0 0 0 17 4 10 0 0 0 0 307 0 0 0 100 5 0 0 0 28 7 20 0 1 1 0 13 0 0 0 100 6 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 7 0 0 17 213 102 8 0 0 0 0 266 0 0 0 100 March 2, 2026 at 06:54:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2126 115 88 0 13 0 0 560 0 1 0 99 1 0 0 0 108 38 103 0 9 1 0 0 0 0 0 100 2 0 0 3 259 107 76 0 10 0 0 1365 0 0 0 99 3 0 0 0 13 0 12 0 1 0 0 0 0 0 0 100 4 0 0 0 10 2 2 1 0 0 0 300 0 0 0 100 5 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 2 0 0 0 0 0 100 7 0 0 17 210 102 6 0 0 3 0 266 0 0 0 100 March 2, 2026 at 06:54:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 105 12 0 0 1 0 559 0 1 0 99 1 0 0 0 64 20 54 0 5 1 0 4 0 0 0 100 2 0 0 7 277 111 101 1 7 1 0 1367 0 0 0 99 3 0 0 0 64 10 52 0 10 1 0 0 0 0 0 100 4 0 0 0 50 22 40 0 1 1 0 300 0 0 0 100 5 0 0 0 19 2 12 0 1 1 0 0 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 21 209 102 6 0 1 0 0 266 0 0 0 100 March 2, 2026 at 06:54:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1990 0 8 2134 113 140 3 11 49 4 879 0 6 0 94 1 530 0 0 26 3 42 0 7 23 4 183 0 0 0 100 2 8 0 3 232 105 62 1 4 11 1 1419 0 0 0 99 3 7 0 0 20 1 27 0 4 9 1 19 0 0 0 100 4 7 0 0 24 3 34 0 6 14 1 25 0 0 0 100 5 0 0 0 93 37 86 0 4 0 0 300 0 0 0 100 6 0 0 0 38 11 32 0 5 0 0 0 0 0 0 100 7 0 0 17 219 104 22 0 4 6 0 332 0 0 0 100 March 2, 2026 at 06:55:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 675 0 8 2710 107 859 22 125 103 19 2244 21 4 0 75 1 261 0 7 680 14 898 18 122 132 22 2842 19 2 0 78 2 211 0 1376 596 114 712 15 99 50 10 3448 17 3 0 81 3 174 0 28 659 6 859 22 113 73 8 1932 18 2 0 80 4 105 0 0 559 10 646 11 114 76 4 1832 13 2 0 86 5 96 0 0 565 13 666 11 82 77 4 2053 14 2 0 85 6 92 0 0 616 15 771 21 108 34 2 1748 15 1 0 83 7 301 0 16 738 107 653 16 70 66 11 1979 8 2 0 91 March 2, 2026 at 06:55:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 119 0 0 2642 112 673 21 90 34 0 1799 21 3 0 77 1 87 0 14 619 8 750 22 101 45 0 2203 18 2 0 80 2 143 0 1424 592 112 727 18 70 17 0 3234 16 2 0 82 3 124 0 0 633 16 753 16 94 33 0 1781 18 2 0 80 4 46 0 0 659 25 811 16 94 59 0 1804 13 2 0 85 5 71 0 0 534 14 581 14 58 45 0 1997 15 1 0 84 6 108 0 0 598 14 702 15 85 24 0 1582 16 1 0 82 7 53 0 3 730 108 610 9 55 44 0 1603 9 1 0 90 March 2, 2026 at 06:55:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 70 0 0 2687 111 763 25 113 79 1 1731 20 3 0 77 1 74 0 0 714 17 932 31 126 91 1 1893 21 2 0 77 2 44 0 1425 562 110 679 22 90 90 0 3049 16 2 0 82 3 29 0 0 799 59 969 21 125 61 0 2466 14 2 0 84 4 84 0 14 613 13 747 19 111 67 0 2106 20 2 0 78 5 48 0 0 546 10 630 15 89 102 0 1859 10 2 0 88 6 54 0 0 688 8 895 26 119 78 0 1796 16 2 0 82 7 47 0 2 808 125 749 13 78 97 0 1454 11 1 0 88 March 2, 2026 at 06:55:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2660 111 725 21 88 25 0 1786 29 3 0 69 1 1 0 0 607 17 708 10 108 34 0 1572 14 2 0 84 2 1 0 1425 574 122 660 11 69 28 0 2992 12 2 0 85 3 2 0 0 693 18 838 28 88 36 0 1704 17 2 0 82 4 2 0 14 553 12 633 14 90 51 0 2396 11 1 0 88 5 2 0 0 568 10 651 13 58 47 0 2012 17 1 0 81 6 2 0 0 590 15 690 23 79 43 0 1728 15 1 0 84 7 2 0 3 705 111 540 7 50 55 0 1473 12 1 0 87 March 2, 2026 at 06:55:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 2621 115 618 20 86 17 0 1532 22 2 0 76 1 3 0 0 671 21 809 17 94 53 0 1681 17 2 0 81 2 4 0 1423 565 128 647 9 75 40 0 2870 10 2 0 87 3 20 0 0 678 18 845 16 95 28 0 1703 16 2 0 82 4 15 0 14 562 18 647 13 67 22 0 1942 15 2 0 83 5 3 0 0 469 12 473 12 52 88 0 2413 13 1 0 86 6 22 0 0 553 8 655 15 86 51 0 1889 20 1 0 79 7 10 0 3 791 111 664 12 54 37 0 1467 13 1 0 86 March 2, 2026 at 06:55:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 2681 118 757 22 93 41 1 1894 21 3 0 76 1 30 0 0 712 17 924 26 112 49 1 2077 22 2 0 76 2 13 0 1425 591 119 691 18 65 23 0 3021 19 2 0 78 3 9 0 0 707 15 918 20 110 57 0 1865 18 2 0 80 4 30 0 14 585 15 694 16 98 68 1 2213 14 2 0 84 5 9 0 0 514 17 514 14 64 80 0 1893 12 1 0 87 6 3 0 0 583 16 650 21 95 29 0 1918 13 1 0 86 7 38 0 3 736 112 617 7 64 62 0 1608 11 1 0 88 March 2, 2026 at 06:55:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2667 120 716 21 101 31 0 1693 23 3 0 74 1 3 0 0 695 23 818 23 105 33 0 1728 18 2 0 80 2 8 0 1424 594 132 695 9 75 49 0 3052 14 2 0 84 3 1 0 0 650 24 772 23 99 56 0 1874 26 2 0 72 4 2 0 14 557 15 621 9 92 31 1 2045 11 1 0 88 5 4 0 0 507 15 531 13 49 52 0 1664 14 1 0 85 6 1 0 0 616 17 733 13 90 42 0 2023 13 1 0 86 7 2 0 2 757 121 626 6 69 59 0 1690 10 1 0 89 March 2, 2026 at 06:55:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 7 2720 117 807 28 119 57 0 1894 26 3 0 72 1 2 0 7 666 24 829 19 135 89 0 2087 18 2 0 80 2 17 0 1416 638 120 775 19 91 76 0 2941 10 3 0 87 3 2 0 0 769 79 898 22 113 82 0 1845 20 2 0 78 4 0 0 14 602 13 716 19 120 125 0 2393 11 2 0 87 5 9 0 0 626 13 747 21 99 98 0 1741 16 2 0 83 6 7 0 0 751 16 1013 22 120 76 0 1771 16 2 0 83 7 1 0 3 760 116 646 13 77 71 0 1938 14 1 0 85 March 2, 2026 at 06:55:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2701 124 795 23 116 42 0 1714 19 3 0 78 1 1 0 7 650 23 766 24 120 76 0 2127 13 2 0 85 2 2 0 1417 546 118 599 13 79 24 0 2726 16 2 0 82 3 2 0 0 659 14 783 27 99 43 0 1855 18 2 0 80 4 3 0 14 608 23 700 23 98 55 0 2412 14 2 0 84 5 3 0 0 648 22 778 12 71 60 0 1663 15 2 0 84 6 1 0 0 653 21 767 23 86 28 0 1727 21 1 0 78 7 0 0 3 764 124 610 12 63 58 0 1988 12 1 0 87 March 2, 2026 at 06:55:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2716 122 753 17 82 39 0 1797 18 3 0 80 1 1 0 7 731 22 934 17 107 29 0 2224 16 2 0 82 2 2 0 1419 584 124 657 16 68 36 0 2938 17 3 0 80 3 4 0 0 634 26 731 17 91 34 0 1676 23 2 0 75 4 2 0 14 586 26 660 8 91 35 0 2306 14 2 0 84 5 2 0 0 587 27 633 8 73 28 0 1397 11 1 0 87 6 0 0 0 599 19 670 13 88 29 0 1424 14 1 0 85 7 0 0 2 700 119 505 14 50 51 0 2027 12 1 0 87 March 2, 2026 at 06:55:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2675 122 685 24 95 17 0 1730 20 2 0 77 1 7 0 0 649 21 706 26 102 11 0 1731 24 2 0 74 2 6 0 1419 635 116 813 17 81 61 0 3012 11 3 0 86 3 0 0 0 639 27 757 19 100 84 0 1789 13 2 0 85 4 6 0 0 593 21 665 12 90 18 0 1981 15 2 0 84 5 3 0 14 540 20 575 15 73 21 0 1812 16 1 0 83 6 0 0 7 707 29 874 21 115 63 0 2088 17 1 0 82 7 6 0 2 762 120 633 13 51 82 0 2354 13 1 0 86 March 2, 2026 at 06:55:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2667 116 731 22 95 35 0 1712 21 3 0 76 1 1 0 0 738 18 935 27 124 43 0 1922 20 2 0 78 2 5 0 1416 642 131 749 8 80 25 0 1626 14 2 0 84 3 0 0 0 646 22 748 24 103 35 0 1851 19 2 0 79 4 0 0 0 558 17 595 13 86 46 0 1590 14 1 0 85 5 0 0 14 492 24 465 9 69 49 0 1893 7 1 0 92 6 2 0 7 595 22 677 16 75 32 0 1902 19 1 0 80 7 2 0 3 737 123 601 10 54 42 0 3188 13 1 0 86 March 2, 2026 at 06:55:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2708 123 735 25 120 63 0 1675 24 3 0 73 1 4 0 0 802 19 1050 26 126 71 0 1879 23 2 0 75 2 2 0 1417 684 119 852 15 108 83 0 1717 14 2 0 84 3 1 0 0 756 78 888 27 107 64 0 1722 17 2 0 81 4 0 0 0 645 32 779 16 102 68 0 2304 14 2 0 85 5 0 0 14 549 24 571 7 79 95 0 1731 9 1 0 90 6 1 0 7 666 28 795 19 109 78 0 2125 15 2 0 84 7 0 0 3 759 124 611 11 69 76 0 2563 11 1 0 88 March 2, 2026 at 06:55:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4827 0 27 2308 123 384 9 45 64 17 959 5 2 0 93 1 1342 0 11 182 5 285 9 47 28 17 1248 4 1 0 95 2 379 0 138 309 103 190 2 31 38 14 565 4 1 0 95 3 860 0 7 158 3 235 9 43 22 15 512 4 1 0 96 4 159 0 8 212 29 352 6 42 23 22 1654 2 1 0 97 5 113 0 21 199 37 231 9 41 14 10 700 5 0 0 94 6 43 0 40 149 8 223 11 38 23 9 812 5 1 0 94 7 127 0 23 424 109 266 8 28 29 8 1429 2 1 0 97 March 2, 2026 at 06:55:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 18 0 0 0 0 0 0 1 0 99 1 36 0 0 22 6 12 0 0 0 0 9 0 0 0 100 2 0 0 4 211 103 2 0 0 0 0 2 0 0 0 100 3 0 0 0 11 0 4 0 2 0 0 0 0 0 0 100 4 5 0 0 111 48 132 1 3 0 0 1133 0 0 0 99 5 0 0 14 106 4 102 0 2 0 0 266 0 0 0 100 6 0 0 7 17 4 12 0 2 0 0 307 0 0 0 100 7 0 0 9 222 104 21 1 3 0 0 894 0 0 0 100 March 2, 2026 at 06:55:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 101 116 0 6 0 0 7 0 1 0 99 1 0 0 0 18 6 14 0 1 0 0 9 0 0 0 100 2 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 10 0 2 0 1 0 0 0 0 0 0 100 4 0 0 0 31 9 50 1 2 0 0 1133 0 0 0 100 5 0 0 14 84 33 78 0 1 0 0 267 0 0 0 100 6 0 0 7 44 18 38 0 2 0 0 260 0 0 0 100 7 0 0 3 221 104 9 0 1 0 0 851 0 0 0 100 March 2, 2026 at 06:55:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2124 111 130 2 7 0 0 303 0 1 0 99 1 0 0 0 105 45 98 0 4 0 0 9 0 0 0 100 2 0 0 4 209 102 2 0 0 0 0 2 0 0 0 100 3 0 0 0 13 1 10 0 2 0 0 6 0 0 0 100 4 0 0 0 11 2 34 1 0 0 0 1135 0 0 0 100 5 0 0 14 24 10 12 0 0 0 0 272 0 0 0 100 6 0 0 7 22 5 14 0 1 0 0 260 0 0 0 100 7 0 0 2 215 103 8 0 1 0 0 600 0 0 0 100 March 2, 2026 at 06:55:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1490 0 40 2258 115 369 7 53 96 9 973 1 2 0 97 1 259 0 5 217 30 330 7 42 77 9 844 4 1 0 95 2 161 0 47 325 110 208 3 43 76 3 306 0 1 0 99 3 224 0 8 280 87 303 6 45 85 5 350 4 1 0 95 4 112 0 0 146 2 299 9 42 70 4 1502 4 1 0 95 5 24 0 17 155 34 204 1 42 69 6 527 4 0 0 96 6 334 0 7 194 3 362 0 32 118 7 631 1 1 0 98 7 5617 0 20 327 103 250 6 35 149 9 1561 3 2 0 95 March 2, 2026 at 06:55:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 111 0 3 0 0 295 0 1 0 99 1 0 0 7 89 33 79 0 4 1 0 2 0 0 0 100 2 0 0 3 234 110 32 0 5 1 0 3 0 0 0 100 3 0 0 0 42 17 30 0 1 1 0 1 0 0 0 100 4 0 0 0 12 3 32 1 0 1 0 1132 0 0 0 100 5 0 0 14 12 4 6 0 0 1 0 266 0 0 0 100 6 36 0 7 27 10 20 0 0 1 0 272 0 0 0 100 7 0 0 3 213 103 4 1 0 1 0 600 0 0 0 100 March 2, 2026 at 06:55:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 102 121 0 0 0 0 294 0 1 0 99 1 0 0 0 110 50 102 0 0 0 0 0 0 0 0 100 2 0 0 3 210 102 4 0 1 0 0 1 0 0 0 100 3 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 4 0 0 0 10 2 32 1 0 0 0 1133 0 0 0 100 5 0 0 14 10 3 6 0 0 0 0 266 0 0 0 100 6 0 0 7 25 9 20 0 0 0 0 269 0 0 0 100 7 0 0 3 212 103 4 0 0 0 0 600 0 0 0 100 March 2, 2026 at 06:55:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 104 118 1 4 0 0 294 0 1 0 99 1 0 0 0 107 48 100 0 4 0 0 0 0 0 0 100 2 0 0 3 212 102 4 0 0 0 0 2 0 0 0 100 3 0 0 0 15 1 14 0 1 0 0 0 0 0 0 100 4 0 0 0 11 3 34 0 0 0 0 1133 0 0 0 100 5 0 0 14 10 3 6 0 0 0 0 266 0 0 0 100 6 0 0 7 27 10 22 0 0 0 0 270 0 0 0 100 7 0 0 3 212 103 4 0 0 0 0 600 0 0 0 100 March 2, 2026 at 06:55:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11591 0 150 2321 116 487 5 88 168 58 2771 6 4 0 90 1 25477 0 26 315 13 545 14 93 68 54 1981 9 23 0 68 2 972 0 37 482 110 498 5 79 69 43 1048 2 2 0 97 3 245 0 25 248 13 433 6 87 44 38 1194 1 1 0 99 4 550 0 14 194 5 341 9 59 26 30 1591 1 1 0 98 5 349 0 11 214 47 279 4 53 38 50 897 0 1 0 99 6 375 0 13 166 8 264 4 60 20 23 904 1 1 0 98 7 2380 0 12 390 112 302 4 56 111 31 1671 1 2 0 97 March 2, 2026 at 06:55:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2166 107 146 0 29 40 0 294 0 2 0 98 1 0 0 0 144 36 176 0 27 64 0 0 0 0 0 100 2 0 0 11 312 111 127 0 22 54 0 2 0 0 0 100 3 0 0 14 123 67 94 0 13 58 0 287 0 0 0 100 4 49 0 0 81 6 151 1 17 61 0 1055 0 0 0 99 5 0 0 0 54 3 79 0 13 54 0 0 0 0 0 100 6 0 0 7 112 4 190 0 14 41 0 260 0 0 0 100 7 0 0 2 259 104 87 1 11 36 0 601 0 0 0 100 March 2, 2026 at 06:55:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 722 0 113 2156 110 160 1 15 8 14 430 0 1 0 98 1 88 0 119 97 23 91 0 8 3 11 38 0 0 0 100 2 10 0 6 265 105 35 0 6 5 3 105 0 0 0 100 3 9 0 14 109 20 92 0 13 6 2 399 0 0 0 100 4 1916 0 0 75 7 85 4 7 4 6 1548 1 1 0 98 5 662 0 0 67 2 56 2 16 11 5 254 1 0 0 98 6 19 0 7 64 2 63 0 13 10 3 371 0 0 0 100 7 44 0 2 260 104 43 0 6 8 4 668 0 0 0 100 March 2, 2026 at 06:55:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2132 124 125 1 15 0 0 294 0 1 0 99 1 0 0 0 71 18 44 0 7 1 0 0 0 0 0 100 2 0 0 3 264 112 38 0 7 0 0 2 0 0 0 100 3 0 0 14 47 1 20 0 0 0 0 266 0 0 0 100 4 0 0 0 35 6 40 1 0 0 0 1133 0 0 0 99 5 0 0 0 31 3 8 0 0 1 0 0 0 0 0 100 6 0 0 7 32 3 16 0 1 0 0 261 0 0 0 100 7 0 0 3 231 104 6 0 0 0 0 600 0 0 0 100 March 2, 2026 at 06:55:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 108 116 0 10 0 0 294 0 1 0 99 1 0 0 0 74 28 66 0 6 0 0 0 0 0 0 100 2 0 0 4 219 103 7 0 3 0 0 0 0 0 0 100 3 0 0 14 37 15 32 0 1 0 0 266 0 0 0 100 4 0 0 0 20 7 42 1 0 1 0 1131 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 0 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 7 0 0 2 215 104 6 1 0 0 0 601 0 0 0 100 March 2, 2026 at 06:55:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 113 118 0 12 0 0 299 0 1 0 99 1 0 0 0 74 27 66 0 9 0 0 0 0 0 0 100 2 0 0 4 251 115 42 0 7 1 0 5 0 0 0 100 3 0 0 14 9 1 8 0 1 0 0 269 0 0 0 100 4 0 0 0 20 7 44 1 0 0 0 1136 0 0 0 99 5 0 0 0 23 8 20 0 0 0 0 17 0 0 0 100 6 0 0 7 16 4 14 0 0 0 0 269 0 0 0 100 7 0 0 2 225 104 24 2 3 0 0 606 0 0 0 100 March 2, 2026 at 06:55:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 105 116 0 7 1 0 294 0 1 0 99 1 0 0 0 102 46 98 0 4 1 0 5 0 0 0 100 2 0 0 3 228 103 18 0 3 0 0 0 0 0 0 100 3 0 0 14 12 3 10 0 0 1 0 267 0 0 0 100 4 0 0 0 18 6 42 1 1 3 0 1133 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 6 0 0 7 13 3 12 0 0 0 0 265 0 0 0 100 7 0 0 3 215 104 8 0 0 0 0 600 0 0 0 100 March 2, 2026 at 06:55:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 107 108 1 8 1 0 294 0 1 0 99 1 0 0 0 108 46 100 0 7 1 0 1 0 0 0 100 2 0 0 7 225 103 18 0 4 0 0 2 0 0 0 100 3 0 0 14 11 3 4 0 0 1 0 267 0 0 0 100 4 0 0 0 20 7 40 1 0 2 0 1128 0 0 0 99 5 0 0 0 16 5 8 0 0 1 0 1 0 0 0 100 6 0 0 7 11 3 4 0 0 1 0 260 0 0 0 100 7 0 0 7 216 105 8 0 0 1 0 601 0 0 0 100 March 2, 2026 at 06:55:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 116 0 3 0 0 294 0 1 0 99 1 0 0 0 19 2 18 0 3 0 0 0 0 0 0 100 2 0 0 4 217 105 9 0 2 0 0 1 0 0 0 100 3 0 0 14 94 44 90 0 1 0 0 266 0 0 0 100 4 0 0 0 21 8 44 1 0 0 0 1124 0 0 0 99 5 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 7 0 0 2 214 104 6 1 0 0 0 601 0 0 0 100 March 2, 2026 at 06:55:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 113 120 0 6 0 0 294 0 1 0 99 1 0 0 0 99 38 92 0 4 0 0 0 0 0 0 100 2 0 0 3 224 103 22 0 5 0 0 5 0 0 0 100 3 0 0 14 12 3 10 0 0 0 0 270 0 0 0 100 4 0 0 0 18 7 42 0 0 0 0 1129 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 6 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 7 0 0 3 214 104 6 1 0 0 0 601 0 0 0 100 March 2, 2026 at 06:55:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 385 0 0 2206 107 277 7 20 14 2 956 1 2 0 97 1 86 0 0 167 38 217 0 19 1 0 333 0 0 0 99 2 40 0 18 270 102 105 3 13 0 0 214 4 0 0 96 3 141 0 14 70 6 105 0 13 1 0 484 0 0 0 99 4 170 0 0 72 8 135 4 11 15 0 1413 4 0 0 96 5 284 0 0 135 40 163 6 9 7 2 292 4 1 0 96 6 235 0 7 131 8 234 3 18 2 2 889 1 0 0 99 7 50 0 2 300 105 187 4 10 5 0 1136 1 0 0 99 March 2, 2026 at 06:55:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 106 192 2 21 71 0 305 0 1 0 99 1 9 0 0 123 26 172 0 26 68 0 15 0 0 0 100 2 0 0 17 255 107 70 0 13 39 0 11 0 0 0 100 3 10 0 14 173 78 139 0 14 58 0 323 0 0 0 100 4 0 0 0 58 3 125 1 18 50 0 1145 0 0 0 99 5 0 0 0 57 3 97 0 17 61 0 14 0 0 0 100 6 32 0 7 174 24 285 0 19 52 0 275 0 0 0 100 7 1 0 3 273 108 112 0 15 48 0 618 0 0 0 99 March 2, 2026 at 06:55:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 133 117 0 9 1 0 294 0 1 0 99 1 0 0 0 50 19 46 0 5 0 0 1 0 0 0 100 2 0 0 4 269 102 58 0 3 0 0 0 0 0 0 100 3 0 0 14 9 1 6 0 0 0 0 266 0 0 0 100 4 0 0 0 14 2 42 1 1 0 0 1134 0 0 0 100 5 0 0 0 14 3 8 0 1 0 0 0 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 7 0 0 2 228 110 20 1 0 0 0 605 0 0 0 100 March 2, 2026 at 06:55:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 110 108 0 11 0 0 294 0 1 0 99 1 0 0 0 96 40 88 0 7 0 0 0 0 0 0 100 2 0 0 4 227 105 20 0 5 0 0 2 0 0 0 100 3 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1134 0 0 0 100 5 0 0 0 16 2 10 0 2 0 0 0 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 7 0 0 2 228 111 20 1 0 0 0 611 0 0 0 100 March 2, 2026 at 06:55:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9080 0 269 2442 110 783 6 167 224 103 3947 3 6 0 92 1 1139 0 134 388 38 698 3 160 377 112 3038 1 2 0 97 2 161 0 28 552 106 640 2 147 82 91 2610 1 1 0 98 3 85 0 39 289 2 585 3 125 426 84 2544 1 1 0 98 4 217 0 19 246 2 441 3 78 160 71 5685 1 2 0 97 5 883 0 10 343 33 561 9 135 80 91 3116 2 1 0 97 6 80 0 37 278 2 518 4 127 495 67 2824 1 2 0 97 7 119 0 28 502 111 494 4 99 83 62 3267 1 1 0 97 March 2, 2026 at 06:55:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2167 130 134 1 11 13 1 303 0 1 0 98 1 10 0 7 78 16 66 0 9 8 3 50 0 0 0 100 2 3 0 3 308 114 89 0 6 4 1 13 0 0 0 100 3 7 0 14 34 1 29 0 5 6 4 288 0 0 0 100 4 18 0 8 32 3 48 1 4 5 1 846 0 0 0 99 5 4 0 0 32 7 12 0 2 0 0 9 0 0 0 100 6 18 0 12 37 3 30 2 4 6 3 282 0 1 0 99 7 7 0 87 226 104 29 0 1 14 2 612 0 2 0 98 March 2, 2026 at 06:55:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 721 2134 120 112 0 16 6 0 294 0 2 0 98 1 0 0 0 206 29 92 0 10 1 0 0 0 0 0 100 2 0 0 3 341 106 26 0 5 1 0 0 0 0 0 100 3 0 0 14 112 1 4 0 0 0 0 266 0 0 0 100 4 0 0 0 119 2 36 1 0 2 0 763 0 0 0 99 5 0 0 7 114 2 6 0 1 0 0 0 0 0 0 100 6 0 0 7 118 3 12 0 0 0 0 260 0 0 0 100 7 0 0 10 322 104 10 1 0 1 0 600 0 0 0 99 March 2, 2026 at 06:55:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2113 106 120 0 3 1 0 294 0 1 0 99 1 0 0 0 111 47 100 0 5 1 0 0 0 0 0 100 2 0 0 7 214 103 8 0 1 0 0 2 0 0 0 100 3 0 0 14 12 2 2 0 0 1 0 266 0 0 0 100 4 0 0 0 14 3 32 1 0 2 0 762 0 0 0 100 5 0 0 0 16 3 6 0 0 1 0 0 0 0 0 100 6 0 0 7 17 3 8 0 2 1 0 259 0 0 0 100 7 0 0 7 222 104 16 1 1 1 0 600 0 0 0 100 March 2, 2026 at 06:55:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 116 114 0 16 0 0 294 0 1 0 99 1 0 0 0 49 15 40 0 5 0 0 0 0 0 0 100 2 0 0 4 251 111 40 0 7 0 0 1 0 0 0 100 3 0 0 14 40 13 36 0 3 0 0 266 0 0 0 100 4 0 0 0 12 3 34 1 1 1 0 761 0 0 0 100 5 0 0 0 12 4 6 0 1 0 0 0 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 7 0 0 2 215 104 8 0 0 0 0 600 0 0 0 100 March 2, 2026 at 06:55:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 105 117 1 4 0 0 295 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 4 212 102 6 0 1 0 0 2 0 0 0 100 3 0 0 14 8 1 4 0 0 0 0 266 0 0 0 100 4 0 0 0 8 2 32 0 0 0 0 761 0 0 0 100 5 0 0 0 46 19 40 0 3 0 0 16 0 0 0 100 6 164 0 7 76 35 73 0 2 10 0 276 0 0 0 100 7 0 0 2 213 104 6 0 0 0 0 600 0 0 0 100 March 2, 2026 at 06:55:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5519 0 485 2626 109 543 5 93 637 61 7898 3 5 0 92 1 5555 0 126 428 2 582 8 128 252 112 12329 4 5 0 91 2 3183 0 27 627 103 557 2 118 190 98 2101 1 2 0 97 3 2567 0 375 531 32 478 4 103 190 50 2946 2 2 0 96 4 6395 0 125 340 6 464 5 90 359 72 2773 1 3 0 96 5 6111 0 438 357 15 446 4 100 108 83 1515 1 2 0 96 6 8436 0 387 530 10 488 7 105 460 79 13054 5 6 0 90 7 3956 0 24 711 107 414 7 87 619 73 15010 4 6 0 90 March 2, 2026 at 06:55:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2463 120 834 2 137 1391 3 294 0 6 0 94 1 0 0 0 308 21 611 0 152 1583 2 0 0 5 0 95 2 0 0 3 439 104 494 1 123 1615 3 2 0 5 0 95 3 0 0 14 480 260 620 2 144 1633 1 287 0 5 0 95 4 0 0 0 239 2 563 3 162 1618 6 1134 0 5 0 95 5 0 0 42 295 3 607 2 124 1610 1 0 0 6 0 94 6 0 0 7 296 12 636 1 155 1668 1 260 0 5 0 95 7 0 0 10 448 105 501 3 134 1497 10 600 0 5 0 95 March 2, 2026 at 06:55:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2191 102 161 0 8 28 0 294 0 2 0 98 1 0 0 448 80 23 89 0 10 21 0 1 0 1 0 99 2 0 0 4 319 102 85 0 7 24 0 0 0 0 0 100 3 0 0 14 250 102 156 0 14 42 0 272 0 0 0 100 4 0 0 0 116 2 112 1 14 33 0 1133 0 1 0 99 5 0 0 0 164 2 172 0 8 20 0 0 0 0 0 100 6 0 0 7 116 2 80 0 10 21 0 259 0 0 0 100 7 0 0 2 312 103 68 0 7 13 0 600 0 0 0 100 March 2, 2026 at 06:55:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 116 1 0 0 0 294 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 4 214 103 8 0 1 0 0 2 0 0 0 100 3 0 0 14 110 51 110 0 1 0 0 266 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1135 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 7 0 0 2 211 103 4 0 0 0 0 600 0 0 0 100 March 2, 2026 at 06:55:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 122 0 0 0 0 296 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 2 0 0 4 210 102 4 0 0 0 0 0 0 0 0 100 3 0 0 14 109 51 106 0 0 0 0 266 0 0 0 100 4 0 0 0 14 2 42 1 1 0 0 1134 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 7 0 0 2 212 103 4 1 0 0 0 600 0 0 0 100 March 2, 2026 at 06:55:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4373 0 22 2961 107 1545 37 190 139 35 4869 10 5 0 86 1 2405 0 22 679 6 1138 29 134 116 34 4724 19 4 0 77 2 7424 0 562 834 114 1171 26 145 202 39 4892 10 6 0 84 3 2067 0 14 906 18 1607 41 164 205 50 4438 7 4 0 89 4 548 0 23 669 12 1117 17 130 120 37 4781 12 3 0 86 5 336 0 8 577 16 896 10 90 98 29 4165 8 3 0 89 6 2133 0 7 622 3 1107 27 114 137 36 4958 13 3 0 84 7 1060 0 8 737 107 885 16 81 143 17 2953 5 2 0 93 March 2, 2026 at 06:55:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2321 125 587 2 115 1779 0 294 0 5 0 95 1 0 0 7 271 22 558 1 131 1819 0 0 0 5 0 95 2 0 0 9 411 104 479 1 122 1656 0 263 0 4 0 96 3 0 0 0 419 225 483 2 133 1542 0 0 0 4 0 96 4 4 0 14 217 7 489 1 137 1744 0 308 0 4 0 96 5 39 0 0 218 9 507 2 114 1595 0 1134 0 5 0 95 6 0 0 0 304 1 659 1 132 1640 0 0 0 4 0 96 7 0 0 4 440 103 566 0 123 1516 0 600 0 3 0 96 March 2, 2026 at 06:55:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 102 113 1 1 1 0 294 0 1 0 99 1 0 0 0 26 1 4 0 1 1 0 0 0 0 0 100 2 0 0 122 218 105 15 0 1 1 0 261 0 0 0 100 3 0 0 0 29 3 4 0 0 1 0 5 0 0 0 100 4 0 0 14 71 25 46 0 0 1 0 266 0 0 0 100 5 0 0 0 105 39 114 1 3 0 0 1133 0 1 0 99 6 0 0 1 26 1 6 2 1 1 0 0 0 0 0 100 7 0 0 3 227 103 4 0 0 1 0 600 0 0 0 100 March 2, 2026 at 06:55:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 116 0 1 0 0 295 0 1 0 99 1 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 2 0 0 11 230 111 22 0 1 0 0 261 0 0 0 100 3 0 0 0 67 29 62 0 1 0 0 1 0 0 0 100 4 0 0 14 7 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 60 26 80 2 0 0 0 1133 0 0 0 99 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 2 213 103 4 1 0 0 0 600 0 0 0 100 March 2, 2026 at 06:55:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2389 102 498 6 33 1 0 2227 10 2 0 87 1 9 0 0 437 2 721 21 68 2 0 1524 3 2 0 96 2 0 0 360 461 105 465 10 34 4 0 1510 2 1 0 97 3 13 0 0 291 45 359 14 22 10 0 1489 16 1 0 82 4 20 0 14 309 12 468 7 36 4 0 1195 3 1 0 97 5 0 0 0 234 9 351 4 23 3 0 2039 2 1 0 97 6 0 0 0 324 2 559 15 42 1 0 1363 3 1 0 96 7 0 0 3 328 103 139 2 15 1 0 860 1 0 0 99 March 2, 2026 at 06:55:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38 0 0 2213 102 233 6 20 1 0 837 4 1 0 95 1 2 0 0 133 8 159 4 19 2 0 1214 1 1 0 98 2 4 0 151 280 105 102 2 10 0 0 534 0 0 0 99 3 19 0 0 148 1 232 8 18 5 0 638 2 1 0 97 4 2 0 14 101 3 141 3 17 0 0 573 1 0 0 99 5 8 0 0 52 12 58 2 4 0 0 1406 5 0 0 95 6 0 0 0 261 50 384 8 22 3 0 721 1 1 0 99 7 40 0 2 282 105 85 1 9 0 0 608 1 0 0 99 March 2, 2026 at 06:55:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2239 100 385 0 76 1123 0 0 0 4 0 96 1 0 0 0 183 12 382 1 86 1229 0 603 0 3 0 96 2 0 0 11 335 106 301 0 63 1229 0 262 0 3 0 97 3 0 0 0 339 184 341 0 77 944 0 0 0 3 0 97 4 0 0 14 246 3 534 0 92 1154 0 265 0 3 0 97 5 0 0 0 155 6 328 1 83 1186 0 0 0 3 0 97 6 0 0 0 273 45 517 8 86 1102 0 1126 0 3 0 97 7 0 0 2 333 104 285 0 58 1111 1 302 0 3 0 97 March 2, 2026 at 06:55:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 116 0 1 0 0 0 0 1 0 99 1 0 0 0 39 12 38 1 1 0 0 605 0 0 0 99 2 0 0 10 213 104 6 0 0 0 0 260 0 0 0 100 3 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 44 18 38 0 1 0 0 0 0 0 0 100 6 0 0 0 74 32 100 1 4 1 0 1126 0 0 0 100 7 0 0 3 214 103 6 1 0 0 0 301 0 0 0 100 March 2, 2026 at 06:55:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 150 202 0 0 0 0 0 0 1 0 99 1 0 0 0 31 11 26 1 0 0 0 601 0 0 0 99 2 0 0 10 218 105 18 0 1 0 0 262 0 0 0 100 3 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 14 1 36 2 0 0 0 1125 0 0 0 100 7 0 0 3 218 104 12 0 1 0 0 302 0 0 0 100 March 2, 2026 at 06:55:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 156 216 1 1 0 0 13 0 1 0 99 1 0 0 0 24 8 20 0 0 0 0 602 0 0 0 100 2 0 0 10 211 104 6 0 0 0 0 260 0 0 0 100 3 0 0 0 8 0 2 0 1 0 0 3 0 0 0 100 4 0 0 14 8 2 6 0 0 0 0 270 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 14 2 42 0 2 1 0 1203 0 0 0 100 7 0 0 3 225 105 16 0 0 0 0 309 0 0 0 100 March 2, 2026 at 06:55:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 156 194 0 2 0 0 9 0 1 0 99 1 0 0 0 47 6 44 1 2 0 0 608 0 0 0 100 2 0 0 10 215 105 10 0 0 0 0 262 0 0 0 100 3 0 0 0 13 0 14 0 2 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 267 0 0 0 100 5 0 0 0 14 7 4 0 0 0 0 0 0 0 0 100 6 1 0 0 14 1 38 2 0 1 0 1133 0 0 0 100 7 0 0 3 228 105 24 0 0 0 0 311 0 0 0 100 March 2, 2026 at 06:55:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 153 210 0 1 0 0 9 0 1 0 99 1 0 0 0 23 8 20 0 1 0 0 594 0 0 0 100 2 0 0 10 211 104 6 0 0 0 0 260 0 0 0 100 3 0 0 0 10 0 6 0 0 2 0 0 0 0 0 100 4 0 0 14 14 3 16 0 1 1 0 266 0 0 0 100 5 0 0 0 10 2 6 0 0 2 0 0 0 0 0 100 6 0 0 0 11 1 36 1 1 2 0 1125 0 0 0 100 7 0 0 3 221 103 14 1 0 0 0 301 0 0 0 100 March 2, 2026 at 06:55:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1979 0 0 2167 110 184 3 13 8 15 382 0 2 0 98 1 40 0 2 115 26 128 1 12 16 9 794 0 0 0 100 2 15 0 14 300 130 104 1 11 6 9 377 0 0 0 100 3 13 0 0 40 1 35 0 9 7 4 72 0 0 0 100 4 809 0 14 45 3 37 1 5 11 7 6782 2 1 0 97 5 9 0 0 40 3 24 0 3 3 0 69 0 0 0 100 6 50 0 0 36 2 50 1 6 7 1 1175 0 0 0 99 7 734 0 120 230 104 56 1 5 3 15 468 0 0 0 99 March 2, 2026 at 06:55:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 433 0 0 6476 115 9864 68 273 136 0 30743 23 14 0 63 1 107 0 0 4602 12 9712 71 326 112 0 25179 22 13 0 64 2 71 0 11 3822 110 7394 39 198 126 0 19549 17 11 0 72 3 101 0 0 3740 16 7730 51 247 65 0 17038 13 9 0 78 4 53 0 0 2588 9 5191 46 215 84 1 10376 10 7 0 84 5 28 0 14 1466 14 3067 19 105 88 0 9781 9 5 0 86 6 397 0 0 2370 14 4895 33 172 85 0 11199 9 6 0 84 7 527 0 41 2608 115 4961 27 120 80 0 10728 9 6 0 85 March 2, 2026 at 06:56:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 6851 110 10118 71 338 142 0 26105 25 16 0 59 1 14 0 0 4785 18 9938 51 369 102 0 22616 19 12 0 68 2 33 0 4 4057 113 8065 39 247 106 0 18956 17 10 0 73 3 12 0 0 4714 20 10063 46 301 91 0 21198 16 12 0 72 4 7 0 14 2576 12 5279 44 268 124 0 14388 13 8 0 79 5 23 0 0 2192 11 4452 21 135 77 0 11299 10 6 0 83 6 14 0 0 3174 10 6863 26 227 137 0 15908 12 9 0 78 7 11 0 9 2348 111 4513 17 119 82 0 11137 9 6 0 85 March 2, 2026 at 06:56:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 7 7121 109 10848 55 360 140 0 25747 23 16 0 61 1 52 0 0 5219 17 11020 48 357 114 0 26273 22 15 0 63 2 45 0 4 4027 110 7738 38 252 143 0 17949 17 10 0 73 3 19 0 0 4996 23 10746 41 316 87 0 22901 19 13 0 68 4 6 0 14 2616 18 5340 30 233 100 0 12933 11 8 0 81 5 9 0 0 1738 11 3580 17 146 88 0 10108 9 6 0 86 6 17 0 0 3116 11 6591 40 226 94 0 17237 13 9 0 77 7 8 0 2 1903 112 3506 10 125 32 0 8718 7 5 0 88 March 2, 2026 at 06:56:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 7 2974 105 1878 5 115 664 0 5067 4 6 0 90 1 4 0 0 1091 7 2297 11 149 781 0 4596 4 4 0 92 2 0 0 4 946 108 1486 10 88 777 0 3698 3 4 0 93 3 4 0 0 1178 167 2065 11 114 756 0 4326 4 5 0 92 4 16 0 14 661 6 1336 2 106 655 0 2433 2 4 0 95 5 0 0 0 787 3 1600 4 82 808 0 1621 2 3 0 95 6 6 0 0 690 46 1407 4 97 787 0 4056 3 4 0 93 7 2 0 2 647 103 925 8 73 766 0 1662 2 2 0 96 March 2, 2026 at 06:56:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 102 114 0 0 0 0 260 0 1 0 99 1 0 0 0 12 2 8 0 1 0 0 1 0 0 0 100 2 0 0 3 214 103 8 1 1 0 0 599 0 0 0 100 3 0 0 0 21 7 14 0 0 0 0 300 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 14 2 10 0 2 0 0 0 0 0 0 100 6 0 0 2 81 37 104 2 1 1 0 1213 0 1 0 99 7 0 0 3 243 117 36 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:56:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 110 0 2 0 0 263 0 1 0 99 1 0 0 0 16 3 14 0 1 0 0 10 0 0 0 100 2 0 0 3 226 108 20 0 2 0 0 603 0 0 0 100 3 0 0 0 27 9 22 1 0 0 0 316 0 0 0 100 4 0 0 14 10 2 8 0 0 0 0 276 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 4 0 0 0 100 6 0 0 0 13 3 38 1 1 1 0 1216 0 0 0 100 7 0 0 3 302 148 96 0 2 0 0 1 0 0 0 100 March 2, 2026 at 06:56:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 7 2686 131 1020 21 134 40 0 3643 14 3 0 83 1 1 0 7 753 8 1301 40 196 55 0 3731 8 2 0 90 2 42 0 560 774 115 994 18 129 63 0 3774 8 3 0 89 3 2 0 14 741 9 1305 41 170 71 0 4479 6 3 0 91 4 10 0 14 549 4 855 23 115 48 0 3495 10 2 0 88 5 35 0 0 483 6 708 18 88 54 0 2972 8 2 0 91 6 11 0 0 551 4 985 34 113 53 0 4546 12 2 0 86 7 13 0 2 680 103 733 11 70 64 1 3218 7 2 0 91 March 2, 2026 at 06:56:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2155 138 186 0 3 0 0 268 0 1 0 99 1 0 0 0 73 26 70 0 2 0 0 13 0 0 0 100 2 0 0 11 221 105 20 1 2 0 0 624 0 0 0 100 3 0 0 0 15 2 11 0 3 0 0 295 0 0 0 100 4 0 0 14 9 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 14 7 2 0 0 0 0 0 0 0 0 100 6 0 0 0 15 2 38 1 0 1 0 1135 0 0 0 100 7 0 0 2 217 103 10 0 0 0 0 7 0 0 0 100 March 2, 2026 at 06:56:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2355 156 572 2 108 1686 0 268 0 5 0 95 1 0 0 0 207 2 450 3 124 1704 0 1 0 4 0 96 2 0 0 3 393 104 373 3 94 1541 0 601 0 4 0 96 3 0 0 112 388 204 713 3 121 1743 0 299 0 4 0 95 4 0 0 14 191 3 396 4 118 1794 0 266 0 4 0 96 5 0 0 0 184 1 411 3 94 1841 0 0 0 4 0 96 6 0 0 0 232 2 528 3 123 1613 0 1130 0 4 0 96 7 0 0 3 432 105 497 1 111 1566 0 0 0 3 0 97 March 2, 2026 at 06:56:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2163 152 168 0 4 6 0 260 0 1 0 99 1 0 0 0 30 8 21 0 2 1 0 8 0 0 0 100 2 0 0 7 229 104 24 0 1 4 0 602 0 0 0 100 3 0 0 7 86 17 72 2 2 13 0 294 0 0 0 100 4 0 0 14 34 3 44 0 3 4 0 266 0 0 0 100 5 0 0 0 23 2 26 0 2 7 0 0 0 0 0 100 6 0 0 0 21 3 49 1 3 4 0 1130 0 0 0 100 7 0 0 7 217 103 12 0 1 11 0 0 0 0 0 100 March 2, 2026 at 06:56:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2603 120 873 18 47 9 0 3671 12 3 0 84 1 11 0 7 346 24 476 14 33 17 0 3062 22 1 0 77 2 0 0 493 644 106 818 7 48 5 0 3003 4 2 0 95 3 0 0 0 502 9 812 19 48 5 0 2328 4 2 0 95 4 0 0 0 300 3 559 6 24 1 0 1265 4 1 0 95 5 0 0 14 142 2 122 1 15 0 0 458 0 0 0 99 6 1 0 0 381 5 649 10 44 4 0 2636 3 1 0 96 7 0 0 2 514 113 446 6 26 11 0 1653 6 1 0 93 March 2, 2026 at 06:56:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 104 0 1 1 0 0 0 1 0 99 1 0 0 7 114 54 110 0 0 0 0 260 0 0 0 100 2 0 0 3 221 104 18 0 2 0 0 604 0 0 0 100 3 0 0 0 16 3 8 0 0 0 0 298 0 0 0 100 4 0 0 0 12 3 2 0 0 0 0 1 0 0 0 100 5 0 0 14 21 9 18 0 0 0 0 273 0 0 0 100 6 0 0 0 16 3 40 1 0 0 0 1133 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:56:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 0 0 1 0 99 1 0 0 7 40 14 40 0 2 0 0 275 0 0 0 100 2 0 0 4 301 141 97 1 2 0 0 601 0 0 0 100 3 0 0 0 23 6 21 0 2 0 0 296 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 1 0 0 0 100 5 0 0 14 27 14 16 1 0 0 0 275 0 0 0 100 6 0 0 0 16 3 40 1 0 0 0 1136 0 0 0 100 7 0 0 2 216 103 12 0 1 0 0 7 0 0 0 100 March 2, 2026 at 06:56:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2285 100 483 2 86 1227 0 0 0 3 0 97 1 0 0 7 197 3 421 1 84 1171 0 260 0 3 0 97 2 0 0 4 377 104 357 0 82 1084 0 602 0 3 0 97 3 0 0 0 449 258 675 1 88 1036 0 294 0 3 0 97 4 0 0 0 161 2 352 0 93 1110 0 0 0 2 0 98 5 0 0 14 158 8 369 1 80 1016 0 426 0 3 0 97 6 0 0 0 193 4 412 3 83 1190 0 980 0 3 0 97 7 0 0 2 358 103 320 1 68 1033 0 0 0 3 0 97 March 2, 2026 at 06:56:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 6 0 1 0 99 1 0 0 7 17 5 12 0 0 0 0 262 0 0 0 100 2 0 0 4 221 103 16 1 1 0 0 675 0 0 0 100 3 2 0 0 22 7 16 0 0 0 0 309 0 0 0 100 4 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 5 0 0 14 21 8 46 0 0 0 0 1400 0 0 0 99 6 0 0 0 14 3 10 0 1 0 0 7 0 0 0 100 7 0 0 2 220 105 14 0 1 0 0 10 0 0 0 100 March 2, 2026 at 06:56:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 1 0 0 0 0 1 0 99 1 0 0 7 12 3 8 0 0 0 0 260 0 0 0 100 2 0 0 3 218 104 10 0 0 0 0 602 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 4 0 0 0 25 10 18 0 0 0 0 0 0 0 0 100 5 0 0 14 94 44 122 1 1 0 0 1395 0 0 0 99 6 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 7 1 0 3 223 109 16 0 0 0 0 6 0 0 0 100 March 2, 2026 at 06:56:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 122 0 1 0 0 0 0 1 0 99 1 0 0 7 12 3 8 0 0 0 0 260 0 0 0 100 2 0 0 4 211 103 4 1 0 0 0 600 0 0 0 100 3 0 0 0 13 3 8 0 0 0 0 299 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 14 92 44 116 1 0 0 0 1395 0 0 0 99 6 0 0 0 28 10 24 0 2 0 0 0 0 0 0 100 7 0 0 2 226 110 18 0 0 0 0 10 0 0 0 100 March 2, 2026 at 06:56:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 116 0 0 0 0 1 0 1 0 99 1 0 0 7 22 6 24 0 0 0 0 276 0 0 0 100 2 0 0 4 213 104 6 0 0 0 0 603 0 0 0 100 3 0 0 0 13 2 8 1 1 0 0 295 0 0 0 100 4 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 5 0 0 14 17 9 36 2 0 0 0 1396 0 0 0 100 6 0 0 0 111 51 106 0 0 0 0 5 0 0 0 100 7 0 0 2 227 108 24 0 1 0 0 15 0 0 0 100 March 2, 2026 at 06:56:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 480 0 0 2821 102 1543 23 82 36 4 3729 3 3 0 94 1 96 0 7 769 6 1531 23 71 15 7 3976 3 2 0 95 2 74 0 3 694 105 986 9 57 13 2 3049 3 2 0 95 3 20 0 0 797 8 1842 7 54 31 0 7242 3 2 0 95 4 2727 0 112 778 2 1761 7 41 26 10 6382 3 2 0 95 5 873 0 14 199 3 380 4 27 33 13 9744 3 2 0 95 6 124 0 2 448 44 795 3 33 38 6 3633 6 2 0 92 7 136 0 3 596 110 782 7 37 29 7 3422 3 2 0 96 March 2, 2026 at 06:56:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 6677 113 9569 65 386 168 0 24208 22 15 0 64 1 15 0 7 4281 11 9100 76 394 147 0 23627 20 13 0 67 2 22 0 7 3866 108 7423 56 254 139 0 19539 18 11 0 71 3 11 0 0 4299 9 8757 61 305 68 0 18156 14 10 0 76 4 9 0 0 3090 13 6256 47 241 116 0 14002 12 8 0 80 5 21 0 14 2855 18 6076 31 149 107 0 14763 14 9 0 78 6 21 0 0 3150 14 6643 33 228 122 0 16384 13 9 0 78 7 8 0 7 2441 122 4626 15 128 66 0 11994 10 6 0 83 March 2, 2026 at 06:56:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 6596 111 9457 42 350 131 0 24573 22 15 0 63 1 8 0 7 5047 11 10470 50 381 130 0 23584 20 13 0 67 2 17 0 3 3997 114 8029 32 219 124 0 22219 20 13 0 67 3 4 0 0 4005 14 8277 43 317 81 0 19418 15 10 0 75 4 3 0 0 3120 14 6317 26 254 98 0 13976 12 8 0 79 5 7 0 14 2028 7 4201 18 130 65 0 10902 10 6 0 84 6 5 0 0 3265 16 6874 43 227 112 0 15175 12 9 0 79 7 4 0 3 2372 116 4688 18 107 82 0 12220 11 7 0 82 March 2, 2026 at 06:56:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 30 6332 109 9314 56 304 131 0 23795 21 14 0 65 1 8 0 0 4188 15 8864 37 344 106 0 22693 18 12 0 71 2 7 0 11 3655 123 6899 37 233 86 0 16746 15 9 0 76 3 3 0 0 3477 10 7101 30 257 89 0 15818 12 8 0 80 4 4 0 14 2622 15 5321 16 218 106 0 11553 10 7 0 84 5 3 0 0 1759 9 3612 19 117 58 0 7883 8 5 0 87 6 2 0 0 2447 14 5245 30 174 111 0 13195 11 7 0 82 7 8 0 2 2544 109 5041 20 102 102 0 13665 13 8 0 79 March 2, 2026 at 06:56:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 1 0 0 0 0 1 0 99 1 0 0 0 25 9 48 2 0 1 0 1219 0 0 0 100 2 1 0 10 321 153 119 1 2 0 0 573 0 0 0 100 3 0 0 0 18 4 15 0 2 0 0 22 0 0 0 100 4 0 0 14 10 4 6 0 0 0 0 567 0 0 0 100 5 0 0 0 15 7 4 0 0 0 0 0 0 0 0 100 6 0 0 0 20 3 19 0 1 0 0 263 0 0 0 100 7 0 0 3 212 101 8 0 0 0 0 7 0 0 0 100 March 2, 2026 at 06:56:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2544 104 897 28 142 779 0 1479 4 4 0 92 1 2 0 0 302 12 527 15 109 876 0 1881 9 3 0 87 2 0 0 234 573 106 742 18 122 895 0 2455 4 4 0 93 3 0 0 0 573 169 856 20 141 820 1 1731 4 4 0 93 4 0 0 14 409 24 712 21 130 749 0 1870 4 3 0 93 5 0 0 0 360 4 632 12 129 944 1 993 2 3 0 96 6 0 0 0 380 2 733 21 134 912 0 2389 2 4 0 94 7 41 0 3 566 101 694 13 104 906 0 1467 3 3 0 95 March 2, 2026 at 06:56:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2530 107 761 10 83 35 0 2395 6 2 0 92 1 7 0 0 511 4 589 25 67 25 0 2276 10 1 0 88 2 3 0 315 573 107 608 14 68 76 3 2559 4 2 0 95 3 0 0 0 350 4 536 13 67 37 4 1865 4 1 0 95 4 3 0 225 357 9 579 10 69 22 0 2286 2 1 0 96 5 0 0 14 330 1 438 8 42 30 0 1412 3 1 0 96 6 30 0 0 446 40 735 6 68 80 4 3723 4 2 0 94 7 1 0 11 390 102 247 7 26 11 0 1596 9 1 0 90 March 2, 2026 at 06:56:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 90 0 2 0 0 9 0 1 0 99 1 0 0 0 103 30 92 0 1 0 0 0 0 0 0 100 2 0 0 10 215 104 10 0 1 0 0 560 0 0 0 100 3 0 0 0 13 1 4 0 1 0 0 2 0 0 0 100 4 0 0 14 19 5 12 2 1 0 0 858 0 0 0 100 5 0 0 7 15 1 15 0 3 0 0 0 0 0 0 100 6 0 0 0 55 24 78 1 1 1 0 1130 0 0 0 100 7 0 0 3 209 101 2 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:56:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2118 106 123 0 2 0 0 9 0 1 0 99 1 0 0 0 127 53 106 0 0 0 0 5 0 0 0 100 2 0 0 10 233 105 14 1 2 0 0 561 0 0 0 100 3 0 0 0 23 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 28 5 8 0 0 0 0 861 0 0 0 100 5 0 0 0 28 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 29 2 38 1 2 1 0 1130 0 0 0 100 7 0 0 3 225 102 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:56:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2120 107 132 1 4 0 0 16 0 1 0 99 1 0 0 0 114 54 108 0 0 0 0 3 0 0 0 100 2 0 0 10 217 105 12 0 0 0 0 562 0 0 0 100 3 0 0 0 11 1 6 0 0 0 0 2 0 0 0 100 4 0 0 14 13 5 8 0 0 0 0 860 0 0 0 100 5 0 0 0 17 7 4 0 0 1 0 0 0 0 0 100 6 0 0 0 20 2 50 1 1 1 0 1135 0 0 0 100 7 0 0 3 219 102 12 0 3 0 0 8 0 0 0 100 March 2, 2026 at 06:56:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2644 108 955 22 142 1506 0 1486 6 6 0 88 1 1 0 0 635 18 1100 22 181 1510 1 2454 4 5 0 91 2 0 0 500 538 105 656 6 118 1595 1 1595 3 4 0 93 3 3 0 0 670 161 924 17 130 1529 0 1924 7 6 0 87 4 3 0 14 450 8 769 10 120 1583 0 2555 10 6 0 84 5 1 0 0 515 10 892 8 103 1407 0 1279 14 5 0 81 6 1 0 0 602 20 1060 23 141 1659 0 3760 11 6 0 83 7 1 0 3 651 113 756 7 99 1644 0 1403 2 5 0 92 March 2, 2026 at 06:56:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 104 255 2 33 323 0 8 0 2 0 98 1 0 0 0 216 27 370 0 47 359 0 0 0 1 0 99 2 0 0 9 273 106 139 0 26 370 0 260 0 1 0 99 3 0 0 0 165 97 133 0 24 382 0 302 0 1 0 99 4 0 0 14 91 9 167 3 33 343 0 861 0 1 0 99 5 0 0 0 77 2 139 0 32 342 0 0 0 1 0 99 6 0 0 0 102 3 201 1 37 453 0 1129 0 1 0 99 7 0 0 4 330 123 208 0 31 342 0 0 0 1 0 99 March 2, 2026 at 06:56:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 118 0 2 0 0 10 0 1 0 99 1 0 0 0 19 3 14 0 0 0 0 2 0 0 0 100 2 0 0 9 243 119 36 0 0 0 0 260 0 0 0 100 3 0 0 0 80 35 75 1 3 0 0 300 0 0 0 100 4 0 0 14 16 6 12 0 0 0 0 860 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 34 1 0 0 0 1130 0 0 0 100 7 0 0 4 209 101 2 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:56:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 108 64 0 1 0 0 11 0 1 0 99 1 0 0 0 79 2 80 0 2 0 0 1 0 0 0 100 2 0 0 10 210 103 8 0 1 0 0 260 0 0 0 100 3 0 0 0 56 24 46 0 0 0 0 302 0 0 0 100 4 0 0 14 75 35 70 0 1 0 0 861 0 0 0 100 5 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 6 0 0 0 9 2 34 0 0 0 0 1132 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 March 2, 2026 at 06:56:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 159 0 0 3915 110 3770 43 165 70 3 8968 8 6 0 85 1 33 0 0 1810 5 3576 47 166 84 2 9468 7 5 0 88 2 1917 0 25 1773 104 3253 31 115 32 4 8114 7 5 0 88 3 51 0 0 2154 18 5028 31 137 53 4 17974 9 6 0 86 4 751 0 116 1093 30 2107 21 108 55 10 8108 10 4 0 86 5 162 0 0 1045 12 2096 15 82 58 15 5035 5 3 0 92 6 816 0 2 1229 4 2535 27 112 53 8 14083 8 5 0 88 7 495 0 2 1277 105 2175 16 62 49 1 6282 4 3 0 93 March 2, 2026 at 06:56:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 6790 113 10081 81 480 560 0 25173 24 16 0 60 1 19 0 0 5152 11 11088 82 496 545 1 25590 22 15 0 63 2 6 0 4 3572 116 6822 55 311 443 0 16013 15 10 0 74 3 4 0 21 4670 131 9496 81 429 389 0 20225 16 12 0 73 4 8 0 0 3088 20 6297 53 351 508 0 15348 14 10 0 76 5 35 0 0 2069 13 4218 55 222 516 0 10996 10 6 0 84 6 6 0 0 3402 11 7280 47 304 432 0 18292 14 10 0 75 7 7 0 2 2441 108 4796 27 180 373 0 13169 10 7 0 83 March 2, 2026 at 06:56:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 16 6937 104 10425 61 352 123 0 26427 24 16 0 60 1 10 0 0 4684 15 9774 62 392 161 0 24718 20 13 0 66 2 8 0 4 3966 113 7612 47 253 99 0 16493 14 10 0 76 3 6 0 7 4512 20 9504 61 325 102 0 21161 17 11 0 72 4 2 0 0 2768 14 5645 29 227 97 0 13946 12 8 0 81 5 6 0 0 2254 7 4638 25 125 141 0 12406 12 7 0 81 6 6 0 0 2967 16 6363 34 224 89 0 17110 14 9 0 77 7 5 0 2 2701 107 5225 21 128 83 0 13916 11 7 0 82 March 2, 2026 at 06:56:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 14 4591 106 5608 31 185 76 0 15391 14 9 0 77 1 3 0 0 3106 10 6497 36 230 66 0 12310 10 7 0 84 2 1 0 3 2412 114 4624 14 150 55 0 11459 10 6 0 84 3 9 0 7 2010 13 4104 15 161 59 0 10565 8 6 0 86 4 4 0 0 1291 12 2618 15 131 58 0 8739 7 4 0 88 5 4 0 0 938 6 1916 6 65 40 0 5522 5 3 0 92 6 2 0 0 1874 30 3785 15 134 34 0 7717 6 4 0 90 7 4 0 3 1496 109 2891 16 94 46 0 8278 7 4 0 89 March 2, 2026 at 06:56:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 28 2843 104 1361 36 190 31 2 3762 5 3 0 91 1 4 0 7 649 8 1071 34 141 22 0 3528 12 2 0 86 2 2 0 543 780 102 1084 24 136 55 0 2845 5 3 0 92 3 0 0 0 643 5 1111 37 137 69 0 4850 11 3 0 86 4 2 0 0 545 5 926 26 100 48 2 4606 12 2 0 86 5 42 0 0 565 5 868 23 86 39 1 3049 8 2 0 90 6 0 0 7 583 33 902 23 98 56 4 4330 13 2 0 85 7 2 0 4 644 112 633 17 64 86 0 2798 7 2 0 91 March 2, 2026 at 06:56:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 14 2117 106 120 1 3 1 0 273 0 1 0 99 1 0 0 0 34 10 24 0 1 0 0 15 0 0 0 100 2 0 0 10 212 102 4 0 2 0 0 0 0 0 0 100 3 0 0 0 20 4 14 1 0 0 0 597 0 0 0 100 4 0 0 0 14 4 36 1 0 0 0 1135 0 0 0 100 5 0 0 0 114 55 103 0 3 0 0 7 0 0 0 100 6 0 0 7 19 3 14 0 0 1 0 271 0 0 0 100 7 0 0 3 230 106 28 1 3 0 0 303 0 0 0 100 March 2, 2026 at 06:56:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2199 102 386 1 82 1546 0 1396 0 6 0 94 1 0 0 0 191 6 363 1 77 1236 0 7 0 4 0 96 2 0 0 3 418 108 424 0 75 1461 0 2 0 3 0 97 3 0 0 0 284 156 264 2 81 1386 0 594 0 4 0 96 4 0 0 0 152 4 307 2 85 1363 0 0 0 4 0 96 5 0 0 0 136 4 274 1 72 1273 0 0 0 4 0 96 6 0 0 7 133 3 274 1 78 1452 0 262 0 4 0 96 7 0 0 3 412 143 354 0 75 1339 0 300 0 3 0 97 March 2, 2026 at 06:56:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2257 131 417 3 46 639 0 1671 0 3 0 97 1 0 0 0 120 1 247 1 54 594 0 0 0 1 0 99 2 0 0 3 311 102 205 1 38 589 0 1 0 1 0 99 3 0 0 0 316 163 369 1 59 460 0 594 0 2 0 98 4 0 0 0 115 4 219 0 49 531 0 2 0 1 0 99 5 0 0 0 103 4 196 0 38 534 0 1 0 1 0 99 6 0 0 7 226 8 393 1 48 454 0 268 0 1 0 98 7 0 0 3 302 102 196 1 34 414 0 27 0 1 0 99 March 2, 2026 at 06:56:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2183 153 274 6 2 5 0 2100 4 1 0 95 1 0 0 0 102 1 188 1 16 3 0 394 1 0 0 99 2 1 0 59 259 103 96 4 12 0 0 119 0 0 0 100 3 0 0 0 77 6 91 4 8 0 0 983 1 0 0 99 4 0 0 0 35 2 30 0 7 0 0 43 0 0 0 100 5 0 0 0 30 1 32 0 1 0 0 51 0 0 0 100 6 0 0 7 72 9 98 1 5 2 0 494 1 0 0 99 7 0 0 3 256 101 78 1 3 0 0 327 1 0 0 99 March 2, 2026 at 06:56:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2416 107 510 8 53 3 0 2003 5 2 0 93 1 0 0 0 465 15 782 15 42 4 0 3212 4 2 0 95 2 0 0 438 533 127 546 5 19 11 0 1302 2 1 0 97 3 2 0 0 381 10 574 23 37 12 0 3226 13 1 0 86 4 0 0 0 261 4 367 11 22 18 0 2155 15 1 0 84 5 1 0 0 352 5 543 5 25 3 0 1544 3 1 0 96 6 0 0 7 345 7 559 7 32 7 0 2065 6 1 0 93 7 0 0 2 365 105 171 3 11 1 0 669 1 0 0 98 March 2, 2026 at 06:56:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2160 148 204 0 1 0 0 272 0 1 0 99 1 0 0 0 14 3 38 1 0 0 0 1430 0 0 0 100 2 0 0 4 227 104 26 0 3 0 0 0 0 0 0 100 3 0 0 0 32 10 27 1 1 0 0 581 0 0 0 100 4 0 0 0 9 2 1 0 1 0 0 27 0 0 0 100 5 0 0 0 25 12 12 0 0 0 0 7 0 0 0 100 6 0 0 7 12 2 12 0 0 0 0 271 0 0 0 100 7 0 0 2 219 105 14 0 1 0 0 7 0 0 0 100 March 2, 2026 at 06:56:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2275 123 445 3 82 1261 0 266 0 3 0 97 1 0 0 0 245 9 495 2 97 1191 0 335 0 3 0 97 2 0 0 4 406 123 426 4 89 1223 1 703 0 3 0 97 3 0 0 0 365 202 384 3 91 1243 0 309 0 4 0 96 4 0 0 0 148 3 330 4 83 1305 0 315 0 3 0 96 5 0 0 0 134 3 292 5 70 1149 0 226 0 3 0 97 6 0 0 7 173 6 368 3 78 1113 0 263 0 3 0 97 7 0 0 2 368 104 355 4 64 1136 0 170 0 3 0 97 March 2, 2026 at 06:56:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1898 0 14 2143 101 143 2 10 12 4 643 0 1 0 98 1 24 0 0 91 23 102 0 18 18 3 407 0 0 0 100 2 15 0 4 308 128 135 1 14 7 3 1259 0 0 0 99 3 22 0 0 78 20 64 1 10 12 3 45 0 0 0 100 4 720 0 113 38 2 67 0 8 8 8 400 0 0 0 99 5 93 0 0 50 2 58 1 7 6 13 98 0 0 0 100 6 13 0 9 37 2 39 0 7 10 5 653 0 0 0 100 7 318 0 2 241 103 42 1 7 3 5 6542 2 1 0 98 March 2, 2026 at 06:56:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 88 0 14 4967 106 5966 53 217 72 0 17091 15 10 0 75 1 16 0 0 3081 8 6317 63 256 81 0 16072 14 8 0 78 2 514 0 3 2437 107 4507 52 185 74 0 12956 10 7 0 83 3 19 0 7 2792 12 5922 54 206 68 0 14506 12 8 0 80 4 29 0 0 2339 23 5311 33 165 72 0 18220 10 6 0 83 5 58 0 0 1745 14 3652 23 122 48 0 8429 7 5 0 88 6 83 0 0 2214 18 4508 39 156 78 0 12203 13 6 0 81 7 563 0 3 1718 109 3153 28 96 34 0 7635 7 4 0 89 March 2, 2026 at 06:56:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 14 6519 107 9375 47 364 144 0 27325 25 16 0 59 1 21 0 0 4905 12 10306 69 422 92 0 23787 20 13 0 68 2 7 0 4 3731 108 7364 51 255 107 0 21572 18 11 0 71 3 14 0 0 4621 13 9527 76 309 93 0 19363 16 10 0 73 4 12 0 0 2778 13 5761 31 266 114 0 14286 13 8 0 79 5 4 0 7 1870 10 4002 16 149 77 0 10855 10 6 0 85 6 15 0 0 3038 13 6465 36 253 85 0 17268 14 9 0 77 7 4 0 2 3326 121 6356 25 151 63 0 11988 9 7 0 84 March 2, 2026 at 06:56:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 6617 108 9573 80 410 108 0 24760 23 15 0 62 1 8 0 14 5259 13 10922 73 435 121 0 25176 20 13 0 66 2 15 0 3 3853 117 7872 53 271 108 0 23607 22 13 0 65 3 7 0 0 4942 18 10179 85 371 77 0 20627 17 11 0 72 4 4 0 0 2709 12 5559 28 280 94 0 15621 14 9 0 77 5 1 0 0 2017 24 4069 24 171 90 0 9502 8 5 0 87 6 2 0 7 2810 9 5847 45 234 109 0 14654 11 8 0 81 7 3 0 3 2513 109 5054 11 127 47 0 12561 9 6 0 84 March 2, 2026 at 06:56:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 15 4129 108 4069 68 371 1331 0 11543 13 12 0 76 1 43 0 14 2054 8 4133 58 326 1151 1 10281 14 10 0 76 2 3 0 564 1932 111 3362 33 251 1392 1 7562 12 9 0 79 3 29 0 0 1884 162 3392 77 285 1497 0 9396 23 9 0 68 4 3 0 7 1381 23 2543 33 293 1362 0 6376 8 8 0 84 5 4 0 0 1100 9 2048 35 208 1246 1 4920 11 8 0 82 6 19 0 0 1600 6 3252 54 250 1441 1 8983 19 9 0 72 7 3 0 18 1562 113 2595 20 198 1470 0 5800 8 8 0 84 March 2, 2026 at 06:56:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2370 114 629 2 53 598 0 313 0 3 0 97 1 2 0 14 138 3 276 1 63 824 0 567 0 2 0 98 2 0 0 7 314 103 232 2 52 749 0 0 0 2 0 98 3 0 0 0 350 181 328 5 56 734 0 0 0 2 0 98 4 0 0 0 119 6 250 1 68 783 0 0 0 2 0 98 5 0 0 0 112 4 206 4 45 797 0 2 0 2 0 98 6 0 0 7 117 3 262 4 50 821 0 1425 0 2 0 98 7 0 0 14 318 104 217 1 39 664 0 260 0 2 0 98 March 2, 2026 at 06:56:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2130 112 80 1 2 0 0 39 0 1 0 99 1 0 0 14 84 3 62 1 3 0 0 847 0 0 0 100 2 0 0 4 225 101 6 0 0 0 0 7 0 0 0 100 3 0 0 0 34 1 14 0 0 0 0 0 0 0 0 100 4 0 0 0 125 52 104 0 1 1 0 3 0 0 0 100 5 0 0 0 24 1 4 0 0 1 0 3 0 0 0 100 6 0 0 0 27 2 36 0 0 0 0 1423 0 0 0 100 7 0 0 9 237 107 18 0 2 0 0 269 0 0 0 100 March 2, 2026 at 06:56:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 110 0 0 0 0 1 0 1 0 99 1 0 0 14 12 4 10 0 1 0 0 866 0 0 0 100 2 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 25 4 18 0 1 0 0 0 0 0 0 100 4 0 0 0 55 25 46 0 0 0 0 1 0 0 0 100 5 0 0 0 12 2 6 0 0 0 0 2 0 0 0 100 6 0 0 0 71 29 100 1 3 0 0 1426 0 0 0 100 7 0 0 10 223 109 16 0 0 0 0 269 0 0 0 100 March 2, 2026 at 06:56:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2398 121 502 14 29 4 0 2617 14 2 0 84 1 0 0 14 315 7 462 11 42 1 0 2163 8 1 0 91 2 0 0 409 559 104 668 9 37 6 0 1918 6 2 0 93 3 0 0 0 494 21 802 18 49 6 0 1999 3 2 0 95 4 0 0 0 304 9 422 5 25 1 0 1028 2 1 0 97 5 1 0 0 187 8 220 4 11 2 0 666 8 0 0 92 6 1 0 0 308 7 488 6 30 2 0 2408 2 1 0 97 7 0 0 10 519 118 465 2 17 4 0 1209 2 1 0 98 March 2, 2026 at 06:56:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2306 109 494 2 102 1555 0 353 3 4 0 92 1 1 0 14 269 5 551 6 125 1549 1 1324 1 4 0 94 2 0 0 87 427 103 465 9 97 1644 1 379 3 4 0 92 3 0 0 0 385 179 423 4 107 1420 1 1897 1 5 0 94 4 1 0 0 224 24 411 3 102 1640 0 347 0 3 0 96 5 0 0 0 182 15 348 2 84 1545 0 151 0 4 0 96 6 0 0 0 170 2 354 5 106 1612 0 207 0 4 0 95 7 0 0 10 510 114 599 7 86 1417 0 695 0 4 0 95 March 2, 2026 at 06:56:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 148 248 0 13 21 0 0 0 1 0 99 1 0 0 14 101 9 165 0 9 34 0 568 0 0 0 100 2 0 0 3 234 102 45 1 8 26 0 1 0 0 0 100 3 0 0 0 94 56 88 1 3 39 0 1131 0 1 0 99 4 0 0 0 52 8 78 0 9 25 0 309 0 0 0 100 5 0 0 0 30 1 47 0 6 18 0 0 0 0 0 100 6 0 0 0 33 0 55 0 7 32 0 0 0 0 0 100 7 0 0 10 241 104 64 0 7 35 0 554 0 0 0 100 March 2, 2026 at 06:56:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 118 0 0 0 0 0 0 1 0 99 1 0 0 14 119 54 118 2 1 0 0 566 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 13 2 38 1 1 0 0 1130 0 1 0 99 4 0 0 0 24 8 16 2 0 0 0 310 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 10 212 104 6 0 0 0 0 554 0 0 0 100 March 2, 2026 at 06:56:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 797 0 0 2137 101 129 2 7 6 11 6528 2 2 0 96 1 21 0 15 147 42 143 0 8 4 5 659 0 0 0 100 2 1892 0 4 239 102 39 2 7 9 7 372 0 1 0 99 3 39 0 0 71 15 107 1 10 6 4 1332 0 1 0 99 4 8 0 0 50 9 38 0 5 5 3 346 0 0 0 100 5 56 0 0 36 1 43 0 11 4 5 109 0 0 0 100 6 721 0 113 24 0 44 1 10 8 5 165 0 0 0 99 7 100 0 9 255 104 72 0 7 3 16 699 0 0 0 100 March 2, 2026 at 06:56:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 108 0 0 6706 109 10579 89 331 131 1 32635 22 15 0 63 1 22 0 0 4086 13 8443 72 377 117 1 24655 22 13 0 65 2 87 0 18 3905 112 7342 57 233 82 0 15745 15 9 0 76 3 47 0 0 4028 18 8221 66 291 69 0 19310 15 10 0 75 4 53 0 0 2294 17 4651 33 212 113 0 12888 12 7 0 81 5 57 0 0 2200 14 4573 27 131 71 0 11407 10 7 0 84 6 16 0 0 2785 13 5831 33 251 64 0 14466 12 8 0 80 7 471 0 9 2244 112 4220 32 135 77 0 11241 8 6 0 86 March 2, 2026 at 06:56:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 6694 107 9880 106 445 610 0 27548 26 17 0 57 1 16 0 0 5120 14 10629 137 582 707 0 23362 18 13 0 68 2 4 0 3 4044 118 7674 71 371 597 0 18324 17 12 0 72 3 15 0 21 4784 169 9818 73 421 595 0 22524 17 13 0 70 4 25 0 0 3177 15 6675 74 396 689 0 14322 13 10 0 77 5 7 0 0 2119 10 4592 35 230 707 0 13117 12 9 0 80 6 8 0 0 2891 10 6056 52 315 619 0 13781 12 9 0 79 7 3 0 3 2370 114 4521 34 223 551 0 11013 9 7 0 83 March 2, 2026 at 06:56:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2437 102 871 2 26 25 0 2712 3 2 0 95 1 14 0 0 464 7 918 15 39 8 0 2435 2 1 0 97 2 4 0 7 572 107 710 6 27 5 0 1886 1 1 0 98 3 2 0 21 403 13 793 13 35 8 0 3207 1 1 0 97 4 2 0 0 320 48 553 5 31 11 0 1212 1 1 0 98 5 1 0 0 314 5 596 7 18 6 0 1129 1 1 0 99 6 1 0 0 129 9 246 4 18 10 0 625 1 0 0 99 7 20 0 7 338 105 263 4 17 2 0 1031 1 0 0 99 March 2, 2026 at 06:56:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 105 119 0 1 1 0 1 0 1 0 99 1 0 0 0 21 3 19 0 6 1 0 0 0 0 0 100 2 0 0 4 221 103 22 0 5 1 0 300 0 0 0 100 3 0 0 21 122 56 152 1 5 3 0 1744 0 1 0 99 4 0 0 0 13 3 9 0 2 1 0 0 0 0 0 100 5 0 0 0 10 1 6 0 2 1 0 300 0 0 0 100 6 0 0 0 21 6 16 0 2 1 0 6 0 0 0 100 7 0 0 2 214 103 4 1 0 0 0 294 0 0 0 100 March 2, 2026 at 06:57:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 0 0 1 0 0 0 1 0 99 1 0 0 0 13 2 10 0 2 1 0 0 0 0 0 100 2 0 0 4 216 103 10 0 1 0 0 300 0 0 0 100 3 0 0 21 122 55 154 1 2 1 0 1742 0 0 0 99 4 0 0 0 12 3 6 0 0 0 0 1 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 302 0 0 0 100 6 0 0 0 20 7 14 0 0 0 0 10 0 0 0 100 7 0 0 9 210 102 4 0 0 0 0 294 0 0 0 100 March 2, 2026 at 06:57:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 100 114 0 2 0 0 0 0 1 0 99 1 0 0 0 14 2 10 0 0 0 0 7 0 0 0 100 2 0 0 3 213 103 6 0 0 0 0 300 0 0 0 100 3 0 0 21 119 55 144 1 0 0 0 1748 0 0 0 99 4 0 0 0 12 2 6 0 1 0 0 0 0 0 0 100 5 0 0 0 13 6 2 0 0 0 0 300 0 0 0 100 6 1 0 0 26 8 26 0 1 0 0 21 0 0 0 100 7 0 0 3 219 104 10 0 0 0 0 296 0 0 0 100 March 2, 2026 at 06:57:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2174 100 249 0 20 168 0 0 0 1 0 99 1 0 0 0 92 3 172 0 26 197 1 18 0 1 0 99 2 3 0 4 271 104 131 1 27 184 0 309 0 1 0 99 3 0 0 21 150 86 276 1 27 191 0 1733 0 1 0 99 4 0 0 0 172 50 242 0 28 216 1 21 0 1 0 99 5 0 0 0 67 2 123 1 20 164 0 335 0 1 0 99 6 0 0 0 83 10 148 0 27 178 1 18 0 1 0 99 7 0 0 2 265 104 115 0 16 168 0 300 0 1 0 99 March 2, 2026 at 06:57:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 15 3 10 0 0 0 0 1 0 0 0 100 2 0 0 4 214 104 8 0 0 0 0 301 0 0 0 100 3 0 0 21 17 5 44 1 0 1 0 1728 0 0 0 99 4 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 5 0 0 0 11 1 10 0 1 1 0 300 0 0 0 100 6 0 0 0 119 57 114 0 0 0 0 10 0 0 0 100 7 0 0 2 209 102 2 0 0 0 0 294 0 0 0 100 March 2, 2026 at 06:57:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 2 0 0 3 212 103 6 0 1 0 0 300 0 0 0 100 3 0 0 21 14 5 42 0 0 0 0 1732 0 0 0 99 4 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 302 0 0 0 100 6 0 0 0 119 57 114 0 0 0 0 10 0 0 0 100 7 0 0 3 210 102 2 1 0 0 0 294 0 0 0 100 March 2, 2026 at 06:57:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 116 0 2 0 0 0 0 1 0 99 1 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 2 0 0 4 212 104 6 0 0 0 0 300 0 0 0 100 3 0 0 21 15 5 42 1 1 1 0 1730 0 0 0 99 4 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 6 0 0 0 69 29 66 0 1 0 0 10 0 0 0 100 7 0 0 2 261 127 54 0 2 0 0 294 0 0 0 100 March 2, 2026 at 06:57:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 150 144 0 2 0 0 0 0 1 0 99 1 0 0 0 81 3 75 0 2 0 0 13 0 0 0 100 2 0 0 3 213 104 6 1 0 0 0 300 0 0 0 100 3 0 0 21 17 5 17 0 1 0 0 585 0 0 0 100 4 0 0 0 13 4 8 0 0 0 0 2 0 0 0 100 5 0 0 0 15 7 4 1 0 0 0 302 0 0 0 100 6 0 0 0 27 7 21 1 1 0 0 52 0 0 0 100 7 0 0 3 226 102 25 0 3 0 0 252 0 0 0 100 March 2, 2026 at 06:57:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 122 146 0 1 0 0 3 0 1 0 99 1 0 0 0 76 33 74 0 1 2 0 5 0 0 0 100 2 0 0 4 218 104 12 0 2 4 0 300 0 0 0 100 3 0 0 21 14 4 43 1 0 0 0 1680 0 0 0 100 4 0 0 0 12 2 10 0 0 1 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 6 0 0 0 19 7 14 0 0 0 0 300 0 0 0 100 7 0 0 2 212 101 6 0 0 1 0 0 0 0 0 100 March 2, 2026 at 06:57:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43 0 0 6490 110 9136 90 337 123 0 23990 21 14 0 64 1 151 0 0 4089 16 8416 75 366 128 0 22032 20 11 0 68 2 12 0 3 3386 111 6333 45 238 122 0 15292 14 9 0 78 3 57 0 21 3944 22 8225 70 302 98 0 18549 15 10 0 76 4 23 0 0 2297 11 4585 35 235 98 0 12160 10 7 0 83 5 10 0 0 1925 15 4125 22 138 93 1 12479 11 7 0 82 6 49 0 0 3325 17 7669 43 230 115 0 25099 15 9 0 75 7 433 0 3 2582 111 5030 26 140 87 0 13299 11 7 0 82 March 2, 2026 at 06:57:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 6867 110 10187 67 368 139 0 24142 22 15 0 64 1 11 0 0 5381 11 11425 80 412 144 0 26895 23 15 0 62 2 8 0 3 4004 117 7979 35 269 117 0 21476 19 12 0 69 3 9 0 0 4749 22 9755 84 371 86 0 23408 18 12 0 69 4 2 0 21 2543 15 5187 34 268 119 0 15305 12 8 0 80 5 6 0 0 2110 11 4312 28 141 89 0 12153 10 6 0 84 6 6 0 0 3175 12 6587 45 251 86 0 15678 13 9 0 78 7 8 0 3 2127 110 3891 14 118 54 0 8295 7 5 0 88 March 2, 2026 at 06:57:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 1 6531 107 9588 77 372 195 0 26756 24 16 0 60 1 12 0 0 4940 10 10521 71 398 161 0 24675 21 13 0 66 2 5 0 4 3884 113 7243 62 262 117 0 15448 14 9 0 77 3 7 0 0 4335 20 8889 51 321 75 0 19030 15 10 0 74 4 3 0 21 3022 23 6192 29 251 143 0 15092 13 8 0 78 5 6 0 0 2386 20 4947 22 160 96 0 12478 10 7 0 83 6 7 0 0 3602 7 7656 35 230 116 0 21088 16 10 0 74 7 7 0 2 2136 105 4062 15 131 75 0 11906 11 6 0 83 March 2, 2026 at 06:57:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2216 102 256 1 11 10 0 377 0 1 0 99 1 0 0 0 63 1 150 3 4 4 0 626 0 0 0 99 2 0 0 4 232 103 29 0 1 0 0 99 0 0 0 100 3 0 0 0 53 11 61 0 5 1 0 677 0 0 0 99 4 1 0 21 37 4 57 0 4 8 0 776 0 0 0 100 5 0 0 0 67 28 60 0 3 2 0 31 0 0 0 100 6 0 0 0 161 1 295 2 4 6 0 1576 0 1 0 99 7 0 0 2 333 133 187 1 6 0 0 374 0 0 0 100 March 2, 2026 at 06:57:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2228 104 377 0 66 901 0 0 0 3 0 97 1 0 0 0 125 1 260 1 69 865 0 0 0 3 0 97 2 0 0 4 432 102 501 0 67 898 0 0 0 2 0 98 3 0 0 0 355 202 295 2 70 882 0 604 0 3 0 96 4 0 0 21 151 10 301 1 79 922 0 527 0 3 0 97 5 0 0 0 215 14 436 1 79 838 0 0 0 3 0 97 6 0 0 0 149 5 351 2 81 931 0 1208 0 3 0 97 7 0 0 2 373 120 322 1 68 851 0 301 0 3 0 97 March 2, 2026 at 06:57:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 132 164 0 10 12 0 19 0 1 0 99 1 0 0 0 30 0 34 0 6 11 0 6 0 0 0 100 2 0 0 3 222 103 26 0 1 10 0 4 0 0 0 100 3 0 0 0 65 36 40 0 3 13 0 611 0 0 0 99 4 0 0 21 70 5 83 0 10 17 0 531 0 0 0 100 5 0 0 0 44 0 81 0 6 22 0 0 0 0 0 100 6 0 0 0 70 23 115 2 4 18 0 1208 0 0 0 100 7 0 0 3 236 106 42 0 8 12 0 303 0 0 0 100 March 2, 2026 at 06:57:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 106 0 2 0 0 0 0 1 0 99 1 0 0 0 16 5 12 0 1 0 0 9 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 19 5 14 1 0 0 0 595 0 0 0 100 4 0 0 21 23 10 18 0 1 0 0 526 0 0 0 100 5 0 0 0 62 28 58 0 1 0 0 0 0 0 0 100 6 0 0 0 17 2 41 1 3 0 0 1208 0 0 0 100 7 0 0 4 245 119 36 0 1 0 0 300 0 0 0 100 March 2, 2026 at 06:57:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 120 0 1 0 0 0 0 1 0 99 1 0 0 0 19 7 14 0 0 0 0 11 0 0 0 100 2 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 16 4 12 0 0 0 0 594 0 0 0 100 4 0 0 21 9 4 6 0 0 0 0 525 0 0 0 100 5 0 0 0 102 47 97 0 2 0 0 0 0 0 0 100 6 0 0 0 25 7 46 1 1 0 0 1210 0 0 0 100 7 0 0 2 214 103 8 0 1 0 0 300 0 0 0 100 March 2, 2026 at 06:57:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 62 0 2 0 0 1 0 1 0 99 1 1 0 0 31 13 26 0 0 0 0 17 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 20 5 16 1 1 0 0 596 0 0 0 100 4 0 0 21 15 6 14 0 0 0 0 536 0 0 0 100 5 0 0 0 21 7 8 0 0 1 0 0 0 0 0 100 6 0 0 0 163 52 192 1 3 0 0 1221 0 0 0 100 7 0 0 3 221 104 14 1 1 0 0 305 0 0 0 100 March 2, 2026 at 06:57:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 1 1 0 0 0 1 0 99 1 0 0 0 74 31 72 0 2 0 0 6 0 0 0 100 2 0 0 3 211 102 8 0 1 2 0 0 0 0 0 100 3 0 0 0 19 4 16 0 1 0 0 594 0 0 0 100 4 0 0 21 9 4 6 0 0 0 0 526 0 0 0 100 5 0 0 0 15 1 10 0 0 2 0 0 0 0 0 100 6 0 0 0 22 8 46 0 1 1 0 1208 0 0 0 100 7 0 0 3 252 122 44 0 1 1 0 300 0 0 0 100 March 2, 2026 at 06:57:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1520 0 0 2490 103 447 224 54 81 1 2676 88 4 0 8 1 2465 0 0 704 34 1006 515 54 108 8 2126 89 3 0 8 2 2984 0 1133 595 105 798 397 53 142 10 2452 88 4 0 8 3 4805 0 0 694 11 1165 577 60 155 5 3607 88 4 0 8 4 4278 0 21 643 8 954 494 60 148 11 3795 88 4 0 8 5 4850 0 0 633 2 1002 499 45 159 15 2812 88 4 0 8 6 5816 0 0 712 12 1117 526 56 191 14 4009 88 5 0 8 7 1283 0 7 804 116 766 396 55 78 4 2470 90 2 0 8 March 2, 2026 at 06:57:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 635 0 0 2492 106 637 332 42 54 1 2260 97 3 0 0 1 810 0 0 597 15 988 512 45 36 0 2635 97 3 0 0 2 805 0 759 760 115 1188 600 39 35 1 2766 97 3 0 0 3 0 0 0 443 13 538 305 40 69 0 3222 98 2 0 0 4 656 0 14 604 8 1038 544 49 54 1 2857 97 3 0 0 5 6 0 7 465 4 644 353 40 30 0 2642 98 2 0 0 6 855 0 0 625 5 1062 549 38 41 1 3776 97 3 0 0 7 366 0 3 655 111 570 317 39 79 0 2719 98 2 0 0 March 2, 2026 at 06:57:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2282 101 251 140 24 23 0 1203 59 2 0 40 1 0 0 0 267 3 441 241 18 21 0 1162 60 1 0 39 2 3 0 367 492 125 520 256 15 17 0 1117 57 1 0 42 3 6 0 0 285 14 377 207 25 55 0 1786 59 1 0 39 4 1 0 14 282 6 430 228 17 20 0 1601 58 1 0 41 5 9 0 0 251 24 341 174 32 11 0 1575 58 1 0 41 6 0 0 7 379 7 671 295 43 24 0 2893 57 2 0 41 7 3 0 3 436 104 293 168 22 67 0 1320 59 1 0 40 March 2, 2026 at 06:57:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 101 114 2 1 0 0 310 0 1 0 99 1 8 0 0 14 1 6 0 2 0 0 9 0 0 0 100 2 0 0 17 312 152 108 0 2 0 0 9 0 0 0 100 3 1 0 0 27 4 30 0 4 0 0 601 0 0 0 100 4 3 0 14 13 2 10 0 2 0 0 287 0 0 0 100 5 0 0 0 22 5 10 0 1 4 0 8 0 0 0 100 6 0 0 7 32 11 54 2 1 0 0 1502 0 0 0 99 7 0 0 3 225 106 20 0 1 0 0 11 0 0 0 100 March 2, 2026 at 06:57:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 300 0 1 0 99 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 4 217 106 10 0 0 3 0 0 0 0 0 100 3 0 0 0 114 51 114 0 2 0 0 596 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 287 0 0 0 100 5 0 0 0 14 0 10 0 0 1 0 0 0 0 0 100 6 0 0 7 25 10 50 1 0 1 0 1487 0 0 0 99 7 0 0 2 212 103 6 0 0 2 0 1 0 0 0 100 March 2, 2026 at 06:57:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 104 0 0 0 0 301 0 1 0 99 1 0 0 0 15 1 12 0 1 0 0 13 0 0 0 100 2 0 0 3 210 103 4 0 0 0 0 1 0 0 0 100 3 0 0 0 122 54 117 2 3 0 0 575 0 0 0 100 4 0 0 14 17 3 17 0 2 0 0 300 0 0 0 100 5 0 0 0 15 0 12 0 1 0 0 6 0 0 0 100 6 0 0 7 31 12 58 1 0 2 0 1497 0 0 0 99 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:57:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2741 104 1191 40 137 48 0 4422 11 3 0 86 1 0 0 0 556 1 928 40 98 47 0 3788 13 2 0 85 2 0 0 521 679 102 850 13 96 56 0 2313 5 2 0 93 3 3 0 0 603 37 938 43 90 60 0 4173 16 2 0 82 4 2 0 14 561 11 869 22 89 35 0 2758 5 2 0 93 5 2 0 0 463 5 667 13 59 59 0 1597 3 1 0 96 6 25 0 7 429 15 683 23 54 60 0 5395 20 2 0 78 7 28 0 3 587 103 589 6 50 52 0 1905 4 2 0 95 March 2, 2026 at 06:57:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2120 101 19 5 7 4 0 619 6 1 0 93 1 0 0 0 135 54 133 1 7 9 0 633 0 0 0 99 2 0 0 31 221 102 16 1 7 3 0 4 0 0 0 100 3 0 0 0 32 2 42 3 6 9 1 754 4 0 0 96 4 0 0 14 26 5 19 2 5 14 0 573 0 0 0 100 5 0 0 9 32 2 41 1 10 15 0 13 0 1 0 99 6 3 0 7 132 4 157 5 7 7 0 1999 4 1 0 96 7 0 0 3 229 102 21 0 2 2 0 54 0 0 0 100 March 2, 2026 at 06:57:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 100 1 4 0 0 5 0 1 0 99 1 0 0 7 129 59 122 2 1 0 0 609 0 0 0 100 2 0 0 3 212 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 19 3 14 0 0 1 0 3 0 0 0 100 4 0 0 14 18 5 22 0 1 1 0 561 0 0 0 100 5 0 0 0 15 6 4 0 1 0 0 1 0 0 0 100 6 1 0 7 24 4 48 1 1 1 0 1393 0 0 0 99 7 0 0 3 235 102 31 0 3 0 0 13 0 0 0 100 March 2, 2026 at 06:57:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2204 101 326 4 66 1478 0 0 0 5 0 95 1 0 0 0 208 44 326 3 78 1550 0 606 0 4 0 96 2 0 0 4 339 102 255 2 68 1381 1 0 0 4 0 96 3 0 0 0 286 165 542 2 93 1231 0 0 0 4 0 96 4 0 0 14 153 11 275 2 81 1433 2 560 0 4 0 96 5 0 0 0 141 8 266 3 67 1431 0 5 0 4 0 96 6 0 0 7 163 4 352 4 86 1383 0 1387 0 3 0 97 7 0 0 2 335 103 273 2 86 1217 0 1 0 3 0 97 March 2, 2026 at 06:57:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2173 100 250 0 22 300 0 0 0 2 0 98 1 0 0 0 192 55 263 0 22 444 0 601 0 1 0 99 2 0 0 7 302 112 179 0 27 296 0 16 0 1 0 99 3 0 0 0 184 102 247 0 28 285 0 9 0 1 0 99 4 0 0 14 128 5 242 1 32 401 0 559 0 1 0 99 5 0 0 0 73 2 132 0 19 350 0 0 0 1 0 99 6 0 0 7 72 4 152 1 18 296 0 1387 0 1 0 99 7 0 0 7 271 102 130 0 15 276 0 0 0 1 0 99 March 2, 2026 at 06:57:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 3053 109 825 10 72 4 0 2577 9 2 0 89 1 0 0 0 645 11 827 18 82 45 0 5194 9 2 0 89 2 2 0 505 507 104 396 13 35 8 0 2374 10 2 0 89 3 0 0 0 598 4 976 22 75 5 0 2010 6 2 0 93 4 1 0 14 305 5 343 6 34 11 0 2198 9 1 0 90 5 0 0 0 396 37 527 5 24 2 0 1068 2 1 0 97 6 4 0 7 348 4 507 17 40 8 0 2022 8 1 0 91 7 0 0 780 421 106 267 9 19 34 0 827 4 1 0 94 March 2, 2026 at 06:57:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2118 106 120 0 1 0 0 9 0 1 0 99 1 0 0 0 15 3 36 2 0 0 0 1727 0 0 0 100 2 0 0 4 210 102 4 0 1 0 0 0 0 0 0 100 3 0 0 0 28 5 24 0 1 0 0 2 0 0 0 100 4 0 0 14 12 5 8 0 0 0 0 561 0 0 0 100 5 0 0 0 99 47 95 0 1 0 0 0 0 0 0 100 6 0 0 7 14 4 10 0 0 0 0 261 0 0 0 100 7 0 0 2 213 102 4 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:57:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 775 0 2 2159 106 153 3 12 10 14 6594 2 2 0 96 1 13 0 0 77 3 114 2 15 10 4 1988 0 0 0 99 2 36 0 4 235 102 23 0 7 3 3 65 0 0 0 100 3 13 0 0 76 17 73 0 5 5 3 95 0 0 0 100 4 2 0 14 94 35 81 0 7 2 1 599 0 0 0 100 5 5 0 0 50 12 32 0 4 0 2 58 0 0 0 100 6 2608 0 121 37 2 66 2 6 6 12 671 1 1 0 98 7 142 0 2 271 106 97 0 14 14 20 180 0 0 0 100 March 2, 2026 at 06:57:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2232 105 382 1 65 1191 0 4 0 4 0 96 1 0 0 0 147 3 363 2 76 1252 0 1826 0 3 0 96 2 0 0 3 333 103 299 4 77 1310 0 0 0 2 0 98 3 0 0 0 318 186 514 3 76 1215 0 2 0 4 0 96 4 0 0 14 197 7 400 4 90 1248 0 563 0 3 0 97 5 0 0 0 204 35 359 2 74 1157 0 0 0 3 0 97 6 0 0 7 187 13 383 3 91 1330 0 269 0 2 0 98 7 0 0 3 335 109 289 1 78 1211 0 1 0 3 0 97 March 2, 2026 at 06:57:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 0 4926 110 5550 46 224 145 0 14878 13 9 0 79 1 10 0 612 2461 9 5154 72 252 130 0 15839 15 9 0 77 2 54 0 4 2319 115 4199 27 170 101 0 10847 9 6 0 85 3 224 0 0 2703 47 5422 42 206 74 0 11706 10 7 0 83 4 62 0 0 2065 14 4684 43 180 148 0 17816 10 6 0 84 5 91 0 0 1521 11 3094 19 93 79 0 8037 7 4 0 88 6 223 0 7 1753 8 3451 20 148 53 0 8252 7 4 0 89 7 8 0 2 1607 127 2430 10 77 54 0 6790 6 4 0 90 March 2, 2026 at 06:57:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 6796 110 10354 65 374 156 0 26258 24 16 0 61 1 17 0 0 4811 9 10211 62 398 125 0 26754 22 14 0 64 2 15 0 4 4313 111 8493 43 258 143 0 21028 18 12 0 70 3 4 0 0 4568 18 9312 62 339 88 0 20292 15 10 0 74 4 14 0 0 2811 21 5767 32 247 91 0 14357 13 8 0 79 5 7 0 7 2295 22 4773 22 159 67 0 11684 10 6 0 83 6 8 0 14 2923 10 6112 32 224 102 0 15547 13 8 0 79 7 5 0 2 2276 109 4243 22 125 68 0 10275 8 6 0 86 March 2, 2026 at 06:57:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 4141 107 4240 26 155 63 0 10566 10 7 0 84 1 2 0 0 2181 5 4468 18 183 50 0 10449 8 5 0 87 2 7 0 4 1717 113 3047 16 115 46 0 8907 8 5 0 87 3 6 0 0 1718 33 3468 14 140 49 0 9124 7 5 0 88 4 7 0 3 1076 6 2192 13 122 59 0 5586 6 3 0 91 5 11 0 7 1174 12 2422 10 81 44 0 6528 4 3 0 92 6 1 0 14 1286 5 2777 10 101 29 0 5694 5 3 0 92 7 1 0 2 1116 106 2062 9 61 46 0 5822 5 3 0 92 March 2, 2026 at 06:57:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 124 132 1 5 0 0 13 0 1 0 99 1 0 0 0 100 30 94 0 4 0 0 302 0 0 0 100 2 0 0 3 223 109 16 0 0 0 0 30 0 0 0 100 3 0 0 0 19 4 16 0 1 0 0 301 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 2 0 0 0 100 5 0 0 7 29 9 50 2 2 0 0 1769 0 0 0 99 6 0 0 14 9 2 8 0 0 0 0 273 0 0 0 100 7 0 0 3 224 103 16 0 1 0 0 8 0 0 0 100 March 2, 2026 at 06:57:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2207 101 330 1 57 711 0 0 0 2 0 98 1 0 0 0 206 47 331 1 58 718 0 300 0 2 0 98 2 0 0 4 320 111 238 1 55 694 0 9 0 2 0 98 3 0 0 0 277 164 238 1 60 636 0 300 0 2 0 98 4 0 0 0 113 2 228 1 58 786 0 0 0 2 0 98 5 0 0 7 111 4 262 2 52 655 0 1765 0 2 0 98 6 0 0 14 102 2 227 1 62 758 0 266 0 2 0 98 7 0 0 2 444 101 505 0 58 582 0 0 0 2 0 98 March 2, 2026 at 06:57:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 0 1 0 0 0 1 0 99 1 0 0 0 25 9 14 1 0 1 0 300 0 0 0 100 2 0 0 7 306 150 100 0 1 1 0 9 0 0 0 100 3 0 0 0 20 5 12 0 0 1 0 301 0 0 0 100 4 0 0 0 11 3 2 0 0 1 0 2 0 0 0 100 5 0 0 7 24 6 44 1 0 1 0 1765 0 0 0 99 6 0 0 18 13 3 10 1 1 1 0 266 0 0 0 100 7 0 0 7 209 101 2 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:57:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 114 0 0 0 0 2 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 2 0 0 4 318 157 112 0 0 0 0 10 0 0 0 100 3 0 0 0 17 3 12 1 0 0 0 300 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 7 17 5 42 1 0 0 0 1771 0 0 0 100 6 0 0 14 13 4 10 0 0 0 0 272 0 0 0 100 7 0 0 2 214 102 12 0 1 0 0 5 0 0 0 100 March 2, 2026 at 06:57:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 104 118 0 2 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 2 0 0 3 313 154 106 0 1 0 0 6 0 0 0 100 3 0 0 0 16 3 12 0 0 0 0 300 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 3 0 0 0 100 5 0 0 7 18 5 40 2 0 0 0 1759 0 0 0 99 6 0 0 14 9 3 7 0 1 0 0 267 0 0 0 100 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:57:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 153 222 1 1 0 0 15 0 1 0 99 1 0 0 0 16 1 16 0 1 0 0 305 0 0 0 100 2 0 0 3 230 108 24 0 1 0 0 10 0 0 0 100 3 0 0 0 17 3 14 0 0 0 0 300 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 7 22 10 40 1 0 0 0 1759 0 0 0 99 6 0 0 14 10 2 8 0 0 0 0 273 0 0 0 100 7 0 0 3 216 103 8 0 1 2 0 2 0 0 0 100 March 2, 2026 at 06:57:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 123 146 0 2 1 0 0 0 1 0 99 1 0 0 0 68 29 64 1 2 0 0 301 0 0 0 100 2 0 0 3 232 107 31 0 2 0 0 9 0 0 0 100 3 0 0 0 16 3 10 0 0 0 0 300 0 0 0 100 4 0 0 0 12 3 8 0 0 0 0 23 0 0 0 100 5 0 0 7 20 8 44 1 0 3 0 1763 0 1 0 99 6 0 0 14 8 2 4 0 0 3 0 266 0 0 0 100 7 0 0 3 211 102 8 0 2 2 0 1 0 0 0 100 March 2, 2026 at 06:57:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 2 1 0 0 0 1 0 99 1 0 0 0 80 37 74 0 1 0 0 300 0 0 0 100 2 0 0 4 251 121 42 0 1 0 0 9 0 0 0 100 3 0 0 0 21 3 16 1 0 0 0 304 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 2 0 0 0 100 5 0 0 7 15 5 40 1 0 0 0 1761 0 0 0 99 6 1 0 14 10 3 8 0 0 0 0 283 0 0 0 100 7 0 0 2 215 102 7 0 2 0 0 0 0 0 0 100 March 2, 2026 at 06:57:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 112 0 0 0 0 1 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 300 0 0 0 100 2 0 0 3 220 107 14 0 1 0 0 6 0 0 0 100 3 0 0 0 21 3 22 0 1 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 2 0 0 0 100 5 0 0 7 16 5 40 2 0 1 0 1761 0 0 0 100 6 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 7 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:57:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 4739 111 5664 50 225 95 0 15185 12 8 0 80 1 3 0 0 2681 27 5635 38 210 84 0 12967 10 7 0 82 2 14 0 3 2399 106 4403 29 140 63 0 13275 14 6 0 79 3 39 0 0 2674 9 5596 30 181 54 0 12384 11 7 0 82 4 31 0 0 1399 7 2889 32 146 86 0 9659 8 5 0 87 5 0 0 0 1255 13 2561 16 82 88 0 8620 6 4 0 90 6 0 0 14 1655 5 3496 23 138 44 0 9039 7 5 0 88 7 3 0 14 1767 112 3791 17 83 36 0 14113 7 4 0 89 March 2, 2026 at 06:57:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 7010 110 10451 104 406 154 0 27065 24 16 0 60 1 12 0 14 5258 10 10971 82 453 95 0 25790 20 14 0 66 2 4 0 3 3902 105 7787 52 282 123 0 20281 18 12 0 71 3 6 0 0 4252 18 8761 55 325 104 0 18575 15 10 0 75 4 4 0 0 2846 15 5708 24 252 94 0 12867 10 7 0 83 5 3 0 0 1816 23 3736 21 141 55 0 11368 9 6 0 85 6 3 0 7 3314 18 7084 37 242 111 0 18384 17 10 0 73 7 9 0 3 2269 113 4456 14 151 64 0 12705 12 7 0 81 March 2, 2026 at 06:57:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 6985 108 10299 109 549 946 0 24108 22 16 0 63 1 15 0 14 4865 14 10315 112 578 877 0 24525 20 15 0 65 2 8 0 4 4047 108 8091 108 421 776 0 19403 17 12 0 70 3 4 0 0 4297 219 8631 60 454 850 0 18078 15 12 0 73 4 8 0 0 3307 11 6999 51 396 982 0 15326 14 11 0 76 5 7 0 0 1960 15 4175 32 249 802 0 12032 11 8 0 81 6 4 0 7 3156 10 6684 48 390 854 0 17522 14 10 0 75 7 5 0 2 2550 106 5029 49 242 878 0 13540 12 9 0 79 March 2, 2026 at 06:57:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 3579 102 3228 13 112 59 0 10693 10 7 0 84 1 3 0 14 1844 9 3827 11 131 32 0 9663 8 5 0 87 2 2 0 7 1393 131 2197 9 75 29 0 4467 4 3 0 94 3 0 0 0 1762 10 3603 12 90 19 0 6453 5 4 0 91 4 0 0 0 942 8 1935 13 81 40 0 5239 5 3 0 92 5 4 0 0 1048 4 2139 7 46 18 0 4279 4 3 0 94 6 2 0 7 1050 10 2293 12 88 58 0 8190 6 4 0 90 7 2 0 7 1209 109 2052 5 53 19 0 4885 4 3 0 93 March 2, 2026 at 06:57:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 104 0 0 0 0 1 0 1 0 99 1 0 0 14 11 3 8 0 0 0 0 560 0 0 0 100 2 0 0 4 216 102 10 0 1 0 0 0 0 0 0 100 3 0 0 0 33 12 30 0 2 0 0 307 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 108 51 130 1 0 0 0 1467 0 0 0 99 7 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:57:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 108 0 0 0 0 21 0 1 0 99 1 0 0 14 13 3 12 0 2 2 0 565 0 0 0 100 2 0 0 4 234 108 32 0 0 0 0 19 0 0 0 100 3 0 0 0 56 20 58 0 1 0 0 318 0 0 0 100 4 0 0 0 24 9 20 0 1 0 0 304 0 0 0 100 5 0 0 0 63 28 60 0 2 1 0 3 0 0 0 100 6 0 0 7 19 7 44 1 0 1 0 1473 0 0 0 100 7 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:57:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 1 0 0 0 0 1 0 99 1 0 0 14 12 3 8 0 0 0 0 560 0 0 0 100 2 0 0 4 228 108 22 0 0 0 0 9 0 0 0 100 3 0 0 0 16 2 10 1 1 0 0 300 0 0 0 100 4 0 0 0 19 3 16 1 1 0 0 300 0 0 0 100 5 0 0 0 115 56 104 0 0 0 0 5 0 0 0 100 6 0 0 7 19 5 48 1 0 0 0 1480 0 0 0 100 7 0 0 2 216 103 12 0 1 0 0 9 0 0 0 100 March 2, 2026 at 06:57:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2184 100 264 0 33 300 0 0 0 2 0 98 1 0 0 14 101 3 202 1 51 341 0 559 0 1 0 99 2 0 0 4 292 108 167 0 31 283 0 6 0 1 0 99 3 0 0 0 204 116 174 0 46 271 0 301 0 1 0 98 4 0 0 0 100 4 200 0 33 268 0 300 0 1 0 99 5 0 0 0 147 39 216 0 30 261 0 0 0 1 0 99 6 0 0 7 225 19 438 2 38 287 0 1474 0 1 0 99 7 0 0 2 287 103 185 1 41 396 0 1 0 1 0 99 March 2, 2026 at 06:57:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 1 0 0 0 0 1 0 99 1 0 0 14 11 3 8 0 0 0 0 561 0 0 0 100 2 0 0 3 222 109 16 0 0 0 0 10 0 0 0 100 3 0 0 0 15 2 10 0 1 0 0 300 0 0 0 100 4 0 0 0 27 10 22 0 2 0 0 302 0 0 0 100 5 0 0 0 67 28 68 0 2 0 0 0 0 0 0 100 6 0 0 7 32 14 56 0 0 0 0 1469 0 0 0 100 7 0 0 3 224 107 14 0 2 0 0 0 0 0 0 100 March 2, 2026 at 06:57:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2133 128 163 0 3 0 0 0 0 1 0 99 1 0 0 14 12 3 8 0 0 0 0 560 0 0 0 100 2 0 0 3 220 108 14 0 0 0 0 6 0 0 0 100 3 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 5 0 0 0 56 22 48 0 3 0 0 0 0 0 0 100 6 0 0 7 20 5 50 1 1 1 0 1470 0 0 0 100 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:57:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2428 125 573 242 32 6 0 997 57 2 0 41 1 27 0 14 375 11 647 308 36 15 1 2161 57 2 0 41 2 1576 0 437 491 106 622 270 37 29 1 1386 56 2 0 41 3 286 0 0 252 3 350 169 36 42 0 1244 57 2 0 41 4 2 0 0 263 21 304 170 24 14 0 869 58 1 0 42 5 526 0 0 355 3 594 305 29 20 0 1212 57 2 0 42 6 35 0 7 352 8 613 285 27 15 2 2562 57 1 0 41 7 1 0 3 518 103 495 250 26 14 0 1053 57 1 0 42 March 2, 2026 at 06:57:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2600 106 901 482 38 21 0 1618 97 3 0 0 1 6 0 14 522 31 693 383 40 20 0 1804 98 2 0 0 2 35 0 688 582 104 714 391 34 20 0 1583 98 2 0 0 3 2 0 0 400 3 517 299 38 30 0 1516 98 2 0 0 4 0 0 0 400 10 512 280 42 19 0 1378 99 1 0 0 5 257 0 0 555 7 889 472 40 31 0 1882 98 2 0 0 6 0 0 7 469 17 741 377 45 22 0 2835 98 2 0 0 7 7 0 3 713 108 777 415 51 27 0 1598 98 2 0 0 March 2, 2026 at 06:57:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2590 126 877 481 34 26 0 1426 97 3 0 0 1 0 0 14 530 8 814 429 42 20 0 2141 98 2 0 0 2 0 0 689 560 122 719 378 53 14 0 1545 98 2 0 0 3 0 0 0 540 11 868 472 48 30 0 2012 98 2 0 0 4 0 0 0 418 6 577 328 45 20 0 1756 98 2 0 0 5 2 0 0 323 3 378 227 36 22 0 805 99 1 0 0 6 4 0 7 417 6 620 324 42 20 0 2570 98 2 0 0 7 0 0 3 667 103 648 358 33 19 0 1132 99 1 0 0 March 2, 2026 at 06:57:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 101 119 49 9 5 0 139 23 1 0 76 1 7 0 14 129 9 179 91 7 8 0 867 24 0 0 75 2 0 0 115 293 103 190 95 10 4 0 414 23 1 0 77 3 0 0 0 149 3 211 80 13 2 0 645 22 0 0 78 4 0 0 0 110 17 151 67 9 9 0 572 23 0 0 76 5 0 0 0 72 2 69 44 11 9 0 235 24 0 0 76 6 0 0 7 157 45 180 32 11 2 0 1714 22 1 0 78 7 0 0 3 266 102 51 29 9 3 0 121 23 0 0 77 March 2, 2026 at 06:57:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 109 119 0 1 0 0 10 0 1 0 99 1 2 0 14 9 3 6 0 1 0 0 559 0 0 0 100 2 0 0 4 214 103 8 0 2 0 0 0 0 0 0 100 3 0 0 0 19 2 10 0 1 0 0 300 0 0 0 100 4 0 0 0 15 5 6 0 0 0 0 300 0 0 0 100 5 0 0 0 8 1 4 0 2 0 0 0 0 0 0 100 6 0 0 7 115 52 143 1 5 1 0 1479 0 0 0 100 7 0 0 2 222 105 20 0 2 0 0 0 0 0 0 100 March 2, 2026 at 06:58:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 108 130 0 1 0 0 16 0 1 0 99 1 0 0 14 9 2 6 1 1 0 0 564 0 0 0 100 2 0 0 3 213 103 8 0 0 1 0 3 0 0 0 100 3 0 0 0 16 1 12 1 1 0 0 307 0 0 0 100 4 0 0 0 16 4 10 1 0 0 0 303 0 0 0 100 5 0 0 0 8 1 6 0 1 1 0 3 0 0 0 100 6 0 0 7 31 8 56 0 0 0 0 1491 0 0 0 99 7 0 0 3 309 151 103 0 1 0 0 0 0 0 0 100 March 2, 2026 at 06:58:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 135 176 1 2 0 0 7 0 1 0 99 1 0 0 14 8 2 4 0 0 0 0 560 0 0 0 100 2 0 0 3 212 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 14 1 10 0 0 0 0 301 0 0 0 100 4 0 0 0 12 3 6 0 1 0 0 300 0 0 0 100 5 0 0 0 17 6 6 0 0 0 0 5 0 0 0 100 6 0 0 7 25 8 54 1 0 0 0 1499 0 0 0 100 7 0 0 3 269 125 64 0 3 0 0 9 0 0 0 100 March 2, 2026 at 06:58:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2801 119 1275 38 187 1312 0 4105 9 7 0 83 1 2 0 23 640 10 1139 32 164 1277 1 4513 15 6 0 79 2 20 0 508 692 111 967 43 158 1590 0 3811 19 6 0 75 3 0 0 0 891 158 1321 35 211 1627 0 2768 4 6 0 90 4 0 0 0 882 12 1612 27 183 1378 0 2536 4 5 0 91 5 26 0 0 573 10 938 10 125 1354 2 2314 8 5 0 87 6 0 0 0 535 7 910 16 127 1268 0 2927 3 5 0 91 7 0 0 24 814 106 1066 24 130 1354 0 2638 7 5 0 89 March 2, 2026 at 06:58:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2219 129 332 1 36 506 0 11 0 2 0 98 1 0 0 21 103 5 201 0 38 461 0 561 0 1 0 99 2 0 0 3 297 103 190 0 36 455 0 0 0 1 0 99 3 0 0 0 206 113 171 0 40 420 0 300 0 1 0 99 4 0 0 0 102 5 200 0 37 467 0 303 0 1 0 99 5 0 0 0 81 1 160 0 29 413 0 0 0 1 0 99 6 0 0 0 148 2 325 1 42 420 0 1130 0 1 0 99 7 0 0 10 389 125 322 1 33 441 0 260 0 1 0 99 March 2, 2026 at 06:58:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2113 105 119 0 0 0 0 11 0 1 0 99 1 0 0 14 129 53 108 1 1 0 0 560 0 0 0 100 2 0 0 3 229 103 8 0 1 0 0 0 0 0 0 100 3 0 0 0 27 1 6 1 1 0 0 300 0 0 0 100 4 0 0 0 31 5 8 1 0 0 0 305 0 0 0 100 5 0 0 0 22 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 30 4 38 1 0 0 0 1128 0 0 0 100 7 0 0 10 228 103 6 0 0 0 0 260 0 0 0 100 March 2, 2026 at 06:58:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 106 118 0 1 0 0 10 0 1 0 99 1 5 0 14 118 56 116 0 1 0 0 575 0 0 0 100 2 0 0 3 220 103 16 0 0 0 0 1 0 0 0 100 3 0 0 0 12 1 8 0 1 0 0 303 0 0 0 100 4 0 0 0 12 3 6 0 1 0 0 303 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 38 1 0 1 0 1134 0 0 0 100 7 0 0 10 214 103 6 0 0 0 0 259 0 0 0 100 March 2, 2026 at 06:58:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2606 101 902 19 62 10 0 2970 8 3 0 90 1 0 0 0 385 42 531 27 43 12 0 3133 21 1 0 77 2 3 0 508 608 109 685 11 50 5 0 1635 2 1 0 96 3 0 0 0 565 7 954 16 63 4 1 2868 4 2 0 94 4 2 0 0 352 6 498 7 38 3 1 2068 3 1 0 95 5 0 0 0 120 6 60 3 8 2 0 442 5 0 0 95 6 0 0 0 354 6 568 13 34 11 0 2983 9 1 0 90 7 0 0 9 482 105 389 1 24 1 0 1747 3 1 0 96 March 2, 2026 at 06:58:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2210 101 348 2 72 1173 1 0 0 4 0 96 1 0 0 0 125 1 275 3 67 1235 1 282 0 3 0 97 2 0 0 17 388 133 364 1 84 1226 0 275 0 2 0 97 3 0 0 0 292 165 276 2 85 1070 0 322 0 3 0 97 4 0 0 0 114 3 243 1 65 1103 0 300 0 3 0 97 5 0 0 0 118 1 259 3 58 1124 0 0 0 3 0 97 6 0 0 0 114 3 277 3 60 1133 0 1127 0 3 0 97 7 0 0 10 528 131 615 1 68 937 0 260 0 3 0 97 March 2, 2026 at 06:58:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 101 190 0 6 13 0 2 0 1 0 99 1 0 0 0 29 2 35 0 4 19 0 1 0 0 0 100 2 0 0 7 298 138 96 0 5 12 0 9 0 0 0 100 3 0 0 14 84 40 66 1 9 20 0 860 0 0 0 100 4 0 0 0 30 3 40 1 5 19 0 300 0 0 0 100 5 0 0 0 32 4 39 0 5 15 0 3 0 0 0 100 6 0 0 0 38 4 85 0 5 30 0 1130 0 0 0 100 7 0 0 14 270 125 78 0 6 25 0 260 0 0 0 100 March 2, 2026 at 06:58:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 110 0 1 0 0 1 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 3 230 111 22 0 0 0 0 10 0 0 0 100 3 0 0 14 45 19 40 1 0 0 0 860 0 0 0 100 4 0 0 0 26 9 182 1 1 0 0 632 0 0 0 100 5 0 0 0 67 28 68 0 2 0 0 0 0 0 0 100 6 0 0 0 12 3 36 1 0 0 0 1129 0 0 0 100 7 0 0 10 212 103 6 0 0 0 0 260 0 0 0 100 March 2, 2026 at 06:58:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 66 0 0 2183 101 162 2 8 21 1 966 0 1 0 99 1 99 0 0 47 1 64 0 17 4 6 162 0 0 0 100 2 1454 0 119 259 109 89 2 17 10 12 6647 2 1 0 96 3 107 0 14 74 6 98 3 10 35 12 3747 3 1 0 96 4 16 0 3 70 8 80 4 14 10 3 554 0 0 0 100 5 15 0 0 152 55 151 1 11 18 3 963 0 0 0 99 6 1901 0 0 466 3 1627 6 15 10 6 10261 2 2 0 96 7 15 0 9 251 104 58 0 13 9 4 376 0 0 0 100 March 2, 2026 at 06:58:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 324 0 0 6737 106 9658 99 427 131 0 25052 24 15 0 61 1 23 0 7 4895 8 10432 105 437 90 0 28021 24 15 0 62 2 12 0 3 4378 111 8602 63 280 134 0 21174 18 12 0 70 3 15 0 14 4085 23 8348 79 341 167 0 20167 18 10 0 72 4 24 0 0 2515 17 5000 34 250 84 0 12587 10 7 0 83 5 4 0 0 2283 20 4719 15 148 85 0 11796 10 7 0 84 6 29 0 0 3039 14 6330 38 246 111 0 15574 13 9 0 78 7 7 0 3 3074 112 5995 32 150 143 0 12302 10 7 0 83 March 2, 2026 at 06:58:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 2 6673 108 9947 181 509 664 0 25116 23 16 0 62 1 9 0 7 4633 19 9514 91 513 786 0 21810 18 13 0 69 2 15 0 3 3877 109 7681 77 374 705 0 20207 18 12 0 70 3 17 0 14 3926 163 7994 70 409 685 0 17826 14 11 0 75 4 2 0 0 3322 16 6778 55 336 656 0 14377 13 9 0 78 5 43 0 0 2233 8 4968 87 250 669 0 12716 12 8 0 80 6 13 0 0 3021 15 6289 50 302 679 0 15090 12 10 0 78 7 12 0 3 2404 121 4783 32 214 651 0 13480 12 8 0 79 March 2, 2026 at 06:58:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 108 0 0 0 0 0 0 1 0 99 1 0 0 7 80 36 76 0 2 0 0 269 0 0 0 100 2 0 0 3 211 103 34 1 0 1 0 1214 0 0 0 100 3 0 0 14 20 2 16 1 1 0 0 565 0 0 0 100 4 0 0 0 56 26 50 0 1 0 0 302 0 0 0 100 5 0 0 0 8 1 2 1 0 0 0 294 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 104 108 0 0 0 0 2 0 1 0 99 1 0 0 7 88 41 82 0 0 0 0 269 0 0 0 100 2 0 0 3 246 120 70 1 1 1 0 1212 0 0 0 99 3 0 0 14 19 2 16 0 0 0 0 567 0 0 0 100 4 0 0 0 15 2 14 0 1 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 7 0 0 3 211 102 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 108 0 0 0 0 0 0 1 0 99 1 0 0 7 91 42 88 0 2 0 0 270 0 0 0 100 2 0 0 3 243 119 64 1 0 1 0 1213 0 0 0 100 3 0 0 14 17 2 14 0 0 0 0 566 0 0 0 100 4 0 0 0 13 2 6 0 1 0 0 300 0 0 0 100 5 0 0 0 12 1 12 0 1 0 0 294 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 116 1 1 0 0 11 0 1 0 99 1 21 0 7 126 59 123 1 2 0 0 274 0 0 0 100 2 0 0 3 217 106 40 1 0 0 0 1220 0 0 0 100 3 0 0 14 18 2 12 0 0 0 0 566 0 0 0 100 4 0 0 0 13 2 6 1 0 0 0 300 0 0 0 100 5 0 0 0 15 7 4 0 0 0 0 295 0 0 0 100 6 0 0 0 10 0 10 0 0 0 0 10 0 0 0 100 7 0 0 3 218 104 14 0 1 0 0 7 0 0 0 100 March 2, 2026 at 06:58:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 106 222 0 22 168 0 0 0 1 0 99 1 0 0 7 134 32 197 0 25 170 0 270 0 1 0 99 2 0 0 4 309 128 180 1 22 125 0 1209 0 1 0 99 3 0 0 14 147 80 132 1 23 173 0 565 0 1 0 99 4 0 0 0 77 2 142 0 23 177 0 300 0 1 0 99 5 0 0 0 52 1 92 1 17 162 0 294 0 1 0 99 6 0 0 0 137 0 269 0 19 143 0 0 0 1 0 99 7 0 0 2 260 102 107 0 21 146 0 0 0 1 0 99 March 2, 2026 at 06:58:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 125 154 0 1 0 0 2 0 1 0 99 1 0 0 7 80 35 75 0 3 1 0 270 0 0 0 100 2 0 0 3 224 107 50 1 3 1 0 1213 0 0 0 100 3 0 0 14 12 3 4 0 0 1 0 567 0 0 0 100 4 0 0 0 10 3 2 0 0 1 0 300 0 0 0 100 5 0 0 0 9 2 2 0 0 1 0 294 0 0 0 100 6 0 0 0 10 1 4 0 0 1 0 0 0 0 0 100 7 0 0 3 215 102 14 0 1 1 0 6 0 0 0 100 March 2, 2026 at 06:58:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 110 0 0 0 0 4 0 1 0 99 1 0 0 7 80 33 75 1 1 0 0 269 0 0 0 100 2 0 0 4 263 128 86 1 2 1 0 1207 0 0 0 99 3 0 0 14 10 2 6 0 0 0 0 566 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 0 12 3 8 0 0 0 0 298 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 2 211 102 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 120 0 2 0 0 2 0 1 0 99 1 0 0 7 31 8 27 0 1 0 0 269 0 0 0 100 2 0 0 4 257 125 76 2 0 0 0 1209 0 0 0 100 3 0 0 14 66 30 62 0 1 0 0 565 0 0 0 100 4 0 0 0 11 3 6 1 1 0 0 301 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 7 0 0 2 211 102 4 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 118 0 1 0 0 8 0 1 0 99 1 0 0 7 33 9 30 0 1 0 0 269 0 0 0 100 2 0 0 4 214 104 38 1 1 0 0 1231 0 0 0 99 3 0 0 14 114 52 112 1 2 0 0 567 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 0 15 6 2 1 0 0 0 294 0 0 0 100 6 1 0 0 15 2 16 0 0 0 0 15 0 0 0 100 7 0 0 2 218 104 12 0 0 0 0 7 0 0 0 100 March 2, 2026 at 06:58:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2537 105 1583 1 4 3 0 8100 2 2 0 97 1 0 0 7 56 8 33 1 3 32 0 1164 0 0 0 99 2 6 0 3 226 105 55 1 6 18 0 2059 0 1 0 99 3 0 0 14 67 25 73 1 6 23 0 1437 0 0 0 99 4 1 0 0 24 3 29 1 7 1 0 82 0 0 0 100 5 0 0 0 72 30 70 0 4 2 0 609 0 0 0 100 6 0 0 0 21 1 22 3 6 18 0 1820 3 0 0 97 7 1 0 3 213 103 7 0 2 0 0 29 0 0 0 100 March 2, 2026 at 06:58:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 6892 106 10357 86 383 181 0 26660 25 16 0 59 1 16 0 7 4976 10 10339 80 449 134 0 26457 22 14 0 64 2 23 0 4 4350 114 8465 48 293 121 0 20751 18 11 0 71 3 14 0 14 4437 17 9072 74 372 90 0 20773 16 11 0 73 4 2 0 0 2915 14 5990 46 298 159 0 15424 13 8 0 79 5 2 0 0 1927 21 3978 23 162 96 0 10563 11 6 0 83 6 1 0 0 2990 11 6368 46 235 134 0 15861 15 9 0 76 7 10 0 2 2297 109 4342 29 151 88 0 10120 8 6 0 86 March 2, 2026 at 06:58:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 2 7151 108 10637 50 396 151 0 24440 22 14 0 64 1 12 0 0 4740 11 10109 59 387 130 0 25216 22 14 0 64 2 4 0 10 4023 121 7733 37 269 182 0 17585 15 10 0 75 3 6 0 14 4104 16 8611 41 339 125 0 22428 17 11 0 71 4 13 0 0 2634 23 5408 30 259 99 0 14680 12 8 0 80 5 5 0 0 1910 8 3989 25 161 92 0 11824 11 6 0 83 6 4 0 0 3567 10 7629 32 230 178 0 18958 16 10 0 74 7 4 0 3 2462 109 4884 16 121 107 0 12147 11 7 0 82 March 2, 2026 at 06:58:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 6262 104 9010 60 388 138 0 21713 21 14 0 66 1 14 0 7 4333 9 9260 55 418 126 0 24462 20 13 0 67 2 8 0 4 3573 112 6799 39 294 112 0 16326 15 9 0 76 3 8 0 0 3830 16 7971 44 318 86 0 18954 15 10 0 75 4 6 0 14 2718 25 5497 30 260 116 0 12361 11 7 0 82 5 2 0 0 1507 16 3067 22 154 83 0 9862 8 5 0 88 6 8 0 0 2966 6 6399 34 248 110 0 17422 14 9 0 77 7 0 0 2 2288 110 4331 23 142 95 0 9846 8 6 0 86 March 2, 2026 at 06:58:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 110 0 3 0 0 8 0 1 0 99 1 0 0 7 14 5 10 0 0 0 0 262 0 0 0 100 2 4 0 4 221 104 14 0 1 0 0 3 0 0 0 100 3 0 0 0 68 29 64 0 1 0 0 0 0 0 0 100 4 0 0 14 52 24 46 0 0 1 0 266 0 0 0 100 5 0 0 0 20 8 44 1 1 1 0 1507 0 0 0 100 6 0 0 0 41 11 38 0 0 0 0 618 0 0 0 100 7 0 0 2 213 101 8 1 1 2 0 5 0 0 0 100 March 2, 2026 at 06:58:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2195 103 284 2 63 820 0 3 0 3 0 97 1 0 0 7 102 4 217 3 65 938 1 268 0 3 0 97 2 0 0 3 301 101 207 1 59 840 0 3 0 3 0 97 3 0 0 0 326 186 291 1 64 841 1 3 0 3 0 97 4 0 0 14 260 15 498 2 85 900 0 266 0 2 0 98 5 0 0 0 107 4 257 4 65 886 0 1512 0 3 0 97 6 0 0 0 116 11 241 2 75 901 0 626 0 2 0 98 7 0 0 3 345 101 308 2 66 844 0 2 0 3 0 97 March 2, 2026 at 06:58:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 123 256 0 22 172 0 3 0 1 0 99 1 0 0 7 126 35 174 0 20 164 0 262 0 1 0 99 2 0 0 3 262 101 105 0 17 149 0 0 0 0 0 100 3 0 0 0 110 67 74 0 18 117 0 0 0 0 0 100 4 0 0 14 48 3 83 0 16 124 0 266 0 0 0 100 5 0 0 0 76 11 145 2 12 109 0 1516 0 1 0 99 6 0 0 0 70 4 114 1 18 136 0 600 0 0 0 99 7 0 0 3 311 101 211 0 17 141 0 0 0 1 0 99 March 2, 2026 at 06:58:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 105 112 0 1 0 0 1 0 1 0 99 1 0 0 7 107 50 103 0 2 0 0 260 0 0 0 100 2 0 0 3 210 101 4 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 4 0 1 0 0 0 0 0 0 100 4 0 0 14 10 2 6 0 1 0 0 266 0 0 0 100 5 0 0 0 28 8 56 2 1 0 0 1516 0 0 0 99 6 0 0 0 16 4 12 0 0 0 0 600 0 0 0 100 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 151 204 0 0 0 0 0 0 1 0 99 1 0 0 7 20 4 16 0 0 0 0 262 0 0 0 100 2 0 0 3 208 101 4 0 2 0 0 0 0 0 0 100 3 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 10 4 6 0 0 0 0 266 0 0 0 100 5 0 0 0 24 8 48 1 1 1 0 1511 0 0 0 99 6 0 0 0 23 5 24 0 1 0 0 602 0 0 0 100 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 149 204 0 1 0 0 8 0 1 0 99 1 0 0 7 24 6 20 0 1 0 0 260 0 0 0 100 2 0 0 4 209 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 266 0 0 0 100 5 0 0 0 30 15 48 1 0 1 0 1517 0 0 0 99 6 0 0 0 20 4 20 0 0 0 0 612 0 0 0 100 7 0 0 2 216 103 12 0 1 0 0 7 0 0 0 100 March 2, 2026 at 06:58:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2140 101 173 23 8 1 1 114 3 1 0 96 1 0 0 7 132 54 130 6 6 1 1 327 3 0 0 97 2 259 0 31 211 101 21 2 5 4 0 236 3 0 0 97 3 1 0 0 43 2 62 9 16 1 0 135 3 0 0 97 4 3 0 14 59 3 131 40 11 4 0 506 3 0 0 97 5 257 0 0 88 10 184 71 8 16 0 2186 3 1 0 96 6 0 0 0 65 7 172 24 20 2 0 931 3 1 0 96 7 1314 0 3 223 102 26 0 5 8 0 234 3 1 0 97 March 2, 2026 at 06:58:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2386 101 410 257 47 11 0 1202 98 2 0 0 1 1 0 7 430 14 575 317 39 19 0 1454 99 1 0 0 2 44 0 661 545 104 669 368 52 19 0 1651 98 2 0 0 3 0 0 0 404 2 610 336 42 22 0 1406 98 2 0 0 4 2 0 14 614 11 1089 563 51 20 0 2429 98 2 0 0 5 1 0 0 479 18 725 383 53 28 0 3769 98 2 0 0 6 1 0 0 579 14 960 495 37 30 0 1986 98 2 0 0 7 22 0 10 679 116 684 373 33 16 0 1481 98 2 0 0 March 2, 2026 at 06:58:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2439 122 508 294 38 25 0 1376 98 2 0 0 1 5 0 7 510 14 774 421 33 37 0 1568 98 2 0 0 2 0 0 591 553 103 643 362 34 32 0 1489 98 2 0 0 3 0 0 0 451 2 650 364 40 23 0 1488 98 2 0 0 4 0 0 14 401 4 600 340 42 32 0 1806 98 2 0 0 5 0 0 0 343 17 427 235 41 43 0 3080 98 2 0 0 6 0 0 0 504 12 837 446 45 23 0 1472 98 2 0 0 7 0 0 3 739 104 887 476 24 24 0 1810 98 2 0 0 March 2, 2026 at 06:58:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2457 110 688 378 38 14 0 1644 97 3 0 0 1 0 0 7 493 20 786 429 40 22 0 1841 98 2 0 0 2 0 0 549 513 105 544 307 32 18 0 1134 98 2 0 0 3 0 0 0 486 10 797 432 30 20 0 1485 98 2 0 0 4 0 0 14 449 20 656 368 36 19 0 1668 98 2 0 0 5 0 0 0 374 6 536 295 39 15 0 3777 98 2 0 0 6 3 0 0 305 5 338 208 29 24 0 917 99 1 0 0 7 1 0 3 584 103 548 318 24 23 0 1252 99 1 0 0 March 2, 2026 at 06:58:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 103 111 12 6 0 0 32 10 1 0 89 1 0 0 7 39 4 41 8 4 0 0 318 10 0 0 90 2 7 0 31 225 101 15 10 3 2 0 65 12 0 0 88 3 0 0 0 35 1 29 12 6 0 0 148 10 0 0 90 4 2 0 14 40 3 59 18 4 0 0 405 10 0 0 90 5 2 0 0 43 12 51 11 5 1 0 2138 11 0 0 88 6 0 0 0 33 2 29 13 5 0 0 31 12 0 0 88 7 0 0 3 359 155 173 30 7 0 0 110 10 0 0 90 March 2, 2026 at 06:58:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 130 171 0 2 0 0 13 0 1 0 99 1 0 0 7 17 3 18 0 2 2 0 273 0 0 0 100 2 0 0 3 211 102 4 0 2 1 0 3 0 0 0 100 3 0 0 0 10 0 6 0 0 0 0 0 0 0 0 100 4 0 0 14 13 3 10 0 1 2 0 267 0 0 0 100 5 0 0 0 25 8 48 2 0 0 0 2125 0 0 0 99 6 0 0 0 20 2 16 0 0 2 0 4 0 0 0 100 7 0 0 3 271 131 68 0 0 2 0 20 0 0 0 100 March 2, 2026 at 06:58:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2133 124 148 0 1 1 0 0 0 1 0 99 1 0 0 7 19 5 12 0 0 1 0 262 0 0 0 100 2 0 0 7 271 129 71 0 3 1 0 0 0 0 0 100 3 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 4 0 0 14 11 4 4 0 0 1 0 266 0 0 0 100 5 4 0 0 22 7 42 1 0 2 0 2119 0 0 0 99 6 0 0 0 11 2 4 0 0 1 0 1 0 0 0 100 7 0 0 7 227 108 19 0 3 0 0 6 0 0 0 100 March 2, 2026 at 06:58:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 112 0 1 0 0 1 0 1 0 99 1 0 0 7 12 3 8 0 0 0 0 260 0 0 0 100 2 0 0 4 257 123 48 0 0 0 0 0 0 0 0 100 3 0 0 0 69 28 70 0 2 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 265 0 0 0 100 5 0 0 0 14 4 38 1 0 0 0 2117 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 2 222 108 14 0 0 0 0 9 0 0 0 100 March 2, 2026 at 06:58:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2762 104 1217 30 142 70 0 3148 6 3 0 91 1 0 0 7 622 4 1029 29 137 72 3 3085 6 2 0 92 2 0 0 530 702 103 960 15 97 63 0 2486 6 3 0 92 3 26 0 0 517 9 825 28 82 30 0 3160 11 2 0 87 4 18 0 14 482 8 764 26 82 70 3 3765 12 2 0 86 5 0 0 0 445 10 692 16 72 74 0 3455 9 2 0 89 6 0 0 0 534 27 879 27 93 42 0 3582 7 2 0 91 7 0 0 9 536 110 475 11 48 35 1 2888 15 1 0 84 March 2, 2026 at 06:58:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 102 125 0 1 0 0 8 0 1 0 99 1 0 0 7 16 4 10 0 1 0 0 260 0 0 0 100 2 0 0 3 210 102 2 0 0 0 0 1 0 0 0 100 3 0 0 0 11 0 6 0 0 0 0 0 0 0 0 100 4 0 0 14 12 2 12 0 1 0 0 266 0 0 0 100 5 0 0 0 33 16 20 1 0 0 0 902 0 0 0 100 6 0 0 0 117 53 144 1 0 1 0 1143 0 0 0 100 7 0 0 3 224 104 20 0 1 0 0 7 0 0 0 100 March 2, 2026 at 06:58:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2184 103 288 1 60 1282 0 8 0 5 0 95 1 0 0 7 181 20 313 0 82 1234 0 266 0 3 0 97 2 0 0 4 307 104 216 1 68 1119 0 10 0 4 0 96 3 0 0 0 246 144 194 3 64 1018 0 3 0 4 0 96 4 0 0 14 101 3 202 1 65 1219 0 290 0 4 0 96 5 0 0 0 114 9 197 1 56 986 0 900 0 4 0 96 6 0 0 0 179 37 313 2 61 1208 1 1127 0 4 0 96 7 0 0 2 448 103 501 0 60 1147 0 1 0 3 0 97 March 2, 2026 at 06:58:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2186 102 269 1 33 512 0 0 0 2 0 98 1 0 0 7 143 26 232 0 36 487 0 260 0 1 0 99 2 0 0 3 356 135 233 1 35 498 0 9 0 1 0 98 3 0 0 0 221 125 198 0 40 547 0 0 0 2 0 98 4 1 0 14 173 3 354 1 36 547 0 282 0 1 0 98 5 0 0 0 106 7 206 1 33 668 0 863 0 1 0 98 6 0 0 0 99 1 220 1 39 619 0 1164 0 2 0 98 7 0 0 3 341 102 282 0 33 580 0 0 0 1 0 99 March 2, 2026 at 06:58:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 2552 103 779 14 73 2 0 2252 4 2 0 94 1 0 0 7 259 6 297 12 43 12 0 2073 15 1 0 84 2 0 0 494 472 137 383 4 25 7 0 1038 2 1 0 97 3 1 0 0 413 1 652 17 49 5 0 1643 6 1 0 93 4 2 0 14 391 3 642 11 43 9 0 2502 7 1 0 92 5 0 0 0 359 6 564 11 21 7 0 2040 5 1 0 94 6 0 0 0 456 17 754 18 44 13 0 4302 13 2 0 85 7 0 0 2 545 104 511 6 27 5 0 2215 4 1 0 94 March 2, 2026 at 06:58:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 116 0 0 0 0 1 0 1 0 99 1 0 0 7 14 4 8 0 0 0 0 260 0 0 0 100 2 0 0 3 224 109 16 0 0 0 0 9 0 0 0 100 3 0 0 0 15 1 12 0 1 0 0 0 0 0 0 100 4 0 0 14 8 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 599 0 0 0 100 6 0 0 0 112 53 136 2 0 0 0 1422 0 0 0 99 7 0 0 3 212 102 4 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:58:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 106 128 0 0 0 0 16 0 1 0 99 1 0 0 7 16 5 12 0 1 0 0 263 0 0 0 100 2 0 0 3 226 111 20 0 0 0 0 12 0 0 0 100 3 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 16 8 6 0 0 0 0 599 0 0 0 100 6 0 0 0 121 55 148 2 0 1 0 1435 0 0 0 99 7 0 0 3 217 101 14 0 1 1 0 5 0 0 0 100 March 2, 2026 at 06:58:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2212 101 336 2 77 1138 0 0 0 4 0 96 1 0 0 7 232 4 493 1 80 1048 0 260 0 3 0 97 2 0 0 3 360 118 303 1 73 1108 1 9 0 2 0 97 3 0 0 0 290 166 281 1 74 1151 1 0 0 3 0 97 4 0 0 14 128 3 279 2 74 1116 0 266 0 3 0 96 5 0 0 0 190 3 391 0 75 1078 0 601 0 3 0 97 6 0 0 0 192 37 370 3 77 1092 0 1422 0 4 0 96 7 0 0 3 328 105 278 2 64 1173 0 0 0 3 0 97 March 2, 2026 at 06:58:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 2 2714 103 1233 9 72 95 5 3564 3 3 0 94 1 1910 0 7 684 10 1318 15 72 119 1 5677 7 3 0 90 2 750 0 3 876 112 1290 12 72 96 5 10121 4 3 0 93 3 171 0 0 1177 67 2756 19 74 71 3 11524 4 3 0 93 4 249 0 14 339 6 602 7 62 79 2 1528 1 1 0 97 5 45 0 0 415 5 697 6 36 61 1 1572 1 1 0 98 6 757 0 116 284 4 662 3 44 87 13 3320 2 2 0 96 7 229 0 3 514 124 550 5 39 90 7 1513 1 1 0 97 March 2, 2026 at 06:58:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 6533 113 9454 76 377 144 0 27830 25 16 0 59 1 7 0 0 4949 7 10154 81 424 103 0 24674 20 13 0 67 2 12 0 10 4090 111 7999 69 308 72 0 18398 16 10 0 73 3 14 0 0 4494 8 9433 91 355 149 0 22620 18 12 0 70 4 6 0 14 2800 20 5757 34 262 126 0 15394 13 8 0 79 5 3 0 0 2618 14 5445 26 163 75 0 12554 11 7 0 82 6 8 0 0 2935 12 6044 33 226 60 0 13859 12 8 0 80 7 3 0 3 2204 111 4142 27 143 73 0 9710 8 5 0 86 March 2, 2026 at 06:58:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 6003 107 8169 60 325 147 0 23015 21 14 0 66 1 11 0 0 4284 13 8877 55 338 101 0 20946 19 12 0 70 2 8 0 4 3677 115 7231 32 252 82 0 17691 16 10 0 74 3 7 0 0 3872 15 8162 54 293 75 0 19651 14 10 0 75 4 3 0 14 2716 20 5663 29 203 141 0 14216 13 8 0 79 5 1 0 0 1729 21 3451 18 131 71 0 8122 7 4 0 89 6 8 0 0 2596 9 5372 35 201 77 0 13230 10 7 0 83 7 5 0 9 1704 106 3113 27 109 27 0 7750 7 4 0 89 March 2, 2026 at 06:58:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 108 0 2 0 0 8 0 1 0 99 1 0 0 0 12 0 4 0 0 0 0 0 0 0 0 100 2 0 0 4 208 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 12 1 36 0 0 0 0 1212 0 0 0 100 4 0 0 14 110 53 105 0 1 0 0 266 0 0 0 100 5 0 0 0 39 16 26 0 3 0 0 603 0 0 0 100 6 0 0 0 21 4 20 0 0 0 0 317 0 0 0 100 7 0 0 9 227 106 30 0 1 0 0 267 0 0 0 100 March 2, 2026 at 06:58:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2296 100 498 0 61 591 0 0 0 2 0 98 1 0 0 0 121 1 273 2 65 749 0 2 0 2 0 98 2 0 0 4 383 115 357 2 57 661 0 0 0 2 0 98 3 0 0 0 284 159 302 3 61 772 0 1214 0 3 0 97 4 0 0 14 175 25 320 2 72 751 0 266 0 2 0 98 5 0 0 0 137 10 268 3 59 702 0 603 0 2 0 98 6 0 0 0 142 16 275 2 58 688 0 300 0 2 0 98 7 0 0 9 301 105 189 2 40 591 0 261 0 2 0 98 March 2, 2026 at 06:58:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 108 0 3 0 0 1 0 1 0 99 1 0 0 0 12 0 12 0 2 0 0 0 0 0 0 100 2 0 0 3 305 148 98 0 1 0 0 0 0 0 0 100 3 0 0 0 10 1 34 1 0 0 0 1213 0 0 0 100 4 0 0 14 11 4 6 0 0 0 0 267 0 0 0 100 5 0 0 0 31 11 22 1 0 0 0 605 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 7 0 0 10 227 107 20 0 3 0 0 260 0 0 0 100 March 2, 2026 at 06:58:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 106 116 0 3 0 0 0 0 1 0 99 1 0 0 0 12 1 8 0 1 0 0 2 0 0 0 100 2 0 0 4 219 101 15 0 3 0 0 0 0 0 0 100 3 21 0 0 69 30 94 1 1 1 0 1217 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 266 0 0 0 100 5 0 0 0 27 11 22 0 0 0 0 603 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 305 0 0 0 100 7 0 0 9 246 119 38 0 1 0 0 260 0 0 0 100 March 2, 2026 at 06:58:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 114 0 0 0 0 4 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 4 209 101 4 0 0 0 0 3 0 0 0 100 3 0 0 0 42 17 64 1 0 1 0 1209 0 0 0 100 4 0 0 14 21 9 16 0 1 0 0 266 0 0 0 100 5 0 0 0 80 37 76 0 1 0 0 602 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 7 0 0 9 211 103 6 0 0 0 0 260 0 0 0 100 March 2, 2026 at 06:58:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2108 100 116 0 0 0 0 7 0 1 0 99 1 0 0 0 11 2 8 0 1 0 0 2 0 0 0 100 2 0 0 4 210 101 4 0 1 0 0 0 0 0 0 100 3 0 0 0 73 29 102 1 2 1 0 1208 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 266 0 0 0 100 5 0 0 0 76 38 62 1 0 0 0 603 0 0 0 100 6 0 0 0 20 5 18 1 0 0 0 315 0 0 0 100 7 0 0 9 218 104 16 0 1 1 0 265 0 0 0 100 March 2, 2026 at 06:58:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 110 0 0 1 0 0 0 1 0 99 1 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 2 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 115 52 140 1 0 1 0 1208 0 0 0 99 4 0 0 14 17 3 20 0 2 0 0 266 0 0 0 100 5 0 0 0 28 10 22 1 0 1 0 603 0 0 0 100 6 0 0 0 12 3 8 0 0 2 0 301 0 0 0 100 7 0 0 9 211 103 6 0 0 0 0 260 0 0 0 100 March 2, 2026 at 06:58:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 108 0 0 1 0 0 0 1 0 99 1 0 0 0 13 3 6 0 0 1 0 2 0 0 0 100 2 0 0 3 208 101 2 0 0 1 0 0 0 0 0 100 3 0 0 0 56 25 76 0 0 1 0 1208 0 0 0 100 4 0 0 14 65 31 62 0 2 0 0 266 0 0 0 100 5 0 0 0 27 11 20 0 0 1 0 604 0 0 0 100 6 0 0 0 11 3 4 0 0 1 0 300 0 0 0 100 7 0 0 10 213 103 8 0 0 1 0 260 0 0 0 100 March 2, 2026 at 06:58:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 0 0 0 0 0 0 1 0 99 1 0 0 0 67 30 62 0 2 0 0 0 0 0 0 100 2 0 0 3 213 103 8 0 1 1 0 1 0 0 0 100 3 0 0 0 13 1 38 1 2 2 0 1207 0 0 0 100 4 0 0 14 56 26 50 0 0 1 0 266 0 0 0 100 5 0 0 0 35 12 34 0 1 0 0 604 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 7 0 0 10 214 104 10 0 1 0 0 260 0 0 0 100 March 2, 2026 at 06:59:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2596 101 1091 9 48 15 0 2743 2 2 0 95 1 0 0 0 465 40 831 13 49 23 0 2582 2 1 0 97 2 11 0 2 711 102 1052 9 30 20 0 3046 3 2 0 96 3 29 0 0 625 4 1325 14 43 7 0 3571 2 2 0 96 4 1 0 14 249 11 451 7 28 29 0 4189 6 1 0 93 5 1 0 0 457 14 990 13 28 14 0 4006 3 2 0 95 6 0 0 0 816 7 2218 9 34 26 0 10636 3 2 0 95 7 1 0 11 360 107 310 1 13 4 0 676 0 0 0 99 March 2, 2026 at 06:59:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 6533 113 9388 80 358 123 0 24573 22 15 0 63 1 6 0 0 5008 12 10253 70 360 79 0 21356 17 12 0 70 2 5 0 3 3683 113 7126 36 242 107 0 16696 15 10 0 76 3 7 0 0 4134 11 8591 53 289 72 0 20788 17 11 0 73 4 2 0 14 2917 12 6054 39 247 100 0 16449 15 9 0 76 5 4 0 0 2287 26 4730 25 151 45 0 12943 12 7 0 81 6 7 0 7 3408 16 7207 41 239 110 0 17831 16 10 0 75 7 0 0 3 2375 114 4661 20 143 89 0 13777 11 7 0 81 March 2, 2026 at 06:59:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 6776 112 10063 103 536 804 0 28288 26 18 0 56 1 10 0 0 4954 12 10531 94 548 791 0 26749 22 15 0 62 2 6 0 4 4525 107 8737 63 431 764 0 15406 14 11 0 75 3 3 0 0 4398 167 8923 89 455 682 0 19031 16 12 0 72 4 2 0 14 2575 15 5228 41 352 703 0 13497 11 9 0 80 5 5 0 0 1865 17 3894 39 225 637 0 10823 10 7 0 83 6 10 0 0 3373 15 7262 45 318 790 0 17267 15 11 0 74 7 3 0 9 2543 129 5075 40 224 644 0 13516 11 8 0 81 March 2, 2026 at 06:59:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 5669 108 7700 40 316 101 0 21198 19 12 0 69 1 11 0 0 4027 7 8271 60 355 59 0 20379 17 11 0 72 2 9 0 4 3082 112 5900 31 242 71 0 16195 14 9 0 77 3 3 0 0 3868 19 7975 47 286 62 0 15966 13 9 0 78 4 5 0 0 2742 13 5572 32 217 78 0 12242 10 7 0 83 5 27 0 14 1641 8 3433 18 133 62 0 10411 9 6 0 86 6 4 0 0 2500 11 5361 25 178 87 0 12556 11 7 0 82 7 4 0 9 2154 125 4032 19 115 62 0 11213 9 6 0 85 March 2, 2026 at 06:59:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 150 182 0 2 0 0 0 0 1 0 99 1 0 0 0 36 2 28 1 2 0 0 302 0 0 0 100 2 0 0 4 209 101 4 0 1 0 0 3 0 0 0 100 3 0 0 0 29 10 26 0 1 0 0 19 0 0 0 100 4 0 0 0 13 2 36 2 1 0 0 1219 0 0 0 100 5 0 0 14 9 3 6 0 0 0 0 560 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 0 0 9 218 105 10 0 1 0 0 560 0 0 0 100 March 2, 2026 at 06:59:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 150 200 0 0 0 0 0 0 1 0 99 1 0 0 0 20 4 14 0 1 0 0 313 0 0 0 100 2 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 32 9 28 0 2 0 0 12 0 0 0 100 4 0 0 0 21 4 50 0 2 1 0 1213 0 0 0 100 5 0 0 14 11 3 8 1 1 0 0 563 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 4 0 0 0 100 7 0 0 10 216 104 10 1 0 0 0 559 0 0 0 100 March 2, 2026 at 06:59:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 150 202 0 0 0 0 0 0 1 0 99 1 0 0 0 26 8 20 0 0 0 0 314 0 0 0 100 2 0 0 3 213 102 8 1 0 0 0 30 0 0 0 100 3 0 0 0 19 2 14 0 1 0 0 0 0 0 0 100 4 0 0 0 20 3 48 1 1 0 0 1220 0 0 0 100 5 0 0 14 20 8 16 0 1 0 0 560 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 7 0 0 10 218 105 14 0 1 0 0 562 0 0 0 100 March 2, 2026 at 06:59:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2355 138 629 0 48 394 0 0 0 2 0 98 1 0 0 0 124 8 227 2 52 506 0 310 0 1 0 98 2 0 0 4 289 102 164 3 37 361 0 0 0 2 0 98 3 0 0 0 254 134 236 3 50 418 0 0 0 2 0 98 4 0 0 0 125 15 257 1 56 441 0 1208 0 2 0 98 5 0 0 14 91 3 186 1 43 456 0 559 0 2 0 98 6 0 0 0 103 2 208 2 46 447 0 0 0 2 0 98 7 0 0 9 297 104 191 4 34 406 0 560 0 2 0 98 March 2, 2026 at 06:59:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 100 0 0 1 0 0 0 1 0 99 1 0 0 0 27 9 18 1 0 1 0 311 0 0 0 100 2 0 0 7 209 101 2 0 0 1 0 0 0 0 0 100 3 0 0 0 19 2 10 0 0 1 0 0 0 0 0 100 4 0 0 0 58 25 78 1 0 2 0 1208 0 0 0 100 5 0 0 14 71 32 66 0 1 1 0 561 0 0 0 100 6 0 0 0 15 2 12 0 1 1 0 0 0 0 0 100 7 0 0 14 216 105 12 0 1 0 0 560 0 0 0 100 March 2, 2026 at 06:59:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 1 0 99 1 0 0 0 19 7 14 0 0 0 0 309 0 0 0 100 2 0 0 4 210 102 4 0 0 0 0 1 0 0 0 100 3 0 0 0 18 1 10 0 0 0 0 0 0 0 0 100 4 0 0 0 13 3 36 1 0 1 0 1208 0 0 0 100 5 0 0 14 112 54 110 1 1 0 0 561 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 2 0 0 0 100 7 0 0 9 221 105 20 1 1 0 0 560 0 0 0 100 March 2, 2026 at 06:59:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 100 208 61 11 5 0 299 14 1 0 85 1 27 0 0 174 11 360 158 16 8 1 1077 14 1 0 86 2 1565 0 129 341 105 274 128 16 7 0 644 13 1 0 86 3 2 0 0 133 3 199 97 13 8 0 612 14 1 0 85 4 4 0 0 94 7 136 45 12 5 0 1483 14 1 0 85 5 293 0 14 170 48 216 54 15 3 2 990 14 1 0 85 6 0 0 0 168 3 405 156 21 9 0 829 14 1 0 86 7 0 0 10 284 106 118 59 8 4 0 1115 14 1 0 85 March 2, 2026 at 06:59:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2613 108 938 495 28 25 0 2136 97 3 0 0 1 1 0 0 457 6 709 394 29 22 0 1953 98 2 0 0 2 1 0 592 605 108 818 442 30 59 0 1489 98 2 0 0 3 5 0 0 476 26 687 378 38 39 0 1481 98 2 0 0 4 0 0 0 417 23 561 315 46 29 0 2651 98 2 0 0 5 0 0 0 380 11 487 286 37 32 0 1648 99 1 0 0 6 0 0 0 359 3 451 265 30 39 0 1382 99 1 0 0 7 3 0 10 712 109 773 416 35 37 0 1940 98 2 0 0 March 2, 2026 at 06:59:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2514 113 731 397 30 35 0 1863 97 3 0 0 1 0 0 0 382 4 570 328 33 41 0 1980 98 2 0 0 2 0 0 562 551 106 676 374 36 39 0 1306 98 2 0 0 3 0 0 0 465 3 738 405 40 19 0 1577 98 2 0 0 4 0 0 0 451 8 715 387 35 23 0 2826 98 2 0 0 5 550 0 0 372 9 477 272 42 35 1 1794 98 2 0 0 6 0 0 0 467 11 658 364 42 32 0 1260 99 1 0 0 7 226 0 17 664 131 641 355 36 36 1 1940 98 2 0 0 March 2, 2026 at 06:59:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2483 119 748 402 39 32 0 2162 97 3 0 0 1 0 0 0 391 6 568 326 35 29 0 1685 98 2 0 0 2 20 0 493 619 113 837 449 39 38 0 1613 98 2 0 0 3 1 0 0 401 5 594 342 27 22 0 1410 99 1 0 0 4 0 0 0 383 5 579 334 32 24 0 1630 98 2 0 0 5 1 0 0 364 4 528 271 60 33 0 3117 98 2 0 0 6 0 0 0 372 3 508 287 42 26 0 1310 99 1 0 0 7 0 0 10 661 132 659 370 40 15 0 1411 98 2 0 0 March 2, 2026 at 06:59:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2152 103 69 37 10 1 0 781 29 1 0 70 1 0 0 0 104 3 169 84 13 3 0 603 31 0 0 69 2 1 0 102 307 116 148 85 6 4 0 200 31 0 0 69 3 6 0 0 157 36 160 48 13 2 0 230 29 0 0 71 4 0 0 0 99 8 145 73 8 1 0 442 32 0 0 68 5 0 0 0 185 2 308 112 13 10 0 1745 31 1 0 68 6 0 0 0 106 1 138 71 13 2 0 310 31 0 0 68 7 0 0 9 312 105 144 74 10 4 0 861 30 0 0 69 March 2, 2026 at 06:59:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2108 103 112 0 1 0 0 583 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 2 0 0 3 211 101 12 0 1 0 0 3 0 0 0 100 3 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 4 0 0 0 11 3 4 0 0 0 0 4 0 0 0 100 5 0 0 0 11 2 34 1 0 1 0 1221 0 0 0 100 6 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 7 0 0 10 239 114 34 0 0 0 0 576 0 0 0 100 March 2, 2026 at 06:59:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 103 114 0 2 0 0 566 0 1 0 99 1 0 0 0 14 2 8 1 0 0 0 307 0 0 0 100 2 0 0 4 208 101 4 0 0 0 0 6 0 0 0 100 3 0 0 0 112 52 106 0 0 0 0 2 0 0 0 100 4 1 0 0 13 2 12 0 0 0 0 13 0 0 0 100 5 0 0 0 17 7 34 1 0 0 0 1220 0 0 0 100 6 0 0 0 17 2 12 0 0 0 0 1 0 0 0 100 7 0 0 9 233 111 26 0 1 0 0 564 0 0 0 100 March 2, 2026 at 06:59:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2138 131 166 0 1 0 0 566 0 1 0 99 1 0 0 0 10 2 6 0 0 2 0 300 0 0 0 100 2 0 0 3 208 101 2 0 1 0 0 0 0 0 0 100 3 0 0 0 55 23 48 0 1 0 0 0 0 0 0 100 4 0 0 0 13 1 14 0 1 0 0 0 0 0 0 100 5 0 0 0 11 2 36 1 0 1 0 1220 0 0 0 100 6 0 0 0 18 2 14 0 0 0 0 0 0 0 0 100 7 0 0 10 232 110 26 1 0 3 0 560 0 0 0 100 March 2, 2026 at 06:59:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2713 0 25 2207 123 264 69 34 25 10 674 58 2 0 40 1 1523 0 16 155 7 228 77 25 48 7 933 58 1 0 41 2 6455 0 16 335 106 210 67 29 74 11 1591 59 2 0 40 3 3296 0 1 176 18 276 76 39 28 22 881 57 1 0 42 4 2946 0 7 159 5 235 81 44 47 15 1328 60 3 0 38 5 2507 0 0 137 13 172 64 29 34 10 342 58 1 0 41 6 2662 0 0 113 2 200 52 38 51 12 2259 57 1 0 42 7 1787 0 10 333 107 164 75 33 11 6 894 57 1 0 42 March 2, 2026 at 06:59:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1327 0 0 2357 104 446 264 26 12 0 1054 98 2 0 0 1 4038 0 14 266 4 367 218 21 14 0 1073 98 2 0 0 2 1973 0 395 394 107 314 192 24 12 0 1469 98 2 0 0 3 519 0 7 261 18 270 177 15 9 0 1040 99 1 0 0 4 690 0 0 291 3 374 225 30 7 0 974 99 1 0 0 5 2711 0 0 355 6 591 324 30 20 0 1247 98 2 0 0 6 976 0 0 285 10 396 222 23 15 0 2096 98 2 0 0 7 1399 0 10 531 121 440 248 33 5 0 1526 99 1 0 0 March 2, 2026 at 06:59:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 772 0 7 2308 103 334 207 24 6 0 958 98 2 0 0 1 291 0 0 225 4 271 180 18 13 0 853 99 1 0 0 2 925 0 297 458 139 369 224 22 2 0 1160 99 1 0 0 3 846 0 0 204 7 240 162 18 7 0 496 99 1 0 0 4 771 0 7 196 9 192 137 17 4 0 559 99 1 0 0 5 390 0 0 211 2 223 158 10 14 0 743 99 1 0 0 6 0 0 0 221 8 296 175 18 8 0 1977 99 1 0 0 7 1304 0 10 518 109 390 232 21 10 0 1274 99 1 0 0 March 2, 2026 at 06:59:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 263 0 0 2376 117 421 254 20 4 0 1123 98 2 0 0 1 798 0 7 213 2 215 147 16 4 0 842 99 1 0 0 2 573 0 381 473 109 445 259 20 24 1 1518 98 2 0 0 3 1047 0 0 305 14 409 239 23 9 0 797 99 1 0 0 4 11 0 0 244 8 263 172 17 4 1 553 99 1 0 0 5 786 0 0 324 18 472 273 22 9 1 816 99 1 0 0 6 266 0 0 291 4 433 245 21 21 1 2011 99 1 0 0 7 261 0 10 454 111 248 169 11 10 0 1268 99 1 0 0 March 2, 2026 at 06:59:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2387 104 482 278 46 202 0 1473 96 4 0 0 1 3 0 0 382 14 560 310 47 110 0 962 98 2 0 0 2 0 0 381 489 107 499 279 44 216 0 1402 98 2 0 0 3 0 0 0 419 133 396 231 36 262 0 779 97 3 0 0 4 0 0 0 270 13 335 203 36 216 0 727 98 2 0 0 5 0 0 0 307 7 453 250 39 223 0 555 97 3 0 0 6 4 0 0 466 14 795 408 44 149 0 2017 98 2 0 0 7 0 0 3 517 113 492 252 43 253 0 1296 97 3 0 0 March 2, 2026 at 06:59:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2416 119 605 327 81 528 1 1206 97 3 0 0 1 0 0 0 425 14 664 346 88 372 0 591 98 2 0 0 2 1 0 325 592 113 763 389 78 448 0 1247 98 2 0 0 3 0 0 0 799 362 747 383 78 501 0 820 97 3 0 0 4 2 0 0 608 9 1045 528 79 510 0 935 98 2 0 0 5 0 0 0 418 8 750 381 76 454 1 1049 98 2 0 0 6 0 0 7 515 4 958 477 79 435 0 2024 98 2 0 0 7 0 0 3 643 109 781 399 80 483 1 1009 98 2 0 0 March 2, 2026 at 06:59:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2443 109 620 326 74 406 1 1251 97 3 0 0 1 0 0 0 392 4 646 340 71 521 0 756 98 2 0 0 2 0 0 395 711 121 953 483 89 514 1 1040 97 3 0 0 3 4 0 0 737 368 607 307 92 486 0 886 97 3 0 0 4 0 0 0 519 6 904 449 92 426 0 1050 98 2 0 0 5 2 0 0 420 3 733 362 88 548 1 812 98 2 0 0 6 3 0 0 439 6 769 375 86 511 0 1886 98 2 0 0 7 0 0 3 765 118 947 488 80 512 0 1168 98 2 0 0 March 2, 2026 at 06:59:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2825 111 1338 217 255 762 0 3533 56 4 0 40 1 0 0 7 710 10 1227 215 259 748 1 2427 55 3 0 42 2 1 0 591 846 105 1130 241 214 733 0 3368 63 4 0 33 3 0 0 0 986 377 1164 203 223 606 0 3228 62 3 0 34 4 19 0 0 641 12 1030 190 206 787 2 3179 63 3 0 34 5 2 0 0 669 3 1137 207 178 659 0 2934 62 3 0 34 6 27 0 0 766 12 1363 216 240 690 1 3255 56 3 0 40 7 1 0 3 874 123 1127 339 173 598 0 2811 62 3 0 35 March 2, 2026 at 06:59:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 2527 102 841 22 100 412 1 2103 3 3 0 94 1 15 0 7 327 7 538 22 109 413 2 1970 7 1 0 92 2 2 0 270 561 120 625 10 82 349 2 1831 3 2 0 95 3 1 0 8 472 151 602 18 103 196 1 2185 3 2 0 95 4 0 0 14 371 26 578 18 84 355 0 1307 3 2 0 96 5 1 0 7 269 8 454 13 70 164 0 1187 4 1 0 94 6 1 0 0 344 3 594 22 71 404 0 1498 5 1 0 94 7 6 0 2 504 103 525 13 67 376 0 1606 4 1 0 94 March 2, 2026 at 06:59:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 101 188 1 23 219 0 300 0 3 0 97 1 0 0 7 56 4 108 1 31 280 0 260 0 3 0 97 2 0 0 18 261 109 110 2 27 367 0 271 0 3 0 97 3 0 0 0 176 116 376 3 43 399 0 1131 0 2 0 98 4 0 0 0 120 37 164 2 28 276 0 0 0 3 0 97 5 0 0 0 68 6 137 0 35 347 0 0 0 1 0 99 6 0 0 7 72 12 121 3 39 224 0 300 0 3 0 97 7 0 0 2 259 102 113 1 36 404 0 294 0 2 0 97 March 2, 2026 at 06:59:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2333 129 573 0 134 547 0 300 0 3 0 97 1 0 0 7 204 5 464 1 125 646 0 756 0 2 0 98 2 0 0 21 397 103 417 0 102 566 0 270 0 2 0 98 3 0 0 0 593 397 781 2 110 662 0 629 0 3 0 97 4 0 0 112 371 2 804 0 130 627 0 0 0 2 0 98 5 0 0 0 199 2 418 0 111 619 0 0 0 2 0 98 6 0 0 0 266 25 503 4 140 655 0 314 0 2 0 98 7 0 0 7 409 104 430 0 124 525 0 294 0 2 0 98 March 2, 2026 at 06:59:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2289 112 506 0 125 1453 0 300 0 3 0 97 1 0 0 7 216 10 486 2 132 1385 0 1399 0 3 0 97 2 0 0 17 396 109 412 2 100 1512 0 272 0 2 0 97 3 0 0 0 580 389 1088 2 128 1684 0 0 0 3 0 97 4 0 0 7 292 8 615 1 141 1422 0 1 0 3 0 97 5 0 0 0 184 3 444 0 123 1500 0 2 0 3 0 97 6 0 0 0 254 30 506 1 137 1376 0 301 0 3 0 97 7 0 0 3 409 103 438 2 129 1157 0 252 0 2 0 98 March 2, 2026 at 06:59:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 0 2329 108 594 6 138 2120 0 359 0 4 0 96 1 0 0 7 268 20 571 1 155 1984 0 1768 0 4 0 96 2 13 0 18 431 110 478 4 127 3601 1 1200 0 4 0 96 3 0 0 0 625 405 1272 5 158 2098 0 35 0 3 0 97 4 0 0 0 238 5 495 0 155 2295 0 35 0 3 0 97 5 0 0 0 267 24 528 6 122 3754 0 819 0 4 0 96 6 0 0 0 242 9 522 2 145 1916 0 343 0 3 0 97 7 4 0 2 418 104 451 2 126 1968 0 41 0 2 0 98 March 2, 2026 at 06:59:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2366 108 645 1 118 1298 0 320 0 3 0 97 1 0 0 7 248 6 555 3 120 1437 0 1679 0 3 0 97 2 0 0 3 401 103 444 0 102 1386 0 0 0 2 0 98 3 0 0 0 644 416 585 0 127 1769 0 3 0 3 0 97 4 0 0 0 228 1 490 0 139 1113 0 1 0 2 0 98 5 0 0 0 242 22 491 0 121 1235 0 0 0 2 0 98 6 0 0 14 600 30 1183 0 124 1378 0 572 0 3 0 97 7 0 0 3 417 105 450 0 109 1113 0 10 0 2 0 98 March 2, 2026 at 06:59:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 116 2 2 0 0 308 0 1 0 99 1 0 0 7 27 7 56 1 2 4 0 1699 0 1 0 99 2 0 0 4 211 102 6 0 0 1 0 0 0 0 0 100 3 0 0 0 14 3 10 0 1 1 0 7 0 0 0 100 4 0 0 0 10 2 6 0 0 0 0 9 0 0 0 100 5 0 0 0 10 1 8 0 0 2 0 0 0 0 0 100 6 0 0 14 110 53 106 1 0 0 0 567 0 0 0 100 7 0 0 2 222 102 18 0 0 0 0 1 0 0 0 100 March 2, 2026 at 06:59:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 136 139 0 4 0 0 306 0 1 0 99 1 0 0 7 75 7 98 2 1 1 0 1682 0 1 0 99 2 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 12 2 6 0 1 0 0 1 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 55 25 52 0 2 0 0 565 0 0 0 100 7 0 0 3 211 101 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:59:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2152 132 170 0 0 1 0 328 0 1 0 99 1 0 0 0 80 31 105 1 3 0 0 1427 0 1 0 99 2 0 0 11 218 105 14 0 2 0 0 260 0 0 0 100 3 0 0 0 17 5 12 0 0 0 0 13 0 0 0 100 4 0 0 0 7 1 2 0 1 0 0 11 0 0 0 100 5 0 0 0 9 1 6 0 0 0 0 4 0 0 0 100 6 0 0 14 12 3 10 0 0 0 0 589 0 0 0 100 7 0 0 2 211 101 8 0 0 0 0 11 0 0 0 100 March 2, 2026 at 06:59:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2123 110 126 1 0 0 0 318 0 1 0 99 1 0 0 0 28 4 56 1 1 0 0 1422 0 1 0 99 2 0 0 11 312 153 110 0 1 2 0 263 0 0 0 100 3 0 0 0 12 1 6 1 1 0 0 5 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 12 2 10 0 0 0 0 12 0 0 0 100 6 0 0 14 12 3 10 0 1 0 0 570 0 0 0 100 7 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:59:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 110 133 1 1 0 0 321 0 1 0 99 1 0 0 0 17 4 42 1 0 0 0 1410 0 0 0 100 2 0 0 11 263 125 60 0 1 0 0 260 0 0 0 100 3 0 0 0 71 31 68 0 1 0 0 7 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 5 0 0 0 100 5 0 0 0 13 7 2 0 0 0 0 0 0 0 0 100 6 0 0 14 15 3 12 1 0 0 0 571 0 0 0 100 7 0 0 2 216 103 12 0 1 0 0 11 0 0 0 100 March 2, 2026 at 06:59:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 111 124 1 2 0 0 309 0 1 0 99 1 0 0 0 18 4 44 2 1 3 0 1410 0 0 0 100 2 0 0 11 214 104 10 0 0 1 0 260 0 0 0 100 3 0 0 0 106 47 101 0 2 3 0 0 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 10 1 8 0 0 2 0 0 0 0 0 100 6 0 0 14 11 3 8 0 0 0 0 566 0 0 0 100 7 0 0 2 208 101 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:59:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2169 159 216 0 0 1 0 306 0 1 0 99 1 0 0 0 21 6 44 1 1 1 0 1411 0 0 0 100 2 0 0 14 214 103 10 0 2 0 0 260 0 0 0 100 3 0 0 0 31 5 26 0 1 1 0 5 0 0 0 100 4 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 5 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 6 0 0 14 14 4 8 0 0 1 0 567 0 0 0 100 7 0 0 7 208 101 0 0 0 1 0 0 0 0 0 100 March 2, 2026 at 06:59:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 157 214 1 0 0 0 307 0 1 0 99 1 0 0 0 17 5 42 1 0 1 0 1409 0 0 0 99 2 0 0 11 211 103 6 0 0 0 0 260 0 0 0 100 3 0 0 0 17 0 12 0 0 0 0 0 0 0 0 100 4 0 0 0 13 2 12 0 1 0 0 1 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 6 0 0 14 11 3 8 0 0 0 0 565 0 0 0 100 7 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:59:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 157 216 0 0 0 0 312 0 1 0 99 1 0 0 0 17 5 42 1 0 0 0 1411 0 0 0 100 2 0 0 11 214 104 10 0 0 0 0 264 0 0 0 100 3 0 0 0 26 4 24 0 0 0 0 13 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 5 0 0 0 100 6 0 0 14 19 6 16 1 0 2 0 573 0 0 0 100 7 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:59:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2169 158 224 1 2 0 0 310 0 1 0 99 1 0 0 0 25 7 54 2 1 0 0 1421 0 0 0 100 2 0 0 10 211 103 6 0 0 0 0 260 0 0 0 100 3 0 0 0 16 0 10 0 0 0 0 0 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 16 6 10 0 1 1 0 0 0 0 0 100 6 5 0 14 15 4 12 0 0 0 0 572 0 0 0 100 7 0 0 3 216 103 10 0 0 0 0 7 0 0 0 100 March 2, 2026 at 06:59:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 116 140 0 0 0 0 307 0 1 0 99 1 0 0 0 49 20 76 1 2 0 0 1412 0 0 0 99 2 0 0 10 215 104 12 0 0 0 0 260 0 0 0 100 3 0 0 0 72 32 66 0 1 0 0 8 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 21 0 0 0 100 5 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 6 0 0 14 14 3 16 0 1 0 0 565 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 March 2, 2026 at 06:59:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 122 1 0 0 0 307 0 1 0 99 1 0 0 0 19 6 44 1 0 0 0 1412 0 0 0 100 2 0 0 11 214 103 8 0 0 0 0 260 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 11 3 8 0 0 0 0 583 0 0 0 100 7 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:59:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 6258 108 9497 99 318 145 0 29331 21 14 0 65 1 145 0 0 4119 11 8514 75 353 111 0 22352 17 12 0 71 2 14 0 10 3261 111 6180 53 241 65 0 13805 14 8 0 78 3 28 0 0 3326 29 6721 73 259 83 0 17621 14 9 0 77 4 20 0 0 1868 10 3850 29 195 117 0 9423 9 6 0 85 5 6 0 0 1529 10 3083 20 111 79 0 6841 6 4 0 89 6 10 0 0 2244 10 4631 37 174 82 0 13010 13 7 0 81 7 12 0 17 2068 106 3940 32 118 54 0 10616 9 6 0 85 March 2, 2026 at 06:59:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 0 6757 113 9865 76 418 153 0 24963 23 15 0 62 1 7 0 0 4987 17 10405 74 426 132 0 26928 22 14 0 64 2 13 0 3 4190 120 8173 61 268 110 0 19239 17 11 0 72 3 5 0 7 4394 11 9140 51 331 101 0 22115 17 12 0 71 4 12 0 0 2620 12 5241 34 267 114 0 14539 13 8 0 79 5 5 0 0 2182 13 4534 26 164 84 0 10470 10 6 0 84 6 3 0 0 2974 15 6244 45 254 116 0 14064 12 8 0 80 7 16 0 17 2135 112 4069 18 136 76 0 10363 9 6 0 86 March 2, 2026 at 06:59:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 15 7013 107 10405 53 371 145 0 24096 23 15 0 62 1 13 0 7 4904 23 10223 65 406 157 0 26354 21 14 0 64 2 11 0 4 3412 109 6468 41 265 157 0 18571 15 11 0 74 3 9 0 0 3842 20 8068 41 311 100 0 18444 16 10 0 74 4 11 0 0 2706 10 5588 32 267 105 0 15424 12 9 0 79 5 16 0 0 2359 20 4743 16 162 87 0 9506 9 6 0 85 6 4 0 0 3349 10 7173 40 246 168 0 17523 14 10 0 76 7 1 0 2 2618 115 5039 24 119 74 0 12311 10 7 0 83 March 2, 2026 at 06:59:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 3011 105 1921 4 105 235 0 4053 4 4 0 92 1 2 0 7 983 8 2123 12 112 271 0 5480 3 4 0 92 2 2 0 4 974 110 1553 10 81 215 0 3799 3 4 0 93 3 0 0 0 711 128 1211 3 85 266 0 2240 2 3 0 94 4 2 0 0 888 6 1854 6 78 254 0 4376 2 3 0 95 5 0 0 0 421 38 828 1 67 225 0 2009 2 2 0 96 6 1 0 0 773 2 1690 4 94 230 0 4443 4 4 0 92 7 6 0 2 764 103 1218 7 57 187 0 3458 3 3 0 94 March 2, 2026 at 06:59:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2324 102 594 1 122 485 0 266 0 3 0 97 1 0 0 7 162 6 357 2 112 572 0 554 0 2 0 98 2 0 0 7 345 102 358 2 99 557 0 600 0 2 0 98 3 0 0 0 561 383 504 2 113 555 0 8 0 3 0 97 4 0 0 0 399 7 854 1 124 459 0 1124 0 2 0 98 5 0 0 0 157 1 368 1 121 575 0 0 0 2 0 98 6 0 0 0 239 41 451 2 130 580 0 0 0 2 0 98 7 0 0 7 348 101 351 2 97 500 0 0 0 2 0 98 March 2, 2026 at 06:59:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2452 102 842 0 79 450 0 266 0 2 0 98 1 0 0 7 149 8 326 1 82 550 0 557 0 2 0 98 2 0 0 4 362 117 313 2 87 477 0 600 0 2 0 98 3 0 0 0 526 349 399 0 103 520 0 16 0 2 0 98 4 0 0 0 166 6 393 1 97 507 0 1136 0 2 0 98 5 1 0 0 157 3 345 0 88 491 0 4 0 2 0 98 6 0 0 0 245 9 500 0 77 554 0 0 0 2 0 98 7 0 0 2 331 101 314 0 83 533 0 0 0 2 0 98 March 2, 2026 at 06:59:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2138 130 161 0 3 0 0 273 0 1 0 99 1 0 0 7 27 5 21 1 3 0 0 555 0 0 0 100 2 0 0 4 244 119 38 0 0 1 0 603 0 0 0 99 3 0 0 0 46 16 42 0 4 0 0 16 0 0 0 100 4 0 0 0 18 6 40 0 0 1 0 1127 0 0 0 100 5 0 0 0 18 0 18 0 1 0 0 0 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 6 0 0 0 100 7 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:59:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2127 124 154 0 1 0 0 267 0 1 0 99 1 0 0 7 71 30 70 0 1 0 0 569 0 0 0 100 2 0 0 4 224 107 20 0 1 0 0 628 0 0 0 99 3 0 0 0 27 8 22 1 0 0 0 10 0 0 0 100 4 0 0 0 16 5 38 2 0 3 0 1123 0 0 0 100 5 0 0 0 28 6 18 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 2 216 103 12 0 1 0 0 9 0 0 0 100 March 2, 2026 at 06:59:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 106 0 1 0 0 266 0 1 0 99 1 0 0 7 66 30 64 0 2 3 0 554 0 0 0 100 2 0 0 4 244 119 38 0 0 5 0 600 0 0 0 99 3 0 0 0 38 14 34 0 3 2 0 11 0 0 0 100 4 0 0 0 19 6 44 1 1 0 0 1129 0 0 0 100 5 0 0 0 20 3 16 0 2 2 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 2 211 102 4 0 0 0 0 1 0 0 0 100 March 2, 2026 at 06:59:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 106 0 0 0 0 266 0 1 0 99 1 0 0 7 70 30 62 1 1 0 0 554 0 0 0 100 2 0 0 4 212 103 6 1 0 0 0 599 0 0 0 100 3 0 0 0 23 8 16 0 0 0 0 6 0 0 0 100 4 0 0 0 17 5 40 1 1 0 0 1123 0 0 0 100 5 0 0 0 55 22 50 0 2 1 0 0 0 0 0 100 6 0 0 0 19 3 22 0 3 0 0 0 0 0 0 100 7 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 06:59:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 2258 106 322 186 16 7 1 574 80 2 0 18 1 18 0 21 167 13 183 110 23 3 0 1108 81 0 0 18 2 20 0 185 325 103 148 121 10 4 0 995 81 1 0 18 3 3 0 0 174 16 173 111 13 9 0 303 81 0 0 18 4 13 0 0 157 14 195 93 11 4 1 1420 81 1 0 18 5 1333 0 0 178 10 154 110 10 3 2 299 81 1 0 18 6 9 0 0 237 12 352 171 15 4 0 585 81 1 0 18 7 1 0 3 331 102 110 99 13 3 0 361 82 0 0 18 March 2, 2026 at 06:59:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 100 58 78 13 2 0 125 99 1 0 0 1 0 0 21 204 10 183 140 11 3 0 1003 100 0 0 0 2 0 0 101 307 103 101 100 7 5 0 775 99 1 0 0 3 0 0 0 152 10 142 119 3 3 0 211 100 0 0 0 4 0 0 0 221 54 247 150 8 1 0 1285 99 1 0 0 5 0 0 0 146 1 156 126 5 1 0 287 100 0 0 0 6 0 0 0 120 2 70 85 7 6 0 117 100 0 0 0 7 0 0 3 301 102 93 86 10 3 0 231 100 0 0 0 March 2, 2026 at 06:59:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2215 101 220 157 14 0 0 297 99 1 0 0 1 0 0 21 185 7 186 141 8 3 0 1139 100 0 0 0 2 0 0 143 338 105 127 111 8 0 0 779 100 0 0 0 3 0 0 0 173 5 177 140 6 3 0 275 100 0 0 0 4 0 0 0 169 26 177 125 5 4 0 1360 99 1 0 0 5 0 0 0 148 26 91 97 10 1 0 188 100 0 0 0 6 0 0 0 184 12 151 125 7 1 0 149 100 0 0 0 7 0 0 3 323 103 86 91 13 3 0 117 100 0 0 0 March 2, 2026 at 06:59:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2160 100 138 103 12 3 0 197 99 1 0 0 1 0 0 21 157 8 153 121 13 5 0 1066 99 1 0 0 2 0 0 129 357 104 167 135 11 2 0 867 100 0 0 0 3 0 0 0 191 28 173 137 11 3 0 174 100 0 0 0 4 0 0 0 164 6 193 127 10 3 0 1360 99 1 0 0 5 0 0 0 116 1 91 94 11 5 0 144 100 0 0 0 6 0 0 0 167 23 133 116 9 3 0 233 100 0 0 0 7 0 0 3 320 104 76 92 8 2 0 150 100 0 0 0 March 2, 2026 at 06:59:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 101 147 115 8 3 0 274 99 1 0 0 1 0 0 21 167 7 171 137 6 3 0 875 100 0 0 0 2 0 0 143 350 105 177 119 11 5 0 1187 99 1 0 0 3 0 0 0 193 25 163 132 13 1 0 200 100 0 0 0 4 0 0 0 188 8 210 141 11 6 0 1371 99 1 0 0 5 0 0 0 160 2 161 128 9 2 0 304 100 0 0 0 6 0 0 0 171 32 126 112 8 4 0 185 100 0 0 0 7 0 0 3 311 101 64 85 5 5 0 119 100 0 0 0 March 2, 2026 at 06:59:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 102 95 97 9 3 0 138 99 1 0 0 1 0 0 21 164 8 175 133 9 8 0 779 100 0 0 0 2 0 0 129 327 107 121 111 6 1 0 1129 99 1 0 0 3 0 0 0 171 3 164 129 6 4 0 252 100 0 0 0 4 0 0 0 122 5 100 86 5 6 0 1250 99 1 0 0 5 0 0 0 173 9 171 120 9 12 0 231 100 0 0 0 6 0 0 0 235 47 219 150 11 1 0 217 100 0 0 0 7 0 0 3 336 109 121 104 17 3 0 230 100 0 0 0 March 2, 2026 at 07:00:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2176 102 150 121 13 11 0 339 99 1 0 0 1 0 0 21 149 10 142 123 15 0 0 706 100 0 0 0 2 0 0 101 331 104 106 101 8 0 0 1062 100 0 0 0 3 1 0 0 151 5 130 114 10 0 0 159 100 0 0 0 4 0 0 0 198 23 220 147 8 6 0 1408 99 1 0 0 5 0 0 0 160 11 147 126 5 9 0 226 100 0 0 0 6 3 0 0 138 6 94 98 7 3 0 186 100 0 0 0 7 0 0 3 375 119 156 125 5 3 0 220 100 0 0 0 March 2, 2026 at 07:00:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2162 102 80 95 6 1 0 128 99 1 0 0 1 0 0 14 158 5 188 138 10 8 0 629 100 0 0 0 2 2 0 108 346 106 173 132 20 4 0 1524 99 1 0 0 3 0 0 0 130 3 100 98 16 3 0 173 100 0 0 0 4 0 0 0 195 17 202 134 15 7 0 1281 99 1 0 0 5 0 0 0 243 44 269 182 13 13 0 238 100 0 0 0 6 0 0 0 144 0 113 104 8 5 0 265 100 0 0 0 7 0 0 3 327 105 70 89 10 5 0 157 100 0 0 0 March 2, 2026 at 07:00:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2172 101 112 103 10 0 0 126 99 1 0 0 1 0 0 14 138 2 98 101 7 1 0 382 100 0 0 0 2 0 0 164 350 109 210 155 8 4 0 1475 99 1 0 0 3 0 0 0 199 17 260 175 9 12 0 415 100 0 0 0 4 0 0 0 181 16 198 129 14 1 0 1416 99 1 0 0 5 0 0 0 203 25 196 147 15 6 0 240 100 0 0 0 6 0 0 0 158 5 132 109 12 6 0 293 100 0 0 0 7 0 0 3 323 103 62 80 15 4 0 152 100 0 0 0 March 2, 2026 at 07:00:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 101 121 104 14 3 0 210 99 1 0 0 1 0 0 14 102 3 60 81 8 5 0 410 100 0 0 0 2 0 0 108 392 122 213 151 13 3 0 1374 99 1 0 0 3 0 0 0 132 14 105 99 9 1 0 169 100 0 0 0 4 0 0 0 129 4 102 87 4 0 0 1220 99 1 0 0 5 0 0 0 203 16 237 158 12 3 0 422 100 0 0 0 6 0 0 0 162 2 168 133 10 3 0 254 100 0 0 0 7 0 0 3 363 116 145 119 11 0 0 193 100 0 0 0 March 2, 2026 at 07:00:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 106 194 145 9 2 0 284 99 1 0 0 1 0 0 14 138 2 145 123 9 11 0 503 100 0 0 0 2 0 0 136 343 109 177 138 10 3 0 1459 99 1 0 0 3 0 0 0 156 12 121 109 12 3 0 194 100 0 0 0 4 0 0 0 132 14 105 89 9 3 0 1267 99 1 0 0 5 0 0 0 138 13 95 93 7 7 0 153 100 0 0 0 6 0 0 0 199 20 223 157 10 4 0 283 100 0 0 0 7 0 0 3 323 106 79 87 8 8 0 113 100 0 0 0 March 2, 2026 at 07:00:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 100 77 86 8 4 0 128 99 1 0 0 1 0 0 0 179 12 183 131 14 2 0 285 100 0 0 0 2 0 0 164 398 127 266 176 18 8 0 1833 99 1 0 0 3 0 0 0 136 4 105 98 16 1 0 189 100 0 0 0 4 0 0 0 159 6 213 131 18 2 0 1510 99 1 0 0 5 0 0 0 147 2 109 100 14 2 0 201 100 0 0 0 6 0 0 0 173 18 147 124 7 4 0 215 100 0 0 0 7 0 0 3 344 105 104 101 10 2 0 184 100 0 0 0 March 2, 2026 at 07:00:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 100 86 94 5 2 0 102 99 1 0 0 1 1 0 0 154 8 133 115 11 2 0 187 100 0 0 0 2 0 0 122 411 145 211 154 10 1 0 1557 100 0 0 0 3 0 0 0 159 5 157 123 9 1 0 260 100 0 0 0 4 0 0 0 133 4 159 113 13 2 0 1320 99 1 0 0 5 0 0 0 195 14 192 134 24 1 0 352 100 0 0 0 6 0 0 0 120 3 109 103 24 0 0 272 100 0 0 0 7 0 0 3 354 105 123 109 12 8 0 191 100 0 0 0 March 2, 2026 at 07:00:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 100 141 118 8 3 0 137 99 1 0 0 1 0 0 0 136 3 111 108 6 1 0 182 100 0 0 0 2 0 0 115 359 130 151 125 6 4 0 1337 100 0 0 0 3 0 0 7 186 24 198 146 5 1 0 509 100 0 0 0 4 0 0 0 124 9 120 95 3 4 0 1238 99 1 0 0 5 0 0 0 157 6 158 122 5 1 0 306 100 0 0 0 6 0 0 0 151 3 139 117 7 0 0 271 100 0 0 0 7 0 0 3 358 105 143 121 8 0 0 234 100 0 0 0 March 2, 2026 at 07:00:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 100 113 104 9 4 0 98 99 1 0 0 1 0 0 0 117 2 76 87 4 2 0 126 100 0 0 0 2 0 0 143 317 107 123 113 7 4 0 1330 100 0 0 0 3 0 0 7 159 7 150 115 11 1 0 514 100 0 0 0 4 0 0 0 226 54 254 149 17 2 0 1357 99 1 0 0 5 0 0 0 141 4 111 108 10 4 0 144 100 0 0 0 6 0 0 0 153 5 144 125 4 3 0 329 100 0 0 0 7 0 0 3 332 105 122 103 10 2 0 243 100 0 0 0 March 2, 2026 at 07:00:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 100 158 131 6 3 0 225 99 1 0 0 1 0 0 0 108 1 58 84 8 2 0 164 100 0 0 0 2 0 0 143 325 105 109 103 6 13 0 1318 100 0 0 0 3 0 0 7 154 7 126 114 9 3 0 493 100 0 0 0 4 0 0 0 208 28 372 137 12 1 0 1652 99 1 0 0 5 0 0 0 131 4 112 100 17 2 0 153 100 0 0 0 6 0 0 0 174 19 186 138 14 13 0 220 100 0 0 0 7 0 0 3 380 114 184 136 11 3 0 252 100 0 0 0 March 2, 2026 at 07:00:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2191 111 148 121 17 0 0 278 99 1 0 0 1 2 0 0 183 20 156 124 14 3 0 207 100 0 0 0 2 0 0 185 341 106 153 127 12 6 0 1447 99 1 0 0 3 0 0 7 153 6 114 106 11 1 0 457 100 0 0 0 4 0 0 0 146 5 159 116 11 4 0 1369 99 1 0 0 5 0 0 0 139 2 104 93 13 1 0 177 100 0 0 0 6 0 0 0 119 1 96 91 15 3 0 149 100 0 0 0 7 0 0 3 493 129 373 212 24 3 0 487 99 1 0 0 March 2, 2026 at 07:00:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2202 106 156 135 7 2 0 296 99 1 0 0 1 0 0 0 184 27 167 138 9 2 0 284 100 0 0 0 2 0 0 143 369 132 166 127 12 0 0 1310 100 0 0 0 3 0 0 7 113 4 76 87 7 2 0 380 100 0 0 0 4 0 0 0 137 3 116 91 5 3 0 1255 99 1 0 0 5 0 0 0 190 7 149 122 7 6 0 176 100 0 0 0 6 0 0 0 134 1 136 105 15 4 0 250 100 0 0 0 7 0 0 3 372 106 145 121 13 2 0 150 100 0 0 0 March 2, 2026 at 07:00:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 101 50 40 4 0 0 97 68 1 0 31 1 2 0 0 64 3 40 47 6 2 0 76 71 0 0 29 2 2 0 32 327 122 111 86 7 0 0 1340 74 0 0 25 3 0 0 7 104 14 71 62 9 0 0 335 74 0 0 26 4 0 0 0 117 17 73 64 5 0 0 99 75 0 0 25 5 0 0 0 97 1 90 61 6 2 0 1219 74 0 0 25 6 0 0 0 89 13 51 47 5 1 0 54 72 0 0 28 7 0 0 2 274 105 33 53 2 0 0 75 75 0 0 25 March 2, 2026 at 07:00:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 100 0 0 0 0 0 0 1 0 99 1 6 0 0 16 2 6 1 0 0 0 11 0 0 0 100 2 2 0 31 221 105 17 1 3 0 0 875 0 0 0 100 3 0 0 7 25 7 22 1 2 0 0 563 0 0 0 100 4 0 0 0 20 3 14 0 2 0 0 5 0 0 0 100 5 0 0 0 33 6 58 1 1 0 0 1142 0 0 0 99 6 0 0 0 111 50 108 0 0 0 0 13 0 0 0 100 7 0 0 3 210 101 2 0 1 0 0 11 0 0 0 100 March 2, 2026 at 07:00:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2620 0 114 2121 100 74 2 11 9 11 431 1 2 0 98 1 148 0 0 125 0 143 0 13 6 14 127 0 0 0 100 2 749 0 17 251 105 43 3 8 11 7 7419 2 1 0 97 3 30 0 7 51 5 57 0 13 7 6 670 0 0 0 100 4 17 0 0 51 5 52 0 7 3 4 114 0 0 0 100 5 9 0 0 105 34 133 1 8 8 4 1299 0 0 0 99 6 3 0 0 90 25 89 0 10 2 3 72 0 0 0 100 7 1 0 3 240 105 24 0 2 0 2 61 0 0 0 100 March 2, 2026 at 07:00:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 46 1 3 1 0 3 0 1 0 99 1 0 0 0 70 1 64 0 0 0 0 4 0 0 0 100 2 0 0 18 214 104 8 0 0 0 0 866 0 0 0 100 3 0 0 7 18 6 14 0 0 0 0 554 0 0 0 100 4 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 5 0 0 0 31 11 54 2 0 1 0 1226 0 0 0 99 6 0 0 0 107 47 104 1 3 0 0 5 0 0 0 100 7 0 0 2 224 105 26 0 2 0 0 7 0 0 0 100 March 2, 2026 at 07:00:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2509 100 793 14 87 27 0 2015 4 2 0 94 1 0 0 0 447 3 786 26 86 52 0 2107 4 2 0 94 2 0 0 326 474 105 484 9 48 20 0 2407 6 1 0 93 3 0 0 7 275 7 396 21 44 21 0 2462 9 1 0 90 4 0 0 0 343 6 551 16 56 13 0 1835 6 1 0 92 5 0 0 0 346 15 525 10 44 62 0 2934 5 2 0 93 6 0 0 0 479 0 841 23 60 25 0 1773 3 1 0 96 7 0 0 2 506 147 390 6 30 12 0 1108 4 1 0 95 March 2, 2026 at 07:00:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 2365 102 463 9 86 314 0 909 3 4 0 93 1 0 0 0 405 8 663 7 75 315 0 1614 2 3 0 94 2 3 0 241 524 113 620 6 67 382 0 2039 3 3 0 94 3 0 0 7 404 123 499 16 68 303 0 2061 5 3 0 92 4 0 0 0 207 15 323 11 59 279 0 1413 9 2 0 89 5 0 0 0 254 4 414 4 58 378 0 2290 2 3 0 94 6 17 0 10 404 3 746 13 94 379 0 1438 3 3 0 95 7 0 0 17 439 128 343 3 52 280 0 796 2 3 0 95 March 2, 2026 at 07:00:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2432 100 839 0 128 685 0 0 0 3 0 97 1 1 0 13 204 13 460 1 137 778 0 288 0 3 0 97 2 0 0 21 376 108 410 2 132 666 1 275 0 3 0 97 3 0 0 7 562 373 463 1 148 784 0 559 0 3 0 97 4 0 0 0 237 29 473 1 136 796 0 300 0 2 0 98 5 0 0 0 182 7 450 3 129 814 0 1118 0 3 0 97 6 0 0 0 325 3 709 2 141 799 0 37 0 3 0 97 7 0 0 7 461 114 561 1 133 849 0 2 0 3 0 97 March 2, 2026 at 07:00:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2310 103 464 2 131 853 0 6 0 4 0 96 1 0 0 0 332 2 605 0 135 1079 0 1 0 3 0 97 2 0 0 18 474 126 543 1 126 885 0 411 0 3 0 97 3 2 0 7 643 413 1298 2 133 861 0 565 0 3 0 97 4 0 0 0 251 12 497 1 133 986 0 311 0 3 0 97 5 0 0 0 267 27 523 3 124 992 0 983 0 3 0 97 6 0 0 0 224 1 486 1 149 997 0 294 0 3 0 97 7 0 0 2 410 101 439 0 125 846 0 0 0 2 0 98 March 2, 2026 at 07:00:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 100 67 0 6 2 0 0 0 1 0 99 1 0 0 0 75 0 71 0 3 9 0 0 0 0 0 100 2 0 0 17 230 109 60 1 1 5 0 1390 0 0 0 99 3 0 0 7 30 13 24 0 2 6 0 560 0 0 0 100 4 0 0 0 61 25 60 0 4 7 0 299 0 0 0 100 5 0 0 0 68 29 66 0 2 4 0 0 0 0 0 100 6 0 0 0 22 2 18 1 2 5 0 295 0 0 0 100 7 0 0 3 214 102 6 0 0 0 0 2 0 0 0 100 March 2, 2026 at 07:00:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 103 139 1 4 0 0 55 0 1 0 99 1 0 0 0 32 4 40 1 6 4 0 863 0 0 0 100 2 0 0 17 232 106 65 2 3 14 0 2304 0 1 0 99 3 0 0 7 39 7 53 0 5 1 0 627 0 0 0 100 4 0 0 0 15 4 10 1 1 1 0 314 0 0 0 100 5 0 0 0 118 57 108 0 0 0 0 41 0 0 0 100 6 0 0 0 11 1 8 0 0 0 0 328 0 0 0 100 7 0 0 3 234 107 40 1 2 1 0 46 0 0 0 100 March 2, 2026 at 07:00:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 8 0 4 0 2 3 0 0 0 0 0 100 2 0 0 17 212 103 40 1 1 1 0 1384 0 0 0 100 3 0 0 7 19 6 14 0 0 1 0 559 0 0 0 100 4 0 0 0 18 5 16 0 0 4 0 321 0 0 0 100 5 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 7 0 0 3 225 109 18 0 0 0 0 12 0 0 0 100 March 2, 2026 at 07:00:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 13 4 8 0 0 0 0 4 0 0 0 100 2 0 0 17 211 103 36 1 0 3 0 1385 0 0 0 99 3 0 0 7 18 5 14 0 1 0 0 561 0 0 0 100 4 0 0 0 20 5 20 0 1 0 0 302 0 0 0 100 5 0 0 0 111 51 106 0 1 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 7 0 0 3 223 108 16 0 0 0 0 7 0 0 0 100 March 2, 2026 at 07:00:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 17 210 103 36 0 0 0 0 1384 0 0 0 100 3 0 0 7 16 5 12 0 0 0 0 560 0 0 0 100 4 0 0 0 15 4 10 0 0 0 0 300 0 0 0 100 5 0 0 0 112 51 112 0 1 1 0 0 0 0 0 100 6 0 0 0 8 1 2 1 0 0 0 294 0 0 0 100 7 0 0 3 223 108 16 0 0 0 0 8 0 0 0 100 March 2, 2026 at 07:00:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 1 0 1 0 99 1 0 0 0 18 5 14 0 0 0 0 30 0 0 0 100 2 0 0 17 211 103 36 1 0 0 0 1384 0 0 0 100 3 0 0 7 17 5 12 1 0 0 0 559 0 0 0 100 4 0 0 0 17 4 16 1 1 0 0 309 0 0 0 100 5 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 6 0 0 0 15 2 14 0 1 0 0 301 0 0 0 100 7 0 0 3 226 108 22 0 0 0 0 36 0 0 0 100 March 2, 2026 at 07:00:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 112 0 2 0 0 7 0 1 0 99 1 0 0 0 13 1 12 0 0 0 0 14 0 0 0 100 2 0 0 17 222 103 45 1 1 0 0 1391 0 0 0 99 3 0 0 7 19 6 16 0 1 0 0 562 0 0 0 100 4 0 0 0 13 4 8 0 0 0 0 300 0 0 0 100 5 0 0 0 117 57 106 1 0 0 0 1 0 0 0 100 6 0 0 0 16 2 16 0 1 0 0 298 0 0 0 100 7 1 0 3 231 109 28 0 0 0 0 24 0 0 0 100 March 2, 2026 at 07:00:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 14 4 10 0 0 1 0 7 0 0 0 100 2 0 0 18 212 103 38 1 0 1 0 1379 0 0 0 100 3 0 0 7 19 6 16 0 0 1 0 560 0 0 0 100 4 0 0 0 18 5 17 0 1 3 0 305 0 0 0 100 5 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 6 21 0 0 11 2 6 0 0 0 0 299 0 0 0 100 7 0 0 2 228 108 26 0 1 0 0 7 0 0 0 100 March 2, 2026 at 07:00:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 110 0 1 0 0 0 0 1 0 99 1 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 2 0 0 17 211 103 36 1 1 1 0 1379 0 0 0 99 3 0 0 7 17 6 10 0 0 1 0 560 0 0 0 100 4 0 0 0 15 5 8 0 0 1 0 300 0 0 0 100 5 0 0 0 109 52 102 0 0 1 0 0 0 0 0 100 6 0 0 0 10 2 2 1 0 1 0 294 0 0 0 100 7 0 0 3 223 108 16 0 0 1 0 11 0 0 0 100 March 2, 2026 at 07:00:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 118 0 1 3 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 5 0 0 0 100 2 0 0 17 211 103 36 1 0 1 0 1380 0 0 0 99 3 0 0 7 17 5 12 1 0 0 0 559 0 0 0 100 4 0 0 0 13 4 8 1 0 0 0 300 0 0 0 100 5 0 0 0 113 54 108 0 0 0 0 3 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 7 0 0 3 224 107 16 1 0 0 0 9 0 0 0 100 March 2, 2026 at 07:00:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 112 0 0 0 0 0 0 1 0 99 1 0 0 0 14 1 14 0 2 0 0 1 0 0 0 100 2 0 0 17 211 103 36 1 0 0 0 1378 0 0 0 99 3 0 0 7 16 5 12 0 0 0 0 561 0 0 0 100 4 0 0 0 13 4 8 0 0 0 0 300 0 0 0 100 5 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 295 0 0 0 100 7 0 0 3 223 108 16 0 0 0 0 8 0 0 0 100 March 2, 2026 at 07:00:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 118 0 0 0 0 8 0 1 0 99 1 0 0 0 19 4 20 0 0 0 0 20 0 0 0 100 2 0 0 18 215 103 42 2 0 0 0 1386 0 0 0 99 3 0 0 7 17 5 14 0 0 0 0 560 0 0 0 100 4 0 0 0 13 4 8 0 0 0 0 300 0 0 0 100 5 0 0 0 115 57 102 0 0 0 0 0 0 0 0 100 6 0 0 0 19 6 16 0 0 0 0 301 0 0 0 100 7 0 0 2 225 106 20 0 0 0 0 17 0 0 0 100 March 2, 2026 at 07:00:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 11 1 8 0 0 0 0 19 0 0 0 100 2 0 0 17 216 103 46 1 1 1 0 1380 0 0 0 99 3 0 0 7 19 6 16 0 1 0 0 560 0 0 0 100 4 0 0 0 19 5 18 0 0 0 0 309 0 0 0 100 5 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 6 0 0 0 22 8 16 1 0 0 0 304 0 0 0 100 7 0 0 3 213 103 6 0 0 0 0 3 0 0 0 100 March 2, 2026 at 07:00:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 128 162 0 2 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 2 0 0 17 213 103 38 1 0 0 0 1379 0 0 0 99 3 0 0 7 21 5 20 0 1 0 0 560 0 0 0 100 4 0 0 0 16 5 10 1 0 0 0 301 0 0 0 100 5 0 0 0 60 23 56 0 2 0 0 0 0 0 0 100 6 0 0 0 19 7 14 0 0 0 0 303 0 0 0 100 7 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:00:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 116 130 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 3 0 0 0 100 2 0 0 17 211 103 36 1 0 0 0 1379 0 0 0 100 3 0 0 7 19 6 14 1 0 0 0 564 0 0 0 100 4 0 0 0 18 4 13 0 3 0 0 311 0 0 0 100 5 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 89 41 85 0 2 0 0 300 0 0 0 100 7 0 0 3 212 102 6 0 0 0 0 3 0 0 0 100 March 2, 2026 at 07:00:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 0 5695 106 7507 74 283 110 0 22259 19 12 0 68 1 49 0 0 3716 14 7652 71 314 111 0 20865 15 10 0 76 2 23 0 4 3259 108 6344 44 207 81 0 16246 15 9 0 76 3 103 0 21 2892 21 5901 57 242 94 0 17280 16 8 0 76 4 40 0 0 2468 13 4977 40 207 61 0 12422 10 7 0 83 5 245 0 0 2217 10 4780 32 124 72 0 13701 11 6 0 83 6 150 0 0 2539 21 5353 25 189 75 1 11982 10 7 0 83 7 16 0 2 2826 105 5559 19 111 71 0 11812 10 7 0 83 March 2, 2026 at 07:00:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 6901 107 10307 75 394 134 0 27534 25 17 0 58 1 16 0 0 5297 10 11130 69 433 125 0 28496 23 15 0 61 2 19 0 3 4485 113 8734 35 281 112 0 20645 18 12 0 70 3 2 0 7 4460 20 9148 45 346 76 0 20053 15 11 0 74 4 3 0 14 2540 18 5116 35 258 108 0 14766 12 8 0 80 5 7 0 0 1751 19 3490 29 158 90 0 9636 9 5 0 86 6 5 0 0 2886 19 5946 41 250 85 0 14461 12 8 0 80 7 17 0 3 2293 121 4297 16 133 44 0 9814 9 5 0 86 March 2, 2026 at 07:00:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 6350 105 9122 69 418 285 0 27859 25 17 0 58 1 50 0 0 5241 12 11036 99 502 314 0 23309 19 14 0 67 2 8 0 10 4057 109 8247 138 365 343 0 21509 18 12 0 70 3 10 0 0 4676 142 9493 75 378 326 0 22242 18 14 0 69 4 6 0 0 2826 16 5789 46 333 328 0 14694 13 10 0 77 5 5 0 14 2157 10 4526 31 222 326 0 12018 10 8 0 82 6 7 0 0 3036 10 6381 34 286 375 1 13291 11 9 0 80 7 6 0 3 2365 113 4564 28 176 247 0 9925 9 7 0 84 March 2, 2026 at 07:00:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2761 102 1588 15 163 459 0 2745 3 4 0 93 1 3 0 0 774 9 1591 15 166 520 0 3652 3 4 0 93 2 1 0 14 758 106 1197 16 134 521 0 2713 2 3 0 95 3 0 0 0 960 351 1324 11 150 506 0 3189 2 4 0 94 4 0 0 0 677 18 1420 6 118 526 0 1937 2 3 0 95 5 0 0 14 498 6 1115 15 124 494 0 3405 2 3 0 95 6 0 0 0 627 2 1300 6 125 485 0 1179 1 3 0 96 7 2 0 7 696 132 1011 6 114 589 0 1627 1 3 0 96 March 2, 2026 at 07:00:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 100 267 0 46 229 0 0 0 1 0 99 1 0 0 0 129 8 246 0 50 274 0 300 0 1 0 99 2 0 0 10 296 104 207 0 49 317 0 560 0 1 0 99 3 0 0 0 298 203 201 0 45 311 0 300 0 1 0 99 4 0 0 0 303 2 609 0 49 284 0 0 0 1 0 99 5 0 0 14 103 6 241 1 52 371 0 1391 0 1 0 98 6 0 0 0 98 3 208 0 51 319 0 3 0 1 0 99 7 0 0 3 398 152 308 0 48 291 0 0 0 1 0 99 March 2, 2026 at 07:00:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 33 12 28 0 0 0 0 306 0 0 0 100 2 0 0 10 211 104 6 0 0 0 0 560 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 4 0 0 0 11 2 6 0 1 0 0 3 0 0 0 100 5 0 0 14 10 3 36 1 0 0 0 1389 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 7 0 0 3 311 153 104 0 0 0 0 2 0 0 0 100 March 2, 2026 at 07:00:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2110 101 126 0 1 0 0 8 0 1 0 99 1 0 0 0 25 6 28 0 2 0 0 325 0 0 0 100 2 0 0 10 219 104 20 1 1 0 0 567 0 0 0 100 3 0 0 0 16 3 10 0 1 0 0 301 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 14 18 10 36 1 0 1 0 1388 0 0 0 100 6 0 0 0 29 10 26 1 2 0 0 23 0 0 0 100 7 0 0 3 320 154 116 0 1 0 0 10 0 0 0 100 March 2, 2026 at 07:00:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 103 252 0 42 208 0 0 0 1 0 99 1 0 0 0 64 2 133 1 35 202 0 294 0 1 0 99 2 0 0 10 312 104 226 0 30 241 0 260 0 1 0 99 3 0 0 0 193 123 148 1 39 253 0 600 0 1 0 99 4 0 0 0 64 4 127 0 35 216 0 21 0 1 0 99 5 0 0 14 138 3 306 2 31 211 0 1387 0 1 0 99 6 0 0 0 73 7 133 0 32 218 0 9 0 1 0 99 7 0 0 3 358 151 214 0 26 187 0 3 0 1 0 99 March 2, 2026 at 07:00:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 122 200 0 8 36 0 0 0 1 0 99 1 0 0 0 96 30 122 1 12 41 0 294 0 0 0 100 2 0 0 10 300 103 176 0 7 47 0 260 0 0 0 100 3 0 0 0 116 60 102 0 10 64 0 600 0 0 0 100 4 0 0 0 52 3 98 0 13 64 0 1 0 0 0 100 5 0 0 14 49 3 111 1 12 28 0 1407 0 0 0 99 6 0 0 0 53 11 73 0 13 42 0 14 0 0 0 100 7 0 0 3 254 102 87 0 12 54 0 1 0 0 0 100 March 2, 2026 at 07:00:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 110 52 106 0 0 0 0 295 0 0 0 100 2 0 0 10 211 104 6 0 0 0 0 260 0 0 0 100 3 0 0 0 13 2 6 0 1 0 0 600 0 0 0 100 4 0 0 0 15 2 14 0 1 0 0 0 0 0 0 100 5 0 0 14 10 3 36 1 0 1 0 1388 0 0 0 100 6 0 0 0 24 9 18 1 0 0 0 9 0 0 0 100 7 0 0 3 220 103 14 0 1 0 0 2 0 0 0 100 March 2, 2026 at 07:00:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 0 2244 121 262 157 14 5 1 413 82 1 0 17 1 0 0 0 209 16 223 124 19 8 0 587 83 0 0 17 2 152 0 150 382 106 330 154 24 4 0 909 82 1 0 17 3 0 0 0 155 3 170 116 16 7 0 889 83 0 0 17 4 1168 0 0 101 2 49 67 11 2 1 371 83 1 0 16 5 28 0 14 198 16 263 147 17 5 0 1898 82 1 0 17 6 258 0 7 186 12 238 145 14 8 0 602 83 1 0 16 7 2 0 3 332 105 114 95 7 7 0 368 83 0 0 16 March 2, 2026 at 07:00:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 101 107 105 7 0 0 170 99 1 0 0 1 0 0 0 161 12 179 135 7 6 0 582 100 0 0 0 2 2 0 108 360 107 137 118 14 8 0 536 100 0 0 0 3 0 0 0 168 18 125 110 10 1 0 758 100 0 0 0 4 0 0 0 110 2 70 85 12 1 0 118 100 0 0 0 5 0 0 14 211 42 244 137 17 1 0 1663 99 1 0 0 6 0 0 0 97 3 52 74 7 1 0 121 100 0 0 0 7 0 0 3 340 105 80 94 8 3 0 148 100 0 0 0 March 2, 2026 at 07:00:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2186 102 121 110 8 1 0 177 99 1 0 0 1 0 0 0 165 15 177 140 13 11 0 551 100 0 0 0 2 0 0 136 375 121 178 139 14 2 0 536 99 1 0 0 3 0 0 0 149 3 125 112 11 8 0 811 100 0 0 0 4 0 0 0 145 2 82 93 8 3 0 136 100 0 0 0 5 0 0 14 209 26 210 138 10 6 0 1551 99 1 0 0 6 0 0 0 131 4 129 107 12 7 0 240 100 0 0 0 7 0 0 3 338 103 125 112 14 1 0 259 100 0 0 0 March 2, 2026 at 07:00:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 101 70 87 6 2 0 156 99 1 0 0 1 0 0 0 151 3 136 116 6 8 0 487 100 0 0 0 2 1 0 126 353 110 172 143 8 6 0 605 99 1 0 0 3 0 0 0 200 22 166 132 10 8 0 569 100 0 0 0 4 0 0 0 135 4 130 105 18 3 0 279 100 0 0 0 5 0 0 14 161 5 145 108 15 3 0 1550 99 1 0 0 6 0 0 0 177 15 185 142 14 3 0 563 100 0 0 0 7 0 0 7 412 121 209 150 14 7 0 218 100 0 0 0 March 2, 2026 at 07:00:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2208 123 211 158 13 6 0 271 99 1 0 0 1 0 0 0 170 10 174 139 10 9 0 205 99 1 0 0 2 0 0 150 333 106 148 126 10 8 0 547 100 0 0 0 3 1 0 0 163 3 119 116 11 1 0 572 100 0 0 0 4 0 0 0 132 3 121 100 12 2 0 246 100 0 0 0 5 0 0 14 246 28 308 178 22 5 0 1693 99 1 0 0 6 0 0 0 171 6 170 132 13 10 0 796 100 0 0 0 7 0 0 3 341 103 101 102 12 4 0 270 100 0 0 0 March 2, 2026 at 07:00:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2190 118 171 127 11 4 0 258 99 1 0 0 1 0 0 0 172 10 169 132 9 2 0 207 99 1 0 0 2 0 0 136 312 104 134 113 7 7 0 506 100 0 0 0 3 0 0 0 108 1 62 81 9 1 0 525 100 0 0 0 4 0 0 0 105 2 40 70 9 2 0 99 100 0 0 0 5 0 0 21 181 19 170 120 6 3 0 1505 99 1 0 0 6 0 0 0 222 16 243 172 9 10 0 932 100 0 0 0 7 0 0 3 389 110 222 152 12 3 0 307 100 0 0 0 March 2, 2026 at 07:00:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2184 103 160 116 15 6 0 313 99 1 0 0 1 0 0 0 225 27 279 180 15 12 0 249 99 1 0 0 2 1 0 136 401 133 244 163 14 15 0 619 99 1 0 0 3 0 0 0 135 3 120 108 11 1 0 571 100 0 0 0 4 0 0 0 127 2 103 104 5 4 0 172 100 0 0 0 5 0 0 14 157 11 124 103 3 4 0 1533 99 1 0 0 6 0 0 0 147 8 95 97 6 15 0 802 100 0 0 0 7 0 0 3 353 105 102 102 8 3 0 104 100 0 0 0 March 2, 2026 at 07:00:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 101 98 96 9 2 0 230 99 1 0 0 1 0 0 0 146 3 131 117 6 4 0 144 99 1 0 0 2 0 0 122 356 116 173 136 8 11 0 556 99 1 0 0 3 0 0 0 172 14 184 138 14 4 0 606 100 0 0 0 4 5 0 0 144 8 145 116 11 3 0 210 100 0 0 0 5 0 0 14 212 29 248 149 11 9 0 1644 99 1 0 0 6 0 0 0 208 9 197 140 8 1 0 844 100 0 0 0 7 3 0 3 300 102 40 76 4 3 0 160 100 0 0 0 March 2, 2026 at 07:00:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2169 100 152 123 14 1 0 201 99 1 0 0 1 0 0 0 158 4 155 125 12 5 0 198 99 1 0 0 2 0 0 136 321 105 96 102 13 3 0 466 100 0 0 0 3 0 0 0 153 3 128 118 7 1 0 588 100 0 0 0 4 0 0 0 172 26 142 124 12 4 0 220 100 0 0 0 5 0 0 14 185 26 182 126 7 3 0 1486 99 1 0 0 6 0 0 0 125 6 106 87 15 2 0 801 100 0 0 0 7 0 0 3 350 105 161 123 16 6 0 261 100 0 0 0 March 2, 2026 at 07:00:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2169 101 109 92 15 1 0 180 99 1 0 0 1 0 0 0 148 1 118 111 9 2 0 145 99 1 0 0 2 0 0 164 341 105 144 121 8 0 0 501 99 1 0 0 3 0 0 0 161 2 171 129 9 13 0 667 100 0 0 0 4 0 0 0 194 24 177 136 13 2 0 273 100 0 0 0 5 0 0 14 161 18 130 99 8 3 0 1525 99 1 0 0 6 0 0 0 160 6 174 136 10 2 0 919 100 0 0 0 7 0 0 3 361 116 137 109 16 10 0 225 100 0 0 0 March 2, 2026 at 07:00:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 104 140 114 5 2 0 297 99 1 0 0 1 0 0 0 160 3 183 133 12 6 0 260 99 1 0 0 2 0 0 157 310 105 82 91 9 0 0 392 100 0 0 0 3 0 0 0 178 6 175 136 11 1 0 664 100 0 0 0 4 0 0 0 151 2 147 115 10 2 0 284 100 0 0 0 5 0 0 14 160 5 197 127 14 3 0 1657 99 1 0 0 6 0 0 0 164 5 155 131 13 3 0 882 100 0 0 0 7 0 0 3 454 151 223 149 7 6 0 164 100 0 0 0 March 2, 2026 at 07:00:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2227 124 225 161 15 5 0 282 99 1 0 0 1 0 0 0 189 29 168 128 10 1 0 172 100 0 0 0 2 0 0 136 303 103 70 86 6 2 0 375 100 0 0 0 3 0 0 0 162 3 122 111 8 1 0 468 100 0 0 0 4 0 0 0 151 7 163 132 8 7 0 348 100 0 0 0 5 0 0 14 182 12 223 143 11 0 0 1702 99 1 0 0 6 0 0 0 158 8 184 129 20 3 0 963 100 0 0 0 7 0 0 3 363 105 148 122 19 5 0 271 100 0 0 0 March 2, 2026 at 07:00:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 102 162 130 7 4 0 316 99 1 0 0 1 0 0 0 140 1 102 100 7 3 0 117 100 0 0 0 2 0 0 122 322 105 129 109 13 3 0 601 100 0 0 0 3 0 0 0 181 19 159 121 15 2 0 497 100 0 0 0 4 0 0 0 173 4 189 140 11 3 0 263 100 0 0 0 5 0 0 14 140 8 138 105 8 7 0 1593 99 1 0 0 6 0 0 0 174 11 175 134 9 6 0 776 100 0 0 0 7 0 0 3 388 124 140 124 7 1 0 235 100 0 0 0 March 2, 2026 at 07:00:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 105 89 96 7 4 0 181 99 1 0 0 1 0 0 0 168 17 174 133 13 8 0 244 100 0 0 0 2 0 0 108 296 105 56 75 13 1 0 411 100 0 0 0 3 0 0 0 139 3 103 90 10 3 0 482 100 0 0 0 4 0 0 0 189 31 191 138 12 6 0 284 100 0 0 0 5 0 0 14 138 7 134 97 10 2 0 1575 99 1 0 0 6 0 0 0 150 5 120 107 8 5 0 782 100 0 0 0 7 0 0 3 384 110 189 143 9 8 0 268 100 0 0 0 March 2, 2026 at 07:00:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 103 106 100 13 4 0 251 99 1 0 0 1 0 0 0 141 2 126 112 8 7 0 189 100 0 0 0 2 0 0 136 283 104 73 79 13 3 0 461 100 0 0 0 3 0 0 0 135 3 97 98 9 4 0 465 100 0 0 0 4 0 0 0 210 18 214 153 13 3 0 300 100 0 0 0 5 0 0 14 226 40 263 164 13 6 0 1593 99 1 0 0 6 0 0 0 189 9 188 141 8 3 0 852 100 0 0 0 7 0 0 3 366 105 161 128 8 4 0 279 100 0 0 0 March 2, 2026 at 07:01:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 102 98 100 11 2 0 210 99 1 0 0 1 0 0 0 214 29 214 149 15 2 0 135 100 0 0 0 2 0 0 136 304 104 102 96 9 3 0 467 100 0 0 0 3 0 0 0 143 3 105 105 6 1 0 461 100 0 0 0 4 0 0 0 189 4 198 135 17 3 0 371 100 0 0 0 5 0 0 14 215 27 251 152 20 3 0 1672 99 1 0 0 6 0 0 0 168 13 140 115 12 7 0 882 100 0 0 0 7 0 0 3 328 106 81 94 10 4 0 198 100 0 0 0 March 2, 2026 at 07:01:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 102 93 95 12 6 0 180 99 1 0 0 1 0 0 0 231 14 265 179 8 14 0 222 100 0 0 0 2 0 0 150 326 105 151 126 9 4 0 534 99 1 0 0 3 0 0 0 179 16 149 128 11 8 0 591 100 0 0 0 4 0 0 0 171 4 166 128 7 3 0 238 100 0 0 0 5 0 0 14 204 21 201 133 14 8 0 1592 99 1 0 0 6 3 0 0 184 22 177 132 18 2 0 939 100 0 0 0 7 3 0 3 334 113 102 99 15 7 0 207 100 0 0 0 March 2, 2026 at 07:01:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 102 65 78 17 1 0 199 99 1 0 0 1 0 0 0 155 3 163 126 9 5 0 207 100 0 0 0 2 0 0 94 326 105 123 101 9 11 0 457 100 0 0 0 3 0 0 7 182 28 153 125 5 3 0 485 100 0 0 0 4 0 0 0 154 8 133 116 7 4 0 224 100 0 0 0 5 0 0 14 138 5 129 99 7 1 0 1523 99 1 0 0 6 0 0 0 123 4 82 81 12 2 0 793 100 0 0 0 7 0 0 3 391 125 207 150 14 4 0 266 100 0 0 0 March 2, 2026 at 07:01:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 103 58 58 4 0 0 69 77 1 0 23 1 0 0 0 87 12 49 44 7 1 0 49 73 0 0 26 2 0 0 25 260 104 33 41 4 0 0 439 66 0 0 34 3 0 0 0 113 26 71 63 6 0 0 394 70 0 0 30 4 0 0 0 90 5 74 65 8 0 0 127 70 0 0 30 5 0 0 14 144 16 163 62 10 0 0 1475 65 0 0 34 6 0 0 0 69 4 27 46 4 0 0 612 74 0 0 26 7 0 0 2 271 104 40 40 4 1 0 121 68 0 0 32 March 2, 2026 at 07:01:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 8 0 2 0 0 4 0 1 0 99 1 0 0 0 12 2 6 0 0 0 0 1 0 0 0 100 2 0 0 24 223 108 22 0 0 0 0 272 0 0 0 100 3 0 0 0 16 2 8 0 2 2 0 309 0 0 0 100 4 0 0 0 15 3 4 0 0 0 0 4 0 0 0 100 5 9 0 14 163 26 187 1 2 1 0 1435 0 1 0 99 6 0 0 0 73 28 71 0 4 0 0 311 0 0 0 100 7 0 0 3 225 107 16 1 3 1 0 303 0 0 0 100 March 2, 2026 at 07:01:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3327 0 112 2156 128 151 4 13 7 14 6849 3 3 0 95 1 122 0 0 56 2 84 0 16 13 12 105 0 0 0 100 2 17 0 13 260 108 55 0 7 5 7 342 0 0 0 100 3 12 0 0 54 6 42 1 9 2 1 400 0 0 0 100 4 23 0 0 38 1 37 0 6 4 8 116 0 0 0 100 5 13 0 14 111 4 133 1 8 10 4 1588 0 0 0 99 6 40 0 0 53 2 56 1 7 6 6 420 0 0 0 100 7 6 0 2 286 126 79 0 7 4 2 390 0 0 0 100 March 2, 2026 at 07:01:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 123 148 0 1 0 0 2 0 1 0 99 1 0 0 0 73 30 72 1 2 1 0 16 0 0 0 100 2 0 0 11 216 103 18 0 1 0 0 265 0 0 0 100 3 0 0 0 33 9 33 1 0 0 0 316 0 0 0 100 4 0 0 0 10 2 4 1 1 0 0 4 0 0 0 100 5 0 0 14 24 9 46 1 1 0 0 1484 0 0 0 100 6 0 0 0 18 3 12 0 1 0 0 310 0 0 0 100 7 0 0 2 222 103 17 0 3 0 0 302 0 0 0 100 March 2, 2026 at 07:01:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2420 101 592 15 56 31 0 1913 8 2 0 91 1 0 0 0 533 41 863 26 85 19 0 1677 3 1 0 96 2 0 0 318 540 108 651 9 64 25 0 1884 3 1 0 96 3 0 0 0 367 12 554 19 57 24 0 1872 4 1 0 95 4 0 0 0 347 2 562 9 45 33 0 1390 3 1 0 96 5 0 0 14 306 4 499 16 37 16 0 2176 3 1 0 96 6 0 0 0 254 3 420 14 39 22 0 2524 7 1 0 92 7 0 0 3 359 104 193 7 13 38 0 2094 12 1 0 87 March 2, 2026 at 07:01:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 35 2360 108 446 14 67 33 0 1782 3 2 0 95 1 2 0 0 306 6 439 13 52 24 0 1255 3 1 0 96 2 1 0 238 332 108 224 5 28 18 0 1601 8 1 0 91 3 0 0 0 220 6 329 18 46 31 0 917 3 1 0 96 4 20 0 0 214 6 308 7 40 37 0 1711 7 1 0 92 5 2 0 14 258 6 426 6 31 23 0 1395 2 1 0 97 6 2 0 0 243 8 360 3 31 23 0 2658 2 1 0 96 7 1 0 14 505 146 433 6 30 33 0 984 2 2 0 96 March 2, 2026 at 07:01:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2135 127 143 0 4 0 0 294 0 1 0 99 1 0 0 7 38 4 34 0 5 0 0 0 0 0 0 100 2 0 0 10 222 109 16 0 0 0 0 269 0 0 0 100 3 0 0 0 12 0 6 0 1 0 0 0 0 0 0 100 4 0 0 0 17 2 12 0 1 0 0 300 0 0 0 100 5 0 0 14 18 6 12 0 0 0 0 269 0 0 0 100 6 0 0 0 18 4 40 2 1 0 0 1424 0 0 0 100 7 0 0 3 257 123 46 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:01:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2116 106 59 0 2 0 0 301 0 1 0 99 1 0 0 0 125 19 100 0 4 1 0 2 0 0 0 100 2 0 0 10 306 142 88 0 3 0 0 268 0 0 0 100 3 0 0 0 32 0 8 0 2 0 0 0 0 0 0 100 4 0 0 0 28 4 6 0 0 0 0 304 0 0 0 100 5 0 0 14 25 3 6 0 0 0 0 266 0 0 0 100 6 0 0 0 34 4 44 1 0 1 0 1423 0 0 0 99 7 0 0 3 223 101 2 0 1 0 0 0 0 0 0 100 March 2, 2026 at 07:01:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 102 52 0 2 0 0 295 0 1 0 99 1 0 0 0 74 2 70 0 2 0 0 11 0 0 0 100 2 0 0 10 267 130 62 0 0 0 0 270 0 0 0 100 3 0 0 0 66 25 59 0 1 0 0 0 0 0 0 100 4 0 0 0 20 5 12 1 2 0 0 300 0 0 0 100 5 0 0 14 20 9 18 0 2 0 0 266 0 0 0 100 6 0 0 0 18 3 40 1 0 1 0 1421 0 0 0 100 7 0 0 3 215 102 10 0 0 0 0 6 0 0 0 100 March 2, 2026 at 07:01:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 104 194 2 32 257 0 1059 0 3 0 97 1 0 0 0 228 22 404 2 37 292 0 993 0 2 0 98 2 0 0 10 264 109 106 1 29 231 0 304 0 2 0 98 3 0 0 0 182 121 123 1 31 332 0 86 0 2 0 98 4 0 0 0 117 36 175 2 31 259 0 340 0 2 0 97 5 0 0 14 52 4 113 2 33 320 0 283 0 2 0 98 6 0 0 0 61 5 106 2 31 271 0 651 0 2 0 98 7 0 0 3 246 102 103 0 28 294 0 322 0 1 0 99 March 2, 2026 at 07:01:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2238 100 426 2 108 603 0 4 0 3 0 97 1 0 0 0 276 2 579 1 107 601 0 282 0 2 0 98 2 0 0 11 594 104 824 1 95 554 0 260 0 2 0 98 3 0 0 0 503 364 356 1 112 697 1 0 0 3 0 97 4 0 0 0 204 26 406 1 105 666 0 301 0 2 0 98 5 0 0 14 196 28 418 2 108 665 0 274 0 2 0 98 6 0 0 0 170 10 417 1 108 695 1 563 0 2 0 98 7 0 0 2 346 102 340 3 100 619 0 296 0 2 0 98 March 2, 2026 at 07:01:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2300 105 490 1 143 912 0 307 0 3 0 97 1 0 0 0 280 1 571 1 143 1107 0 0 0 3 0 97 2 0 0 11 421 107 499 2 131 1054 0 260 0 3 0 97 3 0 0 0 594 393 470 1 148 1062 1 0 0 3 0 97 4 0 0 0 580 2 1248 2 157 1040 0 300 0 3 0 97 5 0 0 14 213 8 498 1 151 1028 0 274 0 3 0 97 6 0 0 0 209 4 507 1 132 1056 0 1416 0 3 0 97 7 0 0 2 491 147 572 0 138 990 0 0 0 3 0 97 March 2, 2026 at 07:01:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 101 88 0 12 28 0 300 0 1 0 99 1 0 0 0 159 30 185 0 7 34 0 1 0 0 0 100 2 0 0 11 278 126 97 0 4 27 0 261 0 0 0 100 3 0 0 0 58 32 104 0 9 24 0 0 0 0 0 100 4 0 0 0 28 2 41 1 8 35 0 300 0 0 0 100 5 0 0 14 39 9 50 0 5 9 0 272 0 0 0 100 6 0 0 0 41 3 93 0 8 38 0 1414 0 0 0 99 7 0 0 2 226 101 25 0 6 13 0 0 0 0 0 100 March 2, 2026 at 07:01:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 104 121 1 1 0 0 307 0 1 0 99 1 0 0 0 114 52 110 0 0 0 0 6 0 0 0 100 2 0 0 10 213 104 10 0 0 0 0 268 0 0 0 100 3 0 0 0 10 0 6 0 0 0 0 24 0 0 0 100 4 0 0 0 14 3 12 0 0 0 0 312 0 0 0 100 5 0 0 14 34 17 26 0 0 0 0 292 0 0 0 100 6 0 0 0 23 4 48 2 0 1 0 1425 0 0 0 99 7 0 0 3 215 101 13 0 2 0 0 10 0 0 0 100 March 2, 2026 at 07:01:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 120 1 1 0 0 308 0 1 0 99 1 0 0 0 112 52 110 0 1 2 0 3 0 0 0 100 2 0 0 10 215 104 14 0 2 2 0 263 0 0 0 100 3 0 0 0 10 0 6 0 0 1 0 0 0 0 0 100 4 0 0 0 9 2 4 0 1 3 0 300 0 0 0 100 5 0 0 14 17 6 12 1 0 1 0 282 0 0 0 100 6 0 0 0 35 8 66 1 0 0 0 1428 0 0 0 99 7 0 0 3 211 102 4 0 0 0 0 1 0 0 0 100 March 2, 2026 at 07:01:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 116 0 0 1 0 304 0 1 0 99 1 0 0 0 111 52 104 0 0 1 0 0 0 0 0 100 2 0 0 14 212 104 6 0 0 1 0 260 0 0 0 100 3 21 0 0 11 2 2 0 0 1 0 5 0 0 0 100 4 0 0 0 12 3 4 0 1 1 0 305 0 0 0 100 5 0 0 14 12 4 6 0 0 1 0 266 0 0 0 100 6 0 0 0 33 10 52 2 1 2 0 1424 0 0 0 99 7 0 0 7 217 102 16 0 2 0 0 5 0 0 0 100 March 2, 2026 at 07:01:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 114 0 0 0 0 303 0 1 0 99 1 0 0 0 109 51 106 0 0 0 0 1 0 0 0 100 2 0 0 10 211 104 6 0 0 0 0 260 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 300 0 0 0 100 5 0 0 14 15 6 14 0 1 0 0 269 0 0 0 100 6 0 0 0 24 8 48 1 0 1 0 1415 0 0 0 99 7 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:01:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 118 0 1 1 0 307 0 0 0 100 1 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 2 0 0 10 211 104 6 0 0 0 0 260 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 6 0 0 0 29 10 52 2 0 0 0 1417 0 0 0 99 7 0 0 3 217 101 14 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:01:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 103 124 3 4 0 0 312 0 1 0 99 1 0 0 0 118 51 120 0 1 0 0 5 0 0 0 100 2 0 0 10 213 104 10 0 0 0 0 267 0 0 0 100 3 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 323 0 0 0 100 5 0 0 14 15 9 6 0 0 1 0 266 0 0 0 100 6 0 0 0 30 10 54 1 0 0 0 1414 0 0 0 100 7 0 0 3 225 104 18 0 3 0 0 5 0 0 0 100 March 2, 2026 at 07:01:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 120 0 0 0 0 319 0 1 0 99 1 0 0 0 113 52 110 0 0 0 0 4 0 0 0 100 2 0 0 10 215 104 16 0 1 2 0 263 0 0 0 100 3 0 0 0 10 0 4 0 1 2 0 0 0 0 0 100 4 0 0 0 11 3 6 0 0 1 0 321 0 0 0 100 5 0 0 14 12 3 12 0 0 0 0 273 0 0 0 100 6 0 0 0 32 10 58 2 0 1 0 1427 0 0 0 99 7 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 March 2, 2026 at 07:01:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 0 0 0 0 300 0 1 0 99 1 0 0 0 110 51 106 0 0 0 0 0 0 0 0 100 2 0 0 10 218 104 18 0 1 0 0 260 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 301 0 0 0 100 5 0 0 14 10 3 6 0 0 0 0 266 0 0 0 100 6 0 0 0 26 9 52 1 1 0 0 1415 0 0 0 99 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:01:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 116 0 0 0 0 304 0 1 0 99 1 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 2 0 0 10 213 104 8 0 1 0 0 260 0 0 0 100 3 0 0 0 12 0 12 0 1 1 0 0 0 0 0 100 4 0 0 0 9 2 2 1 0 0 0 300 0 0 0 100 5 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 6 0 0 0 27 9 50 2 0 0 0 1417 0 0 0 99 7 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:01:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 114 1 0 0 0 302 0 1 0 99 1 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 2 0 0 10 213 105 8 0 0 0 0 261 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 6 0 0 0 26 9 50 1 0 0 0 1412 0 0 0 99 7 0 0 3 207 101 2 0 1 0 0 0 0 0 0 100 March 2, 2026 at 07:01:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 243 0 0 5732 110 7564 79 293 86 0 20303 18 12 0 70 1 30 0 0 3624 16 7453 97 347 79 0 17964 15 10 0 75 2 135 0 3 3243 107 6135 53 196 162 0 15051 13 8 0 78 3 24 0 0 3724 12 7805 71 250 133 0 18252 18 10 0 72 4 51 0 7 2310 17 4785 34 197 72 0 12897 9 6 0 85 5 79 0 14 1986 21 4290 18 122 50 0 12300 10 6 0 84 6 5 0 0 2758 11 6177 37 189 136 0 20199 13 8 0 78 7 13 0 3 1912 107 3611 15 105 69 0 9644 9 5 0 86 March 2, 2026 at 07:01:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 6646 106 9561 89 432 330 0 25067 24 16 0 60 1 11 0 0 5475 16 11511 139 495 360 1 23652 21 14 0 65 2 10 0 4 3934 118 8010 66 330 299 0 21887 19 13 0 69 3 12 0 0 4128 126 8320 121 396 290 0 18818 15 11 0 74 4 2 0 7 2918 25 6100 45 322 337 0 15332 14 10 0 76 5 2 0 14 1995 9 4119 27 203 308 0 10482 9 6 0 85 6 7 0 0 2916 12 6091 47 280 264 0 16874 12 9 0 78 7 4 0 2 2778 118 5632 31 183 268 0 14088 12 9 0 80 March 2, 2026 at 07:01:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6979 105 10626 112 546 521 0 27792 25 17 0 58 1 8 0 0 5132 9 10610 124 594 516 0 24425 20 14 0 65 2 2 0 3 4150 112 8055 75 400 594 0 17997 16 11 0 73 3 3 0 0 4670 326 8974 92 472 560 0 18928 15 12 0 74 4 1 0 7 2530 10 5259 43 403 609 0 12126 11 8 0 81 5 38 0 0 2560 17 5418 43 292 511 0 13568 13 9 0 78 6 1 0 0 3144 18 6622 63 401 612 0 16833 13 10 0 77 7 5 0 17 2659 117 5295 45 288 518 0 12485 11 8 0 82 March 2, 2026 at 07:01:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2708 103 1368 1 45 21 0 3021 3 2 0 94 1 1 0 0 568 2 1186 6 41 12 0 2954 2 2 0 96 2 0 0 3 712 104 1063 1 29 6 0 1527 1 1 0 98 3 0 0 0 494 19 955 1 40 7 0 2370 2 1 0 97 4 0 0 7 513 29 1056 5 32 17 0 2511 2 2 0 97 5 0 0 0 310 4 607 2 24 5 0 1137 1 1 0 98 6 1 0 0 317 14 663 5 28 11 0 4156 2 1 0 96 7 2 0 17 642 106 959 3 18 29 0 3283 3 2 0 96 March 2, 2026 at 07:01:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 2 0 0 3 211 102 4 0 1 0 0 0 0 0 0 100 3 0 0 0 62 24 62 0 3 0 0 2 0 0 0 100 4 0 0 7 68 31 62 0 1 0 0 260 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 32 12 56 1 0 0 0 2023 0 0 0 99 7 0 0 17 213 104 8 0 0 0 0 271 0 0 0 100 March 2, 2026 at 07:01:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 124 1 0 0 0 14 0 1 0 99 1 0 0 0 13 1 12 0 1 0 0 5 0 0 0 100 2 0 0 3 210 102 6 0 0 0 0 7 0 0 0 100 3 0 0 0 20 5 14 0 1 0 0 3 0 0 0 100 4 0 0 7 103 50 98 0 1 0 0 260 0 0 0 100 5 0 0 0 11 5 0 0 0 0 0 0 0 0 0 100 6 0 0 0 35 13 58 1 1 0 0 2026 0 0 0 99 7 0 0 17 214 103 10 0 1 1 0 267 0 0 0 100 March 2, 2026 at 07:01:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 101 207 1 34 171 0 3 0 2 0 98 1 0 0 0 73 8 138 1 39 213 0 33 0 2 0 98 2 0 0 3 254 102 109 1 33 202 0 0 0 1 0 99 3 0 0 0 221 146 151 1 38 211 0 2 0 1 0 99 4 0 0 7 187 4 379 0 31 166 0 272 0 1 0 99 5 0 0 0 48 0 92 1 27 166 0 0 0 1 0 99 6 0 0 0 66 7 159 3 35 217 0 2020 0 2 0 98 7 0 0 17 316 133 175 2 35 179 0 272 0 1 0 99 March 2, 2026 at 07:01:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2217 101 368 0 84 345 0 1 0 2 0 98 1 0 0 0 149 8 342 3 91 416 0 146 0 2 0 98 2 0 0 4 351 102 342 0 67 434 0 0 0 1 0 99 3 0 0 0 422 291 290 0 81 481 0 0 0 2 0 98 4 0 0 7 436 4 896 1 99 441 0 261 0 2 0 98 5 0 0 0 161 7 354 0 96 487 0 6 0 2 0 98 6 0 0 0 226 40 404 4 100 454 0 1876 0 2 0 98 7 0 0 16 346 113 307 0 78 462 0 267 0 2 0 98 March 2, 2026 at 07:01:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 16 3 40 2 1 0 0 1122 0 1 0 99 2 0 0 3 208 102 4 0 1 0 0 0 0 0 0 100 3 0 0 0 13 2 6 0 1 0 0 2 0 0 0 100 4 0 0 7 9 3 4 0 0 0 0 260 0 0 0 100 5 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 6 0 0 0 113 54 108 0 0 0 0 892 0 0 0 100 7 0 0 17 211 104 6 0 0 0 0 271 0 0 0 100 March 2, 2026 at 07:01:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 15 2 38 1 0 0 0 1121 0 1 0 99 2 0 0 4 210 103 4 0 0 0 0 1 0 0 0 100 3 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 4 0 0 7 10 3 4 0 0 0 0 260 0 0 0 100 5 0 0 0 19 6 16 0 1 0 0 6 0 0 0 100 6 0 0 0 118 54 118 0 2 0 0 858 0 0 0 100 7 0 0 16 209 102 3 1 1 0 0 308 0 0 0 100 March 2, 2026 at 07:01:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 517 0 0 2243 103 362 159 12 2 0 772 81 2 0 18 1 27 0 0 170 3 191 105 19 6 0 1514 82 1 0 18 2 9 0 199 361 103 228 147 15 10 1 431 82 1 0 18 3 3 0 0 160 4 150 106 15 1 0 453 82 1 0 18 4 0 0 7 187 7 244 129 24 1 0 862 81 1 0 18 5 1091 0 0 199 31 153 110 15 5 2 521 82 1 0 18 6 4 0 0 209 26 233 126 14 5 1 963 82 0 0 18 7 4 0 17 370 108 179 111 20 3 0 834 82 0 0 18 March 2, 2026 at 07:01:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 104 115 95 11 4 0 202 99 1 0 0 1 0 0 0 165 5 209 138 10 4 0 1422 99 1 0 0 2 0 0 87 294 103 67 84 7 6 0 172 100 0 0 0 3 0 0 0 138 6 86 96 5 2 0 192 100 0 0 0 4 0 0 14 113 4 74 89 6 5 0 450 100 0 0 0 5 0 0 0 229 51 188 140 8 2 0 98 100 0 0 0 6 0 0 0 130 3 103 106 6 12 0 794 100 0 0 0 7 0 0 17 321 104 101 103 8 2 0 690 100 0 0 0 March 2, 2026 at 07:01:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 100 166 130 12 4 0 237 99 1 0 0 1 0 0 0 152 6 186 129 11 6 0 1348 99 1 0 0 2 0 0 101 337 103 174 137 9 1 0 288 100 0 0 0 3 0 0 0 124 4 107 104 7 1 0 233 100 0 0 0 4 0 0 7 111 4 65 87 10 4 0 447 100 0 0 0 5 0 0 0 203 42 201 150 7 4 0 224 100 0 0 0 6 0 0 0 146 13 149 118 17 1 0 881 100 0 0 0 7 0 0 17 325 106 140 121 13 7 0 787 100 0 0 0 March 2, 2026 at 07:01:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 101 173 127 14 5 0 175 99 1 0 0 1 0 0 0 137 3 174 115 20 5 0 1601 99 1 0 0 2 0 0 115 358 106 196 147 15 1 0 369 99 1 0 0 3 0 0 0 155 3 172 132 13 8 0 290 100 0 0 0 4 0 0 7 150 28 98 96 10 2 0 426 100 0 0 0 5 0 0 0 111 3 58 77 5 1 0 100 100 0 0 0 6 0 0 0 156 7 163 128 9 1 0 848 100 0 0 0 7 0 0 17 352 123 134 110 15 7 0 807 100 0 0 0 March 2, 2026 at 07:01:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 100 57 83 4 2 0 160 99 1 0 0 1 0 0 0 138 4 146 108 8 5 0 1328 99 1 0 0 2 0 0 101 345 104 178 134 12 8 0 257 100 0 0 0 3 0 0 0 186 4 208 150 12 2 0 262 100 0 0 0 4 0 0 7 207 50 146 119 12 1 0 547 100 0 0 0 5 0 0 0 159 6 149 126 10 5 0 235 100 0 0 0 6 0 0 0 173 6 206 149 8 6 0 906 100 0 0 0 7 0 0 17 327 104 73 90 12 1 0 783 100 0 0 0 March 2, 2026 at 07:01:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 103 107 105 13 3 0 166 99 1 0 0 1 0 0 0 149 3 174 116 13 8 0 1373 99 1 0 0 2 0 0 115 362 107 202 149 13 5 0 359 99 1 0 0 3 0 0 0 215 7 233 157 9 1 0 445 99 1 0 0 4 0 0 7 152 4 162 123 9 5 0 522 100 0 0 0 5 0 0 0 163 22 123 109 8 4 0 251 100 0 0 0 6 0 0 0 181 39 150 125 8 1 0 828 100 0 0 0 7 0 0 17 338 106 109 102 11 2 0 750 100 0 0 0 March 2, 2026 at 07:01:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 100 104 96 7 3 0 118 99 1 0 0 1 0 0 0 126 2 124 95 8 3 0 1271 99 1 0 0 2 0 0 101 352 108 160 129 15 5 0 276 100 0 0 0 3 0 0 0 144 5 132 113 13 2 0 212 100 0 0 0 4 0 0 7 159 5 202 151 14 4 0 639 100 0 0 0 5 0 0 0 161 2 178 138 11 4 0 316 100 0 0 0 6 0 0 0 188 31 139 120 7 6 0 839 100 0 0 0 7 0 0 24 363 127 125 108 12 2 0 839 100 0 0 0 March 2, 2026 at 07:01:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2198 120 156 122 15 4 0 228 99 1 0 0 1 0 0 0 194 23 206 138 12 3 0 1361 99 1 0 0 2 0 0 115 350 112 123 110 9 9 0 194 100 0 0 0 3 0 0 0 148 2 114 109 8 3 0 242 100 0 0 0 4 0 0 7 110 5 62 80 4 0 0 368 100 0 0 0 5 2 0 0 118 1 84 92 5 3 0 288 100 0 0 0 6 0 0 0 155 3 165 120 18 12 0 1004 100 0 0 0 7 5 0 17 350 108 120 106 20 4 0 794 100 0 0 0 March 2, 2026 at 07:01:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2192 101 140 121 12 3 0 265 99 1 0 0 1 0 0 0 156 4 193 132 13 2 0 1434 99 1 0 0 2 0 0 115 392 114 185 142 12 7 0 375 99 1 0 0 3 0 0 0 169 16 118 109 11 1 0 106 100 0 0 0 4 0 0 7 191 27 206 149 9 5 0 554 100 0 0 0 5 0 0 0 147 6 140 118 7 2 0 194 100 0 0 0 6 0 0 0 141 3 127 112 10 12 0 931 100 0 0 0 7 0 0 17 356 105 132 111 14 2 0 851 100 0 0 0 March 2, 2026 at 07:01:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 103 69 84 6 0 0 140 99 1 0 0 1 0 0 0 190 7 285 173 12 11 0 1639 99 1 0 0 2 0 0 115 361 107 177 135 14 8 0 249 100 0 0 0 3 0 0 0 136 1 117 106 14 4 0 227 100 0 0 0 4 0 0 7 186 21 173 129 15 4 0 471 100 0 0 0 5 0 0 0 204 34 188 148 10 7 0 267 100 0 0 0 6 0 0 0 132 5 80 95 6 1 0 756 100 0 0 0 7 0 0 17 351 105 83 91 5 2 0 701 100 0 0 0 March 2, 2026 at 07:01:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 102 71 88 11 2 0 138 99 1 0 0 1 0 0 0 232 33 308 180 14 4 0 1393 99 1 0 0 2 0 0 101 375 109 206 151 9 3 0 335 99 1 0 0 3 0 0 0 145 3 152 121 18 4 0 394 100 0 0 0 4 0 0 7 160 7 110 104 15 3 0 528 100 0 0 0 5 0 0 0 100 8 70 71 18 2 0 313 100 0 0 0 6 0 0 0 161 4 149 121 20 2 0 888 100 0 0 0 7 1 0 17 395 124 148 121 12 4 0 716 100 0 0 0 March 2, 2026 at 07:01:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 103 121 107 12 3 0 309 99 1 0 0 1 0 0 0 229 38 277 165 10 9 0 1398 99 1 0 0 2 0 0 101 350 119 119 109 9 2 0 159 100 0 0 0 3 0 0 0 122 5 110 107 5 3 0 227 100 0 0 0 4 0 0 7 127 5 77 91 10 6 0 447 100 0 0 0 5 0 0 0 122 3 84 87 7 4 0 202 100 0 0 0 6 0 0 0 127 4 130 113 8 2 0 852 100 0 0 0 7 0 0 17 372 105 177 134 14 1 0 840 100 0 0 0 March 2, 2026 at 07:01:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 104 115 106 8 2 0 215 99 1 0 0 1 0 0 0 186 4 220 149 8 5 0 1381 99 1 0 0 2 0 0 112 453 153 259 171 8 2 0 211 100 0 0 0 3 0 0 0 136 4 114 108 11 7 0 325 100 0 0 0 4 0 0 7 141 7 99 100 8 1 0 495 100 0 0 0 5 0 0 0 130 5 89 85 12 3 0 230 100 0 0 0 6 0 0 0 146 6 116 102 14 1 0 807 100 0 0 0 7 0 0 21 349 105 136 111 8 4 0 811 100 0 0 0 March 2, 2026 at 07:01:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 101 83 89 7 0 0 120 99 1 0 0 1 0 0 0 141 2 142 106 8 2 0 1322 99 1 0 0 2 0 0 101 382 110 213 153 10 2 0 326 99 1 0 0 3 0 0 0 190 5 222 162 7 4 0 406 100 0 0 0 4 0 0 7 202 49 165 128 12 2 0 524 100 0 0 0 5 0 0 0 133 3 128 113 5 5 0 232 100 0 0 0 6 0 0 0 160 5 175 128 8 5 0 1017 100 0 0 0 7 0 0 17 352 105 102 98 15 4 0 732 100 0 0 0 March 2, 2026 at 07:01:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 101 107 109 7 6 0 215 99 1 0 0 1 0 0 0 137 2 153 113 8 1 0 1364 99 1 0 0 2 0 0 143 321 103 91 94 6 2 0 183 99 1 0 0 3 0 0 0 170 2 211 145 10 3 0 420 100 0 0 0 4 0 0 7 214 29 216 156 12 5 0 579 100 0 0 0 5 0 0 0 217 24 216 150 17 1 0 371 100 0 0 0 6 0 0 0 142 9 119 107 11 3 0 797 100 0 0 0 7 0 0 17 345 105 112 106 10 3 0 788 100 0 0 0 March 2, 2026 at 07:01:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 101 154 121 11 8 0 234 99 1 0 0 1 0 0 0 209 24 237 151 13 9 0 1323 99 1 0 0 2 0 0 101 344 119 94 95 10 0 0 180 99 1 0 0 3 0 0 0 114 1 77 93 5 2 0 199 100 0 0 0 4 0 0 0 171 4 184 138 10 7 0 293 100 0 0 0 5 0 0 7 160 9 147 124 8 9 0 466 100 0 0 0 6 0 0 0 184 18 212 138 18 1 0 953 100 0 0 0 7 0 0 17 323 108 98 95 15 4 0 823 100 0 0 0 March 2, 2026 at 07:01:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2197 105 173 133 8 7 0 327 99 1 0 0 1 3 0 0 163 4 162 118 13 3 0 1348 99 1 0 0 2 0 0 115 377 125 181 136 11 4 0 302 99 1 0 0 3 0 0 0 124 4 101 92 25 4 0 180 100 0 0 0 4 3 0 0 199 28 198 145 18 4 0 286 100 0 0 0 5 0 0 7 142 7 82 90 10 1 0 419 100 0 0 0 6 0 0 0 125 5 98 103 5 2 0 850 100 0 0 0 7 0 0 17 353 106 118 109 5 1 0 757 100 0 0 0 March 2, 2026 at 07:01:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 101 120 107 11 1 0 211 99 1 0 0 1 0 0 14 171 22 188 126 13 3 0 1653 99 1 0 0 2 0 0 129 321 110 129 108 18 4 0 259 99 1 0 0 3 0 0 0 152 4 138 118 10 3 0 276 100 0 0 0 4 0 0 0 202 4 170 130 8 4 0 158 100 0 0 0 5 0 0 7 137 6 127 107 14 4 0 583 100 0 0 0 6 0 0 0 177 23 171 125 19 1 0 787 100 0 0 0 7 0 0 3 327 105 91 94 14 3 0 519 100 0 0 0 March 2, 2026 at 07:01:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 100 35 41 6 0 0 121 78 1 0 22 1 0 0 0 65 4 47 44 0 0 0 1197 70 0 0 30 2 2 0 17 321 129 114 60 9 0 0 398 63 0 0 36 3 0 0 0 76 6 54 61 6 0 0 87 77 0 0 23 4 0 0 0 165 24 155 64 13 0 0 87 64 0 0 36 5 0 0 7 79 5 43 46 6 0 0 316 69 0 0 31 6 0 0 0 75 2 27 46 4 0 0 646 77 0 0 23 7 0 0 3 257 104 20 37 3 0 0 385 64 0 0 36 March 2, 2026 at 07:01:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 112 1 2 0 0 23 0 1 0 99 1 0 0 0 15 2 36 2 1 4 0 1136 0 0 0 100 2 8 0 31 214 104 16 0 2 0 0 297 0 1 0 99 3 0 0 0 12 0 4 0 1 0 0 1 0 0 0 100 4 0 0 0 16 4 12 0 2 0 0 5 0 0 0 100 5 0 0 7 129 58 127 0 1 0 0 277 0 0 0 100 6 0 0 0 18 2 13 0 4 0 0 603 0 0 0 100 7 1 0 3 220 104 10 0 3 2 0 303 0 0 0 100 March 2, 2026 at 07:01:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2145 100 98 0 12 6 6 113 0 1 0 99 1 4 0 0 41 3 57 0 5 2 2 1162 0 0 0 100 2 741 0 18 249 104 48 2 4 6 4 6782 2 1 0 97 3 49 0 0 55 5 59 0 9 4 2 132 0 0 0 100 4 18 0 0 48 8 41 0 8 0 2 95 0 0 0 100 5 2623 0 121 142 56 163 2 9 5 9 730 1 1 0 98 6 108 0 0 67 6 85 0 13 16 19 757 0 0 0 100 7 26 0 4 304 103 110 1 12 9 13 370 0 0 0 100 March 2, 2026 at 07:01:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 120 0 0 0 0 17 0 1 0 99 1 0 0 0 11 2 36 1 0 2 0 1217 0 0 0 100 2 0 0 17 212 103 12 0 0 0 0 271 0 0 0 100 3 0 0 0 17 3 10 1 0 0 0 14 0 0 0 100 4 0 0 0 112 53 106 0 1 0 0 0 0 0 0 100 5 0 0 7 18 2 14 0 0 0 0 260 0 0 0 100 6 0 0 0 20 3 20 2 2 0 0 603 0 0 0 100 7 0 0 3 215 103 10 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:01:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2343 109 440 14 42 31 0 2278 12 2 0 86 1 0 0 0 423 9 767 27 88 47 0 3164 4 2 0 95 2 0 0 311 515 105 606 17 59 11 0 2052 6 1 0 93 3 0 0 0 329 2 575 19 50 20 0 2048 9 1 0 90 4 0 0 0 379 46 542 14 60 34 0 1276 2 1 0 96 5 26 0 7 307 3 461 5 32 52 0 1508 3 1 0 96 6 0 0 0 328 3 518 4 43 19 0 1874 2 1 0 97 7 0 0 3 422 103 319 6 20 30 0 1443 3 1 0 96 March 2, 2026 at 07:01:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 12 2349 107 491 6 52 33 0 1395 4 2 0 94 1 0 0 14 324 34 516 14 74 34 1 1240 3 1 0 96 2 2 0 251 393 105 348 10 45 21 0 1541 4 2 0 94 3 1 0 0 179 2 285 13 27 13 1 3088 10 1 0 89 4 0 0 0 281 7 435 11 49 45 0 1034 2 1 0 97 5 3 0 7 261 10 404 5 41 36 0 1783 4 1 0 95 6 19 0 0 266 9 422 14 47 34 0 1797 6 1 0 93 7 0 0 2 415 119 286 3 30 10 0 1233 1 1 0 98 March 2, 2026 at 07:02:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 106 124 0 0 0 0 9 0 1 0 99 1 0 0 7 113 50 113 0 3 0 0 0 0 0 0 100 2 0 0 17 213 103 8 0 1 0 0 266 0 0 0 100 3 0 0 0 13 1 36 1 0 1 0 1122 0 0 0 100 4 0 0 0 15 5 8 0 0 0 0 2 0 0 0 100 5 0 0 7 12 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 301 0 0 0 100 7 0 0 3 214 104 6 0 0 0 0 594 0 0 0 100 March 2, 2026 at 07:02:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2108 102 115 0 2 0 0 1 0 1 0 99 1 0 0 0 137 54 116 0 1 0 0 10 0 0 0 100 2 0 0 17 235 105 22 0 1 0 0 281 0 0 0 100 3 0 0 0 31 1 42 1 0 1 0 1125 0 0 0 100 4 0 0 0 28 4 6 0 0 0 0 0 0 0 0 100 5 0 0 7 35 9 8 0 0 0 0 262 0 0 0 100 6 0 0 0 24 1 2 1 0 0 0 300 0 0 0 100 7 0 0 3 235 105 12 1 1 0 0 595 0 0 0 100 March 2, 2026 at 07:02:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2141 103 187 1 33 277 0 0 0 3 0 97 1 0 0 0 129 42 175 2 28 301 0 25 0 2 0 98 2 0 0 18 292 116 149 0 35 289 0 267 0 1 0 99 3 0 0 0 161 115 347 1 39 229 0 1118 0 2 0 98 4 0 0 0 58 7 109 1 40 295 0 32 0 2 0 98 5 0 0 7 44 4 95 1 27 236 0 288 0 2 0 98 6 0 0 0 43 2 87 1 23 242 0 300 0 2 0 98 7 0 0 2 252 105 92 2 21 243 0 596 0 2 0 98 March 2, 2026 at 07:02:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2556 125 1076 4 111 630 0 63 0 3 0 97 1 0 0 0 206 29 408 3 127 614 0 230 0 2 0 97 2 0 0 17 368 105 369 2 121 644 0 1111 0 3 0 97 3 0 0 0 526 361 423 3 121 662 0 1147 0 3 0 97 4 0 0 0 153 5 363 4 116 652 0 641 0 3 0 97 5 0 0 7 161 10 367 1 115 691 0 349 0 2 0 97 6 0 0 0 209 1 475 0 111 693 0 343 0 2 0 98 7 0 0 3 354 106 369 1 112 674 0 689 0 3 0 97 March 2, 2026 at 07:02:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2696 100 1317 3 143 962 0 0 0 4 0 96 1 0 0 0 212 1 503 2 130 1202 0 1 0 3 0 97 2 0 0 18 452 102 512 3 128 906 0 157 0 3 0 97 3 0 0 0 628 410 527 4 127 1004 0 1121 0 4 0 96 4 0 0 0 228 6 509 2 149 902 1 112 0 3 0 97 5 0 0 7 289 42 579 5 135 1092 0 265 0 3 0 97 6 0 0 0 234 17 514 4 128 1159 0 300 0 3 0 97 7 0 0 2 390 104 430 1 124 880 0 595 0 3 0 97 March 2, 2026 at 07:02:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 103 152 0 2 3 0 0 0 1 0 99 1 1 0 0 13 2 12 0 1 2 0 2 0 0 0 100 2 0 0 3 270 126 74 0 4 3 0 0 0 0 0 100 3 0 0 0 45 21 60 1 2 5 0 1123 0 0 0 100 4 0 0 14 21 6 26 0 3 1 0 267 0 0 0 100 5 0 0 7 30 8 34 0 2 6 0 269 0 0 0 100 6 0 0 0 56 23 54 1 1 4 0 300 0 0 0 100 7 0 0 3 220 104 18 1 1 4 0 594 0 0 0 100 March 2, 2026 at 07:02:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 147 200 0 1 0 0 0 0 1 0 99 1 0 0 0 19 4 14 0 1 0 0 6 0 0 0 100 2 0 0 3 225 104 22 0 2 0 0 14 0 0 0 100 3 0 0 0 21 3 49 1 1 0 0 1125 0 0 0 100 4 0 0 14 19 7 14 1 0 0 0 291 0 0 0 100 5 0 0 7 36 16 28 0 1 0 0 267 0 0 0 100 6 0 0 0 10 1 4 0 1 0 0 300 0 0 0 100 7 0 0 3 217 104 10 1 1 0 0 594 0 0 0 100 March 2, 2026 at 07:02:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 107 50 106 0 1 2 0 1 0 0 0 100 2 0 0 4 211 102 6 0 0 1 0 0 0 0 0 100 3 0 0 0 32 8 62 1 0 2 0 1134 0 0 0 99 4 0 0 14 17 5 14 0 2 0 0 290 0 0 0 100 5 0 0 7 16 5 12 0 0 0 0 282 0 0 0 100 6 0 0 0 13 1 12 0 2 0 0 311 0 0 0 100 7 0 0 2 217 104 12 0 0 1 0 594 0 0 0 100 March 2, 2026 at 07:02:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 0 1 0 0 0 1 0 99 1 0 0 0 111 51 106 0 0 1 0 8 0 0 0 100 2 0 0 7 209 101 6 0 1 0 0 3 0 0 0 100 3 0 0 0 32 10 54 1 0 2 0 1134 0 0 0 99 4 0 0 14 18 7 12 0 1 2 0 271 0 0 0 100 5 0 0 7 17 4 10 0 0 1 0 269 0 0 0 100 6 0 0 0 17 2 14 0 1 1 0 301 0 0 0 100 7 0 0 7 214 104 6 0 0 1 0 594 0 0 0 100 March 2, 2026 at 07:02:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 1 0 0 5 0 1 0 99 1 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 2 0 0 4 208 101 4 0 1 0 0 9 0 0 0 100 3 0 0 0 30 10 52 1 0 1 0 1124 0 0 0 100 4 0 0 14 15 6 172 0 0 0 0 597 0 0 0 100 5 21 0 7 17 6 14 0 0 0 0 273 0 0 0 100 6 0 0 0 14 2 8 1 0 0 0 315 0 0 0 100 7 0 0 2 219 104 16 1 1 0 0 594 0 0 0 100 March 2, 2026 at 07:02:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 2 1 0 3 214 104 12 0 1 0 0 6 0 0 0 99 3 0 0 0 29 9 52 2 1 0 0 1119 0 0 0 99 4 0 0 14 18 8 14 0 0 0 0 272 0 0 0 100 5 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 13 2 10 0 1 0 0 303 0 0 0 100 7 0 0 3 214 104 6 1 0 0 0 594 0 0 0 100 March 2, 2026 at 07:02:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 120 0 1 0 0 0 0 1 0 99 1 0 0 0 112 51 106 0 0 0 0 6 0 0 0 100 2 0 0 4 216 103 16 0 0 0 0 15 0 0 0 100 3 0 0 0 34 9 58 2 0 0 0 1134 0 0 0 99 4 0 0 14 12 5 10 0 1 0 0 266 0 0 0 100 5 0 0 7 15 7 4 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 7 0 0 2 220 105 14 0 0 0 0 595 0 0 0 100 March 2, 2026 at 07:02:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 3 1 0 0 0 1 0 99 1 0 0 0 111 50 112 0 1 2 0 0 0 0 0 100 2 0 0 4 213 102 8 0 0 0 0 0 0 0 0 100 3 0 0 0 27 7 52 1 1 1 0 1123 0 0 0 99 4 0 0 14 20 6 14 0 1 0 0 268 0 0 0 100 5 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 7 0 0 2 218 105 14 0 0 3 0 595 0 0 0 100 March 2, 2026 at 07:02:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 106 50 102 0 0 0 0 1 0 0 0 100 2 0 0 3 210 101 6 0 1 1 0 3 0 0 0 100 3 0 0 0 39 12 64 2 1 0 0 1131 0 0 0 99 4 0 0 14 18 7 16 0 0 0 0 273 0 0 0 100 5 0 0 7 11 2 10 0 0 0 0 266 0 0 0 100 6 0 0 0 14 3 8 1 1 0 0 309 0 0 0 100 7 0 0 3 214 104 6 1 0 0 0 593 0 0 0 100 March 2, 2026 at 07:02:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 1 0 0 0 0 1 0 99 1 0 0 0 107 50 102 0 1 0 0 0 0 0 0 100 2 0 0 4 215 102 16 0 1 0 0 1 0 0 0 100 3 0 0 0 29 9 54 0 0 0 0 1120 0 0 0 99 4 0 0 14 14 6 10 0 0 0 0 268 0 0 0 100 5 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 7 0 0 2 214 104 4 1 0 0 0 594 0 0 0 100 March 2, 2026 at 07:02:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 116 0 3 0 0 0 0 1 0 99 1 0 0 0 105 50 101 0 1 0 0 0 0 0 0 100 2 0 0 4 216 101 12 0 0 0 0 0 0 0 0 100 3 0 0 0 30 9 50 1 0 1 0 1128 0 0 0 99 4 0 0 14 15 6 10 0 0 0 0 267 0 0 0 100 5 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 7 0 0 2 211 103 4 0 0 0 0 594 0 0 0 100 March 2, 2026 at 07:02:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 104 124 0 4 0 0 0 0 1 0 99 1 0 0 0 54 23 48 0 0 0 0 6 0 0 0 100 2 0 0 4 270 129 70 0 2 0 0 15 0 0 0 100 3 0 0 0 24 5 50 3 0 0 0 1124 0 0 0 99 4 0 0 14 14 6 10 0 0 0 0 268 0 0 0 100 5 0 0 7 14 8 4 0 0 1 0 260 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 7 0 0 2 216 103 8 1 0 0 0 595 0 0 0 100 March 2, 2026 at 07:02:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 5777 118 7795 108 371 307 0 18639 17 12 0 72 1 76 0 0 3602 8 7472 91 391 295 0 18561 16 11 0 73 2 17 0 4 3618 108 7793 54 231 281 0 24204 16 10 0 74 3 20 0 0 3811 148 7715 81 338 369 0 20871 18 11 0 71 4 206 0 14 2290 13 4737 35 259 277 1 12125 11 7 0 82 5 83 0 7 2151 9 4455 39 187 275 0 9465 9 7 0 85 6 13 0 0 2185 10 4631 55 251 291 0 10225 9 6 0 85 7 244 0 2 1537 106 2846 23 135 302 0 8601 7 5 0 88 March 2, 2026 at 07:02:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 6436 112 9367 70 415 142 0 28069 24 16 0 60 1 6 0 0 4919 14 10074 68 419 134 0 22872 20 13 0 68 2 11 0 4 4013 119 7826 43 284 150 0 17457 16 10 0 74 3 3 0 0 4086 73 8471 48 345 149 0 19649 15 11 0 74 4 9 0 0 2624 23 5428 42 289 109 0 13987 13 8 0 78 5 4 0 7 2590 10 5447 17 173 104 0 12919 12 8 0 81 6 6 0 14 3286 13 6991 22 272 116 0 15567 13 9 0 79 7 2 0 3 2645 117 5226 29 162 117 0 14088 12 8 0 81 March 2, 2026 at 07:02:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 14 6801 110 9997 60 399 178 0 27396 23 16 0 61 1 9 0 0 4603 12 9409 62 422 106 0 22758 19 12 0 69 2 20 0 4 3642 117 7220 33 271 148 0 20229 17 11 0 72 3 6 0 0 4469 19 9438 65 385 74 0 22390 18 12 0 70 4 24 0 0 3230 13 6937 32 276 175 0 18567 17 11 0 72 5 4 0 7 2240 8 4929 15 149 90 0 13086 12 7 0 81 6 6 0 0 3213 7 6870 33 242 118 0 14201 12 8 0 80 7 4 0 2 1971 106 3679 10 115 35 0 8471 8 5 0 88 March 2, 2026 at 07:02:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2746 104 1441 10 54 23 0 5016 4 3 0 93 1 1 0 0 797 43 1555 8 54 25 0 3350 2 2 0 96 2 1 0 3 716 102 1099 7 42 23 0 2789 2 2 0 96 3 2 0 0 742 6 1478 2 46 7 0 2842 2 2 0 96 4 0 0 0 308 6 623 2 47 18 0 1637 1 1 0 97 5 0 0 7 348 5 713 1 21 19 0 2377 2 1 0 97 6 0 0 0 540 3 1184 6 44 17 0 2645 2 2 0 96 7 1 0 3 532 110 662 4 24 8 0 2710 2 1 0 96 March 2, 2026 at 07:02:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 103 138 1 0 0 0 1680 0 1 0 99 1 0 0 0 115 52 108 1 0 0 0 306 0 0 0 100 2 0 0 3 214 103 12 0 0 0 0 13 0 0 0 100 3 0 0 0 20 0 20 0 2 0 0 7 0 0 0 100 4 0 0 0 17 5 10 0 0 0 0 2 0 0 0 100 5 0 0 7 18 8 8 0 0 0 0 260 0 0 0 100 6 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 7 0 0 3 227 109 20 1 1 0 0 306 0 0 0 100 March 2, 2026 at 07:02:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2157 103 158 3 34 237 0 1682 0 2 0 97 1 0 0 0 158 15 220 1 40 286 0 300 0 2 0 98 2 0 0 3 303 123 173 1 38 233 0 4 0 1 0 98 3 0 0 0 176 121 115 1 37 253 0 0 0 2 0 98 4 0 0 0 65 8 128 2 38 228 0 25 0 2 0 98 5 0 0 7 66 4 127 2 32 236 0 263 0 2 0 98 6 0 0 0 227 16 415 0 44 243 0 0 0 1 0 99 7 0 0 3 275 112 142 1 35 254 0 312 0 1 0 99 March 2, 2026 at 07:02:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2203 103 296 2 86 441 0 1685 0 3 0 97 1 0 0 0 204 1 380 1 90 509 0 307 0 2 0 98 2 0 0 3 312 102 257 2 69 436 0 5 0 2 0 98 3 0 0 0 472 344 304 2 85 481 0 8 0 2 0 98 4 0 0 0 122 8 272 2 77 466 0 9 0 2 0 98 5 0 0 7 134 2 297 1 80 449 0 259 0 2 0 98 6 0 0 0 557 51 1035 3 78 397 0 0 0 2 0 98 7 0 0 3 330 106 309 3 88 513 0 305 0 2 0 98 March 2, 2026 at 07:02:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2217 103 266 2 42 339 0 1682 0 2 0 98 1 0 0 0 103 1 227 0 55 340 0 300 0 1 0 99 2 0 0 4 284 101 178 0 49 345 0 0 0 1 0 99 3 0 0 0 338 221 236 1 48 398 1 5 0 1 0 98 4 0 0 0 177 32 303 0 53 328 0 0 0 1 0 99 5 0 0 7 215 3 335 0 43 464 0 262 0 1 0 99 6 0 0 0 364 24 687 1 56 371 1 0 0 1 0 99 7 0 0 2 309 103 230 0 54 432 1 300 0 1 0 99 March 2, 2026 at 07:02:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 134 2 2 0 0 1467 0 1 0 99 1 0 0 0 9 1 2 1 0 0 0 300 0 0 0 100 2 0 0 4 208 102 2 0 0 0 0 1 0 0 0 100 3 0 0 0 23 6 16 0 0 0 0 5 0 0 0 100 4 0 0 0 61 28 56 0 0 0 0 6 0 0 0 100 5 0 0 7 69 31 64 0 2 0 0 469 0 0 0 100 6 0 0 0 16 1 11 0 1 0 0 37 0 0 0 100 7 0 0 2 211 103 6 0 1 0 0 300 0 0 0 100 March 2, 2026 at 07:02:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 140 1 1 0 0 1387 0 1 0 99 1 0 0 0 18 2 18 0 1 0 0 306 0 0 0 100 2 0 0 4 216 103 14 0 1 0 0 14 0 0 0 100 3 0 0 0 26 6 22 0 0 0 0 17 0 0 0 100 4 0 0 0 15 5 12 0 1 0 0 1 0 0 0 100 5 0 0 7 115 58 106 0 0 0 0 261 0 0 0 100 6 0 0 0 17 2 12 0 0 0 0 294 0 0 0 100 7 0 0 2 215 103 6 1 0 0 0 300 0 0 0 100 March 2, 2026 at 07:02:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2213 106 215 113 14 8 0 1778 79 2 0 20 1 15 0 0 141 3 132 88 20 13 1 658 80 0 0 20 2 329 0 198 354 103 190 124 14 6 2 398 80 1 0 20 3 20 0 7 192 14 237 111 29 10 0 654 79 1 0 20 4 0 0 0 121 6 96 83 16 8 0 468 80 0 0 20 5 0 0 7 227 25 252 135 19 10 0 648 80 0 0 20 6 1053 0 0 167 5 371 168 17 11 0 1210 79 1 0 20 7 997 0 4 390 120 186 131 16 3 0 804 79 1 0 20 March 2, 2026 at 07:02:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2182 110 140 108 8 8 0 1569 99 1 0 0 1 0 0 0 123 4 130 112 6 9 0 587 100 0 0 0 2 0 0 105 386 127 150 124 9 3 0 181 100 0 0 0 3 0 0 0 103 1 58 80 5 5 0 119 100 0 0 0 4 0 0 0 131 7 142 122 5 3 0 242 100 0 0 0 5 0 0 7 107 5 60 81 3 4 0 411 100 0 0 0 6 0 0 0 124 3 107 102 6 15 0 543 100 0 0 0 7 0 0 7 394 127 141 116 7 1 0 469 100 0 0 0 March 2, 2026 at 07:02:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2165 103 126 97 13 0 0 1599 99 1 0 0 1 0 0 0 124 1 101 102 13 2 0 481 100 0 0 0 2 0 0 87 372 127 196 140 11 2 0 400 99 1 0 0 3 0 0 0 187 26 171 132 13 4 0 198 100 0 0 0 4 0 0 0 130 5 144 118 8 0 0 337 99 1 0 0 5 0 0 7 121 5 83 94 9 2 0 466 100 0 0 0 6 0 0 0 121 1 82 95 7 3 0 466 100 0 0 0 7 0 0 3 361 105 125 104 11 1 0 506 100 0 0 0 March 2, 2026 at 07:02:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2153 103 109 83 12 5 0 1656 98 2 0 0 1 0 0 0 152 3 143 114 15 4 0 508 100 0 0 0 2 0 0 115 335 104 139 121 13 7 0 339 100 0 0 0 3 0 0 0 208 24 172 134 11 3 0 151 100 0 0 0 4 0 0 0 197 14 211 157 10 6 0 270 99 1 0 0 5 0 0 7 188 13 215 156 8 1 0 571 100 0 0 0 6 0 0 0 120 11 62 81 6 3 0 469 100 0 0 0 7 0 0 3 348 108 117 112 7 4 0 513 100 0 0 0 March 2, 2026 at 07:02:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2166 102 134 96 11 1 0 1865 99 1 0 0 1 0 0 0 193 14 214 153 10 3 0 707 100 0 0 0 2 0 0 143 361 120 173 123 22 3 0 406 99 1 0 0 3 0 0 7 180 1 170 133 14 1 0 223 100 0 0 0 4 0 0 0 197 5 212 149 13 5 0 320 99 1 0 0 5 2 0 7 122 8 74 86 10 8 0 490 100 0 0 0 6 0 0 0 199 31 179 137 9 1 0 632 100 0 0 0 7 0 0 3 335 105 88 94 7 3 0 180 100 0 0 0 March 2, 2026 at 07:02:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2148 103 130 101 3 1 0 1789 99 1 0 0 1 0 0 0 118 1 90 96 2 3 0 471 100 0 0 0 2 0 0 115 384 125 200 139 7 3 0 264 100 0 0 0 3 0 0 0 159 15 172 129 13 6 0 354 100 0 0 0 4 0 0 0 196 19 209 145 15 6 0 292 99 1 0 0 5 0 0 7 121 4 84 94 10 4 0 418 100 0 0 0 6 0 0 0 140 6 125 113 9 4 0 619 100 0 0 0 7 0 0 3 335 104 131 116 8 1 0 294 100 0 0 0 March 2, 2026 at 07:02:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2176 110 152 107 10 2 0 1947 98 2 0 0 1 0 0 0 134 1 91 96 10 0 0 592 100 0 0 0 2 0 0 143 334 104 117 108 10 3 0 317 100 0 0 0 3 0 0 0 163 17 143 114 15 5 0 248 100 0 0 0 4 0 0 0 208 28 203 152 9 8 0 228 99 1 0 0 5 0 0 7 184 3 193 150 10 2 0 645 100 0 0 0 6 0 0 0 181 9 161 132 12 3 0 575 100 0 0 0 7 0 0 3 362 108 172 136 10 4 0 315 100 0 0 0 March 2, 2026 at 07:02:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2153 103 159 110 12 3 0 2041 98 2 0 0 1 0 0 0 120 2 87 91 15 2 0 511 100 0 0 0 2 0 0 87 359 104 153 123 11 3 0 180 100 0 0 0 3 0 0 0 176 26 171 124 11 3 0 236 100 0 0 0 4 0 0 0 157 13 166 127 9 3 0 360 99 1 0 0 5 5 0 7 158 20 143 116 10 7 0 496 100 0 0 0 6 0 0 0 165 5 149 127 6 7 0 481 100 0 0 0 7 0 0 3 316 106 84 95 8 2 0 309 100 0 0 0 March 2, 2026 at 07:02:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2186 111 239 149 17 1 0 1901 98 2 0 0 1 0 0 0 139 7 133 115 14 1 0 603 100 0 0 0 2 0 0 87 341 103 139 121 8 2 0 242 100 0 0 0 3 0 0 0 125 1 100 102 5 1 0 203 100 0 0 0 4 0 0 0 115 5 100 95 10 1 0 178 99 1 0 0 5 0 0 7 170 26 134 119 12 1 0 469 100 0 0 0 6 0 0 0 127 5 110 106 9 1 0 443 100 0 0 0 7 0 0 3 373 118 174 133 11 2 0 502 99 1 0 0 March 2, 2026 at 07:02:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2175 104 201 132 11 1 0 2036 98 2 0 0 1 0 0 0 154 11 139 120 14 2 0 615 100 0 0 0 2 0 0 101 338 104 134 107 12 6 0 258 100 0 0 0 3 0 0 0 239 44 212 151 12 3 0 209 100 0 0 0 4 0 0 0 141 3 99 100 9 1 0 195 100 0 0 0 5 0 0 7 148 10 134 114 6 3 0 442 100 0 0 0 6 0 0 0 141 2 110 110 11 5 0 580 100 0 0 0 7 0 0 3 362 106 164 129 8 7 0 417 100 0 0 0 March 2, 2026 at 07:02:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2175 106 158 110 8 2 0 1916 98 2 0 0 1 0 0 0 148 3 108 105 6 1 0 479 100 0 0 0 2 0 0 129 310 102 113 95 9 2 0 293 100 0 0 0 3 0 0 0 193 23 147 122 12 1 0 232 100 0 0 0 4 0 0 0 176 6 161 132 13 3 0 267 100 0 0 0 5 0 0 7 143 5 110 101 15 3 0 460 100 0 0 0 6 0 0 0 200 31 192 138 19 3 0 605 100 0 0 0 7 0 0 3 313 104 85 93 9 0 0 243 100 0 0 0 March 2, 2026 at 07:02:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2170 103 120 100 9 3 0 1928 98 2 0 0 1 0 0 0 204 14 172 130 12 3 0 598 100 0 0 0 2 0 0 115 356 117 161 121 12 6 0 233 100 0 0 0 3 0 0 0 153 1 99 99 7 4 0 134 100 0 0 0 4 0 0 0 120 5 100 97 7 2 0 206 100 0 0 0 5 0 0 7 178 8 198 145 14 4 0 586 100 0 0 0 6 0 0 7 208 27 211 151 11 14 0 719 99 1 0 0 7 0 0 3 331 104 128 114 15 3 0 294 100 0 0 0 March 2, 2026 at 07:02:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2171 104 142 106 8 1 0 1863 99 1 0 0 1 0 0 0 188 5 191 146 9 6 0 673 100 0 0 0 2 0 0 100 435 151 250 163 12 8 0 274 100 0 0 0 3 0 0 0 163 1 165 127 14 5 0 484 99 1 0 0 4 0 0 0 120 4 107 102 9 3 0 231 100 0 0 0 5 0 0 7 153 4 118 108 12 1 0 555 100 0 0 0 6 0 0 0 163 6 153 128 9 2 0 532 100 0 0 0 7 0 0 4 338 103 108 99 9 4 0 226 100 0 0 0 March 2, 2026 at 07:02:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2150 103 104 90 7 0 0 1891 99 1 0 0 1 0 0 0 162 4 142 115 12 2 0 533 100 0 0 0 2 0 0 87 368 121 153 127 11 3 0 230 100 0 0 0 3 0 0 0 152 21 119 108 8 3 0 158 100 0 0 0 4 0 0 0 129 3 125 111 9 3 0 295 100 0 0 0 5 0 0 7 143 10 134 114 10 4 0 525 100 0 0 0 6 0 0 0 182 10 190 140 13 3 0 629 100 0 0 0 7 0 0 3 357 104 160 128 12 3 0 318 100 0 0 0 March 2, 2026 at 07:02:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2143 103 87 79 5 1 0 1848 99 1 0 0 1 0 0 0 146 9 118 103 9 0 0 539 100 0 0 0 2 0 0 101 342 104 149 123 9 3 0 222 100 0 0 0 3 0 0 0 135 7 117 112 8 3 0 339 100 0 0 0 4 0 0 0 198 8 194 140 13 10 0 319 100 0 0 0 5 0 0 7 176 32 158 125 7 2 0 473 100 0 0 0 6 0 0 0 164 11 150 127 9 2 0 594 100 0 0 0 7 0 0 3 372 106 156 130 8 1 0 259 100 0 0 0 March 2, 2026 at 07:02:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2159 104 120 88 11 1 0 1975 98 2 0 0 1 0 0 0 181 4 166 131 12 6 0 591 100 0 0 0 2 0 0 101 335 104 136 115 12 2 0 246 100 0 0 0 3 0 0 0 196 26 206 139 14 6 0 293 100 0 0 0 4 0 0 0 141 4 103 93 13 3 0 246 100 0 0 0 5 0 0 7 190 26 162 129 8 4 0 491 100 0 0 0 6 0 0 0 108 3 60 83 3 1 0 435 100 0 0 0 7 0 0 3 368 108 165 131 4 1 0 255 100 0 0 0 March 2, 2026 at 07:02:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2162 104 119 96 12 4 0 1921 99 1 0 0 1 0 0 0 158 3 159 131 7 5 0 608 100 0 0 0 2 3 0 101 358 111 189 139 15 8 0 335 99 1 0 0 3 0 0 0 185 28 163 130 8 1 0 308 100 0 0 0 4 0 0 0 207 7 257 164 15 8 0 407 99 1 0 0 5 3 0 7 199 21 182 137 17 5 0 517 100 0 0 0 6 0 0 0 120 2 68 89 15 5 0 559 100 0 0 0 7 0 0 3 329 105 93 96 13 2 0 166 100 0 0 0 March 2, 2026 at 07:02:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2158 107 132 98 13 2 0 1882 99 1 0 0 1 0 0 0 116 1 82 92 9 0 0 447 100 0 0 0 2 0 0 101 317 102 107 102 8 0 0 232 100 0 0 0 3 0 0 0 152 23 131 108 5 4 0 207 100 0 0 0 4 0 0 0 182 8 200 145 10 5 0 369 100 0 0 0 5 0 0 7 149 8 132 111 15 2 0 478 100 0 0 0 6 0 0 0 185 19 171 131 19 4 0 565 100 0 0 0 7 0 0 3 328 103 90 91 9 0 0 194 100 0 0 0 March 2, 2026 at 07:02:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 126 124 77 11 0 0 1631 78 1 0 21 1 0 0 14 118 19 92 55 16 1 0 675 68 0 0 32 2 0 0 3 291 111 48 49 6 0 0 49 77 0 0 23 3 0 0 0 60 0 12 45 2 0 0 44 81 0 0 19 4 2 0 0 97 7 100 70 7 2 0 159 65 0 0 35 5 0 0 7 79 2 43 56 1 1 0 353 73 0 0 27 6 0 0 0 113 2 91 45 5 0 0 375 65 0 0 35 7 0 0 3 271 104 54 54 5 0 0 144 67 0 0 33 March 2, 2026 at 07:02:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 105 144 1 4 1 0 1438 0 1 0 99 1 3 0 14 24 3 23 1 3 3 0 597 0 0 0 100 2 0 0 17 329 157 129 0 5 0 0 20 0 0 0 100 3 0 0 0 17 0 16 1 2 0 0 14 0 0 0 100 4 2 0 0 18 3 8 0 0 2 0 9 0 0 0 100 5 0 0 7 19 8 10 0 0 0 0 266 0 0 0 100 6 0 0 0 16 2 8 0 1 1 0 298 0 0 0 100 7 6 0 3 224 102 14 0 4 0 0 9 0 0 0 100 March 2, 2026 at 07:02:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 106 146 1 3 0 0 1427 0 1 0 99 1 0 0 14 15 4 14 0 0 0 0 567 0 0 0 100 2 0 0 3 253 122 44 0 0 0 0 15 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 5 0 0 7 9 2 8 0 1 0 0 263 0 0 0 100 6 0 0 0 18 5 14 0 0 0 0 299 0 0 0 100 7 0 0 3 290 137 88 0 5 0 0 0 0 0 0 100 March 2, 2026 at 07:02:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 155 254 2 4 0 0 1437 0 1 0 99 1 0 0 14 20 6 20 0 3 1 0 584 0 0 0 100 2 0 0 3 218 104 12 0 1 2 0 20 0 0 0 100 3 0 0 0 9 1 2 0 0 1 0 3 0 0 0 100 4 0 0 0 13 4 6 0 0 1 0 0 0 0 0 100 5 0 0 7 12 4 6 0 0 1 0 262 0 0 0 100 6 0 0 0 12 3 4 1 0 1 0 294 0 0 0 100 7 0 0 3 224 102 18 0 1 1 0 0 0 0 0 100 March 2, 2026 at 07:02:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2397 108 584 19 53 7 0 3142 8 2 0 90 1 0 0 14 459 28 770 17 71 38 0 2005 3 1 0 95 2 0 0 283 502 123 528 17 51 17 0 1792 6 1 0 93 3 0 0 0 264 2 398 18 55 21 0 2228 9 1 0 90 4 0 0 0 303 6 473 8 60 14 0 1568 3 1 0 96 5 26 0 7 283 8 419 7 28 46 0 1482 3 1 0 96 6 0 0 0 292 7 472 9 35 12 0 1330 3 1 0 97 7 0 0 3 423 102 333 6 21 25 0 1265 4 1 0 95 March 2, 2026 at 07:02:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 53 2430 106 685 21 84 18 1 3423 15 2 0 83 1 9 0 24 332 3 518 19 62 36 0 2774 15 2 0 83 2 1 0 255 350 109 232 10 28 11 0 1628 13 1 0 87 3 1 0 14 294 4 435 12 53 67 0 1597 5 1 0 94 4 15 0 0 378 49 538 9 46 12 0 794 2 1 0 98 5 0 0 7 217 5 310 4 32 32 0 1311 4 1 0 96 6 0 0 0 183 4 200 3 31 10 0 1265 1 1 0 98 7 20 0 3 400 103 258 11 16 55 0 2145 15 1 0 84 March 2, 2026 at 07:02:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 138 1 0 0 0 1034 0 1 0 99 1 0 0 14 83 37 84 0 1 0 0 278 0 0 0 100 2 0 0 4 218 104 10 0 0 0 0 6 0 0 0 100 3 0 0 0 17 1 13 0 2 0 0 307 0 0 0 100 4 0 0 0 56 25 48 0 1 0 0 29 0 0 0 100 5 0 0 7 28 11 22 0 1 0 0 263 0 0 0 100 6 0 0 0 33 2 14 0 0 0 0 594 0 0 0 100 7 0 0 23 217 103 12 0 2 0 0 1 0 0 0 100 March 2, 2026 at 07:02:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 101 188 2 29 232 0 1036 0 3 0 97 1 0 0 14 273 36 430 0 43 300 0 266 0 1 0 99 2 0 0 3 258 103 88 1 36 281 0 0 0 2 0 98 3 0 0 112 162 116 100 1 38 338 1 300 0 3 0 97 4 0 0 0 70 8 104 1 36 301 0 9 0 2 0 98 5 0 0 7 100 21 128 0 31 210 0 264 0 1 0 99 6 0 0 0 70 3 109 2 33 332 0 594 0 2 0 97 7 0 0 3 265 102 84 1 23 312 0 1 0 2 0 98 March 2, 2026 at 07:02:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2235 101 483 1 118 696 0 1034 0 3 0 97 1 0 0 14 429 31 851 0 108 625 0 266 0 2 0 98 2 0 0 4 487 105 628 0 113 657 1 3 0 2 0 98 3 0 0 7 501 363 331 2 116 676 0 300 0 3 0 97 4 0 0 0 156 7 378 1 115 779 0 7 0 2 0 98 5 0 0 7 167 13 378 1 113 699 0 262 0 2 0 98 6 0 0 0 151 2 351 1 103 612 0 594 0 2 0 97 7 0 0 2 372 114 382 0 102 778 0 0 0 2 0 98 March 2, 2026 at 07:02:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2337 102 590 4 139 1014 1 937 0 4 0 96 1 0 0 14 244 11 537 0 152 1063 0 310 0 3 0 97 2 0 0 4 422 104 483 2 126 936 0 114 0 3 0 97 3 0 0 0 611 400 1037 2 145 829 0 369 0 3 0 97 4 0 0 0 221 3 540 2 162 1147 0 53 0 3 0 97 5 0 0 7 231 7 504 1 138 1026 0 1087 0 3 0 97 6 0 0 0 272 29 568 0 140 1139 1 584 0 3 0 96 7 0 0 2 594 122 845 1 148 881 0 1039 0 3 0 97 March 2, 2026 at 07:02:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 3 2184 103 229 0 15 51 10 150 0 1 0 99 1 16 0 14 118 20 155 0 21 48 2 388 0 0 0 100 2 13 0 3 317 130 135 0 10 35 6 44 0 0 0 100 3 4 0 0 128 65 208 0 17 37 2 347 0 0 0 100 4 18 0 0 71 2 107 0 19 46 3 81 0 0 0 100 5 717 0 120 56 3 102 1 15 39 5 377 0 1 0 99 6 136 0 0 111 13 170 0 18 50 18 472 0 1 0 99 7 2630 0 3 278 104 136 3 16 42 7 8243 2 2 0 96 March 2, 2026 at 07:02:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 120 0 1 0 0 0 0 1 0 99 1 0 0 14 17 3 18 0 1 0 0 279 0 0 0 100 2 0 0 3 315 153 108 0 0 0 0 6 0 0 0 100 3 0 0 0 12 1 10 0 1 0 0 307 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 1 0 0 0 100 5 1 0 7 19 10 10 0 0 1 0 264 0 0 0 100 6 0 0 0 35 11 30 0 2 0 0 311 0 0 0 100 7 0 0 3 222 104 46 2 0 3 0 1412 0 0 0 99 March 2, 2026 at 07:02:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 104 0 0 0 0 0 0 1 0 99 1 0 0 14 17 3 22 0 1 0 0 267 0 0 0 100 2 0 0 3 311 153 107 0 1 0 0 0 0 0 0 100 3 0 0 0 11 1 6 1 1 2 0 300 0 0 0 100 4 0 0 0 10 2 4 0 1 2 0 0 0 0 0 100 5 0 0 7 9 2 6 0 0 1 0 260 0 0 0 100 6 0 0 0 29 7 22 1 0 0 0 306 0 0 0 100 7 0 0 3 217 104 38 2 0 0 0 1412 0 0 0 100 March 2, 2026 at 07:02:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 112 1 0 1 0 7 0 1 0 99 1 0 0 14 12 3 4 1 1 1 0 290 0 0 0 100 2 0 0 7 310 149 105 0 3 0 0 0 0 0 0 100 3 0 0 0 18 5 10 0 1 1 0 300 0 0 0 100 4 0 0 0 16 3 12 0 1 1 0 12 0 0 0 100 5 0 0 7 13 4 6 0 0 1 0 262 0 0 0 100 6 0 0 0 36 13 32 0 0 1 0 335 0 0 0 100 7 0 0 7 218 104 42 0 0 1 0 1415 0 0 0 99 March 2, 2026 at 07:02:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 127 165 0 4 1 0 5 0 1 0 99 1 0 0 14 20 6 19 0 3 2 0 267 0 0 0 100 2 0 0 4 220 104 16 0 1 0 0 0 0 0 0 100 3 0 0 0 55 23 48 0 2 0 0 300 0 0 0 100 4 0 0 0 14 4 8 0 2 0 0 1 0 0 0 100 5 0 0 7 14 4 13 0 2 0 0 264 0 0 0 100 6 0 0 0 32 12 26 0 0 0 0 314 0 0 0 100 7 0 0 2 220 105 44 1 0 0 0 1419 0 0 0 99 March 2, 2026 at 07:03:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 128 162 0 2 0 0 0 0 1 0 99 1 0 0 14 54 23 50 0 1 0 0 266 0 0 0 100 2 21 0 3 212 103 6 0 0 0 0 5 0 0 0 100 3 0 0 0 18 2 18 0 1 0 0 305 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 0 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 262 0 0 0 100 6 0 0 0 26 10 22 0 0 0 0 311 0 0 0 100 7 0 0 3 216 104 38 1 0 1 0 1407 0 0 0 99 March 2, 2026 at 07:03:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 150 204 0 0 0 0 0 0 1 0 99 1 0 0 14 21 3 24 0 0 0 0 281 0 0 0 100 2 0 0 3 214 103 8 0 0 0 0 6 0 0 0 100 3 0 0 0 15 1 10 1 0 0 0 307 0 0 0 100 4 0 0 0 10 3 6 0 1 0 0 0 0 0 0 100 5 0 0 7 14 8 4 0 0 0 0 260 0 0 0 100 6 0 0 0 23 8 18 1 0 0 0 309 0 0 0 100 7 0 0 3 222 105 46 1 0 0 0 1408 0 0 0 100 March 2, 2026 at 07:03:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 150 200 0 0 0 0 0 0 1 0 99 1 0 0 14 18 1 20 0 2 0 0 296 0 0 0 100 2 0 0 3 213 103 8 0 1 1 0 0 0 0 0 100 3 0 0 0 12 1 9 0 2 1 0 300 0 0 0 100 4 0 0 0 23 5 22 0 1 0 0 30 0 0 0 100 5 0 0 7 11 3 8 0 0 1 0 262 0 0 0 100 6 0 0 0 26 10 22 0 0 0 0 311 0 0 0 100 7 0 0 3 218 105 39 1 0 0 0 1366 0 0 0 100 March 2, 2026 at 07:03:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 147 202 0 0 0 0 0 0 1 0 99 1 0 0 14 20 6 18 0 1 0 0 561 0 0 0 100 2 0 0 3 213 103 6 0 1 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 4 0 0 0 12 3 6 0 1 0 0 1 0 0 0 100 5 0 0 7 13 2 14 0 1 0 0 260 0 0 0 100 6 0 0 0 24 9 20 0 0 0 0 307 0 0 0 100 7 0 0 3 214 103 38 1 1 1 0 1113 0 0 0 100 March 2, 2026 at 07:03:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 116 0 0 0 0 16 0 1 0 99 1 0 0 14 54 24 50 1 2 0 0 564 0 0 0 100 2 0 0 4 210 103 4 0 0 0 0 0 0 0 0 100 3 0 0 0 66 29 62 0 1 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 5 0 0 7 11 3 8 0 0 0 0 265 0 0 0 100 6 0 0 0 19 6 16 0 0 1 0 324 0 0 0 100 7 0 0 2 227 108 54 1 0 0 0 1125 0 0 0 99 March 2, 2026 at 07:03:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 123 154 0 1 0 0 0 0 1 0 99 1 0 0 14 19 6 16 0 1 0 0 561 0 0 0 100 2 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 3 0 0 0 58 25 50 1 0 0 0 301 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 5 0 0 7 10 2 6 0 1 0 0 260 0 0 0 100 6 0 0 0 19 2 22 0 1 0 0 300 0 0 0 100 7 0 0 3 226 109 48 1 0 0 0 1123 0 0 0 99 March 2, 2026 at 07:03:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 110 0 0 1 0 0 0 1 0 99 1 0 0 14 58 25 56 0 0 0 0 572 0 0 0 100 2 0 0 4 217 104 11 0 1 0 0 6 0 0 0 100 3 0 0 0 71 29 71 0 2 0 0 307 0 0 0 100 4 0 0 0 11 3 4 0 0 0 0 1 0 0 0 100 5 0 0 7 16 9 6 0 0 0 0 262 0 0 0 100 6 0 0 0 16 4 12 0 1 0 0 302 0 0 0 100 7 0 0 2 232 108 60 1 1 0 0 1118 0 0 0 99 March 2, 2026 at 07:03:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 106 0 3 0 0 0 0 1 0 99 1 0 0 14 14 4 14 0 1 0 0 562 0 0 0 100 2 0 0 4 214 104 6 0 0 0 0 0 0 0 0 100 3 0 0 0 107 48 99 0 1 0 0 300 0 0 0 100 4 0 0 0 16 5 12 0 1 0 0 1 0 0 0 100 5 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 16 5 12 0 0 0 0 304 0 0 0 100 7 0 0 2 228 110 50 1 0 0 0 1120 0 0 0 99 March 2, 2026 at 07:03:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 127 0 0 5511 105 7392 76 279 56 0 20743 15 11 0 74 1 27 0 0 3033 8 6246 81 303 69 0 17189 18 9 0 74 2 152 0 4 2452 110 4491 43 193 43 0 12895 11 7 0 81 3 172 0 0 2952 10 5978 49 230 47 0 14270 10 7 0 82 4 93 0 0 2069 29 4120 40 182 63 0 10269 9 6 0 85 5 7 0 0 1336 17 2701 15 72 47 0 6395 6 4 0 90 6 38 0 0 2341 11 4947 34 163 36 0 11388 10 7 0 84 7 55 0 23 1719 109 3542 25 93 45 0 13075 8 5 0 87 March 2, 2026 at 07:03:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 6640 116 9437 71 367 119 0 23277 21 14 0 65 1 10 0 21 4402 16 8931 66 400 102 0 22733 18 12 0 70 2 17 0 3 3432 113 6487 46 258 89 0 17125 15 9 0 76 3 10 0 0 4012 11 8337 43 330 82 0 19990 17 11 0 72 4 2 0 0 3115 10 6384 42 257 84 0 14472 13 8 0 78 5 7 0 0 2741 8 5980 24 154 63 0 16272 14 9 0 76 6 4 0 0 3367 20 7240 40 262 82 0 17055 13 10 0 77 7 2 0 3 2697 114 5374 23 149 71 0 14142 13 8 0 79 March 2, 2026 at 07:03:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 6851 105 10010 60 428 164 0 26112 23 15 0 62 1 16 0 0 4794 22 10021 62 453 92 0 23526 20 13 0 67 2 11 0 24 3743 110 7349 42 283 100 0 22878 20 12 0 68 3 10 0 0 4357 12 9067 57 349 62 0 20767 17 11 0 71 4 8 0 0 2720 14 5527 36 256 129 0 13127 12 8 0 80 5 4 0 0 2440 13 5105 18 157 80 0 13636 11 8 0 81 6 5 0 0 3202 12 6728 45 242 76 0 16039 13 9 0 78 7 5 0 3 2322 119 4411 22 125 44 0 9383 9 6 0 85 March 2, 2026 at 07:03:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 3044 134 1939 12 75 31 0 5635 5 4 0 91 1 1 0 0 1175 5 2482 7 92 31 0 5648 4 3 0 93 2 0 0 25 935 108 1530 3 59 9 0 3908 3 2 0 94 3 4 0 0 1160 8 2451 6 82 20 0 5783 4 3 0 93 4 1 0 0 1218 3 2506 6 69 31 0 5030 5 3 0 92 5 5 0 0 739 12 1552 8 35 26 0 5167 4 3 0 93 6 0 0 0 1195 2 2569 4 55 14 0 7048 5 4 0 91 7 1 0 2 608 114 801 4 41 16 0 2233 2 2 0 96 March 2, 2026 at 07:03:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2253 101 425 0 38 223 0 0 0 2 0 98 1 0 0 0 94 24 143 1 32 200 0 300 0 2 0 98 2 0 0 25 288 118 150 1 31 226 0 526 0 2 0 98 3 0 0 0 170 119 104 2 27 240 0 299 0 2 0 98 4 0 0 0 43 1 94 0 31 281 0 0 0 1 0 99 5 0 0 0 87 17 141 1 25 140 0 300 0 1 0 99 6 0 0 0 53 2 139 2 27 216 0 1122 0 2 0 98 7 0 0 2 256 106 110 1 35 238 0 8 0 2 0 98 March 2, 2026 at 07:03:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2327 105 597 1 84 412 0 8 0 2 0 98 1 0 0 9 352 2 751 1 99 485 0 559 0 2 0 98 2 0 0 15 324 104 288 3 91 529 0 267 0 2 0 98 3 0 0 0 468 347 286 0 99 492 0 299 0 2 0 98 4 0 0 0 123 2 301 1 88 541 0 4 0 2 0 98 5 0 0 0 118 3 269 2 77 502 0 300 0 2 0 98 6 0 0 0 155 21 344 2 90 494 0 1123 0 2 0 98 7 0 0 3 380 132 355 0 80 504 0 0 0 2 0 98 March 2, 2026 at 07:03:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2269 101 468 2 96 525 1 16 0 2 0 98 1 0 0 14 312 9 630 4 103 473 1 575 0 2 0 98 2 0 0 11 375 109 378 4 97 573 1 265 0 2 0 98 3 0 0 0 526 349 833 0 106 581 1 294 0 2 0 98 4 0 0 0 232 37 433 1 100 569 0 4 0 2 0 98 5 0 0 0 159 2 369 1 98 579 0 302 0 2 0 98 6 0 0 0 174 4 414 3 108 522 0 1127 0 2 0 98 7 0 0 2 363 109 350 1 95 530 2 7 0 2 0 98 March 2, 2026 at 07:03:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 122 0 3 0 0 2 0 1 0 99 1 0 0 14 34 15 32 0 2 0 0 572 0 0 0 100 2 0 0 3 214 101 6 0 0 0 0 0 0 0 0 100 3 0 0 0 100 46 90 0 1 0 0 294 0 0 0 100 4 0 0 0 8 1 2 0 1 0 0 0 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 561 0 0 0 100 6 0 0 0 12 2 36 1 1 0 0 1122 0 0 0 100 7 0 0 3 215 103 8 0 0 0 0 1 0 0 0 100 March 2, 2026 at 07:03:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 122 1 0 0 0 11 0 1 0 99 1 0 0 14 23 9 22 0 1 0 0 576 0 0 0 100 2 0 0 4 212 102 6 0 0 0 0 8 0 0 0 100 3 0 0 0 113 51 108 1 0 0 0 300 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 5 0 0 7 16 8 6 0 0 0 0 559 0 0 0 100 6 0 0 0 10 2 34 1 0 0 0 1122 0 0 0 100 7 0 0 2 225 107 20 0 0 0 0 10 0 0 0 100 March 2, 2026 at 07:03:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 0 0 1 0 99 1 0 0 14 32 9 38 0 3 3 0 572 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 113 52 106 0 0 1 0 294 0 0 0 100 4 0 0 0 9 2 4 0 0 2 0 0 0 0 0 100 5 0 0 7 12 3 10 1 1 0 0 560 0 0 0 100 6 0 0 0 11 2 36 0 0 3 0 1122 0 0 0 100 7 0 0 3 212 102 6 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:03:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2175 115 129 83 7 3 0 447 68 1 0 31 1 0 0 0 227 11 309 166 15 3 0 824 68 1 0 31 2 13 0 175 326 105 164 101 19 5 1 524 68 0 0 31 3 0 0 0 263 20 348 178 18 9 0 833 68 1 0 31 4 6 0 0 139 5 155 88 17 3 0 335 68 0 0 31 5 20 0 7 161 4 172 109 12 1 0 672 68 1 0 31 6 1847 0 7 89 3 70 53 8 4 1 1857 68 1 0 31 7 539 0 7 373 125 165 113 8 5 0 568 68 1 0 31 March 2, 2026 at 07:03:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2214 125 245 161 11 4 0 318 99 1 0 0 1 0 0 0 188 26 136 120 9 4 0 527 100 0 0 0 2 2 0 129 344 103 174 124 13 7 0 581 100 0 0 0 3 1 0 0 160 6 126 110 16 1 0 560 100 0 0 0 4 0 0 0 144 5 158 120 15 8 0 289 100 0 0 0 5 0 0 0 142 7 139 120 5 1 0 239 100 0 0 0 6 0 0 7 90 4 73 67 12 1 0 1876 99 1 0 0 7 0 0 3 340 104 128 116 8 0 0 238 100 0 0 0 March 2, 2026 at 07:03:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2187 103 125 113 7 2 0 219 99 1 0 0 1 0 0 0 136 8 112 104 10 6 0 532 100 0 0 0 2 0 0 115 326 103 133 116 6 8 0 482 100 0 0 0 3 0 0 0 167 5 184 140 6 4 0 390 100 0 0 0 4 1 0 0 201 21 204 150 10 7 0 733 100 0 0 0 5 1 0 0 142 17 103 95 13 4 0 214 100 0 0 0 6 1 0 7 210 6 252 153 9 5 0 2026 99 1 0 0 7 0 0 3 371 118 164 127 9 3 0 375 100 0 0 0 March 2, 2026 at 07:03:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 103 113 103 10 2 0 171 99 1 0 0 1 0 0 0 178 28 159 128 7 6 0 595 100 0 0 0 2 0 0 129 332 104 134 113 14 10 0 456 100 0 0 0 3 0 0 0 173 3 190 140 13 1 0 271 100 0 0 0 4 0 0 0 150 4 151 124 8 6 0 525 100 0 0 0 5 0 0 0 173 7 149 122 9 6 0 217 100 0 0 0 6 0 0 7 203 30 214 131 14 3 0 2099 99 1 0 0 7 0 0 3 318 104 75 87 10 5 0 229 100 0 0 0 March 2, 2026 at 07:03:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 101 141 116 10 2 0 385 99 1 0 0 1 0 0 0 191 26 173 131 13 5 0 598 100 0 0 0 2 0 0 87 317 107 103 96 9 0 0 479 100 0 0 0 3 0 0 0 152 3 134 117 7 7 0 215 100 0 0 0 4 0 0 0 133 4 135 118 8 2 0 585 100 0 0 0 5 0 0 0 161 2 122 111 8 1 0 218 100 0 0 0 6 0 0 7 187 28 221 139 10 7 0 1952 99 1 0 0 7 0 0 10 342 108 138 117 8 2 0 268 100 0 0 0 March 2, 2026 at 07:03:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 102 62 80 6 2 0 240 99 1 0 0 1 0 0 0 166 4 174 138 5 6 0 566 100 0 0 0 2 0 0 129 372 126 179 123 13 5 0 579 100 0 0 0 3 0 0 0 148 4 109 108 8 4 0 184 100 0 0 0 4 0 0 0 127 6 103 103 9 0 0 516 100 0 0 0 5 0 0 0 184 16 177 138 10 1 0 223 100 0 0 0 6 0 0 7 150 5 171 121 10 11 0 1951 99 1 0 0 7 0 0 3 389 119 172 137 13 4 0 324 100 0 0 0 March 2, 2026 at 07:03:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 102 127 112 11 1 0 297 99 1 0 0 1 0 0 0 226 31 233 161 9 5 0 596 100 0 0 0 2 0 0 143 369 105 233 157 17 6 0 685 99 1 0 0 3 0 0 0 155 1 138 118 13 3 0 249 100 0 0 0 4 0 0 0 122 2 96 95 8 4 0 523 100 0 0 0 5 0 0 0 139 3 103 99 11 5 0 283 100 0 0 0 6 0 0 7 132 9 147 98 8 6 0 1968 99 1 0 0 7 0 0 3 412 131 194 134 13 3 0 285 100 0 0 0 March 2, 2026 at 07:03:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 100 58 77 12 0 0 126 99 1 0 0 1 0 0 0 218 53 191 145 8 2 0 438 100 0 0 0 2 2 0 86 335 104 156 126 6 4 0 325 100 0 0 0 3 1 0 0 157 2 193 148 8 2 0 352 100 0 0 0 4 0 0 14 137 3 161 128 11 3 0 1013 99 1 0 0 5 0 0 0 133 1 99 94 19 2 0 411 100 0 0 0 6 5 0 7 130 4 118 98 12 6 0 1833 99 1 0 0 7 0 0 4 375 108 153 124 13 1 0 214 100 0 0 0 March 2, 2026 at 07:03:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 100 114 105 14 1 0 314 99 1 0 0 1 0 0 0 173 17 133 113 11 2 0 580 100 0 0 0 2 0 0 128 348 104 163 125 12 10 0 247 100 0 0 0 3 1 0 0 177 12 153 126 12 3 0 240 100 0 0 0 4 0 0 14 152 25 98 96 6 3 0 701 100 0 0 0 5 0 0 0 197 16 255 172 10 5 0 447 99 1 0 0 6 0 0 7 175 5 241 154 8 6 0 2087 99 1 0 0 7 0 0 11 370 107 155 126 7 8 0 244 100 0 0 0 March 2, 2026 at 07:03:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 101 100 94 11 6 0 234 99 1 0 0 1 0 0 0 138 4 141 115 18 4 0 524 100 0 0 0 2 0 0 115 337 102 149 114 19 7 0 259 100 0 0 0 3 0 0 0 135 3 96 95 10 0 0 201 100 0 0 0 4 0 0 14 138 3 109 109 10 8 0 815 100 0 0 0 5 0 0 0 214 26 212 157 9 1 0 299 100 0 0 0 6 0 0 7 190 32 184 127 8 7 0 1940 99 1 0 0 7 0 0 3 332 106 94 84 11 2 0 296 100 0 0 0 March 2, 2026 at 07:03:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 103 129 105 17 8 0 232 99 1 0 0 1 0 0 0 192 13 218 152 16 6 0 668 99 1 0 0 2 0 0 147 355 108 263 170 16 18 0 405 99 1 0 0 3 0 0 0 157 2 167 133 14 12 0 329 100 0 0 0 4 0 0 14 137 5 82 94 16 5 0 830 100 0 0 0 5 0 0 0 161 4 131 114 11 3 0 233 100 0 0 0 6 0 0 7 146 14 123 100 12 6 0 1960 99 1 0 0 7 0 0 7 439 142 213 152 16 4 0 290 100 0 0 0 March 2, 2026 at 07:03:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2157 102 66 84 8 1 0 429 99 1 0 0 1 0 0 0 212 26 213 154 12 7 0 611 99 1 0 0 2 0 0 143 351 104 149 125 6 1 0 172 100 0 0 0 3 0 0 0 138 2 130 100 16 3 0 312 100 0 0 0 4 0 0 14 149 7 139 119 11 4 0 774 100 0 0 0 5 0 0 0 196 24 218 142 21 2 0 426 100 0 0 0 6 0 0 0 144 9 134 102 11 3 0 1686 99 1 0 0 7 0 0 3 364 103 107 105 8 2 0 246 98 2 0 0 March 2, 2026 at 07:03:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2157 103 63 81 9 2 0 485 99 1 0 0 1 0 0 0 182 29 142 116 10 5 0 504 100 0 0 0 2 0 0 114 324 102 173 128 12 11 0 312 99 1 0 0 3 0 0 0 146 5 150 128 13 6 0 347 100 0 0 0 4 0 0 14 158 4 181 137 16 7 0 814 100 0 0 0 5 0 0 0 180 2 173 137 17 5 0 321 100 0 0 0 6 0 0 7 167 13 160 109 12 5 0 1760 99 1 0 0 7 0 0 4 406 122 176 139 11 1 0 265 99 1 0 0 March 2, 2026 at 07:03:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2157 103 70 84 10 1 0 488 99 1 0 0 1 0 0 0 186 23 177 129 11 4 0 586 100 0 0 0 2 0 0 101 314 104 115 103 10 4 0 228 100 0 0 0 3 0 0 0 135 5 114 104 11 3 0 230 100 0 0 0 4 0 0 14 178 15 212 155 9 3 0 665 100 0 0 0 5 0 0 0 172 16 174 127 9 3 0 617 100 0 0 0 6 0 0 0 191 11 226 140 13 5 0 1624 99 1 0 0 7 0 0 3 318 103 83 87 11 2 0 243 99 1 0 0 March 2, 2026 at 07:03:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2150 103 91 88 17 3 0 513 99 1 0 0 1 0 0 0 177 4 203 148 15 6 0 594 100 0 0 0 2 0 0 101 322 103 145 114 13 3 0 236 100 0 0 0 3 0 0 0 118 1 71 85 11 5 0 298 100 0 0 0 4 0 0 14 123 3 83 96 9 1 0 468 100 0 0 0 5 0 0 0 112 2 56 79 7 0 0 367 100 0 0 0 6 0 0 0 266 54 318 186 14 5 0 1801 99 1 0 0 7 0 0 3 380 111 231 161 10 6 0 406 99 1 0 0 March 2, 2026 at 07:03:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2168 104 91 99 9 0 0 556 99 1 0 0 1 0 0 0 169 29 111 105 10 1 0 474 100 0 0 0 2 0 0 115 327 104 137 115 8 6 0 202 100 0 0 0 3 0 0 0 149 1 140 113 12 3 0 253 100 0 0 0 4 0 0 14 116 3 86 83 13 4 0 436 100 0 0 0 5 0 0 0 148 2 133 118 13 0 0 481 100 0 0 0 6 0 0 0 196 9 228 145 13 5 0 1843 99 1 0 0 7 0 0 3 398 126 210 148 12 7 0 327 99 1 0 0 March 2, 2026 at 07:03:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2194 107 124 115 13 2 0 471 99 1 0 0 1 0 0 0 137 15 107 95 15 1 0 523 100 0 0 0 2 0 0 129 341 103 159 122 18 7 0 284 100 0 0 0 3 0 0 0 165 3 164 126 19 2 0 330 100 0 0 0 4 0 0 14 249 40 278 174 19 5 0 697 99 1 0 0 5 3 0 0 147 3 121 111 14 2 0 514 100 0 0 0 6 3 0 0 153 3 160 119 15 7 0 1786 99 1 0 0 7 0 0 3 375 106 182 133 17 2 0 381 99 1 0 0 March 2, 2026 at 07:03:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2174 103 145 118 15 3 0 499 99 1 0 0 1 0 0 0 155 6 158 127 14 6 0 610 100 0 0 0 2 0 0 73 374 127 203 146 16 10 0 294 100 0 0 0 3 0 0 0 164 2 151 124 6 3 0 360 100 0 0 0 4 0 0 14 164 16 158 114 16 2 0 532 100 0 0 0 5 0 0 0 148 12 135 120 10 4 0 526 100 0 0 0 6 0 0 0 133 6 170 108 11 6 0 1769 99 1 0 0 7 0 0 3 322 103 81 87 11 7 0 123 100 0 0 0 March 2, 2026 at 07:03:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2128 103 60 65 4 0 0 318 85 1 0 14 1 1 0 0 109 7 67 70 7 0 0 418 89 0 0 11 2 0 0 31 406 152 214 118 8 2 0 243 82 0 0 17 3 0 0 0 93 2 68 71 5 2 0 132 90 0 0 9 4 0 0 14 94 4 61 60 11 2 0 391 87 0 0 13 5 0 0 0 84 7 41 59 8 2 0 71 84 0 0 16 6 0 0 0 120 8 114 77 8 0 0 1916 88 1 0 12 7 0 0 3 281 104 33 56 4 1 0 88 82 0 0 18 March 2, 2026 at 07:03:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2118 103 112 0 2 4 0 271 0 1 0 99 1 0 0 0 15 2 12 0 1 0 0 317 0 0 0 100 2 0 0 17 275 132 69 0 3 0 0 4 0 0 0 100 3 0 0 0 19 3 14 0 2 0 0 8 0 0 0 100 4 2 0 14 60 25 60 0 1 1 0 283 0 0 0 100 5 0 0 0 19 1 14 0 2 1 0 8 0 0 0 100 6 6 0 0 20 3 42 3 1 2 0 1738 0 0 0 99 7 0 0 3 217 104 11 1 1 0 0 2 0 0 0 100 March 2, 2026 at 07:03:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 747 0 7 2141 103 83 2 10 10 5 6782 2 2 0 96 1 12 0 0 99 3 90 0 8 4 3 352 0 0 0 100 2 0 0 3 238 102 23 0 6 4 0 35 0 0 0 100 3 5 0 0 94 31 80 0 4 4 2 41 0 0 0 100 4 2605 0 127 78 28 106 2 4 13 13 674 1 1 0 98 5 143 0 0 70 6 89 0 14 13 16 181 0 0 0 100 6 28 0 2 60 4 103 2 13 13 5 2013 0 0 0 99 7 34 0 3 249 105 49 0 8 4 5 119 0 0 0 100 March 2, 2026 at 07:03:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 46 0 2 0 0 260 0 1 0 99 1 0 0 0 77 2 70 0 0 0 0 307 0 0 0 100 2 0 0 3 212 102 4 0 1 1 0 0 0 0 0 100 3 0 0 0 55 23 50 0 1 0 0 7 0 0 0 100 4 0 0 14 81 38 80 0 2 0 0 278 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 17 3 42 1 3 0 0 1810 0 0 0 99 7 0 0 3 222 102 22 0 4 0 0 3 0 0 0 100 March 2, 2026 at 07:03:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35 0 11 2162 103 213 4 34 45 13 407 0 1 0 99 1 779 0 19 44 3 63 4 19 839 5 456 1 1 0 98 2 1102 0 20 256 102 85 5 20 1356 6 299 0 4 0 96 3 67 0 11 97 5 171 2 36 60 21 230 0 1 0 99 4 40 0 25 172 55 250 5 39 53 14 568 0 0 0 99 5 41 0 14 62 10 81 1 17 1415 7 172 0 1 0 99 6 19 0 22 49 4 110 1 22 1121 2 1880 0 1 0 98 7 66 0 22 273 104 131 6 32 62 9 240 0 1 0 99 March 2, 2026 at 07:03:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 7 2132 103 132 0 2 4 2 272 0 1 0 99 1 18 0 0 131 52 134 0 3 7 5 322 0 0 0 100 2 3 0 12 228 103 17 0 3 5 2 12 0 0 0 100 3 10 0 0 76 23 67 0 2 15 2 38 0 1 0 99 4 17 0 14 39 6 39 0 3 6 2 294 0 0 0 100 5 25 0 7 41 6 46 0 4 4 13 46 0 0 0 100 6 4 0 0 29 3 53 2 5 8 3 1444 0 0 0 100 7 7 0 60 228 103 28 1 2 5 2 23 0 2 0 98 March 2, 2026 at 07:03:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2181 103 116 0 0 0 0 258 0 1 0 99 1 0 0 1 186 52 112 0 1 2 0 300 0 0 0 100 2 0 0 3 283 101 4 0 1 0 0 0 0 0 0 100 3 0 0 462 22 2 14 0 2 3 0 0 0 1 0 99 4 0 0 14 121 23 44 0 0 0 0 306 0 0 0 100 5 0 0 0 82 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 88 3 36 2 0 1 0 1340 0 0 0 99 7 0 0 52 286 104 12 0 1 4 0 3 0 1 0 99 March 2, 2026 at 07:03:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 2 0 0 3 211 101 4 0 0 0 0 0 0 0 0 100 3 0 0 0 11 1 4 0 1 0 0 0 0 0 0 100 4 1 0 14 50 23 48 0 1 0 0 311 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 36 0 0 0 0 1339 0 0 0 100 7 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 March 2, 2026 at 07:03:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 112 52 106 1 1 0 0 300 0 0 0 100 2 0 0 3 214 101 14 0 1 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 48 23 44 0 0 0 0 287 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 37 1 0 0 0 1301 0 0 0 100 7 0 0 3 213 103 9 0 2 0 0 44 0 0 0 100 March 2, 2026 at 07:03:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 118 0 1 0 0 259 0 1 0 99 1 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 2 0 0 3 210 101 4 0 0 0 0 0 0 0 0 100 3 0 0 0 15 1 14 0 1 0 0 4 0 0 0 100 4 0 0 14 50 23 48 0 0 0 0 293 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 2 0 0 0 100 6 0 0 0 11 2 34 2 0 1 0 1045 0 0 0 100 7 0 0 3 213 103 6 1 0 0 0 294 0 0 0 100 March 2, 2026 at 07:03:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 120 0 1 0 0 259 0 1 0 99 1 1 0 0 112 52 112 0 1 0 0 311 0 0 0 100 2 0 0 3 209 101 6 0 2 0 0 4 0 0 0 100 3 0 0 0 13 1 6 0 0 0 0 1 0 0 0 100 4 0 0 14 52 23 48 0 0 0 0 294 0 0 0 100 5 0 0 0 18 7 6 0 0 1 0 3 0 0 0 100 6 0 0 0 10 2 34 1 0 1 0 1043 0 0 0 100 7 0 0 3 218 104 12 0 0 1 0 296 0 0 0 100 March 2, 2026 at 07:03:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 116 0 1 0 0 259 0 1 0 99 1 0 0 0 112 52 108 0 0 0 0 300 0 0 0 100 2 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 14 2 8 0 1 0 0 0 0 0 0 100 4 0 0 14 52 22 52 0 1 0 0 285 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 34 0 0 0 0 1045 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:03:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 116 0 0 1 0 259 0 1 0 99 1 0 0 0 115 54 106 1 0 1 0 301 0 0 0 100 2 0 0 7 209 101 2 0 0 1 0 0 0 0 0 100 3 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 4 0 0 14 51 23 44 0 1 1 0 286 0 0 0 100 5 0 0 0 17 2 14 0 1 1 0 0 0 0 0 100 6 0 0 0 14 3 34 1 0 1 0 1043 0 0 0 99 7 0 0 7 216 104 10 0 0 0 0 296 0 0 0 100 March 2, 2026 at 07:03:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 103 114 0 0 0 0 258 0 1 0 99 1 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 2 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 4 0 0 14 46 22 44 0 1 0 0 286 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 34 3 0 1 0 1044 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:03:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 111 53 106 0 0 0 0 301 0 0 0 100 2 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 4 0 0 14 46 22 42 0 0 0 0 286 0 0 0 100 5 0 0 0 13 3 6 0 0 0 0 0 0 0 0 100 6 0 0 0 17 2 46 1 1 0 0 1044 0 0 0 100 7 0 0 3 217 105 10 1 0 0 0 297 0 0 0 100 March 2, 2026 at 07:03:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2135 128 165 0 1 0 0 259 0 1 0 99 1 0 0 0 66 28 62 0 2 0 0 308 0 0 0 100 2 0 0 3 212 102 6 0 0 0 0 8 0 0 0 100 3 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 4 1 0 14 50 22 50 0 0 0 0 295 0 0 0 100 5 0 0 0 15 7 4 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 38 0 1 0 0 1044 0 0 0 100 7 0 0 3 222 104 22 0 1 0 0 295 0 0 0 100 March 2, 2026 at 07:03:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 103 118 0 1 0 0 259 0 1 0 99 1 0 0 0 57 24 50 1 0 0 0 301 0 0 0 100 2 0 0 3 263 129 58 0 1 0 0 0 0 0 0 100 3 0 0 0 12 2 8 0 1 0 0 0 0 0 0 100 4 0 0 14 48 23 44 0 0 0 0 287 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 34 1 0 0 0 1045 0 0 0 100 7 0 0 3 217 105 10 0 0 0 0 297 0 0 0 100 March 2, 2026 at 07:03:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 106 120 0 2 0 0 259 0 1 0 99 1 0 0 0 14 2 14 0 1 0 0 299 0 0 0 100 2 0 0 3 303 148 96 0 1 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 4 0 0 14 33 15 26 0 0 0 0 278 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 6 0 0 0 28 10 52 2 1 1 0 1052 0 0 0 100 7 0 0 3 214 103 8 0 1 0 0 294 0 0 0 100 March 2, 2026 at 07:03:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2130 125 148 0 1 0 0 259 0 1 0 99 1 0 0 0 69 30 64 0 1 0 0 301 0 0 0 100 2 0 0 3 220 101 19 0 3 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 50 22 74 1 0 1 0 1065 0 0 0 100 7 0 0 3 215 104 10 1 1 0 0 296 0 0 0 100 March 2, 2026 at 07:03:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 108 0 1 1 0 259 0 1 0 99 1 0 0 0 110 52 108 0 2 0 0 300 0 0 0 100 2 0 0 3 214 101 8 0 1 0 0 0 0 0 0 100 3 0 0 0 9 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 52 22 76 0 0 0 0 1063 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:03:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 118 0 1 0 0 259 0 1 0 99 1 4 0 0 90 40 90 0 1 0 0 309 0 0 0 100 2 0 0 3 237 113 30 0 1 0 0 7 0 0 0 100 3 0 0 0 13 0 14 0 1 0 0 0 0 0 0 100 4 0 0 14 12 3 8 0 0 0 0 274 0 0 0 100 5 0 0 0 15 7 4 0 0 0 0 0 0 0 0 100 6 0 0 0 50 22 74 1 0 0 0 1064 0 0 0 100 7 0 0 3 217 104 12 0 0 0 0 296 0 0 0 100 March 2, 2026 at 07:03:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 106 120 0 2 0 0 259 0 1 0 99 1 0 0 0 55 24 52 0 0 0 0 300 0 0 0 100 2 0 0 3 258 126 52 0 2 0 0 0 0 0 0 100 3 0 0 0 12 1 8 0 0 0 0 0 0 0 0 100 4 0 0 14 11 2 12 0 1 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 51 22 74 2 0 0 0 1065 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:03:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2131 125 148 0 1 1 0 259 0 1 0 99 1 0 0 0 71 32 64 1 2 0 0 300 0 0 0 100 2 0 0 3 215 101 9 0 2 1 0 0 0 0 0 100 3 0 0 0 9 1 2 0 1 1 0 0 0 0 0 100 4 0 0 14 8 3 2 0 0 1 0 266 0 0 0 100 5 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 6 0 0 0 52 23 72 1 0 1 0 1062 0 0 0 99 7 0 0 3 217 104 10 1 1 1 0 297 0 0 0 100 March 2, 2026 at 07:03:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 105 110 0 0 0 0 259 0 1 0 99 1 0 0 0 59 25 52 0 2 0 0 300 0 0 0 100 2 0 0 3 272 130 68 0 3 1 0 0 0 0 0 100 3 0 0 0 11 2 4 0 1 0 0 1 0 0 0 100 4 0 0 14 11 3 8 0 1 0 0 266 0 0 0 100 5 0 0 0 16 2 16 0 1 0 0 0 0 0 0 100 6 0 0 0 10 2 36 0 1 0 0 1044 0 0 0 100 7 0 0 3 255 124 48 0 1 0 0 313 0 0 0 100 March 2, 2026 at 07:04:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 107 124 0 3 0 0 263 0 1 0 99 1 0 0 0 44 18 38 0 1 0 0 317 0 0 0 100 2 0 0 4 253 123 44 0 0 0 0 0 0 0 0 100 3 0 0 0 64 28 60 0 1 0 0 0 0 0 0 100 4 0 0 14 8 3 2 0 0 0 0 265 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 6 0 0 0 18 2 48 1 2 0 0 1044 0 0 0 100 7 0 0 2 216 105 10 0 0 0 0 297 0 0 0 100 March 2, 2026 at 07:04:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 120 0 1 0 0 259 0 1 0 99 1 0 0 0 58 24 52 0 0 0 0 327 0 0 0 100 2 0 0 4 210 102 6 0 0 0 0 9 0 0 0 100 3 0 0 0 108 50 104 0 0 0 0 0 0 0 0 100 4 0 0 14 10 2 10 0 0 0 0 276 0 0 0 100 5 0 0 0 14 6 4 0 0 0 0 0 0 0 0 100 6 0 0 0 13 3 36 2 0 1 0 1044 0 0 0 100 7 0 0 2 217 104 10 0 0 2 0 295 0 0 0 100 March 2, 2026 at 07:04:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 116 0 1 0 0 259 0 1 0 99 1 0 0 0 17 3 12 1 0 0 0 318 0 0 0 100 2 0 0 3 245 120 40 0 1 0 0 20 0 0 0 100 3 0 0 0 110 51 104 0 0 0 0 0 0 0 0 100 4 0 0 14 12 4 10 0 0 0 0 296 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 38 1 0 0 0 1044 0 0 0 100 7 0 0 3 222 105 20 1 1 0 0 297 0 0 0 100 March 2, 2026 at 07:04:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 103 126 0 1 1 0 259 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 2 0 0 3 246 120 42 0 0 0 0 20 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 267 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 36 0 0 0 0 1044 0 0 0 100 7 0 0 3 214 103 8 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 2 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 267 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 36 1 0 0 0 1044 0 0 0 100 7 0 0 3 214 104 8 0 0 0 0 296 0 0 0 100 March 2, 2026 at 07:04:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 116 0 0 0 0 259 0 1 0 99 1 0 0 0 14 2 14 0 1 0 0 300 0 0 0 100 2 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 15 3 38 2 0 0 0 1044 0 0 0 100 7 0 0 3 213 103 6 1 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 103 116 0 0 0 0 258 0 1 0 99 1 0 0 0 15 2 10 0 0 0 0 305 0 0 0 100 2 0 0 3 253 121 54 0 1 0 0 25 0 0 0 100 3 0 0 0 110 50 107 0 1 0 0 0 0 0 0 100 4 0 0 14 13 4 12 0 0 0 0 278 0 0 0 100 5 0 0 0 14 6 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 36 1 0 0 0 1044 0 0 0 100 7 0 0 3 217 104 12 0 1 0 0 296 0 0 0 100 March 2, 2026 at 07:04:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 11 2 8 0 0 0 0 300 0 0 0 100 2 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 3 0 0 0 110 51 106 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 36 0 0 0 0 1043 0 0 0 100 7 0 0 2 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 116 0 0 1 0 259 0 1 0 99 1 0 0 0 12 3 4 0 0 1 0 300 0 0 0 100 2 0 0 7 249 121 44 0 2 0 0 20 0 0 0 100 3 0 0 0 114 51 110 0 1 1 0 0 0 0 0 100 4 0 0 14 9 3 2 0 0 1 0 266 0 0 0 100 5 0 0 0 12 2 4 0 0 1 0 0 0 0 0 100 6 0 0 0 15 4 36 1 0 2 0 1045 0 0 0 100 7 0 0 7 215 104 8 0 0 1 0 296 0 0 0 100 March 2, 2026 at 07:04:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 2 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 3 0 0 0 111 51 106 0 0 0 0 1 0 0 0 100 4 0 0 14 16 4 178 0 1 0 0 597 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 15 4 38 2 0 0 0 1046 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 2 0 0 3 237 116 32 0 1 0 0 16 0 0 0 100 3 0 0 0 111 52 106 0 0 0 0 4 0 0 0 100 4 0 0 14 18 7 14 0 1 0 0 272 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 16 3 42 1 0 0 0 1046 0 0 0 100 7 0 0 3 217 105 10 1 0 0 0 297 0 0 0 100 March 2, 2026 at 07:04:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 114 0 4 0 0 259 0 1 0 99 1 0 0 0 13 2 8 0 0 0 0 305 0 0 0 100 2 1 0 3 210 102 6 0 0 0 0 6 0 0 0 100 3 0 0 0 40 16 34 0 0 0 0 0 0 0 0 100 4 0 0 14 76 30 72 0 2 0 0 300 0 0 0 100 5 0 0 0 16 6 4 0 0 0 0 0 0 0 0 100 6 0 0 0 72 31 102 0 2 0 0 1044 0 0 0 100 7 0 0 3 218 104 12 0 1 0 0 295 0 0 0 100 March 2, 2026 at 07:04:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 103 116 0 1 0 0 259 0 1 0 99 1 0 0 0 11 2 8 0 0 0 0 300 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 50 24 46 0 0 0 0 288 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 112 52 136 1 0 0 0 1044 0 0 0 100 7 0 0 3 223 106 22 0 1 0 0 297 0 0 0 100 March 2, 2026 at 07:04:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 103 108 0 1 0 0 259 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 299 0 0 0 100 2 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 50 24 46 0 0 0 0 288 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 6 0 0 0 111 52 134 2 0 0 0 1044 0 0 0 100 7 0 0 3 219 104 13 0 2 0 0 294 0 0 0 100 March 2, 2026 at 07:04:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 110 0 2 1 0 259 0 1 0 99 1 0 0 0 60 27 56 0 2 0 0 301 0 0 0 100 2 0 0 3 207 101 2 0 1 0 0 0 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 46 22 42 0 0 0 0 286 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 64 27 88 1 2 0 0 1044 0 0 0 100 7 0 0 3 228 105 22 1 0 0 0 296 0 0 0 100 March 2, 2026 at 07:04:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 103 124 0 2 0 0 259 0 1 0 99 1 0 0 0 13 2 8 0 2 0 0 299 0 0 0 100 2 0 0 3 212 102 6 0 1 0 0 0 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 46 22 42 0 0 0 0 286 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 86 39 108 0 0 0 0 1044 0 0 0 100 7 0 0 3 241 116 36 0 2 0 0 294 0 1 0 99 March 2, 2026 at 07:04:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2118 109 124 0 3 0 0 259 0 1 0 99 1 0 0 0 72 31 70 0 1 0 0 310 0 0 0 100 2 0 0 3 215 101 9 0 1 0 0 8 0 0 0 100 3 0 0 0 9 0 6 0 2 0 0 0 0 0 0 100 4 0 0 14 55 24 50 0 0 0 0 293 0 0 0 100 5 0 0 0 14 6 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 34 1 0 0 0 1044 0 0 0 100 7 0 0 3 249 120 42 0 1 0 0 296 0 0 0 100 March 2, 2026 at 07:04:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 103 116 0 0 0 0 259 0 1 0 99 1 0 0 0 119 53 120 1 1 0 0 301 0 0 0 100 2 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 4 0 0 14 47 22 42 0 0 0 0 286 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 34 2 0 0 0 1045 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 114 0 0 1 0 259 0 1 0 99 1 0 0 0 113 53 108 0 1 0 0 300 0 0 0 100 2 0 0 3 213 101 12 0 2 1 0 0 0 0 0 100 3 0 0 0 10 2 0 0 0 1 0 0 0 0 0 100 4 0 0 14 49 23 44 0 1 1 0 286 0 0 0 100 5 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 6 0 0 0 11 3 34 0 0 1 0 1043 0 0 0 100 7 0 0 3 215 104 8 1 0 1 0 296 0 0 0 100 March 2, 2026 at 07:04:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 2 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 4 0 0 14 48 23 46 0 1 0 0 286 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 34 1 0 0 0 1044 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 2 0 0 3 210 101 4 0 0 0 0 0 0 0 0 100 3 0 0 0 13 0 16 0 2 0 0 0 0 0 0 100 4 0 0 14 48 23 42 0 0 0 0 286 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 36 1 1 0 0 1044 0 0 0 100 7 0 0 3 216 105 10 0 0 0 0 297 0 0 0 100 March 2, 2026 at 07:04:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 120 0 2 0 0 259 0 1 0 99 1 0 0 0 118 54 116 1 0 0 0 313 0 0 0 100 2 0 0 3 212 102 6 0 0 0 0 8 0 0 0 100 3 0 0 0 12 1 6 0 0 0 0 0 0 0 0 100 4 0 0 14 58 23 60 0 1 1 0 314 0 0 0 100 5 0 0 0 14 6 4 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 34 2 0 0 0 1044 0 0 0 100 7 0 0 3 217 104 12 0 0 0 0 295 0 0 0 100 March 2, 2026 at 07:04:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 103 116 0 0 0 0 259 0 1 0 99 1 0 0 0 112 52 108 0 0 0 0 300 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 8 0 1 0 0 0 0 0 0 100 4 0 0 14 48 23 44 0 0 0 0 307 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 34 0 0 0 0 1044 0 0 0 100 7 0 0 3 217 105 10 1 0 0 0 297 0 0 0 100 March 2, 2026 at 07:04:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 103 114 0 0 0 0 258 0 1 0 99 1 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 2 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 51 23 48 0 1 0 0 287 0 0 0 100 5 0 0 0 16 1 16 0 1 0 0 0 0 0 0 100 6 0 0 0 10 2 34 1 0 1 0 1044 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 46 22 42 0 0 0 0 286 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 6 0 0 0 15 2 44 1 1 1 0 1045 0 0 0 100 7 0 0 3 214 104 8 0 0 0 0 296 0 0 0 100 March 2, 2026 at 07:04:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 114 54 110 1 1 0 0 302 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 46 22 42 0 0 0 0 286 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 36 2 0 0 0 1044 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 116 0 0 0 0 259 0 1 0 99 1 1 0 0 116 53 116 0 0 0 0 314 0 0 0 100 2 0 0 3 208 101 4 1 0 0 0 7 0 0 0 100 3 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 50 22 46 0 0 0 0 291 0 0 0 100 5 0 0 0 16 6 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 38 1 1 0 0 1043 0 0 0 100 7 0 0 3 223 104 22 1 1 0 0 296 0 0 0 100 March 2, 2026 at 07:04:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 103 124 0 1 0 0 259 0 1 0 99 1 0 0 0 111 52 108 0 0 0 0 300 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 8 0 1 0 0 0 0 0 0 100 4 0 0 14 47 22 42 0 0 0 0 286 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 34 0 0 1 0 1044 0 0 0 100 7 0 0 3 214 103 8 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 114 0 0 1 0 259 0 1 0 99 1 0 0 0 112 53 104 0 0 1 0 300 0 0 0 100 2 0 0 7 207 101 0 0 0 1 0 0 0 0 0 100 3 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 4 0 0 14 49 23 42 0 0 1 0 286 0 0 0 100 5 0 0 0 12 2 4 0 0 1 0 0 0 0 0 100 6 0 0 0 13 3 34 1 0 1 0 1044 0 0 0 100 7 0 0 7 215 104 10 0 1 0 0 296 0 0 0 100 March 2, 2026 at 07:04:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 118 0 0 0 0 259 0 1 0 99 1 0 0 0 118 53 116 1 1 0 0 301 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 4 0 0 14 46 22 42 0 0 0 0 286 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 36 1 1 0 0 1044 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 103 116 0 0 0 0 259 0 1 0 99 1 0 0 0 113 53 108 0 1 0 0 301 0 0 0 100 2 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 14 1 12 0 1 0 0 0 0 0 0 100 4 0 0 14 46 22 44 0 1 0 0 286 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 34 1 0 0 0 1044 0 0 0 100 7 0 0 3 217 105 10 1 0 0 0 297 0 0 0 100 March 2, 2026 at 07:04:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 118 0 1 0 0 259 0 1 0 99 1 0 0 0 117 53 116 0 0 0 0 314 0 0 0 100 2 0 0 3 210 102 6 0 0 0 0 8 0 0 0 100 3 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 4 0 0 14 50 22 46 0 0 0 0 291 0 0 0 100 5 0 0 0 17 7 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 36 1 0 0 0 1044 0 0 0 100 7 0 0 3 217 104 10 0 0 0 0 295 0 0 0 100 March 2, 2026 at 07:04:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 113 52 112 0 0 0 0 318 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 14 2 10 0 1 0 0 0 0 0 0 100 4 0 0 14 55 23 58 0 1 0 0 295 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 34 0 0 0 0 1044 0 0 0 100 7 0 0 3 217 105 10 0 0 0 0 297 0 0 0 100 March 2, 2026 at 07:04:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 116 0 1 0 0 259 0 1 0 99 1 0 0 0 112 53 106 1 0 0 0 301 0 0 0 100 2 0 0 3 208 101 2 0 1 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 50 23 46 0 1 0 0 287 0 0 0 100 5 0 0 0 16 1 16 0 1 0 0 0 0 0 0 100 6 0 0 0 11 2 34 2 0 0 0 1044 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 105 114 0 3 0 0 262 0 1 0 99 1 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 4 0 0 14 52 20 44 0 1 0 0 283 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 34 1 0 1 0 1044 0 0 0 100 7 0 0 3 215 104 8 1 0 0 0 296 0 0 0 100 March 2, 2026 at 07:04:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2150 123 154 0 0 0 0 279 0 1 0 99 1 0 0 0 111 53 106 0 0 0 0 301 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 6 0 0 0 15 2 44 1 1 0 0 1044 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2134 116 144 1 1 0 0 271 0 1 0 99 1 0 0 0 130 60 132 0 1 0 0 321 0 0 0 100 2 0 0 3 208 101 6 0 1 0 0 7 0 0 0 100 3 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 10 2 6 0 0 0 0 271 0 0 0 100 5 0 0 0 15 7 4 0 0 1 0 0 0 0 0 100 6 0 0 0 13 2 38 0 0 0 0 1044 0 0 0 100 7 0 0 3 223 104 22 0 1 0 0 296 0 0 0 100 March 2, 2026 at 07:04:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 155 73 150 1 0 0 0 321 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 8 0 1 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 34 2 0 0 0 1044 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 118 0 1 0 0 259 0 1 0 99 1 0 0 0 151 73 144 0 0 1 0 320 0 0 0 100 2 0 0 3 206 101 0 0 0 1 0 0 0 0 0 100 3 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 4 0 0 14 8 3 2 0 0 1 0 266 0 0 0 100 5 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 6 0 0 0 12 3 34 1 0 1 0 1044 0 0 0 100 7 0 0 3 222 104 18 1 0 1 0 296 0 0 0 100 March 2, 2026 at 07:04:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 154 72 154 0 1 0 0 320 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 34 1 0 0 0 1044 0 0 0 100 7 0 0 3 214 103 8 0 1 0 0 294 0 0 0 100 March 2, 2026 at 07:04:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 116 0 0 0 0 259 0 1 0 99 1 0 0 0 149 72 144 0 0 0 0 320 0 0 0 100 2 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 3 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 34 0 0 0 0 1045 0 0 0 100 7 0 0 3 216 105 10 0 0 0 0 297 0 0 0 100 March 2, 2026 at 07:04:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 116 0 0 0 0 259 0 1 0 99 1 0 0 0 160 74 158 1 0 0 0 333 0 0 0 100 2 0 0 3 215 102 16 0 1 0 0 8 0 0 0 100 3 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 4 0 0 14 10 2 6 0 0 0 0 271 0 0 0 100 5 0 0 0 14 6 4 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 36 2 0 1 0 1043 0 0 0 100 7 0 0 3 217 104 12 0 1 0 0 295 0 0 0 100 March 2, 2026 at 07:04:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 151 72 150 0 1 0 0 320 0 0 0 100 2 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 17 2 16 0 1 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 287 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 34 1 0 1 0 1044 0 0 0 100 7 0 0 3 217 105 10 1 0 0 0 297 0 0 0 100 March 2, 2026 at 07:04:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 114 0 0 0 0 259 0 1 0 99 1 0 0 0 149 72 144 0 0 0 0 320 0 0 0 100 2 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 4 1 0 0 0 291 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 34 1 0 0 0 1044 0 0 0 100 7 0 0 3 212 103 8 0 1 0 0 294 0 0 0 100 March 2, 2026 at 07:04:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 116 0 0 0 0 259 0 1 0 99 1 0 0 0 149 72 144 0 0 0 0 320 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 11 2 12 0 1 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 34 1 0 0 0 1044 0 0 0 100 7 0 0 3 214 104 10 0 1 0 0 296 0 0 0 100 March 2, 2026 at 07:04:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 116 0 0 0 0 259 0 1 0 99 1 4 0 0 159 73 158 1 0 0 0 345 0 0 0 100 2 1 0 3 211 101 13 0 3 0 0 63 0 0 0 100 3 0 0 0 11 1 4 0 0 0 0 1 0 0 0 100 4 549 0 15 14 2 13 1 0 0 0 389 0 0 0 100 5 0 0 0 21 8 14 0 1 0 0 0 0 0 0 100 6 0 0 1 12 2 38 1 1 0 0 1047 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 March 2, 2026 at 07:04:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2142 128 174 0 3 1 0 259 0 1 0 99 1 24 0 0 27 6 20 2 0 0 0 413 0 0 0 99 2 0 0 3 259 123 56 0 3 0 0 18 0 0 0 100 3 1 0 0 12 1 11 0 3 0 0 16 0 0 0 100 4 745 0 14 15 3 13 0 1 0 0 289 0 0 0 100 5 0 0 0 82 69 13 0 2 1 0 27 0 0 0 100 6 4 0 0 29 5 59 1 2 0 0 1095 0 0 0 99 7 0 0 3 225 104 24 1 0 0 0 296 0 0 0 100 March 2, 2026 at 07:04:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 3162 103 2210 1 13 61 0 259 0 2 0 98 1 2563 0 0 150 2 255 2 14 86 0 805 1 1 0 98 2 0 0 6 452 114 398 2 12 135 0 1277 1 2 0 97 3 0 0 0 114 72 189 0 10 43 0 0 0 0 0 100 4 0 0 14 116 30 168 0 16 60 0 268 0 0 0 100 5 0 0 0 1558 1491 101 0 15 206 0 0 0 1 0 99 6 0 0 45 71 3 142 3 18 59 0 1055 0 0 0 99 7 0 0 6 1240 103 2024 0 11 147 0 294 0 2 0 98 March 2, 2026 at 07:04:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 103 118 0 1 1 0 259 0 1 0 99 1 1 0 0 21 3 14 1 1 1 0 326 0 0 0 100 2 0 0 7 215 103 6 1 0 1 0 11 0 0 0 100 3 0 0 0 68 30 61 0 1 1 0 0 0 0 0 100 4 0 0 14 54 25 48 0 1 1 0 268 0 0 0 100 5 0 0 0 27 15 6 0 1 1 0 0 0 0 0 100 6 0 0 0 15 3 36 1 0 2 0 1045 0 0 0 100 7 0 0 7 222 104 22 0 1 0 0 296 0 0 0 100 March 2, 2026 at 07:04:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2152 103 205 0 1 1 0 259 0 1 0 99 1 0 0 0 19 5 14 0 2 0 0 311 0 0 0 100 2 0 0 3 226 103 30 0 0 1 0 77 0 0 0 100 3 0 0 0 61 26 56 0 1 0 0 1 0 0 0 100 4 0 0 14 59 27 54 0 1 0 0 268 0 0 0 100 5 0 0 0 156 146 6 0 1 6 0 0 0 0 0 100 6 0 0 0 11 2 34 2 0 0 0 1045 0 0 0 100 7 0 0 3 257 103 94 0 0 2 0 294 0 0 0 100 March 2, 2026 at 07:04:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2172 103 246 0 3 0 0 259 0 1 0 99 1 0 0 0 31 2 44 1 0 1 0 410 0 0 0 100 2 0 0 3 213 103 6 1 0 0 0 13 0 0 0 100 3 0 0 0 52 22 46 0 0 0 0 0 0 0 0 100 4 0 0 14 64 30 62 0 1 0 0 268 0 0 0 100 5 0 0 0 179 166 6 0 1 8 0 0 0 0 0 100 6 0 0 0 9 2 34 0 0 1 0 1045 0 0 0 100 7 0 0 3 287 105 146 1 0 1 0 297 0 0 0 100 March 2, 2026 at 07:04:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2152 103 198 0 1 6 0 259 0 1 0 99 1 0 0 0 85 34 88 0 2 0 0 319 0 0 0 100 2 0 0 3 230 104 34 0 0 0 0 86 0 0 0 100 3 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 54 24 52 0 0 0 0 276 0 0 0 100 5 0 0 0 163 153 6 0 1 6 0 0 0 0 0 100 6 0 0 0 12 2 38 1 1 1 0 1045 0 0 0 100 7 0 0 3 260 104 95 0 1 0 0 295 0 0 0 100 March 2, 2026 at 07:04:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 116 0 1 0 0 259 0 1 0 99 1 0 0 0 119 52 120 0 0 0 0 330 0 0 0 100 2 0 0 3 213 103 6 0 0 0 0 11 0 0 0 100 3 0 0 0 11 1 8 0 2 2 0 0 0 0 0 100 4 0 0 14 10 3 8 0 0 1 0 268 0 0 0 100 5 0 0 0 31 18 8 0 1 3 0 0 0 0 0 100 6 0 0 0 11 2 36 1 0 4 0 1045 0 0 0 100 7 0 0 3 219 105 14 0 0 0 0 297 0 0 0 100 March 2, 2026 at 07:04:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2166 103 177 0 2 2 0 259 0 1 0 99 1 0 0 0 121 54 112 1 0 0 0 311 0 0 0 100 2 0 0 3 232 101 46 0 1 3 0 93 0 0 0 100 3 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 4 0 0 14 9 3 6 0 0 0 0 269 0 0 0 100 5 0 0 0 231 162 64 0 3 8 0 0 0 0 0 100 6 0 0 0 11 2 34 2 0 0 0 1045 0 0 0 100 7 0 0 3 269 103 120 0 0 5 0 294 0 0 0 100 March 2, 2026 at 07:04:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2130 103 146 0 0 1 0 259 0 1 0 99 1 1 0 0 119 52 120 0 0 1 0 345 0 0 0 100 2 0 0 3 221 105 18 0 1 0 0 29 0 0 0 100 3 0 0 0 15 1 16 0 2 0 0 0 0 0 0 100 4 0 0 14 9 2 6 0 0 0 0 270 0 0 0 100 5 0 0 0 120 101 14 0 1 4 0 0 0 0 0 100 6 0 0 0 11 2 36 0 1 0 0 1044 0 0 0 100 7 0 0 3 234 104 46 1 0 0 0 296 0 0 0 100