March 4, 2026 at 01:07:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 637 0 28 2831 121 2012 29 163 1256 42 4206 6 9 0 85 1 650 0 73 654 13 2017 21 188 1258 41 4245 9 7 0 84 2 478 0 53 665 20 2049 18 162 1169 44 5566 2 7 0 91 3 564 0 104 1079 393 2022 40 118 1332 48 3663 4 8 0 89 4 557 0 136 2884 2346 2609 62 208 2196 47 6596 6 12 0 82 5 514 0 52 1284 18 3333 30 193 2663 36 3633 13 12 0 75 6 439 0 439 544 17 1638 20 164 1064 19 3423 2 7 0 91 7 503 0 66 614 23 2182 17 152 1279 28 4788 3 6 0 91 March 4, 2026 at 01:07:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2468 0 33 2425 101 549 26 54 230 59 2182 6 21 0 72 1 7368 0 79 352 3 695 62 50 702 75 2718 9 20 0 71 2 4837 0 40 393 3 715 18 68 212 94 1754 2 5 0 93 3 891 0 8 624 79 489 25 63 92 57 2221 4 14 0 81 4 3618 0 408 398 6 259 30 37 136 32 1653 22 27 0 50 5 8263 0 43 506 21 243 32 32 139 22 2113 22 27 0 51 6 6690 0 25 224 5 480 18 44 275 64 3645 4 9 0 88 7 6247 0 28 431 1 438 23 39 579 42 2319 5 47 0 48 March 4, 2026 at 01:07:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 12 0 1 0 0 0 0 5 0 95 1 0 0 0 13 1 8 0 1 7 0 695 0 0 0 100 2 0 0 0 112 1 109 0 2 0 0 0 0 0 0 100 3 0 0 0 12 2 8 0 0 14 0 331 0 0 0 100 4 44 0 21 207 101 3 0 0 0 0 429 0 0 0 100 5 0 0 10 215 105 9 0 0 6 0 642 0 0 0 100 6 0 0 0 114 53 109 0 0 0 0 0 0 0 0 100 7 0 0 0 8 0 5 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 8 0 0 0 0 0 0 1 0 99 1 0 0 0 20 3 18 0 0 0 0 308 0 0 0 100 2 0 0 0 111 2 108 0 0 0 0 8 0 0 0 100 3 0 0 0 13 3 8 0 0 0 0 301 0 0 0 100 4 0 0 16 213 105 4 0 1 1 0 266 0 0 0 100 5 0 0 11 216 104 10 1 1 0 0 552 0 0 0 100 6 24 0 0 22 5 50 0 0 1 0 1044 0 0 0 99 7 0 0 0 105 49 102 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:07:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2329 124 781 4 144 468 0 0 0 4 0 96 1 0 0 0 65 1 87 9 10 224 0 301 0 10 0 90 2 0 0 0 116 2 140 5 4 190 0 0 0 10 0 90 3 0 0 0 548 401 1005 38 157 656 0 301 0 4 0 96 4 0 0 18 273 102 126 10 25 196 0 266 0 10 0 90 5 0 0 9 274 105 122 7 7 197 0 556 0 11 0 89 6 0 0 0 67 5 126 8 5 184 0 1027 0 11 0 89 7 0 0 0 111 26 153 5 2 219 0 0 0 10 0 90 March 4, 2026 at 01:07:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 151 110 0 0 0 0 1 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 301 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 113 4 108 0 0 0 0 301 0 0 0 100 4 0 0 16 206 102 2 0 0 0 0 266 0 0 0 100 5 0 0 11 212 104 6 0 0 0 0 553 0 0 0 100 6 0 0 0 15 4 40 0 0 0 0 1028 0 0 0 99 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 150 136 0 2 2 0 0 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 301 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 93 4 86 0 0 0 0 301 0 0 0 100 4 0 0 17 207 103 2 0 0 0 0 266 0 0 0 100 5 0 0 10 216 105 10 0 1 0 0 555 0 0 0 100 6 0 0 0 19 5 42 1 0 0 0 1029 0 0 0 100 7 0 0 0 10 1 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:07:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 150 204 0 1 2 0 0 0 1 0 99 1 0 0 0 10 1 6 0 1 1 0 301 0 0 0 100 2 0 0 0 14 1 11 0 4 0 0 0 0 0 0 100 3 0 0 0 15 4 8 0 0 0 0 301 0 0 0 100 4 0 0 18 206 102 2 0 0 0 0 266 0 0 0 100 5 0 0 9 213 104 6 1 0 0 0 553 0 0 0 100 6 0 0 0 17 4 40 2 0 0 0 1029 0 0 0 99 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 150 200 0 0 0 0 0 0 2 0 98 1 0 0 0 19 2 18 0 0 0 0 307 0 0 0 100 2 0 0 0 16 1 12 0 0 0 0 7 0 0 0 100 3 0 0 0 16 4 12 0 1 0 0 301 0 0 0 100 4 0 0 18 209 105 2 0 0 0 0 266 0 0 0 100 5 0 0 9 217 105 12 0 0 0 0 555 0 0 0 100 6 0 0 0 29 9 58 0 0 1 0 1043 0 0 0 99 7 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:07:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 150 202 0 0 1 0 0 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 301 0 0 0 100 2 0 0 0 18 0 16 0 0 0 0 0 0 0 0 100 3 0 0 0 17 5 14 0 1 1 0 301 0 0 0 100 4 0 0 19 214 108 6 0 1 0 0 266 0 0 0 100 5 0 0 8 217 106 12 0 0 0 0 574 0 0 0 100 6 0 0 0 16 4 40 1 0 0 0 1029 0 0 0 100 7 0 0 0 7 0 4 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:07:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 150 208 0 1 0 0 0 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 301 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 301 0 0 0 100 4 0 0 18 211 105 4 0 0 1 0 266 0 0 0 100 5 0 0 9 217 105 14 0 1 1 0 555 0 0 0 100 6 0 0 0 16 4 40 1 0 3 0 1027 0 1 0 99 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 108 126 0 0 0 0 0 0 1 0 99 1 0 0 0 94 43 90 0 1 0 0 301 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 301 0 0 0 100 4 0 0 16 208 104 2 0 0 0 0 266 0 0 0 100 5 0 0 11 213 104 6 1 0 0 0 552 0 0 0 100 6 0 0 0 16 4 40 1 0 1 0 1028 0 0 0 100 7 0 0 0 9 0 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 1 0 0 0 0 1 0 99 1 0 0 0 109 51 104 0 0 0 0 301 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 301 0 0 0 100 4 0 0 15 209 105 2 0 0 0 0 266 0 0 0 100 5 0 0 12 216 105 10 0 0 0 0 556 0 0 0 100 6 0 0 0 25 5 50 2 1 1 0 1032 0 1 0 99 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 109 0 1 0 0 0 0 1 0 99 1 0 0 0 116 51 112 0 1 0 0 306 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 301 0 0 0 100 4 0 0 17 210 106 2 0 0 0 0 266 0 0 0 100 5 0 0 10 215 104 10 0 0 0 0 553 0 0 0 100 6 0 0 0 25 6 54 0 1 1 0 1040 0 0 0 99 7 0 0 0 10 0 12 0 1 0 0 0 0 1 0 99 March 4, 2026 at 01:07:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 110 0 0 2 0 0 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 2 0 0 0 8 0 6 0 0 1 0 0 0 0 0 100 3 0 0 0 16 5 12 0 0 0 0 301 0 0 0 100 4 0 0 17 211 107 2 0 0 0 0 266 0 0 0 100 5 0 0 10 217 106 12 0 0 1 0 555 0 0 0 100 6 0 0 0 16 4 40 1 0 2 0 1027 0 0 0 100 7 0 0 0 7 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 124 0 1 0 0 1 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 301 0 0 0 100 4 0 0 18 209 105 2 0 0 0 0 266 0 0 0 100 5 0 0 9 214 104 6 2 0 0 0 553 0 0 0 100 6 0 0 0 16 4 40 1 0 0 0 1029 0 0 0 100 7 0 0 0 9 0 6 0 1 1 0 0 0 1 0 99 March 4, 2026 at 01:07:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 1 0 0 0 1 0 99 1 0 0 0 112 51 112 0 1 0 0 301 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 301 0 0 0 100 4 0 0 19 213 109 2 0 0 0 0 266 0 0 0 100 5 0 0 8 214 105 8 0 0 0 0 555 0 0 0 100 6 0 0 0 20 6 44 1 0 0 0 1029 0 0 0 99 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 300 0 0 0 100 4 0 0 16 209 105 2 0 0 0 0 266 0 0 0 100 5 0 0 11 212 104 6 0 0 0 0 553 0 0 0 100 6 0 0 0 17 4 40 2 0 2 0 1028 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 118 52 116 0 0 2 0 307 0 0 0 100 2 0 0 0 9 0 10 0 1 0 0 7 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 301 0 0 0 100 4 0 0 18 210 106 2 0 0 0 0 266 0 0 0 100 5 0 0 9 217 105 12 0 0 0 0 554 0 0 0 100 6 1 0 0 27 8 56 0 0 2 0 1042 0 0 0 99 7 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:07:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 2 0 0 0 9 0 6 0 0 1 0 0 0 0 0 100 3 0 0 0 16 5 12 0 1 0 0 301 0 0 0 100 4 0 0 18 210 105 4 0 1 0 0 266 0 0 0 100 5 0 0 9 216 105 10 1 0 0 0 554 0 0 0 100 6 0 0 0 16 4 40 1 0 2 0 1029 0 0 0 99 7 0 0 0 7 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 112 0 0 0 0 18 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 2 0 0 0 9 1 6 0 0 0 0 9 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 301 0 0 0 100 4 0 0 16 206 102 2 0 0 0 0 266 0 0 0 100 5 0 0 11 214 105 8 0 0 0 0 556 0 0 0 100 6 0 0 0 18 5 42 1 0 0 0 1028 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 735 0 25 2235 100 278 5 23 179 12 383 2 2 0 96 1 1177 0 23 203 40 241 2 13 163 10 709 3 2 0 96 2 824 0 68 86 2 92 6 17 223 4 465 7 1 0 91 3 664 0 0 124 5 140 7 14 99 2 816 9 1 0 90 4 725 0 119 310 113 171 10 17 51 2 795 1 1 0 98 5 242 0 10 291 104 117 4 15 135 1 791 1 1 0 98 6 3685 0 23 135 4 210 15 19 214 15 2270 7 10 0 84 7 1270 0 1 116 0 170 3 19 209 12 590 3 2 0 95 March 4, 2026 at 01:07:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 112 0 0 0 0 3 0 1 0 99 1 24 0 0 21 5 13 0 1 0 0 314 0 0 0 100 2 0 0 0 11 1 4 0 0 0 0 5 0 0 0 100 3 1 0 0 19 5 16 0 1 0 0 313 0 0 0 100 4 68 0 30 223 109 20 0 1 0 0 315 0 0 0 100 5 19 0 11 306 148 100 0 2 0 0 612 0 0 0 100 6 17 0 0 25 6 50 1 3 2 0 1121 0 0 0 99 7 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 26 7 24 0 0 0 0 315 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 3 0 0 0 16 5 10 0 0 0 0 301 0 0 0 100 4 0 0 19 213 107 2 0 0 0 0 266 0 0 0 100 5 0 0 8 316 154 110 1 0 1 0 554 0 0 0 100 6 6 0 0 20 5 48 1 0 1 0 1120 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:07:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 100 173 0 10 176 0 0 0 2 0 98 1 0 0 0 57 7 93 0 5 112 0 310 0 0 0 99 2 0 0 0 49 0 94 0 6 85 0 0 0 0 0 100 3 0 0 0 125 86 142 13 5 185 0 301 0 1 0 99 4 0 0 16 294 104 130 0 3 134 0 266 0 1 0 99 5 0 0 11 354 156 188 1 3 161 0 556 0 1 0 99 6 0 0 0 53 4 106 1 2 150 0 1104 0 1 0 99 7 0 0 0 51 1 95 0 6 93 0 0 0 0 0 100 March 4, 2026 at 01:07:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 179 0 1 2189 103 235 1 17 43 26 265 0 2 0 98 1 99 0 3 87 9 114 0 15 64 12 520 0 0 0 99 2 217 0 14 57 0 91 0 13 41 13 205 0 1 0 98 3 47 0 2 64 5 100 0 13 36 5 445 0 0 0 100 4 31 0 17 288 103 74 0 7 7 4 393 0 0 0 99 5 155 0 13 408 152 158 0 12 106 7 696 0 1 0 99 6 3573 0 238 61 2 111 7 7 53 11 2108 4 4 0 92 7 4207 0 33 121 1 73 5 9 39 10 471 5 2 0 93 March 4, 2026 at 01:07:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 979 0 7 2622 103 909 21 84 136 50 3504 9 5 0 86 1 1099 0 27 660 41 978 25 76 75 41 3942 6 4 0 90 2 706 0 21 526 9 768 20 60 101 44 2896 4 3 0 93 3 1228 0 47 578 4 849 44 55 154 28 2089 3 3 0 94 4 692 0 122 613 102 583 18 45 76 20 2590 4 3 0 93 5 912 0 19 551 106 483 14 38 85 9 2216 4 3 0 93 6 31944 0 386 430 3 747 45 46 120 51 5328 22 55 0 23 7 6646 0 80 465 2 663 27 46 101 55 3412 8 7 0 86 March 4, 2026 at 01:07:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2143 102 94 0 2 0 0 9 0 2 0 98 1 1 0 231 41 1 30 0 1 3 0 305 0 1 0 99 2 4 0 0 143 50 106 0 2 0 0 12 0 0 0 100 3 60 0 0 68 10 32 0 2 0 0 332 0 0 0 99 4 3 0 30 248 103 12 0 3 0 0 298 0 0 0 100 5 0 0 11 252 104 8 1 1 0 0 611 0 0 0 99 6 11 0 0 48 1 6 0 1 0 0 19 0 0 0 100 7 0 0 7 50 3 41 1 3 5 0 1116 0 1 0 98 March 4, 2026 at 01:07:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2112 101 116 0 1 1 0 0 0 2 0 98 1 0 0 0 37 2 16 0 1 0 0 307 0 0 0 100 2 0 0 0 126 50 104 0 0 0 0 5 0 0 0 100 3 0 0 0 46 10 22 0 1 1 0 310 0 0 0 100 4 2 0 17 237 107 12 0 1 1 0 280 0 0 0 100 5 0 0 10 234 104 10 0 0 2 0 553 0 0 0 100 6 0 0 0 39 6 18 0 0 0 0 16 0 0 0 100 7 0 0 14 38 5 44 3 0 0 0 1108 0 1 0 99 March 4, 2026 at 01:07:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 101 254 0 9 94 0 0 0 2 0 98 1 0 0 0 84 1 142 0 5 107 0 301 0 1 0 99 2 0 0 0 164 50 206 0 5 68 0 0 0 1 0 99 3 0 0 0 197 135 192 19 9 132 0 310 0 1 0 99 4 0 0 17 270 103 118 1 5 110 0 266 0 1 0 99 5 0 0 10 277 105 132 1 6 86 0 575 0 1 0 99 6 0 0 0 58 0 108 0 6 95 0 0 0 0 0 100 7 0 0 14 81 3 178 0 6 100 0 1105 0 1 0 99 March 4, 2026 at 01:07:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 17 2158 102 167 0 11 14 7 114 0 2 0 98 1 10 0 2 48 1 34 0 5 5 1 360 0 0 0 99 2 14 0 0 136 50 122 0 4 4 1 33 0 0 0 100 3 11 0 8 100 15 51 0 1 8 1 368 0 0 0 99 4 13 0 25 243 105 49 2 7 6 7 296 0 0 0 100 5 1 0 11 306 104 19 1 2 6 0 588 0 1 0 99 6 3040 0 218 36 0 61 4 5 10 9 483 1 2 0 97 7 73 0 10 70 4 115 1 13 24 8 1297 0 1 0 99 March 4, 2026 at 01:07:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1081 0 104 2825 104 1248 58 121 142 76 3791 9 9 0 83 1 807 0 5 732 3 1172 38 106 101 80 4259 7 4 0 89 2 1109 0 47 629 9 1040 20 86 96 73 2820 5 5 0 91 3 34095 0 70 584 7 675 36 72 113 45 3436 20 20 0 60 4 1245 0 117 619 104 477 8 53 103 27 1940 3 3 0 94 5 2051 0 174 651 121 678 17 52 150 39 4655 5 6 0 89 6 10173 0 439 497 2 886 26 52 130 90 6558 13 11 0 77 7 10515 0 46 646 20 1007 38 64 179 67 4513 12 9 0 80 March 4, 2026 at 01:07:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 28 2155 105 52 1 5 6 0 14 0 3 0 97 1 29 0 237 190 51 183 0 4 8 0 15 0 1 0 98 2 0 0 0 53 1 6 0 2 0 0 15 0 0 0 100 3 2 0 0 56 4 17 0 3 7 0 338 0 1 0 99 4 3 0 31 253 103 11 0 3 0 0 296 0 0 0 100 5 3 0 10 261 106 18 0 0 7 0 608 0 1 0 99 6 48 0 0 63 6 22 0 2 0 0 15 0 0 0 100 7 5 0 0 58 4 42 1 0 3 0 1120 0 2 0 98 March 4, 2026 at 01:07:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 21 0 2 8 0 593 0 1 0 99 1 0 0 0 14 0 12 0 1 0 0 10 0 0 0 100 2 0 0 0 206 50 201 0 2 0 0 8 0 0 0 100 3 0 0 0 10 2 5 0 0 6 0 278 0 0 0 100 4 2 0 17 216 108 4 0 0 0 0 281 0 0 0 100 5 0 0 10 218 104 14 1 1 4 0 556 0 0 0 100 6 0 0 0 27 7 24 0 2 1 0 15 0 0 0 100 7 0 0 0 16 3 42 2 1 2 0 1113 0 1 0 99 March 4, 2026 at 01:07:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 224 2149 102 145 0 12 77 0 301 0 2 0 98 1 0 0 0 127 0 123 0 7 67 0 0 0 1 0 99 2 0 0 0 183 51 185 0 8 76 0 0 0 1 0 99 3 0 0 0 150 73 133 12 8 111 0 301 0 1 0 99 4 0 0 16 270 102 67 1 4 70 0 266 0 1 0 99 5 0 0 11 285 106 86 0 3 52 0 553 0 1 0 99 6 0 0 0 98 6 114 0 7 95 0 9 0 0 0 99 7 0 0 0 95 4 140 0 6 70 0 1111 0 1 0 99 March 4, 2026 at 01:07:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 807 0 35 2425 104 569 11 61 55 51 2097 2 4 0 94 1 2351 0 23 424 0 596 15 49 58 59 1687 5 3 0 91 2 413 0 8 386 39 581 13 43 63 35 1863 2 2 0 96 3 288 0 9 351 11 373 10 44 62 19 1814 1 2 0 97 4 119 0 86 421 108 173 6 22 32 11 969 2 1 0 97 5 335 0 14 427 106 288 7 32 37 21 1744 1 2 0 97 6 10460 0 448 252 11 499 25 32 100 60 4773 8 9 0 84 7 2427 0 14 248 4 448 5 51 74 55 2722 3 4 0 94 March 4, 2026 at 01:07:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 591 0 109 2595 119 833 38 66 90 15 3925 4 6 0 89 1 655 0 7 482 4 729 34 59 39 19 2201 9 3 0 87 2 3106 0 26 537 1 717 24 47 50 11 2335 8 3 0 88 3 1066 0 42 486 34 656 15 45 118 21 2305 4 2 0 94 4 762 0 60 563 109 546 14 40 43 15 2158 4 2 0 94 5 556 0 11 516 106 441 11 41 57 12 1799 3 2 0 95 6 4125 0 200 331 1 549 30 30 87 25 3341 8 4 0 88 7 36350 0 95 409 8 733 52 54 153 25 2881 20 12 0 68 March 4, 2026 at 01:07:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 7 2170 110 165 1 1 2 0 1432 0 3 0 97 1 0 0 343 13 0 12 0 1 2 0 0 0 1 0 99 2 0 0 0 59 1 4 0 0 1 0 0 0 0 0 100 3 0 0 0 164 53 112 0 1 1 0 301 0 0 0 100 4 4 0 17 258 104 2 0 0 1 0 296 0 0 0 100 5 0 0 10 264 105 8 0 0 0 0 558 0 0 0 100 6 0 0 0 55 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 62 1 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:07:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 140 2126 110 77 2 4 0 0 1428 0 3 0 97 1 1 0 0 120 3 100 0 3 1 0 14 0 0 0 100 2 0 0 0 35 1 12 0 2 0 0 7 0 0 0 100 3 0 0 0 132 53 106 0 0 0 0 301 0 0 0 100 4 0 0 16 230 106 2 1 0 0 0 266 0 0 0 100 5 0 0 11 238 105 12 1 0 0 0 553 0 0 0 100 6 0 0 0 35 2 12 0 1 0 0 7 0 0 0 100 7 0 0 0 34 3 8 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:07:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2169 109 151 0 15 97 0 1425 0 2 0 98 1 0 0 0 149 0 181 0 11 68 0 0 0 0 0 100 2 0 0 0 51 1 78 0 6 72 0 0 0 0 0 100 3 0 0 0 215 130 187 10 8 86 0 300 0 1 0 99 4 0 0 17 255 103 92 0 8 83 0 266 0 1 0 99 5 0 0 10 256 105 96 0 11 106 0 555 0 1 0 99 6 0 0 0 57 0 105 0 9 80 0 0 0 0 0 100 7 0 0 0 49 1 87 0 5 114 0 0 0 0 0 100 March 4, 2026 at 01:07:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1595 0 202 2244 111 391 8 21 41 41 2514 4 4 0 92 1 494 0 11 326 0 339 2 33 45 39 637 1 1 0 98 2 105 0 11 210 1 242 6 28 36 27 704 1 2 0 98 3 141 0 4 258 54 277 1 18 27 25 745 0 1 0 99 4 164 0 17 353 104 157 0 20 17 17 578 0 1 0 99 5 56 0 13 330 105 161 1 16 23 20 963 0 1 0 99 6 5361 0 141 96 0 147 7 14 31 25 2599 2 5 0 92 7 4883 0 32 200 2 245 9 26 65 43 1018 4 2 0 94 March 4, 2026 at 01:07:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2108 104 132 2 2 1 0 1409 0 3 0 97 1 64 0 0 54 6 45 0 1 1 0 11 0 0 0 99 2 0 0 7 23 1 14 0 1 0 0 1 0 0 0 100 3 0 0 0 120 54 108 0 0 0 0 301 0 0 0 100 4 0 0 18 220 108 2 0 0 0 0 266 0 0 0 100 5 0 0 9 219 105 8 0 0 0 0 557 0 0 0 100 6 0 0 0 12 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 15 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2148 104 144 3 0 0 0 1403 0 2 0 98 1 0 0 231 16 4 12 0 1 1 0 11 0 1 0 99 2 0 0 0 48 0 10 0 0 0 0 0 0 0 0 100 3 0 0 0 147 54 110 0 1 0 0 301 0 0 0 100 4 0 0 19 247 109 2 1 0 0 0 266 0 0 0 100 5 0 0 8 250 105 10 1 1 0 0 554 0 0 0 100 6 0 0 0 40 0 4 0 1 1 0 0 0 0 0 100 7 0 0 0 43 2 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:07:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2108 104 98 1 1 0 0 1395 0 2 0 98 1 0 0 0 71 6 68 0 2 0 0 25 0 0 0 100 2 0 0 0 18 0 12 0 0 0 0 7 0 0 0 100 3 0 0 0 116 54 108 0 0 0 0 301 0 0 0 100 4 0 0 16 218 109 4 0 1 0 0 266 0 0 0 100 5 0 0 11 220 105 10 0 0 2 0 554 0 0 0 100 6 0 0 0 16 0 10 0 0 0 0 5 0 0 0 100 7 0 0 0 15 1 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:07:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 104 46 1 1 2 0 1399 0 1 0 98 1 0 0 0 116 5 112 0 0 0 0 5 0 0 0 100 2 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 3 0 0 0 113 54 108 0 0 0 0 301 0 0 0 100 4 0 0 17 211 104 8 0 0 2 0 266 0 0 0 100 5 0 0 10 214 105 8 0 0 0 0 553 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 6 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:07:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 105 56 1 1 1 0 1399 0 2 0 98 1 0 0 0 119 6 116 0 0 0 0 16 0 0 0 100 2 0 0 0 14 0 10 0 0 0 0 3 0 0 0 100 3 0 0 0 114 54 110 0 0 0 0 302 0 0 0 100 4 0 0 15 208 103 4 0 0 0 0 269 0 0 0 100 5 9 0 12 215 105 8 2 0 0 0 597 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 3 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 107 72 1 1 1 0 1399 0 2 0 98 1 0 0 0 103 5 99 0 1 1 0 10 0 0 0 100 2 21 0 0 17 2 12 0 1 1 0 5 0 0 0 100 3 1 0 0 116 55 112 0 1 1 0 306 0 0 0 100 4 22 0 17 212 106 7 1 1 1 0 271 0 0 0 100 5 0 0 10 215 105 10 0 1 0 0 555 0 0 0 100 6 0 0 0 6 0 2 0 1 1 0 0 0 0 0 100 7 0 0 0 10 2 6 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:07:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 148 1 0 0 0 1391 0 2 0 98 1 0 0 0 19 4 15 0 1 0 0 8 0 0 0 100 2 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 301 0 0 0 100 4 0 0 18 209 104 4 0 0 0 0 266 0 0 0 100 5 0 0 9 214 105 8 0 0 0 0 554 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 144 2 0 0 0 1391 0 2 0 98 1 0 0 0 30 9 30 0 0 0 0 22 0 0 0 100 2 0 0 0 19 0 20 0 1 0 0 7 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 301 0 0 0 100 4 0 0 19 213 106 4 0 0 0 0 266 0 0 0 100 5 0 0 8 217 105 12 0 0 2 0 554 0 0 0 100 6 0 0 0 15 2 12 0 0 0 0 7 0 0 0 100 7 0 0 0 11 3 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:07:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 151 1 0 2 0 1390 0 2 0 98 1 0 0 0 16 4 12 1 0 0 0 8 0 0 0 100 2 0 0 0 15 0 10 0 0 1 0 0 0 0 0 100 3 0 0 0 113 53 110 0 1 1 0 301 0 0 0 100 4 0 0 17 213 105 10 0 0 0 0 265 0 0 0 100 5 0 0 10 218 106 10 2 0 0 0 575 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 118 0 10 2307 105 368 8 36 33 28 2805 1 4 0 95 1 191 0 9 260 7 585 8 33 24 21 1457 1 2 0 96 2 248 0 26 253 2 373 8 32 22 27 934 1 1 0 97 3 95 0 4 304 37 338 5 26 25 18 1190 1 1 0 98 4 79 0 78 395 103 146 4 19 10 13 1082 1 1 0 98 5 212 0 13 376 106 176 2 17 23 10 1450 1 1 0 98 6 39154 0 309 193 4 360 32 17 85 33 3641 16 13 0 71 7 3617 0 8 277 14 255 6 31 65 23 1280 3 2 0 95 March 4, 2026 at 01:07:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 961 0 58 2464 116 489 19 36 158 11 3046 8 4 0 88 1 390 0 0 462 39 627 16 42 67 10 1969 3 2 0 95 2 700 0 28 310 1 636 46 37 65 7 1825 4 3 0 93 3 252 0 3 366 3 565 32 40 143 4 2180 4 2 0 94 4 754 0 109 552 107 485 13 37 117 7 1875 3 2 0 96 5 137 0 21 542 106 524 13 22 11 2 2387 3 1 0 95 6 1680 0 82 237 1 372 23 24 152 9 1512 8 2 0 89 7 2724 0 11 262 2 435 18 17 76 6 1357 6 2 0 92 March 4, 2026 at 01:07:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2147 104 54 0 4 0 0 1427 0 2 0 98 1 0 0 0 142 50 100 0 0 0 0 0 0 0 0 100 2 44 0 21 58 7 20 0 1 1 0 9 0 1 0 99 3 0 0 231 20 3 8 0 0 1 0 301 0 1 0 99 4 3 0 17 348 104 104 0 1 0 0 266 0 1 0 99 5 0 0 10 257 105 18 0 2 1 0 556 0 0 0 100 6 0 0 0 44 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 45 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:07:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 144 1 1 0 0 1427 0 2 0 98 1 0 0 0 114 52 114 0 0 0 0 13 0 0 0 100 2 0 0 0 24 7 22 0 0 0 0 17 0 0 0 99 3 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 4 0 0 15 217 106 11 0 2 0 0 266 0 0 0 100 5 0 0 12 219 105 12 2 0 0 0 555 0 0 0 100 6 0 0 0 11 0 8 0 0 0 0 5 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 104 168 1 17 105 0 1427 0 2 0 98 1 0 0 0 175 26 209 0 12 84 0 0 0 0 0 100 2 0 0 0 84 14 123 0 8 56 0 9 0 1 0 99 3 0 0 0 140 89 149 11 10 116 0 301 0 1 0 99 4 0 0 17 259 104 90 1 5 82 0 266 0 1 0 99 5 0 0 10 253 105 81 0 7 59 0 553 0 0 0 99 6 0 0 0 47 1 96 0 10 68 0 0 0 0 0 100 7 0 0 0 53 3 250 0 7 62 0 333 0 0 0 100 March 4, 2026 at 01:07:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37313 0 657 2748 110 1096 53 85 601 87 8769 25 22 0 54 1 33758 0 76 735 0 857 50 80 289 62 4653 20 11 0 69 2 6582 0 20 774 10 1126 49 84 238 74 3427 12 6 0 82 3 1214 0 54 695 23 1019 23 84 281 66 3232 5 4 0 92 4 2794 0 124 816 107 983 27 68 193 54 3694 8 4 0 87 5 3674 0 30 757 105 809 40 61 250 32 2993 9 5 0 86 6 428 0 21 536 22 777 20 57 165 41 2288 3 3 0 93 7 3620 0 139 428 2 645 21 65 93 48 4558 5 5 0 90 March 4, 2026 at 01:07:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2119 104 72 2 0 3 0 1452 0 3 0 96 1 0 0 0 111 1 100 0 4 4 0 4 0 1 0 99 2 10 0 0 29 1 15 0 2 0 0 8 0 0 0 99 3 0 0 0 128 53 110 0 0 0 0 318 0 0 0 100 4 70 0 31 232 109 18 0 0 0 0 284 0 0 0 99 5 0 0 3 233 106 12 0 1 0 0 307 0 0 0 100 6 20 0 7 26 2 10 1 0 1 0 273 0 0 0 100 7 5 0 7 23 2 6 0 2 0 0 10 0 0 0 100 March 4, 2026 at 01:08:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2177 103 9 0 3 2 0 301 0 3 0 97 1 0 0 462 128 1 120 0 0 7 0 1 0 2 0 98 2 0 0 0 85 1 40 0 2 3 0 1121 0 1 0 99 3 0 0 0 186 53 109 0 1 0 0 301 0 1 0 99 4 2 0 17 297 109 26 0 1 0 0 275 0 0 0 99 5 0 0 3 286 104 6 1 0 0 0 294 0 0 0 100 6 0 0 7 80 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 8 0 0 0 0 301 0 1 0 99 1 0 0 0 126 3 127 0 0 0 0 14 0 0 0 100 2 0 0 0 18 2 44 2 0 2 0 1127 0 1 0 99 3 0 0 0 112 53 106 1 0 0 0 301 0 0 0 100 4 0 0 17 229 113 18 1 0 1 0 275 0 0 0 100 5 0 0 3 217 104 12 0 1 2 0 295 0 0 0 100 6 0 0 7 20 4 18 1 2 0 0 267 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:08:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2479 0 21 2171 102 160 3 13 100 5 480 1 3 0 96 1 40 0 4 149 0 231 0 22 92 11 132 0 1 0 99 2 26 0 0 82 2 167 0 16 69 11 1542 0 1 0 99 3 13 0 2 230 119 237 10 14 109 5 372 0 1 0 99 4 16 0 21 286 114 131 0 11 67 7 355 0 1 0 99 5 13 0 10 270 104 120 0 9 109 1 352 0 1 0 99 6 8 0 7 68 2 124 0 8 79 2 292 0 0 0 99 7 11 0 3 58 0 99 0 10 79 0 42 0 1 0 99 March 4, 2026 at 01:08:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2551 0 235 2665 102 865 34 64 301 51 4424 7 8 0 85 1 36778 0 532 597 6 787 35 54 239 74 6217 27 19 0 54 2 7100 0 61 638 9 910 39 74 170 52 5399 13 7 0 80 3 1548 0 6 574 25 862 14 82 173 79 3755 4 3 0 92 4 2509 0 141 900 120 1089 28 77 128 53 3522 11 5 0 85 5 1033 0 51 749 104 888 27 56 102 32 3454 5 3 0 92 6 2208 0 38 456 4 646 6 55 121 39 2371 8 4 0 88 7 566 0 9 400 2 554 17 47 38 26 2175 4 2 0 94 March 4, 2026 at 01:08:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 14 2153 103 25 1 3 3 0 10 0 2 0 97 1 6 0 237 41 1 34 0 4 2 0 26 0 1 0 99 2 0 0 0 62 3 49 3 3 4 0 1159 0 1 0 99 3 0 0 0 163 55 117 0 1 2 0 314 0 0 0 99 4 3 0 35 332 103 95 0 3 1 0 284 0 1 0 99 5 72 0 7 268 110 24 2 0 5 0 311 0 1 0 99 6 2 0 7 52 2 6 1 1 0 0 271 0 0 0 100 7 0 0 0 49 0 4 0 2 1 0 12 0 0 0 100 March 4, 2026 at 01:08:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 50 0 1 0 0 0 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 37 0 0 7 0 1710 0 1 0 99 3 0 0 0 115 53 113 0 0 1 0 289 0 0 0 100 4 3 0 18 230 109 16 1 0 0 0 301 0 0 0 100 5 0 0 2 279 110 70 0 2 0 0 304 0 0 0 99 6 0 0 7 8 2 4 0 0 0 0 261 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:08:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 238 2107 101 115 0 1 0 0 0 0 2 0 98 1 0 0 0 51 2 18 0 2 1 0 12 0 0 0 100 2 0 0 0 49 2 42 1 1 1 0 1430 0 1 0 99 3 0 0 0 151 54 112 1 0 0 0 301 0 0 0 100 4 1 0 18 250 111 4 0 0 0 0 266 0 0 0 100 5 0 0 2 262 110 22 1 0 0 0 303 0 0 0 100 6 0 0 7 48 2 12 0 1 0 0 265 0 0 0 100 7 0 0 0 39 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6499 0 16 2514 102 473 8 38 142 28 2817 5 6 0 89 1 9904 0 444 324 1 601 11 42 159 67 4476 6 9 0 85 2 2720 0 20 431 6 795 17 72 175 73 3568 2 4 0 94 3 253 0 14 461 111 714 21 56 166 47 1987 2 3 0 96 4 194 0 76 591 116 689 5 51 128 52 1647 1 2 0 96 5 375 0 22 594 119 532 13 52 137 41 1306 1 2 0 97 6 53 0 25 286 3 446 3 38 117 28 1364 1 2 0 97 7 2799 0 20 359 2 373 5 27 111 25 960 4 3 0 94 March 4, 2026 at 01:08:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20369 0 42 2170 102 152 9 13 13 6 744 9 10 0 81 1 186 0 0 70 1 52 2 9 9 2 227 0 1 0 99 2 3508 0 180 76 12 106 3 2 27 13 2365 4 3 0 93 3 4923 0 21 142 4 77 1 4 25 15 891 3 2 0 95 4 205 0 18 306 104 146 2 19 20 23 851 0 1 0 99 5 214 0 3 296 104 120 0 14 15 12 644 0 1 0 99 6 264 0 44 196 45 235 0 13 35 15 530 0 1 0 98 7 151 0 0 75 1 94 0 9 20 10 142 0 0 0 100 March 4, 2026 at 01:08:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 43 2170 101 85 0 2 1 0 1 0 3 0 97 1 0 0 462 21 1 16 0 1 2 0 0 0 1 0 99 2 0 0 0 107 2 58 1 2 2 0 1402 0 1 0 99 3 0 0 0 92 4 16 0 0 0 0 301 0 0 0 99 4 0 0 17 286 105 10 0 2 0 0 265 0 1 0 99 5 0 0 3 292 103 12 0 0 0 0 294 0 0 0 100 6 64 0 7 188 56 112 0 0 0 0 271 0 0 0 100 7 0 0 0 81 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:08:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 100 0 1 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 38 2 0 0 0 1404 0 1 0 99 3 0 0 0 17 4 14 0 0 0 0 301 0 0 0 100 4 0 0 18 213 106 6 0 0 1 0 266 0 0 0 100 5 0 0 2 221 103 14 1 1 0 0 294 0 0 0 100 6 0 0 7 120 57 116 1 1 0 0 268 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2101 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 19 4 20 0 0 0 0 19 0 0 0 100 2 0 0 0 11 2 38 0 0 2 0 1410 0 1 0 99 3 0 0 0 16 4 12 0 0 0 0 301 0 0 0 100 4 0 0 19 219 112 4 0 0 0 0 266 0 0 0 100 5 0 0 1 222 103 16 0 0 0 0 294 0 0 0 100 6 0 0 7 98 44 94 0 2 0 0 275 0 0 0 100 7 0 0 0 42 18 38 0 1 0 0 3 0 0 0 100 March 4, 2026 at 01:08:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 100 173 0 7 50 0 0 0 1 0 99 1 0 0 0 53 2 90 0 9 58 0 1 0 0 0 100 2 0 0 0 39 2 90 1 3 63 0 1402 0 1 0 99 3 0 0 0 95 55 102 11 5 88 0 301 0 1 0 99 4 0 0 16 257 108 90 1 2 61 0 266 0 0 0 100 5 0 0 4 253 104 81 0 5 70 0 315 0 0 0 99 6 0 0 7 51 8 80 0 4 60 0 266 0 0 0 100 7 0 0 0 134 52 154 0 3 54 0 0 0 0 0 100 March 4, 2026 at 01:08:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 3 0 0 1 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 3 0 0 0 100 2 0 0 0 13 2 36 3 1 1 0 1409 0 1 0 99 3 0 0 0 16 4 12 0 0 0 0 301 0 0 0 100 4 0 0 17 213 108 4 0 0 0 0 266 0 0 0 100 5 0 0 3 219 103 12 0 0 0 0 294 0 0 0 100 6 0 0 7 21 8 18 0 0 0 0 276 0 0 0 100 7 0 0 0 113 52 109 0 2 0 0 5 0 0 0 100 March 4, 2026 at 01:08:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 1 0 0 1 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 15 3 38 2 0 1 0 1403 0 1 0 99 3 0 0 0 17 4 14 0 0 0 0 301 0 0 0 100 4 0 0 19 209 104 4 0 0 0 0 266 0 0 0 100 5 0 0 1 219 103 11 0 1 0 0 294 0 0 0 100 6 0 0 7 19 7 14 0 0 0 0 268 0 0 0 100 7 0 0 0 108 51 102 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:08:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 112 0 0 0 0 0 0 1 0 99 1 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 2 0 0 0 10 2 34 1 0 1 0 1403 0 0 0 100 3 0 0 0 16 4 12 0 0 0 0 301 0 0 0 100 4 0 0 16 210 105 4 0 0 0 0 266 0 0 0 100 5 0 0 4 214 104 6 1 0 0 0 294 0 0 0 100 6 0 0 7 19 7 14 1 0 0 0 268 0 0 0 100 7 0 0 0 109 51 104 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:08:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 18 3 20 0 1 0 0 17 0 0 0 100 2 0 0 0 14 2 38 3 0 0 0 1410 0 0 0 99 3 0 0 0 19 4 18 1 1 0 0 301 0 0 0 100 4 0 0 16 214 107 4 1 0 0 0 266 0 0 0 100 5 0 0 4 216 104 10 0 0 2 0 294 0 0 0 100 6 0 0 7 26 8 24 0 0 0 0 271 0 0 0 100 7 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 111 0 1 1 0 0 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 12 3 38 0 0 1 0 1408 0 1 0 99 3 0 0 0 19 5 16 0 0 0 0 301 0 0 0 100 4 20 0 17 213 104 12 0 0 5 0 271 0 0 0 100 5 1 0 3 218 106 10 1 0 0 0 304 0 0 0 100 6 0 0 7 18 7 14 0 0 0 0 268 0 0 0 100 7 0 0 0 109 51 102 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:08:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 877 0 0 2400 108 556 14 28 48 2 1702 7 3 0 90 1 664 0 33 350 6 534 29 29 40 1 2030 8 2 0 90 2 182 0 3 303 25 447 32 21 22 1 2475 3 2 0 95 3 485 0 47 251 5 384 4 22 104 0 1632 3 2 0 95 4 561 0 87 460 105 453 8 27 108 2 1664 4 2 0 94 5 436 0 26 398 104 326 17 26 35 3 1374 3 1 0 96 6 656 0 70 301 12 512 15 25 122 3 1356 3 2 0 95 7 505 0 19 175 15 234 1 13 60 1 900 2 1 0 97 March 4, 2026 at 01:08:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 110 0 2 0 0 1 0 1 0 99 1 0 0 0 12 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 36 1 1 1 0 1420 0 0 0 100 3 0 0 0 16 4 12 0 1 0 0 301 0 0 0 100 4 3 0 18 218 105 14 0 0 0 0 266 0 0 0 100 5 0 0 2 227 109 18 2 1 0 0 303 0 0 0 100 6 0 0 7 108 52 104 0 0 0 0 260 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:08:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 2 0 0 0 12 3 36 1 0 1 0 1418 0 0 0 99 3 0 0 0 16 4 12 0 0 0 0 301 0 1 0 99 4 0 0 19 209 104 4 1 0 0 0 266 0 0 0 100 5 0 0 1 227 110 20 0 0 0 0 301 0 0 0 100 6 0 0 7 108 52 104 0 0 0 0 260 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 18 4 18 0 0 0 0 13 0 0 0 100 2 0 0 0 15 3 40 2 0 2 0 1427 0 0 0 99 3 0 0 0 16 4 12 0 0 0 0 301 0 0 0 100 4 0 0 17 213 106 6 0 1 0 0 266 0 0 0 100 5 0 0 3 233 109 30 1 1 0 0 303 0 0 0 100 6 0 0 7 119 54 116 1 1 0 0 267 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:08:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 175 0 5 2354 100 306 3 34 106 14 393 0 2 0 97 1 169 0 1 184 1 209 1 23 88 13 350 0 1 0 98 2 3420 0 152 145 3 222 5 17 56 29 3715 2 7 0 91 3 173 0 4 245 67 365 14 40 127 19 1020 1 1 0 98 4 3552 0 215 352 103 331 7 28 94 44 1560 3 3 0 93 5 4823 0 20 495 112 299 8 27 126 26 1132 4 2 0 94 6 315 0 26 359 47 474 3 38 93 38 921 1 2 0 98 7 127 0 1 179 0 309 1 36 128 32 560 0 1 0 99 March 4, 2026 at 01:08:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 101 116 0 3 2 0 9 0 2 0 98 1 64 0 0 28 7 18 0 2 2 0 26 0 0 0 100 2 0 0 0 19 3 36 1 0 2 0 1417 0 0 0 99 3 0 0 0 22 4 14 0 0 0 0 301 0 0 0 100 4 0 0 18 216 104 6 0 0 0 0 266 0 0 0 100 5 0 0 9 219 103 8 1 1 0 0 294 0 0 0 100 6 0 0 28 120 52 110 1 0 1 0 263 0 1 0 99 7 0 0 0 14 2 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:08:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 101 106 0 1 0 0 26 0 1 0 98 1 0 0 231 21 6 18 0 1 1 0 8 0 1 0 99 2 0 0 0 138 46 129 1 4 1 0 1408 0 1 0 99 3 0 0 0 50 4 12 0 0 0 0 301 0 0 0 100 4 0 0 15 241 103 4 1 0 0 0 266 0 0 0 100 5 0 0 5 248 103 8 0 0 0 0 294 0 0 0 100 6 0 0 7 62 10 24 0 3 1 0 260 0 0 0 100 7 0 0 0 41 0 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:08:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2111 100 112 0 1 0 0 0 0 2 0 98 1 0 0 0 22 7 14 0 0 0 0 9 0 0 0 100 2 0 0 0 122 53 142 1 0 0 0 1406 0 1 0 99 3 0 0 0 20 4 14 0 1 0 0 301 0 0 0 100 4 0 0 16 212 104 4 0 0 0 0 266 0 0 0 100 5 0 0 4 216 103 6 0 0 0 0 294 0 0 0 100 6 0 0 7 11 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 12 1 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:08:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 30 9 32 0 0 0 0 23 0 0 0 100 2 1 0 0 116 52 140 1 0 1 0 1412 0 1 0 99 3 0 0 0 22 5 19 0 1 0 0 301 0 0 0 100 4 0 0 18 213 106 4 0 0 0 0 266 0 0 0 100 5 0 0 2 216 103 10 0 0 0 0 294 0 0 0 100 6 0 0 7 15 2 12 1 1 0 0 265 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 0 4 0 0 0 1 0 99 1 0 0 0 21 6 18 0 1 0 0 10 0 0 0 100 2 0 0 0 58 24 82 2 0 1 0 1413 0 1 0 99 3 0 0 0 83 34 80 0 1 2 0 304 0 0 0 100 4 1 0 18 218 105 20 0 2 2 0 273 0 0 0 100 5 0 0 2 220 103 15 1 1 1 0 297 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 8 1 2 1 0 0 0 2 0 0 0 100 March 4, 2026 at 01:08:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 2107 102 104 0 0 0 0 6 0 1 0 99 1 0 0 0 11 2 6 0 1 0 0 5 0 0 0 100 2 0 0 0 14 3 38 2 1 1 0 1402 0 0 0 99 3 0 0 0 118 54 116 0 2 0 0 301 0 0 0 100 4 1 0 18 222 110 18 1 0 0 0 279 0 0 0 100 5 0 0 2 218 104 10 0 0 0 0 299 0 0 0 100 6 0 0 7 17 4 14 0 1 0 0 262 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 102 0 0 0 0 1 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 2 0 0 0 9 2 34 0 0 1 0 1395 0 0 0 100 3 0 0 0 116 54 112 0 0 0 0 301 0 0 0 100 4 0 0 17 220 109 16 0 0 0 0 274 0 0 0 100 5 0 0 3 213 103 6 0 1 0 0 294 0 0 0 100 6 0 0 7 16 2 12 0 0 0 0 260 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:08:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 100 0 0 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 34 1 0 2 0 1395 0 0 0 100 3 0 0 0 118 54 114 0 0 1 0 301 0 0 0 100 4 0 0 16 227 110 28 0 1 1 0 272 0 0 0 100 5 0 0 4 213 103 6 0 0 0 0 294 0 0 0 100 6 0 0 7 17 2 12 1 0 0 0 260 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 0 0 0 0 1 0 99 1 1 0 0 18 4 18 0 0 0 0 16 0 0 0 100 2 0 0 0 12 2 38 1 0 0 0 1402 0 0 0 99 3 0 0 0 117 54 114 0 0 0 0 301 0 0 0 100 4 0 0 17 232 117 18 0 1 1 0 274 0 0 0 100 5 0 0 3 219 103 14 1 1 2 0 294 0 0 0 100 6 0 0 7 27 4 24 0 0 0 0 267 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:08:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 405 0 17 2419 100 520 14 52 55 20 1895 2 3 0 95 1 655 0 12 282 3 377 11 40 33 13 1376 2 2 0 96 2 132 0 3 300 4 472 17 37 43 18 3055 2 2 0 96 3 232 0 2 295 36 334 8 23 46 14 1390 2 2 0 96 4 39875 0 404 558 118 590 29 28 57 39 4832 19 16 0 65 5 5434 0 47 538 119 459 20 39 74 38 1944 6 3 0 91 6 409 0 15 290 4 481 3 40 30 33 2252 2 1 0 97 7 192 0 0 236 1 369 3 38 30 37 1464 1 1 0 98 March 4, 2026 at 01:08:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 519 0 16 2401 101 385 19 31 127 3 1311 2 3 0 95 1 38 0 0 294 23 419 40 25 7 0 1697 3 1 0 96 2 464 0 26 334 36 423 18 27 70 4 2553 4 2 0 94 3 526 0 64 234 5 389 24 26 182 4 1546 6 2 0 93 4 789 0 45 433 106 296 10 22 107 3 1472 2 1 0 97 5 522 0 77 404 103 321 16 20 87 2 1035 3 3 0 95 6 562 0 51 284 4 494 34 26 77 3 1877 7 2 0 92 7 341 0 13 256 2 407 24 30 130 1 1029 2 1 0 96 March 4, 2026 at 01:08:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 100 4 0 1 1 0 0 0 1 0 99 1 0 0 0 147 51 108 0 2 0 0 0 0 0 0 100 2 0 0 231 29 9 54 0 1 2 0 1425 0 1 0 98 3 0 0 0 52 4 12 0 0 0 0 301 0 0 0 100 4 2 0 16 250 105 6 0 0 0 0 266 0 0 0 100 5 0 0 25 250 102 11 0 1 2 0 0 0 1 0 99 6 0 0 7 151 3 110 1 1 0 0 557 0 0 0 100 7 0 0 0 41 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 10 0 1 0 0 0 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 24 8 46 3 0 1 0 1426 1 1 0 99 3 0 0 0 17 4 14 0 0 0 0 301 0 0 0 100 4 0 0 17 210 105 4 0 0 0 0 266 0 0 0 100 5 0 0 3 213 102 6 0 0 0 0 0 0 0 0 100 6 0 0 7 113 4 106 1 0 0 0 555 0 0 0 100 7 0 0 0 8 1 4 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:08:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 8 0 0 0 0 0 0 1 0 99 1 0 0 0 116 53 116 0 0 1 0 14 0 0 0 100 2 0 0 0 26 8 52 1 0 2 0 1431 0 1 0 99 3 0 0 0 20 4 20 0 1 1 0 301 0 0 0 99 4 0 0 16 213 106 4 1 0 0 0 266 0 0 0 100 5 0 0 4 214 102 8 0 1 2 0 0 0 0 0 100 6 0 0 7 117 3 114 1 0 0 0 558 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1389 0 32 2946 100 1247 17 98 243 74 3652 6 7 0 88 1 789 0 46 824 20 1133 52 86 252 44 3962 9 4 0 87 2 556 0 47 713 26 866 22 100 223 25 3875 4 4 0 92 3 15969 0 45 648 77 828 51 59 172 27 2970 9 10 0 81 4 27328 0 334 784 110 908 35 59 253 65 6966 13 11 0 76 5 9290 0 304 866 113 1120 29 82 303 74 3919 12 7 0 81 6 6087 0 35 662 4 1090 20 76 200 78 3605 11 5 0 84 7 2875 0 254 590 2 1168 24 84 237 91 4110 10 7 0 83 March 4, 2026 at 01:08:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 70 2111 102 36 0 4 4 0 13 0 3 0 97 1 23 0 0 112 1 100 0 5 5 0 10 0 1 0 99 2 0 0 7 31 4 44 1 3 0 0 1438 0 1 0 99 3 0 0 0 28 3 12 0 0 0 0 315 0 0 0 100 4 10 0 30 234 113 12 0 1 0 0 287 0 0 0 100 5 17 0 4 327 153 106 0 1 0 0 19 0 0 0 100 6 9 0 7 31 5 16 0 1 0 0 564 0 0 0 100 7 44 0 0 31 5 14 0 1 0 0 15 0 0 0 100 March 4, 2026 at 01:08:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2177 101 117 0 2 1 0 1 0 3 0 97 1 0 0 462 30 1 24 0 1 2 0 0 0 1 0 99 2 0 0 0 86 3 38 1 0 1 0 1414 0 1 0 99 3 0 0 0 87 3 12 0 1 0 0 301 0 1 0 99 4 1 0 18 285 107 6 0 0 0 0 266 0 0 0 99 5 0 0 2 379 151 100 0 0 0 0 0 0 0 0 100 6 0 0 7 86 4 8 2 0 0 0 553 0 0 0 100 7 0 0 0 93 7 16 0 1 0 0 11 0 0 0 100 March 4, 2026 at 01:08:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 18 1 16 0 1 1 0 0 0 0 0 100 2 0 0 0 12 3 36 1 0 1 0 1414 0 0 0 99 3 0 0 0 15 3 12 0 0 0 0 301 0 0 0 100 4 0 0 16 213 107 6 1 0 0 0 266 0 0 0 100 5 0 0 4 307 151 100 0 0 0 0 0 0 0 0 100 6 0 0 7 12 4 8 0 0 0 0 555 0 0 0 100 7 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:08:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 88 0 11 2241 100 387 5 25 33 32 559 0 3 0 97 1 44 0 18 198 4 208 2 23 18 19 444 0 1 0 99 2 85 0 4 159 3 144 4 14 11 20 1747 0 1 0 98 3 38 0 11 115 3 94 1 11 12 16 514 0 1 0 99 4 5 0 21 297 108 64 0 11 14 4 422 0 1 0 99 5 6577 0 319 401 147 290 9 10 48 41 3182 4 6 0 90 6 3688 0 26 214 7 192 3 19 42 30 946 4 2 0 94 7 336 0 15 176 14 252 4 29 56 41 877 1 1 0 99 March 4, 2026 at 01:08:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1129 0 46 2612 103 693 33 69 171 48 2849 6 4 0 89 1 34165 0 159 596 3 1083 40 85 235 45 3674 17 15 0 68 2 1305 0 4 481 3 780 21 59 268 26 4078 4 4 0 92 3 1250 0 40 554 75 728 45 57 214 19 2683 4 3 0 93 4 156 0 109 641 133 670 22 45 93 13 2543 4 3 0 93 5 6979 0 320 630 103 746 29 47 203 46 4429 11 7 0 83 6 7122 0 53 531 2 833 25 48 246 41 2523 9 4 0 86 7 814 0 13 499 21 733 19 62 127 41 3054 6 2 0 91 March 4, 2026 at 01:08:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2164 101 110 0 1 0 0 19 0 2 0 98 1 0 0 28 59 0 4 0 2 4 0 9 0 2 0 98 2 5 0 343 33 4 56 0 0 7 0 1426 0 2 0 98 3 0 0 0 72 2 16 0 4 2 0 302 0 0 0 99 4 5 0 29 286 113 24 0 1 0 0 269 0 1 0 99 5 64 0 6 362 148 103 0 2 0 0 17 0 1 0 99 6 0 0 0 67 1 8 0 1 0 0 17 0 0 0 100 7 2 0 7 67 3 8 1 1 0 0 567 0 0 0 100 March 4, 2026 at 01:08:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 100 104 0 0 0 0 0 0 1 0 99 1 0 0 0 27 0 4 0 0 0 0 0 0 0 0 100 2 0 0 119 25 4 48 2 0 2 0 1419 0 1 0 99 3 0 0 0 32 3 10 0 0 0 0 301 0 0 0 100 4 0 0 21 231 105 10 0 0 0 0 266 0 0 0 100 5 0 0 7 338 157 116 0 0 0 0 10 0 0 0 99 6 0 0 0 27 1 4 0 0 0 0 0 0 0 0 100 7 0 0 7 29 3 6 1 0 0 0 554 0 0 0 100 March 4, 2026 at 01:08:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 104 0 0 0 0 2 0 1 0 99 1 0 0 14 9 1 4 0 0 0 0 1 0 0 0 100 2 0 0 0 21 3 44 0 0 0 0 1418 0 0 0 99 3 0 0 0 18 3 12 0 0 0 0 301 0 0 0 100 4 0 0 18 217 105 14 1 1 1 0 266 0 0 0 100 5 0 0 2 262 127 50 0 0 0 0 9 0 0 0 100 6 0 0 0 70 31 64 0 1 0 0 0 0 0 0 100 7 0 0 7 12 3 6 0 0 0 0 553 0 0 0 100 March 4, 2026 at 01:08:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 338 0 8 2449 100 588 6 45 51 38 1727 2 3 0 96 1 33330 0 20 326 3 488 12 42 74 45 2544 13 11 0 76 2 257 0 4 313 3 534 2 36 37 46 2706 2 2 0 96 3 224 0 0 286 4 344 5 30 29 31 1672 2 1 0 97 4 161 0 74 438 110 253 8 27 36 14 1427 2 2 0 96 5 10133 0 463 480 109 545 16 27 81 76 5797 7 9 0 84 6 5231 0 36 426 32 551 8 46 90 58 1567 5 4 0 91 7 411 0 29 306 23 556 7 47 70 60 2761 2 2 0 97 March 4, 2026 at 01:08:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 125 0 3 2547 106 695 38 64 145 10 1787 3 3 0 93 1 887 0 13 423 2 624 20 47 162 9 1694 3 2 0 94 2 584 0 0 446 3 671 16 44 152 3 3458 5 4 0 91 3 3706 0 75 598 129 678 22 46 244 15 1881 6 3 0 91 4 1289 0 92 557 105 618 24 39 251 14 1737 3 3 0 94 5 2777 0 59 527 102 620 49 44 287 9 2060 4 4 0 93 6 3871 0 207 353 4 558 21 40 113 12 2587 8 3 0 88 7 648 0 111 324 7 544 33 41 180 21 2233 6 4 0 90 March 4, 2026 at 01:08:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 100 112 0 2 1 0 0 0 2 0 98 1 0 0 0 78 0 2 0 1 0 0 0 0 0 0 100 2 1 0 462 25 3 42 1 0 1 0 1421 0 1 0 98 3 0 0 0 185 53 108 0 0 0 0 301 0 1 0 99 4 4 0 61 283 107 16 0 1 0 0 269 0 1 0 99 5 0 0 1 281 101 2 0 0 0 0 0 0 0 0 100 6 44 0 0 95 8 18 0 0 0 0 10 0 0 0 100 7 0 0 7 88 3 12 0 2 1 0 557 0 1 0 99 March 4, 2026 at 01:08:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 122 0 1 0 0 3 0 1 0 99 1 0 0 0 17 2 14 1 2 1 0 7 0 0 0 100 2 0 0 0 13 3 36 2 0 3 0 1422 0 1 0 99 3 0 0 0 115 54 110 1 0 0 0 301 0 0 0 100 4 0 0 16 219 111 10 1 0 0 0 266 0 0 0 100 5 0 0 4 215 102 10 0 0 0 0 0 0 0 0 100 6 0 0 0 19 7 14 0 1 0 0 8 0 0 0 100 7 0 0 7 13 4 8 0 1 0 0 554 0 0 0 100 March 4, 2026 at 01:08:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 34 0 0 0 0 1421 0 0 0 99 3 0 0 0 112 53 108 0 0 0 0 301 0 0 0 100 4 0 0 17 212 105 8 0 0 0 0 266 0 0 0 100 5 0 0 3 215 101 6 0 0 0 0 0 0 0 0 100 6 0 0 0 21 8 16 0 0 0 0 9 0 0 0 100 7 0 0 7 11 3 6 1 0 0 0 554 0 0 0 100 March 4, 2026 at 01:08:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1190 0 106 2916 101 1196 39 111 210 55 4029 8 6 0 85 1 479 0 18 794 4 1114 40 80 39 44 4400 6 3 0 91 2 3087 0 28 747 2 918 21 68 91 57 4595 8 4 0 87 3 1221 0 5 613 19 885 49 63 62 38 3282 5 3 0 92 4 924 0 141 797 112 860 39 66 201 17 3702 8 4 0 87 5 46990 0 634 809 102 1037 51 67 206 84 9342 24 21 0 54 6 8606 0 93 645 23 974 33 85 173 64 3665 8 7 0 84 7 1028 0 24 659 20 1231 55 94 127 76 3782 5 3 0 91 March 4, 2026 at 01:08:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 70 2153 101 110 0 9 98 0 6 0 3 0 97 1 0 0 0 138 1 156 0 10 85 0 23 0 2 0 98 2 63 0 7 89 8 156 1 7 89 0 1445 0 1 0 99 3 1 0 0 119 65 98 7 7 110 0 303 0 1 0 99 4 11 0 34 265 108 89 0 7 78 0 278 0 1 0 99 5 7 0 1 265 103 84 0 5 78 0 31 0 0 0 99 6 7 0 0 69 1 101 0 6 103 0 10 0 0 0 100 7 0 0 7 186 54 226 0 7 60 0 591 0 1 0 99 March 4, 2026 at 01:08:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2178 103 14 0 1 1 0 11 0 3 0 97 1 0 0 462 114 0 106 0 0 1 0 18 0 1 0 99 2 0 0 0 97 8 48 2 1 1 0 1430 0 1 0 99 3 0 0 0 81 1 6 0 1 0 0 301 0 1 0 99 4 2 0 16 291 107 14 1 0 0 0 266 0 1 0 99 5 0 0 4 281 101 2 0 1 0 0 0 0 0 0 100 6 0 0 0 81 2 4 0 0 0 0 1 0 0 0 100 7 0 0 7 192 54 116 0 0 0 0 554 0 0 0 100 March 4, 2026 at 01:08:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 82 0 1 0 0 0 0 1 0 99 1 0 0 0 30 0 22 0 0 0 0 0 0 0 0 100 2 0 0 0 23 9 48 0 0 1 0 1430 0 0 0 99 3 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 4 0 0 18 218 106 18 0 2 0 0 266 0 0 0 100 5 0 0 2 209 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 7 0 0 7 122 54 116 2 0 0 0 555 0 0 0 100 March 4, 2026 at 01:08:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 40 0 18 2208 104 242 1 18 45 24 362 0 2 0 98 1 45 0 3 100 0 188 3 15 19 25 340 0 1 0 99 2 26 0 10 114 11 141 3 11 17 8 1657 0 1 0 98 3 17 0 12 82 1 74 0 9 9 13 488 0 0 0 99 4 26 0 15 285 107 80 0 6 14 4 423 0 1 0 99 5 5333 0 200 294 101 159 5 9 49 27 2510 2 5 0 94 6 2011 0 12 86 1 182 3 20 34 13 607 1 2 0 97 7 54 0 8 280 52 259 0 18 36 22 948 0 1 0 99 March 4, 2026 at 01:08:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 664 0 81 2611 106 745 17 66 101 51 3527 5 6 0 89 1 623 0 30 505 1 686 15 62 90 35 2461 5 4 0 92 2 792 0 34 534 8 818 19 50 77 24 3571 4 4 0 92 3 1197 0 56 470 7 674 23 49 127 27 3004 9 4 0 87 4 981 0 126 742 129 756 19 39 141 17 2898 5 3 0 92 5 41795 0 572 597 103 624 28 35 129 44 5947 22 16 0 62 6 8470 0 29 591 14 812 22 53 141 44 2681 8 5 0 87 7 1404 0 16 524 7 846 11 69 72 61 3173 4 2 0 94 March 4, 2026 at 01:08:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 28 2222 109 197 0 8 82 0 305 0 3 0 97 1 0 0 343 57 0 90 0 8 98 0 0 0 2 0 98 2 0 0 0 99 2 106 0 6 65 0 1120 0 1 0 99 3 0 0 0 167 74 101 8 9 106 0 302 0 1 0 99 4 4 0 31 333 113 130 0 7 85 0 569 0 1 0 99 5 0 0 3 401 145 174 0 7 58 0 0 0 1 0 99 6 0 0 0 101 1 77 0 2 61 0 0 0 0 0 100 7 0 0 7 122 3 109 1 8 83 0 263 0 1 0 99 March 4, 2026 at 01:08:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2119 108 71 1 3 0 0 302 0 2 0 98 1 0 0 0 27 0 6 0 2 1 0 1 0 0 0 100 2 0 0 0 27 2 34 1 0 1 0 1121 0 0 0 100 3 0 0 0 25 1 4 0 0 0 0 301 0 1 0 99 4 0 0 16 243 115 14 0 1 0 0 568 0 0 0 100 5 0 0 4 379 152 152 0 0 0 0 0 0 0 0 100 6 0 0 0 26 2 4 0 0 0 0 2 0 0 0 100 7 0 0 7 35 3 14 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:08:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 104 112 0 1 0 0 297 0 1 0 98 1 0 0 0 19 6 12 0 0 0 0 9 0 0 0 100 2 0 0 0 10 1 32 1 0 1 0 1120 0 0 0 99 3 0 0 0 12 1 6 1 0 0 0 302 0 0 0 100 4 0 0 17 224 111 12 1 0 0 0 567 0 0 0 100 5 0 0 3 317 154 108 0 1 0 0 4 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 1 0 0 0 100 7 0 0 7 20 3 12 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:09:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 278 0 25 2443 102 595 11 47 65 46 1787 2 3 0 94 1 2932 0 36 408 9 449 18 49 82 46 1276 6 3 0 91 2 477 0 1 338 13 502 17 45 69 28 2815 2 2 0 96 3 351 0 1 266 5 281 8 28 19 25 1528 2 2 0 96 4 253 0 87 420 110 291 6 29 45 24 1587 1 2 0 97 5 40556 0 448 529 133 551 28 22 102 72 6410 20 15 0 65 6 2528 0 15 297 3 554 4 52 67 63 2125 2 2 0 96 7 212 0 18 284 3 526 3 45 64 65 1930 2 2 0 96 March 4, 2026 at 01:09:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 122 0 70 2479 107 580 8 52 38 13 2139 4 5 0 91 1 1011 0 0 481 3 731 14 37 80 13 2444 4 3 0 93 2 366 0 0 353 13 500 14 31 40 7 2910 3 2 0 94 3 1216 0 99 304 5 423 9 36 146 10 1706 6 2 0 92 4 676 0 77 514 111 472 15 27 76 8 1946 8 2 0 90 5 6604 0 233 547 135 600 34 31 92 23 2446 7 7 0 86 6 5387 0 42 415 4 594 12 28 139 11 1851 7 4 0 90 7 1191 0 46 333 4 543 31 39 130 28 2211 4 2 0 94 March 4, 2026 at 01:09:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2223 101 107 1 10 96 0 294 0 3 0 97 1 0 0 462 166 1 197 0 13 114 0 0 0 2 0 98 2 1 0 0 117 1 105 0 5 88 0 1112 0 1 0 99 3 44 0 0 188 77 82 4 5 96 0 310 0 1 0 99 4 3 0 18 324 107 89 0 9 75 0 566 0 1 0 99 5 0 0 2 378 128 156 0 14 74 0 0 0 1 0 99 6 0 0 0 165 26 125 0 7 62 0 0 0 0 0 100 7 0 0 7 116 3 74 0 7 90 0 263 0 0 0 100 March 4, 2026 at 01:09:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 4 0 0 0 0 294 0 1 0 99 1 0 0 0 116 2 110 0 0 0 0 2 0 0 0 100 2 0 0 0 10 1 34 2 1 0 0 1111 0 0 0 99 3 0 0 0 22 7 18 0 0 0 0 310 0 0 0 100 4 0 0 16 221 109 16 1 1 0 0 567 0 0 0 100 5 0 0 4 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 7 0 0 7 11 3 6 1 0 0 0 259 0 0 0 100 March 4, 2026 at 01:09:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 4 0 0 0 0 294 0 1 0 99 1 0 0 0 115 0 110 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 36 0 0 1 0 1112 0 0 0 99 3 0 0 0 20 7 16 0 0 0 0 310 0 0 0 100 4 0 0 17 221 110 12 0 0 2 0 568 0 0 0 100 5 0 0 3 210 102 4 0 1 1 0 0 0 0 0 100 6 0 0 0 28 10 24 0 1 0 0 0 0 0 0 100 7 0 0 7 95 45 92 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:09:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1360 0 22 2852 105 1120 25 96 165 75 3643 5 6 0 90 1 1542 0 125 810 7 1158 32 93 188 74 3047 4 4 0 91 2 444 0 16 707 2 1022 25 72 73 51 4494 6 4 0 90 3 1041 0 33 527 9 826 19 65 134 45 3010 5 3 0 92 4 1057 0 156 730 128 732 29 59 123 38 4713 5 4 0 91 5 4166 0 129 723 105 804 19 49 102 43 3235 4 4 0 91 6 43751 0 526 486 6 919 33 57 182 83 7282 26 18 0 56 7 10223 0 51 618 20 730 16 58 151 61 2903 12 7 0 82 March 4, 2026 at 01:09:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 70 2171 154 216 1 1 4 0 310 0 3 0 97 1 50 0 0 49 6 35 1 3 4 0 32 3 1 0 97 2 64 0 0 41 3 50 3 3 1 0 1151 0 0 0 99 3 5 0 0 34 1 18 0 2 0 0 317 0 0 0 100 4 3 0 45 241 115 22 0 1 0 0 600 0 0 0 99 5 0 0 10 233 104 14 1 0 2 0 277 0 0 0 100 6 0 0 0 30 1 12 0 2 2 0 5 0 0 0 100 7 0 0 7 29 2 16 0 2 0 0 9 0 0 0 100 March 4, 2026 at 01:09:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2251 120 197 1 12 89 0 294 0 3 0 97 1 0 0 462 86 7 122 1 14 80 0 11 0 1 0 99 2 0 0 0 193 33 181 1 6 64 0 1110 0 1 0 98 3 0 0 0 186 68 129 18 5 99 0 301 0 1 0 99 4 2 0 16 320 107 73 0 5 75 0 567 0 1 0 99 5 0 0 11 371 105 137 0 8 116 0 260 0 1 0 99 6 0 0 0 130 1 106 0 6 96 0 0 0 0 0 100 7 0 0 0 122 3 83 1 7 86 0 0 0 0 0 100 March 4, 2026 at 01:09:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 6 0 0 0 0 294 0 1 0 99 1 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 2 0 0 0 78 36 100 1 0 1 0 1111 0 0 0 99 3 0 0 0 51 18 48 0 1 0 0 301 0 0 0 100 4 0 0 17 213 106 8 0 0 0 0 566 0 0 0 100 5 0 0 10 312 104 106 0 0 0 0 260 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 104 1 3 0 0 321 0 1 0 99 1 0 0 0 25 8 20 0 1 2 0 9 0 0 0 100 2 0 0 0 10 2 34 1 0 0 0 1110 0 0 0 100 3 0 0 0 123 51 117 0 2 2 0 301 0 0 0 100 4 0 0 17 212 105 8 1 0 0 0 567 0 0 0 100 5 0 0 10 217 104 8 1 0 0 0 260 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5509 0 56 2780 103 948 34 83 138 74 4316 8 7 0 85 1 686 0 36 719 4 967 22 90 80 57 2866 5 3 0 92 2 5610 0 37 728 2 990 50 87 144 47 4281 11 6 0 83 3 1282 0 35 664 11 1194 30 94 92 65 3739 6 4 0 90 4 1151 0 128 814 128 780 15 58 114 36 3045 7 3 0 90 5 1272 0 81 708 125 615 17 56 104 36 2852 4 4 0 92 6 4518 0 187 486 2 807 25 51 159 41 4452 5 5 0 90 7 43393 0 510 552 2 950 51 57 162 87 7175 22 18 0 60 March 4, 2026 at 01:09:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 35 2120 103 28 1 4 3 0 304 0 2 0 98 1 0 0 0 44 3 28 0 1 3 0 22 0 1 0 99 2 21 0 7 63 2 76 2 5 1 0 1121 0 1 0 99 3 1 0 35 85 1 71 0 6 1 0 317 0 1 0 99 4 17 0 30 250 111 45 0 2 1 0 608 0 0 0 99 5 63 0 11 346 160 130 0 3 1 0 288 0 0 0 99 6 0 0 0 25 2 6 0 1 0 0 2 0 0 0 100 7 0 0 0 23 1 4 1 0 0 0 10 0 0 0 100 March 4, 2026 at 01:09:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2202 102 201 1 18 91 0 295 0 3 0 97 1 0 0 238 78 0 118 1 11 69 0 0 0 1 0 99 2 0 0 0 80 1 90 1 11 62 0 1108 0 1 0 99 3 0 0 0 185 82 137 5 13 124 0 301 0 1 0 99 4 0 0 18 303 106 115 1 8 108 0 566 0 1 0 99 5 0 0 9 409 161 214 0 10 75 0 290 0 1 0 99 6 0 0 0 96 2 105 1 5 90 0 0 0 0 0 100 7 0 0 0 86 1 80 1 7 79 0 0 0 0 0 100 March 4, 2026 at 01:09:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 238 2106 102 94 0 1 0 0 294 0 2 0 98 1 0 0 0 43 1 4 0 1 1 0 2 0 0 0 100 2 0 0 0 43 1 32 1 0 2 0 1107 0 1 0 99 3 0 0 0 44 2 6 0 0 0 0 301 0 0 0 100 4 0 0 18 271 107 32 1 1 1 0 568 0 0 0 100 5 0 0 10 369 160 134 1 1 1 0 269 0 0 0 99 6 0 0 0 41 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 41 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5173 0 35 2335 102 192 5 21 67 30 1152 5 4 0 91 1 414 0 15 208 0 282 2 31 52 48 799 1 1 0 98 2 176 0 3 159 2 289 3 24 48 27 1678 1 1 0 98 3 209 0 8 135 2 292 2 22 41 23 846 1 2 0 98 4 99 0 52 466 108 260 4 24 21 22 994 0 2 0 98 5 206 0 17 459 149 244 4 19 15 18 642 1 2 0 98 6 87 0 2 127 15 105 0 13 17 11 268 0 1 0 99 7 6453 0 300 105 1 182 9 13 78 31 3138 5 4 0 91 March 4, 2026 at 01:09:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 104 110 0 0 0 0 295 0 1 0 99 1 0 0 0 17 2 2 0 0 0 0 2 0 0 0 100 2 0 0 0 15 1 32 1 0 1 0 1115 0 0 0 100 3 64 0 0 25 6 14 0 0 0 0 309 0 0 0 100 4 0 0 44 223 104 19 0 2 2 0 567 0 1 0 99 5 0 0 18 226 105 16 0 3 4 0 263 0 1 0 99 6 0 0 0 118 51 110 0 1 0 0 0 0 0 0 100 7 0 0 0 12 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 103 108 0 0 0 0 294 0 1 0 99 1 0 0 0 42 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 51 1 40 2 0 1 0 1105 0 1 0 99 3 0 0 0 59 5 20 1 3 0 0 315 0 1 0 99 4 0 0 38 263 110 24 0 1 3 0 583 0 1 0 99 5 0 0 241 225 105 18 0 1 3 0 260 0 1 0 99 6 0 0 0 146 51 106 0 1 0 0 0 0 0 0 100 7 0 0 0 45 0 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:09:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 110 0 0 1 0 294 0 1 0 99 1 0 0 0 8 1 4 0 0 2 0 2 0 0 0 100 2 0 0 0 7 1 32 0 0 2 0 1101 0 0 0 100 3 0 0 0 25 5 22 0 0 0 0 309 0 0 0 99 4 0 0 16 214 106 8 1 0 0 0 566 0 0 0 100 5 0 0 11 216 105 10 0 0 0 0 260 0 0 0 100 6 0 0 0 110 52 106 0 0 0 0 0 0 0 0 100 7 0 0 0 8 0 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 121 1 2 1 0 294 0 1 0 99 1 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 12 2 34 2 0 0 0 1103 0 1 0 99 3 0 0 0 27 6 20 0 0 0 0 307 0 0 0 99 4 0 0 21 216 107 12 0 1 0 0 568 0 0 0 100 5 0 0 14 219 105 10 0 0 0 0 260 0 0 0 100 6 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 7 0 0 0 8 0 2 0 0 3 0 0 0 0 0 100 March 4, 2026 at 01:09:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 120 0 0 0 0 295 0 1 0 99 1 0 0 0 11 1 6 0 1 0 0 2 0 0 0 100 2 0 0 0 7 1 32 0 0 2 0 1101 0 0 0 99 3 0 0 0 26 8 24 0 1 0 0 317 0 0 0 99 4 0 0 17 216 107 10 0 2 0 0 570 0 0 0 100 5 3 0 10 215 105 10 0 0 0 0 263 0 0 0 100 6 0 0 0 108 51 104 0 1 0 0 1 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 3 0 0 0 100 March 4, 2026 at 01:09:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2110 104 117 0 1 0 0 299 0 1 0 99 1 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 2 21 0 0 11 2 34 2 0 1 0 1101 0 0 0 99 3 0 0 0 21 7 18 0 1 0 0 310 0 0 0 99 4 0 0 17 212 104 8 0 0 0 0 568 0 0 0 100 5 0 0 10 215 105 8 1 0 0 0 260 0 0 0 100 6 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 116 0 0 0 0 295 0 1 0 99 1 0 0 0 16 3 10 0 1 1 0 4 0 0 0 100 2 20 0 0 18 2 42 2 0 1 0 1101 0 0 0 99 3 0 0 0 26 7 27 1 2 2 0 316 0 0 0 99 4 0 0 18 227 110 18 1 0 0 0 583 0 0 0 100 5 2 0 9 217 105 12 0 1 2 0 260 0 0 0 100 6 0 0 0 111 53 106 0 0 0 0 6 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 116 1 2 2 0 294 0 1 0 99 1 0 0 0 8 0 2 0 0 3 0 0 0 0 0 100 2 0 0 0 7 1 32 0 0 0 0 1091 0 0 0 100 3 0 0 0 26 8 22 0 1 0 0 307 0 0 0 100 4 0 0 19 216 105 14 0 2 1 0 567 0 0 0 100 5 0 0 8 214 105 8 0 0 0 0 260 0 0 0 100 6 0 0 0 110 52 106 0 0 1 0 0 0 0 0 100 7 0 0 0 8 0 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 105 96 0 2 1 0 304 0 1 0 99 1 0 0 0 11 1 6 0 0 0 0 20 0 0 0 100 2 0 0 0 9 1 34 1 1 1 0 1091 0 0 0 100 3 0 0 0 51 6 45 1 2 0 0 309 0 0 0 100 4 0 0 17 210 104 6 0 0 0 0 567 0 0 0 100 5 0 0 10 216 105 10 0 0 0 0 260 0 0 0 100 6 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 145 0 37 2312 111 372 9 34 30 22 1379 2 3 0 95 1 473 0 0 209 2 289 8 25 37 14 1137 1 1 0 98 2 13759 0 2 164 3 223 14 22 19 16 3689 9 4 0 87 3 66 0 5 180 7 302 2 21 18 16 1835 1 1 0 98 4 204 0 81 383 104 362 3 24 19 22 1762 1 2 0 97 5 25 0 15 334 105 135 6 13 11 7 861 1 1 0 98 6 87 0 6 169 11 232 9 16 15 12 618 1 1 0 98 7 3101 0 119 188 36 268 9 16 20 23 1586 2 2 0 95 March 4, 2026 at 01:09:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3880 0 83 2528 111 535 36 43 143 11 2302 5 6 0 90 1 878 0 43 415 7 737 38 55 148 27 2010 4 3 0 93 2 19778 0 8 487 37 776 42 46 37 13 4012 11 9 0 80 3 2371 0 20 460 1 718 51 50 159 17 2222 6 3 0 91 4 987 0 120 681 114 737 46 47 103 11 2443 7 3 0 91 5 830 0 10 507 106 341 4 23 46 6 1940 3 2 0 95 6 691 0 22 373 4 616 34 42 69 7 1784 3 2 0 95 7 3787 0 181 275 1 391 24 29 62 13 2784 9 4 0 87 March 4, 2026 at 01:09:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 103 22 1 1 0 0 294 0 2 0 98 1 0 0 231 13 1 10 0 0 1 0 0 0 1 0 99 2 0 0 0 127 40 118 1 2 2 0 1120 0 1 0 99 3 0 0 0 163 13 128 0 1 0 0 308 0 0 0 100 4 47 0 21 275 118 32 0 0 0 0 591 0 0 0 99 5 0 0 14 252 105 12 0 1 0 0 263 0 0 0 100 6 0 0 0 41 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 39 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2166 103 186 1 17 104 0 294 0 2 0 98 1 0 0 0 55 2 78 1 11 76 0 2 0 0 0 100 2 0 0 0 48 2 99 3 10 62 0 1115 0 1 0 99 3 0 0 0 190 94 198 8 17 96 0 301 0 1 0 99 4 0 0 17 271 111 102 1 7 78 0 576 0 1 0 99 5 0 0 13 314 128 162 2 10 99 0 259 0 1 0 99 6 0 0 0 45 1 71 1 7 73 0 0 0 0 0 100 7 0 0 0 39 0 61 1 9 68 0 0 0 0 0 100 March 4, 2026 at 01:09:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 108 0 0 0 0 294 0 1 0 99 1 0 0 0 11 1 12 0 1 0 0 0 0 0 0 100 2 0 0 0 12 3 36 1 0 1 0 1116 0 0 0 99 3 0 0 0 17 1 12 1 1 0 0 301 0 0 0 100 4 0 0 17 226 112 20 0 0 0 0 576 0 0 0 100 5 0 0 10 314 155 108 0 0 0 0 260 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:09:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8583 0 223 2793 105 1293 44 87 147 74 5056 11 10 0 79 1 6201 0 27 707 2 1159 38 91 111 57 4020 9 6 0 86 2 876 0 20 712 3 1187 22 89 71 72 4172 4 4 0 92 3 689 0 19 604 2 965 26 76 71 54 3437 4 4 0 92 4 405 0 70 689 112 643 9 54 72 39 3111 4 3 0 93 5 193 0 10 762 145 792 28 58 50 18 2573 4 3 0 93 6 34372 0 138 503 6 894 32 54 63 41 4802 16 13 0 71 7 9266 0 307 411 5 688 16 50 105 62 5424 7 8 0 85 March 4, 2026 at 01:09:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 133 0 82 2200 151 189 7 15 53 0 543 1 3 0 96 1 570 0 20 122 1 87 1 4 85 4 61 2 1 0 97 2 273 0 20 77 4 77 1 9 60 1 1579 1 1 0 98 3 570 0 11 64 2 42 1 9 42 2 206 1 1 0 98 4 18 0 59 264 109 41 4 7 14 1 961 5 1 0 95 5 671 0 25 261 103 23 2 7 44 1 398 1 1 0 98 6 696 0 7 82 7 46 4 11 38 1 717 1 1 0 98 7 802 0 87 62 4 51 4 10 116 2 134 4 1 0 95 March 4, 2026 at 01:09:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2198 125 55 0 1 2 0 295 0 3 0 97 1 0 0 462 69 3 62 0 0 3 0 4 0 1 0 99 2 0 0 0 209 32 166 1 4 3 0 1120 0 1 0 99 3 0 0 0 90 0 18 0 1 0 0 7 0 0 0 100 4 3 0 16 305 116 27 0 2 0 0 885 0 1 0 99 5 0 0 4 286 103 8 0 0 1 0 0 0 0 0 100 6 0 0 7 94 9 18 0 0 0 0 270 0 0 0 100 7 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 106 91 3 14 87 0 298 0 2 0 98 1 0 0 0 48 0 86 0 11 79 0 0 0 0 0 100 2 0 0 0 201 53 254 1 9 76 0 1115 0 1 0 99 3 0 0 0 124 77 142 11 12 142 0 0 0 1 0 99 4 0 0 19 305 115 130 0 7 86 0 868 0 1 0 99 5 0 0 1 254 104 83 1 10 57 0 21 0 0 0 100 6 0 0 7 53 4 89 1 7 72 0 264 0 0 0 100 7 0 0 0 42 0 70 1 2 61 0 0 0 0 0 100 March 4, 2026 at 01:09:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 111 24 0 0 0 0 305 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 2 0 0 0 110 52 134 1 0 1 0 1113 0 1 0 99 3 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 4 0 0 16 255 108 48 1 0 2 0 868 0 0 0 100 5 0 0 4 282 103 84 0 3 2 0 0 0 0 0 100 6 0 0 7 10 2 6 0 1 0 0 260 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7470 0 361 2689 108 836 22 79 129 54 4020 8 9 0 82 1 41263 0 180 639 0 876 55 79 158 63 5519 21 17 0 62 2 6221 0 72 654 17 857 24 80 221 60 4565 7 6 0 87 3 1719 0 31 507 2 670 11 72 157 56 3983 4 4 0 92 4 2031 0 326 725 122 856 17 69 91 60 4118 7 5 0 88 5 1252 0 79 684 106 767 36 64 164 51 2878 8 3 0 88 6 902 0 25 458 5 695 30 68 78 50 2907 4 3 0 94 7 2978 0 28 568 18 753 30 62 90 40 2304 7 4 0 89 March 4, 2026 at 01:09:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 72 0 0 2175 150 110 0 2 0 0 326 0 1 0 98 1 6 0 0 31 3 12 0 2 0 0 10 0 0 0 100 2 0 0 0 26 2 36 1 0 1 0 1124 0 0 0 99 3 24 0 70 12 0 7 0 1 5 0 9 0 2 0 98 4 7 0 30 232 105 20 0 3 5 0 881 0 1 0 99 5 1 0 11 225 103 8 0 2 0 0 1 0 0 0 100 6 19 0 7 25 3 8 0 0 0 0 273 0 0 0 100 7 0 0 0 142 9 124 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:09:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 159 129 1 1 1 0 303 0 1 0 99 1 0 0 0 15 1 10 0 1 1 0 0 0 0 0 100 2 0 0 0 20 2 42 2 2 0 0 1115 0 0 0 99 3 0 0 7 14 0 10 0 1 4 0 7 0 1 0 99 4 2 0 30 230 110 22 2 1 5 0 881 0 1 0 99 5 0 0 4 219 103 10 0 1 1 0 0 0 0 0 100 6 0 0 7 14 3 8 1 1 0 0 261 0 0 0 100 7 0 0 0 111 0 102 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:09:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2284 158 245 1 10 85 0 302 0 2 0 98 1 0 0 0 131 2 98 1 7 72 0 2 0 1 0 99 2 0 0 0 118 2 111 1 7 79 0 1110 0 1 0 99 3 0 0 21 166 60 87 5 10 97 0 265 0 2 0 98 4 0 0 451 269 104 110 1 7 88 0 603 0 2 0 98 5 0 0 31 327 103 88 1 11 69 0 1 0 2 0 98 6 0 0 7 125 3 92 1 4 65 0 260 0 0 0 100 7 0 0 0 173 0 144 1 6 81 0 0 0 0 0 100 March 4, 2026 at 01:09:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 130 0 31 2456 151 449 10 40 40 27 1284 1 4 0 95 1 6895 0 308 287 3 464 13 32 65 50 3976 5 7 0 88 2 9474 0 139 314 3 561 12 41 82 69 4363 4 7 0 89 3 5045 0 35 347 1 510 8 50 94 61 2175 6 4 0 90 4 541 0 79 502 107 546 8 55 65 60 2110 2 2 0 96 5 255 0 18 485 105 387 11 44 52 44 1781 2 2 0 96 6 168 0 18 285 6 421 7 43 35 48 1357 1 1 0 97 7 366 0 18 225 1 250 1 22 24 28 1312 1 2 0 97 March 4, 2026 at 01:09:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 756 0 70 2469 104 469 11 29 29 4 2119 4 5 0 92 1 495 0 56 380 4 560 15 26 131 4 1928 3 3 0 94 2 31039 0 211 330 3 490 34 32 67 18 3788 17 12 0 70 3 5385 0 28 307 2 326 8 21 77 12 1987 6 3 0 91 4 628 0 39 622 138 701 25 47 43 25 2718 3 2 0 95 5 858 0 66 557 103 623 11 45 163 18 1889 5 2 0 93 6 279 0 2 357 16 612 13 34 34 15 2035 4 2 0 94 7 1344 0 85 304 4 488 17 19 176 11 1019 4 2 0 94 March 4, 2026 at 01:09:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2158 102 12 0 2 2 0 294 0 3 0 97 1 0 0 350 19 1 16 0 0 3 0 0 0 1 0 99 2 44 0 0 96 8 65 2 3 3 0 1119 0 1 0 99 3 5 0 14 63 1 6 0 0 0 0 268 0 1 0 99 4 0 0 3 368 155 106 0 0 0 0 602 0 0 0 99 5 0 0 3 359 103 94 0 1 1 0 0 0 0 0 100 6 0 0 0 68 1 12 0 1 0 0 0 0 0 0 100 7 0 0 7 65 2 6 0 0 0 0 263 0 0 0 100 March 4, 2026 at 01:09:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2107 103 11 0 1 0 0 295 0 1 0 99 1 0 0 0 31 4 10 0 0 0 0 4 0 0 0 100 2 0 0 0 84 7 91 2 2 1 0 1122 0 1 0 99 3 0 0 14 92 2 76 0 3 0 0 275 0 1 0 99 4 0 0 4 340 159 118 0 0 1 0 618 0 0 0 99 5 0 0 2 235 103 12 0 1 1 0 0 0 0 0 100 6 0 0 0 26 2 4 0 0 0 0 1 0 0 0 100 7 0 0 7 25 2 4 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:09:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2148 102 82 2 11 80 0 294 0 2 0 98 1 0 0 0 45 1 76 1 7 78 0 0 0 0 0 100 2 0 0 0 64 2 135 1 11 87 0 1109 0 1 0 99 3 0 0 14 181 81 181 12 12 114 0 275 0 1 0 99 4 0 0 3 354 156 184 1 10 93 0 603 0 1 0 99 5 0 0 3 310 103 157 0 16 80 0 0 0 1 0 99 6 0 0 0 44 1 67 1 7 57 0 0 0 0 0 100 7 0 0 7 57 2 102 1 8 70 0 260 0 0 0 100 March 4, 2026 at 01:09:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1178 0 73 2775 104 1060 32 80 191 48 3851 4 5 0 91 1 661 0 3 690 5 852 33 66 164 24 2423 4 3 0 93 2 45866 0 517 564 3 936 34 67 174 81 8166 20 19 0 61 3 11398 0 103 775 10 1008 26 79 320 63 3790 10 6 0 83 4 838 0 106 861 146 982 26 86 159 71 4671 6 4 0 90 5 841 0 60 832 103 1004 24 72 244 60 3514 4 3 0 93 6 429 0 35 448 1 635 17 66 214 54 2638 4 2 0 94 7 2594 0 206 471 5 709 15 48 130 45 3424 6 4 0 89 March 4, 2026 at 01:09:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 70 2117 104 22 2 1 4 0 315 3 3 0 94 1 0 0 7 122 24 118 0 5 6 0 16 0 2 0 98 2 62 0 0 144 29 130 0 4 0 0 31 0 0 0 100 3 4 0 14 22 1 6 1 0 0 0 282 0 0 0 100 4 48 0 18 248 108 57 1 2 1 0 1129 0 1 0 99 5 7 0 2 231 104 10 1 1 0 0 612 0 0 0 99 6 1 0 0 27 2 11 0 2 0 0 4 0 0 0 100 7 16 0 7 29 3 11 3 2 0 0 296 3 0 0 97 March 4, 2026 at 01:09:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2173 102 15 0 2 2 0 294 0 3 0 97 1 0 0 462 31 3 30 0 1 3 0 2 0 1 0 99 2 0 0 0 278 50 200 0 1 0 0 0 0 1 0 99 3 2 0 14 78 1 4 0 0 0 0 266 0 0 0 100 4 0 0 3 301 108 54 1 0 1 0 1123 0 1 0 99 5 0 0 3 287 105 8 0 0 0 0 602 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 0 0 0 0 100 7 2 0 7 80 2 4 0 0 0 0 262 0 0 0 100 March 4, 2026 at 01:09:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 58 1 2 0 0 294 0 1 0 99 1 0 0 0 12 2 6 0 1 0 0 0 0 0 0 100 2 0 0 0 113 50 110 0 2 0 0 5 0 0 0 100 3 0 0 14 10 1 10 1 1 0 0 273 0 0 0 100 4 0 0 2 295 114 122 1 2 1 0 1140 0 1 0 99 5 0 0 4 220 105 12 0 0 2 0 601 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 9 2 4 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:09:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 102 186 1 14 113 0 294 0 2 0 98 1 0 0 0 67 2 107 1 9 80 0 2 0 0 0 100 2 0 0 0 105 27 149 1 8 93 0 0 0 0 0 100 3 0 0 14 169 112 170 10 11 92 0 266 0 1 0 99 4 0 0 3 295 106 178 1 12 75 0 1119 0 1 0 99 5 0 0 3 266 109 95 4 9 67 0 606 0 1 0 99 6 0 0 0 57 1 103 1 6 64 0 0 0 0 0 100 7 0 0 7 51 2 89 1 3 78 0 260 0 0 0 100 March 4, 2026 at 01:09:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3750 0 71 2946 104 1017 28 90 132 62 4147 10 6 0 84 1 1396 0 41 730 3 1137 38 91 146 49 3703 5 5 0 90 2 4214 0 159 727 2 1137 45 73 169 50 5168 6 7 0 87 3 1116 0 15 675 13 1105 74 88 111 46 3776 9 4 0 86 4 43675 0 627 871 107 1154 57 76 313 84 8468 30 22 0 48 5 3441 0 111 861 123 1057 34 91 236 79 4363 5 4 0 90 6 5579 0 35 586 4 814 19 71 156 62 2749 9 5 0 86 7 333 0 20 585 17 861 22 66 77 54 3344 6 3 0 91 March 4, 2026 at 01:09:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 70 2114 104 19 0 4 4 0 307 0 3 0 97 1 67 0 0 116 9 111 1 5 5 0 35 0 1 0 99 2 2 0 0 69 2 48 0 3 0 0 11 0 0 0 100 3 0 0 7 29 3 12 0 3 0 0 21 0 0 0 100 4 1 0 18 228 102 42 3 3 1 0 1123 0 1 0 99 5 4 0 16 237 108 22 0 4 1 0 883 0 0 0 100 6 0 0 0 26 2 4 0 0 0 0 1 0 0 0 100 7 2 0 7 133 53 116 1 1 2 0 267 0 0 0 100 March 4, 2026 at 01:09:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2139 101 8 1 1 4 0 294 0 3 0 97 1 0 0 238 134 7 134 0 3 4 0 9 0 2 0 98 2 0 0 0 47 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 47 0 4 0 0 0 0 0 0 0 0 100 4 0 0 1 250 104 36 0 1 0 0 1109 0 1 0 99 5 2 0 19 256 107 12 1 0 0 0 868 0 0 0 100 6 0 0 0 45 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 148 52 106 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:09:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 102 10 0 1 1 0 295 0 2 0 98 1 0 0 224 43 9 38 0 1 1 0 11 0 1 0 99 2 0 0 0 138 2 106 0 3 0 0 7 0 0 0 100 3 0 0 0 42 0 6 0 0 0 0 7 0 0 0 100 4 0 0 3 261 114 48 1 0 1 0 1124 0 1 0 99 5 0 0 17 252 107 16 0 1 1 0 867 0 0 0 99 6 0 0 0 41 2 4 0 0 0 0 1 0 0 0 100 7 0 0 7 144 52 108 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:09:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 354 0 29 2375 103 427 15 43 122 24 1481 1 4 0 95 1 88 0 14 317 10 457 3 42 117 23 1082 2 2 0 96 2 212 0 17 310 1 371 11 38 82 18 1266 1 3 0 96 3 247 0 5 318 65 382 19 35 137 20 789 1 2 0 97 4 6950 0 387 460 109 492 16 30 153 46 3931 5 6 0 89 5 5103 0 37 524 108 375 7 30 125 27 3420 4 3 0 93 6 278 0 4 232 1 358 9 36 144 36 1265 2 1 0 97 7 474 0 10 354 50 546 4 39 125 34 1830 1 1 0 97 March 4, 2026 at 01:09:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1056 0 40 2677 122 1070 41 71 148 32 3562 5 5 0 90 1 812 0 88 463 4 744 47 67 117 19 2447 4 4 0 92 2 329 0 5 449 4 598 26 43 82 21 1790 3 2 0 94 3 33650 0 57 407 1 530 23 40 102 14 1755 17 11 0 73 4 3277 0 169 579 105 544 22 42 48 29 3838 5 4 0 90 5 4135 0 231 615 107 730 17 44 192 38 5030 7 5 0 88 6 5752 0 74 481 2 685 20 53 98 23 2336 10 4 0 86 7 1215 0 22 424 30 652 25 47 124 40 2523 4 3 0 94 March 4, 2026 at 01:09:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 102 104 1 0 0 0 320 0 2 0 98 1 0 0 14 60 1 6 0 1 3 0 0 0 1 0 99 2 0 0 343 24 3 18 0 1 4 0 1 0 1 0 99 3 44 0 0 75 6 26 0 1 0 0 9 0 0 0 100 4 0 0 3 266 107 4 0 1 0 0 1 0 0 0 100 5 3 0 17 274 108 46 1 0 2 0 1978 0 1 0 99 6 0 0 0 61 1 6 0 1 0 0 0 0 0 0 100 7 0 0 7 161 52 106 1 0 0 0 263 0 0 0 100 March 4, 2026 at 01:09:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 101 102 0 0 0 0 294 0 1 0 99 1 0 0 14 26 1 4 0 0 0 0 0 0 0 0 100 2 0 0 119 20 2 14 0 0 1 0 2 0 0 0 100 3 0 0 0 41 6 18 0 0 0 0 9 0 0 0 100 4 0 0 3 236 108 8 0 1 2 0 1 0 0 0 100 5 0 0 17 239 108 44 1 0 1 0 1978 0 1 0 99 6 0 0 0 26 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 129 52 106 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:09:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 105 0 1 0 0 294 0 1 0 99 1 0 0 15 12 1 8 0 0 0 0 1 0 0 0 100 2 0 0 0 21 1 14 0 0 0 0 5 0 0 0 100 3 1 0 0 25 6 20 0 0 0 0 18 0 1 0 99 4 0 0 3 223 108 14 0 0 0 0 14 0 0 0 100 5 0 0 17 225 108 48 1 0 0 0 1980 0 1 0 99 6 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 113 52 106 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:09:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1190 0 40 2574 103 794 16 69 198 56 2014 2 7 0 91 1 485 0 24 481 15 622 9 54 135 53 2192 2 3 0 96 2 153 0 6 393 3 475 5 56 147 42 1923 2 2 0 96 3 135 0 8 392 81 448 12 49 152 35 1114 1 2 0 97 4 181 0 75 486 111 354 8 38 127 26 1170 2 2 0 96 5 45864 0 632 532 108 598 20 35 139 80 7295 19 19 0 62 6 7469 0 36 383 1 555 7 61 182 62 3740 7 5 0 88 7 815 0 10 449 38 841 6 58 161 73 2535 2 2 0 96 March 4, 2026 at 01:09:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 822 0 9 2399 102 569 32 37 71 10 1811 3 3 0 94 1 814 0 126 288 7 506 25 34 53 3 1547 7 3 0 90 2 232 0 0 279 7 414 15 32 12 4 1499 3 2 0 95 3 217 0 23 287 4 455 11 22 33 1 1577 4 2 0 95 4 667 0 40 391 105 222 8 22 34 2 1322 5 2 0 93 5 1200 0 45 457 146 302 6 18 103 4 1218 4 2 0 94 6 3005 0 42 227 5 383 11 20 68 5 2567 5 2 0 92 7 737 0 32 172 4 241 4 18 28 6 1507 2 1 0 97 March 4, 2026 at 01:09:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2183 102 114 0 1 0 0 295 0 2 0 98 1 0 0 42 81 2 6 0 1 2 0 301 0 2 0 98 2 0 0 462 18 2 6 0 1 2 0 2 0 1 0 99 3 0 0 0 86 2 5 0 1 0 0 1 0 0 0 100 4 44 0 7 307 117 18 0 0 0 0 11 0 1 0 99 5 2 0 21 301 112 20 0 0 0 0 270 0 1 0 99 6 0 0 0 176 47 128 1 1 0 0 1109 0 1 0 99 7 0 0 7 90 3 10 1 0 0 0 564 0 0 0 100 March 4, 2026 at 01:10:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 0 0 294 0 1 0 99 1 0 0 0 17 2 16 0 2 0 0 301 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 5 223 109 16 1 1 0 0 9 0 1 0 99 5 0 0 15 209 103 4 0 0 0 0 266 0 0 0 100 6 0 0 0 114 54 138 1 0 1 0 1106 0 1 0 99 7 1 0 7 13 3 8 1 0 0 0 562 0 0 0 100 March 4, 2026 at 01:10:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 110 0 0 0 0 295 0 1 0 99 1 0 0 0 20 4 15 0 0 1 0 303 0 0 0 100 2 0 0 0 18 2 18 0 2 1 0 7 0 0 0 100 3 0 0 0 9 0 6 0 1 0 0 7 0 0 0 100 4 0 0 3 233 114 24 0 0 0 0 24 0 1 0 99 5 0 0 17 213 103 10 0 1 2 0 266 0 0 0 100 6 0 0 0 116 55 140 1 0 0 0 1108 0 0 0 99 7 0 0 7 12 3 8 0 0 0 0 560 0 0 0 100 March 4, 2026 at 01:10:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 931 0 28 2788 117 1000 28 104 206 56 3316 4 5 0 90 1 35334 0 217 601 2 928 46 78 131 55 4616 21 15 0 65 2 3992 0 51 677 3 985 27 81 275 50 3308 7 5 0 88 3 1245 0 65 645 77 762 37 70 277 42 2329 6 3 0 90 4 1822 0 294 741 119 969 20 65 310 50 3398 7 5 0 88 5 14169 0 317 818 105 914 37 60 291 88 6959 12 10 0 78 6 5751 0 91 609 18 1045 26 85 257 77 5102 9 6 0 85 7 536 0 34 578 8 937 25 83 164 58 3352 5 4 0 91 March 4, 2026 at 01:10:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 70 2109 102 15 0 2 5 0 295 0 3 0 97 1 13 0 0 99 2 94 0 3 6 0 311 0 1 0 99 2 56 0 7 74 7 56 1 2 1 0 24 0 0 0 100 3 41 0 0 32 4 14 0 2 1 0 14 0 0 0 100 4 3 0 16 324 153 108 0 2 0 0 20 0 0 0 100 5 6 0 18 227 103 8 0 1 0 0 283 0 0 0 100 6 0 0 0 29 3 40 1 1 1 0 1113 0 0 0 99 7 0 0 7 31 4 16 0 0 0 0 578 0 0 0 100 March 4, 2026 at 01:10:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 101 13 0 1 1 0 294 0 3 0 97 1 0 0 462 54 3 46 0 1 2 0 301 0 2 0 98 2 0 0 0 171 8 94 0 2 0 0 10 0 1 0 99 3 0 0 0 82 0 6 0 1 0 0 0 0 0 0 100 4 0 0 1 384 151 112 0 1 0 0 0 0 1 0 99 5 2 0 19 282 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 87 3 38 2 0 1 0 1110 0 1 0 99 7 0 0 7 87 4 10 1 1 0 0 561 0 0 0 100 March 4, 2026 at 01:10:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 77 0 1 0 0 294 0 1 0 99 1 0 0 0 13 3 6 0 0 0 0 301 0 0 0 100 2 0 0 0 58 8 50 0 0 0 0 12 0 0 0 100 3 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 4 0 0 7 306 150 100 0 0 0 0 0 0 0 0 100 5 1 0 21 212 103 6 1 0 0 0 306 0 0 0 99 6 0 0 0 12 3 36 0 0 0 0 1110 0 0 0 100 7 0 0 7 15 4 10 0 0 0 0 560 0 0 0 100 March 4, 2026 at 01:10:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 191 0 4 2263 101 290 2 24 37 16 718 0 2 0 97 1 281 0 2 171 3 150 2 18 21 21 863 2 1 0 98 2 109 0 8 152 9 216 4 17 19 30 647 0 1 0 99 3 53 0 11 143 0 86 2 9 11 8 167 0 1 0 98 4 10 0 24 435 159 189 0 16 19 6 228 0 1 0 98 5 6195 0 330 302 103 180 7 9 58 34 2864 2 5 0 93 6 3773 0 16 192 3 278 3 17 57 38 1773 3 2 0 95 7 207 0 14 138 4 263 2 28 31 47 1192 0 1 0 99 March 4, 2026 at 01:10:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1815 0 109 2772 102 1216 62 83 190 38 4263 9 7 0 84 1 1419 0 44 617 4 995 40 87 201 33 2971 6 5 0 88 2 1082 0 14 601 9 865 26 63 183 35 3348 6 4 0 90 3 1099 0 17 735 95 1042 40 83 173 27 2610 4 3 0 92 4 860 0 135 796 125 936 32 66 185 20 2469 5 4 0 90 5 935 0 77 639 105 705 25 62 222 22 2406 5 4 0 92 6 41418 0 314 441 5 768 46 56 274 45 7126 27 17 0 56 7 4141 0 44 493 5 658 21 62 235 32 3223 10 4 0 86 March 4, 2026 at 01:10:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2162 101 23 1 3 3 0 303 0 2 0 98 1 60 0 343 127 8 122 0 0 3 0 35 0 1 0 99 2 0 0 0 67 3 8 0 0 0 0 304 0 0 0 100 3 0 0 0 161 50 104 0 0 0 0 13 0 0 0 100 4 11 0 18 266 102 12 0 2 0 0 15 0 0 0 100 5 25 0 16 266 104 12 0 1 0 0 277 0 0 0 100 6 10 0 0 64 2 36 2 0 0 0 1120 0 1 0 99 7 7 0 7 72 5 17 1 2 0 0 573 0 0 0 100 March 4, 2026 at 01:10:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2128 102 110 0 1 2 0 295 0 2 0 98 1 0 0 0 46 8 22 0 1 0 0 9 0 0 0 100 2 0 0 0 31 3 6 0 0 0 0 302 0 0 0 100 3 0 0 0 127 50 102 0 1 0 0 0 0 0 0 100 4 0 0 121 219 102 11 0 3 1 0 0 0 1 0 99 5 0 0 18 230 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 30 2 34 1 0 0 0 1110 0 1 0 99 7 0 0 7 34 4 10 0 0 0 0 561 0 0 0 100 March 4, 2026 at 01:10:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 106 1 1 0 0 294 0 1 0 98 1 0 0 0 25 8 18 0 0 0 0 9 0 0 0 100 2 0 0 0 14 2 10 0 1 0 0 301 0 0 0 100 3 0 0 0 109 50 102 0 0 0 0 0 0 0 0 100 4 0 0 2 215 102 4 0 0 0 0 0 0 0 0 100 5 0 0 18 213 103 8 0 1 0 0 266 0 0 0 100 6 0 0 0 12 2 34 1 0 0 0 1109 0 0 0 100 7 2 0 7 16 4 10 0 0 0 0 561 0 0 0 100 March 4, 2026 at 01:10:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 369 0 21 2451 102 505 12 57 57 46 1726 2 3 0 95 1 190 0 11 329 13 404 10 33 38 26 1042 2 2 0 97 2 1272 0 134 286 3 458 6 38 47 52 2853 2 3 0 95 3 3174 0 43 389 35 431 2 37 47 44 1434 4 3 0 93 4 356 0 63 467 112 434 8 43 45 42 1273 2 2 0 96 5 388 0 30 495 114 471 7 33 44 39 1484 2 2 0 96 6 28452 0 318 259 3 430 24 27 62 57 5122 15 11 0 74 7 2324 0 21 282 4 414 6 46 57 49 3394 2 2 0 96 March 4, 2026 at 01:10:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1015 0 71 2508 104 672 26 72 198 25 2789 5 6 0 90 1 935 0 46 462 5 634 8 66 230 20 1860 3 3 0 94 2 777 0 43 390 29 550 7 46 235 12 1490 3 2 0 95 3 377 0 20 387 88 441 14 42 153 8 1120 7 2 0 91 4 1385 0 54 622 102 702 20 36 172 5 2000 7 3 0 90 5 70 0 16 621 114 663 10 36 126 0 1827 3 2 0 94 6 16984 0 202 328 12 565 23 35 135 14 2654 11 10 0 80 7 5775 0 65 424 6 660 38 40 194 13 3341 6 4 0 89 March 4, 2026 at 01:10:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2173 101 63 0 3 1 0 294 0 3 0 97 1 0 0 462 64 2 54 0 3 2 0 0 0 1 0 99 2 0 0 0 186 53 106 0 0 0 0 303 0 1 0 99 3 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 4 44 0 4 297 108 22 0 2 0 0 9 0 1 0 99 5 3 0 17 291 104 15 0 1 0 0 266 0 0 0 100 6 0 0 0 83 1 6 0 0 2 0 0 0 0 0 100 7 0 0 7 95 5 48 2 3 2 0 1689 0 1 0 99 March 4, 2026 at 01:10:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 52 1 2 0 0 294 0 1 0 99 1 0 0 0 65 2 58 0 2 0 0 0 0 0 0 100 2 0 0 0 111 53 106 0 0 0 0 302 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 2 218 107 12 0 0 0 0 9 0 0 0 100 5 0 0 18 219 104 14 0 0 0 0 266 0 0 0 100 6 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 7 0 0 7 17 5 11 1 0 0 0 700 0 0 0 100 March 4, 2026 at 01:10:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 52 0 2 0 0 595 0 1 0 99 1 0 0 0 72 2 68 0 2 0 0 0 0 0 0 100 2 0 0 0 111 53 106 0 0 0 0 303 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 220 108 14 0 0 0 0 10 0 0 0 100 5 0 0 17 218 103 14 0 0 0 0 266 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 0 0 7 16 4 41 0 0 0 0 1242 0 0 0 100 March 4, 2026 at 01:10:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2745 0 23 2281 102 331 5 45 158 53 1734 1 4 0 95 1 448 0 3 231 3 326 5 33 26 34 707 1 1 0 98 2 82 0 4 304 52 359 2 27 15 21 899 1 1 0 98 3 70 0 3 132 1 121 4 23 22 10 367 0 0 0 99 4 26 0 9 333 114 131 0 16 17 17 338 0 1 0 99 5 141 0 36 333 104 157 3 8 21 11 487 0 3 0 97 6 5945 0 140 191 3 193 4 13 47 37 2520 4 3 0 92 7 3311 0 201 134 5 263 5 19 112 40 2804 4 4 0 92 March 4, 2026 at 01:10:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2112 102 99 0 3 0 0 594 0 2 0 98 1 64 0 7 29 5 24 0 2 1 0 7 0 0 0 100 2 0 0 0 125 53 116 0 1 0 0 303 0 0 0 100 3 0 0 0 11 0 2 0 0 1 0 0 0 0 0 100 4 0 0 4 232 101 18 0 0 0 0 0 0 0 0 100 5 0 0 16 215 103 6 0 0 0 0 266 0 1 0 99 6 0 0 0 17 2 6 0 0 0 0 0 0 0 0 100 7 0 0 7 23 5 44 1 1 2 0 1381 0 1 0 99 March 4, 2026 at 01:10:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 102 102 1 4 0 0 596 0 2 0 98 1 0 0 231 26 7 22 0 1 1 0 9 0 1 0 99 2 0 0 0 157 53 122 0 1 0 0 302 0 0 0 100 3 0 0 0 38 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 254 107 8 0 2 0 0 0 0 0 0 100 5 0 0 17 243 103 6 0 0 0 0 266 0 1 0 99 6 0 0 0 42 2 4 0 0 0 0 0 0 0 0 100 7 0 0 7 49 4 38 2 0 1 0 1368 0 0 0 99 March 4, 2026 at 01:10:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2108 103 110 0 0 0 0 595 0 2 0 98 1 0 0 0 20 6 12 0 0 0 0 8 0 0 0 100 2 0 0 0 124 53 116 0 0 0 0 303 0 0 0 100 3 0 0 0 9 0 2 0 1 0 0 0 0 0 0 100 4 0 0 3 217 108 2 0 0 0 0 1 0 0 0 100 5 0 0 17 213 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 12 2 4 0 0 0 0 0 0 0 0 100 7 0 0 7 17 4 38 2 0 1 0 1366 0 0 0 99 March 4, 2026 at 01:10:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 82 0 2 0 0 596 0 1 0 99 1 0 0 0 20 7 14 0 0 0 0 5 0 0 0 100 2 0 0 0 142 52 135 0 3 0 0 301 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 4 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 17 210 103 6 1 0 0 0 266 0 1 0 99 6 0 0 0 14 2 8 0 1 0 0 0 0 0 0 100 7 0 0 7 13 4 38 2 0 2 0 1367 0 0 0 99 March 4, 2026 at 01:10:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2119 106 56 0 1 0 0 606 0 1 0 99 1 4 0 0 86 8 82 0 2 0 0 8 0 0 0 100 2 0 0 0 121 54 118 0 1 0 0 311 0 0 0 100 3 0 0 0 10 0 8 0 1 1 0 8 0 0 0 100 4 0 0 5 222 110 12 0 1 1 0 12 0 0 0 100 5 0 0 15 215 103 16 0 2 1 0 269 0 0 0 99 6 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 7 0 0 7 15 5 40 1 0 1 0 1371 0 0 0 99 March 4, 2026 at 01:10:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 108 78 1 1 3 0 608 0 2 0 98 1 1 0 0 62 3 56 0 0 0 0 6 0 0 0 100 2 0 0 0 112 53 108 0 0 0 0 301 0 0 0 100 3 0 0 0 8 1 4 0 0 1 0 5 0 0 0 100 4 42 0 2 214 105 8 0 0 0 0 16 0 0 0 100 5 0 0 18 212 103 8 0 0 1 0 266 0 0 0 100 6 0 0 0 17 1 14 0 1 1 0 0 0 0 0 100 7 0 0 7 20 6 46 2 1 3 0 1367 0 1 0 99 March 4, 2026 at 01:10:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 107 58 0 1 0 0 612 0 1 0 98 1 0 0 0 12 2 8 0 0 0 0 18 0 0 0 100 2 0 0 0 176 54 171 0 1 0 0 303 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 105 2 0 0 0 0 1 0 0 0 100 5 0 0 17 210 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 7 0 0 7 14 4 38 1 0 1 0 1350 0 1 0 99 March 4, 2026 at 01:10:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 109 32 0 1 0 0 601 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 155 54 148 0 2 1 0 302 0 0 0 100 3 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 4 0 0 2 209 104 0 0 0 0 0 0 0 0 0 100 5 0 0 18 211 103 6 1 0 0 0 266 0 0 0 100 6 0 0 0 76 1 70 0 2 0 0 0 0 0 0 100 7 0 0 7 17 4 40 2 0 1 0 1351 0 0 0 100 March 4, 2026 at 01:10:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 36 0 2 1 0 602 0 1 0 98 1 0 0 0 74 2 68 0 2 0 0 0 0 0 0 100 2 0 0 0 120 53 116 0 1 0 0 303 0 0 0 100 3 0 0 0 8 1 6 0 1 0 0 0 0 0 0 100 4 0 0 4 214 109 0 0 0 0 0 0 0 0 0 100 5 0 0 16 210 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 27 1 20 0 0 0 0 0 0 0 0 100 7 0 0 7 13 4 38 1 0 2 0 1352 0 0 0 99 March 4, 2026 at 01:10:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5375 0 43 2623 104 710 30 53 62 37 3165 8 7 0 85 1 615 0 13 568 7 910 16 59 59 44 3137 5 4 0 91 2 556 0 14 582 29 959 27 60 50 32 2605 4 3 0 93 3 152 0 1 532 23 741 25 55 40 17 2594 3 2 0 95 4 180 0 89 704 111 759 8 41 33 20 2041 3 2 0 95 5 287 0 17 559 107 488 6 32 25 14 2163 3 2 0 95 6 442 0 2 268 2 479 6 29 22 17 2248 2 2 0 96 7 39620 0 314 301 4 538 36 26 59 40 6141 20 15 0 66 March 4, 2026 at 01:10:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 394 0 31 2276 104 271 6 22 154 1 1177 4 4 0 93 1 972 0 103 256 2 361 10 28 191 3 954 5 2 0 93 2 800 0 0 213 4 288 8 21 142 2 817 2 2 0 96 3 206 0 37 273 93 347 15 25 191 0 1976 2 2 0 96 4 668 0 48 447 129 372 15 28 128 5 615 4 2 0 95 5 38 0 20 406 106 333 10 19 204 0 1051 2 1 0 97 6 640 0 67 171 2 244 12 25 208 1 658 6 1 0 93 7 41 0 7 155 4 186 11 19 262 0 890 1 1 0 97 March 4, 2026 at 01:10:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 107 96 0 3 0 0 303 0 2 0 98 1 0 0 231 26 2 20 0 1 1 0 301 0 1 0 99 2 0 0 0 61 1 21 0 2 0 0 1 0 0 0 100 3 0 0 0 53 5 44 1 1 1 0 1411 0 1 0 99 4 0 0 3 348 154 112 0 2 0 0 0 0 0 0 100 5 2 0 17 243 103 6 1 0 0 0 266 0 0 0 100 6 0 0 0 42 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 41 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:10:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2121 108 58 1 1 0 0 304 0 2 0 98 1 0 0 0 77 2 68 1 2 0 0 301 0 0 0 100 2 0 0 0 18 1 10 0 0 0 0 2 0 0 0 100 3 0 0 0 19 5 40 1 0 1 0 1409 0 0 0 99 4 0 0 2 309 151 102 0 0 0 0 0 0 0 0 100 5 0 0 18 213 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 12 2 4 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:10:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 108 22 0 0 0 0 304 0 1 0 99 1 0 0 0 109 2 104 0 0 0 0 301 0 0 0 100 2 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 3 0 0 0 16 5 40 1 0 1 0 1411 0 0 0 99 4 0 0 4 312 154 104 0 1 0 0 0 0 0 0 100 5 0 0 16 215 103 16 0 1 1 0 266 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:10:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8002 0 319 2713 107 916 30 75 123 78 7068 12 10 0 78 1 8872 0 214 814 6 1169 39 95 150 74 4638 12 8 0 80 2 6071 0 33 718 2 1047 25 86 172 76 3316 9 5 0 85 3 1324 0 41 722 16 1222 28 89 218 67 5007 6 5 0 89 4 938 0 119 824 128 945 27 60 109 45 3126 4 3 0 92 5 403 0 60 725 106 715 26 72 119 45 3115 7 2 0 90 6 1358 0 89 521 18 799 23 46 141 41 1987 7 5 0 88 7 36927 0 189 400 4 543 30 39 91 41 4710 19 15 0 66 March 4, 2026 at 01:10:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 70 2153 101 100 0 12 101 0 303 0 3 0 97 1 5 0 0 161 3 192 0 16 98 0 309 0 2 0 98 2 2 0 0 59 1 70 0 9 74 0 9 0 0 0 100 3 1 0 0 185 95 203 8 11 92 0 1424 0 1 0 99 4 0 0 17 313 128 136 0 10 82 0 13 0 1 0 99 5 76 0 24 284 110 112 2 8 65 0 309 0 1 0 99 6 0 0 0 67 2 91 0 9 70 0 16 0 0 0 100 7 0 0 7 61 2 85 0 10 74 0 269 0 0 0 99 March 4, 2026 at 01:10:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2173 101 13 1 2 1 0 294 0 3 0 97 1 0 0 462 51 2 44 0 2 2 0 301 0 1 0 99 2 0 0 0 161 1 84 0 3 0 0 2 0 1 0 99 3 0 0 0 88 4 38 1 0 0 0 1412 0 1 0 99 4 0 0 3 384 154 106 0 1 1 0 0 0 1 0 99 5 2 0 17 296 109 20 0 0 0 0 275 0 1 0 99 6 0 0 0 82 1 6 0 1 1 0 0 0 0 0 100 7 11 0 7 81 2 6 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:10:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 80 0 1 0 0 294 0 1 0 99 1 0 0 0 19 2 18 0 2 2 0 301 0 0 0 100 2 0 0 0 35 1 28 0 0 0 0 1 0 0 0 100 3 0 0 0 14 4 38 1 0 0 0 1412 0 0 0 100 4 0 0 3 316 154 108 0 2 0 0 0 0 0 0 100 5 0 0 17 223 109 20 0 1 0 0 275 0 0 0 100 6 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 7 0 0 7 8 2 4 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:10:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 7 2262 101 198 0 13 19 14 526 0 2 0 97 1 5635 0 125 95 2 151 7 6 38 27 2803 2 4 0 94 2 2697 0 13 147 1 176 7 15 44 26 687 1 2 0 97 3 94 0 12 132 4 243 2 24 39 30 1948 1 2 0 97 4 70 0 22 389 149 329 0 21 33 25 409 0 1 0 99 5 33 0 29 320 114 342 0 19 17 17 693 0 2 0 97 6 57 0 10 142 3 118 0 12 21 17 207 0 0 0 100 7 19 0 10 85 2 66 0 12 13 6 375 0 0 0 100 March 4, 2026 at 01:10:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 879 0 123 2657 103 762 29 72 94 18 3187 8 6 0 86 1 9087 0 532 527 8 937 43 63 169 55 5875 11 10 0 79 2 8248 0 48 699 19 918 41 74 138 42 3029 10 6 0 84 3 1075 0 16 583 4 865 30 74 82 57 3365 9 3 0 88 4 1146 0 143 684 108 779 23 64 106 34 3944 5 5 0 90 5 451 0 20 676 110 577 27 49 53 33 1911 4 2 0 94 6 965 0 23 473 16 760 22 61 161 32 2106 4 3 0 93 7 33374 0 22 403 7 541 26 37 53 26 3321 16 11 0 73 March 4, 2026 at 01:10:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 7 2232 103 234 1 14 118 0 305 0 3 0 97 1 9 0 343 59 1 81 0 11 92 0 8 0 2 0 98 2 0 0 0 159 27 142 0 10 111 0 11 0 1 0 99 3 0 0 0 209 93 133 3 11 103 0 315 0 1 0 99 4 0 0 16 313 108 127 2 8 83 0 1442 0 1 0 98 5 50 0 18 315 108 94 2 10 78 0 280 0 1 0 99 6 5 0 0 123 2 111 0 12 74 0 8 0 1 0 99 7 0 0 7 105 2 74 2 7 46 0 272 0 0 0 100 March 4, 2026 at 01:10:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2125 101 8 0 2 0 0 294 0 2 0 98 1 0 0 7 28 1 4 1 1 1 0 258 0 0 0 100 2 0 0 0 129 1 104 0 1 1 0 1 0 0 0 100 3 0 0 0 130 52 104 0 0 0 0 301 0 0 0 100 4 0 0 3 238 105 40 2 1 0 0 1420 0 1 0 99 5 0 0 17 244 110 20 0 0 0 0 276 0 1 0 99 6 0 0 0 35 1 10 0 1 0 0 0 0 0 0 100 7 0 0 119 14 2 6 0 1 3 0 1 0 0 0 100 March 4, 2026 at 01:10:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 104 84 0 1 0 0 321 0 2 0 98 1 0 0 7 19 3 16 0 2 1 0 260 0 0 0 100 2 0 0 0 40 1 30 0 0 0 0 2 0 0 0 100 3 0 0 0 112 52 104 1 0 0 0 301 0 0 0 100 4 0 0 4 218 105 40 0 1 1 0 1420 0 1 0 99 5 0 0 16 223 108 16 0 0 0 0 274 0 1 0 99 6 0 0 0 17 1 14 0 2 1 0 0 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:10:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1592 0 127 2252 101 284 6 28 35 32 2288 1 5 0 94 1 311 0 32 160 3 230 4 25 31 26 990 1 2 0 97 2 5626 0 193 131 0 241 14 22 36 39 1713 5 4 0 91 3 4323 0 19 277 39 259 4 22 54 30 1100 4 2 0 94 4 297 0 11 403 121 339 5 29 39 42 2001 1 2 0 98 5 289 0 23 394 112 225 3 27 32 22 876 1 2 0 98 6 170 0 2 139 2 172 1 18 29 19 482 0 1 0 99 7 171 0 1 135 0 132 4 18 15 5 275 1 1 0 99 March 4, 2026 at 01:10:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 102 14 1 3 1 0 295 0 1 0 99 1 0 0 35 17 4 12 0 1 3 0 264 0 1 0 99 2 0 0 7 76 2 66 0 4 0 0 3 0 0 0 100 3 0 0 0 25 4 16 0 0 0 0 318 0 0 0 100 4 0 0 3 242 116 54 1 0 1 0 1433 0 1 0 99 5 0 0 3 284 131 72 0 2 0 0 5 0 1 0 99 6 0 0 14 50 19 40 1 2 0 0 267 0 0 0 100 7 64 0 0 66 5 56 0 1 4 0 9 0 1 0 99 March 4, 2026 at 01:10:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 102 98 0 2 2 0 294 0 2 0 98 1 0 0 28 57 3 24 1 4 4 0 260 0 1 0 99 2 0 0 0 44 0 4 0 0 0 0 0 0 0 0 100 3 0 0 0 47 2 8 0 1 1 0 301 0 0 0 100 4 0 0 2 253 105 40 1 0 0 0 1414 0 1 0 99 5 0 0 4 246 102 4 0 0 0 0 0 0 0 0 100 6 0 0 14 59 10 18 0 0 0 0 266 0 0 0 100 7 0 0 231 125 47 116 0 3 3 0 11 0 1 0 99 March 4, 2026 at 01:10:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 113 68 0 2 0 0 294 0 1 0 99 1 0 0 7 21 3 16 0 0 1 0 260 0 0 0 100 2 0 0 0 12 1 10 0 1 1 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 4 0 0 1 218 105 40 2 0 2 0 1414 0 1 0 99 5 0 0 5 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 14 72 3 69 0 2 0 0 266 0 0 0 100 7 0 0 0 89 42 82 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:10:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 151 184 0 3 0 0 294 0 1 0 99 1 0 0 7 33 3 26 0 2 0 0 260 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 4 0 0 3 217 107 38 1 0 1 0 1414 0 1 0 99 5 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 14 24 3 19 0 2 1 0 266 0 0 0 100 7 0 0 0 15 5 10 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:10:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 144 1 1 0 0 295 0 1 0 99 1 0 0 7 72 3 68 1 3 0 0 263 0 0 0 100 2 2 0 0 11 1 6 0 1 2 0 5 0 0 0 100 3 0 0 0 10 2 6 0 1 0 0 301 0 0 0 100 4 0 0 3 230 112 50 1 2 1 0 1414 0 1 0 99 5 0 0 3 211 102 6 0 0 0 0 3 0 0 0 100 6 0 0 14 12 3 6 1 0 0 0 266 0 0 0 100 7 0 0 0 22 7 18 0 1 0 0 19 0 0 0 100 March 4, 2026 at 01:10:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2165 153 152 0 3 0 0 301 0 1 0 99 1 0 0 7 15 3 10 0 0 0 0 260 0 0 0 100 2 0 0 0 7 1 2 0 0 1 0 5 0 0 0 100 3 0 0 0 17 4 16 0 0 0 0 317 0 0 0 100 4 20 0 3 250 113 62 2 0 4 0 1426 0 1 0 99 5 1 0 3 268 103 64 0 3 5 0 11 0 0 0 100 6 0 0 14 8 2 6 0 1 0 0 266 0 0 0 100 7 1 0 0 22 6 18 0 3 0 0 16 0 0 0 100 March 4, 2026 at 01:10:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 152 209 0 1 1 0 294 0 2 0 98 1 0 0 7 20 4 19 0 2 2 0 265 0 0 0 100 2 0 0 0 9 1 4 0 0 1 0 2 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 301 0 0 0 100 4 0 0 2 216 106 38 1 0 1 0 1395 0 1 0 99 5 0 0 4 212 103 6 0 0 0 0 5 0 0 0 100 6 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 7 0 0 0 20 5 14 0 0 4 0 9 0 0 0 100 March 4, 2026 at 01:10:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 214 0 1 0 0 294 0 2 0 98 1 0 0 7 15 4 6 1 0 0 0 260 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 13 3 8 0 1 0 0 302 0 0 0 100 4 0 0 7 219 106 40 1 1 1 0 1395 0 1 0 99 5 0 0 7 212 102 4 0 0 0 0 0 0 0 0 100 6 0 0 14 10 2 6 0 0 1 0 266 0 0 0 100 7 0 0 0 18 4 12 1 2 0 0 5 0 0 0 100 March 4, 2026 at 01:10:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 155 220 1 0 3 0 294 0 1 0 99 1 0 0 7 20 4 18 0 5 1 0 261 0 0 0 100 2 0 0 0 13 2 10 0 3 2 0 2 0 0 0 100 3 0 0 9 15 4 14 0 2 2 0 301 0 0 0 100 4 0 0 3 224 106 44 2 3 3 0 1395 0 1 0 99 5 0 0 3 217 103 14 0 4 4 0 0 0 0 0 100 6 0 0 14 11 2 10 1 3 2 0 266 0 0 0 100 7 0 0 0 21 6 16 0 1 1 0 8 0 0 0 100 March 4, 2026 at 01:10:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 173 0 18 2355 145 353 7 16 15 15 1212 2 3 0 96 1 186 0 11 159 5 139 8 20 15 12 706 1 1 0 98 2 3106 0 117 111 0 168 10 13 15 22 2755 3 3 0 94 3 83 0 26 146 5 309 5 26 25 21 1809 2 1 0 97 4 24863 0 80 402 105 307 9 25 20 17 2623 10 7 0 83 5 128 0 6 363 111 261 0 23 20 14 768 1 1 0 98 6 256 0 16 172 4 288 6 26 16 15 1105 1 1 0 98 7 76 0 9 165 5 282 5 21 19 18 661 1 2 0 97 March 4, 2026 at 01:10:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 966 0 54 2485 107 634 27 35 126 12 2129 4 4 0 92 1 264 0 7 403 4 625 34 31 91 3 2080 4 3 0 93 2 3841 0 200 368 4 613 35 32 87 14 2764 8 4 0 88 3 6046 0 76 380 9 451 35 34 111 12 2094 11 4 0 84 4 8978 0 62 569 142 583 26 39 101 19 3089 8 8 0 85 5 749 0 3 560 111 501 14 36 84 15 2000 3 2 0 95 6 441 0 53 305 3 430 14 29 143 14 1859 9 2 0 89 7 857 0 34 308 7 498 22 23 86 17 1386 3 2 0 95 March 4, 2026 at 01:10:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 231 2146 103 168 1 12 78 0 294 0 3 0 97 1 44 0 7 123 9 131 1 14 97 0 272 0 1 0 99 2 0 0 0 89 0 106 1 13 70 0 33 0 1 0 99 3 0 0 0 146 74 92 10 10 108 0 301 0 1 0 99 4 0 0 3 331 122 171 1 10 85 0 1116 0 1 0 99 5 3 0 3 323 122 125 1 10 74 0 330 0 1 0 99 6 3 0 14 127 27 130 0 9 58 0 266 0 1 0 99 7 0 0 0 81 1 85 1 7 99 0 0 0 0 0 100 March 4, 2026 at 01:10:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2108 102 116 1 0 0 0 303 0 2 0 98 1 0 0 7 28 9 22 1 0 0 0 287 0 0 0 100 2 0 0 0 12 2 4 0 0 0 0 2 0 0 0 100 3 0 0 0 14 2 6 0 0 0 0 301 0 0 0 100 4 0 0 4 218 106 34 2 0 2 0 1110 0 1 0 99 5 0 0 2 217 104 8 0 0 0 0 301 0 0 0 100 6 0 0 14 24 9 16 0 0 0 0 266 0 0 0 100 7 0 0 0 95 43 88 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:10:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 116 0 2 0 0 294 0 1 0 99 1 0 0 7 24 9 20 0 0 0 0 269 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 301 0 0 0 100 4 0 0 3 212 105 34 0 0 1 0 1106 0 1 0 99 5 0 0 3 214 104 8 0 0 0 0 301 0 0 0 100 6 0 0 14 12 2 6 1 0 0 0 266 0 0 0 100 7 0 0 0 106 50 102 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:10:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 240 0 15 2712 102 908 11 52 58 35 2912 4 4 0 92 1 1749 0 14 523 11 566 19 50 53 34 2780 7 4 0 90 2 46211 0 659 419 2 722 35 46 101 91 7970 22 21 0 57 3 7441 0 18 522 17 742 14 67 138 77 3488 7 5 0 88 4 462 0 73 640 108 736 17 60 111 62 3764 4 4 0 93 5 2679 0 18 665 104 816 18 64 90 82 2431 5 3 0 92 6 847 0 33 471 4 844 14 58 77 48 3089 4 3 0 93 7 451 0 10 564 28 1004 17 66 60 45 2443 3 2 0 95 March 4, 2026 at 01:10:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 651 0 70 2236 101 265 1 10 64 1 1077 2 4 0 94 1 451 0 43 255 51 262 5 11 88 3 1013 1 2 0 97 2 443 0 43 120 6 148 3 7 59 2 857 1 1 0 98 3 655 0 31 129 6 150 5 9 59 5 755 2 1 0 97 4 550 0 52 326 112 186 3 9 33 4 1656 5 1 0 94 5 402 0 23 322 104 174 1 14 109 3 784 1 1 0 97 6 121 0 18 130 2 207 2 11 82 3 1248 2 1 0 97 7 333 0 34 206 1 338 8 13 59 3 487 6 1 0 93 March 4, 2026 at 01:10:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2230 100 114 0 19 87 0 0 0 4 0 96 1 0 0 469 180 27 217 1 14 107 0 555 0 2 0 98 2 0 0 0 255 34 244 0 18 99 0 9 0 1 0 99 3 0 0 0 207 89 138 10 14 103 0 303 0 1 0 99 4 0 0 4 333 107 127 2 10 91 0 1106 0 1 0 99 5 0 0 2 327 104 90 0 8 70 0 301 0 1 0 99 6 2 0 14 129 2 113 0 12 96 0 266 0 1 0 99 7 0 0 0 111 0 62 0 8 54 0 0 0 0 0 100 March 4, 2026 at 01:10:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 72 0 1 0 0 9 0 1 0 99 1 0 0 7 15 5 10 1 0 1 0 554 0 0 0 100 2 0 0 0 167 59 160 0 0 1 0 10 0 0 0 100 3 0 0 0 16 3 12 0 1 2 0 301 0 0 0 100 4 0 0 4 210 103 34 0 0 2 0 1104 0 1 0 99 5 0 0 2 214 104 8 0 0 0 0 301 0 1 0 99 6 0 0 14 14 4 12 1 0 0 0 288 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:10:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 110 0 0 0 0 0 0 1 0 99 1 0 0 7 14 5 10 0 0 0 0 555 0 0 0 100 2 0 0 0 121 58 116 0 0 0 0 10 0 0 0 100 3 0 0 0 14 3 10 0 0 0 0 304 0 0 0 100 4 0 0 2 212 104 34 1 0 2 0 1107 0 1 0 99 5 0 0 4 219 106 12 1 0 0 0 305 0 1 0 99 6 0 0 14 10 3 8 0 0 0 0 268 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:11:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1632 0 44 2786 100 838 23 73 197 26 2248 4 5 0 91 1 36663 0 81 786 8 1013 71 71 270 38 5780 26 15 0 59 2 9693 0 461 662 15 1141 27 54 115 64 5603 9 10 0 81 3 6623 0 215 701 14 1137 39 77 211 86 4789 10 7 0 83 4 3326 0 134 790 106 999 23 79 161 87 5509 9 5 0 86 5 1352 0 50 700 105 813 19 68 136 60 3137 6 4 0 89 6 981 0 25 487 25 736 27 61 158 55 2799 4 4 0 92 7 3146 0 37 570 1 747 17 52 75 47 2965 9 4 0 87 March 4, 2026 at 01:11:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2122 102 58 0 3 0 0 18 0 1 0 99 1 0 0 14 37 6 23 2 1 6 0 568 0 1 0 99 2 0 0 0 88 3 70 0 1 0 0 17 0 0 0 100 3 0 0 0 130 53 114 0 0 0 0 304 0 0 0 100 4 9 0 17 241 108 55 2 1 3 0 1146 0 1 0 99 5 63 0 73 241 110 41 0 3 6 0 328 0 2 0 97 6 6 0 14 39 5 26 0 2 3 0 289 0 0 0 100 7 1 0 0 28 2 8 0 2 0 0 20 0 0 0 100 March 4, 2026 at 01:11:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2216 100 192 0 6 85 0 0 0 2 0 98 1 0 0 469 66 5 104 0 12 88 0 555 0 2 0 98 2 0 0 0 122 2 81 0 7 71 0 1 0 1 0 99 3 0 0 0 244 105 166 5 5 88 0 301 0 1 0 99 4 0 0 3 320 104 101 2 4 102 0 1106 0 1 0 99 5 0 0 45 390 135 169 0 7 108 0 312 0 3 0 97 6 3 0 14 118 2 81 1 4 61 0 268 0 1 0 99 7 0 0 0 121 0 93 0 13 68 0 0 0 0 0 100 March 4, 2026 at 01:11:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 112 0 1 0 0 0 0 1 0 99 1 0 0 7 15 5 10 1 0 0 0 553 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 13 3 8 0 0 0 0 303 0 0 0 100 4 0 0 1 208 102 32 0 0 1 0 1106 0 0 0 99 5 0 0 5 326 160 120 0 0 0 0 310 0 0 0 99 6 0 0 14 15 2 12 0 0 1 0 266 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:11:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 0 2216 102 210 1 12 22 16 224 0 2 0 98 1 14 0 11 106 7 90 1 10 12 9 715 0 1 0 99 2 20 0 2 84 2 119 0 11 10 19 283 0 1 0 99 3 5739 0 148 98 2 192 5 9 39 34 2517 2 5 0 93 4 2162 0 14 281 103 179 2 19 37 29 1759 1 2 0 97 5 89 0 11 389 147 280 0 23 19 21 1080 1 1 0 98 6 65 0 28 127 14 236 0 18 25 24 657 0 1 0 99 7 29 0 9 86 0 100 0 13 13 11 265 0 1 0 99 March 4, 2026 at 01:11:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1351 0 44 2573 102 645 32 63 147 23 2528 8 5 0 87 1 1081 0 38 476 9 655 24 52 132 20 3097 4 4 0 92 2 776 0 3 441 21 519 14 42 117 16 2133 4 2 0 93 3 41703 0 555 476 4 758 43 45 153 57 5694 27 17 0 56 4 6194 0 144 709 105 566 23 67 240 39 3805 7 5 0 88 5 1582 0 34 780 130 931 18 67 263 75 3028 4 3 0 93 6 1829 0 92 349 2 540 12 42 88 39 1902 6 4 0 90 7 923 0 15 355 1 501 14 37 73 24 2894 5 2 0 93 March 4, 2026 at 01:11:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 7 2171 105 128 1 2 2 0 286 0 2 0 98 1 1 0 343 29 5 22 0 2 8 0 297 0 2 0 98 2 0 0 0 69 0 12 0 2 1 0 5 0 0 0 100 3 31 0 0 65 2 8 0 1 0 0 21 0 0 0 100 4 7 0 16 280 108 50 1 0 2 0 1136 0 1 0 99 5 0 0 4 378 155 124 0 2 0 0 620 0 1 0 99 6 0 0 28 70 2 16 0 1 5 0 19 0 2 0 98 7 3 0 14 64 1 6 1 2 0 0 278 0 0 0 100 March 4, 2026 at 01:11:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2196 107 239 1 11 87 0 264 0 2 0 97 1 0 0 119 54 3 92 2 11 86 0 298 0 1 0 99 2 0 0 0 64 0 77 0 7 53 0 0 0 0 0 100 3 0 0 0 132 70 124 6 10 94 0 2 0 1 0 99 4 0 0 3 269 103 120 2 10 74 0 1105 0 1 0 99 5 0 0 3 326 133 145 1 5 74 0 601 0 1 0 99 6 0 0 0 118 25 142 0 8 78 0 0 0 1 0 99 7 0 0 14 49 1 47 0 2 41 0 266 0 0 0 100 March 4, 2026 at 01:11:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 102 116 0 0 1 0 260 0 2 0 98 1 0 0 0 27 10 20 0 0 0 0 304 0 0 0 100 2 0 0 0 11 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 4 216 104 38 0 0 0 0 1108 0 1 0 99 5 0 0 2 220 106 12 0 0 0 0 603 0 0 0 100 6 0 0 14 105 49 98 0 0 0 0 0 0 1 0 99 7 0 0 14 12 3 8 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:11:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 401 0 16 2472 125 713 5 55 59 48 1598 2 3 0 95 1 400 0 16 389 14 486 9 46 43 35 1551 2 2 0 96 2 169 0 9 362 18 283 5 32 21 17 1521 2 2 0 96 3 434 0 17 301 1 373 17 38 32 28 1529 1 2 0 97 4 42984 0 506 461 103 483 25 22 68 86 7523 19 15 0 66 5 3038 0 20 478 106 381 4 49 77 57 2519 2 3 0 95 6 473 0 19 313 2 532 15 54 59 56 1664 2 2 0 97 7 2132 0 44 347 8 504 13 52 44 58 1582 4 3 0 93 March 4, 2026 at 01:11:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 619 0 21 2475 104 618 17 46 68 23 2904 9 4 0 87 1 555 0 34 420 5 694 29 40 116 20 2275 4 3 0 92 2 570 0 27 454 45 670 18 44 67 10 1758 3 2 0 94 3 704 0 87 371 3 597 17 33 100 6 1484 3 4 0 93 4 2392 0 55 511 104 520 20 24 61 4 2667 4 6 0 90 5 6302 0 40 557 106 413 11 22 158 15 2858 7 4 0 89 6 636 0 7 303 2 479 14 41 69 15 1743 3 2 0 95 7 1892 0 226 300 2 551 28 28 62 18 2320 9 3 0 88 March 4, 2026 at 01:11:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 21 2194 110 128 1 0 0 0 539 0 2 0 98 1 0 0 462 23 4 12 0 0 2 0 295 0 1 0 98 2 0 0 0 183 52 106 0 1 0 0 1 0 1 0 99 3 0 0 42 78 1 6 0 0 2 0 2 0 2 0 98 4 0 0 5 296 108 46 2 0 2 0 1116 0 1 0 99 5 0 0 1 295 106 20 0 0 3 0 609 0 0 0 99 6 0 0 0 85 0 10 0 1 0 0 5 0 0 0 100 7 0 0 0 80 1 4 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:11:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2162 110 204 0 6 89 0 536 0 2 0 98 1 0 0 0 54 3 91 0 9 80 0 294 0 0 0 100 2 0 0 0 158 51 200 0 14 80 0 0 0 1 0 99 3 0 0 0 109 72 73 3 5 74 0 0 0 0 0 100 4 0 0 2 256 111 114 0 7 98 0 1103 0 1 0 99 5 0 0 4 257 107 90 1 6 72 0 623 0 1 0 99 6 0 0 0 54 0 105 0 7 92 0 0 0 0 0 100 7 0 0 0 44 0 87 0 5 78 0 0 0 0 0 100 March 4, 2026 at 01:11:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2117 109 126 2 0 0 0 534 0 1 0 98 1 0 0 0 12 3 6 1 0 0 0 294 0 0 0 100 2 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 2 0 0 0 100 4 0 0 1 218 108 36 1 0 2 0 1102 0 0 0 99 5 0 0 5 221 106 14 1 0 1 0 602 0 0 0 100 6 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:11:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1050 0 32 2808 113 1047 31 87 76 53 4366 6 6 0 88 1 857 0 6 749 6 1106 29 83 76 40 4066 5 4 0 91 2 331 0 19 659 29 928 34 77 50 33 3241 5 4 0 90 3 33608 0 8 583 3 897 49 66 64 43 3447 16 12 0 71 4 10284 0 494 796 106 1121 48 57 112 67 8767 12 11 0 77 5 8448 0 238 801 120 894 14 76 114 71 4257 11 7 0 82 6 5737 0 52 604 1 992 10 76 116 71 3180 8 5 0 87 7 649 0 21 568 0 1025 30 80 82 61 3552 5 3 0 92 March 4, 2026 at 01:11:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 387 0 59 2164 103 145 6 13 215 2 1006 1 2 0 97 1 490 0 41 82 6 56 9 7 63 1 361 1 1 0 98 2 0 0 0 62 2 11 1 3 0 0 368 1 0 0 99 3 184 0 24 44 1 21 1 3 48 0 168 1 0 0 99 4 11 0 44 367 155 236 5 11 53 1 1425 1 1 0 98 5 358 0 26 275 107 43 3 6 161 1 105 2 1 0 98 6 817 0 84 56 1 36 2 6 87 2 456 4 2 0 93 7 545 0 36 73 3 37 4 6 84 1 627 5 1 0 94 March 4, 2026 at 01:11:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 21 2181 104 68 0 2 1 0 827 0 2 0 98 1 0 0 462 22 3 16 0 2 3 0 294 0 1 0 99 2 0 0 0 85 1 9 0 1 0 0 0 0 1 0 99 3 0 0 0 79 1 2 0 0 0 0 1 0 0 0 100 4 0 0 3 329 124 78 1 0 1 0 1115 0 1 0 99 5 0 0 3 345 129 66 0 1 0 0 17 0 1 0 99 6 0 0 42 104 15 34 0 2 2 0 0 0 2 0 98 7 0 0 0 133 2 58 0 3 0 0 306 0 0 0 100 March 4, 2026 at 01:11:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2156 104 88 0 14 79 0 827 0 2 0 98 1 0 0 0 151 3 182 1 11 82 0 295 0 1 0 99 2 0 0 0 57 1 105 0 9 93 0 0 0 0 0 100 3 0 0 0 117 72 104 4 10 99 0 2 0 0 0 100 4 0 0 4 257 106 120 1 8 60 0 1102 0 1 0 99 5 0 0 2 261 108 103 0 11 101 0 9 0 1 0 99 6 0 0 0 93 27 127 0 8 68 0 0 0 0 0 100 7 0 0 0 102 27 137 0 9 108 0 301 0 1 0 99 March 4, 2026 at 01:11:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2109 104 102 1 3 0 0 826 0 1 0 99 1 0 0 0 27 3 18 0 0 0 0 294 0 0 0 100 2 0 0 0 19 2 18 0 3 1 0 1 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 5 216 108 34 1 0 1 0 1102 0 1 0 99 5 0 0 1 222 108 16 0 0 0 0 9 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 114 53 108 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:11:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1523 0 66 2913 124 1246 49 113 154 63 4755 6 8 0 86 1 882 0 26 738 6 978 44 96 91 46 3662 9 4 0 87 2 969 0 81 671 4 1118 44 84 107 43 3306 5 4 0 91 3 192 0 10 612 2 789 25 73 203 21 3378 6 3 0 91 4 4020 0 157 887 111 971 55 63 164 32 4063 13 6 0 81 5 47290 0 667 868 118 1200 73 66 188 89 9309 26 22 0 52 6 8468 0 28 642 1 956 24 72 174 72 3765 11 6 0 83 7 800 0 15 609 15 1039 22 88 187 83 4297 5 3 0 92 March 4, 2026 at 01:11:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 21 2124 104 17 0 2 0 0 844 0 2 0 98 1 0 0 70 29 1 20 0 3 6 0 313 0 2 0 98 2 0 0 7 119 4 102 0 3 6 0 19 0 1 0 99 3 13 0 0 31 1 12 0 4 1 0 20 0 0 0 100 4 1 0 17 236 108 44 1 2 0 0 1118 0 1 0 99 5 60 0 3 311 142 90 0 1 0 0 17 0 1 0 99 6 0 0 0 57 17 38 0 3 0 0 11 0 0 0 100 7 2 0 0 27 3 8 0 0 5 0 310 0 0 0 100 March 4, 2026 at 01:11:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 35 2113 105 15 1 2 3 0 830 0 2 0 98 1 0 0 0 17 2 6 1 0 0 0 295 0 0 0 100 2 0 0 14 127 4 122 1 0 4 0 1 0 1 0 99 3 0 0 0 22 1 14 0 1 1 0 2 0 0 0 100 4 0 0 4 229 109 18 0 1 0 0 16 0 0 0 100 5 0 0 2 234 107 58 1 3 2 0 1116 0 1 0 99 6 0 0 0 111 51 102 0 0 0 0 0 0 0 0 100 7 0 0 0 23 4 16 0 1 0 0 307 0 0 0 100 March 4, 2026 at 01:11:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2216 104 80 1 8 58 0 562 0 3 0 97 1 0 0 448 56 1 90 0 10 80 0 294 0 1 0 98 2 0 0 14 144 4 114 1 8 80 0 266 0 2 0 98 3 0 0 0 263 71 212 15 10 127 0 0 0 1 0 99 4 0 0 2 312 104 72 0 8 96 0 0 0 1 0 99 5 0 0 4 331 108 126 1 6 79 0 1110 0 1 0 98 6 0 0 0 220 51 199 0 11 61 0 0 0 1 0 99 7 0 0 0 115 3 77 0 7 80 0 301 0 0 0 100 March 4, 2026 at 01:11:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 88 0 28 2260 104 282 1 28 30 40 1076 0 3 0 97 1 51 0 8 171 1 155 0 19 26 17 714 0 2 0 98 2 33 0 26 153 6 123 2 13 10 19 536 0 1 0 99 3 45 0 10 242 1 235 1 12 18 19 254 0 1 0 99 4 176 0 8 297 104 92 2 10 23 13 257 0 1 0 99 5 6810 0 329 332 110 265 17 11 73 43 4292 5 6 0 89 6 4276 0 20 273 48 259 3 17 56 28 756 6 2 0 92 7 239 0 2 137 4 247 1 23 29 43 788 0 1 0 99 March 4, 2026 at 01:11:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1719 0 214 2693 105 895 25 54 102 47 5220 7 8 0 85 1 3557 0 19 597 3 872 37 71 145 43 3113 9 4 0 86 2 1448 0 56 524 13 862 25 71 150 32 3290 4 4 0 92 3 862 0 34 519 21 884 28 64 154 27 2763 8 3 0 89 4 782 0 132 625 105 559 25 49 172 18 2384 8 3 0 89 5 5942 0 238 647 123 704 26 44 106 41 3009 8 6 0 86 6 37267 0 28 482 2 716 32 54 134 29 3357 18 14 0 68 7 467 0 6 327 3 499 17 47 38 22 3819 4 2 0 94 March 4, 2026 at 01:11:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 55 0 14 2173 107 37 0 4 3 0 580 0 3 0 97 1 21 0 343 108 2 102 1 5 3 0 303 0 1 0 99 2 6 0 14 71 4 18 1 2 2 0 277 0 0 0 100 3 0 0 0 71 2 14 0 0 0 0 21 0 0 0 100 4 0 0 17 264 103 10 0 2 0 0 26 0 0 0 100 5 16 0 3 367 153 110 0 1 0 0 4 0 0 0 100 6 1 0 0 58 0 2 0 0 0 0 1 0 0 0 100 7 0 0 0 73 5 46 2 0 2 0 1409 0 1 0 99 March 4, 2026 at 01:11:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 147 2120 109 55 0 3 0 0 570 0 2 0 98 1 0 0 0 101 1 74 0 1 1 0 294 0 0 0 100 2 0 0 14 31 4 8 0 0 0 0 266 0 0 0 100 3 0 0 0 33 0 9 0 1 0 0 0 0 0 0 100 4 0 0 3 241 107 16 0 0 0 0 13 0 0 0 100 5 0 0 3 334 150 112 0 0 0 0 7 0 0 0 100 6 0 0 0 26 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 41 5 46 0 1 2 0 1406 0 0 0 99 March 4, 2026 at 01:11:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2152 109 75 1 5 54 0 569 0 2 0 98 1 0 0 0 156 1 192 0 5 82 0 294 0 1 0 99 2 0 0 14 59 4 104 0 7 93 0 266 0 0 0 100 3 0 0 0 122 74 96 5 7 87 0 2 0 0 0 100 4 0 0 2 255 103 88 0 7 89 0 0 0 0 0 100 5 0 0 4 354 151 193 0 7 78 0 0 0 1 0 99 6 0 0 0 56 0 103 0 9 80 0 0 0 0 0 100 7 0 0 0 62 4 131 1 6 74 0 1402 0 1 0 99 March 4, 2026 at 01:11:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 551 0 32 2445 113 474 4 51 57 45 2592 2 4 0 94 1 537 0 5 381 1 592 5 44 53 44 1696 2 2 0 96 2 52 0 22 308 5 328 4 37 29 30 1870 2 1 0 97 3 163 0 7 258 0 301 1 26 35 32 908 1 1 0 98 4 196 0 77 421 103 330 9 24 37 10 1132 1 2 0 97 5 31009 0 436 551 135 580 19 24 74 75 6324 16 13 0 72 6 5068 0 39 348 2 457 9 52 98 63 2062 9 3 0 88 7 381 0 22 331 20 580 12 46 50 74 3394 1 3 0 95 March 4, 2026 at 01:11:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 923 0 80 2439 104 568 28 53 114 15 2508 3 5 0 92 1 608 0 1 377 6 559 48 41 32 12 2106 4 3 0 93 2 624 0 30 407 7 594 16 37 141 11 1818 4 2 0 93 3 2246 0 39 311 5 466 12 37 45 18 1783 12 3 0 86 4 724 0 88 609 139 513 8 35 145 12 1550 8 2 0 90 5 16492 0 227 502 106 509 34 31 194 27 2532 11 9 0 79 6 3837 0 33 319 1 427 35 26 60 11 1539 4 3 0 93 7 386 0 21 295 12 438 10 30 31 22 3170 3 2 0 94 March 4, 2026 at 01:11:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2177 103 79 0 1 1 0 565 0 3 0 97 1 0 0 462 53 1 50 0 3 2 0 294 0 1 0 99 2 3 0 14 85 5 8 0 0 0 0 266 0 1 0 99 3 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 4 44 0 3 404 159 124 0 0 0 0 9 0 1 0 99 5 0 0 3 284 102 8 0 1 2 0 0 0 0 0 100 6 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 91 4 42 2 1 1 0 1409 0 1 0 99 March 4, 2026 at 01:11:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 104 44 1 3 0 0 563 0 1 0 99 1 0 0 0 83 2 76 0 0 0 0 295 0 0 0 100 2 0 0 14 13 5 10 0 0 0 0 267 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 3 333 160 122 1 0 0 0 9 0 0 0 99 5 0 0 3 222 104 20 1 1 1 0 13 0 0 0 100 6 0 0 0 9 0 8 0 2 1 0 7 0 0 0 100 7 0 0 0 22 5 48 0 1 0 0 1413 0 1 0 99 March 4, 2026 at 01:11:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2163 103 132 0 12 97 0 561 0 2 0 98 1 0 0 0 140 1 180 0 9 103 0 294 0 0 0 100 2 0 0 14 45 4 82 0 5 60 0 266 0 0 0 100 3 0 0 0 114 70 112 3 9 80 0 0 0 0 0 100 4 0 0 5 358 158 183 0 5 62 0 8 0 1 0 99 5 0 0 1 244 103 67 0 6 75 0 21 0 1 0 99 6 0 0 0 43 1 81 0 5 78 0 0 0 0 0 100 7 0 0 0 57 4 129 2 7 77 0 1408 0 1 0 99 March 4, 2026 at 01:11:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33778 0 40 2546 104 720 25 70 74 62 3136 16 14 0 70 1 638 0 22 482 2 838 23 74 55 51 2232 3 3 0 94 2 481 0 19 473 4 550 25 57 30 38 2578 3 2 0 95 3 1925 0 197 381 1 506 12 48 44 42 2483 5 5 0 90 4 313 0 61 629 144 519 12 39 39 37 1519 2 3 0 95 5 12018 0 442 551 103 623 17 45 108 92 6626 9 11 0 80 6 9884 0 39 485 1 545 22 49 107 63 2563 14 5 0 81 7 757 0 21 439 21 805 7 77 102 76 3626 3 2 0 95 March 4, 2026 at 01:11:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 745 0 119 2372 104 392 28 31 110 5 1736 2 4 0 93 1 845 0 18 310 3 370 14 28 71 1 1625 2 2 0 96 2 215 0 39 255 5 301 20 28 79 2 1493 2 1 0 96 3 457 0 49 238 5 349 9 27 36 2 1310 6 1 0 93 4 166 0 47 422 104 327 18 27 25 1 1191 6 2 0 92 5 322 0 29 463 147 308 6 23 55 4 681 2 1 0 97 6 305 0 3 189 1 315 38 14 39 2 1334 3 1 0 96 7 549 0 32 203 7 320 8 20 52 3 1950 2 2 0 96 March 4, 2026 at 01:11:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2174 103 57 0 1 2 0 563 0 3 0 97 1 0 0 462 83 2 80 0 3 4 0 295 0 1 0 99 2 2 0 14 83 4 8 0 0 0 0 266 0 1 0 99 3 0 0 0 91 7 14 0 0 0 0 11 0 0 0 99 4 0 0 2 287 102 8 0 0 0 0 0 0 0 0 100 5 0 0 4 383 153 104 0 0 0 0 0 0 1 0 99 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 89 4 40 3 0 1 0 1402 0 1 0 99 March 4, 2026 at 01:11:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 20 1 2 0 0 566 0 1 0 99 1 0 0 0 111 1 106 0 0 0 0 294 0 0 0 100 2 0 0 14 15 4 16 1 1 0 0 266 0 0 0 100 3 0 0 0 18 6 12 1 0 0 0 9 0 0 0 100 4 0 0 3 222 107 6 0 0 0 0 0 0 0 0 100 5 0 0 3 314 153 108 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 12 0 0 0 0 14 0 0 0 100 7 0 0 0 17 4 44 1 1 1 0 1408 0 1 0 99 March 4, 2026 at 01:11:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2162 104 145 1 11 86 0 562 0 2 0 98 1 0 0 0 129 1 165 1 10 61 0 294 0 0 0 99 2 0 0 14 58 4 103 0 7 101 0 266 0 0 0 100 3 0 0 0 142 95 133 13 11 109 0 12 0 1 0 99 4 0 0 3 266 103 127 0 16 85 0 0 0 1 0 99 5 0 0 3 306 129 148 0 7 91 0 0 0 1 0 99 6 0 0 0 100 25 153 0 11 81 0 1 0 0 0 100 7 0 0 0 53 4 116 1 3 65 0 1402 0 1 0 99 March 4, 2026 at 01:11:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3870 0 51 2812 105 1192 53 88 173 86 3833 8 7 0 85 1 3484 0 30 787 12 1139 28 88 184 62 3546 9 4 0 87 2 1429 0 28 671 8 750 16 69 90 47 3084 5 3 0 92 3 1103 0 72 670 5 974 26 65 151 34 3464 9 3 0 88 4 647 0 113 625 124 468 23 46 174 31 1741 4 3 0 93 5 4545 0 190 674 103 759 21 41 148 51 4356 7 5 0 88 6 43807 0 555 532 11 924 47 58 168 83 7103 25 20 0 55 7 5134 0 27 557 8 1022 22 66 111 78 5127 7 7 0 86 March 4, 2026 at 01:11:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 77 2122 106 55 1 3 5 0 584 0 3 0 97 1 4 0 0 138 52 123 0 2 5 0 308 0 1 0 99 2 6 0 21 27 3 10 0 2 1 0 279 0 0 0 100 3 0 0 0 28 3 8 0 1 0 0 3 0 0 0 100 4 51 0 18 240 113 24 2 3 1 0 22 0 0 0 99 5 1 0 2 235 104 21 1 2 2 0 10 0 1 0 99 6 2 0 0 90 1 68 0 1 0 0 9 0 0 0 100 7 0 0 0 31 4 42 1 1 1 0 1429 0 1 0 99 March 4, 2026 at 01:11:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2178 103 51 0 5 1 0 561 0 3 0 97 1 0 0 0 255 51 174 0 4 0 0 294 0 1 0 99 2 2 0 14 85 3 8 1 0 0 0 266 0 0 0 100 3 0 0 0 80 1 4 0 1 0 0 0 0 0 0 100 4 0 0 3 295 110 14 0 0 3 0 9 0 0 0 99 5 0 0 465 227 103 24 0 1 5 0 0 0 1 0 99 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 87 4 40 1 0 0 0 1411 0 1 0 99 March 4, 2026 at 01:11:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 104 118 1 0 0 0 567 0 1 0 99 1 0 0 0 122 52 116 1 0 0 0 295 0 0 0 100 2 0 0 14 11 4 8 0 0 0 0 267 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 4 0 0 4 222 111 12 0 0 0 0 9 0 0 0 100 5 0 0 2 214 103 8 0 0 1 0 0 0 0 0 100 6 0 0 0 13 2 12 0 0 0 0 13 0 0 0 100 7 0 0 0 19 5 46 1 0 1 0 1418 0 1 0 99 March 4, 2026 at 01:11:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 167 0 12 2287 103 338 3 38 114 42 1368 0 3 0 97 1 204 0 0 311 27 461 2 30 118 27 768 0 1 0 98 2 102 0 26 181 3 252 0 30 126 25 678 0 2 0 98 3 41 0 8 288 95 321 13 29 141 22 370 0 1 0 98 4 69 0 4 398 117 204 1 21 79 19 224 0 1 0 99 5 20 0 7 346 103 176 1 20 103 16 241 0 1 0 99 6 6447 0 332 151 0 331 8 18 162 43 3085 3 6 0 90 7 3707 0 20 215 4 309 4 31 122 39 1934 3 3 0 95 March 4, 2026 at 01:11:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 178 0 14 2145 105 192 1 10 10 4 1033 0 2 0 98 1 362 0 0 41 1 61 1 8 3 6 464 1 0 0 99 2 78 0 14 34 3 88 0 6 16 2 457 0 0 0 100 3 140 0 0 32 2 67 2 7 11 4 179 0 0 0 100 4 11 0 8 241 106 54 1 5 0 2 207 0 0 0 100 5 130 0 12 331 155 137 2 4 18 2 52 0 1 0 99 6 56 0 14 24 0 18 3 2 2 0 61 2 1 0 98 7 1122 0 0 36 3 79 1 5 8 4 1227 1 1 0 98 March 4, 2026 at 01:11:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2145 104 114 1 0 0 0 866 0 2 0 98 1 0 0 231 21 1 18 0 1 1 0 294 0 1 0 99 2 0 0 14 45 4 8 1 0 0 0 267 0 0 0 100 3 0 0 0 40 1 2 0 0 0 0 0 0 0 0 100 4 0 0 2 247 105 4 0 0 0 0 0 0 0 0 100 5 64 0 4 344 152 102 0 1 0 0 8 0 0 0 99 6 0 0 0 49 5 12 0 1 0 0 0 0 0 0 100 7 0 0 0 48 3 38 1 0 2 0 1107 0 0 0 100 March 4, 2026 at 01:11:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2116 104 114 0 3 0 0 862 0 2 0 98 1 0 0 0 33 2 22 1 2 0 0 295 0 0 0 100 2 0 0 14 12 3 6 0 0 0 0 266 0 0 0 100 3 0 0 0 12 2 4 0 0 0 0 2 0 0 0 100 4 0 0 3 214 106 0 0 0 0 0 0 0 0 0 100 5 0 0 3 220 106 12 0 0 0 0 8 0 0 0 100 6 0 0 0 110 51 102 0 0 0 0 1 0 0 0 100 7 0 0 0 19 3 40 2 0 2 0 1106 0 1 0 99 March 4, 2026 at 01:11:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 2113 104 20 1 1 1 0 867 0 1 0 99 1 0 0 0 119 1 116 0 2 0 0 295 0 0 0 100 2 0 0 14 10 3 8 0 1 0 0 266 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 5 220 111 2 0 0 0 0 0 0 0 0 100 5 0 0 1 222 107 16 0 0 1 0 7 0 0 0 100 6 0 0 0 114 52 114 0 0 0 0 17 0 0 0 100 7 0 0 0 14 3 42 0 0 2 0 1114 0 0 0 99 March 4, 2026 at 01:11:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 105 12 1 0 0 0 862 0 1 0 99 1 0 0 0 120 1 118 0 0 3 0 294 0 0 0 100 2 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 3 0 0 0 12 3 8 0 0 0 0 2 0 0 0 100 4 0 0 5 210 105 0 0 0 0 0 0 0 0 0 100 5 0 0 1 226 110 20 0 0 1 0 7 0 0 0 100 6 0 0 0 106 50 102 0 0 1 0 0 0 0 0 100 7 0 0 0 15 3 40 2 0 0 0 1107 0 0 0 99 March 4, 2026 at 01:11:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 7 2116 106 16 0 0 0 0 873 0 1 0 99 1 0 0 0 117 1 112 0 0 0 0 294 0 0 0 100 2 4 0 14 16 5 14 1 0 0 0 275 0 0 0 100 3 5 0 0 16 3 16 0 1 0 0 8 0 0 0 100 4 1 0 2 210 103 4 0 0 0 0 8 0 0 0 100 5 0 0 4 224 109 18 0 0 0 0 16 0 0 0 100 6 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 7 0 0 0 14 4 40 0 0 0 0 1109 0 0 0 99 March 4, 2026 at 01:11:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 106 74 0 1 0 0 862 0 1 0 98 1 0 0 0 66 3 58 1 1 0 0 295 0 0 0 100 2 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 3 0 0 0 15 4 10 0 1 0 0 7 0 0 0 100 4 0 0 2 217 105 16 0 2 1 0 5 0 0 0 100 5 0 0 4 221 108 14 0 0 0 0 7 0 0 0 100 6 0 0 0 109 52 104 0 1 0 0 1 0 0 0 100 7 0 0 0 15 4 41 1 1 0 0 1084 0 0 0 99 March 4, 2026 at 01:11:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 104 50 1 2 0 0 862 0 1 0 98 1 0 0 0 80 1 74 0 2 0 0 294 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 2 211 104 2 0 0 0 0 0 0 0 0 100 5 0 0 4 223 109 16 0 0 0 0 9 0 0 0 100 6 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 7 0 0 0 13 3 38 1 0 3 0 1084 0 0 0 99 March 4, 2026 at 01:11:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 105 122 0 1 1 0 868 0 1 0 98 1 0 0 0 20 2 16 0 0 0 0 295 0 0 0 100 2 0 0 14 9 3 6 0 0 0 0 267 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 4 0 0 5 216 105 4 0 1 0 0 0 0 0 0 100 5 0 0 1 229 109 22 1 1 0 0 6 0 0 0 100 6 0 0 0 114 52 114 0 0 1 0 16 0 0 0 100 7 0 0 0 18 4 44 2 0 1 0 1093 0 0 0 99 March 4, 2026 at 01:11:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 104 110 2 0 0 0 862 0 2 0 98 1 0 0 0 21 1 18 0 0 1 0 294 0 0 0 100 2 0 0 14 7 2 4 1 0 0 0 266 0 0 0 100 3 0 0 0 12 3 8 0 0 1 0 0 0 0 0 100 4 0 0 4 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 2 226 109 20 0 0 0 0 29 0 0 0 100 6 0 0 0 111 50 112 0 1 3 0 0 0 0 0 100 7 0 0 0 13 3 40 0 0 1 0 1086 0 0 0 99 March 4, 2026 at 01:11:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 822 0 17 2818 129 1180 41 94 80 45 5472 6 6 0 87 1 919 0 66 732 6 1188 88 94 107 38 3559 6 6 0 87 2 659 0 3 612 4 829 23 77 65 26 3580 7 4 0 89 3 798 0 39 582 6 840 40 67 132 27 3208 7 4 0 90 4 33560 0 140 706 106 725 35 54 64 18 3264 25 17 0 58 5 1144 0 93 686 108 847 25 57 128 11 2607 9 4 0 87 6 6732 0 311 423 6 655 37 53 77 44 5322 15 7 0 78 7 6299 0 14 582 15 949 22 54 93 29 3047 10 5 0 84 March 4, 2026 at 01:11:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2122 106 138 2 3 0 0 1995 0 2 0 98 1 17 0 0 36 4 22 0 0 4 0 323 0 1 0 99 2 24 0 0 15 1 4 0 1 0 0 10 0 0 0 100 3 3 0 14 30 3 20 0 1 0 0 277 0 0 0 100 4 10 0 18 217 101 6 0 1 0 0 15 0 0 0 100 5 50 0 30 231 107 26 0 2 3 0 16 0 1 0 98 6 9 0 7 15 0 6 0 1 0 0 10 0 0 0 100 7 3 0 0 124 52 118 0 2 0 0 6 0 0 0 100 March 4, 2026 at 01:11:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2156 122 88 1 2 0 0 1968 0 2 0 98 1 0 0 119 46 2 38 0 2 2 0 295 0 1 0 99 2 0 0 0 24 0 0 0 0 0 0 0 0 0 0 100 3 2 0 14 28 3 6 0 0 0 0 266 0 0 0 100 4 0 0 3 303 102 78 0 3 0 0 0 0 0 0 100 5 0 0 17 243 109 19 0 1 2 0 9 0 1 0 98 6 0 0 0 26 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 102 37 78 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:11:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2182 156 152 2 1 0 0 1973 0 2 0 98 1 0 0 0 34 1 14 0 0 0 0 294 0 0 0 100 2 0 0 0 22 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 26 3 6 1 0 0 0 266 0 0 0 100 4 0 0 3 326 105 100 0 0 0 0 0 0 0 0 100 5 0 0 115 229 109 23 1 0 0 0 9 0 1 0 99 6 0 0 0 29 2 10 0 0 0 0 12 0 0 0 100 7 0 0 0 28 2 10 0 0 0 0 5 0 0 0 99 March 4, 2026 at 01:11:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 375 0 27 2441 137 482 3 48 151 28 2548 1 4 0 95 1 2361 0 16 292 1 281 5 24 136 25 655 3 2 0 95 2 1298 0 122 181 4 305 1 30 131 42 2098 1 2 0 96 3 123 0 18 250 77 421 12 41 148 29 1043 1 2 0 97 4 139 0 7 431 103 305 2 34 134 23 549 0 1 0 98 5 48 0 15 402 128 290 3 22 96 17 424 1 2 0 98 6 5475 0 191 194 0 313 10 33 138 33 1617 4 5 0 91 7 2961 0 17 187 3 481 1 27 124 33 1083 1 4 0 95 March 4, 2026 at 01:11:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2116 106 129 2 3 1 0 1973 0 3 0 97 1 0 0 0 44 1 34 0 3 2 0 294 0 0 0 100 2 64 0 0 129 56 120 0 1 0 0 9 0 0 0 100 3 0 0 18 20 4 12 0 1 0 0 269 0 0 0 100 4 0 0 7 215 102 0 0 0 0 0 0 0 0 0 100 5 0 0 7 222 103 9 0 1 0 0 0 0 0 0 100 6 0 0 0 15 2 4 0 0 0 0 3 0 0 0 100 7 0 0 0 21 2 8 0 0 0 0 0 0 1 0 99 March 4, 2026 at 01:11:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2148 107 56 1 2 0 0 1960 0 2 0 98 1 0 0 231 115 2 112 0 2 1 0 295 0 1 0 99 2 0 0 0 146 54 108 0 0 0 0 8 0 0 0 99 3 0 0 14 43 3 8 0 0 0 0 267 0 0 0 100 4 0 0 2 240 102 0 0 0 0 0 0 0 0 0 100 5 0 0 4 252 105 10 0 1 0 0 4 0 0 0 100 6 0 0 0 40 0 4 0 1 0 0 1 0 0 0 100 7 0 0 0 43 2 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2114 106 52 1 0 0 0 1958 0 2 0 98 1 0 0 0 112 1 104 0 0 0 0 294 0 0 0 100 2 0 0 0 118 54 110 0 0 0 0 11 0 0 0 100 3 0 0 14 14 3 10 1 1 0 0 266 0 0 0 100 4 0 0 3 209 101 0 0 0 0 0 0 0 0 0 100 5 0 0 3 214 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2120 108 62 4 0 0 0 1966 0 2 0 98 1 0 0 0 115 2 111 1 0 0 0 295 0 0 0 100 2 0 0 0 117 56 112 0 0 0 0 7 0 0 0 100 3 0 0 14 11 3 8 0 0 1 0 266 0 0 0 100 4 0 0 2 213 104 8 0 1 0 0 0 0 0 0 100 5 0 0 4 214 102 8 0 1 0 0 0 0 0 0 100 6 0 0 0 18 5 16 0 1 0 0 13 0 0 0 100 7 0 0 0 14 3 12 0 0 0 0 6 0 0 0 100 March 4, 2026 at 01:12:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2117 106 78 1 1 1 0 1958 0 2 0 98 1 0 0 0 88 1 86 0 1 0 0 295 0 0 0 100 2 0 0 0 121 57 116 0 0 0 0 15 0 0 0 100 3 0 0 14 10 3 8 0 1 0 0 269 0 0 0 100 4 0 0 3 207 101 2 0 1 0 0 3 0 0 0 100 5 0 0 3 213 103 8 0 1 0 0 3 0 0 0 100 6 0 0 0 10 1 6 0 0 1 0 0 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 107 154 1 0 1 0 1963 0 2 0 98 1 0 0 0 14 3 8 0 0 0 0 299 0 0 0 100 2 0 0 0 117 56 112 0 0 0 0 13 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 4 210 101 4 0 1 0 0 0 0 0 0 100 5 0 0 2 214 103 10 0 1 1 0 0 0 0 0 100 6 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2136 126 190 2 2 0 0 1947 0 2 0 98 1 0 0 0 56 23 52 0 2 0 0 294 0 0 0 100 2 0 0 0 34 14 28 0 1 0 0 10 0 0 0 100 3 0 0 14 9 3 6 1 0 0 0 266 0 0 0 100 4 0 0 2 206 101 0 0 0 0 0 0 0 0 0 100 5 0 0 4 213 103 6 0 1 0 0 0 0 0 0 100 6 0 0 0 11 1 4 1 0 1 0 5 0 0 0 100 7 20 0 0 16 3 16 0 1 0 0 5 0 0 0 100 March 4, 2026 at 01:12:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 106 52 0 1 0 0 1946 0 2 0 98 1 0 0 0 212 52 206 1 1 0 0 294 0 0 0 100 2 0 0 0 16 5 10 1 0 0 0 5 0 0 0 100 3 1 0 14 10 3 6 1 0 1 0 326 1 0 0 99 4 0 0 3 212 106 0 0 0 0 0 0 0 0 0 100 5 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2120 105 62 1 1 0 0 1956 0 2 0 98 1 0 0 0 212 52 208 0 0 0 0 294 0 0 0 100 2 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 3 0 0 14 10 3 6 1 0 0 0 266 0 0 0 100 4 0 0 2 214 107 0 0 0 0 0 0 0 0 0 100 5 0 0 4 214 103 8 0 0 0 0 0 0 0 0 100 6 0 0 0 19 3 16 0 0 0 0 8 0 0 0 100 7 0 0 0 15 2 12 0 0 1 0 8 0 0 0 100 March 4, 2026 at 01:12:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 192 0 8 2233 106 298 9 15 10 5 2648 2 3 0 96 1 173 0 9 239 51 325 16 15 14 5 733 1 1 0 98 2 208 0 0 97 5 189 6 16 17 4 1098 1 1 0 98 3 65 0 14 128 4 172 10 12 10 1 758 1 1 0 98 4 52 0 73 278 102 126 4 13 16 4 1036 1 1 0 98 5 108 0 10 309 104 157 1 12 8 1 792 1 1 0 98 6 181 0 19 108 4 139 2 14 6 7 485 1 1 0 98 7 1923 0 7 74 3 91 2 8 16 2 778 2 2 0 96 March 4, 2026 at 01:12:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6347 0 98 2647 109 806 27 51 149 32 4419 12 7 0 81 1 1017 0 1 528 18 731 32 59 97 37 3458 6 3 0 91 2 711 0 25 538 3 879 31 60 132 33 2524 5 3 0 92 3 556 0 48 396 5 601 19 43 67 23 1615 2 2 0 96 4 748 0 79 568 104 645 14 37 98 19 1563 3 2 0 94 5 508 0 7 463 106 363 7 32 43 8 1813 3 2 0 95 6 459 0 0 417 1 636 26 34 54 13 1965 8 3 0 89 7 37821 0 336 361 28 560 27 28 124 44 4553 20 15 0 65 March 4, 2026 at 01:12:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 7 2146 113 156 3 0 0 0 1707 0 2 0 98 1 0 0 0 37 4 12 1 0 0 0 596 0 0 0 100 2 0 0 0 29 0 4 0 2 0 0 0 0 0 0 100 3 3 0 14 32 3 8 0 1 0 0 268 0 0 0 100 4 0 0 4 229 102 4 0 1 0 0 0 0 0 0 100 5 0 0 2 230 102 4 0 0 0 0 0 0 0 0 100 6 0 0 119 18 1 11 0 1 2 0 0 0 0 0 100 7 0 0 14 130 51 107 0 1 2 0 0 0 1 0 99 March 4, 2026 at 01:12:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2143 111 86 2 1 0 0 1676 0 2 0 98 1 0 0 0 99 3 80 0 2 0 0 596 0 0 0 100 2 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 27 3 8 1 1 1 0 266 0 0 0 100 4 0 0 4 227 105 2 0 1 0 0 0 0 0 0 100 5 0 0 2 228 102 8 0 2 0 0 0 0 0 0 100 6 0 0 0 26 1 2 0 0 0 0 0 0 0 0 100 7 0 0 112 111 51 109 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:12:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2134 115 66 1 0 0 0 1689 0 2 0 98 1 0 0 0 126 4 122 0 1 0 0 597 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 0 0 14 10 3 6 0 0 0 0 266 0 0 0 100 4 0 0 1 214 106 0 0 0 0 0 0 0 0 0 100 5 0 0 5 215 102 8 0 0 3 0 0 0 0 0 100 6 0 0 0 12 0 8 0 1 0 0 5 0 0 0 100 7 0 0 7 116 53 114 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:12:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4863 0 30 2528 107 633 21 66 171 49 3753 7 7 0 87 1 806 0 12 468 11 783 17 73 187 77 2487 2 3 0 95 2 26323 0 12 365 0 647 18 62 118 51 2210 14 9 0 78 3 199 0 36 426 73 496 8 62 157 32 1407 1 2 0 96 4 552 0 89 514 110 427 11 43 138 26 1601 2 2 0 96 5 296 0 19 514 111 419 7 39 118 30 1155 1 3 0 95 6 87 0 7 234 12 285 3 33 86 17 875 1 1 0 98 7 9909 0 424 308 32 521 17 35 159 65 6303 9 9 0 83 March 4, 2026 at 01:12:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5398 0 57 2488 124 458 14 33 177 11 3550 7 5 0 87 1 1026 0 1 377 4 502 15 31 75 13 2746 8 2 0 90 2 7669 0 7 343 2 434 9 30 28 17 1505 7 6 0 87 3 1009 0 110 289 3 419 6 31 144 16 1648 3 4 0 93 4 756 0 61 656 128 718 28 33 245 10 2180 4 3 0 93 5 756 0 63 554 103 603 23 30 254 11 1286 6 2 0 91 6 764 0 21 284 10 434 13 23 89 5 1031 3 2 0 95 7 4164 0 201 260 5 414 16 20 89 18 2443 7 5 0 88 March 4, 2026 at 01:12:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2187 105 132 3 2 0 0 1671 0 3 0 97 1 0 0 0 88 4 12 0 1 0 0 595 0 1 0 99 2 44 0 0 96 8 16 0 0 0 0 10 0 0 0 99 3 5 0 56 80 3 8 1 1 2 0 268 0 2 0 98 4 0 0 3 393 154 110 0 1 0 0 0 0 1 0 99 5 0 0 3 291 102 13 0 2 1 0 0 0 0 0 100 6 0 0 0 81 1 4 0 1 0 0 0 0 0 0 100 7 0 0 462 14 1 4 0 0 2 0 0 0 1 0 99 March 4, 2026 at 01:12:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 105 142 0 0 0 0 1665 0 2 0 98 1 0 0 0 17 4 14 1 1 0 0 595 0 0 0 100 2 0 0 0 18 6 12 1 0 0 0 9 0 0 0 100 3 0 0 14 9 1 6 0 0 0 0 266 0 0 0 100 4 0 0 4 311 153 104 0 0 0 0 0 0 0 0 100 5 0 0 2 218 103 10 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2119 106 114 3 0 0 0 1676 0 2 0 98 1 0 0 0 52 4 50 0 2 0 0 595 0 1 0 99 2 0 0 0 21 6 20 0 1 0 0 9 0 0 0 100 3 0 0 14 9 1 6 0 0 0 0 266 0 0 0 100 4 0 0 3 314 156 102 0 0 0 0 0 0 0 0 100 5 0 0 3 221 102 14 0 0 0 0 0 0 0 0 100 6 0 0 0 15 2 12 0 0 0 0 5 0 0 0 100 7 0 0 0 9 1 6 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:12:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6487 0 56 2650 106 755 21 87 159 60 4667 8 8 0 83 1 912 0 9 554 4 831 7 91 204 73 2717 3 4 0 93 2 989 0 15 453 12 691 7 87 156 52 2176 2 3 0 95 3 265 0 40 453 82 747 5 71 135 47 1767 2 4 0 94 4 1990 0 81 624 145 665 9 59 133 46 1549 5 3 0 92 5 2877 0 190 590 102 472 16 50 107 36 2113 5 3 0 92 6 850 0 14 376 5 529 20 53 83 36 1702 4 3 0 93 7 45537 0 456 505 1 809 63 62 190 93 7190 24 23 0 53 March 4, 2026 at 01:12:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 454 0 86 2362 109 511 25 25 48 3 2962 4 5 0 91 1 24 0 0 254 6 378 12 16 32 0 1657 3 3 0 95 2 960 0 0 267 2 327 4 17 48 2 1117 3 2 0 96 3 511 0 49 228 4 306 4 33 94 1 1549 2 1 0 96 4 757 0 63 459 149 297 11 17 150 6 791 2 2 0 96 5 520 0 39 383 103 255 6 14 39 2 1000 2 1 0 96 6 574 0 61 174 3 321 29 24 124 3 1092 6 2 0 92 7 59 0 7 168 1 267 30 19 5 2 649 7 1 0 92 March 4, 2026 at 01:12:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2193 113 61 3 3 1 0 1674 0 4 0 96 1 0 0 462 33 5 28 0 1 2 0 595 0 2 0 98 2 0 0 0 178 0 100 0 0 0 0 0 0 1 0 99 3 2 0 14 83 1 8 0 0 0 0 265 0 0 0 99 4 0 0 2 384 153 108 0 1 0 0 0 0 1 0 99 5 0 0 4 279 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 89 2 12 0 0 0 0 0 0 0 0 100 7 0 0 0 81 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 112 56 1 0 0 0 1669 0 2 0 98 1 0 0 0 14 4 10 0 0 0 0 596 0 1 0 99 2 0 0 0 105 0 100 0 0 0 0 0 0 0 0 100 3 0 0 14 9 1 6 0 0 0 0 266 0 0 0 100 4 0 0 4 309 153 102 0 0 0 0 0 0 0 0 100 5 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 17 2 12 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2135 117 128 3 1 0 0 1686 0 2 0 98 1 0 0 0 18 5 14 1 0 0 0 595 0 0 0 100 2 0 0 0 55 1 48 0 0 0 0 1 0 0 0 100 3 0 0 14 9 1 6 0 0 0 0 266 0 0 0 100 4 0 0 1 317 156 104 0 1 0 0 0 0 0 0 100 5 0 0 6 210 101 4 0 0 2 0 0 0 0 0 100 6 0 0 0 28 2 32 0 1 1 0 5 0 0 0 100 7 0 0 0 9 1 6 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:12:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12824 0 275 2928 123 1303 53 102 515 84 7182 16 14 0 70 1 1232 0 32 791 6 1228 17 125 242 82 4323 6 5 0 90 2 9693 0 16 599 1 833 42 104 355 65 3364 10 7 0 83 3 764 0 38 637 71 948 36 84 204 52 3263 6 5 0 89 4 8248 0 149 805 115 828 23 86 347 42 2700 14 6 0 80 5 17629 0 16 664 108 722 39 65 244 39 2776 10 8 0 82 6 1135 0 88 550 18 801 22 66 263 22 2063 4 4 0 92 7 37935 0 505 485 4 675 60 50 323 77 5917 26 23 0 51 March 4, 2026 at 01:12:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 42 2124 105 54 2 5 3 0 1409 3 3 0 94 1 17 0 7 139 7 131 0 4 3 0 912 0 1 0 99 2 62 0 0 34 3 14 0 1 0 0 37 0 0 0 100 3 49 0 49 37 5 34 1 2 3 0 305 0 1 0 99 4 0 0 16 227 103 10 0 1 0 0 8 0 0 0 100 5 2 0 4 225 101 6 0 2 1 0 11 0 0 0 100 6 0 0 0 131 52 114 0 1 0 0 13 0 0 0 100 7 5 0 0 23 1 2 0 0 1 0 8 0 0 0 100 March 4, 2026 at 01:12:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2177 104 79 2 4 2 0 1362 0 4 0 96 1 0 0 462 89 5 82 0 3 2 0 897 0 1 0 98 2 0 0 0 99 2 22 0 5 0 0 1 0 0 0 100 3 2 0 14 95 7 18 0 1 0 0 275 0 0 0 99 4 0 0 2 280 102 2 0 0 0 0 0 0 0 0 100 5 0 0 4 279 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 189 52 112 0 0 0 0 0 0 0 0 100 7 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 105 134 1 2 0 0 1364 0 2 0 98 1 0 0 0 28 5 20 1 0 0 0 895 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 14 21 7 18 0 1 0 0 275 0 0 0 100 4 0 0 3 213 103 10 0 1 0 0 0 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 117 52 112 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2119 106 156 1 0 0 0 1378 0 2 0 98 1 0 0 0 17 5 14 0 0 0 0 896 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 14 24 9 20 1 0 0 0 275 0 0 0 100 4 0 0 2 213 105 2 0 0 0 0 0 0 0 0 100 5 0 0 4 210 101 4 0 1 1 0 0 0 0 0 100 6 0 0 0 124 52 120 0 0 0 0 5 0 0 0 100 7 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:12:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10228 0 41 2982 109 1074 30 91 198 64 4619 18 9 0 73 1 1697 0 91 867 18 1221 22 109 238 85 4934 6 6 0 88 2 930 0 24 726 4 1263 27 98 208 75 4322 9 6 0 84 3 27064 0 46 734 96 999 45 73 216 55 5849 21 15 0 65 4 1061 0 149 830 102 1063 34 88 281 53 3112 6 4 0 90 5 953 0 69 857 105 1045 36 77 240 39 2507 3 4 0 93 6 2024 0 187 530 11 753 31 60 157 40 2472 8 5 0 88 7 12681 0 471 526 18 938 21 61 210 74 6167 11 12 0 77 March 4, 2026 at 01:12:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 45 0 42 2131 107 128 0 6 3 0 277 0 3 0 97 1 0 0 0 35 5 18 0 2 3 0 899 0 1 0 99 2 11 0 0 32 4 42 1 1 1 0 1137 0 0 0 99 3 7 0 49 26 2 18 0 4 1 0 277 0 1 0 99 4 7 0 18 228 103 8 0 1 1 0 9 0 0 0 100 5 0 0 9 228 103 12 0 3 0 0 10 0 0 0 100 6 1 0 0 32 2 18 0 2 0 0 20 0 0 0 100 7 17 0 0 129 54 114 1 1 0 0 21 0 0 0 100 March 4, 2026 at 01:12:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2152 108 29 1 2 2 0 269 0 3 0 97 1 0 0 238 23 5 18 1 1 3 0 897 0 1 0 99 2 0 0 0 49 3 36 1 0 0 0 1105 0 1 0 99 3 2 0 14 41 1 2 0 0 0 0 266 0 0 0 100 4 0 0 2 244 101 2 0 0 0 0 0 0 0 0 100 5 0 0 4 247 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 147 2 108 0 2 0 0 0 0 0 0 100 7 0 0 0 143 51 102 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2154 110 24 0 0 0 0 270 0 2 0 98 1 0 0 224 17 4 12 0 1 1 0 895 0 1 0 99 2 0 0 0 44 2 34 1 0 1 0 1101 0 1 0 99 3 0 0 14 39 1 2 1 0 0 0 266 0 0 0 100 4 0 0 2 242 101 2 0 0 0 0 0 0 0 0 100 5 0 0 4 245 102 4 0 1 1 0 0 0 0 0 100 6 0 0 0 153 2 118 0 1 2 0 0 0 0 0 100 7 0 0 0 141 51 102 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4996 0 52 2404 116 384 7 26 52 32 1594 5 4 0 91 1 555 0 6 280 6 400 7 33 47 46 1822 2 2 0 97 2 199 0 0 226 6 326 9 30 45 15 2827 2 2 0 96 3 340 0 24 189 1 237 4 23 28 18 1362 1 1 0 98 4 1201 0 189 396 112 274 0 20 22 34 2970 2 4 0 94 5 252 0 23 426 102 346 5 31 38 41 889 1 2 0 97 6 43 0 12 290 2 351 7 20 27 27 1163 2 1 0 97 7 5998 0 193 302 45 461 17 25 65 43 2291 5 5 0 90 March 4, 2026 at 01:12:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5441 0 91 2583 104 637 38 59 132 42 2613 9 8 0 83 1 1425 0 91 521 28 751 28 79 235 32 1938 6 4 0 90 2 2530 0 191 395 6 583 37 67 204 43 3680 7 5 0 88 3 1126 0 57 560 76 773 32 65 179 36 2695 6 4 0 90 4 875 0 90 565 106 563 28 54 165 29 1661 3 3 0 94 5 302 0 38 490 111 357 6 36 139 20 1283 3 3 0 94 6 152 0 3 440 15 684 25 42 199 9 1438 4 2 0 94 7 31380 0 131 378 2 623 35 47 138 28 4093 17 15 0 67 March 4, 2026 at 01:12:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 14 2171 109 124 0 2 2 0 274 0 2 0 97 1 0 0 343 124 53 125 0 4 3 0 301 0 1 0 99 2 0 0 0 67 3 40 2 0 0 0 1405 0 1 0 99 3 3 0 14 58 2 4 1 0 0 0 560 0 0 0 100 4 0 0 4 261 104 2 0 1 0 0 0 0 0 0 100 5 0 0 2 260 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 62 3 6 0 0 0 0 0 0 0 0 100 7 0 0 0 62 0 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:12:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 147 2119 109 118 0 1 0 0 267 0 2 0 98 1 0 0 0 147 54 125 0 4 1 0 304 0 0 0 100 2 0 0 0 39 3 44 0 2 2 0 1405 0 1 0 99 3 0 0 14 30 2 4 1 0 0 0 560 0 0 0 100 4 0 0 3 232 103 4 0 0 0 0 0 0 0 0 100 5 0 0 3 229 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 31 3 6 0 0 0 0 0 0 0 0 100 7 0 0 0 25 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2111 103 110 1 0 0 0 260 0 2 0 98 1 0 0 0 100 44 90 1 0 0 0 310 0 0 0 99 2 0 0 0 26 5 47 2 4 0 0 1404 0 1 0 99 3 0 0 14 37 15 32 0 1 0 0 561 0 0 0 100 4 0 0 3 210 101 2 0 0 0 0 0 0 0 0 100 5 0 0 3 211 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 13 3 6 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3618 0 290 2253 103 335 4 29 69 34 1579 4 4 0 92 1 4766 0 42 285 6 432 4 20 64 36 1328 4 3 0 93 2 506 0 7 294 8 333 2 32 59 43 2177 1 2 0 97 3 205 0 26 248 10 263 3 31 40 32 1183 1 2 0 98 4 288 0 12 454 146 257 0 24 36 23 472 0 1 0 99 5 26 0 2 355 102 102 1 14 10 6 288 0 1 0 99 6 109 0 13 133 3 180 3 21 29 14 398 0 4 0 95 7 3314 0 132 134 0 200 5 15 19 38 2395 2 3 0 96 March 4, 2026 at 01:12:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2120 104 110 0 0 0 0 263 0 1 0 99 1 0 0 28 13 1 8 0 2 1 0 301 0 1 0 99 2 0 0 0 28 3 48 1 2 3 0 1398 0 1 0 99 3 0 0 21 18 2 12 1 2 1 0 560 0 0 0 99 4 64 0 4 332 159 124 0 1 1 0 8 0 0 0 100 5 5 0 2 222 104 8 0 0 0 0 5 0 0 0 100 6 2 0 0 20 4 12 0 1 0 0 11 0 0 0 100 7 0 0 0 13 0 2 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:12:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2148 104 112 1 1 0 0 261 0 1 0 99 1 0 0 21 44 2 6 0 0 2 0 302 0 1 0 99 2 1 0 231 25 3 46 1 0 2 0 1397 0 1 0 99 3 1 0 14 48 2 12 1 3 0 0 562 0 1 0 99 4 1 0 3 332 146 86 0 2 0 0 9 0 0 0 99 5 1 0 3 275 116 34 0 1 0 0 1 0 0 0 100 6 0 0 0 50 4 10 0 0 0 0 4 0 0 0 100 7 0 0 0 44 1 4 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:12:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 104 110 0 0 0 0 260 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 302 0 0 0 100 2 0 0 0 21 3 44 2 0 0 0 1399 0 0 0 99 3 0 0 14 8 2 6 0 0 0 0 561 0 0 0 100 4 0 0 1 226 112 14 0 0 1 0 8 0 0 0 100 5 0 0 5 313 152 110 0 1 2 0 0 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 104 110 0 0 0 0 260 0 1 0 99 1 0 0 0 8 1 2 1 0 0 0 301 0 0 0 100 2 0 0 0 17 2 42 0 0 0 0 1395 0 1 0 99 3 0 0 14 8 2 6 0 0 0 0 560 0 0 0 99 4 0 0 3 227 112 14 0 0 0 0 6 0 0 0 100 5 0 0 3 310 151 106 0 2 1 0 0 0 0 0 100 6 0 0 0 13 3 8 0 1 0 0 0 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:12:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 105 112 0 0 0 0 261 0 1 0 99 1 0 0 0 18 4 20 0 0 0 0 318 0 0 0 100 2 0 0 0 23 4 46 2 0 0 0 1400 0 1 0 99 3 0 0 14 10 2 8 1 0 0 0 562 0 0 0 100 4 0 0 3 227 112 16 0 0 0 0 16 0 0 0 100 5 0 0 3 314 152 108 0 0 3 0 0 0 0 0 100 6 0 0 0 18 3 16 0 0 0 0 6 0 0 0 100 7 0 0 0 10 1 8 0 0 1 0 11 0 0 0 100 March 4, 2026 at 01:12:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 7 2124 105 124 0 1 3 0 267 0 1 0 99 1 1 0 0 11 2 8 0 0 0 0 307 0 0 0 100 2 0 0 0 19 3 44 0 0 0 0 1393 0 1 0 99 3 0 0 14 12 3 10 1 0 0 0 565 0 0 0 100 4 0 0 3 221 109 14 0 0 0 0 8 0 0 0 100 5 0 0 3 313 152 108 0 0 0 0 0 0 0 0 100 6 22 0 0 16 5 12 0 0 0 0 5 0 0 0 100 7 0 0 0 8 0 4 0 1 4 0 0 0 0 0 100 March 4, 2026 at 01:12:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 104 112 1 0 0 0 259 0 1 0 99 1 0 0 0 10 2 6 0 1 0 0 302 0 0 0 100 2 0 0 0 21 3 46 1 1 2 0 1385 0 0 0 100 3 0 0 14 8 2 6 0 0 0 0 560 0 0 0 100 4 0 0 3 219 108 12 0 0 0 0 8 0 0 0 100 5 0 0 3 311 152 104 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 104 110 0 0 0 0 260 0 1 0 99 1 0 0 0 10 1 4 1 0 0 0 301 0 0 0 100 2 0 0 0 22 3 46 1 0 2 0 1384 0 0 0 99 3 0 0 14 8 2 6 0 0 0 0 560 0 0 0 100 4 0 0 5 220 108 14 0 0 0 0 6 0 0 0 100 5 0 0 1 309 151 104 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 104 110 0 0 0 0 260 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 2 0 0 0 23 3 46 2 0 0 0 1385 0 0 0 99 3 0 0 14 13 2 14 1 1 0 0 560 0 0 0 100 4 0 0 3 218 107 12 0 0 0 0 8 0 0 0 100 5 0 0 3 311 152 104 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36013 0 137 2247 103 323 18 15 32 31 3639 15 11 0 74 1 316 0 26 251 4 340 13 31 29 31 1499 2 2 0 96 2 39 0 1 183 3 369 7 24 20 18 2143 1 1 0 98 3 143 0 16 183 4 226 2 13 19 19 2005 1 1 0 98 4 97 0 83 373 113 279 2 20 13 20 1328 1 1 0 98 5 217 0 10 475 142 321 10 13 9 15 877 1 1 0 98 6 61 0 2 142 3 171 0 14 10 16 681 1 0 0 99 7 130 0 1 158 13 198 6 12 15 3 422 1 1 0 98 March 4, 2026 at 01:12:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4624 0 419 2411 105 480 9 26 238 21 1876 8 9 0 83 1 5441 0 24 411 4 384 8 33 91 15 1849 12 4 0 84 2 861 0 15 327 4 475 19 46 209 26 2613 3 3 0 94 3 751 0 4 412 108 477 18 35 170 15 1445 3 2 0 95 4 416 0 70 471 103 450 21 39 128 13 1570 3 2 0 95 5 441 0 24 553 103 443 7 27 140 3 1155 3 2 0 95 6 802 0 7 230 9 335 6 21 148 5 1013 2 2 0 96 7 456 0 30 232 5 354 15 23 154 5 1187 3 2 0 96 March 4, 2026 at 01:12:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2150 107 18 0 0 0 0 8 0 2 0 98 1 0 0 238 13 3 10 1 0 1 0 564 0 1 0 99 2 0 0 0 43 2 34 1 0 2 0 1403 0 1 0 99 3 0 0 0 143 52 106 0 0 0 0 295 0 0 0 100 4 3 0 16 241 103 4 0 0 0 0 266 0 0 0 100 5 0 0 4 346 102 106 0 0 2 0 0 0 0 0 100 6 0 0 0 59 3 26 0 1 2 0 0 0 0 0 100 7 0 0 0 41 1 4 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:12:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2121 110 30 0 2 0 0 9 0 2 0 98 1 0 0 7 19 5 12 1 1 0 0 563 0 0 0 100 2 0 0 0 17 4 38 1 0 0 0 1407 0 0 0 99 3 0 0 0 112 51 104 1 0 0 0 294 0 0 0 100 4 0 0 18 213 104 6 0 0 0 0 266 0 0 0 100 5 0 0 2 314 102 104 0 0 0 0 0 0 0 0 100 6 0 0 0 26 4 18 0 1 1 0 0 0 0 0 100 7 0 0 0 13 1 8 0 2 2 0 0 0 0 0 100 March 4, 2026 at 01:12:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 88 0 1 0 0 9 0 1 0 99 1 0 0 7 10 3 6 1 0 0 0 560 0 0 0 100 2 0 0 0 12 2 34 3 0 2 0 1404 0 1 0 99 3 0 0 0 108 51 104 0 0 0 0 294 0 0 0 100 4 0 0 17 209 104 4 1 0 0 0 266 0 0 0 100 5 0 0 3 243 101 34 0 0 0 0 0 0 0 0 100 6 0 0 0 21 4 16 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10079 0 532 2691 124 975 47 66 133 79 7051 11 12 0 77 1 9277 0 282 730 9 814 32 80 150 61 4748 14 7 0 80 2 3539 0 64 666 7 934 28 100 125 82 4308 5 5 0 90 3 972 0 31 576 23 875 25 75 184 61 2874 4 3 0 93 4 3383 0 140 787 113 701 29 69 111 57 3641 9 5 0 86 5 1658 0 70 685 102 830 26 75 184 54 2606 4 4 0 92 6 1273 0 33 486 4 717 35 64 59 42 2700 6 3 0 91 7 33644 0 43 484 7 665 26 52 141 35 3167 18 11 0 70 March 4, 2026 at 01:12:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2167 102 95 0 12 105 0 2 0 2 0 98 1 0 0 7 72 3 93 1 5 48 0 575 0 0 0 99 2 21 0 70 105 3 156 0 8 72 0 315 0 2 0 98 3 2 0 0 125 70 146 9 5 90 0 1409 0 2 0 98 4 18 0 30 347 111 166 0 8 68 0 282 0 1 0 99 5 7 0 4 346 146 164 1 6 80 0 37 0 1 0 99 6 0 0 0 71 5 92 0 7 58 0 27 0 0 0 100 7 44 0 0 57 4 63 1 4 66 0 27 0 0 0 100 March 4, 2026 at 01:12:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 102 16 0 2 0 0 0 0 2 0 98 1 0 0 14 84 3 8 1 1 0 0 560 0 1 0 99 2 0 0 42 85 3 14 0 1 2 0 312 0 2 0 98 3 0 0 462 23 2 42 3 0 2 0 1417 0 2 0 98 4 2 0 17 373 102 94 0 0 0 0 268 0 1 0 99 5 0 0 3 382 151 104 0 0 0 0 0 0 1 0 99 6 0 0 0 94 4 16 0 0 0 0 0 0 0 0 100 7 0 0 0 91 6 12 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:12:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 78 0 2 0 0 26 0 1 0 99 1 0 0 7 47 3 41 0 3 3 0 561 0 0 0 100 2 0 0 0 16 2 12 0 2 1 0 302 0 0 0 100 3 0 0 0 11 2 38 0 1 0 0 1399 0 0 0 99 4 0 0 17 207 103 2 0 0 0 0 266 0 0 0 100 5 0 0 3 311 152 104 0 0 0 0 0 0 0 0 100 6 0 0 0 21 4 16 0 0 0 0 0 0 0 0 100 7 0 0 0 18 6 12 1 0 0 0 9 0 0 0 100 March 4, 2026 at 01:12:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2147 103 132 0 5 4 3 74 0 2 0 98 1 3034 0 228 52 5 63 6 4 8 7 1058 1 2 0 97 2 70 0 11 121 2 81 2 12 12 16 209 0 1 0 99 3 8 0 0 90 2 89 2 7 12 6 1494 0 1 0 99 4 33 0 19 253 102 53 4 7 7 3 340 0 0 0 100 5 7 0 4 339 152 130 1 3 4 3 30 0 0 0 100 6 7 0 2 54 4 41 0 2 0 5 46 0 0 0 100 7 9 0 3 49 9 32 0 2 0 2 58 0 0 0 100 March 4, 2026 at 01:12:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34227 0 87 2762 102 1000 44 66 142 46 5959 20 16 0 64 1 4977 0 242 700 21 1087 34 74 187 57 5731 8 9 0 84 2 11562 0 354 667 2 1053 26 71 206 73 5256 12 9 0 79 3 6224 0 90 642 4 1080 28 86 171 91 5225 8 6 0 86 4 1775 0 150 776 108 962 18 88 183 79 2844 9 4 0 88 5 1433 0 24 777 107 860 32 74 117 48 3669 9 3 0 88 6 538 0 12 515 23 744 14 61 73 40 2358 5 2 0 93 7 293 0 10 444 6 635 13 52 53 32 2588 5 2 0 93 March 4, 2026 at 01:12:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 7 2195 107 95 0 10 73 0 21 0 3 0 97 1 2 0 244 87 3 124 0 6 86 0 286 0 1 0 99 2 7 0 0 104 4 121 2 8 85 0 330 0 1 0 99 3 16 0 0 165 73 157 11 7 103 0 1410 0 2 0 98 4 0 0 17 382 101 190 0 13 94 0 5 0 1 0 99 5 5 0 17 287 103 86 0 9 62 0 268 0 1 0 99 6 0 0 0 193 54 197 0 13 99 0 16 0 1 0 99 7 9 0 0 83 0 84 1 10 82 0 20 0 0 0 100 March 4, 2026 at 01:12:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 106 24 0 2 0 0 9 0 1 0 99 1 0 0 7 21 4 19 1 0 2 0 850 0 0 0 100 2 0 0 0 7 0 3 0 0 6 0 283 0 0 0 100 3 0 0 0 106 3 133 0 0 2 0 1402 0 1 0 99 4 0 0 4 207 101 0 0 0 0 0 0 0 0 0 100 5 0 0 16 212 103 6 0 0 0 0 267 0 0 0 100 6 0 0 0 117 55 112 0 1 3 0 2 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:12:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 245 2117 107 31 1 4 0 0 9 0 2 0 98 1 0 0 7 91 5 50 0 3 1 0 562 0 0 0 99 2 0 0 0 46 2 4 0 0 0 0 303 0 0 0 100 3 0 0 0 106 2 96 1 2 0 0 1397 0 1 0 99 4 0 0 5 248 106 2 0 0 0 0 0 0 0 0 100 5 0 0 15 250 105 10 1 0 0 0 270 0 0 0 100 6 0 0 0 149 54 110 0 0 0 0 1 0 0 0 100 7 0 0 0 42 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:13:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 380 0 28 2362 110 273 2 30 40 22 394 1 3 0 97 1 53 0 29 275 15 283 2 27 22 21 1061 0 3 0 97 2 67 0 7 134 1 155 4 25 14 16 771 1 1 0 98 3 3415 0 120 122 2 265 12 21 41 29 3884 2 3 0 95 4 3650 0 203 339 106 245 7 21 61 48 1375 4 3 0 93 5 4756 0 34 400 103 167 3 17 70 32 1112 4 2 0 94 6 238 0 5 242 43 401 3 36 44 34 794 1 1 0 98 7 241 0 5 152 0 229 3 22 33 26 469 0 1 0 99 March 4, 2026 at 01:13:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2108 102 7 0 2 1 0 0 0 2 0 98 1 0 0 7 235 55 229 0 2 2 0 572 0 1 0 99 2 64 0 0 31 7 24 0 2 0 0 316 0 0 0 100 3 0 0 0 21 4 40 0 0 1 0 1392 0 1 0 99 4 0 0 5 223 107 4 0 0 0 0 1 0 0 0 100 5 0 0 22 224 103 17 0 2 1 0 266 0 0 0 100 6 0 0 0 18 4 8 0 0 0 0 0 0 0 0 100 7 0 0 0 24 4 14 0 0 0 0 14 0 0 0 100 March 4, 2026 at 01:13:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 101 50 0 1 0 0 0 0 2 0 98 1 0 0 238 145 40 140 0 1 2 0 560 0 1 0 99 2 0 0 0 84 22 48 0 1 0 0 310 0 0 0 100 3 0 0 0 45 2 38 1 0 3 0 1388 0 1 0 99 4 0 0 2 240 102 0 0 0 0 0 0 0 0 0 100 5 0 0 18 256 103 20 0 0 0 0 266 0 0 0 100 6 0 0 0 48 4 12 0 2 0 0 0 0 0 0 100 7 0 0 0 39 0 2 0 0 3 0 0 0 0 0 100 March 4, 2026 at 01:13:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2108 101 106 0 0 0 0 0 0 2 0 98 1 0 0 7 18 4 10 1 0 0 0 561 0 0 0 100 2 0 0 0 124 57 116 0 0 0 0 311 0 0 0 99 3 0 0 0 15 2 38 1 1 0 0 1390 0 1 0 99 4 0 0 3 211 102 2 0 1 0 0 0 0 0 0 100 5 0 0 17 220 102 12 1 0 0 0 266 0 0 0 100 6 0 0 0 18 5 10 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:13:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 104 0 0 0 0 0 0 1 0 99 1 0 0 7 14 4 10 0 1 0 0 562 0 0 0 100 2 0 0 0 38 16 32 0 0 0 0 308 0 0 0 100 3 0 0 0 88 39 110 3 1 0 0 1389 0 1 0 99 4 0 0 3 219 106 14 0 2 1 0 0 0 0 0 100 5 0 0 17 218 102 14 0 1 3 0 266 0 0 0 100 6 0 0 0 16 5 12 0 1 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 1 0 0 1 0 1 0 99 1 0 0 7 14 4 10 1 0 0 0 564 0 0 0 100 2 0 0 0 24 8 20 1 0 0 0 320 0 0 0 100 3 0 0 0 11 2 38 0 1 1 0 1391 0 0 0 99 4 0 0 4 314 156 102 0 0 0 0 0 0 0 0 100 5 1 0 16 220 102 13 2 1 0 0 340 1 0 0 99 6 0 0 0 15 5 10 0 0 0 0 0 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:13:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 104 0 2 0 0 0 0 1 0 99 1 0 0 7 18 5 16 1 0 0 0 570 0 0 0 100 2 0 0 0 23 6 20 0 0 0 0 314 0 0 0 100 3 6 0 0 13 3 38 1 0 1 0 1388 0 1 0 99 4 0 0 3 313 157 100 0 0 0 0 0 0 0 0 100 5 0 0 17 222 102 16 0 2 1 0 266 0 0 0 100 6 2 0 0 19 6 14 0 1 0 0 5 0 0 0 100 7 0 0 0 17 2 20 0 1 0 0 16 0 0 0 100 March 4, 2026 at 01:13:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 120 0 1 2 0 0 0 1 0 99 1 0 0 7 15 4 10 1 0 0 0 560 0 0 0 100 2 0 0 0 23 8 18 1 0 0 0 311 0 0 0 100 3 0 0 0 13 2 38 2 0 2 0 1379 0 1 0 99 4 20 0 5 314 158 102 0 0 0 0 5 0 0 0 100 5 0 0 15 216 103 14 0 0 3 0 272 0 0 0 100 6 0 0 0 16 5 12 0 1 0 0 11 0 0 0 100 7 0 0 0 12 2 8 0 0 3 0 6 0 0 0 100 March 4, 2026 at 01:13:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 110 0 0 0 0 0 0 1 0 99 1 0 0 7 14 4 10 0 0 0 0 562 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 307 0 0 0 100 3 0 0 0 13 3 38 1 0 1 0 1380 0 0 0 99 4 0 0 5 311 156 100 0 0 0 0 0 0 0 0 100 5 0 0 15 211 102 6 0 0 0 0 266 0 0 0 100 6 0 0 0 15 5 10 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 2 0 0 0 0 1 0 99 1 0 0 7 15 5 12 0 1 0 0 561 0 0 0 100 2 0 0 0 29 7 24 0 2 0 0 311 0 0 0 100 3 0 0 0 11 2 36 1 0 2 0 1379 0 0 0 100 4 0 0 4 308 153 100 0 0 0 0 0 0 0 0 100 5 0 0 16 211 102 6 0 0 0 0 266 0 0 0 100 6 0 0 0 15 5 10 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 228 0 5 2271 102 333 6 26 27 16 819 1 2 0 97 1 49 0 8 151 9 274 5 19 21 12 1891 2 1 0 97 2 95 0 0 181 5 272 6 22 18 10 1131 1 1 0 98 3 58 0 0 190 3 237 10 19 14 11 1748 1 1 0 98 4 17279 0 181 413 144 280 15 12 23 31 3091 8 6 0 86 5 354 0 27 406 104 264 6 25 44 20 937 1 2 0 97 6 119 0 25 173 8 225 0 20 20 18 1273 1 1 0 98 7 303 0 9 148 6 194 1 19 19 16 763 1 1 0 98 March 4, 2026 at 01:13:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 845 0 50 2453 105 507 18 42 87 14 1719 3 3 0 94 1 767 0 21 312 12 388 12 27 90 17 2061 3 2 0 94 2 569 0 0 302 5 441 17 26 84 7 1838 4 2 0 95 3 606 0 34 268 11 408 35 22 163 2 2501 6 2 0 92 4 23134 0 249 524 139 429 19 27 55 17 2546 14 10 0 76 5 3316 0 5 554 103 429 18 24 32 8 1526 4 2 0 94 6 951 0 61 241 4 445 9 22 134 21 1503 3 3 0 95 7 2638 0 71 272 3 443 18 27 112 20 1257 5 2 0 93 March 4, 2026 at 01:13:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2207 108 199 0 16 71 0 9 0 2 0 98 1 0 0 238 66 4 104 0 13 85 0 565 0 1 0 99 2 0 0 0 88 2 86 0 9 91 0 301 0 1 0 99 3 0 0 0 141 70 112 7 9 106 0 1394 0 1 0 99 4 0 0 2 383 152 192 0 9 105 0 0 0 1 0 99 5 0 0 4 292 102 94 0 7 85 0 21 0 1 0 99 6 3 0 35 90 5 107 1 12 61 0 266 0 2 0 98 7 0 0 0 71 0 43 0 3 53 0 0 0 0 0 100 March 4, 2026 at 01:13:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 108 124 0 0 0 0 9 0 1 0 99 1 0 0 7 12 4 8 0 0 0 0 560 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 303 0 0 0 100 3 0 0 0 12 2 36 2 0 2 0 1395 0 0 0 99 4 0 0 5 308 151 102 0 1 2 0 0 0 0 0 100 5 0 0 1 212 101 4 0 0 0 0 0 0 0 0 100 6 0 0 14 15 5 14 0 1 3 0 266 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 108 125 0 1 0 0 9 0 1 0 99 1 0 0 7 15 4 10 1 0 0 0 561 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 302 0 0 0 100 3 0 0 0 11 2 36 1 0 0 0 1393 0 1 0 99 4 0 0 3 305 151 100 0 0 0 0 0 0 0 0 100 5 0 0 3 211 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 13 5 10 0 0 0 0 266 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35342 0 210 2725 111 1081 37 86 180 83 4898 19 17 0 64 1 706 0 15 632 8 855 17 71 63 56 3526 5 3 0 92 2 1189 0 72 630 3 830 15 59 214 44 3643 5 4 0 92 3 980 0 6 475 3 632 8 55 93 24 3725 4 3 0 93 4 12434 0 527 724 120 892 33 51 138 73 6048 12 11 0 77 5 8693 0 37 878 103 1113 52 72 232 74 4276 9 7 0 84 6 1400 0 51 489 9 861 10 80 174 75 3344 4 3 0 93 7 2910 0 55 572 20 895 12 76 215 60 2804 6 3 0 91 March 4, 2026 at 01:13:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 70 2122 104 29 0 2 5 0 31 0 3 0 97 1 0 0 14 107 4 110 0 5 4 0 584 0 2 0 98 2 1 0 0 41 1 23 2 3 0 0 17 3 0 0 97 3 60 0 0 115 42 126 1 4 0 0 1710 0 1 0 99 4 0 0 31 298 121 72 0 2 0 0 13 0 0 0 100 5 5 0 3 231 103 6 0 0 3 0 9 0 0 0 100 6 68 0 14 34 5 16 1 1 2 0 295 0 0 0 100 7 5 0 0 30 1 6 3 1 0 0 29 3 0 0 97 March 4, 2026 at 01:13:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2219 102 115 0 12 113 0 0 0 3 0 97 1 0 0 469 166 4 209 1 17 101 0 560 0 2 0 98 2 0 0 0 120 1 75 0 12 87 0 2 0 1 0 99 3 0 0 0 201 80 153 14 13 104 0 1704 0 2 0 98 4 0 0 2 368 127 118 0 3 61 0 0 0 1 0 99 5 0 0 4 318 101 84 0 10 76 0 0 0 1 0 99 6 2 0 14 179 30 158 0 9 75 0 266 0 1 0 99 7 0 0 0 108 0 64 0 7 59 0 0 0 0 0 100 March 4, 2026 at 01:13:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 6 0 0 0 0 0 0 1 0 99 1 1 0 7 114 4 110 0 0 0 0 561 0 0 0 100 2 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 36 10 63 1 3 1 0 1709 0 1 0 99 4 0 0 5 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 1 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 14 28 12 22 0 1 0 0 266 0 0 0 100 7 0 0 0 92 43 88 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:13:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 94 0 1 0 0 1 0 1 0 99 1 0 0 7 30 5 24 0 0 0 0 562 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 3 0 0 0 40 11 62 3 0 1 0 1707 0 1 0 99 4 0 0 1 209 101 6 0 2 0 0 0 0 0 0 100 5 0 0 5 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 14 13 4 10 0 0 0 0 266 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26595 0 50 2755 103 928 40 85 328 63 3267 14 11 0 75 1 1793 0 90 671 13 1050 56 76 159 50 3629 7 5 0 88 2 1182 0 57 585 1 825 40 70 262 40 2727 7 4 0 90 3 4024 0 36 545 7 652 29 65 118 56 5216 10 5 0 84 4 17722 0 626 731 102 730 42 54 268 65 5562 12 12 0 76 5 22231 0 222 820 101 971 46 54 367 81 5540 18 12 0 71 6 15928 0 38 530 4 928 26 80 213 77 4020 10 10 0 80 7 670 0 11 596 42 938 17 80 125 57 2731 4 2 0 94 March 4, 2026 at 01:13:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 70 2118 104 30 0 0 2 0 22 0 3 0 97 1 0 0 7 126 51 112 1 1 0 0 583 0 0 0 99 2 48 0 0 140 6 125 0 1 0 0 23 0 0 0 99 3 0 0 7 35 5 48 2 1 1 0 1714 0 1 0 99 4 26 0 14 237 110 16 0 2 1 0 27 0 0 0 100 5 2 0 7 230 102 8 1 3 1 0 9 0 0 0 100 6 6 0 14 25 3 12 1 3 0 0 270 0 0 0 100 7 7 0 0 42 6 36 0 1 3 0 10 0 1 0 99 March 4, 2026 at 01:13:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2191 102 157 0 9 76 0 0 0 3 0 97 1 0 0 7 204 54 210 0 5 93 0 562 0 1 0 99 2 0 0 0 160 6 156 1 4 85 0 9 0 1 0 99 3 0 0 0 167 87 157 13 6 102 0 1694 0 1 0 99 4 0 0 2 291 103 92 0 5 66 0 0 0 1 0 99 5 0 0 4 285 102 84 0 6 115 0 5 0 1 0 99 6 2 0 14 98 4 106 0 7 54 0 277 0 0 0 100 7 0 0 238 74 1 130 0 8 67 0 0 0 2 0 98 March 4, 2026 at 01:13:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 224 2107 102 85 0 2 0 0 0 0 2 0 98 1 0 0 7 145 54 108 1 0 0 0 560 0 1 0 99 2 0 0 0 55 8 20 0 0 0 0 20 0 0 0 100 3 0 0 0 80 3 75 1 1 0 0 1714 0 1 0 99 4 0 0 3 240 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 239 101 0 0 0 0 0 0 0 0 0 100 6 0 0 14 41 3 6 0 0 0 0 266 0 0 0 100 7 0 0 0 41 1 4 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:13:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 515 0 31 2394 103 432 11 36 51 29 2647 2 5 0 94 1 1031 0 134 322 43 355 8 37 69 27 1613 2 2 0 96 2 856 0 13 302 20 376 11 35 54 35 969 1 2 0 97 3 2447 0 23 308 4 387 15 35 65 28 2338 6 3 0 92 4 8994 0 377 455 102 500 10 31 66 61 2824 5 11 0 84 5 2429 0 18 442 101 424 8 54 81 58 2290 2 2 0 96 6 338 0 23 239 3 322 10 35 40 33 1460 1 2 0 97 7 407 0 1 270 1 423 12 38 67 20 1329 2 1 0 97 March 4, 2026 at 01:13:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 421 0 23 2455 103 550 20 45 63 21 1784 4 3 0 93 1 508 0 88 358 2 494 21 45 65 15 2201 4 4 0 92 2 189 0 2 387 19 536 28 48 80 15 1585 6 2 0 92 3 884 0 46 335 4 518 23 38 114 5 2817 7 3 0 91 4 37310 0 232 625 137 680 33 31 95 36 4670 18 13 0 68 5 6113 0 110 700 103 747 14 35 168 20 2809 6 4 0 90 6 1095 0 68 376 3 684 26 45 118 33 2420 3 2 0 94 7 520 0 1 333 2 556 6 39 40 38 1635 3 1 0 95 March 4, 2026 at 01:13:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 104 28 0 1 0 0 16 0 2 0 98 1 0 0 14 64 2 12 0 1 3 0 306 0 1 0 98 2 44 0 343 32 7 24 0 2 4 0 15 0 2 0 98 3 0 0 7 66 3 38 2 0 2 0 1372 0 1 0 99 4 0 0 7 366 155 102 0 1 0 0 0 0 1 0 99 5 0 0 7 369 103 109 0 0 0 0 595 0 1 0 99 6 5 0 14 65 3 8 0 1 0 0 268 0 0 0 100 7 0 0 0 59 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 103 187 0 13 66 0 0 0 2 0 98 1 0 0 14 69 3 84 0 16 70 0 301 0 1 0 99 2 0 0 119 59 7 93 0 10 100 0 11 0 1 0 99 3 0 0 7 120 66 116 5 9 77 0 1361 0 1 0 99 4 0 0 3 368 158 168 0 9 86 0 0 0 1 0 99 5 0 0 3 282 103 99 0 7 81 0 595 0 1 0 99 6 0 0 14 68 3 99 0 8 88 0 266 0 1 0 99 7 0 0 0 63 1 77 0 4 77 0 0 0 0 0 100 March 4, 2026 at 01:13:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 114 0 1 0 0 1 0 1 0 99 1 0 0 14 13 3 8 0 0 0 0 301 0 0 0 100 2 0 0 0 21 6 14 0 0 0 0 9 0 0 0 100 3 0 0 7 18 4 42 2 1 1 0 1363 0 0 0 99 4 0 0 4 316 154 106 0 1 0 0 0 0 0 0 100 5 0 0 2 214 103 4 0 0 0 0 595 0 0 0 100 6 0 0 14 13 4 8 0 0 0 0 267 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 529 0 27 2507 115 714 1 62 81 76 2019 2 4 0 94 1 257 0 4 402 7 510 15 61 47 58 1774 2 2 0 96 2 33270 0 21 350 8 402 19 50 40 36 2040 14 11 0 74 3 451 0 11 349 7 486 10 42 38 31 2637 2 3 0 95 4 12167 0 553 540 129 556 18 39 119 75 6835 10 10 0 80 5 10205 0 52 664 110 495 9 57 90 79 3259 9 6 0 85 6 2024 0 211 375 3 613 14 65 80 74 2636 4 4 0 92 7 641 0 12 330 2 545 8 63 82 49 1847 2 2 0 96 March 4, 2026 at 01:13:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 778 0 109 2446 102 531 21 46 38 2 1817 8 5 0 87 1 210 0 2 412 21 577 22 39 35 0 2232 4 3 0 92 2 542 0 35 402 26 636 33 36 61 5 1362 7 2 0 91 3 654 0 25 331 9 531 27 24 59 3 2561 4 2 0 94 4 35 0 44 496 105 552 28 33 45 0 2345 4 2 0 94 5 687 0 46 488 104 472 30 34 123 1 2037 3 2 0 95 6 541 0 42 272 7 401 16 31 105 3 1597 3 2 0 95 7 651 0 21 358 3 495 12 24 51 1 1962 3 2 0 95 March 4, 2026 at 01:13:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2190 106 35 0 3 1 0 18 0 3 0 97 1 0 0 462 33 5 30 0 0 2 0 301 0 1 0 98 2 0 0 0 185 51 110 0 1 0 0 7 0 1 0 99 3 0 0 7 96 9 51 1 0 0 0 1377 0 1 0 99 4 0 0 3 290 107 6 0 0 0 0 302 0 1 0 99 5 0 0 3 285 102 6 1 0 2 0 301 0 0 0 100 6 0 0 0 81 2 4 0 0 0 0 0 0 0 0 100 7 2 0 14 195 3 118 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:13:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 101 187 0 9 90 0 0 0 2 0 98 1 0 0 0 62 4 112 0 11 80 0 294 0 0 0 100 2 0 0 0 149 50 184 0 6 83 0 0 0 0 0 100 3 0 0 7 132 83 176 13 9 113 0 1373 0 1 0 99 4 0 0 4 254 106 82 0 5 65 0 301 0 0 0 100 5 0 0 2 256 103 102 0 9 82 0 322 0 1 0 99 6 0 0 0 46 3 80 0 5 66 0 0 0 0 0 100 7 0 0 14 65 2 100 0 7 64 0 266 0 0 0 100 March 4, 2026 at 01:13:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 0 0 0 0 0 1 0 99 1 0 0 0 16 4 14 1 1 0 0 294 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 2 0 0 0 100 3 0 0 7 24 9 50 1 0 0 0 1373 0 0 0 99 4 0 0 4 214 106 4 0 0 0 0 301 0 0 0 100 5 0 0 2 209 102 2 0 0 0 0 301 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 0 0 14 15 2 12 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:13:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1019 0 24 2893 102 1144 28 90 164 45 3644 5 6 0 89 1 1465 0 89 774 4 1058 37 85 252 43 3893 8 4 0 87 2 1419 0 38 803 10 1202 49 76 151 40 3256 6 5 0 90 3 223 0 11 639 17 828 42 65 62 20 4274 5 4 0 91 4 40577 0 787 776 116 983 73 49 351 89 10447 30 24 0 46 5 10976 0 118 946 117 1039 37 80 307 68 4636 15 9 0 76 6 33642 0 33 632 7 933 52 71 484 69 3284 18 11 0 71 7 963 0 29 610 12 1032 35 76 153 61 3784 5 3 0 92 March 4, 2026 at 01:13:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 77 2113 106 47 0 4 6 0 9 0 2 0 97 1 9 0 0 119 3 110 0 3 5 0 308 0 1 0 99 2 0 0 0 100 40 84 0 1 0 0 23 0 0 0 100 3 7 0 7 30 4 46 1 1 1 0 1383 0 1 0 99 4 50 0 17 237 110 19 1 1 1 0 333 0 0 0 99 5 19 0 3 231 105 8 0 0 0 0 310 0 0 0 100 6 0 0 0 25 2 6 1 2 1 0 10 0 0 0 100 7 30 0 14 37 9 20 0 0 2 0 277 0 0 0 100 March 4, 2026 at 01:13:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2177 103 21 0 1 1 0 7 0 3 0 97 1 0 0 462 137 3 136 0 2 2 0 302 0 1 0 98 2 0 0 0 186 51 114 0 0 1 0 12 0 1 0 99 3 0 0 7 90 4 48 1 1 0 0 1364 0 1 0 98 4 0 0 2 301 112 16 1 1 0 0 310 0 0 0 99 5 0 0 4 284 102 6 0 0 0 0 301 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 0 0 0 0 100 7 2 0 14 79 2 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:13:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 101 84 0 8 79 0 0 0 1 0 99 1 0 0 0 172 3 214 1 8 76 0 294 0 0 0 99 2 0 0 0 150 52 191 0 8 86 0 2 0 0 0 100 3 0 0 7 113 75 125 11 7 103 0 1365 0 2 0 98 4 0 0 4 264 109 103 0 8 89 0 310 0 0 0 99 5 0 0 2 248 103 76 0 4 63 0 306 0 0 0 99 6 0 0 0 51 1 94 0 7 83 0 11 0 0 0 100 7 0 0 14 42 2 82 0 4 77 0 266 0 0 0 100 March 4, 2026 at 01:13:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 16 2128 101 39 0 6 3 3 53 0 2 0 98 1 11 0 0 235 3 155 0 4 3 8 362 0 1 0 99 2 16 0 9 141 51 139 2 5 1 2 62 0 1 0 99 3 5 0 19 51 5 79 0 6 4 7 1422 0 1 0 99 4 3013 0 220 251 112 62 3 3 11 9 504 1 2 0 97 5 72 0 3 287 103 76 1 10 19 16 773 0 1 0 99 6 30 0 0 41 1 23 1 4 20 3 60 0 0 0 100 7 21 0 14 39 2 29 0 6 14 4 321 0 0 0 100 March 4, 2026 at 01:13:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3483 0 84 2557 103 596 18 59 94 51 1945 6 5 0 89 1 591 0 13 496 5 548 13 53 111 46 2175 2 4 0 95 2 622 0 4 458 52 522 4 45 61 29 1318 1 2 0 97 3 2129 0 42 276 5 326 6 37 56 30 2931 4 6 0 90 4 649 0 81 464 103 346 5 36 57 41 2899 2 3 0 95 5 43338 0 507 468 103 499 23 27 98 83 6072 21 17 0 62 6 5120 0 9 361 2 571 19 56 88 57 2232 3 4 0 93 7 591 0 19 318 4 604 8 59 114 67 1667 2 2 0 96 March 4, 2026 at 01:13:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2142 102 14 0 2 2 0 0 0 2 0 98 1 0 0 238 122 3 114 0 1 6 0 293 0 1 0 99 2 0 0 0 149 52 104 0 0 0 0 1 0 0 0 100 3 0 0 21 59 5 49 3 1 0 0 1635 0 1 0 98 4 0 0 3 250 103 2 0 0 0 0 0 0 0 0 100 5 0 0 3 259 104 17 0 3 6 0 318 0 1 0 99 6 0 0 0 51 1 10 0 1 0 0 0 0 0 0 100 7 64 0 0 55 5 10 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:13:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 121 0 1 0 0 5 0 1 0 99 1 0 0 0 20 4 16 0 0 7 0 303 0 0 0 100 2 0 0 0 119 54 120 0 0 0 0 19 0 0 0 100 3 0 0 21 17 7 47 0 0 6 0 2220 0 1 0 99 4 0 0 2 213 105 2 0 0 0 0 1 0 0 0 100 5 0 0 4 211 101 5 0 0 4 0 287 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 17 6 12 0 0 0 0 12 0 0 0 100 March 4, 2026 at 01:13:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 101 181 0 7 68 0 0 0 2 0 98 1 0 0 224 50 3 77 1 6 62 0 294 0 1 0 99 2 0 0 0 141 27 161 0 9 76 0 0 0 1 0 99 3 0 0 21 134 62 132 10 5 84 0 1920 0 1 0 99 4 0 0 4 274 101 72 0 3 82 0 0 0 1 0 99 5 0 0 2 321 125 109 1 4 46 0 301 0 1 0 99 6 0 0 0 75 2 69 0 3 72 0 0 0 0 0 100 7 0 0 0 73 5 62 0 4 43 0 8 0 0 0 100 March 4, 2026 at 01:13:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 63 0 3 0 0 0 0 1 0 99 1 0 0 0 78 3 72 0 3 0 0 294 0 0 0 100 2 0 0 0 11 2 4 0 0 0 0 2 0 0 0 100 3 2 0 21 19 6 44 2 0 1 0 1928 0 1 0 99 4 0 0 2 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 4 311 152 102 0 0 0 0 301 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 19 6 12 0 0 0 0 6 0 0 0 100 March 4, 2026 at 01:13:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2108 102 116 0 0 0 0 6 0 1 0 99 1 0 0 0 14 3 10 0 1 0 0 297 0 0 0 100 2 1 0 0 15 4 10 0 0 0 0 7 0 0 0 100 3 0 0 21 17 6 46 1 0 1 0 1923 0 1 0 99 4 0 0 2 206 101 0 0 0 0 0 0 0 0 0 100 5 0 0 4 309 152 102 0 0 0 0 301 0 0 0 100 6 0 0 0 9 1 4 1 0 0 0 3 0 0 0 100 7 0 0 0 22 8 18 0 0 0 0 17 0 0 0 100 March 4, 2026 at 01:13:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 0 0 1 0 99 1 0 0 0 13 3 8 0 0 0 0 294 0 0 0 100 2 0 0 0 11 2 8 0 1 0 0 2 0 0 0 100 3 0 0 21 17 6 44 2 0 0 0 1915 0 1 0 99 4 0 0 2 206 101 0 0 0 0 0 0 0 0 0 100 5 0 0 4 309 152 102 0 0 0 0 301 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 5 0 0 0 100 7 0 0 0 17 6 12 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:13:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 120 0 0 0 0 5 0 1 0 99 1 0 0 0 16 3 12 1 0 0 0 301 0 0 0 100 2 0 0 0 20 3 18 1 1 0 0 15 0 0 0 100 3 0 0 21 19 6 48 1 1 2 0 1916 0 1 0 99 4 0 0 7 212 104 0 0 0 0 0 0 0 0 0 100 5 0 0 7 313 152 106 0 0 0 0 301 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 19 6 12 1 0 0 0 8 0 0 0 100 March 4, 2026 at 01:13:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 112 0 0 0 0 0 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 12 3 8 0 0 1 0 2 0 0 0 100 3 0 0 21 18 6 46 2 0 0 0 1916 0 1 0 99 4 0 0 2 207 101 2 0 0 1 0 0 0 0 0 100 5 0 0 4 312 152 108 0 0 1 0 301 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 20 7 16 0 0 1 0 6 0 0 0 100 March 4, 2026 at 01:13:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 0 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 21 22 7 48 3 0 1 0 1913 0 1 0 99 4 0 0 2 209 101 4 0 1 0 0 0 0 0 0 100 5 0 0 4 311 152 106 0 1 1 0 301 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 17 6 12 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:13:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 492 0 20 2480 124 770 37 40 113 3 2166 4 4 0 93 1 466 0 24 333 6 514 19 39 48 3 1842 4 2 0 94 2 640 0 0 330 3 545 26 30 34 0 2175 3 2 0 95 3 1052 0 86 315 7 512 24 35 76 4 3583 7 3 0 90 4 22 0 32 514 104 445 13 20 9 1 1439 6 1 0 93 5 958 0 53 429 128 291 12 16 123 3 1336 3 2 0 95 6 150 0 5 241 2 467 19 24 104 1 1231 2 1 0 96 7 392 0 0 187 10 274 9 16 23 2 821 3 1 0 96 March 4, 2026 at 01:13:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 217 0 0 0 0 25 0 1 0 99 1 2 0 0 17 3 8 1 0 0 0 304 0 0 0 100 2 8 0 0 11 1 6 0 1 0 0 24 0 0 0 100 3 4 0 21 19 6 44 2 0 1 0 1934 0 1 0 99 4 19 0 17 216 104 12 0 0 0 0 20 0 0 0 100 5 3 0 3 224 106 22 1 3 0 0 320 0 0 0 100 6 0 0 0 16 3 10 0 1 0 0 18 0 0 0 100 7 7 0 0 13 1 4 0 1 0 0 11 0 0 0 100 March 4, 2026 at 01:13:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 116 0 2 0 0 5 0 1 0 99 1 0 0 0 16 4 14 0 0 0 0 302 0 0 0 100 2 0 0 0 17 4 16 0 0 0 0 15 0 0 0 100 3 0 0 7 22 7 46 1 0 2 0 1674 0 1 0 99 4 0 0 17 214 105 10 1 2 1 0 267 0 0 0 100 5 0 0 3 330 109 125 0 3 1 0 308 0 0 0 99 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:13:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2195 151 272 0 9 39 0 0 0 2 0 98 1 0 0 1 55 3 91 0 11 76 0 294 0 0 0 100 2 0 0 0 62 3 118 0 13 116 0 1 0 0 0 100 3 0 0 7 121 73 149 8 9 106 0 1668 0 1 0 99 4 0 0 18 248 103 86 0 12 94 0 266 0 1 0 99 5 2 0 2 280 110 120 0 9 71 0 336 0 1 0 99 6 0 0 0 48 2 75 0 6 84 0 11 0 0 0 100 7 0 0 0 43 0 77 0 6 61 0 0 0 0 0 100 March 4, 2026 at 01:13:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 384 0 28 2483 136 652 9 55 65 47 1953 2 4 0 95 1 13224 0 10 391 4 542 13 49 49 53 1960 7 5 0 88 2 110 0 8 323 3 368 5 36 36 33 1085 1 1 0 97 3 340 0 19 260 6 302 5 32 32 20 3121 1 2 0 97 4 50 0 79 403 113 212 3 29 37 17 1417 2 1 0 97 5 10068 0 446 471 110 508 18 29 94 80 6356 8 9 0 83 6 5170 0 37 352 6 496 8 49 70 71 1644 5 4 0 91 7 605 0 9 293 4 597 7 60 80 51 1634 2 2 0 96 March 4, 2026 at 01:13:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 464 0 80 2526 101 704 37 56 75 14 2019 4 5 0 91 1 20305 0 7 440 3 546 25 48 24 14 2471 11 10 0 79 2 960 0 0 452 41 565 32 37 54 3 2164 4 2 0 94 3 1162 0 94 349 7 599 50 42 135 6 3341 6 3 0 90 4 398 0 46 561 114 423 19 29 67 6 1721 7 2 0 91 5 4276 0 246 577 104 620 35 36 235 15 2779 6 4 0 90 6 5721 0 36 340 2 419 27 36 55 14 2262 7 4 0 90 7 556 0 32 283 8 387 24 37 81 19 1129 2 1 0 97 March 4, 2026 at 01:13:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2183 106 87 0 1 1 0 10 0 3 0 97 1 0 0 462 25 3 20 0 1 2 0 0 0 1 0 99 2 0 0 0 210 53 134 0 2 0 0 296 0 1 0 99 3 0 0 7 90 5 42 2 0 0 0 1665 0 1 0 99 4 3 0 16 282 104 4 0 0 0 0 266 0 1 0 99 5 0 0 4 289 102 10 0 0 0 0 301 0 0 0 100 6 0 0 0 83 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 84 2 8 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:13:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 122 0 4 0 0 14 0 1 0 99 1 0 0 0 15 3 12 1 0 0 0 7 0 0 0 100 2 0 0 0 124 54 120 0 1 0 0 310 0 0 0 100 3 0 0 7 19 5 42 2 0 0 0 1664 0 1 0 99 4 0 0 16 214 107 2 1 0 0 0 266 0 0 0 100 5 0 0 4 220 102 14 0 0 2 0 301 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 107 184 0 12 61 0 9 0 2 0 98 1 0 0 0 68 3 102 0 10 73 0 0 0 0 0 100 2 0 0 0 107 28 144 0 9 76 0 296 0 0 0 99 3 0 0 7 138 86 148 6 9 95 0 1664 0 1 0 98 4 0 0 18 273 118 100 0 6 69 0 266 0 1 0 99 5 0 0 2 248 102 76 1 6 89 0 301 0 1 0 99 6 0 0 0 52 1 99 0 6 86 0 0 0 0 0 100 7 0 0 0 56 2 260 1 8 77 0 331 0 0 0 100 March 4, 2026 at 01:13:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3138 0 42 2727 108 1062 28 79 95 77 3202 6 6 0 88 1 3264 0 34 659 21 928 23 79 67 63 3080 7 4 0 88 2 33857 0 13 512 9 636 21 64 65 39 3105 16 12 0 73 3 317 0 13 408 6 564 16 55 36 45 3399 2 3 0 95 4 466 0 90 585 110 569 7 46 58 26 1982 3 3 0 93 5 7021 0 314 564 118 563 7 40 94 54 4244 6 7 0 87 6 8943 0 316 448 5 819 12 55 125 76 5329 9 8 0 83 7 2998 0 16 482 5 860 11 70 86 78 3193 4 3 0 93 March 4, 2026 at 01:13:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 560 0 122 2237 101 181 8 18 78 1 749 5 3 0 92 1 671 0 25 207 4 217 3 21 49 5 596 2 1 0 97 2 510 0 5 220 6 277 8 17 49 4 1016 5 1 0 94 3 315 0 19 159 7 239 12 12 14 0 2456 2 2 0 96 4 490 0 96 330 109 181 8 12 33 0 707 2 1 0 97 5 522 0 30 335 106 211 8 16 71 2 1135 2 1 0 97 6 186 0 9 101 1 89 1 9 9 3 528 2 1 0 97 7 630 0 0 207 50 196 2 10 32 0 535 2 1 0 98 March 4, 2026 at 01:14:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2171 100 76 0 4 2 0 0 0 3 0 97 1 0 0 457 54 3 48 0 2 3 0 0 0 1 0 99 2 0 0 0 103 8 24 0 2 2 0 304 0 1 0 99 3 0 0 7 94 5 50 1 3 1 0 1665 0 1 0 99 4 3 0 16 289 111 8 0 1 1 0 266 0 1 0 99 5 0 0 1 280 102 2 0 0 0 0 301 0 0 0 100 6 0 0 0 76 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 180 52 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 1 0 0 5 0 1 0 99 1 0 0 0 18 4 17 0 0 0 0 8 0 0 0 100 2 0 0 0 34 10 34 0 1 1 0 321 0 0 0 100 3 0 0 7 28 6 50 2 0 0 0 1664 0 1 0 99 4 0 0 17 224 111 10 1 0 0 0 267 0 0 0 100 5 0 0 3 216 102 14 0 2 2 0 301 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 111 53 106 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:14:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 124 210 0 11 82 0 0 0 2 0 98 1 0 0 0 90 3 144 0 13 75 0 0 0 0 0 100 2 0 0 0 55 8 74 0 5 74 0 304 0 0 0 99 3 0 0 7 107 72 106 6 5 73 0 1661 0 1 0 99 4 0 0 17 262 106 118 0 12 94 0 266 0 1 0 99 5 0 0 3 246 102 76 0 5 45 0 301 0 0 0 100 6 0 0 0 43 1 74 0 6 83 0 0 0 0 0 100 7 0 0 0 90 28 117 0 4 72 0 0 0 0 0 100 March 4, 2026 at 01:14:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3750 0 97 2844 125 1112 49 99 169 86 3343 8 6 0 86 1 1631 0 71 660 5 1062 32 91 180 62 2807 5 4 0 91 2 572 0 43 615 7 907 24 70 105 48 3556 4 3 0 93 3 2489 0 22 644 6 916 32 56 116 48 4331 5 4 0 90 4 2164 0 331 718 106 807 23 54 113 53 3940 11 5 0 84 5 308 0 8 751 119 711 18 67 85 28 2794 9 3 0 88 6 45326 0 452 506 2 890 51 67 163 97 8244 24 20 0 56 7 7227 0 48 570 4 822 30 76 165 69 4002 8 5 0 87 March 4, 2026 at 01:14:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 70 2118 109 31 0 5 4 0 11 0 3 0 97 1 22 0 0 140 9 118 0 3 0 0 21 0 0 0 100 2 0 0 0 38 3 20 1 3 0 0 298 0 0 0 100 3 0 0 14 40 5 58 2 5 1 0 1680 0 1 0 99 4 49 0 30 235 109 18 0 0 0 0 295 0 0 0 99 5 24 0 4 301 140 82 1 1 0 0 310 0 0 0 100 6 9 0 0 25 1 6 0 0 0 0 18 0 0 0 100 7 4 0 0 28 1 16 0 3 3 0 14 0 1 0 99 March 4, 2026 at 01:14:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2173 101 107 0 2 1 0 0 0 3 0 97 1 0 0 462 25 3 20 0 1 2 0 0 0 1 0 99 2 0 0 0 85 2 8 0 0 0 0 296 0 1 0 99 3 0 0 7 99 5 52 1 0 0 0 1663 0 1 0 99 4 3 0 17 296 111 16 2 0 0 0 363 1 1 0 98 5 0 0 3 382 152 104 0 1 0 0 301 0 1 0 99 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 79 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 110 0 0 0 0 5 0 1 0 99 1 0 0 0 14 3 12 0 0 0 0 7 0 0 0 100 2 0 0 0 19 3 18 0 0 0 0 307 0 0 0 100 3 2 0 7 26 5 52 1 0 2 0 1663 0 0 0 99 4 0 0 17 226 112 18 0 1 3 0 275 0 0 0 100 5 0 0 3 313 152 108 0 1 0 0 301 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 320 0 24 2371 105 436 3 45 129 40 692 1 3 0 97 1 291 0 0 262 3 445 2 40 127 31 708 1 1 0 98 2 82 0 6 228 2 322 2 31 68 28 844 1 1 0 98 3 397 0 16 287 74 343 11 31 106 21 2119 1 3 0 96 4 229 0 20 412 113 295 4 23 110 15 1129 3 1 0 96 5 195 0 10 456 147 339 0 24 104 10 692 0 1 0 98 6 6358 0 314 164 1 311 6 24 105 46 2783 2 5 0 92 7 4918 0 21 224 2 249 4 26 105 23 842 4 2 0 94 March 4, 2026 at 01:14:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2155 151 203 0 4 1 0 0 0 2 0 98 1 0 0 0 24 3 16 0 1 2 0 0 0 0 0 100 2 0 0 0 17 1 4 1 0 0 0 294 0 0 0 100 3 0 0 7 29 6 49 1 2 1 0 1676 0 0 0 99 4 0 0 20 215 104 4 0 0 0 0 266 0 0 0 100 5 0 0 1 225 102 10 0 0 0 0 301 0 0 0 100 6 0 0 7 12 0 2 0 1 0 0 0 0 0 0 100 7 64 0 0 24 6 10 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:14:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 231 2151 144 203 0 3 0 0 0 0 2 0 98 1 0 0 0 65 11 28 0 2 1 0 1 0 0 0 100 2 0 0 0 46 3 8 0 1 0 0 297 0 0 0 100 3 0 0 7 52 5 44 1 0 1 0 1659 0 1 0 99 4 0 0 16 242 104 4 1 0 0 0 266 0 0 0 100 5 0 0 4 244 103 4 0 0 0 0 302 0 0 0 100 6 0 0 0 42 0 4 0 2 1 0 0 0 0 0 100 7 0 0 0 54 7 16 0 1 0 0 9 0 0 0 100 March 4, 2026 at 01:14:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2108 101 76 0 1 0 0 0 0 1 0 99 1 0 0 0 155 53 148 0 3 0 0 0 0 0 0 100 2 0 0 0 14 1 6 0 1 1 0 294 0 0 0 100 3 0 0 7 23 5 44 3 1 1 0 1658 0 1 0 99 4 0 0 19 212 104 4 0 0 0 0 266 0 0 0 100 5 0 0 1 212 102 2 0 0 0 0 301 0 0 0 100 6 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 20 6 12 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:14:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 18 0 0 0 0 5 0 1 0 99 1 0 0 0 173 45 170 0 0 0 0 8 0 0 0 100 2 0 0 0 63 12 66 0 3 1 0 312 0 0 0 100 3 0 0 7 20 6 46 1 0 3 0 1661 0 0 0 99 4 0 0 17 216 108 6 0 0 0 0 267 0 0 0 100 5 0 0 3 212 102 7 0 1 1 0 301 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 19 7 14 0 0 0 0 6 0 0 0 100 March 4, 2026 at 01:14:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 14 0 1 0 0 3 0 1 0 99 1 0 0 0 17 4 14 0 1 1 0 3 0 0 0 100 2 0 0 0 199 51 193 0 2 0 0 295 0 0 0 100 3 0 0 7 32 5 58 1 2 0 0 1662 0 1 0 99 4 0 0 16 210 103 6 0 0 0 0 269 0 0 0 100 5 0 0 4 214 103 10 0 0 3 0 322 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 26 9 22 0 0 3 0 17 0 0 0 100 March 4, 2026 at 01:14:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 86 0 2 0 0 14 0 1 0 99 1 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 2 0 0 0 146 53 138 1 0 0 0 297 0 0 0 100 3 0 0 7 21 5 46 2 1 1 0 1658 0 1 0 99 4 0 0 16 215 104 14 1 1 1 0 271 0 0 0 100 5 0 0 4 209 102 2 0 0 0 0 301 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 3 0 0 19 7 14 0 0 1 0 15 0 0 0 100 March 4, 2026 at 01:14:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 112 0 0 0 0 5 0 1 0 99 1 0 0 1 15 3 10 0 0 0 0 0 0 0 0 100 2 20 0 0 113 53 108 0 0 0 0 300 0 0 0 100 3 0 0 7 18 5 44 1 0 1 0 1646 0 0 0 99 4 0 0 17 209 104 4 0 0 0 0 266 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 301 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 19 6 14 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:14:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 110 0 0 0 0 0 0 1 0 99 1 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 296 0 0 0 100 3 0 0 7 20 5 44 3 0 3 0 1646 0 1 0 99 4 0 0 15 210 103 6 0 1 0 0 266 0 0 0 100 5 0 0 5 211 102 2 1 0 0 0 301 0 0 0 100 6 0 0 0 9 0 8 0 1 0 0 0 0 0 0 100 7 0 0 0 18 6 12 1 0 0 0 5 0 0 0 100 March 4, 2026 at 01:14:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 124 1 0 0 0 17 0 1 0 99 1 0 0 0 16 3 14 0 1 0 0 7 0 0 0 100 2 0 0 0 113 53 110 0 0 0 0 299 0 0 0 100 3 0 0 7 17 5 44 0 1 1 0 1646 0 1 0 99 4 0 0 18 212 105 4 0 0 0 0 266 0 0 0 100 5 0 0 2 212 102 6 0 0 0 0 301 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 23 7 22 0 1 0 0 9 0 0 0 100 March 4, 2026 at 01:14:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 210 0 11 2229 103 299 12 13 6 6 551 1 2 0 97 1 92 0 0 152 4 165 8 18 6 3 699 1 1 0 99 2 115 0 8 201 53 215 10 10 1 4 1524 1 1 0 98 3 141 0 7 114 7 183 8 19 4 2 2359 1 2 0 97 4 118 0 74 268 103 144 13 12 6 2 937 2 1 0 98 5 22 0 2 283 104 108 3 7 4 3 1459 1 1 0 98 6 175 0 0 66 0 115 1 9 2 7 448 1 0 0 99 7 101 0 2 122 9 189 5 11 3 5 865 1 0 0 98 March 4, 2026 at 01:14:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 848 0 49 2711 102 737 30 63 104 32 2267 5 4 0 91 1 1565 0 8 557 3 679 30 65 63 18 2490 7 3 0 90 2 1143 0 35 468 1 742 37 62 103 31 2222 4 3 0 94 3 33854 0 98 542 12 889 67 56 118 19 3892 17 13 0 70 4 264 0 46 696 122 688 42 53 26 27 4678 8 3 0 89 5 95 0 4 661 102 727 26 52 129 17 2505 4 3 0 94 6 7381 0 355 361 5 561 28 41 214 41 3150 11 6 0 83 7 5054 0 37 524 26 871 27 55 189 35 2848 5 4 0 90 March 4, 2026 at 01:14:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2110 101 71 0 2 0 0 0 0 2 0 98 1 6 0 0 37 3 26 0 3 1 0 19 0 0 0 100 2 0 0 0 46 1 37 1 3 1 0 15 0 0 0 100 3 7 0 7 26 5 18 0 2 5 0 870 0 1 0 99 4 3 0 30 224 104 46 1 1 1 0 1404 0 1 0 99 5 10 0 4 225 104 19 0 2 1 0 319 0 0 0 99 6 78 0 0 30 7 20 1 1 0 0 25 0 0 0 100 7 0 0 0 121 52 113 0 5 0 0 25 0 0 0 100 March 4, 2026 at 01:14:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 101 58 0 2 0 0 0 0 1 0 99 1 0 0 120 16 2 12 0 3 1 0 0 0 1 0 99 2 0 0 0 26 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 82 5 60 1 3 0 0 855 0 1 0 99 4 0 0 16 240 109 42 1 1 3 0 1371 0 1 0 99 5 0 0 4 232 103 8 0 2 0 0 301 0 0 0 100 6 0 0 0 32 5 10 0 0 0 0 8 0 0 0 100 7 0 0 0 125 51 102 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2114 103 79 0 4 0 0 17 0 2 0 98 1 0 0 0 37 3 16 0 0 1 0 8 0 0 0 100 2 0 0 0 35 1 14 0 1 0 0 7 0 0 0 100 3 0 0 7 81 6 58 0 2 0 0 856 0 0 0 99 4 0 0 15 242 112 40 3 0 1 0 1373 0 1 0 99 5 0 0 5 238 102 14 0 0 0 0 301 0 0 0 100 6 0 0 0 37 7 14 0 0 0 0 10 0 0 0 100 7 0 0 0 127 52 104 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:14:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 576 0 23 2504 105 760 8 79 169 68 1753 2 4 0 94 1 538 0 25 407 3 705 5 65 118 40 1669 2 3 0 95 2 343 0 27 345 4 460 4 54 114 40 1129 1 2 0 97 3 315 0 14 359 83 391 22 44 136 29 1864 1 2 0 97 4 27 0 97 465 109 358 6 29 129 16 2376 1 3 0 96 5 71 0 7 466 103 315 4 30 87 17 1790 1 2 0 97 6 43127 0 446 331 9 588 27 36 181 69 6589 20 17 0 64 7 5099 0 27 456 33 643 13 61 223 70 2399 8 4 0 89 March 4, 2026 at 01:14:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 917 0 73 2478 105 628 13 41 61 26 1490 3 4 0 92 1 532 0 33 402 3 590 10 44 95 21 1829 4 3 0 93 2 645 0 2 391 3 586 31 32 104 11 1900 4 2 0 94 3 612 0 27 290 12 430 12 33 131 10 2687 3 2 0 95 4 762 0 98 541 109 586 13 27 68 3 2690 6 3 0 91 5 257 0 24 420 106 270 10 22 17 3 1426 6 2 0 93 6 4270 0 180 297 37 410 7 11 82 17 1719 6 6 0 89 7 5979 0 77 226 2 203 5 13 116 15 1700 6 3 0 91 March 4, 2026 at 01:14:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2175 103 9 1 2 1 0 26 0 3 0 97 1 0 0 462 22 1 16 0 1 2 0 0 0 1 0 99 2 0 0 0 89 2 10 0 1 0 0 1 0 0 0 100 3 0 0 7 162 4 86 2 2 0 0 859 0 1 0 99 4 44 0 4 333 112 90 1 4 0 0 1107 0 1 0 99 5 4 0 16 291 103 12 1 0 0 0 570 0 0 0 99 6 0 0 0 177 50 100 0 0 0 0 0 0 0 0 100 7 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 6 0 0 0 0 1 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 3 0 0 7 15 4 12 0 1 0 0 855 0 0 0 100 4 0 0 4 290 110 112 1 0 2 0 1108 0 1 0 99 5 0 0 16 254 103 50 1 1 0 0 566 0 0 0 100 6 0 0 0 109 50 108 0 1 1 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 104 16 0 0 0 0 13 0 1 0 99 1 0 0 0 10 1 8 0 0 0 0 7 0 0 0 100 2 0 0 0 15 1 12 0 0 0 0 5 0 0 0 100 3 0 0 7 15 4 12 0 0 0 0 855 0 0 0 100 4 0 0 3 237 118 52 1 1 0 0 1109 0 1 0 99 5 0 0 17 319 103 114 0 1 0 0 568 0 0 0 100 6 0 0 0 107 50 102 0 1 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1478 0 47 2958 107 1106 28 100 224 63 3310 5 6 0 88 1 704 0 15 875 2 1256 26 95 188 58 3174 4 4 0 92 2 1284 0 10 734 4 952 27 70 159 49 3593 4 4 0 92 3 453 0 41 754 73 993 37 72 204 39 3208 4 3 0 93 4 949 0 121 896 138 1248 39 55 175 39 4667 5 5 0 89 5 40011 0 347 669 104 659 39 46 95 46 6015 21 17 0 62 6 11995 0 353 647 20 1151 45 66 219 85 5585 13 11 0 76 7 5752 0 56 705 4 1317 34 92 278 79 4156 11 6 0 82 March 4, 2026 at 01:14:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 225 0 103 2137 105 81 4 6 59 0 67 0 3 0 97 1 315 0 11 119 4 101 1 7 21 1 111 1 2 0 98 2 189 0 20 36 1 12 0 4 8 0 75 1 0 0 99 3 348 0 24 53 4 41 5 8 18 1 452 5 0 0 95 4 7 0 31 258 112 60 3 5 1 0 1485 3 1 0 96 5 5 0 24 341 150 105 1 3 0 0 284 1 0 0 98 6 5 0 0 52 0 96 1 7 0 0 520 1 0 0 99 7 0 0 0 38 2 8 0 2 0 0 376 1 0 0 99 March 4, 2026 at 01:14:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2175 103 97 0 3 2 0 1 0 3 0 97 1 0 0 0 150 34 76 0 1 1 0 11 0 1 0 99 2 0 0 0 100 10 24 0 1 0 0 2 0 0 0 100 3 2 0 7 106 3 30 0 1 0 0 263 0 0 0 100 4 0 0 3 292 108 40 2 0 1 0 1405 0 1 0 99 5 2 0 479 252 118 44 1 2 4 0 266 0 2 0 98 6 0 0 0 80 1 4 0 1 0 0 301 0 0 0 100 7 0 0 0 79 1 2 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:14:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 112 0 0 0 0 0 0 1 0 99 1 0 0 0 23 7 18 0 1 3 0 9 0 0 0 100 2 0 0 0 110 51 106 0 1 1 0 0 0 0 0 100 3 0 0 7 14 2 10 1 2 0 0 260 0 0 0 100 4 0 0 2 217 107 40 0 0 0 0 1405 0 1 0 99 5 0 0 18 207 102 2 0 0 0 0 266 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:14:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 130 0 1 0 0 16 0 1 0 99 1 0 0 0 24 8 22 0 0 0 0 17 0 0 0 100 2 0 0 0 116 52 110 0 0 0 0 7 0 0 0 100 3 0 0 7 15 3 12 0 0 0 0 261 0 0 0 100 4 0 0 2 229 111 50 1 1 2 0 1406 0 1 0 99 5 0 0 18 210 102 6 0 1 0 0 266 0 0 0 100 6 0 0 0 8 1 2 1 0 0 0 301 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 302 0 0 0 100 March 4, 2026 at 01:14:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2434 0 42 2951 106 1337 38 117 197 63 3702 9 7 0 84 1 1503 0 65 668 8 851 21 93 183 48 4196 11 5 0 84 2 1441 0 112 628 9 877 28 93 242 40 3254 5 6 0 88 3 605 0 19 694 86 895 23 74 180 37 2351 5 3 0 92 4 1667 0 131 800 118 944 29 76 287 32 3634 9 4 0 87 5 47166 0 636 796 113 1083 79 73 147 87 8545 25 23 0 52 6 8356 0 77 671 2 1083 31 93 245 77 4702 9 8 0 83 7 809 0 17 605 1 1004 27 98 257 80 3365 6 3 0 91 March 4, 2026 at 01:14:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 63 0 70 2123 107 27 0 2 4 0 21 0 3 0 97 1 0 0 0 33 2 22 0 2 5 0 22 0 1 0 99 2 11 0 0 28 3 10 0 2 0 0 7 0 0 0 100 3 0 0 7 28 3 12 0 2 0 0 284 0 0 0 100 4 0 0 17 230 105 44 1 1 4 0 1417 0 1 0 99 5 24 0 3 330 152 114 0 1 3 0 9 0 0 0 100 6 6 0 14 122 2 106 1 1 1 0 580 0 0 0 100 7 21 0 7 32 3 18 1 2 0 0 315 0 0 0 100 March 4, 2026 at 01:14:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 106 25 0 2 1 0 8 0 2 0 98 1 0 0 14 16 2 12 0 1 2 0 0 0 0 0 100 2 0 0 0 17 2 8 0 1 0 0 1 0 0 0 100 3 0 0 7 17 2 8 1 0 0 0 260 0 0 0 100 4 0 0 2 220 105 38 2 0 0 0 1399 0 1 0 99 5 0 0 4 316 152 104 0 0 0 0 0 0 0 0 100 6 2 0 14 111 2 105 0 1 0 0 569 0 0 0 100 7 0 0 0 16 1 6 0 1 0 0 301 0 0 0 100 March 4, 2026 at 01:14:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 107 18 0 0 0 0 9 0 2 0 98 1 0 0 448 12 2 10 0 1 1 0 0 0 1 0 99 2 0 0 0 75 2 6 0 0 0 0 2 0 0 0 100 3 0 0 7 75 2 8 0 0 0 0 260 0 0 0 100 4 0 0 3 280 107 36 0 0 0 0 1400 0 1 0 99 5 0 0 3 379 152 111 0 3 0 0 0 0 0 0 100 6 0 0 14 171 2 104 0 0 0 0 567 0 0 0 100 7 0 0 0 71 1 2 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:14:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 319 0 38 2329 116 372 6 33 42 30 1178 2 3 0 96 1 470 0 4 230 5 336 0 30 37 27 798 1 1 0 98 2 231 0 4 222 2 213 3 26 43 17 1070 1 1 0 98 3 75 0 8 203 2 201 3 21 14 15 731 0 1 0 98 4 90 0 17 327 107 152 2 13 13 10 1950 1 2 0 98 5 7062 0 337 470 145 367 12 16 55 37 3562 5 7 0 88 6 4990 0 56 241 2 321 6 29 54 44 1680 7 3 0 90 7 310 0 7 250 1 365 3 40 45 41 965 1 1 0 98 March 4, 2026 at 01:14:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1415 0 85 2719 104 935 44 93 217 44 2856 9 6 0 85 1 689 0 46 619 21 1006 37 98 253 31 2532 4 4 0 93 2 438 0 14 553 12 799 39 68 127 25 2246 5 3 0 93 3 814 0 75 602 90 913 56 74 228 21 3431 9 4 0 87 4 33427 0 82 587 107 534 32 48 168 14 4836 18 14 0 68 5 3557 0 195 649 120 844 18 71 237 32 2916 5 6 0 89 6 4484 0 237 427 5 692 30 67 228 36 3847 8 6 0 85 7 5706 0 20 523 3 727 27 50 170 38 2674 10 4 0 86 March 4, 2026 at 01:14:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 7 2155 100 68 0 3 2 0 9 0 2 0 98 1 74 0 343 52 10 51 1 4 3 0 21 0 1 0 98 2 0 0 0 199 53 143 0 3 0 0 317 0 1 0 99 3 6 0 7 69 3 16 1 2 0 0 280 0 1 0 99 4 0 0 15 267 104 42 1 1 3 0 1424 0 1 0 99 5 3 0 6 269 102 8 1 1 0 0 4 0 0 0 100 6 22 0 14 59 1 4 1 0 0 0 276 0 0 0 100 7 4 0 0 61 1 6 0 0 0 0 305 0 0 0 100 March 4, 2026 at 01:14:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 140 2106 100 83 0 3 0 0 0 0 2 0 98 1 0 0 0 72 10 44 0 0 1 0 10 0 0 0 100 2 0 0 0 140 54 114 0 0 0 0 303 0 0 0 100 3 0 0 7 36 3 14 0 1 1 0 261 0 1 0 99 4 0 0 4 235 104 40 1 1 2 0 1402 0 1 0 99 5 0 0 2 229 102 2 0 0 0 0 0 0 0 0 100 6 0 0 14 25 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 28 1 2 1 0 0 0 301 0 0 0 100 March 4, 2026 at 01:14:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2102 100 104 0 0 0 0 0 0 1 0 99 1 0 0 0 25 9 18 0 0 0 0 9 0 0 0 100 2 0 0 0 119 52 112 0 0 0 0 301 0 0 0 100 3 0 0 7 15 3 10 0 0 0 0 260 0 0 0 100 4 0 0 1 219 105 38 2 0 1 0 1402 0 1 0 99 5 0 0 5 215 102 10 0 1 0 0 0 0 0 0 100 6 0 0 14 7 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:14:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 269 0 32 2458 103 646 7 59 81 48 1893 2 4 0 94 1 185 0 11 328 13 400 3 43 67 41 1649 2 2 0 97 2 245 0 15 395 36 534 5 49 36 45 1804 1 2 0 96 3 3007 0 34 345 7 459 18 44 57 39 1775 5 2 0 93 4 507 0 69 505 124 424 9 39 42 31 2593 2 2 0 96 5 438 0 9 456 102 363 14 29 27 23 1333 2 2 0 96 6 6910 0 328 219 1 351 12 25 87 46 4475 6 6 0 88 7 27235 0 131 290 3 526 17 44 96 73 4607 13 9 0 78 March 4, 2026 at 01:14:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6274 0 116 2583 103 625 18 55 204 10 3114 8 8 0 85 1 843 0 7 479 2 709 21 59 190 20 2039 4 4 0 92 2 690 0 22 458 4 747 23 59 175 14 2191 4 3 0 93 3 715 0 49 493 93 712 42 48 201 13 2231 4 3 0 94 4 512 0 72 654 114 768 23 51 190 7 3657 7 3 0 89 5 960 0 66 591 126 567 28 40 205 7 1614 4 2 0 94 6 99 0 14 412 2 728 21 37 102 3 1959 3 2 0 95 7 15053 0 205 353 7 550 23 34 137 13 2489 14 10 0 77 March 4, 2026 at 01:14:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2177 101 55 0 4 1 0 301 0 3 0 97 1 0 0 462 89 2 82 0 2 2 0 0 0 1 0 99 2 0 0 0 88 4 10 0 1 0 0 303 0 0 0 99 3 0 0 7 85 3 10 0 0 0 0 263 0 0 0 99 4 0 0 2 288 104 38 2 0 1 0 1397 0 1 0 99 5 0 0 4 384 152 104 0 1 0 0 0 0 1 0 99 6 48 0 14 93 8 16 0 1 0 0 277 0 0 0 100 7 0 0 0 78 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:14:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 34 1 1 0 0 301 0 1 0 99 1 0 0 0 87 2 80 0 0 0 0 0 0 0 0 100 2 0 0 0 17 4 12 0 0 0 0 302 0 0 0 100 3 0 0 7 14 3 10 1 0 0 0 260 0 0 0 100 4 0 0 4 216 105 38 2 0 2 0 1395 0 1 0 99 5 0 0 2 309 152 102 0 0 0 0 0 0 0 0 100 6 0 0 14 15 6 12 0 0 0 0 274 0 0 0 100 7 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:14:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 26 0 1 0 0 302 0 1 0 99 1 0 0 0 17 2 10 0 1 0 0 0 0 0 0 100 2 0 0 0 16 4 12 0 1 0 0 303 0 0 0 100 3 0 0 7 14 3 12 0 1 0 0 260 0 0 0 100 4 0 0 3 213 104 36 1 0 0 0 1397 0 1 0 99 5 0 0 3 309 152 102 0 0 0 0 0 0 0 0 100 6 0 0 14 100 7 98 2 2 0 0 275 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10026 0 54 2730 105 658 21 59 105 53 3490 13 10 0 77 1 1115 0 24 511 4 762 11 70 65 70 2509 3 3 0 94 2 1872 0 131 502 5 833 15 70 87 89 4723 4 5 0 91 3 33906 0 29 488 3 769 18 58 71 49 4061 18 15 0 67 4 213 0 82 651 110 609 25 54 38 45 2340 4 3 0 94 5 128 0 20 629 143 614 1 51 32 38 2158 3 2 0 95 6 328 0 23 422 11 689 11 58 50 33 3136 3 3 0 95 7 12362 0 509 318 1 537 22 46 82 59 4449 11 10 0 79 March 4, 2026 at 01:14:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 664 0 50 2382 103 422 13 39 182 2 1030 6 3 0 91 1 59 0 70 296 4 416 14 27 99 0 1211 3 3 0 95 2 516 0 11 284 6 382 7 26 119 4 1234 3 2 0 95 3 180 0 7 280 76 282 12 26 101 1 1273 3 2 0 96 4 707 0 95 526 154 477 20 28 183 5 1021 2 2 0 95 5 897 0 40 434 106 353 12 20 89 0 1459 8 2 0 90 6 111 0 28 253 2 474 19 26 104 0 2278 2 2 0 96 7 496 0 23 185 0 273 3 26 169 1 903 2 1 0 96 March 4, 2026 at 01:14:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 100 72 0 1 0 0 0 0 2 0 98 1 0 0 42 79 3 8 0 1 2 0 301 0 2 0 98 2 0 0 462 69 8 56 0 0 2 0 309 0 1 0 99 3 1 0 7 86 4 8 0 0 0 0 261 0 0 0 100 4 0 0 4 387 156 106 0 1 0 0 0 0 1 0 99 5 0 0 2 287 103 6 1 1 1 0 294 0 0 0 99 6 2 0 14 83 2 38 1 1 3 0 1364 0 1 0 99 7 0 0 0 81 0 6 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:14:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 124 0 2 0 0 0 0 1 0 99 1 0 0 0 14 4 8 1 0 0 0 302 0 0 0 100 2 0 0 0 28 10 24 0 2 0 0 312 0 0 0 100 3 0 0 7 12 3 8 1 1 0 0 260 0 0 0 100 4 0 0 2 318 157 110 0 1 0 0 0 0 0 0 100 5 0 0 4 212 103 6 0 1 0 0 294 0 0 0 100 6 0 0 14 12 3 36 3 0 1 0 1364 0 1 0 99 7 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:14:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 112 0 0 0 0 1 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 2 0 0 0 27 10 22 0 0 0 0 311 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 3 313 154 106 0 0 0 0 0 0 0 0 100 5 0 0 3 213 104 6 0 0 0 0 294 0 0 0 100 6 0 0 14 7 2 34 0 0 0 0 1363 0 0 0 99 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43617 0 72 2939 104 1177 53 115 162 86 5012 27 20 0 53 1 1440 0 25 805 3 1421 62 117 254 98 4492 10 5 0 86 2 1499 0 54 765 8 1310 40 120 255 63 4232 12 5 0 84 3 1119 0 60 710 5 929 20 88 166 61 3523 5 4 0 91 4 679 0 132 858 121 915 49 75 160 36 3218 4 4 0 92 5 594 0 20 716 109 585 20 53 130 33 2150 4 2 0 93 6 1032 0 29 490 32 712 25 59 139 22 3461 5 4 0 92 7 13837 0 650 421 1 760 32 48 219 89 8402 14 13 0 73 March 4, 2026 at 01:14:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2166 102 156 0 12 87 0 34 0 3 0 97 1 45 0 7 96 6 130 0 11 80 0 316 0 2 0 98 2 23 0 0 81 5 105 0 8 74 0 323 0 0 0 99 3 0 0 7 166 73 164 11 12 108 0 276 0 1 0 99 4 13 0 31 285 108 110 0 10 99 0 28 0 1 0 99 5 0 0 3 273 104 90 1 9 98 0 313 0 1 0 99 6 30 0 14 163 52 208 2 6 74 0 1388 0 1 0 99 7 9 0 0 58 1 78 0 7 71 0 9 0 0 0 100 March 4, 2026 at 01:14:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2170 100 25 0 1 1 0 0 0 3 0 97 1 0 0 462 47 8 42 0 1 2 0 310 0 1 0 98 2 0 0 0 91 5 16 0 1 0 0 312 0 1 0 99 3 0 0 7 82 2 8 0 0 0 0 278 0 0 0 100 4 0 0 3 291 109 8 0 1 0 0 0 0 0 0 100 5 0 0 3 285 104 6 0 0 0 0 294 0 0 0 100 6 2 0 14 126 25 78 2 0 0 0 1369 0 1 0 99 7 0 0 0 208 27 134 0 3 0 0 0 0 0 0 100 March 4, 2026 at 01:14:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 73 0 3 0 0 1 0 1 0 99 1 0 0 0 30 8 25 0 2 0 0 310 0 0 0 100 2 0 0 0 16 4 10 0 1 0 0 302 0 0 0 100 3 2 0 7 9 2 4 1 0 0 0 260 0 0 0 100 4 0 0 2 221 108 8 0 1 0 0 0 0 0 0 100 5 0 0 4 215 104 10 0 1 1 0 294 0 0 0 100 6 0 0 14 8 2 34 1 0 1 0 1367 0 1 0 99 7 0 0 0 140 50 132 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 72 0 9 2157 101 161 2 19 32 12 305 0 2 0 97 1 43 0 18 112 12 121 3 13 21 9 519 0 1 0 99 2 11 0 7 56 4 52 0 6 6 9 93 0 0 0 99 3 23 0 10 58 2 65 4 8 4 6 380 0 0 0 100 4 22 0 3 257 108 30 1 6 6 1 334 0 0 0 99 5 9 0 9 245 104 26 0 3 6 2 365 0 0 0 100 6 21 0 14 38 2 51 1 2 8 4 1411 0 1 0 99 7 3221 0 116 146 49 173 3 6 11 16 700 1 2 0 97 March 4, 2026 at 01:14:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9895 0 31 3007 120 1332 35 96 96 60 5206 14 9 0 77 1 1425 0 104 867 24 1427 46 109 184 77 4086 7 7 0 86 2 1638 0 16 688 5 1137 39 86 126 65 3857 10 5 0 85 3 1202 0 73 615 4 886 16 85 141 51 3745 5 4 0 91 4 887 0 97 791 113 854 20 71 119 34 3644 6 4 0 90 5 489 0 10 794 105 858 33 56 56 17 3469 8 4 0 88 6 721 0 59 516 5 779 38 50 107 18 3795 6 4 0 91 7 43913 0 544 568 2 987 40 54 186 81 7977 30 21 0 49 March 4, 2026 at 01:14:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2254 150 250 0 16 95 0 9 0 2 0 98 1 0 0 14 121 2 117 0 11 100 0 9 0 2 0 98 2 50 0 238 69 9 99 0 6 98 0 331 0 1 0 98 3 0 0 7 148 72 91 6 8 101 0 264 0 1 0 99 4 1 0 18 287 105 72 0 7 72 0 303 0 1 0 99 5 9 0 2 292 103 98 0 8 112 0 301 0 1 0 99 6 18 0 14 138 5 172 1 12 76 0 1385 0 1 0 99 7 0 0 0 91 0 91 0 9 72 0 18 0 0 0 100 March 4, 2026 at 01:14:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 151 108 0 1 0 0 1 0 1 0 99 1 0 0 0 109 1 103 0 0 0 0 0 0 0 0 100 2 0 0 0 24 9 20 0 1 0 0 309 0 0 0 100 3 0 0 7 19 3 14 0 0 0 0 261 0 0 0 100 4 0 0 4 212 104 6 0 0 0 0 301 0 1 0 99 5 0 0 2 211 103 4 0 0 0 0 294 0 0 0 100 6 2 0 14 11 4 38 0 0 1 0 1370 0 0 0 99 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2189 150 176 0 1 0 0 0 0 2 0 98 1 0 0 14 70 2 33 0 2 0 0 1 0 1 0 99 2 0 0 224 31 11 24 0 0 1 0 312 0 1 0 99 3 0 0 7 51 2 14 1 0 0 0 261 0 0 0 100 4 0 0 2 246 104 6 0 0 0 0 301 0 1 0 99 5 0 0 4 247 104 8 0 0 0 0 298 0 0 0 100 6 0 0 14 47 3 38 3 0 2 0 1367 0 1 0 99 7 0 0 0 39 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2675 0 10 2484 143 573 9 55 95 55 1912 2 4 0 94 1 299 0 30 360 6 492 11 48 175 43 1421 2 3 0 95 2 7222 0 0 254 13 409 17 34 142 24 1456 4 3 0 93 3 948 0 24 278 3 391 5 41 84 54 2066 4 3 0 93 4 190 0 100 435 105 369 12 39 40 21 1280 1 2 0 97 5 105 0 10 385 103 242 2 24 26 21 1855 1 1 0 98 6 2904 0 30 260 3 325 7 31 55 28 2495 7 2 0 91 7 8891 0 317 205 1 405 11 28 82 55 4109 4 7 0 89 March 4, 2026 at 01:15:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6125 0 20 2613 104 678 37 59 171 35 2671 10 6 0 84 1 1094 0 46 431 5 593 19 61 149 26 2368 5 3 0 92 2 25960 0 24 453 7 545 37 45 389 13 2516 14 9 0 76 3 27429 0 16 464 3 642 34 49 203 18 3936 21 15 0 65 4 1467 0 280 656 127 699 23 56 78 32 2411 11 5 0 84 5 1035 0 43 717 131 720 14 59 93 19 2464 4 2 0 94 6 952 0 78 385 4 725 30 50 156 19 3086 7 3 0 90 7 3099 0 187 345 4 614 35 44 89 31 3797 6 4 0 90 March 4, 2026 at 01:15:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 0 2207 103 160 1 12 61 0 16 0 2 0 98 1 7 0 0 136 2 116 0 13 91 0 10 0 1 0 99 2 53 0 343 75 6 103 0 6 87 0 19 0 2 0 98 3 0 0 7 163 78 126 14 13 90 0 1214 0 1 0 99 4 1 0 45 308 106 89 0 8 78 0 302 0 2 0 98 5 0 0 3 360 130 143 0 12 101 0 307 0 1 0 99 6 3 0 14 154 26 143 4 12 70 0 771 0 1 0 99 7 6 0 0 97 1 63 0 6 55 0 9 0 0 0 100 March 4, 2026 at 01:15:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 100 2 0 1 0 0 0 0 1 0 99 1 0 0 0 125 1 102 0 0 0 0 0 0 0 0 100 2 0 0 119 31 8 26 0 0 1 0 11 0 0 0 99 3 1 0 7 30 4 38 1 0 2 0 1668 0 1 0 99 4 0 0 2 236 103 14 0 1 0 0 301 0 0 0 100 5 0 0 4 236 105 16 0 1 0 0 294 0 0 0 100 6 0 0 14 122 51 102 0 0 0 0 266 0 0 0 100 7 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 2 0 0 0 0 0 0 1 0 99 1 0 0 0 109 1 102 0 0 0 0 0 0 0 0 100 2 0 0 0 31 7 24 0 0 0 0 9 0 0 0 100 3 0 0 7 15 4 38 1 0 4 0 1668 0 0 0 99 4 0 0 17 215 103 10 0 0 0 0 301 0 0 0 99 5 0 0 3 219 105 10 0 1 0 0 294 0 0 0 100 6 0 0 14 112 51 112 0 1 0 0 266 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2361 0 15 2279 102 305 7 39 51 51 1059 1 4 0 95 1 2834 0 31 286 6 289 7 28 52 35 628 3 2 0 95 2 363 0 5 200 15 253 0 30 55 24 591 1 2 0 97 3 104 0 15 188 12 277 3 21 26 27 2362 1 1 0 98 4 151 0 6 355 103 199 2 25 26 22 821 1 1 0 98 5 118 0 4 327 105 137 3 12 22 19 555 0 1 0 99 6 603 0 21 103 8 99 4 13 30 14 1200 5 1 0 94 7 7160 0 317 210 25 333 7 23 62 45 3100 3 5 0 92 March 4, 2026 at 01:15:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 100 8 0 1 3 0 0 0 1 0 99 1 0 0 28 25 5 20 0 1 3 0 8 0 1 0 99 2 0 0 0 21 1 16 0 0 3 0 15 0 0 0 100 3 0 0 7 121 54 138 2 0 0 0 1670 0 1 0 99 4 0 0 5 227 107 12 0 0 0 0 301 0 0 0 100 5 0 0 1 230 105 22 0 1 1 0 302 0 0 0 100 6 64 0 14 22 5 14 0 1 1 0 274 0 0 0 100 7 0 0 7 112 1 104 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:15:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2144 100 6 0 3 0 0 0 0 1 0 99 1 0 0 21 51 1 16 0 1 4 0 0 0 1 0 99 2 0 0 231 46 2 40 0 2 4 0 2 0 1 0 99 3 0 0 7 153 54 140 1 0 1 0 1651 0 1 0 99 4 0 0 7 256 104 12 0 2 0 0 301 0 0 0 100 5 0 0 7 258 105 12 0 0 0 0 294 0 0 0 100 6 0 0 14 55 6 14 0 0 1 0 274 0 0 0 100 7 0 0 0 122 1 78 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:15:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 28 0 2 0 0 0 0 1 0 99 1 0 0 0 35 1 32 0 2 0 0 0 0 0 0 100 2 0 0 0 58 1 50 0 0 0 0 0 0 0 0 100 3 0 0 7 68 32 92 0 0 0 0 1656 0 1 0 99 4 0 0 5 266 126 62 0 1 0 0 301 0 0 0 100 5 0 0 1 215 104 8 0 0 0 0 294 0 0 0 100 6 0 0 14 13 5 10 0 0 0 0 274 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 48 0 2 0 0 26 0 1 0 99 1 0 0 0 51 2 46 0 2 1 0 1 0 0 0 100 2 0 0 0 27 2 20 0 2 0 0 2 0 0 0 100 3 0 0 7 20 4 48 3 1 0 0 1651 0 0 0 99 4 0 0 3 321 153 116 0 0 0 0 301 0 0 0 100 5 0 0 3 216 104 8 1 1 0 0 293 0 0 0 100 6 0 0 14 17 7 14 0 0 0 0 272 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 4 0 0 0 0 3 0 1 0 99 1 0 0 1 17 1 12 0 0 0 0 0 0 0 0 100 2 0 0 0 101 2 96 0 2 0 0 1 0 0 0 100 3 0 0 7 15 4 42 0 1 2 0 1656 0 1 0 99 4 0 0 3 325 154 124 0 1 2 0 304 0 0 0 100 5 0 0 3 216 104 8 0 0 0 0 294 0 0 0 100 6 0 0 14 18 7 16 0 0 0 0 282 0 0 0 100 7 1 0 0 10 2 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:15:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 46 0 3 0 0 1 0 1 0 99 1 0 0 0 44 2 40 0 2 0 0 6 0 0 0 100 2 0 0 0 53 4 50 0 0 1 0 20 0 0 0 100 3 1 0 7 15 5 40 1 0 1 0 1651 0 1 0 99 4 0 0 5 324 156 114 0 0 0 0 301 0 0 0 100 5 21 0 1 222 105 18 0 0 0 0 306 0 0 0 100 6 0 0 14 17 7 14 0 0 0 0 275 0 0 0 100 7 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:15:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2110 102 78 0 1 0 0 25 0 1 0 99 1 0 0 0 36 1 32 0 2 1 0 0 0 0 0 100 2 0 0 0 10 1 8 0 0 3 0 0 0 0 0 100 3 0 0 7 14 4 40 1 0 0 0 1644 0 0 0 99 4 0 0 2 323 154 118 0 0 0 0 306 0 0 0 100 5 0 0 4 217 104 12 0 1 0 0 294 0 0 0 100 6 0 0 14 18 7 16 0 0 0 0 274 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 64 0 4 0 0 0 0 1 0 99 1 0 0 0 54 1 46 0 2 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 3 0 0 7 13 4 38 1 0 1 0 1643 0 0 0 99 4 0 0 2 315 153 108 0 0 0 0 301 0 0 0 100 5 0 0 4 218 104 10 1 0 0 0 294 0 0 0 100 6 0 0 14 18 7 16 0 1 0 0 272 0 0 0 100 7 0 0 0 11 2 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:15:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 66 0 1 0 0 0 0 1 0 99 1 0 0 1 52 1 48 0 2 0 0 0 0 0 0 100 2 0 0 0 14 3 8 0 0 0 0 2 0 0 0 100 3 0 0 7 16 4 38 4 0 3 0 1645 0 1 0 99 4 0 0 4 319 161 106 0 0 0 0 301 0 0 0 100 5 0 0 2 215 104 8 0 0 0 0 294 0 0 0 100 6 0 0 14 16 6 12 1 0 0 0 274 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 186 0 4 2344 110 538 6 37 30 27 1161 1 2 0 96 1 19714 0 13 280 2 304 12 26 33 25 1099 12 7 0 82 2 35 0 21 191 2 276 3 23 19 21 1283 2 1 0 97 3 22 0 14 171 4 230 4 20 19 15 3037 2 1 0 97 4 95 0 72 475 147 399 3 13 11 11 893 1 1 0 98 5 285 0 8 366 105 149 1 8 12 9 901 1 1 0 98 6 17 0 17 126 7 120 1 12 13 9 1216 1 0 0 99 7 3259 0 134 153 4 282 10 15 36 31 2657 3 3 0 94 March 4, 2026 at 01:15:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2594 0 2 2416 112 471 23 32 123 20 1656 3 3 0 93 1 8282 0 51 398 3 565 35 37 85 22 2531 9 8 0 84 2 3329 0 56 381 32 340 8 21 49 9 1270 6 3 0 91 3 650 0 63 296 12 498 24 36 96 16 3184 4 3 0 94 4 484 0 63 468 108 417 30 31 120 5 1791 3 3 0 95 5 729 0 3 501 106 456 23 28 86 2 1543 3 2 0 95 6 918 0 32 233 2 271 8 15 78 5 1020 5 2 0 93 7 3424 0 248 196 3 291 12 21 119 13 1439 6 3 0 91 March 4, 2026 at 01:15:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2188 100 103 0 15 86 0 0 0 2 0 98 1 0 0 0 146 1 151 0 12 108 0 0 0 1 0 99 2 0 0 21 90 2 100 0 6 80 0 2 0 1 0 99 3 0 0 238 195 107 212 6 12 103 0 1676 0 2 0 98 4 0 0 4 303 113 89 0 11 73 0 301 0 1 0 99 5 44 0 2 305 110 100 1 7 86 0 303 0 1 0 99 6 0 0 0 132 1 140 0 8 76 0 0 0 1 0 99 7 3 0 14 82 3 75 0 5 65 0 268 0 0 0 100 March 4, 2026 at 01:15:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 68 0 1 0 0 0 0 1 0 99 1 0 0 0 41 1 40 0 3 2 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 10 0 7 15 5 40 1 0 1 0 1676 0 1 0 99 4 0 0 2 283 139 74 0 0 0 0 301 0 1 0 99 5 0 0 4 230 111 22 0 2 0 0 303 0 0 0 100 6 0 0 0 52 14 45 0 2 0 0 0 0 0 0 100 7 0 0 14 9 3 6 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:15:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 10 0 1 0 0 0 0 1 0 99 1 0 0 1 58 2 52 0 1 1 0 1 0 0 0 100 2 0 0 0 65 2 60 0 1 0 0 2 0 0 0 100 3 0 0 7 19 4 48 2 1 1 0 1671 0 1 0 99 4 0 0 2 220 110 6 1 0 0 0 301 0 1 0 99 5 0 0 4 228 110 20 0 0 0 0 303 0 0 0 100 6 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 7 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:15:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10406 0 98 2902 112 1072 31 82 218 62 4327 15 12 0 74 1 1781 0 15 683 7 1149 49 92 118 65 3548 5 5 0 90 2 986 0 62 674 3 998 30 81 214 63 2679 6 4 0 90 3 416 0 23 545 5 829 30 63 169 52 4387 5 5 0 90 4 2780 0 313 622 107 556 12 53 113 46 2740 7 5 0 88 5 1114 0 62 650 113 621 11 55 138 42 2963 3 2 0 94 6 1723 0 189 424 25 541 10 41 137 41 2737 7 4 0 90 7 37707 0 304 598 5 1067 50 54 211 81 7917 20 17 0 63 March 4, 2026 at 01:15:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 70 2115 103 17 0 3 6 0 9 1 3 0 96 1 82 0 0 52 3 37 0 3 6 0 68 0 1 0 98 2 0 0 0 43 5 19 1 0 0 0 59 0 0 0 100 3 0 0 7 125 4 141 2 5 4 0 1452 1 1 0 98 4 1 0 32 243 111 21 2 2 0 0 329 4 1 0 96 5 0 0 9 354 154 143 3 5 3 0 330 0 1 0 99 6 2 0 0 28 2 5 0 0 0 0 46 0 0 0 100 7 71 0 14 52 9 42 5 1 0 0 611 4 0 0 96 March 4, 2026 at 01:15:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2213 101 104 0 12 83 0 0 0 3 0 97 1 0 0 462 67 2 100 0 11 93 0 0 0 2 0 98 2 0 0 0 195 2 165 0 6 85 0 1 0 1 0 99 3 0 0 7 204 69 135 4 6 99 0 1359 0 1 0 99 4 0 0 3 319 105 74 0 7 51 0 301 0 1 0 99 5 0 0 3 423 154 186 0 8 78 0 294 0 1 0 99 6 0 0 0 108 0 58 0 6 72 0 0 0 0 0 100 7 2 0 14 139 9 115 3 7 89 0 579 0 0 0 99 March 4, 2026 at 01:15:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 88 0 3 0 0 0 0 1 0 99 1 0 0 0 31 1 24 0 2 0 0 0 0 0 0 100 2 0 0 0 14 3 10 0 0 0 0 11 0 0 0 100 3 0 0 7 13 3 40 1 0 0 0 1377 0 0 0 99 4 0 0 3 213 104 6 1 0 0 0 301 0 0 0 100 5 0 0 3 314 154 106 0 0 0 0 295 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 14 23 7 17 1 1 0 0 574 0 0 0 100 March 4, 2026 at 01:15:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 84 0 1 0 0 0 0 1 0 99 1 0 0 0 37 1 32 0 2 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 3 0 0 7 12 3 36 2 0 0 0 1359 0 0 0 100 4 0 0 2 212 104 6 0 0 0 0 301 0 0 0 100 5 0 0 4 313 154 106 0 0 0 0 294 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 14 30 11 30 0 1 0 0 577 0 0 0 99 March 4, 2026 at 01:15:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4845 0 31 2322 101 268 4 27 54 31 1218 4 4 0 92 1 447 0 18 200 4 369 6 32 57 42 666 1 3 0 96 2 671 0 18 235 2 370 2 42 42 27 682 1 2 0 97 3 251 0 14 190 3 290 4 25 24 37 2047 1 1 0 98 4 35 0 6 346 104 130 2 14 16 18 605 0 1 0 99 5 96 0 7 350 114 130 3 20 13 12 663 0 1 0 99 6 227 0 14 104 0 88 3 11 10 8 776 3 1 0 96 7 6337 0 303 214 46 317 7 16 52 47 3065 2 5 0 93 March 4, 2026 at 01:15:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2110 102 95 1 4 1 0 266 0 2 0 98 1 64 0 0 34 6 28 1 1 1 0 14 0 0 0 100 2 0 0 14 22 3 18 0 0 2 0 13 0 0 0 100 3 0 0 7 17 3 36 1 0 1 0 1352 0 0 0 99 4 0 0 5 244 105 28 0 1 0 0 301 0 0 0 100 5 0 0 1 224 104 14 0 0 1 0 301 0 0 0 100 6 0 0 0 12 0 2 0 1 0 0 0 0 0 0 100 7 0 0 7 114 52 106 0 1 0 0 301 0 0 0 100 March 4, 2026 at 01:15:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2127 102 90 0 2 0 0 266 0 1 0 99 1 0 0 119 51 6 48 0 2 2 0 9 0 1 0 99 2 0 0 0 31 3 12 0 1 2 0 2 0 0 0 100 3 0 0 7 32 3 42 2 1 3 0 1350 0 0 0 99 4 0 0 2 230 104 8 0 0 3 0 301 0 0 0 100 5 0 0 4 231 104 8 0 0 2 0 295 0 0 0 100 6 0 0 0 23 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 128 52 106 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:15:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 140 2108 102 17 0 1 0 0 266 0 2 0 98 1 0 0 0 52 6 28 0 0 1 0 8 0 0 0 99 2 0 0 0 78 1 56 0 3 0 0 0 0 0 0 100 3 0 0 7 68 4 76 1 3 2 0 1352 0 1 0 99 4 0 0 3 241 107 18 0 1 0 0 301 0 0 0 100 5 0 0 3 231 104 6 0 0 0 0 294 0 0 0 100 6 0 0 0 23 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 127 52 104 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:15:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2108 102 16 0 0 0 0 266 0 1 0 99 1 0 0 0 25 8 18 0 1 0 0 7 0 0 0 100 2 0 0 0 12 2 4 0 0 0 0 2 0 0 0 100 3 0 0 7 113 3 136 1 0 1 0 1349 0 1 0 99 4 0 0 7 214 104 6 0 0 0 0 301 0 0 0 100 5 0 0 7 216 104 6 1 0 0 0 294 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 111 52 104 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:15:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 102 28 1 1 1 0 266 0 1 0 99 1 0 0 0 56 9 50 1 1 0 0 16 0 0 0 100 2 3 0 0 8 1 4 0 0 0 0 2 0 0 0 100 3 0 0 7 74 3 96 2 0 0 0 1353 0 1 0 99 4 0 0 4 213 103 8 0 1 2 0 301 0 0 0 100 5 1 0 2 218 105 16 0 1 0 0 299 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 110 52 106 0 0 0 0 304 0 0 0 100 March 4, 2026 at 01:15:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 14 2107 104 46 0 4 0 0 272 0 1 0 99 1 0 0 0 103 7 99 0 1 0 0 14 0 0 0 100 2 0 0 0 22 5 22 0 0 0 0 20 0 0 0 100 3 0 0 7 12 3 36 2 0 2 0 1342 0 0 0 99 4 0 0 3 220 110 6 0 0 0 0 301 0 0 0 100 5 0 0 3 220 104 14 0 0 0 0 301 0 0 0 100 6 0 0 0 10 1 8 0 1 0 0 1 0 0 0 100 7 0 0 0 113 54 108 0 0 0 0 307 0 0 0 100 March 4, 2026 at 01:15:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 103 114 0 0 0 0 287 0 1 0 99 1 0 0 0 21 6 16 0 1 0 0 8 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 13 3 42 0 0 4 0 1342 0 1 0 99 4 0 0 3 214 105 8 0 0 3 0 301 0 0 0 100 5 0 0 3 214 104 8 0 0 0 0 294 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 109 52 104 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:15:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 112 0 0 0 0 266 0 1 0 99 1 0 0 0 24 7 18 1 1 0 0 6 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 3 0 0 7 11 3 36 1 0 1 0 1342 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 301 0 0 0 100 5 0 0 3 214 104 6 1 0 0 0 294 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 113 52 112 0 2 0 0 300 0 0 0 100 March 4, 2026 at 01:15:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 122 1 1 1 0 266 0 1 0 99 1 0 0 1 23 7 18 0 1 0 0 8 0 0 0 100 2 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 3 0 0 7 14 3 36 2 0 1 0 1343 0 1 0 99 4 0 0 7 214 104 8 0 0 0 0 300 0 0 0 100 5 0 0 0 214 104 6 0 0 0 0 294 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 114 51 108 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:15:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3408 0 75 2644 106 789 21 63 100 22 3641 5 6 0 89 1 27774 0 149 638 21 1011 38 69 89 35 5149 19 14 0 67 2 2276 0 206 540 4 879 22 63 87 35 3706 12 5 0 82 3 1009 0 15 442 9 617 18 63 163 37 3515 4 3 0 93 4 887 0 116 689 105 841 24 55 170 37 3303 5 3 0 92 5 1002 0 57 751 107 917 24 51 117 29 3395 4 3 0 93 6 2258 0 37 358 0 449 17 37 84 21 2249 9 3 0 88 7 5432 0 17 435 27 679 33 50 151 24 3103 7 4 0 89 March 4, 2026 at 01:15:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 28 2120 105 35 0 5 3 0 288 0 2 0 98 1 0 0 0 139 15 131 0 6 1 0 15 0 0 0 100 2 0 0 21 92 33 90 0 3 2 0 17 0 1 0 99 3 65 0 7 47 15 68 2 2 0 0 1388 0 1 0 99 4 0 0 16 223 106 11 0 0 0 0 316 0 0 0 100 5 2 0 4 234 104 24 0 4 2 0 321 0 0 0 100 6 1 0 0 20 1 11 0 1 0 0 9 0 0 0 99 7 2 0 0 17 1 8 0 1 0 0 319 0 0 0 100 March 4, 2026 at 01:15:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 35 2189 101 131 0 11 73 0 266 0 3 0 97 1 0 0 231 83 1 111 0 8 66 0 0 0 1 0 99 2 0 0 0 133 5 141 0 11 102 0 2 0 1 0 99 3 0 0 7 233 108 215 13 11 95 0 1375 0 1 0 98 4 0 0 4 343 127 150 1 13 93 0 301 0 1 0 99 5 0 0 2 295 104 93 1 6 106 0 294 0 1 0 99 6 0 0 0 79 0 71 0 5 64 0 0 0 1 0 99 7 0 0 0 88 1 94 0 6 87 0 301 0 0 0 99 March 4, 2026 at 01:15:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 110 1 0 0 0 266 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 3 0 0 7 19 7 44 1 0 1 0 1371 0 0 0 99 4 0 0 4 315 155 110 0 1 0 0 307 0 0 0 99 5 0 0 2 215 104 8 0 0 0 0 294 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:15:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5067 0 57 2397 101 430 18 38 73 36 1832 5 5 0 90 1 611 0 9 288 3 457 13 41 64 57 1371 2 2 0 97 2 256 0 12 265 5 504 4 46 45 41 1574 1 2 0 96 3 412 0 27 270 3 429 11 34 31 33 2788 2 2 0 96 4 173 0 65 525 157 385 10 30 31 23 1280 2 1 0 96 5 37 0 9 380 104 183 4 23 22 9 1076 1 2 0 97 6 28 0 7 164 4 185 2 27 31 9 1339 1 1 0 98 7 7205 0 301 220 2 422 18 20 54 40 4049 6 6 0 88 March 4, 2026 at 01:15:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5829 0 127 2666 116 807 38 73 119 30 2750 9 8 0 83 1 1171 0 48 574 11 854 49 81 172 34 2463 4 4 0 92 2 1040 0 32 555 19 819 27 71 96 36 2474 8 3 0 89 3 1061 0 13 448 8 627 23 52 38 24 3903 6 3 0 90 4 561 0 39 604 110 598 16 35 67 11 2455 4 3 0 93 5 26469 0 9 646 107 661 55 40 139 15 2850 17 12 0 71 6 411 0 35 394 1 610 20 48 53 7 2184 4 3 0 94 7 6355 0 348 345 4 560 40 34 90 26 4737 12 7 0 81 March 4, 2026 at 01:15:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 60 0 42 2171 107 72 0 2 2 0 283 0 3 0 97 1 0 0 343 135 53 136 0 1 3 0 15 0 2 0 98 2 0 0 0 86 5 30 1 2 0 0 43 0 0 0 99 3 8 0 7 67 3 38 1 1 1 0 1387 0 1 0 99 4 0 0 16 273 110 8 0 1 1 0 324 0 0 0 99 5 28 0 4 324 104 67 1 3 0 0 309 0 1 0 99 6 20 0 0 67 2 11 0 3 0 0 19 0 0 0 99 7 0 0 0 73 2 14 0 1 0 0 303 0 0 0 100 March 4, 2026 at 01:15:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2157 106 174 1 17 73 0 270 0 2 0 98 1 0 0 0 201 53 225 2 11 73 0 5 0 1 0 99 2 0 0 0 81 2 104 0 10 79 0 0 0 1 0 99 3 0 0 7 136 77 138 7 7 91 0 1372 0 1 0 99 4 0 0 2 259 104 68 0 8 80 0 301 0 1 0 99 5 0 0 4 271 104 87 0 3 83 0 294 0 1 0 99 6 0 0 0 59 0 80 0 7 82 0 0 0 0 0 100 7 0 0 0 56 2 55 0 6 52 0 301 0 0 0 100 March 4, 2026 at 01:15:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2111 101 18 0 2 0 0 266 0 2 0 98 1 0 0 0 228 58 221 0 1 0 0 9 0 0 0 99 2 0 0 0 17 4 10 0 0 0 0 3 0 0 0 100 3 0 0 7 14 3 36 2 0 1 0 1373 0 0 0 99 4 0 0 4 213 104 4 0 0 0 0 301 0 0 0 100 5 0 0 2 215 104 6 0 0 0 0 294 0 0 0 100 6 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:15:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27318 0 41 2522 101 461 24 45 78 41 2477 16 11 0 73 1 709 0 30 552 47 695 13 54 84 66 1389 2 3 0 95 2 614 0 7 347 4 546 5 39 55 38 1459 2 2 0 96 3 1296 0 143 295 15 532 15 39 57 55 4548 2 4 0 94 4 405 0 62 490 105 391 7 38 41 48 2245 2 2 0 97 5 175 0 17 423 104 303 5 30 40 36 2813 3 2 0 96 6 172 0 6 206 1 326 5 35 43 33 1243 1 1 0 98 7 8872 0 312 210 1 372 17 35 75 55 3715 7 6 0 86 March 4, 2026 at 01:15:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9385 0 96 2568 107 723 33 55 102 23 2291 9 10 0 81 1 938 0 76 433 3 635 26 67 88 18 2246 7 4 0 89 2 440 0 22 379 6 601 28 64 198 17 1801 7 2 0 90 3 1159 0 30 441 45 662 24 48 101 11 3392 4 3 0 93 4 504 0 63 480 107 474 41 41 188 4 1869 3 2 0 95 5 551 0 30 497 103 399 11 27 88 8 1788 4 2 0 94 6 283 0 23 309 4 456 31 31 23 9 1883 3 2 0 95 7 3907 0 197 260 2 393 16 23 170 18 2176 6 3 0 91 March 4, 2026 at 01:15:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 102 69 0 3 1 0 0 0 3 0 97 1 48 0 476 80 8 84 2 4 2 0 283 0 1 0 98 2 0 0 0 96 4 22 0 1 1 0 15 0 1 0 99 3 0 0 7 165 42 116 1 2 0 0 1372 0 1 0 99 4 0 0 2 321 122 34 0 2 0 0 301 0 1 0 99 5 0 0 4 289 103 12 1 1 2 0 301 0 0 0 100 6 0 0 0 85 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 80 1 4 0 1 0 0 301 0 0 0 100 March 4, 2026 at 01:15:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 101 139 0 12 65 0 0 0 2 0 98 1 0 0 14 107 7 141 0 8 99 0 275 0 1 0 99 2 0 0 0 48 5 62 0 3 72 0 3 0 0 0 100 3 0 0 7 132 79 146 7 6 96 0 1369 0 1 0 99 4 0 0 4 310 136 135 0 4 88 0 301 0 1 0 99 5 0 0 2 248 103 88 0 11 66 0 294 0 1 0 99 6 0 0 0 88 25 111 0 5 62 0 0 0 0 0 100 7 0 0 0 50 1 102 0 9 75 0 301 0 0 0 99 March 4, 2026 at 01:15:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 103 0 0 0 0 0 0 2 0 98 1 0 0 14 28 7 28 0 1 0 0 275 0 0 0 100 2 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 3 0 0 7 25 5 49 3 1 1 0 1370 0 0 0 99 4 0 0 4 218 110 4 1 0 0 0 301 0 0 0 100 5 0 0 2 211 103 4 0 0 0 0 294 0 0 0 100 6 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:15:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9411 0 347 2903 106 1275 57 98 129 62 5899 13 13 0 74 1 34693 0 188 751 13 1086 66 91 120 62 6769 25 19 0 56 2 702 0 19 800 18 1299 42 110 114 77 4166 7 5 0 89 3 601 0 10 781 9 1347 63 115 81 59 4929 6 4 0 90 4 423 0 72 918 107 1112 46 93 67 57 3918 4 3 0 93 5 2795 0 17 808 107 759 21 59 36 37 3625 8 4 0 89 6 856 0 12 588 20 950 25 56 59 52 2758 4 4 0 92 7 3675 0 131 514 8 910 23 62 84 38 4711 6 5 0 89 March 4, 2026 at 01:15:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 659 0 7 2182 103 52 7 9 27 0 782 1 2 0 97 1 261 0 84 79 1 73 5 9 46 1 552 1 2 0 97 2 574 0 39 172 41 157 3 14 97 4 253 1 2 0 97 3 473 0 23 97 13 121 15 7 47 0 1861 2 1 0 97 4 374 0 88 298 109 86 8 12 123 0 556 5 1 0 94 5 730 0 27 298 106 64 6 7 73 5 431 5 1 0 94 6 301 0 30 176 2 172 7 13 80 4 260 1 1 0 98 7 494 0 33 78 1 82 1 8 12 2 619 1 1 0 98 March 4, 2026 at 01:15:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 103 22 0 3 0 0 302 0 2 0 98 1 2 0 56 83 2 16 0 2 2 0 272 0 2 0 98 2 0 0 462 34 4 26 0 0 2 0 17 0 1 0 99 3 0 0 7 190 54 140 3 1 2 0 1369 0 1 0 98 4 0 0 3 292 108 8 0 0 0 0 301 0 0 0 99 5 0 0 3 309 110 34 2 1 4 0 311 0 0 0 99 6 0 0 0 107 2 28 0 0 0 0 1 0 0 0 100 7 0 0 0 143 1 69 0 2 0 0 1 0 0 0 100 March 4, 2026 at 01:15:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 103 116 0 10 111 0 322 0 2 0 98 1 0 0 14 49 1 86 0 9 78 0 266 0 0 0 100 2 0 0 0 51 2 80 0 8 62 0 27 0 0 0 100 3 0 0 7 235 131 272 4 15 135 0 1369 0 1 0 99 4 0 0 3 250 106 80 0 5 85 0 301 0 1 0 99 5 0 0 3 312 108 153 1 9 93 0 302 0 1 0 99 6 0 0 0 43 1 69 0 8 61 0 0 0 0 0 100 7 0 0 0 104 2 138 1 7 54 0 0 0 0 0 100 March 4, 2026 at 01:15:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 4 0 0 0 0 301 0 1 0 99 1 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 2 0 0 0 22 3 18 0 0 0 0 11 0 0 0 100 3 0 0 7 97 43 118 2 0 3 0 1387 0 1 0 99 4 0 0 2 237 115 33 0 3 0 0 301 0 0 0 100 5 0 0 4 227 110 18 0 0 0 0 304 0 0 0 100 6 0 0 0 107 1 104 0 2 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:15:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 613 0 52 2686 104 616 12 68 161 30 2896 4 6 0 90 1 7027 0 143 652 3 808 25 50 68 52 4459 12 6 0 82 2 37098 0 557 573 4 957 53 70 152 78 7205 28 19 0 53 3 8044 0 79 667 5 1081 42 87 259 90 5381 9 7 0 84 4 1017 0 91 772 119 1078 15 77 213 76 3401 4 3 0 93 5 1182 0 85 643 108 582 19 61 161 51 3062 4 3 0 93 6 848 0 23 505 21 811 13 58 104 70 1901 4 2 0 93 7 729 0 11 499 17 667 20 61 91 35 2564 5 3 0 92 March 4, 2026 at 01:15:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2119 102 37 1 4 6 0 310 0 3 0 97 1 1 0 0 31 1 16 1 4 6 0 2 0 1 0 99 2 1 0 7 35 3 22 0 1 0 0 19 0 0 0 100 3 11 0 7 59 4 70 2 5 2 0 1376 0 1 0 99 4 60 0 16 243 113 20 0 1 0 0 323 0 0 0 99 5 4 0 18 231 106 12 0 1 0 0 574 0 0 0 100 6 0 0 0 25 0 10 0 1 0 0 17 0 0 0 100 7 7 0 0 184 51 164 0 0 4 0 9 0 0 0 100 March 4, 2026 at 01:15:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 10 0 1 1 0 301 0 2 0 98 1 0 0 14 23 1 24 0 2 4 0 6 0 1 0 99 2 0 0 0 29 3 24 0 0 0 0 15 0 0 0 100 3 0 0 7 119 4 140 1 1 2 0 1370 0 1 0 99 4 0 0 4 231 111 16 1 0 0 0 310 0 0 0 99 5 4 0 16 225 105 18 2 1 3 0 568 0 1 0 99 6 0 0 0 11 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 111 51 102 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2219 102 146 0 9 82 0 301 0 3 0 97 1 0 0 448 70 0 100 0 6 65 0 0 0 1 0 99 2 0 0 0 121 2 82 0 7 73 0 2 0 1 0 99 3 0 0 7 193 72 146 5 11 102 0 1369 0 2 0 98 4 0 0 3 324 109 84 1 7 100 0 310 0 1 0 99 5 0 0 17 328 106 85 1 7 62 0 559 0 2 0 98 6 0 0 0 118 0 91 0 6 63 0 0 0 1 0 99 7 0 0 0 226 52 364 0 8 69 0 331 0 1 0 99 March 4, 2026 at 01:15:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 341 0 2 2384 104 336 5 25 22 19 1048 1 3 0 96 1 207 0 6 245 1 247 5 23 19 10 1494 2 2 0 96 2 6942 0 317 186 2 306 8 19 54 46 3884 6 7 0 86 3 5069 0 43 284 5 411 11 27 65 42 2464 7 3 0 89 4 386 0 63 461 113 555 5 35 66 38 1581 2 2 0 96 5 314 0 23 423 105 349 6 35 63 38 2353 2 2 0 96 6 308 0 11 197 4 279 6 25 30 26 1730 1 2 0 96 7 150 0 15 281 52 344 3 21 16 21 1314 1 1 0 98 March 4, 2026 at 01:15:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1050 0 2 2652 124 748 42 65 96 18 2912 5 5 0 91 1 26738 0 59 541 3 760 41 68 178 16 2975 20 14 0 66 2 6566 0 173 571 5 770 48 52 134 35 4335 12 7 0 80 3 2674 0 78 469 5 708 37 64 132 28 3701 8 6 0 86 4 4625 0 251 657 107 755 24 59 145 47 3217 8 5 0 87 5 317 0 30 708 107 842 19 70 52 38 3416 5 2 0 93 6 1229 0 56 428 9 811 54 67 147 34 2462 4 3 0 92 7 318 0 7 401 19 579 17 48 109 14 1952 3 2 0 95 March 4, 2026 at 01:16:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2166 102 82 0 2 0 0 310 0 2 0 98 1 0 0 343 32 0 26 0 2 5 0 26 0 2 0 98 2 24 0 0 78 0 20 0 3 1 0 10 0 0 0 100 3 4 0 28 71 3 46 2 3 6 0 1120 0 2 0 98 4 0 0 17 265 102 6 0 2 0 0 23 0 0 0 100 5 3 0 17 283 106 24 1 2 0 0 873 0 0 0 99 6 71 0 0 82 8 25 0 3 0 0 20 0 1 0 99 7 0 0 7 169 53 108 0 0 0 0 272 0 0 0 100 March 4, 2026 at 01:16:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 104 10 0 1 0 0 302 0 2 0 98 1 0 0 119 18 1 17 0 1 1 0 6 0 0 0 100 2 0 0 0 134 3 116 0 0 0 0 19 0 0 0 100 3 0 0 0 30 2 38 0 0 1 0 1114 0 1 0 99 4 0 0 2 236 105 14 0 1 0 0 0 0 0 0 100 5 0 0 18 243 105 24 0 0 2 0 869 0 0 0 99 6 0 0 0 38 6 16 1 1 0 0 9 0 0 0 100 7 0 0 7 131 54 108 1 0 0 0 261 0 0 0 100 March 4, 2026 at 01:16:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 103 107 0 10 107 0 301 0 2 0 98 1 0 0 0 74 0 107 0 12 91 0 0 0 0 0 100 2 0 0 0 97 0 117 0 6 93 0 1 0 0 0 100 3 0 0 14 102 67 110 5 8 85 0 1112 0 1 0 99 4 0 0 3 258 105 93 0 5 73 0 0 0 1 0 99 5 0 0 17 258 106 78 0 6 103 0 863 0 0 0 99 6 0 0 0 52 7 67 0 9 50 0 9 0 0 0 99 7 0 0 7 162 53 207 0 8 74 0 260 0 0 0 100 March 4, 2026 at 01:16:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 397 0 4 2418 103 473 13 47 53 37 1644 2 3 0 95 1 2818 0 33 358 3 401 13 39 34 33 1112 4 3 0 93 2 496 0 23 307 5 331 9 43 29 34 1061 2 3 0 95 3 223 0 20 277 3 368 12 40 54 39 2162 2 2 0 96 4 34513 0 478 442 106 444 25 27 71 64 6484 18 14 0 68 5 2446 0 25 569 115 558 11 58 83 74 2927 3 3 0 95 6 260 0 14 330 10 541 8 55 57 63 1486 2 2 0 97 7 385 0 28 333 37 515 10 43 74 46 1712 1 2 0 97 March 4, 2026 at 01:16:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 620 0 35 2471 107 538 28 49 87 12 2417 4 5 0 91 1 307 0 0 433 1 511 24 32 24 6 1632 3 2 0 94 2 849 0 14 363 4 523 16 19 46 4 2024 3 2 0 95 3 40 0 42 291 7 436 24 25 14 5 2333 3 3 0 94 4 5569 0 274 383 104 241 4 19 90 15 2109 6 7 0 86 5 5900 0 85 543 109 418 14 27 152 12 2286 9 4 0 88 6 1078 0 36 378 3 642 13 36 156 22 1488 7 2 0 91 7 751 0 41 340 39 512 5 41 44 16 1755 3 2 0 96 March 4, 2026 at 01:16:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2188 108 27 1 2 1 0 310 0 3 0 97 1 0 0 462 88 1 80 0 1 2 0 0 0 1 0 99 2 0 0 0 114 1 38 0 3 0 0 2 0 0 0 100 3 0 0 0 86 3 36 2 0 2 0 1103 0 1 0 99 4 0 0 3 282 102 2 0 1 0 0 0 0 0 0 100 5 6 0 17 292 105 12 2 0 0 0 980 1 1 0 98 6 0 0 0 82 1 4 0 1 0 0 0 0 0 0 100 7 0 0 7 189 53 114 0 1 0 0 263 0 0 0 100 March 4, 2026 at 01:16:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 38 0 1 0 0 310 0 1 0 98 1 0 0 0 43 2 42 0 2 0 0 6 0 0 0 100 2 0 0 0 69 2 67 0 1 2 0 15 0 0 0 100 3 0 0 0 13 3 36 2 0 3 0 1101 0 1 0 99 4 0 0 3 214 107 0 0 0 2 0 0 0 0 0 100 5 0 0 17 220 105 18 0 1 0 0 868 0 0 0 100 6 0 0 0 15 1 12 0 0 0 0 0 0 0 0 100 7 2 0 7 120 53 116 1 1 0 0 260 0 0 0 100 March 4, 2026 at 01:16:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 108 156 1 15 98 0 310 0 2 0 98 1 0 0 0 173 25 206 0 9 77 0 0 0 0 0 100 2 0 0 0 57 2 97 0 5 89 0 3 0 0 0 100 3 0 0 0 117 72 164 10 7 113 0 1102 0 1 0 99 4 0 0 3 248 109 61 0 7 40 0 0 0 0 0 100 5 0 0 17 255 105 93 0 7 70 0 861 0 1 0 99 6 0 0 0 50 1 86 0 4 94 0 0 0 0 0 100 7 0 0 7 115 29 166 0 7 92 0 260 0 1 0 99 March 4, 2026 at 01:16:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1136 0 23 2661 111 818 19 70 77 50 2611 4 6 0 90 1 409 0 15 575 26 749 24 67 49 37 2220 3 3 0 94 2 434 0 9 460 18 517 8 52 42 40 1844 2 2 0 96 3 74 0 5 390 6 490 9 33 27 18 2990 4 3 0 93 4 46612 0 691 600 106 753 41 34 125 74 7958 28 23 0 49 5 9767 0 74 742 109 752 15 67 115 68 4058 12 6 0 82 6 1121 0 18 516 2 989 16 86 87 84 2513 3 3 0 94 7 407 0 27 417 3 628 7 63 54 53 3159 4 7 0 89 March 4, 2026 at 01:16:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 91 0 70 2258 100 241 13 13 12 0 894 3 4 0 93 1 433 0 34 165 2 201 12 18 144 2 588 1 2 0 97 2 339 0 0 291 28 323 12 14 26 2 762 2 1 0 97 3 405 0 46 148 26 161 6 17 58 2 1550 2 1 0 97 4 774 0 107 321 106 154 5 10 78 5 515 5 1 0 93 5 706 0 18 343 106 179 10 10 43 6 510 9 1 0 90 6 637 0 14 162 4 229 26 12 33 0 1854 3 1 0 96 7 263 0 24 117 8 115 4 8 55 0 1088 2 1 0 98 March 4, 2026 at 01:16:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2170 100 49 0 4 1 0 0 0 3 0 97 1 0 0 462 82 2 76 0 3 2 0 0 0 1 0 99 2 0 0 0 92 1 14 0 1 0 0 301 0 1 0 99 3 0 0 0 190 53 146 1 1 2 0 1098 0 1 0 99 4 0 0 4 279 102 0 0 0 0 0 0 0 0 0 100 5 0 0 2 281 101 2 0 0 0 0 0 0 0 0 100 6 2 0 14 86 5 10 0 0 0 0 860 0 0 0 100 7 0 0 7 95 9 20 0 0 0 0 269 0 0 0 100 March 4, 2026 at 01:16:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 61 0 1 0 0 1 0 1 0 99 1 0 0 0 19 3 16 1 1 0 0 6 0 0 0 100 2 0 0 0 18 4 18 0 0 0 0 319 0 0 0 100 3 0 0 0 101 47 122 2 0 3 0 1098 0 1 0 99 4 0 0 3 274 110 67 0 2 0 0 0 0 0 0 100 5 0 0 3 215 101 8 0 0 2 0 7 0 0 0 100 6 0 0 14 16 6 12 1 0 0 0 862 0 0 0 100 7 0 0 7 25 10 22 0 0 0 0 270 0 0 0 100 March 4, 2026 at 01:16:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 101 175 0 8 72 0 21 0 2 0 98 1 0 0 0 50 2 82 0 8 83 0 0 0 0 0 100 2 0 0 0 48 1 79 1 7 68 0 301 0 0 0 100 3 0 0 0 102 73 90 2 6 77 0 1098 0 1 0 99 4 0 0 3 360 155 187 0 7 77 0 0 0 1 0 99 5 0 0 3 244 101 83 0 6 82 0 0 0 1 0 99 6 0 0 14 52 5 102 2 11 89 0 861 0 0 0 99 7 0 0 7 69 10 115 1 6 83 0 270 0 1 0 99 March 4, 2026 at 01:16:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1369 0 49 2794 114 1019 28 89 209 61 4485 6 8 0 87 1 1055 0 17 623 4 837 34 80 110 51 2790 5 4 0 91 2 34752 0 175 594 5 878 60 78 142 32 5849 24 14 0 62 3 1063 0 14 625 17 895 26 75 87 44 5069 5 4 0 91 4 3925 0 257 798 115 966 44 72 102 44 3651 7 6 0 87 5 10067 0 451 793 103 1050 47 76 249 82 4796 12 10 0 78 6 10725 0 80 701 8 963 39 66 224 63 4647 19 7 0 74 7 1463 0 17 675 14 1087 37 83 190 67 3524 5 3 0 91 March 4, 2026 at 01:16:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2123 102 36 3 1 0 0 1112 0 2 0 98 1 94 0 70 51 8 41 1 1 4 0 25 0 2 0 98 2 0 0 0 106 1 94 0 3 6 0 322 0 1 0 99 3 20 0 7 130 53 112 0 3 0 0 11 0 0 0 100 4 0 0 16 239 110 14 0 1 0 0 12 0 0 0 100 5 3 0 4 225 102 7 0 3 0 0 5 0 0 0 100 6 5 0 14 29 5 12 0 1 0 0 880 0 0 0 100 7 1 0 7 31 3 14 1 2 0 0 265 0 0 0 100 March 4, 2026 at 01:16:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 101 118 0 2 0 0 1102 0 2 0 98 1 0 0 42 87 7 16 0 0 2 0 9 0 2 0 98 2 0 0 462 31 1 20 0 0 2 0 301 0 1 0 99 3 0 0 0 185 52 108 0 0 0 0 0 0 1 0 99 4 0 0 3 294 105 14 0 1 0 0 2 0 1 0 99 5 0 0 3 282 102 2 0 0 0 0 0 0 0 0 100 6 2 0 14 88 5 12 0 1 0 0 861 0 0 0 100 7 0 0 7 87 3 16 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:16:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 132 1 1 0 0 1101 0 2 0 98 1 0 0 0 35 7 34 0 1 0 0 14 0 0 0 100 2 0 0 0 18 4 18 0 0 0 0 314 0 1 0 99 3 0 0 0 111 52 106 0 0 0 0 0 0 0 0 100 4 0 0 2 221 106 10 0 0 0 0 0 0 0 0 100 5 0 0 4 214 102 10 0 0 0 0 7 0 0 0 100 6 0 0 14 15 5 10 3 0 0 0 862 0 0 0 100 7 0 0 7 13 3 8 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:16:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2169 101 218 2 13 75 0 1110 0 2 0 98 1 10 0 1 102 11 142 1 11 74 3 72 0 0 0 99 2 10 0 0 61 1 106 0 11 82 5 334 0 1 0 99 3 9 0 0 177 100 194 12 10 127 4 37 0 1 0 99 4 40 0 12 322 129 172 1 11 70 10 52 0 1 0 99 5 1859 0 10 266 102 125 2 16 100 7 341 0 2 0 98 6 10 0 14 66 5 118 0 10 75 3 881 0 1 0 99 7 20 0 28 62 4 114 0 8 91 1 302 0 1 0 99 March 4, 2026 at 01:16:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 200 0 4 2275 102 294 4 25 40 31 1772 1 3 0 97 1 102 0 3 261 3 232 0 22 24 17 413 0 1 0 99 2 2692 0 15 224 2 159 3 15 44 25 797 4 2 0 94 3 387 0 1 131 3 119 1 15 15 16 345 0 1 0 99 4 74 0 11 317 107 99 2 13 19 11 223 0 2 0 98 5 1534 0 137 419 150 302 4 15 40 29 2134 1 3 0 96 6 3596 0 207 114 5 248 5 18 57 34 2244 5 3 0 92 7 2252 0 40 130 3 278 2 23 47 42 1064 1 3 0 96 March 4, 2026 at 01:16:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 101 132 2 0 0 0 1095 0 2 0 98 1 64 0 0 59 5 20 0 2 0 0 8 0 0 0 100 2 0 0 231 14 1 6 0 1 3 0 0 0 1 0 99 3 0 0 0 52 3 16 1 2 1 0 302 0 0 0 100 4 0 0 3 247 105 4 0 0 0 0 2 0 0 0 100 5 0 0 3 347 152 106 0 2 0 0 0 0 0 0 100 6 0 0 14 50 5 12 0 1 0 0 861 0 0 0 100 7 0 0 14 46 3 8 1 0 2 0 263 0 1 0 99 March 4, 2026 at 01:16:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 42 0 1 0 0 1095 0 2 0 98 1 0 0 0 118 5 110 0 0 0 0 8 0 0 0 100 2 0 0 14 8 1 5 0 0 0 0 1 0 1 0 99 3 0 0 0 13 3 6 0 0 0 0 301 0 0 0 100 4 0 0 3 210 101 2 0 0 0 0 0 0 0 0 100 5 0 0 3 312 152 102 0 0 0 0 0 0 0 0 100 6 0 0 14 18 5 12 2 1 0 0 860 0 0 0 100 7 0 0 7 12 3 6 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:16:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 125 3 1 1 0 1095 0 2 0 98 1 0 0 0 48 6 42 0 0 0 0 17 0 0 0 100 2 0 0 0 14 2 14 0 0 0 0 12 0 0 0 100 3 0 0 0 13 3 8 0 0 1 0 301 0 0 0 100 4 0 0 4 219 108 10 0 1 2 0 2 0 0 0 100 5 0 0 2 314 151 108 0 0 3 0 7 0 0 0 100 6 0 0 14 17 7 15 0 1 0 0 862 0 0 0 100 7 0 0 7 14 4 8 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:16:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 144 0 0 0 0 1095 0 2 0 98 1 0 0 0 18 6 14 0 0 0 0 5 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 14 4 10 0 0 1 0 301 0 0 0 100 4 0 0 2 213 101 10 0 0 2 0 0 0 0 0 100 5 0 0 4 311 151 108 0 1 1 0 0 0 0 0 100 6 0 0 14 16 6 12 0 0 0 0 862 0 0 0 100 7 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:16:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2112 102 144 1 0 0 0 1097 0 2 0 98 1 0 0 0 24 7 18 0 0 0 0 19 0 0 0 100 2 1 0 0 12 2 10 0 0 0 0 14 0 0 0 100 3 0 0 0 15 4 12 0 0 0 0 324 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 2 0 0 0 100 5 0 0 3 308 151 102 0 0 0 0 3 0 0 0 100 6 0 0 14 18 7 14 1 0 0 0 860 0 0 0 100 7 0 0 7 11 3 6 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:16:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 140 1 0 0 0 1081 0 1 0 98 1 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 307 0 0 0 100 4 0 0 2 210 101 4 0 0 0 0 0 0 0 0 100 5 0 0 4 309 151 102 0 1 0 0 0 0 0 0 100 6 0 0 14 16 6 12 1 0 0 0 862 0 0 0 100 7 20 0 7 17 4 14 0 2 0 0 265 0 0 0 100 March 4, 2026 at 01:16:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 150 1 1 0 0 1081 0 2 0 98 1 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 302 0 0 0 100 4 0 0 4 211 103 4 0 0 0 0 2 0 0 0 100 5 0 0 2 307 151 100 0 0 0 0 0 0 0 0 100 6 0 0 14 15 6 12 0 0 0 0 862 0 0 0 100 7 0 0 7 13 3 8 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:16:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 140 1 0 0 0 1083 0 2 0 98 1 0 0 0 26 7 24 0 1 0 0 11 0 0 0 100 2 0 0 0 13 2 12 0 0 0 0 11 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 4 0 0 4 211 104 2 0 0 0 0 0 0 0 0 100 5 0 0 2 312 151 108 0 0 0 0 5 0 0 0 100 6 0 0 14 15 6 12 0 0 0 0 860 0 0 0 100 7 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:16:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 68 1 3 3 0 1081 0 2 0 98 1 0 0 0 97 6 92 1 4 0 0 8 0 0 0 100 2 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 3 0 0 0 14 4 10 0 0 0 0 301 0 0 0 100 4 0 0 5 214 103 10 0 0 1 0 2 0 0 0 100 5 0 0 1 308 151 102 0 0 0 0 0 0 0 0 100 6 0 0 14 16 6 12 1 0 0 0 862 0 0 0 100 7 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:16:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 602 0 10 2629 103 850 27 68 126 29 3951 5 5 0 90 1 3753 0 31 654 21 984 20 62 76 39 2758 8 5 0 87 2 899 0 1 507 6 696 30 67 85 29 2621 4 3 0 93 3 1047 0 62 406 5 583 22 50 151 23 2436 4 3 0 93 4 446 0 102 577 103 603 25 47 48 19 2661 5 2 0 93 5 916 0 68 561 110 511 27 37 137 16 1933 8 3 0 90 6 39922 0 335 414 19 661 38 30 87 48 5874 21 16 0 63 7 3387 0 80 419 13 657 15 48 121 37 3113 8 3 0 89 March 4, 2026 at 01:16:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2116 101 46 1 4 1 0 1106 0 2 0 98 1 5 0 42 11 0 8 0 3 1 0 269 0 1 0 99 2 6 0 0 121 2 106 1 0 2 0 9 0 1 0 99 3 9 0 0 23 3 12 0 0 0 0 320 0 0 0 100 4 44 0 16 228 107 20 0 1 0 0 17 0 0 0 100 5 2 0 4 224 101 10 0 2 1 0 9 0 0 0 100 6 23 0 0 23 4 12 0 1 0 0 610 0 0 0 100 7 18 0 14 126 57 118 0 1 1 0 282 0 0 0 100 March 4, 2026 at 01:16:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 101 136 3 3 0 0 1103 0 2 0 98 1 0 0 35 44 1 6 0 1 2 0 266 0 1 0 99 2 0 0 231 14 1 8 0 0 2 0 0 0 1 0 99 3 0 0 0 47 2 8 0 1 1 0 301 0 0 0 100 4 0 0 2 258 108 16 0 0 0 0 9 0 0 0 100 5 0 0 4 248 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 47 3 6 0 0 0 0 595 0 0 0 100 7 0 0 7 156 55 117 0 2 0 0 260 0 0 0 100 March 4, 2026 at 01:16:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 115 0 4 1 0 1104 0 2 0 98 1 0 0 14 43 2 42 0 2 0 0 272 0 0 0 100 2 0 0 0 19 5 18 0 0 0 0 13 0 0 0 100 3 0 0 0 11 2 6 0 1 1 0 301 0 0 0 100 4 0 0 3 229 113 22 1 1 0 0 11 0 0 0 100 5 0 0 3 213 101 8 0 0 0 0 5 0 0 0 100 6 0 0 0 13 4 8 0 0 0 0 596 0 0 0 100 7 0 0 7 120 56 114 0 1 0 0 261 0 0 0 100 March 4, 2026 at 01:16:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 598 0 40 2504 106 575 8 68 152 62 1885 2 4 0 94 1 1113 0 38 489 4 673 12 69 140 48 3061 2 3 0 95 2 1500 0 13 388 2 690 19 62 135 66 1627 4 3 0 93 3 264 0 2 392 74 480 10 57 148 35 1789 2 2 0 96 4 129 0 61 523 114 437 5 50 101 34 1585 2 2 0 97 5 531 0 16 511 108 443 5 41 121 24 1226 1 3 0 96 6 6929 0 316 310 3 587 12 36 152 59 4577 6 7 0 87 7 15858 0 142 372 41 560 10 46 142 56 3603 9 7 0 84 March 4, 2026 at 01:16:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5416 0 91 2416 103 448 15 40 64 10 2306 10 6 0 84 1 721 0 22 321 13 469 11 41 48 23 2996 7 4 0 89 2 680 0 17 303 4 526 29 59 80 13 1500 3 2 0 95 3 1045 0 79 263 4 432 19 38 117 12 1654 3 2 0 95 4 252 0 36 532 143 438 30 30 28 7 1074 3 2 0 95 5 1085 0 17 432 104 318 13 21 97 7 1269 2 2 0 96 6 424 0 5 238 4 324 19 23 113 3 1546 2 1 0 97 7 27027 0 224 183 2 219 12 11 103 19 2133 13 11 0 76 March 4, 2026 at 01:16:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2171 108 94 1 2 1 0 272 0 3 0 97 1 3 0 364 25 2 52 0 1 3 0 1371 0 2 0 98 2 0 0 0 66 2 6 0 0 0 0 0 0 0 0 100 3 0 0 0 95 3 36 0 3 0 0 302 0 0 0 100 4 0 0 3 372 159 104 0 0 1 0 0 0 1 0 99 5 0 0 3 277 101 12 0 3 0 0 0 0 0 0 100 6 0 0 0 66 3 6 0 0 0 0 596 0 0 0 100 7 0 0 0 70 2 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:16:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2118 108 108 0 3 0 0 269 0 2 0 98 1 0 0 14 26 2 5 0 1 0 0 874 0 0 0 99 2 0 0 0 26 2 6 0 0 0 0 0 0 0 0 100 3 0 0 0 49 2 26 0 0 0 0 301 0 0 0 100 4 0 0 3 334 161 104 0 0 0 0 2 0 0 0 100 5 0 0 3 226 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 27 3 6 0 0 0 0 595 0 0 0 100 7 0 0 0 27 2 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2117 108 36 1 3 2 0 270 0 2 0 98 1 1 0 14 101 1 132 2 1 1 0 773 0 0 0 100 2 0 0 0 25 4 26 0 2 0 0 7 0 0 0 100 3 0 0 0 11 2 4 0 0 0 0 301 0 0 0 100 4 0 0 4 313 154 104 0 1 0 0 0 0 0 0 100 5 0 0 2 213 101 8 0 1 3 0 8 0 0 0 100 6 0 0 0 21 3 12 1 2 0 0 594 0 0 0 100 7 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6335 0 202 2768 123 1000 9 95 252 79 3650 6 8 0 86 1 5647 0 39 626 3 865 20 87 230 71 4185 8 6 0 86 2 665 0 31 493 6 812 8 86 159 57 2708 3 4 0 93 3 592 0 22 529 95 777 45 79 237 45 1905 2 3 0 94 4 862 0 83 607 131 709 7 70 130 45 2265 3 4 0 93 5 295 0 11 569 101 478 20 57 111 40 1231 2 3 0 95 6 35943 0 23 426 4 388 28 35 46 28 2313 21 12 0 67 7 9649 0 418 334 6 603 21 41 112 85 6203 7 8 0 85 March 4, 2026 at 01:16:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 659 0 133 2309 106 307 16 28 64 2 1698 5 4 0 90 1 216 0 0 245 6 355 15 28 41 0 2329 6 2 0 92 2 797 0 49 262 2 316 16 29 52 5 1103 3 2 0 95 3 656 0 0 187 3 242 10 17 41 0 1198 3 2 0 96 4 371 0 58 426 107 335 7 20 83 3 1413 2 1 0 97 5 471 0 30 466 149 334 10 20 42 5 584 2 1 0 97 6 395 0 46 161 2 253 18 14 58 3 1055 2 1 0 97 7 172 0 9 168 3 239 9 13 32 1 744 2 1 0 97 March 4, 2026 at 01:16:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2190 110 35 2 4 1 0 593 0 3 0 97 1 0 0 462 89 2 114 1 1 4 0 1101 0 2 0 98 2 2 0 14 100 2 24 0 1 0 0 266 0 1 0 99 3 0 0 0 84 3 6 0 0 0 0 1 0 0 0 100 4 0 0 2 314 110 31 0 2 0 0 303 0 0 0 99 5 0 0 4 382 152 104 0 1 0 0 0 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 301 0 0 0 100 7 0 0 0 81 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2122 109 24 1 2 0 0 563 0 1 0 99 1 0 0 0 26 3 46 1 1 0 0 1104 0 0 0 100 2 0 0 14 81 2 80 1 1 0 0 266 0 1 0 99 3 0 0 0 32 2 24 0 2 0 0 0 0 0 0 100 4 0 0 4 215 106 6 0 2 1 0 301 0 0 0 100 5 0 0 2 313 152 110 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 2 1 0 0 0 301 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2122 110 53 1 4 0 0 563 0 1 0 98 1 0 0 0 101 5 127 2 2 1 0 1121 0 1 0 99 2 0 0 14 19 2 16 0 1 0 0 271 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 2 224 114 6 0 0 0 0 303 0 0 0 100 5 1 0 4 314 152 110 0 1 3 0 7 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 302 0 0 0 100 7 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:16:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31110 0 493 2798 109 1243 75 79 256 79 8459 23 17 0 60 1 6524 0 202 755 9 1223 22 115 356 110 5358 8 7 0 84 2 5722 0 47 878 20 1431 32 99 357 69 3937 9 7 0 84 3 1193 0 62 665 78 1031 24 90 252 76 3084 5 4 0 91 4 1021 0 161 864 115 1000 27 94 205 41 3387 9 5 0 87 5 3867 0 49 940 116 967 17 74 262 39 3501 8 5 0 87 6 722 0 25 592 3 803 14 64 178 36 3296 5 3 0 92 7 13579 0 34 465 7 698 34 41 96 25 2612 12 10 0 79 March 4, 2026 at 01:16:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2116 103 40 0 4 4 0 566 0 3 0 97 1 2 0 0 35 2 50 2 1 3 0 1119 0 1 0 99 2 17 0 14 110 20 90 0 1 1 0 293 0 0 0 100 3 0 0 0 90 34 74 0 1 0 0 14 0 0 0 100 4 7 0 16 231 106 20 0 2 3 0 319 0 1 0 99 5 23 0 4 231 105 10 0 1 0 0 17 0 0 0 100 6 1 0 7 40 1 26 0 5 0 0 303 0 0 0 100 7 44 0 0 65 6 50 1 3 0 0 17 0 0 0 100 March 4, 2026 at 01:16:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2182 103 45 2 4 1 0 555 0 3 0 97 1 0 0 0 164 3 114 0 2 1 0 1099 0 1 0 99 2 1 0 14 81 2 6 1 0 0 0 266 0 0 0 100 3 0 0 0 182 52 106 0 0 0 0 1 0 0 0 100 4 0 0 466 227 106 18 0 0 2 0 301 0 1 0 99 5 0 0 2 281 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 83 1 4 1 1 0 0 301 0 0 0 100 7 0 0 0 96 7 18 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:16:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 18 0 1 0 0 553 0 1 0 99 1 0 0 0 109 2 134 1 3 1 0 1098 0 0 0 99 2 0 0 14 12 2 10 0 3 2 0 266 0 0 0 100 3 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 4 0 0 3 213 105 6 0 1 0 0 303 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 301 0 0 0 100 7 0 0 0 22 8 16 1 0 0 0 9 0 0 0 100 March 4, 2026 at 01:16:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 38 2218 103 64 0 11 2 8 657 0 2 0 98 1 17 0 1 206 4 207 1 8 16 8 1294 0 1 0 98 2 3304 0 143 92 3 150 5 9 37 25 2476 1 4 0 95 3 102 0 7 203 51 258 0 18 16 33 413 0 1 0 99 4 52 0 7 298 107 139 2 14 16 22 638 0 1 0 99 5 28 0 5 283 102 110 0 12 21 13 351 0 1 0 99 6 37 0 3 75 1 236 2 12 17 18 613 0 0 0 99 7 11 0 3 103 11 93 0 6 7 9 186 0 0 0 99 March 4, 2026 at 01:16:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 768 0 105 2796 107 1157 48 104 197 28 3686 4 7 0 89 1 1030 0 51 660 4 915 57 81 224 17 3976 6 5 0 88 2 43720 0 526 571 6 912 64 67 220 58 7253 32 20 0 48 3 10271 0 46 780 92 878 42 78 254 62 3286 12 6 0 82 4 1646 0 136 771 108 946 35 91 274 65 2935 4 4 0 92 5 1153 0 27 705 103 816 25 87 249 42 2569 4 4 0 91 6 428 0 44 503 23 724 28 76 145 28 2956 4 2 0 94 7 1075 0 11 495 3 781 30 65 166 34 3289 8 4 0 88 March 4, 2026 at 01:16:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2162 101 21 1 4 1 0 302 0 2 0 98 1 44 0 350 40 9 64 3 3 4 0 1403 0 1 0 98 2 0 0 0 163 0 104 0 3 0 0 1 0 0 0 100 3 12 0 14 172 54 112 1 0 0 0 276 0 1 0 99 4 1 0 15 271 104 10 0 1 1 0 303 0 0 0 100 5 16 0 6 267 101 10 0 2 1 0 13 0 0 0 100 6 2 0 0 64 1 4 0 1 0 0 310 0 0 0 100 7 20 0 0 74 6 12 0 1 0 0 17 0 0 0 100 March 4, 2026 at 01:16:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2111 103 21 0 1 0 0 294 0 2 0 98 1 0 0 7 47 10 54 1 2 1 0 1374 0 1 0 99 2 0 0 0 128 1 104 0 0 0 0 0 0 0 0 100 3 0 0 14 132 55 113 0 1 0 0 267 0 0 0 100 4 0 0 4 232 104 6 0 1 0 0 301 0 0 0 100 5 0 0 2 232 103 8 0 1 2 0 2 0 0 0 100 6 0 0 0 28 2 6 0 1 0 0 301 0 0 0 100 7 0 0 0 31 3 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:16:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 102 19 0 1 0 0 294 0 1 0 99 1 0 0 7 28 10 50 3 0 0 0 1373 0 1 0 99 2 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 3 0 0 14 112 53 106 0 0 0 0 266 0 0 0 100 4 0 0 2 213 104 6 0 1 0 0 301 0 0 0 100 5 0 0 4 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 301 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14275 0 132 2465 103 446 30 26 41 43 3533 10 8 0 82 1 3178 0 24 396 9 423 9 38 55 37 2822 5 3 0 92 2 8480 0 326 362 8 593 21 48 87 61 4160 5 8 0 88 3 2558 0 40 392 43 723 17 63 76 54 2544 3 4 0 94 4 212 0 93 491 106 477 7 47 39 50 2269 2 2 0 96 5 184 0 15 485 102 428 6 37 46 36 1417 2 2 0 97 6 208 0 6 350 3 425 6 40 48 56 1543 1 1 0 97 7 397 0 11 268 11 319 10 28 43 26 857 1 1 0 98 March 4, 2026 at 01:16:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23696 0 33 2534 127 602 21 35 209 10 2302 14 14 0 72 1 941 0 8 538 15 860 19 35 148 13 3196 4 4 0 92 2 4094 0 179 324 2 582 28 42 186 20 2490 7 4 0 88 3 3132 0 23 376 75 462 12 42 135 27 1730 6 3 0 91 4 694 0 140 505 105 507 10 43 268 16 1405 5 4 0 91 5 680 0 24 490 105 432 16 34 193 20 1400 3 2 0 95 6 631 0 52 327 2 582 12 26 149 13 1943 3 2 0 94 7 293 0 16 233 19 317 2 25 137 7 1057 2 1 0 97 March 4, 2026 at 01:16:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 102 78 0 2 0 0 0 0 2 0 98 1 0 0 357 160 55 179 2 3 5 0 1666 0 2 0 98 2 0 0 0 65 1 6 0 0 0 0 9 0 0 0 100 3 3 0 14 67 2 12 0 0 0 0 284 0 0 0 100 4 0 0 39 267 104 11 0 2 3 0 300 0 2 0 98 5 44 0 2 279 109 16 0 1 0 0 12 0 0 0 100 6 0 0 0 62 1 2 0 0 0 0 301 0 0 0 100 7 0 0 0 62 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 102 99 0 4 0 0 0 0 1 0 99 1 8 0 7 75 10 78 2 2 0 0 1657 0 1 0 99 2 0 0 0 113 45 92 0 1 0 0 0 0 0 0 100 3 0 0 14 26 3 8 0 0 0 0 267 0 0 0 100 4 0 0 115 212 103 7 0 1 0 0 301 0 1 0 99 5 0 0 3 236 107 12 0 0 0 0 8 0 0 0 100 6 0 0 0 23 1 2 0 0 0 0 301 0 0 0 100 7 0 0 0 28 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:16:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 86 0 0 0 0 0 0 1 0 99 1 0 0 7 48 5 74 0 2 0 0 1655 0 0 0 99 2 0 0 0 108 50 106 0 1 0 0 0 0 0 0 100 3 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 4 0 0 8 212 103 6 0 0 0 0 301 0 0 0 100 5 0 0 5 223 108 16 0 0 0 0 11 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 301 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 304 0 24 2496 102 522 3 58 49 46 1430 2 6 0 93 1 235 0 31 325 7 405 11 52 41 27 2912 2 4 0 94 2 40017 0 327 335 24 505 21 41 73 70 4437 18 15 0 67 3 8213 0 169 380 5 518 12 42 84 67 4116 9 6 0 85 4 3992 0 289 536 116 561 8 57 89 74 3126 6 5 0 89 5 2934 0 7 600 122 601 7 57 75 67 1996 3 3 0 94 6 626 0 12 314 4 414 6 55 62 48 1695 2 2 0 96 7 2332 0 19 328 1 341 6 44 57 42 1450 7 2 0 91 March 4, 2026 at 01:16:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 774 0 10 2495 105 656 21 45 146 9 1897 9 4 0 87 1 721 0 90 374 6 577 17 49 153 9 3077 4 4 0 92 2 332 0 24 378 2 608 31 35 127 7 1453 4 2 0 93 3 1044 0 71 384 77 557 27 37 274 6 1542 3 3 0 94 4 309 0 49 527 120 474 3 37 247 2 1408 2 3 0 94 5 187 0 17 548 130 564 18 26 176 1 1381 3 2 0 95 6 1080 0 54 266 5 450 23 25 123 1 2048 7 2 0 91 7 950 0 10 306 5 472 14 27 123 7 1530 4 2 0 95 March 4, 2026 at 01:16:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2189 107 40 0 2 0 0 9 0 2 0 98 1 0 0 49 128 5 86 3 4 1 0 1658 0 2 0 97 2 0 0 462 51 0 38 0 3 1 0 0 0 1 0 99 3 4 0 14 92 3 16 0 0 0 0 269 0 0 0 99 4 0 0 3 286 104 10 0 1 0 0 301 0 1 0 99 5 0 0 3 383 152 104 0 0 0 0 0 0 0 0 100 6 0 0 0 82 2 6 0 1 0 0 303 0 0 0 100 7 0 0 0 82 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 92 0 4 0 0 9 0 1 0 99 1 0 0 7 49 5 70 2 2 1 0 1655 0 0 0 99 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 14 3 10 0 0 0 0 268 0 0 0 100 4 0 0 1 214 105 8 0 0 0 0 301 0 1 0 99 5 0 0 5 315 155 108 0 0 0 0 6 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 302 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 98 0 2 0 0 10 0 1 0 99 1 0 0 7 47 5 70 1 4 1 0 1655 0 0 0 99 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 7 2 4 1 0 0 0 266 0 0 0 100 4 0 0 1 220 109 10 0 1 1 0 301 0 1 0 99 5 0 0 5 316 152 114 0 2 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 138 0 23 2291 131 324 5 32 34 26 641 1 3 0 97 1 158 0 14 213 17 346 1 26 26 22 2186 1 2 0 97 2 239 0 3 166 1 131 3 16 30 12 285 0 1 0 99 3 9 0 14 95 3 63 0 8 11 5 447 0 1 0 99 4 6800 0 310 321 113 180 12 8 60 38 3429 6 6 0 88 5 4812 0 27 458 122 334 7 23 73 39 999 4 3 0 93 6 386 0 14 198 3 299 5 40 52 52 1113 1 1 0 98 7 387 0 12 190 3 238 3 24 32 25 636 1 1 0 98 March 4, 2026 at 01:17:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2107 101 59 0 4 0 0 0 0 2 0 98 1 0 0 8 170 56 191 3 4 3 0 1655 0 1 0 98 2 0 0 0 40 0 28 0 1 0 0 0 0 0 0 100 3 0 0 14 15 2 6 0 0 2 0 266 0 0 0 100 4 0 0 2 219 105 8 0 0 0 0 301 0 0 0 100 5 64 0 4 221 105 10 0 0 0 0 8 0 0 0 100 6 0 0 0 16 2 6 0 0 0 0 301 0 0 0 100 7 0 0 7 16 1 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:17:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 101 112 0 4 2 0 0 0 2 0 98 1 0 0 238 51 19 78 0 4 2 0 1642 0 1 0 99 2 0 0 0 112 36 74 0 1 0 0 0 0 0 0 100 3 0 0 14 40 2 4 0 0 0 0 266 0 0 0 100 4 0 0 2 248 106 8 0 0 0 0 301 0 0 0 100 5 0 0 4 250 106 10 0 0 0 0 10 0 0 0 100 6 0 0 0 46 2 8 0 2 0 0 301 0 0 0 100 7 0 0 0 45 1 6 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:17:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2106 102 90 0 2 0 0 0 0 2 0 98 1 0 0 7 45 5 68 2 3 2 0 1638 0 1 0 99 2 0 0 0 108 50 100 0 0 0 0 0 0 0 0 100 3 0 0 14 12 3 6 1 0 0 0 267 0 0 0 100 4 0 0 4 216 104 8 0 0 0 0 301 0 0 0 100 5 0 0 2 220 106 10 0 0 0 0 8 0 0 0 100 6 0 0 0 19 1 10 1 0 0 0 301 0 0 0 100 7 0 0 0 15 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 80 0 0 0 0 0 0 1 0 99 1 0 0 7 45 5 68 2 3 0 0 1642 0 0 0 99 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 2 0 14 10 2 4 3 0 0 0 397 2 0 0 98 4 0 0 3 222 111 8 0 0 0 0 301 0 0 0 100 5 0 0 3 221 108 14 0 0 0 0 8 0 0 0 100 6 0 0 0 18 2 14 0 1 0 0 302 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2122 107 44 0 4 0 0 14 0 1 0 99 1 0 0 7 53 5 80 3 4 1 0 1654 0 1 0 99 2 0 0 0 170 50 168 0 3 0 0 5 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 3 222 111 8 0 0 0 0 301 0 0 0 100 5 0 0 3 217 104 10 0 1 0 0 7 0 0 0 100 6 0 0 0 27 3 29 0 4 0 0 321 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 106 66 0 2 0 0 8 0 1 0 99 1 0 0 7 51 7 76 0 2 2 0 1639 0 1 0 99 2 0 0 0 134 50 128 0 2 2 0 0 0 0 0 100 3 0 0 14 12 2 14 0 1 3 0 266 0 0 0 100 4 0 0 3 220 111 8 0 0 0 0 301 0 0 0 100 5 20 0 3 212 103 6 0 0 0 0 7 0 0 0 100 6 0 0 0 16 2 10 0 0 0 0 301 0 0 0 100 7 23 0 0 12 2 10 0 1 0 0 5 0 0 0 100 March 4, 2026 at 01:17:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 106 78 0 2 0 0 8 0 1 0 99 1 0 0 7 46 5 68 2 2 1 0 1636 0 1 0 99 2 0 0 0 117 50 110 0 2 0 0 0 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 267 0 0 0 100 4 0 0 3 219 110 8 0 0 0 0 301 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 15 1 10 0 0 0 0 301 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 106 40 0 2 0 0 5 0 1 0 99 1 0 0 7 20 5 42 1 0 1 0 1638 0 0 0 99 2 0 0 0 182 50 176 0 2 0 0 0 0 0 0 100 3 0 0 14 11 3 8 0 0 0 0 267 0 0 0 100 4 0 0 5 219 106 16 0 1 0 0 301 0 0 0 100 5 0 0 1 209 102 2 0 0 0 0 2 0 0 0 100 6 0 0 0 18 2 12 1 0 0 0 302 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 107 0 3 1 0 8 0 1 0 99 1 0 0 7 27 5 50 1 2 2 0 1636 0 0 0 99 2 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 3 223 107 18 0 0 0 0 301 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 15 1 10 0 0 0 0 301 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 757 0 20 2666 108 1004 17 62 75 39 4045 6 6 0 89 1 936 0 53 542 7 902 51 66 92 30 3879 4 4 0 92 2 644 0 43 482 23 591 18 47 113 13 2475 5 2 0 93 3 237 0 16 522 23 713 18 38 100 14 2304 4 3 0 93 4 40045 0 409 631 112 696 52 35 162 43 5267 27 18 0 55 5 5988 0 45 698 102 734 28 49 101 37 3504 9 5 0 86 6 1560 0 60 516 5 984 21 65 175 42 3113 5 3 0 91 7 901 0 4 377 7 652 14 52 73 21 3243 5 2 0 93 March 4, 2026 at 01:17:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2155 101 136 0 12 109 0 38 0 3 0 97 1 3 0 0 101 6 152 3 11 87 0 1424 0 1 0 99 2 65 0 14 121 8 159 2 11 88 0 281 0 1 0 99 3 6 0 14 119 77 88 5 4 82 0 274 0 1 0 99 4 17 0 18 263 103 106 0 12 93 0 35 1 1 0 98 5 0 0 2 273 104 96 0 12 63 0 313 0 0 0 99 6 5 0 0 59 1 87 2 8 95 0 322 4 0 0 96 7 63 0 0 160 52 200 0 7 124 0 27 0 1 0 99 March 4, 2026 at 01:17:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 101 32 0 1 0 0 0 0 2 0 98 1 0 0 231 17 3 42 0 1 1 0 1397 0 1 0 99 2 0 0 7 137 7 96 1 2 0 0 264 0 0 0 99 3 2 0 14 44 3 10 0 2 0 0 273 0 0 0 100 4 0 0 2 241 102 2 0 0 0 0 0 0 0 0 100 5 0 0 4 247 103 8 0 0 1 0 300 0 0 0 100 6 0 0 0 45 3 8 0 1 0 0 304 0 0 0 100 7 0 0 0 143 52 106 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:17:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2103 101 86 0 1 0 0 0 0 2 0 98 1 0 0 0 43 3 64 1 2 1 0 1397 0 0 0 99 2 0 0 7 13 2 4 0 0 0 0 260 0 0 0 100 3 0 0 14 24 9 18 0 0 0 0 276 0 0 0 100 4 0 0 3 213 104 2 0 0 0 0 0 0 0 0 100 5 0 0 3 215 103 6 0 0 0 0 301 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 301 0 0 0 100 7 0 0 0 116 52 108 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:17:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 40 0 3 0 0 0 0 1 0 99 1 0 0 0 15 3 36 2 0 1 0 1398 0 0 0 99 2 0 0 7 85 2 80 0 2 0 0 260 0 0 0 100 3 0 0 14 22 9 18 1 0 0 0 273 0 0 0 100 4 0 0 1 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 6 212 103 6 0 0 0 0 301 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 303 0 0 0 100 7 0 0 0 116 52 111 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:17:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 550 0 27 2823 102 1081 18 89 284 49 3543 5 6 0 89 1 2036 0 91 716 32 1023 33 69 169 40 4349 6 5 0 90 2 2146 0 212 604 2 888 31 73 77 35 4408 11 6 0 82 3 496 0 22 524 7 690 21 57 93 36 3238 5 4 0 92 4 45652 0 506 793 110 970 44 48 167 97 7530 25 21 0 55 5 10981 0 133 849 116 877 34 75 280 72 3567 14 7 0 79 6 1466 0 31 640 4 1116 19 80 285 83 3871 6 4 0 91 7 678 0 36 408 5 744 29 74 158 75 2789 7 3 0 90 March 4, 2026 at 01:17:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 70 2163 105 108 0 11 74 0 20 0 4 0 96 1 0 0 1 106 4 165 4 10 75 0 1419 0 2 0 98 2 21 0 7 98 3 127 0 11 104 0 272 0 1 0 99 3 29 0 14 165 73 164 14 12 109 0 277 0 1 0 99 4 11 0 23 312 127 141 0 14 66 0 20 0 1 0 99 5 0 0 4 315 129 132 0 6 73 0 312 0 1 0 99 6 17 0 0 61 5 76 0 10 56 0 310 0 0 0 99 7 7 0 0 80 3 120 0 10 79 0 4 0 0 0 100 March 4, 2026 at 01:17:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2149 107 28 0 1 2 0 9 0 3 0 97 1 0 0 238 20 3 46 0 1 4 0 1395 0 1 0 98 2 0 0 7 46 2 6 1 0 0 0 260 0 0 0 100 3 2 0 14 137 3 97 0 1 0 0 267 0 0 0 100 4 0 0 3 350 154 108 1 1 1 0 0 0 1 0 99 5 0 0 3 249 103 8 0 1 0 0 301 0 1 0 99 6 0 0 0 43 1 2 0 0 0 0 301 0 0 0 100 7 0 0 0 52 2 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 238 2117 106 31 0 3 0 0 8 0 2 0 98 1 0 0 0 138 4 126 1 2 2 0 1397 0 1 0 99 2 0 0 7 43 2 4 0 0 0 0 260 0 0 0 100 3 0 0 14 46 3 8 1 0 0 0 267 0 0 0 100 4 0 0 3 344 152 104 0 1 1 0 0 0 0 0 100 5 0 0 3 251 103 16 0 1 0 0 301 0 1 0 99 6 0 0 0 44 2 4 1 0 0 0 303 0 0 0 100 7 0 0 0 49 1 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 662 0 28 2349 109 337 3 28 34 23 1018 2 3 0 95 1 251 0 18 307 4 434 3 33 21 25 2623 2 2 0 96 2 303 0 9 223 2 240 9 19 27 18 1167 1 1 0 98 3 82 0 17 219 2 260 9 22 16 11 1242 1 1 0 98 4 6852 0 333 433 145 338 10 22 64 48 3782 5 6 0 89 5 4586 0 34 458 107 243 5 27 60 26 1549 6 3 0 91 6 561 0 10 187 5 310 1 30 61 37 1571 2 2 0 96 7 342 0 10 205 1 439 5 36 41 32 1450 2 1 0 97 March 4, 2026 at 01:17:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33966 0 99 2646 102 791 35 75 108 32 3307 19 16 0 65 1 1030 0 73 625 7 867 51 68 135 17 4063 4 4 0 91 2 245 0 9 559 3 782 39 69 33 21 2668 5 3 0 92 3 478 0 29 518 20 770 41 57 70 22 2789 5 3 0 92 4 7032 0 411 703 110 839 54 58 155 44 3836 12 6 0 82 5 6092 0 72 753 115 701 36 53 157 29 4257 9 5 0 86 6 803 0 15 484 22 702 42 61 96 40 1992 3 2 0 94 7 873 0 7 420 3 695 30 68 78 34 2921 9 3 0 88 March 4, 2026 at 01:17:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2208 100 180 1 14 74 0 17 0 3 0 97 1 0 0 343 84 5 134 2 13 57 0 1726 0 2 0 98 2 9 0 7 117 3 109 1 5 71 0 293 0 1 0 99 3 21 0 14 163 75 106 9 10 107 0 274 0 1 0 99 4 24 0 18 299 102 91 0 8 91 0 12 0 1 0 99 5 25 0 2 294 103 62 2 7 74 0 14 0 1 0 99 6 6 0 0 216 51 195 0 8 86 0 9 0 1 0 99 7 45 0 0 122 6 118 1 16 96 0 309 0 0 0 99 March 4, 2026 at 01:17:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2122 100 6 0 2 0 0 0 0 2 0 98 1 0 0 119 26 5 48 1 2 3 0 1699 0 1 0 99 2 0 0 7 34 4 12 0 0 0 0 269 0 0 0 100 3 0 0 14 31 2 10 1 0 0 0 284 0 0 0 100 4 0 0 3 310 102 86 0 2 0 0 0 0 0 0 100 5 0 0 3 241 107 14 0 0 0 0 8 0 0 0 100 6 0 0 0 146 51 118 0 0 0 0 2 0 0 0 100 7 0 0 0 29 2 4 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:17:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 28 0 3 2 0 26 0 1 0 99 1 0 0 0 32 5 56 1 2 3 0 1697 0 0 0 99 2 0 0 7 12 3 6 0 0 0 0 260 0 0 0 100 3 0 0 14 13 3 8 0 0 0 0 267 0 0 0 100 4 0 0 4 293 103 82 0 0 0 0 0 0 0 0 100 5 0 0 2 224 108 16 0 0 0 0 9 0 0 0 100 6 0 0 0 107 50 100 0 0 0 0 0 0 0 0 100 7 0 0 0 15 2 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:17:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1627 0 6 2518 102 477 6 40 54 38 1406 6 3 0 91 1 429 0 12 344 5 484 11 41 68 35 3194 2 3 0 95 2 722 0 27 216 6 390 7 33 36 27 2210 4 3 0 94 3 427 0 18 269 17 293 7 33 39 23 1308 1 2 0 97 4 36650 0 465 431 102 415 17 32 276 73 6183 17 13 0 70 5 699 0 26 519 110 558 2 64 199 54 1650 2 2 0 96 6 3452 0 25 297 32 444 7 45 80 48 1604 3 3 0 94 7 412 0 32 275 2 492 6 46 77 41 1562 2 2 0 97 March 4, 2026 at 01:17:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3520 0 60 2650 101 897 64 75 132 11 3208 12 6 0 82 1 942 0 1 631 6 943 46 74 87 8 3911 6 4 0 90 2 445 0 7 684 37 1112 62 64 52 9 5125 6 4 0 90 3 504 0 0 595 10 775 26 51 74 5 2585 5 3 0 92 4 10049 0 357 688 110 713 26 53 192 21 3573 12 9 0 79 5 3001 0 24 741 103 807 34 46 110 18 2464 6 4 0 90 6 473 0 14 455 7 787 30 53 109 21 2112 4 2 0 94 7 799 0 122 391 3 747 54 52 102 18 2224 4 4 0 92 March 4, 2026 at 01:17:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2231 106 191 0 10 111 0 9 0 2 0 98 1 0 0 462 72 5 98 1 7 77 0 597 0 1 0 98 2 0 0 7 236 55 244 2 10 98 0 1362 0 2 0 98 3 0 0 0 176 69 95 7 10 95 0 0 0 1 0 99 4 3 0 18 328 109 93 1 8 96 0 266 0 1 0 99 5 0 0 2 325 102 90 0 6 95 0 0 0 1 0 99 6 0 0 0 121 2 85 0 5 85 0 2 0 0 0 100 7 0 0 42 121 2 94 0 7 103 0 301 0 2 0 98 March 4, 2026 at 01:17:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 106 114 1 0 0 0 9 0 1 0 99 1 0 0 0 22 4 16 0 0 0 0 595 0 0 0 100 2 0 0 7 113 54 138 1 0 1 0 1359 0 1 0 99 3 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 4 0 0 17 213 107 4 0 1 0 0 266 0 0 0 100 5 0 0 3 213 102 10 0 1 1 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:17:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 114 0 0 0 0 9 0 1 0 99 1 0 0 0 21 4 16 0 0 0 0 594 0 0 0 100 2 0 0 7 41 18 64 1 0 0 0 1359 0 0 0 99 3 0 0 0 84 38 80 0 1 0 0 1 0 0 0 100 4 0 0 18 207 103 2 0 0 0 0 266 0 0 0 100 5 0 0 2 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 3 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:17:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 510 0 16 2736 108 1003 38 98 107 64 3157 5 6 0 90 1 604 0 31 643 6 962 34 87 77 46 3318 4 4 0 92 2 1910 0 206 623 4 900 26 72 91 45 4522 7 6 0 87 3 3047 0 23 644 25 812 19 60 58 40 2655 6 4 0 90 4 44989 0 527 680 105 730 35 53 113 78 9071 23 19 0 58 5 7750 0 42 852 118 1023 27 84 138 74 3510 9 6 0 86 6 649 0 15 552 6 907 35 79 94 65 3178 5 3 0 92 7 696 0 12 509 4 902 26 75 53 46 2936 4 3 0 94 March 4, 2026 at 01:17:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 573 0 27 2238 102 206 8 15 83 2 805 2 2 0 96 1 484 0 98 146 6 151 4 9 52 4 1052 6 2 0 92 2 684 0 48 250 52 339 18 18 96 3 1913 2 2 0 96 3 258 0 26 157 2 198 4 15 33 1 583 1 1 0 98 4 298 0 64 345 112 199 8 16 11 1 1126 6 1 0 93 5 452 0 36 324 103 164 10 18 28 1 751 2 1 0 97 6 634 0 0 176 4 167 4 9 32 0 789 2 1 0 97 7 335 0 30 100 4 116 3 12 71 0 635 1 1 0 98 March 4, 2026 at 01:17:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2234 102 187 0 7 96 0 322 0 2 0 98 1 0 0 42 126 4 98 0 6 82 0 594 0 2 0 98 2 0 0 462 95 17 172 2 8 90 0 1110 0 2 0 98 3 0 0 0 258 110 187 14 12 94 0 0 0 1 0 99 4 2 0 24 333 114 89 0 5 90 0 534 0 1 0 99 5 0 0 3 314 102 69 0 3 82 0 0 0 1 0 99 6 0 0 0 135 1 108 0 10 119 0 0 0 0 0 100 7 0 0 0 120 1 88 0 10 90 0 0 0 0 0 100 March 4, 2026 at 01:17:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 114 0 1 0 0 301 0 1 0 99 1 0 0 0 13 4 8 0 0 0 0 596 0 0 0 100 2 0 0 0 9 2 34 0 0 0 0 1110 0 0 0 99 3 0 0 0 110 51 104 0 0 0 0 0 0 0 0 100 4 0 0 23 227 115 20 1 0 0 0 537 0 0 0 99 5 0 0 4 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 19 3 14 0 0 0 0 3 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:17:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 109 1 1 0 0 301 0 1 0 98 1 0 0 0 15 4 12 0 1 1 0 594 0 0 0 100 2 0 0 0 11 2 34 2 0 0 0 1110 0 0 0 99 3 0 0 0 111 52 104 0 0 0 0 1 0 0 0 100 4 0 0 23 227 116 18 0 0 0 0 534 0 0 0 99 5 0 0 4 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3309 0 31 2942 102 1052 58 106 117 80 3646 10 6 0 83 1 1188 0 80 772 8 1057 54 103 248 49 4129 6 5 0 90 2 2861 0 264 684 4 1019 46 82 167 55 4473 11 6 0 83 3 632 0 13 660 23 895 45 81 109 44 3287 5 4 0 91 4 6311 0 279 759 113 854 58 59 171 52 5633 12 8 0 81 5 42070 0 325 731 103 851 36 68 110 91 6080 24 18 0 58 6 5590 0 33 652 2 931 20 77 169 51 3693 8 6 0 86 7 1645 0 37 683 23 1380 40 96 161 67 4628 4 4 0 92 March 4, 2026 at 01:17:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 2125 103 75 0 3 0 0 331 0 1 0 98 1 0 0 70 57 4 48 0 3 7 0 602 0 2 0 98 2 26 0 14 53 5 71 1 5 6 0 1391 0 2 0 98 3 51 0 0 60 20 44 0 1 0 0 26 0 0 0 100 4 0 0 22 228 107 10 0 0 0 0 287 0 0 0 100 5 0 0 12 278 123 60 1 3 2 0 14 0 1 0 99 6 8 0 0 60 18 48 0 1 0 0 23 0 0 0 100 7 0 0 0 21 1 2 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:17:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2220 102 97 0 10 104 0 301 0 2 0 98 1 0 0 42 135 4 111 0 8 85 0 596 0 2 0 98 2 2 0 14 222 4 215 1 10 73 0 1372 0 1 0 98 3 0 0 0 247 106 168 7 14 107 0 9 0 1 0 99 4 0 0 10 328 104 98 0 7 72 0 260 0 1 0 99 5 0 0 465 271 102 123 0 11 116 0 0 0 2 0 98 6 0 0 0 162 29 108 0 7 62 0 3 0 1 0 99 7 0 0 0 120 0 86 0 6 110 0 0 0 0 0 100 March 4, 2026 at 01:17:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 12 0 1 0 0 301 0 1 0 99 1 0 0 0 21 4 14 0 0 0 0 594 0 0 0 100 2 0 0 14 110 3 136 1 0 0 0 1370 0 1 0 99 3 0 0 0 121 58 116 0 0 0 0 10 0 0 0 100 4 0 0 10 211 105 4 0 0 0 0 260 0 0 0 100 5 0 0 3 210 102 4 0 0 0 0 0 0 1 0 99 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 72 0 20 2263 102 156 0 20 32 23 707 0 2 0 97 1 33 0 6 138 4 135 0 15 26 19 953 0 1 0 99 2 3617 0 29 259 3 236 4 13 44 14 1910 3 2 0 94 3 202 0 6 237 61 265 0 22 24 26 397 0 1 0 99 4 69 0 12 296 103 164 3 14 19 15 565 0 1 0 99 5 6457 0 317 323 102 219 7 8 35 40 3111 4 6 0 90 6 229 0 14 141 2 221 3 25 32 41 499 0 1 0 98 7 61 0 12 125 0 178 0 19 30 24 473 0 0 0 99 March 4, 2026 at 01:17:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 317 0 89 2660 103 787 27 65 100 11 3387 5 6 0 88 1 547 0 13 512 5 771 34 55 72 16 3943 5 4 0 91 2 41759 0 361 564 4 909 40 43 85 53 5924 24 16 0 60 3 5580 0 39 617 4 891 32 59 95 47 4458 9 5 0 85 4 1960 0 203 763 126 891 34 73 135 52 3863 8 4 0 87 5 1124 0 18 689 105 707 13 63 83 37 2242 9 4 0 87 6 1195 0 75 501 4 803 18 55 144 21 2297 4 3 0 93 7 520 0 2 439 23 672 20 49 60 24 2246 3 2 0 95 March 4, 2026 at 01:17:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 2163 103 16 0 1 2 0 311 0 2 0 98 1 7 0 343 31 5 26 1 2 3 0 613 0 1 0 98 2 0 0 0 161 1 108 0 2 0 0 17 0 1 0 99 3 12 0 14 66 3 40 1 2 1 0 1393 0 1 0 99 4 62 0 23 282 113 26 2 2 2 0 284 0 0 0 99 5 6 0 4 273 102 20 0 3 2 0 24 0 1 0 99 6 0 0 0 79 4 26 0 0 0 0 29 0 0 0 100 7 1 0 0 167 53 113 1 1 0 0 24 0 0 0 100 March 4, 2026 at 01:17:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2162 102 93 0 9 86 0 301 0 2 0 98 1 0 0 119 118 19 145 1 9 83 0 595 0 1 0 99 2 0 0 0 143 9 160 0 8 81 0 0 0 0 0 100 3 0 0 14 131 76 138 12 7 98 0 1370 0 1 0 99 4 2 0 11 287 109 118 0 5 85 0 270 0 1 0 99 5 0 0 2 270 103 84 0 8 53 0 0 0 1 0 99 6 0 0 0 81 1 96 0 6 64 0 0 0 0 0 100 7 0 0 0 126 26 159 0 9 102 0 0 0 0 0 100 March 4, 2026 at 01:17:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 18 0 1 0 0 301 0 2 0 98 1 0 0 0 17 4 8 0 0 0 0 595 0 0 0 100 2 0 0 0 208 51 202 0 2 0 0 0 0 0 0 100 3 0 0 14 12 3 36 2 0 0 0 1370 0 1 0 99 4 0 0 11 222 108 14 1 0 0 0 268 0 0 0 100 5 0 0 2 213 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 19 2 12 0 0 0 0 2 0 0 0 100 7 0 0 0 9 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:17:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 203 0 16 2283 102 153 1 21 33 21 647 0 2 0 97 1 99 0 8 146 4 114 0 15 13 11 842 0 1 0 98 2 6800 0 314 240 34 332 10 11 55 41 3121 5 6 0 89 3 4827 0 42 213 4 288 4 29 64 25 2331 4 4 0 92 4 223 0 16 412 129 290 2 31 36 35 1044 1 1 0 98 5 210 0 7 345 102 202 0 26 25 39 677 0 1 0 99 6 240 0 16 133 1 213 2 18 42 21 627 1 1 0 99 7 163 0 3 121 0 172 0 20 31 22 387 0 0 0 99 March 4, 2026 at 01:17:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2109 102 75 0 3 1 0 301 0 2 0 98 1 0 0 0 62 4 58 0 4 2 0 595 0 0 0 100 2 0 0 7 17 1 8 0 3 0 0 0 0 0 0 100 3 0 0 14 18 3 36 1 0 2 0 1380 0 0 0 99 4 0 0 8 319 155 106 0 0 0 0 264 0 0 0 100 5 0 0 5 215 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 19 2 10 0 2 0 0 2 0 0 0 100 7 64 0 0 20 5 8 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:17:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 231 2106 102 81 0 2 0 0 301 0 2 0 98 1 0 0 0 83 4 48 0 3 2 0 602 0 0 0 99 2 0 0 0 49 0 10 0 2 0 0 0 0 0 0 100 3 0 0 14 44 3 38 1 1 1 0 1366 0 1 0 99 4 0 0 11 346 156 104 1 0 0 0 260 0 0 0 100 5 0 0 2 252 102 16 0 0 0 0 5 0 0 0 100 6 0 0 0 58 5 22 1 3 0 0 15 0 0 0 100 7 0 0 0 47 4 10 0 1 0 0 11 0 0 0 100 March 4, 2026 at 01:17:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2112 102 10 0 1 4 0 301 0 1 0 99 1 0 0 0 19 4 8 0 0 0 0 595 0 0 0 100 2 0 0 0 109 0 102 0 2 0 0 0 0 0 0 100 3 0 0 14 14 3 36 3 0 2 0 1368 0 1 0 99 4 0 0 12 316 155 108 0 0 0 0 260 0 0 0 99 5 0 0 1 214 102 6 0 0 1 0 0 0 0 0 100 6 0 0 0 22 2 14 0 0 0 0 2 0 0 0 100 7 0 0 0 21 5 16 0 0 3 0 11 0 0 0 100 March 4, 2026 at 01:17:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 42 0 2 0 0 301 0 1 0 99 1 0 0 0 16 4 10 1 1 0 0 595 0 0 0 100 2 0 0 0 73 0 66 0 0 1 0 0 0 0 0 100 3 0 0 14 15 4 48 0 1 1 0 1367 0 1 0 99 4 0 0 11 308 152 104 1 0 0 0 260 0 0 0 100 5 0 0 2 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 17 6 12 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:17:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 104 84 1 0 0 0 302 0 1 0 99 1 0 0 0 42 5 38 0 2 0 0 595 0 0 0 100 2 0 0 0 12 1 6 0 1 0 0 0 0 0 0 100 3 0 0 14 15 4 42 1 0 1 0 1371 0 0 0 99 4 0 0 9 318 155 118 0 2 1 0 263 0 0 0 100 5 3 0 4 213 103 8 0 0 0 0 3 0 0 0 100 6 0 0 0 20 3 16 0 1 0 0 2 0 0 0 100 7 0 0 0 22 8 16 0 0 1 0 15 0 0 0 100 March 4, 2026 at 01:17:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 8 0 1 2 0 301 0 1 0 99 1 0 0 0 16 4 8 0 0 0 0 596 0 0 0 100 2 0 0 0 106 0 102 0 1 0 0 0 0 0 0 100 3 0 0 14 11 3 38 1 0 1 0 1373 0 1 0 99 4 0 0 10 311 154 106 0 0 0 0 260 0 0 0 100 5 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 6 1 0 0 19 3 14 0 0 0 0 6 0 0 0 100 7 21 0 0 21 8 16 0 0 0 0 19 0 0 0 100 March 4, 2026 at 01:17:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 30 0 3 0 0 302 0 1 0 99 1 0 0 0 38 5 34 0 2 0 0 603 0 0 0 100 2 0 0 0 72 0 64 0 0 0 0 0 0 0 0 100 3 0 0 14 10 3 36 2 0 0 0 1355 0 0 0 99 4 20 0 10 321 159 110 0 0 0 0 265 0 0 0 100 5 0 0 3 224 102 26 0 1 3 0 5 0 0 0 100 6 0 0 0 25 4 24 0 0 0 0 15 0 0 0 100 7 0 0 0 25 9 20 0 0 0 0 11 0 0 0 100 March 4, 2026 at 01:17:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 72 0 2 2 0 322 0 1 0 99 1 0 0 0 52 4 46 1 4 0 0 594 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 14 8 2 34 1 0 1 0 1351 0 0 0 100 4 0 0 9 316 156 110 1 0 0 0 260 0 0 0 100 5 0 0 4 213 102 8 0 0 2 0 0 0 0 0 100 6 0 0 0 20 1 20 0 1 0 0 0 0 0 0 100 7 0 0 0 22 7 20 0 0 3 0 6 0 0 0 100 March 4, 2026 at 01:17:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 78 0 2 0 0 301 0 1 0 99 1 0 0 0 43 4 36 0 2 0 0 595 0 0 0 100 2 0 0 0 16 1 13 0 2 0 0 9 0 0 0 100 3 0 0 14 11 2 38 2 0 2 0 1369 0 1 0 99 4 0 0 10 315 158 106 0 0 0 0 260 0 0 0 100 5 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 18 6 12 1 0 0 0 8 0 0 0 100 March 4, 2026 at 01:17:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 84 0 15 2340 104 326 22 25 21 13 793 1 2 0 96 1 126 0 2 235 6 240 9 17 13 8 1196 1 1 0 98 2 27096 0 126 185 1 275 19 17 33 22 3571 12 8 0 79 3 426 0 27 180 4 399 5 36 31 20 2554 2 2 0 97 4 54 0 67 442 147 308 3 13 24 19 1839 2 1 0 97 5 71 0 6 368 108 256 5 22 25 19 836 1 1 0 98 6 95 0 15 152 9 219 1 21 17 16 1473 1 1 0 98 7 342 0 2 163 8 241 12 17 16 18 784 2 1 0 98 March 4, 2026 at 01:17:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 398 0 67 2503 103 557 25 35 90 2 2300 8 4 0 88 1 449 0 0 402 6 532 31 39 35 2 2092 4 2 0 94 2 12947 0 187 360 4 555 38 42 67 10 3025 10 9 0 81 3 6125 0 76 329 4 425 17 30 119 9 2946 6 4 0 90 4 969 0 57 680 141 810 38 41 58 21 2913 4 3 0 92 5 1219 0 78 601 103 732 23 36 114 13 2069 7 3 0 91 6 541 0 19 381 12 516 16 29 53 9 1609 3 2 0 95 7 208 0 5 228 3 292 16 25 44 15 811 2 1 0 96 March 4, 2026 at 01:17:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 102 8 0 0 0 0 301 0 2 0 98 1 0 0 231 26 4 28 0 2 1 0 601 0 1 0 99 2 0 0 0 40 0 0 0 0 0 0 0 0 0 0 100 3 4 0 14 44 3 36 2 0 3 0 1374 0 1 0 99 4 44 0 10 413 163 170 0 1 0 0 272 0 1 0 99 5 0 0 3 253 102 18 0 2 1 0 5 0 1 0 99 6 0 0 0 102 4 62 0 0 0 0 13 0 0 0 100 7 0 0 0 38 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2170 102 133 0 13 108 0 301 0 2 0 98 1 0 0 0 160 4 179 1 10 96 0 594 0 1 0 99 2 0 0 0 44 0 73 0 4 72 0 0 0 0 0 100 3 0 0 14 105 73 127 10 7 107 0 1373 0 1 0 99 4 0 0 9 318 139 148 0 8 92 0 269 0 1 0 99 5 0 0 4 272 111 93 0 6 55 0 0 0 1 0 99 6 0 0 0 78 17 117 0 9 84 0 2 0 0 0 100 7 0 0 0 53 1 257 1 14 86 0 331 0 0 0 100 March 4, 2026 at 01:17:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 88 0 2 0 0 301 0 1 0 99 1 0 0 0 45 4 38 0 2 0 0 595 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 14 15 5 42 1 1 1 0 1372 0 0 0 99 4 0 0 13 228 112 22 2 1 0 0 272 0 0 0 99 5 0 0 4 212 102 4 0 0 0 0 0 0 1 0 99 6 0 0 0 111 53 106 0 0 0 0 3 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 360 0 20 2673 102 792 25 80 56 51 3333 5 6 0 89 1 482 0 28 690 4 1079 30 68 69 44 3712 4 4 0 92 2 3543 0 120 608 0 887 19 55 52 42 5063 6 6 0 88 3 39988 0 332 651 5 1129 32 52 81 75 6931 20 16 0 64 4 9073 0 295 707 120 774 10 70 108 77 3698 10 8 0 82 5 5546 0 36 737 104 848 24 69 114 72 3114 8 5 0 88 6 716 0 7 580 45 944 8 65 91 58 2772 4 3 0 94 7 832 0 11 472 6 769 17 64 78 48 2410 3 2 0 95 March 4, 2026 at 01:18:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 766 0 0 2150 102 94 1 11 100 1 435 1 2 0 97 1 12 0 70 95 5 53 3 5 8 0 943 6 2 0 92 2 532 0 23 64 1 31 0 8 45 2 431 1 1 0 97 3 681 0 61 57 4 59 2 5 88 2 1779 1 1 0 98 4 644 0 96 273 112 79 7 18 241 2 543 6 1 0 94 5 257 0 20 308 122 90 1 12 158 1 184 1 1 0 98 6 240 0 15 121 32 92 1 9 37 1 56 2 0 0 98 7 529 0 20 67 4 55 1 12 147 6 277 1 0 0 99 March 4, 2026 at 01:18:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 102 46 0 3 0 0 1 0 2 0 98 1 0 0 42 119 5 47 0 2 2 0 601 0 2 0 98 2 0 0 462 13 0 2 0 0 2 0 0 0 1 0 99 3 2 0 14 88 4 43 1 3 0 0 1667 0 1 0 99 4 0 0 11 335 111 46 0 3 0 0 260 0 1 0 99 5 0 0 2 303 107 28 0 1 2 0 13 0 1 0 99 6 0 0 0 196 56 124 0 1 0 0 22 0 0 0 100 7 0 0 0 83 2 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:18:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 126 185 0 11 78 0 0 0 2 0 98 1 0 0 0 69 4 111 0 9 90 0 595 0 1 0 99 2 0 0 0 97 0 128 1 8 68 0 0 0 0 0 100 3 0 0 14 110 74 109 6 7 84 0 1666 0 1 0 99 4 0 0 9 259 107 97 1 7 111 0 260 0 1 0 99 5 0 0 4 256 105 99 1 11 92 0 5 0 1 0 99 6 0 0 0 111 32 148 0 7 72 0 6 0 0 0 99 7 0 0 0 43 0 81 0 7 76 0 0 0 0 0 100 March 4, 2026 at 01:18:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 206 0 0 0 0 0 0 1 0 99 1 0 0 0 13 4 8 0 0 0 0 596 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 19 3 44 3 0 0 0 1668 0 1 0 99 4 0 0 11 214 106 8 0 0 0 0 259 0 0 0 100 5 0 0 2 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 25 9 20 0 0 0 0 12 0 0 0 100 7 0 0 0 10 0 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:18:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1410 0 23 2777 116 864 27 68 145 58 3243 5 5 0 90 1 1083 0 74 583 26 666 21 64 185 31 2848 7 3 0 90 2 823 0 53 498 0 730 12 49 114 37 2567 5 4 0 92 3 45542 0 457 659 4 1187 55 70 166 94 8604 24 23 0 54 4 10426 0 147 858 107 957 34 71 177 78 5648 18 8 0 75 5 599 0 14 800 103 1065 11 65 143 74 3444 6 3 0 91 6 1205 0 47 633 10 1012 20 61 197 56 3633 9 3 0 88 7 2355 0 215 517 8 872 25 56 126 60 3340 7 4 0 88 March 4, 2026 at 01:18:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 135 152 0 4 0 0 4 0 1 0 99 1 10 0 7 32 4 17 0 4 0 0 611 0 0 0 100 2 0 0 0 25 1 4 0 1 5 0 1 0 1 0 99 3 44 0 0 62 5 45 0 1 0 0 317 0 0 0 100 4 1 0 93 224 107 42 1 1 15 0 1378 0 2 0 97 5 30 0 18 233 104 12 4 2 14 0 420 1 2 0 96 6 0 0 0 26 2 12 0 2 0 0 26 0 0 0 100 7 27 0 0 66 21 50 0 4 1 0 20 0 0 0 100 March 4, 2026 at 01:18:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2230 151 164 0 5 0 0 0 0 2 0 98 1 0 0 0 95 4 20 0 1 1 0 604 0 1 0 99 2 0 0 0 124 0 48 0 3 0 0 0 0 0 0 100 3 0 0 0 92 7 14 1 0 0 0 310 0 0 0 99 4 0 0 53 285 106 40 2 0 4 0 1359 0 3 0 97 5 1 0 16 288 104 12 0 0 0 0 269 0 0 0 100 6 0 0 0 91 3 18 0 2 0 0 14 0 0 0 100 7 0 0 462 23 1 12 0 1 2 0 1 0 1 0 99 March 4, 2026 at 01:18:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 128 220 0 14 83 0 0 0 2 0 98 1 0 0 0 83 20 103 0 8 52 0 594 0 0 0 99 2 0 0 0 67 8 99 0 9 79 0 0 0 0 0 100 3 0 0 0 126 79 145 13 13 98 0 310 0 1 0 99 4 0 0 10 262 105 136 3 13 96 0 1359 0 1 0 99 5 0 0 17 250 104 86 1 8 93 0 265 0 1 0 99 6 0 0 0 43 2 69 0 5 82 0 2 0 0 0 100 7 0 0 0 54 0 93 0 4 91 0 0 0 0 0 100 March 4, 2026 at 01:18:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 14 2212 102 279 1 16 22 15 291 0 2 0 98 1 11 0 9 116 4 149 3 10 20 9 799 0 0 0 99 2 37 0 26 193 46 199 0 12 419 12 212 0 3 0 97 3 23 0 11 122 15 162 1 13 153 8 668 0 1 0 98 4 3288 0 141 284 104 184 6 10 198 26 3301 1 5 0 94 5 709 0 40 328 105 122 1 19 101 11 1399 0 1 0 98 6 32 0 6 98 1 132 0 14 28 23 358 0 0 0 99 7 46 0 11 101 0 142 0 14 348 21 243 0 2 0 98 March 4, 2026 at 01:18:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 56 2148 122 99 0 3 3 0 44 0 3 0 97 1 0 0 0 38 5 26 0 3 0 0 597 0 0 0 100 2 0 0 10 59 0 44 0 2 0 0 0 0 0 0 100 3 0 0 0 120 52 106 0 0 0 0 302 0 0 0 100 4 0 0 4 228 104 44 0 2 2 0 782 0 1 0 99 5 0 0 23 226 106 12 0 0 0 0 524 0 0 0 100 6 0 0 0 19 2 6 0 0 0 0 6 0 0 0 100 7 0 0 0 33 1 22 0 0 4 0 0 0 1 0 99 March 4, 2026 at 01:18:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2174 102 6 0 1 1 0 0 0 3 0 97 1 0 0 455 70 24 64 0 1 3 0 615 0 1 0 98 2 0 0 0 172 0 96 0 2 0 0 0 0 1 0 99 3 0 0 0 178 51 104 0 1 0 0 301 0 1 0 99 4 0 0 3 283 102 36 1 0 1 0 763 0 1 0 99 5 0 0 24 292 106 20 1 1 1 0 526 0 1 0 99 6 0 0 0 81 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 87 0 14 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:18:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2111 103 69 0 1 1 0 10 0 1 0 99 1 0 0 0 58 25 54 0 1 0 0 617 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 4 0 0 2 216 105 34 1 0 0 0 763 0 0 0 100 5 0 0 25 220 106 20 0 0 3 0 534 0 0 0 100 6 0 0 0 20 4 18 0 0 0 0 11 0 0 0 100 7 0 0 0 61 2 54 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:18:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2155 103 191 0 6 63 0 21 0 1 0 99 1 0 0 0 103 24 140 1 8 57 0 614 0 0 0 99 2 0 0 0 35 0 66 0 12 71 0 0 0 0 0 100 3 0 0 0 197 116 193 9 9 86 0 301 0 1 0 99 4 0 0 4 245 102 100 1 4 66 0 764 0 1 0 99 5 0 0 23 250 106 83 0 5 43 0 524 0 1 0 99 6 0 0 0 47 1 83 0 5 56 0 0 0 0 0 100 7 0 0 0 52 0 90 0 2 44 0 0 0 0 0 100 March 4, 2026 at 01:18:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 110 0 1 1 0 4 0 1 0 99 1 0 0 0 56 24 50 1 0 0 0 617 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 108 51 102 1 0 0 0 301 0 0 0 100 4 0 0 4 211 102 34 1 0 0 0 763 0 1 0 99 5 0 0 23 216 106 14 0 0 0 0 529 0 0 0 100 6 0 0 0 12 2 8 0 0 2 0 3 0 0 0 100 7 0 0 0 14 0 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:18:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 108 0 0 0 0 0 0 1 0 99 1 0 0 0 56 24 52 0 0 0 0 614 0 0 0 100 2 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 4 0 0 3 214 103 38 1 0 0 0 764 0 0 0 99 5 0 0 24 215 106 12 0 0 0 0 526 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 6 0 0 0 100 7 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 106 0 0 1 0 0 0 1 0 99 1 0 0 0 56 24 52 0 1 0 0 615 0 0 0 100 2 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 4 0 0 4 211 102 34 1 0 0 0 762 0 1 0 99 5 0 0 23 216 106 12 1 0 0 0 524 0 0 0 99 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2110 102 62 0 0 0 0 10 0 1 0 99 1 0 0 0 56 24 50 0 0 0 0 314 0 0 0 100 2 0 0 0 9 0 4 0 1 1 0 301 0 0 0 100 3 0 0 0 109 51 106 0 1 1 0 301 0 0 0 100 4 0 0 3 216 105 34 1 0 0 0 764 0 1 0 99 5 0 0 24 268 106 69 0 2 0 0 533 0 1 0 99 6 0 0 0 17 3 14 0 0 0 0 7 0 0 0 100 7 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 74 0 2 0 0 0 0 1 0 99 1 0 0 0 55 23 50 1 0 0 0 313 0 0 0 100 2 0 0 0 8 1 4 0 0 2 0 300 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 4 0 0 2 212 102 34 2 0 1 0 762 0 1 0 99 5 0 0 25 249 106 44 0 0 0 0 525 0 1 0 99 6 0 0 0 10 2 6 0 0 1 0 2 0 0 0 100 7 0 0 0 16 0 14 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:18:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 101 0 4 0 0 1 0 1 0 99 1 0 0 0 15 4 8 0 0 0 0 294 0 0 0 100 2 0 0 0 46 20 42 0 1 0 0 321 0 0 0 100 3 0 0 0 111 52 106 0 1 0 0 302 0 0 0 100 4 0 0 6 230 102 56 0 3 1 0 762 0 1 0 99 5 0 0 22 216 106 12 0 0 0 0 525 0 1 0 99 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 84 0 1 0 0 0 0 1 0 99 1 0 0 0 41 3 36 0 1 0 0 294 0 0 0 100 2 0 0 0 48 21 44 0 1 0 0 321 0 0 0 100 3 0 0 0 109 52 104 0 0 0 0 302 0 0 0 100 4 0 0 3 211 102 34 1 0 0 0 763 0 0 0 99 5 0 0 24 220 106 22 0 1 0 0 524 0 1 0 99 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 86 0 2 0 0 0 0 1 0 99 1 0 0 0 43 3 36 0 2 0 0 294 0 0 0 100 2 0 0 0 50 22 44 0 0 0 0 321 0 0 0 100 3 0 0 0 108 51 102 1 0 0 0 301 0 0 0 100 4 0 0 3 214 107 32 1 0 0 0 764 0 1 0 99 5 0 0 24 215 106 12 0 0 0 0 526 0 1 0 99 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 104 26 0 0 0 0 14 0 1 0 99 1 0 0 0 18 4 12 0 0 0 0 295 0 0 0 100 2 0 0 0 136 22 130 0 2 0 0 321 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 4 0 0 2 228 109 46 1 2 1 0 762 0 1 0 99 5 0 0 25 222 106 22 0 1 1 0 532 0 1 0 99 6 0 0 0 18 2 20 0 1 1 0 7 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:18:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 78 0 3 0 0 0 0 1 0 99 1 0 0 0 45 4 40 1 2 1 0 294 0 0 0 100 2 0 0 0 52 22 46 0 0 2 0 321 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 300 0 0 0 100 4 0 0 5 223 104 42 1 0 0 0 764 0 1 0 99 5 0 0 22 217 106 14 1 0 0 0 525 0 0 0 100 6 0 0 0 10 1 6 0 0 4 0 0 0 0 0 100 7 0 0 0 11 0 10 0 1 2 0 0 0 0 0 100 March 4, 2026 at 01:18:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 94 0 3 0 0 1 0 1 0 99 1 0 0 0 37 3 28 0 2 1 0 294 0 0 0 100 2 0 0 0 55 23 50 1 0 0 0 330 0 0 0 100 3 0 0 0 109 51 106 0 0 0 0 319 0 0 0 100 4 0 0 5 210 103 32 1 0 1 0 763 0 0 0 99 5 0 0 22 215 106 12 0 0 0 0 525 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 100 0 2 0 0 0 0 1 0 99 1 0 0 0 30 3 24 0 3 0 0 294 0 0 0 100 2 0 0 0 50 22 46 0 1 0 0 321 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 4 0 0 2 213 105 34 1 0 1 0 765 0 1 0 99 5 0 0 25 215 106 12 0 0 0 0 525 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:18:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 80 0 2 0 0 0 0 1 0 99 1 0 0 0 40 3 36 0 2 0 0 294 0 0 0 100 2 0 0 0 56 22 50 0 2 1 0 321 0 0 0 100 3 0 0 0 108 51 104 0 1 1 0 301 0 0 0 100 4 0 0 2 215 106 32 2 0 2 0 763 0 0 0 99 5 0 0 25 216 106 12 2 0 0 0 524 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2117 104 22 0 1 0 0 17 0 1 0 99 1 0 0 0 18 3 10 0 0 0 0 294 0 0 0 100 2 0 0 0 154 21 150 0 1 0 0 321 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 4 0 0 2 220 111 32 1 0 1 0 762 0 0 0 99 5 0 0 25 220 106 20 0 0 1 0 533 0 0 0 100 6 0 0 0 13 1 10 0 0 0 0 5 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 6 0 0 0 0 0 0 1 0 99 1 0 0 0 17 4 12 1 1 0 0 294 0 0 0 100 2 0 0 0 156 21 150 0 0 0 0 321 0 0 0 100 3 0 0 0 109 51 104 0 0 0 0 301 0 0 0 100 4 0 0 3 216 108 34 1 1 0 0 763 0 0 0 99 5 0 0 24 215 106 12 0 0 0 0 524 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 7 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 24 0 3 0 0 0 0 1 0 99 1 0 0 0 41 3 36 0 1 0 0 294 0 0 0 100 2 0 0 0 77 21 68 0 0 0 0 321 0 0 0 100 3 0 0 0 147 52 140 0 1 0 0 302 0 0 0 100 4 0 0 3 214 105 34 1 0 1 0 763 0 0 0 99 5 0 0 24 216 106 14 0 1 1 0 526 0 0 0 100 6 0 0 0 10 2 6 0 1 0 0 1 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 24 0 2 0 0 0 0 1 0 99 1 0 0 0 43 3 36 0 2 0 0 294 0 0 0 100 2 0 0 0 110 21 104 0 3 0 0 321 0 0 0 100 3 0 0 0 110 52 104 1 0 0 0 302 0 0 0 100 4 0 0 4 211 105 32 0 0 1 0 763 0 0 0 99 5 0 0 23 216 106 12 2 0 0 0 524 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 12 0 0 0 0 0 0 1 0 99 1 0 0 0 15 3 8 0 0 0 0 294 0 0 0 100 2 0 0 0 148 22 144 0 2 0 0 321 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 301 0 0 0 100 4 0 0 3 210 103 32 1 0 1 0 763 0 0 0 99 5 0 0 24 215 106 12 0 0 0 0 526 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 4 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:18:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 105 40 0 1 0 0 15 0 1 0 99 1 0 0 0 16 4 12 0 1 0 0 296 0 0 0 100 2 0 0 0 150 22 142 1 0 0 0 321 0 0 0 100 3 0 0 0 108 51 104 0 1 0 0 301 0 0 0 100 4 0 0 4 212 105 32 1 0 0 0 763 0 0 0 99 5 0 0 23 220 106 20 0 0 0 0 531 0 0 0 100 6 0 0 0 15 2 12 0 0 0 0 7 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:18:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 80 0 2 0 0 21 0 1 0 99 1 0 0 0 44 4 40 0 1 0 0 294 0 0 0 100 2 0 0 0 56 21 48 0 0 0 0 321 0 0 0 100 3 0 0 0 109 52 104 0 0 0 0 301 0 0 0 100 4 0 0 3 211 104 32 1 0 0 0 763 0 0 0 99 5 0 0 24 215 106 12 0 0 0 0 526 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 14 0 0 1 0 0 0 1 0 99 1 0 0 0 17 3 10 1 1 0 0 294 0 0 0 100 2 0 0 0 130 13 126 0 3 0 0 312 0 0 0 100 3 0 0 0 126 60 122 0 1 0 0 310 0 0 0 100 4 0 0 4 209 102 32 1 0 2 0 763 0 0 0 99 5 0 0 23 216 106 12 2 0 0 0 525 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 64 0 3 1 0 0 0 1 0 99 1 0 0 0 25 3 18 0 2 0 0 294 0 0 0 100 2 0 0 0 50 1 42 0 0 1 0 301 0 0 0 100 3 0 0 0 153 72 154 0 1 0 0 321 0 0 0 100 4 0 0 2 212 104 34 1 0 0 0 764 0 0 0 99 5 0 0 25 215 106 12 0 0 0 0 524 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 90 0 2 0 0 1 0 1 0 99 1 0 0 0 41 3 34 0 2 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 150 72 144 0 0 0 0 321 0 0 0 100 4 0 0 3 210 103 32 1 0 0 0 763 0 0 0 100 5 0 0 24 215 106 12 1 0 0 0 526 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 103 98 1 1 0 0 16 0 1 0 99 1 0 0 0 43 3 38 0 2 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 152 72 146 1 0 1 0 321 0 0 0 100 4 0 0 2 214 104 34 1 1 2 0 763 0 0 0 99 5 0 0 25 221 106 22 0 1 1 0 532 0 1 0 99 6 0 0 0 13 1 10 0 0 0 0 5 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 64 0 2 0 0 0 0 1 0 99 1 0 0 0 47 4 40 1 2 0 0 294 0 0 0 100 2 0 0 0 29 1 22 0 2 0 0 301 0 0 0 100 3 0 0 0 150 72 144 1 0 0 0 321 0 0 0 100 4 0 0 3 209 103 32 1 0 1 0 763 0 0 0 99 5 0 0 24 218 106 14 1 0 0 0 525 0 1 0 99 6 0 0 0 10 2 6 0 1 0 0 2 0 0 0 100 7 0 0 0 8 0 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:18:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 84 0 2 0 0 0 0 1 0 99 1 0 0 0 43 3 36 0 2 0 0 294 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 151 73 146 0 0 0 0 322 0 0 0 100 4 0 0 3 209 102 32 1 0 0 0 763 0 0 0 99 5 0 0 24 216 106 12 1 0 0 0 525 0 1 0 99 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 96 0 4 0 0 1 0 1 0 99 1 0 0 0 31 3 22 0 2 0 0 294 0 0 0 100 2 0 0 0 25 1 18 0 2 0 0 301 0 0 0 100 3 0 0 0 151 73 146 0 0 0 0 322 0 0 0 100 4 0 0 2 209 102 32 1 0 0 0 764 0 0 0 99 5 0 0 25 215 106 12 0 0 0 0 525 0 1 0 99 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 86 0 1 0 0 0 0 1 0 99 1 0 0 0 46 3 46 0 3 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 149 72 144 0 0 0 0 321 0 0 0 100 4 0 0 2 210 102 32 2 0 0 0 762 0 1 0 99 5 0 0 25 215 106 12 0 0 0 0 525 0 1 0 99 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2113 104 92 0 2 3 0 19 0 1 0 99 1 0 0 0 20 4 12 0 1 0 0 295 0 0 0 100 2 0 0 0 42 1 36 0 2 0 0 301 0 0 0 100 3 0 0 0 149 72 145 0 1 0 0 321 0 0 0 100 4 0 0 4 214 106 32 0 0 1 0 763 0 0 0 99 5 0 0 23 221 106 20 1 0 3 0 532 0 1 0 99 6 0 0 0 15 2 12 0 0 0 0 7 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:18:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 85 0 0 0 0 0 0 1 0 99 1 0 0 0 45 4 40 1 3 1 0 294 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 141 66 136 0 1 0 0 321 0 0 0 100 4 0 0 4 219 107 44 0 1 1 0 762 0 0 0 99 5 0 0 23 216 106 12 1 0 0 0 525 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 53 0 3 0 0 1 0 1 0 99 1 0 0 0 21 3 12 0 2 0 0 294 0 0 0 100 2 0 0 0 65 1 58 0 2 0 0 301 0 0 0 100 3 0 0 0 51 22 46 0 0 1 0 321 0 0 0 100 4 0 0 3 311 152 136 1 1 3 0 764 0 1 0 99 5 0 0 24 215 106 12 0 0 0 0 525 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 98 0 2 0 0 0 0 1 0 99 1 0 0 0 27 3 20 0 3 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 52 21 46 0 2 0 0 320 0 0 0 100 4 0 0 2 277 137 96 2 0 1 0 763 0 1 0 99 5 0 0 25 252 124 50 0 1 0 0 525 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 46 0 0 0 0 0 0 1 0 99 1 0 0 0 13 4 8 0 0 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 15 1 10 0 0 0 0 301 0 0 0 100 4 0 0 3 248 120 74 1 2 2 0 784 0 1 0 99 5 0 0 24 373 155 178 1 3 1 0 525 0 0 0 99 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 86 0 4 0 0 13 0 1 0 99 1 0 0 0 15 4 10 0 0 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 16 1 10 1 0 0 0 301 0 0 0 100 4 0 0 2 253 125 72 2 0 0 0 783 0 1 0 99 5 0 0 25 360 156 154 0 2 1 0 533 0 1 0 99 6 0 0 0 14 1 12 0 1 0 0 5 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:18:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 1 0 1 0 99 1 0 0 0 17 5 12 1 0 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 15 1 10 0 0 0 0 301 0 0 0 100 4 0 0 5 241 121 58 0 0 1 0 777 0 1 0 99 5 0 0 22 330 162 128 0 1 0 0 531 0 0 0 99 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 9 0 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 114 0 1 0 0 0 0 1 0 99 1 0 0 0 13 4 8 0 0 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 17 2 12 0 0 0 0 302 0 0 0 100 4 0 0 2 214 107 32 1 0 0 0 762 0 1 0 99 5 0 0 25 358 176 154 1 0 0 0 545 0 1 0 99 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 112 0 1 3 0 0 0 1 0 99 1 0 0 0 16 5 12 0 1 2 0 294 0 0 0 100 2 0 0 0 12 2 8 0 1 1 0 301 0 0 0 100 3 0 0 0 19 3 14 0 0 0 0 302 0 0 0 100 4 0 0 3 212 104 34 1 0 2 0 763 0 0 0 99 5 0 0 24 359 176 154 1 0 1 0 545 0 0 0 99 6 0 0 0 11 3 6 0 1 0 0 2 0 0 0 100 7 0 0 0 8 1 4 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:18:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 108 0 0 0 0 0 0 1 0 99 1 0 0 0 13 4 8 0 0 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 15 1 10 0 0 0 0 301 0 0 0 100 4 0 0 3 211 103 32 2 0 1 0 763 0 0 0 99 5 0 0 24 355 175 152 0 0 0 0 545 0 1 0 99 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 80 0 2 0 0 14 0 1 0 99 1 0 0 0 17 5 12 1 0 0 0 295 0 0 0 100 2 0 0 0 9 1 4 0 1 1 0 301 0 0 0 100 3 0 0 0 18 1 16 0 1 0 0 301 0 0 0 100 4 0 0 3 254 106 70 1 1 3 0 763 0 0 0 99 5 0 0 24 360 175 160 1 0 0 0 551 0 1 0 99 6 0 0 0 17 3 14 0 0 0 0 7 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:18:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 106 0 0 0 0 21 0 1 0 99 1 0 0 0 21 5 18 0 2 0 0 294 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 15 1 6 1 0 0 0 301 0 0 0 100 4 0 0 7 215 102 42 1 1 2 0 763 0 0 0 99 5 0 0 28 357 175 152 1 0 0 0 546 0 1 0 99 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 104 0 0 0 0 0 0 1 0 99 1 0 0 0 18 4 10 0 0 0 0 294 0 0 0 100 2 0 0 0 12 2 10 0 1 0 0 310 0 0 0 100 3 0 0 0 9 1 6 0 0 0 0 319 0 0 0 100 4 0 0 2 213 106 32 1 0 1 0 763 0 0 0 100 5 0 0 25 357 175 155 1 1 0 0 545 0 0 0 99 6 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 102 1 3 0 0 26 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 4 0 0 2 218 108 36 1 0 1 0 765 0 1 0 99 5 0 0 25 373 175 169 1 4 2 0 545 0 1 0 99 6 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 80 0 0 0 0 1 0 1 0 99 1 0 0 0 39 3 34 1 2 0 0 294 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 4 0 0 5 215 108 32 1 0 0 0 762 0 0 0 99 5 0 0 22 306 146 100 0 1 0 0 544 0 1 0 99 6 0 0 0 71 32 68 0 2 0 0 2 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:18:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 22 0 1 1 0 17 0 1 0 99 1 0 0 0 15 3 8 0 0 0 0 294 0 0 0 100 2 0 0 0 108 2 104 0 1 0 0 301 0 0 0 100 3 0 0 0 8 1 2 1 0 0 0 301 0 0 0 100 4 0 0 3 216 107 32 1 0 2 0 763 0 0 0 99 5 1 0 24 267 125 66 0 0 1 0 553 0 1 0 99 6 0 0 0 115 52 112 0 1 0 0 5 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 30 0 2 0 0 0 0 1 0 99 1 0 0 0 41 4 38 0 2 0 0 294 0 0 0 100 2 0 0 0 74 2 66 0 0 0 0 301 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 4 0 0 4 209 103 32 0 0 0 0 763 0 0 0 100 5 0 0 23 262 125 58 2 0 0 0 545 0 1 0 99 6 0 0 0 111 53 106 0 0 0 0 2 0 0 0 100 7 0 0 0 9 0 6 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:18:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 8 0 1 1 0 0 0 1 0 99 1 0 0 0 15 3 8 0 1 0 0 294 0 0 0 100 2 0 0 0 109 2 106 0 3 0 0 301 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 302 0 0 0 100 4 0 0 3 210 103 32 1 0 1 0 763 0 0 0 99 5 0 0 24 261 125 58 0 0 0 0 545 0 1 0 99 6 0 0 0 111 53 106 0 0 0 0 2 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:18:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 26 0 1 0 0 1 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 93 2 86 0 0 0 0 301 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 303 0 0 0 100 4 0 0 3 210 103 32 1 0 1 0 763 0 0 0 99 5 0 0 24 265 127 62 0 0 0 0 548 0 1 0 99 6 0 0 0 112 53 108 0 0 0 0 3 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:19:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 78 0 0 0 0 0 0 1 0 99 1 0 0 0 38 3 34 0 2 0 0 294 0 0 0 100 2 0 0 0 12 2 6 0 0 1 0 301 0 0 0 100 3 0 0 0 12 1 12 1 1 0 0 301 0 0 0 100 4 0 0 3 209 102 32 1 0 2 0 762 0 0 0 99 5 0 0 24 261 125 58 0 0 0 0 546 0 1 0 99 6 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:19:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 96 1 5 0 0 20 0 1 0 99 1 0 0 0 42 4 33 0 2 0 0 295 0 0 0 100 2 0 0 0 16 2 10 0 3 0 0 301 0 0 0 100 3 0 0 0 9 1 4 0 1 2 0 301 0 0 0 100 4 0 0 3 215 105 34 1 1 3 0 765 0 0 0 100 5 0 0 24 269 125 72 1 1 4 0 552 0 1 0 99 6 0 0 0 117 53 114 0 0 0 0 7 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:19:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 60 0 2 0 0 0 0 1 0 99 1 0 0 0 59 4 54 1 4 0 0 294 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 301 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 301 0 0 0 100 4 0 0 3 212 105 32 1 0 2 0 763 0 0 0 99 5 0 0 24 259 124 58 0 0 0 0 544 0 0 0 99 6 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:19:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 4 0 0 0 0 1 0 1 0 99 1 0 0 0 14 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 109 1 105 1 3 0 0 301 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 4 0 0 3 209 102 32 1 0 1 0 762 0 0 0 99 5 0 0 24 264 125 60 1 0 1 0 546 0 0 0 100 6 0 0 0 112 53 108 0 1 0 0 2 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:19:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 46 0 3 0 0 0 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 80 1 72 0 0 0 0 301 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 4 0 0 4 212 104 34 1 0 0 0 764 0 0 0 99 5 0 0 23 264 125 60 0 0 0 0 545 0 0 0 99 6 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:19:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 0 0 0 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 11 1 6 0 1 0 0 301 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 4 0 0 3 211 103 32 1 0 0 0 763 0 0 0 99 5 1 0 24 259 123 58 3 0 0 0 689 2 0 0 98 6 0 0 0 111 53 106 0 0 0 0 2 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:19:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 114 0 0 2 0 14 0 1 0 99 1 0 0 0 14 3 12 0 1 1 0 294 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 301 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 4 0 0 3 213 104 32 1 0 1 0 763 0 1 0 99 5 0 0 24 233 108 30 1 0 2 0 533 0 0 0 100 6 0 0 0 151 69 148 1 1 0 0 23 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:19:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 102 0 0 0 0 0 0 1 0 99 1 0 0 0 17 4 12 1 0 1 0 294 0 0 0 100 2 0 0 0 16 1 16 0 1 0 0 301 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 4 0 0 3 209 102 32 1 0 2 0 764 0 0 0 99 5 0 0 24 221 105 18 0 0 0 0 525 0 0 0 100 6 0 0 0 74 34 68 0 0 0 0 22 0 0 0 100 7 0 0 0 84 38 82 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:19:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 104 0 0 0 0 1 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 301 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 302 0 0 0 100 4 0 0 5 209 102 32 1 0 1 0 763 0 1 0 99 5 0 0 22 221 105 18 0 0 0 0 524 0 0 0 100 6 0 0 0 50 22 44 1 0 0 0 20 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:19:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 102 0 0 0 0 0 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 13 1 8 0 0 3 0 301 0 0 0 100 3 0 0 0 12 3 8 0 1 3 0 302 0 0 0 100 4 0 0 1 210 102 34 1 1 0 0 762 0 0 0 99 5 0 0 26 221 105 18 0 0 0 0 526 0 0 0 100 6 0 0 0 51 23 46 0 0 0 0 22 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:19:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2106 101 16 0 0 0 0 0 0 1 0 99 1 0 0 0 99 3 94 0 2 0 0 294 0 0 0 100 2 0 0 0 12 1 6 0 0 0 0 301 0 0 0 100 3 0 0 0 10 2 4 1 0 0 0 301 0 0 0 100 4 0 0 2 212 102 34 2 1 2 0 763 0 0 0 99 5 0 0 25 225 105 24 1 1 3 0 525 0 0 0 100 6 0 0 0 49 22 44 0 0 0 0 20 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:19:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 110 58 0 3 0 0 14 0 1 0 99 1 0 0 0 17 4 10 0 0 0 0 295 0 0 0 100 2 0 0 0 82 1 78 0 1 0 0 301 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 301 0 0 0 100 4 0 0 5 216 107 32 1 0 1 0 763 0 0 0 99 5 0 0 22 226 105 26 0 0 2 0 532 0 0 0 100 6 0 0 0 57 23 54 0 0 0 0 27 0 0 0 100 7 0 0 0 98 46 92 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:19:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 152 204 0 0 0 0 21 0 1 0 99 1 0 0 0 15 4 10 1 0 0 0 294 0 0 0 100 2 0 0 0 11 1 6 0 1 0 0 301 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 4 0 0 3 211 104 32 1 0 1 0 763 0 0 0 99 5 0 0 24 223 105 20 0 0 0 0 524 0 0 0 100 6 0 0 0 50 22 46 0 1 0 0 20 0 0 0 100 7 0 0 0 8 0 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:19:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 151 214 0 2 0 0 0 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 11 1 4 0 0 0 0 301 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 4 0 0 2 211 104 32 1 0 1 0 763 0 0 0 99 5 0 0 25 221 105 17 1 1 0 0 526 0 0 0 100 6 0 0 0 49 22 44 0 0 0 0 21 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:19:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1297 0 2 2129 105 146 3 6 1 1 126 0 2 0 98 1 0 0 0 116 49 118 0 6 0 0 325 0 0 0 100 2 0 0 1 13 1 11 0 3 0 0 306 0 0 0 100 3 7 0 0 15 2 12 0 1 1 0 352 0 0 0 100 4 56 0 3 615 492 85 9 2 134 0 996 1 2 0 97 5 0 0 24 376 105 320 2 1 271 0 537 0 1 0 99 6 2 0 0 11 3 6 0 0 0 0 7 0 0 0 100 7 571 0 0 32 0 36 2 1 4 2 175 1 0 0 99 March 4, 2026 at 01:19:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 1 0 0 0 0 1 0 99 1 0 0 0 113 53 110 0 1 0 0 294 0 0 0 100 2 0 0 0 10 1 2 1 0 0 0 301 0 0 0 100 3 0 0 0 10 2 4 1 0 0 0 301 0 0 0 100 4 0 0 3 234 117 46 1 0 0 0 774 0 1 0 99 5 0 0 24 216 105 14 0 0 0 0 527 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 7 3 0 0 13 0 12 0 0 0 0 24 0 0 0 100 March 4, 2026 at 01:19:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 101 13 0 2 0 0 0 0 1 0 99 1 0 0 0 214 53 210 1 2 1 0 294 0 0 0 100 2 0 0 0 10 1 8 0 1 2 0 301 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 4 0 0 3 1099 977 68 1 0 196 0 789 0 2 0 97 5 0 0 24 755 105 1067 0 0 408 0 532 0 2 0 98 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 982 0 0 40 5 38 3 0 34 0 292 1 1 0 98 March 4, 2026 at 01:19:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 101 156 0 6 47 0 0 0 2 0 98 1 0 0 0 165 54 188 0 6 52 0 294 0 1 0 99 2 0 0 0 33 1 52 0 4 45 0 301 0 0 0 100 3 0 0 0 76 53 70 5 3 64 0 301 0 0 0 100 4 0 0 3 258 117 110 1 7 44 0 795 0 1 0 99 5 0 0 24 250 105 81 1 4 59 0 528 0 1 0 99 6 0 0 0 31 3 42 0 1 15 0 2 0 0 0 100 7 0 0 0 50 2 84 0 1 44 0 11 0 0 0 100 March 4, 2026 at 01:19:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 108 0 2 0 0 2 0 1 0 99 1 0 0 0 120 53 114 0 2 0 0 294 0 0 0 100 2 0 0 0 11 1 8 0 0 1 0 303 0 0 0 100 3 0 0 0 14 3 12 0 1 2 0 303 0 0 0 100 4 1 0 4 260 146 50 1 0 16 0 796 0 1 0 99 5 0 0 23 226 105 32 1 0 45 0 528 0 1 0 99 6 0 0 0 13 3 10 0 0 0 0 5 0 0 0 100 7 0 0 0 17 0 16 0 0 0 0 8 0 0 0 100