March 4, 2026 at 01:07:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 370 0 33 2812 128 2028 23 177 1234 31 3447 2 9 0 89 1 569 0 418 659 7 2428 27 209 1219 21 5621 21 11 0 69 2 378 0 49 669 16 1903 18 184 1125 46 3913 2 6 0 92 3 415 0 195 915 388 2145 36 169 1181 58 3748 2 7 0 91 4 616 0 74 2811 2228 1754 41 108 2032 36 4239 5 11 0 84 5 445 0 111 1246 15 3669 20 170 2584 49 3659 2 10 0 88 6 931 0 57 588 19 1922 17 192 1164 35 7182 7 6 0 87 7 505 0 26 608 10 1489 13 122 1169 22 3227 2 6 0 92 March 4, 2026 at 01:07:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3927 0 74 2416 104 481 20 61 212 41 1268 7 7 0 86 1 5036 0 18 286 3 550 6 44 431 68 3616 4 7 0 89 2 4398 0 23 626 9 720 14 42 410 40 1864 4 12 0 84 3 9746 0 19 550 45 497 27 47 229 62 3034 4 14 0 81 4 9891 0 83 692 28 634 20 79 415 98 3317 14 43 0 43 5 6309 0 578 557 1 777 74 70 445 58 4622 27 36 0 37 6 2958 0 67 319 20 525 38 77 170 81 1641 11 4 0 85 7 3846 0 22 471 21 520 28 57 201 46 3140 8 45 0 47 March 4, 2026 at 01:07:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 2 0 0 0 0 0 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 115 5 111 0 2 6 0 636 0 0 0 100 3 0 0 0 12 2 9 0 0 2 0 318 0 0 0 100 4 0 0 11 210 103 5 0 0 3 0 586 0 0 0 100 5 41 0 18 205 100 3 0 1 0 0 322 0 0 0 100 6 0 0 0 22 0 17 0 3 2 0 0 0 0 0 100 7 0 0 0 108 51 104 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:07:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 80 0 1 0 0 0 0 1 0 99 1 26 0 0 7 1 32 0 0 1 0 1072 0 0 0 100 2 0 0 0 44 5 38 0 0 0 0 302 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 293 0 0 0 100 4 0 0 10 212 104 6 0 0 0 0 560 0 0 0 100 5 0 0 17 206 102 2 0 0 0 0 266 0 0 0 100 6 0 0 0 19 2 14 0 0 0 0 0 0 0 0 100 7 0 0 0 110 51 110 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:07:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2316 124 893 0 171 668 0 0 0 5 0 95 1 0 0 0 97 1 158 17 16 210 0 1068 0 11 0 88 2 0 0 0 69 4 97 6 6 170 0 301 0 11 0 89 3 0 0 0 446 399 107 17 4 265 0 295 0 11 0 89 4 0 0 8 270 105 107 6 8 183 0 561 0 11 0 89 5 0 0 20 263 103 112 7 11 219 0 266 0 11 0 89 6 0 0 0 70 2 107 7 5 225 0 0 0 11 0 89 7 0 0 0 273 29 968 1 167 618 0 2 0 3 0 97 March 4, 2026 at 01:07:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 212 0 1 0 0 0 0 1 0 99 1 0 0 0 8 1 32 1 0 0 0 1067 0 0 0 100 2 0 0 0 16 4 12 0 0 0 0 301 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 293 0 0 0 100 4 0 0 10 212 104 6 0 0 0 0 559 0 0 0 100 5 0 0 17 206 102 2 0 0 0 0 266 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 21 3 16 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:07:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2487 0 0 2300 131 558 26 52 219 9 886 9 6 0 85 1 3053 0 1 197 21 284 35 43 139 6 1647 8 5 0 88 2 817 0 0 112 6 121 20 15 115 2 379 19 2 0 79 3 2403 0 0 156 2 266 23 42 127 1 1353 8 4 0 88 4 5972 0 12 407 109 311 39 44 145 21 1528 12 16 0 72 5 1205 0 257 293 102 177 12 16 79 15 1204 20 3 0 77 6 3610 0 7 189 2 369 37 59 210 17 1453 9 4 0 87 7 1391 0 0 146 7 189 16 18 110 4 626 20 3 0 77 March 4, 2026 at 01:07:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 192 0 119 2432 102 192 20 32 692 3 1092 10 6 0 84 1 82 0 258 336 7 224 23 37 496 2 2200 19 4 0 77 2 342 0 177 344 3 198 46 37 730 2 940 22 4 0 74 3 571 0 289 332 8 157 32 22 253 7 1208 32 2 0 66 4 378 0 44 530 113 153 23 31 218 4 1177 13 3 0 84 5 132 0 510 434 109 149 29 32 493 1 1186 16 3 0 81 6 489 0 165 308 15 180 17 27 351 4 1482 11 2 0 86 7 338 0 125 392 26 222 25 30 310 4 1318 22 3 0 76 March 4, 2026 at 01:07:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 116 0 2 0 0 10 0 1 0 98 1 9 0 0 13 1 38 1 0 2 0 1155 0 0 0 99 2 1 0 0 27 3 20 1 2 0 0 8 0 0 0 100 3 2 0 0 16 3 12 0 1 0 0 600 0 0 0 100 4 3 0 2 221 108 8 0 0 0 0 310 0 0 0 100 5 0 0 18 206 101 0 0 0 0 0 0 0 0 0 100 6 2 0 7 15 3 10 0 1 0 0 268 0 0 0 100 7 0 0 14 123 53 122 0 2 0 0 276 0 0 0 100 March 4, 2026 at 01:07:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 107 175 3 13 256 0 9 0 2 0 97 1 0 0 0 105 1 212 1 21 376 0 1149 0 2 0 98 2 0 0 0 88 4 149 2 16 211 0 0 0 1 0 99 3 0 0 0 167 124 98 6 6 246 0 595 0 1 0 99 4 0 0 4 274 103 147 2 14 277 0 301 0 1 0 99 5 0 0 2 250 101 91 1 11 381 0 0 0 1 0 99 6 0 0 7 103 28 135 1 5 278 0 260 0 1 0 99 7 0 0 14 117 27 220 0 23 372 0 266 0 1 0 99 March 4, 2026 at 01:07:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 120 0 0 0 0 10 0 1 0 99 1 0 0 0 8 1 32 1 0 2 0 1149 0 0 0 100 2 0 0 0 20 2 16 0 0 0 0 0 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 595 0 0 0 100 4 0 0 3 212 105 2 0 0 0 0 301 0 0 0 100 5 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 6 0 0 7 110 53 106 0 0 0 0 260 0 0 0 100 7 0 0 14 11 4 8 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:07:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 42 0 4 2173 106 224 1 12 26 5 310 0 2 0 97 1 58 0 0 76 6 129 3 13 15 3 1338 1 1 0 98 2 72 0 14 69 2 86 0 6 8 1 114 0 1 0 99 3 194 0 2 70 6 84 3 5 9 7 654 4 1 0 96 4 5180 0 12 284 111 163 11 14 39 15 1016 4 3 0 93 5 768 0 6 282 101 142 3 15 31 12 801 1 1 0 98 6 352 0 15 158 48 195 1 13 5 6 1074 0 3 0 97 7 144 0 20 62 7 99 2 9 18 7 532 1 0 0 99 March 4, 2026 at 01:07:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2166 151 194 0 6 2 0 39 0 2 0 98 1 42 0 0 56 1 85 0 5 14 0 1165 0 1 0 99 2 61 0 7 50 7 55 1 4 3 0 17 0 1 0 99 3 2 0 0 17 2 14 0 2 2 0 302 0 0 0 100 4 0 0 9 221 106 12 0 1 10 0 0 0 1 0 99 5 23 0 5 219 103 16 0 3 16 0 317 0 0 0 100 6 0 0 7 18 3 16 0 2 8 0 560 0 0 0 100 7 5 0 14 21 4 23 0 2 11 0 280 0 0 0 100 March 4, 2026 at 01:07:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 152 208 0 0 0 0 1 0 2 0 98 1 5 0 119 11 1 38 1 3 3 0 1061 0 1 0 99 2 0 0 0 49 8 28 0 1 0 0 9 0 1 0 99 3 0 0 0 28 2 4 0 0 0 0 294 0 0 0 100 4 0 0 4 228 105 0 0 0 0 0 0 0 0 0 100 5 0 0 2 227 102 2 0 0 0 0 301 0 0 0 100 6 0 0 7 29 4 8 0 0 0 0 607 0 0 0 100 7 0 0 14 28 4 8 0 0 0 0 267 0 0 0 100 March 4, 2026 at 01:07:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2156 147 198 0 0 2 0 2 0 2 0 98 1 0 0 0 24 7 46 2 1 0 0 1059 0 1 0 99 2 0 0 0 34 7 28 0 0 1 0 8 0 0 0 99 3 0 0 0 12 2 6 0 1 1 0 294 0 0 0 100 4 0 0 3 220 109 8 0 1 1 0 0 0 0 0 100 5 0 0 3 215 103 8 0 0 1 0 302 0 1 0 99 6 0 0 7 15 4 10 0 0 0 0 562 0 0 0 100 7 0 0 14 16 4 14 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:07:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 110 0 0 0 0 4 0 1 0 99 1 0 0 0 110 52 136 0 0 0 0 1062 0 1 0 99 2 0 0 0 30 7 26 0 0 0 0 5 0 1 0 99 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 1 213 104 2 0 0 1 0 0 0 0 0 100 5 0 0 6 211 102 8 0 1 1 0 301 0 0 0 100 6 0 0 7 12 4 8 0 0 0 0 561 0 0 0 100 7 0 0 14 9 3 6 0 0 0 0 265 0 0 0 100 March 4, 2026 at 01:07:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 214 0 14 2933 110 1178 57 78 27 0 6809 13 6 0 81 1 266 0 0 793 8 1003 31 60 9 2 7310 15 5 0 81 2 183 0 0 862 11 1178 40 66 16 1 6016 12 5 0 83 3 140 0 0 795 27 1227 49 59 8 0 7485 9 4 0 87 4 71 0 2 872 108 825 19 47 12 0 6029 12 3 0 85 5 153 0 773 736 105 888 22 42 15 0 5629 11 4 0 85 6 41 0 7 576 15 807 19 39 9 0 7836 7 3 0 90 7 188 0 0 774 9 1333 45 47 15 0 5547 10 3 0 87 March 4, 2026 at 01:07:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 12 0 2 0 0 276 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 3 0 0 0 118 54 140 1 0 1 0 1358 0 0 0 99 4 0 0 3 312 105 102 0 0 0 0 0 0 0 0 100 5 0 0 3 213 103 6 0 0 0 0 301 0 0 0 100 6 0 0 7 16 4 16 0 1 1 0 560 0 0 0 100 7 0 0 0 18 6 12 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:07:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 14 2150 102 74 0 6 6 2 350 0 2 0 98 1 4 0 0 46 1 14 0 2 3 2 45 0 0 0 100 2 0 0 0 46 2 21 0 4 2 0 9 0 0 0 100 3 0 0 0 138 54 146 2 1 2 0 1478 0 1 0 99 4 3324 0 119 238 102 58 7 2 9 10 1264 4 3 0 94 5 151 0 3 305 103 136 0 12 10 17 573 0 1 0 99 6 26 0 7 55 4 62 0 8 13 6 710 0 0 0 100 7 28 0 1 83 7 113 0 12 6 7 159 0 0 0 100 March 4, 2026 at 01:07:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2169 101 173 3 10 302 0 266 0 2 0 98 1 1 0 0 59 1 110 4 8 271 0 3 0 1 0 99 2 0 0 0 72 1 140 3 13 300 0 10 0 1 0 99 3 0 0 0 166 112 183 15 9 316 0 1441 0 1 0 98 4 0 0 3 356 146 203 1 10 217 0 0 0 1 0 99 5 0 0 3 274 103 153 1 23 279 0 301 0 1 0 99 6 0 0 7 65 4 110 1 8 164 0 561 0 1 0 99 7 0 0 0 129 4 212 0 19 243 0 1 0 1 0 99 March 4, 2026 at 01:07:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 101 16 0 1 0 0 266 0 1 0 99 1 0 0 0 21 6 18 0 1 0 0 323 0 0 0 100 2 0 0 0 13 1 12 0 1 0 0 15 0 0 0 100 3 0 0 0 17 5 42 1 0 0 0 1442 0 0 0 99 4 0 0 3 307 151 102 0 0 0 0 0 0 0 0 100 5 0 0 3 211 103 4 1 0 0 0 301 0 0 0 100 6 0 0 7 12 4 8 0 0 0 0 560 0 0 0 100 7 0 0 0 110 3 104 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:07:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 92 1 1 0 0 266 0 1 0 99 1 0 0 0 19 2 22 0 1 1 0 18 0 0 0 100 2 0 0 0 17 1 22 0 1 0 0 17 0 0 0 100 3 0 0 0 24 8 50 1 0 0 0 1453 0 0 0 99 4 0 0 4 313 155 102 0 0 0 0 0 0 0 0 100 5 0 0 2 214 103 10 0 0 1 0 304 0 0 0 100 6 0 0 7 19 4 18 0 0 0 0 569 0 0 0 100 7 0 0 0 31 1 24 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 329 0 14 2248 101 470 24 33 11 5 1812 2 2 0 96 1 145 0 0 121 2 140 3 12 21 1 1808 2 1 0 97 2 26 0 0 176 1 376 16 28 4 0 2160 2 1 0 97 3 16 0 0 164 7 473 17 29 7 0 3504 2 1 0 97 4 52 0 1 316 108 336 26 22 11 0 1515 3 1 0 96 5 32 0 117 405 149 371 4 21 2 0 2196 2 1 0 97 6 397 0 7 84 4 288 8 18 4 4 2522 2 1 0 96 7 110 0 0 93 2 177 27 21 8 1 1938 2 1 0 97 March 4, 2026 at 01:07:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 110 0 0 0 0 266 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 14 2 10 0 0 0 0 1 0 0 0 100 3 0 0 0 15 3 38 1 1 1 0 1448 0 0 0 99 4 0 0 3 226 110 18 0 1 0 0 9 0 0 0 100 5 0 0 3 308 152 104 0 0 0 0 301 0 0 0 100 6 0 0 7 12 4 8 1 0 0 0 561 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:07:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2180 103 240 1 13 182 0 419 0 2 0 98 1 0 0 0 73 2 123 1 10 165 0 26 0 1 0 99 2 0 0 0 127 29 175 2 12 157 0 39 0 1 0 99 3 0 0 14 155 92 167 9 11 171 0 1465 0 2 0 98 4 0 0 4 284 108 133 1 8 170 0 32 0 1 0 99 5 0 0 2 327 128 162 1 9 127 0 306 0 1 0 99 6 0 0 16 81 4 149 1 7 205 0 561 0 2 0 98 7 0 0 7 77 3 154 0 13 227 0 8 0 0 0 100 March 4, 2026 at 01:07:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2118 107 22 1 1 0 0 275 0 1 0 99 1 0 0 0 100 0 94 0 2 0 0 0 0 0 0 100 2 0 0 0 112 51 106 0 0 0 0 0 0 0 0 100 3 0 0 0 16 3 41 2 1 1 0 1360 0 0 0 99 4 0 0 4 212 102 4 0 0 0 0 0 0 0 0 100 5 0 0 2 218 103 10 0 0 0 0 301 0 0 0 100 6 0 0 7 14 4 10 0 1 0 0 562 0 0 0 100 7 0 0 0 14 2 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:07:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2142 111 26 1 0 0 0 284 0 1 0 98 1 0 0 7 136 5 118 0 2 1 0 17 0 0 0 100 2 0 0 0 140 56 122 0 0 0 0 13 0 0 0 100 3 0 0 112 16 3 39 1 1 2 0 1358 0 1 0 99 4 0 0 4 240 108 10 0 0 0 0 5 0 0 0 100 5 0 0 2 233 102 10 0 0 3 0 304 0 0 0 100 6 0 0 7 46 6 30 0 2 0 0 569 0 0 0 100 7 22 0 0 35 5 16 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:07:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2121 107 30 0 3 1 0 275 0 1 0 99 1 0 0 0 101 0 92 0 0 0 0 0 0 0 0 100 2 0 0 0 112 51 108 0 1 0 0 0 0 0 0 100 3 0 0 7 14 3 38 1 0 0 0 1354 0 1 0 99 4 0 0 1 212 102 4 0 0 0 0 0 0 0 0 100 5 0 0 5 209 102 2 0 0 0 0 301 0 0 0 100 6 0 0 7 22 5 16 1 0 0 0 561 0 0 0 100 7 0 0 0 15 3 10 0 1 0 0 21 0 0 0 100 March 4, 2026 at 01:07:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 14 2889 110 1124 46 68 6 0 6632 9 5 0 86 1 24 0 0 877 4 1216 33 60 15 0 4578 9 3 0 88 2 30 0 0 904 43 1349 39 56 19 0 5282 10 4 0 86 3 19 0 0 636 5 914 28 40 21 0 6978 10 3 0 87 4 20 0 3 888 105 986 29 36 20 0 4286 9 3 0 88 5 0 0 633 665 111 802 25 36 14 0 7181 10 4 0 87 6 32 0 7 582 7 929 31 38 11 0 7012 9 3 0 88 7 19 0 0 406 7 530 13 25 4 0 6268 8 2 0 90 March 4, 2026 at 01:07:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 14 2206 102 172 2 16 185 0 482 1 2 0 97 1 21 0 0 192 1 327 7 35 240 0 501 1 1 0 98 2 0 0 0 108 3 159 7 15 197 0 480 1 1 0 98 3 0 0 0 187 115 205 13 24 288 0 1746 0 1 0 98 4 0 0 2 294 103 155 2 14 224 0 391 0 1 0 99 5 0 0 46 274 101 122 2 10 171 0 260 0 1 0 99 6 3 0 7 195 54 278 2 15 246 0 906 1 1 0 98 7 0 0 0 150 7 219 2 13 208 0 129 0 1 0 99 March 4, 2026 at 01:07:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 16 2141 102 70 0 7 4 5 322 0 1 0 99 1 5 0 0 110 1 96 0 3 6 2 108 0 0 0 100 2 24 0 0 48 5 53 0 5 3 5 390 0 0 0 100 3 3324 0 116 46 3 108 7 3 7 17 2611 4 2 0 94 4 156 0 2 264 102 96 0 16 12 15 209 0 0 0 99 5 34 0 4 252 101 54 1 9 11 8 118 0 0 0 100 6 8 0 9 147 54 139 0 4 4 5 619 0 0 0 99 7 5 0 0 46 7 34 0 2 3 0 73 0 0 0 100 March 4, 2026 at 01:07:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 103 106 0 0 0 0 267 0 1 0 99 1 0 0 0 18 2 16 0 2 0 0 10 0 0 0 100 2 0 0 0 17 2 18 0 0 0 0 322 0 0 0 99 3 0 0 0 13 3 36 2 0 3 0 1441 0 1 0 99 4 0 0 3 217 106 4 0 0 1 0 0 0 0 0 100 5 0 0 3 210 101 6 0 1 0 0 3 0 0 0 100 6 0 0 7 125 54 126 1 0 0 0 573 0 0 0 100 7 0 0 0 21 7 13 1 0 0 0 11 0 0 0 100 March 4, 2026 at 01:07:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 102 104 0 0 0 0 266 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 16 2 12 1 0 0 0 311 0 0 0 100 3 0 0 0 12 3 38 0 1 1 0 1439 0 1 0 99 4 0 0 3 212 102 6 0 1 0 0 0 0 0 0 100 5 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 6 0 0 7 120 54 116 0 0 0 0 562 0 0 0 100 7 1 0 0 17 6 13 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:07:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 105 114 1 0 0 0 272 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 3 0 0 0 100 2 0 0 0 20 5 18 0 0 0 0 316 0 0 0 99 3 0 0 0 14 3 36 3 0 1 0 1437 0 0 0 99 4 0 0 2 219 108 6 0 0 1 0 0 0 0 0 100 5 0 0 4 207 101 2 0 1 1 0 0 0 0 0 100 6 0 0 7 123 54 120 1 0 0 0 566 0 0 0 100 7 0 0 0 16 5 10 0 0 0 0 324 0 0 0 100 March 4, 2026 at 01:07:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 14 2210 108 366 38 23 10 0 1903 3 2 0 95 1 159 0 0 178 20 391 12 24 2 0 2283 2 1 0 98 2 0 0 0 152 2 309 5 18 3 0 2569 2 1 0 97 3 2 0 0 176 3 346 26 17 7 0 3215 2 1 0 97 4 257 0 3 350 108 249 12 11 4 0 1554 2 1 0 98 5 409 0 101 302 101 321 20 17 6 0 1895 3 1 0 96 6 56 0 7 174 36 428 17 26 4 0 2859 3 1 0 96 7 141 0 0 81 3 134 17 14 5 0 1300 3 1 0 96 March 4, 2026 at 01:07:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2116 105 122 1 1 0 0 282 0 1 0 99 1 0 0 0 111 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 15 2 10 0 0 4 0 314 0 1 0 99 3 0 0 0 16 3 40 1 0 0 0 1460 0 0 0 99 4 14 0 3 216 103 8 0 1 6 0 14 0 0 0 100 5 0 0 17 209 101 4 0 0 0 0 13 0 0 0 100 6 0 0 7 16 4 12 1 1 0 0 562 0 0 0 100 7 1 0 0 26 4 22 0 0 0 0 13 0 0 0 100 March 4, 2026 at 01:07:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2128 113 76 0 1 0 0 283 0 1 0 98 1 0 0 0 165 51 163 0 1 0 0 5 0 0 0 100 2 0 0 0 23 5 22 1 0 0 0 314 0 0 0 100 3 0 0 0 15 3 38 3 0 1 0 1447 0 1 0 99 4 0 0 3 221 109 10 0 0 0 0 3 0 0 0 100 5 0 0 3 212 102 6 0 0 0 0 3 0 0 0 100 6 0 0 7 24 7 24 0 0 2 0 574 0 0 0 100 7 0 0 0 20 3 16 0 1 2 0 3 0 0 0 100 March 4, 2026 at 01:07:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2116 104 24 2 7 11 0 284 0 2 0 98 1 0 0 7 220 51 223 1 4 7 0 94 0 0 0 100 2 0 0 0 25 2 25 1 5 12 0 340 0 0 0 100 3 0 0 0 25 4 49 1 0 5 0 1376 0 1 0 99 4 0 0 10 220 102 20 0 2 9 0 75 0 1 0 99 5 0 0 4 230 107 26 0 2 7 0 28 0 0 0 100 6 2 0 7 24 4 24 0 3 8 0 589 0 0 0 100 7 0 0 0 24 1 17 0 2 7 0 2 0 0 0 100 March 4, 2026 at 01:07:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 103 15 0 1 0 0 267 0 1 0 99 1 0 0 0 211 50 204 0 1 0 0 0 0 0 0 100 2 0 0 7 16 3 14 0 2 0 0 301 0 0 0 100 3 0 0 0 16 3 36 2 0 0 0 1355 0 0 0 99 4 0 0 3 215 105 4 0 1 0 0 0 0 0 0 100 5 0 0 3 220 107 12 1 0 0 0 9 0 0 0 100 6 0 0 7 16 5 10 1 0 0 0 562 0 0 0 100 7 0 0 0 20 3 14 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:07:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2151 102 89 2 7 118 0 266 0 2 0 98 1 0 0 0 214 51 223 2 4 162 0 0 0 1 0 99 2 0 0 0 70 3 88 2 9 178 0 301 0 1 0 99 3 0 0 0 139 81 157 11 22 140 0 1355 0 1 0 99 4 0 0 2 268 107 79 1 7 175 0 0 0 1 0 99 5 0 0 4 326 106 155 1 7 124 0 8 0 1 0 99 6 0 0 7 72 4 94 3 6 130 0 561 0 0 0 99 7 0 0 0 87 3 134 1 17 187 0 5 0 0 0 100 March 4, 2026 at 01:07:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2103 102 104 0 2 0 0 266 0 1 0 98 1 0 0 0 110 50 102 0 1 0 0 0 0 0 0 100 2 0 0 0 15 3 8 1 0 0 0 301 0 0 0 100 3 0 0 0 14 3 38 1 0 0 0 1355 0 0 0 100 4 0 0 3 218 108 4 0 0 0 0 0 0 0 0 100 5 0 0 3 224 109 16 1 0 0 0 8 0 0 0 100 6 0 0 7 13 4 8 0 0 0 0 561 0 0 0 100 7 0 0 0 18 2 12 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:07:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 16 2899 115 1249 47 65 11 0 5290 11 6 0 83 1 3 0 0 817 7 1295 23 56 12 0 6237 10 4 0 86 2 6 0 0 694 3 933 31 44 13 0 6632 11 4 0 85 3 2 0 0 784 34 1061 21 47 10 0 7421 9 4 0 87 4 4 0 2 781 111 852 32 48 13 0 6045 11 3 0 86 5 0 0 690 662 109 848 31 45 10 0 6205 10 4 0 87 6 3 0 7 519 5 728 12 34 5 0 6650 10 2 0 88 7 20 0 1 668 5 1027 11 28 9 0 4805 8 2 0 89 March 4, 2026 at 01:07:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 4 0 0 0 0 266 0 1 0 99 1 0 0 0 8 0 4 0 0 0 0 1 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 311 0 0 0 100 3 0 0 0 143 19 166 0 0 1 0 1359 0 1 0 99 4 0 0 4 287 140 82 0 2 0 0 0 0 0 0 100 5 0 0 2 212 103 6 0 1 0 0 1 0 0 0 100 6 0 0 7 15 4 12 1 1 2 0 560 0 0 0 100 7 0 0 0 23 5 18 0 0 0 0 6 0 0 0 100 March 4, 2026 at 01:07:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3325 0 113 2141 102 145 6 5 9 15 1257 3 3 0 94 1 140 0 14 59 0 92 1 10 10 15 506 0 0 0 99 2 25 0 1 53 3 64 0 7 9 6 450 0 0 0 100 3 60 0 0 87 8 116 2 7 8 6 1581 1 1 0 99 4 12 0 1 343 152 134 0 4 3 3 106 0 0 0 99 5 5 0 5 231 102 14 0 1 3 2 40 0 0 0 100 6 0 0 7 31 4 18 0 3 3 0 562 0 0 0 100 7 0 0 0 38 3 20 0 1 1 0 19 0 0 0 100 March 4, 2026 at 01:07:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 102 112 2 9 250 0 0 0 2 0 98 1 0 0 14 49 2 81 2 9 190 0 266 0 1 0 99 2 0 0 0 63 3 111 1 6 254 0 321 0 1 0 99 3 0 0 0 192 93 248 16 27 244 0 1449 0 1 0 98 4 0 0 4 355 153 188 1 9 237 0 0 0 1 0 99 5 0 0 2 266 103 118 1 8 205 0 0 0 1 0 99 6 0 0 7 70 4 155 3 20 232 0 560 0 1 0 99 7 0 0 0 66 2 131 2 16 217 0 2 0 1 0 99 March 4, 2026 at 01:07:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 50 0 3 0 0 0 0 1 0 99 1 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 3 0 0 0 30 6 50 2 0 4 0 1761 0 0 0 99 4 0 0 3 371 153 165 0 1 0 0 0 0 0 0 100 5 0 0 3 212 103 8 0 0 0 0 3 0 0 0 100 6 0 0 7 12 4 8 0 0 0 0 562 0 0 0 100 7 0 0 0 11 1 8 0 0 1 0 10 0 0 0 100 March 4, 2026 at 01:07:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 94 0 2 0 0 8 0 1 0 99 1 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 2 0 0 0 19 4 19 0 0 0 0 326 0 0 0 100 3 0 0 0 20 3 48 1 1 1 0 1446 0 0 0 99 4 0 0 3 343 158 132 0 1 0 0 6 0 0 0 100 5 0 0 3 233 112 30 0 0 1 0 20 0 0 0 100 6 0 0 7 22 7 20 1 1 0 0 571 0 0 0 100 7 0 0 0 11 3 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:07:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2259 103 274 3 11 2 0 1380 2 2 0 96 1 82 0 0 102 2 168 0 9 2 0 1378 1 0 0 98 2 446 0 0 112 2 245 6 11 3 0 2255 3 1 0 96 3 274 0 0 130 3 316 14 18 3 0 2632 1 1 0 97 4 53 0 18 385 152 204 9 11 2 0 1455 1 1 0 98 5 111 0 128 236 103 56 12 6 8 0 910 4 1 0 95 6 30 0 7 83 4 210 3 13 5 0 2406 3 1 0 96 7 144 0 0 124 2 296 20 14 6 0 983 1 1 0 98 March 4, 2026 at 01:07:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 2 0 0 19 0 1 0 99 1 0 0 0 29 10 20 0 0 0 0 11 0 0 0 100 2 0 0 0 20 3 18 1 1 0 0 310 0 0 0 100 3 0 0 0 15 3 40 2 0 2 0 1445 0 0 0 99 4 0 0 17 318 153 112 0 1 0 0 266 0 0 0 100 5 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 7 12 4 8 1 0 0 0 561 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:07:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 100 180 1 23 197 0 19 0 2 0 98 1 0 0 14 70 5 111 1 13 162 0 19 0 1 0 99 2 0 0 0 73 3 126 2 12 197 0 315 0 1 0 99 3 0 0 0 138 84 191 14 22 188 0 1482 0 1 0 98 4 0 0 23 412 152 260 1 10 168 0 266 0 1 0 99 5 0 0 4 280 106 128 0 9 207 0 90 0 1 0 99 6 0 0 14 59 4 102 1 6 154 1 637 0 2 0 98 7 1 0 0 57 1 96 1 5 121 0 26 0 0 0 99 March 4, 2026 at 01:07:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 76 0 2 0 0 0 0 1 0 99 1 0 0 0 11 1 5 0 2 0 0 0 0 0 0 100 2 0 0 0 12 2 6 0 1 0 0 301 0 0 0 100 3 0 0 0 17 3 40 1 1 1 0 1356 0 0 0 99 4 0 0 18 351 153 144 0 2 0 0 266 0 0 0 100 5 0 0 9 217 106 12 0 1 0 0 7 0 0 0 100 6 0 0 7 14 4 8 1 0 0 0 560 0 0 0 100 7 0 0 0 12 3 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:07:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 100 108 0 0 0 0 7 0 1 0 99 1 0 0 112 10 1 7 0 0 0 0 1 0 0 0 100 2 0 0 0 27 2 6 0 0 0 0 301 0 0 0 100 3 0 0 0 35 3 46 1 1 1 0 1362 0 1 0 99 4 0 0 17 340 156 116 0 0 2 0 269 0 0 0 99 5 0 0 3 244 109 22 0 1 2 0 9 0 0 0 100 6 0 0 7 47 9 32 1 2 1 0 585 0 0 0 100 7 0 0 0 32 5 10 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:07:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 0 0 1 0 99 1 0 0 7 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 4 1 0 0 0 301 0 0 0 100 3 0 0 0 17 3 40 3 0 1 0 1356 0 1 0 99 4 3 0 15 321 154 278 0 0 0 0 598 0 0 0 99 5 0 0 5 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 7 27 11 22 0 0 0 0 574 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:07:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2880 100 1188 25 65 9 0 6106 9 5 0 86 1 22 0 0 812 1 1207 35 49 19 0 4784 12 4 0 84 2 23 0 0 668 4 1021 35 50 16 0 5636 10 3 0 86 3 18 0 0 623 4 942 24 49 13 0 7529 11 4 0 85 4 34 0 16 834 138 840 24 38 22 0 7195 12 4 0 84 5 10 0 676 770 103 1082 30 34 16 0 4835 8 4 0 88 6 1 0 7 656 20 985 21 40 17 0 6103 9 3 0 89 7 8 0 0 478 7 710 17 36 9 0 8423 11 3 0 87 March 4, 2026 at 01:07:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2187 102 196 0 18 208 0 179 0 2 0 98 1 0 0 0 92 3 176 1 24 268 0 101 0 1 0 99 2 0 0 0 193 53 273 0 22 277 0 701 0 1 0 99 3 0 0 0 164 99 195 15 18 208 0 1121 1 2 0 98 4 0 0 16 284 105 136 2 11 198 0 707 0 1 0 99 5 0 0 32 329 103 196 0 11 247 0 215 0 1 0 99 6 0 0 7 81 4 148 2 11 304 0 595 0 1 0 99 7 0 0 0 105 7 203 2 27 236 0 125 0 1 0 99 March 4, 2026 at 01:07:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 2153 102 82 0 4 1 2 98 0 1 0 98 1 3325 0 121 40 2 58 5 1 6 11 1256 4 2 0 95 2 86 0 0 159 53 181 0 12 12 15 474 0 1 0 99 3 71 0 0 60 2 139 2 8 16 10 1214 0 1 0 99 4 46 0 18 248 103 44 0 5 8 7 712 0 0 0 99 5 7 0 4 288 102 70 0 4 6 2 60 0 0 0 100 6 5 0 7 46 5 34 0 3 6 1 641 0 0 0 100 7 0 0 0 37 3 12 0 1 2 0 4 0 0 0 100 March 4, 2026 at 01:08:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 100 120 0 1 0 0 10 0 1 0 99 1 0 0 0 11 1 7 0 1 0 0 0 0 0 0 100 2 0 0 0 121 56 118 1 0 0 0 323 0 0 0 100 3 0 0 0 20 2 46 0 0 0 0 1151 0 1 0 99 4 4 0 16 223 110 10 1 0 0 0 564 0 0 0 100 5 0 0 4 211 102 6 0 0 0 0 0 0 0 0 100 6 0 0 7 24 7 26 0 0 0 0 579 0 0 0 100 7 0 0 0 24 8 20 0 0 0 0 19 0 0 0 100 March 4, 2026 at 01:08:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 1 0 0 3 0 1 0 99 1 0 0 0 17 1 16 0 1 2 0 0 0 0 0 100 2 0 0 0 115 54 112 0 1 0 0 311 0 0 0 100 3 0 0 0 13 3 38 1 0 0 0 1145 0 0 0 100 4 0 0 19 211 104 4 1 0 0 0 560 0 0 0 100 5 0 0 1 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 7 12 4 8 1 0 0 0 560 0 0 0 100 7 0 0 0 18 6 14 0 0 0 0 11 0 0 0 100 March 4, 2026 at 01:08:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2107 102 92 0 2 0 0 2 0 1 0 99 1 0 0 0 40 0 32 0 1 0 0 0 0 0 0 100 2 0 0 0 123 58 120 0 0 0 0 307 0 0 0 100 3 0 0 0 15 2 44 1 1 2 0 1159 0 0 0 99 4 0 0 17 211 104 4 1 0 0 0 559 0 0 0 100 5 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 7 13 4 8 1 0 0 0 562 0 0 0 100 7 0 0 0 14 3 6 0 0 0 0 324 0 0 0 100 March 4, 2026 at 01:08:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 252 0 0 2154 101 178 2 7 1 1 1054 1 2 0 97 1 0 0 0 70 0 91 5 7 0 0 858 1 0 0 99 2 85 0 0 113 37 101 3 3 0 0 965 2 0 0 97 3 460 0 0 58 2 102 14 3 7 0 2577 4 1 0 95 4 166 0 17 256 103 91 7 12 1 1 1979 2 1 0 97 5 93 0 114 238 103 59 8 11 0 0 1265 3 1 0 96 6 25 0 7 96 26 99 4 10 4 1 1389 1 0 0 98 7 16 0 0 57 1 79 5 11 6 0 1139 2 0 0 97 March 4, 2026 at 01:08:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 110 0 0 0 0 4 0 1 0 99 1 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 2 0 0 0 18 4 10 1 0 1 0 301 0 0 0 100 3 0 0 0 27 9 54 1 1 3 0 1159 0 0 0 99 4 5 0 15 215 109 4 0 0 0 0 605 0 0 0 100 5 0 0 5 209 102 4 0 0 0 0 3 0 0 0 100 6 0 0 7 114 54 108 0 0 0 0 560 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:08:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 10 0 1 0 99 1 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 2 0 0 0 14 4 10 0 0 0 0 301 0 0 0 100 3 0 0 0 33 9 60 2 1 2 0 1168 0 1 0 99 4 0 0 16 219 111 4 1 0 0 0 561 0 0 0 100 5 0 0 4 211 102 6 0 0 2 0 0 0 0 0 100 6 0 0 7 120 56 120 0 0 0 0 574 0 0 0 100 7 0 0 0 11 1 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:08:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2120 100 127 1 3 11 0 26 0 1 0 99 1 0 0 0 24 0 28 0 5 9 2 149 0 0 0 100 2 0 0 7 18 4 15 0 2 9 0 301 0 0 0 100 3 1 0 0 33 4 61 3 1 8 0 1103 0 0 0 99 4 1 0 27 223 104 20 0 5 4 0 585 0 1 0 99 5 0 0 16 220 102 26 0 4 8 1 35 0 0 0 99 6 0 0 7 123 54 120 1 2 6 0 564 0 0 0 100 7 0 0 0 41 11 36 0 3 3 0 29 0 0 0 100 March 4, 2026 at 01:08:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 111 0 2 0 0 2 0 1 0 99 1 0 0 0 15 0 8 0 0 0 0 0 0 0 0 100 2 0 0 0 18 5 12 0 1 0 0 302 0 0 0 100 3 0 0 7 12 2 38 1 1 1 0 1061 0 0 0 100 4 1 0 18 214 104 6 1 1 3 0 560 0 0 0 100 5 0 0 2 212 102 2 0 0 0 0 0 0 0 0 100 6 0 0 7 119 55 118 0 1 2 0 561 0 0 0 100 7 0 0 0 22 8 16 0 0 0 0 10 0 0 0 100 March 4, 2026 at 01:08:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 112 2180 102 197 0 12 178 0 7 0 2 0 98 1 0 0 0 101 0 150 0 14 163 0 0 0 1 0 99 2 25 0 0 76 5 82 2 9 89 0 308 0 1 0 99 3 0 0 0 197 131 208 20 11 206 0 1061 0 2 0 98 4 0 0 23 302 104 174 2 27 187 0 561 0 1 0 99 5 0 0 4 343 102 207 0 23 191 0 0 0 1 0 99 6 0 0 7 190 54 232 2 6 167 0 561 0 1 0 99 7 0 0 0 107 10 154 0 9 182 0 13 0 1 0 99 March 4, 2026 at 01:08:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 101 72 0 3 0 0 1 0 1 0 99 1 0 0 0 15 0 8 0 0 0 0 0 0 0 0 100 2 0 0 0 14 4 8 0 0 0 0 301 0 0 0 100 3 0 0 0 11 2 36 0 0 2 0 1057 0 0 0 99 4 0 0 17 216 107 6 0 1 0 0 559 0 0 0 100 5 0 0 3 251 102 40 0 0 0 0 0 0 0 0 100 6 0 0 7 116 54 112 0 2 0 0 562 0 0 0 100 7 0 0 0 25 9 20 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:08:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 10 2953 109 1481 41 58 26 0 4597 8 6 0 87 1 33 0 0 626 3 776 26 48 14 0 5972 11 3 0 86 2 36 0 0 814 11 1168 34 50 28 0 5472 12 4 0 84 3 19 0 0 755 3 1151 30 50 17 0 5905 9 4 0 88 4 42 0 3 793 117 847 22 37 24 0 5506 11 3 0 86 5 59 0 661 598 107 705 6 26 25 0 7243 10 4 0 86 6 7 0 21 638 45 969 12 46 21 0 7229 7 3 0 91 7 15 0 0 512 5 782 20 34 15 0 6342 11 3 0 86 March 4, 2026 at 01:08:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 14 0 0 0 0 0 0 1 0 99 1 0 0 0 9 1 6 0 0 0 0 14 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 3 0 0 0 118 5 144 1 0 1 0 1064 0 1 0 99 4 0 0 4 214 107 2 0 0 0 0 294 0 0 0 100 5 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 21 125 61 124 0 0 0 0 838 0 0 0 99 7 0 0 0 9 2 4 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:08:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 101 28 0 3 5 0 1 0 1 0 99 1 0 0 0 67 2 16 1 2 0 0 63 0 0 0 100 2 3330 0 116 40 2 73 7 2 7 20 1577 3 2 0 95 3 112 0 0 75 4 151 1 11 10 12 1408 0 1 0 99 4 43 0 4 352 107 149 0 8 7 13 420 0 1 0 99 5 57 0 4 256 102 139 0 7 10 13 176 0 0 0 99 6 24 0 21 160 59 154 2 4 9 8 904 0 0 0 99 7 4 0 0 36 2 20 0 3 5 1 25 0 0 0 100 March 4, 2026 at 01:08:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 100 221 0 19 193 0 0 0 2 0 98 1 0 0 0 59 2 105 2 10 255 0 4 0 1 0 99 2 0 0 0 66 2 117 1 9 172 0 301 0 1 0 99 3 0 0 0 136 90 157 11 12 245 0 1145 0 1 0 99 4 0 0 2 269 105 127 1 19 236 0 295 0 1 0 99 5 0 0 4 246 102 73 1 5 156 0 3 0 1 0 99 6 0 0 21 154 60 183 0 5 176 0 836 0 1 0 99 7 0 0 0 55 1 94 1 3 217 0 3 0 1 0 99 March 4, 2026 at 01:08:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 119 0 0 0 0 5 0 1 0 99 1 0 0 0 8 0 4 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 16 5 42 0 0 3 0 1144 0 0 0 99 4 0 0 4 214 104 6 1 0 0 0 299 0 0 0 100 5 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 21 31 14 24 1 0 0 0 1153 0 0 0 99 7 0 0 0 103 48 100 0 2 0 0 2 0 0 0 100 March 4, 2026 at 01:08:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 128 0 0 0 0 12 0 1 0 99 1 0 0 0 6 0 2 0 0 0 0 10 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 301 0 0 0 100 3 0 0 0 18 5 44 1 0 2 0 1145 0 1 0 99 4 0 0 2 216 107 4 0 0 0 0 294 0 0 0 100 5 0 0 4 213 102 10 0 2 0 0 0 0 0 0 100 6 0 0 21 18 6 20 0 0 0 0 841 0 0 0 100 7 0 0 0 116 52 112 1 0 0 0 5 0 0 0 100 March 4, 2026 at 01:08:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2199 105 170 4 12 3 0 1200 2 2 0 96 1 1 0 0 72 0 95 4 16 11 0 1393 1 1 0 98 2 1 0 0 109 1 243 9 14 1 0 1652 1 1 0 98 3 436 0 0 75 6 86 11 5 7 0 2382 6 1 0 93 4 51 0 3 334 104 199 3 16 3 1 1571 1 1 0 98 5 463 0 115 348 102 187 6 12 12 0 1906 4 1 0 95 6 128 0 21 117 5 250 31 18 4 1 2208 1 1 0 98 7 22 0 0 180 53 213 3 14 1 0 1571 1 1 0 98 March 4, 2026 at 01:08:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 107 124 1 0 0 0 7 0 1 0 98 1 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 302 0 0 0 100 3 0 0 0 15 4 38 2 0 0 0 1155 0 1 0 99 4 0 0 3 212 103 6 0 0 0 0 294 0 1 0 99 5 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 7 10 3 6 0 0 0 0 561 0 0 0 100 7 0 0 0 111 53 106 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:08:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2190 105 228 3 38 143 0 15 0 2 0 98 1 0 0 14 65 2 111 11 15 116 2 453 0 1 0 99 2 0 0 0 128 7 171 3 22 148 0 339 0 1 0 99 3 0 0 0 137 84 174 11 23 151 0 1160 0 1 0 99 4 0 0 16 247 106 65 1 9 63 0 298 0 1 0 99 5 0 0 4 259 102 110 6 17 187 0 20 0 1 0 99 6 0 0 7 56 3 113 4 13 149 0 577 0 1 0 99 7 0 0 17 156 53 201 3 22 127 0 15 0 1 0 99 March 4, 2026 at 01:08:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2103 100 56 0 2 0 0 0 0 1 0 99 1 0 0 14 10 1 8 0 1 1 0 266 0 0 0 100 2 0 0 0 68 7 60 0 0 0 0 310 0 0 0 100 3 0 0 0 15 4 38 1 0 2 0 1067 0 0 0 100 4 0 0 2 230 104 22 1 3 0 0 294 0 1 0 99 5 0 0 4 212 103 2 0 0 0 0 0 0 0 0 100 6 0 0 7 18 5 10 1 0 0 0 563 0 0 0 100 7 0 0 0 110 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 100 120 0 0 0 0 7 0 1 0 99 1 0 0 21 24 1 6 1 1 0 0 266 0 0 0 100 2 0 0 0 43 10 20 1 0 0 0 312 0 0 0 100 3 0 0 0 33 4 42 1 1 1 0 1065 0 0 0 99 4 0 0 113 225 108 13 0 0 0 0 295 0 1 0 99 5 24 0 5 231 103 8 0 1 0 0 5 0 0 0 100 6 0 0 7 45 9 28 2 0 0 0 586 0 0 0 100 7 0 0 0 134 53 114 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:08:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 78 0 2 0 0 0 0 1 0 99 1 0 0 14 12 1 8 0 0 3 0 266 0 0 0 100 2 7 0 0 11 1 8 0 2 1 0 304 0 0 0 100 3 0 0 0 31 11 56 1 1 3 0 1073 0 0 0 99 4 0 0 10 248 104 41 0 2 0 0 294 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 7 11 3 6 0 0 0 0 560 0 0 0 100 7 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:08:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38 0 0 2980 102 1547 48 69 20 0 5303 11 6 0 83 1 21 0 14 745 7 1043 30 51 11 0 5954 10 4 0 86 2 71 0 0 706 6 915 26 51 11 0 6451 11 4 0 86 3 2 0 0 605 15 867 9 39 12 0 9110 10 3 0 87 4 0 0 1 880 106 1048 24 46 7 0 4186 10 3 0 87 5 3 0 690 663 104 838 11 35 14 0 6249 10 4 0 86 6 3 0 7 607 14 944 8 42 10 0 5879 8 2 0 89 7 11 0 0 629 28 980 22 40 15 1 7666 9 3 0 88 March 4, 2026 at 01:08:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 102 109 1 11 197 0 0 0 2 0 98 1 0 0 14 155 51 193 1 8 179 0 266 0 1 0 99 2 0 0 0 45 1 87 1 12 205 0 301 0 1 0 99 3 0 0 0 134 97 147 15 6 182 0 1072 0 1 0 99 4 0 0 1 265 106 103 2 10 192 0 295 0 1 0 99 5 0 0 5 262 103 128 1 18 218 0 0 0 1 0 99 6 0 0 7 159 5 203 1 12 186 1 590 0 1 0 99 7 0 0 0 68 2 138 2 18 235 0 1 0 1 0 99 March 4, 2026 at 01:08:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 110 0 2 0 0 20 0 1 0 99 1 0 0 14 107 51 104 1 0 0 0 266 0 0 0 100 2 0 0 0 8 1 2 1 0 0 0 301 0 0 0 100 3 0 0 0 25 9 48 2 0 2 0 1073 0 0 0 99 4 0 0 1 218 106 10 0 0 0 0 294 0 0 0 100 5 0 0 6 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 7 22 3 16 1 0 0 0 561 0 0 0 100 7 0 0 0 14 4 10 0 1 0 0 7 0 0 0 100 March 4, 2026 at 01:08:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 120 0 0 0 0 17 0 1 0 99 1 0 0 14 110 51 110 0 2 0 0 266 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 301 0 0 0 100 3 0 0 0 22 8 48 0 0 1 0 1071 0 0 0 99 4 0 0 2 220 107 10 0 0 0 0 294 0 0 0 100 5 0 0 4 211 102 8 0 1 1 0 0 0 0 0 100 6 1 0 7 21 5 22 0 0 0 0 579 0 0 0 100 7 0 0 0 13 1 8 0 1 0 0 5 0 0 0 100 March 4, 2026 at 01:08:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3329 0 113 2133 100 118 4 1 12 17 1273 4 3 0 93 1 155 0 14 167 51 184 0 11 18 15 410 0 1 0 99 2 38 0 1 46 1 67 0 9 13 9 507 0 0 0 100 3 18 0 0 61 10 143 1 6 7 5 1525 0 1 0 99 4 8 0 2 252 106 48 0 4 4 2 417 0 0 0 99 5 26 0 4 239 102 34 0 3 6 3 74 0 0 0 100 6 0 0 7 51 3 12 0 1 0 0 561 0 0 0 100 7 4 0 0 86 4 75 1 3 2 1 58 0 0 0 100 March 4, 2026 at 01:08:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 105 14 0 2 0 0 6 0 1 0 99 1 0 0 14 119 51 114 0 2 1 0 276 0 0 0 100 2 0 0 0 10 2 6 0 1 0 0 302 0 0 0 100 3 0 0 0 13 3 40 1 1 1 0 1150 0 0 0 99 4 0 0 5 269 105 63 1 2 0 0 294 0 0 0 100 5 0 0 1 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 7 13 4 8 1 0 0 0 562 0 0 0 100 7 0 0 0 58 2 50 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:08:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2208 107 138 8 17 0 0 1406 2 2 0 96 1 442 0 14 106 26 107 6 8 9 1 1523 4 1 0 95 2 68 0 0 68 3 208 3 10 3 0 1475 1 1 0 98 3 9 0 0 187 28 301 7 16 7 0 2815 2 1 0 97 4 87 0 3 324 105 110 8 13 3 1 1688 2 1 0 97 5 151 0 115 301 102 223 7 15 5 0 1367 1 1 0 98 6 1 0 7 78 7 138 5 8 1 0 1518 3 0 0 97 7 54 0 0 137 3 238 10 12 4 0 1422 2 1 0 97 March 4, 2026 at 01:08:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 106 124 1 1 0 0 15 0 1 0 98 1 4 0 14 20 2 14 0 0 0 0 281 0 0 0 100 2 0 0 0 10 1 4 0 1 0 0 316 0 0 0 100 3 18 0 0 24 7 46 2 0 1 0 1172 0 0 0 99 4 0 0 4 310 149 108 0 2 0 0 299 0 0 0 100 5 0 0 16 211 103 6 0 1 0 0 1 0 0 0 100 6 0 0 7 16 4 10 1 0 0 0 570 0 0 0 100 7 0 0 0 13 1 6 0 0 0 0 4 0 0 0 100 March 4, 2026 at 01:08:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 109 141 0 2 7 0 45 0 1 0 98 1 0 0 24 25 1 32 0 4 13 0 341 0 1 0 99 2 0 0 0 24 3 25 0 5 13 0 324 0 0 0 100 3 0 0 0 20 3 46 0 3 8 0 1190 0 0 0 99 4 0 0 3 332 161 120 0 2 6 0 369 0 1 0 99 5 0 0 3 230 104 30 0 5 9 0 17 0 0 0 100 6 0 0 21 36 8 34 3 2 2 0 583 0 0 0 99 7 0 0 7 31 4 34 1 5 7 0 31 0 0 0 100 March 4, 2026 at 01:08:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2120 107 118 1 1 0 0 9 0 1 0 99 1 0 0 14 17 1 14 0 1 0 0 269 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 302 0 0 0 100 3 0 0 0 17 5 40 1 0 0 0 1072 0 0 0 100 4 0 0 3 319 158 108 1 0 0 0 294 0 0 0 100 5 0 0 3 213 103 6 0 0 1 0 0 0 0 0 100 6 0 0 7 19 4 17 0 3 2 0 563 0 0 0 100 7 0 0 0 12 2 6 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:08:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2114 105 123 0 2 0 0 8 0 2 0 98 1 22 0 21 34 2 14 1 2 0 0 271 0 0 0 100 2 0 0 0 27 2 4 1 0 0 0 302 0 0 0 100 3 0 0 0 33 5 40 1 1 0 0 1069 0 0 0 99 4 0 0 3 332 155 110 0 1 0 0 294 0 0 0 100 5 0 0 3 227 103 4 0 0 0 0 0 0 0 0 100 6 0 0 7 31 3 6 1 0 0 0 561 0 0 0 100 7 0 0 0 26 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:08:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2173 109 216 1 11 112 0 12 0 2 0 98 1 0 0 14 65 1 127 1 16 208 0 265 0 1 0 99 2 0 0 0 51 1 87 0 14 185 0 305 0 0 0 99 3 0 0 0 129 88 134 8 10 183 0 1063 0 1 0 99 4 0 0 4 361 155 205 0 8 163 0 295 0 1 0 99 5 0 0 2 254 104 82 1 5 149 0 0 0 1 0 99 6 0 0 7 55 3 109 1 16 131 0 561 0 0 0 99 7 0 0 0 48 2 81 0 8 121 0 0 0 0 0 100 March 4, 2026 at 01:08:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 107 178 1 3 3 0 351 1 1 0 98 1 0 0 14 46 1 50 1 2 0 0 691 1 0 0 99 2 0 0 0 40 1 57 1 3 4 0 566 1 0 0 99 3 1 0 0 39 5 95 3 4 1 0 1411 0 1 0 99 4 0 0 2 341 155 145 1 5 0 0 646 1 0 0 99 5 0 0 32 270 103 118 1 2 2 0 212 1 0 0 99 6 0 0 7 30 3 34 0 1 0 0 1108 0 0 0 99 7 0 0 0 69 2 98 1 2 5 0 287 0 0 0 99 March 4, 2026 at 01:08:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2749 106 979 35 60 1 0 6092 7 4 0 88 1 6 0 14 693 9 1058 38 53 5 0 6097 8 3 0 89 2 1 0 0 673 10 1079 47 53 15 0 5506 8 3 0 89 3 33 0 0 635 38 919 19 43 8 0 7811 8 3 0 89 4 34 0 3 709 111 575 26 30 32 0 4862 11 4 0 85 5 0 0 577 745 107 885 14 29 15 0 4287 8 4 0 88 6 1 0 7 535 6 806 26 31 8 0 5230 8 2 0 89 7 3 0 0 644 4 1087 28 38 26 0 5535 9 3 0 88 March 4, 2026 at 01:08:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2125 100 130 0 3 5 4 54 0 1 0 99 1 3 0 14 23 2 14 1 1 3 0 572 0 0 0 100 2 0 0 0 30 7 28 1 1 2 0 317 0 0 0 100 3 0 0 0 124 52 148 1 4 4 0 1076 0 1 0 99 4 2 0 2 228 111 25 0 1 2 1 40 0 1 0 99 5 1833 0 4 221 104 34 3 2 3 6 339 1 1 0 98 6 24 0 7 27 3 79 1 6 15 5 698 0 0 0 100 7 15 0 0 22 2 32 0 5 15 4 52 0 0 0 100 March 4, 2026 at 01:08:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2134 100 120 0 2 1 1 43 0 1 0 99 1 9 0 14 35 2 47 0 4 0 4 704 0 0 0 100 2 609 0 0 47 7 36 2 3 3 8 1192 2 1 0 97 3 29 0 0 139 51 161 1 5 3 4 1226 0 1 0 99 4 0 0 2 250 109 10 0 0 0 0 0 0 1 0 99 5 891 0 117 225 103 34 0 0 3 10 92 0 1 0 99 6 128 0 7 51 3 49 1 1 1 11 636 0 0 0 100 7 20 0 2 34 2 18 0 3 1 3 55 0 0 0 100 March 4, 2026 at 01:08:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 100 205 1 18 258 0 3 0 2 0 98 1 0 0 14 57 2 152 0 33 257 0 560 0 1 0 99 2 0 0 0 60 4 108 0 14 281 0 303 0 1 0 99 3 0 0 0 201 126 203 11 31 241 0 6 0 1 0 99 4 0 0 2 316 135 161 0 17 207 0 0 0 1 0 99 5 0 0 4 258 103 115 0 15 229 0 0 0 1 0 99 6 0 0 7 54 3 93 0 5 136 0 565 0 1 0 99 7 0 0 0 52 2 133 2 12 199 0 1145 0 1 0 99 March 4, 2026 at 01:08:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 1 0 0 5 0 1 0 99 1 0 0 14 12 2 6 1 1 1 0 560 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 3 0 0 0 23 6 16 1 0 1 0 327 0 0 0 100 4 0 0 3 327 159 128 0 3 0 0 21 0 1 0 99 5 0 0 3 216 105 12 0 0 0 0 5 0 0 0 100 6 0 0 7 10 3 6 0 0 0 0 560 0 0 0 100 7 0 0 0 10 2 34 1 0 1 0 1145 0 0 0 100 March 4, 2026 at 01:08:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 168 0 0 2157 100 138 4 8 2 1 567 1 1 0 98 1 13 0 14 62 2 157 10 11 1 0 1210 1 0 0 99 2 0 0 0 82 3 60 2 4 0 0 875 1 0 0 99 3 50 0 0 98 2 191 11 9 5 0 688 1 0 0 99 4 222 0 4 386 160 262 21 13 4 0 549 1 1 0 98 5 154 0 30 265 110 117 3 6 4 1 603 1 1 0 98 6 1 0 7 40 5 72 1 5 14 0 997 1 0 0 99 7 440 0 0 39 4 70 5 5 5 1 1555 2 1 0 97 March 4, 2026 at 01:08:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 100 157 3 10 1 0 929 1 2 0 98 1 29 0 0 63 5 58 6 5 4 0 999 4 0 0 96 2 90 0 14 145 48 148 2 10 0 0 2252 4 1 0 95 3 12 0 0 92 9 180 12 8 0 0 1116 1 0 0 98 4 21 0 3 285 106 102 5 8 0 0 1081 1 0 0 98 5 42 0 101 254 104 92 5 6 0 0 1201 1 1 0 98 6 0 0 7 52 4 118 4 7 0 0 1080 2 0 0 98 7 0 0 0 74 4 153 3 9 3 0 2367 1 1 0 98 March 4, 2026 at 01:08:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 2 0 0 14 109 53 106 0 0 0 0 568 0 0 0 100 3 0 0 0 18 5 12 0 0 0 0 6 0 0 0 100 4 0 0 2 221 104 16 0 0 0 0 0 0 0 0 100 5 0 0 4 216 104 8 0 1 1 0 0 0 0 0 100 6 0 0 7 10 2 8 0 1 2 0 260 0 0 0 100 7 0 0 0 13 4 38 0 0 0 0 1458 0 0 0 99 March 4, 2026 at 01:08:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 101 200 0 13 143 0 33 0 2 0 98 1 0 0 8 75 1 147 2 15 189 0 294 0 1 0 98 2 0 0 21 171 52 226 0 11 158 0 597 0 1 0 99 3 0 0 0 156 82 133 4 15 159 0 30 0 1 0 99 4 0 0 18 274 105 114 0 11 179 0 27 0 1 0 99 5 0 0 2 271 107 123 0 12 157 0 15 0 1 0 99 6 0 0 7 56 2 98 0 13 141 0 263 0 1 0 99 7 0 0 0 57 3 121 2 8 142 1 1517 0 1 0 99 March 4, 2026 at 01:08:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 92 0 0 0 0 0 0 1 0 99 1 0 0 0 10 1 2 0 0 0 0 294 0 0 0 100 2 0 0 14 113 52 108 2 1 0 0 567 0 0 0 100 3 0 0 0 11 1 4 0 0 0 0 1 0 0 0 100 4 0 0 9 227 103 27 0 4 0 0 0 0 0 0 100 5 0 0 4 226 110 18 1 0 0 0 6 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 15 4 38 1 0 1 0 1367 0 0 0 99 March 4, 2026 at 01:08:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 102 54 0 3 0 0 5 0 1 0 99 1 0 0 0 25 1 6 0 1 0 0 294 0 0 0 100 2 0 0 14 129 52 112 1 0 0 0 575 0 0 0 99 3 0 0 0 32 2 14 1 1 0 0 14 0 0 0 100 4 0 0 114 281 108 71 0 0 0 0 0 0 1 0 99 5 0 0 4 250 110 28 0 2 3 0 6 0 0 0 100 6 0 0 7 25 2 4 1 0 0 0 260 0 0 0 100 7 0 0 0 34 3 44 1 0 0 0 1369 0 0 0 99 March 4, 2026 at 01:08:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 100 0 0 0 0 0 0 1 0 99 1 0 0 0 11 1 6 0 2 0 0 294 0 0 0 100 2 0 0 14 114 52 114 0 1 0 0 566 0 0 0 100 3 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 4 0 0 10 217 104 12 0 0 0 0 3 0 0 0 100 5 1 0 3 237 111 32 1 0 0 0 15 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 15 4 38 1 0 2 0 1365 0 0 0 99 March 4, 2026 at 01:08:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 0 2822 103 1151 38 46 12 0 7429 10 5 0 85 1 0 0 0 709 3 857 17 56 12 0 6984 15 3 0 82 2 1 0 14 912 27 1350 42 56 21 0 5928 10 4 0 86 3 0 0 0 822 2 1282 52 46 22 0 5684 11 4 0 85 4 32 0 3 838 104 1110 28 47 15 0 6396 10 3 0 87 5 3 0 689 865 119 1199 28 39 16 0 5091 8 4 0 88 6 1 0 7 515 2 704 13 29 28 0 6483 13 3 0 84 7 0 0 0 442 19 569 5 24 0 0 8451 5 2 0 94 March 4, 2026 at 01:08:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 103 138 0 13 289 0 0 0 2 0 98 1 0 0 0 63 3 101 0 13 220 0 294 0 1 0 99 2 0 0 14 66 3 134 2 25 240 0 567 0 1 0 99 3 0 0 0 186 100 192 11 24 251 0 1 0 1 0 99 4 0 0 2 310 104 156 0 15 182 0 0 0 1 0 99 5 0 0 4 303 109 151 0 14 253 0 7 0 1 0 99 6 0 0 7 57 3 112 0 12 272 0 263 0 1 0 99 7 0 0 0 171 54 246 4 5 181 0 1366 0 1 0 98 March 4, 2026 at 01:08:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 54 0 0 2160 122 156 0 9 11 3 98 0 1 0 99 1 620 0 0 55 2 57 2 4 8 6 1243 3 1 0 96 2 14 0 14 46 2 44 1 6 3 3 689 0 0 0 100 3 7 0 0 39 0 36 0 4 10 4 70 0 0 0 100 4 4 0 1 247 105 32 0 3 6 1 40 0 0 0 100 5 11 0 6 267 111 52 0 3 1 3 110 0 0 0 99 6 2720 0 126 38 3 53 4 4 7 4 658 1 1 0 98 7 121 0 0 113 31 162 0 8 10 11 1646 0 1 0 99 March 4, 2026 at 01:08:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 150 202 0 0 0 0 0 0 1 0 99 1 0 0 0 17 2 12 0 0 0 0 295 0 0 0 100 2 0 0 14 19 5 21 0 1 0 0 586 0 0 0 100 3 0 0 0 16 2 14 0 0 0 0 13 0 0 0 100 4 0 0 3 216 106 8 0 0 0 0 0 0 0 0 100 5 0 0 3 221 107 16 0 0 0 0 7 0 0 0 100 6 0 0 7 12 4 8 0 0 0 0 261 0 0 0 100 7 0 0 0 22 5 48 1 1 1 0 1455 0 0 0 99 March 4, 2026 at 01:08:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 145 196 0 0 0 0 8 0 1 0 99 1 0 0 0 27 6 22 1 1 0 0 294 0 0 0 100 2 0 0 14 10 3 8 0 0 0 0 577 0 0 0 100 3 0 0 0 9 0 4 0 0 0 0 2 0 0 0 100 4 0 0 1 214 103 12 0 1 1 0 0 0 0 0 100 5 0 0 5 229 111 24 1 1 0 0 334 0 0 0 99 6 0 0 7 11 3 8 0 1 0 0 259 0 0 0 100 7 0 0 0 14 4 38 1 0 1 0 1468 0 1 0 99 March 4, 2026 at 01:08:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 1 0 0 18 0 1 0 99 1 0 0 0 111 51 104 0 0 0 0 294 0 0 0 100 2 0 0 14 17 5 16 2 0 0 0 587 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 6 0 0 0 100 4 0 0 3 214 104 8 0 1 0 0 0 0 0 0 100 5 0 0 3 211 103 4 0 1 0 0 0 0 0 0 100 6 0 0 7 12 3 8 0 0 1 0 261 0 0 0 100 7 0 0 0 19 4 46 2 1 0 0 1450 0 0 0 99 March 4, 2026 at 01:08:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2191 102 230 20 23 81 0 1272 1 2 0 97 1 8 0 0 171 24 230 16 33 162 0 1303 3 1 0 96 2 411 0 14 155 4 401 23 41 155 1 2388 4 1 0 94 3 457 0 0 197 86 279 38 39 183 0 1325 5 2 0 94 4 44 0 1 317 105 164 13 39 167 0 1191 2 1 0 96 5 256 0 131 320 104 287 27 24 117 0 1607 2 2 0 96 6 14 0 7 167 29 499 16 30 121 0 1671 2 1 0 97 7 3 0 0 149 7 268 12 28 112 0 2684 1 1 0 97 March 4, 2026 at 01:08:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 100 122 0 2 0 0 13 0 1 0 99 1 17 0 0 12 1 4 1 1 0 0 307 0 0 0 100 2 5 0 14 16 3 16 0 1 0 0 579 0 0 0 100 3 0 0 0 10 0 2 0 1 0 0 1 0 0 0 100 4 0 0 5 233 111 25 1 0 0 0 15 0 0 0 100 5 0 0 15 211 103 6 0 1 0 0 1 0 0 0 100 6 0 0 7 113 53 108 1 0 0 0 274 0 0 0 100 7 0 0 0 21 5 42 1 0 2 0 1465 0 0 0 99 March 4, 2026 at 01:08:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 101 112 0 4 2 0 17 0 2 0 98 1 0 0 0 31 1 23 0 7 5 0 295 0 0 0 100 2 1 0 14 27 3 32 0 1 6 0 602 0 0 0 100 3 0 0 0 22 2 24 0 5 14 0 81 0 0 0 100 4 0 0 11 243 112 44 0 2 12 0 51 0 1 0 98 5 0 0 2 223 103 17 1 2 5 0 13 0 0 0 100 6 0 0 7 118 53 112 0 0 7 0 260 0 0 0 100 7 0 0 9 26 2 68 1 7 18 0 1540 0 1 0 98 March 4, 2026 at 01:08:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 80 0 2 0 0 3 0 1 0 99 1 0 0 0 47 1 36 0 2 0 0 294 0 0 0 100 2 0 0 14 13 3 6 2 0 0 0 567 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 4 0 0 7 237 112 30 0 0 0 0 16 0 1 0 99 5 0 0 14 216 105 10 0 1 0 0 2 0 0 0 100 6 7 0 7 112 53 106 0 0 0 0 260 0 0 0 100 7 0 0 0 15 3 36 2 0 0 0 1370 0 1 0 99 March 4, 2026 at 01:08:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2105 101 21 0 2 0 0 0 0 1 0 99 1 0 0 0 125 1 102 0 0 0 0 294 0 0 0 100 2 0 0 14 29 4 10 0 0 0 0 568 0 0 0 100 3 0 0 0 26 0 10 0 1 0 0 0 0 0 0 100 4 0 0 3 251 116 22 0 0 0 0 9 0 1 0 99 5 0 0 3 233 105 10 0 0 0 0 2 0 0 0 100 6 0 0 7 126 53 106 0 0 0 0 260 0 0 0 100 7 0 0 0 29 3 36 2 0 0 0 1367 0 1 0 99 March 4, 2026 at 01:08:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2144 102 143 0 9 97 0 0 0 2 0 98 1 0 0 0 100 1 148 1 11 101 0 297 0 0 0 99 2 0 0 14 61 3 116 0 8 106 0 568 0 1 0 99 3 0 0 0 112 75 93 7 7 98 0 4 0 1 0 99 4 0 0 2 284 117 119 1 12 75 0 16 0 1 0 99 5 0 0 4 261 105 110 0 5 90 0 3 0 0 0 100 6 0 0 7 155 53 185 1 5 101 0 260 0 1 0 99 7 0 0 0 48 3 111 1 4 75 0 1368 0 1 0 99 March 4, 2026 at 01:08:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 2237 101 244 13 18 5 0 1812 2 2 0 95 1 5 0 0 278 5 322 8 13 0 0 1444 3 1 0 96 2 1 0 14 211 3 283 4 10 2 0 1196 2 1 0 97 3 14 0 0 146 1 179 5 8 4 0 1573 2 1 0 97 4 1 0 1 337 113 167 1 4 4 0 2113 2 1 0 97 5 0 0 146 370 105 313 6 8 3 0 1489 2 1 0 97 6 0 0 7 189 49 212 1 5 0 0 1107 1 0 0 99 7 1 0 0 168 2 310 16 15 7 0 2457 4 1 0 94 March 4, 2026 at 01:09:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 2642 104 675 16 41 17 0 6075 8 4 0 87 1 28 0 0 623 13 926 22 45 9 0 4917 8 3 0 89 2 3 0 0 716 10 1128 49 44 10 0 3995 7 3 0 90 3 0 0 14 729 39 986 27 36 7 0 4227 6 3 0 92 4 2 0 2 749 114 751 14 24 11 0 5584 7 3 0 90 5 7 0 551 488 104 466 6 12 15 0 6067 7 3 0 90 6 8 0 7 531 8 795 11 32 4 0 4242 10 2 0 88 7 83 0 0 453 9 725 24 27 18 0 5411 10 3 0 87 March 4, 2026 at 01:09:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 6 0 1 0 0 301 0 1 0 99 1 0 0 0 20 6 14 0 0 0 0 10 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 311 0 0 0 100 3 0 0 14 212 52 210 0 2 0 0 559 0 0 0 100 4 0 0 7 219 104 10 0 0 0 0 3 0 0 0 100 5 0 0 7 216 104 8 0 2 2 0 0 0 0 0 100 6 0 0 7 17 4 16 0 1 2 0 265 0 0 0 100 7 0 0 0 9 1 32 1 0 1 0 1065 0 0 0 99 March 4, 2026 at 01:09:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 44 0 1 0 0 301 0 1 0 99 1 0 0 0 17 6 12 0 0 0 0 6 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 312 0 0 0 100 3 0 0 14 188 53 180 1 1 0 0 560 0 0 0 100 4 0 0 3 218 105 12 0 2 0 0 0 0 0 0 100 5 0 0 3 211 103 6 0 1 0 0 0 0 0 0 100 6 0 0 7 8 2 4 1 0 0 0 260 0 0 0 100 7 0 0 0 10 2 34 1 0 0 0 1067 0 0 0 100 March 4, 2026 at 01:09:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 102 153 2 14 228 0 301 0 2 0 98 1 1 0 0 62 7 94 2 6 132 0 11 0 1 0 99 2 0 0 0 52 2 96 1 11 184 0 321 0 1 0 99 3 0 0 14 222 132 226 10 13 225 0 560 0 1 0 99 4 0 0 2 260 108 98 1 16 193 0 1 0 1 0 99 5 0 0 4 253 104 99 1 13 258 0 0 0 1 0 99 6 0 0 7 102 4 151 0 14 139 0 262 0 1 0 99 7 0 0 0 49 1 117 2 9 218 0 1068 0 1 0 99 March 4, 2026 at 01:09:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 104 110 0 3 0 0 306 0 1 0 99 1 0 0 0 16 5 10 0 0 0 0 326 0 0 0 100 2 0 0 0 11 1 8 1 0 0 0 316 0 0 0 100 3 0 0 14 114 53 108 1 0 0 0 560 0 0 0 100 4 0 0 3 221 109 10 0 0 0 0 0 0 0 0 100 5 0 0 3 216 104 12 0 1 0 0 0 0 0 0 100 6 0 0 7 27 3 20 0 0 0 0 261 0 0 0 100 7 0 0 0 12 2 36 1 0 0 0 1067 0 0 0 100 March 4, 2026 at 01:09:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 2119 108 110 0 1 0 0 317 0 1 0 98 1 0 0 0 11 0 10 0 0 0 0 12 0 0 0 100 2 0 0 0 12 1 12 0 0 0 0 344 0 0 0 100 3 0 0 14 119 54 116 1 1 0 0 568 0 0 0 100 4 0 0 1 227 111 12 0 0 0 0 8 0 0 0 100 5 0 0 5 232 105 27 0 3 0 0 2 0 0 0 100 6 0 0 7 13 4 10 0 1 0 0 262 0 0 0 100 7 0 0 0 9 1 32 2 0 1 0 1064 0 0 0 99 March 4, 2026 at 01:09:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 18 0 1 0 0 301 0 1 0 99 1 0 0 0 7 0 4 0 1 1 0 0 0 0 0 100 2 0 0 0 9 1 4 1 0 0 0 311 0 0 0 100 3 0 0 14 107 52 104 0 0 0 0 576 0 0 0 100 4 0 0 1 219 107 12 0 0 0 0 3 0 0 0 100 5 0 0 5 327 110 120 1 0 0 0 12 0 0 0 99 6 0 0 7 11 3 6 1 1 0 0 260 0 0 0 100 7 0 0 0 10 2 36 0 1 0 0 1068 0 1 0 99 March 4, 2026 at 01:09:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 114 0 7 2158 103 134 1 9 18 14 763 0 2 0 98 1 27 0 2 48 0 60 0 9 8 7 176 0 0 0 100 2 62 0 0 59 2 81 0 9 12 6 478 0 0 0 100 3 9 0 14 149 52 143 1 4 5 6 662 0 0 0 99 4 21 0 1 246 105 32 0 1 3 6 44 0 0 0 100 5 0 0 5 290 106 69 0 3 3 0 5 0 0 0 100 6 1 0 0 35 6 15 0 1 1 0 22 0 0 0 100 7 3330 0 119 46 3 97 6 2 10 16 2344 4 2 0 94 March 4, 2026 at 01:09:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 104 116 0 0 0 0 561 0 1 0 99 1 0 0 0 17 4 12 0 0 0 0 9 0 0 0 100 2 0 0 0 11 1 8 1 0 0 0 316 0 0 0 100 3 0 0 14 110 53 108 0 0 1 0 560 0 0 0 100 4 0 0 3 218 105 14 0 1 2 0 0 0 0 0 100 5 0 0 3 222 107 16 1 0 4 0 321 0 0 0 100 6 0 0 0 10 2 6 0 0 4 0 26 0 0 0 100 7 0 0 0 15 3 40 2 0 2 0 1157 0 0 0 100 March 4, 2026 at 01:09:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 104 115 0 1 0 0 561 0 1 0 99 1 0 0 0 16 4 10 0 1 0 0 5 0 0 0 100 2 0 0 0 10 1 6 0 1 0 0 311 0 0 0 100 3 0 0 14 109 52 104 1 0 0 0 560 0 0 0 100 4 0 0 3 213 103 10 0 1 1 0 0 0 0 0 100 5 0 0 3 210 102 4 0 1 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 34 0 0 1 0 1147 0 0 0 99 March 4, 2026 at 01:09:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 104 118 0 0 0 0 560 0 1 0 99 1 0 0 0 30 9 26 1 0 0 0 21 0 0 0 100 2 20 0 0 15 4 12 0 0 0 0 318 0 0 0 100 3 0 0 14 115 53 114 0 0 0 0 565 0 0 0 100 4 0 0 5 222 108 14 0 0 1 0 7 0 0 0 100 5 1 0 1 221 104 20 0 1 2 0 6 0 0 0 100 6 1 0 0 11 3 6 0 0 0 0 6 0 0 0 100 7 0 0 0 12 3 36 1 0 0 0 1142 0 0 0 100 March 4, 2026 at 01:09:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 104 118 1 0 0 0 561 0 1 0 99 1 0 0 0 20 6 12 0 0 0 0 9 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 311 0 0 0 100 3 0 0 14 107 52 104 1 0 0 0 560 0 0 0 100 4 0 0 4 216 104 12 0 0 0 0 3 0 0 0 100 5 0 0 2 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 12 3 36 1 0 0 0 1161 0 0 0 99 March 4, 2026 at 01:09:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 104 119 0 0 0 0 562 0 1 0 99 1 0 0 0 19 6 12 0 0 0 0 327 0 0 0 100 2 0 0 0 13 2 10 1 0 0 0 317 0 0 0 100 3 0 0 14 107 52 104 0 0 0 0 561 0 0 0 100 4 0 0 4 216 106 8 0 0 0 0 0 0 0 0 100 5 0 0 2 218 104 14 0 0 0 0 5 0 0 0 100 6 0 0 0 11 2 8 0 1 0 0 1 0 0 0 100 7 0 0 0 12 3 36 1 0 1 0 1142 0 0 0 100 March 4, 2026 at 01:09:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 104 116 1 2 0 0 561 0 1 0 99 1 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 311 0 0 0 100 3 0 0 14 111 53 108 1 0 0 0 560 0 0 0 100 4 0 0 4 222 108 16 0 0 4 0 1 0 0 0 100 5 0 0 2 227 109 20 1 0 0 0 10 0 0 0 100 6 0 0 0 10 1 6 0 0 3 0 0 0 0 0 100 7 0 0 0 16 2 44 1 2 0 0 1143 0 0 0 100 March 4, 2026 at 01:09:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 105 115 0 1 0 0 561 0 1 0 99 1 0 0 0 8 0 2 0 1 1 0 0 0 0 0 100 2 0 0 0 9 1 6 0 1 0 0 311 0 0 0 100 3 0 0 14 107 52 104 0 0 0 0 560 0 0 0 100 4 0 0 1 214 104 8 0 0 0 0 0 0 0 0 100 5 0 0 5 220 107 14 0 0 0 0 6 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 34 1 0 0 0 1142 0 0 0 100 March 4, 2026 at 01:09:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 221 0 7 2207 104 336 28 15 1 1 2233 2 2 0 96 1 218 0 0 132 4 230 17 10 1 5 1644 2 1 0 97 2 530 0 0 107 3 74 6 9 3 0 1677 3 1 0 96 3 37 0 14 182 50 208 6 12 4 0 1271 3 1 0 96 4 1 0 3 297 109 113 3 13 0 0 943 2 1 0 97 5 3 0 101 278 110 90 4 10 3 0 1006 1 1 0 98 6 12 0 0 67 2 216 5 11 1 0 1000 2 0 0 98 7 9 0 0 55 1 120 5 8 2 0 2452 2 1 0 97 March 4, 2026 at 01:09:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 105 138 2 6 10 0 653 0 2 0 98 1 0 0 9 37 6 39 1 5 8 0 22 0 1 0 99 2 0 0 0 31 2 42 1 5 8 0 434 0 0 0 100 3 3 0 21 17 2 15 0 4 5 0 571 0 0 0 100 4 0 0 2 232 106 37 0 4 13 0 27 0 1 0 99 5 0 0 18 315 152 116 0 2 11 0 1 0 1 0 99 6 0 0 0 31 8 27 1 3 7 0 24 0 0 0 100 7 0 0 0 16 2 40 0 3 11 0 1067 0 1 0 99 March 4, 2026 at 01:09:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 104 116 1 0 0 0 562 0 1 0 99 1 0 0 0 10 1 2 0 0 0 0 1 0 0 0 100 2 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 3 0 0 14 11 2 6 1 0 0 0 561 0 0 0 100 4 0 0 11 213 103 10 0 1 0 0 0 0 1 0 99 5 0 0 2 311 151 107 0 1 0 0 0 0 0 0 100 6 0 0 0 20 7 14 0 0 0 0 10 0 0 0 100 7 0 0 0 12 2 34 2 0 1 0 1063 0 0 0 99 March 4, 2026 at 01:09:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2163 104 194 1 9 108 0 560 0 2 0 98 1 0 0 0 70 0 101 0 8 136 0 0 0 0 0 100 2 0 0 0 79 5 99 3 15 146 0 305 0 0 0 99 3 0 0 14 126 77 94 5 8 156 0 561 0 1 0 99 4 0 0 3 280 106 109 0 6 125 0 0 0 1 0 99 5 0 0 115 359 151 208 0 12 109 0 0 0 1 0 99 6 0 0 0 74 9 86 1 6 145 0 13 0 1 0 99 7 0 0 0 62 3 112 1 8 117 0 1067 0 1 0 99 March 4, 2026 at 01:09:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 104 115 0 1 0 0 562 0 1 0 99 1 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 26 9 19 1 1 0 0 310 0 0 0 100 3 0 0 14 11 2 6 2 0 0 0 559 0 0 0 100 4 0 0 3 217 104 12 0 1 0 0 0 0 0 0 100 5 0 0 10 310 151 106 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 32 2 0 2 0 1062 0 0 0 100 March 4, 2026 at 01:09:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 51 0 7 2971 115 1483 49 75 16 0 5520 10 5 0 85 1 1 0 0 714 9 963 17 52 8 0 6584 8 3 0 89 2 16 0 0 639 11 809 27 53 17 0 7176 15 3 0 81 3 45 0 14 634 5 900 32 43 16 0 7947 10 3 0 87 4 1 0 3 886 108 1035 31 48 11 0 5239 9 3 0 88 5 11 0 647 827 129 1084 34 44 10 0 6317 8 4 0 88 6 10 0 0 646 8 1058 23 40 4 0 5833 8 3 0 89 7 4 0 0 497 12 755 20 37 8 0 6683 8 3 0 89 March 4, 2026 at 01:09:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2169 158 221 0 1 0 0 567 0 1 0 98 1 0 0 0 11 1 4 1 1 0 0 11 0 0 0 100 2 0 0 0 12 3 7 0 1 1 0 301 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 560 0 0 0 100 4 0 0 3 214 103 8 0 0 1 0 0 0 0 0 100 5 0 0 3 213 102 10 0 1 2 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 34 1 0 0 0 1064 0 0 0 100 March 4, 2026 at 01:09:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2167 156 223 0 0 0 0 580 0 1 0 98 1 0 0 0 17 5 12 0 1 0 0 10 0 0 0 100 2 0 0 0 18 5 16 0 1 0 0 321 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 560 0 0 0 100 4 0 0 3 211 102 6 0 0 0 0 0 0 0 0 100 5 0 0 3 212 102 6 0 1 1 0 0 0 0 0 100 6 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 13 2 38 1 1 2 0 1067 0 0 0 99 March 4, 2026 at 01:09:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2209 154 320 1 16 235 0 560 0 2 0 98 1 0 0 0 65 7 99 2 7 226 0 10 0 1 0 99 2 0 0 0 59 3 94 3 6 221 0 311 0 1 0 99 3 0 0 14 140 94 115 8 6 251 0 559 0 1 0 99 4 0 0 2 259 105 115 1 17 208 0 1 0 1 0 99 5 0 0 4 265 102 123 1 10 202 0 3 0 1 0 99 6 0 0 0 58 1 130 1 14 273 0 0 0 1 0 99 7 0 0 0 46 1 112 3 10 199 0 1065 0 1 0 99 March 4, 2026 at 01:09:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 2208 154 238 1 3 3 1 569 0 2 0 98 1 1 0 0 58 9 30 0 2 1 0 358 0 0 0 100 2 3324 0 115 43 2 68 5 1 13 14 1565 3 2 0 95 3 123 0 14 61 2 98 0 11 13 21 789 0 0 0 99 4 24 0 4 261 110 80 0 8 9 9 166 0 0 0 100 5 62 0 3 247 102 96 0 6 12 11 123 0 0 0 99 6 9 0 0 40 1 30 0 4 2 3 95 0 0 0 100 7 3 0 0 42 2 50 0 2 2 1 1193 0 1 0 99 March 4, 2026 at 01:09:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2162 154 216 0 1 1 0 562 0 1 0 99 1 0 0 0 24 4 24 0 2 2 0 20 0 0 0 100 2 0 0 0 12 2 10 0 1 0 0 314 0 0 0 100 3 0 0 14 16 3 16 0 1 0 0 569 0 0 0 100 4 0 0 1 224 111 12 0 0 0 0 7 0 0 0 100 5 0 0 5 214 102 10 0 1 4 0 0 0 0 0 100 6 0 0 0 20 7 16 0 0 0 0 11 0 0 0 100 7 0 0 0 10 1 34 1 0 0 0 1148 0 0 0 100 March 4, 2026 at 01:09:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 214 0 7 2326 151 416 26 17 7 0 2454 3 2 0 95 1 5 0 0 232 1 169 4 16 1 0 1612 2 1 0 97 2 0 0 0 131 2 111 1 7 0 0 1745 1 0 0 98 3 60 0 14 78 2 351 2 9 6 0 2456 2 1 0 97 4 464 0 1 343 105 300 11 15 0 0 1797 6 1 0 93 5 45 0 132 306 105 182 10 14 8 0 1333 1 1 0 98 6 1 0 0 88 8 103 9 12 4 0 767 3 0 0 96 7 225 0 0 128 3 266 63 13 1 0 2233 3 1 0 96 March 4, 2026 at 01:09:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2162 154 138 1 1 0 0 561 0 1 0 99 1 0 0 0 89 0 80 0 0 0 0 0 0 0 0 100 2 0 0 0 14 3 8 0 1 0 0 302 0 0 0 100 3 4 0 14 10 2 4 2 0 0 0 562 0 0 0 100 4 0 0 2 217 106 6 0 0 0 0 0 0 0 0 100 5 0 0 18 209 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 23 7 14 1 0 0 0 9 0 0 0 100 7 0 0 0 14 2 38 0 1 0 0 1154 0 1 0 99 March 4, 2026 at 01:09:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2220 154 313 0 13 157 1 638 0 3 0 97 1 0 0 14 70 1 127 3 13 159 0 17 0 1 0 99 2 0 0 0 83 2 133 1 24 195 0 400 0 1 0 99 3 0 0 14 127 77 131 7 10 163 0 583 0 1 0 99 4 0 0 2 270 107 108 0 12 134 0 22 0 1 0 99 5 0 0 4 270 105 121 1 15 150 0 20 0 1 0 99 6 0 0 7 88 11 127 2 4 169 0 35 0 1 0 99 7 0 0 0 59 3 121 2 8 149 0 1156 0 1 0 99 March 4, 2026 at 01:09:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2163 154 186 1 3 0 0 562 0 1 0 98 1 0 0 0 12 1 5 0 1 0 0 1 0 0 0 100 2 0 0 0 40 2 30 0 0 0 0 301 0 0 0 100 3 0 0 14 9 2 6 0 1 0 0 560 0 0 0 100 4 0 0 3 229 112 16 1 0 0 0 9 0 0 0 100 5 0 0 3 213 103 6 0 0 0 0 0 0 0 0 100 6 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 7 0 0 7 13 2 38 1 1 2 0 1065 0 0 0 100 March 4, 2026 at 01:09:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2177 154 220 0 2 0 0 561 0 1 0 99 1 0 0 112 21 4 19 0 1 0 0 20 0 0 0 100 2 0 0 0 32 4 10 1 0 0 0 304 0 0 0 100 3 0 0 14 32 3 12 1 0 1 0 566 0 0 0 100 4 0 0 4 257 118 30 0 1 0 0 17 0 0 0 99 5 0 0 2 232 104 12 0 0 1 0 1 0 0 0 100 6 0 0 0 25 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 33 3 40 2 0 0 0 1064 0 0 0 100 March 4, 2026 at 01:09:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2159 154 214 1 0 0 0 561 0 2 0 98 1 0 0 7 9 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 301 0 0 0 100 3 0 0 14 10 3 6 1 0 0 0 559 0 0 0 100 4 0 0 5 244 122 26 0 0 0 0 15 0 0 0 100 5 0 0 1 215 103 12 0 1 1 0 0 0 0 0 100 6 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 15 3 40 0 0 0 0 1087 0 1 0 99 March 4, 2026 at 01:09:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2362 149 432 6 18 3 0 1733 4 2 0 94 1 17 0 7 268 8 388 14 15 1 0 1664 4 1 0 95 2 0 0 0 200 2 284 9 6 11 0 2714 5 1 0 94 3 1 0 14 236 3 374 3 15 3 0 2113 2 1 0 97 4 0 0 3 445 114 337 7 8 0 0 1753 2 1 0 97 5 1 0 199 362 103 310 18 12 5 0 1784 4 1 0 95 6 0 0 0 184 1 298 6 6 0 0 2186 2 1 0 97 7 0 0 0 167 3 272 5 5 2 0 3565 3 1 0 96 March 4, 2026 at 01:09:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2688 109 953 37 64 230 0 5368 9 5 0 86 1 6 0 7 702 41 930 29 47 213 0 4661 9 4 0 87 2 4 0 0 676 6 1033 55 45 218 1 3991 6 3 0 90 3 3 0 14 614 116 763 30 58 278 0 4276 6 3 0 91 4 1 0 2 707 112 737 13 53 214 0 5738 6 2 0 92 5 60 0 509 690 111 804 15 31 247 0 3515 10 4 0 87 6 5 0 0 513 2 819 22 36 243 1 4991 4 2 0 93 7 5 0 0 513 5 880 18 30 222 0 5792 7 3 0 90 March 4, 2026 at 01:09:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 32 1 2 0 0 301 0 1 0 99 1 0 0 7 108 52 104 0 0 0 0 260 0 0 0 100 2 0 0 0 16 5 10 1 0 0 0 309 0 0 0 100 3 0 0 14 12 3 10 1 1 0 0 572 0 0 0 100 4 0 0 1 214 104 6 0 0 0 0 0 0 0 0 100 5 0 0 5 310 106 104 0 0 0 0 5 0 0 0 99 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 16 3 40 1 1 0 0 1064 0 0 0 99 March 4, 2026 at 01:09:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 110 0 0 0 0 301 0 1 0 99 1 0 0 7 119 54 116 1 0 0 0 273 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 301 0 0 0 100 3 0 0 14 17 3 16 1 1 0 0 575 0 0 0 100 4 0 0 5 216 107 8 0 0 0 0 7 0 0 0 100 5 0 0 1 220 106 16 0 0 0 0 5 0 1 0 99 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 36 1 0 2 0 1062 0 0 0 100 March 4, 2026 at 01:09:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 112 0 2 0 0 301 0 1 0 99 1 0 0 7 113 52 110 0 1 2 0 260 0 0 0 100 2 0 0 0 13 3 8 1 0 0 0 309 0 0 0 100 3 0 0 14 11 3 8 0 1 0 0 571 0 0 0 100 4 0 0 2 211 103 6 0 0 0 0 1 0 0 0 100 5 0 0 4 224 109 18 0 0 0 0 10 0 1 0 99 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 14 3 38 1 0 2 0 1063 0 0 0 100 March 4, 2026 at 01:09:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 120 0 0 0 0 306 0 1 0 99 1 0 0 7 116 53 112 0 0 1 0 266 0 0 0 100 2 0 0 0 16 3 16 0 2 0 0 303 0 0 0 100 3 0 0 14 8 2 6 0 0 0 0 569 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 5 0 0 3 216 105 12 0 0 0 0 324 0 1 0 99 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 13 3 38 1 0 0 0 1064 0 0 0 100 March 4, 2026 at 01:09:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 108 126 1 0 3 0 316 0 1 0 98 1 0 0 7 112 52 108 0 0 0 0 261 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 306 0 0 0 100 3 0 0 14 13 3 12 1 0 1 0 578 0 0 0 100 4 0 0 3 214 106 4 0 0 0 0 0 0 0 0 100 5 0 0 3 210 102 6 0 0 0 0 2 0 0 0 100 6 0 0 0 12 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 15 3 40 1 0 3 0 1063 0 0 0 100 March 4, 2026 at 01:09:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 121 0 0 0 0 307 0 1 0 99 1 0 0 7 110 52 104 1 0 0 0 260 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 301 0 0 0 100 3 0 0 14 12 2 14 1 1 0 0 570 0 0 0 100 4 0 0 2 213 104 6 0 0 0 0 0 0 0 0 100 5 0 0 4 209 102 4 0 0 0 0 0 0 1 0 99 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 36 2 0 1 0 1062 0 0 0 100 March 4, 2026 at 01:09:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2155 106 144 0 4 6 3 361 0 1 0 98 1 6 0 7 150 54 146 0 4 5 1 357 0 0 0 100 2 1 0 0 46 7 28 1 3 0 0 331 0 0 0 100 3 3324 0 129 47 2 70 4 2 2 15 1827 3 2 0 95 4 122 0 3 273 106 87 0 11 16 13 228 0 0 0 99 5 59 0 3 263 103 80 0 9 10 11 151 0 1 0 99 6 42 0 5 44 2 49 0 7 6 10 135 0 0 0 100 7 5 0 0 38 3 56 0 4 3 2 1118 0 0 0 99 March 4, 2026 at 01:09:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 119 0 3 0 0 623 0 1 0 99 1 0 0 7 84 37 80 0 0 0 0 275 0 0 0 100 2 0 0 0 59 23 54 0 3 1 0 305 0 0 0 100 3 0 0 14 9 2 6 0 0 0 0 570 0 0 0 100 4 0 0 7 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 7 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 36 1 0 0 0 1149 0 0 0 99 March 4, 2026 at 01:09:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 64 0 3 0 0 301 0 1 0 99 1 0 0 7 17 6 14 0 1 0 0 265 0 0 0 100 2 0 0 0 164 52 158 0 2 0 0 302 0 0 0 100 3 0 0 14 11 2 6 2 0 0 0 570 0 0 0 100 4 0 0 1 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 5 211 102 6 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 14 3 38 1 0 2 0 1147 0 0 0 100 March 4, 2026 at 01:09:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 103 106 1 0 3 0 306 0 1 0 99 1 0 0 7 35 10 32 1 1 0 0 272 0 0 0 100 2 0 0 0 120 53 116 0 1 0 0 305 0 0 0 100 3 0 0 14 12 3 12 1 0 1 0 573 0 0 0 100 4 23 0 2 216 105 10 0 0 0 0 6 0 0 0 100 5 0 0 4 209 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 10 0 0 1 0 0 0 0 0 100 7 0 0 0 18 2 48 1 1 3 0 1140 0 0 0 100 March 4, 2026 at 01:09:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 100 0 2 0 0 301 0 1 0 99 1 0 0 7 28 7 20 0 0 0 0 265 0 0 0 100 2 0 0 0 117 51 110 1 0 0 0 301 0 0 0 100 3 0 0 14 9 2 6 0 0 0 0 570 0 0 0 100 4 0 0 7 212 103 4 0 0 0 0 0 0 0 0 100 5 0 0 7 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 15 3 38 1 0 0 0 1141 0 0 0 99 March 4, 2026 at 01:09:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2115 104 114 0 2 0 0 306 0 1 0 99 1 0 0 7 29 10 28 0 0 0 0 605 0 0 0 100 2 0 0 0 118 51 116 0 1 0 0 306 0 0 0 100 3 0 0 14 15 2 14 1 1 0 0 575 0 0 0 100 4 0 0 3 218 106 8 0 0 0 0 7 0 0 0 100 5 0 0 3 212 102 8 0 0 4 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 16 2 39 2 1 3 0 1140 0 0 0 100 March 4, 2026 at 01:09:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 108 124 0 2 3 0 311 0 1 0 98 1 0 0 7 12 3 14 0 1 0 0 260 0 0 0 100 2 0 0 0 116 51 110 0 0 0 0 304 0 0 0 100 3 0 0 14 8 2 6 0 0 0 0 570 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 1 0 0 0 100 5 0 0 3 209 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 15 3 38 1 0 0 0 1142 0 1 0 99 March 4, 2026 at 01:09:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 108 122 1 0 0 0 307 0 1 0 99 1 0 0 7 11 3 4 1 0 0 0 260 0 0 0 100 2 0 0 0 110 52 106 0 1 0 0 302 0 0 0 100 3 0 0 14 8 2 6 1 0 0 0 570 0 0 0 100 4 0 0 2 209 102 4 0 0 0 0 0 0 0 0 100 5 0 0 4 209 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 14 2 38 1 0 2 0 1141 0 0 0 100 March 4, 2026 at 01:09:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 133 0 0 2226 112 172 8 17 4 2 1912 2 2 0 96 1 7 0 0 106 2 206 10 11 6 0 1605 3 1 0 97 2 1 0 0 170 46 167 12 17 5 0 1223 4 1 0 95 3 0 0 14 126 5 214 4 16 5 0 2350 1 1 0 98 4 0 0 3 291 103 227 2 16 0 0 1441 1 1 0 98 5 340 0 108 386 108 327 16 26 11 1 2058 2 1 0 97 6 410 0 0 100 2 132 13 15 6 3 1449 2 1 0 97 7 327 0 0 102 2 240 38 17 12 2 3407 4 2 0 95 March 4, 2026 at 01:09:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 104 47 0 1 0 0 311 0 1 0 98 1 0 0 0 15 3 8 0 0 0 0 9 0 0 0 100 2 0 0 0 16 2 12 0 0 0 0 320 0 0 0 100 3 5 0 14 13 2 12 0 1 0 0 575 0 0 0 100 4 16 0 3 289 104 76 0 1 0 0 13 0 0 0 100 5 0 0 24 320 154 119 0 3 0 0 270 0 0 0 100 6 0 0 0 22 6 16 0 1 0 0 43 0 0 0 100 7 0 0 0 19 2 36 2 1 2 0 1152 0 1 0 99 March 4, 2026 at 01:09:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 109 46 0 0 0 0 310 0 1 0 99 1 0 0 0 13 2 12 0 0 0 0 13 0 0 0 100 2 0 0 0 16 4 12 0 1 0 0 304 0 0 0 100 3 0 0 14 14 2 12 1 0 0 0 565 0 0 0 100 4 0 0 3 228 115 10 0 0 1 0 8 0 0 0 100 5 0 0 10 392 155 193 0 1 2 0 261 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 7 0 0 0 13 2 38 0 0 1 0 1153 0 0 0 99 March 4, 2026 at 01:09:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 112 26 2 0 0 0 314 0 1 0 98 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 304 0 0 0 100 3 0 0 14 9 2 6 1 0 1 0 560 0 0 0 100 4 0 0 2 219 108 10 0 1 1 0 0 0 0 0 100 5 0 0 11 415 153 214 1 0 0 0 260 0 1 0 99 6 0 0 0 10 2 2 0 0 0 0 0 0 0 0 100 7 0 0 0 15 2 40 1 1 1 0 1173 0 0 0 100 March 4, 2026 at 01:09:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 109 118 0 2 0 0 328 0 1 0 99 1 0 0 0 6 0 2 0 0 0 0 3 0 0 0 100 2 0 0 0 19 5 16 1 0 0 0 315 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 560 0 0 0 100 4 0 0 3 215 105 6 0 0 1 0 0 0 0 0 100 5 0 0 10 331 153 128 0 2 0 0 260 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 16 3 40 1 0 1 0 1154 0 0 0 100 March 4, 2026 at 01:09:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 113 142 3 12 190 0 351 0 2 0 98 1 0 0 14 143 2 205 0 18 143 0 27 0 1 0 99 2 0 0 7 65 3 109 0 17 120 0 337 0 1 0 99 3 0 0 14 126 75 99 3 13 149 0 652 0 1 0 99 4 0 0 7 266 109 89 1 10 149 0 3 0 1 0 99 5 0 0 14 318 123 178 0 14 163 0 279 0 1 0 99 6 0 0 0 124 33 157 0 8 158 0 101 0 1 0 99 7 0 0 9 71 2 155 3 8 115 0 1067 0 2 0 98 March 4, 2026 at 01:09:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 109 114 0 2 0 0 310 0 1 0 99 1 0 0 0 16 0 7 0 1 0 0 0 0 0 0 100 2 0 0 0 11 1 4 0 0 0 0 301 0 0 0 100 3 0 0 21 8 2 6 0 1 0 0 560 0 0 0 100 4 0 0 1 217 108 4 0 0 0 0 0 0 0 0 100 5 0 0 12 225 105 20 0 0 0 0 260 0 0 0 100 6 0 0 0 109 50 106 0 1 0 0 0 0 0 0 100 7 0 0 0 17 3 40 1 1 1 0 1065 0 0 0 100 March 4, 2026 at 01:09:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 110 120 0 0 0 0 308 0 1 0 98 1 0 0 112 16 2 15 0 1 0 0 16 0 0 0 100 2 0 0 0 30 3 8 0 0 0 0 306 0 0 0 100 3 0 0 14 34 2 14 2 0 0 0 565 0 0 0 100 4 0 0 7 233 104 10 0 1 0 0 7 0 0 0 100 5 0 0 14 242 105 22 1 0 2 0 260 0 1 0 99 6 0 0 0 124 50 102 0 1 0 0 0 0 0 0 100 7 0 0 0 35 2 44 2 1 1 0 1064 0 1 0 99 March 4, 2026 at 01:09:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 110 129 0 2 0 0 315 0 1 0 98 1 0 0 7 10 0 4 0 1 0 0 0 0 0 0 100 2 0 0 0 10 1 4 1 0 0 0 304 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 560 0 0 0 100 4 0 0 3 227 114 172 0 0 0 0 334 0 0 0 100 5 0 0 10 217 105 10 0 0 0 0 260 0 1 0 99 6 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 7 0 0 0 16 3 40 0 0 1 0 1065 0 0 0 100 March 4, 2026 at 01:09:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2904 121 1256 46 57 11 0 6142 10 5 0 85 1 9 0 18 856 2 1205 35 61 22 0 4918 14 4 0 83 2 4 0 0 835 12 1374 56 54 21 0 5676 8 4 0 88 3 5 0 14 702 4 992 26 35 16 0 6350 10 3 0 87 4 10 0 5 769 110 863 15 29 10 0 8188 7 3 0 90 5 1 0 681 703 106 833 11 26 14 0 6765 6 4 0 90 6 24 0 0 594 21 831 22 28 24 1 5915 12 3 0 85 7 30 0 0 519 5 775 16 30 24 0 7538 11 3 0 86 March 4, 2026 at 01:09:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2226 153 312 1 14 180 0 301 0 2 0 98 1 0 0 0 72 1 143 1 21 203 0 0 0 1 0 99 2 0 0 0 91 8 151 1 15 235 0 310 0 1 0 99 3 0 0 14 178 113 182 12 16 237 0 573 0 1 0 99 4 0 0 3 286 110 172 1 24 263 1 2 0 1 0 99 5 0 0 10 293 107 164 0 18 249 0 260 0 1 0 99 6 0 0 0 67 1 128 2 14 228 0 0 0 1 0 99 7 0 0 0 73 3 153 2 8 228 0 1069 0 1 0 99 March 4, 2026 at 01:09:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2190 153 176 0 4 5 4 379 0 1 0 98 1 6 0 0 40 2 18 0 2 4 0 75 0 0 0 100 2 6 0 0 42 5 34 0 4 5 3 376 0 0 0 100 3 3 0 14 41 4 26 1 1 1 0 630 0 0 0 100 4 3327 0 124 246 104 66 5 1 14 15 1253 4 2 0 94 5 124 0 11 257 105 74 1 5 11 13 390 0 1 0 99 6 32 0 1 105 0 118 0 10 19 7 169 0 0 0 100 7 60 0 0 63 2 104 3 8 21 10 1296 0 1 0 99 March 4, 2026 at 01:10:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 153 198 0 2 0 0 301 0 1 0 99 1 0 0 0 18 4 16 1 0 0 0 14 0 0 0 100 2 0 0 0 23 8 18 1 0 0 0 309 0 0 0 100 3 0 0 14 24 2 24 0 0 1 0 575 0 0 0 100 4 0 0 2 218 108 8 0 1 1 0 8 0 0 0 100 5 0 0 11 219 105 20 0 1 0 0 261 0 0 0 99 6 0 0 0 18 1 10 0 0 0 0 1 0 0 0 100 7 0 0 0 15 3 40 0 0 0 0 1148 0 0 0 100 March 4, 2026 at 01:10:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 153 208 0 0 0 0 301 0 1 0 99 1 0 0 0 13 2 12 0 0 0 0 6 0 0 0 100 2 0 0 0 26 9 20 0 0 0 0 639 0 0 0 99 3 0 0 14 20 4 18 0 0 0 0 564 0 0 0 100 4 0 0 1 212 102 6 0 0 0 0 14 0 0 0 100 5 0 0 13 216 105 12 0 1 0 0 260 0 0 0 100 6 0 0 0 11 0 12 0 1 0 0 4 0 0 0 100 7 0 0 0 15 2 38 2 0 0 0 1146 0 0 0 99 March 4, 2026 at 01:10:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 153 210 1 0 0 0 301 0 1 0 99 1 0 0 0 13 3 8 0 0 0 0 1 0 0 0 100 2 0 0 0 17 6 12 0 0 0 0 308 0 0 0 100 3 0 0 14 17 2 14 1 0 0 0 571 0 0 0 100 4 0 0 3 209 103 0 0 0 0 0 0 0 0 0 100 5 0 0 10 214 105 10 0 0 0 0 260 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 15 3 40 0 0 0 0 1148 0 0 0 100 March 4, 2026 at 01:10:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 455 0 0 2357 153 744 16 38 187 1 2461 3 3 0 94 1 76 0 0 93 3 125 4 16 173 0 305 5 1 0 94 2 127 0 0 138 5 320 5 18 147 1 1855 2 1 0 96 3 201 0 14 201 79 270 18 26 148 1 2013 3 2 0 96 4 1 0 1 350 105 252 3 23 147 0 1461 1 1 0 98 5 34 0 124 329 106 225 1 15 136 0 1507 2 1 0 97 6 0 0 0 128 2 191 1 16 99 0 1275 1 1 0 98 7 34 0 0 239 7 547 28 26 144 0 2803 2 2 0 97 March 4, 2026 at 01:10:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 160 126 1 2 0 0 310 0 1 0 99 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 1 4 1 1 0 0 301 0 0 0 100 3 4 0 14 15 2 12 0 0 0 0 562 0 0 0 100 4 0 0 1 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 13 214 105 10 0 0 0 0 260 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 114 3 136 2 0 1 0 1158 0 1 0 99 March 4, 2026 at 01:10:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2181 160 143 0 4 8 0 334 0 2 0 98 1 0 0 0 28 3 25 0 1 4 0 28 0 0 0 100 2 0 0 0 18 1 21 0 2 8 0 333 0 0 0 100 3 0 0 23 33 2 35 2 2 7 0 582 0 1 0 99 4 0 0 10 233 109 27 0 2 5 0 30 0 0 0 100 5 0 0 10 231 106 34 0 1 8 0 272 0 0 0 100 6 0 0 0 15 0 20 0 1 13 2 150 0 0 0 100 7 1 0 0 119 1 149 1 1 9 0 1085 0 1 0 99 March 4, 2026 at 01:10:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 155 115 1 0 0 0 301 0 1 0 99 1 0 0 0 12 2 4 0 0 0 0 1 0 0 0 100 2 0 0 0 10 1 4 0 1 0 0 301 0 0 0 100 3 0 0 14 88 2 88 1 3 0 0 583 0 0 0 100 4 0 0 3 231 111 22 0 1 0 0 15 0 0 0 100 5 0 0 17 216 105 12 0 1 0 0 260 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 3 0 0 0 100 7 0 0 0 44 2 64 1 0 1 0 1066 0 1 0 99 March 4, 2026 at 01:10:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2164 155 119 0 1 0 0 301 0 1 0 99 1 0 0 0 27 2 4 0 0 0 0 5 0 0 0 100 2 0 0 0 26 2 4 0 0 0 0 302 0 0 0 100 3 0 0 14 130 2 108 0 2 2 0 559 0 0 0 99 4 2 0 3 242 108 22 0 2 4 0 11 0 0 0 100 5 0 0 10 234 105 12 1 0 0 0 260 0 0 0 100 6 0 0 7 22 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 34 4 40 2 0 0 0 1062 0 1 0 99 March 4, 2026 at 01:10:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2161 156 217 0 1 1 0 301 0 2 0 98 1 0 0 0 12 1 6 0 0 0 0 0 0 0 0 100 2 0 0 0 12 1 8 1 1 1 0 304 0 0 0 100 3 0 0 14 15 2 8 0 0 0 0 560 0 0 0 100 4 0 0 4 225 109 16 0 0 0 0 13 0 0 0 100 5 0 0 9 215 105 10 0 0 0 0 260 0 0 0 100 6 0 0 0 11 0 8 0 1 1 0 0 0 0 0 100 7 0 0 0 14 2 40 0 2 4 0 1059 0 0 0 100 March 4, 2026 at 01:10:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2392 149 547 16 27 0 0 3357 4 3 0 93 1 0 0 0 305 6 404 8 24 5 0 1858 3 1 0 96 2 1 0 0 233 2 296 10 16 15 0 2108 4 1 0 94 3 0 0 14 264 2 396 19 14 3 0 2149 4 1 0 95 4 0 0 6 465 108 381 6 15 2 0 3025 3 1 0 96 5 0 0 232 362 105 235 3 16 4 0 2529 3 1 0 96 6 0 0 0 265 1 471 21 18 3 0 2013 2 1 0 97 7 1 0 0 176 4 235 8 10 12 0 2001 4 1 0 94 March 4, 2026 at 01:10:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2653 144 839 37 40 11 0 5544 6 4 0 90 1 0 0 0 548 7 658 26 42 10 0 4752 8 3 0 90 2 0 0 0 530 6 766 29 36 12 0 3356 5 2 0 92 3 1 0 14 488 11 655 21 37 14 0 4069 8 2 0 90 4 3 0 3 627 108 509 19 24 6 0 3652 7 2 0 91 5 0 0 416 507 110 518 16 23 9 0 4465 6 2 0 92 6 0 0 0 336 3 435 13 21 7 0 4854 4 1 0 94 7 0 0 0 601 5 1100 48 28 15 0 3333 6 3 0 92 March 4, 2026 at 01:10:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 2198 154 237 2 4 6 5 1538 0 2 0 98 1 5 0 0 82 2 58 0 2 1 3 43 0 0 0 100 2 5 0 0 34 1 25 0 5 4 2 53 0 0 0 100 3 0 0 14 48 11 26 0 0 0 0 590 0 0 0 99 4 3329 0 118 241 102 79 4 3 9 20 1604 3 2 0 95 5 126 0 9 266 105 94 1 8 8 17 478 0 1 0 99 6 23 0 0 41 0 56 0 7 5 8 116 0 0 0 100 7 56 0 4 44 1 44 0 7 14 6 150 0 0 0 100 March 4, 2026 at 01:10:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 154 259 1 1 0 0 1446 0 2 0 98 1 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 11 0 0 0 100 3 0 0 14 18 7 14 1 0 0 0 565 0 0 0 100 4 0 0 4 211 103 2 1 0 0 0 301 0 0 0 100 5 0 0 9 212 104 10 0 0 0 0 260 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:10:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 130 246 3 14 195 0 1447 0 2 0 98 1 0 0 0 60 2 102 1 15 148 0 0 0 1 0 99 2 0 0 0 57 1 99 2 10 266 0 10 0 1 0 99 3 0 0 14 146 104 109 5 10 261 0 570 0 1 0 99 4 0 0 1 261 102 124 1 17 195 0 301 0 1 0 99 5 0 0 12 320 106 190 0 21 242 0 261 0 1 0 99 6 0 0 0 51 0 89 1 6 170 0 3 0 1 0 99 7 0 0 0 108 25 184 0 22 317 0 0 0 1 0 99 March 4, 2026 at 01:10:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 104 146 2 2 0 0 1449 0 2 0 98 1 0 0 0 12 2 6 0 1 0 0 0 0 0 0 100 2 0 0 0 11 1 8 0 1 0 0 15 0 0 0 100 3 0 0 14 14 5 10 0 0 0 0 883 0 0 0 100 4 0 0 4 211 103 4 0 0 0 0 301 0 0 0 100 5 0 0 9 214 105 10 0 0 0 0 260 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 115 54 112 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:10:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2232 108 194 6 13 1 0 2366 2 2 0 96 1 295 0 7 183 4 182 7 17 4 0 1667 1 1 0 98 2 22 0 0 98 4 172 4 13 5 0 1339 2 0 0 98 3 121 0 14 49 3 85 6 7 0 0 1268 5 1 0 94 4 0 0 7 259 107 169 2 5 0 0 1484 1 1 0 98 5 149 0 119 284 104 85 5 7 0 0 1048 1 1 0 98 6 146 0 0 91 2 137 10 13 1 0 2102 3 1 0 96 7 570 0 0 213 49 343 6 10 3 0 1302 2 1 0 97 March 4, 2026 at 01:10:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 127 1 1 0 0 716 0 1 0 98 1 0 0 7 21 5 14 2 0 0 0 277 0 0 0 100 2 0 0 0 110 50 104 0 1 0 0 0 0 0 0 100 3 4 0 14 12 2 10 0 1 0 0 567 0 0 0 100 4 0 0 2 218 104 12 1 2 0 0 312 0 0 0 100 5 14 0 18 213 103 10 0 0 0 0 15 0 1 0 99 6 0 0 0 33 10 26 0 1 0 0 23 0 0 0 100 7 0 0 0 30 1 22 0 1 0 0 15 0 0 0 100 March 4, 2026 at 01:10:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 143 1 1 0 0 1152 0 2 0 98 1 0 0 7 15 4 10 0 1 0 0 561 0 0 0 100 2 0 0 0 110 52 105 0 1 1 0 1 0 0 0 100 3 0 0 14 8 2 4 1 0 0 0 561 0 0 0 100 4 0 0 2 217 109 4 0 0 0 0 301 0 0 0 100 5 0 0 4 211 103 6 0 0 0 0 0 0 1 0 99 6 0 0 0 18 6 12 1 0 0 0 9 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:10:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 103 184 3 10 148 1 1230 0 2 0 98 1 0 0 7 68 5 107 1 12 126 0 561 0 0 0 99 2 0 0 9 168 51 244 0 17 208 0 11 0 2 0 98 3 0 0 14 134 81 119 9 12 146 0 587 0 1 0 99 4 0 0 10 282 117 112 2 9 133 0 408 0 1 0 99 5 0 0 17 259 103 106 1 11 141 0 15 0 1 0 99 6 0 0 0 76 3 142 2 15 209 0 33 0 0 0 99 7 0 0 0 108 1 136 1 10 170 0 33 0 1 0 99 March 4, 2026 at 01:10:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 93 1 2 0 0 1066 0 2 0 98 1 0 0 7 71 5 62 0 2 0 0 561 0 0 0 100 2 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 3 0 0 14 17 6 12 1 0 0 0 564 0 0 0 100 4 0 0 2 227 110 16 1 1 0 0 310 0 0 0 100 5 0 0 11 216 102 15 0 3 2 0 1 0 1 0 99 6 0 0 0 10 1 4 0 1 1 0 0 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:10:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 104 150 2 1 0 0 1076 0 2 0 98 1 0 0 7 32 5 10 1 0 0 0 560 0 0 0 100 2 0 0 0 128 53 108 0 0 0 0 3 0 0 0 100 3 0 0 14 42 6 26 0 1 0 0 570 0 0 0 100 4 0 0 2 256 119 24 1 0 0 0 318 0 0 0 99 5 0 0 116 216 102 13 0 0 0 0 0 0 0 0 100 6 0 0 0 26 1 6 0 2 0 0 1 0 0 0 100 7 0 0 0 23 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:10:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 138 1 0 0 0 1063 0 2 0 98 1 0 0 7 17 5 12 1 0 0 0 564 0 0 0 100 2 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 3 0 0 14 15 4 8 1 0 0 0 560 0 0 0 100 4 0 0 1 231 111 22 1 1 0 0 315 0 0 0 100 5 0 0 12 216 103 11 0 1 0 0 0 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 10 0 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:10:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2662 113 814 16 38 9 0 8665 10 5 0 85 1 1 0 8 765 9 1079 18 47 15 0 6964 10 4 0 86 2 4 0 0 794 19 1317 43 53 19 0 5657 11 4 0 86 3 1 0 14 696 8 1110 19 45 13 0 6339 9 3 0 88 4 3 0 2 977 109 1299 26 28 12 0 6138 9 4 0 87 5 1 0 691 704 105 885 11 28 28 1 5715 10 4 0 86 6 7 0 0 612 16 941 24 41 14 0 4934 12 3 0 85 7 2 0 0 523 3 806 11 25 19 0 6176 10 3 0 87 March 4, 2026 at 01:10:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 102 183 3 14 250 0 1063 0 2 0 98 1 0 0 7 116 4 179 0 26 163 0 561 0 1 0 99 2 0 0 0 58 2 104 1 15 202 0 0 0 1 0 99 3 0 0 14 164 109 170 11 27 298 0 561 0 1 0 99 4 0 0 3 315 115 188 2 29 246 0 313 0 1 0 99 5 0 0 3 261 104 100 2 13 254 0 1 0 1 0 99 6 0 0 0 114 25 162 2 14 211 0 0 0 1 0 99 7 0 0 0 118 26 189 1 12 245 0 23 0 1 0 99 March 4, 2026 at 01:10:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 146 0 0 0 0 1063 0 2 0 98 1 0 0 7 17 4 12 1 1 1 0 561 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 14 11 4 8 0 0 0 0 562 0 0 0 100 4 0 0 1 227 113 12 1 0 0 0 307 0 0 0 100 5 0 0 6 214 105 8 0 0 0 0 0 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 12 0 0 0 100 March 4, 2026 at 01:10:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 113 1 0 0 0 400 0 1 0 99 1 0 0 7 25 5 54 1 3 2 0 1239 0 0 0 99 2 0 0 0 13 1 14 0 2 0 0 0 0 0 0 100 3 0 0 14 14 2 12 1 1 0 0 565 0 0 0 100 4 0 0 2 229 114 14 0 0 0 0 312 0 0 0 100 5 0 0 4 218 105 12 0 1 0 0 0 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 106 50 102 0 0 0 0 10 0 0 0 100 March 4, 2026 at 01:10:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2136 101 134 0 3 6 1 64 0 2 0 98 1 8 0 7 48 5 64 2 2 5 4 1712 0 1 0 99 2 20 0 0 99 35 94 0 3 2 2 41 0 0 0 100 3 5 0 14 32 4 19 0 2 0 0 620 0 0 0 100 4 3328 0 118 246 107 65 5 3 14 14 1581 4 2 0 94 5 141 0 3 275 109 98 0 9 18 12 516 0 1 0 99 6 44 0 3 42 0 44 2 9 16 3 152 0 0 0 100 7 6 0 0 77 18 72 0 5 2 5 91 0 0 0 100 March 4, 2026 at 01:10:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 108 0 3 0 0 0 0 1 0 99 1 0 0 7 14 4 38 1 0 3 0 1708 0 0 0 99 2 0 0 0 114 53 108 0 2 1 0 1 0 0 0 100 3 0 0 14 9 2 6 1 1 0 0 561 0 0 0 100 4 0 0 2 211 103 4 0 1 0 0 301 0 0 0 100 5 0 0 4 219 105 13 0 2 0 0 0 0 0 0 100 6 0 0 0 17 5 12 0 0 0 0 7 0 0 0 100 7 0 0 0 9 1 6 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:10:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 2249 108 247 5 21 174 1 1056 3 2 0 95 1 215 0 7 229 5 302 12 32 205 0 2888 1 2 0 97 2 5 0 0 163 19 144 3 9 118 0 495 4 1 0 95 3 18 0 14 225 92 264 18 28 178 0 1777 1 1 0 97 4 4 0 5 424 133 444 11 20 136 0 1635 2 1 0 97 5 96 0 141 359 103 360 6 15 169 0 1289 1 1 0 97 6 82 0 0 172 6 372 16 37 118 0 1912 3 2 0 95 7 530 0 0 131 3 258 16 20 164 0 1865 3 2 0 95 March 4, 2026 at 01:10:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 44 0 2 0 0 0 0 1 0 99 1 0 0 7 78 4 102 0 0 0 0 1713 0 1 0 99 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 5 0 14 8 2 4 1 0 0 0 562 0 0 0 100 4 0 0 4 308 152 102 0 0 0 0 301 0 0 0 100 5 0 0 2 218 103 12 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:10:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 104 48 0 1 5 0 16 0 1 0 99 1 1 0 7 89 9 118 4 6 7 0 1766 0 1 0 99 2 0 0 14 24 4 27 0 8 13 0 12 0 1 0 99 3 0 0 14 24 2 21 1 1 2 0 582 0 0 0 100 4 0 0 10 340 160 138 0 5 8 1 459 0 1 0 99 5 0 0 3 234 103 30 0 1 11 0 12 0 0 0 99 6 0 0 9 44 2 54 0 5 15 0 1 0 1 0 99 7 0 0 0 32 8 33 0 5 14 0 41 0 0 0 100 March 4, 2026 at 01:10:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 74 0 3 0 0 4 0 1 0 99 1 0 0 7 17 5 40 1 0 1 0 1627 0 0 0 99 2 0 0 0 12 1 7 0 1 0 0 0 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 559 0 0 0 100 4 0 0 1 268 130 56 0 1 0 0 312 0 0 0 99 5 0 0 12 281 133 78 0 2 0 0 0 0 0 0 100 6 0 0 0 49 1 42 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 21 0 0 0 100 March 4, 2026 at 01:10:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 102 110 0 0 0 0 0 0 1 0 99 1 0 0 7 34 5 42 2 0 1 0 1624 0 1 0 99 2 0 0 112 13 2 9 0 0 0 0 1 0 0 0 100 3 0 0 14 28 4 8 0 0 0 0 562 0 0 0 100 4 0 0 2 243 111 16 2 0 0 0 308 0 0 0 100 5 0 0 4 334 152 114 0 0 0 0 0 0 0 0 100 6 0 0 0 25 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 23 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:10:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 102 224 0 8 124 0 0 0 2 0 98 1 0 0 7 60 5 122 2 6 98 0 1626 0 1 0 99 2 0 0 7 55 1 100 0 11 93 0 0 0 1 0 99 3 0 0 14 110 74 93 6 7 111 0 560 0 1 0 99 4 0 0 4 268 112 92 0 4 101 0 312 0 1 0 99 5 0 0 2 360 154 184 0 6 81 0 1 0 1 0 99 6 0 0 0 53 2 92 0 7 96 0 0 0 0 0 100 7 0 0 0 51 0 90 0 6 90 0 3 0 0 0 100 March 4, 2026 at 01:10:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2534 103 685 18 37 6 0 2882 6 3 0 91 1 0 0 7 444 10 542 22 32 10 0 4331 5 2 0 92 2 0 0 0 374 2 462 16 29 4 0 2688 4 2 0 94 3 0 0 14 346 5 446 15 26 12 0 3314 4 2 0 94 4 0 0 3 518 111 440 16 24 6 0 3206 5 2 0 93 5 1 0 311 512 147 530 9 26 3 0 2530 4 2 0 94 6 0 0 0 271 0 467 14 20 4 0 2700 5 1 0 94 7 0 0 0 291 2 465 10 18 5 0 2525 3 1 0 96 March 4, 2026 at 01:10:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2610 105 830 30 31 9 0 3481 7 4 0 90 1 0 0 7 487 11 639 15 26 10 0 4210 8 3 0 89 2 0 0 0 418 8 544 20 35 7 0 3562 6 2 0 92 3 0 0 14 355 4 474 12 20 4 0 4619 6 2 0 92 4 0 0 3 568 112 486 8 20 3 0 4070 4 2 0 94 5 1 0 451 449 105 436 13 15 11 0 4981 5 3 0 92 6 0 0 0 436 41 625 12 22 15 0 3885 8 3 0 89 7 0 0 0 431 2 701 18 15 7 0 2480 5 2 0 93 March 4, 2026 at 01:10:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 112 0 3 1 0 0 0 1 0 99 1 0 0 8 32 11 56 1 1 1 0 1635 0 1 0 99 2 0 0 0 14 3 6 0 1 0 0 0 0 0 0 100 3 0 0 14 13 3 10 0 0 1 0 268 0 0 0 100 4 0 0 3 219 106 12 1 1 0 0 302 0 0 0 100 5 0 0 3 213 103 6 0 0 0 0 3 0 0 0 100 6 0 0 0 110 51 104 0 0 0 0 294 0 1 0 99 7 0 0 0 8 1 4 0 0 0 0 12 0 0 0 100 March 4, 2026 at 01:10:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 111 0 2 0 0 0 0 1 0 99 1 0 0 7 25 8 48 3 1 2 0 1629 0 0 0 99 2 0 0 0 12 3 8 0 1 0 0 1 0 0 0 100 3 0 0 14 11 3 8 1 1 0 0 269 0 0 0 100 4 0 0 3 211 102 4 0 0 0 0 301 0 0 0 100 5 0 0 3 211 103 6 0 1 0 0 0 0 0 0 100 6 0 0 0 110 51 108 0 1 0 0 295 0 0 0 99 7 0 0 0 8 1 4 0 0 0 0 11 0 0 0 100 March 4, 2026 at 01:10:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 101 162 1 11 208 0 0 0 2 0 98 1 0 0 7 75 11 138 4 8 166 0 1634 0 1 0 98 2 0 0 0 51 4 76 1 7 150 0 3 0 1 0 99 3 0 0 14 181 91 157 3 20 247 0 273 0 1 0 99 4 0 0 3 248 102 114 1 26 204 0 301 0 1 0 99 5 0 0 3 251 103 89 1 7 207 0 0 0 1 0 99 6 0 0 0 146 52 174 2 5 177 0 320 0 1 0 99 7 0 0 0 58 1 118 1 9 223 0 12 0 1 0 99 March 4, 2026 at 01:10:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 110 0 1 0 0 0 0 1 0 99 1 0 0 7 26 9 50 1 0 0 0 1951 0 0 0 99 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 14 13 2 10 0 0 0 0 271 0 0 0 100 4 0 0 2 212 104 4 0 0 0 0 301 0 0 0 100 5 0 0 4 210 103 4 0 0 0 0 0 0 0 0 100 6 0 0 0 112 51 110 0 1 0 0 296 0 1 0 99 7 0 0 0 8 0 6 0 1 0 0 10 0 0 0 100 March 4, 2026 at 01:10:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 122 0 3 1 0 1 0 1 0 99 1 0 0 7 26 9 48 2 0 1 0 1635 0 0 0 99 2 0 0 0 17 5 12 0 1 1 0 3 0 0 0 100 3 0 0 14 19 6 22 0 0 0 0 284 0 0 0 100 4 0 0 5 223 109 12 1 0 0 0 310 0 0 0 100 5 0 0 1 219 103 16 0 1 0 0 5 0 0 0 100 6 0 0 0 111 52 108 0 0 0 0 297 0 0 0 100 7 0 0 0 10 1 6 0 0 1 0 17 0 0 0 100 March 4, 2026 at 01:10:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 0 0 0 0 0 0 2 0 98 1 0 0 7 38 13 56 3 0 2 0 1635 0 1 0 99 2 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 3 0 0 14 8 2 4 1 0 0 0 266 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 301 0 0 0 100 5 0 0 3 211 103 6 0 0 0 0 3 0 0 0 100 6 0 0 0 108 51 104 0 0 0 0 294 0 0 0 100 7 0 0 0 7 0 4 0 0 0 0 20 0 0 0 100 March 4, 2026 at 01:10:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 0 2144 101 160 0 7 10 6 127 0 2 0 98 1 4 0 7 58 8 67 3 5 5 3 1673 0 1 0 99 2 0 0 0 42 3 22 0 3 4 0 1 0 0 0 100 3 0 0 14 37 5 16 0 0 0 0 287 0 0 0 100 4 3325 0 121 234 103 64 5 2 12 19 1574 3 2 0 94 5 150 0 2 264 103 99 0 9 6 16 175 0 0 0 99 6 24 0 2 149 51 159 1 8 9 7 483 0 0 0 99 7 23 0 0 43 1 45 0 9 10 4 125 0 0 0 100 March 4, 2026 at 01:10:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 107 136 0 1 2 0 12 0 1 0 98 1 0 0 7 25 8 48 1 0 4 0 2032 0 0 0 99 2 0 0 0 13 2 10 0 0 0 0 3 0 0 0 100 3 0 0 14 17 3 22 0 1 2 0 280 0 0 0 100 4 0 0 2 213 105 4 0 0 0 0 301 0 0 0 100 5 0 0 4 210 103 4 0 0 0 0 1 0 0 0 100 6 0 0 0 108 51 104 0 0 0 0 294 0 0 0 100 7 0 0 0 9 1 6 0 0 1 0 10 0 0 0 100 March 4, 2026 at 01:10:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 105 120 0 0 0 0 6 0 1 0 99 1 0 0 8 20 5 42 2 0 2 0 1707 0 1 0 99 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 1 218 109 4 1 0 0 0 301 0 0 0 100 5 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 108 51 104 0 0 0 0 294 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 12 0 0 0 100 March 4, 2026 at 01:10:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 120 0 0 0 0 5 0 1 0 99 1 0 0 7 18 6 42 0 0 2 0 1712 0 0 0 99 2 0 0 0 12 3 8 0 0 0 0 5 0 0 0 100 3 0 0 14 11 3 6 1 0 1 0 267 0 0 0 100 4 0 0 2 227 112 18 0 2 0 0 315 0 0 0 100 5 0 0 4 215 102 12 1 2 0 0 7 0 0 0 100 6 0 0 0 114 51 112 0 1 0 0 299 0 0 0 100 7 0 0 0 7 0 2 1 0 0 0 10 0 0 0 100 March 4, 2026 at 01:10:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 126 0 0 0 0 10 0 2 0 98 1 0 0 7 18 5 40 2 0 1 0 1701 0 0 0 99 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 14 12 4 10 0 0 0 0 270 0 0 0 100 4 0 0 2 214 105 6 0 0 0 0 302 0 0 0 100 5 0 0 4 211 102 6 0 0 0 0 3 0 0 0 100 6 0 0 0 115 51 116 1 1 0 0 297 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 12 0 0 0 100 March 4, 2026 at 01:10:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 118 0 0 0 0 323 0 2 0 98 1 0 0 7 26 8 50 3 0 2 0 1709 0 0 0 99 2 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 3 0 0 14 9 2 8 0 0 0 0 271 0 0 0 100 4 0 0 2 214 105 6 0 0 0 0 302 0 0 0 100 5 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 108 51 104 0 0 0 0 294 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 11 0 0 0 100 March 4, 2026 at 01:10:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 107 98 0 4 3 0 0 0 1 0 99 1 0 0 7 35 11 66 2 5 5 0 1709 0 1 0 99 2 0 0 0 16 2 14 0 4 4 0 3 0 0 0 100 3 0 0 14 46 3 45 1 6 4 0 266 0 0 0 100 4 0 0 2 219 105 12 1 3 3 0 301 0 0 0 100 5 0 0 4 219 103 15 0 4 4 0 0 0 0 0 100 6 0 0 7 115 52 116 0 3 4 0 294 0 0 0 100 7 0 0 0 17 3 14 0 1 1 0 12 0 0 0 100 March 4, 2026 at 01:10:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 108 0 0 0 0 0 0 1 0 99 1 0 0 7 28 9 56 1 1 1 0 1708 0 0 0 99 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 4 0 0 3 214 104 6 0 0 0 0 301 0 0 0 100 5 0 0 3 217 102 10 0 0 0 0 0 0 0 0 100 6 0 0 0 111 51 106 0 0 0 0 294 0 0 0 100 7 0 0 7 7 0 4 0 1 0 0 10 0 0 0 100 March 4, 2026 at 01:10:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2293 102 392 11 21 7 1 1765 3 2 0 95 1 135 0 7 130 10 196 14 18 4 0 3223 4 2 0 95 2 4 0 0 130 4 236 8 7 2 0 1380 3 1 0 96 3 0 0 14 120 2 155 7 14 0 0 1610 1 0 0 98 4 1 0 2 360 115 337 9 14 2 0 1878 1 1 0 98 5 287 0 116 337 107 232 13 13 5 1 1866 4 1 0 95 6 0 0 0 190 44 239 7 17 0 0 2032 1 1 0 98 7 531 0 0 116 1 329 30 15 5 1 1761 5 1 0 94 March 4, 2026 at 01:10:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 108 0 1 1 0 10 0 2 0 98 1 0 0 7 19 4 42 2 0 4 0 1707 0 0 0 99 2 0 0 0 14 1 12 0 1 1 0 18 0 0 0 100 3 5 0 14 24 7 24 0 0 0 0 286 0 0 0 100 4 21 0 2 227 110 16 1 1 1 0 326 0 0 0 99 5 0 0 18 325 154 128 0 1 1 0 45 1 0 0 99 6 0 0 0 20 4 16 0 1 0 0 349 0 0 0 100 7 0 0 0 11 1 6 0 1 5 0 42 0 0 0 100 March 4, 2026 at 01:10:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 0 0 0 0 0 0 2 0 98 1 0 0 7 18 5 44 2 0 1 0 1725 0 1 0 99 2 0 0 0 15 3 12 0 0 1 0 10 0 0 0 100 3 0 0 14 25 9 26 1 1 2 0 275 0 0 0 100 4 0 0 2 221 111 6 1 0 0 0 301 0 0 0 100 5 0 0 4 316 152 112 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:10:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 101 205 1 21 159 0 0 0 2 0 98 1 0 0 7 77 6 154 1 11 148 0 1704 0 1 0 99 2 0 0 0 55 1 99 1 14 181 0 3 0 0 0 100 3 0 0 14 124 87 103 7 10 151 0 277 0 1 0 99 4 0 0 2 248 107 63 1 4 136 0 301 0 1 0 99 5 0 0 4 357 152 205 0 11 100 0 1 0 1 0 99 6 0 0 0 45 1 92 1 14 194 0 294 0 0 0 99 7 0 0 0 40 1 75 1 6 95 0 0 0 0 0 100 March 4, 2026 at 01:10:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 108 0 0 0 0 0 0 1 0 99 1 0 0 7 14 4 38 2 0 0 0 1704 0 0 0 99 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 14 23 9 20 0 1 0 0 275 0 0 0 100 4 0 0 1 215 104 10 0 1 0 0 301 0 0 0 100 5 0 0 5 314 151 110 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:10:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 13 2116 102 126 1 4 14 0 15 0 1 0 99 1 0 0 7 28 4 50 3 1 0 0 1859 0 1 0 99 2 0 0 0 20 1 20 1 4 8 0 19 0 0 0 100 3 0 0 14 27 6 28 0 1 10 0 293 0 0 0 100 4 0 0 2 251 114 51 0 6 10 0 356 0 0 0 99 5 0 0 18 323 151 128 0 4 11 0 7 0 1 0 99 6 0 0 0 44 8 45 1 2 4 0 330 0 1 0 99 7 0 0 7 15 0 10 0 2 5 0 0 0 1 0 99 March 4, 2026 at 01:10:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 115 0 1 0 0 0 0 1 0 99 1 0 0 14 14 4 40 0 1 0 0 1615 0 0 0 99 2 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 3 0 0 14 13 3 6 1 0 0 0 266 0 0 0 100 4 0 0 3 223 107 8 1 0 0 0 316 0 0 0 100 5 0 0 3 310 151 107 0 2 0 0 0 0 0 0 100 6 0 0 0 21 7 16 0 0 0 0 303 0 0 0 99 7 0 0 0 10 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:10:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 103 116 0 0 0 0 1 0 1 0 99 1 0 0 7 34 4 40 1 0 1 0 1616 0 1 0 99 2 1 0 7 29 3 8 0 1 0 0 10 0 0 0 100 3 0 0 14 26 3 6 0 0 0 0 266 0 0 0 100 4 0 0 2 234 105 10 0 0 0 0 312 0 0 0 100 5 0 0 116 313 152 109 0 1 0 0 0 0 1 0 99 6 0 0 0 43 7 26 0 1 0 0 303 0 0 0 99 7 0 0 0 24 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:10:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 119 0 1 2 0 0 0 1 0 99 1 0 0 7 21 4 44 2 1 2 0 1614 0 1 0 99 2 0 0 0 14 1 10 0 0 3 0 3 0 0 0 100 3 0 0 14 16 5 14 0 1 2 0 270 0 0 0 100 4 0 0 4 213 103 6 0 0 0 0 303 0 0 0 100 5 0 0 9 313 153 110 0 0 1 0 0 0 1 0 99 6 0 0 0 29 9 22 1 0 0 0 304 0 0 0 99 7 0 0 0 12 1 10 0 1 1 0 2 0 0 0 100 March 4, 2026 at 01:10:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 51 0 0 2879 106 1061 34 62 14 0 5087 13 6 0 82 1 5 0 7 840 10 1266 48 50 26 3 6675 14 4 0 82 2 6 0 0 706 6 1015 27 46 26 0 6141 10 4 0 86 3 19 0 14 527 4 622 19 33 16 0 6110 11 3 0 86 4 1 0 3 817 110 924 18 38 7 0 6518 9 3 0 88 5 4 0 704 884 123 1276 22 37 21 0 5770 8 4 0 88 6 2 0 0 644 19 1035 28 39 26 0 5094 11 4 0 86 7 0 0 0 509 9 749 16 26 7 1 8185 7 2 0 91 March 4, 2026 at 01:11:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 94 0 4 0 0 10 0 1 0 99 1 0 0 7 18 5 40 3 0 2 0 1615 0 0 0 99 2 0 0 0 14 4 10 0 0 0 0 3 0 0 0 100 3 0 0 14 12 4 10 1 0 0 0 271 0 0 0 100 4 0 0 2 226 110 18 1 0 0 0 316 0 0 0 100 5 0 0 4 261 110 56 0 1 0 0 17 0 0 0 100 6 0 0 0 118 52 114 0 0 0 0 301 0 0 0 99 7 0 0 0 12 2 6 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:11:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 120 0 0 2 0 20 0 1 0 99 1 0 0 7 21 4 48 1 1 4 0 1614 0 0 0 99 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 3 211 104 2 0 0 0 0 301 0 0 0 100 5 0 0 3 222 109 16 0 0 0 0 9 0 0 0 100 6 0 0 0 113 53 108 1 0 0 0 296 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:11:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 123 0 1 0 0 10 0 1 0 99 1 0 0 7 14 4 38 1 0 2 0 1614 0 0 0 99 2 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 3 0 0 14 10 3 6 0 0 0 0 266 0 0 0 100 4 0 0 5 210 103 2 0 0 0 0 300 0 0 0 100 5 0 0 1 217 106 10 1 0 0 0 5 0 0 0 100 6 0 0 0 40 16 33 1 1 0 0 294 0 0 0 100 7 0 0 0 82 37 76 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:11:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2205 127 334 0 35 220 0 0 0 2 0 98 1 0 0 7 80 4 183 2 22 263 0 1616 0 1 0 99 2 0 0 0 69 1 135 1 23 258 0 3 0 1 0 99 3 0 0 14 145 107 141 9 17 284 0 266 0 1 0 99 4 0 0 2 269 103 114 2 14 202 0 305 0 1 0 99 5 0 0 4 273 110 125 1 10 154 0 330 0 1 0 99 6 0 0 0 59 4 104 2 8 211 0 302 0 1 0 99 7 0 0 0 110 26 170 0 20 211 0 0 0 1 0 99 March 4, 2026 at 01:11:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 152 216 0 0 0 0 20 0 1 0 99 1 0 0 7 18 4 40 3 0 1 0 1612 0 0 0 99 2 0 0 0 10 1 8 0 2 0 0 0 0 0 0 100 3 0 0 14 9 3 6 1 0 0 0 266 0 0 0 100 4 0 0 1 222 108 14 1 0 0 0 309 0 0 0 100 5 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 8 0 0 0 0 297 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:11:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 125 0 0 2187 121 170 0 10 24 20 182 0 2 0 98 1 56 0 10 179 34 241 2 14 16 6 1834 0 1 0 99 2 20 0 0 54 2 50 0 4 6 7 129 0 0 0 100 3 12 0 14 47 3 36 0 6 6 4 372 0 0 0 100 4 6 0 4 260 114 45 0 4 5 3 378 0 0 0 99 5 20 0 2 237 102 26 0 2 1 2 50 0 0 0 100 6 0 0 0 37 2 22 0 2 0 0 319 0 0 0 100 7 3323 0 116 40 1 58 5 1 6 13 1249 3 2 0 95 March 4, 2026 at 01:11:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 1 0 0 20 0 1 0 98 1 0 0 7 121 54 142 1 0 1 0 1698 0 1 0 99 2 0 0 0 13 2 8 0 1 2 0 0 0 0 0 100 3 0 0 14 11 3 8 1 1 1 0 293 0 0 0 100 4 0 0 4 224 108 16 0 1 0 0 309 0 0 0 100 5 0 0 2 207 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 1 0 0 0 294 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 0 0 1 0 0 0 1 0 99 1 0 0 7 43 18 64 1 0 1 0 1699 0 1 0 99 2 0 0 0 84 39 80 0 1 0 0 1 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 3 224 108 16 0 0 3 0 628 0 0 0 99 5 0 0 3 209 102 4 0 1 0 0 0 0 0 0 100 6 0 0 0 13 1 15 0 1 0 0 301 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:11:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 120 0 0 1 0 20 0 1 0 99 1 0 0 7 19 4 44 2 1 5 0 1699 0 0 0 99 2 0 0 0 111 52 108 0 0 1 0 3 0 0 0 100 3 0 0 14 10 3 8 0 0 4 0 266 0 0 0 100 4 0 0 3 211 102 4 1 0 0 0 301 0 0 0 100 5 0 0 3 207 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 26 9 22 1 0 0 0 307 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 114 0 0 0 0 10 0 1 0 99 1 20 0 7 21 5 42 3 0 1 0 1702 0 0 0 99 2 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 3 0 0 14 9 3 6 1 0 0 0 266 0 0 0 100 4 0 0 2 211 103 4 0 0 0 0 306 0 0 0 100 5 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 17 4 12 1 0 0 0 298 0 0 0 100 7 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:11:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 1 0 0 0 0 1 0 99 1 0 0 7 20 6 42 2 0 1 0 1692 0 1 0 99 2 0 0 0 116 54 112 0 0 0 0 2 0 0 0 100 3 0 0 14 11 3 8 1 0 0 0 269 0 0 0 100 4 0 0 3 226 110 18 0 0 0 0 316 0 0 0 100 5 0 0 3 214 102 10 1 1 1 0 7 0 0 0 100 6 0 0 0 29 7 24 1 0 0 0 307 0 0 0 100 7 0 0 0 11 2 6 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:11:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 114 0 0 0 0 10 0 1 0 98 1 0 0 7 14 4 38 0 0 0 0 1692 0 0 0 99 2 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 3 219 109 8 0 0 0 0 304 0 0 0 100 5 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 25 9 20 0 0 0 0 622 0 0 0 99 7 0 0 0 11 2 8 0 1 0 0 26 0 0 0 100 March 4, 2026 at 01:11:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 121 0 0 0 0 20 0 1 0 99 1 0 0 7 15 4 42 2 1 1 0 1692 0 0 0 99 2 0 0 0 111 53 104 0 0 0 0 1 0 0 0 100 3 0 0 14 10 3 8 0 1 0 0 266 0 0 0 100 4 0 0 3 227 113 14 1 0 0 0 310 0 0 0 100 5 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 117 1 1 2 0 10 0 1 0 99 1 0 0 7 23 4 48 2 1 4 0 1694 0 1 0 99 2 0 0 0 110 51 108 0 1 2 0 3 0 0 0 100 3 0 0 14 14 4 13 1 2 1 0 266 0 0 0 100 4 0 0 3 230 111 22 1 0 0 0 315 0 0 0 100 5 0 0 3 210 103 4 0 0 0 0 1 0 0 0 100 6 0 0 0 14 3 10 1 0 0 0 298 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:11:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 10 0 1 0 99 1 0 0 7 14 4 38 0 0 2 0 1690 0 1 0 99 2 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 3 0 0 14 11 4 8 0 0 0 0 266 0 0 0 100 4 0 0 6 220 109 10 0 0 0 0 306 0 0 0 100 5 0 0 1 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 66 0 0 2205 101 178 8 16 6 0 1495 2 2 0 96 1 31 0 7 77 4 281 8 17 3 0 3121 3 1 0 96 2 120 0 0 109 19 116 10 14 1 0 1782 2 1 0 97 3 601 0 14 125 8 107 12 11 5 1 1840 5 1 0 94 4 55 0 3 372 111 229 16 14 5 0 1726 4 1 0 95 5 1 0 129 304 106 177 2 16 6 0 1695 2 1 0 98 6 21 0 0 150 32 219 12 12 1 0 2071 2 1 0 97 7 7 0 0 84 1 182 16 10 1 0 1377 2 0 0 98 March 4, 2026 at 01:11:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 102 0 1 1 0 0 0 1 0 99 1 0 0 7 14 4 38 1 0 1 0 1706 0 0 0 99 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 4 0 14 11 4 8 0 0 0 0 268 0 0 0 100 4 0 0 4 225 106 12 1 0 0 0 301 0 0 0 100 5 0 0 2 220 107 14 0 0 1 0 8 0 0 0 100 6 0 0 0 112 52 110 0 1 0 0 294 0 1 0 99 7 0 0 0 11 3 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 0 0 1 0 99 1 0 0 7 15 4 38 1 0 1 0 1706 0 0 0 99 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 14 12 4 8 1 0 0 0 266 0 0 0 100 4 0 0 1 213 106 2 0 0 0 0 301 0 0 0 100 5 0 0 5 217 106 14 1 0 0 0 6 0 0 0 100 6 0 0 0 111 52 106 1 0 0 0 294 0 1 0 99 7 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:11:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 102 167 1 8 122 0 0 0 2 0 98 1 0 0 7 64 4 151 2 18 152 0 1702 0 1 0 99 2 0 0 0 52 0 86 1 3 113 0 3 0 0 0 100 3 0 0 14 119 79 112 9 5 164 0 266 0 1 0 99 4 0 0 1 254 109 104 1 17 124 0 301 0 1 0 99 5 0 0 5 267 108 117 1 11 144 0 9 0 1 0 99 6 0 0 0 197 52 247 0 8 168 0 294 0 1 0 99 7 0 0 0 55 2 89 1 5 123 0 2 0 0 0 100 March 4, 2026 at 01:11:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 102 126 0 2 8 0 24 0 1 0 99 1 0 0 21 31 5 65 3 7 10 1 1794 0 1 0 99 2 0 0 9 13 0 7 0 3 3 0 18 0 0 0 100 3 0 0 23 21 4 18 0 0 7 0 267 0 1 0 99 4 0 0 3 236 110 31 0 4 8 0 323 0 0 0 100 5 0 0 3 233 108 36 1 4 8 1 94 0 1 0 99 6 0 0 0 125 53 119 0 1 2 0 313 0 1 0 99 7 0 0 0 16 0 15 0 0 12 0 8 0 0 0 100 March 4, 2026 at 01:11:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 0 0 3 0 1 0 99 1 0 0 7 24 7 47 2 1 1 0 1619 0 1 0 99 2 0 0 0 13 2 8 0 0 0 0 2 0 0 0 100 3 0 0 21 12 4 10 0 1 0 0 266 0 0 0 100 4 0 0 4 253 121 40 1 0 1 0 332 0 0 0 99 5 0 0 2 216 102 12 0 2 2 0 10 0 0 0 100 6 0 0 0 120 53 116 1 1 0 0 300 0 0 0 99 7 0 0 0 10 2 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 101 112 0 0 0 0 0 0 2 0 98 1 0 0 119 21 5 45 1 0 0 0 1616 0 1 0 99 2 0 0 0 25 0 6 0 1 0 0 0 0 0 0 100 3 0 0 14 29 4 10 1 1 0 0 266 0 0 0 100 4 0 0 4 240 110 14 0 0 0 0 307 0 0 0 100 5 0 0 2 225 102 4 0 1 0 0 0 0 0 0 100 6 0 0 0 131 54 110 1 0 0 0 296 0 0 0 100 7 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:11:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 113 0 2 0 0 0 0 1 0 99 1 0 0 14 21 5 46 1 0 2 0 1630 0 1 0 99 2 0 0 0 16 2 12 0 0 1 0 10 0 0 0 100 3 0 0 14 21 4 20 0 3 3 0 266 0 0 0 100 4 0 0 3 223 109 14 0 0 0 0 310 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 115 54 110 0 0 0 0 297 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2397 102 488 22 29 9 0 1723 4 3 0 94 1 18 0 7 289 6 397 17 22 10 0 3981 5 2 0 93 2 35 0 0 271 1 397 16 22 11 0 2249 5 2 0 93 3 12 0 14 350 3 502 24 19 9 0 1695 3 2 0 95 4 0 0 4 429 109 226 2 9 4 0 1356 2 1 0 97 5 0 0 240 385 104 333 7 10 4 0 2703 3 2 0 95 6 1 0 0 275 49 341 11 8 1 0 2079 4 1 0 95 7 0 0 0 170 5 238 4 9 2 0 2995 2 1 0 97 March 4, 2026 at 01:11:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2582 102 696 32 42 12 0 4267 7 4 0 89 1 0 0 7 603 10 841 23 34 18 0 5377 10 3 0 87 2 8 0 0 514 3 678 17 25 10 0 4711 7 2 0 91 3 0 0 0 456 10 638 21 26 6 0 5103 8 2 0 90 4 1 0 15 890 138 1068 48 27 13 0 3778 6 3 0 91 5 0 0 524 569 104 667 12 17 6 0 3811 5 3 0 92 6 25 0 0 470 4 723 18 27 16 0 4540 9 2 0 89 7 27 0 0 360 1 482 17 20 8 1 4058 6 2 0 92 March 4, 2026 at 01:11:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 143 0 0 2158 101 187 0 8 12 17 147 0 2 0 98 1 41 0 8 59 5 101 2 7 13 9 1798 0 1 0 99 2 16 0 0 39 0 34 0 5 7 3 140 0 0 0 100 3 11 0 0 69 10 69 0 7 2 3 130 0 0 0 100 4 18 0 18 351 158 135 2 5 7 3 636 0 1 0 99 5 0 0 2 240 103 31 1 4 1 0 15 0 0 0 100 6 0 0 0 38 4 23 2 3 2 0 320 0 0 0 100 7 3329 0 116 41 0 64 6 5 13 15 1252 3 2 0 95 March 4, 2026 at 01:11:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 110 0 0 0 0 20 0 1 0 99 1 0 0 7 14 5 40 0 0 2 0 1700 0 1 0 99 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 25 8 18 0 0 0 0 8 0 0 0 100 4 0 0 18 313 153 112 0 2 0 0 568 0 0 0 100 5 0 0 2 207 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 294 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 110 0 2 0 0 10 0 1 0 99 1 0 0 7 16 5 40 1 0 1 0 1697 0 0 0 99 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 18 6 14 0 1 0 0 5 0 0 0 100 4 0 0 18 313 154 106 0 0 0 0 567 0 0 0 99 5 0 0 2 209 102 4 0 1 0 0 0 0 0 0 100 6 0 0 0 14 3 10 0 0 0 0 295 0 0 0 100 7 0 0 0 10 1 8 0 1 1 0 1 0 0 0 100 March 4, 2026 at 01:11:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 105 278 1 26 220 0 7 0 2 0 98 1 0 0 7 136 30 216 5 19 200 0 1707 0 1 0 98 2 0 0 0 57 0 97 1 6 254 0 0 0 1 0 99 3 0 0 0 154 96 121 4 9 222 0 323 0 1 0 99 4 0 0 18 310 129 159 2 13 222 0 566 0 1 0 99 5 0 0 2 253 105 85 1 3 164 0 1 0 1 0 99 6 0 0 0 54 2 96 1 9 237 0 294 0 1 0 99 7 0 0 0 69 1 151 1 19 224 0 7 0 1 0 99 March 4, 2026 at 01:11:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 52 0 0 2201 106 363 10 12 2 0 1628 3 2 0 94 1 11 0 0 289 46 415 17 16 1 0 3296 2 2 0 96 2 84 0 7 89 1 114 8 12 1 0 1321 3 1 0 96 3 0 0 0 149 3 203 6 14 1 0 1721 2 0 0 98 4 370 0 17 276 106 123 6 8 1 0 2452 3 1 0 96 5 7 0 115 299 109 314 19 15 2 0 1458 3 1 0 96 6 378 0 0 90 2 138 5 6 1 0 2099 3 1 0 96 7 0 0 0 65 0 131 4 9 0 0 1395 1 0 0 99 March 4, 2026 at 01:11:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 112 40 1 1 1 0 16 0 1 0 99 1 0 0 0 19 5 46 1 1 2 0 1448 0 0 0 99 2 0 0 7 15 4 12 0 0 0 0 262 0 0 0 100 3 0 0 0 107 1 102 0 0 0 0 0 0 0 0 100 4 4 0 16 219 110 10 0 0 0 0 568 0 0 0 100 5 0 0 4 316 154 114 0 1 0 0 4 0 0 0 100 6 0 0 0 16 3 16 0 1 0 0 306 0 0 0 100 7 0 0 0 17 2 12 0 1 0 0 14 0 0 0 100 March 4, 2026 at 01:11:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 106 118 1 1 0 0 5 0 1 0 98 1 0 0 0 16 3 38 1 0 2 0 1443 0 0 0 100 2 0 0 7 11 2 12 0 1 0 0 260 0 0 0 100 3 0 0 0 13 1 6 0 0 0 0 0 0 0 0 100 4 0 0 16 213 105 8 0 0 0 0 570 0 0 0 100 5 0 0 4 308 152 104 0 0 0 0 0 0 0 0 100 6 0 0 0 15 4 12 0 0 0 0 298 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:11:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2122 104 124 0 6 12 0 19 0 2 0 98 1 0 0 0 29 5 48 2 2 7 0 1370 0 1 0 99 2 0 0 7 76 32 70 1 4 5 0 261 0 0 0 100 3 0 0 0 14 1 9 0 2 6 0 6 0 0 0 100 4 0 0 17 231 107 29 1 2 8 0 602 0 0 0 99 5 0 0 17 277 122 73 0 9 17 0 75 0 1 0 99 6 0 0 7 22 3 23 1 4 12 1 387 0 0 0 100 7 0 0 0 29 6 28 0 3 1 0 24 0 0 0 100 March 4, 2026 at 01:11:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2156 102 191 0 16 166 0 0 0 2 0 98 1 0 0 0 65 3 141 1 14 110 0 1353 0 1 0 99 2 0 0 7 158 52 202 1 7 135 0 260 0 1 0 99 3 0 0 0 127 80 115 5 5 139 0 0 0 1 0 99 4 0 0 19 259 105 92 2 8 118 0 567 0 1 0 99 5 0 0 1 275 102 125 1 9 130 0 0 0 1 0 99 6 0 0 0 45 2 63 2 7 92 0 294 0 0 0 100 7 0 0 0 57 7 91 1 4 103 0 6 0 0 0 99 March 4, 2026 at 01:11:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 101 112 0 1 0 0 0 0 1 0 99 1 8 0 7 35 4 44 2 2 2 0 1353 0 1 0 99 2 0 0 7 127 52 106 0 0 0 0 260 0 0 0 100 3 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 4 0 0 18 232 105 10 0 0 0 0 569 0 0 0 100 5 0 0 114 216 102 15 0 1 0 0 0 0 1 0 99 6 23 0 0 34 5 12 0 0 0 0 306 0 0 0 100 7 0 0 0 40 8 18 1 0 0 0 13 0 0 0 100 March 4, 2026 at 01:11:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 122 0 1 0 0 9 0 1 0 99 1 0 0 0 19 4 38 2 1 1 0 1352 0 0 0 99 2 0 0 7 112 52 108 0 1 0 0 260 0 0 0 100 3 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 4 0 0 18 220 111 8 0 0 0 0 567 0 0 0 100 5 0 0 9 215 102 8 0 1 0 0 0 0 0 0 100 6 0 0 0 21 5 20 0 0 0 0 308 0 1 0 99 7 0 0 0 23 7 20 0 0 0 0 17 0 0 0 100 March 4, 2026 at 01:11:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2912 110 1212 43 65 18 0 5376 12 6 0 82 1 12 0 0 731 5 939 31 54 16 0 6088 15 3 0 81 2 34 0 7 811 31 1111 18 55 32 0 7619 10 4 0 86 3 17 0 0 659 5 988 18 44 11 0 5960 9 3 0 88 4 1 0 18 898 109 1146 25 47 20 0 6968 10 4 0 86 5 59 0 717 567 109 774 14 28 19 0 6153 9 4 0 87 6 7 0 0 603 7 962 11 36 12 0 6597 10 3 0 87 7 25 0 0 637 7 1043 18 42 11 0 5798 9 3 0 88 March 4, 2026 at 01:11:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 12 0 1 0 0 0 0 1 0 99 1 0 0 0 126 7 120 0 0 1 0 309 0 0 0 100 2 0 0 7 25 7 56 0 2 1 0 1333 0 0 0 99 3 0 0 0 10 2 2 0 0 0 0 0 0 0 0 100 4 0 0 21 212 104 4 1 0 0 0 567 0 0 0 100 5 0 0 7 308 151 104 0 1 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 10 2 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:11:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 103 166 1 11 241 0 2 0 2 0 98 1 0 0 0 110 7 150 1 13 259 0 307 0 1 0 99 2 0 0 7 71 6 141 3 10 248 0 1323 0 1 0 99 3 0 0 0 133 91 98 6 10 196 0 0 0 1 0 99 4 0 0 16 259 110 93 1 9 248 0 566 0 1 0 99 5 0 0 4 354 153 214 1 17 229 0 0 0 1 0 99 6 0 0 0 57 1 101 1 11 231 0 294 0 1 0 99 7 0 0 0 41 1 70 1 7 166 0 2 0 1 0 99 March 4, 2026 at 01:11:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 110 0 0 0 0 0 0 1 0 99 1 0 0 0 22 6 14 0 0 0 0 308 0 0 0 100 2 0 0 7 17 5 42 1 1 0 0 1313 0 0 0 99 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 17 214 107 6 0 1 0 0 568 0 0 0 100 5 0 0 3 313 154 108 0 0 0 0 1 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:11:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 129 0 1 0 0 14 0 1 0 99 1 0 0 0 34 10 24 2 2 0 0 633 0 0 0 100 2 0 0 7 20 7 46 2 0 1 0 1314 0 0 0 99 3 0 0 0 9 1 6 0 0 0 0 2 0 0 0 100 4 0 0 18 221 109 12 1 1 0 0 569 0 0 0 100 5 0 0 2 317 153 118 0 1 0 0 5 0 0 0 100 6 0 0 0 20 4 18 1 0 0 0 308 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:11:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 110 0 0 0 0 0 0 1 0 99 1 0 0 0 13 1 6 0 0 0 0 301 0 0 0 100 2 0 0 7 18 5 44 2 0 0 0 1336 0 0 0 99 3 0 0 0 19 7 14 0 0 0 0 8 0 0 0 100 4 0 0 16 211 104 4 1 0 0 0 567 0 0 0 100 5 0 0 4 311 153 106 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:11:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 117 0 0 0 0 5 0 1 0 99 1 0 0 0 11 1 6 0 0 0 0 304 0 0 0 100 2 0 0 7 22 6 52 0 0 0 0 1356 0 0 0 99 3 0 0 0 21 8 16 0 0 0 0 16 0 0 0 100 4 0 0 17 213 105 6 0 0 0 0 568 0 0 0 100 5 0 0 3 312 153 108 0 1 0 0 0 0 0 0 100 6 0 0 0 11 1 10 0 1 0 0 294 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 114 0 0 1 0 0 0 1 0 99 1 0 0 0 11 1 4 0 0 0 0 301 0 0 0 100 2 0 0 7 19 5 48 1 0 1 0 1323 0 1 0 99 3 0 0 0 18 5 12 0 0 0 0 5 0 0 0 100 4 0 0 16 215 108 6 0 0 2 0 567 0 0 0 100 5 0 0 4 311 153 108 0 0 1 0 0 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 294 0 0 0 100 7 0 0 0 9 0 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:11:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2155 104 141 0 4 1 3 63 0 2 0 98 1 3325 0 122 42 1 62 4 2 15 14 1547 3 2 0 95 2 135 0 7 62 5 113 2 9 17 10 1551 0 1 0 99 3 35 0 2 64 8 73 1 10 15 7 487 0 0 0 99 4 10 0 17 252 107 42 1 4 9 3 690 0 0 0 99 5 29 0 3 339 153 140 2 5 14 3 88 0 0 0 100 6 5 0 0 36 2 20 1 2 4 2 339 0 0 0 100 7 5 0 0 35 1 30 0 4 2 4 55 0 0 0 100 March 4, 2026 at 01:11:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 132 0 1 0 0 8 0 1 0 99 1 0 0 0 11 1 2 1 0 0 0 301 0 0 0 100 2 0 0 7 18 5 44 2 0 0 0 1405 0 1 0 99 3 0 0 0 10 2 2 0 0 0 0 0 0 0 0 100 4 0 0 21 239 122 22 1 0 0 0 579 0 0 0 99 5 0 0 7 312 152 110 0 0 0 0 0 0 0 0 100 6 0 0 0 17 3 16 0 0 0 0 306 0 0 0 100 7 0 0 0 11 0 6 1 0 0 0 7 0 0 0 100 March 4, 2026 at 01:11:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 0 0 0 0 1 0 99 1 20 0 0 18 2 16 0 1 0 0 306 0 0 0 100 2 0 0 7 18 5 44 1 0 1 0 1407 0 1 0 99 3 1 0 0 9 2 4 0 0 0 0 5 0 0 0 100 4 0 0 18 224 113 16 0 0 0 0 575 0 0 0 99 5 0 0 2 308 152 106 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 0 0 1 0 99 1 0 0 0 9 1 2 0 0 0 0 301 0 0 0 100 2 0 0 7 19 6 44 2 0 2 0 1401 0 0 0 99 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 16 216 107 10 0 0 0 0 570 0 0 0 100 5 0 0 4 312 154 106 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:11:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 105 126 0 3 0 0 1 0 1 0 99 1 0 0 0 12 1 4 0 1 0 0 301 0 0 0 100 2 0 0 7 21 5 54 0 1 0 0 1391 0 0 0 99 3 0 0 0 12 2 10 0 0 0 0 2 0 0 0 100 4 0 0 16 228 111 20 1 2 4 0 892 0 0 0 99 5 0 0 4 316 154 116 0 1 2 0 6 0 0 0 100 6 0 0 0 13 3 8 1 1 0 0 295 0 0 0 100 7 0 0 0 12 2 8 0 2 0 0 2 0 0 0 100 March 4, 2026 at 01:11:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 118 0 4 0 0 4 0 1 0 99 1 0 0 0 10 1 2 1 0 0 0 301 0 0 0 100 2 0 0 7 16 4 42 1 0 2 0 1401 0 0 0 99 3 0 0 0 25 7 24 0 1 0 0 9 0 0 0 100 4 0 0 16 212 105 6 1 0 0 0 571 0 0 0 100 5 0 0 4 316 155 110 0 2 0 0 1 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:11:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 124 0 0 0 0 9 0 1 0 99 1 0 0 0 9 1 2 0 0 0 0 301 0 0 0 100 2 0 0 7 25 6 53 3 1 0 0 1403 0 1 0 99 3 0 0 0 25 9 18 1 0 0 0 12 0 0 0 100 4 0 0 18 219 111 8 0 0 1 0 568 0 0 0 100 5 0 0 2 313 152 110 0 0 1 0 0 0 0 0 100 6 0 0 0 18 4 18 0 0 0 0 308 0 0 0 100 7 0 0 0 9 1 6 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:11:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 0 2 0 0 0 0 2 0 98 1 0 0 0 11 1 4 0 0 0 0 301 0 0 0 100 2 0 0 7 16 5 42 0 1 1 0 1402 0 1 0 99 3 0 0 0 17 5 12 0 0 1 0 5 0 0 0 100 4 0 0 18 211 104 6 0 1 1 0 567 0 0 0 100 5 0 0 2 309 151 106 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:11:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 2190 103 271 7 12 0 0 1386 3 2 0 95 1 70 0 0 92 2 85 4 9 0 0 2056 3 1 0 96 2 1 0 7 95 8 211 5 15 1 0 2803 3 1 0 96 3 0 0 0 86 4 157 9 11 4 0 1682 3 1 0 97 4 79 0 16 376 131 238 5 11 4 0 2113 2 1 0 96 5 100 0 130 332 124 307 10 16 7 0 1838 4 1 0 94 6 489 0 0 125 8 215 16 20 5 0 2352 4 1 0 95 7 10 0 0 86 1 210 7 17 3 0 1243 3 0 0 97 March 4, 2026 at 01:11:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 103 149 1 9 110 0 0 0 2 0 98 1 0 0 0 59 1 100 2 8 109 0 301 0 1 0 99 2 0 0 7 77 11 160 6 17 113 0 1415 0 1 0 99 3 0 0 0 112 77 96 6 14 151 0 0 0 1 0 99 4 5 0 16 352 152 190 2 7 190 0 569 0 1 0 99 5 0 0 18 301 102 133 1 10 116 0 0 0 1 0 99 6 0 0 0 66 2 126 1 12 116 0 294 0 1 0 99 7 0 0 0 50 0 82 1 5 101 0 0 0 0 0 100 March 4, 2026 at 01:11:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 86 0 2 0 0 0 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 304 0 0 0 100 2 0 0 7 29 11 56 1 0 2 0 1416 0 1 0 99 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 17 308 153 104 0 0 0 0 568 0 1 0 99 5 0 0 3 240 101 34 0 0 1 0 0 0 0 0 100 6 0 0 0 11 2 8 0 1 1 0 294 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 110 0 0 0 0 8 0 2 0 98 1 0 0 0 10 1 4 0 1 0 0 301 0 0 0 100 2 0 0 7 34 13 58 2 0 1 0 1419 0 1 0 99 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 17 323 157 118 0 2 0 0 568 0 0 0 99 5 0 0 3 211 101 8 0 1 0 0 0 0 0 0 100 6 0 0 0 18 4 16 0 1 0 0 305 0 0 0 100 7 0 0 0 10 0 10 0 1 1 0 5 0 0 0 100 March 4, 2026 at 01:11:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 8 2120 104 97 0 5 9 0 39 0 2 0 98 1 0 0 0 21 2 15 0 3 9 0 303 0 0 0 100 2 0 0 7 40 12 68 1 2 9 0 1429 0 1 0 99 3 0 0 14 14 1 13 0 2 7 0 23 0 0 0 100 4 0 0 25 358 156 310 1 2 3 0 908 0 2 0 98 5 0 0 3 222 101 24 1 3 9 0 20 0 0 0 99 6 2 0 0 21 3 21 2 5 9 0 309 0 0 0 100 7 0 0 0 22 2 24 0 7 17 0 155 0 0 0 100 March 4, 2026 at 01:11:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 108 139 0 1 0 0 13 0 2 0 98 1 0 0 7 12 2 6 1 1 0 0 301 0 0 0 100 2 0 0 7 18 6 42 1 0 1 0 1320 0 0 0 99 3 0 0 0 10 1 5 0 1 0 0 0 0 0 0 100 4 0 0 17 309 152 106 1 0 0 0 570 0 0 0 100 5 0 0 3 212 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 294 0 0 0 100 7 0 0 1 11 1 8 0 2 0 0 3 0 0 0 100 March 4, 2026 at 01:11:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2133 107 126 1 2 1 0 6 0 2 0 98 1 0 0 0 32 2 12 0 1 2 0 301 0 0 0 100 2 0 0 7 37 5 48 2 2 3 0 1317 0 1 0 99 3 0 0 112 14 3 11 0 1 0 0 4 0 0 0 100 4 0 0 15 330 153 110 0 0 1 0 569 0 0 0 99 5 0 0 6 235 106 14 0 0 1 0 8 0 0 0 100 6 0 0 0 29 3 10 0 1 1 0 295 0 0 0 100 7 0 0 0 23 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:11:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 109 124 0 1 2 0 10 0 2 0 98 1 0 0 0 17 2 12 0 1 0 0 304 0 0 0 100 2 0 0 7 16 4 42 1 1 2 0 1316 0 0 0 100 3 0 0 7 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 18 309 152 104 0 0 0 0 568 0 0 0 100 5 0 0 2 213 103 6 0 0 0 0 1 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2317 111 439 11 14 2 0 846 3 3 0 95 1 0 0 0 182 3 278 16 17 2 0 1717 2 1 0 97 2 1 0 7 168 7 225 5 10 4 0 1991 2 1 0 97 3 0 0 0 129 1 140 6 6 5 0 936 2 1 0 97 4 5 0 16 390 152 208 4 4 2 0 2260 2 1 0 97 5 6 0 144 321 108 205 3 8 4 0 1325 3 1 0 96 6 0 0 0 155 9 220 4 9 1 0 1416 1 1 0 98 7 0 0 0 107 1 157 1 6 0 0 1736 1 0 0 99 March 4, 2026 at 01:12:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2752 107 1061 53 54 16 0 4651 10 5 0 85 1 8 0 0 763 34 1129 75 50 16 0 4613 9 4 0 88 2 18 0 7 616 5 731 30 34 17 0 6773 10 3 0 86 3 17 0 0 476 3 507 8 23 31 0 4795 8 2 0 89 4 32 0 2 700 106 638 11 26 27 0 6310 12 3 0 85 5 9 0 606 654 110 687 10 25 11 0 3441 5 3 0 92 6 0 0 0 484 4 741 9 20 2 0 5647 5 2 0 93 7 5 0 0 564 5 995 21 25 8 0 4086 9 2 0 89 March 4, 2026 at 01:12:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 1 0 0 0 0 1 0 99 1 0 0 0 118 51 112 0 1 0 0 0 0 0 0 100 2 0 0 7 20 7 44 2 0 0 0 1620 0 1 0 99 3 0 0 0 9 1 6 0 0 0 0 13 0 0 0 100 4 0 0 6 209 102 2 0 0 0 0 301 0 0 0 100 5 0 0 15 229 111 26 1 0 0 0 279 0 0 0 99 6 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:12:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 101 153 2 14 216 0 0 0 2 0 98 1 0 0 0 136 26 185 1 17 211 0 0 0 1 0 99 2 0 0 7 90 6 209 0 30 254 0 1615 0 1 0 99 3 0 0 0 159 101 125 12 13 185 0 10 0 1 0 99 4 0 0 2 252 102 88 2 8 216 0 301 0 1 0 99 5 0 0 18 268 106 118 1 11 176 0 271 0 1 0 99 6 0 0 0 58 3 94 1 11 187 0 294 0 1 0 99 7 0 0 0 104 25 172 0 33 173 0 0 0 1 0 99 March 4, 2026 at 01:12:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 36 0 4 0 0 0 0 1 0 99 1 0 0 0 84 1 79 0 0 0 0 0 0 0 0 100 2 0 0 7 20 6 42 2 0 1 0 1620 0 0 0 99 3 0 0 0 14 2 8 0 1 0 0 0 0 0 0 100 4 0 0 2 214 106 2 1 0 0 0 302 0 0 0 100 5 0 0 18 225 110 20 0 0 0 0 279 0 0 0 100 6 0 0 0 12 2 6 1 0 0 0 295 0 0 0 100 7 0 0 0 112 51 108 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:12:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 118 0 0 0 0 23 0 1 0 99 1 0 0 0 18 1 14 0 1 0 0 0 0 0 0 100 2 0 0 7 16 5 42 2 0 3 0 1615 0 0 0 99 3 0 0 0 13 3 10 0 0 0 0 20 0 0 0 100 4 0 0 2 227 112 12 0 0 0 0 8 0 0 0 100 5 0 0 18 224 108 20 2 1 0 0 893 0 0 0 99 6 0 0 0 22 4 18 1 0 0 0 301 0 0 0 100 7 0 0 0 107 50 104 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:12:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 120 0 0 2170 104 119 0 11 19 17 178 0 2 0 98 1 21 0 0 83 1 91 0 14 17 8 144 0 0 0 100 2 63 0 10 52 5 86 1 8 13 6 1765 0 1 0 99 3 25 0 0 92 3 105 0 9 3 4 112 0 0 0 100 4 10 0 1 251 108 30 0 4 9 4 96 0 0 0 100 5 0 0 20 263 105 32 0 3 1 0 604 0 0 0 99 6 0 0 0 35 2 18 0 3 0 0 315 0 0 0 100 7 3325 0 118 129 48 152 5 3 10 13 1268 4 2 0 93 March 4, 2026 at 01:12:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 106 0 1 0 0 0 0 1 0 99 1 0 0 0 43 2 40 0 1 0 0 0 0 0 0 100 2 0 0 7 20 6 44 1 0 0 0 1704 0 1 0 99 3 0 0 0 86 2 83 0 3 0 0 3 0 0 0 100 4 0 0 5 211 102 4 0 2 0 0 0 0 0 0 100 5 0 0 15 210 103 6 1 0 0 0 570 0 0 0 100 6 0 0 0 27 9 24 0 0 0 0 306 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:12:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 178 0 1 0 0 0 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 2 0 0 7 19 5 46 2 0 2 0 1700 0 0 0 99 3 0 0 0 47 2 42 0 1 0 0 10 0 0 0 100 4 0 0 2 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 18 210 103 6 1 0 3 0 568 0 0 0 100 6 0 0 0 23 7 16 2 0 0 0 325 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:12:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 152 210 0 0 0 0 6 0 2 0 98 1 0 0 0 10 1 6 0 0 3 0 0 0 0 0 100 2 0 0 7 17 5 44 2 1 1 0 1703 0 0 0 99 3 0 0 0 19 2 16 0 1 0 0 10 0 0 0 100 4 0 0 4 224 110 14 0 0 0 0 8 0 0 0 100 5 0 0 16 210 104 6 0 0 0 0 567 0 0 0 100 6 0 0 0 20 6 14 0 0 0 0 615 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 107 130 1 1 1 0 15 0 1 0 99 1 0 0 0 102 47 98 0 1 0 0 0 0 0 0 100 2 0 0 7 21 7 46 2 0 1 0 1704 0 1 0 99 3 0 0 0 16 2 10 0 0 0 0 10 0 0 0 100 4 0 0 2 238 119 22 0 1 4 0 10 0 0 0 100 5 0 0 18 211 103 8 0 0 0 0 568 0 0 0 100 6 0 0 0 19 3 16 0 0 0 0 300 0 0 0 100 7 0 0 0 9 1 6 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:12:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 110 0 0 0 0 0 0 1 0 99 1 0 0 0 112 51 106 0 1 0 0 0 0 0 0 100 2 0 0 7 16 5 42 0 1 1 0 1690 0 0 0 99 3 0 0 0 12 2 6 0 0 0 0 10 0 0 0 100 4 23 0 3 223 111 12 0 0 0 0 10 0 0 0 100 5 1 0 17 210 104 6 1 0 0 0 571 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 7 1 0 0 9 2 4 0 0 0 0 26 0 0 0 100 March 4, 2026 at 01:12:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 1 0 0 0 0 2 0 98 1 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 2 0 0 7 18 6 42 2 0 3 0 1693 0 1 0 99 3 0 0 0 11 2 8 0 0 0 0 13 0 0 0 100 4 0 0 2 232 115 19 0 1 0 0 10 0 0 0 100 5 0 0 18 214 103 14 1 1 0 0 566 0 0 0 100 6 0 0 0 14 3 8 1 0 0 0 295 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:12:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 114 0 1 0 0 6 0 1 0 99 1 0 0 0 111 51 106 0 1 0 0 0 0 0 0 100 2 0 0 7 18 5 46 1 0 5 0 1692 0 0 0 99 3 0 0 0 12 2 8 0 0 2 0 10 0 0 0 100 4 0 0 2 223 110 12 0 0 0 0 325 0 0 0 100 5 0 0 18 211 103 8 0 1 2 0 568 0 0 0 100 6 0 0 0 24 5 26 1 1 0 0 299 0 0 0 100 7 0 0 0 8 1 4 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:12:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 110 0 1 0 0 0 0 1 0 99 1 0 0 0 111 51 102 0 0 0 0 0 0 0 0 100 2 0 0 7 18 5 44 3 1 3 0 1693 0 1 0 99 3 0 0 0 10 2 6 0 0 0 0 10 0 0 0 100 4 0 0 4 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 16 208 103 4 0 0 0 0 567 0 0 0 100 6 0 0 0 24 8 20 0 0 0 0 304 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:12:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 103 126 0 3 1 0 12 0 2 0 98 1 0 0 0 108 50 102 0 0 0 0 0 0 1 0 99 2 0 0 7 21 6 46 2 0 2 0 1694 0 1 0 99 3 0 0 0 10 2 6 0 0 0 0 10 0 0 0 100 4 0 0 3 216 108 2 0 1 0 0 0 0 0 0 100 5 0 0 17 211 103 8 1 0 0 0 566 0 0 0 100 6 0 0 0 28 6 24 1 0 3 0 304 0 0 0 100 7 0 0 0 8 0 6 0 1 1 0 7 0 0 0 100 March 4, 2026 at 01:12:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 102 211 8 11 1 0 1407 2 2 0 96 1 137 0 0 172 48 266 5 8 4 1 1674 3 1 0 95 2 251 0 7 83 8 163 4 11 3 0 3392 3 1 0 96 3 569 0 0 92 2 205 16 16 6 2 1781 6 1 0 93 4 9 0 1 314 102 372 1 11 12 1 1842 1 1 0 98 5 0 0 145 259 103 89 8 14 4 0 2120 2 1 0 97 6 0 0 0 106 11 177 14 10 0 0 1667 3 1 0 96 7 0 0 0 79 1 190 2 8 4 0 1638 2 0 0 98 March 4, 2026 at 01:12:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 119 0 1 0 0 8 0 2 0 98 1 0 0 0 10 0 2 0 0 0 0 0 0 0 0 100 2 0 0 7 125 58 148 2 0 1 0 1730 0 1 0 99 3 0 0 0 14 2 10 0 1 0 0 33 0 0 0 100 4 0 0 3 212 102 2 0 0 0 0 1 0 0 0 100 5 5 0 31 221 107 21 0 1 0 0 640 0 0 0 99 6 18 0 0 14 2 8 0 1 0 0 311 0 0 0 100 7 0 0 0 25 6 21 1 0 0 0 22 1 0 0 99 March 4, 2026 at 01:12:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 102 208 1 21 191 0 0 0 2 0 98 1 0 0 0 73 0 98 0 7 144 0 0 0 1 0 99 2 0 0 7 171 57 243 1 8 176 0 1705 0 1 0 99 3 0 0 0 124 80 124 4 24 160 0 0 0 1 0 99 4 0 0 2 247 102 87 0 10 156 0 0 0 1 0 99 5 0 0 18 247 103 86 0 8 159 0 566 0 1 0 99 6 0 0 0 49 2 82 1 6 104 0 294 0 0 0 99 7 0 0 0 63 6 107 0 14 145 0 6 0 0 0 99 March 4, 2026 at 01:12:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 110 0 0 0 0 0 0 1 0 99 1 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 2 0 0 7 121 56 146 3 0 1 0 1710 0 1 0 99 3 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 4 0 0 3 210 102 4 0 1 0 0 0 0 0 0 100 5 0 0 17 212 105 8 1 0 0 0 569 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 7 0 0 0 21 7 16 1 0 0 0 10 0 0 0 100 March 4, 2026 at 01:12:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 130 1 0 0 0 21 0 2 0 98 1 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 2 0 0 7 89 42 114 0 0 1 0 1709 0 1 0 99 3 0 0 0 42 18 38 0 1 0 0 0 0 0 0 100 4 0 0 2 216 106 4 0 0 0 0 2 0 0 0 100 5 0 0 18 214 104 10 1 0 2 0 566 0 0 0 100 6 0 0 0 20 3 16 1 0 0 0 300 0 0 0 100 7 0 0 0 19 6 16 0 0 0 0 14 0 0 0 100 March 4, 2026 at 01:12:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 103 124 0 1 0 0 34 0 2 0 98 1 1 0 0 19 0 16 0 3 11 0 21 0 0 0 100 2 0 0 21 24 6 48 3 1 8 0 1622 0 1 0 99 3 0 0 9 118 52 120 1 2 15 0 75 0 1 0 99 4 0 0 10 220 103 17 0 7 15 0 32 0 1 0 99 5 0 0 19 230 104 39 0 5 13 0 661 0 0 0 100 6 0 0 0 37 8 31 2 3 5 0 318 0 0 0 100 7 0 0 0 27 4 24 0 3 5 0 28 0 0 0 100 March 4, 2026 at 01:12:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 2 0 0 2 0 2 0 98 1 0 0 0 11 0 8 0 1 1 0 18 0 0 0 100 2 0 0 7 25 8 53 0 1 0 0 1625 0 1 0 99 3 0 0 0 111 52 106 0 0 0 0 3 0 0 0 100 4 0 0 3 212 102 2 0 0 0 0 0 0 0 0 100 5 0 0 24 213 104 10 0 1 0 0 566 0 0 0 100 6 0 0 0 34 9 32 1 1 0 0 304 0 0 0 100 7 0 0 0 10 2 4 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:12:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 102 116 0 1 0 0 0 0 2 0 98 1 0 0 0 26 0 4 0 1 0 0 0 0 0 0 100 2 0 0 119 25 6 53 3 0 4 0 1617 0 1 0 99 3 0 0 0 127 52 106 0 0 2 0 0 0 0 0 100 4 0 0 4 224 101 2 0 0 0 0 0 0 0 0 100 5 0 0 16 229 104 10 1 0 1 0 567 0 0 0 100 6 0 0 0 36 6 14 0 1 0 0 299 0 0 0 100 7 0 0 0 27 3 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:12:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 114 0 0 0 0 2 0 1 0 99 1 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 2 0 0 14 19 6 44 1 0 0 0 1619 0 1 0 99 3 0 0 0 110 52 104 0 0 0 0 0 0 0 0 100 4 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 5 0 0 17 212 104 6 1 0 0 0 568 0 0 0 100 6 0 0 0 24 7 16 2 0 1 0 301 0 0 0 100 7 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:12:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2865 110 1226 60 73 13 0 5889 12 5 0 83 1 14 0 0 775 4 1141 36 62 7 0 6656 11 4 0 85 2 3 0 7 671 9 746 22 45 20 0 7191 10 3 0 87 3 37 0 0 632 25 781 12 36 7 0 7498 8 3 0 89 4 0 0 3 893 113 1027 15 42 6 0 5539 7 3 0 90 5 3 0 688 742 106 1030 21 59 14 0 6434 9 4 0 87 6 19 0 0 662 16 1062 26 41 16 0 5599 10 3 0 87 7 3 0 0 628 10 979 28 41 15 0 5604 11 3 0 86 March 4, 2026 at 01:12:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 109 0 4 0 0 2 0 2 0 98 1 0 0 0 12 1 4 0 1 0 0 0 0 0 0 100 2 0 0 7 14 5 10 0 0 0 0 561 0 0 0 100 3 0 0 0 25 9 48 1 0 1 0 1066 0 0 0 99 4 0 0 2 314 151 108 0 0 0 0 11 0 0 0 100 5 0 0 18 212 105 8 0 0 0 0 567 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 297 0 0 0 100 7 0 0 0 10 2 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 118 0 0 1 0 5 0 1 0 99 1 0 0 0 9 0 4 0 1 1 0 0 0 0 0 100 2 0 0 7 19 6 16 1 1 0 0 562 0 0 0 100 3 0 0 0 28 10 48 2 0 1 0 1066 0 1 0 99 4 0 0 3 307 152 100 0 0 0 0 0 0 0 0 100 5 0 0 17 213 105 10 1 0 0 0 570 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:12:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 103 167 1 14 211 0 2 0 2 0 98 1 0 0 0 115 0 195 0 23 250 0 0 0 1 0 99 2 0 0 7 76 5 130 4 11 264 0 562 0 1 0 99 3 0 0 0 137 93 180 17 23 278 0 1060 0 1 0 98 4 0 0 3 353 150 201 1 13 206 0 10 0 1 0 99 5 0 0 17 254 106 95 3 9 204 0 567 0 1 0 99 6 0 0 0 54 1 98 2 7 196 0 294 0 1 0 99 7 0 0 0 58 1 107 1 8 139 0 0 0 1 0 99 March 4, 2026 at 01:12:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2147 105 57 2 5 3 1 114 0 1 0 98 1 3328 0 121 85 0 110 5 3 4 19 1283 3 2 0 95 2 158 0 7 122 5 164 0 13 10 20 776 0 1 0 99 3 33 0 3 64 8 100 1 8 15 10 1608 0 1 0 99 4 15 0 3 343 150 147 0 7 8 4 131 0 0 0 99 5 9 0 17 240 104 36 1 3 4 3 667 0 0 0 99 6 4 0 0 31 1 12 0 2 4 2 335 0 0 0 100 7 0 0 0 29 1 10 0 1 1 0 2 0 0 0 100 March 4, 2026 at 01:12:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 105 128 0 0 0 0 16 0 1 0 99 1 0 0 1 11 0 4 0 1 0 0 0 0 0 0 100 2 0 0 7 22 7 16 1 0 0 0 563 0 0 0 100 3 0 0 0 16 4 38 1 0 1 0 1139 0 0 0 100 4 0 0 2 319 156 116 0 1 2 0 12 0 0 0 100 5 0 0 18 213 104 12 0 1 2 0 568 0 0 0 100 6 0 0 0 15 2 12 0 1 0 0 300 0 0 0 100 7 0 0 0 20 6 16 0 0 0 0 14 0 0 0 100 March 4, 2026 at 01:12:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 0 2216 126 369 9 15 0 1 1958 2 2 0 96 1 0 0 0 66 1 111 3 8 0 0 1665 1 0 0 98 2 145 0 7 77 6 183 16 17 0 0 2391 4 1 0 96 3 3 0 0 119 7 193 26 12 2 0 2579 2 1 0 97 4 459 0 3 335 130 141 7 10 2 0 2066 3 1 0 96 5 16 0 129 272 106 167 8 18 4 0 2159 2 1 0 97 6 230 0 0 69 2 85 11 10 1 1 2349 3 1 0 96 7 0 0 0 73 7 79 13 15 6 0 1119 6 0 0 94 March 4, 2026 at 01:12:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 152 219 0 0 0 0 10 0 2 0 98 1 0 0 0 13 1 6 0 1 0 0 5 0 0 0 100 2 0 0 7 22 7 16 0 0 0 0 564 0 0 0 100 3 0 0 0 21 5 44 2 0 1 0 1156 0 1 0 99 4 0 0 3 214 105 2 0 0 0 0 1 0 0 0 100 5 4 0 31 226 109 24 2 0 0 0 589 0 0 0 99 6 0 0 0 11 1 6 0 1 1 0 305 0 0 0 100 7 0 0 0 13 1 7 0 1 0 0 9 0 0 0 100 March 4, 2026 at 01:12:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2217 153 334 0 21 154 0 21 0 2 0 98 1 0 0 0 63 0 101 2 12 136 0 16 0 1 0 99 2 0 0 7 78 5 121 1 10 154 0 576 0 1 0 99 3 0 0 0 125 74 177 11 14 180 0 1165 0 1 0 99 4 0 0 13 258 102 98 2 12 145 0 0 0 1 0 99 5 0 0 16 266 107 99 1 9 89 1 677 0 1 0 99 6 0 0 0 88 8 159 4 23 147 0 403 0 1 0 99 7 0 0 0 55 2 91 1 14 103 0 1 0 0 0 100 March 4, 2026 at 01:12:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 155 224 0 1 1 0 5 0 2 0 98 1 0 0 7 14 1 6 0 2 0 0 0 0 0 0 100 2 0 0 7 17 5 11 0 1 0 0 560 0 0 0 100 3 0 0 0 11 2 34 1 0 1 0 1059 0 0 0 100 4 0 0 3 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 17 212 104 8 0 0 0 0 568 0 0 0 100 6 0 0 0 19 5 12 1 0 1 0 298 0 0 0 100 7 0 0 0 11 1 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:12:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2168 156 179 0 2 1 0 19 0 2 0 98 1 0 0 0 27 0 4 0 0 0 0 0 0 1 0 99 2 0 0 14 90 5 71 2 3 1 0 562 0 0 0 100 3 0 0 0 28 2 34 1 0 1 0 1056 0 0 0 100 4 0 0 3 232 106 0 0 0 0 0 0 0 0 0 100 5 0 0 17 230 104 10 1 0 5 0 566 0 0 0 100 6 0 0 0 42 7 22 0 0 0 0 305 0 0 0 100 7 22 0 0 28 2 8 0 0 0 0 12 0 0 0 100 March 4, 2026 at 01:12:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 7 2166 153 225 0 3 0 0 13 0 2 0 98 1 0 0 0 9 0 2 0 0 0 0 0 0 1 0 99 2 0 0 7 25 5 18 0 1 0 0 560 0 0 0 100 3 0 0 7 14 2 36 3 1 2 0 1054 0 0 0 99 4 0 0 3 213 104 2 0 0 0 0 1 0 0 0 100 5 0 0 17 213 104 6 1 0 0 0 568 0 0 0 100 6 0 0 0 31 11 22 1 0 0 0 309 0 0 0 100 7 7 0 0 14 2 8 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:12:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 2294 152 426 5 16 4 0 1079 4 2 0 94 1 1 0 0 182 4 224 6 22 3 0 1294 2 1 0 97 2 0 0 0 199 5 261 15 13 3 0 1126 3 1 0 96 3 0 0 7 179 3 290 8 15 2 0 2431 2 1 0 97 4 1 0 4 308 105 141 2 10 4 0 1224 1 1 0 98 5 1 0 156 271 104 120 2 7 0 0 2448 2 1 0 98 6 0 0 0 142 9 206 3 9 2 0 2001 2 1 0 98 7 1 0 0 175 2 289 5 13 3 0 808 2 1 0 97 March 4, 2026 at 01:12:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2773 105 1006 32 73 218 1 4117 15 5 0 80 1 1 0 0 720 10 1106 26 50 149 0 4727 6 4 0 90 2 1 0 0 738 8 1247 33 37 227 0 4834 7 4 0 90 3 2 0 7 748 94 1003 43 49 202 0 5946 8 4 0 88 4 0 0 2 727 109 626 13 33 294 0 5710 8 3 0 89 5 0 0 578 542 105 611 13 38 218 0 5004 7 3 0 90 6 0 0 0 559 4 843 18 38 143 0 5363 6 3 0 92 7 0 0 0 681 34 1068 14 42 228 0 4625 7 3 0 90 March 4, 2026 at 01:12:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 2165 105 90 0 6 9 4 105 0 1 0 99 1 5 0 0 54 0 20 0 3 1 2 52 0 0 0 100 2 0 0 0 58 2 12 1 1 1 0 301 0 0 0 100 3 0 0 7 47 7 55 1 2 2 0 1347 0 0 0 99 4 3319 0 118 251 105 92 4 5 10 17 1297 3 2 0 95 5 161 0 17 265 106 104 1 8 18 22 746 0 1 0 99 6 24 0 3 43 1 56 0 9 15 7 432 0 0 0 100 7 25 0 0 194 50 261 1 8 5 5 157 0 0 0 99 March 4, 2026 at 01:12:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 128 0 0 0 0 19 0 1 0 99 1 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 16 5 12 0 0 0 0 305 0 0 0 100 3 0 0 7 15 5 40 1 0 2 0 1399 0 1 0 99 4 0 0 1 228 110 14 0 0 1 0 2 0 0 0 100 5 0 0 19 223 106 24 1 1 0 0 577 0 0 0 100 6 0 0 0 16 2 12 1 1 0 0 300 0 0 0 100 7 0 0 0 108 50 104 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:12:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 108 122 0 0 0 0 11 0 1 0 99 1 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 3 0 0 7 19 6 44 2 0 2 0 1402 0 0 0 99 4 0 0 4 217 103 8 0 0 0 0 0 0 0 0 100 5 0 0 16 215 106 12 0 0 0 0 577 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 120 0 0 0 0 325 0 1 0 99 1 0 0 0 11 0 10 0 3 0 0 6 0 0 0 100 2 0 0 0 16 5 12 0 0 0 0 306 0 0 0 100 3 0 0 7 16 5 40 2 0 0 0 1397 0 1 0 99 4 0 0 3 217 102 8 0 0 0 0 0 0 0 0 100 5 0 0 17 216 106 12 0 0 1 0 567 0 0 0 100 6 0 0 0 8 1 4 0 1 0 0 294 0 0 0 100 7 0 0 0 106 50 102 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:12:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 113 0 0 2203 109 245 20 12 11 0 1174 4 2 0 94 1 3 0 0 111 0 209 6 15 2 1 1512 1 1 0 98 2 30 0 0 117 2 169 10 11 6 0 1777 2 1 0 98 3 1 0 7 106 7 179 5 9 11 0 2702 2 1 0 98 4 0 0 2 291 103 130 5 11 0 0 1283 1 0 0 98 5 44 0 130 261 106 87 6 8 1 1 1938 2 1 0 97 6 405 0 0 91 1 219 33 16 4 0 2020 3 1 0 96 7 266 0 0 169 48 237 12 14 5 1 2118 4 1 0 95 March 4, 2026 at 01:12:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 103 47 0 2 0 0 12 0 1 0 99 1 0 0 0 186 50 181 0 0 0 0 19 0 0 0 100 2 0 0 0 25 7 17 1 1 0 0 313 0 0 0 100 3 0 0 7 18 5 42 1 0 1 0 1417 0 1 0 99 4 14 0 2 218 101 10 0 1 0 0 12 0 0 0 100 5 4 0 32 217 106 12 2 1 0 0 578 0 0 0 100 6 0 0 0 11 1 4 1 1 0 0 295 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 120 0 0 0 0 12 0 1 0 99 1 0 0 0 108 50 106 0 1 2 0 0 0 0 0 100 2 0 0 0 22 8 18 0 0 0 0 310 0 0 0 100 3 0 0 7 15 5 40 1 0 0 0 1407 0 0 0 99 4 0 0 2 218 104 8 0 0 0 0 0 0 0 0 100 5 0 0 18 217 106 14 0 0 0 0 567 0 0 0 100 6 0 0 0 13 1 10 0 0 0 0 299 0 0 0 100 7 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:12:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 101 117 0 1 7 0 3 0 2 0 98 1 0 0 0 136 57 141 0 1 5 0 31 0 0 0 99 2 0 0 0 35 7 36 2 3 3 0 406 0 0 0 100 3 3 0 7 29 5 53 3 4 7 0 1354 0 1 0 99 4 0 0 3 233 104 22 0 3 10 1 71 0 0 0 100 5 0 0 31 224 107 31 0 5 12 0 594 0 1 0 99 6 0 0 9 14 1 9 0 3 7 0 295 0 1 0 99 7 0 0 7 14 0 17 0 3 15 0 0 0 0 0 100 March 4, 2026 at 01:12:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 106 0 0 0 0 0 0 1 0 99 1 0 0 7 124 58 122 0 1 0 0 11 0 0 0 100 2 0 0 0 14 3 8 0 0 0 0 302 0 0 0 100 3 0 0 7 17 5 40 3 0 0 0 1314 0 0 0 100 4 0 0 6 216 101 8 0 0 0 0 0 0 0 0 100 5 0 0 15 219 106 15 1 1 0 0 570 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 7 0 0 0 10 1 4 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:12:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 103 149 1 10 143 0 0 0 2 0 98 1 0 0 0 130 8 143 0 8 124 0 11 0 1 0 99 2 0 0 0 182 52 219 2 15 134 0 303 0 1 0 99 3 0 0 7 137 79 153 6 16 199 0 1316 0 1 0 99 4 0 0 2 278 103 106 1 9 132 0 0 0 1 0 99 5 0 0 130 263 107 88 2 5 144 0 567 0 1 0 99 6 0 0 0 57 2 54 2 4 115 0 294 0 1 0 99 7 0 0 0 64 1 88 0 5 98 0 0 0 0 0 100 March 4, 2026 at 01:12:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 22 0 3 0 0 0 0 1 0 99 1 0 0 1 115 6 106 1 2 1 0 9 0 0 0 100 2 0 0 0 110 51 104 0 1 0 0 301 0 0 0 100 3 0 0 7 21 7 44 1 1 2 0 1315 0 0 0 99 4 0 0 2 211 102 2 0 0 1 0 0 0 0 0 100 5 0 0 25 218 105 18 0 1 0 0 567 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2946 107 1362 23 73 12 0 5034 9 5 0 86 1 1 0 0 757 9 1012 32 56 21 2 5643 13 4 0 83 2 0 0 0 805 31 1250 37 52 10 0 6299 10 4 0 87 3 0 0 7 721 10 1119 27 50 23 0 6717 10 4 0 86 4 0 0 4 750 109 814 16 34 9 0 7093 8 3 0 89 5 0 0 674 616 110 707 11 31 3 0 7799 7 3 0 90 6 7 0 0 550 10 825 25 37 21 0 6478 11 3 0 85 7 0 0 0 613 11 1047 17 36 13 0 6037 9 3 0 88 March 4, 2026 at 01:12:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 1 0 0 11 0 1 0 99 1 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 301 0 0 0 100 3 0 0 7 16 5 40 2 0 0 0 1314 0 1 0 99 4 0 0 1 210 102 0 0 0 0 0 0 0 0 0 100 5 0 0 20 227 111 26 1 0 2 0 578 0 0 0 99 6 0 0 0 12 2 10 0 2 1 0 307 0 0 0 100 7 0 0 0 110 52 106 0 1 0 0 26 0 0 0 100 March 4, 2026 at 01:12:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2152 101 96 0 8 7 2 81 0 1 0 99 1 27 0 0 41 0 104 0 4 5 6 115 0 0 0 100 2 8 0 0 79 6 41 1 4 3 4 365 0 0 0 100 3 0 0 7 74 9 57 1 0 1 0 1424 0 1 0 99 4 3323 0 120 238 101 54 5 2 7 18 1247 4 2 0 94 5 136 0 16 331 110 149 1 10 10 11 754 0 1 0 99 6 44 0 0 53 2 57 2 6 10 8 447 0 0 0 100 7 17 0 3 146 50 153 0 5 14 4 140 0 0 0 100 March 4, 2026 at 01:12:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 102 150 1 13 183 0 0 0 2 0 98 1 0 0 0 49 0 100 1 18 222 0 0 0 1 0 99 2 0 0 0 76 3 125 0 14 245 0 301 0 1 0 99 3 0 0 7 165 92 180 7 14 255 0 1397 0 1 0 99 4 0 0 3 245 102 75 1 8 156 0 0 0 1 0 99 5 0 0 17 287 109 116 2 4 92 0 572 0 1 0 99 6 0 0 0 47 3 71 2 5 158 0 330 0 1 0 99 7 0 0 0 134 50 165 1 10 135 0 0 0 1 0 99 March 4, 2026 at 01:12:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 116 0 0 1 0 1 0 1 0 99 1 0 0 0 14 1 14 0 1 0 0 0 0 0 0 100 2 0 0 0 14 3 10 1 0 0 0 308 0 0 0 100 3 0 0 7 15 5 40 1 0 0 0 1397 0 0 0 100 4 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 5 0 0 17 225 111 22 0 0 0 0 896 0 0 0 99 6 0 0 0 9 1 6 0 0 0 0 314 0 0 0 100 7 0 0 0 107 50 104 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:12:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 128 0 0 0 0 17 0 1 0 99 1 0 0 0 12 1 6 0 1 0 0 0 0 1 0 99 2 0 0 0 17 2 18 0 1 0 0 301 0 0 0 100 3 0 0 7 16 5 40 2 0 1 0 1397 0 1 0 99 4 0 0 1 213 104 0 0 0 0 0 0 0 0 0 100 5 0 0 20 215 105 12 1 0 3 0 568 0 0 0 100 6 0 0 0 14 1 12 0 0 0 0 309 0 0 0 100 7 0 0 0 117 55 114 0 0 0 0 13 0 0 0 100 March 4, 2026 at 01:12:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 205 0 0 2295 104 340 6 15 3 0 1581 2 2 0 96 1 5 0 0 131 7 205 9 23 11 0 1597 3 1 0 96 2 1 0 0 146 4 198 15 16 0 0 1676 3 1 0 97 3 13 0 7 130 6 253 18 20 4 0 2705 3 1 0 96 4 0 0 3 302 103 201 5 21 0 0 1493 1 1 0 98 5 2 0 157 348 131 242 16 19 6 0 2107 4 1 0 95 6 550 0 0 148 2 281 26 21 14 1 2513 4 1 0 95 7 474 0 0 134 25 193 9 12 4 3 1693 3 1 0 96 March 4, 2026 at 01:12:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 110 0 0 0 0 0 0 1 0 99 1 0 0 0 13 1 8 0 0 0 0 3 0 0 0 100 2 0 0 0 13 3 8 0 1 3 0 302 0 0 0 100 3 0 0 7 19 6 42 2 0 1 0 1403 0 1 0 99 4 0 0 3 208 101 2 0 1 0 0 0 0 0 0 100 5 6 0 17 328 161 128 1 1 0 0 581 0 0 0 99 6 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:12:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2165 103 224 1 15 133 0 36 0 2 0 98 1 0 0 9 69 2 128 1 14 133 1 0 0 2 0 98 2 0 0 0 90 4 146 2 9 154 1 390 0 1 0 99 3 1 0 7 135 77 154 7 13 150 0 1341 0 1 0 99 4 0 0 7 262 106 94 0 9 149 0 3 0 1 0 99 5 0 0 21 390 162 246 2 14 165 0 619 0 1 0 98 6 0 0 21 62 1 112 1 10 168 0 299 0 1 0 99 7 0 0 0 73 1 126 0 9 143 0 85 0 1 0 99 March 4, 2026 at 01:12:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 110 0 0 0 0 0 0 1 0 99 1 0 0 0 11 0 4 0 0 0 0 0 0 1 0 99 2 0 0 0 12 2 6 0 0 0 0 301 0 0 0 100 3 0 0 7 16 5 40 1 0 1 0 1314 0 0 0 100 4 0 0 5 212 105 0 0 0 0 0 0 0 0 0 100 5 0 0 15 329 162 122 2 0 0 0 578 0 0 0 99 6 0 0 0 13 1 7 1 1 0 0 294 0 0 0 100 7 0 0 7 6 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:13:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 103 134 0 2 0 0 16 0 1 0 99 1 0 0 0 29 1 6 0 1 0 0 1 0 0 0 100 2 0 0 0 33 5 12 0 0 0 0 305 0 0 0 100 3 0 0 7 36 7 44 2 0 2 0 1316 0 0 0 99 4 0 0 7 235 108 4 0 0 0 0 2 0 0 0 100 5 0 0 21 345 161 126 1 0 0 0 576 0 0 0 99 6 0 0 112 19 2 15 0 0 0 0 300 0 0 0 100 7 0 0 0 29 0 8 0 0 1 0 7 0 0 0 100 March 4, 2026 at 01:13:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 1 2 0 0 0 1 0 99 1 0 0 0 17 0 12 0 1 0 0 0 0 0 0 100 2 0 0 0 11 2 4 1 0 0 0 301 0 0 0 100 3 0 0 7 22 8 46 1 0 1 0 1319 0 0 0 99 4 0 0 4 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 16 316 156 112 0 0 0 0 567 0 0 0 99 6 0 0 7 25 8 21 0 1 0 0 268 0 0 0 100 7 0 0 0 8 0 3 0 2 0 0 45 0 0 0 100 March 4, 2026 at 01:13:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2362 104 401 8 22 13 0 2026 5 2 0 93 1 0 0 0 257 0 326 15 22 9 0 2029 4 1 0 94 2 0 0 0 239 6 333 7 14 6 0 2826 3 1 0 96 3 0 0 7 229 7 279 9 15 3 0 2052 2 1 0 98 4 0 0 2 440 102 345 5 14 4 0 1480 2 1 0 97 5 0 0 214 438 151 345 10 18 2 0 2537 2 1 0 96 6 0 0 0 224 9 372 12 15 4 0 2348 4 1 0 95 7 0 0 0 190 3 341 9 11 3 0 2447 3 1 0 96 March 4, 2026 at 01:13:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2689 105 1023 26 73 175 0 5155 8 4 0 88 1 0 0 0 639 9 958 26 60 197 0 3101 6 3 0 91 2 8 0 0 516 7 743 35 48 252 0 3915 8 3 0 89 3 33 0 7 504 90 595 26 34 243 0 4260 9 3 0 88 4 1 0 17 728 138 773 13 37 208 0 4472 6 3 0 92 5 0 0 451 647 106 835 20 42 261 0 3978 5 3 0 92 6 0 0 0 459 2 798 22 37 308 0 5164 7 3 0 90 7 0 0 0 418 1 654 11 25 179 0 5589 5 2 0 92 March 4, 2026 at 01:13:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39 0 0 2157 102 144 1 6 10 5 408 0 1 0 99 1 9 0 0 40 0 22 0 2 6 4 51 0 0 0 100 2 4 0 0 46 6 28 1 3 4 1 344 0 0 0 100 3 0 0 7 55 11 40 1 3 1 0 307 0 0 0 100 4 3326 0 134 327 149 152 4 3 9 15 1536 3 2 0 95 5 132 0 4 274 106 119 6 11 21 23 497 0 1 0 99 6 33 0 2 46 1 98 1 8 18 8 1306 0 0 0 99 7 16 0 0 45 0 40 0 5 11 5 86 0 0 0 100 March 4, 2026 at 01:13:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 104 124 0 0 2 0 321 0 1 0 99 1 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 14 4 10 0 0 0 0 305 0 0 0 100 3 0 0 7 110 53 106 0 0 0 0 260 0 0 0 100 4 0 0 16 220 112 4 0 0 2 0 266 0 0 0 100 5 0 0 4 225 105 20 0 0 1 0 300 0 0 0 100 6 0 0 0 16 2 42 1 0 0 0 1142 0 0 0 100 7 0 0 0 8 0 4 1 0 0 0 7 0 0 0 100 March 4, 2026 at 01:13:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 114 0 1 0 0 316 0 1 0 99 1 0 0 0 9 0 6 0 1 0 0 3 0 0 0 100 2 0 0 0 22 8 18 0 0 0 0 313 0 0 0 100 3 0 0 7 112 53 108 0 0 0 0 260 0 0 0 100 4 0 0 16 221 110 12 1 1 1 0 303 0 0 0 99 5 0 0 4 225 106 18 0 0 0 0 302 0 0 0 100 6 0 0 0 10 2 34 1 0 1 0 1138 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:13:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 107 120 0 0 0 0 302 0 1 0 99 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 19 5 12 1 0 0 0 621 0 0 0 100 3 0 0 7 111 53 108 0 0 0 0 264 0 0 0 100 4 0 0 17 217 109 6 0 1 0 0 266 0 0 0 100 5 0 0 3 226 105 24 0 1 1 0 301 0 0 0 100 6 0 0 0 12 2 38 1 0 2 0 1142 0 0 0 99 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:13:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 45 0 0 2261 109 470 42 20 2 0 2206 3 2 0 95 1 3 0 0 159 3 217 12 22 2 0 1462 3 1 0 97 2 257 0 0 197 2 318 23 16 5 0 2042 3 1 0 96 3 70 0 7 212 51 198 10 16 2 1 1766 2 1 0 98 4 28 0 17 361 105 324 10 13 1 0 2152 3 1 0 96 5 60 0 143 280 106 135 10 14 4 0 1907 2 1 0 97 6 477 0 0 96 2 162 12 15 5 1 1870 4 1 0 95 7 108 0 0 100 0 202 5 17 5 2 2331 2 1 0 97 March 4, 2026 at 01:13:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2112 102 110 0 0 1 0 307 0 1 0 99 1 2 0 0 113 52 108 0 0 0 0 6 0 0 0 100 2 0 0 0 10 1 4 0 1 0 0 314 0 0 0 100 3 0 0 7 13 3 8 0 0 0 0 273 0 0 0 100 4 6 0 18 227 109 20 2 0 0 0 283 0 0 0 99 5 0 0 16 225 105 20 0 1 1 0 302 0 0 0 100 6 0 0 0 11 1 6 0 1 0 0 3 0 0 0 100 7 0 0 0 11 1 34 1 1 1 0 1144 0 0 0 99 March 4, 2026 at 01:13:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 104 130 1 1 0 0 307 0 1 0 99 1 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 2 0 0 0 16 5 12 0 0 0 0 306 0 0 0 100 3 0 0 7 19 7 16 0 0 0 0 266 0 0 0 100 4 0 0 19 227 114 18 0 0 0 0 273 0 0 0 100 5 0 0 1 226 105 22 0 0 0 0 304 0 0 0 100 6 0 0 0 15 2 12 0 0 0 0 6 0 0 0 100 7 0 0 0 13 1 38 2 1 0 0 1149 0 0 0 99 March 4, 2026 at 01:13:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 102 46 0 7 6 0 294 0 2 0 98 1 1 0 0 120 50 124 0 3 8 0 24 0 0 0 100 2 0 0 5 87 1 88 1 3 10 0 327 0 0 0 100 3 2 0 7 23 3 26 1 3 14 0 368 0 0 0 100 4 0 0 18 228 107 23 1 3 5 0 294 0 0 0 100 5 0 0 2 232 105 26 0 2 10 0 313 0 0 0 100 6 0 0 0 41 10 40 0 1 6 0 27 0 0 0 99 7 0 0 8 17 2 52 0 3 13 1 1153 0 1 0 99 March 4, 2026 at 01:13:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 19 1 2 2 0 294 0 1 0 99 1 0 0 0 111 50 108 0 1 1 0 0 0 0 0 100 2 0 0 0 118 3 111 1 2 0 0 304 0 0 0 100 3 0 0 14 12 3 8 0 1 0 0 260 0 0 0 100 4 0 0 16 210 102 4 0 0 0 0 266 0 0 0 100 5 0 0 4 220 105 10 1 0 0 0 301 0 0 0 100 6 0 0 0 22 8 16 0 0 0 0 10 0 0 0 100 7 0 0 0 9 1 32 1 0 3 0 1052 0 0 0 100 March 4, 2026 at 01:13:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2168 103 133 1 11 162 0 297 0 2 0 98 1 0 0 0 176 50 204 2 10 170 0 0 0 1 0 99 2 0 0 0 134 3 158 1 12 104 0 306 0 1 0 99 3 0 0 7 156 83 136 8 22 190 0 260 0 1 0 99 4 0 0 16 267 103 84 2 9 124 0 266 0 1 0 99 5 0 0 4 273 106 86 1 9 119 0 301 0 1 0 99 6 0 0 0 141 10 180 1 25 198 0 14 0 1 0 99 7 0 0 0 69 1 123 2 11 162 0 1053 0 1 0 99 March 4, 2026 at 01:13:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 104 12 0 0 0 0 295 0 1 0 99 1 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 2 0 0 0 21 4 14 0 0 0 0 304 0 0 0 100 3 0 0 7 14 4 10 0 1 0 0 260 0 0 0 100 4 0 0 17 210 102 4 0 0 0 0 266 0 0 0 100 5 0 0 3 213 104 6 0 0 0 0 301 0 0 0 100 6 0 0 0 118 6 112 0 0 0 0 7 0 0 0 100 7 0 0 0 9 1 32 2 0 0 0 1054 0 0 0 99 March 4, 2026 at 01:13:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2779 112 899 21 49 13 2 6288 14 5 0 81 1 0 0 0 755 21 1080 29 50 15 1 6397 12 4 0 83 2 1 0 0 717 7 1158 25 42 12 0 6274 9 4 0 88 3 22 0 7 699 9 1053 21 40 8 0 7045 8 3 0 89 4 3 0 17 854 115 966 20 32 9 0 5798 8 3 0 90 5 24 0 689 688 106 882 27 29 10 0 5929 9 4 0 87 6 17 0 0 590 15 861 29 29 6 0 6234 10 2 0 88 7 49 0 0 624 5 1057 24 29 8 0 6066 11 3 0 86 March 4, 2026 at 01:13:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 294 0 1 0 99 1 0 0 0 7 0 4 0 0 0 0 3 0 1 0 99 2 0 0 0 18 2 12 1 0 0 0 301 0 0 0 100 3 0 0 7 12 3 10 0 1 0 0 272 0 0 0 100 4 0 0 16 215 104 10 0 0 1 0 266 0 0 0 100 5 0 0 4 216 105 10 1 1 0 0 302 0 0 0 100 6 0 0 0 88 40 84 0 1 1 0 12 0 0 0 100 7 0 0 0 45 19 70 1 1 0 0 1053 0 0 0 100 March 4, 2026 at 01:13:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 112 0 1 0 0 294 0 1 0 99 1 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 17 5 10 0 0 0 0 304 0 0 0 100 3 0 0 7 11 3 8 0 0 0 0 270 0 0 0 100 4 0 0 18 214 105 8 1 0 0 0 266 0 0 0 100 5 0 0 2 212 104 6 0 0 0 0 301 0 0 0 100 6 0 0 0 16 5 8 1 0 0 0 5 0 0 0 100 7 0 0 0 110 52 134 1 0 1 0 1055 0 1 0 99 March 4, 2026 at 01:13:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 104 185 1 13 200 0 295 0 2 0 98 1 0 0 0 68 0 130 1 11 194 0 0 0 1 0 99 2 0 0 0 66 3 107 2 6 175 0 302 0 1 0 99 3 0 0 7 137 86 168 16 16 285 0 272 0 1 0 99 4 0 0 17 311 104 166 1 17 260 0 266 0 1 0 99 5 0 0 3 254 104 95 1 8 242 0 301 0 1 0 99 6 0 0 0 71 7 127 0 11 172 0 11 0 1 0 99 7 0 0 0 166 51 243 3 9 218 0 1056 0 1 0 99 March 4, 2026 at 01:13:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 152 167 1 1 2 0 299 0 1 0 99 1 0 0 0 11 0 12 0 2 1 0 0 0 0 0 100 2 0 0 0 19 6 14 0 0 0 0 306 0 0 0 100 3 0 0 7 13 4 10 0 0 0 0 270 0 0 0 100 4 0 0 17 265 103 60 0 0 0 0 268 0 0 0 100 5 0 0 3 213 104 8 0 0 0 0 302 0 0 0 100 6 0 0 0 21 7 14 1 0 0 0 327 0 0 0 100 7 0 0 0 9 1 32 2 0 0 0 1052 0 1 0 99 March 4, 2026 at 01:13:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 153 226 0 0 0 0 312 0 1 0 99 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 17 5 12 1 0 0 0 304 0 0 0 100 3 0 0 7 17 6 14 1 0 0 0 273 0 0 0 100 4 0 0 16 227 112 18 1 1 0 0 273 0 0 0 100 5 0 0 4 216 104 8 1 0 2 0 301 0 0 0 100 6 0 0 0 15 2 10 0 0 0 0 6 0 0 0 100 7 0 0 0 9 1 8 0 0 0 0 926 0 0 0 100 March 4, 2026 at 01:13:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 214 0 1 0 0 305 0 1 0 98 1 0 0 0 12 1 8 0 1 1 0 3 0 0 0 100 2 0 0 0 15 4 8 1 0 0 0 306 0 0 0 100 3 0 0 7 15 4 14 0 1 0 0 285 0 0 0 100 4 0 0 16 227 112 24 1 1 0 0 285 0 0 0 99 5 0 0 4 212 104 6 0 0 0 0 301 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 1 0 0 0 100 7 0 0 0 7 1 30 0 0 0 0 140 0 0 0 100 March 4, 2026 at 01:13:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 152 217 0 0 0 0 295 0 1 0 99 1 0 0 0 11 1 8 0 0 0 0 18 0 0 0 100 2 0 0 0 17 5 14 0 0 0 0 312 0 0 0 100 3 0 0 7 15 5 12 0 0 0 0 272 0 0 0 100 4 0 0 18 222 107 14 1 0 1 0 271 0 0 0 100 5 0 0 2 213 104 8 0 1 1 0 301 0 0 0 100 6 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 8 1 32 1 0 1 0 1054 0 0 0 100 March 4, 2026 at 01:13:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 151 216 1 0 0 0 299 0 1 0 99 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 18 4 16 0 1 2 0 306 0 0 0 100 3 0 0 7 16 5 14 0 0 0 0 270 0 0 0 100 4 0 0 19 225 110 20 0 0 1 0 591 0 0 0 99 5 0 0 1 212 104 6 0 0 0 0 301 0 0 0 100 6 0 0 0 12 2 10 0 0 0 0 6 0 0 0 100 7 0 0 0 10 1 36 1 0 0 0 1055 0 0 0 100 March 4, 2026 at 01:13:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 151 213 0 2 0 0 294 0 1 0 99 1 0 0 0 11 1 6 0 1 0 0 0 0 0 0 100 2 0 0 0 10 2 4 1 0 0 0 301 0 0 0 100 3 0 0 7 15 5 12 1 0 0 0 272 0 0 0 100 4 0 0 16 210 104 4 0 0 0 0 266 0 0 0 100 5 0 0 4 213 104 6 1 0 0 0 301 0 0 0 100 6 0 0 0 20 6 12 1 0 0 0 6 0 0 0 100 7 0 0 0 9 1 34 1 1 4 0 1054 0 0 0 99 March 4, 2026 at 01:13:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 153 150 0 1 0 0 306 0 1 0 99 1 0 0 0 13 1 12 0 1 1 0 0 0 0 0 100 2 0 0 0 14 4 10 0 0 0 0 303 0 0 0 100 3 0 0 7 86 4 84 0 2 1 0 270 0 0 0 100 4 0 0 16 214 106 4 1 0 0 0 266 0 0 0 100 5 23 0 4 217 105 12 0 0 0 0 306 0 0 0 100 6 1 0 0 21 5 18 0 0 0 0 15 0 0 0 100 7 0 0 0 11 1 36 2 0 1 0 1057 0 0 0 99 March 4, 2026 at 01:13:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 152 183 0 1 0 0 295 0 1 0 99 1 0 0 0 12 1 8 0 0 0 0 3 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 302 0 0 0 100 3 0 0 7 46 5 40 0 0 0 0 272 0 0 0 100 4 0 0 17 217 110 6 0 1 0 0 266 0 0 0 100 5 0 0 3 215 105 10 0 1 0 0 302 0 0 0 100 6 0 0 0 18 6 14 0 0 0 0 10 0 0 0 100 7 0 0 0 7 1 32 0 0 3 0 1048 0 0 0 100 March 4, 2026 at 01:13:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 152 217 1 1 0 0 300 0 1 0 99 1 0 0 0 12 1 6 0 0 2 0 0 0 0 0 100 2 0 0 0 20 5 18 0 1 0 0 304 0 0 0 100 3 0 0 7 12 3 8 1 0 0 0 270 0 0 0 100 4 0 0 16 215 107 8 0 0 0 0 268 0 0 0 100 5 0 0 4 215 105 9 0 1 0 0 301 0 0 0 100 6 0 0 0 21 7 14 1 0 0 0 326 0 0 0 100 7 0 0 0 11 2 34 2 0 1 0 1049 0 1 0 99 March 4, 2026 at 01:13:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 212 0 2 0 0 294 0 1 0 99 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 19 4 16 1 0 2 0 304 0 0 0 100 3 0 0 7 22 5 24 1 1 1 0 272 0 0 0 100 4 0 0 16 226 111 20 1 0 1 0 276 0 0 0 100 5 0 0 4 217 105 10 1 1 1 0 302 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 9 1 36 0 0 0 0 1051 0 0 0 100 March 4, 2026 at 01:13:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 152 212 0 0 0 0 294 0 1 0 99 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 14 4 10 0 1 0 0 306 0 0 0 100 3 0 0 7 11 3 8 0 0 0 0 270 0 0 0 100 4 0 0 17 219 108 12 1 0 0 0 271 0 0 0 100 5 0 0 3 212 104 6 0 0 0 0 301 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 32 1 0 1 0 1048 0 0 0 99 March 4, 2026 at 01:13:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 155 226 1 0 1 0 310 0 1 0 99 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 20 7 16 0 0 0 0 305 0 0 0 100 3 0 0 7 18 5 16 0 1 1 0 284 0 0 0 100 4 0 0 16 228 113 16 1 1 1 0 278 0 0 0 100 5 0 0 4 216 104 12 0 2 3 0 301 0 0 0 100 6 0 0 0 13 1 10 0 0 0 0 6 0 0 0 100 7 0 0 0 11 1 36 2 0 0 0 1053 0 0 0 100 March 4, 2026 at 01:13:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2208 151 237 1 5 2 3 354 0 2 0 98 1 20 0 0 47 1 17 0 3 2 1 44 0 0 0 100 2 0 0 0 45 5 24 0 2 2 0 350 0 0 0 100 3 3335 0 125 32 3 69 5 3 13 13 1543 3 2 0 95 4 113 0 16 275 111 105 1 10 9 14 487 0 1 0 99 5 21 0 4 254 104 69 0 7 13 6 442 0 0 0 99 6 47 0 0 49 4 60 0 6 5 5 450 0 0 0 99 7 19 0 3 40 2 132 1 5 7 6 1177 0 0 0 99 March 4, 2026 at 01:13:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 152 215 0 0 0 0 294 0 1 0 99 1 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 2 0 0 0 13 3 8 1 1 0 0 302 0 0 0 100 3 0 0 7 13 4 10 1 0 0 0 272 0 0 0 100 4 0 0 16 226 113 14 0 0 0 0 272 0 0 0 100 5 0 0 4 213 104 6 1 0 0 0 301 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 32 1 0 0 0 1134 0 0 0 100 March 4, 2026 at 01:13:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 212 0 0 0 0 294 0 1 0 99 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 13 3 10 0 0 0 0 301 0 0 0 100 3 0 0 7 15 4 12 0 0 0 0 270 0 0 0 100 4 0 0 17 228 115 18 1 0 0 0 276 0 0 0 100 5 0 0 3 212 104 6 0 0 0 0 301 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 13 1 40 1 2 4 0 1135 0 0 0 99 March 4, 2026 at 01:13:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 151 222 0 1 3 0 294 0 1 0 99 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 302 0 0 0 100 3 0 0 7 13 4 10 0 0 0 0 272 0 0 0 100 4 0 0 17 223 112 12 1 0 0 0 271 0 0 0 100 5 0 0 3 212 104 6 0 0 0 0 301 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 34 1 0 4 0 1131 0 0 0 99 March 4, 2026 at 01:13:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 153 228 1 2 0 0 306 0 1 0 99 1 0 0 0 11 1 4 0 1 0 0 0 0 1 0 99 2 0 0 0 14 3 10 0 0 0 0 301 0 0 0 100 3 0 0 7 11 3 8 0 0 0 0 270 0 0 0 100 4 0 0 15 227 114 18 0 0 0 0 595 0 0 0 99 5 0 0 5 215 104 10 0 0 0 0 301 0 0 0 100 6 0 0 0 11 0 12 0 0 0 0 12 0 0 0 100 7 0 0 0 10 1 36 1 0 2 0 1138 0 0 0 99 March 4, 2026 at 01:13:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 152 216 0 1 1 0 305 0 1 0 99 1 0 0 0 14 0 10 0 1 1 0 3 0 0 0 100 2 0 0 0 13 3 8 1 1 0 0 301 0 0 0 100 3 0 0 7 13 4 10 1 0 0 0 272 0 0 0 100 4 0 0 18 210 104 4 0 0 0 0 266 0 0 0 100 5 0 0 2 215 105 8 1 0 0 0 302 0 0 0 100 6 0 0 0 21 7 16 1 0 0 0 11 0 0 0 100 7 0 0 0 10 2 34 1 0 2 0 1136 0 0 0 99 March 4, 2026 at 01:13:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 152 212 0 0 0 0 294 0 1 0 99 1 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 19 6 14 0 0 3 0 305 0 0 0 100 3 0 0 7 12 3 10 0 1 0 0 270 0 0 0 100 4 0 0 15 212 104 8 1 1 0 0 266 0 0 0 100 5 0 0 5 213 104 8 0 0 0 0 302 0 0 0 100 6 0 0 0 15 5 8 0 0 0 0 5 0 0 0 100 7 0 0 0 11 2 34 2 0 1 0 1132 0 0 0 99 March 4, 2026 at 01:13:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 152 138 0 1 0 0 294 0 1 0 99 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 86 3 85 0 1 1 0 301 0 0 0 100 3 0 0 7 18 5 14 1 0 0 0 272 0 0 0 100 4 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 5 0 0 3 212 104 6 0 0 0 0 301 0 0 0 100 6 0 0 0 24 8 18 1 0 0 0 37 0 0 0 100 7 0 0 0 9 1 34 1 0 0 0 1134 0 0 0 99 March 4, 2026 at 01:13:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 152 130 1 3 0 0 299 0 1 0 99 1 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 101 3 92 0 3 0 0 301 0 0 0 100 3 0 0 7 12 3 10 0 1 0 0 270 0 0 0 100 4 0 0 16 214 104 10 0 1 0 0 268 0 0 0 100 5 0 0 4 215 104 12 0 1 0 0 301 0 0 0 100 6 0 0 0 23 8 16 1 0 0 0 330 0 0 0 100 7 0 0 0 8 1 32 1 0 0 0 1131 0 0 0 99 March 4, 2026 at 01:13:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 152 206 0 1 0 0 299 0 1 0 99 1 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 35 5 28 1 0 0 0 304 0 0 0 100 3 0 0 7 17 6 14 0 0 0 0 273 0 0 0 100 4 0 0 17 228 115 16 1 0 0 0 273 0 0 0 100 5 0 0 3 218 104 12 1 0 2 0 301 0 0 0 100 6 0 0 0 18 3 22 0 1 0 0 13 0 0 0 100 7 0 0 0 10 1 36 1 0 1 0 1139 0 0 0 100 March 4, 2026 at 01:13:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 67 0 0 2260 121 473 2 16 0 0 1749 1 2 0 97 1 3 0 0 121 3 122 3 13 1 0 1339 2 0 0 98 2 0 0 0 80 3 158 7 16 0 0 1604 1 0 0 98 3 189 0 7 89 4 154 13 17 8 1 1632 2 1 0 97 4 10 0 17 347 141 149 10 12 9 0 1602 5 1 0 94 5 228 0 143 277 104 173 23 14 2 0 2273 4 1 0 95 6 322 0 0 117 1 218 23 18 9 1 1564 2 1 0 97 7 337 0 0 97 2 179 23 18 4 1 2752 3 1 0 95 March 4, 2026 at 01:13:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 100 0 2 1 0 294 0 1 0 99 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 303 0 0 0 100 3 0 0 7 31 5 25 0 2 0 0 262 0 0 0 100 4 5 0 18 310 152 104 0 0 0 0 268 0 0 0 100 5 0 0 2 222 109 16 0 0 0 0 311 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 36 2 1 3 0 1144 0 1 0 99 March 4, 2026 at 01:13:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 103 214 3 16 181 0 329 0 2 0 98 1 0 0 0 88 0 140 1 12 107 1 157 0 1 0 99 2 0 0 8 60 2 108 1 19 209 0 308 0 1 0 98 3 0 0 7 132 83 101 6 16 178 0 288 0 1 0 99 4 0 0 16 359 153 200 1 11 123 0 280 0 1 0 99 5 0 0 18 274 110 116 1 8 133 0 331 0 1 0 99 6 0 0 7 72 5 138 0 16 143 0 17 0 1 0 99 7 0 0 0 50 1 101 3 8 158 0 1143 0 1 0 99 March 4, 2026 at 01:13:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 14 0 1 0 0 294 0 1 0 99 1 0 0 0 109 0 104 0 0 0 0 0 0 0 0 100 2 0 0 0 16 3 8 1 1 0 0 301 0 0 0 100 3 0 0 7 15 4 8 0 0 0 0 262 0 0 0 100 4 0 0 16 308 152 104 0 0 0 0 266 0 0 0 100 5 0 0 4 214 103 7 1 1 0 0 301 0 0 0 100 6 0 0 0 22 7 16 0 0 0 0 6 0 0 0 100 7 0 0 7 9 1 34 1 1 1 0 1057 0 0 0 100 March 4, 2026 at 01:13:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 104 52 0 2 0 0 301 0 1 0 99 1 0 0 0 106 0 86 0 1 0 0 0 0 0 0 100 2 0 0 0 28 3 8 0 0 0 0 301 0 0 0 100 3 0 0 7 26 3 6 1 0 0 0 260 0 0 0 100 4 0 0 18 326 155 104 1 0 0 0 266 0 0 0 100 5 0 0 114 215 103 11 0 0 0 0 301 0 1 0 99 6 0 0 0 46 10 28 0 0 0 0 20 0 0 0 100 7 0 0 0 29 1 38 2 0 0 0 1059 0 0 0 99 March 4, 2026 at 01:13:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 49 0 2 0 0 301 0 1 0 99 1 0 0 0 12 0 6 0 1 1 0 0 0 0 0 100 2 0 0 0 16 3 14 0 1 1 0 304 0 0 0 100 3 0 0 7 84 4 79 0 3 2 0 262 0 0 0 100 4 0 0 17 308 152 104 0 0 0 0 266 0 0 0 100 5 0 0 10 215 104 10 0 0 0 0 303 0 0 0 100 6 0 0 0 32 12 24 0 0 0 0 18 0 0 0 100 7 0 0 0 9 1 32 1 0 1 0 1053 0 0 0 100 March 4, 2026 at 01:13:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 2337 106 334 16 28 12 0 3103 6 3 0 91 1 3 0 0 283 0 428 16 26 7 0 2226 5 2 0 94 2 1 0 0 301 4 399 11 23 11 0 2003 6 1 0 92 3 9 0 7 374 2 475 11 20 5 0 3003 4 2 0 94 4 55 0 17 476 148 303 6 9 2 0 3179 4 1 0 95 5 13 0 255 403 107 336 14 20 3 0 2328 2 1 0 96 6 0 0 0 277 9 433 11 17 7 0 3657 3 1 0 96 7 0 0 0 301 2 525 17 14 7 0 2654 3 2 0 96 March 4, 2026 at 01:13:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2549 107 597 16 48 221 0 4795 7 4 0 89 1 0 0 0 509 5 726 24 44 245 0 4118 8 3 0 89 2 0 0 0 542 17 783 21 48 190 0 3308 5 3 0 93 3 0 0 7 724 117 1022 35 48 187 0 3618 6 3 0 91 4 4 0 18 612 105 578 12 24 216 0 4429 6 2 0 91 5 0 0 422 591 107 726 19 37 249 0 2855 5 3 0 92 6 2 0 0 375 3 552 10 40 258 1 4452 7 2 0 90 7 0 0 0 479 5 831 13 49 215 0 4867 5 3 0 92 March 4, 2026 at 01:13:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 100 0 1 0 0 0 0 1 0 99 1 0 0 0 12 2 8 0 0 0 0 294 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 7 117 55 112 1 0 1 0 565 0 0 0 100 4 0 0 16 213 103 12 1 1 0 0 286 0 0 0 100 5 0 0 4 216 106 10 0 0 0 0 13 0 0 0 100 6 0 0 0 17 2 12 0 0 0 0 301 0 0 0 100 7 0 0 0 14 2 36 1 0 1 0 1053 0 0 0 100 March 4, 2026 at 01:13:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 110 0 0 0 0 5 0 1 0 99 1 0 0 0 12 2 8 0 1 0 0 294 0 0 0 100 2 0 0 0 18 5 15 0 1 0 0 3 0 0 0 100 3 0 0 7 115 55 110 0 0 0 0 564 0 0 0 100 4 0 0 17 216 106 8 0 0 0 0 277 0 0 0 100 5 0 0 3 219 106 14 0 0 0 0 5 0 0 0 100 6 0 0 0 27 5 26 0 0 0 0 315 0 0 0 100 7 0 0 0 12 2 38 1 0 0 0 1060 0 0 0 100 March 4, 2026 at 01:13:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 106 0 1 0 0 12 0 1 0 99 1 0 0 0 15 2 10 1 1 0 0 294 0 0 0 100 2 0 0 0 10 2 6 0 1 0 0 3 0 0 0 100 3 0 0 7 116 56 112 0 0 0 0 567 0 0 0 100 4 0 0 16 214 104 10 0 0 2 0 279 0 0 0 100 5 0 0 4 229 111 24 0 1 1 0 15 0 0 0 100 6 0 0 0 20 3 16 0 1 0 0 302 0 0 0 100 7 1 0 0 14 4 38 1 0 2 0 1080 0 0 0 99 March 4, 2026 at 01:13:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 16 3 16 0 0 0 0 317 0 0 0 100 2 0 0 0 15 3 12 0 0 0 0 10 0 0 0 100 3 0 0 7 114 54 110 0 1 0 0 563 0 0 0 100 4 0 0 18 209 103 4 0 0 0 0 266 0 0 0 100 5 0 0 2 217 106 8 0 0 0 0 323 0 0 0 100 6 0 0 0 20 2 14 1 0 0 0 301 0 0 0 100 7 0 0 0 22 4 50 2 1 1 0 1056 0 1 0 99 March 4, 2026 at 01:13:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 104 0 0 0 0 0 0 1 0 99 1 0 0 0 16 3 12 0 2 0 0 294 0 0 0 100 2 0 0 0 13 1 10 0 0 3 0 0 0 0 0 100 3 0 0 7 115 55 110 1 0 0 0 562 0 0 0 100 4 0 0 16 219 110 10 1 0 0 0 300 0 0 0 100 5 0 0 4 210 102 6 0 0 2 0 4 0 0 0 100 6 0 0 0 14 2 10 0 1 0 0 301 0 0 0 100 7 0 0 0 27 10 54 0 0 0 0 1068 0 0 0 99 March 4, 2026 at 01:13:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 108 0 1 1 0 0 0 1 0 99 1 0 0 0 18 2 14 0 0 0 0 294 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 7 112 54 108 1 0 0 0 564 0 0 0 100 4 0 0 18 213 106 6 0 0 0 0 276 0 0 0 100 5 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 7 0 0 0 21 6 44 2 0 2 0 1057 0 0 0 99 March 4, 2026 at 01:13:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 0 1 0 5 0 1 0 99 1 0 0 0 19 2 18 1 3 1 0 294 0 0 0 99 2 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 3 0 0 7 120 58 116 0 0 0 0 569 0 0 0 100 4 0 0 15 215 106 6 0 0 0 0 276 0 0 0 100 5 0 0 5 212 102 8 0 1 4 0 1 0 0 0 100 6 0 0 0 23 5 22 0 2 0 0 316 0 0 0 100 7 0 0 0 20 6 46 1 0 2 0 1066 0 0 0 99 March 4, 2026 at 01:13:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 1 0 0 0 0 1 0 99 1 0 0 0 18 3 14 0 1 0 0 299 0 0 0 99 2 0 0 0 9 1 6 0 1 0 0 3 0 0 0 100 3 0 0 7 114 54 110 0 0 0 0 564 0 0 0 100 4 0 0 17 217 106 174 0 0 0 0 612 0 0 0 100 5 0 0 3 221 107 20 0 0 0 0 13 0 0 0 100 6 0 0 0 15 2 6 1 0 0 0 301 0 0 0 100 7 0 0 0 22 7 44 2 0 0 0 1375 0 0 0 99 March 4, 2026 at 01:13:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 16 2 8 0 1 1 0 294 0 0 0 100 2 0 0 0 13 3 10 0 3 0 0 1 0 0 0 100 3 0 0 7 115 55 112 0 1 0 0 566 0 0 0 100 4 0 0 17 211 103 6 1 0 0 0 276 0 0 0 100 5 0 0 3 220 108 12 0 0 0 0 7 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 7 0 0 0 13 3 40 1 1 0 0 1057 0 0 0 99 March 4, 2026 at 01:13:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 110 0 0 3 0 0 0 1 0 99 1 22 0 0 14 3 8 0 0 0 0 299 0 0 0 99 2 0 0 0 16 3 14 0 0 0 0 5 0 0 0 100 3 0 0 7 119 56 114 2 0 0 0 567 0 0 0 100 4 0 0 17 221 109 16 0 1 3 0 288 0 0 0 100 5 0 0 3 217 106 12 0 0 2 0 13 0 0 0 100 6 0 0 0 10 2 6 0 0 4 0 301 0 0 0 100 7 0 0 0 14 3 38 2 0 1 0 1053 0 0 0 99 March 4, 2026 at 01:13:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 2145 100 184 0 5 6 4 109 0 1 0 98 1 5 0 0 68 2 22 1 1 1 3 334 0 0 0 99 2 0 0 0 62 2 14 0 2 2 0 0 0 0 0 100 3 21 0 7 149 56 125 2 2 2 0 620 0 0 0 99 4 3324 0 133 236 107 61 4 2 8 13 1544 3 2 0 95 5 159 0 4 264 106 90 1 7 11 11 176 0 0 0 99 6 17 0 0 46 3 118 0 7 10 8 452 0 0 0 100 7 25 0 2 46 2 77 0 8 6 7 1197 0 0 0 99 March 4, 2026 at 01:14:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 116 0 0 0 0 5 0 1 0 99 1 0 0 0 14 2 10 0 0 0 0 299 0 0 0 100 2 0 0 0 18 5 14 0 0 0 0 3 0 0 0 100 3 0 0 7 116 55 112 0 0 0 0 564 0 0 0 100 4 0 0 16 225 114 10 0 1 1 0 277 0 0 0 100 5 0 0 4 225 107 22 0 1 2 0 327 0 0 0 100 6 2 0 0 21 5 18 1 0 0 0 315 0 0 0 100 7 0 0 0 18 4 46 1 0 1 0 1145 0 0 0 99 March 4, 2026 at 01:14:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 109 0 1 0 0 1 0 1 0 99 1 0 0 0 13 2 8 0 1 0 0 294 0 0 0 100 2 0 0 0 12 2 8 0 0 0 0 3 0 0 0 100 3 0 0 7 110 53 106 0 0 0 0 561 0 0 0 100 4 0 0 17 215 106 8 1 0 0 0 279 0 0 0 100 5 0 0 3 210 102 4 0 0 2 0 0 0 0 0 100 6 0 0 0 10 2 6 0 1 0 0 301 0 0 0 100 7 0 0 0 32 11 58 2 1 1 0 1147 0 1 0 99 March 4, 2026 at 01:14:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 46 0 2 0 0 0 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 2 0 0 0 80 3 74 0 1 1 0 1 0 0 0 100 3 0 0 7 113 54 108 1 0 0 0 563 0 0 0 100 4 0 0 15 211 104 6 0 0 0 0 276 0 0 0 100 5 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 7 0 0 0 20 7 42 1 0 2 0 1136 0 0 0 99 March 4, 2026 at 01:14:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 311 0 0 2180 104 247 8 13 4 0 1540 3 2 0 95 1 3 0 0 64 2 83 4 10 0 0 1248 4 0 0 96 2 1 0 0 86 2 95 10 15 0 0 1126 3 0 0 97 3 0 0 7 175 54 193 5 10 2 0 1905 2 1 0 98 4 133 0 18 274 104 124 8 11 1 0 1904 2 1 0 97 5 52 0 142 258 102 189 5 19 2 0 1152 1 1 0 98 6 91 0 0 85 3 130 9 16 0 0 2213 4 1 0 96 7 40 0 0 74 5 185 4 13 3 0 2379 2 1 0 98 March 4, 2026 at 01:14:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 63 0 4 1 0 1 0 1 0 99 1 0 0 0 28 3 28 0 2 1 0 308 0 0 0 100 2 1 0 0 66 2 56 0 0 2 0 14 0 0 0 100 3 0 0 7 125 57 120 1 1 0 0 577 0 0 0 100 4 4 0 16 215 105 6 1 0 5 0 282 0 0 0 100 5 0 0 18 230 110 24 1 1 0 0 50 0 0 0 99 6 0 0 0 16 3 8 1 0 0 0 306 0 0 0 100 7 0 0 0 14 2 36 2 1 1 0 1148 0 0 0 99 March 4, 2026 at 01:14:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 116 0 0 0 0 5 0 1 0 99 1 0 0 0 12 2 6 0 1 0 0 294 0 0 0 100 2 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 3 0 0 7 112 54 108 0 0 0 0 561 0 0 0 100 4 0 0 16 213 105 4 1 0 0 0 266 0 0 0 100 5 0 0 4 225 109 20 0 0 0 0 7 0 0 0 100 6 0 0 0 18 4 18 0 0 1 0 317 0 0 0 100 7 0 0 0 12 2 38 1 0 1 0 1150 0 0 0 100 March 4, 2026 at 01:14:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 1 0 0 11 0 1 0 99 1 0 0 0 14 1 8 0 1 0 0 294 0 0 0 100 2 0 0 0 13 2 8 0 1 1 0 3 0 0 0 100 3 0 0 7 116 55 112 1 1 0 0 562 0 0 0 100 4 1 0 15 211 103 6 1 0 0 0 310 0 0 0 99 5 0 0 5 233 113 26 0 0 0 0 20 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 7 0 0 0 13 3 36 2 0 1 0 1148 0 0 0 99 March 4, 2026 at 01:14:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 108 0 2 0 0 0 0 1 0 99 1 0 0 0 13 1 6 1 1 0 0 294 0 0 0 100 2 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 3 0 0 7 116 55 112 0 3 1 0 562 0 0 0 100 4 0 0 17 210 104 4 0 0 0 0 266 0 0 0 100 5 0 0 3 221 108 14 1 0 0 0 7 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 11 3 36 0 0 2 0 1145 0 1 0 99 March 4, 2026 at 01:14:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 101 179 3 9 109 0 31 0 2 0 98 1 0 0 14 64 2 107 1 16 113 1 379 0 1 0 99 2 0 0 0 69 7 127 2 19 176 1 82 0 1 0 99 3 0 0 16 243 132 214 2 9 133 0 576 0 1 0 99 4 0 0 19 252 103 84 0 7 194 0 289 0 1 0 99 5 0 0 1 263 105 106 1 11 133 0 40 0 1 0 99 6 0 0 0 105 2 177 1 20 161 0 313 0 1 0 99 7 0 0 7 53 3 105 4 9 112 0 1142 0 2 0 98 March 4, 2026 at 01:14:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 1 0 0 0 0 1 0 99 1 0 0 0 15 2 9 0 2 0 0 294 0 0 0 100 2 0 0 0 24 9 18 0 0 0 0 10 0 0 0 100 3 0 0 7 121 54 112 1 1 2 0 562 0 0 0 100 4 0 0 25 215 104 14 0 2 0 0 266 0 0 0 100 5 0 0 2 212 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 301 0 0 0 100 7 0 0 0 10 1 32 0 0 1 0 1057 0 0 0 99 March 4, 2026 at 01:14:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 100 118 0 2 0 0 5 0 1 0 99 1 0 0 112 14 2 9 0 0 0 0 294 0 0 0 100 2 0 0 0 46 11 24 0 1 0 0 9 0 0 0 100 3 0 0 7 136 58 116 1 0 0 0 565 0 0 0 100 4 0 0 17 237 108 10 1 0 0 0 267 0 0 0 100 5 0 0 3 231 102 14 0 2 2 0 0 0 0 0 100 6 0 0 0 35 5 18 0 0 0 0 315 0 0 0 100 7 1 0 0 26 1 36 1 0 0 0 1061 0 0 0 99 March 4, 2026 at 01:14:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 112 0 0 0 0 1 0 1 0 99 1 0 0 7 15 2 8 1 0 0 0 294 0 0 0 100 2 0 0 0 32 11 26 1 1 0 0 15 0 0 0 100 3 0 0 7 116 55 112 0 1 0 0 566 0 0 0 100 4 0 0 17 211 103 6 0 0 0 0 269 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 12 2 34 2 0 0 0 1075 0 0 0 99 March 4, 2026 at 01:14:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2849 103 1226 45 55 10 0 6507 12 5 0 83 1 0 0 0 772 5 1197 42 55 17 0 7793 12 4 0 84 2 0 0 0 762 12 1157 37 53 20 1 5722 10 4 0 87 3 0 0 7 753 30 929 17 38 9 0 5636 10 3 0 87 4 0 0 16 886 108 1067 26 43 12 0 6670 10 4 0 87 5 0 0 661 803 107 1040 6 30 13 0 5226 8 4 0 88 6 0 0 0 511 4 734 18 28 21 0 5339 10 3 0 87 7 1 0 0 450 16 645 13 26 5 0 7197 7 2 0 90 March 4, 2026 at 01:14:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 102 118 1 17 257 0 0 0 2 0 98 1 0 0 1 70 2 141 2 23 219 0 294 0 1 0 99 2 0 0 0 71 5 125 2 13 184 0 5 0 1 0 99 3 0 0 7 139 97 109 5 8 221 0 561 0 1 0 99 4 0 0 19 289 103 147 0 18 250 0 276 0 1 0 99 5 0 0 1 325 105 186 2 22 298 0 3 0 1 0 99 6 0 0 0 60 3 108 1 9 128 0 302 0 1 0 99 7 0 0 0 155 51 235 2 11 173 0 1055 0 1 0 99 March 4, 2026 at 01:14:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 62 0 2 0 0 0 0 1 0 99 1 0 0 0 13 3 8 0 0 0 0 294 0 0 0 100 2 0 0 0 17 6 12 0 0 0 0 5 0 0 0 100 3 0 0 7 11 3 6 2 0 0 0 561 0 0 0 100 4 0 0 15 211 103 6 1 0 0 0 278 0 0 0 100 5 0 0 5 262 105 55 0 1 0 0 5 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 301 0 0 0 100 7 0 0 0 109 51 132 2 0 2 0 1054 0 0 0 99 March 4, 2026 at 01:14:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 135 190 0 2 0 0 5 0 1 0 99 1 0 0 0 15 3 8 1 1 0 0 294 0 0 0 100 2 0 0 0 19 6 16 0 1 0 0 5 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 561 0 0 0 100 4 0 0 19 212 104 4 0 0 0 0 276 0 0 0 100 5 0 0 1 217 104 10 0 0 0 0 1 0 0 0 100 6 0 0 0 20 4 20 0 0 0 0 317 0 0 0 100 7 0 0 0 39 16 64 0 0 1 0 1061 0 0 0 100 March 4, 2026 at 01:14:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 1 2201 150 266 0 8 9 10 152 0 1 0 98 1 48 0 0 52 2 53 0 7 10 4 423 0 1 0 99 2 10 0 0 64 11 72 0 6 10 4 450 0 0 0 99 3 5 0 7 38 3 20 0 2 5 1 604 0 0 0 100 4 6 0 16 236 104 25 0 2 4 1 330 0 0 0 100 5 0 0 4 242 106 22 0 0 0 0 26 0 0 0 100 6 3321 0 115 46 3 58 6 1 8 12 1553 4 2 0 94 7 123 0 0 61 1 116 1 9 7 18 1236 0 1 0 99 March 4, 2026 at 01:14:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 150 207 0 1 0 0 0 0 1 0 99 1 0 0 0 12 2 6 0 0 0 0 294 0 0 0 99 2 0 0 0 14 4 9 0 1 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 562 0 0 0 100 4 0 0 17 217 107 12 0 0 0 0 272 0 0 0 100 5 0 0 3 211 103 6 0 1 0 0 10 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 301 0 0 0 100 7 0 0 0 12 3 36 1 0 2 0 1141 0 0 0 100 March 4, 2026 at 01:14:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 761 0 0 2262 118 383 27 45 195 0 1398 3 3 0 94 1 158 0 0 189 4 519 15 40 178 2 1996 2 2 0 96 2 43 0 0 156 3 395 8 26 188 0 1373 3 1 0 96 3 112 0 7 217 82 266 12 26 141 1 1923 2 1 0 96 4 0 0 17 305 106 215 6 11 120 0 1460 2 1 0 97 5 0 0 115 355 104 341 21 20 148 0 1060 4 1 0 95 6 36 0 0 258 31 485 5 27 172 0 1687 1 1 0 98 7 27 0 0 124 6 301 6 23 134 0 2646 3 2 0 95 March 4, 2026 at 01:14:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 110 0 0 0 0 0 0 1 0 99 1 0 0 0 12 2 6 0 0 0 0 294 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 562 0 0 0 100 4 4 0 17 215 106 4 0 0 0 0 268 0 0 0 100 5 0 0 3 215 104 12 0 1 0 0 1 0 0 0 100 6 0 0 0 111 52 106 0 0 0 0 301 0 0 0 100 7 0 0 0 19 7 44 0 0 0 0 1152 0 0 0 99 March 4, 2026 at 01:14:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 102 118 1 2 11 2 152 0 1 0 99 1 0 0 0 22 2 28 1 7 12 0 324 0 1 0 99 2 0 0 0 54 8 56 0 6 7 0 33 0 0 0 100 3 0 0 7 21 4 17 1 4 11 0 561 0 0 0 100 4 0 0 32 227 110 20 0 5 4 0 284 0 1 0 99 5 0 0 9 227 103 27 3 2 1 0 38 0 0 0 100 6 0 0 0 130 55 126 1 1 4 0 316 0 0 0 100 7 0 0 8 33 7 76 1 1 14 0 1177 0 1 0 98 March 4, 2026 at 01:14:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 14 0 2 0 0 11 0 1 0 99 1 0 0 0 13 2 6 1 0 0 0 295 0 0 0 100 2 0 0 0 125 9 118 0 0 0 0 10 0 0 0 100 3 0 0 7 13 3 10 0 1 0 0 564 0 0 0 100 4 0 0 15 214 106 5 0 2 0 0 266 0 0 0 100 5 0 0 5 216 103 8 0 0 1 0 0 0 0 0 100 6 0 0 7 113 52 110 0 2 0 0 301 0 0 0 100 7 0 0 0 12 2 36 1 1 2 0 1061 0 0 0 100 March 4, 2026 at 01:14:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 101 94 0 2 2 0 0 0 1 0 99 1 0 0 0 31 2 12 0 0 0 0 312 0 0 0 100 2 0 0 0 72 9 50 0 0 0 0 20 0 0 0 100 3 0 0 7 29 4 8 0 0 0 0 561 0 0 0 100 4 0 0 127 215 104 9 1 0 0 0 269 0 1 0 99 5 0 0 5 236 107 12 0 0 0 0 8 0 0 0 100 6 0 0 0 130 52 108 0 0 0 0 301 0 0 0 100 7 0 0 7 28 1 36 2 1 4 0 1052 0 0 0 99 March 4, 2026 at 01:14:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 115 0 2 1 0 0 0 1 0 99 1 0 0 0 14 2 8 0 0 0 0 294 0 0 0 100 2 0 0 0 30 10 26 0 0 3 0 14 0 0 0 100 3 0 0 7 14 4 9 1 1 0 0 562 0 0 0 100 4 0 0 23 211 103 4 0 0 0 0 266 0 0 0 100 5 0 0 4 214 104 8 0 0 0 0 1 0 0 0 100 6 0 0 0 114 53 108 0 0 0 0 327 0 0 0 100 7 0 0 0 12 1 38 0 1 1 0 1054 0 0 0 99 March 4, 2026 at 01:14:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 2427 103 610 16 23 4 0 3096 5 3 0 92 1 1 0 0 418 2 657 12 21 7 0 2088 3 2 0 95 2 1 0 0 347 7 512 16 19 20 0 2565 5 2 0 93 3 4 0 7 322 4 520 6 18 18 2 3478 6 2 0 92 4 0 0 16 469 103 385 13 15 2 0 2588 5 1 0 94 5 0 0 312 389 106 336 11 8 7 0 2571 5 2 0 93 6 1 0 0 295 47 366 2 9 1 0 4271 4 1 0 95 7 39 0 0 257 5 399 11 16 15 0 3362 4 2 0 94 March 4, 2026 at 01:14:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2562 106 678 26 33 13 0 2133 8 3 0 89 1 0 0 0 543 3 733 23 33 12 0 3204 7 2 0 90 2 0 0 0 422 3 597 15 24 11 0 3431 5 2 0 93 3 0 0 7 486 7 787 25 18 5 0 3077 5 2 0 93 4 0 0 17 533 116 467 7 19 6 0 2775 4 2 0 94 5 0 0 395 519 141 509 9 15 3 0 4457 4 2 0 94 6 4 0 0 306 4 404 12 18 9 0 4186 7 2 0 92 7 33 0 0 271 1 415 9 10 5 0 5781 4 2 0 94 March 4, 2026 at 01:14:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 2177 101 114 0 5 9 2 49 0 2 0 98 1 8 0 0 87 1 40 0 3 4 3 30 0 0 0 100 2 1515 0 118 35 2 64 3 2 8 10 1293 3 1 0 96 3 109 0 7 75 10 114 0 9 4 11 829 0 0 0 99 4 40 0 17 257 105 116 3 9 11 8 459 0 1 0 99 5 54 0 5 342 153 138 0 5 10 5 101 0 0 0 99 6 6 0 0 47 4 41 2 4 5 3 395 0 0 0 100 7 1817 0 0 38 1 48 4 2 1 5 1347 0 1 0 98 March 4, 2026 at 01:14:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 104 0 2 0 0 0 0 1 0 99 1 0 0 0 14 0 6 0 0 0 0 10 0 0 0 100 2 0 0 0 16 4 10 0 0 2 0 295 0 0 0 100 3 0 0 7 27 8 23 1 4 0 0 566 0 0 0 100 4 0 0 21 217 109 6 0 1 0 0 266 0 0 0 100 5 0 0 7 311 153 104 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 8 0 0 0 0 302 0 0 0 100 7 0 0 0 10 2 34 0 0 0 0 1140 0 0 0 100 March 4, 2026 at 01:14:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 102 144 1 13 274 0 0 0 2 0 98 1 0 0 0 50 1 84 1 12 210 0 14 0 1 0 99 2 0 0 0 60 3 103 3 10 182 0 294 0 1 0 99 3 0 0 7 219 106 246 16 24 248 0 570 0 1 0 99 4 0 0 17 272 105 172 0 26 200 0 268 0 1 0 99 5 0 0 3 356 152 206 1 11 286 0 0 0 1 0 99 6 0 0 0 50 2 75 3 6 145 0 301 0 1 0 99 7 0 0 0 45 2 102 2 6 168 0 1137 0 1 0 99 March 4, 2026 at 01:14:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 2 0 0 0 0 0 0 1 0 99 1 0 0 0 9 0 6 0 0 0 0 10 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 7 122 6 117 1 1 0 0 885 0 0 0 100 4 0 0 16 213 104 6 0 1 1 0 266 0 0 0 100 5 0 0 4 308 152 104 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 10 0 0 0 0 306 0 0 0 100 7 0 0 0 18 5 44 1 0 1 0 1143 0 0 0 99 March 4, 2026 at 01:14:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2236 101 153 1 12 1 0 1165 1 2 0 97 1 48 0 0 72 0 73 5 8 1 0 1398 3 1 0 96 2 70 0 0 154 6 372 62 22 1 0 1811 2 1 0 96 3 36 0 7 241 4 345 10 15 1 0 2273 2 1 0 97 4 43 0 16 258 108 71 5 8 2 0 1065 5 1 0 95 5 221 0 130 382 144 282 7 15 9 0 1342 2 1 0 97 6 509 0 0 108 11 212 8 17 2 0 2113 3 1 0 96 7 19 0 0 124 9 373 11 16 0 1 2720 3 1 0 96 March 4, 2026 at 01:14:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 106 0 0 1 0 23 0 1 0 98 1 0 0 0 31 7 28 1 0 0 0 17 1 0 0 99 2 0 0 0 18 5 12 0 0 0 0 307 0 0 0 100 3 0 0 7 21 3 16 1 2 0 0 581 0 0 0 100 4 4 0 17 215 105 8 0 0 0 0 274 0 0 0 100 5 23 0 17 211 103 6 0 0 0 0 21 0 0 0 100 6 0 0 0 124 55 118 0 1 0 0 306 0 0 0 100 7 0 0 0 20 3 42 1 1 1 0 1163 0 0 0 100 March 4, 2026 at 01:14:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 106 0 0 0 0 0 0 1 0 99 1 0 0 0 19 6 14 0 0 0 0 6 0 0 0 100 2 0 0 0 14 4 10 0 1 0 0 295 0 0 0 100 3 0 0 7 16 3 10 0 0 0 0 562 0 0 0 100 4 0 0 17 208 102 4 0 0 0 0 268 0 0 0 100 5 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 6 0 0 0 118 53 113 1 1 0 0 301 0 0 0 100 7 0 0 0 10 2 34 1 0 2 0 1143 0 0 0 100 March 4, 2026 at 01:14:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2189 110 259 4 18 195 0 33 0 2 0 98 1 0 0 14 65 3 103 2 18 141 0 14 0 1 0 99 2 0 0 7 77 4 151 2 18 193 0 462 0 1 0 99 3 0 0 7 147 80 123 7 23 118 0 563 0 1 0 99 4 0 0 17 276 103 130 1 13 172 0 280 0 1 0 99 5 0 0 12 265 103 122 1 10 251 0 2 0 2 0 98 6 0 0 0 87 17 101 1 7 140 0 329 0 1 0 99 7 0 0 0 134 37 217 2 16 154 0 1074 0 1 0 99 March 4, 2026 at 01:14:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 108 124 0 0 0 0 10 0 1 0 99 1 0 0 0 18 0 15 0 2 0 0 0 0 0 0 100 2 0 0 0 15 3 10 0 0 0 0 294 0 0 0 100 3 0 0 14 13 4 10 0 1 0 0 562 0 0 0 100 4 0 0 16 211 104 4 1 0 0 0 267 0 0 0 100 5 0 0 4 213 103 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 301 0 0 0 100 7 0 0 0 109 51 132 1 0 0 0 1053 0 0 0 99 March 4, 2026 at 01:14:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 137 186 1 1 0 0 16 0 1 0 98 1 0 0 112 11 0 5 0 0 0 0 0 0 0 0 100 2 0 0 0 36 3 18 0 0 0 0 299 0 1 0 99 3 0 0 7 31 4 10 1 0 0 0 560 0 0 0 100 4 0 0 17 230 106 4 0 1 1 0 266 0 0 0 100 5 0 0 3 229 103 8 0 0 5 0 0 0 0 0 100 6 0 0 0 27 2 6 0 1 0 0 301 0 0 0 100 7 0 0 0 76 25 86 1 0 0 0 1075 0 0 0 99 March 4, 2026 at 01:14:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 158 224 0 0 0 0 10 0 2 0 98 1 0 0 7 14 0 8 0 1 0 0 3 0 0 0 100 2 0 0 0 14 3 10 0 1 0 0 294 0 0 0 100 3 0 0 7 14 4 10 0 1 0 0 561 0 0 0 100 4 0 0 16 208 102 4 0 0 0 0 268 0 0 0 100 5 0 0 4 213 104 6 0 0 0 0 1 0 0 0 100 6 0 0 0 15 2 8 1 0 0 0 301 0 0 0 100 7 0 0 0 16 4 38 2 0 0 0 1056 0 0 0 100 March 4, 2026 at 01:14:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2948 122 1333 50 70 28 0 5574 10 6 0 84 1 1 0 0 885 7 1327 43 71 22 0 5671 11 4 0 85 2 0 0 0 647 6 893 26 43 7 0 6670 12 3 0 85 3 1 0 7 708 16 996 20 55 6 0 7106 7 3 0 90 4 0 0 18 808 103 937 33 37 13 0 6198 11 4 0 86 5 1 0 660 658 117 729 13 29 19 0 5981 8 3 0 88 6 0 0 0 573 3 904 20 36 31 0 5989 9 3 0 88 7 0 0 0 576 7 978 21 35 14 0 6147 8 3 0 89 March 4, 2026 at 01:14:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 101 165 1 9 228 1 10 0 2 0 98 1 0 0 0 113 8 205 1 29 285 0 9 0 1 0 99 2 0 0 0 64 2 108 2 11 169 0 295 0 1 0 99 3 0 0 7 146 100 143 9 24 292 0 564 0 1 0 99 4 0 0 16 246 104 83 2 7 213 0 268 0 1 0 99 5 0 0 4 345 151 177 1 9 196 0 0 0 1 0 99 6 0 0 0 56 2 90 1 7 160 0 301 0 1 0 99 7 0 0 0 48 1 113 2 6 204 0 1053 0 1 0 99 March 4, 2026 at 01:14:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 2 2163 102 168 0 6 10 14 142 0 1 0 98 1 12 0 0 48 4 40 0 5 3 6 98 0 0 0 100 2 6 0 0 40 3 34 0 3 4 3 347 0 0 0 100 3 0 0 7 32 4 17 1 1 3 0 567 0 0 0 100 4 0 0 15 235 105 16 0 1 3 0 286 0 1 0 99 5 3338 0 127 277 117 107 5 2 12 14 1263 3 2 0 95 6 120 0 0 149 37 179 0 9 10 22 504 0 0 0 99 7 75 0 0 57 1 99 2 7 9 12 1323 0 1 0 99 March 4, 2026 at 01:14:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 110 0 0 0 0 15 0 1 0 99 1 0 0 0 16 4 10 0 0 0 0 8 0 0 0 100 2 0 0 0 25 6 22 1 0 0 0 302 0 0 0 100 3 0 0 7 15 5 12 0 0 0 0 564 0 0 0 100 4 0 0 18 222 110 16 0 0 0 0 274 0 0 0 100 5 0 0 2 213 102 8 0 1 2 0 0 0 0 0 100 6 0 0 0 127 53 128 1 1 1 0 302 0 0 0 100 7 0 0 0 14 3 42 0 0 1 0 1149 0 0 0 99 March 4, 2026 at 01:14:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 104 116 0 0 0 0 18 0 1 0 99 1 0 0 0 17 4 8 1 0 0 0 324 0 0 0 100 2 0 0 0 12 3 9 0 1 0 0 297 0 0 0 100 3 0 0 7 13 4 8 1 0 0 0 561 0 0 0 100 4 0 0 16 208 102 4 0 0 0 0 266 0 0 0 100 5 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 121 52 118 0 0 0 0 306 0 0 0 100 7 0 0 0 9 1 32 2 0 0 0 1135 0 1 0 99 March 4, 2026 at 01:14:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 107 116 0 0 0 0 5 0 1 0 99 1 0 0 0 6 0 2 0 1 0 0 10 0 0 0 100 2 0 0 0 14 4 8 0 0 0 0 295 0 0 0 100 3 0 0 7 13 4 10 0 1 0 0 561 0 0 0 100 4 0 0 15 207 102 6 1 0 0 0 268 0 0 0 100 5 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 121 52 116 0 0 1 0 301 0 0 0 100 7 0 0 0 10 1 36 1 1 3 0 1136 0 0 0 100 March 4, 2026 at 01:14:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 116 0 0 2285 139 345 13 41 174 0 1153 4 2 0 94 1 4 0 0 184 0 178 3 17 113 0 1503 1 1 0 98 2 21 0 0 193 2 272 13 22 112 0 1922 2 1 0 97 3 220 0 7 194 74 293 89 19 106 0 2647 4 2 0 94 4 11 0 17 408 103 249 7 29 138 0 1975 2 1 0 97 5 42 0 143 306 102 222 6 17 136 0 1256 2 1 0 97 6 578 0 0 154 17 185 9 14 124 0 2231 3 2 0 95 7 12 0 0 224 7 521 12 27 127 0 2630 4 2 0 94 March 4, 2026 at 01:14:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 152 194 0 2 0 0 0 0 1 0 99 1 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 12 2 6 1 0 0 0 294 0 0 0 100 3 0 0 7 14 5 10 0 0 0 0 561 0 0 0 100 4 5 0 18 220 102 16 0 0 0 0 270 0 0 0 100 5 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 14 2 8 1 1 0 0 301 0 0 0 100 7 0 0 0 31 8 54 1 0 2 0 1155 0 0 0 99 March 4, 2026 at 01:14:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 152 217 0 1 3 0 15 0 1 0 98 1 0 0 0 22 1 25 1 6 13 1 14 0 0 0 100 2 0 0 9 27 2 26 0 2 6 0 300 0 1 0 99 3 0 0 14 41 10 64 0 7 19 3 731 0 0 0 100 4 0 0 17 229 106 22 0 4 12 0 284 0 0 0 100 5 0 0 3 217 102 10 0 2 8 0 0 0 0 0 100 6 0 0 0 24 2 25 0 3 7 0 335 0 0 0 100 7 0 0 14 44 8 79 1 1 7 0 1194 0 1 0 99 March 4, 2026 at 01:14:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 152 206 0 1 0 0 0 0 1 0 99 1 0 0 0 11 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 16 2 12 0 1 0 0 294 0 0 0 100 3 0 0 7 35 13 28 1 1 0 0 571 0 0 0 100 4 0 0 28 216 108 8 1 1 0 0 268 0 0 0 100 5 0 0 7 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 4 0 0 0 0 301 0 0 0 100 7 0 0 0 21 1 43 2 1 1 0 1057 0 1 0 99 March 4, 2026 at 01:14:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 152 206 0 0 0 0 0 0 1 0 99 1 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 29 3 8 0 1 0 0 295 0 0 0 100 3 0 0 7 43 11 22 2 1 0 0 568 0 0 0 100 4 0 0 16 230 106 6 0 0 0 0 265 0 0 0 100 5 0 0 4 225 102 4 0 1 0 0 0 0 0 0 100 6 0 0 0 29 4 8 0 0 0 0 303 0 0 0 100 7 0 0 112 20 2 45 0 0 1 0 1056 0 1 0 99 March 4, 2026 at 01:14:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2201 154 302 1 15 63 0 0 0 2 0 98 1 0 0 0 56 1 81 0 9 45 0 0 0 0 0 100 2 0 0 0 54 5 83 0 5 71 0 298 0 0 0 100 3 0 0 7 135 72 123 5 8 74 0 579 0 1 0 99 4 0 0 17 248 106 74 1 6 66 0 272 0 1 0 99 5 0 0 3 241 103 63 1 3 47 0 0 0 0 0 100 6 0 0 0 73 4 119 1 5 49 0 302 0 0 0 100 7 0 0 7 52 3 102 2 7 58 0 1056 0 1 0 99 March 4, 2026 at 01:14:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2536 140 771 26 33 5 0 3599 6 3 0 91 1 0 0 1 522 3 849 33 30 3 0 2457 5 2 0 93 2 1 0 0 320 3 407 15 18 17 0 3328 7 2 0 91 3 1 0 7 310 12 379 7 20 5 0 4196 6 2 0 93 4 8 0 16 578 107 577 17 22 15 0 2907 5 2 0 93 5 19 0 353 449 105 448 6 26 5 0 3220 5 2 0 93 6 0 0 0 380 9 606 23 24 2 0 2715 5 2 0 94 7 0 0 0 275 6 418 13 21 14 0 4253 5 2 0 94 March 4, 2026 at 01:14:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2449 103 545 23 41 2 0 2836 4 3 0 93 1 1 0 0 404 2 485 31 33 4 0 3008 5 2 0 93 2 0 0 0 335 7 405 11 25 5 0 3461 4 1 0 95 3 1 0 7 379 7 506 15 22 1 0 2986 3 2 0 95 4 42 0 17 535 150 347 14 14 7 0 2573 5 2 0 94 5 13 0 297 461 104 468 21 22 1 0 2290 3 2 0 95 6 0 0 0 282 4 454 19 22 4 0 2674 5 1 0 94 7 19 0 0 248 10 350 13 15 13 0 3502 6 2 0 93 March 4, 2026 at 01:14:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 112 0 0 0 0 0 0 1 0 99 1 0 0 0 8 0 2 0 0 0 0 10 0 0 0 100 2 0 0 14 11 4 9 0 1 0 0 560 0 0 0 100 3 0 0 7 16 5 10 1 0 0 0 561 0 0 0 100 4 0 0 4 308 153 100 0 0 0 0 0 0 0 0 100 5 0 0 2 211 102 6 0 1 0 0 0 0 0 0 100 6 0 0 0 10 2 8 0 1 1 0 5 0 0 0 100 7 0 0 0 21 7 44 1 0 1 0 1383 0 0 0 99 March 4, 2026 at 01:14:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 117 0 0 0 0 1 0 1 0 99 1 0 0 0 9 0 6 0 0 0 0 28 0 0 0 100 2 0 0 14 19 6 16 1 0 0 0 569 0 0 0 100 3 0 0 7 15 5 12 0 1 0 0 561 0 0 0 100 4 0 0 2 311 155 102 0 0 0 0 2 0 0 0 100 5 0 0 4 209 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 11 1 6 0 1 1 0 1 0 0 0 100 7 0 0 0 20 6 44 2 1 1 0 1360 0 0 0 99 March 4, 2026 at 01:14:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 103 209 2 23 227 0 1 0 2 0 98 1 0 0 0 72 1 140 0 23 229 0 0 0 1 0 99 2 0 0 14 70 3 138 1 15 251 0 564 0 1 0 99 3 0 0 7 194 129 216 17 34 328 0 564 0 1 0 99 4 0 0 6 399 157 244 4 19 276 0 0 0 1 0 99 5 0 0 1 273 102 138 1 18 244 0 0 0 1 0 99 6 0 0 0 67 3 111 1 10 151 0 5 0 1 0 99 7 0 0 0 63 8 169 6 30 181 0 1369 0 1 0 99 March 4, 2026 at 01:14:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 116 0 1 0 0 0 0 1 0 99 1 0 0 0 7 0 2 0 0 0 0 10 0 0 0 100 2 0 0 14 11 2 10 1 0 0 0 565 0 0 0 100 3 0 0 7 23 6 18 0 0 0 0 561 0 0 0 100 4 0 0 3 321 159 116 0 1 0 0 8 0 0 0 99 5 0 0 3 209 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 19 5 42 1 1 2 0 1673 0 1 0 99 March 4, 2026 at 01:14:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 156 0 0 2166 104 219 2 10 17 20 192 0 2 0 98 1 23 0 2 59 0 112 1 8 13 7 191 0 0 0 100 2 39 0 14 60 2 81 0 8 7 10 736 0 0 0 100 3 14 0 7 71 5 58 2 5 5 6 674 0 0 0 100 4 6 0 4 371 162 135 0 5 4 0 67 0 1 0 99 5 0 0 2 242 102 15 0 2 4 0 0 0 1 0 99 6 0 0 0 32 2 9 0 0 1 0 19 0 0 0 100 7 3327 0 114 42 2 101 7 2 8 16 2612 4 2 0 93 March 4, 2026 at 01:14:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 108 0 0 0 0 1 0 1 0 99 1 0 0 0 6 0 2 0 0 0 0 10 0 0 0 100 2 0 0 14 9 2 6 0 0 0 0 559 0 0 0 100 3 0 0 7 14 5 10 0 0 0 0 560 0 0 0 100 4 0 0 4 330 160 122 0 0 0 0 9 0 0 0 99 5 0 0 2 210 102 6 0 1 0 0 0 0 1 0 99 6 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 10 2 34 1 0 1 0 1442 0 0 0 100 March 4, 2026 at 01:14:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 106 0 0 0 0 0 0 1 0 99 1 0 0 0 8 0 4 0 1 0 0 10 0 0 0 100 2 0 0 14 13 3 10 1 2 0 0 561 0 0 0 100 3 0 0 7 15 5 12 0 2 0 0 562 0 0 0 100 4 0 0 2 253 120 46 0 0 0 0 5 0 0 0 100 5 0 0 4 280 137 78 0 1 0 0 0 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 12 3 36 1 0 1 0 1440 0 0 0 99 March 4, 2026 at 01:14:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 106 0 0 0 0 0 0 1 0 99 1 0 0 0 7 0 4 0 0 1 0 10 0 0 0 100 2 0 0 14 13 3 12 1 0 0 0 568 0 0 0 100 3 0 0 7 27 7 28 0 1 2 0 572 0 0 0 100 4 0 0 2 232 107 30 0 1 0 0 323 0 0 0 100 5 0 0 4 314 154 110 0 0 0 0 0 0 1 0 99 6 0 0 0 11 2 8 0 0 0 0 4 0 0 0 100 7 0 0 0 28 9 56 1 0 0 0 1454 0 0 0 99 March 4, 2026 at 01:14:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 106 0 0 0 0 0 0 1 0 99 1 0 0 0 8 0 4 0 0 0 0 10 0 0 0 100 2 0 0 14 9 3 6 0 0 0 0 560 0 0 0 100 3 0 0 7 15 4 10 2 0 0 0 561 0 0 0 100 4 0 0 1 218 102 10 0 0 0 0 0 0 0 0 100 5 0 0 6 309 152 106 0 0 0 0 0 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 19 6 42 2 0 0 0 1444 0 0 0 99 March 4, 2026 at 01:15:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 120 0 0 0 0 14 0 1 0 99 1 0 0 0 6 0 2 0 0 0 0 10 0 0 0 100 2 0 0 14 18 6 18 0 0 0 0 568 0 0 0 100 3 0 0 7 22 5 20 0 0 0 0 568 0 0 0 100 4 0 0 2 230 109 16 0 0 1 0 3 0 0 0 100 5 26 0 4 321 154 124 0 1 3 0 10 0 1 0 99 6 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 7 20 0 0 21 7 44 2 0 1 0 1442 0 0 0 99 March 4, 2026 at 01:15:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 108 0 0 0 0 1 0 1 0 99 1 0 0 0 7 0 2 0 0 0 0 10 0 0 0 100 2 0 0 14 11 3 6 1 0 0 0 560 0 0 0 100 3 0 0 7 15 4 10 0 0 1 0 560 0 0 0 100 4 0 0 7 220 104 10 0 0 0 0 0 0 0 0 100 5 0 0 7 312 152 108 0 0 1 0 0 0 0 0 100 6 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 23 6 46 3 1 3 0 1437 0 1 0 99 March 4, 2026 at 01:15:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 112 0 2 0 0 0 0 1 0 99 1 0 0 0 7 0 2 0 0 0 0 10 0 0 0 100 2 0 0 14 13 4 14 1 1 0 0 566 0 0 0 100 3 0 0 7 14 4 8 0 0 0 0 561 0 0 0 100 4 0 0 3 226 109 18 0 0 0 0 11 0 0 0 100 5 0 0 3 314 152 111 0 1 1 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 17 5 40 1 0 1 0 1757 0 1 0 99 March 4, 2026 at 01:15:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 103 118 0 1 0 0 1 0 1 0 99 1 0 0 0 8 0 4 0 0 0 0 10 0 0 0 100 2 0 0 14 11 3 8 0 0 0 0 563 0 0 0 100 3 0 0 7 18 4 18 2 1 2 0 563 0 0 0 100 4 0 0 2 224 108 20 0 0 0 0 14 0 0 0 100 5 0 0 4 319 153 116 0 0 1 0 0 0 0 0 100 6 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 7 0 0 0 15 2 40 1 1 3 0 1431 0 0 0 99 March 4, 2026 at 01:15:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 108 0 0 1 0 0 0 1 0 99 1 0 0 0 10 0 10 0 1 1 0 10 0 0 0 100 2 0 0 14 10 2 6 1 1 0 0 560 0 0 0 100 3 0 0 7 15 5 10 0 0 0 0 561 0 0 0 100 4 0 0 2 217 106 12 0 0 0 0 7 0 0 0 100 5 0 0 4 315 151 112 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 7 0 0 0 11 2 34 2 0 1 0 1432 0 0 0 99 March 4, 2026 at 01:15:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 405 0 0 2231 105 296 22 18 7 0 1704 5 2 0 93 1 27 0 0 117 1 165 8 17 2 0 1332 4 1 0 95 2 34 0 14 95 2 153 4 14 0 0 2001 2 1 0 98 3 162 0 7 78 5 147 7 13 3 0 2351 3 1 0 96 4 174 0 4 304 110 239 9 11 3 0 1570 1 1 0 98 5 56 0 128 389 151 293 4 10 9 0 1559 1 1 0 98 6 71 0 0 100 1 171 5 7 2 0 1794 3 1 0 96 7 19 0 0 75 3 142 8 12 2 0 2618 2 1 0 97 March 4, 2026 at 01:15:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 110 28 0 1 0 0 39 0 1 0 99 1 0 0 0 19 2 14 0 0 2 0 12 0 0 0 100 2 6 0 14 30 3 24 1 2 3 0 619 1 0 0 99 3 0 0 7 20 5 12 1 1 1 0 574 0 0 0 100 4 0 0 3 217 103 6 0 1 0 0 14 0 0 0 100 5 17 0 31 405 151 205 0 2 2 0 9 0 1 0 99 6 0 0 0 13 1 2 0 1 0 0 10 0 0 0 100 7 0 0 0 16 2 38 1 2 0 0 1454 0 0 0 99 March 4, 2026 at 01:15:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 107 34 0 2 0 0 6 0 1 0 99 1 0 0 1 8 0 2 0 1 0 0 0 0 0 0 100 2 0 0 14 15 3 10 1 1 0 0 561 0 0 0 100 3 0 0 7 21 5 22 1 1 0 0 563 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 396 151 192 0 2 0 0 0 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 4 0 0 0 100 7 0 0 0 16 4 38 2 1 3 0 1446 0 0 0 99 March 4, 2026 at 01:15:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 111 172 1 16 158 0 19 0 2 0 98 1 0 0 0 57 0 99 1 10 171 0 0 0 0 0 100 2 0 0 14 53 2 107 2 17 145 0 560 0 1 0 99 3 0 0 7 132 91 133 14 13 183 0 566 0 1 0 99 4 0 0 4 245 102 78 1 8 81 0 5 0 1 0 99 5 0 0 2 362 153 204 2 6 129 0 0 0 1 0 99 6 0 0 0 52 1 96 2 7 168 0 26 0 0 0 99 7 0 0 0 101 2 178 2 20 108 0 1443 0 1 0 99 March 4, 2026 at 01:15:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 88 0 2 0 0 5 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 14 11 3 8 0 0 0 0 561 0 0 0 100 3 0 0 7 18 6 14 1 0 1 0 562 0 0 0 100 4 0 0 4 212 102 8 0 1 1 0 0 0 0 0 100 5 0 0 2 315 151 112 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 41 2 64 1 1 0 0 1444 0 1 0 99 March 4, 2026 at 01:15:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2124 105 139 2 6 6 0 91 0 2 0 98 1 0 0 0 15 0 11 0 1 5 1 32 0 0 0 100 2 0 0 14 37 7 43 1 1 0 2 662 0 0 0 99 3 0 0 7 37 8 45 0 4 10 0 601 0 0 0 100 4 0 0 9 222 106 23 0 6 15 0 3 0 1 0 99 5 0 0 5 345 157 154 0 7 9 0 38 0 0 0 99 6 1 0 7 13 1 11 0 4 7 0 15 0 0 0 100 7 0 0 0 21 3 43 1 2 7 0 1359 0 1 0 99 March 4, 2026 at 01:15:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 111 0 1 0 0 0 0 1 0 99 1 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 2 0 0 14 12 3 6 1 0 0 0 560 0 0 0 100 3 0 0 7 16 5 10 1 1 0 0 560 0 0 0 100 4 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 5 0 0 4 236 111 28 0 0 0 0 9 0 0 0 100 6 0 0 0 103 47 98 0 1 0 0 0 0 0 0 100 7 0 0 7 15 4 40 1 1 1 0 1375 0 0 0 99 March 4, 2026 at 01:15:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2108 103 115 0 0 0 0 0 0 1 0 99 1 0 0 0 25 0 4 0 1 0 0 0 0 0 0 100 2 0 0 14 29 4 8 1 0 0 0 561 0 0 0 100 3 0 0 7 30 4 10 0 1 0 0 561 0 0 0 100 4 0 0 3 223 101 2 0 0 0 0 2 0 0 0 100 5 0 0 3 249 109 28 1 0 1 0 7 0 0 0 99 6 0 0 0 125 50 106 0 1 0 0 0 0 0 0 100 7 0 0 0 31 3 38 2 0 1 0 1355 0 0 0 99 March 4, 2026 at 01:15:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 104 112 0 0 0 0 1 0 1 0 99 1 0 0 0 9 1 4 0 0 1 0 0 0 0 0 100 2 0 0 14 11 3 8 0 0 1 0 560 0 0 0 100 3 0 0 7 21 5 20 0 0 1 0 565 0 0 0 100 4 0 0 2 216 108 2 0 0 0 0 3 0 0 0 100 5 0 0 4 246 115 38 0 0 0 0 17 0 0 0 100 6 0 0 0 109 50 104 0 0 1 0 0 0 0 0 100 7 0 0 0 16 3 42 1 1 1 0 1355 0 0 0 100 March 4, 2026 at 01:15:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2897 108 1254 33 62 9 0 6088 9 5 0 86 1 58 0 0 767 5 1147 38 51 30 0 5939 13 4 0 83 2 2 0 14 708 6 979 28 51 11 0 5818 12 4 0 84 3 0 0 7 678 8 988 21 46 13 0 6113 10 3 0 88 4 0 0 3 962 124 1201 28 44 14 0 6381 9 3 0 88 5 1 0 675 659 113 786 14 28 9 0 6869 9 4 0 87 6 2 0 0 657 15 978 24 47 18 0 5294 8 3 0 89 7 2 0 0 481 6 691 20 28 13 0 6913 8 3 0 89 March 4, 2026 at 01:15:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 103 124 0 1 0 0 5 0 1 0 99 1 0 0 0 9 1 6 0 1 0 0 10 0 0 0 100 2 0 0 14 11 2 10 2 0 0 0 567 0 0 0 100 3 0 0 7 32 6 30 2 0 0 0 573 0 0 0 100 4 0 0 2 309 154 100 0 0 0 0 0 0 0 0 100 5 0 0 4 221 107 16 0 1 0 0 6 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 36 0 1 1 0 1355 0 0 0 99 March 4, 2026 at 01:15:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 110 0 0 0 0 2 0 1 0 99 1 0 0 0 11 2 10 0 1 0 0 10 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 559 0 0 0 100 3 0 0 7 24 4 20 1 0 0 0 562 0 0 0 100 4 0 0 1 306 151 100 0 0 0 0 0 0 0 0 100 5 0 0 5 216 106 10 0 0 0 0 5 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 19 6 42 2 0 1 0 1360 0 0 0 99 March 4, 2026 at 01:15:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 0 0 1 0 99 1 0 0 0 10 2 6 0 0 0 0 10 0 0 0 100 2 0 0 14 9 3 6 0 0 2 0 561 0 0 0 100 3 0 0 7 24 5 20 0 0 0 0 561 0 0 0 100 4 0 0 4 306 151 100 0 0 0 0 0 0 0 0 100 5 0 0 2 216 106 10 0 0 0 0 5 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 14 4 38 1 0 3 0 1357 0 0 0 99 March 4, 2026 at 01:15:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 103 199 0 16 214 0 2 0 2 0 98 1 0 0 0 66 3 122 1 22 193 0 0 0 1 0 99 2 0 0 14 72 2 144 2 15 235 0 565 0 1 0 99 3 0 0 7 153 95 140 9 14 214 0 567 0 1 0 99 4 0 0 4 364 156 227 1 19 218 0 3 0 1 0 99 5 0 0 2 265 108 99 2 11 201 0 331 0 1 0 99 6 0 0 0 53 1 102 1 14 224 0 3 0 1 0 99 7 0 0 0 55 4 120 2 5 145 0 1360 0 1 0 99 March 4, 2026 at 01:15:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 0 0 1 0 99 1 0 0 1 13 2 8 0 1 0 0 10 0 0 0 100 2 0 0 14 12 2 6 2 0 0 0 560 0 0 0 100 3 0 0 7 34 8 32 2 1 0 0 568 0 0 0 100 4 0 0 2 310 155 100 0 0 0 0 0 0 0 0 100 5 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 34 2 0 1 0 1355 0 0 0 100 March 4, 2026 at 01:15:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3324 0 114 2139 103 98 6 2 13 18 1259 3 3 0 94 1 156 0 0 77 3 104 0 11 8 17 185 0 0 0 99 2 26 0 17 60 4 70 0 8 6 9 727 0 0 0 99 3 15 0 7 153 12 168 0 8 7 6 735 0 1 0 99 4 12 0 2 353 159 139 2 4 16 3 100 0 0 0 99 5 7 0 4 236 102 29 0 4 6 1 55 0 0 0 100 6 4 0 0 37 3 24 0 2 2 3 41 0 0 0 100 7 21 0 0 38 4 52 1 1 1 3 1504 0 0 0 99 March 4, 2026 at 01:15:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 6 0 1 0 0 0 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 2 0 0 14 80 3 76 0 2 0 0 561 0 0 0 100 3 0 0 7 60 8 57 0 2 1 0 568 0 0 0 100 4 0 0 4 315 154 108 0 1 1 0 0 0 0 0 100 5 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 8 0 1 0 0 0 0 0 0 100 7 0 0 0 11 2 34 2 0 1 0 1438 0 0 0 99 March 4, 2026 at 01:15:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 24 0 1 0 0 2 0 1 0 99 1 0 0 0 10 1 8 0 0 0 0 28 0 0 0 100 2 0 0 14 96 4 96 0 1 0 0 574 0 0 0 100 3 0 0 7 40 8 32 0 2 1 0 886 0 0 0 100 4 0 0 4 309 151 104 0 1 1 0 0 0 0 0 100 5 0 0 2 217 104 16 0 1 1 0 4 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 34 0 0 0 0 1438 0 0 0 100 March 4, 2026 at 01:15:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 36 0 0 0 0 1 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 2 0 0 14 88 3 85 2 3 1 0 560 0 0 0 100 3 0 0 7 18 3 16 1 1 2 0 561 0 0 0 100 4 0 0 3 310 152 106 0 0 1 0 3 0 0 0 100 5 0 0 3 231 112 22 1 0 0 0 16 0 0 0 100 6 0 0 0 12 2 10 0 0 0 0 3 0 0 0 100 7 0 0 0 12 2 36 2 0 3 0 1438 0 1 0 99 March 4, 2026 at 01:15:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2115 104 64 0 2 0 0 7 0 1 0 99 1 0 0 0 9 1 6 0 0 0 0 20 0 0 0 100 2 0 0 14 62 2 56 0 2 0 0 560 0 0 0 100 3 0 0 7 13 3 8 0 1 0 0 562 0 0 0 100 4 0 0 1 309 152 103 0 1 1 0 0 0 0 0 100 5 0 0 5 218 106 12 0 0 3 0 13 0 0 0 100 6 0 0 0 13 2 14 0 1 0 0 0 0 0 0 100 7 0 0 0 13 3 36 2 0 1 0 1443 0 0 0 99 March 4, 2026 at 01:15:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 118 0 1 0 0 5 0 1 0 99 1 0 0 0 10 1 6 0 1 0 0 10 0 0 0 100 2 0 0 14 18 2 18 0 0 0 0 567 0 0 0 100 3 0 0 7 23 5 24 0 0 0 0 579 0 0 0 100 4 0 0 4 311 155 102 0 0 0 0 0 0 0 0 100 5 0 0 2 223 106 16 1 0 0 0 5 0 0 0 100 6 0 0 0 14 2 10 0 0 2 0 0 0 0 0 100 7 0 0 0 17 5 44 0 1 2 0 1437 0 0 0 99 March 4, 2026 at 01:15:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 108 0 0 0 0 2 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 2 0 0 14 17 2 16 0 0 0 0 565 0 0 0 100 3 0 0 7 19 5 16 1 0 0 0 565 0 0 0 100 4 0 0 4 308 152 102 0 0 0 0 0 0 0 0 100 5 0 0 2 219 107 12 0 0 0 0 326 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 34 1 0 1 0 1432 0 0 0 99 March 4, 2026 at 01:15:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 108 0 0 0 0 0 0 1 0 99 1 0 0 0 9 1 6 0 1 0 0 10 0 0 0 100 2 0 0 14 19 3 16 2 1 0 0 561 0 0 0 100 3 0 0 7 22 8 18 1 0 0 0 568 0 0 0 100 4 0 0 1 310 154 102 0 0 0 0 0 0 0 0 100 5 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 14 3 36 3 0 2 0 1434 0 0 0 99 March 4, 2026 at 01:15:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 108 0 0 0 0 2 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 2 0 0 14 20 3 18 0 0 3 0 560 0 0 0 100 3 0 0 7 34 11 36 0 1 4 0 577 0 0 0 99 4 0 0 3 310 152 106 0 0 0 0 3 0 0 0 100 5 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 8 0 0 0 0 3 0 0 0 100 7 0 0 0 12 2 38 1 1 2 0 1431 0 0 0 99 March 4, 2026 at 01:15:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 0 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 2 0 0 14 15 2 12 0 0 0 0 560 0 0 0 100 3 0 0 7 22 8 18 0 0 0 0 566 0 0 0 100 4 0 0 2 308 152 102 0 0 0 0 0 0 0 0 100 5 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 13 3 36 2 0 1 0 1433 0 0 0 99 March 4, 2026 at 01:15:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2238 142 272 7 17 4 0 1363 2 2 0 95 1 9 0 0 104 2 156 7 11 1 0 1223 1 1 0 98 2 125 0 14 136 4 216 35 10 1 0 2045 4 1 0 95 3 588 0 7 166 11 220 12 11 7 1 2571 3 2 0 95 4 35 0 3 348 119 347 4 11 2 0 1497 1 1 0 98 5 11 0 129 287 102 95 10 19 2 0 1147 5 1 0 95 6 258 0 0 123 2 156 5 13 5 0 1078 2 1 0 98 7 4 0 0 128 5 271 6 12 3 0 2520 3 1 0 96 March 4, 2026 at 01:15:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 152 206 0 0 0 0 0 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 5 0 14 9 2 4 2 0 0 0 563 0 0 0 100 3 0 0 7 26 10 22 1 0 0 0 569 0 0 0 100 4 0 0 3 213 104 4 0 1 1 0 0 0 0 0 100 5 0 0 3 212 102 12 0 1 0 0 0 0 0 0 100 6 0 0 0 16 1 12 0 1 0 0 0 0 0 0 100 7 0 0 0 15 4 38 2 0 1 0 1465 0 0 0 99 March 4, 2026 at 01:15:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 153 212 0 0 0 0 2 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 9 3 6 0 0 0 0 561 0 0 0 100 3 0 0 7 24 9 20 0 0 0 0 571 0 0 0 100 4 0 0 1 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 16 1 12 0 0 0 0 0 0 0 0 100 7 0 0 0 12 3 36 1 0 1 0 1444 0 0 0 99 March 4, 2026 at 01:15:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2217 154 254 2 21 172 0 1 0 2 0 98 1 0 0 0 49 1 85 1 12 117 0 0 0 0 0 100 2 0 0 14 48 3 93 1 7 135 0 559 0 1 0 99 3 0 0 7 153 90 142 6 18 121 0 578 0 1 0 99 4 0 0 7 330 103 178 0 12 142 0 3 0 1 0 99 5 0 0 7 252 102 90 1 10 149 0 0 0 1 0 99 6 0 0 0 62 1 105 1 10 101 0 0 0 0 0 100 7 0 0 0 59 4 138 2 15 146 0 1448 0 1 0 99 March 4, 2026 at 01:15:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2174 154 148 2 6 14 0 14 0 2 0 98 1 0 0 0 20 1 15 0 2 7 0 91 0 0 0 100 2 0 0 14 22 3 21 0 2 0 0 592 0 0 0 100 3 0 0 7 39 8 39 1 5 10 0 606 0 0 0 100 4 0 0 16 248 102 43 1 7 10 0 8 0 1 0 99 5 0 0 11 302 107 96 1 3 5 0 10 0 0 0 99 6 0 0 0 19 0 20 0 5 8 0 80 0 0 0 100 7 0 0 0 25 5 47 2 1 8 0 1360 0 1 0 99 March 4, 2026 at 01:15:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 153 178 0 4 0 0 5 0 1 0 99 1 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 12 2 10 2 0 0 0 567 0 0 0 100 3 0 0 7 23 5 20 2 0 1 0 576 0 0 0 100 4 0 0 1 218 106 3 0 2 2 0 0 0 0 0 100 5 0 0 5 284 111 74 0 1 1 0 12 0 0 0 100 6 0 0 7 10 1 8 0 1 0 0 3 0 0 0 100 7 0 0 0 14 3 36 2 0 1 0 1358 0 0 0 99 March 4, 2026 at 01:15:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 154 215 0 2 0 0 2 0 1 0 99 1 0 0 0 27 1 8 0 2 0 0 0 0 0 0 100 2 0 0 14 27 4 8 0 0 0 0 565 0 0 0 100 3 0 0 7 26 3 6 0 0 0 0 560 0 0 0 100 4 0 0 114 210 101 3 0 1 0 0 0 0 0 0 100 5 0 0 4 238 108 14 1 0 0 0 9 0 0 0 100 6 0 0 0 31 1 10 0 2 0 0 0 0 0 0 100 7 0 0 0 29 3 38 1 1 1 0 1355 0 0 0 99 March 4, 2026 at 01:15:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 153 144 0 3 0 0 0 0 1 0 99 1 0 0 0 15 2 8 0 1 0 0 0 0 0 0 100 2 0 0 14 16 4 16 0 1 0 0 561 0 0 0 100 3 0 0 7 13 4 8 0 0 0 0 562 0 0 0 100 4 0 0 10 209 101 2 0 0 0 0 0 0 0 0 100 5 0 0 3 221 108 14 0 0 0 0 9 0 0 0 100 6 0 0 0 84 0 78 0 2 0 0 0 0 1 0 99 7 0 0 0 15 4 38 1 0 2 0 1354 0 0 0 99 March 4, 2026 at 01:15:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2671 144 917 40 42 10 0 3350 6 4 0 89 1 3 0 0 557 7 866 37 42 11 0 3498 6 2 0 92 2 40 0 14 483 6 692 25 35 15 0 3990 12 3 0 86 3 11 0 0 421 10 528 15 27 11 0 4015 6 2 0 92 4 40 0 11 536 104 435 17 21 22 0 3784 9 2 0 89 5 18 0 422 523 112 562 13 18 4 0 3849 4 2 0 94 6 1 0 0 416 5 619 10 26 4 0 3851 4 2 0 93 7 5 0 0 322 4 482 14 15 2 0 6402 4 2 0 94 March 4, 2026 at 01:15:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2361 103 419 16 23 1 0 3448 4 3 0 93 1 0 0 0 393 49 479 11 25 15 0 2018 6 2 0 93 2 0 0 14 292 4 411 15 27 5 0 4284 5 2 0 94 3 0 0 0 304 2 410 12 17 3 0 2154 3 1 0 96 4 33 0 9 508 110 500 15 18 11 0 2057 4 2 0 94 5 0 0 284 390 103 338 10 14 13 0 2206 4 2 0 94 6 0 0 0 340 7 560 19 15 2 0 1726 3 2 0 95 7 0 0 0 203 4 295 7 13 5 0 3734 4 1 0 96 March 4, 2026 at 01:15:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2146 103 161 0 7 3 5 109 0 2 0 98 1 21 0 0 155 60 144 1 3 1 3 55 0 0 0 99 2 0 0 14 87 7 80 0 1 2 0 1716 0 1 0 99 3 3322 0 150 56 3 87 6 1 16 21 1579 4 2 0 94 4 164 0 10 280 113 102 0 9 16 19 482 0 1 0 99 5 21 0 5 253 103 66 0 8 9 10 125 0 0 0 100 6 23 0 0 50 1 54 0 6 6 4 136 0 0 0 99 7 7 0 0 33 2 24 0 4 4 3 372 0 0 0 100 March 4, 2026 at 01:15:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 114 0 0 0 0 0 0 1 0 99 1 0 0 0 119 56 112 0 0 0 0 5 0 0 0 100 2 0 0 14 15 5 42 1 0 1 0 1707 0 0 0 99 3 0 0 0 7 1 2 0 0 0 0 301 0 0 0 100 4 0 0 10 212 105 4 0 0 0 0 259 0 0 0 100 5 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:15:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 119 0 2 0 0 2 0 1 0 99 1 0 0 0 120 56 112 1 1 0 0 5 0 0 0 100 2 0 0 14 16 5 42 2 0 1 0 1707 0 0 0 99 3 0 0 0 9 2 4 0 0 0 0 302 0 0 0 100 4 0 0 10 213 104 6 0 0 0 0 260 0 0 0 100 5 0 0 3 212 102 10 0 1 0 0 0 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:15:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 109 173 1 15 189 0 12 0 2 0 98 1 0 0 0 145 13 209 1 19 205 0 319 0 1 0 99 2 0 0 14 95 21 165 3 12 197 0 1709 0 1 0 98 3 0 0 0 151 97 167 10 24 257 0 306 0 1 0 99 4 0 0 10 265 105 96 3 15 181 0 260 0 1 0 99 5 0 0 3 306 126 157 1 9 277 0 0 0 1 0 99 6 0 0 0 61 1 116 0 13 260 0 3 0 1 0 99 7 0 0 0 56 2 98 3 7 267 0 301 0 1 0 99 March 4, 2026 at 01:15:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 402 0 0 2211 108 219 8 19 0 0 1855 3 2 0 95 1 19 0 0 211 2 290 11 19 3 0 1499 2 1 0 97 2 169 0 14 82 4 221 10 15 2 1 3113 3 1 0 96 3 10 0 0 84 1 105 8 11 4 0 1720 2 1 0 97 4 198 0 10 312 108 244 12 14 3 0 2329 3 1 0 96 5 131 0 115 306 139 136 4 10 4 0 1238 2 1 0 97 6 2 0 0 97 12 213 7 15 2 0 1255 2 0 0 98 7 5 0 0 53 2 72 10 8 4 0 1257 5 0 0 95 March 4, 2026 at 01:15:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 126 0 2 2 0 15 0 1 0 98 1 0 0 0 14 1 4 0 0 0 0 0 0 0 0 100 2 4 0 14 19 4 46 1 0 1 0 1712 0 1 0 99 3 0 0 0 22 3 18 1 0 0 0 318 0 0 0 100 4 0 0 11 234 115 20 0 1 0 0 287 0 0 0 100 5 0 0 16 217 103 13 1 2 0 0 18 0 0 0 100 6 0 0 0 118 50 116 0 2 1 0 10 0 0 0 100 7 0 0 0 25 6 22 0 0 0 0 321 0 0 0 100 March 4, 2026 at 01:15:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 104 117 0 0 0 0 2 0 1 0 99 1 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 2 0 0 14 12 4 38 1 0 1 0 1704 0 0 0 99 3 0 0 0 9 2 4 0 0 0 0 302 0 0 0 100 4 0 0 9 217 110 4 0 0 0 0 260 0 0 0 100 5 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 108 50 104 0 0 1 0 0 0 0 0 100 7 0 0 0 25 8 26 0 1 0 0 310 0 0 0 100 March 4, 2026 at 01:15:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1448 0 215 2443 105 283 35 44 799 15 1416 18 5 0 77 1 1748 0 70 336 2 178 13 33 548 3 1414 15 2 0 83 2 2683 0 436 289 5 246 36 31 971 17 1655 20 4 0 76 3 358 0 90 351 6 228 24 33 658 3 1615 14 3 0 83 4 6634 0 41 599 132 287 18 25 407 14 2717 13 4 0 82 5 2492 0 271 490 103 241 13 30 500 9 3311 12 4 0 85 6 3280 0 318 360 17 357 43 32 989 29 1410 19 4 0 77 7 873 0 108 385 12 321 38 39 812 15 1546 14 3 0 84 March 4, 2026 at 01:15:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 7 2184 106 149 4 13 134 0 352 4 2 0 94 1 0 0 0 98 3 156 0 15 149 0 8 0 1 0 99 2 0 0 0 75 5 109 5 13 127 0 308 3 1 0 97 3 0 0 14 171 101 160 22 23 160 0 572 4 1 0 95 4 135 0 11 383 161 219 2 15 111 0 300 1 1 0 98 5 0 0 30 268 105 137 2 12 156 0 1139 0 1 0 99 6 0 0 0 132 2 193 0 20 206 0 9 0 1 0 99 7 0 0 0 72 2 112 2 8 96 0 2 3 0 0 96 March 4, 2026 at 01:15:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 14 0 0 0 0 301 0 1 0 99 1 0 0 0 18 2 16 0 2 1 0 0 0 0 0 100 2 0 0 0 20 7 14 0 0 0 0 303 0 0 0 100 3 0 0 14 21 4 14 1 0 0 0 569 0 0 0 100 4 0 0 10 313 157 104 0 0 0 0 259 0 0 0 99 5 0 0 10 212 103 36 2 1 1 0 1138 0 1 0 99 6 0 0 0 108 0 103 0 1 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2117 104 36 0 1 0 0 317 0 1 0 99 1 0 0 0 15 3 9 0 2 1 0 1 0 0 0 100 2 0 0 0 30 9 27 1 1 0 0 313 0 0 0 100 3 0 0 14 22 5 18 1 1 0 0 574 0 0 0 100 4 0 0 9 316 156 106 0 0 0 0 261 0 0 0 100 5 0 0 4 214 103 38 0 0 2 0 1140 0 1 0 99 6 0 0 0 104 2 95 0 1 0 0 2 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 108 1 0 0 0 301 0 1 0 98 1 0 0 0 13 2 8 0 0 1 0 0 0 0 0 100 2 0 0 0 26 8 24 1 1 0 0 305 0 0 0 100 3 0 0 14 10 3 6 1 0 0 0 567 0 0 0 100 4 0 0 8 311 155 104 1 0 0 0 260 0 0 0 100 5 0 0 5 213 104 36 1 0 1 0 1166 0 1 0 99 6 0 0 0 13 0 8 0 1 0 0 0 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:15:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 15 2179 105 178 1 14 29 11 436 0 2 0 98 1 49 0 11 71 2 117 4 15 304 7 161 0 1 0 99 2 13 0 0 64 6 74 2 11 22 6 382 0 0 0 99 3 1 0 27 28 3 45 0 4 838 3 631 0 2 0 98 4 1648 0 30 276 111 118 8 9 1024 12 674 4 4 0 92 5 63 0 6 355 144 251 2 17 37 21 1009 0 1 0 99 6 73 0 12 69 0 122 0 11 892 13 125 0 2 0 98 7 12 0 2 64 1 116 0 10 25 9 246 0 0 0 100 March 4, 2026 at 01:15:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 49 2123 102 111 3 6 4 2 350 0 3 0 97 1 1 0 0 65 2 56 0 3 2 1 18 0 0 0 100 2 7 0 8 35 4 29 3 3 0 4 309 0 0 0 100 3 6 0 14 29 3 25 2 2 3 2 592 0 0 0 100 4 8 0 10 230 106 20 0 0 4 1 278 0 0 0 100 5 141 0 3 329 152 159 1 0 7 2 812 0 1 0 99 6 306 0 0 33 2 28 2 4 1 4 126 0 0 0 100 7 0 0 0 22 1 16 0 1 3 1 9 0 0 0 100 March 4, 2026 at 01:15:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2159 104 29 0 2 1 0 304 0 3 0 97 1 0 0 343 102 2 96 0 3 2 0 0 0 1 0 99 2 0 0 0 71 1 12 1 0 0 0 294 0 0 0 100 3 0 0 21 63 3 8 1 1 0 0 566 0 0 0 99 4 0 0 10 266 106 4 0 0 0 0 259 0 0 0 100 5 0 0 3 347 143 116 2 0 3 0 770 0 1 0 99 6 0 0 0 82 10 32 0 2 0 0 0 0 0 0 100 7 0 0 0 61 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2119 104 42 1 2 0 0 317 0 2 0 98 1 0 0 0 102 2 92 0 0 0 0 0 0 0 0 100 2 0 0 0 22 1 16 0 0 0 0 301 0 0 0 100 3 0 0 14 20 3 16 1 0 0 0 573 0 0 0 100 4 0 0 9 220 107 6 1 1 0 0 259 0 0 0 100 5 0 0 4 216 103 38 0 0 4 0 770 0 0 0 99 6 0 0 0 112 51 104 0 1 1 0 0 0 0 0 100 7 0 0 0 12 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:15:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 108 0 0 0 0 303 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 11 1 6 0 1 0 0 294 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 566 0 0 0 100 4 0 0 9 215 105 170 0 0 0 0 604 0 0 0 100 5 0 0 4 211 103 34 1 0 1 0 770 0 0 0 100 6 0 0 0 111 51 106 0 1 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 324 0 1 2123 104 124 1 1 4 0 423 0 2 0 98 1 0 0 0 13 2 10 0 2 1 0 0 0 0 0 100 2 19 0 2 13 2 12 0 0 1 0 385 0 0 0 100 3 0 0 14 49 19 49 0 1 0 0 589 0 0 0 100 4 0 0 9 220 108 10 0 1 0 0 266 0 0 0 100 5 2 0 4 216 103 44 1 0 7 0 833 0 1 0 99 6 828 0 0 128 52 126 0 3 11 0 640 0 1 0 98 7 501 0 3 16 2 16 1 2 11 0 138 0 1 0 99 March 4, 2026 at 01:15:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 104 178 0 9 75 0 304 0 2 0 98 1 0 0 0 56 2 95 0 9 52 0 0 0 0 0 100 2 0 0 0 49 2 76 0 4 116 0 294 0 0 0 100 3 0 0 14 142 89 119 4 4 75 0 591 0 1 0 99 4 0 0 9 252 106 92 0 9 75 0 261 0 1 0 99 5 0 0 4 253 103 125 1 5 88 0 763 0 1 0 99 6 0 0 0 151 50 185 0 6 98 0 0 0 0 0 100 7 0 0 0 44 1 73 0 2 95 0 0 0 1 0 99 March 4, 2026 at 01:15:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 107 1 1 0 0 301 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 4 1 0 0 0 294 0 0 0 100 3 0 0 14 47 22 44 1 0 0 0 587 0 0 0 100 4 0 0 8 214 106 6 1 0 0 0 259 0 0 0 100 5 0 0 5 211 103 34 1 0 1 0 761 0 0 0 99 6 0 0 0 113 50 106 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 125 0 1 0 0 310 0 1 0 99 1 0 0 0 14 2 8 0 1 0 0 0 0 0 0 100 2 0 0 0 16 4 12 0 0 4 0 296 0 0 0 100 3 0 0 14 53 22 56 0 1 2 0 601 0 0 0 100 4 0 0 10 220 109 12 0 2 0 0 265 0 0 0 100 5 0 0 3 214 103 38 1 0 0 0 762 0 1 0 99 6 0 0 0 108 51 104 0 0 0 0 2 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 0 0 0 0 301 0 1 0 98 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 3 0 0 14 47 22 44 0 0 0 0 587 0 0 0 100 4 0 0 9 215 105 8 0 1 2 0 259 0 0 0 100 5 0 0 4 212 103 36 1 1 1 0 763 0 1 0 99 6 0 0 0 108 50 104 0 1 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 121 1 1 0 0 307 0 1 0 99 1 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 295 0 0 0 100 3 0 0 14 51 23 50 0 0 0 0 595 0 0 0 100 4 0 0 10 218 107 10 0 0 0 0 261 0 0 0 100 5 0 0 3 211 103 34 1 0 1 0 762 0 1 0 99 6 0 0 0 60 25 53 0 2 0 0 0 0 0 0 100 7 0 0 0 59 26 56 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:16:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 102 121 1 2 1 0 301 0 1 0 99 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 5 1 1 0 0 294 0 0 0 100 3 0 0 14 50 22 50 1 0 0 0 587 0 0 0 100 4 0 0 10 214 106 6 0 0 0 0 259 0 0 0 100 5 0 0 3 214 104 38 1 0 2 0 762 0 0 0 99 6 0 0 0 8 0 4 0 0 2 0 0 0 0 0 100 7 0 0 0 112 51 110 0 1 4 0 0 0 0 0 100 March 4, 2026 at 01:16:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 118 0 0 0 0 303 0 1 0 99 1 0 0 0 16 2 14 0 1 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 3 0 0 14 48 22 44 1 0 0 0 586 0 0 0 100 4 0 0 10 212 104 6 1 0 0 0 259 0 0 0 100 5 0 0 3 211 103 34 1 0 1 0 761 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 124 0 0 0 0 317 0 1 0 99 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 294 0 0 0 100 3 0 0 14 49 23 44 0 0 0 0 588 0 0 0 100 4 0 0 10 227 110 18 0 1 0 0 266 0 0 0 100 5 0 0 3 217 103 42 2 1 3 0 771 0 1 0 99 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 116 0 0 0 0 304 0 1 0 99 1 0 0 0 15 2 8 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 10 0 1 1 0 294 0 0 0 100 3 1 0 14 48 22 44 1 0 1 0 637 0 0 0 99 4 0 0 11 219 111 6 0 0 0 0 259 0 0 0 100 5 0 0 2 211 103 34 0 0 0 0 762 0 0 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 112 1 0 0 0 301 0 1 0 98 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 12 2 6 1 1 0 0 294 0 0 0 100 3 0 0 14 50 23 48 1 1 0 0 587 0 0 0 100 4 0 0 9 216 108 6 0 0 0 0 259 0 0 0 100 5 0 0 4 211 103 34 1 0 1 0 762 0 1 0 99 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 110 52 106 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:16:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 116 0 0 2 0 303 0 2 0 98 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 3 0 0 14 51 22 50 1 0 3 0 588 0 0 0 100 4 0 0 10 214 106 6 1 0 0 0 259 0 0 0 100 5 0 0 3 214 104 38 1 0 3 0 762 0 1 0 99 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 109 51 106 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:16:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 112 0 0 0 0 301 0 1 0 99 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 3 0 0 14 49 22 46 0 0 0 0 588 0 0 0 100 4 0 0 10 219 107 14 0 1 0 0 259 0 0 0 100 5 0 0 3 211 103 34 1 0 1 0 761 0 1 0 99 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 127 0 1 0 0 316 0 2 0 98 1 0 0 0 14 2 8 0 1 0 0 0 0 0 0 100 2 0 0 0 14 4 10 0 0 0 0 296 0 0 0 100 3 0 0 14 47 22 44 0 0 0 0 587 0 0 0 100 4 0 0 9 223 107 18 0 0 0 0 265 0 0 0 100 5 0 0 4 218 103 46 1 1 4 0 770 0 1 0 99 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 108 1 1 1 0 301 0 2 0 98 1 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 15 2 10 1 1 1 0 294 0 0 0 100 3 0 0 14 49 22 44 1 0 0 0 586 0 0 0 100 4 0 0 10 215 107 6 0 0 0 0 259 0 0 0 100 5 0 0 3 211 103 34 1 0 0 0 762 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 110 52 106 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:16:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 115 0 1 0 0 303 0 1 0 98 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 14 3 6 0 0 0 0 295 0 0 0 100 3 0 0 14 48 22 46 0 1 0 0 587 0 0 0 100 4 0 0 12 217 109 6 1 0 0 0 258 0 0 0 100 5 0 0 1 213 103 36 1 0 3 0 762 0 0 0 99 6 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 109 51 106 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:16:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 120 0 3 0 0 301 0 1 0 99 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 14 17 5 12 1 1 0 0 568 0 0 0 100 4 0 0 11 255 128 44 0 1 0 0 278 0 0 0 100 5 0 0 2 214 104 38 1 0 0 0 762 0 0 0 99 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 110 51 106 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 105 89 0 2 1 0 304 0 1 0 99 1 0 0 0 42 2 34 0 1 0 0 0 0 0 0 100 2 0 0 0 8 1 4 0 1 0 0 294 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 567 0 0 0 100 4 0 0 10 256 128 46 0 0 0 0 279 0 0 0 100 5 0 0 3 211 103 34 1 0 1 0 762 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 104 130 1 0 4 0 318 0 1 0 99 1 0 0 0 14 2 8 0 1 1 0 0 0 0 0 100 2 0 0 0 12 2 8 1 1 0 0 294 0 0 0 100 3 0 0 14 7 2 4 1 0 0 0 567 0 0 0 100 4 0 0 9 246 120 32 1 0 2 0 273 0 0 0 100 5 0 0 4 237 113 64 1 1 3 0 780 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 1 0 99 March 4, 2026 at 01:16:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 114 0 0 0 0 303 0 1 0 99 1 0 0 0 13 2 6 0 1 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 3 0 0 14 12 2 14 0 1 1 0 567 0 0 0 100 4 0 0 9 215 107 6 1 0 0 0 259 0 0 0 100 5 0 0 4 251 123 74 1 0 1 0 783 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 1 0 99 March 4, 2026 at 01:16:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 114 0 0 0 0 301 0 1 0 99 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 3 0 0 14 10 3 6 1 0 0 0 568 0 0 0 100 4 0 0 9 215 107 6 0 0 0 0 259 0 0 0 100 5 0 0 4 251 123 74 1 0 0 0 781 0 1 0 99 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 110 52 106 0 0 0 0 1 0 1 0 99 March 4, 2026 at 01:16:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 116 0 0 0 0 304 0 1 0 99 1 0 0 0 14 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 4 1 0 0 0 294 0 0 0 100 3 0 0 14 11 2 10 0 0 1 0 567 0 0 0 100 4 0 0 9 218 107 12 0 1 1 0 259 0 0 0 100 5 0 0 4 254 124 78 1 0 1 0 781 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 110 51 106 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 108 1 1 0 0 301 0 1 0 99 1 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 14 2 9 0 2 1 0 294 0 0 0 100 3 0 0 14 8 2 4 1 0 0 0 567 0 0 0 100 4 0 0 10 216 105 10 0 0 0 0 259 0 0 0 100 5 0 0 3 255 122 84 1 1 1 0 783 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 1 0 99 March 4, 2026 at 01:16:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 105 124 0 0 0 0 320 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 21 4 16 0 0 0 0 296 0 0 0 100 3 0 0 14 8 2 6 0 1 0 0 567 0 0 0 100 4 0 0 10 227 110 16 1 0 0 0 265 0 0 0 100 5 0 0 3 256 123 82 1 0 1 0 789 0 1 0 99 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 301 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 294 0 0 0 100 3 0 0 14 10 3 6 1 0 0 0 567 0 0 0 100 4 0 0 9 212 104 6 0 0 0 0 259 0 0 0 100 5 0 0 4 253 123 76 1 0 1 0 783 0 1 0 99 6 0 0 0 11 0 10 0 1 1 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 114 0 0 0 0 304 0 1 0 99 1 0 0 0 13 2 10 0 0 0 0 18 0 0 0 100 2 0 0 0 22 3 18 1 0 0 0 304 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 567 0 0 0 100 4 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 5 0 0 3 252 123 74 1 0 1 0 781 0 1 0 99 6 0 0 0 7 0 2 0 0 3 0 0 0 0 0 100 7 0 0 0 112 51 112 0 1 3 0 0 0 0 0 100 March 4, 2026 at 01:16:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 1 0 0 0 301 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 294 0 0 0 100 3 0 0 14 11 3 10 1 0 0 0 566 0 0 0 100 4 0 0 9 212 104 6 0 0 0 0 259 0 0 0 100 5 0 0 4 255 124 78 1 0 1 0 782 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 118 0 1 0 0 303 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 294 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 568 0 0 0 100 4 0 0 9 213 105 6 1 0 0 0 258 0 0 0 100 5 0 0 4 252 123 74 2 0 0 0 782 0 1 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 110 51 106 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:16:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 110 0 0 1 0 301 0 1 0 99 1 0 0 0 20 3 22 0 2 1 0 14 0 0 0 100 2 0 0 0 16 1 12 0 0 0 0 294 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 567 0 0 0 100 4 0 0 10 223 107 14 0 0 0 0 264 0 0 0 100 5 1 0 3 256 123 82 1 0 3 0 786 0 1 0 99 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 103 108 0 0 0 0 303 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 16 1 10 1 0 0 0 294 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 567 0 0 0 100 4 0 0 10 213 105 6 0 0 0 0 259 0 0 0 100 5 0 0 3 249 122 70 1 0 0 0 781 0 1 0 99 6 0 0 0 8 1 4 0 1 0 0 2 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 84 1 0 0 0 301 0 1 0 99 1 0 0 0 15 3 10 0 0 3 0 1 0 0 0 100 2 0 0 0 36 1 34 0 2 0 0 294 0 0 0 100 3 0 0 14 13 4 10 2 1 0 0 569 0 0 0 100 4 0 0 9 212 104 6 0 0 0 0 259 0 0 0 100 5 0 0 4 211 103 34 1 0 1 0 762 0 1 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 110 52 106 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:16:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 42 0 2 0 0 303 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 82 1 75 0 0 0 0 294 0 0 0 100 3 0 0 14 13 3 10 0 0 0 0 566 0 0 0 100 4 0 0 8 218 104 18 0 2 1 0 259 0 0 0 100 5 0 0 5 214 104 38 1 0 1 0 762 0 0 0 99 6 0 0 0 44 19 38 0 0 0 0 19 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 109 0 1 0 0 301 0 1 0 99 1 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 13 1 6 0 1 0 0 294 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 567 0 0 0 100 4 0 0 11 214 105 8 1 0 0 0 259 0 0 0 100 5 0 0 2 211 103 34 1 0 1 0 762 0 1 0 99 6 0 0 0 48 20 42 1 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 116 0 0 0 0 303 0 1 0 99 1 0 0 0 24 6 20 0 0 0 0 14 0 0 0 100 2 0 0 0 13 3 8 1 0 0 0 296 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 567 0 0 0 100 4 0 0 10 229 109 20 0 0 0 0 265 0 0 0 100 5 0 0 3 220 103 50 1 1 4 0 767 0 0 0 99 6 0 0 0 47 21 42 0 0 0 0 21 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 111 1 1 1 0 301 0 1 0 99 1 0 0 0 15 3 8 0 0 0 0 1 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 14 8 2 4 2 0 0 0 567 0 0 0 100 4 0 0 11 219 109 9 0 1 0 0 259 0 0 0 100 5 0 0 2 213 103 36 1 0 2 0 762 0 1 0 99 6 0 0 0 50 20 50 0 1 0 0 20 0 0 0 100 7 0 0 0 110 52 106 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:16:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 117 0 2 0 0 303 0 1 0 99 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 295 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 567 0 0 0 100 4 0 0 10 219 109 8 0 1 2 0 259 0 0 0 100 5 0 0 3 211 103 34 1 0 1 0 762 0 0 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 115 0 3 1 0 301 0 1 0 99 1 0 0 0 17 2 10 0 1 2 0 0 0 0 0 100 2 0 0 0 8 1 4 0 1 0 0 294 0 0 0 100 3 0 0 14 9 2 8 0 0 0 0 567 0 0 0 100 4 0 0 9 219 110 6 1 0 0 0 259 0 0 0 100 5 0 0 4 214 104 38 1 0 0 0 762 0 0 0 99 6 0 0 0 49 20 44 0 0 2 0 20 0 0 0 100 7 0 0 0 111 51 108 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:16:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 116 0 0 1 0 303 0 1 0 99 1 0 0 0 18 2 16 0 1 0 0 0 0 0 0 100 2 0 0 0 10 2 4 1 0 0 0 294 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 567 0 0 0 100 4 0 0 9 221 113 6 0 0 0 0 259 0 0 0 100 5 0 0 4 211 103 34 1 0 1 0 762 0 0 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 109 1 1 0 0 301 0 1 0 99 1 0 0 0 24 4 20 0 2 0 0 7 0 0 0 100 2 0 0 0 11 2 8 0 1 0 0 294 0 0 0 100 3 0 0 14 9 2 4 2 0 0 0 567 0 0 0 100 4 0 0 10 219 107 14 0 0 0 0 268 0 0 0 100 5 0 0 3 216 103 42 1 0 0 0 770 0 0 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 1 0 99 March 4, 2026 at 01:16:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 112 0 0 0 0 303 0 1 0 99 1 0 0 0 15 2 8 0 0 2 0 0 0 0 0 100 2 0 0 0 12 3 8 0 1 1 0 294 0 0 0 100 3 0 0 14 8 2 6 0 1 0 0 567 0 0 0 100 4 0 0 10 214 106 6 0 0 0 0 259 0 0 0 100 5 0 0 3 211 103 34 1 0 2 0 762 0 0 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 1 0 99 March 4, 2026 at 01:16:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 0 0 0 0 301 0 1 0 99 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 12 3 6 1 0 0 0 294 0 0 0 100 3 0 0 14 11 3 8 0 0 0 0 568 0 0 0 100 4 0 0 11 217 105 14 1 1 0 0 259 0 0 0 100 5 0 0 2 211 103 34 1 0 1 0 762 0 1 0 99 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 110 52 106 0 0 0 0 1 0 1 0 99 March 4, 2026 at 01:16:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 112 0 0 0 0 303 0 1 0 99 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 14 9 2 8 0 0 0 0 568 0 0 0 100 4 0 0 9 219 111 6 0 0 0 0 259 0 0 0 100 5 0 0 4 214 104 7 1 0 0 0 600 0 0 0 99 6 0 0 0 47 21 42 0 0 0 0 46 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 107 1 2 1 0 301 0 1 0 99 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 16 3 10 0 2 0 0 294 0 0 0 100 3 0 0 14 8 2 4 2 0 0 0 567 0 0 0 100 4 0 0 11 220 109 10 0 0 1 0 260 0 0 0 100 5 0 0 2 212 102 43 0 1 0 0 161 0 0 0 100 6 0 0 0 46 20 40 1 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 1 0 99 March 4, 2026 at 01:16:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 103 106 0 0 0 0 303 0 1 0 99 1 0 0 0 18 2 16 0 1 0 0 5 0 0 0 100 2 0 0 0 22 4 18 0 0 0 0 296 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 566 0 0 0 100 4 0 0 9 235 118 22 0 0 0 0 275 0 0 0 100 5 0 0 4 218 103 44 1 0 1 0 769 0 0 0 99 6 0 0 0 52 21 52 0 1 0 0 21 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 104 0 0 0 0 301 0 2 0 98 1 0 0 0 17 3 14 0 1 0 0 0 0 0 0 100 2 0 0 0 13 2 6 0 0 0 0 294 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 567 0 0 0 100 4 0 0 11 217 109 6 1 0 0 0 259 0 0 0 100 5 0 0 2 211 103 34 1 0 0 0 762 0 0 0 99 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 110 0 0 0 0 303 0 1 0 99 1 0 0 0 20 3 14 0 0 0 0 0 0 0 0 100 2 0 0 0 13 3 8 1 1 0 0 295 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 566 0 0 0 100 4 0 0 12 214 106 6 0 0 0 0 259 0 0 0 100 5 0 0 1 211 103 34 1 0 2 0 763 0 0 0 99 6 0 0 0 47 20 42 0 0 1 0 20 0 0 0 100 7 0 0 0 111 51 110 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:16:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 114 1 1 1 0 301 0 1 0 99 1 0 0 0 19 2 14 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 14 10 2 8 2 0 0 0 568 0 0 0 100 4 0 0 10 217 108 8 0 0 0 0 260 0 0 0 100 5 0 0 3 214 104 38 1 0 1 0 761 0 1 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 110 51 106 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 109 0 1 0 0 303 0 1 0 99 1 0 0 0 18 2 10 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 567 0 0 0 100 4 0 0 10 214 106 6 0 0 0 0 259 0 0 0 100 5 0 0 3 211 103 34 1 0 0 0 762 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 112 0 0 1 0 301 0 1 0 99 1 0 0 0 22 2 20 0 2 0 0 5 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 294 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 566 0 0 0 100 4 0 0 9 226 111 20 1 1 1 0 272 0 0 0 100 5 0 0 4 215 103 40 1 0 3 0 769 0 1 0 99 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 111 0 1 1 0 303 0 1 0 99 1 0 0 0 15 2 8 0 0 0 0 0 0 0 0 100 2 0 0 0 14 3 9 1 2 1 0 294 0 0 0 100 3 0 0 14 8 2 6 0 1 0 0 568 0 0 0 100 4 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 5 0 0 2 211 103 34 1 0 1 0 762 0 0 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 111 1 0 0 0 301 0 1 0 99 1 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 14 10 3 6 2 0 0 0 568 0 0 0 100 4 0 0 8 215 106 8 0 0 0 0 260 0 0 0 100 5 0 0 5 212 103 34 2 0 1 0 762 0 1 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 110 52 106 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:16:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 104 40 0 2 0 0 303 0 1 0 99 1 0 0 0 12 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 8 0 2 0 0 294 0 0 0 100 3 0 0 14 14 3 14 0 1 2 0 567 0 0 0 100 4 0 0 8 219 105 18 0 2 1 0 259 0 0 0 100 5 0 0 5 217 105 44 0 2 0 0 763 0 1 0 99 6 0 0 0 46 20 42 0 1 0 0 20 0 0 0 100 7 0 0 0 187 52 184 0 3 1 0 0 0 0 0 100 March 4, 2026 at 01:16:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 6 0 1 0 0 301 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 14 8 2 6 0 1 0 0 567 0 0 0 100 4 0 0 14 214 104 8 1 0 1 0 259 0 0 0 100 5 0 0 0 218 104 42 1 2 3 0 761 0 0 0 99 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 212 51 209 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:16:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 30 0 1 0 0 303 0 1 0 99 1 0 0 0 17 2 14 0 2 0 0 5 0 0 0 100 2 0 0 0 18 3 13 1 1 0 0 296 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 567 0 0 0 100 4 0 0 9 227 111 20 0 0 1 0 275 0 0 0 100 5 0 0 4 217 103 42 2 0 4 0 769 0 1 0 99 6 0 0 0 47 21 42 0 0 0 0 21 0 0 0 100 7 0 0 0 190 51 186 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:16:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 39 1 4 0 0 301 0 1 0 99 1 0 0 0 13 3 6 0 1 0 0 0 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 3 0 0 14 10 3 6 2 0 0 0 566 0 0 0 100 4 0 0 11 215 105 8 0 0 0 0 260 0 0 0 100 5 0 0 2 214 103 36 2 1 2 0 763 0 1 0 99 6 0 0 0 46 20 42 0 1 2 0 20 0 0 0 100 7 0 0 0 188 52 180 0 3 0 0 21 0 0 0 100 March 4, 2026 at 01:16:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 123 0 1 0 0 303 0 1 0 99 1 0 0 0 12 2 8 0 0 0 0 18 0 0 0 100 2 0 0 0 16 3 14 0 1 0 0 304 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 568 0 0 0 100 4 0 0 9 212 104 6 0 0 0 0 259 0 0 0 100 5 0 0 4 208 102 34 0 0 1 0 761 0 0 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 110 51 106 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 110 0 0 0 0 301 0 1 0 99 1 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 3 0 0 14 11 3 10 0 0 0 0 567 0 0 0 100 4 0 0 10 213 104 6 1 0 0 0 259 0 0 0 100 5 0 0 3 213 104 38 0 0 1 0 762 0 0 0 99 6 0 0 0 48 20 42 1 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 0 0 0 0 303 0 1 0 99 1 0 0 0 13 2 8 0 1 0 0 0 0 0 0 100 2 0 0 0 12 2 6 1 0 0 0 294 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 567 0 0 0 100 4 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 5 0 0 3 211 103 34 1 0 1 0 762 0 0 0 100 6 0 0 0 43 19 38 0 0 0 0 19 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 1 0 0 0 301 0 2 0 98 1 0 0 0 19 2 14 0 0 1 0 5 0 0 0 100 2 0 0 0 15 2 14 0 1 0 0 295 0 0 0 100 3 0 0 14 11 3 6 2 0 0 0 567 0 0 0 100 4 0 0 10 224 109 18 0 0 0 0 272 0 0 0 100 5 0 0 3 217 103 42 2 0 3 0 769 0 1 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 1 0 99 March 4, 2026 at 01:16:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 112 0 0 0 0 303 0 1 0 99 1 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 4 0 0 0 0 294 0 0 0 100 3 0 0 14 9 3 7 0 1 0 0 568 0 0 0 100 4 0 0 12 215 106 8 0 0 0 0 261 0 0 0 100 5 0 0 1 210 103 34 0 0 2 0 762 0 1 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 1 0 99 March 4, 2026 at 01:16:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 106 0 1 0 0 301 0 1 0 99 1 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 16 2 11 0 2 1 0 294 0 0 0 100 3 0 0 14 18 4 18 0 1 0 0 567 0 0 0 100 4 0 0 7 214 104 8 1 1 0 0 259 0 0 0 100 5 0 0 7 212 103 34 2 0 2 0 762 0 0 0 99 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 110 52 106 0 0 0 0 1 0 1 0 99 March 4, 2026 at 01:16:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 303 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 10 1 0 0 0 294 0 0 0 100 3 0 0 14 18 4 18 0 2 1 0 572 0 0 0 100 4 0 0 11 222 106 22 0 2 0 0 261 0 0 0 100 5 0 0 2 213 104 38 0 0 1 0 762 0 0 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 104 1 0 0 0 301 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 294 0 0 0 100 3 0 0 14 11 4 8 1 0 0 0 567 0 0 0 100 4 0 0 9 221 110 10 0 0 0 0 260 0 0 0 100 5 0 0 4 210 103 34 0 0 0 0 762 0 1 0 99 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 1 0 99 March 4, 2026 at 01:17:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 109 0 1 0 0 303 0 1 0 99 1 0 0 0 16 2 12 0 0 0 0 5 0 0 0 100 2 0 0 0 21 3 14 0 0 0 0 296 0 0 0 100 3 0 0 14 13 4 8 1 0 0 0 567 0 0 0 100 4 0 0 14 235 114 24 0 0 2 0 273 0 0 0 100 5 0 0 7 221 103 50 1 1 2 0 769 0 0 0 99 6 0 0 0 48 21 42 0 0 0 0 21 0 0 0 100 7 0 0 0 109 51 104 0 0 0 0 0 0 1 0 99 March 4, 2026 at 01:17:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 110 0 0 0 0 301 0 1 0 99 1 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 14 11 4 8 0 0 0 0 568 0 0 0 100 4 0 0 9 217 106 8 1 0 0 0 259 0 0 0 100 5 0 0 4 213 103 36 1 0 2 0 762 0 0 0 99 6 0 0 0 48 20 46 0 1 2 0 20 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 0 2 0 0 303 0 1 0 99 1 4 0 0 26 2 22 0 0 1 0 31 0 0 0 100 2 0 0 1 17 2 16 1 1 0 0 307 0 0 0 100 3 1 0 14 21 4 24 0 4 2 0 642 0 0 0 100 4 1306 0 11 255 130 44 3 0 0 0 496 1 1 0 98 5 0 0 5 218 103 48 2 2 1 0 802 0 1 0 99 6 0 0 3 21 6 16 0 0 0 0 13 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:17:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 101 196 1 6 48 0 301 0 2 0 98 1 0 0 0 49 2 71 0 4 46 0 0 0 0 0 100 2 1 0 0 54 3 81 0 5 41 0 311 0 0 0 100 3 0 0 14 102 56 105 9 4 62 0 566 0 1 0 99 4 87 0 9 324 166 95 0 4 59 0 308 0 1 0 99 5 0 0 4 261 104 124 1 0 38 0 767 0 1 0 99 6 0 0 0 36 0 59 0 2 45 0 0 0 0 0 100 7 0 0 0 142 51 172 0 5 54 0 0 0 0 0 100