March 4, 2026 at 01:07:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 808 0 171 4405 144 5723 68 339 1463 14 6243 11 11 0 78 1 997 0 64 1212 25 5872 21 495 1612 27 11733 5 8 0 88 2 1256 0 150 1067 19 3763 15 410 1463 15 8996 4 6 0 90 3 797 0 127 1347 518 3029 17 400 1519 27 6422 5 6 0 89 4 917 0 450 1070 14 3162 21 376 1630 20 6004 6 7 0 86 5 863 0 121 3812 2977 3212 19 367 1661 22 7825 3 8 0 89 6 960 0 137 1363 17 3576 27 439 1558 17 8983 14 8 0 78 7 1047 0 50 2217 18 5447 34 383 1503 14 5411 6 9 0 86 March 4, 2026 at 01:07:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7598 0 50 2529 113 979 10 189 1670 60 2991 2 6 0 92 1 5256 0 53 611 9 836 11 137 585 58 2941 2 30 0 67 2 5295 0 27 338 3 787 3 170 2083 87 1675 1 3 0 96 3 5371 0 12 588 239 1031 7 157 1907 72 2235 3 4 0 93 4 4347 0 11 501 26 1121 5 174 2127 58 1858 2 4 0 94 5 946 0 20 305 16 612 4 146 1884 64 954 0 2 0 98 6 9820 0 85 578 32 762 32 126 908 63 3263 23 35 0 42 7 9350 0 60 383 35 613 21 136 1732 65 3055 21 8 0 71 March 4, 2026 at 01:07:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2123 105 58 6 4 21 0 1058 0 9 0 91 1 40 0 0 125 2 113 7 3 20 0 588 0 9 0 91 2 0 0 0 23 1 18 4 3 20 0 0 0 8 0 92 3 0 0 0 61 37 62 0 16 174 0 49 0 1 0 99 4 0 0 0 120 51 104 5 2 30 0 267 0 9 0 91 5 0 0 0 16 0 5 5 1 16 0 0 0 8 0 92 6 0 0 17 259 102 135 0 23 117 0 303 0 1 0 99 7 0 0 10 222 104 8 5 3 9 0 259 0 9 0 91 March 4, 2026 at 01:07:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2205 104 294 6 75 654 0 0 0 12 0 88 1 0 0 0 102 2 232 5 82 757 0 0 0 10 0 90 2 0 0 0 159 29 287 5 73 636 0 0 0 10 0 90 3 27 0 0 439 332 288 2 91 625 0 1627 0 2 0 97 4 0 0 0 98 2 234 5 86 752 0 0 0 11 0 89 5 0 0 0 93 0 209 5 64 655 0 0 0 10 0 90 6 0 0 17 656 110 944 0 93 628 0 560 0 2 0 98 7 0 0 10 332 115 243 6 80 635 0 259 0 11 0 89 March 4, 2026 at 01:07:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 104 367 0 87 627 0 3 0 2 0 98 1 0 0 7 105 0 261 1 85 651 0 0 0 2 0 98 2 0 0 0 209 51 351 1 88 558 0 0 0 1 0 99 3 0 0 0 432 331 290 0 88 722 0 1635 0 3 0 97 4 0 0 0 102 2 256 2 88 635 0 0 0 2 0 98 5 0 0 0 99 1 248 0 80 582 0 0 0 1 0 99 6 0 0 17 637 104 934 0 101 608 0 560 0 2 0 98 7 0 0 10 299 103 248 0 89 612 0 259 0 2 0 98 March 4, 2026 at 01:07:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2215 103 335 2 62 406 0 10 0 2 0 98 1 0 0 0 338 1 745 0 69 413 0 292 0 1 0 99 2 0 0 0 168 33 297 1 64 526 0 11 0 1 0 99 3 0 0 0 396 267 298 3 71 482 0 1346 0 2 0 98 4 0 0 0 106 1 230 3 74 410 0 0 0 1 0 99 5 0 0 0 130 5 256 2 72 467 0 8 0 1 0 99 6 0 0 17 310 104 231 3 63 440 0 559 0 1 0 99 7 0 0 10 304 104 208 2 62 382 0 259 0 1 0 99 March 4, 2026 at 01:07:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 867 0 13 2302 102 456 5 52 85 29 725 2 2 0 97 1 392 0 7 189 3 409 4 52 125 21 1901 1 2 0 98 2 8800 0 10 185 3 391 7 51 336 38 2316 4 6 0 90 3 1692 0 4 226 24 428 5 56 81 30 1563 2 2 0 96 4 263 0 7 181 8 322 3 50 71 28 851 0 1 0 98 5 196 0 5 205 31 333 0 41 54 25 506 1 1 0 98 6 410 0 41 350 103 332 5 53 194 22 1234 1 2 0 98 7 1461 0 21 335 104 230 3 25 66 17 1024 2 3 0 95 March 4, 2026 at 01:07:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2151 101 183 0 15 40 0 8 0 1 0 99 1 2 0 0 129 1 264 1 22 65 0 1127 0 1 0 99 2 1 0 7 70 3 115 0 20 57 0 1 0 1 0 99 3 30 0 0 154 73 137 1 22 87 0 612 0 1 0 99 4 0 0 0 66 2 94 0 18 58 0 18 0 0 0 100 5 1 0 2 136 50 154 1 13 30 0 14 0 0 0 100 6 2 0 31 263 103 109 0 13 43 0 568 0 0 0 100 7 0 0 10 240 104 52 0 9 41 0 310 0 0 0 100 March 4, 2026 at 01:07:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 112 0 0 0 0 2 0 1 0 99 1 6 0 0 12 1 34 2 0 1 0 1116 0 0 0 100 2 0 0 0 109 50 106 0 2 0 0 0 0 0 0 100 3 0 0 0 26 9 22 0 2 3 0 610 0 0 0 100 4 0 0 0 8 2 2 0 1 0 0 0 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 6 0 0 17 213 103 14 0 1 0 0 560 0 0 0 100 7 0 0 10 212 104 6 0 0 0 0 261 0 0 0 100 March 4, 2026 at 01:07:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 10 1 34 1 0 0 0 1114 0 0 0 100 2 0 0 0 112 53 108 0 0 0 0 1 0 0 0 100 3 0 0 0 25 10 20 0 0 4 0 608 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 17 209 103 6 0 0 7 0 559 0 0 0 100 7 0 0 10 212 104 6 0 0 0 0 261 0 0 0 100 March 4, 2026 at 01:07:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 17 2137 103 175 2 13 2 4 78 0 1 0 99 1 18 0 5 27 2 63 1 10 6 3 1177 0 1 0 99 2 291 0 0 126 54 124 1 6 9 1 119 0 0 0 100 3 19 0 7 37 10 33 0 4 6 2 634 0 0 0 100 4 10 0 3 30 3 42 4 7 3 3 37 0 0 0 100 5 16 0 0 23 11 9 0 5 5 3 15 0 0 0 100 6 31 0 24 231 103 44 3 4 7 5 610 0 1 0 99 7 5 0 10 237 105 54 0 10 11 4 315 0 0 0 100 March 4, 2026 at 01:07:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 125 0 1 0 0 0 0 1 0 99 1 0 0 1 14 1 36 1 0 0 0 1061 0 0 0 100 2 0 0 0 111 52 106 0 0 0 0 0 0 0 0 100 3 0 0 0 18 5 12 0 1 2 0 604 0 0 0 100 4 0 0 7 7 1 2 0 1 0 0 0 0 0 0 100 5 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 6 0 0 17 209 103 4 0 0 1 0 561 0 0 0 100 7 0 0 10 214 103 6 0 0 0 0 259 0 0 0 100 March 4, 2026 at 01:07:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 104 123 0 0 0 0 3 0 1 0 99 1 0 0 0 15 1 38 1 0 1 0 1057 0 0 0 100 2 0 0 0 112 52 108 0 0 1 0 0 0 0 0 100 3 0 0 0 17 5 12 0 0 4 0 599 0 0 0 100 4 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 8 0 6 0 2 1 0 0 0 0 0 100 6 0 0 17 211 103 8 0 0 0 0 559 0 0 0 100 7 0 0 10 211 103 4 0 0 0 0 259 0 0 0 100 March 4, 2026 at 01:07:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 101 116 0 0 0 0 0 0 1 0 99 1 0 0 0 16 1 44 1 1 0 0 1059 0 0 0 100 2 0 0 0 111 52 106 0 0 0 0 0 0 0 0 100 3 0 0 0 14 4 8 0 0 9 0 602 0 0 0 100 4 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 17 211 104 6 0 0 2 0 561 0 0 0 100 7 0 0 10 211 103 4 0 0 0 0 259 0 0 0 100 March 4, 2026 at 01:07:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 0 0 2 0 1 0 99 1 0 0 0 12 1 36 1 0 0 0 1057 0 0 0 100 2 0 0 0 115 52 116 0 1 0 0 0 0 0 0 100 3 0 0 0 13 4 8 0 0 6 0 598 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 17 208 103 4 0 0 3 0 561 0 0 0 100 7 0 0 10 210 103 4 0 0 0 0 259 0 0 0 100 March 4, 2026 at 01:07:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 174 0 0 2434 103 704 14 52 36 1 1529 2 2 0 96 1 106 0 0 320 1 634 16 70 59 4 2726 2 1 0 96 2 5058 0 9 407 31 707 9 42 67 6 1747 4 2 0 94 3 779 0 1 287 7 514 18 58 58 9 2198 2 1 0 96 4 235 0 0 220 2 382 11 46 36 7 1008 2 1 0 98 5 82 0 0 209 9 336 3 25 22 5 947 2 0 0 98 6 338 0 129 409 105 409 4 29 56 8 2078 2 1 0 97 7 226 0 10 467 121 463 7 23 22 2 1211 2 1 0 98 March 4, 2026 at 01:07:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 114 0 0 1 0 11 0 1 0 99 1 51 0 0 26 6 52 1 1 0 0 1136 0 0 0 99 2 0 0 0 16 2 12 0 0 0 0 2 0 0 0 100 3 0 0 0 25 6 26 0 2 1 0 609 0 0 0 100 4 0 0 0 11 2 4 0 0 3 0 9 0 0 0 100 5 0 0 0 11 1 2 0 1 0 0 1 0 0 0 100 6 2 0 31 215 106 10 0 0 0 0 572 0 0 0 100 7 0 0 10 320 154 114 0 0 0 0 272 0 0 0 100 March 4, 2026 at 01:07:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2136 103 171 0 12 60 0 0 0 1 0 99 1 0 0 0 76 7 155 1 20 74 0 1123 0 0 0 99 2 0 0 0 44 2 75 0 16 40 0 0 0 0 0 100 3 0 0 0 99 46 99 1 13 74 0 599 0 0 0 100 4 0 0 0 80 1 148 0 14 39 0 0 0 0 0 100 5 0 0 0 41 0 73 0 11 40 0 0 0 0 0 100 6 0 0 17 247 103 82 0 9 53 0 561 0 0 0 100 7 0 0 10 323 153 131 0 7 45 0 260 0 0 0 100 March 4, 2026 at 01:07:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 0 0 2 0 1 0 99 1 2 0 0 24 7 48 1 0 1 0 1137 0 0 0 99 2 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 3 0 0 0 15 5 10 0 0 1 0 600 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 17 208 103 4 0 0 0 0 560 0 0 0 100 7 0 0 10 310 153 104 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:07:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 16 2117 100 136 0 6 2 8 33 0 1 0 99 1 24 0 4 48 9 81 2 7 7 5 1183 0 0 0 99 2 286 0 2 33 3 31 1 6 12 3 125 0 0 0 100 3 1 0 2 28 5 36 4 5 3 2 627 0 0 0 100 4 32 0 7 27 1 36 1 5 2 6 59 0 0 0 99 5 10 0 5 23 3 26 0 4 2 4 27 0 0 0 100 6 11 0 17 220 104 18 1 4 9 2 581 0 0 0 100 7 2 0 10 325 154 125 1 3 1 2 293 0 0 0 100 March 4, 2026 at 01:07:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 119 0 1 1 0 3 0 1 0 99 1 0 0 0 13 2 32 1 0 1 0 1073 0 0 0 100 2 0 0 0 16 4 8 0 0 1 0 1 0 0 0 100 3 0 0 0 22 6 10 0 0 4 0 601 0 0 0 100 4 0 0 0 14 3 6 0 0 1 0 29 0 0 0 100 5 0 0 0 28 9 12 0 0 1 0 7 0 0 0 100 6 0 0 28 222 103 28 0 3 1 0 572 0 0 0 100 7 0 0 14 316 153 108 0 0 1 0 259 0 0 0 100 March 4, 2026 at 01:07:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 100 115 0 0 0 0 0 0 1 0 99 1 0 0 0 10 1 32 1 0 0 0 1070 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 0 19 6 12 1 0 6 0 603 0 0 0 100 4 0 0 0 11 2 6 0 0 0 0 9 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 6 0 0 17 214 104 10 0 0 3 0 560 0 0 0 100 7 0 0 10 315 153 110 1 1 0 0 277 0 0 0 100 March 4, 2026 at 01:07:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 101 116 0 0 0 0 2 0 1 0 99 1 0 0 0 14 1 38 1 1 3 0 1069 0 0 0 100 2 0 0 0 14 3 10 0 0 1 0 0 0 0 0 100 3 0 0 0 19 6 14 0 0 5 0 600 0 0 0 100 4 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 5 0 0 0 7 0 2 0 0 1 0 0 0 0 0 100 6 0 0 17 211 103 6 0 1 0 0 560 0 0 0 100 7 0 0 10 316 153 114 0 1 0 0 259 0 0 0 100 March 4, 2026 at 01:07:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 120 0 1 0 0 0 0 1 0 99 1 0 0 0 8 1 32 1 0 0 0 1069 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 3 0 0 0 16 5 10 1 0 1 0 602 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 17 209 103 4 1 0 1 0 560 0 0 0 100 7 0 0 10 312 153 106 0 0 0 0 259 0 0 0 100 March 4, 2026 at 01:07:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 204 0 0 3196 103 2343 58 222 153 5 8126 15 5 0 81 1 2687 0 8 1166 4 2400 62 242 159 9 10658 15 5 0 80 2 650 0 16 772 4 1447 45 156 210 6 6932 17 3 0 80 3 2860 0 0 1073 7 2209 66 217 151 6 9400 14 4 0 81 4 425 0 0 1092 2 2237 62 209 141 9 6929 14 3 0 82 5 275 0 0 916 5 1783 34 142 106 5 7408 16 3 0 81 6 206 0 422 1080 107 1838 49 155 208 2 8305 14 4 0 82 7 137 0 11 1226 141 1968 38 181 94 3 7837 13 3 0 84 March 4, 2026 at 01:07:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 27 4836 106 5517 79 610 387 0 22722 44 11 0 45 1 23 0 7 2741 8 5461 85 526 475 0 23945 45 10 0 45 2 24 0 0 2748 12 5376 51 532 370 0 20165 37 9 0 54 3 9 0 14 2810 13 5698 79 510 309 0 22131 43 9 0 48 4 24 0 0 2810 7 5530 73 497 376 0 21826 42 9 0 49 5 16 0 0 2489 17 4932 59 463 412 0 19483 34 9 0 57 6 74 0 1305 2413 108 4766 64 416 361 0 19915 42 9 0 49 7 17 0 3 2738 111 5133 53 394 350 0 19747 40 8 0 52 March 4, 2026 at 01:07:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 4926 106 5620 56 543 327 0 22682 42 11 0 48 1 15 0 4 3012 11 6153 74 581 407 0 24081 42 10 0 48 2 5 0 0 2744 9 5599 71 524 376 0 20933 39 9 0 52 3 7 0 7 2820 11 5777 90 567 557 0 24720 43 10 0 47 4 10 0 0 3033 9 6199 58 514 355 0 21795 41 9 0 50 5 14 0 14 2638 16 5266 62 488 358 0 21258 40 9 0 51 6 18 0 1347 2108 109 4126 77 382 413 0 18843 47 8 0 44 7 3 0 3 2415 112 4360 57 369 518 0 21124 42 9 0 50 March 4, 2026 at 01:07:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 4901 108 5755 134 617 374 0 21198 43 11 0 47 1 16 0 0 3154 9 6470 137 675 475 0 24434 42 11 0 47 2 19 0 14 2791 11 5604 118 548 358 0 22379 37 9 0 54 3 15 0 0 2702 56 5426 99 536 500 0 19495 42 9 0 49 4 11 0 0 2795 14 5655 118 545 422 0 22220 40 9 0 51 5 40 0 7 2572 13 5222 101 453 404 0 23376 45 9 0 46 6 13 0 1277 2372 108 4749 102 434 401 0 20862 45 9 0 46 7 3 0 3 2329 112 4254 96 422 533 0 20338 40 9 0 51 March 4, 2026 at 01:07:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 4841 111 5594 69 516 395 0 20818 43 11 0 47 1 6 0 21 2685 9 5353 62 515 318 0 20737 43 9 0 48 2 12 0 32 2844 8 5702 59 551 357 0 21511 42 10 0 48 3 14 0 0 2656 10 5257 66 487 429 0 19700 43 9 0 48 4 7 0 0 2611 5 5212 60 471 378 0 19509 41 9 0 50 5 4 0 0 2426 20 4816 47 414 283 0 19416 39 8 0 52 6 6 0 1362 2698 116 5436 65 471 368 0 20459 38 10 0 52 7 6 0 3 2394 105 4278 43 314 353 0 18118 43 8 0 49 March 4, 2026 at 01:07:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 4551 109 4925 103 523 280 0 17302 43 10 0 47 1 12 0 7 2917 11 5773 120 565 294 0 19513 44 10 0 46 2 0 0 14 2578 7 5102 94 515 305 0 19063 38 9 0 53 3 17 0 0 2547 13 5096 90 473 291 0 16982 42 8 0 50 4 5 0 0 2566 17 5000 127 465 315 0 20319 42 9 0 49 5 7 0 0 2364 10 4563 86 408 269 0 18734 40 8 0 52 6 7 0 1262 2255 120 4359 81 404 365 0 19222 41 9 0 49 7 5 0 3 2268 107 4035 68 351 347 0 17971 42 8 0 50 March 4, 2026 at 01:07:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 5079 108 6057 103 703 394 0 21693 40 11 0 49 1 3 0 7 2949 8 6069 92 653 472 0 22975 41 10 0 49 2 3 0 0 2504 9 4995 78 489 338 0 21048 41 9 0 50 3 4 0 0 2719 10 5466 103 551 490 0 23583 42 10 0 49 4 15 0 0 2084 8 4100 85 382 376 0 19036 51 8 0 42 5 3 0 0 2730 20 5376 76 482 368 0 21579 38 9 0 53 6 7 0 1375 2522 115 5061 72 464 347 0 21354 42 10 0 49 7 4 0 3 2685 116 4942 72 439 409 0 19614 37 8 0 55 March 4, 2026 at 01:07:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 4768 105 5274 67 509 324 0 21617 44 10 0 46 1 2 0 0 2990 7 6106 68 593 507 0 22266 39 10 0 51 2 5 0 0 2958 6 6011 73 566 262 0 22029 37 10 0 54 3 3 0 7 2908 17 5945 86 568 582 0 21574 36 9 0 55 4 1 0 14 2406 8 4860 74 519 347 0 21458 45 9 0 46 5 2 0 0 2461 8 4853 58 423 505 0 21377 41 9 0 50 6 11 0 1306 2570 116 5169 58 446 330 0 21506 45 9 0 45 7 2 0 2 2482 108 4576 59 406 683 0 21860 44 9 0 47 March 4, 2026 at 01:07:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 4538 107 4839 109 552 555 0 21567 44 11 0 45 1 9 0 0 2993 14 6065 105 608 340 0 19759 42 10 0 48 2 6 0 0 2472 9 4913 100 456 437 0 19656 40 9 0 51 3 4 0 0 2986 55 5959 96 542 392 0 18868 38 9 0 54 4 2 0 7 2766 15 5487 85 516 538 0 20059 40 9 0 52 5 4 0 0 2516 3 4989 69 425 371 0 19217 40 8 0 52 6 2 0 1389 2666 117 5410 93 503 500 0 21076 39 10 0 51 7 10 0 3 2325 109 4208 83 381 456 0 20135 46 8 0 46 March 4, 2026 at 01:07:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 3305 104 2412 73 271 171 0 9291 21 5 0 74 1 137 0 0 1566 4 3103 89 323 144 1 9705 16 5 0 79 2 72 0 28 1310 7 2697 64 265 165 0 10143 19 4 0 77 3 102 0 0 1058 4 1981 81 192 155 1 10290 24 4 0 72 4 9 0 7 1245 11 2397 79 273 191 0 9861 17 4 0 79 5 51 0 0 1282 29 2457 80 232 145 0 9110 16 4 0 80 6 53 0 661 1286 109 2330 67 230 164 0 10046 16 5 0 79 7 0 0 3 1170 107 1814 55 170 175 0 10677 20 4 0 75 March 4, 2026 at 01:07:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 116 0 2 0 0 4 0 1 0 99 1 0 0 0 12 1 6 0 1 0 0 0 0 0 0 100 2 0 0 0 10 1 36 1 0 1 0 1141 0 0 0 100 3 0 0 0 16 1 10 0 1 0 0 3 0 0 0 100 4 0 0 7 32 14 30 0 1 6 0 884 0 0 0 100 5 0 0 0 11 1 10 0 1 0 0 7 0 0 0 100 6 0 0 17 225 111 20 0 0 1 0 564 0 0 0 100 7 0 0 3 298 145 92 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:07:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 110 0 1 0 0 0 0 1 0 99 1 0 0 0 16 1 18 0 1 0 0 7 0 0 0 100 2 0 0 0 11 1 34 1 0 0 0 1133 0 0 0 100 3 0 0 0 14 0 10 0 0 0 0 0 0 0 0 100 4 0 0 7 27 11 22 1 1 2 0 870 0 0 0 100 5 0 0 0 19 8 8 0 1 1 0 1 0 0 0 100 6 0 0 17 222 106 20 1 0 4 0 573 0 0 0 100 7 0 0 3 314 152 108 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 104 0 0 0 0 1 0 1 0 99 1 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 34 1 0 1 0 1129 0 0 0 100 3 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 4 0 0 7 28 12 24 1 1 6 0 869 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 2 0 0 0 100 6 0 0 17 210 104 6 0 0 2 0 561 0 0 0 100 7 0 0 3 309 152 102 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 14 2159 102 190 1 17 58 5 16 0 1 0 99 1 20 0 0 72 1 119 3 20 47 4 33 0 0 0 99 2 282 0 4 70 1 147 2 19 63 5 1259 0 1 0 99 3 4 0 6 104 46 94 0 17 59 0 16 0 0 0 100 4 9 0 9 75 8 106 2 10 48 3 923 0 0 0 100 5 15 0 6 51 4 78 0 16 42 3 43 0 0 0 100 6 19 0 24 263 106 105 0 20 55 9 603 0 1 0 99 7 10 0 9 396 152 263 0 13 32 3 33 0 0 0 100 March 4, 2026 at 01:07:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 101 104 0 2 0 0 0 0 1 0 99 1 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 2 0 0 0 10 1 36 0 2 0 0 1074 0 0 0 100 3 0 0 0 19 0 18 0 1 0 0 0 0 0 0 100 4 0 0 7 19 6 12 0 0 1 0 861 0 0 0 100 5 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 6 0 0 17 211 104 6 0 0 0 0 561 0 0 0 100 7 0 0 3 315 152 108 0 3 0 0 0 0 0 0 100 March 4, 2026 at 01:07:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2133 128 160 0 1 0 0 0 0 1 0 99 1 0 0 0 12 1 8 0 1 0 0 0 0 0 0 100 2 0 0 0 13 2 36 1 1 0 0 1070 0 0 0 100 3 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 4 0 0 7 14 5 8 0 0 2 0 861 0 0 0 100 5 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 6 0 0 17 213 104 6 1 0 9 0 559 0 0 0 100 7 0 0 10 258 126 51 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:07:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2132 124 154 0 3 1 0 0 0 1 0 99 1 0 0 0 16 3 6 0 0 1 0 1 0 0 0 100 2 0 0 0 12 2 32 1 0 2 0 1069 0 0 0 100 3 0 0 0 23 2 16 0 0 1 0 9 0 0 0 100 4 0 0 7 34 8 30 1 1 4 0 889 0 0 0 100 5 0 0 0 20 8 6 0 0 1 0 0 0 0 0 100 6 0 0 21 218 105 14 0 0 7 0 567 0 0 0 100 7 0 0 7 271 129 67 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:07:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 94 0 0 0 0 0 0 1 0 99 1 0 0 0 18 1 14 0 2 0 0 0 0 0 0 100 2 0 0 0 8 1 32 1 0 0 0 1069 0 0 0 100 3 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 4 0 0 7 19 6 14 2 2 1 0 949 0 0 0 100 5 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 6 0 0 17 215 104 16 0 1 1 0 560 0 0 0 100 7 0 0 3 309 152 102 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:07:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 990 0 0 3064 101 1753 54 348 163 9 7305 14 4 0 82 1 464 0 0 1043 7 1873 61 366 234 6 8981 12 4 0 84 2 4913 0 9 920 13 1570 44 278 173 7 8857 13 4 0 83 3 1123 0 1 990 85 1677 41 330 175 11 8507 11 3 0 85 4 498 0 0 819 7 1368 35 284 212 5 9012 13 3 0 84 5 255 0 7 688 12 1121 23 208 165 4 6614 9 2 0 89 6 778 0 717 849 104 1340 41 281 165 4 8246 12 3 0 85 7 743 0 17 975 128 1349 24 215 215 1 7145 10 3 0 88 March 4, 2026 at 01:07:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 352 0 14 3835 105 2954 81 535 170 0 14452 27 6 0 66 1 413 0 0 1728 11 3113 79 618 220 0 17239 24 6 0 70 2 348 0 0 1567 3 2678 50 478 142 0 15164 22 5 0 72 3 250 0 0 1691 41 2901 77 570 282 0 19057 23 5 0 71 4 137 0 0 1565 7 2684 45 548 197 0 16409 20 5 0 75 5 320 0 0 1434 16 2335 38 399 171 0 13362 20 4 0 76 6 204 0 1424 1366 109 2370 51 487 141 0 16515 21 5 0 73 7 254 0 30 1447 111 2057 26 353 226 0 12152 22 4 0 74 March 4, 2026 at 01:07:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 56 0 0 3883 108 2982 90 584 161 0 15035 28 6 0 66 1 108 0 0 1760 6 3040 90 609 186 0 18196 26 6 0 68 2 82 0 14 1633 13 2692 66 493 248 0 15372 23 5 0 72 3 57 0 0 1661 6 3045 82 615 216 0 21022 24 6 0 70 4 119 0 0 1644 13 2823 57 558 181 0 16793 24 5 0 71 5 99 0 0 1386 15 2199 43 407 203 0 14320 19 4 0 77 6 62 0 1427 1471 115 2580 66 497 228 0 16474 20 5 0 74 7 127 0 3 1371 106 1926 26 347 246 0 14312 19 4 0 78 March 4, 2026 at 01:07:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 3947 109 3187 102 629 251 0 15512 23 7 0 70 1 114 0 0 1825 10 3184 113 660 288 0 19082 26 6 0 68 2 6 0 14 1682 14 2823 69 513 256 0 15674 23 5 0 72 3 37 0 0 1789 15 3243 99 627 293 0 20474 22 6 0 72 4 3 0 0 1632 18 2741 71 578 226 0 16065 21 5 0 74 5 0 0 0 1433 9 2307 50 413 278 0 14878 25 4 0 71 6 1 0 1425 1604 111 2917 77 591 227 0 17322 22 6 0 72 7 47 0 2 1527 104 2251 47 385 305 0 15891 21 4 0 74 March 4, 2026 at 01:07:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 4102 108 3505 86 749 174 0 17983 25 7 0 68 1 27 0 0 2000 9 3565 89 764 239 0 19507 26 6 0 68 2 0 0 6 1789 12 3020 63 585 285 0 16756 24 6 0 70 3 0 0 0 1895 12 3303 74 709 272 0 22179 24 6 0 69 4 0 0 14 1854 16 3183 54 700 188 0 17798 22 5 0 72 5 0 0 167 1620 15 2788 51 513 283 0 16676 22 5 0 73 6 0 0 1417 1774 111 3188 71 632 302 0 19302 23 6 0 71 7 0 0 10 1647 113 2480 49 434 307 0 15619 22 4 0 74 March 4, 2026 at 01:07:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 14 4396 113 4178 103 880 332 0 20144 26 8 0 66 1 17 0 0 2270 9 4198 92 917 507 0 23614 27 7 0 65 2 26 0 14 2118 13 3773 80 707 355 0 19658 24 6 0 69 3 73 0 0 2160 67 3953 113 831 325 0 22737 24 7 0 69 4 15 0 0 2012 13 3665 57 803 338 0 19754 22 6 0 72 5 15 0 0 1856 4 3292 55 625 513 0 18713 22 6 0 72 6 29 0 1360 1920 111 3665 71 719 370 0 21156 22 7 0 71 7 127 0 10 1947 111 3206 55 570 307 0 18156 18 5 0 77 March 4, 2026 at 01:07:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2118 106 110 0 5 1 0 278 0 1 0 99 1 0 0 0 20 2 12 0 5 0 0 8 0 0 0 100 2 0 0 0 25 5 18 1 2 0 0 19 0 0 0 100 3 0 0 0 14 1 4 0 1 0 0 2 0 0 0 100 4 0 0 0 12 2 2 0 0 0 0 1 0 0 0 100 5 0 0 0 16 3 14 0 1 4 0 602 0 0 0 100 6 0 0 17 321 153 146 1 1 2 0 1431 0 0 0 99 7 0 0 10 217 104 8 0 2 1 0 269 0 0 0 100 March 4, 2026 at 01:07:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 103 114 0 2 0 0 266 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 2 0 0 0 19 6 14 0 0 0 0 8 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 6 1 2 0 1 0 0 0 0 0 0 100 5 0 0 0 12 3 6 1 0 1 0 618 0 0 0 100 6 0 0 3 324 153 146 2 0 1 0 1423 0 0 0 99 7 0 0 10 212 104 6 1 0 0 0 261 0 0 0 100 March 4, 2026 at 01:07:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 103 118 0 0 1 0 266 0 1 0 99 1 0 0 0 21 6 14 0 0 1 0 9 0 0 0 100 2 0 0 0 30 9 28 0 0 1 0 23 0 0 0 100 3 0 0 0 11 2 6 0 1 1 0 9 0 0 0 100 4 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 5 0 0 0 23 12 10 1 1 4 0 595 0 0 0 100 6 0 0 3 313 153 136 1 1 3 0 1423 0 0 0 99 7 0 0 10 221 103 23 0 2 1 0 259 0 0 0 100 March 4, 2026 at 01:07:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 21 2132 104 142 1 9 5 7 311 0 1 0 99 1 4 0 18 29 3 34 0 11 8 3 45 0 0 0 100 2 288 0 2 51 8 40 5 5 18 3 138 0 0 0 99 3 11 0 7 22 0 29 0 8 1 3 38 0 0 0 100 4 10 0 3 28 3 32 0 3 5 5 35 0 0 0 100 5 26 0 4 34 5 34 0 7 6 6 607 0 0 0 100 6 4 0 15 241 113 72 1 6 2 6 1455 0 0 0 99 7 12 0 17 315 143 115 1 4 2 3 309 0 0 0 100 March 4, 2026 at 01:07:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2167 103 215 0 15 63 0 266 0 1 0 99 1 0 0 0 72 1 110 0 21 61 0 0 0 0 0 100 2 0 0 0 44 1 71 0 19 51 0 0 0 0 0 100 3 0 0 0 144 74 129 0 22 65 0 1 0 0 0 100 4 0 0 7 74 1 141 0 25 89 0 0 0 0 0 100 5 0 0 0 70 6 118 0 20 64 0 618 0 0 0 100 6 0 0 3 335 103 274 1 19 55 0 1368 0 1 0 99 7 0 0 10 352 153 182 0 14 51 0 259 0 0 0 100 March 4, 2026 at 01:07:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 103 126 0 3 12 0 266 0 1 0 99 1 0 0 7 31 1 43 0 3 13 0 0 0 0 0 100 2 0 0 0 23 1 33 0 4 12 0 0 0 0 0 100 3 0 0 0 44 23 30 0 5 12 0 1 0 0 0 100 4 0 0 0 44 1 72 0 7 13 0 0 0 0 0 100 5 0 0 0 23 3 26 2 5 4 0 600 0 0 0 100 6 0 0 3 222 103 52 2 2 14 0 1364 0 0 0 99 7 0 0 10 322 153 124 1 4 9 0 259 0 0 0 100 March 4, 2026 at 01:07:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 103 108 0 0 0 0 266 0 1 0 99 1 0 0 7 17 1 12 0 0 0 0 0 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 7 1 2 0 1 0 0 0 0 0 0 100 5 0 0 0 16 4 8 1 0 0 0 593 0 0 0 100 6 0 0 3 212 103 34 1 0 2 0 1362 0 0 0 99 7 0 0 10 311 153 104 0 0 0 0 259 0 0 0 100 March 4, 2026 at 01:08:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2140 133 172 0 1 0 0 266 0 1 0 99 1 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 2 0 0 0 17 1 22 0 1 0 0 11 0 0 0 100 3 0 0 0 13 2 8 0 0 0 0 7 0 0 0 100 4 0 0 0 8 1 6 0 2 0 0 6 0 0 0 100 5 0 0 0 19 8 6 0 0 5 0 617 0 0 0 100 6 0 0 3 211 103 34 1 0 4 0 1363 0 0 0 100 7 0 0 10 253 123 47 0 1 0 0 259 0 0 0 100 March 4, 2026 at 01:08:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 142 0 14 2174 153 239 0 5 6 3 615 0 1 0 99 1 4 0 0 34 1 35 0 4 3 1 112 0 0 0 100 2 4877 0 10 43 3 78 3 8 43 10 523 2 1 0 97 3 709 0 1 44 0 77 0 10 13 11 415 0 0 0 99 4 70 0 0 26 2 39 0 6 10 5 90 0 0 0 100 5 58 0 0 51 7 81 0 7 7 5 846 0 0 0 100 6 71 0 3 235 104 81 1 9 8 1 1464 0 0 0 99 7 84 0 10 222 103 20 0 4 2 0 327 0 0 0 100 March 4, 2026 at 01:08:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 216 0 14 2600 107 1016 42 221 88 3 4426 4 2 0 93 1 148 0 0 513 8 919 59 204 94 1 4649 4 2 0 94 2 286 0 0 459 1 899 46 168 123 1 4727 4 2 0 94 3 94 0 0 575 65 924 33 202 128 1 4932 4 2 0 94 4 278 0 0 621 46 1169 42 206 84 3 4316 4 2 0 94 5 104 0 0 413 5 804 27 149 85 3 4158 4 1 0 95 6 219 0 185 583 103 871 36 193 143 1 5771 4 2 0 94 7 93 0 10 580 104 695 37 134 97 0 3916 4 1 0 95 March 4, 2026 at 01:08:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 103 100 0 2 0 0 266 0 1 0 99 1 0 0 0 17 1 12 0 2 0 0 0 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 3 49 0 0 25 8 18 0 2 0 0 10 0 0 0 100 4 0 0 0 115 51 112 0 2 0 0 300 0 0 0 100 5 0 0 0 18 3 14 0 3 2 0 307 0 0 0 100 6 0 0 3 210 102 34 1 0 2 0 1421 0 0 0 100 7 0 0 10 212 103 4 0 0 0 0 263 0 0 0 100 March 4, 2026 at 01:08:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 104 84 0 2 0 0 266 0 1 0 99 1 0 0 0 35 1 28 0 2 0 0 0 0 0 0 100 2 0 0 0 10 2 8 0 1 0 0 1 0 0 0 100 3 0 0 0 19 6 14 0 0 0 0 9 0 0 0 100 4 0 0 0 111 52 104 0 0 1 0 300 0 0 0 100 5 0 0 0 19 1 20 0 1 1 0 292 0 0 0 100 6 0 0 3 211 103 34 1 0 1 0 1419 0 0 0 99 7 0 0 10 212 104 6 0 0 0 0 261 0 0 0 100 March 4, 2026 at 01:08:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 104 118 0 4 1 0 266 0 1 0 99 1 0 0 0 25 5 14 0 0 1 0 8 0 0 0 100 2 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 3 0 0 0 30 10 22 0 0 1 0 15 0 0 0 100 4 0 0 0 115 54 108 0 0 1 0 327 0 0 0 100 5 0 0 0 21 8 4 0 0 2 0 299 0 0 0 100 6 0 0 7 217 103 44 1 1 1 0 1435 0 0 0 100 7 0 0 14 215 103 10 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:08:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 21 2128 105 132 0 11 6 5 320 0 1 0 99 1 7 0 14 33 1 40 0 9 5 3 35 0 0 0 100 2 302 0 0 30 1 37 4 8 21 1 128 0 0 0 100 3 9 0 0 33 4 43 1 10 2 4 57 0 0 0 100 4 9 0 4 130 53 129 1 6 2 5 345 0 0 0 100 5 7 0 11 27 5 25 1 4 4 2 322 0 0 0 100 6 2 0 5 228 103 57 2 4 3 2 1385 0 0 0 99 7 1 0 11 237 107 36 3 6 1 3 291 0 0 0 100 March 4, 2026 at 01:08:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 104 34 0 5 1 0 266 0 1 0 99 1 0 0 0 107 2 100 0 4 0 0 0 0 0 0 100 2 0 0 0 11 1 6 0 1 2 0 0 0 0 0 100 3 0 0 0 11 1 6 0 1 0 0 1 0 0 0 100 4 0 0 0 112 52 106 0 1 0 0 300 0 0 0 100 5 0 0 0 16 2 10 1 0 6 0 302 0 0 0 100 6 0 0 10 220 103 44 1 1 2 0 1363 0 0 0 100 7 0 0 10 214 103 8 0 0 1 0 259 0 0 0 100 March 4, 2026 at 01:08:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 103 82 0 1 0 0 266 0 1 0 99 1 0 0 7 39 2 33 0 3 0 0 0 0 0 0 100 2 0 0 0 21 1 12 0 2 0 0 0 0 0 0 100 3 0 0 0 9 0 2 0 1 0 0 0 0 0 0 100 4 0 0 0 110 52 106 0 2 0 0 300 0 0 0 100 5 0 0 0 8 1 4 0 0 2 0 376 0 0 0 100 6 0 0 3 213 103 36 0 1 4 0 1363 0 0 0 100 7 0 0 10 212 103 6 0 1 0 0 259 0 0 0 100 March 4, 2026 at 01:08:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 103 92 0 3 0 0 266 0 1 0 99 1 0 0 7 29 1 20 0 1 0 0 0 0 0 0 100 2 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 3 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 111 53 106 0 1 0 0 300 0 0 0 100 5 0 0 0 10 2 4 0 0 1 0 216 0 0 0 100 6 0 0 3 214 103 36 1 1 6 0 1363 0 0 0 100 7 0 0 10 216 103 14 0 1 0 0 259 0 0 0 100 March 4, 2026 at 01:08:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2116 103 128 0 3 0 0 266 0 1 0 99 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 14 1 12 0 0 0 0 10 0 0 0 100 3 0 0 0 9 0 2 0 1 0 0 0 0 0 0 100 4 0 0 0 113 53 106 1 0 0 0 308 0 0 0 100 5 0 0 0 14 7 6 0 2 3 0 326 0 0 0 100 6 0 0 3 212 103 34 2 0 6 0 1363 0 0 0 100 7 0 0 10 222 105 19 1 1 1 0 266 0 0 0 100 March 4, 2026 at 01:08:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1128 0 7 4034 110 3467 41 396 168 10 7684 20 8 0 72 1 425 0 1 1958 8 3491 72 393 201 17 8082 20 6 0 73 2 2165 0 1 1693 18 2877 35 258 295 25 6738 18 9 0 73 3 882 0 16 1847 7 3338 65 310 380 18 8151 23 6 0 71 4 231 0 0 1473 18 2518 32 257 204 13 6854 16 4 0 80 5 236 0 0 1271 13 2106 19 180 251 7 5933 13 4 0 84 6 306 0 1109 1683 114 3009 42 230 275 4 8858 20 6 0 74 7 152 0 11 1412 107 2109 12 164 319 1 5824 12 4 0 84 March 4, 2026 at 01:08:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 0 4454 116 4116 57 483 226 0 9328 26 8 0 66 1 40 0 0 2504 24 4366 62 484 300 0 9508 26 7 0 68 2 92 0 60 2092 24 3536 47 331 446 0 8567 22 6 0 72 3 29 0 14 2339 64 4057 80 367 294 0 9702 26 6 0 68 4 49 0 1 1938 19 3348 29 289 287 0 8269 21 5 0 74 5 19 0 0 1782 12 3075 41 245 380 0 7519 18 5 0 77 6 26 0 1417 2093 116 3745 63 315 367 0 9850 24 7 0 69 7 11 0 2 1902 112 2892 28 201 324 0 6933 18 4 0 78 March 4, 2026 at 01:08:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 3 4399 119 4003 81 389 286 4 9114 29 7 0 64 1 45 0 13 2373 21 4110 94 437 297 10 9599 27 7 0 66 2 24 0 33 2139 18 3624 57 294 307 8 8552 23 6 0 71 3 479 0 9 2157 29 3709 77 343 289 7 8522 23 6 0 71 4 646 0 26 1923 27 3291 36 300 256 5 8454 19 5 0 76 5 8 0 0 1656 17 2747 41 196 311 9 7047 16 4 0 79 6 27 0 1390 1976 126 3517 69 283 301 14 8150 23 6 0 71 7 13 0 12 1775 120 2651 29 184 208 12 7782 14 4 0 81 March 4, 2026 at 01:08:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 474 0 7 2187 104 236 6 24 8 4 295 0 1 0 98 1 333 0 0 83 6 135 4 22 10 2 739 1 0 0 99 2 199 0 9 74 3 117 3 14 9 3 528 0 0 0 99 3 4351 0 10 83 3 145 9 24 14 6 721 2 1 0 97 4 686 0 15 77 4 159 6 23 20 8 840 1 0 0 99 5 116 0 0 89 26 75 4 8 10 2 518 0 0 0 100 6 131 0 31 361 151 205 3 21 4 3 586 0 1 0 99 7 233 0 3 278 104 151 6 15 13 1 1737 1 1 0 99 March 4, 2026 at 01:08:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 115 1 1 1 0 10 0 1 0 99 1 0 0 0 21 7 14 0 1 4 0 318 0 0 0 100 2 0 0 14 22 3 19 0 1 0 0 307 0 0 0 100 3 42 0 0 33 10 24 0 1 1 0 16 0 0 0 100 4 0 0 14 17 3 14 0 2 1 0 268 0 0 0 100 5 0 0 0 18 7 4 0 1 1 0 305 0 0 0 100 6 0 0 3 311 152 104 0 0 1 0 2 0 0 0 100 7 3 0 3 216 103 39 1 1 3 0 1423 0 0 0 99 March 4, 2026 at 01:08:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 110 0 2 0 0 0 0 1 0 99 1 0 0 0 15 4 10 0 1 2 0 294 0 0 0 100 2 0 0 14 15 2 10 0 2 0 0 260 0 0 0 100 3 0 0 0 16 5 10 0 0 0 0 8 0 0 0 100 4 0 0 14 11 3 6 0 0 0 0 267 0 0 0 100 5 0 0 0 13 1 12 0 1 0 0 300 0 0 0 100 6 0 0 3 308 151 102 0 0 0 0 0 0 0 0 100 7 0 0 3 214 103 34 2 0 4 0 1433 0 0 0 100 March 4, 2026 at 01:08:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 103 183 0 4 56 0 0 0 1 0 99 1 0 0 0 49 5 80 0 16 50 0 294 0 0 0 100 2 0 0 7 55 2 89 0 8 48 0 260 0 0 0 100 3 0 0 0 151 83 136 0 17 75 0 10 0 0 0 99 4 0 0 14 64 3 116 0 22 70 0 266 0 0 0 100 5 0 0 0 124 1 229 0 14 36 0 300 0 0 0 100 6 0 0 3 352 149 198 0 19 61 0 2 0 1 0 99 7 0 0 3 250 103 108 1 11 59 0 1434 0 0 0 99 March 4, 2026 at 01:08:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 778 0 11 2193 105 237 2 20 18 8 280 0 1 0 98 1 299 0 25 88 6 147 7 31 16 9 753 1 0 0 99 2 112 0 16 116 6 147 5 18 11 3 539 0 1 0 99 3 74 0 16 125 24 167 1 19 47 11 486 1 1 0 98 4 5208 0 31 80 3 155 6 30 62 6 1186 2 2 0 96 5 1348 0 4 125 30 198 5 33 36 14 932 0 1 0 99 6 148 0 32 337 128 201 2 20 17 8 729 0 1 0 99 7 125 0 3 303 104 207 2 25 9 9 1733 0 1 0 99 March 4, 2026 at 01:08:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 108 0 0 0 0 0 0 1 0 99 1 0 0 0 18 5 12 0 1 0 0 294 0 0 0 100 2 0 0 7 15 2 8 0 1 0 0 263 0 0 0 100 3 42 0 7 121 56 117 0 3 0 0 8 0 0 0 100 4 0 0 14 8 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 1 0 0 300 0 0 0 100 6 0 0 3 212 102 6 0 1 0 0 2 0 0 0 100 7 0 0 3 218 103 44 1 1 4 0 1416 0 0 0 100 March 4, 2026 at 01:08:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 116 0 0 0 0 1 0 1 0 99 1 0 0 0 16 5 10 0 0 1 0 294 0 0 0 100 2 0 0 7 13 2 8 0 0 0 0 260 0 0 0 100 3 0 0 7 121 56 117 0 0 0 0 8 0 0 0 100 4 0 0 14 11 2 8 0 1 0 0 274 0 0 0 100 5 0 0 0 14 7 2 0 0 1 0 300 0 0 0 100 6 0 0 3 213 101 12 0 0 0 0 11 0 0 0 100 7 0 0 3 224 105 49 2 0 2 0 1569 0 0 0 99 March 4, 2026 at 01:08:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 100 122 0 1 0 0 0 0 1 0 99 1 0 0 0 16 5 10 0 0 1 0 294 0 0 0 100 2 0 0 7 17 3 12 0 0 0 0 261 0 0 0 100 3 0 0 7 119 56 114 0 0 0 0 8 0 0 0 100 4 0 0 14 10 3 4 0 0 0 0 267 0 0 0 100 5 0 0 0 10 2 6 0 1 0 0 301 0 0 0 100 6 0 0 3 210 102 4 0 0 0 0 2 0 0 0 100 7 0 0 3 217 104 38 1 1 0 0 1413 0 0 0 100 March 4, 2026 at 01:08:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 426 0 11 2388 120 620 5 92 141 50 818 0 1 0 98 1 27272 0 143 265 8 477 16 80 106 48 1919 10 22 0 69 2 898 0 23 233 3 441 4 77 99 41 980 2 1 0 98 3 638 0 5 376 88 533 4 87 143 51 1484 1 2 0 98 4 4324 0 50 316 23 578 9 92 172 37 1866 2 5 0 93 5 859 0 15 347 40 578 4 74 129 40 1002 2 2 0 97 6 1104 0 20 473 102 533 3 93 135 37 1037 2 2 0 96 7 6587 0 12 432 103 497 4 73 163 57 2760 2 3 0 96 March 4, 2026 at 01:08:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 22 5 12 0 1 1 0 294 0 0 0 100 2 0 0 7 17 2 8 0 0 0 0 263 0 0 0 100 3 65 0 0 26 7 16 0 0 3 0 8 0 0 0 99 4 0 0 42 17 5 12 0 0 2 0 270 0 1 0 99 5 0 0 7 113 51 104 0 1 0 0 300 0 0 0 100 6 0 0 3 217 103 6 0 0 0 0 3 0 0 0 100 7 0 0 3 217 103 34 1 0 3 0 1326 0 0 0 100 March 4, 2026 at 01:08:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 100 112 0 0 0 0 0 0 1 0 99 1 0 0 0 54 5 14 0 1 2 0 294 0 0 0 100 2 0 0 7 51 3 10 0 0 0 0 261 0 0 0 100 3 0 0 231 22 6 16 0 1 2 0 8 0 0 0 100 4 0 0 35 51 5 20 0 1 2 0 272 0 1 0 99 5 0 0 0 145 51 104 0 0 0 0 300 0 0 0 100 6 0 0 3 244 101 4 0 1 0 0 0 0 0 0 100 7 0 0 3 249 104 36 0 0 2 0 1350 0 0 0 99 March 4, 2026 at 01:08:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 1 1 0 0 0 1 0 99 1 0 0 0 20 7 12 0 0 4 0 295 0 0 0 100 2 0 0 7 16 3 10 0 0 1 0 263 0 0 0 100 3 0 0 0 22 8 14 0 0 1 0 9 0 0 0 100 4 0 0 14 21 6 14 0 1 2 0 298 0 0 0 100 5 0 0 0 123 57 116 0 2 0 0 301 0 0 0 100 6 0 0 7 215 102 14 0 0 1 0 15 0 0 0 100 7 0 0 7 217 103 38 1 0 3 0 1337 0 0 0 99 March 4, 2026 at 01:08:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 16 5 10 1 0 4 0 294 0 0 0 100 2 0 0 7 12 2 10 1 1 0 0 260 0 0 0 100 3 0 0 0 19 7 14 0 0 0 0 7 0 0 0 100 4 0 0 14 16 6 14 0 0 0 0 281 0 0 0 100 5 0 0 0 109 51 102 1 0 0 0 300 0 0 0 100 6 0 0 3 207 101 2 0 0 0 0 0 0 0 0 100 7 0 0 3 215 103 38 2 0 0 0 1353 0 0 0 100 March 4, 2026 at 01:08:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 118 0 0 4 0 7 0 1 0 99 1 0 0 0 17 5 12 0 1 3 0 297 0 0 0 100 2 0 0 7 16 2 16 0 1 3 0 263 0 0 0 100 3 0 0 0 20 7 14 0 0 0 0 11 0 0 0 100 4 0 0 14 8 2 6 0 1 0 0 266 0 0 0 100 5 0 0 0 112 52 108 0 0 0 0 300 0 0 0 100 6 1 0 3 222 105 24 0 2 2 0 10 0 0 0 100 7 0 0 3 213 103 36 1 0 4 0 1344 0 0 0 100 March 4, 2026 at 01:08:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 15 5 10 0 0 0 0 294 0 0 0 100 2 0 0 7 12 2 8 0 0 0 0 260 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 12 5 8 0 0 0 0 269 0 0 0 100 5 21 0 0 109 52 106 0 0 1 0 305 0 0 0 100 6 0 0 3 219 106 14 0 0 1 0 8 0 0 0 100 7 22 0 3 217 104 44 0 1 5 0 1345 0 0 0 100 March 4, 2026 at 01:08:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 15 5 10 0 0 1 0 294 0 0 0 100 2 0 0 7 14 2 12 0 1 0 0 260 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 108 51 102 0 0 0 0 300 0 0 0 100 6 0 0 3 219 107 14 0 0 0 0 10 0 0 0 100 7 0 0 3 212 103 34 1 0 4 0 1419 0 0 0 100 March 4, 2026 at 01:08:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2151 100 168 0 15 10 8 116 0 1 0 99 1 22 0 0 47 5 40 1 7 6 7 337 0 0 0 100 2 921 0 121 27 2 47 1 5 5 10 352 0 0 0 99 3 55 0 0 36 1 28 0 9 4 3 101 0 0 0 100 4 30 0 16 46 4 54 0 10 4 7 389 0 0 0 100 5 2444 0 0 73 16 77 4 7 8 10 826 2 1 0 97 6 52 0 3 347 149 165 0 11 14 6 194 0 0 0 100 7 22 0 3 246 103 74 1 7 15 3 1409 0 0 0 99 March 4, 2026 at 01:08:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 1 0 1 0 99 1 0 0 0 20 5 20 0 1 2 0 294 0 0 0 100 2 0 0 7 12 3 8 0 1 0 0 261 0 0 0 100 3 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 4 0 0 14 7 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 11 4 4 0 0 0 0 301 0 0 0 100 6 0 0 3 319 157 114 0 0 0 0 10 0 0 0 100 7 0 0 3 213 103 34 2 0 4 0 1412 0 0 0 99 March 4, 2026 at 01:08:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 143 0 0 2238 101 356 0 35 61 2 384 0 1 0 98 1 403 0 0 152 7 285 3 52 88 1 1057 1 1 0 98 2 293 0 7 126 2 241 0 32 64 1 911 1 1 0 98 3 254 0 0 226 71 295 0 44 77 2 519 1 1 0 99 4 84 0 14 140 4 276 0 35 66 1 699 1 1 0 98 5 114 0 2 195 34 289 0 20 44 3 446 0 0 0 99 6 24 0 17 383 135 296 2 33 70 0 260 0 1 0 99 7 11 0 3 337 124 241 1 22 46 0 1543 0 1 0 99 March 4, 2026 at 01:08:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 112 0 0 0 0 4 0 1 0 99 1 2 0 0 30 9 24 0 1 3 0 316 0 0 0 100 2 7 0 7 18 2 20 0 2 0 0 271 0 0 0 100 3 13 0 0 16 2 8 0 2 1 0 16 0 0 0 100 4 2 0 14 10 2 6 0 0 0 0 284 0 0 0 100 5 26 0 0 13 3 8 0 0 0 0 304 0 0 0 100 6 0 0 17 213 103 8 0 2 0 0 12 0 0 0 100 7 1 0 3 317 153 136 1 1 2 0 1439 0 0 0 99 March 4, 2026 at 01:08:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 28 11 22 1 0 1 0 300 0 0 0 100 2 6 0 7 17 4 174 1 1 0 0 593 0 0 0 100 3 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 4 0 0 14 10 4 6 0 0 0 0 270 0 0 0 100 5 0 0 0 12 3 6 1 0 0 0 301 0 0 0 100 6 3 0 3 210 101 10 0 2 0 0 9 0 0 0 100 7 0 0 3 315 154 138 1 1 1 0 1440 0 0 0 100 March 4, 2026 at 01:08:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 133 188 1 2 1 0 10 0 1 0 99 1 1 0 0 33 13 28 0 0 2 0 312 0 0 0 100 2 0 0 7 12 3 6 0 1 0 0 260 0 0 0 100 3 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 4 0 0 14 8 3 2 0 0 1 0 266 0 0 0 100 5 0 0 0 15 8 2 0 0 1 0 300 0 0 0 100 6 0 0 3 209 102 4 0 0 1 0 2 0 0 0 100 7 0 0 3 258 123 81 2 0 3 0 1489 0 0 0 99 March 4, 2026 at 01:08:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1419 0 34 2433 134 719 6 110 381 100 4009 1 3 0 96 1 965 0 37 392 14 732 6 159 158 113 3937 2 2 0 96 2 129 0 13 352 1 655 3 145 87 94 2811 1 1 0 98 3 404 0 33 365 16 635 4 142 69 68 2499 1 2 0 98 4 124 0 27 274 3 506 6 111 85 89 3460 1 1 0 98 5 183 0 16 288 35 444 1 119 301 69 2796 1 1 0 98 6 52 0 33 488 102 519 3 127 103 70 2455 1 1 0 98 7 8822 0 354 448 103 592 8 104 409 96 5118 2 4 0 94 March 4, 2026 at 01:08:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 7 2134 100 138 0 5 1 6 38 0 1 0 99 1 4 0 91 34 10 38 0 3 13 1 570 0 1 0 98 2 12 0 0 33 0 27 0 4 15 2 13 0 0 0 100 3 9 0 0 132 52 120 0 2 2 1 23 0 0 0 100 4 2 0 14 35 2 23 0 4 3 1 278 0 0 0 100 5 1 0 1 30 1 21 1 3 1 2 311 0 0 0 100 6 9 0 3 230 102 19 0 2 5 1 15 0 0 0 100 7 3 0 11 233 103 51 1 4 5 4 1117 0 0 0 99 March 4, 2026 at 01:08:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2209 100 112 0 1 0 0 0 0 1 0 99 1 0 0 56 119 7 16 2 1 3 0 552 0 1 0 99 2 0 0 679 16 0 4 0 0 2 0 0 0 1 0 99 3 0 0 0 212 51 102 0 0 0 0 0 0 0 0 100 4 0 0 14 111 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 113 1 2 1 0 0 0 300 0 0 0 100 6 0 0 3 313 101 2 0 0 0 0 0 0 0 0 100 7 0 0 3 318 103 36 0 0 3 0 1059 0 0 0 100 March 4, 2026 at 01:08:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 1 0 99 1 0 0 21 21 7 18 0 1 4 0 554 0 0 0 100 2 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 109 51 102 0 0 0 0 0 0 0 0 100 4 0 0 14 8 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 11 1 6 0 1 0 0 300 0 0 0 100 6 0 0 3 218 103 18 0 1 0 0 3 0 0 0 100 7 0 0 3 215 103 34 2 0 5 0 1012 0 0 0 100 March 4, 2026 at 01:08:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 120 1 1 0 0 10 0 1 0 99 1 0 0 7 20 7 18 0 0 2 0 561 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 12 6 2 0 0 0 0 300 0 0 0 100 6 0 0 3 223 103 20 0 0 0 0 7 0 0 0 100 7 0 0 3 216 103 41 1 1 1 0 1107 0 0 0 100 March 4, 2026 at 01:08:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1303 0 30 2627 101 497 3 82 303 64 7423 3 3 0 94 1 11478 0 239 489 27 555 20 105 365 75 17399 6 7 0 87 2 8840 0 497 445 1 435 10 79 422 78 11771 3 6 0 91 3 6136 0 371 557 20 626 7 113 376 92 12778 4 6 0 90 4 5544 0 322 492 11 556 7 116 161 103 2463 3 3 0 94 5 5411 0 318 377 7 476 3 94 109 95 1700 1 2 0 97 6 4403 0 133 555 102 425 4 80 118 72 1444 1 2 0 97 7 3018 0 22 561 105 443 2 76 124 60 2389 1 2 0 97 March 4, 2026 at 01:08:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2213 100 351 1 64 830 1 0 0 4 0 96 1 0 0 7 107 8 174 3 54 824 0 541 0 3 0 97 2 0 0 0 142 0 299 0 65 704 1 17 0 3 0 97 3 0 0 0 183 64 351 1 73 784 6 0 0 3 0 97 4 0 0 21 142 2 325 1 91 790 1 302 0 2 0 97 5 0 0 0 124 5 249 1 72 749 1 300 0 2 0 98 6 0 0 3 348 101 310 0 79 830 1 0 0 3 0 97 7 0 0 3 409 150 347 1 52 672 5 1171 0 3 0 97 March 4, 2026 at 01:08:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2308 101 406 0 61 895 0 0 0 3 0 97 1 0 0 455 164 7 338 0 68 1032 0 260 0 2 0 98 2 0 0 0 204 1 304 0 71 834 0 294 0 2 0 98 3 0 0 0 382 157 330 0 68 970 0 2 0 2 0 98 4 0 0 14 288 3 465 1 71 879 0 870 0 2 0 98 5 0 0 0 215 6 316 0 57 966 0 0 0 2 0 98 6 0 0 3 437 101 368 0 73 1033 0 0 0 2 0 98 7 0 0 3 572 147 565 1 62 973 0 1132 0 2 0 98 March 4, 2026 at 01:08:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 7 18 6 14 0 1 0 0 259 0 0 0 100 2 0 0 0 8 1 2 0 0 4 0 294 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 6 1 0 6 0 870 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 7 0 0 3 312 153 134 1 0 0 0 1133 0 0 0 100 March 4, 2026 at 01:08:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 122 1 1 1 0 10 0 1 0 99 1 0 0 7 37 10 34 0 1 1 0 267 0 0 0 100 2 0 0 0 10 2 2 0 0 5 0 294 0 0 0 100 3 0 0 0 15 3 10 1 0 1 0 11 0 0 0 100 4 0 0 14 15 6 8 0 0 6 0 886 0 0 0 100 5 0 0 0 13 6 0 0 0 1 0 0 0 0 0 100 6 0 0 7 209 102 4 0 1 0 0 0 0 0 0 100 7 0 0 7 315 152 136 1 0 1 0 1132 0 0 0 100 March 4, 2026 at 01:08:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 890 0 9 2183 100 251 1 24 12 14 413 1 1 0 98 1 941 0 14 85 7 126 4 16 12 9 527 1 1 0 98 2 1568 0 1 90 1 164 2 23 48 15 840 0 1 0 99 3 1744 0 3 88 3 172 5 35 50 27 924 0 1 0 98 4 2954 0 22 86 8 142 1 23 53 13 1517 1 1 0 98 5 941 0 8 65 2 151 3 29 18 19 516 1 0 0 98 6 123 0 7 268 102 130 1 22 16 17 261 0 0 0 99 7 14 0 9 346 149 202 1 15 11 12 1297 0 1 0 99 March 4, 2026 at 01:08:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1201 0 20 2720 129 1338 37 146 973 15 3721 4 5 0 90 1 287 0 11 451 9 845 21 120 1022 9 3074 5 4 0 91 2 334 0 4 267 2 504 18 86 856 6 3159 5 4 0 90 3 512 0 5 521 77 887 24 111 1119 9 4571 5 4 0 90 4 7137 0 23 482 6 978 32 128 904 30 4560 8 5 0 87 5 607 0 1 324 8 618 11 94 1158 31 4092 6 5 0 89 6 689 0 160 810 107 1320 31 145 988 12 2869 5 4 0 91 7 466 0 10 562 113 732 18 109 1013 13 5029 5 4 0 90 March 4, 2026 at 01:08:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2280 149 481 0 58 820 0 0 0 2 0 98 1 53 0 7 206 11 411 1 66 926 0 271 0 2 0 98 2 0 0 0 137 1 273 0 60 840 0 293 0 1 0 98 3 0 0 0 243 119 267 2 70 927 0 0 0 2 0 98 4 0 0 14 122 2 267 0 60 791 0 266 0 1 0 99 5 0 0 0 110 1 242 0 52 802 0 300 0 1 0 99 6 0 0 3 388 102 372 0 60 804 0 0 0 2 0 98 7 0 0 3 319 103 274 0 43 873 0 1343 0 2 0 98 March 4, 2026 at 01:08:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2154 150 205 0 0 0 0 0 0 1 0 99 1 0 0 7 47 13 26 0 0 0 0 269 0 0 0 100 2 0 0 0 31 1 10 0 0 3 0 294 0 0 0 100 3 0 0 0 26 1 6 0 1 0 0 2 0 0 0 100 4 0 0 14 23 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 28 1 14 0 2 0 0 300 0 0 0 100 6 0 0 3 224 101 2 0 0 0 0 0 0 0 0 100 7 0 0 3 232 105 38 1 0 8 0 1424 0 0 0 100 March 4, 2026 at 01:08:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2156 150 208 0 0 0 0 0 0 1 0 99 1 0 0 7 38 13 36 1 0 0 0 281 0 0 0 100 2 0 0 0 16 1 10 0 0 6 0 294 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 9 2 6 0 0 0 0 274 0 0 0 100 5 0 0 0 16 6 2 1 0 0 0 300 0 0 0 100 6 0 0 3 217 103 10 0 1 0 0 7 0 0 0 100 7 0 0 3 219 104 41 2 1 3 0 1434 0 0 0 99 March 4, 2026 at 01:08:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2484 111 770 7 29 15 0 1462 3 2 0 96 1 12 0 7 258 13 451 9 24 19 0 1691 3 1 0 96 2 40 0 0 376 2 663 6 26 27 0 1675 2 1 0 97 3 32 0 0 261 6 459 9 30 10 0 942 2 1 0 98 4 9 0 14 282 5 531 10 31 34 0 2293 3 1 0 96 5 52 0 0 144 44 146 5 12 31 0 2767 4 2 0 94 6 11 0 129 473 102 541 10 38 12 0 1462 2 1 0 97 7 21 0 3 328 106 211 4 9 43 0 4042 4 2 0 94 March 4, 2026 at 01:08:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2201 100 316 1 57 795 0 0 0 3 0 97 1 0 0 7 86 7 185 1 52 1076 0 260 0 2 0 98 2 0 0 0 86 3 170 4 52 839 0 294 0 2 0 98 3 0 0 0 150 70 182 2 48 859 0 0 0 2 0 98 4 0 0 14 136 8 284 0 63 872 0 275 0 2 0 98 5 0 0 0 176 49 270 1 50 823 0 300 0 2 0 98 6 0 0 3 289 102 189 1 56 806 0 0 0 2 0 98 7 0 0 3 291 104 231 2 50 834 0 1425 0 2 0 98 March 4, 2026 at 01:08:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2222 100 348 0 29 266 0 0 0 1 0 99 1 0 0 7 93 9 151 0 30 245 0 262 0 1 0 99 2 0 0 0 81 1 142 0 18 246 0 294 0 0 0 100 3 0 0 0 149 72 158 0 32 321 0 2 0 1 0 99 4 0 0 14 76 8 132 0 30 278 0 275 0 1 0 99 5 0 0 0 69 1 129 0 29 321 0 300 0 1 0 99 6 0 0 3 264 101 117 0 24 326 0 0 0 1 0 99 7 0 0 3 358 153 237 1 18 262 0 1425 0 1 0 99 March 4, 2026 at 01:08:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 107 0 1 0 0 0 0 1 0 99 1 0 0 7 26 8 26 1 1 0 0 261 0 0 0 100 2 0 0 0 16 1 12 0 0 1 0 294 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 18 8 14 0 0 0 0 275 0 0 0 100 5 0 0 0 10 2 4 1 0 0 0 301 0 0 0 100 6 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 7 0 0 3 317 154 138 2 1 3 0 1545 0 0 0 99 March 4, 2026 at 01:08:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 134 0 0 5121 103 6429 56 263 103 7 20182 21 12 0 67 1 862 0 7 3495 17 6899 79 320 65 4 21406 14 9 0 76 2 3212 0 119 3319 10 7273 56 201 94 11 23723 15 10 0 74 3 169 0 0 3619 12 7540 55 254 98 16 17306 14 10 0 76 4 77 0 14 1605 15 3178 27 177 73 8 8102 7 5 0 88 5 408 0 0 2079 9 4231 23 104 79 6 9210 8 5 0 87 6 582 0 3 2179 106 4131 18 181 72 1 10585 8 6 0 86 7 15 0 3 1589 131 2786 16 90 62 0 7492 6 4 0 90 March 4, 2026 at 01:08:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 6634 105 9632 68 376 141 0 26085 24 16 0 61 1 33 0 0 4837 18 9851 58 379 112 0 24991 21 14 0 65 2 23 0 0 3557 7 7353 49 256 141 0 18969 18 11 0 71 3 17 0 7 4767 13 9694 65 338 56 0 18223 15 11 0 75 4 13 0 0 2904 23 5921 33 273 103 0 14699 13 9 0 79 5 14 0 14 2468 10 5142 25 172 92 0 11963 10 7 0 83 6 18 0 2 3523 113 7026 42 250 86 0 16226 14 10 0 77 7 13 0 4 2223 114 4110 20 127 48 0 9502 8 5 0 87 March 4, 2026 at 01:08:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 6794 109 9873 87 494 714 0 24144 22 16 0 62 1 15 0 0 5046 17 10419 110 538 805 0 21005 18 14 0 68 2 13 0 7 4301 15 8619 49 329 752 0 18214 15 12 0 73 3 18 0 7 4202 97 8619 71 374 675 0 19438 16 12 0 72 4 10 0 0 2402 17 4994 43 323 639 0 12540 11 9 0 80 5 15 0 14 2428 13 5123 43 231 717 0 14800 14 9 0 77 6 18 0 3 3331 108 6694 34 323 704 0 16650 13 10 0 76 7 11 0 3 2566 110 5070 44 202 630 0 12997 11 9 0 80 March 4, 2026 at 01:08:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 3864 105 3682 49 192 71 0 9078 9 6 0 85 1 5 0 0 1919 8 3870 45 189 48 0 8578 7 5 0 88 2 11 0 0 1348 8 2878 31 126 44 0 8716 7 5 0 89 3 13 0 7 1921 81 3715 43 179 80 0 6869 5 4 0 90 4 6 0 0 1134 6 2276 22 127 56 0 5047 4 3 0 92 5 2 0 14 889 5 1807 15 83 62 0 5120 4 3 0 93 6 16 0 3 1178 109 2056 18 118 53 0 6009 5 3 0 92 7 1 0 3 976 113 1583 10 76 50 0 3973 3 2 0 95 March 4, 2026 at 01:08:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 109 0 1 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 2 0 0 0 10 2 36 2 1 0 0 1216 0 0 0 100 3 0 0 7 130 62 122 1 0 0 0 269 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 1 0 0 266 0 0 0 100 6 0 0 3 210 103 4 0 0 1 0 299 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:09:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 127 1 2 0 0 18 0 1 0 99 1 0 0 0 17 4 10 2 0 1 0 322 0 0 0 100 2 0 0 0 14 2 38 2 1 0 0 1219 0 0 0 100 3 0 0 7 120 57 120 0 1 0 0 271 0 0 0 100 4 0 0 0 11 1 6 0 2 0 0 3 0 0 0 100 5 0 0 14 17 9 10 0 1 1 0 269 0 0 0 100 6 0 0 3 221 104 20 0 2 0 0 388 0 0 0 100 7 0 0 3 215 102 14 0 1 0 0 311 0 0 0 100 March 4, 2026 at 01:09:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 9 2593 107 1166 61 237 36 0 3206 4 3 0 93 1 14 0 21 182 3 315 18 69 303 1 3526 6 2 0 92 2 12 0 0 360 5 767 51 165 41 0 4327 4 2 0 94 3 6 0 7 425 19 813 46 161 117 2 3573 6 2 0 92 4 17 0 0 330 2 621 36 119 60 1 3752 5 2 0 94 5 95 0 14 228 3 440 31 92 288 3 3529 6 2 0 93 6 4 0 143 579 136 723 42 123 37 0 3594 5 2 0 94 7 7 0 3 349 102 234 14 48 108 0 3112 5 2 0 93 March 4, 2026 at 01:09:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 100 270 2 49 875 0 0 0 3 0 97 1 0 0 0 103 5 220 3 69 807 0 295 0 2 0 98 2 0 0 7 154 3 360 2 65 767 0 1131 0 2 0 98 3 0 0 7 149 72 165 3 52 815 0 260 0 2 0 98 4 0 0 0 74 1 162 1 42 898 0 0 0 2 0 98 5 0 0 14 76 3 166 1 44 722 0 266 0 2 0 98 6 0 0 3 365 149 245 2 44 721 0 311 0 2 0 98 7 1 0 3 286 107 180 2 48 862 0 309 0 2 0 97 March 4, 2026 at 01:09:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2243 100 349 0 66 816 0 0 0 2 0 98 1 0 0 112 155 6 304 3 72 933 0 297 0 2 0 98 2 0 0 0 201 28 367 0 69 945 0 1135 0 2 0 98 3 0 0 7 341 165 458 0 71 922 0 308 0 2 0 98 4 0 0 0 217 1 430 0 81 787 0 0 0 2 0 98 5 0 0 14 140 3 270 1 65 927 0 266 0 2 0 98 6 0 0 3 333 101 262 2 62 1035 0 146 0 2 0 98 7 0 0 3 335 104 242 1 42 874 0 301 0 2 0 98 March 4, 2026 at 01:09:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 0 0 0 0 1 0 99 1 0 0 7 18 4 12 1 1 5 0 297 0 0 0 100 2 0 0 0 28 8 56 1 1 0 0 1142 0 0 0 99 3 0 0 7 114 54 108 0 0 0 0 563 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 19 4 16 0 1 0 0 267 0 0 0 100 6 0 0 3 210 102 4 0 1 0 0 1 0 0 0 100 7 0 0 3 215 104 8 0 0 0 0 303 0 0 0 100 March 4, 2026 at 01:09:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2438 103 734 13 43 21 0 1521 5 2 0 94 1 2 0 0 451 34 817 12 45 27 0 2101 2 1 0 97 2 0 0 0 319 8 604 6 31 23 0 2771 3 1 0 96 3 0 0 7 352 29 556 13 35 17 0 2073 2 1 0 97 4 0 0 0 223 3 390 12 27 30 0 2321 4 1 0 95 5 0 0 14 332 9 592 2 26 15 0 1578 2 1 0 98 6 0 0 143 301 104 187 6 13 32 0 3072 5 2 0 93 7 0 0 3 334 106 168 4 11 30 0 2746 4 1 0 95 March 4, 2026 at 01:09:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 114 53 106 0 0 3 0 295 0 0 0 100 2 0 0 0 12 2 36 1 0 1 0 1131 0 0 0 100 3 0 0 7 31 10 32 2 1 4 0 567 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 19 4 18 0 1 0 0 276 0 0 0 100 6 0 0 3 211 102 2 0 0 0 0 0 0 0 0 100 7 0 0 3 210 102 2 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:09:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 100 289 1 54 825 0 0 0 2 0 98 1 0 0 0 184 54 278 2 53 741 0 299 0 2 0 98 2 0 0 0 158 2 373 2 52 738 0 1131 0 2 0 98 3 0 0 7 183 85 204 2 52 721 0 663 0 2 0 98 4 2 0 0 83 2 180 3 48 761 0 1 0 2 0 98 5 0 0 14 88 3 181 3 43 643 0 267 0 2 0 98 6 0 0 3 286 103 172 2 55 705 0 0 0 2 0 98 7 0 0 3 283 102 169 3 41 708 0 300 0 2 0 98 March 4, 2026 at 01:09:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2186 100 253 0 38 431 0 0 0 2 0 98 1 0 0 0 110 3 193 1 41 466 0 294 0 1 0 99 2 0 0 0 181 2 387 0 30 401 0 1132 0 1 0 99 3 0 0 7 319 159 321 0 44 467 0 480 0 1 0 99 4 0 0 0 102 1 193 0 41 455 0 0 0 1 0 99 5 0 0 14 87 4 164 0 33 375 0 267 0 1 0 99 6 0 0 3 287 103 167 0 42 390 0 0 0 1 0 99 7 0 0 3 288 102 179 0 30 493 0 300 0 1 0 99 March 4, 2026 at 01:09:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 800 0 0 4503 104 5126 74 273 54 6 20191 14 9 0 78 1 297 0 0 2721 8 5846 64 273 73 1 20198 12 8 0 80 2 3237 0 113 1944 3 3926 50 193 73 11 12007 10 7 0 83 3 252 0 0 2408 37 4971 60 223 90 14 14806 13 7 0 79 4 60 0 0 1412 8 2793 29 181 56 8 7356 6 4 0 89 5 49 0 15 1476 12 2951 23 106 76 7 5854 5 3 0 91 6 19 0 10 1694 108 3122 19 171 58 6 7650 7 4 0 89 7 17 0 3 1320 108 2318 15 85 36 3 5071 4 3 0 93 March 4, 2026 at 01:09:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 7102 109 10349 93 429 133 0 25658 23 15 0 62 1 15 0 0 5021 15 10547 113 472 88 0 24186 21 14 0 65 2 20 0 0 4064 10 8115 61 300 88 0 19761 18 11 0 72 3 12 0 21 3909 12 8053 86 358 81 0 20817 15 11 0 75 4 16 0 0 2620 13 5239 31 255 106 0 13021 11 7 0 81 5 19 0 0 2253 18 4662 19 152 55 0 11481 11 7 0 82 6 8 0 3 3244 114 6389 46 245 72 0 14200 12 8 0 80 7 20 0 3 2603 118 5138 24 146 82 0 13775 12 8 0 80 March 4, 2026 at 01:09:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6748 110 9860 74 417 135 0 26647 25 16 0 59 1 9 0 0 5142 16 10611 75 463 125 0 25226 20 14 0 66 2 6 0 0 3786 12 7608 38 288 59 0 18157 16 10 0 74 3 3 0 14 4157 14 8467 58 347 71 0 18482 14 10 0 76 4 5 0 7 2450 8 5063 28 248 82 0 12683 12 7 0 81 5 5 0 0 1858 9 3774 21 145 83 0 9770 8 6 0 86 6 9 0 3 3547 107 7266 32 257 94 0 17512 15 10 0 75 7 7 0 3 3115 130 6028 35 181 46 0 14213 12 8 0 80 March 4, 2026 at 01:09:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 4593 105 5119 53 292 824 0 11618 10 9 0 81 1 8 0 0 2586 10 5341 43 279 834 0 12807 10 8 0 82 2 3 0 19 1892 32 3773 36 210 723 0 9135 8 7 0 85 3 7 0 14 2268 82 4497 48 222 787 0 9408 8 7 0 85 4 1 0 7 1356 11 2775 23 180 799 0 6956 6 6 0 88 5 1 0 0 1076 10 2281 12 133 742 0 5776 5 5 0 90 6 4 0 3 1783 110 3427 17 179 794 0 8696 8 6 0 86 7 1 0 3 1448 109 2625 11 124 746 0 6129 6 5 0 89 March 4, 2026 at 01:09:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 101 146 1 14 48 0 319 0 1 0 99 1 0 0 0 61 8 116 2 16 62 0 1509 0 1 0 99 2 0 0 0 45 3 74 0 12 81 0 0 0 0 0 100 3 0 0 14 197 106 286 0 18 78 0 270 0 0 0 100 4 0 0 7 61 5 114 0 20 110 0 262 0 0 0 100 5 0 0 0 76 0 114 0 14 98 0 0 0 1 0 99 6 0 0 3 253 102 93 1 16 65 0 13 0 0 0 100 7 0 0 3 244 103 68 0 15 62 0 208 0 0 0 100 March 4, 2026 at 01:09:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2426 102 689 53 123 59 0 3352 7 2 0 91 1 3 0 0 329 7 663 58 131 120 0 4886 5 2 0 93 2 0 0 9 402 3 836 50 158 58 0 2903 4 2 0 94 3 5 0 28 463 29 884 69 158 31 0 3383 4 2 0 94 4 5 0 7 365 6 771 61 148 37 2 3722 5 2 0 93 5 90 0 7 145 1 220 18 38 123 0 3324 6 2 0 92 6 12 0 129 479 123 554 39 99 60 0 3359 5 2 0 93 7 4 0 3 441 104 463 25 84 67 0 3465 5 2 0 94 March 4, 2026 at 01:09:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 101 124 0 2 1 0 307 0 1 0 99 1 0 0 0 17 4 36 1 0 5 0 1430 0 0 0 100 2 0 0 0 16 4 8 0 1 1 0 0 0 0 0 100 3 0 0 14 24 8 21 0 3 1 0 277 0 0 0 100 4 0 0 7 18 6 8 0 0 1 0 262 0 0 0 100 5 0 0 0 28 11 18 0 1 2 0 16 0 0 0 100 6 0 0 10 311 153 106 0 1 1 0 1 0 0 0 100 7 0 0 3 227 102 18 1 1 4 0 329 0 0 0 100 March 4, 2026 at 01:09:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 102 112 0 1 0 0 301 0 1 0 99 1 0 0 0 32 2 44 1 1 4 0 1424 0 0 0 99 2 0 0 0 28 3 6 0 0 0 0 0 0 0 0 100 3 0 0 126 23 9 23 0 2 0 0 277 0 0 0 100 4 0 0 7 28 4 6 0 0 0 0 260 0 0 0 100 5 0 0 0 25 1 4 1 0 0 0 1 0 0 0 100 6 0 0 3 326 152 104 0 1 0 0 0 0 0 0 100 7 0 0 3 232 102 8 0 2 4 0 284 0 0 0 100 March 4, 2026 at 01:09:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2215 101 336 0 56 646 0 307 0 3 0 97 1 0 0 0 74 2 191 4 52 772 0 1414 0 2 0 97 2 0 0 0 77 3 171 1 49 778 0 0 0 2 0 98 3 0 0 21 156 79 177 1 54 802 0 298 0 3 0 97 4 0 0 7 111 9 238 1 69 767 0 263 0 2 0 98 5 0 0 0 111 1 270 0 65 809 0 1 0 2 0 98 6 0 0 3 368 150 257 1 54 775 0 0 0 2 0 98 7 0 0 3 268 102 145 1 38 737 0 130 0 2 0 98 March 4, 2026 at 01:09:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2467 103 814 9 97 992 0 2736 4 4 0 93 1 2 0 0 460 1 934 11 95 977 0 3097 3 3 0 94 2 1 0 0 506 5 976 11 91 1007 0 1884 2 3 0 95 3 2 0 14 635 179 1055 8 104 913 0 2095 3 3 0 94 4 2 0 7 330 6 591 6 89 995 0 2650 7 3 0 90 5 0 0 0 455 9 867 3 97 847 0 1409 2 2 0 96 6 0 0 129 661 102 1000 7 108 934 0 1797 2 3 0 96 7 6 0 3 461 126 427 4 74 827 0 2260 4 3 0 93 March 4, 2026 at 01:09:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 108 0 2 6 0 594 0 1 0 99 1 0 0 0 23 8 44 1 0 0 0 1140 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 3 0 0 14 113 52 114 1 1 1 0 567 0 0 0 100 4 0 0 7 20 5 15 0 3 0 0 262 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 3 210 102 0 0 0 0 0 0 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1818 0 0 2138 102 153 2 7 5 5 934 0 1 0 98 1 26 0 0 53 7 91 0 9 8 6 1284 0 0 0 99 2 14 0 0 40 3 38 0 10 6 4 83 0 0 0 100 3 901 0 127 134 52 172 0 16 7 8 780 0 1 0 99 4 137 0 7 56 4 67 0 5 8 10 381 0 0 0 100 5 28 0 2 51 8 53 0 8 7 5 112 0 0 0 100 6 748 0 3 238 101 26 2 6 10 4 6531 2 1 0 97 7 10 0 3 243 104 37 0 5 2 1 87 0 0 0 100 March 4, 2026 at 01:09:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 108 1 2 2 0 595 0 1 0 99 1 0 0 0 21 7 44 1 0 0 0 1226 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 1 0 0 0 100 3 0 0 14 110 52 106 0 0 8 0 565 0 0 0 100 4 0 0 7 24 5 25 0 4 0 0 262 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 510 0 0 3586 111 3118 48 223 847 0 8615 7 7 0 86 1 51 0 0 1241 3 2582 54 212 767 0 7158 6 6 0 89 2 88 0 0 1052 5 2114 41 144 825 0 7329 9 5 0 87 3 88 0 0 1441 109 2869 96 217 794 0 6971 5 4 0 90 4 7 0 7 873 9 1836 19 166 906 0 4895 4 4 0 92 5 92 0 0 1337 2 3594 23 132 846 0 14314 7 5 0 88 6 10 0 17 1217 108 2132 30 167 761 0 3899 3 4 0 93 7 37 0 3 911 108 1585 34 148 868 0 3006 3 3 0 94 March 4, 2026 at 01:09:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 6812 112 9765 102 563 564 0 25003 24 16 0 61 1 16 0 0 4688 18 9630 130 570 580 0 23318 19 14 0 68 2 6 0 0 3796 15 7601 83 393 476 0 19059 15 11 0 74 3 3 0 7 4486 114 9017 115 482 616 0 20000 17 12 0 71 4 4 0 0 2695 18 5558 65 347 576 0 16173 15 10 0 76 5 0 0 0 2383 6 4946 35 217 447 0 12243 12 8 0 80 6 2 0 17 3393 111 6735 59 347 521 0 15292 12 9 0 79 7 5 0 3 2914 109 5710 43 234 507 0 11820 10 7 0 82 March 4, 2026 at 01:09:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 6911 106 9998 61 441 108 0 24523 23 15 0 62 1 10 0 0 5188 10 10806 76 482 94 0 24747 19 13 0 68 2 11 0 0 3972 11 7982 45 336 123 0 20813 18 11 0 70 3 4 0 0 4116 27 8576 60 397 63 0 20065 16 11 0 73 4 9 0 7 2836 17 5851 53 291 94 0 15073 14 9 0 77 5 7 0 0 2109 13 4348 37 174 69 0 11357 10 6 0 84 6 6 0 17 3181 110 6393 41 269 101 0 16530 13 9 0 78 7 5 0 5 2411 109 4576 27 161 54 0 11549 10 6 0 84 March 4, 2026 at 01:09:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 5120 121 6280 74 330 67 0 16150 15 10 0 75 1 3 0 0 3468 11 7120 80 372 61 0 17472 14 9 0 76 2 4 0 0 2735 10 5425 50 251 111 0 12546 11 7 0 82 3 27 0 0 2967 17 5993 69 283 56 0 13872 11 8 0 81 4 2 0 7 2125 19 4297 31 208 60 0 9969 8 6 0 86 5 5 0 0 1344 15 2727 13 98 52 0 7107 7 4 0 89 6 4 0 21 2293 112 4562 41 173 117 0 12297 10 7 0 83 7 11 0 7 1606 106 2853 15 87 51 0 7704 6 4 0 90 March 4, 2026 at 01:09:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2484 136 842 66 161 88 3 3633 6 3 0 92 1 1 0 0 480 2 923 115 208 73 0 5225 5 2 0 93 2 41 0 14 266 8 496 44 101 100 0 3582 6 2 0 92 3 4 0 7 420 5 833 78 170 56 1 3742 5 2 0 93 4 0 0 0 356 4 673 70 137 115 0 3368 5 2 0 94 5 1 0 12 412 2 783 86 143 65 0 3175 4 2 0 94 6 1 0 143 543 104 679 66 133 92 0 3033 7 2 0 91 7 45 0 24 501 116 569 53 96 60 0 4138 6 2 0 92 March 4, 2026 at 01:09:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 101 245 2 49 724 0 3 0 3 0 97 1 0 0 7 81 6 201 4 50 853 0 1710 0 3 0 97 2 0 0 0 77 0 167 0 51 808 2 0 0 3 0 97 3 0 0 0 163 73 214 1 60 881 0 298 0 2 0 98 4 0 0 7 162 10 364 0 76 910 0 19 0 2 0 98 5 0 0 0 73 2 154 1 55 901 0 107 0 3 0 97 6 0 0 3 303 117 198 1 54 876 1 12 0 3 0 97 7 2 0 17 354 139 251 2 43 871 1 572 0 3 0 97 March 4, 2026 at 01:09:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2265 103 322 3 76 1159 0 0 0 2 0 98 1 0 0 7 166 3 362 3 94 1251 0 1516 0 2 0 98 2 0 0 112 148 1 305 1 61 1067 0 1 0 2 0 98 3 0 0 0 423 151 454 3 97 1188 0 302 0 2 0 98 4 0 0 0 306 2 598 2 91 1166 0 0 0 2 0 98 5 0 0 0 258 44 421 3 89 1129 0 214 0 2 0 98 6 0 0 3 368 103 342 1 86 1082 1 0 0 2 0 98 7 0 0 17 362 107 305 2 66 975 0 573 0 2 0 98 March 4, 2026 at 01:09:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 105 0 1 0 0 0 0 1 0 99 1 0 0 7 14 3 38 1 0 0 0 1390 0 0 0 100 2 0 0 7 10 0 6 0 1 0 0 0 0 0 0 100 3 0 0 0 31 8 24 0 1 3 0 303 0 0 0 100 4 0 0 0 58 26 52 0 1 0 0 2 0 0 0 100 5 0 0 0 62 28 54 0 0 2 0 202 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 7 0 0 17 215 104 8 0 0 0 0 565 0 0 0 100 March 4, 2026 at 01:09:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2328 109 506 6 24 38 0 1670 3 2 0 95 1 0 0 7 236 3 472 7 23 15 0 3518 3 2 0 95 2 0 0 0 283 3 522 10 17 30 0 2022 3 1 0 96 3 1 0 0 385 9 700 6 32 22 0 2012 2 1 0 97 4 0 0 0 138 42 134 3 7 33 0 2713 5 2 0 93 5 0 0 0 295 7 514 6 21 29 0 2501 3 1 0 96 6 0 0 129 468 103 538 7 29 17 0 1598 2 1 0 97 7 0 0 17 524 107 631 7 16 8 0 2141 5 1 0 95 March 4, 2026 at 01:09:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 151 196 0 1 1 0 0 0 1 0 99 1 0 0 7 37 10 60 2 1 1 0 1399 0 0 0 99 2 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 3 0 0 0 35 6 32 1 1 0 0 299 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 2 0 0 0 100 5 0 0 0 9 1 6 1 1 0 0 302 0 0 0 100 6 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 7 0 0 17 212 104 8 0 0 0 0 565 0 0 0 100 March 4, 2026 at 01:09:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 920 0 114 2245 151 394 2 55 822 9 174 0 3 0 97 1 89 0 7 138 9 280 2 52 920 13 1539 0 3 0 97 2 757 0 3 104 1 212 4 43 866 13 6536 2 3 0 95 3 9 0 0 202 75 383 2 55 837 4 397 0 2 0 98 4 1867 0 0 104 3 211 3 58 873 8 359 0 3 0 97 5 22 0 0 112 2 193 3 45 824 2 480 0 2 0 98 6 14 0 3 302 102 192 1 53 843 3 79 0 2 0 98 7 4 0 17 315 104 198 1 51 799 1 625 0 2 0 98 March 4, 2026 at 01:09:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2195 104 282 0 40 344 0 0 0 1 0 99 1 0 0 7 120 9 235 1 34 361 0 1485 0 1 0 99 2 0 0 0 66 0 132 0 28 294 0 0 0 1 0 99 3 0 0 0 181 85 182 1 34 367 0 299 0 1 0 99 4 0 0 0 95 3 182 0 36 388 0 2 0 1 0 99 5 0 0 0 166 51 225 2 30 278 0 279 0 1 0 99 6 0 0 3 356 102 309 0 31 309 0 0 0 1 0 99 7 0 0 17 264 103 112 1 19 301 0 561 0 1 0 99 March 4, 2026 at 01:09:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 0 2865 103 1779 13 46 24 0 6546 3 2 0 94 1 19 0 7 538 11 1055 11 55 7 0 3649 2 2 0 96 2 18 0 0 389 2 760 7 34 32 0 2444 2 1 0 97 3 87 0 0 439 22 878 16 42 16 0 4853 7 2 0 91 4 4 0 0 432 8 860 8 36 28 0 4050 2 1 0 97 5 48 0 0 368 29 796 2 22 11 0 2899 1 1 0 98 6 503 0 3 492 104 628 3 35 32 0 2545 1 1 0 98 7 65 0 17 273 103 136 2 13 1 0 451 0 0 0 99 March 4, 2026 at 01:09:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 6845 108 10076 103 458 174 0 26675 25 16 0 59 1 36 0 0 5249 16 10601 123 496 129 0 23850 20 14 0 66 2 14 0 7 3713 18 7337 72 316 86 0 17561 15 10 0 75 3 5 0 0 4257 21 8872 96 385 117 0 21475 16 11 0 72 4 3 0 0 2886 13 5741 54 302 144 0 13643 12 8 0 80 5 7 0 0 2163 19 4308 36 183 102 0 10069 9 6 0 86 6 9 0 3 3451 117 6964 51 293 86 0 18502 16 10 0 74 7 19 0 17 2307 115 4454 26 164 79 0 12681 11 7 0 82 March 4, 2026 at 01:09:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6937 110 10181 75 420 118 0 24322 24 15 0 61 1 6 0 14 5461 17 11166 90 483 92 0 24531 20 13 0 67 2 6 0 0 3720 26 7468 62 304 148 0 19670 17 11 0 72 3 15 0 7 4046 14 8475 59 373 82 0 22673 19 12 0 68 4 7 0 0 2640 11 5331 29 269 84 0 14337 12 8 0 80 5 1 0 0 2045 9 4104 26 173 96 0 9831 8 5 0 87 6 8 0 3 3455 112 7007 48 286 144 0 18364 14 10 0 76 7 4 0 3 2557 110 5021 24 169 78 0 11484 10 7 0 83 March 4, 2026 at 01:09:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 14 6429 104 9145 181 555 960 2 22486 23 16 0 61 1 23 0 14 4418 9 9075 180 583 988 0 22040 20 14 0 66 2 56 0 31 3726 12 7633 218 444 1024 0 20113 20 13 0 67 3 93 0 7 3810 78 7712 137 435 1130 0 21487 19 13 0 68 4 42 0 7 2710 17 5537 93 369 1014 0 15393 16 11 0 73 5 15 0 0 2209 12 4679 141 289 940 0 16202 17 10 0 73 6 12 0 157 3319 125 6661 138 422 912 2 16522 16 12 0 73 7 16 0 3 2531 113 4888 105 300 1002 2 14124 14 9 0 77 March 4, 2026 at 01:09:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2213 105 327 2 57 613 0 0 0 2 0 98 1 3 0 14 267 52 434 0 59 651 0 280 0 1 0 99 2 0 0 0 172 2 356 6 69 577 0 314 1 1 0 98 3 0 0 7 225 110 235 1 57 675 0 260 0 1 0 99 4 0 0 0 124 3 249 0 45 744 0 1 0 1 0 99 5 0 0 7 104 1 215 1 46 579 0 0 0 1 0 99 6 0 0 3 305 102 208 4 53 560 0 204 0 1 0 98 7 0 0 3 304 103 237 2 48 583 0 1439 0 1 0 98 March 4, 2026 at 01:09:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2110 104 119 0 2 0 0 6 0 1 0 99 1 0 0 14 141 59 124 0 1 0 0 277 0 0 0 100 2 0 0 0 26 1 2 0 0 0 0 300 0 0 0 100 3 0 0 7 31 4 8 0 0 0 0 260 0 0 0 100 4 0 0 0 32 3 8 0 1 0 0 5 0 0 0 100 5 0 0 0 29 1 8 0 1 0 0 0 0 0 0 100 6 0 0 3 236 103 24 0 2 0 0 316 0 0 0 100 7 0 0 3 230 103 36 2 1 2 0 1428 0 0 0 99 March 4, 2026 at 01:09:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 112 0 2 0 0 3 0 1 0 99 1 0 0 14 122 58 118 0 1 0 0 276 0 0 0 100 2 0 0 0 16 1 10 0 3 0 0 300 0 0 0 100 3 0 0 7 22 6 18 0 1 0 0 267 0 0 0 100 4 0 0 0 15 2 12 0 1 0 0 13 0 0 0 100 5 0 0 0 18 7 6 0 1 0 0 6 0 0 0 100 6 0 0 3 212 102 6 0 0 2 0 309 0 0 0 100 7 0 0 3 222 103 49 2 1 1 0 1426 0 0 0 99 March 4, 2026 at 01:09:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 102 103 0 2 217 0 804 1 1 0 98 1 0 0 14 225 58 318 0 6 17 0 1112 1 0 0 99 2 0 0 0 73 1 124 0 9 6 0 527 0 0 0 100 3 0 0 7 128 5 253 0 6 10 0 770 1 0 0 99 4 0 0 0 19 3 16 0 1 267 0 826 2 0 0 98 5 0 0 0 76 1 132 0 1 4 0 389 0 0 0 99 6 0 0 31 322 103 280 1 3 15 0 1090 1 0 0 99 7 0 0 3 349 103 317 1 5 2 0 1689 1 0 0 98 March 4, 2026 at 01:09:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2312 101 464 7 68 1130 0 1099 2 4 0 94 1 0 0 14 302 3 619 5 81 766 0 1584 2 2 0 96 2 0 0 0 303 8 586 5 62 998 0 1326 1 3 0 96 3 0 0 7 258 74 364 4 60 840 0 2083 5 3 0 92 4 4 0 0 198 47 288 5 54 1075 0 2177 4 3 0 93 5 0 0 0 318 4 653 4 63 791 0 1374 2 2 0 96 6 0 0 101 482 102 640 8 83 1079 0 1330 1 3 0 96 7 0 0 3 421 104 485 1 60 893 0 1908 1 3 0 96 March 4, 2026 at 01:09:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2216 103 340 1 62 849 0 6 0 2 0 98 1 0 0 14 171 1 356 0 64 946 0 266 0 2 0 98 2 0 0 0 125 9 228 0 60 814 0 584 0 1 0 98 3 0 0 7 232 121 260 1 76 811 0 551 0 2 0 98 4 0 0 0 122 2 264 0 63 885 0 0 0 1 0 99 5 0 0 0 202 50 311 0 47 702 0 0 0 1 0 99 6 0 0 3 322 103 272 1 77 845 0 2 0 2 0 98 7 0 0 3 408 102 446 1 61 722 0 1132 0 2 0 98 March 4, 2026 at 01:09:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 2 0 0 0 26 9 20 1 0 5 0 624 0 0 0 100 3 0 0 7 19 6 14 1 1 2 0 555 0 0 0 100 4 0 0 0 12 4 6 0 1 0 0 1 0 0 0 100 5 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 6 0 0 3 209 102 4 0 0 0 0 0 0 0 0 100 7 0 0 3 211 103 34 0 0 0 0 1131 0 0 0 100 March 4, 2026 at 01:09:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 110 0 3 1 0 2 0 1 0 99 1 0 0 14 12 3 6 0 1 1 0 289 0 0 0 100 2 0 0 0 31 9 28 0 1 6 0 605 0 0 0 100 3 0 0 7 28 7 24 0 3 4 0 560 0 0 0 100 4 0 0 0 24 6 16 0 0 1 0 14 0 0 0 100 5 0 0 0 115 56 104 0 0 1 0 7 0 0 0 100 6 0 0 7 216 105 10 0 0 1 0 24 0 0 0 100 7 0 0 7 215 102 38 1 1 0 0 1131 0 0 0 100 March 4, 2026 at 01:09:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 111 0 1 0 0 6 0 1 0 99 1 0 0 14 9 1 8 0 1 0 0 341 0 0 0 100 2 0 0 0 24 6 18 1 0 4 0 610 0 0 0 100 3 0 0 7 24 5 24 1 1 2 0 556 0 0 0 100 4 0 0 0 10 2 6 0 2 0 0 3 0 0 0 100 5 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 6 0 0 4 210 102 6 0 0 0 0 0 0 0 0 100 7 0 0 2 223 107 48 1 0 0 0 1145 0 0 0 99 March 4, 2026 at 01:09:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2120 104 125 0 8 4 0 33 0 1 0 99 1 2082 0 14 22 2 33 2 3 3 4 593 0 1 0 99 2 25 0 0 31 3 55 0 14 16 6 862 0 0 0 100 3 10 0 7 32 5 43 0 10 11 1 620 0 0 0 100 4 2 0 0 22 2 28 0 5 2 1 32 0 0 0 100 5 1 0 0 116 51 123 0 3 4 0 20 0 0 0 100 6 0 0 4 218 105 17 0 2 2 0 3 0 0 0 100 7 0 0 2 225 108 52 1 2 6 0 1139 0 0 0 99 March 4, 2026 at 01:09:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 744 0 0 2128 100 110 3 3 1 3 6486 2 2 0 96 1 690 0 128 39 2 59 0 5 2 9 387 0 0 0 99 2 107 0 0 40 2 43 0 4 2 10 563 0 0 0 100 3 17 0 8 46 5 42 1 6 2 4 660 0 0 0 100 4 9 0 0 39 2 34 0 5 2 4 64 0 0 0 100 5 5 0 0 125 50 106 0 1 1 1 18 0 0 0 100 6 3 0 3 228 102 10 0 3 0 1 33 0 0 0 100 7 0 0 3 242 109 48 1 1 1 0 1252 0 0 0 99 March 4, 2026 at 01:09:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 106 0 0 0 0 4 0 1 0 99 1 0 0 14 8 2 2 0 0 0 0 266 0 0 0 100 2 0 0 0 13 2 8 1 1 2 0 602 0 0 0 100 3 0 0 7 23 5 21 0 2 1 0 555 0 0 0 100 4 0 0 0 12 3 6 0 1 0 0 1 0 0 0 100 5 0 0 0 111 50 112 0 1 0 0 3 0 0 0 100 6 0 0 4 211 103 6 0 0 0 0 2 0 0 0 100 7 0 0 2 222 108 44 1 0 1 0 1218 0 0 0 99 March 4, 2026 at 01:09:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 5619 109 7276 76 359 90 0 19114 19 12 0 69 1 6 0 14 4362 12 8986 74 391 147 0 22649 20 12 0 68 2 18 0 0 3387 16 6736 36 215 138 0 18430 16 10 0 75 3 56 0 7 4208 11 9243 67 289 119 0 26692 15 10 0 75 4 89 0 0 2685 10 5560 34 243 94 0 17447 17 9 0 74 5 520 0 0 1962 20 4120 26 134 120 0 11436 10 6 0 84 6 128 0 2 3373 114 6698 55 242 97 0 15643 12 9 0 79 7 40 0 4 2371 113 4477 13 108 76 0 10536 9 6 0 85 March 4, 2026 at 01:09:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 6793 109 9933 53 413 116 0 24650 23 15 0 63 1 7 0 14 4905 9 10190 56 438 112 0 24640 21 13 0 65 2 10 0 0 3711 14 7608 49 290 135 0 19635 18 11 0 71 3 3 0 0 4251 17 8973 65 352 109 0 21140 17 11 0 72 4 9 0 0 2852 14 5813 40 292 105 0 14991 12 8 0 79 5 7 0 0 2044 9 4191 21 143 78 0 11640 10 6 0 83 6 6 0 10 3276 113 6488 36 253 102 0 17023 14 9 0 77 7 2 0 3 2677 110 5211 19 136 90 0 12488 10 7 0 83 March 4, 2026 at 01:09:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2504 102 915 6 80 616 0 2183 2 3 0 95 1 6 0 14 570 5 1144 11 91 677 0 2610 2 3 0 95 2 3 0 0 536 5 1110 8 68 644 0 1755 2 3 0 96 3 3 0 0 557 117 984 3 77 637 0 1409 1 2 0 97 4 6 0 0 238 8 502 3 75 662 0 2306 1 2 0 97 5 2 0 0 197 10 436 4 68 675 0 1269 1 2 0 97 6 1 0 10 659 106 937 2 87 643 0 1602 1 3 0 96 7 1 0 3 600 105 856 6 53 647 0 1892 2 3 0 96 March 4, 2026 at 01:09:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 101 151 0 9 44 0 2 0 1 0 99 1 0 0 14 28 1 44 0 6 30 0 266 0 0 0 100 2 0 0 0 37 1 53 0 8 36 0 0 0 0 0 100 3 0 0 0 79 37 54 0 8 23 0 305 0 0 0 100 4 0 0 0 72 5 155 2 12 38 0 1506 0 0 0 99 5 0 0 0 112 40 129 0 7 37 0 307 0 0 0 100 6 0 0 10 266 122 80 0 7 36 0 260 0 0 0 100 7 0 0 3 228 102 43 0 6 45 0 0 0 0 0 100 March 4, 2026 at 01:09:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 1 0 99 1 0 0 14 11 1 12 0 1 0 0 266 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 4 0 0 3 0 301 0 0 0 100 4 0 0 0 15 5 38 1 0 4 0 1504 0 0 0 100 5 0 0 0 20 7 16 1 1 0 0 308 0 0 0 100 6 0 0 10 311 153 106 1 0 0 0 260 0 0 0 100 7 0 0 3 213 103 6 0 1 1 0 1 0 0 0 100 March 4, 2026 at 01:09:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 116 0 0 1 0 3 0 1 0 99 1 0 0 14 9 2 4 0 1 1 0 266 0 0 0 100 2 0 0 0 16 2 14 0 1 1 0 0 0 0 0 100 3 0 0 0 10 2 2 1 0 7 0 302 0 0 0 100 4 0 0 0 19 7 44 1 1 0 0 1509 0 0 0 100 5 0 0 0 37 16 30 0 0 1 0 324 0 0 0 100 6 0 0 10 314 154 112 0 0 1 0 268 0 0 0 100 7 0 0 3 215 102 10 0 0 1 0 5 0 0 0 100 March 4, 2026 at 01:09:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 14 7 1 6 0 0 0 0 284 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 5 0 298 0 0 0 100 4 0 0 0 15 5 38 1 0 2 0 1504 0 0 0 100 5 0 0 0 25 10 20 0 0 0 0 308 0 0 0 100 6 0 0 10 312 154 108 0 0 0 0 261 0 0 0 100 7 0 0 3 213 103 8 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:09:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 112 0 0 0 0 2 0 1 0 99 1 0 0 14 6 1 4 0 0 5 0 266 0 0 0 100 2 0 0 0 12 2 10 0 2 1 0 1 0 0 0 100 3 0 0 0 15 2 16 0 1 3 0 298 0 0 0 100 4 0 0 0 22 5 46 2 0 3 0 1506 0 0 0 100 5 0 0 0 24 9 18 1 0 0 0 310 0 0 0 100 6 0 0 10 313 154 110 0 1 0 0 261 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 114 0 0 0 0 4 0 1 0 99 1 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 1 4 0 302 0 0 0 100 4 0 0 0 20 5 50 1 2 5 0 1508 0 0 0 100 5 0 0 0 24 8 18 1 0 0 0 312 0 0 0 100 6 0 0 10 312 153 108 1 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:09:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 110 0 0 0 0 2 0 1 0 99 1 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 2 1 0 5 0 299 0 0 0 100 4 0 0 0 16 5 38 1 0 5 0 1506 0 0 0 100 5 0 0 0 21 8 18 0 1 0 0 306 0 0 0 100 6 0 0 10 310 153 106 0 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:10:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 1 0 99 1 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 2 0 301 0 0 0 100 4 0 0 0 17 5 40 1 1 2 0 1506 0 0 0 100 5 1 0 0 39 15 38 0 1 0 0 319 0 0 0 100 6 0 0 10 315 154 112 0 0 0 0 268 0 0 0 100 7 0 0 3 214 102 11 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:10:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 110 0 0 0 0 2 0 1 0 99 1 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 9 0 299 0 0 0 100 4 0 0 0 16 5 40 2 1 6 0 1506 0 0 0 100 5 0 0 0 28 10 22 1 1 0 0 308 0 0 0 100 6 0 0 10 315 153 116 0 1 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:10:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 96 0 0 5917 103 8253 72 456 405 0 22775 25 13 0 62 1 183 0 14 4100 5 8419 85 468 407 0 23601 19 13 0 68 2 28 0 0 3734 9 7622 59 325 373 0 17841 15 10 0 75 3 97 0 0 4478 97 9759 61 410 347 0 27615 16 11 0 72 4 47 0 0 2623 17 5339 36 284 515 0 14929 12 8 0 80 5 391 0 0 1890 20 3890 27 229 409 0 10684 9 6 0 84 6 20 0 9 3042 123 6127 49 311 439 0 15550 13 9 0 78 7 9 0 4 2537 110 4903 44 201 339 0 9751 8 6 0 86 March 4, 2026 at 01:10:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 6814 110 9993 65 420 135 0 26523 24 16 0 60 1 7 0 14 4705 12 9615 76 453 128 0 24308 19 13 0 68 2 10 0 9 4385 14 8955 59 323 156 0 18477 17 11 0 72 3 15 0 0 4578 27 9519 53 371 137 0 22598 18 12 0 70 4 13 0 0 2613 8 5339 42 276 105 0 14812 13 8 0 79 5 3 0 0 2259 11 4650 23 149 115 0 12409 10 7 0 83 6 4 0 10 3274 114 6568 38 281 88 0 17321 15 9 0 76 7 2 0 3 2276 120 4344 20 141 102 0 11078 10 6 0 84 March 4, 2026 at 01:10:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 6694 106 9759 77 398 110 0 24184 23 15 0 62 1 15 0 14 4536 10 9377 65 404 137 0 25993 22 14 0 64 2 6 0 0 4013 8 8355 42 277 153 0 21386 18 12 0 70 3 9 0 0 4435 18 9220 47 338 120 0 19696 16 10 0 74 4 5 0 0 3273 21 6490 38 255 95 0 14510 13 8 0 79 5 7 0 0 2032 20 4222 19 146 125 0 12229 10 6 0 83 6 5 0 10 3086 116 6074 30 233 118 0 15616 14 8 0 78 7 1 0 3 2448 107 4688 23 147 74 0 12110 9 6 0 85 March 4, 2026 at 01:10:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 120 1 5 1 0 9 0 1 0 99 1 0 0 14 113 53 108 0 1 1 0 266 0 0 0 100 2 0 0 0 25 9 18 0 1 1 0 308 0 0 0 100 3 0 0 0 11 2 4 0 0 4 0 210 0 0 0 100 4 0 0 0 17 5 4 0 0 1 0 1 0 0 0 100 5 0 0 0 26 9 10 1 0 2 0 301 0 0 0 100 6 1 0 14 222 107 14 0 0 1 0 290 0 0 0 100 7 0 0 7 219 103 42 1 1 0 0 1216 0 0 0 100 March 4, 2026 at 01:10:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 0 0 0 0 0 1 0 99 1 0 0 14 110 51 108 0 0 0 0 277 0 0 0 100 2 0 0 0 20 7 14 1 0 0 0 305 0 0 0 100 3 0 0 0 8 1 2 1 0 4 0 303 0 0 0 100 4 0 0 0 8 2 4 0 1 0 0 0 0 0 0 100 5 0 0 0 11 2 6 0 0 3 0 295 0 0 0 100 6 0 0 10 219 105 18 1 1 0 0 261 0 0 0 100 7 0 0 3 212 103 34 1 0 1 0 1214 0 0 0 100 March 4, 2026 at 01:10:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 101 269 1 37 683 0 0 0 2 0 98 1 0 0 14 210 53 323 0 54 699 0 273 0 1 0 99 2 0 0 0 153 6 329 0 60 608 0 311 0 1 0 99 3 0 0 0 151 74 168 1 40 579 0 331 0 2 0 98 4 0 0 0 103 8 194 1 47 645 0 17 0 2 0 98 5 0 0 0 89 2 183 2 31 661 0 298 0 2 0 98 6 0 0 10 293 106 173 2 38 658 0 264 0 2 0 98 7 0 0 3 288 104 209 2 41 597 0 1227 0 2 0 98 March 4, 2026 at 01:10:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2216 132 313 0 15 43 0 0 0 1 0 99 1 0 0 14 62 1 96 0 12 49 0 266 0 0 0 100 2 0 0 0 42 2 72 0 16 60 0 300 0 0 0 100 3 0 0 0 128 65 113 0 13 52 0 271 0 0 0 100 4 0 0 0 47 9 65 0 11 61 0 7 0 0 0 100 5 0 0 0 40 1 71 0 12 56 0 294 0 0 0 100 6 0 0 10 245 104 72 0 12 52 0 260 0 0 0 100 7 0 0 3 245 105 92 1 7 46 0 1214 0 0 0 99 March 4, 2026 at 01:10:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 126 0 1 0 0 1 0 1 0 99 1 0 0 14 6 1 4 0 0 0 0 266 0 0 0 100 2 0 0 0 15 3 10 0 1 0 0 302 0 0 0 100 3 0 0 0 107 51 102 0 0 1 0 302 0 0 0 100 4 0 0 0 18 7 12 0 0 0 0 8 0 0 0 100 5 0 0 0 8 1 2 1 0 1 0 294 0 0 0 100 6 0 0 10 211 104 6 0 0 0 0 260 0 0 0 100 7 0 0 3 212 102 34 1 1 1 0 1217 0 0 0 100 March 4, 2026 at 01:10:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 103 130 2 0 0 0 13 0 1 0 99 1 0 0 14 13 1 16 0 1 0 0 266 0 0 0 100 2 0 0 0 12 2 6 1 1 0 0 300 0 0 0 100 3 0 0 0 107 51 104 0 1 0 0 301 0 0 0 100 4 0 0 0 21 8 14 0 0 0 0 6 0 0 0 100 5 0 0 0 18 7 6 0 0 3 0 299 0 0 0 100 6 0 0 10 216 105 14 1 0 0 0 268 0 0 0 100 7 0 0 3 214 102 39 1 1 1 0 1214 0 0 0 100 March 4, 2026 at 01:10:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 114 0 1 0 0 0 0 1 0 99 1 0 0 14 37 16 36 0 1 0 0 266 0 0 0 100 2 0 0 0 15 3 8 0 0 0 0 302 0 0 0 100 3 0 0 0 78 36 70 1 0 2 0 299 0 0 0 100 4 0 0 0 18 7 12 0 0 0 0 5 0 0 0 100 5 0 0 0 9 2 4 0 0 2 0 295 0 0 0 100 6 0 0 10 211 104 6 0 0 0 0 260 0 0 0 100 7 0 0 3 210 102 32 1 0 0 0 1215 0 0 0 100 March 4, 2026 at 01:10:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2883 0 0 2862 106 1365 627 111 168 8 6275 81 6 0 12 1 3862 0 14 976 20 1740 756 150 146 10 6916 81 6 0 13 2 1304 0 91 936 13 1716 760 122 190 5 6552 83 5 0 12 3 3128 0 0 916 15 1807 821 123 192 10 6436 83 6 0 11 4 1871 0 0 910 20 1605 741 107 127 4 5831 84 5 0 11 5 5868 0 0 923 5 1793 808 131 185 10 6672 82 7 0 11 6 5728 0 1011 946 108 1802 803 132 242 11 7511 81 8 0 12 7 6266 0 3 959 105 1474 609 136 191 18 7350 82 7 0 11 March 4, 2026 at 01:10:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 112 0 5 0 0 5 0 1 0 99 1 3 0 14 51 17 47 0 5 1 0 301 0 0 0 100 2 0 0 0 105 45 106 0 2 1 0 315 0 0 0 100 3 7 0 0 14 1 14 0 2 1 0 311 0 0 0 100 4 1 0 0 13 3 8 0 2 4 0 12 0 0 0 100 5 0 0 0 9 1 4 1 0 2 0 303 0 0 0 100 6 0 0 10 219 104 12 0 0 0 0 269 0 0 0 100 7 1 0 3 215 103 38 1 1 0 0 1233 0 0 0 100 March 4, 2026 at 01:10:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 112 0 0 0 0 0 0 1 0 99 1 0 0 14 9 2 6 0 0 0 0 267 0 0 0 100 2 0 0 0 124 59 118 1 0 0 0 309 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 304 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 5 0 0 0 7 1 4 0 1 2 0 294 0 0 0 100 6 0 0 10 209 103 4 1 0 0 0 260 0 0 0 100 7 0 0 3 210 102 32 1 0 1 0 1227 0 0 0 100 March 4, 2026 at 01:10:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 104 128 1 1 1 0 13 0 1 0 99 1 0 0 14 9 2 4 0 1 1 0 266 0 0 0 100 2 0 0 0 125 60 120 0 1 0 0 310 0 0 0 100 3 0 0 0 12 2 4 1 0 5 0 299 0 0 0 100 4 0 0 0 17 4 16 0 1 1 0 1 0 0 0 100 5 0 0 0 19 8 6 0 0 5 0 299 0 0 0 100 6 0 0 10 213 104 10 0 0 1 0 268 0 0 0 100 7 0 0 3 214 102 36 1 0 2 0 1227 0 0 0 100 March 4, 2026 at 01:10:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 102 137 0 4 2 0 124 0 1 0 99 1 0 0 14 34 4 52 0 4 1 0 384 0 0 0 100 2 0 0 0 147 60 162 0 3 0 0 420 0 0 0 100 3 31 0 0 8 1 2 0 1 2 0 401 0 0 0 100 4 0 0 0 40 2 67 0 3 0 0 77 0 0 0 100 5 0 0 0 16 2 16 0 2 5 0 414 0 0 0 99 6 0 0 10 215 104 13 0 1 10 1 424 0 0 0 99 7 0 0 3 227 102 70 1 3 2 0 1312 0 0 0 99 March 4, 2026 at 01:10:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2407 106 664 34 104 799 0 3773 9 5 0 86 1 7 0 28 266 9 513 18 91 945 0 2674 4 3 0 92 2 1 0 9 378 8 721 37 105 851 0 1418 3 4 0 93 3 38 0 0 190 69 198 8 62 933 2 4284 10 4 0 85 4 1 0 0 403 4 761 28 115 836 0 1668 5 3 0 91 5 0 0 0 326 5 605 15 77 947 0 1916 4 3 0 93 6 3 0 136 488 111 567 23 91 889 0 3781 9 4 0 87 7 0 0 10 652 147 804 20 82 849 0 2245 4 4 0 93 March 4, 2026 at 01:10:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2287 149 487 0 71 872 0 298 0 2 0 98 1 0 0 21 137 2 287 2 70 931 0 546 0 2 0 98 2 0 0 0 169 8 336 0 58 880 0 9 0 2 0 98 3 0 0 0 267 146 433 1 70 897 0 0 0 2 0 98 4 0 0 0 137 4 286 1 67 913 0 303 0 2 0 98 5 0 0 0 149 1 298 1 47 925 0 0 0 2 0 98 6 0 0 10 349 104 317 2 63 970 0 297 0 2 0 98 7 0 0 3 316 104 253 2 59 837 0 1134 0 2 0 98 March 4, 2026 at 01:10:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 153 206 1 0 2 0 302 0 1 0 99 1 0 0 126 21 2 19 0 1 0 0 266 0 0 0 100 2 0 0 0 45 8 22 1 2 0 0 11 0 0 0 100 3 0 0 0 22 0 2 0 1 0 0 0 0 0 0 100 4 0 0 0 27 3 6 0 0 0 0 300 0 0 0 100 5 0 0 0 25 2 4 0 0 0 0 5 0 0 0 100 6 0 0 10 229 104 8 0 0 6 0 554 0 0 0 100 7 0 0 3 231 102 42 1 1 0 0 1134 0 0 0 100 March 4, 2026 at 01:10:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2169 155 215 1 0 3 0 304 0 1 0 99 1 0 0 21 18 1 14 0 0 0 0 266 0 0 0 100 2 0 0 0 22 7 16 0 0 0 0 6 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 12 3 8 0 1 0 0 301 0 0 0 100 5 0 0 0 19 8 8 0 1 0 0 14 0 0 0 100 6 0 0 10 217 105 12 1 0 5 0 562 0 0 0 100 7 0 0 3 215 102 39 1 2 0 0 1134 0 0 0 100 March 4, 2026 at 01:10:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2467 116 806 10 27 23 0 1568 2 2 0 97 1 0 0 14 53 2 46 5 6 364 0 3226 5 2 0 93 2 0 0 0 424 48 703 4 31 12 0 1440 2 1 0 97 3 1 0 0 326 3 628 9 21 27 0 1815 6 1 0 94 4 5 0 0 254 5 476 4 29 43 0 1964 2 1 0 97 5 3 0 0 135 6 210 8 15 390 0 2547 5 1 0 94 6 0 0 136 477 105 558 10 28 25 0 1878 2 1 0 98 7 20 0 3 421 103 442 6 11 14 0 2230 2 1 0 97 March 4, 2026 at 01:10:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2194 107 284 1 60 925 0 285 0 3 0 97 1 0 0 14 102 2 214 2 46 962 0 266 0 2 0 98 2 0 0 0 174 49 263 1 49 854 0 48 0 2 0 98 3 0 0 0 178 75 376 0 71 802 0 0 0 2 0 98 4 0 0 0 92 5 192 2 49 838 0 328 0 2 0 98 5 0 0 0 81 1 175 1 44 685 0 0 0 2 0 98 6 0 0 10 294 105 217 2 57 967 0 518 0 2 0 98 7 0 0 3 277 104 180 1 47 633 0 1134 0 2 0 98 March 4, 2026 at 01:10:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 106 254 0 28 350 0 8 0 2 0 98 1 0 0 14 117 1 217 0 39 376 0 266 0 1 0 99 2 0 0 0 149 3 283 0 25 348 0 287 0 1 0 99 3 0 0 0 183 96 207 0 38 424 0 0 0 1 0 99 4 0 0 0 100 6 187 0 39 382 0 596 0 1 0 99 5 0 0 0 70 0 134 0 23 326 0 0 0 1 0 99 6 0 0 10 285 103 171 0 36 313 0 260 0 1 0 99 7 0 0 3 375 150 280 1 32 363 0 1133 0 1 0 99 March 4, 2026 at 01:10:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 106 112 0 0 0 0 8 0 1 0 99 1 0 0 14 9 2 6 0 0 0 0 267 0 0 0 100 2 0 0 0 23 2 23 1 2 3 0 302 0 0 0 100 3 0 0 0 8 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 19 6 14 0 1 0 0 596 0 0 0 100 5 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 6 0 0 10 211 103 6 0 0 0 0 260 0 0 0 100 7 0 0 3 310 152 132 1 0 2 0 1134 0 0 0 100 March 4, 2026 at 01:10:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 110 128 0 1 1 0 17 0 1 0 99 1 0 0 14 8 2 2 0 0 1 0 266 0 0 0 100 2 0 0 0 20 4 14 1 1 5 0 308 0 0 0 100 3 0 0 0 17 1 16 0 2 4 0 76 0 0 0 100 4 0 0 0 32 9 23 1 2 4 0 598 0 0 0 100 5 0 0 0 30 11 20 0 1 1 0 21 0 0 0 100 6 0 0 14 218 105 14 0 0 1 0 288 0 0 0 100 7 0 0 7 316 152 143 1 1 0 0 1142 0 0 0 99 March 4, 2026 at 01:10:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 107 118 0 1 0 0 8 0 1 0 99 1 0 0 14 7 1 6 0 0 0 0 284 0 0 0 100 2 0 0 0 13 2 8 0 0 2 0 300 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 21 5 12 1 0 3 0 593 0 0 0 100 5 0 0 0 8 1 6 0 2 0 0 1 0 0 0 100 6 0 0 10 214 104 8 1 0 0 0 261 0 0 0 100 7 0 0 3 314 153 138 1 0 1 0 1143 0 0 0 100 March 4, 2026 at 01:10:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2172 119 190 0 9 10 3 106 0 1 0 99 1 13 0 14 40 1 38 0 8 7 4 318 0 0 0 100 2 11 0 0 38 3 33 0 8 11 3 336 0 0 0 100 3 5 0 0 34 0 27 0 7 5 2 63 0 0 0 100 4 716 0 0 48 4 44 1 6 11 3 7127 2 1 0 97 5 915 0 113 29 4 56 1 8 3 11 203 0 0 0 99 6 1956 0 9 255 103 78 2 12 9 13 704 0 1 0 99 7 31 0 6 322 142 154 0 8 11 5 1367 0 0 0 99 March 4, 2026 at 01:10:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 157 222 0 0 0 0 8 0 1 0 99 1 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 2 0 0 0 12 2 6 1 0 5 0 302 0 0 0 100 3 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 4 0 0 0 15 4 10 0 1 1 0 594 0 0 0 100 5 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 6 0 0 10 211 103 6 0 0 0 0 260 0 0 0 100 7 0 0 3 210 102 32 1 0 0 0 1217 0 0 0 100 March 4, 2026 at 01:10:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 241 0 0 5412 127 7140 71 337 111 0 19842 18 12 0 70 1 10 0 0 3965 13 8006 83 366 65 0 19759 18 10 0 72 2 58 0 0 2901 11 5815 55 240 82 0 14444 12 8 0 80 3 12 0 0 3585 8 7907 51 259 118 0 23935 14 9 0 77 4 61 0 14 2250 9 4491 37 218 75 0 12245 11 7 0 83 5 83 0 0 1618 11 3246 16 96 34 0 6225 6 4 0 91 6 277 0 10 2402 107 4637 33 191 101 0 13978 11 7 0 81 7 16 0 3 1693 107 3141 14 110 98 0 10137 8 5 0 87 March 4, 2026 at 01:10:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 6952 105 10179 62 397 165 0 26194 23 15 0 61 1 6 0 0 4837 18 10051 66 427 144 0 25649 22 14 0 64 2 11 0 0 3886 14 7891 55 284 115 0 18903 17 10 0 72 3 10 0 0 4207 10 8630 63 358 73 0 21303 17 12 0 71 4 6 0 14 2791 18 5583 34 263 94 0 16171 13 8 0 79 5 2 0 0 2206 23 4439 22 152 93 0 10085 9 5 0 86 6 6 0 3 3569 113 7082 32 236 113 0 16552 14 9 0 77 7 1 0 10 2481 106 4768 23 131 86 0 11981 10 7 0 83 March 4, 2026 at 01:10:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3153 102 2161 21 80 21 0 5515 5 4 0 91 1 14 0 0 1149 4 2326 22 97 26 0 5178 4 3 0 93 2 1 0 0 842 4 1704 7 42 29 0 4727 5 3 0 93 3 2 0 0 905 13 1794 13 76 35 0 4854 4 2 0 94 4 0 0 14 662 8 1328 14 61 20 0 5055 3 2 0 94 5 0 0 0 544 5 1090 6 30 21 0 2615 2 1 0 96 6 5 0 2 1240 140 2140 14 65 28 0 4270 3 2 0 94 7 4 0 11 896 111 1479 7 42 32 0 4161 3 2 0 95 March 4, 2026 at 01:10:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2192 100 273 1 43 576 0 0 0 2 0 98 1 0 0 0 83 2 186 1 58 664 0 0 0 2 0 98 2 0 0 0 147 2 312 0 62 630 0 300 0 1 0 99 3 0 0 0 163 76 179 1 53 654 0 301 0 2 0 98 4 0 0 14 89 5 212 2 55 655 0 1481 0 2 0 98 5 0 0 0 72 2 149 1 37 672 0 295 0 2 0 98 6 0 0 3 405 151 324 1 56 583 0 0 0 2 0 98 7 0 0 10 289 110 176 0 47 604 0 268 0 1 0 98 March 4, 2026 at 01:10:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 100 138 0 15 23 0 0 0 1 0 99 1 0 0 0 49 2 84 0 17 55 0 0 0 0 0 100 2 0 0 0 50 2 74 0 9 40 0 300 0 0 0 100 3 0 0 0 81 40 62 0 10 50 0 234 0 0 0 100 4 0 0 14 46 4 103 1 11 46 0 1480 0 0 0 99 5 0 0 0 34 1 51 1 8 33 0 294 0 0 0 100 6 0 0 3 371 151 228 0 10 22 0 0 0 0 0 100 7 0 0 10 255 111 73 0 13 22 0 268 0 0 0 100 March 4, 2026 at 01:10:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 3 0 1 0 99 1 0 0 0 15 4 12 0 2 0 0 2 0 0 0 100 2 0 0 0 20 4 180 1 1 0 0 633 0 0 0 100 3 0 0 0 16 1 10 0 0 1 0 298 0 0 0 100 4 0 0 14 19 7 44 1 0 1 0 1485 0 0 0 100 5 0 0 0 17 6 12 0 0 1 0 298 0 0 0 100 6 0 0 3 309 151 108 0 1 0 0 4 0 0 0 100 7 0 0 10 227 109 18 2 0 0 0 268 0 0 0 100 March 4, 2026 at 01:10:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 104 0 0 1 0 0 0 1 0 99 1 0 0 0 27 5 26 0 2 1 0 14 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 300 0 0 0 100 3 0 0 0 16 2 6 0 0 4 0 307 0 0 0 100 4 0 0 14 18 6 38 1 0 1 0 1481 0 0 0 100 5 0 0 0 17 8 4 0 0 5 0 294 0 0 0 100 6 0 0 7 311 152 108 0 1 0 0 8 0 0 0 100 7 0 0 14 231 110 27 0 1 1 0 270 0 0 0 100 March 4, 2026 at 01:10:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 100 0 0 0 0 0 0 1 0 99 1 0 0 0 16 2 10 0 1 0 0 0 0 0 0 100 2 0 0 0 15 3 10 0 2 0 0 301 0 0 0 100 3 0 0 0 12 1 16 0 2 0 0 297 0 0 0 100 4 0 0 14 10 4 38 0 1 0 0 1480 0 0 0 100 5 0 0 0 11 2 6 0 0 1 0 295 0 0 0 100 6 0 0 3 306 151 100 0 0 0 0 0 0 0 0 100 7 0 0 10 224 109 18 0 0 0 0 269 0 0 0 100 March 4, 2026 at 01:10:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 104 0 0 2 0 0 0 1 0 99 1 0 0 0 12 1 6 0 1 1 0 0 0 0 0 100 2 0 0 0 12 2 8 0 0 1 0 300 0 0 0 100 3 0 0 0 21 3 16 1 2 1 0 392 0 0 0 100 4 0 0 14 18 4 48 1 1 0 0 1480 0 0 0 100 5 0 0 0 11 2 8 1 1 0 0 295 0 0 0 100 6 0 0 3 309 151 106 0 0 0 0 0 0 0 0 100 7 0 0 10 230 112 24 0 0 0 0 269 0 0 0 100 March 4, 2026 at 01:10:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 94 0 2 0 0 0 0 1 0 99 1 0 0 0 22 3 14 0 2 0 0 1 0 0 0 100 2 0 0 0 12 2 6 1 0 0 0 300 0 0 0 100 3 0 0 0 16 1 10 0 0 0 0 208 0 0 0 100 4 0 0 14 11 4 38 1 1 1 0 1479 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 6 0 0 3 306 151 100 0 0 0 0 0 0 0 0 100 7 0 0 10 223 108 16 2 0 0 0 267 0 0 0 100 March 4, 2026 at 01:10:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 1 0 99 1 0 0 0 14 3 8 0 0 0 0 1 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 3 0 0 0 15 1 10 0 0 6 0 301 0 0 0 100 4 0 0 14 13 4 40 1 2 0 0 1481 0 0 0 100 5 0 0 0 13 1 14 0 1 4 0 294 0 0 0 100 6 0 0 3 307 151 102 0 0 0 0 0 0 0 0 100 7 0 0 10 226 110 20 0 0 0 0 269 0 0 0 100 March 4, 2026 at 01:10:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 1 0 0 0 0 1 0 99 1 0 0 0 20 5 16 1 0 0 0 14 0 0 0 100 2 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 3 0 0 0 17 1 14 0 0 2 0 314 0 0 0 100 4 0 0 14 12 4 38 1 0 0 0 1479 0 0 0 100 5 0 0 0 18 8 8 0 0 0 0 295 0 0 0 100 6 0 0 3 313 151 114 0 1 0 0 7 0 0 0 100 7 0 0 10 230 109 25 0 1 0 0 268 0 0 0 100 March 4, 2026 at 01:10:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 5577 102 7439 74 343 113 0 18724 17 12 0 71 1 2 0 0 4317 17 9376 85 384 97 0 26725 17 11 0 72 2 4 0 0 3107 7 6134 52 256 107 0 16509 16 8 0 75 3 4 0 0 2786 9 5555 61 277 84 0 14761 11 7 0 82 4 7 0 14 1881 11 3746 25 213 108 0 12142 9 6 0 85 5 23 0 0 1663 11 3434 26 129 93 0 9222 8 5 0 87 6 34 0 3 2367 122 4574 25 185 129 0 12189 11 7 0 82 7 12 0 10 2141 110 4021 26 126 78 0 9776 9 6 0 85 March 4, 2026 at 01:10:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 7042 103 10324 90 503 603 0 24649 23 16 0 61 1 14 0 0 5048 12 10274 110 586 679 0 24046 20 14 0 66 2 17 0 0 3731 15 7526 74 393 550 0 17340 16 11 0 74 3 11 0 0 4359 86 8881 90 472 672 0 20476 15 12 0 73 4 3 0 0 2655 18 5382 44 378 696 0 13329 12 8 0 79 5 8 0 14 2429 9 5081 46 254 658 0 12848 12 8 0 80 6 12 0 3 3187 113 6372 61 344 547 0 16770 14 10 0 76 7 13 0 10 2635 111 5190 57 220 676 0 14915 13 9 0 78 March 4, 2026 at 01:10:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 6776 106 9653 74 477 167 0 24711 24 15 0 62 1 9 0 0 5083 9 10427 76 510 185 0 23731 20 13 0 68 2 28 0 0 3773 17 7653 61 341 104 0 20017 18 11 0 71 3 4 0 0 4099 62 8421 78 421 177 0 20555 16 11 0 73 4 7 0 0 3013 8 6126 49 329 137 0 14566 13 8 0 79 5 25 0 14 2179 13 4557 29 192 154 0 13252 11 7 0 82 6 65 0 10 3346 118 6554 37 300 110 0 14353 12 8 0 80 7 6 0 3 2690 107 5368 22 200 140 0 14587 12 8 0 80 March 4, 2026 at 01:10:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2835 101 1626 14 70 43 0 5084 5 4 0 91 1 1 0 0 969 2 1938 24 74 16 0 4150 4 2 0 94 2 2 0 0 746 2 1550 9 50 31 0 4719 4 3 0 93 3 2 0 0 822 3 1736 17 67 18 0 4884 3 2 0 95 4 0 0 0 635 54 1163 8 55 35 0 3332 3 2 0 95 5 1 0 14 474 6 901 6 36 16 0 2084 1 1 0 97 6 2 0 10 664 106 985 11 47 25 0 2956 2 2 0 96 7 0 0 3 692 103 976 8 30 15 0 1845 1 1 0 98 March 4, 2026 at 01:10:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 112 0 0 1 0 0 0 1 0 99 1 0 0 0 18 3 16 0 1 1 0 14 0 0 0 100 2 0 0 0 12 2 4 0 0 1 0 0 0 0 0 100 3 0 0 0 17 3 38 1 0 1 0 1223 0 0 0 100 4 0 0 0 128 61 118 0 0 1 0 310 0 0 0 100 5 0 0 14 19 9 8 0 0 2 0 266 0 0 0 100 6 0 0 14 226 107 26 0 1 3 0 590 0 0 0 100 7 0 0 7 218 103 15 1 2 0 0 296 0 0 0 100 March 4, 2026 at 01:10:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 11 2 8 0 1 0 0 6 0 0 0 100 2 0 0 0 12 2 8 0 0 2 0 4 0 0 0 100 3 0 0 0 22 7 48 1 0 0 0 1233 0 0 0 100 4 0 0 0 117 55 112 1 0 0 0 310 0 0 0 100 5 0 0 14 12 3 10 0 0 1 0 270 0 0 0 100 6 0 0 10 218 105 14 2 1 2 0 568 0 0 0 100 7 0 0 3 214 102 12 0 1 1 0 294 0 0 0 100 March 4, 2026 at 01:10:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2190 100 294 0 43 475 0 0 0 2 0 98 1 0 0 0 93 0 193 2 42 532 0 0 0 1 0 99 2 0 0 0 78 1 162 1 42 463 0 0 0 1 0 99 3 0 0 0 169 80 211 3 40 454 0 1226 0 2 0 98 4 0 0 0 186 53 270 1 40 470 0 300 0 1 0 99 5 0 0 14 71 3 141 1 33 390 0 267 0 1 0 99 6 0 0 10 357 106 319 0 38 441 0 714 0 1 0 99 7 0 0 3 291 104 175 1 36 471 0 297 0 1 0 99 March 4, 2026 at 01:10:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 100 112 0 4 6 0 0 0 1 0 99 1 0 0 0 36 0 38 0 3 11 0 0 0 0 0 100 2 0 0 0 15 1 18 0 2 12 0 0 0 0 0 100 3 0 0 0 40 21 55 2 2 7 0 1227 0 0 0 100 4 0 0 0 118 53 120 0 2 5 0 300 0 0 0 100 5 0 0 14 16 3 20 0 2 3 0 267 0 0 0 100 6 0 0 10 233 105 48 0 2 6 0 448 0 0 0 100 7 0 0 3 216 102 14 0 3 8 0 294 0 0 0 100 March 4, 2026 at 01:10:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 1 0 99 1 0 0 0 20 1 20 0 1 0 0 1 0 0 0 100 2 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 22 8 46 1 0 1 0 1227 0 0 0 100 4 0 0 0 110 53 104 0 0 0 0 300 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 11 213 105 8 0 0 0 0 551 0 0 0 100 7 0 0 2 212 103 4 1 0 3 0 296 0 0 0 100 March 4, 2026 at 01:10:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 0 0 0 0 0 1 0 99 1 1 0 0 22 2 22 0 0 0 0 15 0 0 0 100 2 1 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 25 8 48 1 0 0 0 1230 0 0 0 99 4 0 0 0 112 53 106 1 1 0 0 301 0 0 0 100 5 0 0 14 13 7 6 0 0 0 0 266 0 0 0 100 6 0 0 10 216 105 12 1 0 2 0 572 0 0 0 100 7 0 0 3 213 102 9 0 1 0 0 299 0 0 0 100 March 4, 2026 at 01:10:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1674 0 0 2858 106 1605 747 103 69 0 4013 71 6 0 24 1 20 0 7 723 7 1355 638 104 72 0 3452 72 4 0 24 2 61 0 49 767 5 1622 716 144 55 1 4255 72 4 0 24 3 16 0 0 695 9 1292 596 107 46 1 4419 72 4 0 24 4 39 0 0 921 19 1995 882 111 60 0 4928 72 5 0 24 5 6 0 14 785 11 1525 720 86 63 0 3481 73 3 0 24 6 6 0 709 902 110 1584 745 87 50 0 4603 72 4 0 24 7 147 0 3 1030 116 1524 745 97 60 0 4136 72 4 0 24 March 4, 2026 at 01:10:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2234 102 349 89 28 3 0 627 10 1 0 89 1 0 0 0 67 2 91 28 17 1 0 277 11 0 0 88 2 0 0 0 128 3 219 77 24 8 0 652 11 1 0 89 3 0 0 0 130 3 315 122 32 9 0 2005 10 1 0 89 4 1 0 0 145 4 264 109 26 7 0 955 10 1 0 89 5 6 0 14 271 48 410 138 20 11 0 950 10 1 0 89 6 1 0 94 351 109 297 119 31 13 0 1230 10 1 0 89 7 0 0 3 298 108 132 46 24 11 0 702 11 0 0 89 March 4, 2026 at 01:10:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 98 0 2 0 0 8 0 1 0 99 1 0 0 0 14 0 6 0 2 0 0 0 0 0 0 100 2 0 0 0 17 1 12 0 1 0 0 0 0 0 0 100 3 0 0 0 8 1 32 1 0 1 0 1230 0 0 0 100 4 0 0 0 11 3 4 0 1 0 0 300 0 0 0 100 5 0 0 14 119 52 119 0 3 0 0 266 0 0 0 100 6 0 0 10 215 106 10 0 0 0 0 559 0 0 0 100 7 0 0 3 210 102 2 1 0 1 0 294 0 0 0 100 March 4, 2026 at 01:10:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 112 0 2 0 0 10 0 1 0 99 1 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 15 1 10 0 1 0 0 0 0 0 0 100 3 0 0 0 10 1 34 1 0 0 0 1231 0 0 0 100 4 0 0 0 14 2 14 1 2 0 0 300 0 0 0 100 5 0 0 14 118 53 113 0 1 1 0 266 0 0 0 100 6 0 0 10 218 107 12 1 0 4 0 555 0 0 0 100 7 0 0 3 209 102 2 0 0 1 0 294 0 0 0 100 March 4, 2026 at 01:10:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 107 118 1 1 1 0 8 0 1 0 99 1 0 0 0 16 3 10 0 0 1 0 12 0 0 0 100 2 0 0 0 21 2 12 0 0 1 0 0 0 0 0 100 3 0 0 0 11 2 32 1 0 2 0 1230 0 0 0 100 4 0 0 0 19 4 10 0 1 1 0 306 0 0 0 100 5 0 0 14 127 60 122 0 3 0 0 266 0 0 0 100 6 0 0 14 218 107 12 0 0 6 0 563 0 0 0 100 7 0 0 7 215 102 11 0 0 6 0 299 0 0 0 100 March 4, 2026 at 01:10:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2473 107 823 44 71 17 0 2022 3 2 0 94 1 6 0 0 73 3 77 10 14 125 1 2910 8 2 0 90 2 29 0 0 97 7 103 7 8 730 0 2608 5 2 0 93 3 0 0 0 456 42 813 26 55 15 0 2655 3 1 0 96 4 0 0 0 394 4 712 38 64 11 2 1748 3 1 0 96 5 25 0 14 249 12 437 15 37 95 0 1700 4 1 0 95 6 3 0 130 242 107 44 9 7 725 5 3585 6 2 0 93 7 1 0 11 588 105 723 11 48 23 0 1717 2 2 0 96 March 4, 2026 at 01:10:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2177 102 254 1 47 696 0 2 0 3 0 97 1 0 0 0 82 1 186 1 56 699 0 0 0 2 0 98 2 0 0 0 110 7 222 1 53 570 0 6 0 1 0 98 3 0 0 0 245 124 285 3 43 738 0 1136 0 3 0 97 4 0 0 0 157 4 359 1 73 735 0 300 0 2 0 98 5 0 0 14 83 3 181 2 52 721 0 267 0 2 0 98 6 0 0 10 294 107 207 1 62 781 0 597 0 2 0 98 7 0 0 10 279 103 162 2 40 566 0 294 0 2 0 98 March 4, 2026 at 01:10:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2290 100 472 0 66 965 0 0 0 3 0 97 1 0 0 0 258 51 390 1 75 947 0 1 0 2 0 98 2 0 0 0 181 8 315 1 53 1009 0 10 0 2 0 98 3 0 0 0 292 140 327 2 64 1311 0 1138 0 3 0 97 4 0 0 0 246 2 464 2 74 1042 0 300 0 2 0 98 5 0 0 14 152 2 293 1 54 1047 1 266 0 2 0 98 6 0 0 10 363 108 295 1 66 1063 0 531 0 2 0 98 7 0 0 3 342 103 272 1 63 1072 0 294 0 2 0 98 March 4, 2026 at 01:10:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 101 96 0 0 0 0 2 0 1 0 99 1 0 0 0 117 51 112 0 2 0 0 1 0 0 0 100 2 0 0 0 29 7 22 1 1 0 0 6 0 0 0 100 3 0 0 0 10 1 34 1 1 1 0 1137 0 0 0 100 4 0 0 0 12 3 4 0 0 0 0 300 0 0 0 100 5 0 0 14 12 2 8 0 1 0 0 266 0 0 0 100 6 0 0 10 216 106 10 0 0 0 0 560 0 0 0 100 7 0 0 3 210 102 2 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:11:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2458 101 768 3 19 5 0 1013 3 2 0 96 1 0 0 0 354 52 585 5 19 24 0 1502 2 1 0 97 2 0 0 0 339 6 656 3 16 25 0 2002 2 1 0 97 3 0 0 0 363 3 771 3 23 30 0 2944 2 1 0 97 4 0 0 0 69 4 68 3 7 33 0 3090 5 2 0 94 5 1 0 14 68 12 58 4 4 43 0 3360 5 2 0 93 6 0 0 136 468 109 523 5 25 29 0 2470 2 1 0 97 7 0 0 3 505 103 586 3 17 18 0 1702 4 1 0 95 March 4, 2026 at 01:11:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2114 104 116 0 0 0 0 8 0 1 0 99 1 0 0 0 42 17 37 3 0 1 0 2 0 0 0 100 2 0 0 0 10 1 6 0 1 0 0 4 0 0 0 100 3 0 0 0 85 37 115 1 2 0 0 1142 0 0 0 100 4 0 0 0 10 3 4 0 1 0 0 300 0 0 0 100 5 0 0 14 22 8 20 0 0 0 0 272 0 0 0 100 6 0 0 10 219 107 14 1 1 0 0 563 0 0 0 100 7 0 0 3 209 102 2 0 0 1 0 294 0 0 0 100 March 4, 2026 at 01:11:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 100 258 1 47 772 0 0 0 3 0 97 1 0 0 0 83 1 186 1 51 818 0 1 0 2 0 98 2 0 0 0 80 1 172 1 54 760 0 17 0 2 0 98 3 0 0 0 250 122 322 2 49 861 0 1143 0 3 0 97 4 0 0 0 164 2 344 1 73 851 0 300 0 2 0 98 5 0 0 14 100 11 187 3 46 854 0 272 0 2 0 98 6 0 0 10 292 107 202 1 58 848 0 439 0 2 0 98 7 0 0 3 279 102 161 3 44 771 0 332 0 2 0 98 March 4, 2026 at 01:11:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2191 101 273 1 30 411 1 2 0 2 0 98 1 0 0 0 77 0 152 1 37 366 0 0 0 1 0 99 2 0 0 0 92 2 179 1 33 322 1 294 0 1 0 99 3 0 0 0 172 90 187 2 32 361 1 1137 0 1 0 99 4 0 0 0 135 20 229 1 39 336 0 300 0 1 0 99 5 0 0 14 223 37 360 0 28 267 0 271 0 1 0 99 6 0 0 10 280 106 141 6 24 436 0 260 0 1 0 99 7 0 0 3 287 104 162 1 24 404 0 371 0 1 0 99 March 4, 2026 at 01:11:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 122 0 1 0 0 10 0 1 0 99 1 0 0 0 9 1 4 0 1 0 0 9 0 0 0 100 2 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 3 0 0 0 15 3 42 1 0 1 0 1153 0 0 0 99 4 0 0 0 15 3 12 0 2 0 0 368 0 0 0 100 5 0 0 14 115 54 114 0 0 0 0 273 0 0 0 100 6 0 0 10 219 107 14 0 0 0 0 261 0 0 0 100 7 0 0 3 214 102 12 0 1 7 0 312 0 0 0 100 March 4, 2026 at 01:11:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 122 0 0 1 0 7 0 1 0 99 1 0 0 0 15 3 12 0 0 1 0 14 0 0 0 100 2 0 0 0 11 3 4 0 0 5 0 294 0 0 0 100 3 0 0 0 12 3 34 1 0 1 0 1139 0 0 0 100 4 0 0 0 19 4 10 0 0 1 0 306 0 0 0 100 5 0 0 14 117 58 108 0 1 0 0 266 0 0 0 100 6 0 0 10 219 108 14 0 0 1 0 282 0 0 0 100 7 0 0 3 215 102 11 1 0 5 0 290 0 0 0 100 March 4, 2026 at 01:11:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 139 0 0 2169 105 208 0 10 7 20 163 0 1 0 99 1 727 0 0 52 5 64 1 11 11 12 6531 2 1 0 97 2 20 0 3 44 2 47 1 7 8 7 424 0 0 0 100 3 13 0 0 122 41 150 1 9 3 3 1287 0 0 0 99 4 1816 0 0 39 2 25 3 4 2 4 643 0 1 0 99 5 36 0 14 62 15 62 0 5 8 4 346 0 0 0 100 6 9 0 10 245 106 40 1 8 6 5 358 0 0 0 100 7 904 0 115 235 103 69 1 7 12 15 505 0 1 0 99 March 4, 2026 at 01:11:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 126 0 0 0 0 8 0 1 0 99 1 0 0 0 11 0 12 0 1 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 2 0 294 0 0 0 100 3 0 0 0 109 51 132 1 0 0 0 1217 0 0 0 100 4 0 0 0 13 2 8 0 0 4 0 300 0 0 0 100 5 0 0 14 11 3 12 0 1 2 0 267 0 0 0 100 6 0 0 10 218 107 14 0 0 2 0 260 0 0 0 100 7 0 0 3 212 102 8 0 2 2 0 422 0 0 0 100 March 4, 2026 at 01:11:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 0 5645 106 7549 63 267 119 0 22300 16 10 0 73 1 46 0 0 3096 6 6703 53 282 115 0 18537 14 9 0 77 2 8 0 0 2294 5 4746 28 169 92 0 13758 12 7 0 81 3 19 0 0 2892 22 5977 44 237 96 0 12349 10 7 0 84 4 51 0 0 2008 11 4022 31 184 109 0 11936 10 6 0 83 5 240 0 14 1660 12 3381 17 110 115 0 10215 8 5 0 87 6 2 0 10 2206 114 4170 20 154 63 0 8847 7 5 0 88 7 66 0 3 1748 109 3210 19 88 96 0 10702 12 5 0 83 March 4, 2026 at 01:11:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39 0 0 6798 105 9910 65 430 164 0 28198 25 16 0 59 1 12 0 7 4754 11 9855 88 458 145 0 26330 21 14 0 65 2 6 0 0 4225 14 8602 43 294 117 0 20532 18 11 0 71 3 4 0 0 4055 20 8395 74 385 152 0 18496 16 11 0 73 4 5 0 0 2713 10 5457 43 261 141 0 14193 13 8 0 79 5 1 0 14 2355 8 4851 10 150 88 0 10206 9 6 0 85 6 12 0 4 3266 116 6423 38 247 98 0 15154 12 8 0 80 7 3 0 2 2775 107 5442 21 145 145 0 13906 12 7 0 81 March 4, 2026 at 01:11:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 3483 104 2932 31 135 38 0 8302 8 5 0 87 1 23 0 7 1561 10 3125 28 138 40 0 8867 7 4 0 88 2 8 0 0 1228 35 2406 20 96 46 0 5160 5 3 0 92 3 7 0 0 1508 17 3105 21 117 64 0 7674 6 4 0 90 4 6 0 0 874 4 1720 19 88 46 0 4867 4 3 0 93 5 7 0 14 618 13 1327 9 48 59 0 3823 3 2 0 94 6 6 0 4 1111 104 1897 11 71 44 0 4867 4 3 0 93 7 0 0 2 1067 104 1746 11 45 52 0 3609 3 2 0 95 March 4, 2026 at 01:11:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 106 0 0 1 0 294 0 1 0 99 1 0 0 7 25 5 52 1 1 0 0 1778 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 119 57 114 0 0 0 0 8 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 300 0 0 0 100 5 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 6 0 0 3 211 102 6 0 1 0 0 1 0 0 0 100 7 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:11:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 103 269 1 39 616 0 294 0 2 0 98 1 0 0 7 89 4 173 3 39 639 0 576 0 2 0 98 2 0 0 0 71 0 156 1 44 705 0 0 0 1 0 99 3 0 0 0 263 130 320 1 55 650 0 9 0 2 0 98 4 0 0 0 90 2 182 6 50 644 0 1135 0 1 0 98 5 0 0 14 65 1 163 1 27 599 0 646 0 2 0 98 6 0 0 3 321 102 265 1 56 587 0 0 0 2 0 98 7 0 0 3 279 102 161 2 37 701 0 0 0 2 0 98 March 4, 2026 at 01:11:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 103 174 0 7 50 0 294 0 1 0 99 1 0 0 7 66 5 117 0 16 54 0 544 0 0 0 99 2 0 0 0 35 0 59 0 13 37 0 0 0 0 0 100 3 0 0 0 126 73 97 0 13 53 0 8 0 0 0 100 4 0 0 0 153 47 192 0 15 57 0 300 0 0 0 100 5 0 0 14 50 6 111 1 8 38 0 1481 0 0 0 99 6 0 0 3 318 101 225 0 14 46 0 0 0 1 0 99 7 0 0 3 241 102 66 0 9 34 0 0 0 0 0 100 March 4, 2026 at 01:11:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 104 116 0 0 2 0 299 0 1 0 99 1 0 0 7 15 5 10 1 0 1 0 562 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 21 8 16 0 0 0 0 6 0 0 0 100 4 0 0 0 10 2 2 1 0 0 0 300 0 0 0 100 5 0 0 14 102 49 130 0 1 0 0 1481 0 0 0 100 6 0 0 3 219 105 16 0 2 0 0 7 0 0 0 100 7 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:11:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 124 1 1 4 0 294 0 1 0 99 1 0 0 7 22 6 14 0 0 2 0 567 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 0 23 8 14 1 0 1 0 8 0 0 0 100 4 0 0 0 26 8 22 0 0 1 0 340 0 0 0 100 5 0 0 14 18 8 34 1 0 2 0 1481 0 0 0 99 6 0 0 7 256 123 50 0 1 0 0 1 0 0 0 100 7 0 0 7 274 131 71 0 2 1 0 7 0 0 0 100 March 4, 2026 at 01:11:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 114 0 0 2 0 294 0 1 0 99 1 0 0 7 19 5 20 0 1 2 0 562 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 19 7 14 0 0 0 0 8 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 300 0 0 0 100 5 0 0 14 10 3 38 1 1 1 0 1483 0 0 0 100 6 0 0 3 209 101 4 0 0 0 0 0 0 0 0 100 7 0 0 3 309 152 102 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:11:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 108 0 2 0 0 294 0 1 0 99 1 0 0 7 18 6 14 1 0 2 0 560 0 0 0 100 2 0 0 0 8 0 4 0 0 2 0 0 0 0 0 100 3 0 0 0 23 8 18 0 0 0 0 9 0 0 0 100 4 0 0 0 11 2 6 0 1 2 0 300 0 0 0 100 5 0 0 14 16 3 42 1 3 0 0 1479 0 0 0 99 6 0 0 3 210 101 6 0 1 0 0 0 0 0 0 100 7 0 0 3 312 152 108 0 0 2 0 0 0 0 0 100 March 4, 2026 at 01:11:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 112 0 0 3 0 294 0 1 0 99 1 0 0 7 19 6 16 1 2 6 0 561 0 0 0 100 2 0 0 0 64 29 60 0 1 0 0 0 0 0 0 100 3 0 0 0 26 8 26 0 1 0 0 6 0 0 0 100 4 0 0 0 9 2 2 1 0 0 0 300 0 0 0 100 5 0 0 14 11 3 36 1 0 0 0 1483 0 0 0 100 6 0 0 3 211 102 6 0 0 0 0 1 0 0 0 100 7 0 0 3 247 121 38 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:11:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 112 1 0 3 0 294 0 1 0 99 1 0 0 7 14 5 10 0 0 3 0 564 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 29 10 24 1 0 0 0 13 0 0 0 100 4 0 0 0 15 3 14 0 1 0 0 301 0 0 0 100 5 0 0 14 8 2 36 1 1 0 0 1480 0 0 0 100 6 0 0 3 210 101 6 0 0 0 0 3 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:11:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 5044 106 6214 69 265 84 0 19100 16 11 0 73 1 10 0 0 3525 18 7698 52 267 92 0 23930 15 9 0 76 2 0 0 0 2535 22 5032 51 174 84 0 13930 14 7 0 80 3 4 0 7 2876 16 6029 72 239 83 0 14293 11 7 0 82 4 12 0 0 2176 12 4333 27 170 56 0 9019 8 5 0 87 5 2 0 0 1698 12 3508 17 114 68 0 8807 8 5 0 87 6 25 0 17 2239 110 4317 42 175 67 0 12572 11 7 0 82 7 1 0 3 1588 113 2905 18 82 74 0 8154 7 4 0 89 March 4, 2026 at 01:11:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 7058 108 10519 76 422 120 0 27967 24 16 0 60 1 14 0 0 4968 12 10243 79 437 110 0 25680 22 14 0 64 2 10 0 0 4139 11 8621 46 309 114 0 21379 18 12 0 70 3 2 0 7 4164 6 8773 56 355 107 0 21820 18 12 0 70 4 9 0 0 2362 11 4626 36 254 113 0 13000 11 7 0 82 5 6 0 0 2398 17 4860 22 163 78 0 10225 9 6 0 85 6 46 0 18 3536 112 6974 31 268 94 0 15633 13 9 0 78 7 6 0 2 2241 117 4170 24 153 84 0 11385 9 6 0 85 March 4, 2026 at 01:11:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 49 6886 112 10248 92 537 805 0 24555 22 16 0 62 1 17 0 0 4572 9 9547 76 525 868 0 24102 21 15 0 65 2 7 0 0 3905 10 7955 50 338 782 0 19378 17 12 0 71 3 12 0 0 4018 80 8463 62 409 917 0 20627 19 13 0 69 4 4 0 7 3167 23 6401 44 338 861 0 13382 12 9 0 80 5 5 0 0 2515 14 5303 35 235 731 0 14364 11 9 0 80 6 6 0 3 3295 120 6704 48 324 784 0 17098 14 10 0 76 7 4 0 17 2374 112 4558 34 215 817 0 11281 10 8 0 83 March 4, 2026 at 01:11:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 3292 103 2517 51 163 200 0 6468 6 4 0 90 1 4 0 0 1252 1 2490 60 182 183 0 5776 5 4 0 92 2 4 0 7 1096 4 2209 46 117 161 0 5376 5 3 0 92 3 1 0 0 1112 72 2111 29 138 188 0 4482 3 3 0 94 4 0 0 7 716 9 1396 13 114 157 0 3124 3 2 0 95 5 4 0 0 619 15 1265 14 83 161 0 4589 3 2 0 94 6 0 0 3 942 103 1588 13 97 161 0 3592 3 2 0 95 7 6 0 17 842 145 1259 10 68 198 0 3054 3 2 0 95 March 4, 2026 at 01:11:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 129 160 0 6 0 0 0 0 1 0 99 1 0 0 0 17 1 8 0 0 0 0 1 0 0 0 100 2 0 0 0 18 2 11 0 3 0 0 0 0 0 0 100 3 0 0 0 14 0 10 0 1 0 0 0 0 0 0 100 4 0 0 7 14 4 8 0 0 4 0 553 0 0 0 100 5 0 0 0 24 9 48 1 0 3 0 1843 0 0 0 99 6 0 0 3 211 102 6 0 1 0 0 1 0 0 0 100 7 0 0 17 254 125 48 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:11:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 146 200 1 3 1 0 15 0 1 0 99 1 0 0 0 28 5 24 0 4 1 0 8 0 0 0 100 2 0 0 0 20 4 18 0 1 1 0 5 0 0 0 100 3 0 0 0 20 2 12 0 1 1 0 2 0 0 0 100 4 0 0 7 16 6 8 0 0 6 0 556 0 0 0 100 5 0 0 0 32 13 46 2 1 6 0 1809 0 0 0 99 6 0 0 7 230 109 24 1 0 1 0 37 0 0 0 100 7 0 0 21 225 107 22 0 2 0 0 275 0 0 0 100 March 4, 2026 at 01:11:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 98 0 4 0 0 0 0 1 0 99 1 0 0 0 120 51 112 0 1 0 0 19 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 0 15 0 14 0 2 1 0 0 0 0 0 100 4 0 0 7 13 4 10 1 2 1 0 553 0 0 0 100 5 3 0 0 21 6 44 2 0 0 0 1814 0 0 0 99 6 0 0 3 222 107 16 0 1 0 0 39 0 0 0 100 7 0 0 17 216 105 14 0 0 2 0 275 0 0 0 100 March 4, 2026 at 01:11:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 101 206 0 22 172 0 1 0 1 0 99 1 0 0 0 234 50 353 0 26 163 0 0 0 1 0 99 2 0 0 0 70 3 126 0 24 156 0 2 0 0 0 100 3 0 0 0 142 69 141 0 28 233 0 0 0 0 0 100 4 0 0 7 69 5 131 1 26 172 0 555 0 1 0 99 5 0 0 0 64 5 106 0 20 113 0 599 0 0 0 99 6 0 0 3 276 106 170 0 25 145 0 1213 0 1 0 99 7 0 0 17 268 104 128 0 15 171 0 266 0 0 0 100 March 4, 2026 at 01:11:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 92 0 0 0 0 0 0 1 0 99 1 0 0 0 14 0 10 0 2 0 0 0 0 0 0 100 2 0 0 0 16 2 10 0 2 0 0 0 0 0 0 100 3 0 0 0 15 2 10 0 1 1 0 4 0 0 0 100 4 0 0 7 17 4 18 0 2 0 0 554 0 0 0 100 5 0 0 0 113 54 110 0 1 5 0 616 0 0 0 100 6 0 0 3 223 108 48 1 0 2 0 1218 0 0 0 99 7 0 0 17 211 104 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:11:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 92 0 2 1 0 1 0 1 0 99 1 0 0 0 19 0 12 0 2 0 0 0 0 0 0 100 2 0 0 0 12 2 6 0 0 0 0 2 0 0 0 100 3 1 0 0 15 1 10 0 2 0 0 1 0 0 0 100 4 0 0 7 13 5 10 0 1 0 0 553 0 0 0 100 5 0 0 0 111 53 106 0 0 1 0 593 0 0 0 100 6 0 0 3 220 107 44 1 0 0 0 1214 0 0 0 99 7 0 0 17 211 104 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:11:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 263 0 14 2828 116 1506 663 124 79 0 4161 63 5 0 31 1 1 0 0 815 5 1697 801 108 86 0 4204 64 4 0 32 2 1872 0 0 729 9 1389 654 117 69 1 4185 64 4 0 31 3 5 0 0 742 12 1355 643 110 45 1 3441 65 3 0 32 4 259 0 35 814 7 1590 761 87 75 0 4434 65 4 0 32 5 3 0 0 735 30 1338 616 87 73 0 4131 65 3 0 31 6 1 0 773 1027 116 2133 981 114 131 0 5183 63 5 0 32 7 10 0 3 989 109 1529 718 114 64 0 3934 65 4 0 32 March 4, 2026 at 01:11:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 332 0 14 2345 103 533 228 36 28 2 1269 19 2 0 79 1 452 0 0 243 3 455 213 40 46 3 1070 18 1 0 81 2 292 0 0 267 5 521 248 33 43 1 1215 18 1 0 80 3 1 0 0 261 2 498 238 38 26 0 1136 19 1 0 80 4 474 0 7 302 13 551 257 38 36 1 1856 18 1 0 80 5 3 0 0 277 4 450 208 32 20 0 1377 19 1 0 80 6 0 0 185 523 147 690 263 36 60 0 2373 19 2 0 80 7 5 0 3 403 105 371 172 28 22 0 1071 19 1 0 80 March 4, 2026 at 01:11:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2113 104 112 0 0 0 0 268 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 6 0 0 2 0 1 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 7 16 5 10 0 1 0 0 555 0 0 0 100 5 0 0 0 21 3 17 0 2 5 0 707 0 0 0 100 6 0 0 2 264 128 59 0 1 0 0 268 0 0 0 99 7 0 0 4 273 133 68 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:11:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2102 101 96 0 1 0 0 266 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 1 0 0 2 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 1 0 0 0 100 4 0 0 7 20 4 12 0 2 1 0 554 0 0 0 100 5 0 0 0 23 3 18 0 1 1 0 486 0 0 0 100 6 0 0 3 223 108 48 1 1 2 0 966 0 1 0 99 7 0 0 3 316 153 114 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:11:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 106 120 0 2 0 0 272 0 1 0 99 1 0 0 0 15 2 16 0 2 0 0 10 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 15 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 17 6 10 1 0 3 0 557 0 0 0 100 5 0 0 0 22 3 17 1 1 1 0 621 0 0 0 100 6 0 0 3 233 112 56 1 0 1 0 1230 0 1 0 99 7 0 0 3 305 149 98 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:11:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 43 2155 114 144 8 12 394 0 2781 5 3 0 92 1 0 0 0 66 7 54 4 11 55 0 2769 5 2 0 93 2 0 0 0 406 9 762 38 75 23 0 1530 5 1 0 94 3 35 0 0 254 3 420 16 41 156 0 2337 5 1 0 94 4 23 0 7 173 7 277 14 38 257 0 3090 5 1 0 94 5 0 0 0 417 49 684 25 67 24 0 1823 3 1 0 96 6 1 0 115 538 108 668 28 51 16 0 2811 3 2 0 96 7 0 0 12 538 105 611 27 50 147 0 1681 3 2 0 95 March 4, 2026 at 01:11:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 101 107 0 0 0 0 266 0 1 0 99 1 0 0 7 11 1 6 0 2 0 0 1 0 0 0 100 2 0 0 0 25 7 24 0 1 0 0 9 0 0 0 100 3 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 4 0 0 7 14 4 6 0 0 3 0 554 0 0 0 100 5 0 0 0 121 56 112 1 1 2 0 616 0 0 0 100 6 0 0 3 212 102 34 0 0 0 0 1128 0 1 0 99 7 0 0 3 221 104 14 0 3 0 0 0 0 0 0 100 March 4, 2026 at 01:11:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2179 102 272 1 52 676 0 266 0 3 0 97 1 0 0 0 123 0 254 1 71 845 0 0 0 2 0 98 2 0 0 0 174 9 331 2 66 898 0 11 0 2 0 98 3 0 0 0 178 71 227 0 66 915 0 5 0 2 0 98 4 0 0 7 103 5 200 0 61 1071 0 556 0 2 0 97 5 0 0 0 194 52 254 1 46 774 0 685 0 2 0 98 6 0 0 3 297 103 193 1 50 756 0 1126 0 3 0 97 7 0 0 3 297 104 161 1 47 870 0 1 0 2 0 98 March 4, 2026 at 01:11:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2228 101 308 0 69 882 0 266 0 2 0 98 1 0 0 0 217 1 371 0 76 990 0 0 0 2 0 98 2 0 0 0 170 6 358 0 70 999 0 6 0 2 0 98 3 0 0 0 292 142 417 0 82 918 0 1 0 2 0 98 4 0 0 7 208 3 420 3 69 760 0 524 0 2 0 98 5 0 0 0 247 55 392 1 60 854 0 479 0 2 0 98 6 0 0 3 342 103 324 2 69 816 0 1163 0 2 0 98 7 0 0 3 316 103 237 0 53 808 0 0 0 1 0 99 March 4, 2026 at 01:11:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2336 103 526 12 31 24 0 2056 6 2 0 92 1 0 0 0 396 33 655 6 43 10 0 911 2 1 0 97 2 0 0 0 378 5 728 5 28 35 0 1755 2 1 0 97 3 0 0 0 345 4 679 8 24 23 0 1919 2 1 0 97 4 1 0 7 45 3 29 4 3 46 0 3307 6 2 0 93 5 1 0 0 113 24 119 5 6 35 0 3836 6 2 0 93 6 0 0 129 501 105 627 6 32 20 0 2991 2 1 0 97 7 0 0 3 523 106 629 4 28 22 0 1468 2 1 0 98 March 4, 2026 at 01:11:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 118 0 0 0 0 267 0 1 0 99 1 0 0 0 115 53 112 0 0 0 0 12 0 0 0 100 2 0 0 0 6 0 4 0 2 0 0 0 0 0 0 100 3 0 0 0 8 0 4 0 0 0 0 7 0 0 0 100 4 0 0 7 15 3 10 0 1 0 0 265 0 0 0 100 5 0 0 0 36 15 28 0 1 0 0 704 0 0 0 100 6 0 0 3 212 103 36 1 0 0 0 1420 0 0 0 99 7 0 0 3 217 103 11 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:11:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 114 0 1 0 0 267 0 1 0 99 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 9 3 4 0 0 0 0 260 0 0 0 100 5 0 0 0 28 10 22 0 1 1 0 618 0 0 0 100 6 0 0 3 212 103 36 1 0 1 0 1418 0 0 0 100 7 0 0 3 215 105 8 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:11:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2186 102 297 2 55 798 0 266 0 3 0 97 1 0 0 0 203 50 318 1 60 650 0 0 0 2 0 98 2 0 0 0 74 1 156 2 37 723 0 0 0 2 0 98 3 0 0 0 161 73 279 2 50 741 0 14 0 2 0 98 4 0 0 7 87 3 185 5 57 826 0 286 0 2 0 98 5 0 0 0 95 11 179 5 44 663 0 437 0 2 0 98 6 0 0 3 294 103 231 2 56 835 0 1381 0 2 0 98 7 0 0 3 277 104 169 1 45 740 0 1 0 2 0 98 March 4, 2026 at 01:11:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2795 0 112 4802 103 5597 74 329 508 17 14363 15 11 0 75 1 145 0 0 3151 25 6312 80 341 605 11 16849 17 9 0 74 2 816 0 2 2243 5 4344 44 233 541 10 17620 11 8 0 81 3 53 0 0 3063 99 6081 69 304 505 2 13074 10 8 0 82 4 280 0 0 1713 10 3405 28 227 469 5 8924 8 6 0 86 5 29 0 123 1342 9 2789 18 146 477 2 8274 7 5 0 87 6 204 0 3 2290 109 4285 30 231 451 2 11132 8 6 0 86 7 13 0 3 1918 117 4155 17 120 407 0 15276 6 5 0 89 March 4, 2026 at 01:11:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 6568 109 9621 65 416 156 0 26823 25 16 0 59 1 15 0 0 4830 11 9922 55 440 117 0 23946 21 13 0 66 2 10 0 0 3925 9 7900 31 273 143 0 17787 15 10 0 75 3 8 0 0 4357 15 9068 34 339 82 0 20276 16 10 0 74 4 4 0 14 2779 14 5643 34 276 118 0 14147 13 8 0 80 5 6 0 7 2368 17 4971 23 166 102 0 13912 12 8 0 80 6 8 0 3 3471 115 6887 55 254 128 0 16177 13 8 0 79 7 5 0 3 2373 109 4692 14 137 69 0 14074 12 7 0 81 March 4, 2026 at 01:11:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 3770 105 3596 53 168 71 0 8993 8 6 0 86 1 3 0 0 2184 8 4419 39 176 38 0 8731 8 5 0 87 2 6 0 0 1279 9 2514 25 113 38 0 7086 6 4 0 90 3 2 0 0 1722 8 3501 32 134 47 0 7106 6 4 0 90 4 2 0 14 1305 42 2569 16 102 62 0 7817 7 4 0 89 5 8 0 7 1048 14 2079 14 56 37 0 5557 5 3 0 92 6 2 0 0 1603 107 2955 27 105 39 0 7542 6 4 0 90 7 0 0 7 916 107 1497 11 56 31 0 6155 4 3 0 93 March 4, 2026 at 01:11:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 96 0 1 0 0 0 0 1 0 99 1 0 0 0 18 1 14 0 2 0 0 0 0 0 0 100 2 0 0 0 17 2 14 0 1 0 0 1 0 0 0 100 3 0 0 0 10 1 2 1 0 0 0 300 0 0 0 100 4 0 0 14 118 57 112 0 0 0 0 271 0 0 0 100 5 0 0 7 15 5 12 1 0 0 0 264 0 0 0 100 6 0 0 3 211 102 4 1 0 3 0 290 0 0 0 100 7 0 0 3 224 106 52 1 1 5 0 1508 0 0 0 99 March 4, 2026 at 01:11:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 101 268 1 42 626 0 0 0 2 0 98 1 0 0 0 75 3 153 1 43 584 0 2 0 2 0 98 2 0 0 4 72 2 143 1 35 564 0 18 0 2 0 98 3 0 0 0 146 72 195 1 52 549 0 300 0 1 0 99 4 0 0 14 182 58 262 1 45 589 0 277 0 2 0 98 5 0 0 7 106 5 203 1 46 618 0 261 0 1 0 99 6 0 0 3 302 102 222 1 52 720 0 194 0 2 0 98 7 0 0 3 288 105 199 3 31 521 0 1537 0 2 0 98 March 4, 2026 at 01:11:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 101 177 0 13 106 0 0 0 1 0 99 1 0 0 0 108 1 208 0 27 80 0 0 0 0 0 100 2 0 0 0 60 2 97 0 12 104 0 294 0 0 0 100 3 0 0 0 105 54 91 1 18 107 0 300 0 0 0 100 4 0 0 14 65 8 112 0 18 140 0 272 0 0 0 100 5 0 0 7 48 5 76 0 13 80 0 261 0 0 0 100 6 0 0 3 242 101 73 0 9 77 0 0 0 0 0 100 7 0 0 3 349 153 210 0 11 62 0 1581 0 1 0 99 March 4, 2026 at 01:11:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 1 0 0 0 0 1 0 99 1 0 0 0 13 2 10 0 0 0 0 2 0 0 0 100 2 0 0 0 16 2 16 0 1 0 0 294 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 301 0 0 0 100 4 0 0 14 18 8 14 0 0 0 0 272 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 6 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 7 21 0 3 316 155 138 1 0 0 0 1517 0 0 0 99 March 4, 2026 at 01:11:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 116 0 0 0 0 1 0 1 0 99 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 20 4 20 0 1 0 0 309 0 0 0 100 3 0 0 0 10 1 6 1 0 0 0 307 0 0 0 100 4 0 0 14 18 8 14 0 0 0 0 271 0 0 0 100 5 0 0 7 22 10 12 1 1 0 0 265 0 0 0 100 6 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 7 0 0 3 317 153 141 2 0 1 0 1519 0 0 0 99 March 4, 2026 at 01:11:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 148 208 0 1 0 0 1 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 2 0 0 0 16 3 10 1 0 2 0 295 0 0 0 100 3 0 0 0 11 1 10 0 1 1 0 300 0 0 0 100 4 0 0 14 20 9 18 0 1 0 0 272 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 6 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 7 0 0 3 221 107 40 2 0 3 0 1497 0 0 0 99 March 4, 2026 at 01:11:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 151 212 0 0 0 0 0 0 1 0 99 1 0 0 0 9 1 4 0 0 1 0 0 0 0 0 100 2 0 0 0 15 3 12 0 1 3 0 294 0 0 0 100 3 0 0 0 12 1 12 0 4 3 0 300 0 0 0 100 4 0 0 14 26 8 26 1 1 0 0 271 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 6 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 7 0 0 3 212 103 34 1 0 4 0 1503 0 0 0 100 March 4, 2026 at 01:11:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 212 0 0 0 0 0 0 1 0 99 1 0 0 0 11 1 6 0 1 0 0 2 0 0 0 100 2 0 0 0 13 3 8 0 0 4 0 294 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 4 0 0 14 18 8 16 0 1 0 0 274 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 6 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 7 0 0 3 212 103 34 1 0 4 0 1507 0 0 0 99 March 4, 2026 at 01:11:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 151 212 0 0 0 0 0 0 1 0 99 1 0 0 0 6 0 4 0 1 0 0 0 0 0 0 100 2 0 0 0 16 4 10 0 0 4 0 295 0 0 0 100 3 0 0 0 8 1 2 1 0 0 0 300 0 0 0 100 4 0 0 14 22 9 18 0 1 0 0 272 0 0 0 100 5 0 0 7 17 3 16 1 1 0 0 260 0 0 0 100 6 0 0 3 210 103 4 0 0 0 0 2 0 0 0 100 7 0 0 3 215 104 36 2 0 2 0 1571 0 0 0 100 March 4, 2026 at 01:11:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 5226 134 6886 55 228 91 0 22466 15 10 0 75 1 6 0 0 2785 6 5683 69 254 68 0 15546 16 8 0 76 2 18 0 0 2843 15 5661 48 157 89 0 13277 11 8 0 82 3 17 0 0 2758 5 5527 52 198 92 0 12768 10 6 0 84 4 3 0 14 1314 13 2615 33 159 104 0 9444 9 5 0 86 5 3 0 0 954 14 1805 14 85 49 0 4395 4 3 0 93 6 12 0 14 1900 112 3490 17 129 64 0 8608 7 5 0 88 7 1 0 7 1646 112 3177 21 95 83 0 10242 7 5 0 88 March 4, 2026 at 01:11:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 6756 104 9830 70 423 150 0 24803 24 15 0 61 1 9 0 0 4960 8 10339 83 429 135 0 23870 21 13 0 66 2 21 0 2 3818 17 7719 43 269 116 0 19318 17 11 0 72 3 7 0 0 4108 16 8468 49 338 93 0 20716 16 11 0 73 4 3 0 0 2844 14 5791 37 286 138 0 16237 14 9 0 77 5 9 0 14 2678 12 5576 42 185 118 0 14982 13 9 0 79 6 7 0 10 3121 105 6157 33 243 109 0 15297 13 8 0 78 7 6 0 3 2183 114 4097 17 116 59 0 10104 8 5 0 86 March 4, 2026 at 01:11:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 6623 107 9647 83 490 763 0 26880 24 17 0 59 1 11 0 0 5041 9 10518 103 540 858 0 25316 22 15 0 63 2 16 0 0 4000 15 8088 45 334 665 0 18767 17 12 0 71 3 3 0 7 4708 90 9683 78 431 683 0 20949 18 13 0 70 4 4 0 0 2790 15 5867 47 362 822 0 14503 14 9 0 77 5 7 0 0 2086 17 4333 34 213 761 0 12942 12 8 0 80 6 5 0 2 3559 110 7027 42 319 700 0 14208 12 9 0 79 7 2 0 18 1893 113 3585 29 197 661 0 11157 8 7 0 86 March 4, 2026 at 01:11:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 3555 102 3215 43 191 203 0 9265 8 6 0 86 1 5 0 0 1681 2 3370 47 211 220 0 8760 6 5 0 89 2 1 0 0 1457 8 2806 21 118 223 0 5239 5 3 0 92 3 1 0 7 1722 71 3585 38 165 307 0 7304 6 5 0 89 4 1 0 0 882 5 1853 19 129 234 0 5737 5 3 0 91 5 2 0 0 864 2 1839 15 98 206 0 5116 5 3 0 92 6 3 0 4 1178 110 2033 28 144 224 0 5510 5 3 0 92 7 1 0 16 1056 142 1640 11 74 248 0 3440 2 2 0 96 March 4, 2026 at 01:11:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 1 0 99 1 0 0 0 10 1 34 1 1 0 0 1205 0 0 0 100 2 0 0 0 11 3 6 0 0 5 0 296 0 0 0 100 3 0 0 7 13 4 10 0 0 0 0 261 0 0 0 100 4 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 17 2 14 0 1 0 0 300 0 0 0 100 6 0 0 3 220 108 14 0 0 0 0 6 0 0 0 100 7 1 0 17 315 155 110 0 0 3 0 592 0 0 0 100 March 4, 2026 at 01:12:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 108 0 2 0 0 9 0 1 0 99 1 0 0 0 23 5 50 1 0 1 0 1214 0 0 0 99 2 0 0 0 16 2 16 1 1 9 0 294 0 0 0 100 3 0 0 7 14 3 14 0 0 0 0 267 0 0 0 100 4 0 0 0 22 6 20 0 0 0 0 40 0 0 0 100 5 0 0 0 26 8 20 0 1 0 0 308 0 0 0 100 6 0 0 3 222 107 16 1 1 1 0 19 0 0 0 100 7 0 0 17 316 153 110 1 1 0 0 573 0 0 0 100 March 4, 2026 at 01:12:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 102 0 0 0 0 1 0 1 0 99 1 0 0 0 20 6 46 1 1 1 0 1210 0 0 0 99 2 0 0 0 13 3 8 0 1 1 0 296 0 0 0 100 3 0 0 7 16 3 18 0 1 0 0 260 0 0 0 100 4 0 0 0 10 2 4 0 1 0 0 0 0 0 0 100 5 0 0 0 18 2 12 0 0 0 0 300 0 0 0 100 6 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 7 0 0 17 312 153 106 0 0 2 0 545 0 0 0 100 March 4, 2026 at 01:12:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2250 100 395 0 34 209 0 0 0 1 0 99 1 0 0 0 99 6 201 1 34 202 0 1210 0 1 0 99 2 0 0 0 72 2 136 1 21 188 0 294 0 1 0 99 3 0 0 7 171 82 172 2 28 281 0 260 0 1 0 99 4 0 0 0 63 3 114 1 24 154 0 1 0 0 0 100 5 0 0 0 74 2 131 2 19 223 0 300 0 1 0 99 6 0 0 3 275 102 141 1 27 256 0 1 0 1 0 99 7 0 0 17 368 153 223 1 15 241 0 526 0 1 0 99 March 4, 2026 at 01:12:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 1 0 0 0 1 0 99 1 0 0 0 12 1 38 1 0 1 0 1206 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 296 0 0 0 100 3 0 0 7 15 5 10 0 0 0 0 260 0 0 0 100 4 0 0 0 16 2 18 0 2 1 0 0 0 0 0 100 5 0 0 0 13 3 10 0 0 0 0 300 0 0 0 100 6 0 0 3 222 108 16 1 1 1 0 6 0 0 0 100 7 0 0 17 310 153 106 0 1 1 0 600 0 0 0 100 March 4, 2026 at 01:12:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 10 1 34 1 0 0 0 1206 0 0 0 100 2 0 0 0 18 2 12 1 0 1 0 295 0 0 0 100 3 0 0 7 11 3 8 0 0 0 0 260 0 0 0 100 4 0 0 0 18 5 14 0 1 0 0 4 0 0 0 100 5 0 0 0 18 3 18 0 1 0 0 301 0 0 0 100 6 0 0 3 222 109 16 0 0 0 0 7 0 0 0 100 7 0 0 17 310 153 104 1 0 1 0 569 0 0 0 100 March 4, 2026 at 01:12:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2628 106 946 448 89 37 0 3376 57 4 0 39 1 9 0 0 646 5 1352 615 88 34 0 5121 57 4 0 39 2 24 0 0 725 7 1288 631 93 63 0 4055 57 4 0 39 3 1841 0 7 549 7 926 458 79 50 0 3462 57 3 0 40 4 259 0 0 710 16 1542 685 98 53 0 4528 56 4 0 40 5 3 0 0 594 12 1135 530 90 42 0 3521 57 3 0 39 6 3 0 707 868 112 1500 709 83 37 0 3663 57 4 0 40 7 12 0 7 869 130 1296 586 87 54 0 4158 57 4 0 39 March 4, 2026 at 01:12:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2337 105 523 233 38 29 0 1733 26 2 0 72 1 3 0 0 370 44 640 280 44 36 0 1531 27 1 0 72 2 0 0 0 324 8 610 286 54 24 0 1736 26 1 0 72 3 1 0 7 344 5 704 328 55 19 0 2200 26 2 0 72 4 3 0 0 364 4 701 334 51 35 0 1954 26 2 0 72 5 7 0 0 304 6 601 283 46 36 0 3223 26 2 0 72 6 2 0 213 552 103 721 341 47 26 0 1821 26 2 0 72 7 0 0 3 543 105 634 311 46 20 0 1673 26 1 0 72 March 4, 2026 at 01:12:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2109 101 108 0 1 1 0 280 0 1 0 99 1 0 0 0 23 7 14 0 1 0 0 0 0 0 0 100 2 0 0 0 98 45 98 0 3 3 0 296 0 0 0 100 3 0 0 7 20 3 16 0 0 0 0 260 0 0 0 100 4 0 0 0 25 8 20 0 1 3 0 9 0 0 0 100 5 0 0 0 20 6 44 1 0 0 0 1519 0 0 0 99 6 0 0 3 212 102 6 0 0 4 0 0 0 0 0 100 7 0 0 3 215 102 14 0 1 3 0 307 0 0 0 100 March 4, 2026 at 01:12:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 105 0 1 0 0 266 0 1 0 99 1 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 108 51 104 1 1 2 0 294 0 0 0 100 3 0 0 7 19 3 16 0 0 0 0 260 0 0 0 100 4 0 0 0 23 9 16 0 0 0 0 10 0 0 0 100 5 0 0 0 14 4 38 1 0 0 0 1518 0 0 0 100 6 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 7 0 0 3 211 103 4 0 0 1 0 310 0 0 0 100 March 4, 2026 at 01:12:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 101 114 0 1 0 0 266 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 109 52 106 0 1 1 0 296 0 0 0 100 3 0 0 7 21 4 18 0 0 0 0 261 0 0 0 100 4 0 0 0 20 7 14 0 0 0 0 5 0 0 0 100 5 0 0 0 14 4 38 1 0 0 0 1520 0 0 0 100 6 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 7 0 0 4 212 102 4 1 0 1 0 272 0 0 0 100 March 4, 2026 at 01:12:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18090 0 2 2686 104 2170 560 580 340 18 5525 33 10 0 57 1 3089 0 12 254 2 497 86 144 68 13 4152 40 3 0 58 2 14518 0 12 723 17 2027 447 536 429 15 6149 26 10 0 64 3 6451 0 10 499 12 1159 177 329 156 15 5206 33 4 0 62 4 8296 0 22 236 11 341 40 76 49 20 3250 48 4 0 49 5 11073 0 15 458 30 1172 218 338 234 20 5384 36 5 0 59 6 15048 0 213 732 105 1813 423 520 373 27 5775 35 8 0 57 7 14333 0 11 839 112 1947 470 458 355 19 5526 33 8 0 59 March 4, 2026 at 01:12:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1560 0 0 3124 114 1927 291 580 3242 1 6453 34 10 0 56 1 487 0 0 1131 13 2261 316 670 2452 1 7734 41 8 0 51 2 2307 0 0 1162 11 2297 301 599 2292 4 6479 37 8 0 55 3 1382 0 0 1500 344 2617 279 654 4056 1 6079 28 11 0 61 4 295 0 7 835 6 1528 238 425 1814 3 8719 63 8 0 29 5 1270 0 0 850 6 1681 219 478 2938 2 7691 47 9 0 44 6 856 0 900 1202 118 2362 258 645 4013 5 8158 40 10 0 50 7 1633 0 18 1352 115 2397 352 644 4041 3 7828 50 10 0 40 March 4, 2026 at 01:12:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2116 104 120 0 3 2 0 561 0 1 0 99 1 0 0 0 12 1 4 0 0 2 0 299 0 0 0 100 2 0 0 0 29 9 18 1 0 1 0 303 0 0 0 100 3 0 0 0 12 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 115 52 104 0 0 0 0 1 0 0 0 100 5 0 0 0 14 1 36 1 2 0 0 1128 0 0 0 100 6 0 0 17 220 104 14 0 1 0 0 265 0 0 0 100 7 0 0 17 215 102 4 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:12:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 104 120 0 0 1 0 560 0 1 0 99 1 0 0 0 19 5 14 1 1 2 0 309 0 0 0 100 2 0 0 0 27 9 20 0 1 2 0 303 0 0 0 100 3 0 0 0 11 1 8 0 3 0 0 3 0 0 0 100 4 0 0 0 107 51 100 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 32 0 0 0 0 1125 0 0 0 100 6 0 0 17 213 103 6 0 1 0 0 266 0 0 0 100 7 0 0 10 215 101 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:12:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2127 104 116 2 0 0 0 560 0 1 0 99 1 0 0 0 27 2 6 1 0 4 0 302 0 0 0 100 2 0 0 0 42 10 20 0 0 3 0 304 0 0 0 100 3 0 0 0 23 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 122 51 102 0 1 0 0 0 0 0 0 100 5 0 0 0 24 1 32 1 0 1 0 1125 0 0 0 100 6 0 0 17 228 105 8 0 0 0 0 268 0 0 0 100 7 0 0 115 209 101 3 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:12:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 7 2138 105 161 2 7 2 0 1494 0 1 0 99 1 8 0 0 39 5 47 0 8 7 0 424 0 0 0 99 2 28 0 0 44 11 48 0 4 8 0 377 0 0 0 100 3 0 0 0 20 3 17 2 5 1 0 828 0 0 0 100 4 0 0 0 125 54 118 0 3 1 0 73 0 0 0 100 5 0 0 0 22 8 36 1 0 1 0 1135 0 0 0 100 6 0 0 21 215 104 14 0 3 1 0 290 0 0 0 100 7 2 0 14 223 102 22 0 0 1 0 33 0 0 0 100 March 4, 2026 at 01:12:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2341 105 606 3 136 1986 0 304 0 5 0 95 1 0 0 0 455 2 980 2 150 1934 0 298 0 5 0 95 2 0 0 6 253 9 580 6 145 1807 0 312 0 4 0 96 3 0 0 0 483 238 554 1 146 2058 0 1 0 5 0 95 4 0 0 0 345 40 710 0 154 2068 0 0 0 4 0 96 5 0 0 0 217 3 528 2 125 1888 0 1126 0 4 0 95 6 0 0 17 417 103 508 3 135 1846 0 266 0 5 0 95 7 0 0 3 446 112 503 1 117 1785 0 248 0 4 0 96 March 4, 2026 at 01:12:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 300 0 1 0 99 1 0 0 0 16 4 12 0 0 4 0 305 0 0 0 100 2 0 0 0 25 9 20 0 0 0 0 303 0 0 0 100 3 0 0 0 16 1 10 0 0 0 0 2 0 0 0 100 4 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 5 0 0 0 10 2 36 1 1 0 0 1126 0 0 0 100 6 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 7 0 0 10 310 153 104 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:12:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 112 1 2 0 0 301 0 1 0 99 1 0 0 0 13 2 8 1 1 0 0 297 0 0 0 100 2 0 0 0 30 10 30 0 1 1 0 301 0 0 0 100 3 0 0 0 13 0 6 0 0 0 0 0 0 0 0 100 4 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 32 1 0 0 0 1125 0 0 0 100 6 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 7 0 0 10 311 153 104 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:12:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2111 102 121 0 0 0 0 310 0 1 0 99 1 0 0 0 21 5 22 0 1 2 0 326 0 0 0 100 2 4 0 0 29 10 26 0 1 1 0 329 0 0 0 100 3 0 0 0 13 1 14 0 2 0 0 26 0 0 0 100 4 0 0 0 6 1 2 0 1 0 0 0 0 0 0 100 5 0 0 0 10 2 34 1 0 0 0 1126 0 0 0 100 6 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 7 0 0 10 311 153 106 0 0 0 0 261 0 0 0 100 March 4, 2026 at 01:12:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 129 1 1 0 0 316 0 1 0 99 1 1 0 0 14 2 16 0 0 0 0 308 0 0 0 100 2 0 0 0 32 11 24 1 0 2 0 315 0 0 0 100 3 0 0 0 10 0 8 0 1 0 0 8 0 0 0 100 4 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 13 6 32 1 0 0 0 1126 0 0 0 100 6 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 7 0 0 10 316 153 114 0 0 0 0 263 0 0 0 100 March 4, 2026 at 01:12:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 116 0 0 3 0 305 0 1 0 99 1 20 0 0 16 5 12 0 0 1 0 309 0 0 0 100 2 0 0 0 26 10 24 0 1 2 0 303 0 0 0 100 3 0 0 0 12 1 10 0 0 2 0 2 0 0 0 100 4 0 0 0 14 2 14 0 1 1 0 5 0 0 0 100 5 0 0 0 10 1 34 1 0 0 0 1125 0 0 0 100 6 0 0 17 210 104 6 0 0 0 0 267 0 0 0 100 7 1 0 10 312 154 106 0 0 1 0 265 0 0 0 100 March 4, 2026 at 01:12:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 116 1 1 0 0 300 0 1 0 99 1 0 0 0 16 5 12 0 1 1 0 301 0 0 0 100 2 0 0 0 29 10 24 0 1 5 0 302 0 0 0 100 3 0 0 0 9 1 6 0 1 0 0 1 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 15 2 44 1 1 0 0 1114 0 0 0 100 6 0 0 17 211 104 8 0 1 1 0 266 0 0 0 100 7 0 0 10 312 154 106 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:12:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 112 0 0 0 0 300 0 1 0 99 1 0 0 0 17 5 14 1 1 1 0 306 0 0 0 100 2 0 0 0 24 9 18 1 0 0 0 303 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 7 1 32 0 0 0 0 1113 0 0 0 100 6 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 7 0 0 10 310 153 104 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:12:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 114 0 0 0 0 301 0 1 0 99 1 0 0 0 10 2 6 0 0 0 0 305 0 0 0 100 2 0 0 0 28 10 22 1 0 0 0 304 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 10 1 34 1 1 0 0 1114 0 0 0 100 6 0 0 17 213 105 8 0 0 0 0 268 0 0 0 100 7 0 0 10 315 153 114 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:12:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 104 132 1 0 1 0 316 0 1 0 99 1 0 0 0 22 5 20 0 0 2 0 314 0 0 0 100 2 0 0 0 30 11 20 0 0 3 0 311 0 0 0 100 3 0 0 0 15 2 8 0 0 1 0 10 0 0 0 100 4 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 5 0 0 0 18 8 34 1 0 1 0 1115 0 0 0 100 6 0 0 21 213 105 10 0 1 0 0 288 0 0 0 100 7 0 0 14 326 154 126 0 0 1 0 264 0 0 0 100 March 4, 2026 at 01:12:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 120 1 1 1 0 318 0 1 0 99 1 0 0 0 10 2 6 0 0 2 0 301 0 0 0 100 2 0 0 0 14 4 10 0 0 2 0 294 0 0 0 100 3 0 0 0 10 1 8 0 0 2 0 1 0 0 0 100 4 0 0 0 7 1 2 0 0 2 0 0 0 0 0 100 5 0 0 0 11 2 36 1 0 0 0 1115 0 0 0 100 6 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 7 0 0 10 328 161 124 1 0 0 0 276 0 0 0 100 March 4, 2026 at 01:12:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2136 127 164 0 1 0 0 300 0 1 0 99 1 0 0 0 24 5 24 1 1 10 0 304 0 0 0 100 2 0 0 0 11 3 6 0 0 1 0 294 0 0 0 100 3 0 0 0 7 1 4 0 1 0 0 2 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 9 2 2 0 0 0 0 1 0 0 0 100 6 0 0 17 210 103 36 1 2 0 0 1380 0 0 0 100 7 0 0 10 274 134 66 0 1 0 0 269 0 0 0 100 March 4, 2026 at 01:12:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 154 216 0 0 0 0 302 0 1 0 99 1 0 0 0 12 2 10 0 1 2 0 303 0 0 0 100 2 0 0 0 17 3 16 1 1 1 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 17 211 104 36 1 0 0 0 1380 0 0 0 100 7 0 0 10 222 109 16 0 0 0 0 269 0 0 0 100 March 4, 2026 at 01:12:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2194 152 218 0 0 0 0 306 0 1 0 99 1 15 0 0 541 4 1634 0 0 2 0 8823 2 1 0 97 2 0 0 0 17 3 12 0 2 3 0 329 0 0 0 100 3 0 0 0 15 1 13 3 2 15 0 1989 3 0 0 97 4 1 0 0 9 1 3 0 1 1 0 40 0 0 0 100 5 0 0 0 12 1 11 0 3 0 0 30 0 0 0 100 6 3 0 17 218 104 48 1 3 0 0 2226 0 1 0 99 7 2 0 10 226 109 22 0 1 0 0 276 0 0 0 100 March 4, 2026 at 01:12:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 183 0 0 6896 112 9785 73 429 116 1 23886 21 14 0 65 1 34 0 14 4501 10 9400 73 436 105 0 22776 19 12 0 68 2 15 0 0 3850 17 7817 39 284 119 0 21171 18 11 0 70 3 8 0 0 4286 14 9080 49 346 86 0 22134 20 12 0 69 4 7 0 0 3027 16 6225 44 292 107 0 17003 15 9 0 75 5 3 0 0 2383 31 4996 21 172 95 0 13212 11 7 0 82 6 38 0 3 3353 117 6628 30 277 96 0 17504 15 9 0 76 7 5 0 10 2339 110 4497 21 157 73 0 9696 9 6 0 86 March 4, 2026 at 01:12:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 6910 108 10284 114 561 722 0 27823 26 17 0 56 1 9 0 0 4854 18 10048 107 595 658 0 24808 20 14 0 65 2 13 0 0 4604 18 9459 80 448 682 0 20965 17 12 0 71 3 2 0 0 4545 149 9300 87 476 699 0 19610 17 12 0 71 4 5 0 14 2940 12 5908 63 372 682 0 14156 12 9 0 78 5 2 0 0 2123 9 4508 42 235 746 0 11680 11 8 0 82 6 2 0 3 3151 110 6247 58 346 757 0 15812 12 9 0 78 7 3 0 10 2318 113 4466 50 260 701 0 10821 10 7 0 83 March 4, 2026 at 01:12:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 6310 108 9075 69 341 149 0 24560 21 14 0 65 1 7 0 0 4076 11 8585 59 373 118 0 22318 19 12 0 70 2 4 0 0 3475 14 6996 36 241 67 0 16613 15 9 0 76 3 7 0 0 3726 17 7560 44 316 77 0 16658 13 9 0 78 4 4 0 0 2362 11 4794 38 228 97 0 11445 10 7 0 83 5 11 0 21 2200 9 4552 20 121 79 0 11906 10 6 0 84 6 14 0 2 2979 115 5750 27 211 58 0 14687 12 8 0 81 7 5 0 4 1929 118 3658 14 106 56 0 9850 8 5 0 86 March 4, 2026 at 01:12:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 139 1 1 0 0 1125 0 1 0 99 1 0 0 0 7 0 2 0 0 1 0 0 0 0 0 100 2 0 0 0 19 2 18 0 2 2 0 297 0 0 0 100 3 0 0 0 113 53 108 0 1 0 0 2 0 0 0 100 4 0 0 0 11 2 6 0 2 0 0 300 0 0 0 100 5 0 0 21 32 11 28 1 1 0 0 829 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 140 0 1 0 0 1120 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 19 5 176 0 0 2 0 635 0 0 0 100 3 0 0 0 118 53 120 0 3 0 0 0 0 0 0 100 4 0 0 0 14 4 8 1 1 0 0 307 0 0 0 100 5 0 0 21 32 13 28 1 0 3 0 832 0 0 0 100 6 0 0 3 211 102 10 0 1 0 0 5 0 0 0 100 7 1 0 3 211 103 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:12:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 152 1 0 1 0 1129 0 1 0 99 1 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 2 0 0 0 14 3 6 1 0 2 0 299 0 0 0 100 3 0 0 0 122 56 118 0 0 1 0 10 0 0 0 100 4 0 0 0 21 5 20 0 0 1 0 321 0 0 0 100 5 0 0 21 43 20 30 1 0 8 0 840 0 0 0 99 6 0 0 7 209 102 2 0 0 1 0 1 0 0 0 100 7 0 0 7 215 102 13 0 1 0 0 3 0 0 0 100 March 4, 2026 at 01:12:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2210 101 331 2 49 528 0 1120 0 2 0 98 1 0 0 0 104 0 211 1 47 494 0 0 0 1 0 99 2 0 0 0 120 3 245 1 47 461 0 303 0 2 0 98 3 0 0 0 343 181 475 2 49 440 0 10 0 2 0 98 4 0 0 0 117 5 235 0 56 450 0 303 0 1 0 99 5 0 0 21 150 5 310 1 50 495 0 822 0 1 0 99 6 0 0 3 328 101 280 0 56 571 0 0 0 1 0 99 7 0 0 3 299 104 193 1 44 562 0 1 0 1 0 99 March 4, 2026 at 01:12:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 114 1 2 0 0 1122 0 1 0 99 1 0 0 0 39 0 32 0 2 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 3 0 296 0 0 0 100 3 0 0 0 125 60 122 0 1 0 0 11 0 0 0 100 4 0 0 0 13 2 6 0 0 0 0 300 0 0 0 100 5 0 0 21 19 7 20 1 1 1 0 821 0 0 0 100 6 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 142 1 0 0 0 1120 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 12 2 8 0 0 3 0 300 0 0 0 100 3 0 0 0 124 59 120 0 0 0 0 6 0 0 0 100 4 0 0 0 9 2 2 1 0 0 0 300 0 0 0 100 5 0 0 21 11 4 8 1 0 3 0 820 0 0 0 100 6 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 7 1 0 3 213 104 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:12:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 2139 104 249 28 14 5 0 1542 2 2 0 96 1 21 0 0 40 0 75 14 17 0 0 456 2 0 0 98 2 0 0 0 53 2 131 18 17 3 0 750 2 0 0 98 3 19 0 0 163 61 226 21 18 3 0 654 2 0 0 98 4 738 0 0 36 3 37 10 8 2 1 571 2 0 0 98 5 74 0 21 46 6 70 4 16 6 0 1042 2 0 0 98 6 0 0 45 257 102 121 24 13 0 0 274 2 0 0 98 7 1 0 3 247 102 90 16 12 7 0 404 3 0 0 96 March 4, 2026 at 01:12:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2588 105 768 30 132 33 0 2973 25 3 0 72 1 2 0 0 500 7 717 37 138 26 0 4694 30 2 0 67 2 1 0 0 499 10 700 43 133 31 0 3235 28 2 0 70 3 0 0 7 594 26 938 84 163 30 0 4535 18 2 0 80 4 4 0 0 491 18 729 26 139 33 0 3327 21 2 0 78 5 4 0 14 507 21 729 23 122 29 0 3973 15 2 0 84 6 3 0 590 536 108 595 22 112 18 0 2933 18 2 0 80 7 0 0 3 707 105 783 34 95 18 0 3146 16 2 0 82 March 4, 2026 at 01:12:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2603 104 809 32 140 26 0 3484 25 3 0 73 1 5 0 0 520 16 792 25 139 27 0 5217 25 2 0 73 2 0 0 0 499 8 717 29 124 33 0 3138 22 2 0 76 3 0 0 7 630 20 1120 75 164 47 0 4702 18 2 0 80 4 0 0 0 461 8 696 19 117 26 0 3387 25 2 0 73 5 2 0 14 424 12 620 30 100 21 0 3536 24 2 0 74 6 0 0 508 567 107 685 32 130 30 0 3433 21 2 0 77 7 0 0 3 652 115 679 18 93 18 0 2662 12 1 0 86 March 4, 2026 at 01:12:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2423 112 470 28 83 13 0 1918 22 2 0 76 1 4 0 0 395 8 593 30 115 12 0 3785 21 2 0 77 2 0 0 14 379 5 542 27 102 10 0 2477 15 1 0 83 3 0 0 0 424 28 638 40 111 15 0 3074 10 1 0 88 4 0 0 0 338 3 508 23 96 13 0 2188 18 1 0 80 5 6 0 0 310 4 448 16 75 9 0 2656 13 1 0 86 6 2 0 403 515 108 549 31 95 11 0 2726 17 2 0 81 7 0 0 2 530 109 475 14 68 14 0 2147 16 1 0 83 March 4, 2026 at 01:12:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2165 150 215 0 9 10 2 54 0 1 0 99 1 6 0 0 33 2 66 1 8 7 1 1174 0 0 0 100 2 6 0 14 24 2 30 0 4 4 2 322 0 0 0 100 3 305 0 0 30 3 36 0 6 7 1 288 0 0 0 100 4 298 0 0 26 4 37 0 8 9 7 252 0 0 0 100 5 22 0 0 38 7 57 0 12 8 5 669 0 0 0 100 6 4 0 24 226 105 31 0 5 2 2 326 0 0 0 100 7 1809 0 3 231 105 47 2 6 6 4 321 1 1 0 99 March 4, 2026 at 01:12:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2125 100 113 0 4 1 2 39 0 1 0 99 1 5 0 0 132 52 150 1 3 1 2 1245 0 0 0 99 2 706 0 14 34 3 14 3 3 2 1 6753 2 1 0 97 3 312 0 149 17 1 29 1 6 2 7 84 0 0 0 100 4 47 0 2 38 2 34 0 5 0 5 347 0 0 0 100 5 81 0 0 106 11 69 0 1 6 10 696 0 0 0 100 6 10 0 10 238 105 26 0 3 0 2 325 0 0 0 100 7 13 0 3 233 102 18 0 5 1 1 51 0 0 0 100 March 4, 2026 at 01:12:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 98 0 2 1 0 14 0 1 0 99 1 0 0 0 49 17 70 0 3 2 0 1210 0 0 0 100 2 0 0 14 83 39 80 0 2 0 0 266 0 0 0 100 3 0 0 0 19 3 12 0 1 1 0 9 0 0 0 100 4 0 0 0 24 4 20 1 1 1 0 222 0 0 0 100 5 0 0 0 58 20 52 1 1 2 0 626 0 0 0 100 6 0 0 14 220 106 16 0 0 1 0 290 0 0 0 100 7 0 0 7 214 102 9 0 0 1 0 3 0 0 0 100 March 4, 2026 at 01:12:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 8 2452 102 759 32 64 17 0 1553 3 3 0 93 1 43 0 7 61 1 84 8 14 62 4 4328 6 2 0 92 2 16 0 14 134 44 126 10 10 144 1 3326 6 2 0 92 3 1 0 0 346 3 627 35 60 19 0 1347 5 1 0 94 4 3 0 0 316 3 566 23 54 42 0 2702 4 1 0 95 5 0 0 14 369 12 683 29 53 14 0 1994 3 1 0 96 6 2 0 122 469 108 501 24 48 129 0 1609 4 1 0 95 7 0 0 3 387 103 316 19 33 48 0 2247 4 1 0 94 March 4, 2026 at 01:12:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 108 0 1 0 0 1 0 1 0 99 1 0 0 0 17 2 38 1 1 0 0 1119 0 0 0 100 2 3 0 21 20 8 18 0 1 0 0 291 0 0 0 100 3 0 0 0 12 3 6 0 0 0 0 2 0 0 0 100 4 0 0 0 16 3 10 1 1 0 0 312 0 0 0 100 5 0 0 0 20 3 13 0 1 2 0 594 0 0 0 100 6 0 0 10 310 153 104 0 0 0 0 260 0 0 0 100 7 0 0 3 211 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 103 114 0 0 0 0 3 0 1 0 99 1 0 0 0 27 1 34 2 0 2 0 1116 0 0 0 100 2 0 0 14 38 7 18 0 0 0 0 274 0 0 0 100 3 0 0 0 28 2 6 0 1 0 0 0 0 0 0 100 4 0 0 0 28 3 6 0 0 6 0 279 0 0 0 100 5 0 0 112 14 2 11 0 1 3 0 594 0 0 0 100 6 0 0 10 331 153 114 0 1 0 0 260 0 0 0 100 7 0 0 3 225 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 106 0 2 0 0 3 0 1 0 99 1 0 0 0 12 1 36 1 1 0 0 1116 0 0 0 100 2 0 0 14 23 8 18 1 1 0 0 276 0 0 0 100 3 0 0 0 20 3 14 0 2 0 0 3 0 0 0 100 4 0 0 0 15 3 8 0 0 0 0 299 0 0 0 100 5 0 0 7 14 3 8 0 0 1 0 593 0 0 0 100 6 0 0 10 312 153 106 0 0 0 0 260 0 0 0 100 7 0 0 3 215 102 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:12:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 103 120 0 2 0 0 823 0 1 0 99 1 0 0 0 17 1 46 1 2 3 0 1947 0 0 0 99 2 0 0 14 39 10 50 0 1 4 0 345 0 0 0 100 3 0 0 0 33 2 43 0 3 1 0 52 0 0 0 100 4 0 0 0 23 3 29 0 4 5 0 388 0 0 0 100 5 0 0 0 23 7 13 3 0 1 0 644 0 0 0 100 6 0 0 10 323 155 128 2 4 1 0 385 0 0 0 100 7 0 0 3 215 102 13 0 3 0 0 17 0 0 0 100 March 4, 2026 at 01:12:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2380 102 725 4 146 1840 0 0 0 5 0 95 1 0 0 0 310 8 700 1 154 1800 0 1118 0 5 0 95 2 0 0 0 242 2 537 5 143 1834 0 0 0 4 0 96 3 0 0 14 505 262 558 5 143 1661 0 268 0 5 0 95 4 0 0 0 271 9 593 4 147 1808 0 285 0 4 0 96 5 0 0 0 299 2 674 2 134 1815 0 593 0 4 0 96 6 0 0 10 505 135 608 4 139 1769 0 259 0 4 0 96 7 0 0 3 555 117 734 3 134 1577 0 1 0 4 0 96 March 4, 2026 at 01:12:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 110 0 2 0 0 0 0 1 0 99 1 0 0 0 121 53 145 1 2 1 0 1121 0 0 0 100 2 0 0 0 11 1 4 0 1 0 0 0 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 26 9 22 0 1 0 0 317 0 0 0 100 5 0 0 0 10 2 6 0 0 3 0 594 0 0 0 100 6 0 0 10 209 103 4 0 0 0 0 260 0 0 0 100 7 0 0 3 211 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 98 0 2 0 0 0 0 1 0 99 1 0 0 0 117 51 138 1 2 1 0 1116 0 0 0 100 2 0 0 0 18 3 13 0 1 0 0 1 0 0 0 100 3 0 0 14 10 3 6 0 0 0 0 268 0 0 0 100 4 0 0 0 22 8 18 0 1 1 0 301 0 0 0 100 5 0 0 0 10 2 6 0 0 5 0 594 0 0 0 100 6 0 0 10 209 103 4 0 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 116 0 2 0 0 4 0 1 0 99 1 0 0 0 121 53 153 1 2 0 0 1136 0 0 0 100 2 0 0 0 20 4 16 1 0 0 0 10 0 0 0 100 3 0 0 14 11 3 10 0 1 0 0 269 0 0 0 100 4 0 0 0 27 9 22 0 0 2 0 359 0 0 0 100 5 0 0 0 14 3 8 2 0 1 0 596 0 0 0 100 6 0 0 10 211 104 6 1 0 0 0 261 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 1 0 0 0 1 0 99 1 0 0 0 119 54 150 0 3 1 0 1124 0 0 0 100 2 1 0 0 25 4 30 0 1 1 0 20 0 0 0 100 3 0 0 14 31 12 26 0 0 1 0 293 0 0 0 100 4 0 0 0 20 4 12 1 1 4 0 305 0 0 0 100 5 0 0 0 20 10 8 0 0 9 0 594 0 0 0 100 6 0 0 10 211 104 6 0 0 1 0 261 0 0 0 100 7 0 0 3 212 102 7 0 1 2 0 0 0 0 0 100 March 4, 2026 at 01:12:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 116 0 0 2 0 18 0 1 0 99 1 0 0 0 56 23 76 2 0 3 0 1123 0 0 0 99 2 0 0 0 77 35 76 0 2 0 0 0 0 0 0 100 3 20 0 14 14 4 14 0 0 1 0 271 0 0 0 100 4 0 0 0 13 3 6 0 0 1 0 294 0 0 0 100 5 0 0 0 17 5 14 0 0 8 0 601 0 0 0 100 6 0 0 10 212 104 8 0 1 0 0 265 0 0 0 100 7 0 0 3 213 103 8 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:12:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 2 0 0 0 0 1 0 99 1 0 0 0 22 6 46 1 1 0 0 1119 0 0 0 100 2 0 0 0 111 52 106 0 0 0 0 1 0 0 0 100 3 0 0 14 15 4 18 0 2 1 0 268 0 0 0 100 4 0 0 0 23 3 14 0 2 4 0 316 0 0 0 100 5 0 0 0 12 3 8 0 0 4 0 595 0 0 0 100 6 0 0 10 209 103 4 0 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 106 0 2 0 0 1 0 1 0 99 1 0 0 0 20 7 44 1 0 0 0 1120 0 0 0 100 2 0 0 2 109 51 104 0 1 0 0 0 0 0 0 100 3 0 0 14 20 3 16 0 3 1 0 267 0 0 0 100 4 0 0 0 15 3 14 0 1 2 0 296 0 0 0 100 5 0 0 0 13 2 8 2 1 3 0 594 0 0 0 100 6 0 0 10 219 107 12 1 0 0 0 265 0 0 0 100 7 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:12:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 21 7 44 1 0 1 0 1118 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 14 17 3 14 0 0 0 0 268 0 0 0 100 4 0 0 0 11 3 6 1 1 6 0 283 0 0 0 100 5 0 0 0 12 3 8 0 0 5 0 595 0 0 0 100 6 0 0 10 211 104 6 0 0 0 0 261 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 22 7 44 2 0 0 0 1122 0 0 0 99 2 0 0 0 122 55 124 0 0 0 0 17 0 0 0 100 3 0 0 14 24 2 32 0 1 0 0 280 0 0 0 100 4 0 0 0 19 3 12 0 1 1 0 357 0 0 0 100 5 0 0 0 19 9 10 0 1 3 0 597 0 0 0 100 6 0 0 10 213 105 8 0 0 0 0 265 0 0 0 100 7 0 0 3 212 102 7 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 0 0 0 0 0 1 0 99 1 0 0 0 9 1 34 0 0 1 0 1112 0 0 0 100 2 0 0 0 122 58 118 0 0 0 0 10 0 0 0 100 3 0 0 14 22 3 22 0 0 3 0 268 0 0 0 100 4 0 0 0 14 3 16 0 2 4 0 289 0 0 0 100 5 0 0 0 13 3 10 0 0 1 0 593 0 0 0 100 6 0 0 10 209 103 4 0 0 0 0 260 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:13:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 1 0 99 1 0 0 0 8 1 32 1 0 1 0 1110 0 0 0 100 2 0 0 0 117 56 112 0 0 0 0 8 0 0 0 100 3 0 0 14 15 2 12 0 0 0 0 266 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 293 0 0 0 100 5 0 0 0 14 3 8 2 0 2 0 595 0 0 0 100 6 0 0 10 214 105 8 2 0 0 0 262 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 8 1 32 1 0 0 0 1112 0 0 0 100 2 0 0 0 119 57 114 0 0 0 0 6 0 0 0 100 3 0 0 14 17 3 16 0 1 0 0 268 0 0 0 100 4 0 0 0 13 3 6 0 1 2 0 301 0 0 0 100 5 0 0 0 15 3 18 0 1 0 0 593 0 0 0 100 6 0 0 10 209 103 4 0 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2699 101 1979 4 22 0 0 9399 2 2 0 96 1 6 0 0 222 1 447 3 22 1 0 1995 1 1 0 99 2 3 0 0 219 56 302 5 6 17 0 2425 5 1 0 94 3 4 0 14 190 4 375 3 25 3 0 954 1 1 0 99 4 173 0 0 203 5 420 3 19 6 0 1160 1 1 0 98 5 90 0 0 110 4 197 1 10 3 0 1333 1 0 0 99 6 50 0 10 283 107 142 1 7 7 0 836 1 0 0 99 7 259 0 3 318 102 232 1 8 7 0 1346 1 1 0 98 March 4, 2026 at 01:13:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 6876 109 9937 82 396 108 0 23964 22 14 0 63 1 34 0 0 4809 12 9937 82 442 75 0 22829 19 12 0 68 2 12 0 0 4488 12 9311 60 299 79 0 19988 18 11 0 71 3 17 0 14 4179 22 8612 57 332 107 0 22356 18 12 0 71 4 16 0 0 2740 25 5507 29 264 89 0 14964 12 8 0 80 5 8 0 0 2194 16 4399 21 141 58 0 13164 11 7 0 82 6 11 0 14 2881 112 5741 30 215 72 0 16155 13 8 0 79 7 16 0 7 2724 111 5233 19 128 68 0 13543 12 7 0 80 March 4, 2026 at 01:13:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 6511 105 9327 100 518 750 0 24487 23 16 0 62 1 16 0 14 4542 9 9366 86 489 691 0 20697 17 12 0 70 2 8 0 0 3932 4 8040 56 335 655 0 17272 16 11 0 73 3 15 0 0 4099 143 8211 66 423 652 0 20334 17 12 0 72 4 5 0 0 2980 19 6171 49 374 709 0 15230 14 9 0 77 5 2 0 0 2752 11 5941 41 265 741 0 15494 13 10 0 77 6 47 0 10 3653 118 7291 53 380 691 0 18685 15 11 0 74 7 6 0 3 2944 113 5764 66 276 593 0 12991 11 8 0 81 March 4, 2026 at 01:13:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 5896 109 7795 57 345 85 0 18961 18 12 0 71 1 11 0 21 4206 14 8758 66 387 82 0 21931 18 12 0 71 2 9 0 0 3437 8 6903 42 234 80 0 16882 15 9 0 76 3 7 0 0 3295 10 6848 39 276 56 0 16287 14 9 0 78 4 4 0 0 2332 17 4770 37 244 86 0 13396 11 7 0 82 5 1 0 0 2046 16 4218 12 135 54 0 9577 9 6 0 86 6 3 0 2 2949 114 5790 30 246 88 0 14349 11 8 0 81 7 6 0 4 2313 112 4596 18 139 67 0 12888 11 7 0 82 March 4, 2026 at 01:13:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 90 0 2 0 0 1 0 1 0 99 1 0 0 21 39 10 36 0 5 0 0 535 0 0 0 100 2 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 19 6 12 0 1 0 0 306 0 0 0 100 5 0 0 0 109 50 104 0 1 0 0 0 0 0 0 100 6 0 0 3 219 103 42 1 0 1 0 1423 0 0 0 100 7 0 0 3 211 103 4 0 0 1 0 294 0 0 0 100 March 4, 2026 at 01:13:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 94 0 4 0 0 0 0 1 0 99 1 0 0 21 45 13 38 0 2 2 0 537 0 0 0 100 2 0 0 0 12 0 12 0 1 1 0 0 0 0 0 100 3 0 0 0 9 2 6 0 1 0 0 2 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 5 0 0 0 108 50 104 0 1 0 0 0 0 0 0 100 6 0 0 3 221 104 44 1 0 2 0 1422 0 0 0 100 7 0 0 3 212 103 6 0 0 4 0 297 0 0 0 100 March 4, 2026 at 01:13:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 114 0 1 0 0 7 0 1 0 99 1 0 0 21 27 12 24 1 0 0 0 541 0 0 0 100 2 0 0 0 8 0 4 0 2 0 0 3 0 0 0 100 3 0 0 0 13 1 14 0 2 0 0 3 0 0 0 100 4 0 0 0 20 5 14 1 0 0 0 312 0 0 0 100 5 0 0 0 118 56 106 0 0 1 0 5 0 0 0 100 6 1 0 3 233 106 64 2 1 1 0 1437 0 0 0 99 7 0 0 3 214 102 11 1 1 0 0 294 0 0 0 100 March 4, 2026 at 01:13:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2202 100 300 0 54 533 0 0 0 2 0 98 1 0 0 21 110 5 231 2 60 457 0 527 0 1 0 99 2 0 0 0 136 0 298 0 53 467 0 0 0 1 0 99 3 0 0 0 217 104 249 1 64 503 0 2 0 1 0 99 4 0 0 0 128 3 251 1 57 506 0 300 0 1 0 99 5 0 0 0 201 50 314 1 39 512 0 0 0 1 0 99 6 0 0 3 325 109 267 3 52 500 0 1400 0 2 0 98 7 0 0 3 358 103 331 1 52 476 0 295 0 1 0 99 March 4, 2026 at 01:13:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 108 0 0 0 0 0 0 1 0 99 1 0 0 21 13 5 10 0 0 0 0 525 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 6 0 2 0 0 0 0 0 0 100 4 0 0 0 21 6 20 0 1 0 0 306 0 0 0 100 5 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 6 0 0 3 226 109 50 1 1 2 0 1426 0 0 0 99 7 0 0 3 209 102 2 0 0 3 0 294 0 0 0 100 March 4, 2026 at 01:13:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 110 0 0 0 0 0 0 1 0 99 1 0 0 21 17 5 20 0 1 0 0 527 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 4 0 0 0 14 3 6 0 0 0 0 300 0 0 0 100 5 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 6 0 0 3 225 109 48 1 0 4 0 1453 0 0 0 99 7 0 0 3 209 102 2 0 0 1 0 294 0 0 0 100 March 4, 2026 at 01:13:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1694 0 0 2165 101 274 26 27 8 1 887 2 2 0 96 1 23 0 21 57 6 90 4 22 5 1 1059 3 0 0 97 2 78 0 0 61 3 134 14 22 5 0 523 5 0 0 95 3 20 0 0 61 2 81 8 14 6 0 496 3 0 0 96 4 260 0 0 65 4 164 17 19 5 0 1259 3 0 0 97 5 102 0 0 174 50 299 13 23 10 0 701 2 1 0 97 6 8 0 73 282 112 190 32 28 7 0 1688 3 1 0 96 7 1 0 3 256 102 90 22 18 1 0 897 4 0 0 96 March 4, 2026 at 01:13:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2561 108 756 30 130 46 0 3018 21 3 0 77 1 2 0 21 532 19 801 37 129 42 0 3790 28 2 0 70 2 0 0 0 476 8 717 32 123 46 0 3355 31 2 0 66 3 0 0 0 534 7 857 51 160 61 0 4198 24 2 0 74 4 4 0 0 471 14 677 32 138 36 0 4017 24 2 0 74 5 3 0 0 452 12 686 11 124 39 0 3484 16 2 0 82 6 1 0 493 912 121 1496 108 149 45 0 4527 10 2 0 87 7 5 0 3 700 115 774 24 88 58 0 3382 17 2 0 81 March 4, 2026 at 01:13:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2543 104 688 33 116 38 0 2582 26 2 0 72 1 0 0 21 488 19 712 36 125 53 0 3751 34 2 0 64 2 0 0 2 480 14 753 43 118 55 0 3390 27 2 0 71 3 0 0 0 491 10 806 38 139 49 0 3895 25 2 0 73 4 0 0 0 475 11 755 31 139 36 0 4138 26 2 0 72 5 0 0 0 500 8 811 22 123 69 0 3915 15 2 0 83 6 0 0 437 1001 111 1636 103 156 68 0 5108 9 3 0 88 7 0 0 3 633 107 675 18 91 41 0 3102 11 1 0 88 March 4, 2026 at 01:13:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2404 103 526 26 83 31 0 1964 22 2 0 76 1 0 0 21 374 9 552 24 97 35 0 2773 19 1 0 79 2 0 0 0 357 7 536 18 82 46 0 2332 17 2 0 82 3 0 0 0 337 6 543 24 95 37 0 2841 14 1 0 85 4 0 0 0 341 9 533 21 103 24 0 2418 18 1 0 81 5 0 0 0 271 10 387 14 70 13 0 2482 15 1 0 84 6 0 0 311 722 119 1105 95 113 51 0 4397 11 2 0 87 7 2 0 3 542 114 514 17 65 43 0 1745 10 1 0 88 March 4, 2026 at 01:13:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 52 0 0 2153 102 160 0 8 4 4 103 0 1 0 99 1 716 0 21 54 8 44 2 4 6 4 7023 2 1 0 97 2 41 0 0 42 2 42 2 9 2 7 88 0 0 0 99 3 20 0 0 52 6 55 1 10 2 2 120 0 0 0 100 4 2710 0 113 36 2 65 3 8 13 12 466 1 1 0 98 5 87 0 0 56 2 71 2 15 10 13 826 0 0 0 100 6 29 0 17 250 103 89 3 13 12 10 1529 0 1 0 99 7 13 0 4 343 151 145 0 9 5 3 120 0 0 0 100 March 4, 2026 at 01:13:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 1 0 99 1 0 0 21 29 13 26 0 0 0 0 538 0 0 0 100 2 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 4 0 0 0 10 2 4 0 1 0 0 0 0 0 0 100 5 0 0 0 10 2 4 0 0 7 0 522 0 0 0 100 6 0 0 3 216 103 44 1 1 3 0 1507 0 0 0 99 7 0 0 3 308 151 102 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:13:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 114 0 0 0 0 0 0 1 0 99 1 0 0 21 25 11 24 0 0 0 0 541 0 0 0 100 2 0 0 0 11 2 8 0 0 0 0 3 0 0 0 100 3 0 0 0 14 2 10 0 1 0 0 6 0 0 0 100 4 0 0 0 11 2 8 0 0 0 0 10 0 0 0 100 5 0 0 0 15 7 6 0 0 4 0 589 0 0 0 100 6 0 0 3 218 105 46 0 0 3 0 1519 0 0 0 100 7 0 0 3 310 151 105 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:13:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 8 2378 101 646 11 54 212 0 2751 6 4 0 90 1 0 0 21 348 11 646 21 76 71 0 3197 4 1 0 94 2 2 0 0 356 2 666 10 65 58 0 2561 4 1 0 95 3 1 0 14 266 4 482 14 50 54 1 3222 5 2 0 93 4 35 0 0 260 2 465 16 49 176 1 2990 5 2 0 94 5 13 0 7 338 2 650 21 62 70 1 3386 4 2 0 94 6 0 0 157 508 103 686 20 62 81 0 3918 4 2 0 94 7 23 0 3 441 152 311 12 19 51 0 2538 5 2 0 93 March 4, 2026 at 01:13:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 122 0 1 1 0 0 0 1 0 99 1 2 0 21 14 5 8 1 0 0 0 527 0 0 0 100 2 0 0 0 14 2 8 0 0 0 0 0 0 0 0 100 3 0 0 0 16 4 11 0 2 1 0 0 0 0 0 100 4 0 0 0 12 3 5 0 1 0 0 0 0 0 0 100 5 0 0 0 19 4 10 2 0 2 0 607 0 0 0 100 6 0 0 10 229 111 52 2 1 0 0 1426 0 0 0 99 7 0 0 3 312 152 104 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:13:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 100 110 0 1 0 0 0 0 1 0 99 1 0 0 21 28 5 10 0 0 0 0 527 0 0 0 100 2 0 0 0 25 1 4 0 0 0 0 0 0 0 0 100 3 0 0 112 13 3 9 0 0 0 0 2 0 0 0 100 4 0 0 0 27 2 4 0 1 0 0 0 0 0 0 100 5 0 0 0 27 3 6 0 0 0 0 595 0 0 0 100 6 0 0 3 243 109 48 1 1 3 0 1419 0 0 0 99 7 0 0 3 324 151 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 0 0 0 1 0 1 0 99 1 0 0 21 16 4 18 0 1 0 0 528 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 3 0 0 7 11 2 6 0 0 0 0 0 0 0 0 100 4 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 602 0 0 0 100 6 0 0 3 228 111 50 1 0 1 0 1424 0 0 0 99 7 0 0 3 310 152 102 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:13:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 101 133 0 6 2 0 80 0 1 0 99 1 0 0 21 31 9 32 0 5 2 0 562 0 0 0 100 2 0 0 0 23 2 28 0 4 1 0 129 0 0 0 100 3 0 0 0 28 6 31 0 3 2 0 40 0 0 0 100 4 0 0 0 25 5 27 1 3 6 0 842 0 0 0 100 5 0 0 0 24 9 20 0 2 5 0 736 0 0 0 100 6 1 0 3 243 113 80 1 4 2 0 1514 0 0 0 99 7 0 0 3 319 152 116 1 1 9 0 825 0 0 0 100 March 4, 2026 at 01:13:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2315 100 538 1 124 1811 0 18 0 5 0 95 1 0 0 14 239 3 549 2 131 1850 1 268 0 4 0 96 2 0 0 0 294 21 614 1 139 1540 0 0 0 3 0 97 3 0 0 0 454 236 678 2 145 1833 0 9 0 4 0 96 4 0 0 0 280 2 642 0 143 1831 0 0 0 4 0 96 5 0 0 0 210 4 485 3 106 1733 0 502 0 4 0 96 6 0 0 10 429 104 590 5 138 1874 0 1670 0 4 0 96 7 0 0 3 484 132 526 2 112 1574 0 9 0 4 0 96 March 4, 2026 at 01:13:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 1 0 99 1 0 0 14 19 3 18 0 2 0 0 271 0 0 0 100 2 0 0 0 111 51 106 0 0 0 0 0 0 0 0 100 3 0 0 0 28 9 28 0 1 0 0 8 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 14 3 8 1 1 0 0 590 0 0 0 100 6 0 0 10 219 106 40 1 0 0 0 1676 0 0 0 99 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 104 0 0 0 0 0 0 1 0 99 1 0 0 14 9 2 4 0 0 0 0 267 0 0 0 100 2 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 3 0 0 0 31 9 27 0 2 0 0 10 0 0 0 100 4 0 0 0 13 2 12 0 1 0 0 0 0 0 0 100 5 0 0 0 11 3 6 0 0 2 0 617 0 0 0 100 6 0 0 10 213 105 38 0 0 0 0 1671 0 0 0 99 7 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 110 0 0 0 0 9 0 1 0 99 1 0 0 14 14 3 18 0 1 0 0 285 0 0 0 100 2 0 0 0 53 23 48 0 0 0 0 24 0 0 0 100 3 0 0 0 35 10 32 0 0 0 0 31 0 0 0 100 4 0 0 0 12 2 6 0 1 0 0 1 0 0 0 100 5 0 0 0 13 4 10 0 1 2 0 586 0 0 0 100 6 0 0 10 215 105 40 2 1 1 0 1684 0 0 0 99 7 0 0 3 264 129 58 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:13:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 102 123 2 3 1 0 18 0 1 0 99 1 0 0 14 11 2 12 0 1 0 0 278 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 32 8 28 0 0 0 0 18 0 0 0 100 4 0 0 0 14 3 10 0 0 2 0 28 0 0 0 100 5 0 0 0 24 8 16 1 1 1 0 605 0 0 0 100 6 0 0 10 221 108 42 3 0 0 0 1675 0 0 0 99 7 0 0 3 314 151 110 0 1 0 0 6 0 0 0 100 March 4, 2026 at 01:13:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 107 118 0 0 0 0 6 0 1 0 99 1 0 0 14 13 4 10 0 0 0 0 268 0 0 0 100 2 0 0 0 10 1 8 0 1 0 0 0 0 0 0 100 3 20 0 0 19 3 14 0 0 0 0 7 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 17 3 14 1 0 5 0 610 0 0 0 100 6 1 0 10 225 107 54 2 1 4 0 1683 0 0 0 99 7 0 0 3 310 152 104 0 0 2 0 1 0 0 0 100 March 4, 2026 at 01:13:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 106 0 3 0 0 10 0 1 0 99 1 0 0 14 25 3 20 0 2 0 0 267 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 16 1 8 0 0 0 0 0 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 11 3 6 0 0 6 0 600 0 0 0 100 6 0 0 10 213 105 38 0 0 4 0 1665 0 0 0 99 7 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 122 0 0 0 0 10 0 1 0 99 1 0 0 14 11 4 8 0 0 0 0 268 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 4 0 0 0 8 2 4 0 1 0 0 0 0 0 0 100 5 0 0 0 12 3 6 0 0 2 0 589 0 0 0 100 6 0 0 10 216 105 40 1 0 1 0 1665 0 0 0 99 7 0 0 3 312 151 110 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:13:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 124 0 0 0 0 10 0 1 0 99 1 0 0 14 12 4 8 0 0 0 0 269 0 0 0 100 2 0 0 0 17 3 18 0 1 0 0 3 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 15 4 10 0 0 0 0 5 0 0 0 100 5 0 0 0 12 3 6 1 0 3 0 663 0 0 0 100 6 0 0 10 220 106 44 3 0 2 0 1670 0 0 0 99 7 0 0 3 311 152 104 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:13:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 109 137 1 1 1 0 16 0 1 0 99 1 0 0 14 18 5 16 0 0 1 0 285 0 0 0 100 2 0 0 0 15 2 8 0 1 2 0 3 0 0 0 100 3 0 0 0 18 3 12 0 0 1 0 13 0 0 0 100 4 0 0 0 14 4 6 0 0 1 0 4 0 0 0 100 5 0 0 0 21 10 6 1 0 1 0 561 0 0 0 100 6 0 0 14 215 105 38 1 0 4 0 1663 0 0 0 99 7 0 0 7 316 152 113 0 2 0 0 10 0 0 0 100 March 4, 2026 at 01:13:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 108 122 0 3 2 0 10 0 1 0 99 1 0 0 14 20 3 16 0 2 0 0 267 0 0 0 100 2 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 3 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 16 4 14 0 0 7 0 611 0 0 0 100 6 0 0 10 219 107 44 1 0 8 0 1666 0 0 0 99 7 0 0 3 309 151 104 0 1 2 0 0 0 0 0 100 March 4, 2026 at 01:13:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 106 120 0 0 0 0 9 0 1 0 99 1 0 0 14 14 4 12 1 1 0 0 271 0 0 0 100 2 1 0 0 12 3 8 0 0 0 0 5 0 0 0 100 3 0 0 0 12 2 8 0 0 0 0 2 0 0 0 100 4 0 0 0 16 2 16 0 1 1 0 6 0 0 0 100 5 0 0 0 13 3 8 0 0 6 0 597 0 0 0 100 6 0 0 10 216 106 40 1 0 5 0 1666 0 0 0 99 7 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 122 0 0 0 0 9 0 1 0 99 1 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 10 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 12 3 6 1 0 2 0 609 0 0 0 100 6 0 0 10 215 105 38 2 0 5 0 1665 0 0 0 99 7 0 0 3 309 152 102 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:13:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 255 0 0 2480 106 888 12 28 15 0 2366 2 2 0 96 1 14 0 14 967 4 2243 2 33 1 0 10099 3 2 0 96 2 20 0 0 270 2 587 5 17 26 0 1857 2 1 0 97 3 1 0 0 257 4 482 6 19 5 0 3427 6 1 0 93 4 0 0 0 315 2 639 6 27 17 0 1340 1 1 0 98 5 10 0 0 173 5 339 2 16 5 0 1506 1 1 0 98 6 71 0 10 477 106 571 3 22 14 0 2803 1 1 0 98 7 52 0 3 459 147 432 3 11 4 0 702 1 1 0 99 March 4, 2026 at 01:13:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 6278 113 8757 69 360 201 0 25071 23 14 0 62 1 23 0 21 5056 14 10359 65 377 92 0 24695 20 13 0 67 2 9 0 0 3465 15 6910 53 251 149 0 17372 15 10 0 75 3 12 0 0 4333 16 8947 51 285 98 0 19006 16 11 0 72 4 7 0 0 2706 21 5587 35 243 198 0 13349 13 8 0 79 5 4 0 0 2183 15 4462 18 153 92 0 11450 10 6 0 84 6 15 0 3 3532 115 7169 47 253 143 0 18268 15 10 0 76 7 5 0 3 3142 108 6203 28 141 94 0 16032 13 8 0 78 March 4, 2026 at 01:13:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 6699 105 9974 89 516 685 0 28591 24 17 0 58 1 13 0 0 5301 15 11239 112 556 841 0 24093 20 14 0 66 2 10 0 14 4086 8 8354 62 400 805 0 19514 17 12 0 71 3 9 0 7 4387 158 9009 74 466 709 0 21060 17 13 0 70 4 23 0 0 2561 15 5142 52 364 790 0 13203 12 8 0 79 5 4 0 0 2320 21 4743 40 287 773 0 10052 9 6 0 85 6 7 0 2 3597 112 7423 59 373 833 0 17953 15 11 0 74 7 7 0 4 2569 110 5042 40 232 762 0 12979 11 8 0 81 March 4, 2026 at 01:13:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 5617 106 7322 39 296 115 0 19409 20 12 0 69 1 6 0 0 3934 17 8041 56 345 111 0 18319 15 10 0 76 2 8 0 14 2728 10 5390 32 217 60 0 14412 12 8 0 80 3 5 0 7 3065 17 6409 44 258 88 0 18235 15 9 0 76 4 2 0 0 2620 19 5412 42 209 102 0 13465 12 8 0 80 5 1 0 0 2004 7 4116 16 122 99 0 8833 8 5 0 87 6 16 0 3 3070 109 6107 18 200 95 0 13277 11 8 0 81 7 5 0 3 2244 110 4386 21 125 74 0 12323 9 6 0 85 March 4, 2026 at 01:13:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 112 0 0 3 0 301 0 1 0 99 1 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 2 0 0 14 21 5 24 0 2 0 0 271 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 4 0 0 0 126 60 120 1 1 0 0 12 0 0 0 100 5 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 6 0 0 3 207 101 2 0 1 0 0 0 0 0 0 100 7 0 0 3 217 105 38 1 0 3 0 1712 0 0 0 99 March 4, 2026 at 01:13:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 116 0 1 1 0 302 0 1 0 99 1 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 2 0 0 14 8 2 8 0 1 0 0 267 0 0 0 100 3 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 4 0 0 0 119 57 110 0 0 0 0 15 0 0 0 100 5 0 0 0 20 6 16 0 2 0 0 5 0 0 0 100 6 0 0 3 212 103 8 0 2 1 0 15 0 0 0 100 7 0 0 3 217 106 40 0 0 1 0 1715 0 0 0 99 March 4, 2026 at 01:13:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 0 0 6 0 297 0 1 0 99 1 0 0 0 18 3 18 0 0 1 0 21 0 0 0 100 2 0 0 14 18 5 16 0 2 1 0 279 0 0 0 100 3 0 0 7 28 6 32 0 1 1 0 275 0 0 0 100 4 0 0 0 30 11 22 0 1 2 0 25 0 0 0 100 5 0 0 0 116 57 106 0 2 0 0 3 0 0 0 100 6 0 0 3 213 103 6 0 0 2 0 24 0 0 0 100 7 0 0 3 221 106 45 1 1 7 0 1715 0 0 0 99 March 4, 2026 at 01:13:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2227 102 335 4 64 456 0 302 0 2 0 98 1 0 0 0 122 1 263 0 70 457 0 1 0 1 0 99 2 0 0 21 118 3 254 1 57 504 0 527 0 2 0 98 3 0 0 0 246 127 249 2 61 441 0 9 0 2 0 98 4 0 0 0 130 2 247 2 62 500 0 0 0 1 0 99 5 0 0 0 271 51 445 1 51 388 0 1 0 1 0 99 6 0 0 3 316 103 246 1 58 484 0 1 0 1 0 99 7 0 0 3 379 105 405 4 61 508 0 1716 0 2 0 98 March 4, 2026 at 01:13:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 110 0 3 2 0 302 0 1 0 99 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 21 13 5 14 0 1 0 0 528 0 0 0 100 3 0 0 0 19 7 14 0 0 0 0 9 0 0 0 100 4 0 0 0 11 3 4 0 0 0 0 2 0 0 0 100 5 0 0 0 115 51 108 0 0 0 0 0 0 0 0 100 6 0 0 3 211 103 4 0 1 0 0 1 0 0 0 100 7 0 0 3 216 105 38 1 0 1 0 1714 0 0 0 99 March 4, 2026 at 01:13:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 108 0 2 1 0 300 0 1 0 99 1 0 0 0 6 0 4 0 2 0 0 0 0 0 0 100 2 0 0 21 12 3 10 0 0 0 0 527 0 0 0 100 3 0 0 0 21 8 16 0 0 0 0 10 0 0 0 100 4 0 0 0 12 2 6 0 1 0 0 0 0 0 0 100 5 0 0 0 110 50 110 0 1 0 0 0 0 0 0 100 6 0 0 3 213 101 5 0 2 0 0 0 0 0 0 100 7 0 0 3 216 105 38 1 0 0 0 1712 0 0 0 99 March 4, 2026 at 01:13:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2170 104 216 5 28 5 0 891 3 1 0 96 1 0 0 0 58 3 68 3 20 2 0 519 4 0 0 96 2 259 0 21 82 6 187 39 20 32 0 1364 4 1 0 95 3 22 0 0 91 6 176 9 33 2 1 770 4 0 0 95 4 2 0 0 81 4 136 5 25 4 0 700 3 0 0 96 5 1316 0 0 156 46 208 3 22 11 0 708 4 1 0 95 6 775 0 115 260 102 108 9 22 32 0 804 2 1 0 97 7 11 0 3 291 106 179 6 32 9 1 2188 4 1 0 95 March 4, 2026 at 01:13:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2572 117 769 43 125 29 0 3276 28 3 0 69 1 2 0 0 472 7 691 26 145 12 0 3826 25 2 0 73 2 4 0 21 509 22 706 20 115 14 0 3913 21 2 0 78 3 6 0 0 494 8 729 31 133 18 0 3785 23 2 0 75 4 0 0 0 473 10 700 34 142 16 0 3881 17 2 0 81 5 0 0 0 439 7 683 11 100 21 0 3126 21 2 0 78 6 1 0 479 579 111 672 29 122 12 0 3873 18 2 0 80 7 0 0 3 613 106 653 25 98 13 0 4576 18 2 0 80 March 4, 2026 at 01:13:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2588 105 811 31 122 21 0 4656 23 3 0 74 1 0 0 0 453 4 675 35 130 21 0 3704 32 2 0 66 2 0 0 14 422 5 595 25 103 24 0 3026 31 2 0 67 3 0 0 7 542 13 809 34 135 20 0 4349 21 2 0 77 4 0 0 0 437 10 646 31 127 17 0 3583 28 2 0 71 5 0 0 0 543 10 847 21 137 20 0 4031 14 2 0 84 6 0 0 493 667 124 821 18 140 18 0 4301 11 2 0 87 7 0 0 3 571 107 536 12 78 16 0 2924 13 1 0 86 March 4, 2026 at 01:13:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2443 109 534 19 86 11 0 2764 15 2 0 83 1 0 0 0 295 9 406 18 84 16 0 1936 23 1 0 76 2 3 0 15 376 15 602 21 83 12 0 3496 16 2 0 82 3 0 0 0 349 13 504 20 92 10 0 3168 14 1 0 84 4 0 0 0 292 15 375 18 79 20 0 2152 16 1 0 82 5 0 0 0 298 8 415 11 66 14 0 2200 13 1 0 86 6 3 0 338 480 108 517 12 89 10 0 2971 15 2 0 84 7 0 0 4 471 105 380 16 60 10 0 1993 10 1 0 89 March 4, 2026 at 01:13:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2111 103 104 1 4 3 0 658 0 1 0 99 1 1 0 0 21 1 14 0 3 0 0 4 0 0 0 100 2 2 0 14 28 6 54 2 1 1 0 1407 0 0 0 99 3 0 0 0 15 4 12 0 1 3 0 314 0 0 0 100 4 0 0 0 117 53 112 0 2 0 0 7 0 0 0 100 5 0 0 0 10 1 8 0 1 0 0 304 0 0 0 100 6 0 0 3 217 105 14 0 1 0 0 8 0 0 0 100 7 4 0 3 210 102 4 0 0 1 0 9 0 0 0 100 March 4, 2026 at 01:13:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 110 1 0 2 0 474 0 1 0 99 1 0 0 0 15 2 14 0 1 0 0 1 0 0 0 100 2 0 0 14 35 11 62 1 0 0 0 1403 0 0 0 99 3 0 0 0 10 2 4 1 0 0 0 301 0 0 0 100 4 0 0 0 111 53 106 0 0 0 0 4 0 0 0 100 5 0 0 0 8 1 4 1 1 2 0 294 0 0 0 100 6 0 0 3 213 104 8 0 0 0 0 1 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 112 0 0 2 0 562 0 1 0 99 1 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 2 0 0 14 44 11 74 3 1 1 0 1417 0 0 0 99 3 0 0 0 19 4 12 0 0 1 0 313 0 0 0 100 4 0 0 0 128 58 130 0 1 0 0 23 0 0 0 100 5 0 0 0 20 8 8 0 0 4 0 301 0 0 0 100 6 0 0 3 211 103 6 0 0 1 0 0 0 0 0 100 7 0 0 3 214 103 9 0 0 1 0 1 0 0 0 100 March 4, 2026 at 01:13:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 21 2400 104 619 24 61 85 1 2461 4 2 0 94 1 4 0 0 291 2 511 23 52 143 0 2278 4 1 0 95 2 0 0 20 343 12 649 31 66 40 0 3599 4 2 0 95 3 2 0 0 220 2 380 30 46 94 0 2938 4 2 0 93 4 2 0 0 220 51 266 9 24 100 0 3126 6 2 0 92 5 23 0 0 212 3 354 13 41 131 0 2667 5 1 0 94 6 34 0 143 516 106 628 24 53 46 0 2513 4 2 0 94 7 3 0 44 582 106 711 31 62 58 0 2216 6 1 0 92 March 4, 2026 at 01:13:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 103 119 0 1 1 0 560 0 1 0 99 1 0 0 0 12 1 4 0 1 0 0 0 0 0 0 100 2 2 0 14 65 29 88 1 1 1 0 1303 0 0 0 100 3 0 0 0 61 24 60 0 2 0 0 300 0 0 0 100 4 0 0 0 17 6 10 0 0 0 0 5 0 0 0 100 5 0 0 0 12 2 8 0 2 0 0 294 0 0 0 100 6 0 0 3 226 110 20 0 0 0 0 10 0 0 0 100 7 0 0 3 212 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2111 103 117 2 3 0 0 562 0 1 0 99 1 0 0 0 25 1 4 0 1 0 0 0 0 0 0 100 2 0 0 14 24 2 34 1 0 1 0 1298 0 0 0 100 3 0 0 0 134 51 114 1 1 0 0 300 0 0 0 100 4 0 0 0 32 5 8 0 0 0 0 3 0 0 0 100 5 0 0 0 27 2 4 1 0 1 0 294 0 0 0 100 6 0 0 3 246 109 24 0 2 0 0 9 0 0 0 100 7 0 0 3 223 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:13:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 104 119 0 1 6 0 557 0 1 0 99 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 8 2 34 0 0 0 0 1299 0 0 0 100 3 0 0 0 108 51 102 0 0 0 0 300 0 0 0 100 4 0 0 0 16 5 8 0 0 0 0 4 0 0 0 100 5 0 0 0 14 4 12 0 1 5 0 300 0 0 0 100 6 0 0 3 223 107 18 0 1 0 0 19 0 0 0 100 7 0 0 3 209 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2123 105 127 0 3 1 0 595 0 1 0 99 1 0 0 0 24 2 28 1 3 4 0 930 0 0 0 100 2 0 0 14 22 4 57 1 5 2 0 1345 0 0 0 99 3 0 0 0 118 52 114 0 3 0 0 322 0 0 0 100 4 0 0 0 29 6 36 0 2 1 0 45 0 0 0 100 5 0 0 0 18 7 12 0 0 1 0 335 0 0 0 100 6 0 0 3 241 109 43 0 5 2 0 852 0 0 0 99 7 0 0 3 218 101 18 0 2 0 0 84 0 0 0 100 March 4, 2026 at 01:14:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 50 0 7 2383 103 672 1 139 1837 6 737 0 5 0 95 1 7 0 0 257 1 539 2 146 1717 1 110 0 4 0 96 2 18 0 4 348 3 764 4 140 1472 3 1072 0 3 0 96 3 20 0 0 569 276 754 0 160 1937 1 323 0 4 0 96 4 0 0 10 284 9 613 3 169 1754 0 309 0 4 0 96 5 2718 0 116 308 19 664 2 152 1724 9 714 1 4 0 95 6 108 0 3 561 105 753 0 168 1730 14 199 0 4 0 96 7 743 0 5 450 102 540 2 128 1746 11 6590 2 5 0 93 March 4, 2026 at 01:14:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 116 2 0 2 0 556 0 1 0 99 1 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 34 1 0 0 0 1120 0 0 0 100 3 0 0 0 21 7 14 1 0 0 0 309 0 0 0 100 4 0 0 14 12 5 8 0 0 0 0 271 0 0 0 100 5 0 0 0 10 2 6 1 1 1 0 294 0 0 0 100 6 0 0 3 309 152 104 0 0 0 0 0 0 0 0 100 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 114 0 0 1 0 564 0 1 0 99 1 0 0 0 52 23 48 0 1 0 0 0 0 0 0 100 2 0 0 0 10 2 36 1 1 0 0 1117 0 0 0 100 3 0 0 0 19 7 14 0 0 0 0 309 0 0 0 100 4 0 0 14 12 5 8 0 0 0 0 269 0 0 0 100 5 0 0 0 12 2 6 0 1 1 0 294 0 0 0 100 6 0 0 3 270 130 68 0 1 0 0 0 0 0 0 100 7 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 104 120 0 2 1 0 566 0 1 0 99 1 0 0 0 119 52 114 0 1 0 0 28 0 0 0 100 2 0 0 0 14 3 42 0 1 0 0 1124 0 0 0 100 3 0 0 0 27 9 24 1 0 0 0 320 0 0 0 100 4 0 0 14 12 5 8 0 0 0 0 271 0 0 0 100 5 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 6 0 0 3 217 104 14 0 0 0 0 6 0 0 0 100 7 0 0 3 212 101 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:14:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 104 123 0 0 1 0 568 0 1 0 99 1 0 0 0 110 52 106 0 2 0 0 3 0 0 0 100 2 0 0 0 18 3 40 1 0 1 0 1121 0 0 0 100 3 0 0 0 28 9 20 0 0 1 0 321 0 0 0 100 4 0 0 14 23 9 20 0 0 1 0 282 0 0 0 100 5 0 0 0 17 9 4 0 0 1 0 294 0 0 0 100 6 0 0 3 214 103 12 0 0 1 0 28 0 0 0 100 7 0 0 3 213 102 9 0 1 1 0 4 0 0 0 100 March 4, 2026 at 01:14:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2125 110 132 2 0 0 0 573 0 1 0 99 1 20 0 0 113 52 114 0 1 0 0 5 0 0 0 100 2 0 0 0 12 3 36 1 0 0 0 1117 0 0 0 100 3 0 0 0 9 1 4 1 0 0 0 300 0 0 0 100 4 1 0 14 16 7 14 0 1 0 0 295 0 0 0 100 5 0 0 0 14 2 10 1 0 1 0 294 0 0 0 100 6 0 0 3 215 104 10 0 0 0 0 1 0 0 0 100 7 0 0 3 210 101 4 0 1 4 0 0 0 0 0 100 March 4, 2026 at 01:14:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 109 128 1 0 0 0 569 0 1 0 99 1 0 0 0 115 51 114 0 0 1 0 0 0 0 0 100 2 0 0 0 11 2 34 1 0 0 0 1112 0 0 0 100 3 0 0 0 7 1 4 0 1 0 0 300 0 0 0 100 4 0 0 14 12 5 6 0 0 0 0 267 0 0 0 100 5 0 0 0 12 2 10 0 1 2 0 296 0 0 0 100 6 0 0 3 211 103 6 0 0 0 0 1 0 0 0 100 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 109 128 0 0 3 0 578 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 34 1 0 1 0 1110 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 4 0 0 14 12 5 8 0 0 0 0 268 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 6 0 0 3 209 102 4 0 0 0 0 0 0 0 0 100 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2123 110 130 0 0 0 0 570 0 1 0 99 1 0 0 0 110 51 104 0 0 1 0 0 0 0 0 100 2 0 0 0 16 2 46 1 1 0 0 1111 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 4 0 0 14 10 4 6 0 0 0 0 267 0 0 0 100 5 0 0 0 13 4 10 0 1 0 0 297 0 0 0 100 6 0 0 3 209 102 4 0 0 0 0 0 0 0 0 100 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 110 130 2 0 0 0 574 0 1 0 99 1 0 0 0 108 51 106 0 1 0 0 3 0 0 0 100 2 0 0 0 14 2 40 1 0 1 0 1119 0 0 0 100 3 0 0 0 23 1 30 2 1 0 0 321 0 0 0 100 4 0 0 14 25 9 20 0 0 0 0 278 0 0 0 100 5 0 0 0 17 7 4 1 0 0 0 294 0 0 0 100 6 0 0 3 215 104 12 0 0 0 0 7 0 0 0 100 7 0 0 3 211 101 7 0 0 1 0 3 0 0 0 100 March 4, 2026 at 01:14:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 103 116 0 1 2 0 546 0 1 0 99 1 0 0 0 108 51 104 0 1 0 0 0 0 0 0 100 2 0 0 0 10 2 36 1 1 0 0 1111 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 4 0 0 14 13 5 10 0 1 0 0 272 0 0 0 100 5 0 0 0 14 3 12 0 0 8 0 296 0 0 0 100 6 0 0 3 220 107 12 0 1 2 0 3 0 0 0 100 7 0 0 3 211 102 6 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:14:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 118 0 0 4 0 557 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 34 1 0 0 0 1110 0 0 0 100 3 0 0 0 9 1 4 0 1 0 0 300 0 0 0 100 4 0 0 14 29 11 30 0 1 0 0 277 0 0 0 100 5 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 6 0 0 3 209 102 4 0 0 0 0 0 0 0 0 100 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 103 114 1 0 5 0 564 0 1 0 99 1 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 12 2 36 1 0 1 0 1113 0 0 0 100 3 0 0 0 7 1 4 0 1 0 0 300 0 0 0 100 4 0 0 14 26 11 22 0 1 0 0 277 0 0 0 100 5 0 0 0 17 3 18 0 1 2 0 296 0 0 0 100 6 0 0 3 209 102 4 0 0 0 0 0 0 0 0 100 7 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 7 2546 103 1011 9 39 15 0 2730 2 2 0 96 1 2 0 0 521 50 925 8 45 4 0 1975 1 1 0 97 2 171 0 0 885 6 2214 3 22 6 0 10744 3 2 0 95 3 3 0 0 219 2 446 7 21 6 0 3584 6 1 0 93 4 78 0 14 173 11 352 3 22 12 0 2004 1 1 0 98 5 99 0 0 139 3 288 4 20 7 0 1113 1 1 0 99 6 40 0 3 563 103 766 9 37 4 0 1950 1 1 0 97 7 226 0 3 446 101 473 4 15 4 0 861 1 1 0 98 March 4, 2026 at 01:14:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 7 6471 111 9086 60 365 105 0 23939 23 14 0 63 1 9 0 14 4577 13 9216 82 440 94 0 23707 19 13 0 69 2 21 0 0 3684 13 7508 41 257 111 0 20103 17 10 0 72 3 12 0 0 4432 23 9141 63 331 81 0 19640 15 11 0 74 4 5 0 0 3080 20 6312 42 278 93 0 15912 14 9 0 77 5 5 0 0 2746 26 5620 20 139 83 0 12959 12 7 0 81 6 3 0 3 3294 113 6502 42 243 85 0 16199 14 9 0 77 7 11 0 3 2515 109 4955 32 129 79 0 13057 12 7 0 81 March 4, 2026 at 01:14:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 6637 113 9346 110 576 651 0 24686 23 15 0 62 1 7 0 14 4867 9 10047 92 601 777 0 23244 19 14 0 67 2 18 0 0 3751 11 7624 75 395 599 0 18332 16 11 0 73 3 15 0 0 4287 142 8794 85 503 748 0 20255 17 12 0 70 4 10 0 0 3038 15 6422 57 404 715 0 14913 13 10 0 77 5 25 0 7 2399 12 5025 37 269 646 0 12819 11 8 0 80 6 13 0 2 3536 123 7074 53 384 664 0 16096 14 10 0 76 7 8 0 4 2808 115 5533 57 252 678 0 14843 12 9 0 79 March 4, 2026 at 01:14:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 5872 106 8000 45 349 119 0 21372 19 12 0 69 1 4 0 14 3799 14 7664 66 384 71 0 20238 16 11 0 73 2 8 0 2 3345 16 6802 49 259 75 0 15512 14 9 0 78 3 23 0 0 3351 8 7004 59 275 69 0 15600 13 8 0 79 4 12 0 0 2233 12 4454 49 237 93 0 11337 11 6 0 83 5 4 0 7 1965 15 4038 15 139 57 0 10966 9 6 0 85 6 5 0 3 2748 110 5478 27 220 79 0 13092 11 7 0 81 7 3 0 3 2164 123 4127 25 125 57 0 11457 8 6 0 86 March 4, 2026 at 01:14:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 109 0 1 0 0 0 0 1 0 99 1 0 0 14 9 2 8 0 1 1 0 562 0 0 0 100 2 0 0 0 13 2 6 1 1 1 0 294 0 0 0 100 3 0 0 0 12 2 4 1 0 0 0 300 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 7 24 9 20 1 1 0 0 269 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 3 321 155 148 1 1 1 0 1122 0 0 0 100 March 4, 2026 at 01:14:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 119 159 0 3 0 0 0 0 1 0 99 1 0 0 14 9 2 8 1 1 1 0 565 0 0 0 100 2 0 0 0 15 3 8 0 0 0 0 298 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 7 1 2 0 1 0 0 1 0 0 0 100 5 0 0 7 31 13 28 0 0 0 0 277 0 0 0 100 6 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 7 0 0 3 280 136 100 1 0 0 0 1123 0 0 0 100 March 4, 2026 at 01:14:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 150 212 0 0 0 0 0 0 1 0 99 1 0 0 14 9 2 6 0 0 6 0 569 0 0 0 100 2 1 0 0 17 4 16 0 0 5 0 307 0 0 0 100 3 0 0 0 11 2 6 0 1 0 0 299 0 0 0 100 4 0 0 0 9 1 6 0 0 0 0 10 0 0 0 100 5 0 0 7 37 16 27 1 1 0 0 279 0 0 0 100 6 0 0 3 210 102 4 0 0 0 0 3 0 0 0 100 7 0 0 3 220 105 45 1 1 0 0 1128 0 0 0 100 March 4, 2026 at 01:14:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2328 134 575 1 64 511 0 2 0 2 0 98 1 0 0 14 161 18 302 0 61 513 0 566 0 1 0 99 2 0 0 0 106 2 205 0 42 406 0 294 0 1 0 99 3 0 0 0 229 119 279 1 57 455 0 300 0 1 0 98 4 0 0 0 106 1 205 1 46 479 0 0 0 1 0 99 5 0 0 7 133 9 276 1 53 454 0 270 0 1 0 99 6 0 0 3 314 103 246 1 65 512 0 2 0 1 0 99 7 0 0 3 308 105 248 2 44 442 0 1120 0 2 0 98 March 4, 2026 at 01:14:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 142 1 1 1 0 1119 0 1 0 99 1 0 0 14 114 53 110 0 1 4 0 564 0 0 0 100 2 0 0 0 19 3 18 1 2 3 0 294 0 0 0 100 3 0 0 0 16 4 10 1 1 1 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 5 0 0 7 24 10 23 1 2 0 0 269 0 0 0 100 6 0 0 3 210 103 4 0 0 1 0 0 0 0 0 100 7 0 0 3 215 105 8 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:14:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 140 0 0 0 0 1120 0 1 0 99 1 0 0 14 110 52 106 1 0 3 0 569 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 295 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 6 1 2 0 1 0 0 0 0 0 0 100 5 0 0 7 22 9 18 0 0 0 0 269 0 0 0 100 6 0 0 3 210 103 4 0 0 0 0 2 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2174 101 240 9 28 6 0 1961 3 2 0 96 1 6 0 14 252 54 386 67 32 18 0 1401 3 1 0 96 2 0 0 0 83 3 110 16 20 8 0 610 2 0 0 97 3 0 0 0 66 3 107 16 19 2 0 776 6 0 0 94 4 1333 0 0 96 1 174 36 22 4 1 886 4 1 0 95 5 4 0 7 96 11 164 38 24 7 0 1139 5 0 0 95 6 25 0 129 278 104 226 8 25 3 0 804 4 0 0 95 7 539 0 3 284 104 240 19 17 5 0 924 4 1 0 95 March 4, 2026 at 01:14:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2599 107 877 39 133 39 0 4064 23 3 0 74 1 4 0 14 601 18 1050 70 159 41 0 5435 17 2 0 81 2 5 0 7 491 16 748 13 124 32 0 3885 16 2 0 82 3 0 0 0 455 20 692 34 129 30 0 3845 27 2 0 71 4 4 0 0 417 17 601 20 120 25 0 3649 30 2 0 68 5 0 0 0 456 18 698 22 105 25 0 3549 20 2 0 79 6 0 0 395 577 108 672 28 127 31 0 3758 28 2 0 70 7 0 0 3 632 106 711 25 108 22 0 3385 12 2 0 86 March 4, 2026 at 01:14:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2571 109 781 35 135 21 0 4514 26 3 0 71 1 0 0 0 587 11 1056 91 174 59 0 4523 17 2 0 81 2 0 0 14 459 4 737 21 117 31 0 3635 21 2 0 77 3 0 0 7 487 6 753 42 137 26 0 4494 24 2 0 74 4 0 0 0 473 11 760 27 148 20 0 4205 21 2 0 78 5 0 0 0 413 7 637 24 109 32 0 3665 23 2 0 76 6 0 0 325 649 118 826 39 144 23 0 3696 25 2 0 73 7 0 0 3 609 118 630 15 93 20 0 2782 18 1 0 81 March 4, 2026 at 01:14:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2429 108 557 25 91 15 0 2088 16 2 0 82 1 0 0 0 367 16 591 41 100 21 0 3682 12 1 0 86 2 0 0 14 254 3 348 20 70 19 0 1947 20 1 0 79 3 3 0 7 354 5 569 26 89 34 0 3275 17 1 0 82 4 0 0 0 301 7 433 19 84 10 0 1987 20 1 0 79 5 0 0 0 333 24 473 20 63 9 0 2797 15 1 0 84 6 0 0 311 442 106 410 16 79 11 0 2302 13 1 0 85 7 0 0 3 502 111 459 13 66 30 0 2350 4 1 0 95 March 4, 2026 at 01:14:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2114 104 122 0 2 0 0 17 0 1 0 99 1 0 0 0 18 4 44 1 1 2 0 1417 0 0 0 100 2 2 0 14 11 1 8 0 1 0 0 268 0 0 0 100 3 2 0 7 25 5 32 0 2 0 0 569 0 0 0 100 4 0 0 0 18 5 12 1 0 0 0 23 0 0 0 100 5 1 0 0 116 53 110 0 0 0 0 308 0 0 0 100 6 1 0 3 209 101 6 0 1 0 0 7 0 0 0 100 7 0 0 3 210 102 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:14:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 10 2 36 0 0 9 0 1428 0 0 0 100 2 0 0 14 7 1 4 0 0 0 0 265 0 0 0 100 3 0 0 7 14 5 10 0 0 6 0 553 0 0 0 100 4 0 0 0 22 8 18 1 1 0 0 10 0 0 0 100 5 0 0 0 114 54 108 0 0 0 0 305 0 0 0 100 6 0 0 3 208 101 4 0 1 0 0 14 0 0 0 100 7 0 0 3 213 104 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:14:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 103 118 0 2 0 0 12 0 1 0 99 1 0 0 0 22 2 48 2 4 7 0 1430 0 0 0 100 2 1 0 14 17 3 16 0 0 0 0 280 0 0 0 100 3 0 0 7 22 5 20 2 1 2 0 561 0 0 0 100 4 0 0 0 63 26 62 0 2 0 0 23 0 0 0 100 5 0 0 0 85 42 72 1 1 0 0 304 0 0 0 100 6 0 0 3 207 101 2 0 1 0 0 3 0 0 0 100 7 0 0 3 214 102 11 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:14:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 10 2559 100 1006 36 104 79 0 3113 9 3 0 88 1 1 0 11 210 10 377 20 38 138 0 4488 8 2 0 90 2 2 0 28 363 4 691 17 76 129 1 2647 4 2 0 95 3 0 0 7 350 6 654 22 65 159 0 3414 6 2 0 93 4 3 0 0 465 45 811 19 73 111 0 3459 7 2 0 91 5 13 0 0 117 6 153 12 18 116 0 2918 5 2 0 93 6 62 0 171 334 102 251 13 30 179 1 3876 9 2 0 89 7 0 0 3 519 104 581 20 44 174 0 2325 4 1 0 95 March 4, 2026 at 01:14:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 105 0 1 0 0 0 0 1 0 99 1 0 0 0 16 2 38 2 0 6 0 1335 0 0 0 100 2 3 0 21 11 1 9 0 2 0 0 266 0 0 0 100 3 0 0 7 23 6 18 0 2 3 0 556 0 0 0 100 4 0 0 0 109 51 102 0 1 0 0 0 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 300 0 0 0 100 6 0 0 3 221 108 12 0 0 0 0 9 0 0 0 100 7 0 0 3 212 102 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:14:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2102 100 105 0 1 0 0 0 0 1 0 99 1 0 0 0 26 2 34 1 0 1 0 1335 0 0 0 99 2 0 0 14 27 1 8 0 1 0 0 266 0 0 0 100 3 0 0 7 41 5 22 0 1 0 0 557 0 0 0 100 4 0 0 0 125 52 102 0 0 0 0 0 0 0 0 100 5 0 0 0 31 3 8 0 0 0 0 300 0 0 0 100 6 0 0 3 243 108 24 0 1 0 0 10 0 0 0 100 7 0 0 3 229 104 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:14:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 11 2 34 0 0 2 0 1333 0 0 0 100 2 0 0 14 15 4 172 1 0 0 0 599 0 0 0 100 3 0 0 7 27 6 20 2 0 0 0 557 0 0 0 100 4 0 0 0 113 54 106 0 0 0 0 4 0 0 0 100 5 0 0 0 15 4 8 1 0 0 0 300 0 0 0 100 6 0 0 3 226 108 26 0 2 0 0 16 0 0 0 100 7 0 0 3 216 103 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:14:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 126 0 6 1 0 63 0 1 0 99 1 0 0 0 34 6 66 1 3 4 0 1381 0 0 0 99 2 0 0 14 27 4 26 0 2 2 0 1102 0 0 0 99 3 0 0 7 39 8 40 0 5 6 0 1409 0 0 0 99 4 0 0 0 118 54 118 0 3 0 0 127 0 0 0 100 5 0 0 0 26 9 16 0 2 1 0 346 0 0 0 100 6 0 0 3 227 108 32 0 4 2 0 60 0 0 0 100 7 1 0 3 221 104 19 0 1 1 0 28 0 0 0 100 March 4, 2026 at 01:14:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2441 100 881 1 170 1827 0 0 0 5 0 95 1 0 0 0 258 2 592 3 162 1758 0 479 0 4 0 96 2 0 0 14 265 12 612 1 151 1731 0 267 0 4 0 96 3 0 0 7 536 258 680 0 153 1953 0 565 0 5 0 95 4 0 0 0 296 32 645 2 162 1916 0 853 0 4 0 96 5 0 0 0 333 3 705 0 129 1672 0 300 0 4 0 96 6 0 0 3 512 113 687 0 175 1757 0 1 0 4 0 96 7 0 0 3 434 103 499 2 126 1518 0 0 0 4 0 96 March 4, 2026 at 01:14:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 14 1 12 0 1 2 0 303 0 0 0 100 2 0 0 14 108 51 106 0 0 0 0 267 0 0 0 100 3 0 0 7 41 14 36 0 0 2 0 568 0 0 0 100 4 0 0 0 10 3 34 0 0 0 0 1032 0 0 0 100 5 0 0 0 13 3 10 0 2 0 0 300 0 0 0 100 6 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 7 0 0 3 213 104 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:14:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 100 0 0 2145 100 146 0 14 6 9 120 0 1 0 99 1 12 0 0 50 1 50 0 11 7 5 391 0 0 0 100 2 718 0 14 136 48 130 2 6 7 3 6799 2 1 0 97 3 901 0 120 64 15 91 3 11 10 7 750 0 1 0 99 4 1871 0 3 42 3 76 3 7 8 11 1391 0 1 0 99 5 39 0 0 55 3 60 1 9 6 8 426 0 0 0 100 6 13 0 3 233 102 22 0 6 5 2 63 0 0 0 100 7 8 0 3 232 102 24 0 4 3 4 67 0 0 0 100 March 4, 2026 at 01:14:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 98 0 2 0 0 0 0 1 0 99 1 0 0 0 15 2 14 0 1 2 0 310 0 0 0 100 2 0 0 14 16 2 24 0 1 0 0 278 0 0 0 100 3 0 0 7 140 62 138 1 0 2 0 588 0 0 0 100 4 0 0 0 13 3 36 1 0 0 0 1143 0 0 0 100 5 0 0 0 20 3 12 0 0 0 0 300 0 0 0 100 6 0 0 3 210 102 6 0 0 0 0 4 0 0 0 100 7 0 0 3 213 104 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:14:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 122 0 2 0 0 5 0 1 0 99 1 0 0 0 10 1 8 1 0 1 0 306 0 0 0 100 2 0 0 14 22 3 28 0 0 1 0 283 0 0 0 100 3 0 0 7 129 60 122 0 0 2 0 576 0 0 0 100 4 0 0 0 12 3 36 1 1 0 0 1121 0 0 0 100 5 0 0 0 21 11 6 0 0 0 0 300 0 0 0 100 6 0 0 3 212 103 8 0 0 0 0 14 0 0 0 100 7 0 0 3 216 102 14 0 1 0 0 7 0 0 0 100 March 4, 2026 at 01:14:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 110 0 0 2 0 0 0 1 0 99 1 0 0 0 8 1 4 0 0 5 0 297 0 0 0 100 2 0 0 14 9 2 8 0 0 0 0 266 0 0 0 100 3 20 0 7 119 56 116 0 1 5 0 564 0 0 0 100 4 0 0 0 14 3 40 1 0 3 0 1116 0 0 0 100 5 1 0 0 15 4 10 1 0 0 0 305 0 0 0 100 6 0 0 3 220 108 14 0 0 0 0 9 0 0 0 100 7 0 0 3 213 104 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:14:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 3 0 300 0 0 0 100 2 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 3 0 0 7 119 54 118 2 1 2 0 555 0 0 0 100 4 0 0 0 11 3 34 1 0 0 0 1111 0 0 0 100 5 0 0 0 12 3 6 1 0 0 0 300 0 0 0 100 6 0 0 3 220 108 14 0 0 0 0 9 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 8 1 4 0 0 5 0 301 0 0 0 100 2 0 0 14 8 2 6 0 0 0 0 267 0 0 0 100 3 0 0 7 116 55 112 0 1 1 0 558 0 0 0 100 4 0 0 0 16 3 44 1 1 0 0 1111 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 6 0 0 3 220 108 14 0 0 0 0 9 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:14:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 8 1 2 1 0 3 0 299 0 0 0 100 2 0 0 14 8 2 6 0 0 0 0 267 0 0 0 100 3 0 0 7 112 53 108 0 0 4 0 554 0 0 0 100 4 0 0 0 10 3 34 0 0 0 0 1111 0 0 0 100 5 3 0 0 13 4 8 0 0 0 0 305 0 0 0 100 6 0 0 3 226 110 20 1 1 0 0 22 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 118 0 1 1 0 5 0 1 0 99 1 0 0 0 13 3 8 0 0 4 0 328 0 0 0 100 2 0 0 14 17 4 18 0 0 1 0 280 0 0 0 100 3 0 0 7 122 58 122 0 1 0 0 563 0 0 0 100 4 0 0 0 18 5 40 1 0 2 0 1115 0 0 0 100 5 0 0 0 25 10 16 0 1 2 0 300 0 0 0 100 6 0 0 3 223 109 16 0 0 1 0 15 0 0 0 100 7 0 0 3 221 104 18 0 1 2 0 33 0 0 0 100 March 4, 2026 at 01:14:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 112 0 0 3 0 0 0 1 0 99 1 0 0 0 8 1 4 0 0 1 0 279 0 0 0 100 2 0 0 14 10 2 10 0 0 0 0 267 0 0 0 100 3 0 0 7 75 33 68 2 0 0 0 568 0 0 0 100 4 0 0 0 73 32 100 1 1 3 0 1111 0 0 0 100 5 0 0 0 14 3 8 1 0 0 0 300 0 0 0 100 6 0 0 3 214 103 12 0 1 0 0 1 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:14:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 102 0 4 0 0 0 0 1 0 99 1 0 0 0 14 1 6 0 2 2 0 303 0 0 0 100 2 0 0 14 8 1 6 0 1 0 0 266 0 0 0 100 3 0 0 7 27 11 22 1 0 0 0 567 0 0 0 100 4 0 0 0 83 39 104 1 0 0 0 1110 0 0 0 100 5 0 0 0 42 17 40 0 3 0 0 300 0 0 0 100 6 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 7 0 0 3 220 104 12 0 2 0 0 3 0 0 0 100 March 4, 2026 at 01:14:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 110 0 1 0 0 0 0 1 0 99 1 0 0 0 8 1 4 0 1 2 0 296 0 0 0 100 2 0 0 14 8 2 6 0 0 0 0 267 0 0 0 100 3 0 0 7 23 9 18 0 0 4 0 563 0 0 0 100 4 0 0 0 11 3 34 1 0 0 0 1112 0 0 0 100 5 0 0 0 111 53 106 0 0 0 0 300 0 0 0 100 6 0 0 3 210 102 4 0 1 0 0 0 0 0 0 100 7 0 0 3 213 101 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:14:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 2356 100 592 5 21 3 0 1121 1 1 0 98 1 202 0 0 213 2 431 9 29 7 0 1735 1 1 0 98 2 9 0 14 206 1 399 3 14 1 0 718 1 0 0 99 3 10 0 7 477 11 1144 1 22 7 0 4679 2 1 0 97 4 15 0 0 77 3 153 7 13 5 0 3476 5 1 0 94 5 100 0 0 160 52 223 1 13 9 0 1775 1 1 0 98 6 23 0 3 675 104 1357 0 19 5 0 6627 2 1 0 97 7 221 0 3 367 103 308 1 8 1 0 556 0 0 0 99 March 4, 2026 at 01:14:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 6456 102 9307 67 359 188 0 26477 24 15 0 61 1 17 0 0 5341 12 11037 78 419 153 0 24667 21 14 0 65 2 17 0 0 4051 11 8171 59 283 104 0 21340 19 12 0 70 3 16 0 21 4166 18 8540 81 330 96 0 21129 17 11 0 73 4 11 0 0 3203 18 6446 45 290 123 0 15391 13 8 0 79 5 3 0 0 2074 23 4187 24 165 123 0 11469 10 6 0 84 6 9 0 3 3270 125 6483 42 244 89 0 14593 13 8 0 79 7 24 0 3 2614 110 5004 18 148 71 0 12153 10 7 0 84 March 4, 2026 at 01:14:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 7160 105 10938 100 572 737 0 27018 24 17 0 59 1 13 0 0 5010 10 10274 90 619 621 0 27241 22 15 0 63 2 4 0 4 4105 8 8618 106 466 718 0 20463 18 12 0 69 3 9 0 7 4452 173 9087 80 529 755 0 21563 17 12 0 71 4 4 0 14 2507 16 5030 50 375 698 0 12917 12 8 0 80 5 1 0 0 2084 7 4438 31 279 700 1 9939 10 7 0 83 6 5 0 3 3411 122 6902 35 391 745 1 16215 13 10 0 77 7 5 0 3 2748 116 5369 42 244 690 0 10954 9 7 0 84 March 4, 2026 at 01:14:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 6020 113 8286 57 356 170 0 21686 19 13 0 68 1 4 0 0 3987 9 8087 72 353 121 0 19976 17 11 0 72 2 8 0 0 2975 7 5819 36 218 70 0 13050 11 7 0 82 3 7 0 7 3832 10 8006 48 269 111 0 19641 14 10 0 76 4 3 0 14 2256 22 4657 33 207 105 0 12357 11 7 0 82 5 7 0 0 1630 14 3419 19 126 105 0 11534 11 6 0 83 6 3 0 3 2983 113 5966 41 221 101 0 15620 14 8 0 78 7 2 0 3 2300 111 4318 15 109 81 0 8056 7 5 0 89 March 4, 2026 at 01:14:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 192 0 4 1 0 294 0 1 0 99 1 0 0 0 27 1 18 0 3 0 0 303 0 0 0 100 2 0 0 0 14 1 8 0 1 0 0 0 0 0 0 100 3 0 0 7 19 6 46 0 1 0 0 1682 0 1 0 99 4 0 0 14 21 9 16 0 0 0 0 272 0 0 0 100 5 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 6 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:14:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 151 208 0 1 4 0 294 0 1 0 99 1 0 0 0 12 2 8 0 2 6 0 302 0 0 0 100 2 0 0 0 12 1 6 0 0 0 0 4 0 0 0 100 3 0 0 7 24 6 48 3 2 1 0 1683 0 1 0 99 4 0 0 14 33 12 30 1 1 0 0 277 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 3 214 105 8 0 0 0 0 2 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 151 214 1 0 2 0 297 0 1 0 99 1 0 0 0 30 10 20 1 1 5 0 317 0 0 0 100 2 0 0 0 13 1 8 0 0 1 0 8 0 0 0 100 3 0 0 7 33 12 60 1 1 1 0 1693 0 1 0 99 4 0 0 14 17 5 12 0 0 1 0 273 0 0 0 100 5 0 0 0 26 9 22 0 1 1 0 12 0 0 0 100 6 0 0 7 215 103 10 0 1 0 0 7 0 0 0 100 7 0 0 7 216 103 11 0 1 1 0 5 0 0 0 100 March 4, 2026 at 01:14:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2212 123 332 1 40 426 0 312 0 2 0 98 1 0 0 0 262 30 465 2 51 471 1 311 0 1 0 99 2 0 0 0 93 0 197 1 46 571 0 0 0 1 0 99 3 0 0 7 241 111 299 2 57 455 2 1686 0 2 0 98 4 0 0 14 112 3 235 1 50 522 0 266 0 1 0 99 5 0 0 0 87 1 169 3 42 454 0 0 0 1 0 99 6 0 0 3 301 104 194 1 43 434 0 1 0 1 0 99 7 0 0 3 300 103 191 1 32 403 0 1 0 1 0 99 March 4, 2026 at 01:14:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 112 0 0 6 0 294 0 1 0 99 1 0 0 0 109 51 104 0 0 4 0 300 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 34 13 60 1 0 1 0 1691 0 0 0 99 4 0 0 14 8 3 6 0 1 0 0 266 0 0 0 100 5 0 0 0 10 0 4 0 2 0 0 0 0 0 0 100 6 0 0 3 215 103 14 0 1 0 0 0 0 0 0 100 7 0 0 3 213 104 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:14:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 0 0 294 0 1 0 99 1 0 0 0 109 51 104 0 0 0 0 301 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 33 13 60 3 1 0 0 1693 0 1 0 99 4 0 0 14 8 3 4 0 0 0 0 266 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 216 103 12 0 0 0 0 0 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:14:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2172 103 230 31 18 2 0 936 2 1 0 97 1 6 0 0 162 48 230 13 29 9 0 915 2 0 0 97 2 1336 0 0 44 0 107 12 19 8 1 658 4 1 0 96 3 4 0 7 112 14 272 33 31 5 0 2453 4 1 0 95 4 21 0 14 49 3 70 2 19 1 0 797 3 0 0 97 5 0 0 0 51 1 110 3 19 4 0 484 3 0 0 96 6 522 0 73 236 105 146 7 18 10 0 753 4 1 0 95 7 15 0 3 252 104 61 3 12 0 0 244 3 0 0 97 March 4, 2026 at 01:15:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2577 103 783 29 107 22 0 3763 23 3 0 75 1 1 0 0 412 8 659 41 116 20 0 3725 32 2 0 66 2 0 0 0 431 3 680 29 112 22 0 3222 29 2 0 70 3 2 0 0 383 14 598 25 124 18 0 4047 27 2 0 71 4 10 0 14 541 24 937 23 143 14 0 5677 18 2 0 80 5 1 0 0 408 16 625 21 113 26 0 3412 18 1 0 80 6 3 0 206 602 112 696 25 124 8 0 4777 15 2 0 83 7 2 0 3 630 110 743 15 99 27 0 3619 11 2 0 88 March 4, 2026 at 01:15:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2546 110 749 28 130 17 0 3789 23 3 0 74 1 0 0 0 503 12 825 31 147 31 0 4493 27 2 0 71 2 0 0 0 476 8 784 27 123 18 0 3973 22 2 0 76 3 0 0 0 395 8 632 34 123 14 0 4207 21 2 0 77 4 0 0 14 480 10 819 20 119 14 0 5338 21 2 0 77 5 0 0 0 390 9 615 25 88 29 0 3359 15 2 0 83 6 0 0 220 580 109 684 27 120 12 0 3731 27 2 0 72 7 0 0 3 574 115 619 13 83 18 0 3240 17 2 0 81 March 4, 2026 at 01:15:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2410 109 539 21 79 17 0 2766 15 2 0 83 1 1 0 0 360 23 523 31 102 14 0 2752 23 1 0 76 2 0 0 0 367 12 589 11 80 13 0 3036 12 1 0 87 3 0 0 0 247 6 346 26 79 8 0 2203 21 1 0 78 4 0 0 14 282 10 475 28 88 14 0 4074 17 1 0 82 5 3 0 0 272 5 442 12 70 10 0 2186 12 1 0 87 6 0 0 150 437 105 422 22 70 13 0 2755 18 1 0 81 7 0 0 3 495 109 475 8 64 12 0 2094 9 1 0 90 March 4, 2026 at 01:15:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 2 2151 102 142 1 11 6 5 653 0 1 0 99 1 7 0 0 145 55 133 0 7 9 1 366 0 0 0 100 2 3440 0 113 29 0 68 4 9 7 13 6884 3 2 0 96 3 100 0 0 61 4 84 0 17 10 12 242 0 0 0 100 4 55 0 14 56 5 99 1 14 6 5 1550 0 0 0 99 5 44 0 0 50 1 70 0 6 2 13 131 0 0 0 100 6 7 0 10 237 104 28 0 6 6 0 319 0 0 0 100 7 13 0 3 247 103 40 0 8 4 3 42 0 0 0 100 March 4, 2026 at 01:15:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 116 0 1 1 0 595 0 1 0 99 1 0 0 0 116 54 112 0 0 1 0 308 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 3 0 0 0 25 7 26 0 1 0 0 10 0 0 0 100 4 0 0 14 16 6 42 1 1 0 0 1483 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 212 104 8 0 0 0 0 261 0 0 0 100 7 0 0 3 212 102 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:15:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 117 1 1 2 0 595 0 1 0 99 1 0 0 0 117 54 110 0 0 3 0 303 0 0 0 100 2 0 0 0 9 2 4 0 1 0 0 0 0 0 0 100 3 0 0 0 26 9 18 0 1 1 0 13 0 0 0 100 4 0 0 14 25 9 48 1 0 2 0 1484 0 0 0 100 5 0 0 0 15 6 6 0 0 1 0 8 0 0 0 100 6 0 0 10 211 103 8 0 0 1 0 263 0 0 0 100 7 1 0 3 221 104 20 0 2 1 0 35 0 0 0 100 March 4, 2026 at 01:15:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 24 2160 103 198 4 24 974 11 774 0 2 0 98 1 31 0 23 139 43 164 3 18 1165 2 408 0 1 0 99 2 26 0 8 89 11 138 4 35 57 6 201 0 0 0 100 3 32 0 25 75 14 110 2 23 133 5 160 0 0 0 99 4 1129 0 28 89 5 182 3 33 122 10 1823 1 4 0 96 5 20 0 24 54 10 81 0 13 823 8 95 0 1 0 99 6 46 0 10 252 104 72 5 15 1135 6 368 0 1 0 99 7 894 0 9 267 102 151 8 40 71 30 414 1 0 0 98 March 4, 2026 at 01:15:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 56 2115 102 127 1 6 10 1 618 0 2 0 98 1 3 0 0 39 4 38 0 2 12 1 315 0 1 0 99 2 5 0 9 124 51 116 1 2 0 2 12 0 0 0 100 3 1 0 0 64 20 49 1 1 1 1 34 0 0 0 100 4 10 0 14 31 5 53 1 3 4 2 1099 0 0 0 100 5 0 0 1 24 1 14 1 5 0 1 16 0 1 0 99 6 12 0 10 230 103 24 0 1 3 3 309 0 0 0 100 7 13 0 10 233 104 31 1 2 1 3 36 0 0 0 100 March 4, 2026 at 01:15:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2175 102 112 0 2 2 0 594 0 2 0 98 1 0 0 455 26 2 22 0 1 5 0 300 0 1 0 99 2 0 0 0 139 29 60 0 0 0 0 1 0 0 0 100 3 0 0 7 165 42 90 0 2 0 0 20 0 0 0 100 4 0 0 14 91 5 42 1 2 0 0 1011 0 0 0 100 5 0 0 0 78 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 283 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 284 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 1 3 0 594 0 1 0 99 1 0 0 0 11 2 4 0 0 3 0 301 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 147 70 144 0 1 0 0 20 0 0 0 100 4 0 0 14 13 5 40 0 1 0 0 1007 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 10 215 103 16 0 1 0 0 259 0 0 0 100 7 0 0 3 213 103 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 120 2 1 3 0 603 0 1 0 99 1 0 0 0 11 2 4 1 0 2 0 304 0 0 0 100 2 0 0 0 15 3 10 0 0 0 0 7 0 0 0 100 3 0 0 0 149 70 146 0 0 0 0 28 0 0 0 100 4 0 0 14 13 5 40 1 1 0 0 1009 0 0 0 100 5 0 0 0 11 6 0 0 0 0 0 0 0 0 0 100 6 0 0 10 212 103 8 1 0 0 0 259 0 0 0 100 7 0 0 3 220 102 21 0 1 1 0 1 0 0 0 100 March 4, 2026 at 01:15:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 116 1 0 1 0 598 0 1 0 99 1 0 0 0 10 2 4 0 0 4 0 296 0 0 0 100 2 0 0 0 10 1 6 0 0 0 0 4 0 0 0 100 3 0 0 0 148 71 144 0 0 0 0 21 0 0 0 100 4 0 0 14 16 5 44 1 1 0 0 1010 0 0 0 100 5 0 0 0 10 3 4 0 1 0 0 0 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 214 103 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 103 126 0 1 3 0 595 0 1 0 99 1 0 0 0 9 2 4 0 0 3 0 301 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 4 0 0 14 12 5 38 0 0 0 0 1009 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 213 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 0 0 594 0 1 0 99 1 0 0 0 14 2 14 0 1 5 0 303 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 148 70 144 0 0 0 0 20 0 0 0 100 4 0 0 14 13 5 38 1 0 0 0 1007 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 213 103 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 112 1 0 3 0 595 0 1 0 99 1 0 0 0 10 2 4 1 0 3 0 299 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 145 70 142 0 1 0 0 20 0 0 0 100 4 0 0 14 14 5 38 1 0 0 0 1008 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 5 0 0 0 100 6 0 0 10 214 104 10 1 1 0 0 271 0 0 0 100 7 0 0 3 211 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 124 1 1 1 0 600 0 1 0 99 1 0 0 0 16 4 8 0 0 3 0 299 0 0 0 100 2 0 0 0 20 2 22 0 1 1 0 12 0 0 0 100 3 0 0 0 150 71 144 0 1 1 0 28 0 0 0 100 4 0 0 14 18 7 40 1 0 2 0 1009 0 0 0 100 5 0 0 0 16 6 0 0 0 1 0 0 0 0 0 100 6 0 0 14 211 103 6 0 0 1 0 259 0 0 0 100 7 0 0 7 218 103 12 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:15:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 114 0 0 1 0 595 0 1 0 99 1 0 0 0 9 2 4 0 0 2 0 305 0 0 0 100 2 0 0 1 13 2 8 0 0 1 0 1 0 0 0 100 3 0 0 0 154 71 156 0 1 0 0 20 0 0 0 100 4 0 0 14 15 5 42 0 0 0 0 1008 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 212 104 8 0 0 0 0 260 0 0 0 100 7 0 0 3 211 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 98 0 1 2 0 594 0 1 0 99 1 0 0 0 19 2 16 0 3 4 0 296 0 0 0 100 2 0 0 0 14 1 10 0 1 0 0 0 0 0 0 100 3 0 0 0 146 70 140 0 0 0 0 20 0 0 0 100 4 0 0 14 13 5 38 1 0 0 0 1007 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 215 104 8 0 1 0 0 3 0 0 0 100 March 4, 2026 at 01:15:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 92 1 2 3 0 594 0 1 0 99 1 0 0 0 25 2 20 0 3 3 0 299 0 0 0 100 2 0 0 0 14 1 8 0 0 0 0 0 0 0 0 100 3 0 0 0 150 70 144 0 0 0 0 20 0 0 0 100 4 0 0 14 18 5 48 1 1 0 0 1009 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 212 103 8 1 1 0 0 259 0 0 0 100 7 0 0 3 211 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 100 1 3 0 0 594 0 1 0 99 1 0 0 0 21 2 12 0 0 2 0 300 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 4 0 0 14 15 5 42 1 1 0 0 1008 0 0 0 100 5 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 6 0 0 10 216 104 10 0 2 0 0 259 0 0 0 100 7 0 0 3 213 103 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 120 0 0 0 0 600 0 1 0 99 1 0 0 0 10 2 4 1 0 4 0 299 0 0 0 100 2 0 0 0 17 4 16 0 0 0 0 15 0 0 0 100 3 2 0 0 148 70 144 1 0 0 0 25 0 0 0 100 4 0 0 14 13 5 38 1 0 1 0 1007 0 0 0 100 5 0 0 0 12 5 0 0 0 0 0 0 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 214 102 9 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 112 0 0 3 0 593 0 1 0 99 1 0 0 0 10 2 4 0 0 3 0 314 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 150 71 146 0 0 0 0 20 0 0 0 100 4 0 0 14 14 5 44 0 1 0 0 1008 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 10 215 103 16 0 1 0 0 259 0 0 0 100 7 0 0 3 213 103 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 114 1 0 0 0 595 0 1 0 99 1 0 0 0 12 3 7 0 1 1 0 287 0 0 0 100 2 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 3 0 0 0 147 71 142 0 0 1 0 19 0 0 0 100 4 0 0 14 15 6 38 1 0 0 0 1009 0 0 0 100 5 0 0 0 7 1 5 0 2 0 0 0 0 0 0 100 6 0 0 10 215 104 10 1 0 1 0 259 0 0 0 100 7 0 0 3 218 103 16 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:15:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 1 0 1 0 593 0 1 0 99 1 0 0 0 9 2 6 0 1 0 0 302 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 4 0 0 14 14 5 38 1 0 1 0 1008 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 211 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 213 103 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 110 0 3 0 0 593 0 1 0 99 1 0 0 0 14 2 14 0 1 4 0 298 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 3 0 0 0 147 70 142 0 0 0 0 20 0 0 0 100 4 0 0 14 12 5 38 0 0 0 0 1008 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 212 104 8 0 0 0 0 260 0 0 0 100 7 0 0 3 220 102 10 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:15:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 120 0 0 2 0 599 0 1 0 99 1 0 0 0 16 4 8 1 0 2 0 301 0 0 0 100 2 0 0 0 22 4 24 0 1 1 0 13 0 0 0 100 3 0 0 0 149 71 146 0 1 0 0 27 0 0 0 100 4 0 0 14 18 7 40 1 0 1 0 1009 0 0 0 100 5 0 0 0 14 8 0 0 0 1 0 0 0 0 0 100 6 0 0 10 210 103 6 0 0 1 0 259 0 0 0 100 7 0 0 3 216 104 11 0 0 1 0 23 0 0 0 100 March 4, 2026 at 01:15:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 116 1 0 1 0 613 0 1 0 99 1 0 0 0 13 3 10 0 0 2 0 309 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 150 71 146 0 0 0 0 20 0 0 0 100 4 0 0 14 14 5 44 0 1 0 0 1008 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 213 104 8 1 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 1 0 3 0 594 0 1 0 99 1 0 0 0 10 2 4 0 0 2 0 301 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 150 70 150 0 1 0 0 20 0 0 0 100 4 0 0 14 13 5 38 1 0 1 0 1008 0 0 0 100 5 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 213 104 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:15:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 0 0 2 0 593 0 1 0 99 1 0 0 0 9 2 4 0 0 2 0 300 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 147 70 142 0 0 0 0 20 0 0 0 100 4 0 0 14 17 5 48 1 1 0 0 1008 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 112 0 0 0 0 595 0 1 0 99 1 0 0 0 10 2 4 1 0 1 0 299 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 148 70 142 0 0 0 0 20 0 0 0 100 4 0 0 14 13 5 38 1 1 0 0 1008 0 0 0 100 5 0 0 0 8 1 4 0 1 0 0 1 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 118 1 0 2 0 599 0 1 0 99 1 0 0 0 9 2 8 0 1 1 0 298 0 0 0 100 2 1 0 0 15 3 14 0 0 0 0 14 0 0 0 100 3 0 0 0 147 70 144 0 0 0 0 25 0 0 0 100 4 0 0 14 14 4 38 1 1 1 0 1008 0 0 0 100 5 0 0 0 18 6 12 0 1 0 0 0 0 0 0 100 6 0 0 10 211 103 6 1 0 0 0 259 0 0 0 100 7 0 0 3 212 102 7 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:15:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 112 1 0 0 0 594 0 1 0 99 1 0 0 0 9 2 4 0 0 1 0 302 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 148 71 144 0 0 0 0 20 0 0 0 100 4 0 0 14 13 4 42 1 1 1 0 1008 0 0 0 100 5 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 6 0 0 10 215 103 16 0 1 0 0 259 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 0 0 594 0 1 0 99 1 0 0 0 9 2 4 0 0 2 0 300 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 115 54 110 0 0 0 0 4 0 0 0 100 4 0 0 14 41 19 68 0 1 1 0 1024 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 112 0 0 0 0 594 0 1 0 99 1 0 0 0 9 2 6 0 0 5 0 301 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 52 24 78 1 0 1 0 1028 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 10 212 103 8 0 1 0 0 259 0 0 0 100 7 0 0 3 216 103 14 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:15:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 122 1 1 3 0 593 0 1 0 99 1 0 0 0 11 2 4 1 0 4 0 297 0 0 0 100 2 0 0 0 11 3 8 0 1 0 0 3 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 14 55 26 80 1 0 0 0 1032 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 10 215 104 12 1 0 0 0 262 0 0 0 100 7 0 0 3 211 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 118 1 0 3 0 600 0 1 0 99 1 0 0 0 14 4 6 0 0 4 0 303 0 0 0 100 2 0 0 0 17 4 12 0 0 1 0 12 0 0 0 100 3 0 0 0 110 51 104 0 0 1 0 5 0 0 0 100 4 0 0 14 56 26 78 0 0 1 0 1029 0 0 0 100 5 0 0 0 15 7 2 0 0 1 0 0 0 0 0 100 6 0 0 14 211 103 6 0 0 1 0 259 0 0 0 100 7 0 0 7 215 103 11 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:15:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 116 0 0 0 0 594 0 1 0 99 1 0 0 0 14 2 14 0 1 1 0 300 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 2 0 0 0 100 3 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 4 0 0 14 49 22 74 1 0 1 0 1025 0 0 0 100 5 0 0 0 12 3 8 0 1 0 0 3 0 0 0 100 6 0 0 10 212 104 8 0 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 116 0 1 0 0 595 0 1 0 99 1 0 0 0 11 2 6 0 1 2 0 301 0 0 0 100 2 0 0 0 13 2 14 0 1 0 0 1 0 0 0 100 3 0 0 0 107 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 12 4 38 1 0 0 0 1007 0 0 0 100 5 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 213 104 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:15:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 1 0 2 0 593 0 1 0 99 1 0 0 0 10 2 4 1 0 1 0 300 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 102 0 1 0 0 0 0 0 0 100 4 0 0 14 10 4 36 0 0 0 0 1008 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 211 103 6 1 0 0 0 259 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 112 1 0 1 0 594 0 1 0 99 1 0 0 0 9 2 4 0 0 4 0 299 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 110 50 110 0 1 0 0 0 0 0 0 100 4 0 0 14 11 4 38 1 1 1 0 1010 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 130 1 2 0 0 604 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 2 0 0 0 15 3 12 0 0 0 0 7 0 0 0 100 3 0 0 0 109 50 106 0 0 0 0 8 0 0 0 100 4 0 0 14 16 4 46 1 1 0 0 1007 0 0 0 100 5 0 0 0 52 26 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 216 102 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 112 0 0 3 0 593 0 1 0 99 1 0 0 0 9 2 4 0 0 1 0 298 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 4 0 0 14 13 4 40 0 0 0 0 1008 0 0 0 100 5 0 0 0 49 23 44 0 1 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 114 1 0 2 0 595 0 1 0 99 1 0 0 0 10 2 4 1 0 1 0 302 0 0 0 100 2 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 13 4 38 1 0 1 0 1008 0 0 0 100 5 0 0 0 52 21 52 0 1 0 0 20 0 0 0 100 6 0 0 10 210 103 6 1 0 0 0 259 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 112 1 0 1 0 594 0 1 0 99 1 0 0 0 9 2 4 0 0 4 0 300 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 12 4 38 1 0 0 0 1008 0 0 0 100 5 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 6 0 0 10 215 103 16 0 1 0 0 259 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 1 0 594 0 1 0 99 1 0 0 0 9 2 6 0 0 4 0 301 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 36 1 0 1 0 1007 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 212 104 8 0 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2118 104 128 1 0 4 0 608 0 1 0 99 1 0 0 0 13 4 6 0 0 4 0 299 0 0 0 100 2 0 0 0 15 2 8 0 0 1 0 5 0 0 0 100 3 0 0 0 109 51 106 0 1 0 0 7 0 0 0 100 4 0 0 14 14 6 38 0 0 2 0 1009 0 0 0 100 5 0 0 0 59 28 44 1 0 1 0 43 0 0 0 100 6 0 0 10 212 103 8 0 0 1 0 259 0 0 0 100 7 0 0 3 221 104 21 0 2 2 0 23 0 0 0 100 March 4, 2026 at 01:15:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 112 1 0 3 0 593 0 1 0 99 1 0 0 0 15 2 14 1 1 8 0 300 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 108 51 106 0 1 0 0 0 0 0 0 100 4 0 0 14 13 4 40 1 0 0 0 1008 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 213 104 8 1 0 0 0 260 0 0 0 100 7 0 0 3 211 102 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:15:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 114 1 0 5 0 595 0 1 0 99 1 0 0 0 9 2 4 0 0 3 0 327 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 12 4 38 1 0 1 0 1008 0 0 0 100 5 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 213 104 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:15:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 116 0 0 2 0 593 0 1 0 99 1 0 0 0 11 2 6 0 0 2 0 276 0 0 0 100 2 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 36 1 0 0 0 1009 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 114 0 0 2 0 596 0 1 0 99 1 0 0 0 9 2 6 0 1 2 0 298 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 111 50 110 0 1 0 0 0 0 0 0 100 4 0 0 14 10 4 36 0 0 0 0 1008 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 104 128 2 0 4 0 606 0 1 0 99 1 0 0 0 9 2 4 0 0 5 0 300 0 0 0 100 2 0 0 0 11 1 8 0 0 0 0 5 0 0 0 100 3 0 0 0 107 50 106 0 0 0 0 7 0 0 0 100 4 0 0 14 11 4 36 1 0 0 0 1008 0 0 0 100 5 0 0 0 52 26 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 1 0 0 0 259 0 0 0 100 7 0 0 3 212 102 7 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 112 1 0 0 0 594 0 1 0 99 1 0 0 0 9 2 4 0 0 4 0 300 0 0 0 100 2 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 110 51 106 0 1 0 0 0 0 0 0 100 4 0 0 14 19 4 50 1 1 0 0 1008 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 1 0 594 0 1 0 99 1 0 0 0 10 2 4 1 0 1 0 300 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 13 4 38 1 0 0 0 1008 0 0 0 100 5 0 0 0 53 21 52 0 1 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 116 0 0 1 0 595 0 1 0 99 1 0 0 0 10 2 4 0 0 6 0 301 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 38 1 1 0 0 1008 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:15:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 1 1 1 0 594 0 1 0 99 1 0 0 0 9 2 4 0 0 2 0 299 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 10 4 36 0 0 0 0 1007 0 0 0 100 5 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 6 0 0 10 218 104 18 1 1 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 121 2 0 2 0 598 0 1 0 99 1 0 0 0 14 4 6 0 0 1 0 302 0 0 0 100 2 0 0 0 14 2 4 0 0 1 0 4 0 0 0 100 3 0 0 0 109 51 102 0 0 1 0 2 0 0 0 100 4 0 0 14 17 6 40 1 1 1 0 1011 0 0 0 100 5 0 0 0 56 27 42 1 0 1 0 20 0 0 0 100 6 0 0 14 214 103 10 0 1 2 0 264 0 0 0 100 7 0 0 7 221 103 26 0 3 0 0 11 0 0 0 100 March 4, 2026 at 01:15:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 120 0 0 0 0 612 0 1 0 99 1 0 0 0 14 3 10 1 0 1 0 308 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 4 0 0 14 13 4 40 1 0 0 0 1008 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 212 104 8 0 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 124 0 1 0 0 595 0 1 0 99 1 0 0 0 9 2 6 0 1 4 0 301 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 12 4 36 1 0 0 0 1008 0 0 0 100 5 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 217 105 10 0 0 0 0 4 0 0 0 100 March 4, 2026 at 01:15:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 118 1 0 0 0 594 0 1 0 99 1 0 0 0 13 2 12 0 1 2 0 301 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 10 4 36 0 0 0 0 1007 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 211 103 6 1 0 0 0 259 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:15:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 1 0 0 0 593 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 298 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 38 1 1 1 0 1008 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:16:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 122 1 1 0 0 603 0 1 0 99 1 0 0 0 12 2 6 1 0 8 0 298 0 0 0 100 2 0 0 0 11 1 12 0 1 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 15 4 40 1 0 1 0 1014 0 0 0 100 5 0 0 0 53 27 42 0 0 0 0 20 0 0 0 100 6 0 0 10 212 103 10 0 0 0 0 266 0 0 0 100 7 0 0 3 217 104 13 0 0 0 0 4 0 0 0 100 March 4, 2026 at 01:16:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 116 0 0 0 0 595 0 1 0 99 1 0 0 0 10 2 4 0 0 2 0 300 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 113 51 114 0 1 0 0 0 0 0 0 100 4 0 0 14 13 4 40 1 0 0 0 1007 0 0 0 100 5 0 0 0 47 21 44 0 1 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:16:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 100 1 2 0 0 594 0 1 0 99 1 0 0 0 18 2 14 0 1 1 0 304 0 0 0 100 2 0 0 0 14 1 8 0 1 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 10 4 36 0 0 0 0 1008 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 1 0 0 0 259 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 92 1 2 2 0 594 0 1 0 99 1 0 0 0 27 2 22 0 3 5 0 300 0 0 0 100 2 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 3 0 0 0 115 50 110 0 1 0 0 0 0 0 0 100 4 0 0 14 17 4 46 1 1 0 0 1009 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:16:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 114 0 4 1 0 594 0 1 0 99 1 0 0 0 15 2 6 1 0 4 0 298 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 1 0 0 0 100 3 0 0 0 109 50 102 0 0 0 0 0 0 0 0 100 4 0 0 14 12 4 38 0 0 0 0 1008 0 0 0 100 5 0 0 0 52 21 52 0 1 0 0 20 0 0 0 100 6 0 0 10 212 104 8 0 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 123 1 1 3 0 598 0 1 0 99 1 0 0 0 13 4 6 0 0 6 0 299 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 3 0 0 0 107 51 102 0 1 0 0 0 0 0 0 100 4 0 0 14 19 6 42 1 0 1 0 1014 0 0 0 100 5 0 0 0 56 28 42 0 0 1 0 20 0 0 0 100 6 1 0 10 213 103 10 0 0 1 0 268 0 0 0 100 7 1 0 4 220 104 17 1 2 1 0 33 0 0 0 100 March 4, 2026 at 01:16:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 116 1 0 1 0 595 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 312 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 4 0 0 14 13 4 40 1 0 0 0 1032 0 0 0 100 5 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 6 0 0 10 219 104 18 1 1 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 116 0 1 6 0 593 0 1 0 99 1 0 0 0 10 2 4 0 0 8 0 290 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 10 4 36 0 0 0 0 1008 0 0 0 100 5 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 6 0 0 10 212 103 8 0 0 0 0 259 0 0 0 100 7 0 0 3 218 104 16 0 1 0 0 3 0 0 0 100 March 4, 2026 at 01:16:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 1 0 1 0 593 0 1 0 99 1 0 0 0 9 2 6 0 0 2 0 300 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 36 1 0 1 0 1007 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 124 0 1 0 0 595 0 1 0 99 1 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 38 1 1 0 0 1009 0 0 0 100 5 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 6 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 215 104 8 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:16:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 126 2 1 1 0 602 0 1 0 99 1 0 0 0 15 2 16 0 2 1 0 301 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 14 14 4 38 1 0 0 0 1012 0 0 0 100 5 0 0 0 52 26 42 0 0 0 0 20 0 0 0 100 6 0 0 10 213 103 10 1 0 0 0 266 0 0 0 100 7 0 0 3 218 104 12 0 0 0 0 4 0 0 0 100 March 4, 2026 at 01:16:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1285 0 2 2129 102 136 0 0 3 0 629 0 1 0 99 1 39 0 0 38 2 48 2 4 2 0 565 1 0 0 99 2 0 0 0 12 1 14 0 2 0 0 83 0 0 0 100 3 0 0 0 109 51 106 0 1 0 0 3 0 0 0 100 4 0 0 14 12 4 40 0 1 0 0 1008 0 0 0 100 5 0 0 0 106 82 38 0 0 1 0 24 0 0 0 100 6 4 0 10 217 103 20 0 1 0 0 285 0 0 0 100 7 0 0 3 220 103 20 0 1 0 0 11 0 0 0 100 March 4, 2026 at 01:16:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2662 104 1229 12 5 7 0 648 0 1 0 99 1 0 0 0 31 4 24 0 0 3 0 342 0 0 0 100 2 0 0 0 21 1 21 0 3 0 0 0 0 0 0 100 3 0 0 0 106 50 102 0 0 0 0 2 0 0 0 100 4 0 0 14 11 4 36 1 0 0 0 1009 0 0 0 100 5 0 0 0 758 720 71 6 1 86 0 228 0 1 0 99 6 2567 0 10 288 103 154 1 2 34 0 836 1 1 0 98 7 0 0 3 760 103 1109 6 3 65 0 31 0 1 0 99 March 4, 2026 at 01:16:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2723 103 1366 16 2 13 0 319 0 1 0 99 1 0 0 0 16 2 12 0 1 6 0 573 0 0 0 100 2 0 0 0 18 1 12 0 0 0 0 0 0 0 0 100 3 0 0 3 17 5 12 1 2 0 0 0 0 0 0 100 4 0 0 14 103 49 128 1 1 1 0 1011 0 0 0 100 5 0 0 0 848 791 128 6 4 85 0 413 0 1 0 99 6 0 0 10 267 103 106 1 1 41 0 743 0 1 0 98 7 0 0 3 823 103 1230 0 1 36 0 8 0 1 0 99 March 4, 2026 at 01:16:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 108 0 0 1 0 294 0 1 0 99 1 1 0 0 21 3 18 2 0 0 0 626 0 0 0 100 2 0 0 0 16 1 12 0 0 0 0 1 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 4 0 0 14 111 54 136 1 0 1 0 1009 0 0 0 100 5 0 0 0 26 16 10 0 0 0 0 11 0 0 0 100 6 0 0 10 212 103 8 1 1 0 0 258 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:16:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 101 184 0 0 1 0 294 0 1 0 99 1 0 0 0 29 7 26 0 0 1 0 626 0 0 0 100 2 0 0 0 38 4 44 0 1 2 0 78 0 0 0 100 3 0 0 0 17 2 12 0 0 1 0 10 0 0 0 100 4 0 0 15 117 56 144 0 1 1 0 1009 0 0 0 100 5 0 0 0 164 153 4 0 0 4 0 0 0 0 0 100 6 0 0 14 212 103 8 0 0 1 0 259 0 0 0 100 7 0 0 7 253 103 88 0 1 1 0 2 0 0 0 100 March 4, 2026 at 01:16:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2209 101 308 1 9 40 0 294 0 1 0 99 1 0 0 0 130 3 243 0 12 64 0 707 0 0 0 99 2 0 0 0 60 3 94 0 11 33 0 11 0 0 0 100 3 0 0 0 119 68 89 0 15 57 0 2 0 0 0 100 4 0 0 14 172 54 257 1 19 43 0 1009 0 1 0 99 5 0 0 0 219 179 68 0 14 67 0 0 0 0 0 100 6 0 0 9 245 104 74 1 11 33 0 260 0 1 0 99 7 0 0 4 320 102 225 0 9 49 0 0 0 0 0 100 March 4, 2026 at 01:16:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 101 192 0 0 2 0 294 0 1 0 99 1 0 0 0 19 5 14 0 0 2 0 612 0 0 0 100 2 0 0 0 30 0 40 1 0 0 0 78 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 4 0 0 14 111 54 138 1 1 1 0 1009 0 0 0 100 5 0 0 0 153 139 8 0 1 9 0 0 0 0 0 100 6 0 0 10 211 103 6 0 0 0 0 259 0 0 0 100 7 0 0 3 255 104 90 1 0 2 0 3 0 0 0 100 March 4, 2026 at 01:16:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 0 3 0 294 0 1 0 99 1 0 0 0 22 3 18 3 0 1 0 624 0 0 0 100 2 0 0 0 21 3 16 0 0 0 0 11 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 4 0 0 14 110 54 134 0 0 0 0 1009 0 0 0 100 5 0 0 0 27 14 10 0 1 0 0 0 0 0 0 100 6 0 0 10 215 103 16 1 1 0 0 259 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:16:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 101 196 0 1 2 0 294 0 1 0 99 1 0 0 0 19 5 14 0 0 2 0 615 0 0 0 100 2 0 0 0 30 0 38 1 0 3 0 76 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 4 0 0 14 11 4 34 1 0 1 0 1008 0 0 0 100 5 0 0 0 259 200 108 0 2 10 0 0 0 0 0 100 6 0 0 10 218 103 18 0 1 0 0 259 0 0 0 100 7 0 0 3 255 103 90 0 0 2 0 2 0 0 0 100 March 4, 2026 at 01:16:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 101 132 1 0 8 0 294 0 1 0 99 1 1 0 0 27 4 30 1 0 1 0 642 0 0 0 100 2 0 0 0 31 5 32 0 0 0 0 34 0 0 0 100 3 0 0 0 11 1 10 0 0 0 0 9 0 0 0 100 4 0 0 14 9 3 36 1 1 0 0 1010 0 0 0 100 5 0 0 0 194 135 106 0 0 0 0 0 0 0 0 100 6 0 0 9 210 103 6 0 0 0 0 259 0 0 0 100 7 0 0 4 226 102 30 0 1 0 0 0 0 0 0 100