March 4, 2026 at 01:29:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 987 0 55 4397 138 5574 71 355 1435 38 5699 4 9 0 86 1 765 0 51 1403 19 3781 22 428 1576 27 8022 5 8 0 88 2 1039 0 55 1206 22 2918 17 371 1468 25 8359 3 6 0 90 3 954 0 195 1405 508 2913 18 414 1586 46 5667 3 8 0 89 4 1144 0 119 1463 18 4676 19 443 1580 39 9821 4 7 0 88 5 1002 0 557 3551 2661 3226 30 356 1508 6 8773 22 10 0 68 6 862 0 113 1439 30 4037 22 423 1447 41 8638 6 8 0 86 7 798 0 1155 2179 28 6038 43 365 1453 36 5459 5 10 0 86 March 4, 2026 at 01:29:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6231 0 26 2615 103 849 39 202 1179 63 1984 8 6 0 85 1 7361 0 23 485 0 757 37 214 936 60 2455 6 4 0 90 2 3052 0 65 530 6 758 38 198 600 84 2523 4 25 0 71 3 1687 0 1010 781 379 1073 31 227 702 64 1822 10 4 0 86 4 10230 0 52 888 6 644 40 153 853 44 3598 6 33 0 60 5 6140 0 65 901 52 516 40 136 583 48 2803 9 35 0 56 6 4642 0 19 553 11 1136 36 220 654 89 2194 8 8 0 84 7 5887 0 73 439 49 818 50 219 858 55 2785 8 12 0 80 March 4, 2026 at 01:29:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2189 102 270 0 81 708 0 0 0 2 0 98 1 0 0 0 170 1 306 0 92 673 0 0 0 1 0 99 2 0 0 0 97 1 245 0 80 622 0 0 0 1 0 99 3 0 0 0 532 381 334 0 77 541 0 295 0 1 0 99 4 31 0 0 99 2 293 1 95 749 0 1012 0 1 0 98 5 0 0 10 298 103 259 0 89 729 0 259 0 1 0 99 6 40 0 0 101 3 248 0 90 678 0 623 0 1 0 99 7 0 0 17 633 102 919 0 82 630 0 266 0 1 0 99 March 4, 2026 at 01:29:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2191 101 333 0 74 484 1 0 0 1 0 99 1 0 0 0 99 0 242 2 83 474 0 10 0 1 0 99 2 0 0 0 94 1 240 2 85 514 0 0 0 1 0 99 3 0 0 0 437 335 258 1 84 546 1 303 0 1 0 99 4 23 0 0 231 2 536 0 98 529 0 1002 0 1 0 99 5 0 0 10 501 109 626 2 82 494 1 262 0 1 0 99 6 0 0 0 111 6 269 2 96 591 1 598 0 1 0 99 7 0 0 21 395 148 354 2 88 587 1 266 0 4 0 96 March 4, 2026 at 01:29:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 101 217 0 15 179 0 0 0 1 0 99 1 0 0 0 62 0 119 0 22 144 0 0 0 0 0 100 2 0 0 0 62 1 116 0 22 179 0 0 0 0 0 100 3 0 0 0 170 105 297 0 24 171 0 294 0 0 0 100 4 0 0 0 80 2 184 0 27 136 0 995 0 0 0 99 5 0 0 10 265 104 116 0 22 177 0 259 0 0 0 100 6 0 0 0 86 3 159 0 27 182 0 603 0 0 0 100 7 0 0 17 347 152 191 0 19 152 0 266 0 0 0 100 March 4, 2026 at 01:29:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 100 209 1 24 221 0 0 0 2 0 98 1 0 0 0 61 1 115 1 29 235 0 0 0 2 0 98 2 0 0 0 63 2 114 1 21 198 0 0 0 1 0 99 3 0 0 0 178 117 113 1 19 321 0 296 0 2 0 98 4 0 0 0 85 2 182 1 23 244 0 996 0 2 0 98 5 0 0 10 267 103 132 1 25 252 0 259 0 2 0 98 6 0 0 0 198 7 382 0 36 182 0 599 0 1 0 99 7 0 0 17 381 148 271 0 37 185 0 266 0 1 0 99 March 4, 2026 at 01:29:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 112 0 1 0 0 0 0 0 0 100 1 0 0 0 13 3 4 0 0 1 0 1 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 3 0 0 0 12 2 4 0 0 6 0 294 0 0 0 100 4 0 0 0 12 3 32 1 0 2 0 994 0 0 0 100 5 0 0 14 211 103 4 0 0 1 0 259 0 0 0 100 6 0 0 0 16 4 8 0 0 11 0 601 0 0 0 100 7 0 0 21 308 152 104 0 0 1 0 266 0 0 0 100 March 4, 2026 at 01:29:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 120 0 1 0 0 0 0 0 0 100 1 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 6 0 0 2 0 296 0 0 0 100 4 0 0 0 8 2 32 0 0 0 0 995 0 0 0 100 5 0 0 10 210 103 4 0 0 0 0 259 0 0 0 100 6 0 0 0 13 3 8 0 0 5 0 600 0 0 0 100 7 0 0 17 311 153 108 0 0 0 0 267 0 0 0 100 March 4, 2026 at 01:29:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 118 0 0 1 0 0 0 0 0 100 1 0 0 0 21 3 24 0 1 1 0 13 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 11 1 8 0 0 1 0 299 0 0 0 100 4 0 0 0 11 2 36 1 0 0 0 1002 0 0 0 100 5 0 0 10 214 107 4 0 0 0 0 259 0 0 0 100 6 0 0 0 13 3 8 0 0 1 0 594 0 0 0 100 7 0 0 17 310 152 110 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 3 0 0 0 12 2 8 0 0 4 0 296 0 0 0 100 4 0 0 0 9 2 32 1 0 1 0 995 0 0 0 100 5 0 0 10 211 104 4 0 0 0 0 259 0 0 0 100 6 0 0 0 17 5 12 0 0 2 0 607 0 0 0 100 7 0 0 17 311 152 108 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:29:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 14 2 10 0 2 0 0 1 0 0 0 100 2 0 0 0 15 2 16 0 1 3 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 4 0 294 0 0 0 100 4 0 0 0 10 2 34 1 0 2 0 995 0 0 0 100 5 0 0 10 211 103 6 0 0 3 0 259 0 0 0 100 6 0 0 0 13 3 8 0 0 8 0 602 0 0 0 100 7 0 0 17 310 153 108 0 0 1 0 266 0 0 0 100 March 4, 2026 at 01:29:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 1 0 0 0 0 0 0 100 2 0 0 0 13 3 8 0 1 0 0 1 0 0 0 100 3 0 0 0 16 2 16 0 1 4 0 296 0 0 0 100 4 0 0 0 8 2 32 0 0 1 0 996 0 0 0 100 5 0 0 10 210 103 4 0 0 0 0 259 0 0 0 100 6 0 0 0 13 3 8 0 0 2 0 598 0 0 0 100 7 0 0 17 308 152 104 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 5 0 1 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 4 0 294 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 996 0 0 0 100 5 0 0 10 210 103 4 0 0 0 0 259 0 0 0 100 6 0 0 0 13 3 8 0 0 0 0 601 0 0 0 100 7 0 0 17 307 152 104 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 18 3 16 0 0 0 0 13 0 0 0 100 2 0 0 0 10 2 6 0 1 0 0 0 0 0 0 100 3 0 0 0 13 2 10 0 0 4 0 301 0 0 0 100 4 0 0 0 16 2 46 1 1 2 0 1002 0 0 0 100 5 0 0 10 215 108 4 0 0 0 0 259 0 0 0 100 6 0 0 0 13 3 8 0 0 4 0 595 0 0 0 100 7 0 0 17 308 152 106 0 0 1 0 266 0 0 0 100 March 4, 2026 at 01:29:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 0 0 0 1 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 3 0 0 0 10 1 4 0 0 6 0 294 0 0 0 100 4 0 0 0 10 2 34 0 0 1 0 994 0 0 0 100 5 0 0 10 216 104 14 0 1 0 0 259 0 0 0 100 6 0 0 0 13 3 8 0 0 8 0 605 0 0 0 100 7 0 0 17 310 152 108 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 3 0 296 0 0 0 100 4 0 0 0 10 2 34 1 0 1 0 997 0 0 0 100 5 0 0 10 211 103 8 0 1 3 0 259 0 0 0 100 6 0 0 0 13 3 8 0 0 1 0 602 0 0 0 100 7 0 0 17 310 153 108 0 0 1 0 266 0 0 0 100 March 4, 2026 at 01:29:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 112 0 1 0 0 0 0 0 0 100 1 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 2 0 0 0 13 4 6 0 0 1 0 0 0 0 0 100 3 0 0 0 9 2 2 0 0 3 0 294 0 0 0 100 4 0 0 0 11 3 32 1 0 1 0 994 0 0 0 100 5 0 0 10 212 103 6 0 1 1 0 259 0 0 0 100 6 0 0 0 20 4 18 0 1 6 0 598 0 0 0 100 7 0 0 17 309 152 106 0 0 1 0 266 0 0 0 100 March 4, 2026 at 01:29:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 116 0 0 0 0 0 0 0 0 100 1 0 0 0 16 1 12 0 5 0 0 1 0 0 0 100 2 0 0 0 13 3 11 0 3 1 0 0 0 0 0 100 3 0 0 0 10 2 6 0 1 4 0 296 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 995 0 0 0 100 5 0 0 10 210 103 4 0 0 0 0 259 0 0 0 100 6 0 0 0 15 3 10 0 0 3 0 600 0 0 0 100 7 0 0 17 314 153 118 0 2 0 0 267 0 0 0 100 March 4, 2026 at 01:29:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 16 2 16 0 0 0 0 15 0 0 0 100 2 0 0 0 12 3 6 0 0 0 0 0 0 0 0 100 3 0 0 0 11 1 8 1 1 2 0 299 0 0 0 100 4 2 0 0 10 2 36 0 0 1 0 1018 0 0 0 100 5 0 0 10 214 107 4 0 0 0 0 259 0 0 0 100 6 0 0 0 13 3 8 0 0 2 0 595 0 0 0 100 7 0 0 17 310 152 108 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 122 0 1 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 15 4 8 0 0 0 0 22 0 0 0 100 3 0 0 0 14 3 10 0 1 4 0 296 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1007 0 0 0 100 5 0 0 10 213 104 4 0 0 0 0 259 0 0 0 100 6 0 0 0 19 5 12 2 0 3 0 603 0 0 0 100 7 0 0 17 312 152 110 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 122 0 0 1 0 9 0 0 0 100 1 0 0 0 15 1 16 0 3 1 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 8 0 1 0 0 312 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1007 0 0 0 100 5 0 0 10 211 103 4 1 0 0 0 259 0 0 0 100 6 0 0 0 13 3 8 0 0 1 0 604 0 0 0 100 7 0 0 17 311 153 108 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1316 0 0 2169 101 217 4 27 84 3 742 2 2 0 96 1 2862 0 7 91 2 165 8 31 181 12 822 4 4 0 92 2 1118 0 1 130 4 247 14 34 209 17 541 1 1 0 98 3 756 0 0 92 3 152 4 24 46 5 799 1 1 0 98 4 1268 0 0 180 30 303 7 29 73 8 1620 1 1 0 98 5 800 0 10 304 103 211 16 34 52 4 772 3 1 0 96 6 629 0 0 100 4 197 6 34 67 4 1198 4 1 0 96 7 758 0 73 329 126 223 7 25 60 5 886 3 1 0 96 March 4, 2026 at 01:29:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 11 1 8 0 2 0 0 0 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 12 1 6 1 1 1 0 294 0 0 0 100 4 0 0 0 109 52 132 1 0 0 0 1087 0 0 0 100 5 22 0 10 225 109 16 0 0 0 0 316 0 0 0 100 6 0 0 0 13 3 8 0 0 3 0 604 0 0 0 100 7 0 0 17 209 102 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 20 4 20 0 0 0 0 15 0 0 0 100 2 0 0 0 10 2 6 0 1 0 0 0 0 0 0 100 3 0 0 0 13 2 10 0 0 3 0 301 0 0 0 100 4 7 0 0 115 52 146 0 1 1 0 1091 0 0 0 100 5 8 0 10 228 114 18 0 0 0 0 296 0 0 0 100 6 0 0 0 15 3 10 2 0 2 0 590 0 0 0 100 7 0 0 17 209 102 8 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 3 0 0 0 10 1 4 0 0 4 0 294 0 0 0 100 4 0 0 0 109 52 132 1 0 0 0 1083 0 0 0 100 5 0 0 10 224 110 16 1 0 0 0 269 0 0 0 100 6 0 0 0 13 3 8 0 0 4 0 610 0 0 0 100 7 0 0 17 210 102 6 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8096 0 174 2438 101 646 13 122 220 37 2925 3 4 0 93 1 9753 0 69 548 2 778 15 127 192 37 2680 7 4 0 89 2 17048 0 20 331 4 510 18 107 110 43 2228 6 17 0 77 3 2147 0 119 398 70 609 11 128 169 55 2911 3 2 0 95 4 863 0 11 416 34 719 7 128 208 46 3109 1 2 0 97 5 8095 0 14 525 110 508 17 107 127 29 1281 4 8 0 88 6 1325 0 193 309 9 541 3 93 137 49 3363 2 2 0 96 7 1277 0 83 520 113 489 13 86 163 33 2408 3 2 0 95 March 4, 2026 at 01:29:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 219 0 7 2292 104 328 13 45 28 2 1347 2 1 0 97 1 917 0 0 212 3 353 17 57 65 1 1128 2 1 0 97 2 585 0 0 191 4 367 19 51 33 2 1036 2 1 0 98 3 284 0 0 314 4 519 16 53 43 0 1417 2 1 0 97 4 680 0 0 188 4 330 16 51 39 5 1275 3 1 0 96 5 502 0 14 433 151 346 9 28 50 3 1918 2 1 0 98 6 440 0 0 220 4 387 13 43 29 2 1582 3 1 0 96 7 682 0 119 298 104 210 21 31 58 0 901 1 1 0 98 March 4, 2026 at 01:29:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 238 2124 108 72 0 2 2 0 316 0 1 0 99 1 0 0 0 51 4 10 0 0 0 0 2 0 0 0 100 2 0 0 0 42 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 106 2 64 0 0 0 0 2 0 0 0 100 4 0 0 0 45 3 4 0 0 5 0 294 0 0 0 100 5 12 0 3 256 107 42 0 0 0 0 1084 0 0 0 100 6 0 0 7 143 49 104 2 3 3 0 611 0 0 0 100 7 0 0 24 248 103 10 0 1 2 0 267 0 1 0 99 March 4, 2026 at 01:29:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 140 2117 108 131 1 1 0 0 269 0 1 0 99 1 1 0 0 43 5 24 0 1 1 0 19 0 0 0 100 2 0 0 0 26 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 29 1 8 0 0 0 0 6 0 0 0 100 4 0 0 0 31 3 8 0 0 7 0 301 0 0 0 100 5 0 0 3 233 106 32 1 0 0 0 1081 0 0 0 100 6 0 0 0 136 53 112 0 0 8 0 601 0 0 0 100 7 0 0 17 235 102 20 1 2 0 0 267 0 0 0 100 March 4, 2026 at 01:29:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2127 108 138 0 1 0 0 269 0 1 0 99 1 0 0 0 13 2 6 0 0 0 0 2 0 0 0 100 2 0 0 0 12 1 6 0 1 0 0 2 0 0 0 100 3 0 0 0 16 2 9 0 0 0 0 2 0 0 0 100 4 0 0 0 12 3 4 0 0 7 0 294 0 0 0 100 5 0 0 3 215 103 34 1 1 0 0 1083 0 0 0 100 6 0 0 0 119 55 114 0 0 4 0 600 0 0 0 100 7 0 0 17 213 102 6 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:29:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9320 0 67 2735 107 1057 33 195 260 66 5337 8 6 0 86 1 6043 0 18 759 7 1367 37 224 229 74 5603 7 4 0 89 2 4707 0 138 577 2 1046 24 170 189 71 4274 4 4 0 93 3 1547 0 196 655 60 1150 23 203 191 65 3653 4 3 0 94 4 1433 0 7 565 15 982 33 178 164 53 3177 5 2 0 93 5 3352 0 24 735 126 759 21 122 116 37 3324 6 2 0 92 6 2257 0 197 524 15 919 30 156 171 47 3889 4 3 0 93 7 34820 0 206 651 103 819 28 115 172 59 2965 10 9 0 81 March 4, 2026 at 01:29:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 14 2127 103 129 0 4 5 0 327 0 1 0 99 1 62 0 0 46 8 35 2 4 1 0 286 0 0 0 100 2 2 0 0 27 2 8 0 2 1 0 11 0 0 0 100 3 0 0 70 21 3 18 0 3 5 0 23 0 1 0 99 4 16 0 0 30 3 13 1 4 3 0 303 0 0 0 100 5 1 0 3 330 152 140 1 2 0 0 1102 0 0 0 100 6 0 0 0 32 4 12 2 0 5 0 342 0 0 0 100 7 2 0 31 222 102 8 0 1 0 0 290 0 0 0 100 March 4, 2026 at 01:29:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 469 2115 102 116 1 0 2 0 260 0 1 0 99 1 0 0 0 98 8 22 0 2 0 0 309 0 0 0 100 2 0 0 0 84 0 12 0 1 0 0 0 0 0 0 100 3 0 0 42 78 2 8 0 0 2 0 0 0 1 0 99 4 0 0 0 82 3 4 0 0 3 0 294 0 0 0 100 5 0 0 3 383 152 134 0 0 0 0 1085 0 0 0 100 6 0 0 0 82 2 6 0 0 4 0 303 0 0 0 100 7 0 0 17 283 102 6 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 102 116 0 0 0 0 260 0 0 0 100 1 0 0 0 31 10 32 0 0 0 0 323 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 14 3 10 0 0 0 0 7 0 0 0 100 4 0 0 1 12 3 8 0 0 8 0 301 0 0 0 100 5 0 0 3 227 113 42 1 0 0 0 1085 0 0 0 100 6 0 0 0 99 46 96 0 1 4 0 311 0 0 0 100 7 0 0 17 212 102 10 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34142 0 36 2698 102 1156 26 175 108 53 4521 14 10 0 76 1 5013 0 308 595 9 1082 34 178 133 80 5768 4 4 0 92 2 9343 0 317 464 0 868 13 146 125 80 3846 4 5 0 90 3 8794 0 56 593 3 875 22 162 142 49 4182 6 4 0 90 4 2441 0 16 524 5 929 17 165 99 67 3296 5 2 0 93 5 832 0 10 619 104 720 18 132 77 52 3888 2 2 0 96 6 1539 0 10 495 38 806 16 149 82 66 2938 3 2 0 96 7 1848 0 69 606 116 669 12 104 67 48 3901 6 2 0 92 March 4, 2026 at 01:29:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2167 102 198 0 16 84 0 8 0 1 0 99 1 11 0 0 125 4 184 0 18 65 0 318 0 0 0 100 2 2 0 7 82 1 122 0 19 75 0 10 0 0 0 100 3 0 0 49 117 53 101 0 18 79 0 12 0 1 0 99 4 16 0 0 82 5 119 0 22 67 0 316 0 0 0 100 5 0 0 3 262 102 113 0 15 83 0 1106 0 0 0 100 6 24 0 7 170 54 198 0 13 87 0 565 0 0 0 100 7 49 0 31 275 107 103 0 13 68 0 319 0 0 0 100 March 4, 2026 at 01:29:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2157 101 116 0 1 4 0 0 0 1 0 99 1 0 0 343 23 3 14 1 1 6 0 300 0 1 0 99 2 0 0 0 65 1 4 0 1 1 0 0 0 0 0 100 3 0 0 0 65 2 6 0 1 1 0 0 0 0 0 100 4 0 0 0 66 4 4 0 0 5 0 294 0 0 0 100 5 1 0 7 264 102 32 1 0 1 0 1085 0 0 0 100 6 0 0 7 170 55 110 1 0 12 0 563 0 0 0 100 7 0 0 21 275 108 16 1 0 1 0 275 0 0 0 100 March 4, 2026 at 01:29:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 101 112 0 0 0 0 0 0 1 0 99 1 0 0 119 14 3 10 0 0 1 0 301 0 0 0 100 2 0 0 0 26 0 4 0 0 0 0 0 0 0 0 100 3 0 0 0 31 2 14 0 1 0 0 2 0 0 0 100 4 0 0 0 27 3 4 0 0 7 0 294 0 0 0 100 5 0 0 3 227 102 32 1 0 0 0 1085 0 0 0 100 6 0 0 7 131 54 110 1 0 12 0 561 0 0 0 100 7 0 0 17 239 109 18 0 0 0 0 276 0 0 0 100 March 4, 2026 at 01:29:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1025 0 138 2159 102 175 2 21 29 22 1298 0 1 0 98 1 94 0 13 162 4 218 1 32 25 28 713 0 1 0 99 2 35 0 29 84 0 123 0 31 36 19 423 0 1 0 99 3 2552 0 17 81 1 108 2 22 61 13 1176 1 1 0 98 4 240 0 8 107 3 149 4 31 56 19 503 0 1 0 99 5 43 0 6 276 106 106 2 15 12 14 1325 0 0 0 99 6 24 0 10 169 54 197 1 26 26 12 774 0 0 0 100 7 18 0 31 283 109 88 2 13 15 11 445 0 1 0 99 March 4, 2026 at 01:29:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2209 0 119 2715 103 1106 44 208 94 28 4529 6 4 0 91 1 1176 0 7 788 6 1386 71 264 97 42 4452 4 3 0 93 2 3158 0 76 596 6 961 41 160 168 37 4592 6 4 0 90 3 6470 0 189 624 5 1146 42 206 116 45 4541 6 4 0 89 4 9459 0 56 671 32 910 29 157 155 36 3673 9 4 0 87 5 34361 0 14 721 107 927 39 149 95 53 4759 13 8 0 79 6 1569 0 198 594 10 1134 42 185 133 44 5347 5 3 0 92 7 1612 0 98 697 116 853 25 127 66 36 3306 4 2 0 94 March 4, 2026 at 01:29:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2221 101 179 0 9 55 0 0 0 1 0 99 1 0 0 0 181 2 202 1 21 74 0 300 0 0 0 100 2 0 0 42 124 0 107 0 16 100 0 0 0 1 0 99 3 0 0 462 101 53 77 0 16 100 0 0 0 1 0 99 4 0 0 0 235 51 216 0 21 105 0 0 0 0 0 100 5 44 0 3 339 108 102 0 11 100 0 303 0 0 0 100 6 0 0 7 121 6 99 1 12 75 0 1660 0 0 0 99 7 3 0 17 324 102 86 1 10 62 0 282 0 0 0 100 March 4, 2026 at 01:29:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 0 0 0 0 100 1 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 4 0 0 0 108 52 102 0 0 0 0 1 0 0 0 100 5 0 0 3 223 108 16 0 0 3 0 303 0 0 0 100 6 0 0 7 24 6 56 1 1 3 0 1650 0 0 0 100 7 0 0 17 208 102 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 110 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 6 0 1 0 0 300 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 106 51 100 0 0 0 0 0 0 0 0 100 5 0 0 3 223 108 14 2 0 2 0 303 0 0 0 100 6 0 0 7 18 6 44 1 0 4 0 1644 0 0 0 100 7 0 0 17 208 102 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2125 0 124 2744 110 1198 25 202 90 77 3345 6 3 0 91 1 1485 0 8 682 5 1271 47 236 95 74 4696 5 3 0 93 2 1910 0 29 564 0 995 38 177 128 66 4047 4 3 0 93 3 1765 0 48 564 12 1008 26 169 117 52 5734 4 4 0 92 4 36002 0 20 542 30 899 26 176 120 57 4250 12 9 0 80 5 4770 0 23 657 118 763 22 150 123 67 3031 3 3 0 94 6 9457 0 326 499 7 878 24 151 156 52 5470 5 4 0 90 7 6318 0 281 702 103 832 23 133 108 71 3442 6 3 0 91 March 4, 2026 at 01:29:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 1 2175 151 220 0 4 0 0 7 0 0 0 100 1 0 0 0 31 2 12 0 1 0 0 314 0 0 0 100 2 16 0 0 24 1 5 0 2 0 0 21 0 0 0 100 3 1 0 70 19 2 10 0 1 7 0 10 0 1 0 99 4 0 0 0 25 1 10 0 3 6 0 13 0 0 0 100 5 17 0 3 230 105 10 0 0 1 0 308 0 0 0 100 6 0 0 14 36 6 50 2 3 2 0 1677 0 0 0 100 7 49 0 31 237 106 28 1 1 0 0 284 0 0 0 100 March 4, 2026 at 01:29:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2220 124 228 0 13 70 0 0 0 1 0 99 1 0 0 0 165 2 206 1 19 66 0 300 0 0 0 100 2 0 0 0 116 0 105 0 19 88 0 0 0 0 0 100 3 0 0 35 151 55 74 0 10 71 0 2 0 1 0 99 4 0 0 350 64 1 107 0 19 69 0 0 0 1 0 99 5 0 0 3 302 104 74 0 12 76 0 294 0 0 0 100 6 9 0 7 163 33 173 1 18 77 0 1696 0 1 0 99 7 0 0 17 312 109 89 0 14 65 0 275 0 0 0 100 March 4, 2026 at 01:29:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 101 114 0 1 0 0 0 0 0 0 100 1 0 0 0 33 3 14 0 1 1 0 300 0 0 0 100 2 0 0 0 25 1 2 0 0 1 0 0 0 0 0 100 3 0 0 112 11 2 5 0 1 1 0 0 0 0 0 100 4 0 0 0 25 2 0 0 0 1 0 0 0 0 0 100 5 0 0 3 226 102 2 1 0 6 0 294 0 0 0 100 6 1 0 7 136 57 144 1 0 2 0 1648 0 0 0 100 7 0 0 17 236 108 16 0 0 1 0 275 0 0 0 100 March 4, 2026 at 01:29:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5139 0 26 2455 103 553 11 86 73 50 1785 4 2 0 94 1 532 0 18 332 3 526 6 103 63 53 2809 1 1 0 97 2 7248 0 129 293 0 491 6 92 59 58 1985 2 3 0 96 3 1088 0 36 272 3 467 10 94 41 48 2586 2 2 0 96 4 342 0 11 252 2 395 6 90 37 39 1312 1 1 0 98 5 224 0 18 426 102 314 8 58 37 36 1876 1 1 0 98 6 3555 0 191 330 50 524 8 84 100 44 4602 2 2 0 96 7 5191 0 198 454 114 423 4 69 78 64 2110 2 3 0 96 March 4, 2026 at 01:29:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 710 0 7 2436 101 655 31 122 46 13 2019 2 2 0 96 1 889 0 0 337 10 612 28 108 79 8 2772 3 2 0 95 2 29242 0 190 270 4 489 25 84 38 22 2270 12 7 0 81 3 586 0 71 407 42 617 27 97 51 19 2106 2 2 0 95 4 2289 0 5 346 6 544 20 84 50 13 1836 3 2 0 95 5 5749 0 21 489 107 352 19 65 101 10 2247 6 2 0 92 6 685 0 7 317 4 587 16 75 38 15 1879 2 1 0 97 7 758 0 45 462 103 502 18 73 43 11 2498 4 1 0 95 March 4, 2026 at 01:29:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 100 106 0 3 0 0 0 0 1 0 99 1 44 0 0 103 10 24 1 1 0 0 309 0 0 0 100 2 0 0 0 83 2 6 0 1 1 0 1 0 0 0 100 3 0 0 42 175 46 108 0 2 9 0 298 0 1 0 99 4 0 0 462 27 7 16 0 1 2 0 0 0 1 0 99 5 0 0 3 284 103 2 0 0 2 0 294 0 0 0 100 6 0 0 7 87 5 10 0 1 0 0 265 0 0 0 100 7 2 0 17 294 104 44 1 2 0 0 1355 0 1 0 99 March 4, 2026 at 01:30:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 101 204 0 16 75 0 9 0 1 0 99 1 0 0 0 139 10 249 0 20 81 0 309 0 0 0 100 2 0 0 0 54 1 100 0 13 80 0 0 0 0 0 100 3 0 0 0 133 71 117 0 15 98 0 316 0 0 0 100 4 0 0 0 174 51 234 0 20 83 0 0 0 0 0 100 5 0 0 3 244 102 72 1 13 66 0 294 0 0 0 100 6 0 0 7 59 3 106 0 17 84 0 260 0 0 0 100 7 0 0 17 246 104 103 1 11 63 0 1353 0 1 0 99 March 4, 2026 at 01:30:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 29 10 24 0 1 0 0 309 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 9 2 4 0 0 5 0 299 0 0 0 100 4 0 0 0 110 53 104 0 0 0 0 2 0 0 0 100 5 0 0 3 210 102 2 0 0 2 0 294 0 0 0 100 6 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 7 0 0 17 213 103 40 0 1 0 0 1354 0 1 0 99 March 4, 2026 at 01:30:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1822 0 131 2737 102 1236 49 235 113 57 3089 4 4 0 92 1 897 0 24 726 10 1240 59 242 100 71 3796 4 2 0 94 2 3567 0 44 597 3 917 35 159 89 60 3447 5 2 0 93 3 3114 0 319 538 3 989 42 186 140 52 6116 5 4 0 91 4 6751 0 204 610 30 1082 47 215 150 87 4826 6 5 0 89 5 5477 0 35 746 105 836 42 150 149 48 3450 7 4 0 89 6 5848 0 10 603 21 1030 28 191 124 67 4417 4 3 0 93 7 36526 0 74 678 104 858 24 133 124 51 5989 13 9 0 78 March 4, 2026 at 01:30:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 2123 101 56 0 5 0 0 8 0 0 0 99 1 18 0 70 37 6 29 0 4 6 0 316 0 1 0 99 2 0 0 7 87 2 70 0 5 0 0 12 0 0 0 100 3 19 0 7 33 4 20 0 3 6 0 584 0 0 0 100 4 24 0 0 34 4 18 0 1 6 0 23 0 0 0 100 5 46 0 3 241 110 18 0 2 1 0 317 0 0 0 100 6 0 0 0 128 51 114 0 2 0 0 11 0 0 0 100 7 5 0 31 232 104 52 1 2 1 0 1404 0 1 0 99 March 4, 2026 at 01:30:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 100 102 0 0 0 0 0 0 1 0 99 1 0 0 42 90 3 18 1 0 2 0 300 0 1 0 99 2 0 0 0 83 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 86 3 10 0 1 0 0 556 0 0 0 100 4 0 0 462 13 1 2 0 0 2 0 0 0 1 0 99 5 0 0 3 295 109 14 1 0 5 0 303 0 0 0 100 6 0 0 0 179 51 102 0 0 0 0 0 0 0 0 100 7 1 0 17 286 103 40 1 0 0 0 1363 0 0 0 100 March 4, 2026 at 01:30:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 100 171 0 7 67 0 0 0 1 0 99 1 0 0 0 113 3 201 0 17 72 0 300 0 0 0 100 2 0 0 0 58 2 106 0 14 80 0 0 0 0 0 100 3 0 0 7 113 57 109 0 21 87 0 565 0 0 0 100 4 0 0 0 52 3 93 0 21 97 0 1 0 0 0 100 5 0 0 3 256 108 83 0 15 66 0 303 0 0 0 100 6 0 0 0 156 51 202 0 15 79 0 0 0 0 0 100 7 0 0 17 253 103 122 1 9 59 0 1363 0 0 0 100 March 4, 2026 at 01:30:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 641 0 25 2433 102 586 9 97 79 75 3859 2 2 0 96 1 2195 0 140 387 6 505 10 109 54 52 1930 2 2 0 96 2 33409 0 12 340 6 448 15 91 69 50 1953 9 7 0 84 3 3562 0 154 382 5 466 10 94 67 48 2461 3 2 0 95 4 1488 0 299 257 3 402 6 93 55 49 1931 2 2 0 96 5 532 0 14 552 111 494 1 88 74 55 1849 1 2 0 97 6 9768 0 201 340 39 529 8 94 150 70 3308 3 5 0 93 7 4541 0 70 490 113 445 7 93 99 42 3078 2 2 0 96 March 4, 2026 at 01:30:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 986 0 70 2351 104 510 21 78 64 10 1993 4 3 0 93 1 2434 0 11 374 4 652 17 92 48 10 1565 4 2 0 95 2 629 0 0 335 47 535 10 56 52 10 1477 2 1 0 97 3 497 0 7 315 5 625 30 70 45 13 2116 2 1 0 96 4 1360 0 7 202 2 350 11 68 35 11 1630 3 1 0 96 5 915 0 3 381 102 350 16 61 50 9 1585 2 1 0 97 6 284 0 3 203 1 367 6 51 23 6 1484 3 1 0 96 7 200 0 59 344 107 280 7 36 33 4 2455 2 1 0 97 March 4, 2026 at 01:30:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2171 100 26 0 1 2 0 0 0 2 0 98 1 44 0 462 47 9 46 0 1 2 0 10 0 1 0 99 2 0 0 0 267 52 190 1 2 4 0 593 0 0 0 100 3 0 0 7 88 5 14 0 0 7 0 570 0 0 0 100 4 1 0 0 97 3 22 0 0 0 0 14 0 0 0 100 5 0 0 3 287 105 8 0 2 0 0 5 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 1 0 0 0 100 7 0 0 17 286 104 40 1 0 1 0 1363 0 0 0 100 March 4, 2026 at 01:30:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 23 7 18 0 0 0 0 8 0 0 0 100 2 0 0 0 119 54 118 0 1 0 0 617 0 0 0 100 3 0 0 7 19 6 14 0 0 9 0 561 0 0 0 100 4 0 0 0 22 5 14 0 0 0 0 3 0 0 0 100 5 0 0 3 210 102 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 17 215 104 40 1 0 0 0 1363 0 0 0 100 March 4, 2026 at 01:30:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 101 187 0 17 74 0 0 0 1 0 99 1 0 0 0 148 9 269 0 25 85 0 10 0 0 0 100 2 0 0 0 169 52 225 0 22 103 0 594 0 0 0 100 3 0 0 7 136 70 126 1 22 96 0 559 0 0 0 100 4 0 0 0 58 1 101 0 14 107 0 0 0 0 0 100 5 0 0 3 244 101 75 0 16 58 0 0 0 0 0 100 6 0 0 0 49 0 93 0 18 76 0 0 0 0 0 100 7 0 0 17 264 104 131 2 8 65 0 1363 0 0 0 100 March 4, 2026 at 01:30:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2205 0 5 2208 100 201 3 27 37 19 2176 1 2 0 98 1 4357 0 328 116 6 216 4 34 31 40 1433 2 2 0 96 2 334 0 12 188 11 288 2 48 33 48 1265 0 1 0 99 3 2876 0 21 215 6 222 7 29 45 25 2144 2 1 0 97 4 386 0 18 236 1 310 5 55 41 31 696 0 1 0 98 5 184 0 19 336 104 176 4 39 17 22 352 0 1 0 99 6 147 0 24 194 40 258 0 45 31 22 657 0 1 0 99 7 2295 0 23 308 106 132 2 29 54 17 1068 1 1 0 98 March 4, 2026 at 01:30:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 101 138 1 1 0 0 1094 0 1 0 99 1 0 0 0 15 1 6 0 0 3 0 0 0 0 0 100 2 0 0 0 19 3 6 1 0 5 0 594 0 0 0 100 3 0 0 7 23 5 12 0 1 6 0 568 0 0 0 100 4 0 0 0 26 2 20 0 2 1 0 1 0 0 0 100 5 0 0 3 214 101 0 0 0 0 0 0 0 0 0 100 6 0 0 28 23 7 16 0 0 3 0 0 0 1 0 99 7 65 0 17 311 150 102 0 1 0 0 273 0 0 0 100 March 4, 2026 at 01:30:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 101 140 0 0 0 0 1094 0 1 0 99 1 0 0 231 14 1 8 0 1 2 0 0 0 0 0 100 2 0 0 0 47 3 6 0 0 4 0 594 0 0 0 100 3 0 0 7 55 5 24 0 0 2 0 573 0 0 0 100 4 0 0 0 58 4 18 0 0 0 0 9 0 0 0 100 5 0 0 3 252 108 4 0 0 0 0 8 0 0 0 100 6 0 0 21 40 0 2 0 0 2 0 0 0 1 0 99 7 0 0 17 361 158 122 0 1 0 0 274 0 0 0 100 March 4, 2026 at 01:30:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 138 1 0 0 0 1093 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 6 0 0 7 0 595 0 0 0 100 3 0 0 7 16 5 12 1 0 3 0 560 0 0 0 100 4 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 5 0 0 3 216 102 14 0 2 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 17 323 158 116 1 0 0 0 274 0 0 0 100 March 4, 2026 at 01:30:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 138 1 0 0 0 1095 0 1 0 99 1 0 0 0 12 2 8 0 0 1 0 0 0 0 0 100 2 0 0 0 15 3 12 1 0 5 0 593 0 0 0 100 3 0 0 7 14 5 10 0 0 5 0 559 0 0 0 100 4 0 0 0 16 2 10 0 0 0 0 2 0 0 0 100 5 0 0 3 210 101 2 0 1 0 0 0 0 0 0 100 6 0 0 0 11 0 12 0 1 1 0 0 0 0 0 100 7 0 0 17 325 160 122 0 1 3 0 273 0 0 0 100 March 4, 2026 at 01:30:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 2150 142 193 1 3 0 0 735 0 1 0 99 1 0 0 0 12 2 36 0 3 2 0 371 0 0 0 100 2 0 0 0 17 4 12 1 0 7 0 602 0 0 0 100 3 0 0 7 16 6 12 0 0 7 0 560 0 0 0 100 4 0 0 0 17 2 10 0 0 1 0 3 0 0 0 100 5 0 0 3 207 101 0 0 0 1 0 0 0 0 0 100 6 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 7 0 0 17 245 120 40 0 0 1 0 278 0 0 0 100 March 4, 2026 at 01:30:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 151 206 0 0 0 0 1 0 0 0 100 1 1 0 0 18 5 40 1 0 0 0 1089 0 0 0 100 2 0 0 0 11 3 6 0 0 5 0 595 0 0 0 100 3 3 0 7 16 6 14 0 0 5 0 566 0 0 0 100 4 0 0 0 16 2 10 0 0 0 0 2 0 0 0 100 5 0 0 3 207 101 2 0 1 0 0 0 0 0 0 100 6 22 0 0 14 3 8 1 0 0 0 15 0 0 0 100 7 0 0 17 227 109 28 0 1 0 0 280 0 0 0 100 March 4, 2026 at 01:30:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 150 218 0 1 0 0 0 0 1 0 99 1 0 0 0 11 2 36 0 0 0 0 1072 0 0 0 100 2 0 0 0 11 3 6 0 0 7 0 593 0 0 0 100 3 0 0 7 22 8 20 1 0 9 0 565 0 0 0 100 4 0 0 0 16 1 12 0 0 0 0 7 0 0 0 100 5 0 0 3 215 106 6 0 0 1 0 29 0 0 0 100 6 4 0 0 10 1 8 0 1 0 0 9 0 0 0 100 7 0 0 17 225 108 22 1 0 0 0 274 0 0 0 100 March 4, 2026 at 01:30:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 150 206 0 0 0 0 0 0 1 0 99 1 0 0 0 12 2 36 1 0 0 0 1073 0 0 0 100 2 0 0 0 14 4 8 1 0 4 0 595 0 0 0 100 3 0 0 7 15 5 12 0 0 4 0 552 0 0 0 100 4 0 0 0 16 2 10 0 0 0 0 2 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 17 224 109 20 0 0 0 0 272 0 0 0 100 March 4, 2026 at 01:30:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 150 208 0 0 0 0 0 0 1 0 99 1 0 0 0 20 3 50 1 2 2 0 1072 0 0 0 100 2 0 0 0 15 3 12 1 0 5 0 593 0 0 0 100 3 0 0 7 14 5 10 0 0 11 0 568 0 0 0 100 4 0 0 0 14 1 8 0 0 0 0 0 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 6 0 2 0 0 3 0 0 0 0 0 100 7 0 0 17 222 108 18 1 0 2 0 275 0 0 0 100 March 4, 2026 at 01:30:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 40672 0 28 2612 115 875 42 113 141 45 4024 14 10 0 76 1 3081 0 29 457 6 785 32 141 125 31 4281 3 3 0 93 2 389 0 18 368 5 638 9 94 35 37 2915 4 1 0 94 3 1876 0 192 502 6 940 33 126 48 35 4220 3 2 0 95 4 672 0 8 361 5 612 10 98 30 27 2005 2 1 0 96 5 941 0 10 513 104 509 22 78 37 24 2650 5 2 0 93 6 2277 0 117 360 13 734 18 100 68 33 2644 3 2 0 95 7 868 0 62 515 134 539 10 79 71 22 2186 2 1 0 97 March 4, 2026 at 01:30:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 100 6 0 1 0 0 16 0 1 0 99 1 17 0 0 34 4 52 1 3 0 0 1103 0 0 0 100 2 44 0 28 32 7 28 0 3 5 0 610 0 1 0 99 3 11 0 7 128 4 119 2 3 5 0 593 0 0 0 100 4 21 0 0 24 2 12 0 3 0 0 11 0 0 0 100 5 1 0 10 219 101 7 0 2 0 0 5 0 0 0 100 6 1 0 0 22 1 10 0 1 0 0 29 0 0 0 100 7 3 0 45 315 153 106 1 0 0 0 289 0 0 0 100 March 4, 2026 at 01:30:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 100 6 0 0 0 0 0 0 1 0 99 1 0 0 0 58 2 44 1 0 0 0 1088 0 0 0 100 2 0 0 21 59 9 20 1 0 6 0 603 0 1 0 99 3 0 0 238 120 4 114 0 0 7 0 560 0 0 0 99 4 0 0 0 56 3 24 0 1 0 0 13 0 0 0 100 5 0 0 3 252 106 8 0 2 1 0 8 0 0 0 100 6 0 0 0 48 2 8 0 0 0 0 7 0 0 0 100 7 0 0 17 347 153 110 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:30:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 2 0 0 0 0 0 0 0 0 100 1 0 0 0 23 2 46 1 0 0 0 1086 0 0 0 100 2 0 0 0 24 9 18 1 0 6 0 602 0 0 0 100 3 0 0 7 115 4 112 0 0 4 0 558 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 3 213 102 10 0 1 0 0 0 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 17 310 153 106 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:30:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6277 0 145 2709 101 1076 46 212 234 71 4618 4 5 0 90 1 9518 0 32 677 4 1099 48 219 204 50 5219 8 5 0 87 2 4118 0 208 555 11 1012 27 203 179 67 4560 5 4 0 91 3 15360 0 28 685 59 1068 36 198 117 60 4317 6 7 0 87 4 2075 0 12 551 4 875 20 200 167 49 4732 4 2 0 93 5 23240 0 142 735 104 822 31 156 153 70 3189 9 5 0 86 6 1578 0 194 587 12 1074 34 183 163 56 2556 3 3 0 95 7 1379 0 106 682 136 815 22 130 139 58 3186 4 3 0 93 March 4, 2026 at 01:30:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 21 2122 102 57 1 6 1 0 285 0 0 0 99 1 0 0 0 36 3 44 0 1 1 0 1113 0 0 0 100 2 2 0 0 32 4 14 0 1 8 0 600 0 0 0 100 3 17 0 7 138 57 122 1 0 27 0 584 0 1 0 99 4 24 0 0 91 5 68 0 3 1 0 12 0 0 0 100 5 0 0 7 224 101 7 0 3 0 0 12 0 0 0 100 6 44 0 0 37 4 20 0 3 5 0 21 0 0 0 100 7 0 0 91 218 103 8 0 1 7 0 17 0 1 0 99 March 4, 2026 at 01:30:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2143 104 114 0 0 1 0 267 0 1 0 99 1 0 0 0 53 4 44 1 2 1 0 1088 0 0 0 100 2 0 0 0 50 4 12 1 2 3 0 593 0 0 0 100 3 0 0 238 80 34 80 0 4 8 0 563 0 1 0 99 4 0 0 0 90 24 48 0 2 0 0 2 0 0 0 100 5 0 0 3 247 101 6 0 1 0 0 0 0 0 0 100 6 0 0 0 54 6 16 0 1 0 0 10 0 0 0 100 7 0 0 10 251 102 18 0 1 3 0 0 0 1 0 99 March 4, 2026 at 01:30:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2143 101 114 0 1 0 0 266 0 1 0 99 1 0 0 0 52 2 38 1 1 1 0 1086 0 0 0 100 2 0 0 0 50 3 6 1 0 3 0 594 0 0 0 100 3 0 0 238 21 4 18 0 0 13 0 560 0 1 0 99 4 0 0 0 154 53 114 0 0 0 0 15 0 0 0 100 5 0 0 3 254 106 4 0 0 0 0 7 0 0 0 100 6 0 0 0 59 7 18 0 0 0 0 14 0 0 0 100 7 0 0 38 246 102 8 0 0 2 0 0 0 1 0 99 March 4, 2026 at 01:30:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 42 0 18 2192 101 243 0 24 13 25 562 0 1 0 99 1 88 0 9 86 2 142 3 19 29 18 2397 0 1 0 99 2 131 0 7 74 5 113 0 24 23 22 1307 0 0 0 100 3 34 0 16 81 4 100 1 21 15 12 768 0 0 0 99 4 25 0 17 173 52 188 1 20 10 8 270 0 1 0 99 5 17 0 26 266 102 75 3 17 27 6 229 0 1 0 99 6 3781 0 124 103 11 172 2 25 51 23 927 1 2 0 97 7 663 0 15 289 102 147 3 27 34 23 468 0 0 0 99 March 4, 2026 at 01:30:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3911 0 348 2786 105 1385 37 255 227 82 4408 5 5 0 89 1 1788 0 7 798 4 1348 50 257 206 62 6391 7 3 0 90 2 1496 0 11 669 33 1146 25 200 191 60 4371 4 2 0 94 3 1537 0 15 683 60 1143 52 218 164 39 5172 5 3 0 92 4 769 0 9 579 18 987 25 187 168 28 2949 5 2 0 93 5 565 0 76 704 106 841 21 136 191 18 2413 3 3 0 94 6 39711 0 217 646 4 1186 35 197 199 30 4272 13 10 0 77 7 10108 0 119 791 106 846 35 114 214 49 3929 10 4 0 86 March 4, 2026 at 01:30:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 518 2106 101 107 0 1 1 0 266 0 2 0 98 1 0 0 0 93 4 46 1 2 8 0 1390 0 1 0 99 2 0 0 0 187 53 108 1 0 3 0 595 0 0 0 100 3 0 0 7 85 3 10 0 1 0 0 263 0 0 0 100 4 0 0 0 80 2 2 0 0 0 0 2 0 0 0 100 5 0 0 3 283 101 4 0 1 1 0 0 0 0 0 100 6 44 0 0 99 7 22 0 0 0 0 9 0 0 0 100 7 0 0 3 283 102 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:30:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 104 0 2 0 0 266 0 0 0 100 1 0 0 0 21 4 41 1 0 7 0 1383 0 0 0 100 2 0 0 0 112 52 106 1 1 2 0 594 0 0 0 100 3 0 0 7 18 3 20 0 1 0 0 260 0 0 0 100 4 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 25 6 20 0 0 0 0 9 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:30:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 106 0 0 0 0 266 0 0 0 100 1 0 0 0 17 3 42 1 1 1 0 1388 0 0 0 100 2 0 0 0 109 52 104 0 0 1 0 594 0 0 0 100 3 0 0 7 14 3 10 0 0 0 0 260 0 0 0 100 4 0 0 0 13 2 12 0 1 0 0 2 0 0 0 100 5 0 0 3 219 107 14 0 0 0 0 15 0 0 0 100 6 0 0 0 23 6 18 0 1 0 0 16 0 0 0 100 7 0 0 3 217 103 16 0 2 0 0 5 0 0 0 100 March 4, 2026 at 01:30:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5809 0 328 2706 102 1247 38 260 163 71 5209 5 5 0 90 1 1709 0 7 736 11 1302 37 251 106 78 6729 5 3 0 92 2 1197 0 8 610 26 1101 43 216 149 59 5622 5 2 0 93 3 1000 0 19 671 2 1215 38 234 85 51 4377 6 3 0 91 4 1620 0 147 590 13 1075 24 211 78 53 3930 5 3 0 92 5 3754 0 50 786 106 909 29 153 141 60 3248 7 3 0 90 6 7107 0 192 599 10 1157 29 212 179 61 6044 7 5 0 89 7 42252 0 124 836 108 954 45 161 121 46 4079 15 10 0 74 March 4, 2026 at 01:30:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 14 2167 104 178 0 12 74 0 279 0 1 0 99 1 12 0 0 122 20 191 1 17 97 0 1417 0 1 0 99 2 46 0 0 156 41 181 1 16 72 0 620 0 0 0 100 3 17 0 0 123 59 88 0 14 91 0 28 0 0 0 100 4 0 0 77 74 4 124 0 22 69 0 288 0 1 0 99 5 0 0 3 267 102 86 0 8 60 0 10 0 0 0 100 6 3 0 7 91 1 147 0 17 71 0 9 0 0 0 100 7 0 0 17 281 102 110 0 10 65 0 12 0 0 0 100 March 4, 2026 at 01:30:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 364 2113 102 56 0 1 2 0 266 0 1 0 99 1 0 0 0 130 6 96 1 2 1 0 1388 0 0 0 99 2 0 0 0 188 59 126 1 1 1 0 603 0 0 0 100 3 0 0 0 66 2 4 0 1 1 0 0 0 0 0 100 4 0 0 42 65 4 9 0 1 3 0 263 0 1 0 99 5 0 0 3 264 101 2 0 0 1 0 0 0 0 0 100 6 0 0 0 70 1 14 0 1 1 0 0 0 0 0 100 7 0 0 3 265 101 4 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:30:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2124 104 14 0 2 0 0 267 0 1 0 99 1 3 0 0 137 5 148 0 2 3 0 1393 0 0 0 99 2 6 0 0 147 60 288 0 2 3 0 937 0 0 0 100 3 0 0 0 25 1 4 0 0 0 0 0 0 0 0 100 4 0 0 119 13 4 9 0 0 0 0 262 0 0 0 100 5 0 0 3 224 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 23 1 2 0 0 0 0 2 0 0 0 100 7 0 0 3 222 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:30:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2733 0 42 2350 101 513 10 86 89 46 2120 2 3 0 96 1 2403 0 15 278 8 474 14 97 66 31 3070 1 2 0 97 2 2783 0 14 387 58 432 6 59 57 33 2444 3 1 0 96 3 2322 0 323 199 2 355 8 71 37 36 1719 2 2 0 96 4 415 0 27 266 3 459 6 87 59 51 1588 1 1 0 98 5 2519 0 11 422 109 373 3 64 46 42 2370 1 2 0 97 6 304 0 28 193 0 309 6 69 34 27 1170 1 2 0 97 7 458 0 46 407 101 350 6 58 46 24 1275 1 1 0 98 March 4, 2026 at 01:30:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6477 0 202 2566 106 791 35 138 131 35 3896 4 5 0 90 1 3822 0 316 523 39 944 39 172 141 39 4423 3 3 0 93 2 586 0 9 410 5 697 31 133 58 34 2935 2 2 0 96 3 749 0 2 398 2 671 43 142 52 27 1786 2 1 0 96 4 2976 0 26 501 5 641 29 123 72 28 2407 6 2 0 92 5 33296 0 15 554 106 529 31 92 67 20 2286 12 8 0 80 6 1416 0 2 339 10 599 24 107 54 18 2192 3 2 0 95 7 841 0 33 561 105 644 33 99 57 14 3442 3 2 0 95 March 4, 2026 at 01:30:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 56 2229 107 101 0 14 71 0 277 0 2 0 98 1 0 0 462 195 48 257 0 15 102 0 1387 0 1 0 99 2 0 0 0 202 8 159 1 16 85 0 593 0 0 0 99 3 0 0 0 178 53 97 0 18 82 0 0 0 0 0 100 4 0 0 7 141 4 123 1 18 100 0 263 0 0 0 100 5 0 0 3 313 101 62 0 12 50 0 0 0 0 0 100 6 0 0 0 117 0 82 0 15 82 0 0 0 0 0 100 7 0 0 3 359 101 163 0 10 52 0 0 0 0 0 100 March 4, 2026 at 01:30:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 107 34 0 1 0 0 275 0 1 0 99 1 0 0 0 21 2 50 1 2 2 0 1388 0 0 0 100 2 0 0 0 116 54 108 0 0 3 0 596 0 0 0 100 3 0 0 0 98 5 92 0 1 0 0 2 0 0 0 100 4 0 0 7 9 3 4 0 0 0 0 260 0 0 0 100 5 0 0 3 221 101 14 0 2 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:30:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2117 107 118 1 1 0 0 275 0 1 0 99 1 0 0 0 18 2 40 3 0 1 0 1386 0 0 0 100 2 0 0 0 116 53 116 0 1 6 0 593 0 0 0 100 3 0 0 0 21 4 16 0 1 0 0 0 0 0 0 100 4 0 0 7 9 3 4 0 0 0 0 260 0 0 0 100 5 0 0 3 210 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:30:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1432 0 37 2760 106 1178 57 241 106 57 5976 5 5 0 90 1 36780 0 147 677 4 1201 61 248 120 66 6256 14 10 0 75 2 5553 0 9 610 21 1050 40 179 144 61 6368 6 4 0 90 3 9162 0 255 672 10 1234 37 202 138 58 5127 8 4 0 87 4 6008 0 46 725 18 1118 42 191 161 52 4255 6 4 0 90 5 1432 0 29 782 106 1001 36 167 75 76 3814 4 2 0 94 6 1519 0 7 579 16 1026 28 181 74 63 3530 3 2 0 95 7 1738 0 269 623 102 778 19 138 58 51 2474 3 3 0 95 March 4, 2026 at 01:30:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 70 2112 101 102 0 4 5 0 9 0 1 0 99 1 0 0 0 34 2 50 0 4 7 0 1416 0 1 0 99 2 0 0 7 28 3 14 0 2 2 0 609 0 0 0 100 3 17 0 0 48 6 35 0 4 2 0 20 0 0 0 100 4 47 0 7 140 56 126 0 3 0 0 277 0 0 0 100 5 3 0 17 230 104 10 0 2 0 0 271 0 0 0 100 6 24 0 0 24 1 7 0 3 3 0 22 0 0 0 100 7 11 0 17 222 102 5 0 2 2 0 22 0 0 0 100 March 4, 2026 at 01:30:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2204 100 131 0 15 62 0 0 0 2 0 98 1 0 0 462 70 2 133 1 13 72 0 1387 0 1 0 98 2 0 0 0 117 3 61 1 7 51 0 594 0 0 0 100 3 0 0 0 186 60 85 0 16 62 0 2 0 0 0 100 4 0 0 7 184 27 163 0 18 93 0 272 0 0 0 99 5 0 0 17 330 103 107 0 19 87 0 266 0 0 0 100 6 0 0 0 190 32 165 0 20 93 0 0 0 0 0 100 7 0 0 3 400 101 221 0 18 75 0 0 0 0 0 100 March 4, 2026 at 01:30:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 104 0 0 1 0 1 0 0 0 100 1 0 0 0 17 3 36 2 0 6 0 1386 0 0 0 100 2 0 0 0 14 4 6 0 0 3 0 594 0 0 0 100 3 0 0 0 24 5 16 0 0 1 0 0 0 0 0 100 4 0 0 7 24 10 16 0 0 1 0 269 0 0 0 100 5 0 0 21 211 102 6 1 1 0 0 266 0 0 0 100 6 0 0 0 108 51 100 0 0 1 0 0 0 0 0 100 7 0 0 7 207 101 0 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:30:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 669 0 20 2372 102 497 12 93 54 42 1930 2 2 0 96 1 2030 0 315 275 4 502 17 97 72 54 4076 2 3 0 96 2 29756 0 24 257 5 369 12 82 32 39 3494 8 5 0 86 3 419 0 15 314 9 550 9 113 62 54 1556 1 2 0 97 4 3467 0 133 273 14 424 13 79 87 41 2221 2 2 0 96 5 4392 0 34 453 103 409 5 78 77 55 2044 2 2 0 96 6 4935 0 18 385 40 464 6 71 72 50 2494 3 2 0 96 7 405 0 58 442 102 405 6 65 42 46 1382 1 1 0 98 March 4, 2026 at 01:30:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 752 0 70 2435 104 647 37 113 45 14 1855 3 3 0 95 1 487 0 0 532 45 864 30 123 37 7 3702 4 2 0 94 2 7088 0 35 383 2 540 37 82 43 7 1651 6 4 0 90 3 2186 0 180 313 7 550 22 85 62 17 2513 3 2 0 95 4 1110 0 8 307 5 495 16 76 84 16 2183 2 2 0 96 5 2489 0 21 502 110 498 14 64 55 8 2179 2 2 0 96 6 2826 0 9 237 1 405 17 73 45 8 1879 2 2 0 96 7 816 0 32 428 102 408 24 67 53 13 1415 2 1 0 97 March 4, 2026 at 01:30:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2184 107 19 0 2 2 0 9 0 2 0 98 1 0 0 462 207 52 228 0 0 13 0 1388 0 1 0 99 2 0 0 0 106 3 28 0 2 0 0 22 0 0 0 100 3 0 0 0 97 5 20 1 0 3 0 597 0 0 0 100 4 0 0 7 83 4 4 0 0 0 0 263 0 0 0 100 5 2 0 16 286 104 6 0 0 0 0 266 0 0 0 100 6 0 0 0 85 3 8 0 0 0 0 3 0 0 0 100 7 0 0 4 281 101 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:30:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2202 108 185 0 30 97 0 10 0 1 0 99 1 0 0 0 183 52 269 2 20 128 0 1389 0 1 0 99 2 0 0 0 168 1 223 0 19 97 0 0 0 0 0 100 3 0 0 0 193 122 127 0 32 90 0 594 0 0 0 100 4 0 0 7 85 4 158 0 22 126 0 260 0 0 0 100 5 0 0 16 286 103 153 1 20 91 0 266 0 0 0 100 6 0 0 0 83 0 158 0 27 129 0 0 0 0 0 100 7 0 0 4 384 101 354 0 24 90 0 0 0 0 0 100 March 4, 2026 at 01:30:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 107 28 0 1 0 0 10 0 0 0 100 1 0 0 0 116 52 140 1 1 6 0 1390 0 0 0 100 2 0 0 0 110 2 104 0 0 0 0 1 0 0 0 100 3 0 0 0 24 5 18 1 0 1 0 595 0 0 0 100 4 0 0 7 9 3 4 0 0 0 0 260 0 0 0 100 5 0 0 16 211 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:30:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32625 0 37 2804 108 1194 60 247 494 68 6403 15 11 0 73 1 24816 0 201 686 15 1246 63 259 382 76 5217 10 6 0 84 2 2047 0 133 669 4 1182 57 228 60 66 5760 6 3 0 91 3 4513 0 215 753 6 1235 44 228 167 72 4727 6 4 0 90 4 3020 0 50 675 4 1051 42 202 93 53 3491 5 2 0 93 5 8810 0 26 777 106 792 44 163 133 44 3851 7 3 0 90 6 6865 0 191 581 29 1034 41 192 135 52 4643 6 4 0 90 7 6964 0 97 674 103 831 39 165 153 55 3621 4 4 0 92 March 4, 2026 at 01:30:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 7 2130 104 31 2 3 0 0 39 0 0 0 99 1 8 0 70 28 1 32 0 2 10 0 333 0 1 0 99 2 16 0 0 130 3 144 1 2 9 0 1116 0 1 0 99 3 0 0 0 36 5 18 2 1 0 0 620 0 0 0 100 4 50 0 7 38 6 26 0 4 1 0 286 0 0 0 100 5 2 0 17 232 108 8 0 1 0 0 267 0 0 0 100 6 11 0 0 61 18 43 1 1 0 0 36 0 0 0 100 7 1 0 17 292 134 78 0 1 0 0 4 0 0 0 100 March 4, 2026 at 01:30:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 103 10 0 1 0 0 1 0 1 0 99 1 0 0 42 83 1 12 1 2 3 0 298 0 1 0 99 2 0 0 462 121 1 146 1 1 2 0 1088 0 1 0 99 3 0 0 0 88 4 12 0 1 1 0 595 0 0 0 100 4 0 0 7 99 8 22 0 0 0 0 268 0 0 0 100 5 0 0 17 284 104 4 1 0 0 0 266 0 0 0 100 6 0 0 0 79 0 0 0 0 0 0 0 0 0 0 100 7 0 0 3 382 151 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:30:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 103 146 1 15 88 0 6 0 1 0 99 1 0 0 0 64 1 105 0 16 79 0 302 0 0 0 100 2 0 0 0 118 1 189 1 5 79 0 1089 0 0 0 99 3 0 0 0 123 80 75 1 14 59 0 596 0 0 0 100 4 0 0 7 82 9 132 2 14 99 0 269 0 0 0 100 5 0 0 17 271 110 112 0 14 78 0 266 0 0 0 100 6 0 0 0 57 0 105 0 19 71 0 0 0 0 0 100 7 0 0 3 418 151 322 0 10 71 0 0 0 0 0 100 March 4, 2026 at 01:30:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9980 0 63 2777 104 1000 44 177 181 51 4491 7 4 0 88 1 2204 0 21 633 4 1145 39 230 130 80 5912 6 4 0 91 2 1694 0 2 563 3 1014 31 191 90 67 4684 4 2 0 94 3 2807 0 139 540 9 988 29 188 118 68 4657 4 4 0 93 4 26976 0 42 555 12 916 26 170 66 54 4234 11 8 0 81 5 955 0 32 620 111 627 17 120 85 40 2434 2 2 0 96 6 654 0 9 499 4 836 21 148 87 34 2791 3 2 0 94 7 11470 0 549 670 133 949 24 144 179 84 4418 5 6 0 89 March 4, 2026 at 01:30:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 63 0 0 2130 103 114 0 3 0 0 23 0 1 0 99 1 3 0 0 33 2 17 1 2 0 0 23 1 0 0 99 2 8 0 0 28 2 42 2 2 2 0 1427 2 0 0 98 3 68 0 7 138 56 124 1 5 0 0 614 0 0 0 100 4 13 0 77 19 4 9 0 2 4 0 274 0 1 0 99 5 6 0 17 240 103 34 0 6 5 0 274 0 0 0 100 6 0 0 0 26 2 6 0 0 0 0 19 0 0 0 100 7 16 0 17 227 103 12 0 0 1 0 21 0 0 0 100 March 4, 2026 at 01:30:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 103 114 0 0 0 0 7 0 1 0 99 1 0 0 0 16 1 10 0 0 0 0 8 0 0 0 100 2 0 0 0 14 2 34 2 0 3 0 1389 0 0 0 100 3 0 0 0 130 59 122 0 0 4 0 603 0 0 0 100 4 0 0 14 14 3 8 0 2 4 0 263 0 1 0 99 5 0 0 31 224 107 14 1 0 5 0 266 0 1 0 99 6 0 0 0 13 0 10 0 0 0 0 12 0 0 0 100 7 0 0 3 215 101 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:30:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 101 104 0 0 0 0 0 0 1 0 99 1 0 0 0 81 1 8 0 0 0 0 0 0 0 0 100 2 0 0 0 81 3 36 1 0 2 0 1396 0 0 0 99 3 0 0 0 200 61 126 1 0 1 0 605 0 0 0 100 4 0 0 42 76 3 8 0 0 1 0 260 0 1 0 99 5 0 0 465 228 104 16 0 0 1 0 266 0 1 0 99 6 0 0 0 85 3 16 0 1 1 0 3 0 0 0 100 7 0 0 3 279 101 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 102 186 0 12 50 0 9 0 1 0 99 1 0 0 0 73 12 113 0 17 73 0 0 0 0 0 100 2 0 0 0 49 2 110 1 11 57 0 1391 0 0 0 100 3 0 0 0 202 107 171 0 17 68 0 616 0 0 0 100 4 0 0 7 56 3 103 0 16 82 0 259 0 0 0 100 5 0 0 17 256 104 92 0 14 92 0 266 0 0 0 100 6 0 0 0 57 0 103 0 18 69 0 0 0 0 0 100 7 0 0 3 303 101 190 0 14 66 0 0 0 0 0 100 March 4, 2026 at 01:31:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8481 0 481 2620 104 1021 40 174 146 64 6056 5 6 0 89 1 28331 0 28 748 33 1160 52 211 391 78 5683 14 8 0 78 2 32739 0 232 603 5 970 39 160 378 63 5982 15 10 0 75 3 1813 0 14 638 6 1203 38 231 147 78 4669 4 2 0 94 4 925 0 26 618 8 1083 26 172 94 70 3898 3 2 0 94 5 887 0 39 711 106 916 37 172 112 47 3422 5 3 0 92 6 8912 0 15 487 2 681 23 145 130 38 3080 8 4 0 88 7 872 0 107 621 115 678 18 123 112 44 2208 2 3 0 95 March 4, 2026 at 01:31:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 101 102 0 1 0 0 0 0 0 0 100 1 0 0 0 128 53 114 1 1 4 0 1 0 1 0 99 2 0 0 0 28 2 42 2 1 2 0 1380 0 0 0 100 3 0 0 0 28 4 10 0 0 6 0 595 0 0 0 100 4 44 0 7 37 10 20 1 0 0 0 272 0 0 0 100 5 2 0 23 225 102 12 1 2 1 0 266 0 0 0 100 6 0 0 0 23 0 6 0 2 0 0 0 0 0 0 100 7 0 0 74 212 101 2 0 0 5 0 0 0 1 0 99 March 4, 2026 at 01:31:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 100 106 0 0 0 0 5 0 1 0 99 1 0 0 462 27 5 16 0 0 1 0 7 0 1 0 99 2 0 0 0 179 49 132 1 1 4 0 1393 0 1 0 99 3 0 0 0 95 5 22 1 2 3 0 596 0 0 0 100 4 0 0 7 94 9 18 0 1 0 0 268 0 0 0 100 5 0 0 17 293 110 8 0 1 0 0 289 0 0 0 100 6 0 0 0 97 3 26 0 0 0 0 18 0 0 0 100 7 0 0 45 279 101 10 0 2 2 0 0 0 1 0 99 March 4, 2026 at 01:31:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 0 0 100 1 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 2 0 0 0 50 22 72 1 0 5 0 1377 0 0 0 100 3 0 0 0 77 34 74 0 1 8 0 594 0 0 0 100 4 0 0 7 25 11 20 0 0 0 0 269 0 0 0 100 5 0 0 17 213 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 7 0 0 3 210 101 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27550 0 35 2697 103 1041 34 193 173 47 3784 11 10 0 79 1 7109 0 289 662 3 1065 37 197 213 55 4128 6 5 0 89 2 7740 0 125 530 3 995 30 167 247 65 5039 4 4 0 92 3 8024 0 41 814 104 1295 36 193 229 61 5501 7 5 0 88 4 2456 0 23 559 11 948 13 167 194 55 4816 5 2 0 93 5 849 0 28 771 103 1003 12 169 182 71 3362 5 2 0 93 6 1843 0 205 521 9 925 18 151 177 61 4052 6 2 0 92 7 1025 0 76 678 114 831 16 154 126 53 2529 2 2 0 96 March 4, 2026 at 01:31:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2114 101 106 0 3 4 0 9 0 1 0 99 1 22 0 0 42 5 26 0 3 5 0 28 0 1 0 99 2 13 0 0 31 3 40 2 3 3 0 1418 0 0 0 100 3 0 0 0 31 5 12 0 2 3 0 604 0 0 0 100 4 45 0 7 46 10 33 0 3 3 0 278 0 0 0 100 5 26 0 24 231 103 18 1 3 1 0 277 0 0 0 100 6 0 0 0 29 1 12 0 1 1 0 11 0 0 0 100 7 0 0 17 321 151 106 0 3 1 0 6 0 0 0 100 March 4, 2026 at 01:31:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2157 101 76 0 2 2 0 1 0 1 0 99 1 0 0 350 24 2 20 0 0 3 0 1 0 1 0 99 2 0 0 0 66 2 34 1 0 3 0 1384 0 0 0 99 3 0 0 0 73 5 12 1 1 5 0 597 0 0 0 100 4 0 0 7 81 11 20 0 0 0 0 272 0 0 0 100 5 0 0 16 266 102 6 0 1 0 0 266 0 0 0 100 6 0 0 0 71 1 12 0 1 0 0 1 0 0 0 100 7 0 0 4 392 152 132 0 3 0 0 1 0 0 0 100 March 4, 2026 at 01:31:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2107 100 111 0 1 0 0 5 0 1 0 99 1 0 0 0 29 1 10 0 0 0 0 7 0 0 0 100 2 0 0 0 26 2 34 1 0 1 0 1385 0 0 0 100 3 0 0 0 31 4 10 0 0 2 0 594 0 0 0 100 4 0 0 7 45 11 24 0 1 0 0 269 0 0 0 100 5 0 0 17 235 110 6 0 0 0 0 266 0 0 0 100 6 0 0 0 39 2 28 0 2 0 0 15 0 0 0 100 7 0 0 3 326 151 106 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 71 0 22 2206 100 248 0 34 20 18 369 0 1 0 98 1 1043 0 142 89 1 172 5 23 26 33 1835 0 4 0 96 2 78 0 9 86 4 166 0 33 29 25 1760 0 1 0 99 3 29 0 5 104 5 157 3 25 29 26 949 0 0 0 99 4 2099 0 20 125 12 173 3 29 37 22 910 1 1 0 98 5 2903 0 22 273 103 99 0 20 37 14 764 1 1 0 98 6 2360 0 10 106 3 179 1 36 67 28 798 1 1 0 98 7 521 0 14 385 151 249 1 29 29 24 336 0 0 0 99 March 4, 2026 at 01:31:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27260 0 14 2595 103 879 14 144 176 42 2817 11 9 0 81 1 1026 0 79 510 10 835 24 157 143 42 2439 4 3 0 93 2 3571 0 35 458 3 645 15 114 176 41 2718 4 2 0 94 3 816 0 12 527 65 774 10 141 186 23 2608 4 2 0 93 4 4173 0 190 524 40 810 15 132 230 33 3481 3 3 0 95 5 6979 0 31 678 105 732 11 84 159 35 2523 4 3 0 93 6 2374 0 115 442 4 843 17 143 180 62 3425 3 2 0 95 7 2072 0 282 493 105 511 15 91 127 39 4567 5 2 0 93 March 4, 2026 at 01:31:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 100 123 0 3 1 0 0 0 1 0 99 1 0 0 42 80 1 10 0 2 2 0 0 0 1 0 99 2 44 0 462 31 8 48 1 0 2 0 1096 0 1 0 99 3 0 0 0 86 3 8 0 0 0 0 2 0 0 0 100 4 0 0 7 185 55 108 0 0 5 0 863 0 0 0 100 5 2 0 17 283 103 4 0 0 0 0 296 0 0 0 100 6 0 0 0 84 3 6 1 0 6 0 295 0 0 0 100 7 0 0 3 284 101 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 17 2 18 0 1 0 0 1 0 0 0 100 2 0 0 0 20 7 44 1 0 0 0 1096 0 0 0 100 3 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 4 0 0 7 114 55 110 0 0 7 0 863 0 0 0 100 5 0 0 17 210 103 4 1 0 0 0 266 0 0 0 100 6 0 0 0 9 2 4 0 0 2 0 294 0 0 0 100 7 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 116 0 0 0 0 5 0 0 0 100 1 0 0 0 12 1 10 0 0 0 0 7 0 0 0 100 2 0 0 0 20 7 44 1 0 0 0 1094 0 0 0 100 3 0 0 0 13 3 8 0 0 0 0 2 0 0 0 100 4 0 0 7 114 55 108 1 0 8 0 857 0 0 0 100 5 0 0 17 214 108 4 0 0 1 0 266 0 0 0 100 6 0 0 0 18 4 18 0 0 8 0 309 0 0 0 100 7 0 0 3 210 101 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16461 0 49 2734 101 917 45 190 110 53 3190 10 7 0 83 1 24646 0 157 607 8 1069 26 178 100 65 3964 9 8 0 83 2 5200 0 16 556 17 952 20 152 123 53 4701 4 4 0 92 3 6522 0 194 513 7 899 30 161 136 56 5629 7 4 0 89 4 7703 0 312 553 27 1086 34 183 166 77 6719 7 5 0 88 5 974 0 28 687 115 902 21 162 88 82 3244 3 2 0 95 6 886 0 11 492 3 813 10 144 63 47 3186 4 2 0 94 7 1302 0 95 557 101 605 11 100 93 39 2783 2 2 0 96 March 4, 2026 at 01:31:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2169 105 187 0 12 53 0 21 0 1 0 99 1 11 0 70 62 2 101 0 19 98 0 22 0 1 0 99 2 2 0 7 71 1 121 1 10 47 0 1108 0 1 0 99 3 0 0 0 209 97 187 0 13 86 0 18 0 0 0 100 4 1 0 7 78 5 112 1 23 89 0 884 0 0 0 100 5 28 0 17 357 121 235 0 10 69 0 278 0 0 0 100 6 3 0 0 80 3 116 1 18 90 0 303 0 0 0 100 7 21 0 17 262 104 81 0 5 64 0 20 0 0 0 100 March 4, 2026 at 01:31:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 100 108 0 0 1 0 0 0 1 0 99 1 0 0 42 79 2 6 0 0 3 0 0 0 1 0 99 2 0 0 462 19 2 36 1 1 3 0 1086 0 1 0 99 3 0 0 0 186 53 108 0 2 0 0 0 0 0 0 100 4 0 0 7 100 12 22 0 1 15 0 875 0 0 0 100 5 0 0 17 282 103 4 1 0 1 0 266 0 0 0 100 6 0 0 0 84 3 4 0 0 7 0 294 0 0 0 100 7 0 0 3 278 101 0 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:31:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 0 0 0 1 0 0 0 100 1 0 0 0 12 2 8 0 0 0 0 1 0 0 0 100 2 0 0 0 7 1 32 0 0 1 0 1085 0 0 0 100 3 0 0 0 115 53 110 0 0 0 0 2 0 0 0 100 4 0 0 7 31 11 30 1 1 9 0 697 0 0 0 100 5 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 6 0 0 0 10 2 6 0 1 8 0 467 0 0 0 100 7 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1410 0 150 2355 101 528 8 103 51 47 1225 1 3 0 96 1 1576 0 133 298 1 511 14 95 66 61 3717 2 2 0 96 2 954 0 12 288 3 472 9 81 65 52 3779 2 2 0 96 3 7701 0 204 385 44 650 9 118 102 60 3467 3 3 0 94 4 26521 0 32 356 12 433 15 78 90 42 2552 8 4 0 87 5 398 0 39 474 110 399 2 76 71 46 1296 1 2 0 97 6 277 0 13 270 10 383 4 76 65 47 1740 1 1 0 99 7 166 0 58 380 102 262 2 59 32 30 864 0 0 0 99 March 4, 2026 at 01:31:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 933 0 72 2414 101 706 23 97 46 26 2037 3 3 0 94 1 1529 0 0 421 4 752 36 113 53 15 2435 4 2 0 94 2 860 0 0 297 5 529 15 68 58 16 2875 2 2 0 96 3 3738 0 2 330 3 588 21 83 91 17 2291 3 2 0 95 4 14985 0 197 227 5 417 14 68 71 16 2698 9 6 0 85 5 383 0 25 470 106 478 14 65 33 22 1827 2 1 0 97 6 1378 0 16 416 10 673 35 97 54 14 2246 4 1 0 95 7 707 0 31 581 141 640 20 69 64 14 1711 2 1 0 97 March 4, 2026 at 01:31:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2213 100 170 0 14 96 0 0 0 2 0 98 1 0 0 462 85 0 133 0 24 88 0 0 0 1 0 99 2 0 0 0 122 1 119 1 15 96 0 1086 0 1 0 99 3 0 0 0 177 56 88 0 14 74 0 0 0 0 0 100 4 0 0 7 132 5 106 0 21 70 0 263 0 0 0 100 5 3 0 17 375 104 185 1 13 75 0 565 0 0 0 100 6 44 0 0 144 8 112 0 18 67 0 603 0 0 0 100 7 0 0 3 414 152 170 0 14 80 0 1 0 0 0 100 March 4, 2026 at 01:31:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 52 0 3 0 0 0 0 0 0 100 1 0 0 0 73 0 64 0 2 0 0 0 0 0 0 100 2 0 0 0 10 2 34 1 0 0 0 1088 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 4 0 0 7 13 4 8 0 0 0 0 260 0 0 0 100 5 0 0 17 211 104 8 0 1 3 0 570 0 0 0 100 6 0 0 0 27 9 24 1 1 6 0 603 0 0 0 100 7 0 0 3 313 151 112 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:31:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 16 0 12 0 0 0 0 0 0 0 0 100 2 0 0 0 8 1 32 1 0 1 0 1085 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 7 13 4 8 0 0 0 0 260 0 0 0 100 5 0 0 17 212 104 6 1 0 7 0 565 0 0 0 100 6 0 0 0 24 9 20 1 0 6 0 602 0 0 0 100 7 0 0 3 306 151 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2305 0 124 2714 112 1148 33 247 121 63 3915 4 3 0 92 1 33700 0 12 737 21 1081 72 216 472 31 4359 13 7 0 81 2 26818 0 44 614 1 1087 42 217 316 54 3637 11 10 0 79 3 6375 0 228 649 5 1073 43 236 158 56 6172 8 5 0 87 4 9270 0 377 557 6 980 46 186 225 80 5046 6 5 0 88 5 8424 0 35 787 108 893 25 156 175 65 5698 6 4 0 91 6 1669 0 18 576 12 1134 39 215 113 72 4567 5 2 0 93 7 1084 0 65 696 118 909 29 158 114 65 2567 3 2 0 96 March 4, 2026 at 01:31:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 7 2124 101 98 0 3 4 0 9 0 1 0 99 1 50 0 0 161 53 148 1 2 1 0 20 0 0 0 100 2 1 0 70 15 1 11 0 4 4 0 6 0 1 0 99 3 0 0 7 32 5 44 1 0 6 0 1374 0 0 0 100 4 0 0 0 26 2 10 0 1 0 0 7 0 0 0 100 5 13 0 17 231 105 14 1 0 6 0 584 0 0 0 100 6 8 0 0 28 3 14 1 2 0 0 615 0 0 0 100 7 17 0 17 227 103 12 0 1 3 0 25 0 0 0 100 March 4, 2026 at 01:31:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2225 100 197 0 16 73 0 0 0 1 0 99 1 0 0 0 230 56 191 0 15 80 0 9 0 0 0 100 2 0 0 42 114 0 82 0 11 78 0 0 0 1 0 99 3 0 0 469 123 62 139 1 20 83 0 1351 0 1 0 99 4 0 0 0 127 2 95 0 16 102 0 0 0 0 0 100 5 0 0 17 372 104 186 0 12 66 0 566 0 0 0 100 6 0 0 0 122 4 79 1 12 57 0 594 0 0 0 100 7 0 0 3 313 101 70 0 10 80 0 0 0 0 0 100 March 4, 2026 at 01:31:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 1 0 0 0 0 0 0 100 1 0 0 0 123 57 116 0 0 1 0 9 0 0 0 100 2 0 0 0 11 1 10 0 1 2 0 0 0 0 0 100 3 0 0 7 17 6 40 1 0 1 0 1349 0 0 0 100 4 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 5 0 0 17 212 104 8 1 0 11 0 567 0 0 0 100 6 0 0 0 14 4 6 1 0 7 0 594 0 0 0 100 7 0 0 3 206 101 0 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:31:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2066 0 135 2587 105 959 42 185 101 82 3352 5 4 0 92 1 521 0 50 666 44 1054 32 205 116 67 4754 3 3 0 93 2 772 0 11 453 1 811 23 172 66 53 2893 2 2 0 96 3 517 0 16 517 14 914 21 167 66 25 4543 2 2 0 95 4 30483 0 191 453 3 729 22 148 159 48 4276 12 10 0 79 5 4597 0 41 617 106 707 19 141 158 58 4372 3 3 0 94 6 8705 0 318 480 4 825 22 153 107 71 3860 4 4 0 92 7 5399 0 60 687 109 740 25 133 98 67 2454 4 2 0 94 March 4, 2026 at 01:31:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 656 0 0 2265 103 287 21 67 41 2 915 3 1 0 96 1 749 0 70 205 2 362 23 68 52 5 1402 2 2 0 97 2 350 0 7 165 3 259 13 48 31 2 810 2 1 0 98 3 102 0 7 170 9 324 12 53 18 0 2251 2 1 0 97 4 618 0 0 372 47 506 19 64 25 1 1327 2 1 0 98 5 137 0 17 355 111 258 16 46 25 1 1760 2 1 0 98 6 649 0 0 188 2 334 9 45 24 0 1393 1 1 0 98 7 403 0 45 348 102 291 12 48 17 2 889 3 1 0 96 March 4, 2026 at 01:31:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 100 98 0 2 0 0 0 0 1 0 99 1 0 0 42 78 1 8 0 1 10 0 294 0 1 0 99 2 0 0 0 96 8 18 0 0 0 0 31 0 0 0 100 3 0 0 469 37 6 58 1 1 2 0 1354 0 1 0 99 4 0 0 0 194 52 122 0 1 8 0 303 0 0 0 100 5 0 0 17 284 105 6 0 0 0 0 266 0 0 0 100 6 0 0 0 86 4 8 1 0 0 0 302 0 0 0 100 7 0 0 3 280 101 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 101 198 0 12 66 0 9 0 1 0 99 1 0 0 0 48 1 86 0 20 75 0 294 0 0 0 100 2 0 0 0 56 7 88 0 13 70 0 9 0 0 0 100 3 0 0 7 129 56 160 1 22 85 0 1367 0 0 0 99 4 0 0 0 164 52 211 1 18 90 0 299 0 0 0 100 5 0 0 17 298 104 180 0 16 68 0 266 0 0 0 100 6 0 0 0 50 2 89 0 15 86 0 300 0 0 0 100 7 0 0 3 243 101 76 0 11 78 0 1 0 0 0 100 March 4, 2026 at 01:31:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 13 1 10 1 0 6 0 294 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 10 0 0 0 100 3 0 0 7 25 6 50 1 0 1 0 1351 0 0 0 100 4 0 0 0 110 52 104 0 0 2 0 300 0 0 0 100 5 0 0 17 213 105 8 0 0 0 0 267 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 7 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2463 0 136 2667 104 1034 35 198 79 74 3411 4 4 0 92 1 4448 0 30 625 2 993 38 187 113 89 3935 8 3 0 88 2 2264 0 192 487 5 819 21 142 105 64 3705 4 3 0 93 3 1570 0 32 594 29 977 39 176 115 52 5671 5 4 0 91 4 5422 0 37 593 21 991 32 175 118 63 4844 6 3 0 91 5 3073 0 29 743 112 899 24 154 115 55 3459 3 3 0 95 6 31314 0 17 480 5 842 30 169 136 45 4903 11 10 0 79 7 6426 0 400 656 103 732 21 113 113 61 3147 6 4 0 91 March 4, 2026 at 01:31:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2128 105 118 1 0 0 0 13 0 0 0 99 1 0 0 0 25 1 6 0 0 11 0 294 0 0 0 100 2 0 0 0 25 1 6 1 0 0 0 6 0 0 0 100 3 0 0 7 133 54 116 0 0 0 0 265 0 0 0 100 4 0 0 70 15 2 7 0 3 15 0 310 0 1 0 99 5 2 0 17 243 111 24 0 0 5 0 282 0 1 0 99 6 0 0 7 29 3 42 2 2 1 0 1387 0 0 0 100 7 0 0 17 225 102 12 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:31:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 101 104 0 1 0 0 0 0 1 0 99 1 0 0 0 93 6 18 0 1 5 0 304 0 0 0 100 2 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 191 53 116 0 0 0 0 260 0 0 0 100 4 0 0 42 78 2 6 1 0 5 0 291 0 1 0 99 5 0 0 479 223 105 12 0 3 1 0 266 0 1 0 99 6 0 0 0 89 4 40 1 1 1 0 1386 0 0 0 100 7 0 0 3 281 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 100 195 0 15 69 0 0 0 0 0 100 1 0 0 0 66 7 103 1 16 78 0 303 0 0 0 100 2 0 0 0 49 0 93 0 19 74 0 0 0 0 0 100 3 0 0 7 207 103 188 1 14 65 0 262 0 0 0 100 4 0 0 0 51 3 89 0 14 74 0 298 0 0 0 100 5 0 0 17 294 105 172 0 19 67 0 267 0 0 0 100 6 0 0 0 48 4 101 1 15 37 0 1386 0 0 0 100 7 0 0 3 246 101 80 0 12 58 0 0 0 0 0 100 March 4, 2026 at 01:31:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5373 0 573 2610 110 1057 25 194 99 72 4610 6 5 0 90 1 3268 0 38 682 9 1124 41 217 146 83 4740 7 4 0 89 2 1058 0 23 633 3 1131 45 173 109 66 3602 3 2 0 94 3 1344 0 27 665 33 1176 26 193 115 52 4509 5 3 0 92 4 3280 0 11 544 5 998 24 172 124 52 4859 5 3 0 91 5 7233 0 30 675 108 801 32 143 110 53 4486 5 4 0 92 6 5808 0 25 534 8 995 26 185 123 63 4712 4 4 0 92 7 29846 0 86 703 106 791 35 123 97 50 4461 12 8 0 79 March 4, 2026 at 01:31:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2169 150 108 0 2 0 0 5 0 0 0 100 1 10 0 0 29 2 14 0 0 2 0 318 0 0 0 100 2 62 0 77 126 6 124 1 3 5 0 17 0 1 0 99 3 0 0 7 35 4 18 0 1 3 0 271 0 0 0 100 4 4 0 0 27 3 7 0 2 1 0 325 0 0 0 100 5 11 0 16 231 104 17 1 2 6 0 276 0 0 0 100 6 0 0 0 35 6 44 2 1 1 0 1418 0 0 0 100 7 0 0 18 223 102 9 0 4 0 0 18 0 0 0 100 March 4, 2026 at 01:31:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2212 150 112 0 1 0 0 5 0 1 0 99 1 0 0 0 69 3 12 0 0 4 0 298 0 0 0 100 2 1 0 28 177 6 130 0 1 3 0 14 0 1 0 99 3 0 0 7 75 3 21 0 1 0 0 264 0 0 0 100 4 0 0 0 62 2 2 1 0 5 0 301 0 0 0 100 5 0 0 360 233 111 26 0 0 5 0 281 0 1 0 99 6 0 0 0 67 4 38 1 0 0 0 1385 0 0 0 100 7 0 0 3 264 101 8 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:31:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 150 104 0 1 0 0 0 0 0 0 100 1 0 0 0 28 1 6 1 0 2 0 294 0 0 0 100 2 0 0 0 140 7 118 0 0 0 0 10 0 0 0 100 3 0 0 7 44 4 28 1 1 0 0 262 0 0 0 100 4 0 0 0 25 2 2 0 0 6 0 300 0 0 0 100 5 0 0 136 221 108 16 0 0 1 0 269 0 0 0 100 6 0 0 0 34 6 42 1 0 0 0 1388 0 0 0 100 7 0 0 3 225 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 59 0 10 2251 138 251 0 41 79 13 220 0 1 0 99 1 894 0 129 78 2 151 1 41 80 17 570 0 1 0 98 2 46 0 20 218 7 291 0 30 82 24 250 0 1 0 99 3 30 0 14 208 82 199 2 39 112 9 450 0 1 0 99 4 2384 0 1 140 14 205 2 31 134 18 2214 1 1 0 98 5 28 0 17 392 105 324 3 32 96 15 540 0 1 0 99 6 30 0 0 121 4 221 2 37 91 9 1629 0 1 0 99 7 23 0 7 290 101 138 0 26 71 9 189 0 0 0 100 March 4, 2026 at 01:31:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 503 0 10 2431 102 616 13 106 71 60 1822 1 2 0 97 1 1892 0 279 294 3 477 12 89 86 43 1845 2 3 0 95 2 2305 0 303 268 2 455 11 92 52 48 2797 2 2 0 96 3 887 0 19 300 6 453 14 97 62 32 2426 2 2 0 96 4 33582 0 20 295 4 453 18 89 70 64 2733 10 7 0 83 5 4829 0 39 472 106 384 14 68 117 28 2904 3 6 0 91 6 6868 0 32 416 53 509 14 86 89 41 3015 4 3 0 94 7 5291 0 80 505 104 334 5 69 91 34 1739 3 2 0 96 March 4, 2026 at 01:31:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2171 101 10 0 2 1 0 300 0 1 0 99 1 0 0 0 183 1 104 0 1 4 0 294 0 0 0 99 2 0 0 0 79 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 90 3 14 0 0 0 0 263 0 0 0 100 4 64 0 0 90 4 10 0 0 0 0 7 0 0 0 100 5 0 0 478 226 104 22 0 2 1 0 266 0 1 0 99 6 0 0 0 188 54 138 2 0 5 0 1382 0 0 0 100 7 0 0 4 278 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 11 1 1 0 0 301 0 0 0 100 1 0 0 0 113 1 108 1 1 6 0 294 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 8 0 0 0 100 3 0 0 7 17 4 12 0 1 0 0 263 0 0 0 100 4 0 0 0 14 5 8 0 0 0 0 11 0 0 0 100 5 0 0 17 225 111 20 0 1 1 0 281 0 0 0 100 6 0 0 0 117 54 144 0 1 0 0 1380 0 0 0 100 7 0 0 3 212 101 8 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:31:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 44 0 1 0 0 300 0 0 0 100 1 0 0 0 72 1 66 0 0 2 0 294 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 11 3 8 0 0 0 0 260 0 0 0 100 4 0 0 0 16 6 10 0 0 0 0 8 0 0 0 100 5 0 0 17 217 105 10 1 0 0 0 266 0 0 0 100 6 0 0 0 126 54 156 1 1 4 0 1388 0 0 0 100 7 0 0 3 209 101 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:31:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 113 233 1 16 76 0 38 0 1 0 99 1 0 0 0 52 1 83 1 17 61 0 555 0 0 0 100 2 0 0 0 57 0 102 1 19 54 0 0 0 0 0 100 3 0 0 7 136 72 123 0 17 74 0 262 0 0 0 100 4 0 0 0 68 7 121 0 25 82 0 6 0 0 0 100 5 0 0 17 314 105 200 0 17 36 0 266 0 0 0 100 6 0 0 0 123 30 190 2 19 78 0 1373 0 0 0 99 7 0 0 3 280 113 123 1 15 69 0 0 0 0 0 100 March 4, 2026 at 01:31:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 150 204 0 0 0 0 0 0 0 0 100 1 0 0 0 13 3 6 0 0 7 0 594 0 0 0 100 2 0 0 0 8 1 2 0 0 1 0 3 0 0 0 100 3 3 0 7 18 6 12 0 0 1 0 269 0 0 0 100 4 0 0 0 21 8 14 0 0 1 0 12 0 0 0 100 5 0 0 17 215 104 12 0 0 1 0 272 0 0 0 100 6 0 0 0 25 5 48 1 1 6 0 1397 0 0 0 100 7 21 0 3 212 103 6 0 0 1 0 5 0 0 0 100 March 4, 2026 at 01:31:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 150 212 0 1 0 0 0 0 0 0 100 1 0 0 0 15 3 10 1 0 8 0 596 0 0 0 100 2 20 0 0 7 1 2 0 0 0 0 5 0 0 0 100 3 0 0 7 12 4 8 0 0 0 0 262 0 0 0 100 4 0 0 0 18 7 12 0 0 0 0 14 0 0 0 100 5 0 0 17 213 104 8 0 0 0 0 266 0 0 0 100 6 0 0 0 20 4 42 1 0 2 0 1366 0 0 0 100 7 0 0 3 213 102 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:31:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 150 210 0 1 0 0 0 0 0 0 100 1 0 0 0 18 2 20 0 2 4 0 593 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 3 0 0 7 13 3 12 0 0 0 0 266 0 0 0 100 4 0 0 0 16 6 10 0 0 0 0 8 0 0 0 100 5 0 0 17 229 112 22 1 0 0 0 303 0 0 0 100 6 0 0 0 12 3 36 1 0 3 0 1364 0 0 0 100 7 0 0 3 214 102 6 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:31:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 150 208 0 0 0 0 0 0 0 0 100 1 0 0 0 16 3 12 1 0 3 0 594 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 22 0 0 0 100 3 2 0 7 15 4 10 0 0 0 0 264 0 0 0 100 4 0 0 0 18 7 12 0 0 0 0 6 0 0 0 100 5 0 0 17 214 105 8 0 0 0 0 266 0 0 0 100 6 0 0 0 15 5 40 0 0 1 0 1369 0 0 0 100 7 0 0 3 210 101 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:31:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 142 192 0 0 0 0 0 0 0 0 100 1 0 0 0 19 4 16 0 1 3 0 595 0 0 0 100 2 0 0 0 11 0 12 0 1 2 0 0 0 0 0 100 3 0 0 7 11 3 8 0 0 3 0 260 0 0 0 100 4 0 0 0 16 6 10 0 0 0 0 8 0 0 0 100 5 0 0 17 213 104 8 0 0 0 0 266 0 0 0 100 6 0 0 0 31 11 56 2 2 6 0 1388 0 0 0 100 7 0 0 3 208 101 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 505 0 0 2413 103 731 21 127 32 1 2059 3 2 0 96 1 975 0 0 334 7 622 29 121 99 3 2587 3 1 0 96 2 337 0 0 243 2 421 17 80 19 0 1500 3 1 0 96 3 141 0 7 338 5 634 19 108 46 0 2074 2 1 0 97 4 544 0 0 285 35 505 15 79 50 1 1800 2 1 0 97 5 956 0 17 443 106 438 14 61 79 1 2123 2 1 0 96 6 387 0 0 280 21 545 18 81 18 0 3126 4 1 0 94 7 685 0 31 460 104 624 13 85 70 2 1640 4 1 0 95 March 4, 2026 at 01:31:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 108 0 0 0 0 0 0 0 0 100 1 0 0 0 26 9 22 0 0 0 0 604 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 12 4 8 0 0 0 0 261 0 0 0 100 4 0 0 0 108 51 100 0 0 0 0 0 0 0 0 100 5 3 0 17 214 104 8 1 0 0 0 266 0 0 0 100 6 0 0 0 12 3 36 1 0 2 0 1389 0 0 0 100 7 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 29 10 24 1 0 1 0 600 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 7 0 0 0 100 3 0 0 7 23 6 24 0 0 0 0 277 0 0 0 100 4 0 0 0 111 51 110 0 1 0 0 0 0 0 0 100 5 0 0 17 220 109 12 0 1 0 0 271 0 0 0 100 6 0 0 0 12 3 36 1 0 3 0 1393 0 0 0 100 7 0 0 3 207 101 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 0 0 0 26 9 22 0 0 3 0 603 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 11 3 8 0 0 0 0 259 0 0 0 100 4 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 5 0 0 17 221 105 20 0 2 0 0 266 0 0 0 100 6 0 0 0 12 3 36 1 0 5 0 1395 0 0 0 100 7 0 0 3 210 101 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 335 0 16 2284 101 404 1 64 123 42 2111 0 2 0 97 1 136 0 19 219 9 339 2 69 103 27 1242 0 1 0 99 2 1050 0 119 161 1 292 2 56 107 26 589 0 1 0 98 3 202 0 15 227 59 282 1 57 87 31 723 0 1 0 99 4 1490 0 198 180 27 248 5 31 76 18 827 2 1 0 97 5 242 0 25 456 129 395 2 41 90 38 708 0 1 0 99 6 4685 0 18 188 3 310 6 54 152 30 2596 1 3 0 96 7 4608 0 34 440 101 304 3 39 132 25 872 2 1 0 96 March 4, 2026 at 01:31:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 64 0 0 2118 104 116 0 0 1 0 8 0 0 0 99 1 0 0 28 19 4 10 0 0 11 0 594 0 1 0 99 2 0 0 0 15 1 0 0 0 1 0 0 0 0 0 100 3 0 0 7 22 5 8 0 0 1 0 264 0 0 0 100 4 0 0 0 16 2 0 0 0 1 0 0 0 0 0 100 5 0 0 21 325 154 114 1 0 4 0 266 0 1 0 99 6 0 0 7 27 4 48 1 2 5 0 1386 0 0 0 100 7 0 0 7 216 102 4 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:31:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 104 104 0 2 0 0 8 0 1 0 99 1 0 0 21 52 4 14 1 1 5 0 594 0 1 0 99 2 0 0 0 41 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 48 4 8 0 0 0 0 262 0 0 0 100 4 0 0 0 42 1 0 0 0 0 0 0 0 0 0 100 5 0 0 248 317 154 110 0 0 2 0 266 0 0 0 99 6 0 0 0 54 4 42 1 1 7 0 1386 0 0 0 100 7 0 0 3 262 101 24 0 3 0 0 0 0 0 0 100 March 4, 2026 at 01:31:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 104 118 0 0 1 0 8 0 0 0 100 1 0 0 0 14 3 10 0 0 2 0 594 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 3 0 0 7 15 5 12 0 0 0 0 264 0 0 0 100 4 0 0 0 9 1 6 0 1 0 0 9 0 0 0 100 5 0 0 17 319 158 112 0 0 0 0 271 0 0 0 100 6 0 0 0 12 3 36 1 0 6 0 1390 0 0 0 100 7 0 0 3 209 101 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 105 128 0 1 0 0 6 0 0 0 100 1 0 0 0 15 3 10 1 0 7 0 594 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 13 4 10 0 0 0 0 262 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 17 314 155 108 0 0 0 0 266 0 0 0 100 6 0 0 0 16 5 40 1 0 2 0 1384 0 0 0 100 7 0 0 3 212 101 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:32:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 106 130 0 0 2 0 21 0 0 0 100 1 3 0 0 23 3 28 0 4 2 0 602 0 0 0 100 2 0 0 0 10 1 8 0 0 1 0 3 0 0 0 100 3 0 0 7 17 4 16 0 1 3 0 282 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 1 0 0 0 100 5 0 0 17 314 154 108 1 0 0 0 266 0 0 0 100 6 0 0 0 13 3 38 1 1 7 0 1384 0 0 0 100 7 0 0 3 212 101 8 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:32:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 118 0 0 0 0 13 0 0 0 100 1 1 0 0 20 4 16 1 1 2 0 600 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 12 4 8 0 0 0 0 262 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 5 0 0 0 100 5 0 0 17 313 154 108 0 0 0 0 266 0 0 0 100 6 0 0 0 14 4 38 1 0 3 0 1382 0 0 0 100 7 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 105 118 0 0 0 0 9 0 0 0 99 1 0 0 0 16 3 12 0 0 3 0 595 0 0 0 100 2 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 17 313 154 108 0 0 0 0 266 0 0 0 100 6 0 0 0 13 3 36 2 0 4 0 1382 0 0 0 100 7 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 120 0 0 0 0 6 0 0 0 100 1 0 0 0 15 3 10 1 0 3 0 593 0 0 0 100 2 0 0 0 9 0 6 0 1 0 0 7 0 0 0 100 3 0 0 7 17 4 18 0 1 1 0 262 0 0 0 100 4 0 0 0 15 3 14 0 0 0 0 16 0 0 0 100 5 0 0 16 322 160 112 0 0 0 0 271 0 0 0 100 6 0 0 0 12 3 36 1 0 0 0 1373 0 0 0 100 7 0 0 4 209 101 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 116 0 0 0 0 7 0 0 0 100 1 0 0 0 14 3 10 0 0 2 0 594 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 11 3 8 0 0 0 0 260 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 17 317 155 110 1 1 0 0 266 0 0 0 100 6 0 0 0 11 3 36 0 0 3 0 1374 0 0 0 100 7 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5100 0 44 2659 108 1013 56 207 137 38 3210 6 4 0 90 1 896 0 12 561 7 967 41 222 165 35 3693 3 3 0 94 2 614 0 2 513 3 929 41 197 178 35 2641 3 2 0 95 3 34983 0 209 581 121 958 48 175 128 25 3957 12 10 0 78 4 1084 0 17 473 3 845 43 205 135 30 3245 4 2 0 94 5 1236 0 29 706 133 822 24 160 174 22 2265 5 2 0 93 6 741 0 15 504 24 905 31 188 145 27 3961 4 3 0 94 7 6092 0 195 562 101 732 29 146 195 45 3860 4 4 0 93 March 4, 2026 at 01:32:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2122 101 114 0 4 0 0 8 0 0 0 100 1 0 0 0 24 4 12 0 1 2 0 610 0 0 0 100 2 2 0 0 19 2 6 0 2 2 0 13 0 0 0 100 3 2 0 0 21 2 6 1 1 1 0 10 0 0 0 100 4 12 0 7 23 5 9 0 2 1 0 281 0 0 0 100 5 54 0 17 236 107 35 0 4 1 0 289 0 0 0 100 6 0 0 28 126 54 147 3 0 8 0 1430 0 1 0 99 7 17 0 17 231 106 23 0 4 4 0 10 0 0 0 100 March 4, 2026 at 01:32:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 100 108 0 1 0 0 0 0 0 0 100 1 0 0 0 37 4 16 1 1 3 0 595 0 0 0 100 2 0 0 0 24 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 28 2 4 0 0 0 0 2 0 0 0 100 4 0 0 7 28 3 4 0 0 0 0 263 0 0 0 100 5 0 0 17 240 108 18 0 1 0 0 275 0 0 0 100 6 0 0 14 133 54 141 1 2 11 0 1392 0 1 0 99 7 0 0 122 219 102 8 0 0 2 0 0 0 0 0 100 March 4, 2026 at 01:32:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 30 3 12 0 0 4 0 594 0 0 0 100 2 0 0 0 23 0 4 0 0 0 0 7 0 0 0 100 3 0 0 0 23 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 37 6 20 1 0 0 0 275 0 0 0 100 5 0 0 17 251 116 24 1 0 1 0 280 0 0 0 100 6 0 0 0 96 34 108 0 1 6 0 1382 0 0 0 100 7 0 0 115 250 121 48 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:32:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2906 0 135 2400 101 519 9 69 66 46 1502 2 2 0 96 1 1800 0 229 225 4 360 10 81 68 34 2239 2 2 0 96 2 4644 0 25 279 5 386 9 70 85 36 3051 2 3 0 95 3 2864 0 16 240 3 414 5 90 57 50 2027 2 2 0 96 4 626 0 22 217 3 353 11 87 54 44 2121 2 2 0 96 5 190 0 30 445 113 393 2 69 44 43 1414 1 1 0 98 6 141 0 14 229 5 371 12 68 62 21 2885 1 1 0 98 7 3563 0 160 499 147 429 9 59 54 39 1982 2 2 0 96 March 4, 2026 at 01:32:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1101 0 184 2267 101 396 1 57 122 20 437 0 1 0 98 1 33133 0 77 215 4 356 9 64 140 19 1216 8 8 0 83 2 115 0 17 154 1 245 2 49 112 16 430 0 1 0 99 3 4886 0 36 367 128 540 6 49 157 27 1289 2 2 0 96 4 3100 0 13 155 5 233 4 41 164 18 2676 2 2 0 96 5 273 0 21 481 146 404 0 45 146 35 889 0 1 0 99 6 159 0 2 191 2 360 2 55 130 21 1638 0 1 0 99 7 99 0 4 333 104 198 1 41 121 12 595 0 1 0 99 March 4, 2026 at 01:32:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 100 120 0 1 0 0 0 0 1 0 99 1 64 0 42 88 5 18 0 0 2 0 307 0 1 0 99 2 0 0 0 83 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 84 2 6 0 1 0 0 2 0 0 0 100 4 1 0 7 86 4 6 1 0 4 0 556 0 0 0 100 5 1 0 17 349 135 70 1 0 1 0 308 0 0 0 100 6 0 0 0 121 20 72 1 1 0 0 1084 0 0 0 100 7 0 0 465 225 103 14 0 1 12 0 299 0 1 0 99 March 4, 2026 at 01:32:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 1 0 0 0 0 0 100 1 0 0 0 26 6 28 0 1 0 0 308 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 13 5 8 0 0 6 0 556 0 0 0 100 5 0 0 17 209 102 4 0 0 0 0 266 0 0 0 100 6 0 0 0 111 53 136 0 0 0 0 1084 0 0 0 100 7 0 0 3 210 103 4 0 0 3 0 301 0 0 0 100 March 4, 2026 at 01:32:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 21 6 16 1 0 0 0 308 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 4 0 0 7 20 6 20 0 0 8 0 567 0 0 0 100 5 0 0 17 216 107 8 0 0 0 0 271 0 0 0 100 6 0 0 0 112 53 136 1 0 0 0 1084 0 0 0 100 7 0 0 3 214 103 12 0 0 8 0 298 0 0 0 100 March 4, 2026 at 01:32:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 0 0 0 24 7 20 0 0 0 0 306 0 0 0 100 2 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 4 0 0 7 11 4 6 0 0 6 0 554 0 0 0 100 5 0 0 17 211 103 4 1 0 0 0 266 0 0 0 100 6 0 0 0 76 35 98 1 0 0 0 1083 0 0 0 100 7 0 0 3 250 121 44 1 1 3 0 302 0 0 0 100 March 4, 2026 at 01:32:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 116 0 0 2 0 11 0 0 0 100 1 0 0 0 27 8 28 0 0 1 0 313 0 0 0 100 2 0 0 0 8 0 4 0 1 1 0 0 0 0 0 100 3 0 0 0 17 2 20 0 1 3 0 2 0 0 0 100 4 0 0 7 13 4 6 1 0 3 0 554 0 0 0 100 5 0 0 17 212 103 8 0 0 0 0 274 0 0 0 100 6 0 0 0 14 4 40 0 0 1 0 1092 0 0 0 100 7 0 0 3 314 153 114 0 0 14 0 320 0 0 0 100 March 4, 2026 at 01:32:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 100 0 3 0 0 0 0 0 0 100 1 0 0 0 23 8 16 0 0 1 0 308 0 0 0 100 2 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 4 0 0 7 15 6 10 0 0 15 0 555 0 0 0 100 5 0 0 17 209 102 4 0 0 1 0 266 0 0 0 100 6 0 0 0 14 4 36 1 0 2 0 1075 0 0 0 100 7 0 0 3 326 155 120 0 1 12 0 292 0 0 0 100 March 4, 2026 at 01:32:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 108 0 1 0 0 0 0 0 0 100 1 0 0 0 26 8 22 1 1 0 0 309 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 6 0 0 1 0 2 0 0 0 100 4 0 0 7 17 4 18 0 1 9 0 554 0 0 0 100 5 0 0 17 210 102 6 0 0 0 0 266 0 0 0 100 6 0 0 0 14 4 38 1 0 1 0 1077 0 0 0 100 7 0 0 3 311 152 106 0 0 6 0 300 0 0 0 100 March 4, 2026 at 01:32:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 26 9 22 0 0 0 0 306 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 22 6 22 0 1 3 0 567 0 0 0 100 5 0 0 17 223 107 18 1 1 1 0 271 0 0 0 100 6 0 0 0 12 3 36 1 0 1 0 1075 0 0 0 100 7 0 0 3 310 152 106 0 0 2 0 300 0 0 0 100 March 4, 2026 at 01:32:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 0 0 0 0 0 0 0 100 1 20 0 0 25 8 22 0 1 0 0 313 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 6 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 4 0 0 7 12 4 6 1 0 1 0 555 0 0 0 100 5 0 0 17 210 103 4 0 0 0 0 266 0 0 0 100 6 0 0 0 18 6 40 1 0 1 0 1077 0 0 0 100 7 0 0 3 313 152 106 1 1 4 0 299 0 0 0 100 March 4, 2026 at 01:32:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 670 0 0 2403 113 738 7 85 99 3 1546 2 2 0 96 1 747 0 0 296 6 562 9 85 110 7 2053 2 1 0 96 2 505 0 0 256 1 500 9 58 106 4 1107 2 1 0 97 3 613 0 0 275 59 534 6 78 79 3 1407 2 1 0 97 4 598 0 7 202 6 400 13 77 99 0 1587 3 1 0 96 5 235 0 17 444 105 448 11 57 102 3 1505 4 1 0 95 6 193 0 0 254 4 550 9 65 87 0 2667 2 1 0 97 7 746 0 45 444 143 378 1 42 85 0 1175 1 1 0 98 March 4, 2026 at 01:32:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 150 210 0 0 0 0 0 0 0 0 100 1 0 0 0 29 8 22 1 0 0 0 309 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 4 0 0 7 11 4 6 0 0 3 0 553 0 0 0 100 5 2 0 17 209 102 4 0 0 0 0 266 0 0 0 100 6 0 0 0 18 4 40 1 0 1 0 1090 0 0 0 100 7 0 0 3 213 102 12 0 1 1 0 305 0 0 0 100 March 4, 2026 at 01:32:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 150 208 0 0 0 0 0 0 0 0 100 1 0 0 0 26 9 22 0 0 0 0 307 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 11 4 6 0 0 6 0 554 0 0 0 100 5 0 0 17 210 102 4 1 1 0 0 266 0 0 0 100 6 0 0 0 14 4 38 1 0 1 0 1092 0 0 0 100 7 0 0 3 208 102 2 0 0 4 0 300 0 0 0 100 March 4, 2026 at 01:32:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 150 222 0 1 0 0 0 0 0 0 100 1 0 0 3 25 8 22 0 0 0 0 310 0 0 0 100 2 1 0 0 10 0 4 0 0 0 0 9 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 4 0 0 7 22 6 22 1 0 1 0 570 0 0 0 100 5 0 0 17 218 108 10 0 0 1 0 271 0 0 0 100 6 0 0 0 14 4 38 1 0 1 0 1091 0 0 0 100 7 0 0 3 215 102 10 1 0 2 0 299 0 0 0 100 March 4, 2026 at 01:32:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4640 0 9 2711 119 1074 38 206 109 42 3669 6 3 0 91 1 1589 0 190 645 19 1138 38 215 84 59 5608 4 3 0 93 2 6958 0 29 563 1 856 27 164 182 59 3473 6 4 0 90 3 40158 0 297 610 4 1034 42 184 160 74 5995 13 11 0 76 4 5169 0 187 520 6 969 26 164 160 84 3974 5 3 0 92 5 994 0 23 702 119 902 24 154 94 58 3155 4 2 0 94 6 448 0 16 484 7 905 17 168 122 55 4590 4 3 0 94 7 3780 0 78 610 103 720 19 130 135 41 3399 4 3 0 93 March 4, 2026 at 01:32:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2169 101 94 0 21 76 0 9 0 1 0 99 1 0 0 0 82 1 115 1 14 87 0 318 0 0 0 100 2 16 0 0 164 3 192 0 16 75 0 26 0 0 0 100 3 0 0 77 117 59 203 0 18 65 0 273 0 1 0 99 4 24 0 7 66 3 91 0 13 82 0 305 0 0 0 100 5 51 0 17 366 155 190 0 13 56 0 283 0 0 0 100 6 0 0 0 80 5 133 1 15 74 0 1097 0 0 0 100 7 11 0 17 260 103 86 0 16 92 0 321 0 1 0 99 March 4, 2026 at 01:32:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 100 72 0 3 0 0 0 0 1 0 99 1 0 0 0 87 2 8 1 1 1 0 300 0 0 0 100 2 0 0 0 118 1 42 0 1 1 0 0 0 0 0 100 3 0 0 49 82 5 10 0 0 3 0 263 0 1 0 99 4 0 0 0 84 3 4 0 0 2 0 294 0 0 0 100 5 0 0 17 395 158 118 1 1 1 0 275 0 0 0 100 6 0 0 0 91 5 38 1 0 1 0 1090 0 0 0 100 7 0 0 465 222 103 12 0 1 5 0 301 0 1 0 99 March 4, 2026 at 01:32:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 108 0 0 1 0 0 0 0 0 100 1 0 0 0 16 4 12 0 0 0 0 301 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 7 21 6 22 0 1 0 0 262 0 0 0 100 4 0 0 0 11 3 4 1 0 2 0 294 0 0 0 100 5 0 0 17 324 159 120 0 1 0 0 275 0 0 0 100 6 0 0 0 16 5 40 1 1 0 0 1090 0 0 0 100 7 0 0 3 220 102 14 1 1 15 0 300 0 0 0 100 March 4, 2026 at 01:32:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 434 0 27 2391 100 580 6 110 50 40 2674 1 2 0 96 1 446 0 10 306 3 478 11 105 58 40 2033 1 1 0 97 2 5852 0 125 220 1 342 11 77 119 47 2430 3 3 0 94 3 36893 0 36 352 7 462 14 108 70 43 2633 10 7 0 82 4 1183 0 213 266 10 436 2 87 67 36 1667 1 1 0 98 5 2737 0 42 601 156 536 7 81 76 54 3870 2 2 0 95 6 1073 0 127 236 4 462 8 87 41 50 2631 1 2 0 97 7 1183 0 51 459 103 401 6 78 45 42 1610 2 2 0 96 March 4, 2026 at 01:32:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1052 0 71 2377 103 524 24 115 76 19 1806 4 3 0 94 1 675 0 0 382 45 597 27 120 56 15 1865 2 2 0 96 2 382 0 0 235 3 415 20 81 37 12 1496 2 1 0 97 3 902 0 7 292 3 528 46 119 25 5 1969 4 2 0 94 4 2777 0 16 299 7 376 25 82 55 7 1392 3 1 0 95 5 3688 0 198 415 108 387 20 68 60 17 1854 2 2 0 96 6 3389 0 9 297 5 454 8 60 90 18 3026 2 2 0 96 7 687 0 46 393 103 333 20 58 31 14 1887 3 1 0 96 March 4, 2026 at 01:32:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2206 101 84 0 11 37 0 9 0 2 0 98 1 44 0 462 195 46 261 1 17 54 0 308 0 1 0 99 2 0 0 0 154 11 133 0 16 78 0 0 0 0 0 100 3 0 0 7 188 55 112 0 14 79 0 281 0 1 0 99 4 0 0 0 121 4 76 0 16 64 0 295 0 0 0 100 5 0 0 17 318 103 78 1 13 58 0 266 0 0 0 100 6 0 0 0 207 4 213 1 19 90 0 1091 0 0 0 99 7 0 0 3 337 102 102 0 14 83 0 300 0 0 0 100 March 4, 2026 at 01:32:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 32 7 28 0 0 0 0 309 0 0 0 100 2 0 0 0 79 37 72 0 0 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 262 0 0 0 100 4 0 0 0 11 3 4 1 0 6 0 293 0 0 0 100 5 0 0 17 211 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 12 3 36 1 0 1 0 1090 0 0 0 100 7 0 0 3 240 117 34 1 1 6 0 297 0 0 0 100 March 4, 2026 at 01:32:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 32 8 28 0 0 0 0 310 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 4 0 0 0 10 3 4 0 0 5 0 294 0 0 0 100 5 0 0 17 211 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 13 3 38 0 1 0 0 1090 0 0 0 100 7 0 0 3 314 152 112 0 1 8 0 301 0 0 0 100 March 4, 2026 at 01:32:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1556 0 33 2662 110 958 18 168 113 67 3502 3 4 0 93 1 1821 0 130 577 12 1032 37 182 89 67 5079 4 3 0 93 2 3205 0 14 565 4 931 29 147 107 53 3816 6 3 0 91 3 42630 0 34 605 26 1035 40 153 161 54 4791 14 11 0 74 4 6670 0 35 631 6 924 33 153 159 61 3421 6 3 0 90 5 4402 0 157 685 110 821 22 114 115 78 2842 4 3 0 93 6 915 0 29 433 4 763 18 129 73 68 5102 3 2 0 95 7 2435 0 420 529 115 571 13 93 76 64 3471 3 2 0 94 March 4, 2026 at 01:32:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 28 2120 102 115 0 3 5 0 7 0 1 0 99 1 0 0 0 35 1 18 1 2 0 0 309 0 0 0 100 2 2 0 7 25 1 12 0 2 1 0 17 0 0 0 100 3 0 0 7 126 52 110 0 2 0 0 272 0 0 0 100 4 0 0 42 22 3 10 0 1 6 0 303 0 1 0 99 5 46 0 17 236 107 20 1 2 0 0 282 0 0 0 100 6 1 0 0 32 4 44 1 1 0 0 1094 0 0 0 100 7 16 0 17 224 102 9 0 1 3 0 313 0 0 0 100 March 4, 2026 at 01:32:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2213 100 188 0 19 83 0 0 0 2 0 98 1 0 0 462 129 1 219 0 19 83 0 300 0 1 0 99 2 0 0 0 129 1 99 0 15 65 0 0 0 0 0 100 3 0 0 7 277 106 194 0 16 95 0 260 0 0 0 100 4 0 0 0 134 4 110 1 14 69 0 296 0 0 0 100 5 0 0 17 319 108 64 0 11 55 0 275 0 0 0 100 6 0 0 0 134 4 134 1 13 63 0 1089 0 0 0 99 7 0 0 3 318 102 77 1 11 76 0 298 0 0 0 100 March 4, 2026 at 01:32:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 2 1 0 0 0 0 0 100 1 0 0 0 26 2 22 0 0 2 0 300 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 3 0 0 7 111 53 104 1 0 1 0 260 0 0 0 100 4 0 0 0 14 5 6 0 0 8 0 295 0 0 0 100 5 0 0 17 219 107 14 0 0 1 0 274 0 0 0 100 6 0 0 0 15 5 38 0 0 1 0 1090 0 0 0 100 7 0 0 3 208 102 2 0 0 5 0 302 0 0 0 100 March 4, 2026 at 01:32:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2387 0 229 2665 102 1016 45 196 95 48 4297 6 5 0 89 1 3388 0 244 591 6 1063 40 201 131 80 4465 4 4 0 92 2 42898 0 205 504 4 1075 25 150 175 72 5409 13 12 0 75 3 9948 0 54 753 37 1080 38 198 181 64 4425 8 4 0 88 4 1545 0 17 581 14 1010 31 194 139 80 4905 5 3 0 93 5 1378 0 27 683 110 820 20 148 129 55 3221 3 2 0 95 6 970 0 19 516 6 892 15 152 139 42 4144 3 3 0 94 7 894 0 93 547 103 583 15 102 119 37 3300 2 2 0 96 March 4, 2026 at 01:32:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 103 16 0 2 6 0 526 0 1 0 99 1 0 0 0 140 3 123 1 4 0 0 51 0 0 0 100 2 0 0 0 130 51 118 0 2 0 0 16 0 0 0 100 3 26 0 0 26 0 12 0 1 0 0 29 0 0 0 99 4 0 0 7 37 5 30 0 3 5 0 328 0 0 0 100 5 127 0 17 249 114 29 1 1 4 0 324 0 0 0 100 6 1 0 0 28 3 42 2 2 2 0 1106 0 0 0 100 7 11 0 87 219 103 19 0 4 15 0 328 0 1 0 99 March 4, 2026 at 01:32:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 238 2116 103 16 0 2 2 0 564 0 1 0 99 1 0 0 0 153 0 114 0 0 0 0 0 0 0 0 100 2 0 0 0 145 52 104 0 1 1 0 1 0 0 0 100 3 0 0 0 47 0 16 0 2 0 0 0 0 0 0 100 4 0 0 0 51 4 8 1 0 5 0 296 0 0 0 100 5 0 0 16 257 109 18 0 2 0 0 275 0 0 0 100 6 0 0 0 52 5 40 1 0 0 0 1095 0 0 0 100 7 0 0 11 253 103 14 1 0 7 0 303 0 0 0 100 March 4, 2026 at 01:32:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2189 103 115 1 8 62 0 559 0 1 0 99 1 0 0 231 186 1 263 0 13 82 0 0 0 1 0 99 2 0 0 0 191 50 207 0 12 72 0 0 0 0 0 100 3 0 0 0 149 58 104 0 16 63 0 0 0 0 0 100 4 0 0 0 101 3 124 0 24 91 0 294 0 0 0 100 5 0 0 17 290 108 90 0 16 64 0 276 0 0 0 100 6 0 0 0 91 4 121 1 13 66 0 1091 0 0 0 99 7 0 0 3 287 103 82 0 13 69 0 299 0 0 0 100 March 4, 2026 at 01:32:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2112 103 16 0 3 0 0 561 0 1 0 99 1 0 0 0 118 0 110 0 4 0 0 0 0 0 0 100 2 0 0 0 110 51 102 0 0 0 0 1 0 0 0 100 3 0 0 0 12 1 4 0 0 0 0 0 0 0 0 100 4 0 0 0 22 5 18 0 1 2 0 297 0 0 0 100 5 0 0 17 224 108 16 0 0 0 0 272 0 0 0 100 6 0 0 0 14 3 36 0 0 0 0 1089 0 0 0 100 7 0 0 3 214 103 4 0 0 4 0 298 0 0 0 100 March 4, 2026 at 01:32:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2078 0 135 2659 106 1027 37 205 107 66 4040 4 4 0 92 1 35174 0 36 609 2 1081 62 235 129 57 5122 16 10 0 74 2 7669 0 22 559 4 968 49 201 202 53 5027 6 5 0 89 3 9786 0 40 797 40 1141 42 208 134 54 4141 7 4 0 89 4 3968 0 196 551 5 985 32 204 107 62 5181 4 4 0 92 5 2226 0 206 690 106 827 24 164 115 66 3743 3 2 0 94 6 2157 0 123 587 5 1065 24 181 113 68 4297 3 3 0 94 7 807 0 81 657 108 803 25 147 88 61 3119 3 2 0 95 March 4, 2026 at 01:32:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2117 103 12 0 1 0 0 562 0 0 0 99 1 0 0 70 112 1 104 0 3 6 0 0 0 1 0 99 2 0 0 0 29 1 16 0 1 6 0 7 0 1 0 99 3 44 0 0 134 56 114 1 0 0 0 8 0 0 0 100 4 0 0 0 32 6 18 1 0 2 0 309 0 0 0 100 5 2 0 17 228 106 10 0 1 0 0 273 0 0 0 100 6 0 0 7 23 2 36 1 1 0 0 1091 0 0 0 100 7 0 0 3 225 103 8 1 0 3 0 298 0 0 0 100 March 4, 2026 at 01:32:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2185 104 8 1 0 0 0 561 0 1 0 99 1 0 0 42 79 0 6 0 1 2 0 0 0 1 0 99 2 0 0 462 21 0 12 0 0 2 0 0 0 1 0 99 3 0 0 0 291 57 216 0 1 0 0 9 0 0 0 100 4 0 0 0 83 3 4 0 0 0 0 294 0 0 0 100 5 0 0 17 284 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 88 2 46 0 1 0 0 1090 0 0 0 100 7 0 0 3 285 103 8 0 2 7 0 301 0 0 0 100 March 4, 2026 at 01:32:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2156 104 93 0 14 61 0 559 0 1 0 99 1 0 0 0 100 0 187 0 16 73 0 0 0 0 0 100 2 0 0 0 47 0 75 0 8 80 0 0 0 0 0 100 3 0 0 0 242 73 226 0 17 81 0 8 0 0 0 100 4 0 0 0 129 39 172 0 17 87 0 298 0 0 0 100 5 0 0 17 246 103 76 0 13 62 0 266 0 0 0 100 6 0 0 0 60 2 136 1 18 106 0 1090 0 0 0 100 7 0 0 3 254 103 92 0 15 99 0 299 0 0 0 100 March 4, 2026 at 01:32:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6546 0 54 2707 104 901 30 173 119 50 5716 5 4 0 91 1 3424 0 16 580 10 1010 32 152 109 36 4218 4 3 0 92 2 34891 0 11 492 1 827 33 126 79 41 3910 13 9 0 79 3 6427 0 204 597 4 1039 19 155 138 57 4404 6 4 0 90 4 4289 0 44 649 35 965 10 144 129 54 4058 6 3 0 90 5 5088 0 444 643 114 858 15 131 115 81 4029 5 4 0 91 6 1684 0 22 509 6 935 22 154 86 77 3488 4 2 0 94 7 1295 0 83 647 107 836 15 133 91 72 3834 2 2 0 96 March 4, 2026 at 01:32:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 7 2131 104 20 0 1 0 0 568 0 0 0 100 1 0 0 7 124 2 108 0 4 0 0 10 0 0 0 100 2 0 0 0 31 1 15 0 3 6 0 13 0 0 0 100 3 0 0 0 24 1 6 0 1 0 0 10 0 0 0 100 4 12 0 70 22 4 17 1 2 23 0 304 0 1 0 99 5 8 0 17 326 152 110 1 1 0 0 277 0 0 0 100 6 61 0 0 37 8 20 0 1 2 0 24 0 0 0 100 7 0 0 17 229 103 43 2 2 11 0 1404 0 0 0 100 March 4, 2026 at 01:32:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2168 104 34 1 2 0 0 563 0 1 0 99 1 0 0 0 146 0 88 0 1 0 0 0 0 0 0 100 2 0 0 350 25 0 22 0 1 3 0 7 0 1 0 99 3 0 0 0 64 1 4 0 1 0 0 0 0 0 0 100 4 0 0 35 71 5 20 0 1 7 0 309 0 1 0 99 5 0 0 17 371 156 108 0 1 0 0 271 0 0 0 100 6 0 0 0 76 8 16 0 0 0 0 10 0 0 0 100 7 0 0 3 271 103 40 1 1 5 0 1389 0 0 0 100 March 4, 2026 at 01:32:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2126 104 62 0 2 0 0 560 0 0 0 100 1 0 0 0 71 0 48 0 2 0 0 0 0 0 0 100 2 0 0 0 35 2 14 0 0 0 0 22 0 0 0 100 3 0 0 0 26 1 6 0 0 0 0 0 0 0 0 100 4 0 0 112 14 4 9 0 1 1 0 296 0 0 0 100 5 0 0 17 328 153 104 0 0 0 0 266 0 0 0 100 6 0 0 0 41 10 20 0 0 0 0 11 0 0 0 100 7 0 0 3 230 103 36 1 0 3 0 1390 0 0 0 100 March 4, 2026 at 01:32:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5213 0 42 2404 105 533 12 94 137 34 3717 3 4 0 93 1 7732 0 29 454 0 624 6 112 175 43 2303 3 3 0 93 2 2572 0 13 299 0 539 3 104 128 49 1588 1 2 0 97 3 743 0 16 335 54 499 9 113 146 40 2891 1 2 0 97 4 2026 0 310 295 3 584 1 116 115 65 1824 2 2 0 96 5 1212 0 151 566 149 584 5 90 129 63 2143 1 2 0 97 6 301 0 12 330 14 570 6 114 99 58 1583 1 1 0 98 7 229 0 55 451 104 431 2 75 137 31 3067 1 1 0 97 March 4, 2026 at 01:32:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 905 0 77 2447 104 706 39 128 60 16 2546 3 3 0 94 1 33061 0 18 482 3 741 49 132 72 9 2615 12 8 0 80 2 1345 0 0 376 5 661 30 98 76 12 2440 3 2 0 95 3 3130 0 9 378 3 684 36 131 86 13 2656 5 2 0 93 4 2630 0 2 412 33 642 21 97 55 8 2613 3 2 0 95 5 1248 0 199 464 110 456 18 67 28 17 1901 4 2 0 94 6 830 0 0 349 2 631 21 106 72 17 1986 3 1 0 96 7 568 0 33 536 117 631 25 91 76 15 3177 2 1 0 96 March 4, 2026 at 01:32:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2173 103 97 1 1 1 0 263 0 2 0 98 1 0 0 0 92 0 16 0 2 0 0 0 0 0 0 100 2 0 0 0 90 2 14 0 0 0 0 300 0 0 0 100 3 0 0 0 83 1 6 0 0 0 0 0 0 0 0 100 4 0 0 462 24 2 18 0 1 8 0 294 0 1 0 99 5 2 0 17 383 153 106 0 0 0 0 266 0 0 0 100 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 44 0 3 299 110 50 1 0 3 0 1399 0 0 0 100 March 4, 2026 at 01:32:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 10 0 1 0 0 260 0 0 0 100 1 0 0 0 107 0 100 0 0 0 0 0 0 0 0 100 2 0 0 0 20 2 18 0 0 0 0 307 0 0 0 100 3 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 4 0 0 0 26 6 30 0 1 6 0 312 0 0 0 100 5 0 0 17 317 157 110 0 0 0 0 271 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 3 226 110 50 1 0 12 0 1396 0 0 0 99 March 4, 2026 at 01:32:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 106 0 1 0 0 260 0 0 0 100 1 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 19 2 14 1 0 0 0 300 0 0 0 100 3 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 4 0 0 0 10 2 4 0 0 3 0 294 0 0 0 100 5 0 0 17 320 154 116 1 1 0 0 266 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 3 227 110 50 1 0 2 0 1402 0 0 0 100 March 4, 2026 at 01:32:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3380 0 42 2736 105 1009 23 177 145 74 4396 8 4 0 89 1 2458 0 30 774 14 1250 31 201 212 55 3121 3 2 0 95 2 3179 0 294 582 20 1036 26 176 187 84 3564 4 3 0 93 3 36136 0 21 629 58 1036 25 165 195 69 4657 13 9 0 78 4 954 0 28 478 4 808 17 147 206 45 2793 3 2 0 95 5 5157 0 18 693 120 800 21 128 172 45 2857 4 4 0 92 6 9578 0 340 479 3 940 15 162 256 72 5279 5 5 0 89 7 3099 0 86 628 111 804 19 139 176 72 5298 3 3 0 94 March 4, 2026 at 01:32:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 70 2117 104 49 1 5 6 0 268 0 1 0 99 1 0 0 0 95 2 74 0 1 6 0 13 0 0 0 100 2 19 0 0 134 53 116 0 1 1 0 309 0 0 0 100 3 3 0 0 29 3 10 0 0 1 0 13 0 0 0 100 4 4 0 14 27 4 10 0 1 3 0 564 0 0 0 100 5 1 0 10 228 102 12 0 2 1 0 15 0 0 0 100 6 55 0 0 40 6 24 0 2 1 0 15 0 0 0 100 7 16 0 24 235 106 50 1 1 7 0 1389 0 1 0 99 March 4, 2026 at 01:32:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 49 2174 103 45 0 4 1 0 265 0 2 0 98 1 0 0 462 23 1 16 0 0 2 0 1 0 1 0 99 2 0 0 0 188 52 108 0 0 0 0 300 0 0 0 100 3 0 0 0 81 1 4 0 1 0 0 0 0 0 0 100 4 0 0 14 86 5 10 0 0 4 0 564 0 0 0 100 5 0 0 3 286 102 6 0 0 0 0 0 0 0 0 100 6 0 0 0 93 7 16 0 1 0 0 10 0 0 0 100 7 0 0 3 359 104 116 1 2 8 0 1388 0 0 0 100 March 4, 2026 at 01:32:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 110 0 1 0 0 260 0 0 0 100 1 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 2 0 0 0 112 52 108 1 0 0 0 305 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 18 5 18 1 0 3 0 573 0 0 0 100 5 0 0 3 218 107 8 0 0 0 0 5 0 0 0 100 6 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 7 0 0 3 222 104 44 1 0 4 0 1377 0 0 0 100 March 4, 2026 at 01:32:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 374 0 15 2463 104 670 11 120 51 68 2870 1 2 0 97 1 977 0 12 300 3 483 8 105 58 50 2244 2 1 0 96 2 1116 0 130 355 43 505 6 77 24 51 1761 1 1 0 98 3 1083 0 227 237 10 381 7 84 76 34 1687 2 2 0 97 4 834 0 34 266 5 418 7 90 34 48 1995 1 1 0 98 5 423 0 28 430 103 347 4 68 52 40 2743 1 2 0 97 6 37529 0 35 288 11 430 15 92 86 39 2437 10 7 0 82 7 7549 0 192 506 104 410 10 77 132 50 3876 5 3 0 92 March 4, 2026 at 01:33:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2739 0 9 2450 105 704 14 92 106 8 3068 3 3 0 94 1 5454 0 14 463 11 713 16 98 130 10 2184 7 2 0 91 2 683 0 1 310 4 525 19 81 126 14 1689 2 1 0 97 3 1399 0 0 397 57 634 26 102 117 13 2463 4 2 0 95 4 741 0 84 283 8 517 13 86 126 6 1982 2 2 0 96 5 1390 0 181 421 103 433 16 78 74 18 1040 2 2 0 97 6 1106 0 7 312 3 553 13 82 125 16 1979 3 4 0 93 7 110 0 33 517 135 521 9 60 125 8 1527 2 1 0 97 March 4, 2026 at 01:33:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 511 2111 103 151 1 2 1 0 1352 0 2 0 98 1 0 0 0 187 52 108 0 0 0 0 1 0 0 0 100 2 0 0 0 81 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 81 1 4 0 1 0 0 300 0 0 0 100 4 0 0 14 90 5 14 0 1 7 0 564 0 1 0 99 5 44 0 3 297 109 18 0 0 0 0 9 0 0 0 100 6 0 0 0 79 0 2 0 1 0 0 0 0 0 0 100 7 0 0 3 284 103 4 0 0 18 0 293 0 0 0 100 March 4, 2026 at 01:33:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2110 103 140 1 2 0 0 1349 0 1 0 99 1 0 0 0 117 51 110 0 2 0 0 0 0 0 0 100 2 0 0 0 13 1 14 0 1 1 0 0 0 0 0 100 3 0 0 0 10 1 4 1 0 0 0 300 0 0 0 100 4 0 0 14 10 3 6 1 0 8 0 559 0 0 0 100 5 0 0 3 225 109 18 0 0 0 0 9 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 3 215 103 8 0 1 5 0 306 0 0 0 100 March 4, 2026 at 01:33:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 146 1 0 0 0 1349 0 1 0 99 1 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 2 0 0 0 11 1 8 0 0 0 0 5 0 0 0 100 3 0 0 0 14 1 14 0 1 0 0 300 0 0 0 100 4 0 0 14 19 6 18 1 0 3 0 574 0 0 0 100 5 0 0 3 231 113 22 0 0 0 0 14 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 3 211 103 6 0 0 2 0 299 0 0 0 100 March 4, 2026 at 01:33:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3631 0 41 2758 104 1186 46 219 90 62 5373 4 6 0 90 1 4419 0 369 601 14 1068 42 189 108 57 5405 8 4 0 87 2 8446 0 128 595 7 1072 26 182 178 72 4461 7 4 0 89 3 9154 0 59 818 10 1255 42 203 166 56 5392 6 4 0 90 4 35779 0 157 641 27 1177 47 213 141 89 4546 12 9 0 78 5 1806 0 25 731 111 925 22 145 98 75 4571 3 3 0 94 6 550 0 17 491 2 932 24 181 99 43 3895 4 2 0 94 7 522 0 82 661 105 777 21 125 68 39 2512 3 2 0 95 March 4, 2026 at 01:33:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 28 2173 105 179 0 19 102 0 1359 0 1 0 99 1 46 0 0 176 4 259 0 18 84 0 18 0 0 0 100 2 0 0 0 75 2 109 0 19 84 0 10 0 0 0 100 3 0 0 0 132 55 110 0 15 96 0 317 0 0 0 100 4 26 0 14 179 54 217 0 20 69 0 573 0 0 0 100 5 11 0 52 252 103 66 0 13 55 0 20 0 1 0 99 6 0 0 0 59 0 83 0 12 100 0 18 0 0 0 100 7 0 0 24 265 103 82 0 10 65 0 319 0 0 0 100 March 4, 2026 at 01:33:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2179 103 140 1 1 2 0 1346 0 2 0 98 1 0 0 462 33 7 24 0 1 3 0 9 0 1 0 99 2 0 0 0 90 2 10 0 0 1 0 0 0 0 0 100 3 0 0 0 85 2 4 1 1 1 0 300 0 0 0 100 4 0 0 14 173 47 90 1 1 3 0 561 0 0 0 100 5 0 0 7 310 112 36 0 3 2 0 0 0 0 0 100 6 0 0 0 81 1 2 0 0 1 0 0 0 0 0 100 7 0 0 7 285 103 10 0 1 9 0 305 0 0 0 100 March 4, 2026 at 01:33:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 116 1 0 0 0 1345 0 1 0 99 1 0 0 0 40 7 36 0 2 0 0 10 0 0 0 100 2 0 0 0 16 1 12 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 4 0 0 14 12 5 8 0 0 6 0 562 0 0 0 100 5 0 0 3 313 153 106 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 7 0 0 3 212 103 8 0 1 4 0 332 0 0 0 100 March 4, 2026 at 01:33:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4285 0 342 2506 104 628 14 124 157 63 4661 3 4 0 93 1 1101 0 7 476 8 763 12 146 120 66 2528 2 2 0 96 2 5573 0 202 381 2 608 16 121 136 63 4039 3 4 0 93 3 5001 0 38 437 1 646 15 131 98 59 3203 5 3 0 92 4 1157 0 28 362 8 604 8 120 77 66 2732 2 2 0 96 5 3959 0 17 646 153 643 6 98 92 63 2129 2 5 0 93 6 36512 0 15 402 2 528 21 107 461 42 2973 14 7 0 79 7 27850 0 255 522 104 536 15 106 339 45 2602 9 8 0 83 March 4, 2026 at 01:33:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 734 0 7 2350 104 602 18 69 55 2 2848 2 2 0 96 1 429 0 7 349 47 510 15 63 46 1 1654 2 1 0 97 2 557 0 0 171 4 258 10 49 49 1 1153 2 1 0 98 3 118 0 0 220 4 408 20 66 19 2 1416 2 1 0 97 4 1142 0 14 209 12 354 21 51 41 3 1798 3 1 0 96 5 358 0 3 349 103 258 10 41 26 2 636 2 1 0 98 6 916 0 0 233 4 431 14 46 56 2 1502 2 1 0 97 7 163 0 115 383 104 343 12 33 23 2 1327 3 2 0 95 March 4, 2026 at 01:33:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2159 103 210 1 13 89 0 1349 0 1 0 99 1 0 0 14 211 50 303 0 24 99 0 0 0 1 0 99 2 0 0 0 58 0 93 0 17 64 0 0 0 0 0 100 3 0 0 0 120 53 116 0 23 111 0 0 0 0 0 100 4 0 0 14 87 13 130 2 15 70 0 870 0 0 0 100 5 0 0 3 254 104 84 0 15 70 0 0 0 0 0 100 6 0 0 0 56 1 94 0 12 88 0 0 0 0 0 100 7 0 0 17 240 103 58 0 13 54 0 295 0 1 0 99 March 4, 2026 at 01:33:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2181 103 152 1 2 2 0 1347 0 1 0 98 1 0 0 448 81 33 70 0 1 2 0 0 0 0 0 100 2 0 0 0 118 18 46 0 1 0 0 1 0 0 0 100 3 0 0 0 76 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 98 13 24 0 1 1 0 605 0 0 0 100 5 0 0 3 282 103 6 1 0 0 0 1 0 0 0 100 6 1 0 14 81 1 16 1 1 1 0 324 0 1 0 99 7 0 0 3 282 103 6 0 0 5 0 300 0 0 0 100 March 4, 2026 at 01:33:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 138 1 0 0 0 1346 0 1 0 99 1 0 0 0 12 0 12 0 1 0 0 0 0 0 0 100 2 0 0 0 113 50 108 0 0 0 0 0 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 27 11 20 1 0 5 0 603 0 0 0 100 5 0 0 3 211 102 4 0 0 0 0 0 0 0 0 100 6 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 7 0 0 3 210 103 4 0 0 5 0 300 0 0 0 100 March 4, 2026 at 01:33:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8197 0 42 2780 104 1179 47 212 166 66 5687 7 5 0 88 1 27974 0 14 715 3 1238 51 245 104 78 4813 12 9 0 78 2 2216 0 132 621 13 1056 29 179 106 69 3581 5 3 0 92 3 974 0 17 513 2 941 37 204 86 57 4022 3 2 0 95 4 3095 0 27 569 12 849 23 161 102 44 3973 6 2 0 92 5 3847 0 124 656 109 763 27 148 85 55 3286 3 3 0 94 6 963 0 33 592 31 952 22 159 139 51 5271 3 3 0 94 7 9255 0 497 604 112 792 30 134 131 75 4213 6 6 0 88 March 4, 2026 at 01:33:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 62 0 7 2138 108 68 1 4 1 0 1381 0 1 0 99 1 0 0 0 31 0 10 1 3 6 0 13 0 0 0 100 2 0 0 0 127 0 117 0 6 2 0 4 0 0 0 100 3 1 0 7 26 0 11 0 5 0 0 10 0 0 0 100 4 11 0 0 34 5 16 1 4 6 0 622 0 0 0 100 5 2 0 3 224 102 4 0 1 0 0 10 0 0 0 100 6 26 0 14 127 53 113 0 3 3 0 279 0 0 0 100 7 21 0 87 218 103 14 0 2 8 0 298 0 1 0 99 March 4, 2026 at 01:33:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2234 110 154 1 8 50 0 1356 0 1 0 99 1 0 0 462 111 0 200 0 14 66 0 0 0 1 0 99 2 0 0 0 178 0 128 0 13 55 0 0 0 0 0 100 3 0 0 0 185 53 113 0 21 95 0 0 0 0 0 100 4 0 0 0 143 5 132 0 21 86 0 596 0 0 0 100 5 0 0 3 313 101 69 0 19 54 0 0 0 0 0 100 6 0 0 14 232 54 205 0 14 91 0 266 0 0 0 100 7 0 0 45 312 103 76 0 12 64 0 307 0 1 0 99 March 4, 2026 at 01:33:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2120 109 152 2 1 0 0 1355 0 1 0 99 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 3 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 4 0 0 0 16 5 10 0 0 4 0 594 0 0 0 100 5 0 0 3 209 101 2 0 0 1 0 0 0 0 0 100 6 0 0 14 120 54 114 1 0 1 0 266 0 0 0 100 7 0 0 3 212 103 6 0 0 7 0 282 0 0 0 100 March 4, 2026 at 01:33:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8823 0 141 2702 111 1053 26 158 153 57 5682 8 5 0 87 1 4860 0 203 516 5 952 20 177 134 65 4016 5 4 0 91 2 1482 0 6 554 7 930 23 165 137 85 3994 3 2 0 95 3 1975 0 130 500 1 950 43 190 78 59 3685 3 2 0 95 4 1207 0 22 506 6 871 30 159 103 39 3670 3 2 0 95 5 3271 0 43 673 103 673 15 132 90 46 2711 5 6 0 89 6 34679 0 32 518 35 739 27 128 113 30 4824 13 9 0 78 7 7600 0 278 563 112 673 23 118 159 49 3414 4 4 0 92 March 4, 2026 at 01:33:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 7 2129 106 84 1 4 0 0 1377 0 1 0 99 1 1 0 0 44 6 35 0 5 5 0 17 0 0 0 100 2 1 0 0 110 45 92 0 0 0 0 4 0 0 0 100 3 0 0 0 26 2 4 0 0 0 0 12 0 0 0 100 4 1 0 0 101 4 84 1 0 2 0 607 0 0 0 99 5 21 0 10 236 107 18 0 2 0 0 32 0 0 0 100 6 63 0 70 33 8 35 0 2 7 0 36 0 1 0 99 7 4 0 31 236 105 26 0 0 4 0 591 0 0 0 100 March 4, 2026 at 01:33:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2143 103 134 1 3 0 0 1355 0 1 0 99 1 0 0 231 122 52 112 0 2 4 0 1 0 1 0 99 2 0 0 0 40 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 40 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 51 5 10 0 0 1 0 597 0 0 0 100 5 0 0 3 248 103 6 0 1 0 0 1 0 0 0 100 6 0 0 7 60 9 23 0 3 4 0 11 0 1 0 99 7 0 0 17 257 105 18 0 0 3 0 574 0 0 0 100 March 4, 2026 at 01:33:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 2197 103 223 2 13 75 0 1353 0 1 0 99 1 0 0 0 236 51 282 0 15 57 0 0 0 0 0 100 2 0 0 0 90 0 98 0 12 80 0 0 0 0 0 100 3 0 0 0 148 56 99 0 17 79 0 0 0 0 0 100 4 0 0 0 95 5 100 0 14 90 0 594 0 0 0 100 5 0 0 3 281 101 71 0 15 53 0 0 0 0 0 100 6 0 0 35 91 7 89 0 14 48 0 9 0 1 0 99 7 0 0 248 263 105 92 1 10 76 0 563 0 1 0 99 March 4, 2026 at 01:33:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 21 2123 103 163 1 6 7 0 1395 0 1 0 99 1 1775 0 2 129 51 119 3 7 32 0 279 0 1 0 99 2 31 0 2 22 1 35 1 8 7 9 44 0 0 0 100 3 3 0 6 11 0 10 0 5 2 0 24 0 0 0 100 4 21 0 4 28 5 34 3 7 7 4 635 0 0 0 100 5 4 0 6 225 101 25 0 7 1 6 36 0 0 0 100 6 7 0 7 37 8 42 0 4 0 3 57 0 0 0 100 7 24 0 24 247 105 56 2 7 5 3 619 0 1 0 99 March 4, 2026 at 01:33:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3968 0 98 2750 106 1053 32 163 92 47 5579 8 5 0 87 1 5988 0 295 526 3 898 22 162 108 49 4724 6 5 0 90 2 8882 0 315 504 6 935 28 144 148 77 4035 5 5 0 90 3 36412 0 35 669 2 1325 38 198 138 90 4915 12 10 0 78 4 3497 0 33 644 13 987 27 166 85 70 4946 6 3 0 92 5 980 0 10 716 106 886 21 135 94 64 3323 3 2 0 95 6 1178 0 8 529 3 948 20 148 67 57 3111 4 2 0 94 7 897 0 111 624 137 620 12 92 85 34 3142 3 2 0 96 March 4, 2026 at 01:33:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2186 103 77 1 4 2 0 1347 0 2 0 98 1 44 0 459 121 6 111 0 1 3 0 9 0 1 0 99 2 0 0 0 82 0 9 0 3 4 0 25 0 0 0 100 3 0 0 0 83 2 5 0 1 0 0 19 0 0 0 100 4 0 0 0 90 5 13 0 0 5 0 572 0 0 0 99 5 0 0 3 284 105 2 0 0 0 0 0 0 0 0 100 6 0 0 0 87 3 16 0 0 0 0 15 0 0 0 100 7 2 0 17 390 154 123 0 1 8 0 587 0 0 0 100 March 4, 2026 at 01:33:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 103 141 2 0 0 0 1360 0 1 0 99 1 0 0 0 35 6 35 0 4 0 0 14 0 0 0 100 2 0 0 0 8 0 3 0 1 7 0 277 0 0 0 100 3 0 0 0 13 3 8 1 0 8 0 296 0 0 0 100 4 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 5 0 0 3 211 103 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 17 313 154 106 1 0 9 0 527 0 0 0 100 March 4, 2026 at 01:33:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2149 103 190 1 11 76 0 1352 0 1 0 99 1 0 0 0 137 7 227 1 14 68 0 309 0 0 0 100 2 0 0 0 50 1 85 0 12 65 0 300 0 0 0 100 3 0 0 0 110 57 97 0 15 87 0 293 0 0 0 100 4 0 0 0 60 2 114 0 21 90 0 2 0 0 0 100 5 0 0 3 249 102 83 0 15 59 0 0 0 0 0 100 6 0 0 0 49 1 88 0 15 81 0 0 0 0 0 100 7 0 0 17 338 153 167 0 15 61 0 266 0 0 0 100 March 4, 2026 at 01:33:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9552 0 135 2697 108 1165 43 208 146 122 7443 9 6 0 85 1 3837 0 24 674 15 1214 29 234 121 76 5185 5 3 0 92 2 1446 0 21 591 4 1055 39 190 121 60 3619 3 3 0 94 3 2678 0 22 628 5 986 42 198 124 56 5838 6 3 0 91 4 707 0 29 620 10 1052 33 202 85 53 3074 3 2 0 95 5 3658 0 28 759 102 799 24 150 74 31 3032 6 3 0 91 6 35502 0 390 528 8 980 40 169 114 65 3729 12 10 0 78 7 6115 0 189 642 126 744 28 138 126 48 3728 4 4 0 92 March 4, 2026 at 01:33:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2133 109 99 0 7 7 0 1364 0 1 0 99 1 0 0 0 151 52 139 0 8 5 0 319 0 0 0 100 2 2 0 0 34 3 21 0 7 3 0 316 0 0 0 100 3 60 0 0 51 9 44 0 8 5 0 325 0 0 0 100 4 10 0 0 32 3 19 1 5 1 0 13 0 0 0 100 5 7 0 3 227 102 8 0 1 1 0 10 0 0 0 100 6 1 0 70 64 2 58 0 1 6 0 7 0 1 0 99 7 4 0 39 233 105 21 0 4 2 0 279 0 0 0 100 March 4, 2026 at 01:33:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 364 2121 103 146 2 2 3 0 1355 0 1 0 98 1 0 0 0 176 51 114 0 1 2 0 301 0 0 0 100 2 0 0 0 65 1 4 0 0 0 0 300 0 0 0 100 3 0 0 0 79 9 18 0 0 1 0 304 0 0 0 100 4 0 0 0 65 1 6 0 0 0 0 5 0 0 0 100 5 0 0 3 269 105 2 0 1 0 0 0 0 0 0 100 6 0 0 35 71 3 21 0 2 3 0 15 0 1 0 99 7 0 0 17 275 103 16 1 1 0 0 273 0 0 0 100 March 4, 2026 at 01:33:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2125 103 140 1 0 0 0 1352 0 1 0 99 1 0 0 0 137 52 116 1 1 1 0 302 0 0 0 100 2 0 0 0 27 2 6 0 0 0 0 321 0 0 0 100 3 0 0 0 44 10 24 0 0 4 0 304 0 0 0 100 4 0 0 0 32 2 14 0 1 0 0 2 0 0 0 100 5 0 0 3 228 102 2 0 0 0 0 0 0 0 0 100 6 0 0 112 13 3 9 0 0 0 0 2 0 0 0 100 7 0 0 17 227 103 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:33:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2416 0 35 2413 104 611 7 109 120 44 2957 1 3 0 96 1 7445 0 258 490 46 731 10 122 128 57 2629 3 3 0 94 2 1184 0 19 338 2 574 14 107 176 72 3523 2 2 0 95 3 6267 0 17 439 65 667 9 125 131 57 3061 2 3 0 95 4 1377 0 5 316 5 524 13 108 134 45 2031 2 1 0 96 5 1130 0 197 481 104 442 4 94 119 53 1298 1 2 0 97 6 400 0 25 307 2 497 8 107 144 46 1883 1 1 0 98 7 2380 0 73 461 104 397 8 76 115 28 1908 1 2 0 96 March 4, 2026 at 01:33:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2902 0 102 2454 104 624 20 77 64 8 3178 5 3 0 92 1 4026 0 185 331 3 657 27 74 92 21 2498 5 3 0 93 2 3821 0 9 199 4 306 7 58 58 15 2312 3 2 0 95 3 28147 0 8 284 3 484 26 57 49 18 1961 10 7 0 84 4 550 0 0 327 45 505 12 61 57 13 1350 1 1 0 98 5 632 0 3 384 108 254 8 54 37 5 1146 1 1 0 98 6 465 0 0 229 2 378 23 51 37 8 1300 2 1 0 97 7 613 0 45 376 106 268 2 42 33 2 1409 1 1 0 98 March 4, 2026 at 01:33:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2174 103 55 2 2 1 0 1339 0 2 0 98 1 0 0 462 121 1 112 0 0 12 0 303 0 1 0 99 2 0 0 0 84 1 6 0 0 0 0 300 0 0 0 100 3 0 0 0 83 1 6 0 1 0 0 0 0 0 0 100 4 44 0 0 91 7 12 1 0 8 0 302 0 0 0 100 5 0 0 3 383 151 104 0 0 0 0 0 0 0 0 100 6 0 0 0 86 2 16 0 2 0 0 0 0 0 0 100 7 2 0 17 283 103 6 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:33:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 140 1 0 0 0 1337 0 1 0 99 1 0 0 0 18 1 14 1 1 6 0 299 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 4 0 0 0 22 8 18 0 0 5 0 308 0 0 0 100 5 0 0 3 314 156 102 0 0 0 0 0 0 0 0 100 6 0 0 0 19 4 18 0 0 0 0 13 0 0 0 100 7 0 0 17 217 103 22 0 1 1 0 274 0 0 0 100 March 4, 2026 at 01:33:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 140 1 1 0 0 1337 0 1 0 99 1 0 0 0 17 1 12 0 1 13 0 299 0 0 0 100 2 0 0 0 10 1 4 1 0 0 0 300 0 0 0 100 3 0 0 0 9 1 6 0 0 0 0 0 0 0 0 100 4 0 0 0 22 8 14 0 0 3 0 303 0 0 0 100 5 0 0 3 310 152 100 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 17 210 103 6 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:33:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 180 0 26 2278 104 363 2 51 102 13 1757 0 2 0 98 1 5493 0 206 221 1 390 5 53 123 38 1981 1 2 0 96 2 5485 0 134 215 3 238 4 46 114 24 1136 2 2 0 96 3 582 0 4 296 62 366 3 61 104 48 1654 1 1 0 99 4 670 0 10 187 7 313 7 68 105 27 1444 2 1 0 98 5 97 0 18 464 151 355 3 53 88 17 533 0 1 0 98 6 70 0 18 167 3 270 1 50 109 25 443 0 0 0 99 7 184 0 30 355 104 250 3 53 69 22 699 0 1 0 99 March 4, 2026 at 01:33:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2111 103 145 1 5 2 0 1334 0 1 0 99 1 0 0 0 33 2 26 0 4 10 0 297 0 0 0 100 2 64 0 0 22 5 8 0 0 1 0 307 0 0 0 100 3 0 0 0 19 2 6 0 0 1 0 0 0 0 0 100 4 0 0 0 18 3 4 1 1 6 0 294 0 0 0 100 5 0 0 3 319 151 104 0 1 1 0 0 0 0 0 100 6 0 0 0 19 3 6 0 1 1 0 0 0 0 0 100 7 0 0 17 217 103 4 1 0 1 0 266 0 0 0 100 March 4, 2026 at 01:33:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2145 105 126 1 1 1 0 338 0 1 0 99 1 0 0 231 19 1 44 1 4 2 0 1299 0 1 0 99 2 1 0 0 54 6 14 0 0 0 0 318 0 0 0 100 3 2 0 0 48 2 10 0 0 0 0 8 0 0 0 100 4 0 0 0 48 3 4 0 0 4 0 294 0 0 0 100 5 0 0 3 343 151 100 0 0 0 0 0 0 0 0 100 6 0 0 0 47 3 6 0 0 0 0 15 0 0 0 100 7 0 0 17 248 105 8 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:33:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 102 120 0 0 0 0 260 0 0 0 100 1 0 0 0 18 4 42 1 0 8 0 1372 0 0 0 100 2 0 0 0 21 5 20 1 1 0 0 308 0 0 0 100 3 0 0 0 11 1 9 0 0 0 0 1 0 0 0 100 4 0 0 0 12 2 8 0 0 8 0 299 0 0 0 100 5 0 0 3 313 157 100 0 0 2 0 0 0 0 0 100 6 0 0 0 21 5 22 0 0 0 0 18 0 0 0 100 7 0 0 17 213 103 14 0 0 0 0 274 0 0 0 100 March 4, 2026 at 01:33:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 102 118 0 1 0 0 260 0 0 0 100 1 0 0 0 14 3 38 1 0 8 0 1373 0 0 0 100 2 0 0 0 19 6 14 0 1 0 0 306 0 0 0 100 3 0 0 0 18 3 20 0 1 0 0 2 0 0 0 100 4 0 0 0 11 2 4 0 0 4 0 294 0 0 0 100 5 0 0 3 310 152 100 0 0 0 0 0 0 0 0 100 6 0 0 0 13 4 8 0 0 0 0 2 0 0 0 100 7 0 0 17 210 103 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:33:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 102 118 1 1 1 0 263 0 0 0 100 1 0 0 0 20 4 44 1 3 12 0 1378 0 0 0 100 2 0 0 0 20 7 16 0 0 0 0 312 0 0 0 100 3 0 0 0 9 1 6 0 0 0 0 0 0 0 0 100 4 0 0 0 15 3 10 1 1 9 0 297 0 0 0 100 5 0 0 3 308 151 102 0 0 4 0 0 0 0 0 100 6 0 0 0 10 2 6 0 0 1 0 0 0 0 0 100 7 0 0 17 218 103 20 1 1 2 0 274 0 0 0 100 March 4, 2026 at 01:33:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2105 103 120 0 0 0 0 264 0 0 0 99 1 21 0 0 19 4 42 2 0 6 0 1370 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 309 0 0 0 100 3 0 0 0 19 5 16 0 2 0 0 2 0 0 0 100 4 20 0 0 17 3 16 0 1 3 0 299 0 0 0 100 5 0 0 3 302 148 92 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:33:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 2109 102 116 0 0 0 0 260 0 0 0 100 1 0 0 0 11 2 36 0 0 8 0 1361 0 0 0 100 2 0 0 0 18 6 12 1 0 0 0 308 0 0 0 100 3 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 4 0 0 0 12 2 6 0 0 4 0 293 0 0 0 100 5 0 0 3 212 101 10 0 1 0 0 0 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 7 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:33:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 102 118 0 0 0 0 260 0 0 0 100 1 0 0 0 12 2 36 1 0 8 0 1361 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 306 0 0 0 100 3 0 0 0 110 52 106 0 0 0 0 2 0 0 0 100 4 0 0 0 13 2 8 0 0 4 0 299 0 0 0 100 5 0 0 3 211 105 0 0 0 0 0 0 0 0 0 100 6 0 0 0 18 4 18 0 0 0 0 15 0 0 0 100 7 0 0 17 213 103 12 0 1 0 0 273 0 0 0 100 March 4, 2026 at 01:33:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 102 116 1 0 0 0 260 0 0 0 100 1 0 0 0 16 2 40 1 0 4 0 1363 0 0 0 100 2 0 0 0 17 6 12 0 0 0 0 308 0 0 0 100 3 0 0 0 109 51 106 0 0 0 0 0 0 0 0 100 4 0 0 0 11 2 4 1 0 4 0 294 0 0 0 100 5 0 0 3 213 103 4 0 1 0 0 0 0 0 0 100 6 0 0 0 14 2 14 0 1 0 0 0 0 0 0 100 7 0 0 17 211 103 4 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:33:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3327 0 47 2658 115 962 31 167 140 24 3415 6 3 0 91 1 1517 0 10 573 3 1062 35 170 175 38 5687 5 3 0 92 2 38544 0 126 449 5 810 44 145 181 40 4216 12 10 0 79 3 4047 0 11 546 89 853 24 139 163 41 3954 5 3 0 93 4 745 0 2 451 5 795 17 137 168 38 2509 3 2 0 96 5 763 0 9 607 103 740 24 105 110 35 1927 2 1 0 96 6 565 0 10 399 7 694 19 122 107 14 2458 2 2 0 96 7 1399 0 280 551 111 667 22 105 103 27 2200 2 2 0 95 March 4, 2026 at 01:33:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 35 2169 154 170 0 3 2 0 283 0 1 0 99 1 1 0 0 92 3 111 2 5 9 0 1403 0 1 0 99 2 11 0 7 22 3 10 1 2 1 0 331 0 0 0 100 3 0 0 0 22 3 7 0 2 1 0 13 0 0 0 100 4 0 0 0 22 3 9 1 3 3 0 306 0 0 0 100 5 44 0 3 230 105 18 0 1 1 0 30 0 0 0 100 6 0 0 0 25 4 11 1 2 1 0 5 0 0 0 100 7 25 0 31 217 103 9 1 1 1 0 276 0 0 0 100 March 4, 2026 at 01:33:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2198 153 131 0 2 1 0 261 0 1 0 99 1 0 0 231 118 2 142 0 0 5 0 1375 0 1 0 99 2 0 0 0 47 2 6 0 0 0 0 301 0 0 0 100 3 0 0 0 47 2 8 0 1 0 0 2 0 0 0 100 4 0 0 0 46 2 4 0 1 11 0 294 0 0 0 100 5 0 0 3 256 107 12 0 0 0 0 9 0 0 0 100 6 0 0 0 45 2 4 0 0 0 0 0 0 0 0 100 7 0 0 17 248 104 8 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:33:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2157 152 122 1 1 0 0 260 0 0 0 100 1 0 0 0 115 2 140 1 1 2 0 1377 0 0 0 100 2 0 0 0 12 1 8 0 2 0 0 300 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 4 0 0 0 13 2 8 1 0 5 0 299 0 0 0 100 5 0 0 3 224 112 12 0 0 0 0 9 0 0 0 100 6 0 0 0 17 4 16 0 0 0 0 13 0 0 0 100 7 0 0 17 212 103 10 1 0 1 0 273 0 0 0 100 March 4, 2026 at 01:33:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2440 0 264 2474 140 679 14 118 70 59 3535 2 3 0 95 1 2834 0 31 433 3 626 14 125 81 75 4719 4 3 0 93 2 6018 0 179 372 3 598 11 116 112 58 3080 3 3 0 94 3 36250 0 33 372 3 561 19 124 84 48 2796 11 9 0 81 4 1793 0 202 328 5 564 9 108 60 65 2041 2 2 0 96 5 5621 0 16 547 111 558 15 110 79 61 2370 3 2 0 94 6 4439 0 31 370 13 478 11 104 96 51 2575 2 2 0 96 7 383 0 65 504 105 496 9 86 40 57 1932 1 1 0 98 March 4, 2026 at 01:33:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 408 0 77 2451 102 730 41 148 135 3 2535 3 3 0 94 1 759 0 0 480 5 886 31 128 131 0 3433 2 2 0 95 2 662 0 0 375 3 720 33 113 113 2 1980 4 1 0 95 3 152 0 0 393 67 622 20 102 106 1 2092 3 1 0 96 4 543 0 0 391 43 642 21 103 142 5 1691 2 1 0 97 5 540 0 10 493 102 525 26 88 114 3 1271 2 1 0 97 6 393 0 0 319 5 613 27 105 100 1 1704 2 1 0 97 7 457 0 45 478 103 532 13 69 113 3 1478 4 1 0 95 March 4, 2026 at 01:33:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2175 103 17 0 3 1 0 563 0 2 0 98 1 0 0 462 130 2 152 1 0 6 0 1382 0 1 0 99 2 0 0 0 79 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 100 7 24 0 0 0 0 11 0 0 0 100 4 0 0 0 184 53 106 0 0 2 0 294 0 0 0 100 5 0 0 2 283 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 84 3 8 0 1 0 0 1 0 0 0 100 7 0 0 18 287 102 14 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:33:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 46 1 1 0 0 559 0 0 0 99 1 0 0 0 77 2 98 0 0 3 0 1380 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 26 6 22 0 0 0 0 9 0 0 0 100 4 0 0 0 113 53 106 1 1 4 0 294 0 0 0 100 5 0 0 3 209 102 3 0 1 0 0 0 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 0 0 17 207 102 2 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:33:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2119 103 130 0 2 2 0 561 0 0 0 100 1 0 0 0 13 2 36 2 0 6 0 1380 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 24 7 20 0 1 0 0 11 0 0 0 100 4 0 0 0 112 53 108 0 0 0 0 299 0 0 0 100 5 0 0 3 216 108 2 0 0 0 0 0 0 0 0 100 6 0 0 0 18 4 18 0 0 0 0 14 0 0 0 100 7 0 0 17 212 102 12 0 0 0 0 273 0 0 0 100 March 4, 2026 at 01:33:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2040 0 137 2691 141 1121 39 201 106 78 4718 3 4 0 93 1 1363 0 32 613 5 1097 45 216 65 64 4852 4 3 0 93 2 1301 0 30 571 2 973 29 158 106 65 3874 5 4 0 91 3 2525 0 191 529 9 879 35 163 99 44 5112 6 3 0 91 4 7450 0 14 586 13 1028 29 181 166 84 4070 5 4 0 91 5 5752 0 191 730 104 918 38 175 103 63 3580 4 3 0 93 6 5485 0 52 535 3 877 24 169 106 62 3593 5 3 0 93 7 37510 0 229 654 103 740 30 131 103 47 4010 14 9 0 77 March 4, 2026 at 01:33:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2217 153 298 0 11 69 0 563 0 1 0 99 1 0 0 70 109 2 218 1 19 82 0 1389 0 1 0 98 2 2 0 0 68 0 100 0 18 78 0 5 0 0 0 100 3 0 0 0 116 54 90 0 17 78 0 19 0 0 0 100 4 0 0 0 73 3 100 0 14 90 0 313 0 0 0 100 5 16 0 3 269 101 91 0 18 69 0 17 0 0 0 100 6 2 0 0 67 5 86 0 16 59 0 14 0 0 0 100 7 69 0 38 282 108 128 0 14 86 0 286 0 0 0 100 March 4, 2026 at 01:33:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2232 153 224 1 2 0 0 560 0 1 0 99 1 0 0 42 82 3 38 0 0 8 0 1382 0 1 0 98 2 0 0 462 19 1 12 0 1 3 0 0 0 1 0 99 3 0 0 0 81 1 2 0 0 1 0 0 0 0 0 100 4 0 0 0 86 4 4 1 0 2 0 294 0 0 0 100 5 0 0 3 279 101 0 0 0 1 0 0 0 0 0 100 6 0 0 0 85 4 6 0 0 1 0 0 0 0 0 100 7 0 0 17 293 108 16 1 0 1 0 275 0 0 0 100 March 4, 2026 at 01:33:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2161 154 222 0 0 0 0 561 0 1 0 99 1 0 0 0 13 2 36 2 0 3 0 1379 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 14 1 14 0 1 0 0 2 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 7 0 0 17 220 109 16 0 0 0 0 276 0 0 0 100 March 4, 2026 at 01:33:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1834 0 32 2674 134 1037 26 189 226 70 3846 3 3 0 93 1 34614 0 197 530 3 999 37 182 60 58 5380 12 9 0 79 2 1305 0 6 495 0 810 15 150 88 47 2514 4 2 0 94 3 1218 0 22 502 1 841 34 157 77 68 4497 3 3 0 94 4 394 0 28 441 17 730 24 143 110 43 2919 3 3 0 94 5 3166 0 17 611 111 659 13 101 135 42 3026 3 2 0 95 6 15071 0 490 422 5 716 20 125 163 69 5372 7 6 0 86 7 6018 0 90 663 110 654 20 131 115 61 2925 6 3 0 91 March 4, 2026 at 01:33:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2114 103 112 1 3 5 0 568 0 1 0 99 1 0 0 0 37 3 50 1 2 14 0 1388 0 1 0 99 2 3 0 0 26 2 7 0 0 1 0 8 0 0 0 100 3 16 0 0 131 53 118 0 1 1 0 20 0 0 0 100 4 49 0 0 39 5 26 0 3 5 0 317 0 0 0 100 5 11 0 3 226 102 5 0 2 0 0 28 0 0 0 100 6 3 0 21 32 6 18 0 3 0 0 272 0 0 0 100 7 0 0 17 239 102 16 0 1 0 0 9 0 0 0 100 March 4, 2026 at 01:34:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2189 106 196 0 18 60 0 573 0 2 0 98 1 0 0 231 110 2 222 1 15 78 0 1380 0 1 0 99 2 0 0 0 89 0 85 0 14 84 0 0 0 0 0 100 3 0 0 0 251 104 206 0 11 65 0 18 0 0 0 100 4 0 0 0 106 9 112 1 17 75 0 303 0 0 0 100 5 0 0 3 275 101 57 0 11 53 0 0 0 0 0 100 6 0 0 14 104 4 119 1 19 87 0 266 0 0 0 100 7 0 0 3 288 101 92 0 12 70 0 0 0 0 0 100 March 4, 2026 at 01:34:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 28 2142 103 125 0 1 1 0 560 0 1 0 99 1 0 0 231 21 2 44 1 0 6 0 1380 0 1 0 99 2 0 0 0 43 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 145 51 104 0 0 0 0 2 0 0 0 100 4 0 0 0 58 9 16 0 0 5 0 303 0 0 0 100 5 0 0 3 243 101 0 0 0 0 0 0 0 0 0 100 6 0 0 14 47 4 8 0 0 0 0 266 0 0 0 100 7 0 0 3 242 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:34:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 297 0 26 2178 103 195 3 19 25 15 1856 0 2 0 98 1 41 0 8 90 2 140 5 28 25 14 1391 0 1 0 99 2 26 0 6 68 0 93 1 16 5 15 338 0 0 0 100 3 988 0 126 172 50 229 3 21 33 22 791 0 1 0 99 4 53 0 13 104 11 149 0 31 21 20 602 0 1 0 99 5 60 0 12 290 101 127 0 23 31 17 303 0 1 0 99 6 2297 0 18 87 4 115 2 25 42 15 892 0 1 0 98 7 410 0 18 275 101 116 0 21 38 15 406 0 0 0 99 March 4, 2026 at 01:34:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 40110 0 284 2714 135 1068 35 157 110 45 4677 16 11 0 73 1 1651 0 14 646 11 1214 45 210 99 72 4050 5 3 0 92 2 2868 0 15 508 8 829 24 143 83 51 3200 3 3 0 94 3 6522 0 31 537 4 870 23 133 108 36 4861 8 3 0 89 4 1360 0 5 515 7 857 16 140 83 48 3219 3 2 0 95 5 2788 0 12 587 111 592 14 115 61 25 2788 3 2 0 95 6 1582 0 206 465 5 887 23 148 62 42 3735 5 2 0 92 7 2965 0 194 552 103 630 17 108 66 48 2382 3 2 0 95 March 4, 2026 at 01:34:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 49 2234 157 200 0 0 2 0 273 0 2 0 98 1 0 0 462 38 3 56 1 2 2 0 1086 0 1 0 99 2 0 0 0 89 2 14 0 4 6 0 600 0 0 0 100 3 0 0 0 80 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 87 4 8 1 0 7 0 294 0 0 0 100 5 0 0 3 280 102 0 0 0 0 0 0 0 0 0 100 6 3 0 14 90 3 14 1 0 0 0 268 0 0 0 100 7 0 0 3 283 101 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:34:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 2165 108 202 0 14 72 0 271 0 1 0 99 1 0 0 0 107 2 221 1 15 81 0 1076 0 0 0 99 2 0 0 0 177 52 234 1 15 63 0 598 0 0 0 100 3 0 0 0 104 54 96 0 12 85 0 2 0 0 0 100 4 0 0 0 54 4 92 0 15 81 0 294 0 0 0 100 5 0 0 3 234 101 50 0 10 58 0 0 0 0 0 100 6 0 0 14 54 3 94 0 14 86 0 266 0 0 0 100 7 0 0 3 246 102 82 0 10 65 0 0 0 0 0 100 March 4, 2026 at 01:34:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2119 108 118 0 1 0 0 269 0 0 0 100 1 0 0 0 15 3 38 0 1 2 0 1077 0 0 0 100 2 0 0 0 115 53 106 1 0 4 0 604 0 0 0 100 3 0 0 0 12 1 10 0 1 1 0 0 0 0 0 100 4 0 0 0 16 5 8 0 0 2 0 294 0 0 0 100 5 0 0 3 207 101 0 0 0 1 0 0 0 0 0 100 6 0 0 14 19 4 14 0 0 1 0 266 0 0 0 100 7 0 0 3 206 101 0 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:34:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10911 0 175 2787 119 1058 30 175 151 54 4114 12 5 0 84 1 2507 0 202 649 11 1197 45 231 115 77 5310 5 4 0 91 2 1702 0 28 632 27 1034 32 158 133 66 5841 4 3 0 93 3 4772 0 122 530 1 952 34 179 143 70 3885 4 3 0 93 4 558 0 17 546 6 951 34 177 72 75 3438 3 2 0 95 5 421 0 15 644 105 791 22 133 65 46 2448 3 2 0 95 6 1506 0 34 517 6 884 28 166 93 49 4651 4 3 0 94 7 41052 0 275 647 104 782 25 128 155 52 4472 13 11 0 76 March 4, 2026 at 01:34:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 102 32 3 5 1 0 275 0 0 0 100 1 22 0 0 146 56 166 2 2 4 0 1130 0 0 0 99 2 0 0 70 25 2 21 0 5 4 0 625 0 1 0 99 3 24 0 7 70 1 54 0 1 4 0 17 0 0 0 100 4 17 0 0 84 4 71 3 6 2 0 303 0 0 0 100 5 0 0 3 231 107 4 0 1 1 0 19 0 0 0 100 6 4 0 14 33 3 20 1 1 0 0 273 0 0 0 100 7 57 0 17 234 105 17 1 2 1 0 37 0 0 0 100 March 4, 2026 at 01:34:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2164 102 104 0 0 0 0 263 0 1 0 99 1 0 0 0 172 53 142 1 0 0 0 1077 0 0 0 99 2 0 0 35 68 4 11 1 1 7 0 622 0 1 0 99 3 0 0 350 18 1 10 0 0 3 0 2 0 1 0 99 4 0 0 0 70 3 10 0 2 5 0 294 0 0 0 100 5 0 0 3 270 102 10 0 1 0 0 0 0 0 0 100 6 0 0 14 76 5 18 0 0 0 0 268 0 0 0 100 7 0 0 3 275 107 14 0 1 0 0 9 0 0 0 100 March 4, 2026 at 01:34:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2166 104 179 0 14 65 0 261 0 1 0 99 1 0 0 0 205 42 301 1 16 70 0 1076 0 1 0 99 2 0 0 112 79 13 127 1 25 85 0 603 0 0 0 100 3 0 0 0 120 55 89 0 16 89 0 0 0 0 0 100 4 0 0 0 64 3 80 0 14 93 0 294 0 0 0 100 5 0 0 3 265 101 88 0 20 66 0 0 0 0 0 100 6 0 0 14 76 3 104 0 9 83 0 266 0 0 0 100 7 0 0 3 273 107 83 1 10 54 0 9 0 0 0 100 March 4, 2026 at 01:34:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 803 0 17 2402 102 591 8 99 41 61 1547 1 1 0 97 1 1217 0 194 273 3 512 7 100 47 58 3055 1 2 0 97 2 314 0 22 315 37 396 4 74 41 28 1759 1 2 0 97 3 469 0 28 233 2 377 13 83 89 38 2642 2 2 0 96 4 3859 0 135 261 15 446 12 98 68 47 2860 3 3 0 94 5 4415 0 22 453 102 403 7 76 63 48 1667 2 2 0 96 6 12937 0 154 326 4 468 13 87 73 44 3560 4 4 0 92 7 531 0 41 462 111 414 4 81 84 55 1413 1 1 0 98 March 4, 2026 at 01:34:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1654 0 188 2377 103 623 26 86 43 19 2199 2 2 0 96 1 831 0 0 291 8 526 19 83 47 33 2741 4 1 0 95 2 758 0 0 315 39 475 14 61 45 11 1646 3 1 0 96 3 929 0 71 234 2 431 19 72 50 11 1325 2 2 0 97 4 236 0 0 231 4 354 10 63 55 10 1875 2 1 0 97 5 3279 0 12 434 105 351 6 47 67 11 1472 2 2 0 97 6 30775 0 40 299 3 451 31 68 78 9 3004 11 7 0 81 7 972 0 32 455 112 424 18 62 53 11 1360 4 1 0 95 March 4, 2026 at 01:34:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2181 102 108 0 0 0 0 263 0 1 0 99 1 0 0 0 92 4 48 1 0 0 0 1108 0 1 0 99 2 44 0 0 196 57 116 0 0 0 0 14 0 0 0 100 3 0 0 42 79 1 12 0 0 1 0 9 0 1 0 99 4 0 0 462 21 4 10 0 0 3 0 595 0 1 0 99 5 0 0 3 285 105 2 0 0 0 0 0 0 0 0 100 6 2 0 14 83 3 10 0 2 0 0 267 0 0 0 100 7 0 0 3 294 103 17 1 1 8 0 300 0 0 0 100 March 4, 2026 at 01:34:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2116 102 120 0 2 1 0 260 0 0 0 100 1 0 0 0 12 2 36 1 1 1 0 1087 0 0 0 100 2 0 0 0 120 56 112 0 0 0 0 9 0 0 0 100 3 0 0 0 7 0 4 0 0 0 0 0 0 0 0 100 4 0 0 0 15 4 8 1 0 6 0 595 0 0 0 100 5 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 6 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 7 0 0 3 220 103 14 0 1 11 0 304 0 0 0 100 March 4, 2026 at 01:34:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2144 103 184 1 13 68 0 260 0 1 0 99 1 0 0 0 119 3 244 2 18 76 0 1086 0 0 0 99 2 0 0 0 156 56 185 0 9 58 0 9 0 0 0 100 3 0 0 0 111 54 105 0 21 97 0 2 0 0 0 100 4 0 0 0 70 4 124 0 18 66 0 593 0 0 0 100 5 0 0 3 238 101 62 0 11 55 0 0 0 0 0 100 6 0 0 14 53 3 98 0 18 73 0 266 0 0 0 100 7 0 0 3 248 103 77 0 10 69 0 298 0 0 0 100 March 4, 2026 at 01:34:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2195 0 19 2760 119 1233 43 233 143 63 3750 7 3 0 90 1 1985 0 17 657 4 1170 42 223 176 76 5555 7 4 0 90 2 36895 0 191 668 21 1018 47 169 439 57 4536 15 8 0 77 3 3611 0 13 660 2 1110 38 208 117 58 5462 4 3 0 93 4 3474 0 199 507 7 898 32 166 161 58 6377 5 4 0 91 5 4411 0 198 729 116 993 22 166 148 88 3385 3 4 0 93 6 4704 0 156 506 5 948 29 175 132 57 4197 4 3 0 93 7 32497 0 124 824 104 916 38 156 376 58 4079 14 11 0 75 March 4, 2026 at 01:34:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 77 2167 153 124 0 4 4 0 12 0 1 0 99 1 8 0 0 32 2 50 1 1 6 0 1110 0 1 0 99 2 0 0 0 32 3 16 0 2 0 0 13 0 0 0 100 3 2 0 0 126 2 110 0 3 1 0 21 0 0 0 100 4 0 0 0 28 4 10 0 1 4 0 613 0 0 0 100 5 0 0 3 225 102 2 0 0 0 0 12 0 0 0 100 6 6 0 21 33 6 19 0 4 0 0 534 0 0 0 100 7 68 0 17 233 106 16 1 3 6 0 317 0 0 0 100 March 4, 2026 at 01:34:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2186 115 37 0 1 1 0 0 0 1 0 99 1 0 0 462 106 39 136 1 3 2 0 1098 0 1 0 99 2 0 0 0 81 0 6 0 0 0 0 5 0 0 0 100 3 0 0 0 185 0 116 0 1 0 0 7 0 0 0 100 4 0 0 0 87 4 8 1 0 2 0 594 0 0 0 100 5 0 0 3 283 105 0 0 0 0 0 0 0 0 0 100 6 0 0 21 88 5 14 0 1 0 0 530 0 0 0 100 7 0 0 3 297 109 20 0 0 6 0 310 0 0 0 100 March 4, 2026 at 01:34:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 0 0 0 0 0 0 0 0 0 100 1 0 0 0 118 54 140 1 1 0 0 1087 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 110 1 106 0 0 0 0 2 0 0 0 100 4 0 0 0 14 4 8 0 0 2 0 594 0 0 0 100 5 0 0 3 208 102 2 0 1 0 0 0 0 0 0 100 6 0 0 21 23 6 20 1 0 0 0 528 0 0 0 100 7 0 0 3 226 109 20 0 0 1 0 308 0 0 0 100 March 4, 2026 at 01:34:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30091 0 158 2480 101 552 20 99 91 67 2267 10 9 0 82 1 642 0 21 497 44 792 15 133 170 56 4099 2 2 0 96 2 6670 0 243 279 9 478 15 84 135 59 2119 4 3 0 93 3 541 0 9 520 57 717 10 117 172 52 2381 1 2 0 97 4 2714 0 15 318 4 522 7 128 128 51 2833 3 2 0 95 5 477 0 18 477 103 422 8 81 121 38 1696 1 1 0 98 6 1119 0 157 290 4 526 5 102 138 57 2205 1 2 0 97 7 791 0 58 478 110 469 12 80 133 38 1463 1 1 0 98 March 4, 2026 at 01:34:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 570 0 0 2424 101 651 18 95 43 9 2021 2 4 0 94 1 592 0 0 431 5 797 24 102 30 8 2448 2 2 0 96 2 878 0 7 345 6 602 25 67 48 14 1683 2 1 0 96 3 2435 0 182 304 6 542 21 83 71 13 2759 6 2 0 92 4 2833 0 5 354 44 492 10 66 51 9 1764 2 1 0 96 5 5349 0 32 472 104 345 12 53 66 13 1587 5 2 0 94 6 594 0 91 260 4 496 14 68 53 16 3014 4 2 0 94 7 519 0 45 398 104 373 11 60 41 16 1612 2 1 0 97 March 4, 2026 at 01:34:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 101 102 0 0 0 0 0 0 1 0 99 1 0 0 462 26 5 14 1 0 9 0 603 0 1 0 99 2 0 0 0 79 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 83 1 6 0 1 5 0 294 0 0 0 100 4 44 0 0 190 57 112 0 0 0 0 10 0 0 0 100 5 0 0 3 279 101 0 0 0 0 0 0 0 0 0 100 6 2 0 63 86 4 48 0 0 2 0 1615 0 1 0 98 7 0 0 3 284 103 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:34:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 0 0 0 0 100 1 0 0 0 27 7 26 0 1 4 0 612 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 5 0 0 0 100 3 0 0 0 12 2 10 0 0 3 0 303 0 0 0 100 4 0 0 0 118 57 112 0 0 0 0 9 0 0 0 100 5 0 0 3 214 105 2 0 1 0 0 0 0 0 0 100 6 0 0 21 27 5 58 2 1 0 0 1613 0 0 0 100 7 0 0 3 215 103 10 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:34:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 1 0 0 0 0 0 0 100 1 0 0 0 17 5 12 0 1 5 0 604 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 10 1 6 1 0 3 0 294 0 0 0 100 4 0 0 0 118 57 112 0 0 0 0 9 0 0 0 100 5 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 6 0 0 21 27 4 56 1 0 0 0 1614 0 0 0 100 7 0 0 3 214 103 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:34:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3463 0 36 2715 111 910 29 187 183 47 2828 5 4 0 91 1 9358 0 344 597 6 1088 36 209 247 85 6391 6 6 0 88 2 8762 0 215 590 2 939 23 172 181 57 3391 5 4 0 91 3 1747 0 15 599 56 1138 19 186 217 78 4159 5 2 0 93 4 3217 0 14 576 23 951 26 177 186 51 4276 5 3 0 92 5 2500 0 126 678 103 862 17 162 153 63 2577 2 2 0 95 6 735 0 32 550 7 1009 36 189 145 64 4413 3 3 0 94 7 34085 0 84 666 127 738 24 120 133 50 3779 12 11 0 78 March 4, 2026 at 01:34:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 2119 100 44 0 5 1 0 22 0 0 0 100 1 4 0 70 46 5 33 1 4 9 0 627 0 1 0 99 2 46 0 0 85 5 70 0 3 8 0 22 0 0 0 99 3 21 0 0 29 2 14 0 2 4 0 315 0 0 0 100 4 2 0 7 25 2 4 1 2 4 0 10 0 0 0 100 5 1 0 7 224 101 6 0 2 0 0 4 0 0 0 100 6 1 0 21 39 5 52 1 1 1 0 1645 0 0 0 100 7 16 0 21 336 155 126 0 4 2 0 10 0 0 0 100 March 4, 2026 at 01:34:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 103 112 0 1 3 0 1 0 1 0 99 1 0 0 42 88 5 18 0 2 4 0 594 0 1 0 99 2 0 0 462 33 10 18 0 1 2 0 10 0 1 0 99 3 0 0 0 84 3 8 0 0 2 0 296 0 0 0 100 4 0 0 0 82 2 4 0 1 0 0 0 0 0 0 100 5 0 0 3 283 102 6 0 2 0 0 0 0 0 0 100 6 1 0 21 93 5 48 1 0 0 0 1621 0 0 0 100 7 0 0 3 396 154 122 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:34:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 23 6 22 0 0 2 0 614 0 0 0 100 2 0 0 0 22 7 18 1 0 0 0 14 0 0 0 100 3 0 0 0 11 1 8 1 0 2 0 301 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 3 211 105 0 0 0 0 0 0 0 0 0 100 6 2 0 21 19 4 46 1 0 1 0 1621 0 0 0 100 7 0 0 3 315 153 110 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:34:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10728 0 29 2611 102 951 20 167 216 40 3087 5 7 0 88 1 15677 0 204 546 6 795 32 132 242 42 4785 9 5 0 86 2 28398 0 161 487 11 683 24 117 390 75 4449 8 7 0 84 3 5344 0 194 526 7 1034 13 166 159 80 4118 3 4 0 93 4 3715 0 13 496 6 859 12 155 102 65 3974 4 2 0 94 5 16834 0 18 631 102 733 12 136 285 67 2865 8 5 0 88 6 4361 0 220 568 11 971 18 130 108 74 5939 6 3 0 91 7 624 0 54 697 140 780 13 120 84 48 2296 2 1 0 97 March 4, 2026 at 01:34:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 216 0 0 2257 103 382 12 36 101 1 889 2 1 0 97 1 468 0 14 158 6 324 17 44 115 5 1140 3 1 0 97 2 722 0 70 216 40 324 8 36 83 2 432 1 1 0 98 3 373 0 0 208 57 359 16 47 117 1 959 1 1 0 98 4 421 0 0 114 3 179 11 36 97 3 406 1 1 0 99 5 1022 0 3 298 102 150 2 23 106 0 523 1 1 0 99 6 767 0 7 136 6 240 1 32 136 1 2224 2 1 0 96 7 397 0 52 334 115 225 9 34 81 2 272 1 0 0 99 March 4, 2026 at 01:34:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 101 118 0 1 6 0 293 0 1 0 99 1 0 0 14 54 4 14 1 1 9 0 566 0 0 0 100 2 0 0 14 46 2 6 0 1 4 0 1 0 1 0 99 3 0 0 238 13 2 8 0 0 4 0 302 0 1 0 99 4 0 0 0 42 1 0 0 0 0 0 0 0 0 0 100 5 0 0 3 243 101 0 0 0 0 0 0 0 0 0 100 6 0 0 7 56 8 46 0 0 1 0 1357 0 0 0 100 7 0 0 3 351 153 106 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:34:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 101 112 1 0 2 0 294 0 1 0 99 1 0 0 14 51 5 14 0 0 9 0 567 0 0 0 100 2 0 0 14 46 1 14 0 1 1 0 0 0 0 0 100 3 0 0 224 11 1 6 0 0 1 0 300 0 0 0 100 4 0 0 0 40 1 0 0 0 0 0 0 0 0 0 100 5 0 0 3 241 101 0 0 0 0 0 0 0 0 0 100 6 0 0 7 59 10 50 1 0 1 0 1356 0 0 0 100 7 0 0 3 346 153 106 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:34:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 116 0 0 0 0 294 0 0 0 100 1 0 0 14 22 6 18 0 0 0 0 579 0 0 0 100 2 0 0 14 13 1 10 0 0 0 0 5 0 0 0 100 3 0 0 0 19 2 22 0 2 0 0 307 0 0 0 100 4 0 0 0 8 1 0 0 0 0 0 0 0 0 0 100 5 0 0 3 213 105 0 0 0 0 0 0 0 0 0 100 6 0 0 7 25 9 48 1 0 0 0 1355 0 0 0 100 7 0 0 3 313 153 106 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:34:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3837 0 134 2713 104 1079 34 191 102 55 5645 4 4 0 91 1 6298 0 178 702 5 1152 36 207 122 69 4746 4 5 0 91 2 1528 0 14 641 5 1075 19 170 158 61 4976 4 3 0 94 3 8147 0 193 621 4 1149 32 194 152 65 4901 5 5 0 90 4 6226 0 30 634 29 927 22 151 138 58 3379 6 3 0 91 5 2858 0 192 612 106 735 15 130 97 72 3416 6 3 0 91 6 27656 0 19 525 8 927 35 158 104 40 4895 14 9 0 77 7 554 0 112 712 120 884 31 139 67 56 2304 3 2 0 95 March 4, 2026 at 01:34:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2162 101 191 0 17 74 0 294 0 1 0 99 1 4 0 14 84 3 121 1 18 85 0 563 0 0 0 100 2 0 0 0 55 0 81 0 13 70 0 0 0 0 0 100 3 0 0 0 130 61 220 0 21 94 0 302 0 1 0 99 4 0 0 0 171 51 201 0 21 98 0 0 0 0 0 100 5 44 0 3 273 107 96 0 10 79 0 8 0 0 0 100 6 0 0 7 64 3 114 1 11 97 0 1359 0 0 0 100 7 0 0 73 241 103 59 0 14 50 0 0 0 1 0 99 March 4, 2026 at 01:34:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 503 2106 101 113 1 3 3 0 294 0 1 0 99 1 0 0 14 186 50 110 0 2 1 0 569 0 0 0 100 2 0 0 0 79 1 0 0 0 1 0 0 0 0 0 100 3 0 0 0 86 4 8 0 0 1 0 300 0 0 0 100 4 0 0 0 92 7 10 0 1 1 0 0 0 0 0 100 5 0 0 3 298 107 26 0 1 1 0 9 0 0 0 100 6 0 0 7 86 4 36 2 0 2 0 1346 0 0 0 100 7 0 0 3 286 103 8 0 0 2 0 0 0 0 0 100 March 4, 2026 at 01:34:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 110 0 0 1 0 295 0 0 0 100 1 0 0 14 120 53 118 0 1 3 0 568 0 0 0 100 2 0 0 0 10 2 168 0 1 0 0 332 0 0 0 100 3 0 0 0 15 4 10 0 0 0 0 302 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 3 219 107 12 0 0 0 0 9 0 0 0 100 6 0 0 7 13 4 38 1 0 0 0 1348 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:34:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8287 0 134 2704 102 1055 40 197 176 78 4646 4 5 0 90 1 2658 0 354 610 41 1070 25 201 116 74 4216 4 3 0 93 2 1837 0 201 463 9 818 20 140 98 59 3624 3 2 0 94 3 1043 0 8 599 5 1075 41 181 97 82 4333 3 3 0 94 4 805 0 15 530 3 941 33 169 85 53 4239 5 2 0 93 5 4785 0 37 644 113 744 17 126 143 55 3137 7 4 0 89 6 5117 0 22 580 5 966 25 158 151 48 4707 6 3 0 91 7 32625 0 98 651 104 711 24 115 119 50 4789 14 10 0 76 March 4, 2026 at 01:34:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 7 2125 103 12 0 2 1 0 563 0 0 0 99 1 3 0 84 21 1 15 1 2 11 0 589 0 1 0 99 2 55 0 7 36 6 17 2 3 5 0 24 0 0 0 99 3 0 0 0 135 6 120 0 0 0 0 318 0 0 0 100 4 4 0 0 30 1 14 0 1 0 0 7 0 0 0 100 5 0 0 3 224 102 3 0 2 0 0 10 0 0 0 100 6 0 0 0 134 55 146 2 3 0 0 1097 0 0 0 100 7 17 0 17 235 105 26 0 3 1 0 9 0 0 0 100 March 4, 2026 at 01:34:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2208 103 115 1 14 75 0 558 0 1 0 99 1 0 0 42 112 3 115 0 16 83 0 565 0 1 0 99 2 0 0 343 75 6 122 0 13 71 0 9 0 1 0 99 3 0 0 0 260 74 203 0 16 61 0 300 0 1 0 99 4 0 0 0 164 1 203 0 19 73 0 0 0 0 0 100 5 0 0 3 300 101 85 0 12 87 0 0 0 0 0 100 6 0 0 0 137 10 171 1 14 86 0 1079 0 1 0 99 7 0 0 3 401 146 189 0 12 75 0 0 0 0 0 100 March 4, 2026 at 01:34:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2129 103 124 1 1 7 0 553 0 0 0 99 1 0 0 14 30 2 10 0 1 3 0 570 0 0 0 100 2 0 0 119 21 7 16 0 0 1 0 10 0 0 0 100 3 0 0 0 33 5 12 0 0 0 0 303 0 0 0 100 4 0 0 0 31 1 8 0 0 0 0 0 0 0 0 100 5 0 0 3 224 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 24 1 32 0 0 1 0 1077 0 0 0 100 7 0 0 3 329 153 106 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:34:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1008 0 128 2170 104 220 1 23 38 29 2336 1 2 0 98 1 95 0 42 106 3 163 3 32 25 23 906 0 2 0 98 2 42 0 15 108 7 183 0 35 26 24 314 0 1 0 99 3 24 0 17 83 5 109 3 25 11 11 594 0 1 0 99 4 50 0 6 81 1 102 1 22 5 13 214 0 0 0 100 5 22 0 8 266 101 86 2 22 15 15 238 0 0 0 100 6 17 0 6 76 1 128 2 25 26 12 1345 0 1 0 99 7 2298 0 13 381 152 201 2 20 35 16 584 1 1 0 98 March 4, 2026 at 01:34:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8406 0 132 2617 109 1028 40 165 182 59 5865 5 5 0 90 1 4795 0 210 534 13 969 26 155 108 64 4287 4 4 0 92 2 1537 0 262 447 2 753 20 140 87 37 3077 3 3 0 93 3 3567 0 14 522 8 812 20 123 69 41 3173 7 2 0 90 4 2144 0 11 438 4 773 25 147 90 45 3539 6 2 0 91 5 1180 0 8 614 109 654 16 115 64 42 1867 2 1 0 96 6 35814 0 29 608 35 921 34 134 102 35 3581 12 9 0 79 7 3032 0 80 622 104 759 24 108 127 39 3797 4 3 0 94 March 4, 2026 at 01:34:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2179 103 114 1 1 5 0 556 0 1 0 99 1 2 0 14 82 1 8 0 2 0 0 265 0 0 0 100 2 0 0 42 76 1 4 0 1 10 0 300 0 1 0 99 3 0 0 462 25 3 22 0 1 2 0 300 0 1 0 99 4 0 0 0 87 3 6 0 1 0 0 0 0 0 0 100 5 0 0 3 289 103 6 0 1 0 0 0 0 0 0 100 6 0 0 0 178 49 96 0 0 0 0 0 0 0 0 100 7 44 0 3 298 109 50 0 0 1 0 1098 0 0 0 99 March 4, 2026 at 01:34:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2154 103 186 1 10 78 0 555 0 1 0 99 1 0 0 14 51 2 91 0 15 86 0 266 0 0 0 100 2 0 0 0 54 1 94 0 11 62 0 300 0 0 0 100 3 0 0 0 115 60 101 0 21 72 0 302 0 0 0 100 4 0 0 0 178 40 268 0 15 74 0 0 0 0 0 100 5 0 0 3 274 113 114 0 13 81 0 0 0 0 0 100 6 0 0 0 45 0 83 0 12 75 0 0 0 0 0 100 7 0 0 3 266 110 131 1 11 74 0 1093 0 1 0 99 March 4, 2026 at 01:34:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 116 0 0 8 0 554 0 0 0 99 1 0 0 14 13 3 6 0 1 1 0 266 0 0 0 100 2 0 0 0 12 2 2 1 0 3 0 296 0 0 0 100 3 0 0 0 16 4 8 1 0 1 0 300 0 0 0 100 4 0 0 0 9 2 0 0 0 1 0 0 0 0 0 100 5 0 0 7 308 151 102 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 7 0 0 7 226 110 48 1 0 2 0 1093 0 0 0 100 March 4, 2026 at 01:34:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6558 0 131 2735 107 1237 58 205 146 71 6124 7 5 0 88 1 38791 0 215 781 4 1362 54 225 157 66 4937 15 11 0 74 2 6442 0 162 691 13 1089 42 188 163 63 4647 8 5 0 88 3 4484 0 21 687 6 1250 29 226 157 67 5173 5 4 0 90 4 4525 0 192 676 11 1230 40 205 126 72 4318 5 3 0 91 5 868 0 28 771 123 982 25 183 114 60 3075 3 3 0 94 6 885 0 36 558 1 998 37 183 101 53 5852 4 3 0 93 7 1087 0 83 690 113 898 25 141 114 53 3757 3 2 0 94 March 4, 2026 at 01:34:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2128 104 120 1 0 2 0 578 0 1 0 99 1 2 0 0 40 2 22 1 2 0 0 23 0 0 0 100 2 49 0 14 34 5 20 1 2 1 0 579 0 0 0 100 3 6 0 0 28 3 13 0 1 6 0 312 0 0 0 100 4 6 0 0 132 54 118 0 1 0 0 25 0 0 0 100 5 10 0 3 234 108 10 0 3 1 0 30 0 0 0 100 6 7 0 70 25 1 22 0 3 6 0 16 0 1 0 99 7 16 0 24 233 106 48 1 2 2 0 1120 0 0 0 99 March 4, 2026 at 01:34:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2167 103 112 1 1 2 0 558 0 1 0 99 1 0 0 0 70 0 10 0 0 0 0 0 0 0 0 100 2 0 0 14 78 10 20 0 0 2 0 598 0 0 0 100 3 0 0 350 25 5 18 0 0 3 0 303 0 1 0 99 4 0 0 0 161 51 100 0 0 0 0 0 0 0 0 100 5 0 0 3 263 102 0 0 0 0 0 0 0 0 0 100 6 0 0 35 63 2 7 0 1 3 0 2 0 1 0 99 7 0 0 3 272 104 40 1 0 0 0 1084 0 0 0 100 March 4, 2026 at 01:34:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2152 103 165 0 11 81 0 553 0 1 0 99 1 0 0 0 86 0 122 0 14 93 0 0 0 0 0 100 2 0 0 14 80 10 101 1 10 80 0 573 0 0 0 100 3 0 0 0 128 58 97 1 15 81 0 300 0 0 0 100 4 0 0 0 212 51 278 0 15 68 0 0 0 0 0 100 5 0 0 3 274 101 101 0 17 85 0 0 0 0 0 100 6 0 0 0 64 0 85 0 9 79 0 0 0 0 0 100 7 0 0 115 257 104 122 0 11 69 0 1083 0 1 0 99 March 4, 2026 at 01:34:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1268 0 154 2383 103 584 7 90 49 60 3399 1 2 0 96 1 1273 0 191 276 1 473 7 96 55 42 1546 1 2 0 97 2 456 0 20 275 13 410 8 73 75 47 1940 1 1 0 97 3 7785 0 126 275 4 470 11 80 104 51 4634 3 3 0 94 4 10662 0 25 411 48 502 6 95 117 54 1989 4 2 0 94 5 879 0 27 440 103 407 6 79 63 50 1807 2 2 0 96 6 264 0 27 247 0 394 5 88 39 45 1435 1 1 0 98 7 308 0 60 431 104 393 10 69 41 44 2141 1 1 0 98 March 4, 2026 at 01:34:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 651 0 77 2479 104 821 39 148 80 16 2747 3 3 0 94 1 348 0 9 424 3 746 54 145 62 12 2707 3 2 0 95 2 798 0 14 391 2 665 17 98 49 16 2439 2 2 0 96 3 3187 0 2 452 3 788 43 127 46 5 3319 4 2 0 93 4 32784 0 34 428 3 630 35 93 135 8 3601 14 8 0 78 5 893 0 4 563 111 588 22 91 74 16 1626 2 1 0 96 6 376 0 0 344 6 611 24 108 34 16 2349 4 1 0 94 7 1587 0 224 542 142 600 19 70 28 15 2288 2 2 0 97 March 4, 2026 at 01:34:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2172 102 99 1 1 1 0 263 0 1 0 98 1 44 0 462 64 6 66 0 2 6 0 318 0 1 0 99 2 3 0 14 80 1 4 0 1 0 0 268 0 0 0 100 3 0 0 0 84 3 8 0 0 0 0 302 0 0 0 100 4 0 0 0 88 4 14 0 0 0 0 13 0 0 0 100 5 0 0 3 283 105 0 0 0 0 0 0 0 0 0 100 6 0 0 0 83 2 8 0 0 5 0 300 0 0 0 100 7 0 0 3 390 155 140 1 0 0 0 1083 0 0 0 100 March 4, 2026 at 01:34:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 44 0 2 0 0 260 0 0 0 100 1 0 0 0 97 7 84 1 1 3 0 308 0 0 0 100 2 0 0 14 10 1 12 0 1 0 0 266 0 0 0 100 3 0 0 0 12 2 8 1 0 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 5 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 294 0 0 0 100 7 0 0 3 321 155 148 0 3 0 0 1083 0 0 0 100 March 4, 2026 at 01:34:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2155 102 199 0 16 92 0 260 0 1 0 99 1 0 0 0 59 7 90 0 15 80 0 309 0 0 0 100 2 0 0 14 48 1 84 1 14 41 0 266 0 0 0 100 3 0 0 0 113 61 96 0 15 102 0 302 0 0 0 100 4 0 0 0 102 2 190 0 15 67 0 0 0 0 0 100 5 0 0 3 255 101 99 0 13 64 0 0 0 0 0 100 6 0 0 0 56 1 108 0 10 90 0 294 0 0 0 100 7 0 0 3 356 156 207 1 13 81 0 1082 0 0 0 99 March 4, 2026 at 01:34:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38309 0 135 2821 104 1239 60 234 93 58 5927 15 11 0 74 1 1141 0 32 677 22 1163 39 247 108 64 4093 4 3 0 93 2 2075 0 218 569 5 1031 28 193 107 47 4036 4 4 0 92 3 5635 0 26 619 20 1049 40 202 202 47 6122 5 5 0 90 4 8110 0 125 562 4 976 43 188 135 59 4547 7 4 0 89 5 4275 0 20 744 102 817 28 159 163 67 3518 6 3 0 91 6 1118 0 25 539 3 974 24 173 102 68 3368 4 2 0 94 7 3293 0 263 705 121 962 33 141 139 64 4666 5 3 0 92 March 4, 2026 at 01:34:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2130 104 90 0 5 7 0 23 0 1 0 99 1 44 0 7 51 7 38 0 4 7 0 569 0 0 0 100 2 8 0 14 29 3 17 0 2 1 0 293 0 0 0 100 3 0 0 7 131 53 118 0 4 0 0 320 0 0 0 100 4 3 0 0 45 2 26 0 2 0 0 18 0 0 0 100 5 0 0 3 230 102 12 0 2 0 0 22 0 0 0 100 6 0 0 70 14 1 8 0 0 5 0 295 0 1 0 99 7 7 0 17 233 104 46 1 0 1 0 1101 0 0 0 100 March 4, 2026 at 01:34:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 462 2112 100 100 0 3 2 0 0 0 1 0 99 1 0 0 7 196 50 116 1 3 2 0 585 0 0 0 100 2 0 0 14 79 1 6 0 1 0 0 273 0 0 0 100 3 0 0 0 104 12 24 1 1 0 0 300 0 0 0 100 4 0 0 0 83 2 6 0 1 0 0 5 0 0 0 100 5 0 0 3 293 108 14 0 1 0 0 15 0 0 0 100 6 0 0 42 76 1 10 0 1 10 0 294 0 1 0 99 7 0 0 3 297 104 50 1 0 1 0 1080 0 0 0 100 March 4, 2026 at 01:34:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 114 0 3 0 0 0 0 1 0 99 1 1 0 7 129 60 122 1 1 4 0 567 0 0 0 100 2 0 0 14 6 1 2 1 0 0 0 266 0 0 0 100 3 0 0 0 14 4 8 0 0 0 0 303 0 0 0 100 4 0 0 0 10 2 2 0 0 0 0 0 0 0 0 100 5 0 0 3 210 102 2 0 1 0 0 0 0 0 0 100 6 0 0 0 16 3 16 0 1 5 0 296 0 0 0 100 7 0 0 3 221 104 42 1 0 1 0 1080 0 0 0 100 March 4, 2026 at 01:35:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1341 0 142 2453 101 676 9 118 155 49 1853 1 2 0 96 1 3032 0 151 388 51 580 8 108 153 57 2938 2 2 0 96 2 420 0 35 312 2 517 13 106 135 45 2194 1 2 0 97 3 4022 0 25 418 59 494 20 92 137 39 1961 2 3 0 96 4 6016 0 220 292 3 538 11 114 130 62 2165 3 3 0 94 5 967 0 19 473 102 437 8 103 134 51 2927 1 2 0 97 6 334 0 12 362 9 591 8 122 154 46 1686 1 2 0 98 7 33783 0 55 487 104 521 16 102 124 51 3389 10 7 0 83 March 4, 2026 at 01:35:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1247 0 73 2360 103 538 23 81 70 14 1679 3 3 0 94 1 1853 0 29 356 4 532 14 76 59 4 2091 2 2 0 96 2 2977 0 16 323 50 486 21 71 54 5 2199 2 2 0 96 3 4645 0 2 233 2 399 13 57 109 8 2014 5 2 0 93 4 320 0 0 254 3 409 19 70 36 17 1650 1 1 0 98 5 1094 0 3 400 103 336 16 61 48 8 1094 3 1 0 96 6 1043 0 182 173 4 308 11 50 29 20 1523 2 1 0 97 7 591 0 52 381 104 335 10 58 55 11 2039 2 2 0 96 March 4, 2026 at 01:35:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2178 101 92 0 1 1 0 0 0 2 0 98 1 44 0 469 72 7 70 1 3 5 0 578 0 1 0 99 2 0 0 14 179 52 104 0 0 0 0 266 0 0 0 100 3 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 83 3 4 1 0 0 0 300 0 0 0 100 5 0 0 3 279 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 82 1 2 0 0 6 0 294 0 0 0 100 7 0 0 3 289 104 40 1 1 1 0 1080 0 0 0 100 March 4, 2026 at 01:35:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 34 0 4 0 0 0 0 1 0 99 1 0 0 7 114 9 106 0 2 8 0 563 0 0 0 100 2 0 0 14 115 52 118 1 1 0 0 273 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 0 12 3 10 0 1 0 0 305 0 0 0 100 5 0 0 3 219 108 12 0 0 0 0 13 0 0 0 100 6 0 0 0 8 1 2 1 0 3 0 294 0 0 0 100 7 0 0 3 216 105 40 1 0 2 0 1081 0 0 0 100 March 4, 2026 at 01:35:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 0 0 0 0 0 0 0 100 1 0 0 7 36 10 32 0 2 1 0 575 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 266 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 12 3 4 0 0 0 0 300 0 0 0 100 5 0 0 3 210 102 0 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 1 0 294 0 0 0 100 7 0 0 3 216 104 38 2 0 1 0 1080 0 0 0 100 March 4, 2026 at 01:35:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1635 0 35 2747 101 1128 41 188 185 64 4216 5 5 0 90 1 3357 0 334 681 33 1161 41 183 268 73 6373 6 4 0 90 2 42754 0 43 647 14 1125 46 187 194 73 5448 14 9 0 76 3 5265 0 9 731 68 1221 37 212 186 55 4117 5 6 0 89 4 3387 0 138 594 7 944 25 186 180 59 3782 5 3 0 92 5 984 0 16 739 102 948 29 147 161 48 2968 3 2 0 95 6 4360 0 35 639 3 1025 17 148 149 52 3121 4 3 0 93 7 1613 0 268 556 105 666 10 119 129 39 3390 3 2 0 95 March 4, 2026 at 01:35:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2121 100 108 0 1 2 0 9 0 1 0 99 1 44 0 77 146 57 142 2 2 9 0 595 0 1 0 99 2 4 0 21 24 2 11 0 3 7 0 273 0 0 0 100 3 1 0 0 27 2 8 0 1 1 0 4 0 0 0 100 4 11 0 0 36 5 18 1 2 1 0 313 0 0 0 100 5 0 0 7 226 102 2 0 0 4 0 9 0 0 0 100 6 0 0 0 26 2 4 0 0 5 0 303 0 0 0 100 7 16 0 21 235 107 50 0 2 0 0 1120 0 0 0 100 March 4, 2026 at 01:35:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 101 110 0 0 0 0 1 0 1 0 99 1 0 0 49 118 17 47 0 1 4 0 559 0 1 0 99 2 0 0 476 100 43 92 1 1 2 0 267 0 1 0 99 3 0 0 0 82 2 6 0 1 0 0 2 0 0 0 100 4 0 0 0 83 3 4 0 0 0 0 300 0 0 0 100 5 0 0 3 279 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 79 1 2 0 0 1 0 294 0 0 0 100 7 0 0 3 286 104 37 1 0 0 0 1080 0 0 0 100 March 4, 2026 at 01:35:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 108 0 0 0 0 0 0 0 0 100 1 0 0 7 25 4 19 0 0 0 0 567 0 0 0 100 2 0 0 14 107 51 106 0 0 0 0 273 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 14 3 10 0 1 0 0 305 0 0 0 100 5 0 0 3 224 107 22 0 1 0 0 13 0 0 0 100 6 0 0 0 8 1 2 1 0 4 0 294 0 0 0 100 7 0 0 3 224 109 49 1 1 0 0 1088 0 0 0 99 March 4, 2026 at 01:35:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5081 0 326 2717 100 1062 35 205 96 70 4352 5 5 0 90 1 1912 0 17 638 3 1066 32 189 185 53 4325 4 3 0 93 2 8140 0 15 540 33 857 28 149 136 58 3255 6 4 0 90 3 9622 0 336 657 13 1165 33 168 166 85 5931 7 4 0 89 4 33870 0 17 577 9 1004 31 184 86 79 4855 12 8 0 79 5 3498 0 17 686 103 830 27 165 159 59 3712 4 3 0 92 6 1063 0 41 546 8 1065 25 187 87 83 3849 3 2 0 94 7 825 0 71 675 112 827 16 140 105 49 3858 3 2 0 94 March 4, 2026 at 01:35:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 102 204 0 16 74 0 9 0 1 0 99 1 24 0 0 88 1 128 1 21 93 0 318 0 0 0 100 2 1 0 0 60 1 79 0 15 72 0 4 0 1 0 99 3 8 0 14 127 60 99 0 19 69 0 274 0 0 0 100 4 50 0 7 79 7 106 1 19 79 0 326 0 0 0 100 5 80 0 3 283 104 115 1 18 80 0 32 0 0 0 100 6 5 0 77 121 5 212 1 22 80 0 591 2 1 0 97 7 13 0 17 362 152 218 2 16 75 0 1116 1 1 0 98 March 4, 2026 at 01:35:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 100 106 0 0 0 0 0 0 0 0 100 1 0 0 0 62 1 18 1 0 11 0 305 0 0 0 100 2 0 0 0 47 1 4 0 0 1 0 1 0 0 0 100 3 2 0 14 50 3 6 2 0 0 0 358 1 0 0 99 4 0 0 7 98 26 56 1 3 13 0 570 0 1 0 99 5 0 0 10 246 101 6 0 2 2 0 0 0 0 0 100 6 0 0 28 48 2 8 0 1 10 0 294 0 1 0 99 7 0 0 234 294 138 113 1 3 3 0 1079 0 1 0 99 March 4, 2026 at 01:35:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 100 118 0 1 0 0 0 0 1 0 99 1 0 0 0 51 1 16 0 0 7 0 297 0 0 0 100 2 0 0 0 37 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 39 2 4 0 0 0 0 267 0 0 0 100 4 1 0 7 157 61 120 0 0 0 0 570 0 0 0 100 5 0 0 227 210 102 4 0 0 1 0 1 0 0 0 100 6 0 0 0 42 1 4 1 0 4 0 293 0 0 0 100 7 0 0 3 246 104 38 0 0 1 0 1077 0 0 0 100 March 4, 2026 at 01:35:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 108 0 0 0 0 0 0 0 0 100 1 0 0 0 21 1 14 0 0 6 0 298 0 0 0 100 2 0 0 0 9 0 4 0 0 0 0 7 0 0 0 100 3 0 0 14 11 3 6 0 0 0 0 267 0 0 0 100 4 0 0 7 129 61 124 0 0 0 0 572 0 0 0 100 5 0 0 3 225 111 14 0 0 0 0 15 0 0 0 100 6 0 0 14 9 1 4 0 0 0 0 294 0 0 0 100 7 0 0 3 218 104 40 1 1 1 0 1076 0 0 0 100 March 4, 2026 at 01:35:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1354 0 27 2672 101 1040 35 177 102 56 4716 4 4 0 92 1 2207 0 190 621 13 1111 27 208 120 64 5932 5 4 0 91 2 10018 0 127 634 4 1136 38 175 222 69 4463 5 5 0 90 3 11819 0 165 726 31 1077 37 171 179 69 5656 10 5 0 85 4 1903 0 211 531 17 974 22 173 98 94 3754 3 3 0 94 5 1097 0 24 685 104 848 19 143 89 61 3080 3 2 0 95 6 1480 0 12 517 2 896 25 171 87 49 3991 5 2 0 92 7 33795 0 98 610 106 632 29 112 59 46 2136 12 9 0 79 March 4, 2026 at 01:35:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2149 101 212 1 19 80 0 1091 0 2 0 98 1 0 0 0 84 1 121 1 16 112 0 301 0 1 0 99 2 0 0 0 49 0 66 0 14 65 0 0 0 0 0 100 3 2 0 14 211 107 175 0 12 60 0 268 0 0 0 100 4 46 0 7 87 11 119 1 18 99 0 570 0 0 0 100 5 0 0 3 269 102 100 0 13 74 0 2 0 0 0 100 6 0 0 7 114 1 193 1 17 77 0 294 0 0 0 100 7 0 0 3 267 103 96 0 18 86 0 0 0 0 0 100 March 4, 2026 at 01:35:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 101 47 0 3 1 0 1084 0 2 0 98 1 0 0 462 127 2 120 0 1 10 0 307 0 1 0 99 2 0 0 0 80 1 0 0 0 1 0 0 0 0 0 100 3 0 0 14 181 53 104 0 0 1 0 266 0 0 0 100 4 0 0 7 89 7 10 0 0 1 0 559 0 0 0 100 5 0 0 3 289 106 12 0 0 1 0 9 0 0 0 100 6 0 0 0 83 2 4 0 0 4 0 294 0 0 0 100 7 0 0 3 283 103 6 0 1 1 0 1 0 0 0 100 March 4, 2026 at 01:35:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2109 102 42 1 0 0 0 1085 0 1 0 99 1 0 0 0 120 1 116 0 0 5 0 295 0 0 0 100 2 1 0 0 8 1 4 0 1 0 0 2 0 0 0 100 3 7 0 14 115 54 115 1 3 0 0 275 0 0 0 100 4 4 0 7 22 6 24 0 3 0 0 572 0 0 0 100 5 0 0 3 221 108 14 0 0 0 0 10 0 0 0 100 6 0 0 0 8 1 4 0 1 8 0 301 0 0 0 100 7 0 0 3 210 103 4 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:35:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1939 0 163 2696 104 1096 40 211 111 76 6000 7 4 0 89 1 36747 0 36 760 8 1180 46 211 173 41 4887 14 11 0 75 2 8620 0 149 622 1 986 36 172 146 70 4072 6 4 0 89 3 2877 0 32 694 41 1260 42 200 107 70 4623 4 3 0 93 4 1771 0 20 533 8 903 33 188 108 52 4438 4 3 0 92 5 6060 0 133 727 113 883 31 142 151 53 3954 4 4 0 92 6 3611 0 21 499 2 874 25 159 120 61 4434 3 3 0 94 7 2674 0 269 607 105 757 25 153 88 53 2895 6 3 0 92 March 4, 2026 at 01:35:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 7 2130 104 61 1 2 7 0 1126 0 1 0 99 1 26 0 0 129 51 114 2 2 2 0 322 0 0 0 100 2 0 0 0 133 2 114 0 2 3 0 11 0 0 0 100 3 23 0 14 30 4 16 0 2 1 0 290 0 0 0 100 4 0 0 7 32 6 12 0 0 1 0 577 0 0 0 100 5 16 0 3 226 104 6 0 1 0 0 17 0 0 0 100 6 11 0 0 29 3 13 0 2 3 0 313 0 0 0 100 7 3 0 87 220 103 14 0 1 6 0 7 0 1 0 99 March 4, 2026 at 01:35:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 371 2176 107 157 1 11 80 0 1101 0 2 0 98 1 0 0 0 216 51 208 0 12 95 0 300 0 0 0 100 2 0 0 0 201 0 171 0 15 59 0 0 0 0 0 100 3 0 0 14 152 56 76 0 16 51 0 266 0 0 0 100 4 0 0 7 113 6 99 0 15 81 0 563 0 0 0 100 5 0 0 3 307 101 91 0 12 72 0 0 0 0 0 100 6 0 0 0 165 2 204 1 17 77 0 294 0 0 0 100 7 0 0 17 313 102 102 0 16 92 0 0 0 1 0 99 March 4, 2026 at 01:35:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2120 107 55 0 1 0 0 1102 0 1 0 99 1 0 0 0 132 51 108 0 0 5 0 295 0 0 0 100 2 0 0 0 131 1 110 0 0 0 0 1 0 0 0 100 3 0 0 14 27 3 6 1 0 0 0 268 0 0 0 100 4 0 0 7 31 6 10 0 0 0 0 560 0 0 0 100 5 0 0 3 225 102 2 0 0 0 0 1 0 0 0 100 6 0 0 0 25 1 4 0 0 2 0 294 0 0 0 100 7 0 0 3 229 102 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:35:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1145 0 128 2240 108 237 5 34 27 30 2008 1 2 0 97 1 258 0 16 213 49 244 1 32 30 27 633 1 1 0 98 2 87 0 27 212 0 235 1 19 24 22 1278 0 1 0 99 3 704 0 29 180 2 155 2 28 35 26 669 0 1 0 99 4 3050 0 189 112 6 157 2 23 53 26 1765 1 1 0 98 5 5096 0 15 311 101 146 1 23 63 22 1020 1 2 0 97 6 280 0 10 128 2 197 2 48 56 22 903 0 0 0 99 7 136 0 9 313 103 160 3 29 19 26 411 0 0 0 100 March 4, 2026 at 01:35:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1014 0 15 2591 103 923 28 186 67 37 3647 4 3 0 92 1 2542 0 183 559 12 997 43 184 90 47 3478 5 2 0 92 2 3666 0 97 502 3 750 29 156 89 35 3132 6 3 0 91 3 1385 0 23 525 4 1023 47 182 94 35 3821 5 2 0 93 4 4924 0 13 475 8 848 19 161 127 39 3476 6 3 0 92 5 3408 0 15 707 141 879 25 132 108 32 3078 4 3 0 93 6 33974 0 7 415 6 746 35 156 62 24 4764 12 8 0 80 7 2137 0 195 547 104 691 28 132 36 28 3755 4 2 0 94 March 4, 2026 at 01:35:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 504 2107 100 109 0 1 1 0 0 0 1 0 99 1 0 0 0 88 0 12 0 2 0 0 0 0 0 0 100 2 0 0 0 86 0 14 0 1 1 0 0 0 0 0 100 3 2 0 14 84 2 8 0 0 0 0 566 0 0 0 100 4 44 0 7 102 11 24 0 1 0 0 272 0 0 0 100 5 0 0 3 384 153 102 0 0 0 0 0 0 0 0 100 6 0 0 0 82 1 2 1 0 2 0 294 0 0 0 100 7 0 0 3 286 104 38 0 1 5 0 1383 0 0 0 100 March 4, 2026 at 01:35:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 101 95 0 11 86 0 0 0 1 0 99 1 0 0 0 161 0 201 0 22 103 0 0 0 0 0 100 2 0 0 0 36 0 62 0 13 66 0 0 0 0 0 100 3 0 0 14 107 53 102 1 19 104 0 568 0 0 0 100 4 1 0 7 69 11 111 0 21 78 0 269 0 0 0 100 5 0 0 3 350 153 185 0 8 69 0 1 0 0 0 100 6 0 0 0 92 1 175 0 16 78 0 294 0 0 0 100 7 0 0 3 255 104 119 1 8 66 0 1381 0 0 0 99 March 4, 2026 at 01:35:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 14 0 1 0 0 0 0 0 0 100 1 0 0 0 110 1 102 0 0 1 0 0 0 0 0 100 2 0 0 0 9 1 2 0 0 1 0 0 0 0 0 100 3 0 0 14 15 3 14 1 1 1 0 566 0 0 0 100 4 0 0 7 29 12 22 0 0 1 0 269 0 0 0 100 5 0 0 3 309 152 102 0 0 1 0 0 0 0 0 100 6 0 0 0 9 2 2 0 0 5 0 294 0 0 0 100 7 0 0 3 214 104 38 2 0 12 0 1384 0 0 0 99 March 4, 2026 at 01:35:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1939 0 41 2748 125 1223 37 223 152 105 3900 5 4 0 92 1 2844 0 192 660 2 1107 33 200 91 53 3892 4 3 0 93 2 1056 0 15 553 2 934 33 183 85 49 3224 3 2 0 95 3 34080 0 15 524 5 911 45 181 129 46 4181 11 8 0 81 4 1184 0 52 526 12 866 25 155 97 50 4661 3 3 0 94 5 3018 0 6 682 129 742 23 137 115 41 3715 3 3 0 94 6 8742 0 296 416 3 834 28 140 137 63 4230 7 5 0 88 7 11161 0 234 743 108 810 23 117 210 58 5373 8 5 0 87 March 4, 2026 at 01:35:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 70 2160 150 128 0 6 6 0 10 0 1 0 98 1 12 0 0 126 1 111 0 4 6 0 14 0 0 0 100 2 19 0 0 25 1 6 0 0 0 0 16 0 0 0 100 3 61 0 0 39 7 26 0 2 1 0 330 0 0 0 100 4 27 0 21 33 6 22 0 2 0 0 545 0 0 0 100 5 0 0 10 241 109 20 0 2 0 0 30 0 0 0 100 6 0 0 0 30 2 13 1 5 1 0 311 0 0 0 100 7 0 0 17 229 104 42 1 0 2 0 1396 0 0 0 100 March 4, 2026 at 01:35:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2193 121 94 0 1 1 0 0 0 1 0 99 1 0 0 462 80 0 68 0 1 1 0 0 0 1 0 99 2 0 0 0 138 30 62 0 1 0 0 21 0 0 0 100 3 0 0 0 96 9 20 0 0 0 0 312 0 0 0 100 4 0 0 21 89 6 12 1 0 0 0 529 0 0 0 100 5 0 0 3 284 102 4 0 1 0 0 0 0 0 0 100 6 0 0 0 91 4 20 0 2 5 0 296 0 0 0 100 7 0 0 3 286 104 38 0 1 6 0 1375 0 0 0 100 March 4, 2026 at 01:35:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 101 213 0 12 98 0 9 0 1 0 99 1 0 0 0 59 0 103 0 22 79 0 0 0 0 0 100 2 0 0 0 147 50 175 0 11 66 0 0 0 0 0 100 3 0 0 0 115 62 93 1 13 79 0 322 0 0 0 100 4 0 0 21 57 7 103 0 19 79 0 531 0 0 0 100 5 0 0 3 239 101 64 0 13 65 0 0 0 0 0 100 6 0 0 0 106 2 199 0 16 63 0 294 0 0 0 100 7 0 0 3 261 104 130 2 11 61 0 1382 0 0 0 99 March 4, 2026 at 01:35:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 489 0 23 2430 101 592 5 107 50 36 1308 1 1 0 98 1 1943 0 24 338 1 449 11 100 99 33 2182 2 2 0 96 2 18177 0 7 359 45 468 8 87 44 34 1605 6 3 0 91 3 2609 0 303 209 5 401 14 77 56 49 2936 3 2 0 95 4 1437 0 153 289 16 494 10 109 35 61 3109 1 2 0 96 5 226 0 32 454 102 418 3 91 56 50 1593 1 1 0 98 6 4564 0 27 246 3 411 11 92 99 41 2368 2 3 0 96 7 4274 0 69 433 106 410 6 81 87 53 4296 2 2 0 96 March 4, 2026 at 01:35:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 924 0 0 2393 101 562 15 73 57 14 1752 2 2 0 96 1 767 0 0 297 1 557 16 78 38 9 2058 4 2 0 94 2 17577 0 7 214 1 366 21 59 38 13 2140 7 6 0 87 3 3340 0 18 406 3 546 16 74 82 18 2060 3 1 0 95 4 171 0 22 292 11 479 17 63 31 10 2062 2 1 0 97 5 3717 0 254 352 103 238 8 34 69 13 1409 2 3 0 95 6 2911 0 2 337 43 533 10 60 60 22 1777 2 2 0 96 7 442 0 52 451 106 495 12 53 39 12 2407 3 1 0 95 March 4, 2026 at 01:35:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 102 50 0 3 4 0 301 0 1 0 99 1 44 0 462 32 5 28 0 2 2 0 8 0 1 0 99 2 0 0 0 83 1 6 0 0 0 0 7 0 0 0 100 3 0 0 0 149 3 70 0 0 2 0 596 0 0 0 100 4 2 0 21 90 6 14 1 0 0 0 533 0 0 0 100 5 0 0 45 291 109 20 0 0 2 0 39 0 1 0 99 6 0 0 0 186 51 109 0 1 0 0 0 0 0 0 100 7 0 0 3 286 102 36 1 0 0 0 1075 0 0 0 100 March 4, 2026 at 01:35:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 110 0 0 1 0 303 0 0 0 100 1 0 0 0 26 7 20 0 2 0 0 10 0 0 0 100 2 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 11 2 6 1 0 0 0 595 0 0 0 100 4 0 0 21 15 6 10 0 0 0 0 526 0 0 0 100 5 0 0 3 210 102 0 0 0 0 0 0 0 0 0 100 6 0 0 0 111 51 106 0 0 0 0 0 0 0 0 100 7 0 0 3 211 102 36 0 1 1 0 1074 0 0 0 100 March 4, 2026 at 01:35:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 101 190 2 15 82 0 300 0 1 0 99 1 0 0 0 123 18 172 0 19 82 0 9 0 0 0 100 2 0 0 0 49 0 83 0 15 58 0 0 0 0 0 100 3 0 0 0 110 59 91 0 16 53 0 595 0 0 0 100 4 0 0 21 50 7 82 1 15 70 0 526 0 0 0 100 5 0 0 3 236 101 56 1 9 73 0 0 0 0 0 100 6 0 0 0 176 40 267 0 16 85 0 0 0 0 0 100 7 0 0 3 256 103 124 1 12 58 0 1073 0 0 0 99 March 4, 2026 at 01:35:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1918 0 152 2572 102 826 24 166 84 63 3473 4 3 0 93 1 36342 0 154 683 22 1029 26 173 127 66 4052 12 10 0 78 2 7500 0 17 496 4 773 33 131 138 49 4425 6 4 0 90 3 9849 0 361 493 5 902 31 150 151 64 5373 9 6 0 86 4 1155 0 35 568 28 996 19 171 114 63 3378 3 2 0 95 5 3854 0 11 618 104 685 20 122 96 58 4190 4 3 0 93 6 2103 0 8 475 11 815 22 167 131 64 2857 4 2 0 95 7 1043 0 79 534 104 634 24 134 107 53 3064 2 2 0 97 March 4, 2026 at 01:35:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 2127 102 108 0 4 4 0 301 0 1 0 99 1 21 0 7 39 2 20 0 1 7 0 10 0 0 0 100 2 3 0 0 29 3 12 0 2 1 0 9 0 0 0 100 3 62 0 70 30 8 28 0 1 10 0 617 0 1 0 99 4 5 0 21 131 56 114 1 0 0 0 540 0 0 0 100 5 0 0 3 228 103 10 0 0 0 0 16 0 0 0 100 6 3 0 0 29 2 12 0 2 2 0 11 0 0 0 100 7 0 0 17 228 104 38 0 2 0 0 1105 0 0 0 100 March 4, 2026 at 01:35:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 102 113 0 1 2 0 300 0 1 0 99 1 0 0 462 20 2 10 0 1 2 0 4 0 1 0 99 2 0 0 0 82 0 8 0 1 0 0 7 0 0 0 100 3 0 0 42 93 8 23 1 1 8 0 605 0 1 0 99 4 3 0 21 189 56 116 0 0 0 0 533 0 0 0 100 5 0 0 3 296 107 22 0 1 0 0 13 0 0 0 100 6 0 0 0 87 1 10 0 0 0 0 0 0 0 0 100 7 0 0 3 285 102 36 1 0 0 0 1082 0 0 0 100 March 4, 2026 at 01:35:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 108 1 0 4 0 300 0 1 0 99 1 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 27 10 24 1 0 7 0 606 0 0 0 100 4 0 0 21 115 56 110 0 0 0 0 525 0 0 0 100 5 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 25 3 24 0 1 0 0 2 0 0 0 100 7 0 0 3 211 102 34 1 1 0 0 1080 0 0 0 100 March 4, 2026 at 01:35:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4078 0 201 2532 102 830 12 161 163 71 3205 4 4 0 92 1 29911 0 7 473 2 632 19 128 474 35 2707 9 6 0 85 2 7518 0 224 436 1 756 11 145 213 65 2699 2 4 0 94 3 10168 0 78 590 70 739 29 137 257 57 4867 8 4 0 87 4 4778 0 41 528 43 813 16 150 175 68 2948 3 3 0 94 5 1830 0 137 545 103 559 14 110 156 48 1725 2 2 0 96 6 27209 0 206 410 5 751 18 148 363 59 3532 10 8 0 82 7 362 0 58 536 112 559 10 112 115 53 3859 1 1 0 97 March 4, 2026 at 01:35:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 296 0 70 2320 102 447 13 74 57 1 1408 2 2 0 96 1 591 0 13 224 2 407 16 77 51 4 1511 2 1 0 97 2 241 0 0 191 1 337 21 64 17 1 1197 2 1 0 97 3 783 0 9 250 6 484 15 63 43 2 2022 4 2 0 95 4 438 0 7 285 9 446 13 64 31 2 1672 3 1 0 96 5 759 0 3 429 148 316 9 42 50 0 1257 1 1 0 98 6 603 0 0 169 3 261 6 36 43 5 680 2 1 0 98 7 482 0 31 332 103 255 10 40 22 2 1793 1 1 0 98 March 4, 2026 at 01:35:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2172 101 74 0 0 4 0 301 0 2 0 98 1 0 0 14 114 1 40 0 1 0 0 266 0 0 0 100 2 0 0 0 81 0 4 0 0 0 0 0 0 0 0 100 3 0 0 462 38 7 36 1 1 2 0 309 0 1 0 99 4 0 0 7 86 5 10 0 1 0 0 263 0 0 0 100 5 0 0 3 381 152 102 0 0 4 0 294 0 0 0 100 6 0 0 0 85 0 8 0 0 0 0 0 0 0 0 100 7 0 0 3 285 104 36 1 0 1 0 1078 0 0 0 100 March 4, 2026 at 01:35:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 12 1 1 0 0 301 0 1 0 99 1 0 0 14 108 1 104 0 0 0 0 266 0 0 0 100 2 0 0 0 9 0 6 0 0 0 0 7 0 0 0 100 3 0 0 0 19 7 14 0 0 0 0 310 0 0 0 100 4 0 0 7 15 5 12 0 0 0 0 264 0 0 0 100 5 0 0 3 322 159 114 0 0 2 0 309 0 0 0 100 6 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 7 0 0 3 217 104 42 1 1 1 0 1076 0 0 0 100 March 4, 2026 at 01:35:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 8 0 0 4 0 298 0 0 0 100 1 0 0 14 107 1 102 0 0 0 0 266 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 22 7 18 0 1 0 0 309 0 0 0 100 4 0 0 7 17 5 10 0 1 0 0 260 0 0 0 100 5 0 0 3 315 153 114 0 1 6 0 294 0 0 0 100 6 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 7 0 0 3 215 104 38 1 0 0 0 1077 0 0 0 100 March 4, 2026 at 01:35:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1626 0 193 2743 103 1117 28 184 138 54 3755 3 3 0 94 1 27299 0 34 672 1 1215 46 214 159 57 4865 12 10 0 79 2 3685 0 145 585 5 924 24 143 164 44 3565 6 4 0 90 3 5884 0 143 665 74 985 22 170 209 56 4230 4 4 0 91 4 8743 0 215 570 6 1061 27 171 227 57 5511 7 4 0 89 5 8080 0 21 765 112 886 18 147 250 50 3572 7 3 0 89 6 902 0 25 586 24 1038 24 190 207 55 3395 3 3 0 94 7 881 0 91 682 106 898 17 142 161 63 5302 3 2 0 95 March 4, 2026 at 01:35:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 101 8 0 2 5 0 300 0 0 0 100 1 2 0 14 21 2 4 0 0 1 0 266 0 0 0 100 2 0 0 70 112 1 104 0 0 7 0 0 0 1 0 99 3 0 0 0 25 2 6 1 0 7 0 300 0 0 0 100 4 0 0 7 28 6 10 0 0 1 0 263 0 0 0 100 5 44 0 10 230 107 14 0 1 3 0 302 0 0 0 100 6 0 0 0 122 51 102 0 0 1 0 0 0 0 0 100 7 0 0 3 229 104 42 0 2 1 0 1093 0 0 0 100 March 4, 2026 at 01:35:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 102 29 1 2 0 0 301 0 1 0 99 1 0 0 14 170 45 96 0 2 0 0 266 0 0 0 100 2 0 0 42 89 1 18 0 2 2 0 1 0 1 0 99 3 0 0 462 94 3 82 0 1 2 0 307 0 1 0 99 4 0 0 7 86 5 10 0 1 0 0 271 0 0 0 100 5 0 0 3 295 108 16 0 0 1 0 303 0 0 0 100 6 0 0 0 92 6 14 0 1 0 0 0 0 0 0 100 7 0 0 3 293 104 48 1 1 0 0 1085 0 0 0 100 March 4, 2026 at 01:35:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 126 0 1 1 0 300 0 0 0 100 1 0 0 14 110 52 108 0 1 0 0 266 0 0 0 100 2 0 0 0 9 0 6 0 0 0 0 7 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 4 0 0 7 16 5 12 0 0 0 0 265 0 0 0 100 5 0 0 3 233 114 28 0 0 2 0 318 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 3 215 103 40 1 0 1 0 1086 0 0 0 100 March 4, 2026 at 01:35:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1657 0 154 2628 102 1002 30 174 143 53 5331 4 4 0 92 1 9845 0 17 669 36 1086 30 198 150 66 4532 5 6 0 90 2 7489 0 46 588 15 912 38 172 144 66 3860 8 4 0 88 3 1591 0 15 543 5 933 31 176 108 63 5408 3 3 0 94 4 1636 0 134 522 6 932 26 169 112 59 2898 4 2 0 94 5 4048 0 375 686 109 903 30 146 92 75 4255 6 4 0 90 6 3254 0 49 548 5 910 23 167 128 49 2939 6 2 0 92 7 27524 0 98 623 104 714 26 134 64 46 4243 12 11 0 78 March 4, 2026 at 01:35:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 70 2173 104 175 0 11 98 0 308 0 2 0 98 1 0 0 0 130 1 170 1 28 106 0 19 0 1 0 99 2 3 0 14 64 2 94 1 17 67 0 285 0 0 0 100 3 0 0 0 110 55 148 1 17 70 0 310 0 0 0 100 4 14 0 7 79 4 120 2 24 70 0 286 0 0 0 100 5 44 0 10 275 107 92 0 15 78 0 316 0 0 0 100 6 0 0 0 169 50 196 0 22 59 0 4 0 0 0 100 7 8 0 17 261 104 112 1 17 65 0 1099 0 0 0 99 March 4, 2026 at 01:35:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2141 102 11 1 2 5 0 299 0 1 0 99 1 0 0 231 123 1 112 0 2 4 0 0 0 1 0 99 2 0 0 14 50 1 12 0 2 0 0 266 0 0 0 100 3 0 0 0 49 2 18 0 2 0 0 301 0 0 0 100 4 0 0 7 47 5 10 0 1 0 0 264 0 0 0 100 5 0 0 3 257 108 16 0 0 6 0 303 0 0 0 100 6 0 0 0 140 50 102 0 1 0 0 0 0 0 0 100 7 0 0 3 245 103 34 1 0 0 0 1077 0 0 0 100 March 4, 2026 at 01:35:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2141 102 10 0 0 5 0 300 0 1 0 99 1 0 0 231 112 0 108 0 1 1 0 0 0 0 0 100 2 0 0 14 50 1 12 0 0 0 0 266 0 0 0 100 3 0 0 0 44 2 4 0 0 0 0 300 0 0 0 100 4 1 0 7 46 4 6 0 0 0 0 260 0 0 0 100 5 0 0 3 256 108 14 0 0 3 0 304 0 0 0 100 6 0 0 0 140 50 100 0 0 0 0 0 0 0 0 100 7 0 0 3 245 103 34 0 0 1 0 1076 0 0 0 100 March 4, 2026 at 01:35:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 37 2128 106 92 2 11 11 7 365 0 1 0 99 1 793 0 0 106 0 102 2 11 29 6 314 0 1 0 99 2 22 0 16 32 1 43 0 6 4 6 303 0 0 0 100 3 3 0 2 27 3 19 1 3 2 0 337 0 0 0 100 4 16 0 7 34 4 40 0 5 4 0 284 0 0 0 100 5 6 0 3 244 114 34 1 4 4 3 322 0 0 0 100 6 27 0 7 121 50 122 1 5 3 1 46 0 1 0 99 7 3 0 12 226 103 57 1 6 0 4 1119 0 0 0 100 March 4, 2026 at 01:35:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1551 0 85 2699 104 1027 22 183 116 43 4422 4 4 0 92 1 28995 0 25 619 4 1043 48 192 89 55 4871 12 10 0 78 2 2609 0 344 519 2 891 27 141 113 54 3302 5 3 0 92 3 1557 0 18 502 5 811 44 158 87 68 4594 4 3 0 93 4 4408 0 318 467 4 822 25 143 128 55 2992 4 3 0 93 5 9464 0 26 714 106 765 28 117 108 50 3224 8 4 0 88 6 5895 0 38 621 43 934 43 151 193 62 3677 6 3 0 92 7 1435 0 87 657 108 815 14 105 92 62 5017 3 3 0 95 March 4, 2026 at 01:35:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2229 108 108 1 19 77 0 296 0 2 0 98 1 0 0 457 160 1 194 0 19 81 0 3 0 1 0 99 2 2 0 14 130 1 105 1 15 65 0 265 0 0 0 100 3 0 0 0 181 57 190 1 15 72 0 591 0 1 0 99 4 0 0 7 130 4 105 0 21 89 0 281 0 0 0 99 5 0 0 3 322 101 89 0 17 70 0 0 0 0 0 100 6 0 0 0 199 40 164 0 17 70 0 34 0 0 0 100 7 0 0 3 341 114 129 0 12 56 0 1066 0 0 0 100 March 4, 2026 at 01:35:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 138 83 0 1 1 0 9 0 0 0 99 1 0 0 0 110 1 101 0 0 1 0 0 0 0 0 100 2 0 0 14 11 2 6 0 1 1 0 269 0 0 0 100 3 0 0 0 16 1 11 0 0 15 0 282 0 0 0 100 4 0 0 7 16 6 10 0 0 32 0 561 0 0 0 100 5 0 0 7 212 102 6 0 1 0 0 0 0 0 0 100 6 0 0 0 16 2 12 1 1 16 0 297 0 0 0 100 7 0 0 7 251 122 71 1 0 1 0 1089 0 0 0 100 March 4, 2026 at 01:35:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 125 120 0 1 0 0 11 0 0 0 100 1 0 0 0 110 33 102 0 1 0 0 0 0 0 0 100 2 0 0 14 10 2 8 0 0 0 0 267 0 0 0 100 3 0 0 0 17 2 12 0 0 0 0 302 0 0 0 100 4 0 0 7 14 5 8 0 0 8 0 558 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 8 0 2 4 0 294 0 0 0 100 7 0 0 3 217 103 44 1 1 1 0 1077 0 0 0 100 March 4, 2026 at 01:35:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2398 0 21 2829 107 1378 44 257 119 85 5751 6 4 0 90 1 2851 0 140 697 38 1190 52 229 134 64 6036 4 3 0 92 2 26767 0 29 625 5 1063 50 208 113 57 3979 12 10 0 79 3 844 0 22 652 11 1087 33 223 113 51 5042 4 2 0 94 4 562 0 30 617 5 1025 35 193 71 38 3857 5 3 0 93 5 5113 0 310 710 110 859 27 158 137 49 3817 7 4 0 89 6 8023 0 203 549 4 1018 25 185 184 67 4409 5 5 0 90 7 10029 0 127 830 104 936 38 135 161 50 4837 9 4 0 86 March 4, 2026 at 01:35:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 61 0 70 2131 107 114 0 2 6 0 15 0 2 0 98 1 32 0 0 49 1 35 0 6 6 0 19 0 0 0 100 2 1 0 0 30 2 12 0 2 0 0 5 0 0 0 100 3 3 0 14 128 53 112 1 1 0 0 592 0 0 0 100 4 6 0 14 34 6 14 1 1 2 0 573 0 0 0 100 5 2 0 3 228 103 14 0 3 0 0 12 0 0 0 100 6 0 0 0 34 3 18 0 1 3 0 322 0 0 0 100 7 9 0 17 227 103 40 1 2 0 0 1099 0 0 0 100 March 4, 2026 at 01:36:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2218 108 160 0 17 86 0 18 0 1 0 98 1 0 0 350 119 0 160 0 23 85 0 0 0 1 0 99 2 0 0 0 99 0 82 1 19 61 0 0 0 0 0 100 3 0 0 14 257 107 299 0 19 56 0 585 0 1 0 99 4 0 0 7 114 6 105 0 17 90 0 560 0 0 0 100 5 0 0 3 302 102 80 0 16 63 0 0 0 0 0 100 6 0 0 0 116 2 107 0 18 91 0 294 0 0 0 100 7 0 0 3 286 103 82 1 11 46 0 1077 0 0 0 100 March 4, 2026 at 01:36:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2123 107 67 0 1 0 0 9 0 1 0 99 1 0 0 0 89 0 62 0 2 0 0 0 0 0 0 100 2 0 0 0 27 0 4 0 0 0 0 0 0 0 0 100 3 0 0 14 71 24 48 1 1 0 0 567 0 0 0 100 4 0 0 7 34 6 10 0 0 4 0 560 0 0 0 100 5 0 0 3 228 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 94 30 70 0 1 5 0 294 0 0 0 100 7 0 0 3 230 103 34 1 0 1 0 1077 0 0 0 100 March 4, 2026 at 01:36:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 586 0 32 2352 110 410 4 77 48 32 1176 1 2 0 97 1 1245 0 182 337 0 515 4 74 42 47 1463 1 1 0 97 2 602 0 9 243 1 410 8 80 47 48 1225 1 1 0 98 3 195 0 32 223 3 369 11 77 36 23 1712 1 1 0 98 4 871 0 18 203 6 343 7 80 38 40 3869 2 2 0 96 5 124 0 17 392 102 284 3 57 46 26 1175 1 1 0 98 6 5935 0 125 287 48 415 10 67 100 26 2468 2 3 0 95 7 4687 0 73 437 105 315 8 54 58 35 2583 3 2 0 95 March 4, 2026 at 01:36:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1570 0 189 2530 104 857 40 177 83 38 3056 3 3 0 93 1 1282 0 190 448 2 861 35 183 68 41 2830 3 2 0 94 2 719 0 0 457 2 764 27 120 67 40 3204 4 2 0 95 3 653 0 18 472 13 800 29 146 54 19 3015 3 1 0 96 4 26713 0 15 413 9 679 41 137 87 17 3414 12 8 0 79 5 778 0 8 597 140 559 26 90 45 15 1907 2 2 0 96 6 5296 0 13 369 4 638 15 106 68 28 2975 4 3 0 93 7 5758 0 77 591 105 606 32 88 76 29 3766 6 3 0 92 March 4, 2026 at 01:36:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 101 99 0 1 1 0 0 0 2 0 98 1 44 0 462 43 5 36 0 3 2 0 8 0 1 0 99 2 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 3 2 0 14 84 2 8 0 1 0 0 566 0 0 0 100 4 0 0 7 93 4 16 0 1 2 0 563 0 0 0 100 5 0 0 3 384 154 104 0 0 0 0 0 0 0 0 100 6 0 0 0 81 0 2 0 0 0 0 0 0 0 0 100 7 0 0 3 288 104 40 1 1 5 0 1377 0 0 0 100 March 4, 2026 at 01:36:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 101 125 0 14 76 0 0 0 1 0 99 1 0 0 0 166 6 201 0 14 69 0 9 0 0 0 100 2 0 0 0 47 0 83 0 10 87 0 0 0 0 0 100 3 0 0 14 128 78 234 1 16 56 0 569 0 0 0 100 4 0 0 7 85 4 153 0 22 104 0 561 0 0 0 100 5 0 0 3 370 153 228 0 16 103 0 0 0 0 0 100 6 0 0 0 47 0 85 0 17 86 0 0 0 0 0 100 7 0 0 3 258 104 123 1 15 59 0 1377 0 0 0 100 March 4, 2026 at 01:36:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 10 0 2 0 0 0 0 0 0 100 1 0 0 0 120 7 112 0 0 1 0 9 0 0 0 100 2 0 0 0 12 3 2 0 0 1 0 1 0 0 0 100 3 0 0 14 11 3 6 0 0 1 0 566 0 0 0 100 4 0 0 7 24 5 16 0 0 1 0 560 0 0 0 100 5 0 0 3 233 114 24 0 0 1 0 0 0 0 0 100 6 0 0 0 91 40 90 0 2 1 0 0 0 0 0 100 7 0 0 3 213 104 36 1 0 2 0 1377 0 0 0 100 March 4, 2026 at 01:36:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 952 0 23 2717 103 1029 32 183 91 55 4490 4 3 0 93 1 1673 0 18 694 7 1237 51 208 118 54 5467 7 3 0 90 2 3485 0 48 647 2 989 22 186 119 44 3338 6 4 0 90 3 4847 0 116 606 5 1027 35 184 152 51 5115 6 4 0 91 4 8631 0 333 627 22 1153 34 189 145 67 4888 5 5 0 90 5 7617 0 30 793 111 941 30 152 129 78 4294 5 3 0 91 6 26981 0 19 578 24 1035 26 179 83 65 3890 11 8 0 80 7 2382 0 252 645 107 903 12 147 81 59 4340 3 3 0 94 March 4, 2026 at 01:36:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 77 2117 103 23 0 4 7 0 17 0 1 0 99 1 46 0 0 38 5 20 0 2 6 0 30 0 0 0 99 2 0 0 0 32 3 20 0 3 3 0 30 0 0 0 100 3 5 0 14 125 2 114 0 2 0 0 589 0 0 0 100 4 1 0 7 136 54 121 1 3 7 0 563 0 0 0 100 5 0 0 2 234 108 7 1 3 1 0 1 0 0 0 100 6 21 0 0 29 2 12 0 3 0 0 16 0 0 0 100 7 19 0 18 237 104 59 2 3 7 0 1404 0 0 0 99 March 4, 2026 at 01:36:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2177 102 21 0 3 1 0 0 0 1 0 99 1 0 0 462 102 38 130 0 6 2 0 833 0 1 0 99 2 0 0 0 85 4 6 0 0 0 0 23 0 0 0 100 3 0 0 14 185 3 110 1 0 0 0 568 0 0 0 100 4 0 0 7 130 23 52 0 0 10 0 564 0 0 0 100 5 0 0 2 285 103 4 0 1 0 0 0 0 0 0 100 6 0 0 0 83 2 4 0 0 0 0 2 0 0 0 100 7 0 0 4 289 104 10 1 0 4 0 554 0 0 0 100 March 4, 2026 at 01:36:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 101 109 1 15 90 0 0 0 1 0 99 1 0 0 0 165 59 226 2 17 88 0 1094 0 1 0 99 2 0 0 0 49 1 85 1 9 80 0 1 0 0 0 100 3 0 0 14 204 55 299 0 23 72 0 566 0 0 0 100 4 0 0 7 68 5 110 1 20 65 0 557 0 0 0 100 5 0 0 2 250 104 80 1 10 81 0 0 0 0 0 100 6 0 0 0 44 0 78 0 15 76 0 0 0 0 0 100 7 0 0 4 237 103 64 0 14 67 0 294 0 0 0 100 March 4, 2026 at 01:36:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 593 0 30 2389 101 497 9 111 53 59 1415 1 2 0 97 1 725 0 17 398 50 606 11 97 56 51 4579 2 2 0 97 2 319 0 26 280 3 425 9 87 48 32 1214 1 2 0 97 3 17487 0 30 317 3 418 11 76 47 23 3125 8 4 0 88 4 14756 0 423 263 8 502 10 90 113 67 4671 4 5 0 91 5 4809 0 27 521 108 411 11 81 74 43 1665 3 2 0 95 6 732 0 9 245 0 416 4 90 59 50 1644 2 1 0 97 7 394 0 50 420 103 369 2 73 49 45 1271 1 1 0 99 March 4, 2026 at 01:36:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 202 0 73 2377 102 532 13 91 43 22 2245 4 2 0 94 1 929 0 0 305 3 554 17 74 53 11 3038 2 2 0 96 2 548 0 0 340 1 487 20 67 38 8 1141 1 1 0 98 3 3882 0 21 370 45 593 19 70 41 14 1868 3 4 0 93 4 748 0 7 247 4 412 10 57 56 9 1984 2 1 0 97 5 3445 0 12 424 106 377 18 50 60 14 1535 3 2 0 95 6 5851 0 18 310 3 429 21 65 67 12 2158 5 2 0 93 7 1195 0 214 368 107 324 6 38 40 24 1068 2 1 0 97 March 4, 2026 at 01:36:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2175 102 67 0 3 3 0 294 0 2 0 98 1 0 0 462 27 2 52 0 1 7 0 1384 0 1 0 99 2 0 0 0 135 2 58 0 0 0 0 7 0 0 0 100 3 0 0 14 183 53 108 0 1 0 0 268 0 0 0 100 4 44 0 7 106 11 32 1 1 0 0 586 0 0 0 100 5 0 0 3 291 108 6 0 1 0 0 0 0 0 0 100 6 0 0 0 78 0 2 0 1 0 0 0 0 0 0 100 7 0 0 3 285 102 10 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:36:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 106 0 0 5 0 294 0 0 0 100 1 0 0 0 20 2 44 1 1 6 0 1381 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 14 115 52 118 0 1 1 0 266 0 0 0 100 4 0 0 7 24 10 20 0 0 0 0 569 0 0 0 100 5 0 0 3 214 103 4 0 0 0 0 0 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:36:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 102 193 0 15 82 0 294 0 1 0 99 1 0 0 0 64 2 133 2 22 95 0 1382 0 0 0 99 2 0 0 0 43 0 73 0 10 72 0 0 0 0 0 100 3 0 0 14 207 109 298 0 19 65 0 268 0 0 0 100 4 0 0 7 68 10 108 0 14 74 0 569 0 0 0 100 5 0 0 3 242 104 62 0 8 50 0 0 0 0 0 100 6 0 0 0 64 1 119 0 18 76 0 0 0 0 0 100 7 0 0 3 237 102 59 0 13 43 0 0 0 0 0 100 March 4, 2026 at 01:36:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4273 0 214 2750 105 1129 32 189 139 77 3843 7 4 0 89 1 27320 0 32 637 5 1097 42 201 78 66 4228 15 10 0 75 2 1255 0 18 568 2 988 31 164 106 56 5584 3 3 0 94 3 2851 0 51 669 28 1017 24 177 56 48 3118 5 2 0 93 4 1523 0 16 545 12 908 28 156 144 43 4238 4 3 0 93 5 10512 0 204 632 108 724 28 120 168 56 4123 4 5 0 90 6 6516 0 154 514 23 894 24 149 142 71 4846 4 4 0 92 7 2283 0 180 598 103 799 32 137 86 82 2980 4 2 0 94 March 4, 2026 at 01:36:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 2127 103 18 0 3 3 0 311 0 0 0 100 1 0 0 0 27 2 8 0 1 7 0 300 0 0 0 100 2 0 0 0 26 3 36 1 0 0 0 1105 0 0 0 100 3 2 0 14 130 3 116 0 4 0 0 290 0 0 0 100 4 9 0 7 30 4 15 1 3 0 0 586 0 0 0 100 5 20 0 3 240 104 28 1 5 0 0 20 0 0 0 100 6 44 0 70 47 14 40 1 2 7 0 22 0 1 0 99 7 7 0 24 304 142 90 0 4 6 0 10 0 0 0 100 March 4, 2026 at 01:36:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2176 102 80 0 4 6 0 294 0 2 0 98 1 0 0 0 83 1 7 0 1 4 0 298 0 0 0 100 2 0 0 0 83 1 36 0 0 0 0 1090 0 0 0 100 3 0 0 14 123 1 44 0 0 0 0 266 0 0 0 100 4 1 0 7 96 7 24 0 0 0 0 576 0 0 0 100 5 0 0 3 290 107 6 0 1 0 0 23 0 0 0 100 6 0 0 0 97 6 22 0 1 0 0 10 0 0 0 100 7 0 0 465 326 152 122 0 0 3 0 7 0 1 0 99 March 4, 2026 at 01:36:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 114 0 0 5 0 294 0 0 0 100 1 0 0 0 16 3 10 1 1 1 0 300 0 0 0 100 2 0 0 0 10 1 32 1 0 0 0 1082 0 0 0 100 3 0 0 14 12 2 10 0 1 0 0 268 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 561 0 0 0 100 5 0 0 3 212 103 2 0 0 0 0 0 0 0 0 100 6 0 0 0 21 8 16 0 0 0 0 11 0 0 0 100 7 0 0 3 310 152 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:36:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35161 0 164 2688 103 1108 46 211 163 69 4234 11 10 0 79 1 4360 0 316 624 5 1195 30 228 206 79 4372 4 4 0 92 2 3537 0 8 574 3 999 23 185 151 79 5140 5 3 0 92 3 5061 0 50 678 63 972 36 173 170 52 3382 4 6 0 90 4 825 0 22 570 11 972 22 189 169 61 3280 2 3 0 95 5 227 0 26 684 103 810 15 154 186 38 2688 2 2 0 96 6 5588 0 144 511 7 979 27 188 201 54 3877 3 4 0 93 7 5189 0 67 743 144 854 28 113 173 49 4803 5 3 0 93 March 4, 2026 at 01:36:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 599 0 0 2188 102 153 14 34 40 2 609 1 1 0 98 1 44 0 0 159 3 185 10 33 29 1 911 1 0 0 99 2 387 0 0 133 3 177 12 23 27 3 1685 3 1 0 97 3 802 0 21 99 2 149 11 32 18 1 897 1 1 0 98 4 541 0 7 106 6 165 13 31 26 6 912 2 1 0 97 5 398 0 73 365 151 211 13 19 33 3 404 1 1 0 98 6 724 0 0 74 3 114 3 18 24 0 567 1 1 0 98 7 365 0 45 278 103 133 12 19 13 2 488 1 0 0 99 March 4, 2026 at 01:36:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 101 38 0 3 0 0 0 0 0 0 100 1 0 0 0 33 2 6 0 0 5 0 294 0 0 0 100 2 0 0 0 100 3 100 1 0 1 0 1376 0 0 0 100 3 0 0 14 34 1 10 0 1 0 0 266 0 0 0 100 4 0 0 7 39 4 14 0 3 0 0 264 0 0 0 100 5 0 0 24 297 135 70 0 1 5 0 300 0 1 0 99 6 0 0 126 25 7 20 0 0 6 0 10 0 1 0 99 7 0 0 3 266 120 40 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:36:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 101 108 0 0 0 0 0 0 1 0 99 1 0 0 0 67 2 14 0 1 5 0 294 0 0 0 100 2 0 0 0 66 3 40 2 0 5 0 1392 0 0 0 99 3 0 0 14 62 2 8 0 0 0 0 268 0 0 0 100 4 0 0 7 80 6 30 0 0 0 0 275 0 0 0 100 5 0 0 23 266 108 6 0 0 3 0 300 0 1 0 99 6 0 0 336 21 6 16 0 1 2 0 9 0 0 0 99 7 0 0 4 363 152 110 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:36:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 102 0 0 0 0 0 0 0 0 100 1 0 0 0 16 2 12 1 0 6 0 294 0 0 0 100 2 0 0 0 19 3 46 1 1 4 0 1371 0 0 0 100 3 0 0 14 11 1 8 1 0 0 0 266 0 0 0 100 4 0 0 7 18 3 14 0 0 0 0 260 0 0 0 100 5 0 0 3 212 104 4 0 0 0 0 300 0 0 0 100 6 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 7 0 0 3 310 152 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:36:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29939 0 65 2833 108 1229 41 211 425 56 4163 14 11 0 75 1 2028 0 197 754 12 1310 32 227 204 51 4179 6 4 0 90 2 4855 0 182 535 6 926 35 190 239 63 4166 5 4 0 91 3 8682 0 151 671 59 1155 36 190 335 66 6757 6 5 0 89 4 4335 0 203 661 29 1160 23 222 223 85 3763 4 3 0 93 5 5408 0 39 851 105 1121 31 175 260 66 6363 6 5 0 89 6 33884 0 4 611 4 967 47 171 539 44 3922 14 6 0 80 7 1093 0 89 711 109 907 13 153 172 57 2595 2 2 0 96 March 4, 2026 at 01:36:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 70 2119 107 90 0 3 4 0 9 0 1 0 99 1 0 0 0 57 3 38 0 2 16 0 294 0 0 0 100 2 0 0 0 23 2 4 0 0 1 0 301 0 0 0 100 3 2 0 14 122 48 112 0 2 1 0 266 0 0 0 100 4 0 0 14 43 10 26 0 1 1 0 263 0 0 0 100 5 0 0 3 225 103 34 1 0 1 0 1376 0 0 0 100 6 0 0 0 22 2 2 0 0 1 0 0 0 0 0 100 7 0 0 3 221 102 2 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:36:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2190 110 126 0 0 2 0 11 0 1 0 99 1 0 0 462 21 3 10 0 2 4 0 294 0 0 0 100 2 0 0 0 85 3 8 1 1 2 0 302 0 0 0 100 3 0 0 14 187 53 112 0 0 1 0 268 0 0 0 100 4 0 0 7 101 5 30 0 1 1 0 260 0 0 0 100 5 0 0 3 292 104 50 1 2 1 0 1378 0 1 0 99 6 0 0 0 82 2 4 0 0 1 0 0 0 0 0 100 7 0 0 3 282 103 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:36:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 116 0 0 0 0 9 0 0 0 100 1 0 0 0 14 2 8 1 0 4 0 294 0 0 0 100 2 0 0 0 9 1 6 0 0 4 0 303 0 0 0 100 3 0 0 14 110 51 106 1 0 0 0 266 0 0 0 100 4 0 0 7 29 6 30 0 0 0 0 275 0 0 0 100 5 0 0 3 216 107 34 1 0 0 0 1376 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 3 213 102 10 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:36:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6887 0 137 2619 107 921 22 167 128 63 3831 5 5 0 90 1 4848 0 22 441 3 741 14 162 107 56 3662 3 3 0 94 2 839 0 5 431 3 757 28 149 114 63 5061 4 2 0 94 3 3527 0 24 528 31 881 22 148 109 49 3937 5 3 0 92 4 4666 0 215 515 18 793 15 157 90 63 2932 6 3 0 92 5 3210 0 140 612 105 743 22 117 72 65 4737 4 3 0 93 6 35464 0 230 488 12 896 34 181 108 62 3748 11 11 0 78 7 4461 0 73 651 103 648 24 132 137 67 2769 4 3 0 94 March 4, 2026 at 01:36:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2167 103 114 0 14 79 0 30 0 1 0 99 1 0 0 0 152 2 228 0 19 66 0 298 0 0 0 100 2 0 0 0 63 1 86 0 13 64 0 293 0 0 0 100 3 47 0 14 143 60 124 0 16 87 0 305 0 0 0 99 4 2 0 0 139 3 173 0 19 68 0 18 0 0 0 100 5 3 0 3 260 103 103 0 18 62 0 1405 0 0 0 99 6 27 0 77 187 56 239 0 18 92 0 290 0 1 0 99 7 20 0 24 263 102 80 0 15 74 0 9 0 0 0 100 March 4, 2026 at 01:36:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 102 10 0 2 3 0 0 0 1 0 99 1 0 0 0 152 2 110 0 0 0 0 294 0 0 0 100 2 0 0 0 44 1 2 1 0 1 0 298 0 0 0 100 3 0 0 14 59 8 20 0 1 0 0 277 0 0 0 100 4 0 0 0 53 2 12 0 1 0 0 0 0 0 0 100 5 0 0 3 250 104 36 1 0 0 0 1383 0 0 0 100 6 0 0 28 103 31 67 0 2 4 0 263 0 1 0 99 7 0 0 234 257 123 50 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:36:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 102 6 0 0 0 0 0 0 0 0 100 1 0 0 0 108 2 64 1 0 1 0 294 0 0 0 100 2 0 0 0 92 1 60 0 3 2 0 314 0 0 0 100 3 0 0 14 61 8 20 1 0 0 0 280 0 0 0 100 4 0 0 0 54 2 14 0 1 0 0 11 0 0 0 100 5 0 0 3 248 103 34 1 0 1 0 1383 0 0 0 100 6 0 0 28 45 3 8 0 0 2 0 260 0 1 0 99 7 0 0 234 310 151 102 0 1 2 0 0 0 0 0 100 March 4, 2026 at 01:36:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 60 0 41 2229 104 178 0 42 43 25 452 0 2 0 98 1 2322 0 4 130 2 175 3 35 59 25 1096 1 1 0 98 2 2069 0 9 210 1 241 1 26 39 23 862 0 1 0 98 3 2139 0 17 128 10 173 4 26 33 25 1909 1 1 0 98 4 1581 0 14 180 4 154 4 32 37 24 320 1 1 0 99 5 945 0 186 310 108 203 4 30 25 31 1819 1 1 0 99 6 1383 0 129 114 3 174 3 38 39 26 1724 1 1 0 99 7 139 0 14 408 149 266 3 28 15 29 399 0 1 0 99 March 4, 2026 at 01:36:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35496 0 256 2622 106 1025 36 169 112 36 4538 12 10 0 78 1 963 0 15 568 14 978 42 198 109 36 3825 6 3 0 92 2 5484 0 129 522 6 923 30 152 85 32 3704 4 4 0 92 3 5592 0 60 636 33 1005 33 160 115 30 4201 7 3 0 90 4 2294 0 2 503 5 869 25 178 73 31 2879 7 2 0 91 5 688 0 5 654 108 823 28 142 61 38 4469 4 2 0 94 6 1933 0 16 462 4 824 26 152 65 35 4120 6 2 0 92 7 725 0 60 599 103 689 25 107 81 27 2381 3 1 0 96 March 4, 2026 at 01:36:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2223 103 92 0 14 72 0 1 0 2 0 98 1 0 0 462 207 1 286 0 19 71 0 294 0 1 0 99 2 0 0 0 120 1 79 1 13 67 0 300 0 0 0 100 3 2 0 14 267 99 217 0 19 94 0 268 0 0 0 100 4 0 0 0 150 13 115 0 18 97 0 0 0 0 0 100 5 44 0 6 330 109 111 0 15 59 0 1386 0 1 0 99 6 0 0 7 120 3 85 0 18 101 0 263 0 0 0 100 7 0 0 3 326 102 90 0 12 85 0 0 0 0 0 100 March 4, 2026 at 01:36:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 4 0 0 1 0 0 0 0 0 100 1 0 0 0 114 2 104 1 0 3 0 294 0 0 0 100 2 0 0 0 10 2 2 0 0 3 0 294 0 0 0 100 3 0 0 14 15 3 6 1 0 1 0 266 0 0 0 100 4 0 0 0 117 52 110 0 1 1 0 0 0 0 0 100 5 0 0 7 230 110 52 1 0 1 0 1386 0 0 0 99 6 0 0 7 18 4 16 0 1 1 0 260 0 0 0 100 7 0 0 7 207 101 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:36:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 104 8 0 0 0 0 1 0 0 0 100 1 0 0 0 110 1 106 0 1 4 0 296 0 0 0 100 2 0 0 0 12 3 170 0 1 3 0 637 0 0 0 100 3 0 0 14 11 3 8 0 0 0 0 268 0 0 0 100 4 0 0 0 110 51 104 0 0 0 0 0 0 0 0 100 5 0 0 3 232 110 54 2 2 0 0 1387 0 0 0 99 6 0 0 7 14 4 10 0 1 0 0 262 0 0 0 100 7 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:36:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3376 0 23 2730 104 903 34 178 101 48 3145 7 3 0 90 1 38208 0 339 668 4 1046 39 184 126 66 4116 16 11 0 73 2 5430 0 20 568 3 977 30 165 179 68 4035 4 4 0 92 3 8512 0 157 529 4 1025 21 187 136 83 4580 4 5 0 91 4 3476 0 25 560 27 956 22 164 144 76 4952 4 3 0 93 5 728 0 6 678 124 776 34 146 133 48 4019 3 2 0 95 6 2877 0 200 482 16 893 26 160 121 75 4081 4 3 0 93 7 1107 0 96 602 102 687 21 128 70 42 3679 4 3 0 93 March 4, 2026 at 01:36:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2131 103 78 0 6 0 0 8 0 0 0 100 1 1 0 0 29 1 18 0 4 7 0 306 0 0 0 100 2 0 0 0 131 30 110 1 1 6 0 310 0 0 0 100 3 3 0 21 27 3 18 0 5 0 0 284 0 0 0 100 4 0 0 70 17 2 8 0 1 4 0 11 0 1 0 99 5 0 0 3 273 125 80 1 1 1 0 1400 0 1 0 99 6 21 0 7 37 5 22 0 2 2 0 277 0 0 0 100 7 63 0 17 238 108 25 0 3 1 0 19 0 0 0 100 March 4, 2026 at 01:36:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2256 102 284 0 19 85 0 0 0 1 0 99 1 0 0 350 76 1 126 1 17 99 0 294 0 1 0 99 2 0 0 0 201 52 182 0 12 70 0 300 0 0 0 100 3 0 0 14 167 60 109 1 14 59 0 266 0 0 0 100 4 0 0 35 108 1 96 0 15 87 0 0 0 1 0 99 5 0 0 3 297 103 94 1 8 67 0 1376 0 1 0 99 6 0 0 7 118 3 103 1 15 84 0 263 0 0 0 100 7 0 0 3 318 107 105 0 11 87 0 8 0 0 0 100 March 4, 2026 at 01:36:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 102 106 0 0 0 0 0 0 0 0 100 1 0 0 0 35 1 18 0 3 6 0 294 0 0 0 100 2 0 0 0 125 51 102 0 0 2 0 294 0 0 0 100 3 0 0 14 27 3 8 0 0 0 0 268 0 0 0 100 4 0 0 112 10 1 5 0 1 0 0 0 0 0 0 100 5 0 0 3 232 104 38 2 0 1 0 1379 0 1 0 99 6 0 0 7 34 3 14 0 0 0 0 260 0 0 0 100 7 0 0 3 236 108 14 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:36:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2571 0 259 2365 102 546 14 92 75 73 2499 3 4 0 94 1 1310 0 122 298 1 482 7 96 51 72 3074 2 2 0 97 2 447 0 28 356 44 539 7 85 51 51 1863 1 2 0 97 3 2933 0 51 266 5 410 15 89 61 45 2291 3 2 0 95 4 14066 0 22 272 1 444 10 90 125 42 2301 3 4 0 93 5 2300 0 21 442 103 445 6 86 83 39 2891 1 2 0 97 6 768 0 10 255 4 445 4 90 65 55 2610 1 1 0 98 7 186 0 54 443 112 374 2 63 29 29 1209 1 1 0 98 March 4, 2026 at 01:36:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 951 0 2 2437 102 665 27 118 44 20 2139 4 2 0 94 1 551 0 0 388 37 611 25 91 45 8 2776 4 2 0 95 2 1212 0 0 262 2 424 17 64 40 4 1895 3 1 0 96 3 339 0 84 412 6 728 23 87 50 5 2565 3 2 0 95 4 27967 0 9 317 6 529 29 81 64 7 2848 10 8 0 82 5 5219 0 24 516 111 430 19 65 53 13 3035 4 2 0 94 6 2125 0 191 290 6 598 17 92 54 19 1744 2 2 0 96 7 1071 0 31 461 112 489 16 68 64 31 1266 3 1 0 96 March 4, 2026 at 01:36:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 101 104 0 0 0 0 0 0 1 0 99 1 44 0 0 182 50 100 1 0 3 0 303 0 0 0 100 2 0 0 0 81 1 4 0 1 3 0 303 0 0 0 100 3 4 0 56 83 2 20 1 3 2 0 268 0 1 0 99 4 0 0 462 19 3 6 0 3 2 0 0 0 1 0 99 5 0 0 3 289 104 36 1 0 0 0 1386 0 0 0 100 6 0 0 7 108 11 34 0 1 0 0 263 0 0 0 100 7 0 0 3 281 101 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:36:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2196 101 279 0 13 72 0 0 0 1 0 99 1 0 0 0 64 7 106 0 19 82 0 303 0 0 0 100 2 0 0 0 40 1 62 0 7 58 0 300 0 0 0 100 3 0 0 14 113 58 106 0 18 89 0 269 0 0 0 100 4 0 0 0 51 1 90 0 21 61 0 0 0 0 0 100 5 0 0 3 255 104 117 2 15 104 0 1385 0 1 0 99 6 1 0 7 143 43 187 0 17 98 0 260 0 0 0 100 7 0 0 3 272 112 115 0 10 89 0 0 0 0 0 100 March 4, 2026 at 01:36:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 108 0 1 0 0 0 0 0 0 100 1 0 0 0 22 8 14 0 0 2 0 303 0 0 0 100 2 0 0 0 9 2 2 0 0 5 0 299 0 0 0 100 3 0 0 14 11 4 6 0 0 1 0 266 0 0 0 100 4 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 5 0 0 3 212 103 34 1 0 2 0 1386 0 0 0 100 6 0 0 7 23 5 18 0 0 1 0 260 0 0 0 100 7 0 0 3 306 151 100 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:36:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39063 0 53 2712 103 991 45 193 91 66 4456 13 10 0 77 1 1204 0 29 614 8 1073 36 211 133 51 3804 3 3 0 94 2 2897 0 129 552 4 895 33 170 98 62 4161 5 3 0 92 3 1081 0 6 512 6 887 39 179 100 42 3379 3 2 0 94 4 5383 0 30 474 4 811 27 179 122 38 3696 4 3 0 93 5 8031 0 144 699 105 753 21 110 108 52 5689 6 4 0 90 6 1559 0 187 540 15 951 22 185 124 78 4656 5 3 0 92 7 4146 0 293 681 136 829 24 142 115 60 2921 5 3 0 92 March 4, 2026 at 01:36:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 7 2127 102 14 0 1 0 0 25 0 0 0 100 1 38 0 7 37 5 24 1 3 1 0 580 0 0 0 100 2 0 0 0 123 1 110 0 1 7 0 312 0 0 0 100 3 0 0 0 27 3 6 0 0 0 0 17 0 0 0 100 4 3 0 14 29 3 12 1 1 6 0 278 0 0 0 99 5 0 0 3 242 108 56 1 3 1 0 1413 0 0 0 100 6 19 0 0 39 2 28 0 3 1 0 16 0 0 0 100 7 47 0 87 325 153 132 0 2 6 0 29 0 1 0 99 March 4, 2026 at 01:36:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2213 135 146 0 3 0 0 0 0 1 0 99 1 0 0 7 86 3 10 0 1 0 0 554 0 0 0 100 2 0 0 0 113 2 34 0 0 2 0 314 0 0 0 100 3 0 0 0 84 3 8 0 0 0 0 2 0 0 0 100 4 0 0 476 20 3 12 1 0 2 0 267 0 1 0 99 5 0 0 3 288 104 36 2 1 0 0 1387 0 0 0 100 6 0 0 0 94 4 18 0 0 0 0 2 0 0 0 100 7 0 0 45 320 123 44 0 0 2 0 9 0 1 0 99 March 4, 2026 at 01:36:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2238 139 363 0 10 58 0 0 0 1 0 99 1 0 0 7 94 15 154 0 21 74 0 553 0 0 0 100 2 0 0 0 48 2 84 0 9 82 0 294 0 0 0 100 3 0 0 0 115 60 100 0 17 86 0 0 0 0 0 100 4 0 0 14 44 2 77 0 16 65 0 266 0 0 0 100 5 0 0 3 244 103 96 1 9 50 0 1385 0 0 0 99 6 0 0 0 59 2 99 0 12 69 0 0 0 0 0 100 7 0 0 3 261 107 102 0 10 74 0 9 0 0 0 100 March 4, 2026 at 01:36:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38717 0 29 2423 101 524 12 102 108 53 2868 11 10 0 79 1 1850 0 44 426 43 650 12 110 65 72 2195 3 2 0 95 2 2480 0 50 440 3 514 11 96 72 47 1763 2 1 0 97 3 1544 0 202 314 4 484 4 98 50 59 2688 1 1 0 97 4 2418 0 334 263 3 473 7 96 67 56 3495 3 3 0 94 5 526 0 13 512 114 470 6 94 50 62 3268 2 1 0 97 6 456 0 10 279 2 437 7 96 70 46 2041 2 2 0 97 7 9596 0 169 473 109 466 9 78 134 58 3415 3 4 0 94 March 4, 2026 at 01:36:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1968 0 0 2455 144 752 36 85 58 9 2112 3 2 0 95 1 758 0 77 370 5 725 28 92 93 6 2985 3 2 0 95 2 268 0 7 397 1 699 21 60 33 3 1971 2 1 0 96 3 696 0 0 359 2 683 11 83 37 10 2266 2 1 0 97 4 786 0 14 230 4 422 11 60 77 3 1585 1 1 0 97 5 320 0 3 437 105 467 11 45 57 2 3063 2 1 0 96 6 1041 0 0 280 5 518 13 55 37 0 1728 4 1 0 94 7 407 0 31 386 104 348 11 43 13 2 1110 3 1 0 96 March 4, 2026 at 01:36:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2237 156 222 0 0 0 0 9 0 1 0 99 1 0 0 49 87 4 22 0 1 6 0 558 0 1 0 99 2 0 0 0 81 0 6 0 0 0 0 5 0 0 0 100 3 0 0 0 84 3 8 0 1 3 0 303 0 0 0 100 4 0 0 476 23 2 14 0 0 2 0 266 0 1 0 99 5 0 0 3 302 112 50 2 0 1 0 1400 0 0 0 100 6 0 0 0 82 2 6 0 0 0 0 0 0 0 0 100 7 0 0 3 281 101 6 0 0 1 0 7 0 0 0 100 March 4, 2026 at 01:36:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 156 214 0 0 0 0 10 0 0 0 99 1 0 0 7 16 4 12 0 0 3 0 553 0 0 0 100 2 0 0 0 13 0 12 0 1 0 0 0 0 0 0 100 3 0 0 0 10 2 6 0 0 5 0 294 0 0 0 100 4 0 0 14 16 2 12 0 0 0 0 266 0 0 0 100 5 0 0 3 215 105 36 1 0 1 0 1386 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:36:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2252 156 376 0 12 56 0 8 0 1 0 99 1 0 0 7 56 5 92 0 13 89 0 555 0 0 0 100 2 0 0 0 51 0 95 0 7 81 0 0 0 0 0 100 3 0 0 0 110 57 101 1 15 103 0 302 0 0 0 100 4 0 0 14 60 3 99 0 23 86 0 267 0 0 0 100 5 0 0 3 257 105 118 1 15 66 0 1388 0 0 0 99 6 0 0 0 51 2 87 0 10 105 0 0 0 0 0 100 7 0 0 3 251 101 89 0 13 81 0 0 0 0 0 100 March 4, 2026 at 01:36:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 982 0 21 2659 109 931 31 210 106 49 3174 5 3 0 92 1 5239 0 22 595 12 992 45 205 88 64 4566 5 4 0 91 2 7229 0 258 607 24 960 34 155 117 65 5107 6 4 0 90 3 2455 0 381 569 7 1066 23 176 127 71 4442 4 4 0 92 4 40903 0 56 628 5 964 46 172 163 59 4339 13 10 0 77 5 3849 0 28 698 112 865 29 144 86 72 4575 4 3 0 93 6 1949 0 21 516 5 885 21 160 113 68 3024 4 2 0 94 7 854 0 75 559 107 630 18 117 95 45 3758 2 2 0 96 March 4, 2026 at 01:36:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 70 2118 105 58 0 2 6 0 26 0 1 0 99 1 18 0 0 37 5 18 0 3 12 0 316 0 0 0 100 2 2 0 0 125 50 110 1 4 1 0 15 0 0 0 100 3 16 0 0 33 3 20 0 5 6 0 317 0 0 0 100 4 2 0 28 28 4 13 0 4 0 0 550 0 0 0 100 5 17 0 3 238 104 53 3 1 0 0 1391 0 0 0 99 6 0 0 0 97 3 78 0 2 0 0 17 0 0 0 100 7 0 0 17 224 102 5 1 3 0 0 7 0 0 0 100 March 4, 2026 at 01:36:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2185 106 127 0 1 2 0 9 0 2 0 98 1 0 0 462 24 2 18 0 0 6 0 294 0 1 0 99 2 0 0 0 179 50 104 0 0 0 0 5 0 0 0 100 3 0 0 0 80 1 4 0 0 4 0 292 0 0 0 100 4 1 0 21 83 4 8 0 1 0 0 526 0 0 0 100 5 0 0 3 299 110 50 1 1 0 0 1403 0 0 0 100 6 0 0 0 86 2 8 0 1 0 0 0 0 0 0 100 7 0 0 3 286 102 12 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:36:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 105 118 0 0 0 0 8 0 0 0 100 1 0 0 0 13 2 8 0 0 4 0 294 0 0 0 100 2 0 0 0 107 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 8 1 0 2 0 306 0 0 0 100 4 0 0 21 11 5 8 0 0 0 0 527 0 0 0 100 5 0 0 3 217 105 38 1 0 0 0 1387 0 0 0 100 6 0 0 0 22 4 22 0 1 0 0 2 0 0 0 100 7 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:37:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3586 0 123 2811 108 1345 40 236 179 54 3696 6 4 0 89 1 7559 0 20 713 3 1225 44 241 201 63 6210 6 5 0 89 2 17887 0 21 725 34 1034 32 185 213 45 4221 10 5 0 85 3 24577 0 430 688 63 1194 50 214 131 68 4411 9 9 0 82 4 4022 0 20 617 6 1053 19 203 217 61 4253 5 3 0 92 5 3701 0 166 840 118 963 33 168 183 55 4929 5 3 0 92 6 1192 0 18 596 3 1110 35 196 199 61 3795 3 3 0 94 7 1281 0 123 663 102 851 24 158 146 59 3483 4 3 0 93 March 4, 2026 at 01:37:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2124 101 80 0 1 5 0 10 0 1 0 99 1 62 0 0 32 2 16 0 3 5 0 328 0 0 0 100 2 5 0 0 26 1 9 0 3 0 0 26 0 0 0 100 3 0 0 0 25 2 10 0 1 5 0 311 0 0 0 100 4 16 0 7 68 6 47 0 2 0 0 283 0 0 0 100 5 11 0 16 237 106 52 2 2 1 0 1666 0 0 0 99 6 0 0 7 129 52 116 0 4 1 0 13 0 0 0 100 7 55 0 88 224 107 19 0 2 5 0 39 0 1 0 99 March 4, 2026 at 01:37:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 231 2114 100 81 0 2 4 0 0 0 1 0 99 1 0 0 0 89 2 50 0 1 6 0 294 0 0 0 100 2 0 0 0 42 0 0 0 0 0 0 0 0 0 0 100 3 1 0 0 47 2 6 0 0 5 0 296 0 0 0 100 4 0 0 7 45 3 6 0 1 0 0 274 0 0 0 100 5 0 0 17 249 105 38 1 0 0 0 1643 0 0 0 100 6 0 0 7 108 31 68 0 1 3 0 0 0 0 0 100 7 0 0 10 301 129 62 0 2 0 0 9 0 0 0 100 March 4, 2026 at 01:37:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 231 2112 100 12 0 3 1 0 0 0 1 0 99 1 0 0 0 158 2 120 0 2 4 0 294 0 0 0 100 2 0 0 0 46 0 4 1 0 0 0 5 0 0 0 100 3 0 0 0 49 2 6 1 0 3 0 302 0 0 0 100 4 0 0 7 48 3 4 1 0 0 0 260 0 0 0 100 5 0 0 17 270 115 56 1 0 1 0 1682 0 0 0 99 6 0 0 35 48 2 10 0 1 1 0 0 0 1 0 99 7 0 0 3 368 158 126 0 2 0 0 16 0 0 0 100 March 4, 2026 at 01:37:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 24 0 2 0 0 0 0 0 0 100 1 0 0 0 92 3 82 1 0 0 0 293 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 6 0 0 3 0 302 0 0 0 100 4 0 0 7 10 3 4 0 0 0 0 260 0 0 0 100 5 0 0 17 217 106 38 1 0 0 0 1645 0 0 0 100 6 0 0 0 11 2 8 0 1 0 0 0 0 0 0 100 7 0 0 3 329 157 124 0 1 0 0 7 0 0 0 100 March 4, 2026 at 01:37:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4061 0 317 2703 102 1106 24 176 147 60 4752 4 5 0 92 1 2559 0 150 696 18 1253 33 208 212 67 4540 7 4 0 89 2 7863 0 192 606 31 1018 20 150 238 68 4095 4 5 0 91 3 7499 0 21 650 64 975 23 166 233 74 3739 4 4 0 92 4 922 0 15 516 8 936 16 194 163 62 3076 2 2 0 96 5 2090 0 43 676 106 688 16 121 162 35 4994 4 2 0 94 6 37393 0 38 526 4 815 32 145 186 44 3612 13 9 0 78 7 1574 0 93 692 106 912 24 117 205 68 2431 4 2 0 94 March 4, 2026 at 01:37:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 100 100 0 0 1 0 0 0 0 0 100 1 0 0 70 20 4 10 0 2 7 0 294 0 1 0 99 2 44 0 0 133 57 114 0 0 7 0 9 0 0 0 99 3 0 0 7 24 2 8 0 1 1 0 293 0 0 0 100 4 0 0 7 40 5 22 0 1 1 0 263 0 0 0 100 5 2 0 21 228 105 38 1 0 1 0 1651 0 0 0 100 6 0 0 0 25 3 4 0 0 1 0 0 0 0 0 100 7 0 0 7 222 101 6 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:37:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 101 102 0 0 0 0 1 0 1 0 99 1 0 0 42 83 3 12 0 0 3 0 294 0 1 0 99 2 0 0 462 125 56 114 1 0 2 0 9 0 1 0 99 3 0 0 0 87 3 10 1 1 4 0 301 0 0 0 100 4 0 0 7 90 3 14 0 1 0 0 260 0 0 0 100 5 0 0 16 288 106 40 1 0 0 0 1650 0 0 0 99 6 0 0 0 81 2 4 0 0 0 0 0 0 0 0 100 7 0 0 4 282 101 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:37:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 14 3 8 1 1 4 0 294 0 0 0 100 2 0 0 0 119 56 116 0 0 0 0 14 0 0 0 100 3 0 0 0 8 1 4 0 0 1 0 301 0 0 0 100 4 0 0 7 19 3 14 0 0 0 0 260 0 0 0 100 5 0 0 16 234 112 64 2 1 0 0 1660 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 4 213 101 10 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:37:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4045 0 308 2579 109 949 26 149 69 64 2957 5 4 0 91 1 1497 0 14 483 4 847 28 166 111 69 4279 5 3 0 92 2 42005 0 29 535 30 799 19 131 138 51 4538 12 11 0 77 3 7152 0 133 464 8 857 22 138 156 69 4270 5 3 0 92 4 2329 0 35 512 13 948 19 157 129 88 4501 3 3 0 94 5 2943 0 220 667 109 743 16 115 93 68 4551 3 3 0 94 6 3062 0 49 551 6 882 25 151 95 60 3125 6 3 0 92 7 524 0 61 547 102 588 21 90 70 52 1758 3 1 0 96 March 4, 2026 at 01:37:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 2275 152 406 1 18 79 0 10 0 1 0 99 1 0 0 0 76 3 110 0 22 94 0 303 0 0 0 100 2 0 0 0 61 0 87 0 13 60 0 17 0 1 0 99 3 0 0 0 124 55 95 0 20 72 0 306 0 0 0 100 4 0 0 7 66 3 88 0 18 71 0 282 0 0 0 100 5 24 0 10 273 105 115 1 11 62 0 1401 0 0 0 99 6 49 0 84 65 5 104 0 16 98 0 294 0 1 0 99 7 11 0 17 257 102 78 0 16 55 0 30 0 0 0 100 March 4, 2026 at 01:37:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2210 150 200 0 0 0 0 0 0 1 0 99 1 0 0 0 74 3 14 0 2 1 0 294 0 0 0 100 2 0 0 350 13 0 4 0 0 3 0 0 0 1 0 99 3 0 0 0 67 2 6 1 0 2 0 299 0 0 0 100 4 0 0 7 64 3 4 0 0 0 0 263 0 0 0 100 5 0 0 3 283 106 50 1 0 1 0 1386 0 0 0 100 6 2 0 49 79 9 25 2 3 4 0 400 1 1 0 98 7 0 0 3 272 101 16 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:37:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 150 214 0 2 1 0 0 0 0 0 100 1 0 0 0 30 3 8 1 0 1 0 294 0 0 0 100 2 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 24 1 4 0 0 5 0 298 0 0 0 100 4 3 0 7 25 3 4 0 0 0 0 261 0 0 0 100 5 0 0 3 236 104 40 1 0 0 0 1383 0 0 0 100 6 0 0 14 39 9 20 0 0 0 0 275 0 0 0 100 7 0 0 115 213 101 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:37:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3064 0 131 2388 146 576 5 90 56 44 2055 2 2 0 96 1 8787 0 123 263 6 423 3 89 40 45 2456 2 2 0 95 2 332 0 9 250 2 393 5 90 76 40 2549 1 1 0 98 3 6022 0 212 274 2 483 15 97 112 65 3214 3 3 0 93 4 4997 0 31 323 3 413 8 77 74 54 1926 4 2 0 94 5 607 0 22 502 110 514 6 81 61 58 2701 1 2 0 97 6 425 0 58 279 11 467 4 96 51 42 2300 1 2 0 97 7 234 0 63 463 102 429 6 70 50 42 2292 2 2 0 97 March 4, 2026 at 01:37:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3352 0 193 2411 102 640 40 120 54 12 2527 3 3 0 94 1 28360 0 9 461 1 805 49 151 78 19 3000 12 7 0 81 2 1016 0 0 320 10 554 37 111 114 13 2849 4 2 0 94 3 3921 0 20 443 2 739 29 112 91 20 2820 7 2 0 91 4 1009 0 7 429 47 723 32 122 72 17 2121 2 1 0 96 5 378 0 3 509 106 507 34 87 50 8 2372 2 1 0 97 6 842 0 84 303 4 512 21 85 73 10 2766 3 2 0 95 7 487 0 38 468 104 444 18 70 63 5 1348 2 2 0 97 March 4, 2026 at 01:37:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2274 100 216 1 18 70 0 0 0 1 0 99 1 44 0 0 137 6 101 1 12 84 0 9 0 0 0 100 2 0 0 0 125 3 88 2 10 98 0 294 0 0 0 100 3 0 0 0 189 55 107 1 13 65 0 302 0 0 0 100 4 0 0 7 210 44 183 0 20 90 0 264 0 0 0 100 5 0 0 3 328 103 128 1 17 84 0 1081 0 0 0 99 6 2 0 56 211 5 186 1 18 88 0 566 0 1 0 99 7 0 0 465 284 113 108 0 11 68 0 0 0 1 0 99 March 4, 2026 at 01:37:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 1 0 0 0 0 0 100 1 0 0 0 21 7 12 0 0 0 0 9 0 0 0 100 2 0 0 0 15 4 6 1 0 7 0 294 0 0 0 100 3 0 0 0 11 2 4 0 0 7 0 299 0 0 0 100 4 0 0 7 14 5 6 0 0 1 0 260 0 0 0 100 5 0 0 7 213 104 32 1 0 1 0 1081 0 0 0 100 6 0 0 14 14 5 8 0 0 1 0 566 0 0 0 100 7 0 0 7 311 151 106 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:37:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 0 0 0 1 0 0 0 100 1 0 0 0 19 6 14 0 0 0 0 10 0 0 0 100 2 0 0 0 11 3 6 0 0 5 0 294 0 0 0 100 3 0 0 0 14 4 10 0 0 8 0 308 0 0 0 100 4 0 0 7 14 4 10 0 1 0 0 271 0 0 0 100 5 0 0 3 214 102 42 0 1 1 0 1080 0 0 0 100 6 0 0 14 12 4 8 1 0 0 0 565 0 0 0 100 7 0 0 3 310 151 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:37:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3154 0 26 2649 101 981 29 170 126 37 3136 3 4 0 93 1 4959 0 302 547 5 1043 27 163 113 64 4115 6 3 0 91 2 5297 0 45 571 5 814 18 125 93 64 2722 4 3 0 93 3 5113 0 206 565 2 972 28 138 130 72 5732 7 4 0 89 4 6905 0 137 513 5 911 12 133 156 73 4446 6 5 0 90 5 3622 0 27 665 110 790 10 115 88 73 3021 3 2 0 95 6 33639 0 24 520 26 953 28 143 80 56 6940 12 9 0 79 7 1312 0 107 607 127 623 14 99 93 37 2630 3 2 0 94 March 4, 2026 at 01:37:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 77 2119 103 61 0 4 7 0 13 0 1 0 99 1 13 0 0 32 2 20 0 1 6 0 15 0 0 0 100 2 0 0 0 92 3 72 0 0 5 0 303 0 0 0 100 3 0 0 0 29 2 12 1 0 3 0 324 0 0 0 100 4 0 0 0 27 3 8 0 1 0 0 12 0 0 0 100 5 2 0 10 229 105 8 0 0 0 0 270 0 0 0 100 6 44 0 0 138 56 152 1 3 0 0 1396 0 0 0 100 7 27 0 31 232 105 16 0 2 4 0 281 0 0 0 100 March 4, 2026 at 01:37:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2267 100 230 0 19 80 0 0 0 2 0 98 1 0 0 462 134 0 175 0 19 89 0 0 0 1 0 99 2 0 0 0 125 3 83 1 12 86 0 294 0 0 0 100 3 0 0 0 181 53 107 0 16 83 0 299 0 1 0 99 4 0 0 0 121 3 89 0 15 77 0 0 0 0 0 100 5 0 0 10 322 103 87 0 10 79 0 263 0 0 0 100 6 0 0 0 228 54 224 1 13 82 0 1375 0 1 0 99 7 0 0 17 335 108 91 0 11 39 0 275 0 0 0 100 March 4, 2026 at 01:37:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 8 0 1 0 0 0 0 0 0 100 1 0 0 0 122 0 120 0 2 0 0 0 0 0 0 100 2 0 0 0 11 3 8 0 1 1 0 294 0 0 0 100 3 0 0 0 10 2 6 0 0 4 0 303 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 5 1 0 10 212 104 6 0 0 0 0 261 0 0 0 100 6 0 0 0 114 54 138 1 0 1 0 1374 0 0 0 100 7 0 0 17 220 108 16 0 0 0 0 275 0 0 0 100 March 4, 2026 at 01:37:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1738 0 126 2358 109 426 9 83 58 40 2584 3 2 0 95 1 1388 0 138 342 0 554 7 102 58 54 1541 1 2 0 96 2 1183 0 196 264 5 454 8 87 43 59 2749 1 2 0 96 3 33482 0 19 285 2 497 14 104 64 46 2539 9 7 0 83 4 3149 0 16 248 3 393 5 99 69 46 1767 1 2 0 96 5 5477 0 44 420 105 357 8 62 88 46 3640 4 3 0 93 6 3355 0 17 409 43 488 10 86 61 39 3081 2 2 0 96 7 315 0 68 431 111 339 5 62 44 36 1641 1 1 0 98 March 4, 2026 at 01:37:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1261 0 0 2529 105 794 34 161 58 17 2395 3 2 0 95 1 1338 0 185 491 2 936 52 164 50 21 3016 3 3 0 94 2 700 0 7 511 3 847 34 123 48 23 2464 3 2 0 96 3 310 0 3 561 46 972 24 137 42 13 2858 3 3 0 94 4 2199 0 18 435 5 649 29 117 65 8 2608 5 2 0 93 5 2823 0 82 505 111 563 30 96 83 8 2155 4 3 0 93 6 3723 0 2 332 4 634 23 113 47 11 4671 4 3 0 93 7 1245 0 45 460 103 466 11 72 28 11 1437 3 1 0 96 March 4, 2026 at 01:37:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2187 105 12 0 1 1 0 8 0 1 0 99 1 0 0 462 23 0 12 0 0 2 0 0 0 1 0 99 2 0 0 0 187 3 108 1 0 4 0 294 0 0 0 100 3 0 0 0 180 50 106 0 1 0 0 0 0 0 0 100 4 0 0 0 86 4 8 0 1 10 0 301 0 0 0 100 5 0 0 52 290 106 18 0 1 2 0 264 0 1 0 99 6 0 0 0 86 4 38 1 0 0 0 1377 0 0 0 100 7 2 0 17 282 102 6 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:37:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 106 181 0 20 93 0 9 0 1 0 99 1 0 0 0 53 1 83 0 16 84 0 0 0 0 0 100 2 0 0 0 121 3 154 0 14 78 0 294 0 0 0 100 3 0 0 0 206 104 284 0 21 89 0 2 0 0 0 100 4 0 0 0 56 3 97 0 17 84 0 306 0 0 0 100 5 0 0 10 250 103 86 0 11 84 0 260 0 0 0 100 6 0 0 0 71 4 153 1 13 111 0 1377 0 0 0 99 7 0 0 17 241 102 62 0 9 56 0 266 0 0 0 100 March 4, 2026 at 01:37:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 118 0 1 0 0 10 0 0 0 100 1 0 0 0 16 1 8 0 0 1 0 0 0 0 0 100 2 0 0 0 13 4 6 0 0 4 0 294 0 0 0 100 3 0 0 0 108 51 102 0 0 1 0 0 0 0 0 100 4 0 0 0 12 4 10 0 0 7 0 306 0 0 0 100 5 0 0 10 213 103 6 1 0 1 0 260 0 0 0 100 6 0 0 0 21 5 48 1 1 2 0 1376 0 0 0 100 7 0 0 17 209 102 4 1 0 1 0 266 0 0 0 100 March 4, 2026 at 01:37:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2133 0 130 2690 127 1111 36 222 90 66 3738 4 3 0 93 1 3914 0 138 565 1 1047 38 194 108 66 4766 7 4 0 89 2 36619 0 220 544 6 798 31 158 92 59 4707 13 10 0 77 3 2985 0 43 660 26 961 40 186 118 55 4458 6 3 0 92 4 2112 0 194 541 8 982 43 201 130 68 3506 3 3 0 94 5 8954 0 15 706 104 838 24 143 135 58 3979 5 4 0 91 6 6576 0 30 443 8 809 22 141 119 62 5890 5 4 0 91 7 1012 0 79 628 106 795 26 135 112 49 2513 4 2 0 94 March 4, 2026 at 01:37:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2174 150 208 0 1 2 0 12 0 1 0 99 1 17 0 0 28 3 8 0 1 0 0 22 0 0 0 100 2 4 0 0 31 3 16 1 0 1 0 306 0 0 0 100 3 0 0 70 23 0 18 0 3 6 0 22 0 1 0 99 4 2 0 7 29 3 14 0 3 10 0 306 0 0 0 100 5 68 0 3 250 113 37 1 3 0 0 38 0 0 0 100 6 11 0 7 36 6 49 2 3 1 0 1670 0 0 0 100 7 4 0 31 226 102 16 0 2 0 0 276 0 0 0 100 March 4, 2026 at 01:37:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2226 150 200 0 0 0 0 0 0 1 0 99 1 0 0 0 81 1 4 0 0 0 0 1 0 0 0 100 2 0 0 0 87 4 8 0 0 4 0 315 0 0 0 100 3 0 0 42 82 0 12 0 0 2 0 0 0 1 0 99 4 0 0 462 24 5 14 0 1 7 0 304 0 1 0 99 5 0 0 3 297 108 16 0 0 0 0 9 0 0 0 100 6 0 0 7 95 6 54 1 2 0 0 1640 0 0 0 100 7 0 0 17 284 103 8 0 0 0 0 267 0 0 0 100 March 4, 2026 at 01:37:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2199 139 246 1 14 70 0 9 0 1 0 99 1 0 0 0 58 0 110 0 21 107 0 0 0 0 0 100 2 0 0 0 50 3 78 0 10 69 0 294 0 0 0 100 3 0 0 0 161 73 278 0 24 81 0 18 0 0 0 100 4 0 0 0 66 3 120 0 17 98 0 305 0 0 0 100 5 0 0 3 270 107 111 0 15 60 0 9 0 0 0 100 6 0 0 7 103 18 189 3 25 79 0 1638 0 0 0 99 7 0 0 17 264 102 113 1 18 65 0 266 0 0 0 100 March 4, 2026 at 01:37:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4989 0 313 2522 101 790 23 141 76 79 4868 5 4 0 91 1 1365 0 29 450 1 764 16 151 89 61 4507 3 2 0 94 2 2494 0 17 409 3 686 11 123 86 55 2854 2 2 0 95 3 37746 0 53 503 0 706 27 133 98 48 3514 13 9 0 78 4 2773 0 21 484 4 653 11 121 112 44 2310 5 2 0 93 5 6794 0 125 578 109 676 9 124 139 57 2900 3 3 0 94 6 4063 0 207 480 54 800 14 137 85 55 4613 3 3 0 94 7 696 0 71 533 103 553 12 103 57 52 2448 2 2 0 96 March 4, 2026 at 01:37:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 175 0 70 2265 101 384 23 63 26 0 1338 2 2 0 96 1 938 0 0 279 48 433 16 75 51 2 1133 1 1 0 98 2 291 0 0 156 6 268 14 47 14 1 1036 2 1 0 98 3 216 0 0 161 2 293 20 61 18 0 1073 2 1 0 98 4 395 0 0 178 5 275 11 57 23 2 892 3 1 0 96 5 327 0 3 313 104 192 15 44 13 1 1100 1 1 0 98 6 910 0 7 142 6 269 13 42 34 0 2335 2 1 0 97 7 357 0 52 320 103 209 13 39 30 0 915 3 1 0 97 March 4, 2026 at 01:37:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 100 112 0 1 2 0 0 0 1 0 99 1 0 0 14 117 50 116 0 2 3 0 0 0 0 0 100 2 0 0 0 33 10 26 0 0 2 0 313 0 0 0 100 3 0 0 0 11 0 2 0 1 0 0 0 0 0 0 100 4 0 0 0 25 4 16 0 0 0 0 302 0 0 0 100 5 0 0 3 226 109 12 0 0 2 0 305 0 0 0 100 6 0 0 7 19 5 40 1 0 1 0 1340 0 0 0 100 7 0 0 17 217 102 12 0 0 0 0 272 0 0 0 100 March 4, 2026 at 01:37:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 100 100 0 1 0 0 0 0 1 0 99 1 0 0 448 105 46 94 0 1 2 0 0 0 1 0 99 2 0 0 0 100 13 26 0 1 6 0 303 0 0 0 100 3 0 0 0 74 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 88 3 14 1 0 0 0 300 0 0 0 100 5 0 0 3 280 103 4 0 0 7 0 302 0 0 0 100 6 1 0 35 81 5 44 1 1 5 0 1337 0 1 0 99 7 0 0 17 283 102 10 1 1 6 0 266 0 1 0 99 March 4, 2026 at 01:37:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 100 188 0 12 85 0 0 0 0 0 100 1 0 0 0 161 50 208 0 15 75 0 0 0 0 0 100 2 0 0 0 67 9 113 0 17 70 0 303 0 0 0 100 3 0 0 0 92 51 173 0 19 76 0 0 0 0 0 100 4 0 0 0 71 4 117 0 17 86 0 302 0 0 0 100 5 0 0 2 248 102 73 1 10 69 0 300 0 0 0 100 6 2 0 7 57 6 123 1 12 79 0 1337 0 0 0 99 7 0 0 18 241 102 66 0 15 75 0 266 0 0 0 100 March 4, 2026 at 01:37:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34219 0 30 2751 127 1171 32 191 116 67 4792 12 10 0 78 1 3491 0 39 690 8 1102 26 186 70 48 3727 5 3 0 92 2 1487 0 17 521 24 809 22 135 75 46 3293 4 3 0 93 3 1317 0 188 590 8 977 23 161 118 42 3445 4 3 0 94 4 11632 0 248 530 6 920 31 133 167 65 6266 7 6 0 87 5 8306 0 33 734 103 887 20 123 162 72 4175 6 4 0 90 6 2181 0 221 559 9 1073 29 176 118 76 4640 5 3 0 92 7 1367 0 118 608 104 689 12 111 121 45 3288 4 2 0 94 March 4, 2026 at 01:37:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 151 206 0 0 0 0 1 0 0 0 100 1 0 0 7 24 1 10 0 2 6 0 1 0 0 0 100 2 0 0 0 22 3 6 0 0 4 0 294 0 0 0 100 3 44 0 0 27 5 10 0 0 0 0 8 0 0 0 100 4 0 0 0 31 4 14 0 0 0 0 302 0 0 0 100 5 0 0 3 223 102 6 0 1 4 0 305 0 0 0 100 6 0 0 77 20 6 44 0 0 7 0 1339 0 1 0 99 7 2 0 17 221 103 2 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:37:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2228 150 204 0 0 0 0 0 0 1 0 99 1 0 0 462 20 2 10 0 1 2 0 4 0 1 0 99 2 0 0 0 92 5 20 0 1 2 0 308 0 0 0 100 3 0 0 0 94 6 19 0 1 0 0 10 0 0 0 100 4 0 0 0 96 3 22 1 1 0 0 300 0 0 0 100 5 0 0 3 291 107 10 0 0 5 0 304 0 0 0 100 6 0 0 49 83 5 42 1 1 3 0 1334 0 1 0 98 7 1 0 17 284 102 10 0 0 0 0 272 0 0 0 100 March 4, 2026 at 01:37:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 150 202 0 0 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 1 0 0 1 0 0 0 100 2 0 0 0 15 5 10 0 0 7 0 296 0 0 0 100 3 0 0 0 19 6 14 0 0 0 0 10 0 0 0 100 4 0 0 0 24 5 18 0 0 0 0 303 0 0 0 100 5 0 0 3 221 103 16 1 1 7 0 301 0 0 0 100 6 0 0 7 15 5 40 1 0 0 0 1334 0 0 0 100 7 0 0 17 210 103 6 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:37:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4315 0 207 2764 131 1301 35 207 223 65 3310 4 4 0 91 1 1027 0 15 649 1 1096 30 196 164 46 3192 5 2 0 93 2 3935 0 28 589 4 874 33 154 171 42 3048 8 3 0 90 3 8613 0 36 708 70 1120 24 181 193 51 4175 9 6 0 85 4 8250 0 139 562 6 1039 27 170 285 57 6840 5 6 0 89 5 32431 0 195 694 105 886 22 136 150 74 4294 11 7 0 82 6 4450 0 147 572 19 1062 17 167 198 81 6000 4 3 0 92 7 905 0 55 674 105 871 23 154 170 69 2092 2 2 0 96 March 4, 2026 at 01:37:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 70 2111 101 60 0 1 6 0 10 0 1 0 99 1 29 0 0 80 1 66 0 3 7 0 16 0 0 0 99 2 0 0 0 34 4 16 0 4 1 0 307 0 0 0 100 3 0 0 0 23 1 4 0 0 0 0 11 0 0 0 100 4 60 0 7 46 11 58 1 2 0 0 1404 0 0 0 99 5 1 0 3 233 103 16 0 1 0 0 304 0 0 0 100 6 11 0 21 33 4 25 0 4 0 0 549 0 0 0 100 7 0 0 17 321 152 106 0 1 0 0 10 0 0 0 100 March 4, 2026 at 01:37:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2153 100 4 0 1 4 0 0 0 1 0 99 1 0 0 343 119 0 114 0 0 5 0 0 0 1 0 99 2 0 0 0 70 2 12 0 0 3 0 294 0 0 0 100 3 0 0 0 59 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 81 10 50 2 0 1 0 1389 0 0 0 99 5 0 0 3 266 102 8 0 2 6 0 304 0 0 0 100 6 0 0 21 67 5 12 0 0 0 0 528 0 0 0 100 7 0 0 3 369 152 118 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:37:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 100 8 0 0 0 0 0 0 1 0 99 1 0 0 119 109 0 104 0 0 1 0 0 0 0 0 100 2 0 0 0 40 4 20 0 0 5 0 301 0 0 0 100 3 0 0 0 22 0 2 0 1 0 0 0 0 0 0 100 4 0 0 0 44 11 50 1 0 0 0 1391 0 0 0 100 5 0 0 3 238 106 14 1 0 6 0 309 0 0 0 100 6 0 0 21 29 5 10 0 0 0 0 527 0 0 0 100 7 0 0 3 331 152 112 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:37:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 482 0 14 2143 100 70 0 16 9 13 107 0 1 0 99 1 36 0 2 137 0 142 0 10 5 2 92 0 0 0 100 2 7 0 0 42 3 45 1 5 8 5 341 0 0 0 100 3 25 0 7 25 0 29 1 4 1 2 52 0 1 0 99 4 4 0 16 41 11 73 1 4 12 2 1466 0 1 0 99 5 2274 0 13 236 103 61 2 11 39 11 767 0 1 0 99 6 26 0 26 32 5 53 0 10 5 4 620 0 0 0 100 7 28 0 7 331 152 139 0 11 8 7 71 0 0 0 100 March 4, 2026 at 01:37:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 528 0 131 2249 131 245 1 33 2305 17 788 0 2 0 98 1 626 0 12 249 0 330 0 50 153 15 773 0 1 0 99 2 25 0 11 121 2 172 0 35 84 11 540 0 1 0 99 3 13 0 9 159 55 146 0 30 68 11 200 0 0 0 100 4 37 0 67 109 5 188 3 32 2097 9 920 0 2 0 98 5 41 0 5 324 105 176 1 25 104 12 1399 0 0 0 99 6 17 0 36 181 6 307 0 47 146 15 1064 0 1 0 99 7 16 0 12 383 140 235 1 28 3149 9 222 0 1 0 99 March 4, 2026 at 01:37:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2253 159 122 0 1 0 0 20 0 1 0 99 1 0 0 455 116 1 102 0 0 2 0 0 0 1 0 99 2 0 0 0 90 3 14 0 1 7 0 294 0 0 0 100 3 0 0 0 100 12 24 0 1 1 0 0 0 0 0 100 4 0 0 35 81 4 38 1 0 4 0 743 0 1 0 99 5 0 0 3 282 102 6 0 0 6 0 299 0 0 0 100 6 0 0 21 91 7 14 1 0 1 0 826 0 0 0 100 7 0 0 3 281 102 4 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:37:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 121 44 0 0 0 0 21 0 0 0 100 1 0 0 0 11 1 6 0 1 0 0 1 0 0 0 100 2 0 0 0 122 2 122 0 1 3 0 294 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 13 4 36 1 0 1 0 743 0 0 0 100 5 0 0 3 213 102 6 1 0 4 0 299 0 0 0 100 6 0 0 21 14 6 12 0 0 0 0 825 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:37:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 120 46 0 1 0 0 24 0 0 0 100 1 0 0 1 8 0 4 0 1 0 0 1 0 0 0 100 2 0 0 0 120 2 114 1 0 3 0 294 0 0 0 100 3 1 0 0 115 50 120 0 1 0 0 10 0 0 0 100 4 0 0 0 11 3 34 0 0 0 0 742 0 0 0 100 5 0 0 2 226 110 18 0 0 7 0 332 0 0 0 100 6 0 0 21 15 6 12 1 0 0 0 825 0 0 0 100 7 0 0 4 210 102 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:37:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 120 42 0 0 0 0 20 0 0 0 100 1 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 2 0 0 0 119 3 114 0 0 4 0 315 0 0 0 100 3 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 15 5 38 1 0 1 0 745 0 0 0 100 5 0 0 3 215 103 8 0 1 4 0 300 0 0 0 100 6 0 0 21 14 6 12 0 0 0 0 825 0 0 0 100 7 0 0 3 212 103 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:37:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 116 34 0 0 1 0 16 0 0 0 100 1 0 0 0 11 0 8 0 3 2 0 2 0 0 0 100 2 2 0 0 119 2 114 0 1 5 0 297 0 0 0 100 3 4 0 0 110 50 108 0 1 1 0 4 0 0 0 100 4 0 0 0 16 3 44 1 1 2 0 742 0 0 0 100 5 0 0 3 227 109 20 0 1 10 0 309 0 0 0 100 6 0 0 21 18 7 16 1 0 1 0 824 0 0 0 100 7 0 0 3 211 102 8 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:37:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 2 0 0 0 0 0 0 0 0 100 1 0 0 0 11 0 6 0 0 0 0 0 0 0 0 100 2 0 0 0 117 2 112 0 0 4 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 14 4 38 0 0 0 0 744 0 0 0 100 5 0 0 3 260 123 58 1 1 10 0 320 0 0 0 100 6 0 0 21 14 6 12 0 0 0 0 825 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:37:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 24 0 1 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 98 2 90 1 0 3 0 294 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 4 0 0 0 11 3 34 1 0 0 0 742 0 0 0 100 5 0 0 3 252 122 46 0 0 2 0 324 0 0 0 100 6 0 0 21 15 6 12 1 0 0 0 826 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:37:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 8 0 4 0 0 0 0 3 0 0 0 100 2 0 0 0 17 2 12 0 1 1 0 294 0 0 0 100 3 0 0 0 111 52 108 0 0 0 0 7 0 0 0 100 4 0 0 0 15 4 40 1 2 0 0 749 0 0 0 100 5 0 0 3 262 126 56 0 0 2 0 326 0 0 0 100 6 0 0 21 19 6 20 0 1 0 0 825 0 0 0 100 7 0 0 3 209 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:37:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 3 0 294 0 0 0 100 3 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 12 4 36 0 0 1 0 742 0 0 0 100 5 0 0 3 251 122 46 0 0 6 0 324 0 0 0 100 6 0 0 21 15 5 12 1 0 0 0 824 0 0 0 100 7 0 0 3 215 102 14 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:37:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 105 0 1 0 0 0 0 0 0 100 1 0 0 0 8 0 4 0 0 2 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 5 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 15 5 38 1 0 0 0 744 0 0 0 100 5 0 0 3 252 122 48 0 0 4 0 320 0 0 0 100 6 0 0 21 15 6 14 0 0 0 0 826 0 0 0 100 7 0 0 3 211 102 8 0 0 2 0 0 0 0 0 100 March 4, 2026 at 01:37:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 114 0 2 0 0 0 0 0 0 100 1 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 2 0 0 0 20 3 14 1 0 2 0 294 0 0 0 100 3 0 0 0 107 51 100 0 0 1 0 0 0 0 0 100 4 0 0 0 14 5 36 0 0 1 0 742 0 0 0 100 5 0 0 3 256 123 48 1 0 5 0 320 0 0 0 100 6 0 0 21 15 6 10 1 0 1 0 825 0 0 0 100 7 0 0 3 210 102 4 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:37:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 0 0 0 1 0 0 0 100 1 0 0 0 14 1 14 0 1 0 0 1 0 0 0 100 2 0 0 0 17 2 12 0 0 2 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 15 5 38 1 0 0 0 744 0 0 0 100 5 0 0 3 252 122 46 0 0 6 0 317 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 825 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:37:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 5 0 294 0 0 0 100 3 0 0 0 107 50 104 0 0 0 0 5 0 0 0 100 4 0 0 0 15 4 40 1 0 0 0 749 0 0 0 100 5 0 0 2 264 128 58 0 0 4 0 336 0 0 0 100 6 0 0 21 13 5 10 1 0 0 0 825 0 0 0 100 7 0 0 4 211 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:37:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 0 0 0 1 0 0 0 100 2 0 0 0 22 2 22 0 1 2 0 294 0 0 0 100 3 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 16 6 40 0 0 0 0 744 0 0 0 100 5 0 0 3 253 123 46 0 0 1 0 320 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 825 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:38:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 108 0 0 0 0 9 0 0 0 100 1 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 2 0 0 0 20 2 14 1 0 2 0 293 0 0 0 100 3 0 0 0 112 50 114 0 1 0 0 18 0 0 0 100 4 0 0 0 13 4 36 1 0 1 0 742 0 0 0 100 5 0 0 2 255 123 48 1 0 8 0 322 0 0 0 100 6 0 0 21 16 6 14 1 0 0 0 825 0 0 0 100 7 0 0 4 210 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 11 0 6 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 3 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 15 5 38 1 0 0 0 745 0 0 0 100 5 0 0 3 254 123 48 0 0 2 0 316 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 824 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 294 0 0 0 100 3 0 0 0 107 50 102 0 1 1 0 0 0 0 0 100 4 0 0 0 13 4 36 0 0 0 0 742 0 0 0 100 5 0 0 3 257 122 56 0 1 5 0 325 0 0 0 100 6 0 0 21 13 5 10 1 0 0 0 826 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 7 0 294 0 0 0 100 3 0 0 0 107 50 104 0 0 0 0 5 0 0 0 100 4 0 0 0 18 5 42 2 0 1 0 751 0 0 0 100 5 0 0 3 266 128 60 0 0 8 0 333 0 0 0 100 6 0 0 21 17 5 20 0 1 1 0 825 0 0 0 100 7 0 0 3 210 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 18 2 12 1 0 3 0 294 0 0 0 100 3 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 12 4 36 0 0 0 0 743 0 0 0 100 5 0 0 3 254 123 46 1 0 3 0 321 0 0 0 100 6 0 0 21 13 5 10 1 0 0 0 824 0 0 0 100 7 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 4 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 15 5 38 1 0 0 0 744 0 0 0 100 5 0 0 3 254 123 48 0 0 6 0 318 0 0 0 100 6 0 0 21 17 6 16 0 0 0 0 826 0 0 0 100 7 0 0 3 215 102 16 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:38:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 114 0 2 0 0 0 0 0 0 100 1 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 2 0 0 0 19 3 12 0 0 4 0 294 0 0 0 100 3 0 0 0 107 51 100 0 0 1 0 0 0 0 0 100 4 0 0 0 15 5 36 1 0 1 0 741 0 0 0 100 5 0 0 3 252 122 46 0 0 2 0 323 0 0 0 100 6 0 0 21 15 6 10 1 0 1 0 824 0 0 0 100 7 0 0 3 210 102 4 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:38:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 0 0 0 1 0 0 0 100 1 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 15 5 38 1 0 1 0 744 0 0 0 100 5 0 0 2 252 122 46 0 0 5 0 319 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 826 0 0 0 100 7 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 6 0 1 0 0 0 0 0 0 100 2 0 0 0 18 2 12 1 0 1 0 294 0 0 0 100 3 0 0 0 107 50 104 0 0 0 0 5 0 0 0 100 4 0 0 0 14 4 40 0 0 0 0 750 0 0 0 100 5 1 0 3 268 130 62 1 0 7 0 338 0 0 0 100 6 0 0 21 16 5 16 1 1 0 0 825 0 0 0 100 7 0 0 3 210 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 2 0 0 0 19 3 14 0 0 3 0 315 0 0 0 100 3 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 17 6 40 1 0 0 0 744 0 0 0 100 5 0 0 3 255 123 48 0 1 5 0 315 0 0 0 100 6 0 0 21 14 5 12 0 0 0 0 825 0 0 0 100 7 0 0 3 217 103 14 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:38:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 12 4 36 0 0 1 0 741 0 0 0 100 5 0 0 3 252 122 46 0 0 10 0 325 0 0 0 100 6 0 0 21 16 6 14 1 0 0 0 825 0 0 0 100 7 0 0 3 210 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 112 0 1 0 0 0 0 0 0 100 1 0 0 0 11 0 6 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 2 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 15 5 38 1 0 0 0 745 0 0 0 100 5 0 0 3 254 123 48 0 0 1 0 321 0 0 0 100 6 2 0 21 14 5 10 2 0 0 0 960 1 0 0 99 7 0 0 3 211 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 12 0 12 0 1 0 0 0 0 0 0 100 2 0 0 0 18 2 12 1 0 3 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 13 4 36 1 0 0 0 742 0 0 0 100 5 0 0 3 253 122 50 0 0 6 0 320 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 825 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 3 0 294 0 0 0 100 3 0 0 0 107 50 104 0 0 0 0 5 0 0 0 100 4 0 0 0 17 5 42 1 0 1 0 751 0 0 0 100 5 0 0 3 269 130 62 1 0 7 0 331 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 825 0 0 0 100 7 0 0 3 211 102 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:38:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 11 0 6 0 0 0 0 0 0 0 0 100 2 0 0 0 22 2 22 0 1 4 0 294 0 0 0 100 3 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 12 4 36 0 0 0 0 742 0 0 0 100 5 0 0 3 255 123 48 0 1 5 0 324 0 0 0 100 6 0 0 21 14 5 10 2 0 0 0 824 0 0 0 100 7 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 19 2 14 0 0 3 0 293 0 0 0 100 3 0 0 0 110 50 110 0 1 0 0 0 0 0 0 100 4 0 0 0 15 5 38 1 0 0 0 745 0 0 0 100 5 0 0 3 252 122 46 0 0 3 0 320 0 0 0 100 6 0 0 21 15 6 14 0 0 0 0 826 0 0 0 100 7 0 0 3 210 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 1 0 0 0 0 0 0 100 1 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 2 0 0 0 20 3 14 1 0 3 0 294 0 0 0 100 3 0 0 0 107 51 100 0 0 1 0 0 0 0 0 100 4 0 0 0 15 5 36 1 0 1 0 741 0 0 0 100 5 0 0 3 252 122 48 0 0 6 0 320 0 0 0 100 6 0 0 21 14 6 10 0 0 1 0 824 0 0 0 100 7 0 0 3 208 102 2 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:38:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 0 0 1 0 0 0 100 1 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 2 0 0 0 17 2 12 0 0 1 0 294 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 19 5 48 1 1 0 0 744 0 0 0 100 5 0 0 3 255 123 48 1 0 7 0 316 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 826 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 1 0 293 0 0 0 100 3 0 0 0 107 50 104 0 0 0 0 5 0 0 0 100 4 0 0 0 17 4 42 1 0 0 0 749 0 0 0 100 5 2 0 3 271 130 68 0 1 5 0 340 0 0 0 100 6 0 0 21 14 5 10 2 0 0 0 825 0 0 0 100 7 0 0 3 210 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 2 0 0 0 17 2 12 0 0 3 0 294 0 0 0 100 3 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 16 6 40 0 0 0 0 746 0 0 0 100 5 0 0 3 253 123 46 0 0 4 0 321 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 824 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:38:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 2 0 0 0 18 2 12 1 0 3 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 13 4 36 1 0 0 0 741 0 0 0 100 5 0 0 3 254 122 48 0 0 2 0 320 0 0 0 100 6 0 0 21 21 6 26 0 1 0 0 826 0 0 0 100 7 0 0 3 210 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2106 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 11 0 6 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 1 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 16 5 8 1 0 0 0 298 0 0 0 100 5 0 0 3 258 124 84 1 2 8 0 763 0 0 0 100 6 0 0 21 14 5 12 0 0 0 0 824 0 0 0 100 7 0 0 3 213 102 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:38:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 1 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 0 0 0 0 100 5 0 0 3 255 123 78 1 0 3 0 1067 0 0 0 99 6 0 0 21 14 5 10 2 0 0 0 826 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 114 0 1 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 1 0 293 0 0 0 100 3 0 0 0 107 50 104 0 0 0 0 5 0 0 0 100 4 1 0 0 14 4 10 0 0 0 0 9 0 0 0 100 5 0 0 3 268 129 92 1 0 2 0 1077 0 1 0 99 6 0 0 21 12 5 10 0 0 0 0 825 0 0 0 100 7 0 0 3 211 102 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:38:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 1 0 0 0 0 0 100 1 0 0 0 12 0 12 0 1 0 0 0 0 0 0 100 2 0 0 0 18 2 12 1 0 3 0 294 0 0 0 100 3 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 0 0 0 0 100 5 0 0 3 258 124 80 1 1 9 0 1063 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 825 0 0 0 100 7 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 7 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 2 0 0 0 100 5 0 0 3 257 124 80 1 0 8 0 1060 0 0 0 100 6 0 0 21 15 6 14 0 0 0 0 825 0 0 0 100 7 0 0 3 210 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 102 0 0 1 0 0 0 0 0 100 1 0 0 0 13 1 4 0 0 1 0 0 0 0 0 100 2 0 0 0 25 3 22 0 1 1 0 294 0 0 0 100 3 0 0 0 108 51 100 0 0 1 0 0 0 0 0 100 4 0 0 0 13 4 4 0 0 1 0 0 0 0 0 100 5 0 0 7 254 122 78 1 0 6 0 1064 0 0 0 100 6 0 0 21 17 6 10 2 0 1 0 825 0 0 0 100 7 0 0 7 209 102 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:38:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 112 0 1 2 0 1 0 0 0 100 1 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 2 0 0 0 26 3 24 0 0 3 0 294 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 4 0 0 0 14 5 8 0 1 0 0 2 0 0 0 100 5 0 0 3 257 124 82 0 1 5 0 1063 0 0 0 100 6 0 0 21 14 6 12 0 0 0 0 825 0 0 0 100 7 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 106 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 18 2 12 1 1 2 0 294 0 0 0 100 3 0 0 0 107 50 104 0 0 0 0 5 0 0 0 100 4 0 0 0 12 3 8 0 0 0 0 7 0 0 0 100 5 1 0 3 268 130 92 1 0 1 0 1071 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 824 0 0 0 100 7 0 0 3 212 102 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 1 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 0 0 0 1 0 0 0 100 2 0 0 0 26 3 24 0 1 1 0 315 0 0 0 100 3 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 14 5 8 0 0 0 0 3 0 0 0 100 5 0 0 3 258 124 78 2 0 5 0 1061 0 0 0 99 6 0 0 21 12 5 10 0 0 0 0 825 0 0 0 100 7 0 0 3 212 103 6 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:38:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 110 0 0 0 0 9 0 0 0 100 1 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 2 0 0 0 19 2 14 0 0 6 0 294 0 0 0 100 3 0 0 0 113 50 114 1 1 0 0 18 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 0 0 0 0 100 5 0 0 3 255 123 78 1 0 7 0 1067 0 0 0 100 6 0 0 21 17 6 14 2 0 0 0 826 0 0 0 100 7 0 0 3 211 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 11 0 6 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 1 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 2 0 0 0 100 5 0 0 3 256 124 80 0 0 8 0 1063 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 825 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 18 2 12 1 0 3 0 294 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 15 3 14 0 1 0 0 0 0 0 0 100 5 0 0 3 255 123 78 1 0 6 0 1061 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 824 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 1 0 294 0 0 0 100 3 0 0 0 107 50 104 0 0 0 0 5 0 0 0 100 4 0 0 0 16 4 12 0 0 0 0 8 0 0 0 100 5 0 0 3 270 130 94 1 1 2 0 1086 0 0 0 100 6 1 0 21 17 5 20 0 1 0 0 837 0 0 0 100 7 0 0 3 209 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 4 0 294 0 0 0 100 3 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 0 0 0 0 100 5 0 0 3 254 122 72 1 0 6 0 1061 0 0 0 100 6 0 0 21 19 7 16 2 1 0 0 829 0 0 0 100 7 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 1 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 2 0 0 0 100 5 0 0 3 217 103 40 1 0 5 0 1042 0 0 0 100 6 0 0 21 58 25 62 0 1 0 0 844 0 0 0 100 7 0 0 3 210 102 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 1 0 0 0 0 0 0 100 1 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 2 0 0 0 20 3 12 1 0 3 0 294 0 0 0 100 3 0 0 0 107 51 100 0 0 1 0 0 0 0 0 100 4 0 0 0 12 4 4 0 0 1 0 0 0 0 0 100 5 0 0 3 214 103 38 0 0 13 0 1040 0 0 0 100 6 0 0 21 18 7 12 0 0 1 0 824 0 0 0 100 7 0 0 3 250 120 52 0 2 2 0 20 0 0 0 100 March 4, 2026 at 01:38:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 108 0 0 0 0 2 0 0 0 100 1 0 0 0 12 1 10 0 1 0 0 3 0 0 0 100 2 0 0 0 21 3 178 0 0 4 0 634 0 0 0 100 3 0 0 0 108 51 104 0 0 0 0 6 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 2 0 0 0 100 5 0 0 3 216 103 38 2 0 7 0 1039 0 0 0 100 6 0 0 21 16 7 14 0 0 0 0 842 0 0 0 100 7 0 0 3 248 122 42 0 0 0 0 20 0 0 0 100 March 4, 2026 at 01:38:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 116 0 1 0 0 0 0 0 0 100 1 0 0 0 11 2 6 0 0 0 0 4 0 0 0 100 2 0 0 0 17 2 12 0 0 4 0 294 0 0 0 100 3 0 0 0 110 50 109 0 0 0 0 6 0 0 0 100 4 1 0 0 14 4 10 0 0 0 0 9 0 0 0 100 5 0 0 3 218 108 38 0 0 8 0 1047 0 0 0 99 6 0 0 21 23 7 24 2 0 0 0 839 0 0 0 100 7 0 0 3 253 122 50 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:38:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 0 0 0 0 0 0 0 100 1 0 0 0 14 1 14 0 1 1 0 1 0 0 0 100 2 0 0 0 17 2 12 0 0 1 0 294 0 0 0 100 3 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 14 5 8 0 0 0 0 3 0 0 0 100 5 0 0 3 216 104 40 1 0 3 0 1039 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 825 0 0 0 100 7 0 0 3 252 123 46 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:38:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 4 0 1 0 0 2 0 0 0 100 2 0 0 0 18 2 12 1 0 4 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 0 0 0 0 100 5 0 0 3 215 103 38 1 0 11 0 1045 0 0 0 99 6 0 0 21 15 6 14 0 0 0 0 824 0 0 0 100 7 0 0 3 251 122 48 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:38:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 15 0 10 0 0 1 0 0 0 0 0 100 2 0 0 0 22 2 22 0 1 5 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 2 0 0 0 100 5 0 0 3 217 104 40 1 0 4 0 1038 0 0 0 99 6 0 0 21 14 6 12 0 0 0 0 827 0 0 0 100 7 0 0 3 248 122 42 0 0 0 0 20 0 0 0 100 March 4, 2026 at 01:38:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 19 2 14 0 0 4 0 293 0 0 0 100 3 0 0 0 110 50 110 0 1 0 0 0 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 0 0 0 0 100 5 0 0 3 215 103 38 1 0 7 0 1046 0 0 0 99 6 0 0 21 14 5 10 2 0 0 0 825 0 0 0 100 7 0 0 3 248 122 42 0 0 0 0 20 0 0 0 100 March 4, 2026 at 01:38:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 1 0 294 0 0 0 100 3 0 0 0 107 50 104 0 0 0 0 5 0 0 0 100 4 0 0 0 14 4 10 0 0 0 0 9 0 0 0 100 5 0 0 3 218 107 40 0 0 6 0 1042 0 0 0 99 6 0 0 21 20 7 22 0 0 0 0 837 0 0 0 100 7 0 0 3 251 122 46 0 0 0 0 20 0 0 0 100 March 4, 2026 at 01:38:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 18 2 12 1 0 6 0 294 0 0 0 100 3 0 0 0 108 50 104 0 0 0 0 0 0 0 0 100 4 0 0 0 15 3 14 0 1 0 0 0 0 0 0 100 5 0 0 3 217 105 38 1 0 6 0 1043 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 825 0 0 0 100 7 0 0 3 250 122 44 0 0 0 0 20 0 0 0 100 March 4, 2026 at 01:38:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 2 0 0 0 17 2 12 0 0 1 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 14 4 8 0 0 0 0 2 0 0 0 100 5 0 0 3 221 103 48 2 1 1 0 1038 0 0 0 100 6 0 0 21 17 7 16 0 0 0 0 826 0 0 0 100 7 0 0 3 250 122 46 0 0 0 0 20 0 0 0 100 March 4, 2026 at 01:38:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 102 0 0 1 0 0 0 0 0 100 1 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 2 0 0 0 20 3 12 0 0 5 0 294 0 0 0 100 3 0 0 0 108 51 100 0 0 1 0 0 0 0 0 100 4 0 0 0 13 4 4 0 0 1 0 0 0 0 0 100 5 0 0 7 216 103 40 1 1 12 0 1044 0 0 0 100 6 0 0 21 17 6 10 2 0 1 0 826 0 0 0 100 7 0 0 7 249 122 42 0 0 1 0 20 0 0 0 100 March 4, 2026 at 01:38:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 0 0 1 0 0 0 100 1 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 2 0 0 0 17 2 12 0 0 2 0 294 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 2 0 0 0 100 5 0 0 3 217 103 40 1 0 4 0 1043 0 0 0 100 6 0 0 21 17 5 20 0 1 0 0 825 0 0 0 100 7 0 0 3 248 122 42 0 0 0 0 20 0 0 0 100 March 4, 2026 at 01:38:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 0 0 0 0 100 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 14 2 6 1 0 1 0 294 0 0 0 100 3 0 0 0 29 11 24 0 0 0 0 5 0 0 0 100 4 0 0 0 95 42 93 0 2 0 0 7 0 0 0 100 5 0 0 3 220 108 40 1 0 8 0 1043 0 0 0 100 6 0 0 21 23 7 26 0 0 0 0 839 0 0 0 100 7 0 0 3 255 122 56 0 1 0 0 20 0 0 0 100 March 4, 2026 at 01:38:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 1 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 0 0 0 1 0 0 0 100 2 0 0 0 11 3 6 0 0 1 0 315 0 0 0 100 3 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 121 55 114 0 0 0 0 3 0 0 0 100 5 0 0 3 217 104 38 1 1 9 0 1036 0 0 0 100 6 0 0 21 12 5 10 0 0 0 0 825 0 0 0 100 7 0 0 3 252 123 46 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:38:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2302 100 494 0 9 50 0 0 0 1 0 99 1 0 0 0 85 1 143 0 22 57 0 40 0 0 0 100 2 567 0 6 56 3 93 0 18 48 0 387 0 0 0 100 3 1291 0 2 122 63 97 2 11 39 0 134 0 1 0 99 4 2 0 0 161 52 200 0 19 40 0 39 0 0 0 100 5 0 0 3 499 349 116 1 11 58 0 1048 0 0 0 99 6 21 0 21 139 7 254 2 15 59 0 1029 1 0 0 99 7 0 0 3 397 104 366 0 12 51 0 83 0 0 0 100 March 4, 2026 at 01:38:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 1 0 0 0 0 0 0 100 1 0 0 0 21 0 22 0 1 0 0 31 0 0 0 100 2 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 115 53 108 0 0 0 0 4 0 0 0 100 5 0 0 3 237 119 51 1 3 3 0 1045 0 0 0 100 6 0 0 21 19 7 16 0 0 0 0 837 0 0 0 100 7 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2256 100 416 0 1 4 0 0 0 0 0 100 1 0 0 0 15 2 8 0 0 0 0 11 0 0 0 100 2 0 0 0 10 2 4 1 0 0 0 294 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 109 52 104 0 0 0 0 2 0 0 0 100 5 0 0 3 475 357 48 0 0 21 0 1043 0 0 0 100 6 667 0 21 47 5 72 2 1 11 0 1073 0 0 0 99 7 0 0 3 357 102 296 0 0 9 0 0 0 0 0 100 March 4, 2026 at 01:38:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 100 148 0 0 0 0 0 0 0 0 100 1 1 0 0 23 1 26 0 0 0 0 48 0 0 0 100 2 0 0 0 14 2 14 0 1 2 0 294 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 114 53 112 0 0 0 0 12 0 0 0 100 5 0 0 3 297 183 39 2 0 19 0 1039 0 0 0 100 6 0 0 21 32 10 34 1 0 0 0 858 0 0 0 100 7 0 0 3 226 102 38 0 0 0 0 0 0 0 0 100