March 4, 2026 at 01:29:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 843 0 79 4440 138 5799 65 325 1485 21 7741 6 9 0 85 1 957 0 120 1172 21 4324 21 473 1690 26 9660 7 8 0 86 2 1038 0 207 862 18 3519 19 315 1474 15 7415 7 8 0 85 3 1434 0 91 1306 518 3468 20 510 1602 28 6934 13 7 0 80 4 788 0 102 1281 19 4186 17 448 1479 20 8909 5 9 0 86 5 722 0 29 4087 3185 3580 19 403 1668 16 7239 4 7 0 88 6 1120 0 147 1160 16 4638 27 423 1617 25 10862 11 8 0 81 7 760 0 33 2256 22 4916 31 279 1401 14 2882 2 8 0 90 March 4, 2026 at 01:29:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8955 0 61 2454 102 918 17 199 2541 81 1987 4 7 0 89 1 1991 0 10 268 1 586 15 142 1840 24 1881 8 4 0 88 2 2332 0 35 287 0 605 14 159 2340 54 1829 5 3 0 92 3 3563 0 21 558 247 933 22 195 1772 62 2868 5 4 0 91 4 6306 0 55 673 37 883 33 185 1181 103 3376 14 34 0 52 5 3809 0 32 487 17 410 21 93 558 33 3322 9 33 0 58 6 14443 0 87 501 42 921 28 180 2584 95 4417 18 13 0 69 7 7472 0 29 496 43 1148 9 206 2520 75 3172 2 5 0 93 March 4, 2026 at 01:29:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 100 96 7 3 57 3 0 0 14 0 86 1 0 0 0 21 0 14 7 4 42 6 0 0 13 0 87 2 0 0 0 32 4 13 8 5 48 1 2 0 13 0 87 3 0 0 0 122 64 289 0 58 205 0 322 0 1 0 99 4 0 0 17 262 108 164 1 53 264 3 289 0 1 0 99 5 0 0 0 24 1 9 8 2 50 1 262 0 13 0 87 6 40 0 10 233 105 15 8 3 42 0 570 0 13 0 87 7 31 0 0 121 48 134 9 6 59 0 1059 0 13 0 87 March 4, 2026 at 01:29:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2202 107 241 2 71 675 0 1 0 6 0 94 1 0 0 0 92 0 216 3 66 683 0 0 0 8 0 92 2 0 0 0 92 0 227 3 77 700 0 0 0 6 0 94 3 4 0 0 511 343 472 3 95 680 0 541 0 2 0 98 4 23 0 17 315 111 296 1 84 654 0 1649 0 2 0 98 5 0 0 0 96 1 236 4 75 615 0 0 0 6 0 94 6 0 0 10 611 118 791 3 76 681 0 259 0 6 0 94 7 0 0 0 147 17 283 2 84 630 0 0 0 6 0 94 March 4, 2026 at 01:29:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2203 102 357 0 73 631 0 7 0 2 0 98 1 0 0 0 107 0 283 0 89 718 0 12 0 1 0 99 2 0 0 0 100 1 252 0 86 517 0 2 0 1 0 99 3 0 0 0 441 335 268 0 73 624 0 294 0 2 0 98 4 0 0 17 319 107 304 0 91 597 0 1901 0 2 0 98 5 0 0 0 111 9 248 0 80 519 1 0 0 1 0 99 6 0 0 10 641 104 929 0 90 543 0 259 0 1 0 99 7 0 0 0 208 51 361 0 91 646 0 8 0 1 0 99 March 4, 2026 at 01:29:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2205 106 319 1 58 432 0 0 0 1 0 99 1 0 0 0 103 4 225 3 62 480 0 0 0 1 0 99 2 0 0 0 95 2 205 1 61 359 0 1 0 1 0 99 3 0 0 0 385 259 260 1 58 409 0 294 0 1 0 99 4 0 0 17 327 109 276 3 61 419 0 1902 0 1 0 99 5 0 0 0 112 1 244 3 65 450 0 0 0 1 0 99 6 0 0 10 540 104 693 2 63 377 0 259 0 1 0 99 7 0 0 0 151 24 293 2 75 425 0 0 0 1 0 99 March 4, 2026 at 01:29:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2847 0 0 2500 108 1027 209 140 169 12 2187 13 3 0 84 1 1133 0 0 335 30 492 55 79 73 7 1913 24 2 0 74 2 4943 0 7 362 5 715 105 116 200 8 1987 12 5 0 83 3 1696 0 1 256 3 376 50 73 176 18 1681 24 3 0 73 4 1372 0 380 440 111 476 49 81 155 7 3482 22 3 0 76 5 3034 0 4 354 5 663 134 100 166 8 1689 12 2 0 85 6 5712 0 25 632 112 918 195 136 262 11 3354 17 8 0 75 7 4357 0 0 333 6 778 148 133 142 19 2112 12 3 0 85 March 4, 2026 at 01:29:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2293 102 403 0 36 317 0 24 0 1 0 99 1 5 0 0 98 3 189 1 30 371 0 46 2 1 0 98 2 2 0 0 145 12 235 0 37 364 1 8 0 1 0 99 3 0 0 0 187 95 190 1 38 399 1 3 0 1 0 99 4 2 0 17 304 106 231 4 46 407 0 1721 2 1 0 97 5 2 0 0 116 1 223 1 50 436 0 302 0 1 0 99 6 50 0 26 315 111 198 1 37 308 1 635 0 1 0 99 7 3 0 0 183 40 248 2 23 300 0 18 0 1 0 99 March 4, 2026 at 01:29:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 108 0 1 0 0 1 0 0 0 100 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 7 0 3 220 108 42 1 0 3 0 1713 0 0 0 100 5 0 0 0 8 1 4 0 0 6 0 299 0 0 0 100 6 0 0 24 235 112 30 0 1 0 0 534 0 0 0 100 7 0 0 0 114 51 114 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:29:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 105 112 1 3 0 0 1 0 0 0 100 1 0 0 0 27 10 24 0 1 0 0 6 0 0 0 100 2 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 2 218 106 40 2 0 2 0 1710 0 0 0 100 5 0 0 0 21 9 10 0 1 3 0 310 0 0 0 100 6 0 0 25 235 112 32 0 1 0 0 537 0 0 0 100 7 0 0 3 98 39 94 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:29:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 106 106 0 4 0 0 0 0 0 0 100 1 0 0 0 29 4 24 0 4 0 0 0 0 0 0 100 2 0 0 0 89 41 84 0 1 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 2 217 107 40 0 0 3 0 1708 0 0 0 100 5 0 0 0 8 1 4 0 0 2 0 299 0 0 0 100 6 0 0 25 242 116 38 0 0 0 0 535 0 0 0 100 7 0 0 0 13 2 10 0 3 0 0 1 0 0 0 100 March 4, 2026 at 01:29:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 504 0 17 2180 101 265 7 33 18 12 371 0 1 0 99 1 48 0 0 62 1 89 4 17 11 3 305 0 0 0 99 2 133 0 5 58 4 88 2 23 16 3 344 2 0 0 98 3 75 0 0 65 1 137 6 24 15 10 400 0 0 0 100 4 320 0 5 256 107 111 3 17 12 6 2126 0 1 0 99 5 15 0 11 137 50 161 1 18 25 3 551 0 1 0 98 6 5034 0 35 284 109 138 4 21 58 5 1185 2 1 0 96 7 753 0 13 66 3 129 0 24 60 16 602 0 1 0 98 March 4, 2026 at 01:29:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 101 149 1 2 3 0 1034 0 1 0 99 1 0 0 0 11 0 4 0 1 5 0 0 0 0 0 100 2 0 0 0 13 0 10 0 1 0 0 0 0 0 0 100 3 0 0 7 13 1 6 0 1 2 0 0 0 0 0 100 4 0 0 2 220 106 8 0 0 6 0 596 0 0 0 100 5 0 0 0 112 51 106 0 0 3 0 300 0 0 0 100 6 59 0 25 227 111 20 0 0 0 0 581 0 0 0 100 7 0 0 0 18 3 8 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:29:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 119 2112 105 146 1 4 1 0 1029 0 1 0 99 1 0 0 0 53 14 32 0 2 0 0 0 0 0 0 100 2 0 0 0 25 0 4 0 1 0 0 0 0 0 0 100 3 0 0 0 29 0 12 0 2 0 0 0 0 0 0 100 4 0 0 2 237 108 12 0 0 2 0 596 0 0 0 100 5 0 0 0 97 33 74 0 2 2 0 297 0 0 0 100 6 0 0 25 241 111 20 0 0 0 0 534 0 0 0 100 7 0 0 0 26 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:29:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 101 154 1 0 2 0 1038 0 1 0 99 1 0 0 14 109 50 104 0 1 0 0 0 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 10 0 4 0 1 1 0 0 0 0 0 100 4 0 0 2 224 106 24 0 1 4 0 597 0 0 0 100 5 0 0 0 23 8 12 0 0 2 0 307 0 0 0 100 6 0 0 25 226 111 20 0 0 0 0 534 0 0 0 100 7 0 0 0 17 2 12 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:29:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 260 0 0 2874 110 1437 41 252 38 1 6910 7 3 0 90 1 125 0 0 791 16 1427 34 288 20 2 6890 6 2 0 92 2 176 0 0 695 4 1168 28 190 27 0 4990 5 2 0 93 3 118 0 0 719 31 1243 43 247 26 1 6938 6 2 0 92 4 254 0 357 772 110 1030 19 215 29 1 6037 6 2 0 92 5 122 0 0 658 8 1117 31 179 23 0 4742 5 2 0 93 6 140 0 28 821 111 1106 29 226 36 2 6512 6 2 0 92 7 86 0 0 441 4 715 17 126 30 1 4214 4 1 0 95 March 4, 2026 at 01:29:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 150 1 0 0 0 1044 0 1 0 99 1 0 0 0 17 5 10 0 1 0 0 5 0 0 0 100 2 0 0 0 104 48 100 0 2 1 0 4 0 0 0 100 3 0 0 0 16 5 12 0 0 0 0 10 0 0 0 100 4 0 0 2 219 107 12 0 0 1 0 596 0 0 0 100 5 0 0 0 13 1 14 0 1 1 0 300 0 0 0 100 6 0 0 25 215 106 12 0 0 1 0 529 0 0 0 100 7 0 0 0 9 2 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:29:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 103 285 1 29 204 0 1039 0 1 0 99 1 0 0 0 82 4 154 1 37 239 0 6 0 0 0 100 2 0 0 0 170 50 241 0 31 228 0 0 0 0 0 100 3 0 0 0 161 83 159 1 25 247 0 5 0 1 0 99 4 0 0 3 359 105 304 0 36 227 0 595 0 0 0 100 5 0 0 0 93 1 180 0 44 250 0 301 0 0 0 100 6 0 0 24 286 105 164 1 27 268 0 526 0 1 0 99 7 0 0 0 70 2 119 2 18 142 0 0 0 0 0 100 March 4, 2026 at 01:29:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 105 148 1 3 0 0 1053 0 1 0 99 1 0 0 0 42 17 38 0 1 0 0 0 0 0 0 100 2 0 0 0 73 31 64 0 1 0 0 0 0 0 0 100 3 0 0 0 13 4 8 0 0 0 0 5 0 0 0 100 4 0 0 2 217 107 10 0 0 0 0 597 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 299 0 0 0 100 6 0 0 25 212 105 8 0 0 0 0 526 0 0 0 100 7 0 0 0 9 2 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:29:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 158 1 0 0 0 1064 0 1 0 99 1 0 0 0 118 56 114 0 0 0 0 10 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 18 6 12 0 0 0 0 322 0 0 0 100 4 0 0 2 214 105 8 0 0 2 0 593 0 0 0 100 5 0 0 0 20 7 12 0 0 1 0 309 0 0 0 100 6 0 0 25 214 105 10 1 0 0 0 527 0 0 0 100 7 0 0 0 19 2 24 0 2 0 0 7 0 0 0 100 March 4, 2026 at 01:29:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 154 1 1 0 0 1051 0 1 0 99 1 0 0 0 117 56 112 0 0 0 0 26 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 2 215 106 8 0 0 5 0 597 0 0 0 100 5 0 0 0 8 1 6 0 1 2 0 301 0 0 0 100 6 0 0 25 216 107 12 1 0 0 0 527 0 0 0 100 7 0 0 0 14 3 8 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:29:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 152 1 1 0 0 1087 0 1 0 99 1 28 0 0 41 16 37 0 1 0 0 28 0 0 0 100 2 0 0 0 95 43 92 0 2 1 0 5 0 0 0 100 3 0 0 0 13 2 12 0 0 0 0 11 0 0 0 100 4 0 0 2 213 105 6 0 0 2 0 594 0 0 0 100 5 0 0 0 8 1 6 0 1 4 0 301 0 0 0 100 6 0 0 25 213 105 10 0 0 1 0 529 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 18 0 0 0 100 March 4, 2026 at 01:29:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 110 78 1 4 0 0 1050 0 1 0 99 1 0 0 0 92 14 90 0 9 2 0 0 0 0 0 100 2 0 0 0 75 21 72 0 6 3 0 0 0 0 0 100 3 0 0 0 28 9 24 0 3 0 0 5 0 0 0 100 4 0 0 2 239 109 34 0 4 2 0 595 0 0 0 100 5 0 0 0 8 1 4 0 0 7 0 302 0 0 0 100 6 0 0 25 214 105 10 0 0 1 0 526 0 0 0 100 7 0 0 0 14 3 8 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:29:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 111 134 1 2 0 0 1050 0 1 0 99 1 0 0 0 19 5 18 0 1 0 0 8 0 0 0 100 2 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 3 0 0 0 17 5 12 0 1 0 0 325 0 0 0 100 4 0 0 2 239 106 28 0 0 5 0 595 0 0 0 100 5 0 0 0 91 41 90 0 1 2 0 305 0 0 0 100 6 0 0 25 213 105 8 1 0 0 0 526 0 0 0 100 7 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:29:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 156 2 0 0 0 1065 0 1 0 99 1 0 0 0 19 7 14 0 0 0 0 8 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 4 0 0 3 216 106 10 0 0 2 0 595 0 0 0 100 5 0 0 0 119 57 112 0 0 4 0 305 0 0 0 100 6 8 0 24 214 106 10 1 0 0 0 554 0 0 0 100 7 0 0 0 21 1 20 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:29:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 610 0 0 2144 104 171 3 10 6 6 1942 1 1 0 98 1 14 0 0 135 48 133 0 6 5 4 136 0 0 0 100 2 1832 0 0 41 1 37 2 6 6 3 322 0 1 0 99 3 970 0 113 38 3 77 0 10 10 14 208 0 0 0 99 4 123 0 3 256 105 82 0 13 16 19 705 0 0 0 100 5 27 0 2 65 10 62 0 10 11 6 453 0 0 0 100 6 6 0 24 241 105 41 0 8 4 5 664 0 0 0 100 7 27 0 0 42 3 29 0 5 4 4 24 0 0 0 100 March 4, 2026 at 01:29:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 138 1 0 0 0 1132 0 1 0 99 1 0 0 0 121 57 118 0 0 0 0 14 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 9 0 6 0 2 0 0 15 0 0 0 100 4 0 0 2 224 107 22 1 2 5 0 600 0 0 0 100 5 0 0 0 10 2 8 0 1 3 0 301 0 0 0 100 6 0 0 25 219 107 18 0 1 1 0 533 0 0 0 100 7 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:29:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 109 144 1 4 1 0 1129 0 1 0 99 1 0 0 0 39 14 32 0 1 3 0 321 0 0 0 100 2 0 0 0 94 36 91 0 4 2 0 0 0 0 0 100 3 0 0 0 15 3 14 0 1 0 0 10 0 0 0 100 4 0 0 2 213 105 6 0 0 0 0 594 0 0 0 100 5 0 0 0 8 1 6 0 1 0 0 300 0 0 0 100 6 0 0 25 216 106 12 1 1 1 0 527 0 0 0 100 7 0 0 0 15 1 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:29:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 104 50 2 1 0 0 1131 0 1 0 99 1 0 0 0 95 5 88 0 3 0 0 0 0 0 0 100 2 0 0 0 97 40 96 0 4 0 0 0 0 0 0 100 3 0 0 0 24 9 20 0 1 0 0 5 0 0 0 100 4 0 0 2 219 107 12 0 0 3 0 597 0 0 0 100 5 0 0 0 14 1 14 0 1 0 0 301 0 0 0 100 6 10 0 25 223 106 18 1 1 0 0 571 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:29:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 103 49 1 1 0 0 1138 0 1 0 99 1 0 0 0 12 3 6 0 0 0 0 4 0 0 0 100 2 0 0 0 106 16 102 0 1 0 0 1 0 0 0 100 3 0 0 0 113 38 108 0 2 0 0 5 0 0 0 100 4 0 0 2 214 105 8 0 0 1 0 594 0 0 0 100 5 0 0 0 17 6 12 0 1 1 0 305 0 0 0 100 6 1 0 25 226 105 30 0 1 0 0 526 0 0 0 100 7 0 0 0 17 2 17 0 1 0 0 12 0 0 0 100 March 4, 2026 at 01:29:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 80 1 3 0 0 1129 0 1 0 99 1 0 0 0 70 12 66 0 4 0 0 1 0 0 0 100 2 0 0 0 66 23 59 0 3 0 0 0 0 0 0 100 3 0 0 0 29 5 22 0 1 0 0 5 0 0 0 100 4 0 0 2 250 122 42 0 1 2 0 595 0 0 0 100 5 0 0 0 9 1 4 0 0 2 0 299 0 0 0 100 6 0 0 25 220 107 14 0 0 0 0 528 0 0 0 100 7 0 0 0 11 3 8 0 2 0 0 1 0 0 0 100 March 4, 2026 at 01:29:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2255 109 376 16 50 4 0 2940 1 1 0 98 1 31 0 0 213 8 295 8 50 2 0 987 1 0 0 98 2 296 0 0 203 43 321 10 42 2 0 1812 2 1 0 98 3 68 0 0 101 7 295 4 40 0 0 1518 1 0 0 98 4 36 0 101 320 106 385 7 51 4 0 2519 1 1 0 98 5 222 0 0 64 2 102 4 22 5 1 1680 2 1 0 97 6 300 0 24 312 107 276 5 41 5 0 2513 1 1 0 98 7 163 0 0 132 2 317 6 32 5 2 1608 2 1 0 97 March 4, 2026 at 01:29:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 102 209 1 25 148 0 1131 0 1 0 99 1 0 0 0 84 10 130 0 29 151 0 0 0 0 0 100 2 0 0 0 73 2 120 0 19 112 0 0 0 0 0 100 3 0 0 0 172 66 163 0 29 139 0 0 0 0 0 100 4 0 0 3 332 137 183 0 23 153 0 596 0 0 0 100 5 0 0 0 132 8 239 0 17 119 0 305 0 0 0 100 6 1 0 24 274 111 124 1 19 142 0 537 0 0 0 99 7 0 0 0 71 3 115 0 10 143 0 2 0 0 0 100 March 4, 2026 at 01:29:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 136 1 0 0 0 1131 0 1 0 99 1 0 0 0 16 4 10 0 0 0 0 3 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 6 0 4 0 1 0 0 1 0 0 0 100 4 0 0 2 213 105 6 0 0 2 0 594 0 0 0 100 5 0 0 0 111 51 106 0 0 1 0 299 0 0 0 100 6 0 0 25 224 111 20 0 0 0 0 534 0 0 0 100 7 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:29:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 148 1 1 0 0 1142 0 1 0 99 1 0 0 0 15 2 16 0 2 0 0 5 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 2 216 106 10 0 0 5 0 596 0 0 0 100 5 0 0 0 115 56 110 0 1 7 0 305 0 0 0 100 6 0 0 25 224 111 20 0 0 0 0 535 0 0 0 100 7 0 0 0 24 3 22 0 0 0 0 4 0 0 0 100 March 4, 2026 at 01:29:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 101 156 1 2 12 1 1230 0 1 0 99 1 1 0 14 24 4 30 0 10 15 0 33 0 0 0 100 2 0 0 0 25 2 26 0 7 10 1 82 0 0 0 100 3 0 0 8 22 1 18 0 2 5 0 15 0 1 0 99 4 0 0 7 230 105 31 1 4 10 0 612 0 0 0 100 5 0 0 0 127 52 119 0 4 4 0 313 0 0 0 100 6 1 0 28 239 113 35 1 4 10 0 558 0 0 0 100 7 0 0 0 24 2 12 0 0 4 0 0 0 0 0 100 March 4, 2026 at 01:29:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 141 1 3 0 0 1045 0 1 0 99 1 0 0 7 46 18 47 0 4 0 0 3 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 216 106 10 0 0 1 0 595 0 0 0 100 5 0 0 0 78 34 70 0 1 2 0 303 0 0 0 100 6 0 0 24 237 115 30 1 0 0 0 543 0 0 0 100 7 0 0 0 18 1 12 1 0 0 0 3 0 0 0 100 March 4, 2026 at 01:29:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 101 136 1 0 0 0 1041 0 1 0 99 1 0 0 112 114 52 111 0 0 1 0 0 0 0 0 100 2 0 0 0 28 1 8 0 1 0 0 0 0 0 0 100 3 0 0 0 30 0 16 0 2 1 0 0 0 0 0 100 4 0 0 3 232 106 10 0 0 6 0 598 0 0 0 100 5 0 0 0 25 1 6 0 0 7 0 290 0 0 0 100 6 0 0 24 240 111 20 0 0 0 0 536 0 0 0 100 7 0 0 0 31 1 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:29:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 112 140 1 3 0 0 1042 0 1 0 99 1 0 0 7 56 13 48 0 2 0 0 0 0 0 0 100 2 0 0 0 65 29 60 0 1 0 0 0 0 0 0 100 3 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 4 0 0 2 226 108 24 0 1 1 0 598 0 0 0 100 5 0 0 0 10 1 6 0 0 1 0 300 0 0 0 100 6 0 0 25 225 111 20 0 0 0 0 535 0 0 0 100 7 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:29:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 45 0 0 2841 111 1348 37 263 38 0 6897 6 3 0 91 1 31 0 0 697 20 1209 36 254 43 0 6863 6 2 0 92 2 32 0 0 676 10 1146 31 217 36 0 5748 6 2 0 92 3 28 0 0 648 13 1187 38 246 58 0 7739 7 2 0 91 4 31 0 338 787 109 1119 40 247 56 0 6513 5 2 0 92 5 22 0 0 622 9 1002 17 162 34 0 4915 5 2 0 93 6 27 0 25 846 112 1150 37 237 25 0 6326 5 2 0 93 7 17 0 0 488 2 779 9 136 31 0 3907 4 1 0 95 March 4, 2026 at 01:29:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 144 0 1 0 0 1062 0 1 0 99 1 0 0 0 112 53 106 0 0 0 0 21 0 0 0 100 2 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 221 106 12 0 0 4 0 596 0 0 0 100 5 0 0 0 13 1 14 0 1 1 0 298 0 0 0 100 6 1 0 24 230 113 24 1 0 0 0 536 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:29:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 109 147 2 3 0 0 1050 0 1 0 99 1 0 0 0 107 44 102 0 5 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 3 0 0 0 100 4 0 0 2 215 106 8 0 0 1 0 595 0 0 0 100 5 0 0 0 10 1 6 0 1 2 0 303 0 0 0 100 6 0 0 25 238 114 38 0 1 0 0 540 0 0 0 100 7 0 0 0 10 1 4 1 1 0 0 3 0 0 0 100 March 4, 2026 at 01:29:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 101 264 1 28 174 0 1051 0 1 0 99 1 0 0 0 177 37 260 0 45 211 0 0 0 0 0 100 2 0 0 0 117 13 199 0 31 251 0 0 0 0 0 100 3 0 0 0 219 121 190 0 29 277 0 1 0 1 0 99 4 0 0 2 306 106 202 1 26 290 0 596 0 0 0 99 5 0 0 0 199 1 390 0 29 249 0 300 0 0 0 99 6 0 0 25 327 111 230 0 38 250 0 535 0 0 0 99 7 0 0 0 92 2 177 0 27 207 0 1 0 0 0 100 March 4, 2026 at 01:29:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 49 0 0 2147 102 111 0 13 6 3 1102 0 1 0 99 1 9 0 0 48 1 43 0 10 8 2 88 0 0 0 100 2 7 0 0 101 16 90 0 10 2 4 57 0 0 0 100 3 906 0 113 121 36 145 0 19 16 11 145 0 0 0 99 4 101 0 3 273 111 101 0 10 21 15 755 0 0 0 100 5 44 0 1 53 2 76 0 12 20 7 467 0 0 0 100 6 20 0 24 269 111 82 1 14 10 4 985 0 0 0 99 7 2431 0 0 52 1 71 3 11 9 9 1172 2 1 0 98 March 4, 2026 at 01:29:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2133 111 166 3 6 0 0 1162 0 1 0 99 1 0 0 0 18 1 14 0 0 0 0 7 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 59 21 52 0 4 0 0 0 0 0 0 100 4 0 0 3 230 110 22 0 2 1 0 596 0 0 0 100 5 0 0 0 61 30 52 0 1 1 0 302 0 0 0 100 6 0 0 24 215 105 12 1 0 0 0 531 0 0 0 100 7 0 0 0 13 1 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:29:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 439 0 0 2166 104 256 7 33 7 1 2147 2 1 0 96 1 57 0 0 137 17 323 4 39 6 0 1600 1 0 0 99 2 164 0 0 64 6 138 2 23 3 0 1349 2 1 0 98 3 205 0 0 82 6 230 9 34 2 0 1911 2 1 0 97 4 6 0 91 284 108 189 9 35 16 0 1856 1 0 0 98 5 231 0 0 148 29 259 10 35 7 1 1994 2 1 0 98 6 10 0 28 284 106 217 5 39 2 0 2005 1 0 0 99 7 19 0 0 78 2 277 11 29 8 0 1480 1 0 0 99 March 4, 2026 at 01:29:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 110 155 2 0 0 0 1147 0 1 0 99 1 0 0 0 119 51 118 0 2 1 0 3 0 0 0 100 2 0 0 0 12 3 10 0 2 0 0 3 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 4 0 0 2 215 106 8 0 0 4 0 596 0 0 0 100 5 0 0 0 10 3 4 0 0 9 0 301 0 0 0 100 6 0 0 25 214 106 10 0 0 0 0 527 0 0 0 100 7 0 0 0 13 1 10 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:29:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2199 131 258 1 25 147 0 1132 0 1 0 98 1 0 0 0 164 12 216 0 28 170 0 19 0 0 0 100 2 0 0 7 112 16 186 0 28 158 0 20 0 1 0 99 3 0 0 0 164 80 153 0 22 152 0 28 0 0 0 100 4 0 0 3 285 108 141 0 29 140 0 629 0 0 0 99 5 0 0 0 150 3 281 0 20 111 2 447 0 0 0 99 6 0 0 24 284 105 150 1 26 181 0 533 0 0 0 100 7 0 0 8 75 1 144 0 24 166 0 25 0 0 0 100 March 4, 2026 at 01:29:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 145 0 1 0 0 1045 0 1 0 99 1 0 0 0 17 1 8 0 1 0 0 0 0 0 0 100 2 0 0 0 110 51 106 0 1 0 0 0 0 0 0 100 3 0 0 7 6 0 2 0 1 0 0 0 0 0 0 100 4 0 0 2 230 113 22 0 0 2 0 606 0 0 0 100 5 0 0 0 9 1 4 0 0 2 0 297 0 0 0 100 6 0 0 25 214 105 8 1 0 0 0 526 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:29:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2122 110 163 2 3 0 0 1055 0 1 0 99 1 0 0 0 49 12 30 0 1 0 0 7 0 0 0 100 2 0 0 0 100 33 76 0 2 0 0 0 0 0 0 100 3 0 0 0 28 0 12 0 1 0 0 0 0 0 0 100 4 0 0 3 243 111 24 0 2 11 0 604 0 0 0 100 5 0 0 0 32 6 6 0 1 8 0 309 0 0 0 100 6 3 0 24 231 105 12 0 0 0 0 530 0 0 0 100 7 0 0 0 30 3 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:29:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2126 119 147 1 11 0 0 1040 0 1 0 99 1 0 0 0 84 22 74 0 11 0 0 0 0 0 0 100 2 0 0 0 34 12 26 0 1 0 0 0 0 0 0 100 3 0 0 0 8 0 4 0 2 0 0 0 0 0 0 100 4 0 0 2 241 115 36 1 1 3 0 609 0 0 0 100 5 0 0 0 9 1 4 0 0 11 0 299 0 0 0 100 6 0 0 25 220 107 14 0 1 0 0 531 0 0 0 100 7 0 0 0 12 3 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:30:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 7 2829 109 1412 32 250 25 0 6653 6 3 0 91 1 20 0 0 726 27 1292 39 270 22 0 7016 7 2 0 91 2 33 0 0 643 9 1115 21 198 43 0 5512 5 2 0 93 3 26 0 0 600 0 1105 31 245 43 0 7386 6 2 0 92 4 1 0 339 744 116 1040 22 240 15 0 6658 5 2 0 93 5 8 0 0 573 8 955 11 158 15 0 4818 4 2 0 95 6 11 0 3 745 104 965 23 208 43 0 5744 5 2 0 93 7 59 0 14 544 7 912 9 144 42 0 4166 5 1 0 93 March 4, 2026 at 01:30:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2180 104 288 1 26 232 0 1301 0 1 0 99 1 0 0 0 175 52 247 0 35 279 0 0 0 0 0 100 2 0 0 0 82 6 149 0 24 228 0 6 0 0 0 100 3 0 0 0 162 93 128 0 31 238 0 0 0 0 0 100 4 0 0 3 290 106 165 0 27 246 0 596 0 0 0 99 5 0 0 0 80 1 154 0 28 230 0 302 0 1 0 99 6 0 0 3 272 103 138 0 23 173 0 0 0 0 0 100 7 0 0 14 159 3 311 1 24 164 0 277 0 0 0 100 March 4, 2026 at 01:30:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 108 148 1 3 0 0 1300 0 1 0 99 1 0 0 0 111 47 104 0 4 0 0 0 0 0 0 100 2 0 0 0 15 5 10 0 0 0 0 5 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 2 214 105 8 0 0 2 0 593 0 0 0 100 5 0 0 0 11 1 6 0 1 1 0 300 0 0 0 100 6 0 0 4 216 103 14 0 1 0 0 5 0 0 0 100 7 0 0 14 8 2 8 0 1 0 0 276 0 0 0 100 March 4, 2026 at 01:30:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2126 112 156 1 9 0 0 1304 0 1 0 99 1 0 0 0 91 36 84 0 5 0 0 5 0 0 0 100 2 0 0 0 28 10 22 0 3 0 0 5 0 0 0 100 3 0 0 0 15 4 10 0 1 0 0 0 0 0 0 100 4 0 0 3 216 106 10 0 0 0 0 597 0 0 0 100 5 0 0 0 15 6 8 0 2 0 0 297 0 0 0 100 6 0 0 3 211 102 6 0 0 0 0 6 0 0 0 100 7 0 0 14 12 2 14 0 2 0 0 284 0 0 0 100 March 4, 2026 at 01:30:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 111 138 2 14 1 0 1305 0 1 0 99 1 5 0 0 39 15 30 0 1 1 0 1 0 0 0 100 2 0 0 0 31 11 20 1 0 1 0 327 0 0 0 100 3 0 0 0 18 4 8 0 2 1 0 0 0 0 0 100 4 0 0 7 230 107 24 0 4 1 0 598 0 0 0 100 5 0 0 0 28 7 20 0 3 3 0 310 0 0 0 100 6 0 0 7 276 124 66 0 6 1 0 5 0 0 0 100 7 0 0 14 11 3 4 0 0 1 0 266 0 0 0 100 March 4, 2026 at 01:30:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 146 1 0 0 0 1300 0 1 0 99 1 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 4 0 0 3 228 112 18 0 0 3 0 604 0 0 0 100 5 0 0 0 12 2 14 0 3 1 0 304 0 0 0 100 6 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 7 0 0 14 16 3 18 1 1 0 0 277 0 0 0 100 March 4, 2026 at 01:30:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 103 66 1 2 0 0 1301 0 1 0 99 1 0 0 0 112 43 108 0 5 1 0 0 0 0 0 100 2 0 0 0 89 10 86 0 4 0 0 2 0 0 0 100 3 0 0 0 8 1 6 0 1 0 0 0 0 0 0 100 4 0 0 3 216 105 13 0 2 5 0 594 0 0 0 100 5 0 0 0 17 5 14 0 0 5 0 310 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 7 0 0 14 9 2 6 0 0 0 0 285 0 0 0 100 March 4, 2026 at 01:30:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2127 108 102 0 3 0 0 1309 0 1 0 99 1 0 0 0 83 35 78 0 2 0 0 0 0 0 0 100 2 0 0 0 107 18 100 0 1 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 217 107 10 0 0 8 0 598 0 0 0 100 5 0 0 0 11 1 4 0 0 6 0 302 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 14 11 2 10 0 0 0 0 286 0 0 0 100 March 4, 2026 at 01:30:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 109 164 3 1 0 0 1632 0 1 0 99 1 0 0 0 26 2 30 0 2 0 0 10 0 0 0 100 2 0 0 0 109 51 108 0 1 0 0 2 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 2 214 105 8 0 0 1 0 593 0 0 0 100 5 0 0 0 16 7 4 0 0 1 0 300 0 0 0 100 6 0 0 4 213 103 8 0 0 0 0 7 0 0 0 100 7 0 0 14 16 4 17 1 0 0 0 282 0 0 0 100 March 4, 2026 at 01:30:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2118 108 146 2 3 0 0 1303 0 1 0 99 1 0 0 0 20 3 16 0 0 0 0 22 0 0 0 100 2 0 0 0 93 42 86 1 2 0 0 11 0 0 0 100 3 0 0 0 36 15 34 0 2 0 0 0 0 0 0 100 4 0 0 3 216 106 10 0 0 3 0 599 0 0 0 100 5 0 0 0 11 1 6 0 0 4 0 298 0 0 0 100 6 0 0 3 217 105 8 0 0 0 0 5 0 0 0 100 7 0 0 14 10 3 8 1 0 0 0 277 0 0 0 100 March 4, 2026 at 01:30:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35 0 0 2154 108 189 1 10 8 10 1116 0 1 0 99 1 13 0 0 51 2 43 0 8 3 3 85 0 0 0 100 2 904 0 114 43 7 75 0 12 7 8 167 0 0 0 99 3 87 0 7 144 44 169 0 18 6 14 484 0 0 0 100 4 66 0 4 253 107 65 0 10 15 8 696 0 0 0 100 5 75 0 0 41 1 44 0 8 16 2 423 0 0 0 100 6 608 0 3 237 103 27 2 4 3 4 905 1 0 0 98 7 1822 0 14 33 2 29 2 4 4 4 578 0 0 0 99 March 4, 2026 at 01:30:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 90 1 7 0 0 1133 0 1 0 99 1 0 0 0 45 14 40 0 1 1 0 0 0 0 0 100 2 0 0 0 18 5 12 1 1 0 0 5 0 0 0 100 3 0 0 7 86 11 85 0 4 0 0 260 0 0 0 100 4 0 0 3 276 130 70 0 3 7 0 596 0 0 0 100 5 0 0 0 11 3 6 0 1 6 0 300 0 0 0 100 6 0 0 3 208 101 2 0 1 0 0 0 0 0 0 100 7 1 0 14 11 3 10 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:30:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 112 143 1 3 0 0 1131 0 1 0 99 1 0 0 0 64 13 58 0 3 0 0 5 0 0 0 100 2 0 0 0 78 35 74 0 1 0 0 326 0 0 0 100 3 0 0 7 8 2 4 1 0 0 0 260 0 0 0 100 4 0 0 3 213 105 6 0 0 3 0 594 0 0 0 100 5 0 0 0 8 1 4 0 0 2 0 294 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 7 2 6 1 1 0 0 266 0 0 0 100 March 4, 2026 at 01:30:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 118 158 0 4 0 0 1131 0 1 0 99 1 0 0 0 54 10 52 0 4 0 0 18 0 0 0 100 2 0 0 0 74 33 68 0 2 0 0 0 0 0 0 100 3 0 0 7 11 2 6 0 0 0 0 260 0 0 0 100 4 0 0 2 221 106 20 0 1 0 0 596 0 0 0 100 5 0 0 0 15 6 4 0 0 2 0 292 0 0 0 100 6 0 0 4 212 101 10 0 0 0 0 13 0 0 0 100 7 0 0 14 10 2 8 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:30:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 112 152 2 3 1 0 1130 0 1 0 99 1 0 0 0 55 17 46 0 4 1 0 11 0 0 0 100 2 0 0 0 78 36 74 0 2 0 0 1 0 0 0 100 3 0 0 7 10 3 4 0 0 1 0 260 0 0 0 100 4 0 0 3 215 105 8 0 0 3 0 594 0 0 0 100 5 0 0 0 15 2 14 0 1 3 0 315 0 0 0 100 6 0 0 3 208 101 2 0 1 1 0 3 0 0 0 100 7 0 0 14 9 3 4 0 0 1 0 266 0 0 0 100 March 4, 2026 at 01:30:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 116 1 1 0 0 1128 0 1 0 99 1 0 0 0 18 2 14 0 0 0 0 10 0 0 0 100 2 0 0 0 108 36 104 0 3 0 0 0 0 0 0 100 3 0 0 7 40 17 38 0 2 0 0 260 0 0 0 100 4 0 0 3 217 107 10 0 0 1 0 597 0 0 0 100 5 0 0 0 9 1 6 0 0 2 0 294 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:30:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 138 0 2 2211 107 233 8 32 134 0 1976 2 1 0 97 1 3 0 0 178 20 373 9 65 157 0 1659 1 1 0 98 2 106 0 0 183 1 321 16 52 97 0 1680 1 1 0 98 3 140 0 0 202 93 186 4 31 88 0 1219 2 1 0 97 4 0 0 80 339 106 362 9 57 120 0 2729 1 1 0 98 5 432 0 0 124 2 457 6 41 152 0 2629 2 1 0 97 6 10 0 3 373 104 468 17 72 139 0 1809 1 1 0 98 7 7 0 14 176 2 444 7 56 120 0 1953 1 1 0 98 March 4, 2026 at 01:30:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 107 108 1 3 0 0 1144 0 1 0 99 1 0 0 0 94 25 86 0 4 0 0 3 0 0 0 100 2 0 0 0 87 28 78 0 4 0 0 6 0 0 0 100 3 0 0 0 11 1 6 0 1 7 0 20 0 0 0 100 4 0 0 24 222 109 18 0 1 1 0 858 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 318 0 0 0 100 6 0 0 3 216 102 8 0 2 0 0 24 0 0 0 100 7 1 0 14 15 2 16 0 2 1 0 286 0 0 0 100 March 4, 2026 at 01:30:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 114 156 1 5 0 0 1141 0 1 0 99 1 0 0 0 34 4 32 0 4 0 0 10 0 0 0 100 2 0 0 0 92 41 84 0 2 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 10 217 107 12 0 0 1 0 854 0 0 0 100 5 0 0 0 13 6 4 0 0 3 0 305 0 0 0 100 6 0 0 3 224 107 22 0 0 0 0 41 0 0 0 100 7 0 0 14 10 2 8 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:30:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 120 164 1 6 0 0 1141 0 1 0 99 1 0 0 0 48 9 42 0 3 0 0 0 0 0 0 100 2 0 0 0 78 32 68 0 3 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 9 218 108 12 0 0 3 0 855 0 0 0 100 5 0 0 0 10 1 6 0 0 7 0 296 0 0 0 100 6 0 0 4 211 103 4 0 0 0 0 2 0 0 0 100 7 0 0 14 12 3 12 0 1 0 0 270 0 0 0 100 March 4, 2026 at 01:30:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2150 122 174 0 10 6 1 1234 0 2 0 98 1 0 0 21 131 38 141 0 16 6 0 27 0 0 0 100 2 0 0 0 23 1 31 0 9 15 0 31 0 0 0 100 3 0 0 0 18 1 12 0 3 4 0 16 0 0 0 100 4 0 0 10 228 108 25 1 2 10 0 922 0 0 0 100 5 0 0 0 22 1 24 0 5 12 0 326 0 0 0 100 6 2 0 3 217 101 12 0 3 9 0 14 0 0 0 100 7 0 0 14 15 2 11 1 2 4 0 281 0 0 0 100 March 4, 2026 at 01:30:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 103 236 1 19 75 0 1043 0 1 0 99 1 0 0 0 74 3 116 0 18 106 0 0 0 0 0 100 2 0 0 7 86 16 124 0 17 88 0 0 0 0 0 100 3 0 0 0 205 110 178 0 20 76 0 12 0 0 0 99 4 0 0 10 273 108 120 0 17 95 0 860 0 0 0 99 5 0 0 0 58 1 102 0 11 77 0 300 0 0 0 100 6 0 0 3 251 101 88 0 18 71 0 0 0 0 0 100 7 0 0 14 119 3 226 0 16 77 0 267 0 0 0 100 March 4, 2026 at 01:30:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2131 123 139 1 9 0 0 1041 0 1 0 99 1 0 0 0 60 11 34 0 5 0 0 0 0 0 0 100 2 0 0 0 99 17 84 0 4 0 0 0 0 0 0 100 3 0 0 0 36 6 14 0 2 0 0 8 0 0 0 100 4 0 0 10 242 109 18 0 3 3 0 854 0 0 0 100 5 0 0 0 28 3 8 0 0 4 0 304 0 0 0 100 6 0 0 3 225 102 2 0 0 0 0 1 0 0 0 100 7 0 0 14 23 2 6 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:30:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 104 90 1 4 0 0 1047 0 1 0 99 1 0 0 0 118 32 114 0 4 0 0 7 0 0 0 100 2 0 0 0 68 18 60 0 4 0 0 0 0 0 0 100 3 0 0 0 25 6 22 0 1 0 0 6 0 0 0 100 4 0 0 10 220 108 14 0 0 3 0 856 0 0 0 100 5 0 0 0 16 6 4 0 0 0 0 298 0 0 0 100 6 0 0 3 217 103 14 0 0 0 0 15 0 0 0 100 7 0 0 14 12 2 8 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:30:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 2536 102 861 16 128 46 0 4376 4 2 0 94 1 14 0 0 509 47 882 21 163 42 0 4349 4 1 0 94 2 0 0 0 343 4 544 11 113 37 0 3970 4 1 0 95 3 17 0 0 393 8 704 18 149 12 0 4550 3 1 0 95 4 20 0 234 583 109 748 12 146 57 0 4479 4 1 0 95 5 0 0 0 386 6 662 10 111 32 0 3103 4 1 0 95 6 0 0 3 617 101 712 15 145 31 0 3708 3 1 0 96 7 1 0 14 444 5 791 19 97 20 0 2982 4 1 0 95 March 4, 2026 at 01:30:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2384 104 562 12 74 12 0 2826 3 2 0 96 1 9 0 0 409 48 627 22 97 24 0 2588 2 1 0 97 2 1 0 0 239 3 392 10 69 9 0 2289 2 1 0 97 3 1 0 0 297 8 534 21 95 16 0 2724 3 1 0 96 4 1 0 150 455 113 465 16 87 18 0 3426 2 1 0 97 5 1 0 0 197 2 321 8 58 34 0 1643 2 0 0 98 6 0 0 3 430 103 397 13 79 29 0 2531 2 1 0 98 7 7 0 14 179 4 273 5 51 10 0 1729 1 0 0 98 March 4, 2026 at 01:30:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 928 0 295 2237 105 401 2 37 172 12 1169 0 2 0 98 1 1899 0 0 238 48 318 3 54 283 9 415 0 1 0 98 2 434 0 1 142 8 161 3 31 161 9 201 1 1 0 98 3 28 0 0 224 81 250 0 40 249 7 170 0 1 0 99 4 220 0 10 342 107 193 3 40 182 10 1731 0 1 0 99 5 7 0 0 120 0 145 0 26 281 3 80 0 1 0 99 6 8 0 3 341 104 196 0 34 242 3 390 0 1 0 99 7 46 0 14 132 2 171 0 29 188 0 345 0 0 0 99 March 4, 2026 at 01:30:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 42 1 0 0 0 1133 0 1 0 99 1 0 0 0 121 31 118 0 9 0 0 20 0 0 0 100 2 0 0 0 101 18 96 0 9 0 0 3 0 0 0 100 3 0 0 0 29 10 24 1 2 0 0 8 0 0 0 100 4 0 0 10 220 109 14 0 0 3 0 856 0 0 0 100 5 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 2 0 298 0 0 0 100 7 0 0 14 10 2 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:30:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 42 1 0 0 0 1128 0 1 0 99 1 0 0 0 123 36 120 1 4 0 0 17 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 115 20 110 0 6 0 0 5 0 0 0 100 4 0 0 10 217 107 12 1 0 2 0 853 0 0 0 100 5 0 0 0 15 6 4 0 1 0 0 0 0 0 0 100 6 0 0 3 222 104 24 0 1 3 0 315 0 0 0 100 7 0 0 14 10 2 8 1 1 2 0 266 0 0 0 100 March 4, 2026 at 01:30:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 115 118 1 5 0 0 1125 0 1 0 99 1 0 0 0 75 16 68 0 7 0 0 36 0 0 0 100 2 0 0 0 64 27 62 0 2 0 0 7 0 0 0 100 3 0 0 0 35 4 28 0 1 0 0 324 0 0 0 100 4 0 0 10 218 108 12 0 0 1 0 857 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 3 215 104 8 0 0 5 0 295 0 0 0 100 7 0 0 14 14 3 16 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:30:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 253 0 0 2177 102 363 7 40 4 2 2654 1 1 0 98 1 47 0 0 107 7 194 5 40 2 1 1596 1 0 0 99 2 0 0 0 166 52 228 6 28 0 0 1489 1 0 0 99 3 3 0 0 66 1 169 4 39 4 0 1416 1 0 0 99 4 0 0 80 273 109 131 3 33 2 0 2152 1 0 0 98 5 145 0 0 67 0 126 4 31 6 0 1844 2 0 0 97 6 377 0 3 309 103 223 6 41 4 1 2399 1 1 0 98 7 216 0 14 37 2 42 7 8 7 2 1295 3 0 0 96 March 4, 2026 at 01:30:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2286 101 495 1 27 128 0 1140 0 2 0 98 1 0 0 0 213 52 310 0 39 183 0 13 0 1 0 99 2 0 0 0 83 0 153 0 21 172 0 1 0 0 0 100 3 0 0 0 214 117 186 1 33 175 0 9 0 1 0 99 4 0 0 23 297 112 162 1 37 147 0 867 0 1 0 99 5 0 0 0 78 2 141 0 27 163 0 11 0 1 0 99 6 0 0 4 299 107 167 2 26 163 0 311 0 1 0 99 7 5 0 14 81 5 130 0 18 138 0 273 0 0 0 100 March 4, 2026 at 01:30:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 113 149 1 7 3 0 1130 0 1 0 99 1 0 0 0 90 24 96 0 6 10 0 0 0 0 0 100 2 0 0 0 51 17 46 0 4 2 0 0 0 0 0 100 3 0 0 0 25 15 10 0 3 3 0 0 0 0 0 100 4 0 0 10 223 107 24 1 1 7 0 855 0 0 0 100 5 0 0 0 9 0 10 0 1 4 0 0 0 0 0 100 6 0 0 3 238 108 48 0 1 11 0 303 0 0 0 100 7 0 0 14 12 2 15 1 2 5 0 266 0 0 0 100 March 4, 2026 at 01:30:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 8 2135 115 161 1 15 13 0 1061 0 1 0 99 1 1 0 0 104 30 99 0 11 2 0 40 0 0 0 100 2 0 0 14 47 9 48 0 10 11 0 12 0 0 0 100 3 0 0 0 19 0 14 0 3 3 2 84 0 0 0 100 4 0 0 10 228 108 25 0 4 13 0 857 0 0 0 100 5 0 0 0 25 6 22 0 4 12 0 15 0 0 0 100 6 0 0 10 246 113 52 0 5 16 0 345 0 0 0 100 7 1 0 14 21 3 20 0 3 1 1 359 0 0 0 100 March 4, 2026 at 01:30:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 62 1 0 1 0 1041 0 1 0 99 1 0 0 0 126 33 116 0 8 1 0 1 0 0 0 100 2 0 0 0 89 22 87 0 10 1 0 0 0 0 0 100 3 0 0 0 13 1 2 0 1 1 0 0 0 0 0 100 4 0 0 14 218 107 12 0 1 1 0 854 0 0 0 100 5 0 0 0 11 1 2 0 0 1 0 0 0 0 0 100 6 0 0 7 225 108 16 0 1 2 0 309 0 0 0 100 7 0 0 21 11 3 6 0 1 1 0 266 0 0 0 100 March 4, 2026 at 01:30:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 103 42 1 3 0 0 1043 0 1 0 99 1 0 0 0 136 12 112 0 5 0 0 0 0 0 0 100 2 0 0 112 90 31 83 0 4 0 0 1 0 0 0 100 3 0 0 0 54 11 38 0 2 0 0 4 0 0 0 100 4 0 0 10 234 108 12 0 0 1 0 855 0 0 0 100 5 0 0 0 23 0 6 0 1 0 0 3 0 0 0 100 6 0 0 3 249 113 26 0 0 0 0 317 0 0 0 100 7 0 0 14 25 2 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:30:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 86 1 1 0 0 1044 0 1 0 99 1 0 0 0 113 51 108 0 2 0 0 0 0 0 0 100 2 0 0 7 10 1 6 0 0 0 0 1 0 0 0 100 3 0 0 0 75 2 73 0 3 2 0 0 0 0 0 100 4 0 0 10 218 107 12 1 0 4 0 855 0 0 0 100 5 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 6 0 0 3 224 108 16 1 0 6 0 310 0 0 0 100 7 0 0 14 8 2 4 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:30:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 0 2871 118 1476 39 248 48 0 6662 7 3 0 90 1 26 0 0 787 25 1380 47 283 33 0 7618 7 2 0 91 2 11 0 0 649 4 1273 23 188 18 0 5748 6 2 0 92 3 11 0 0 683 10 1238 34 240 35 1 7611 6 2 0 92 4 5 0 360 774 121 1027 26 223 33 0 6543 5 2 0 93 5 46 0 0 598 5 990 16 160 42 0 5136 5 2 0 93 6 9 0 3 855 108 1204 28 220 27 0 5825 6 2 0 92 7 17 0 14 524 5 870 19 135 25 1 4853 4 1 0 95 March 4, 2026 at 01:30:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 105 118 2 2 0 0 1052 0 1 0 99 1 0 0 0 80 16 74 0 3 0 0 11 0 0 0 100 2 0 0 0 9 1 6 0 2 0 0 1 0 0 0 100 3 0 0 0 8 0 4 0 1 0 0 10 0 0 0 100 4 0 0 9 221 107 17 0 1 1 0 854 0 0 0 100 5 0 0 0 17 6 12 0 1 2 0 0 0 0 0 100 6 0 0 4 218 104 16 0 0 3 0 320 0 0 0 100 7 0 0 14 89 40 90 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:30:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1821 0 0 2143 105 97 3 11 4 4 1506 1 1 0 98 1 916 0 113 73 22 96 0 14 10 8 222 0 0 0 99 2 110 0 0 51 0 74 0 8 10 18 111 0 0 0 100 3 75 0 0 133 24 144 0 16 6 5 150 0 0 0 100 4 13 0 11 254 108 51 0 5 16 6 942 0 0 0 100 5 5 0 0 34 0 22 0 5 5 2 52 0 0 0 100 6 610 0 4 240 104 39 2 6 8 6 1218 1 0 0 98 7 9 0 14 98 12 88 0 8 3 3 337 0 0 0 100 March 4, 2026 at 01:30:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 116 89 0 2 0 0 1141 0 1 0 99 1 0 0 0 110 45 106 0 4 0 0 3 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 1 0 0 0 100 3 0 0 0 84 1 74 0 0 0 0 10 0 0 0 100 4 0 0 10 217 107 12 1 1 2 0 855 0 0 0 100 5 0 0 0 8 0 6 0 2 1 0 0 0 0 0 100 6 0 0 3 215 102 16 0 1 4 0 304 0 0 0 100 7 0 0 14 9 3 6 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:30:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 106 290 1 23 221 0 1447 0 1 0 99 1 0 0 0 178 53 250 0 31 254 0 5 0 1 0 99 2 0 0 0 73 0 145 0 20 252 0 0 0 0 0 100 3 0 0 0 164 81 311 0 30 182 0 6 0 0 0 100 4 0 0 10 301 109 178 0 35 231 0 867 0 0 0 99 5 0 0 0 64 0 130 0 28 205 0 0 0 1 0 99 6 0 0 3 278 102 151 0 30 206 0 300 0 0 0 100 7 0 0 14 65 3 119 0 18 206 0 267 0 0 0 100 March 4, 2026 at 01:30:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 107 143 1 5 0 0 1126 0 1 0 99 1 0 0 0 87 37 80 0 3 0 0 0 0 0 0 100 2 0 0 0 33 9 26 0 2 0 0 0 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 5 0 0 0 100 4 0 0 10 217 107 12 0 0 4 0 864 0 0 0 100 5 0 0 0 6 0 4 0 1 0 0 0 0 0 0 100 6 0 0 3 211 103 4 0 0 7 0 304 0 0 0 100 7 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:30:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 301 0 14 2175 108 342 8 40 2 0 2883 2 1 0 96 1 66 0 0 125 23 325 2 34 8 0 1304 2 0 0 98 2 92 0 0 112 20 214 3 25 2 2 1252 2 0 0 98 3 374 0 0 70 4 176 5 25 8 2 1703 2 1 0 98 4 109 0 94 297 113 281 8 43 7 0 2938 2 1 0 97 5 88 0 0 79 6 255 5 30 2 1 1501 1 0 0 99 6 20 0 3 281 105 196 4 26 8 0 1646 2 0 0 98 7 4 0 14 69 3 149 1 25 4 0 1630 1 0 0 99 March 4, 2026 at 01:30:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 144 1 0 1 0 1131 0 1 0 99 1 0 0 0 18 4 16 0 1 1 0 1 0 0 0 100 2 0 0 0 107 51 102 0 1 0 0 0 0 0 0 100 3 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 4 0 0 10 216 107 10 1 0 3 0 854 0 0 0 100 5 0 0 0 9 1 2 0 0 1 0 0 0 0 0 100 6 0 0 3 221 108 14 0 0 9 0 312 0 0 0 100 7 0 0 14 11 4 6 1 0 1 0 267 0 0 0 100 March 4, 2026 at 01:30:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 112 125 0 7 16 0 1142 0 1 0 99 1 0 0 0 43 8 34 0 5 1 0 10 0 0 0 100 2 0 0 7 98 32 95 0 8 10 0 9 0 0 0 100 3 0 0 0 61 8 64 0 3 6 0 28 0 0 0 100 4 0 0 18 229 108 29 1 5 11 0 862 0 1 0 99 5 0 0 14 14 0 19 0 6 4 0 23 0 0 0 100 6 0 0 3 242 111 44 0 2 12 1 476 0 0 0 100 7 0 0 14 20 3 17 0 3 3 0 303 0 0 0 100 March 4, 2026 at 01:30:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 106 216 1 20 98 0 1044 0 1 0 99 1 0 0 0 154 47 195 0 20 139 0 0 0 0 0 100 2 0 0 0 62 0 113 0 18 119 0 0 0 0 0 100 3 0 0 7 150 76 147 0 20 167 0 11 0 1 0 99 4 0 0 10 346 107 261 0 21 134 0 854 0 1 0 99 5 0 0 0 79 1 142 1 26 143 0 0 0 0 0 100 6 0 0 3 267 103 120 1 15 179 0 306 0 0 0 99 7 0 0 14 60 2 114 0 18 153 0 266 0 0 0 100 March 4, 2026 at 01:30:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 105 144 1 3 0 0 1043 0 1 0 99 1 0 0 0 102 37 78 0 3 0 0 0 0 0 0 100 2 0 0 0 52 14 34 0 3 0 0 5 0 0 0 100 3 0 0 0 42 7 26 0 1 0 0 9 0 0 0 100 4 0 0 10 237 109 16 0 1 4 0 857 0 0 0 100 5 0 0 112 8 0 5 0 0 0 0 0 0 0 0 100 6 0 0 3 226 102 2 0 0 0 0 300 0 0 0 100 7 0 0 14 23 2 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:30:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 148 1 0 0 0 1047 0 1 0 99 1 0 0 0 14 2 12 0 1 0 0 7 0 0 0 100 2 0 0 0 109 51 102 0 0 0 0 1 0 0 0 100 3 0 0 0 20 7 14 0 0 0 0 9 0 0 0 100 4 0 0 24 219 107 16 2 1 1 0 1120 0 0 0 100 5 0 0 7 16 6 4 0 0 0 0 0 0 0 0 100 6 0 0 3 219 104 16 0 0 4 0 309 0 0 0 100 7 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:30:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2856 102 1381 43 243 33 0 6907 7 3 0 91 1 7 0 0 751 6 1326 34 259 20 0 6798 6 2 0 92 2 9 0 0 705 24 1223 14 209 20 0 5980 6 2 0 93 3 2 0 0 639 8 1195 35 264 16 0 7557 6 2 0 93 4 4 0 374 813 109 1125 27 244 36 0 6608 5 2 0 93 5 2 0 0 623 5 1014 19 179 20 0 4872 5 2 0 93 6 4 0 3 833 106 1138 28 243 39 0 7046 6 2 0 92 7 20 0 0 582 20 970 22 154 14 0 4193 5 1 0 94 March 4, 2026 at 01:30:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 144 1 1 0 0 1041 0 1 0 99 1 1 0 0 34 13 30 0 0 0 0 19 0 0 0 100 2 0 0 0 9 1 6 0 2 0 0 7 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 24 218 108 14 0 0 3 0 1121 0 0 0 100 5 0 0 0 111 50 112 0 1 0 0 0 0 0 0 100 6 0 0 3 211 103 4 0 0 3 0 303 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:30:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 101 227 1 33 246 0 1042 0 1 0 99 1 0 0 0 92 13 156 1 38 179 0 5 0 1 0 99 2 0 0 0 83 0 154 0 26 225 0 0 0 0 0 100 3 0 0 0 155 81 138 1 26 223 0 0 0 1 0 99 4 0 0 24 344 135 221 1 37 237 0 1121 0 1 0 99 5 0 0 0 229 18 357 1 24 195 0 0 0 1 0 99 6 0 0 3 287 104 173 2 34 241 0 308 0 1 0 99 7 0 0 0 68 4 132 1 23 181 0 11 0 0 0 100 March 4, 2026 at 01:30:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 142 1 0 0 0 1042 0 1 0 99 1 0 0 0 42 18 34 0 0 0 0 5 0 0 0 100 2 0 0 0 82 38 78 0 1 0 0 0 0 0 0 100 3 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 4 0 0 24 216 108 12 2 0 3 0 1120 0 0 0 100 5 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 6 0 0 3 216 103 14 0 1 2 0 301 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 March 4, 2026 at 01:30:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2152 110 183 1 14 4 4 1112 0 1 0 99 1 58 0 0 125 36 140 0 19 17 6 525 0 0 0 100 2 615 0 0 70 11 66 1 12 4 4 934 1 0 0 98 3 901 0 113 26 1 59 0 10 6 10 157 0 0 0 99 4 97 0 24 266 109 87 0 7 10 19 1226 0 0 0 100 5 10 0 1 40 5 29 0 9 5 4 57 0 0 0 100 6 15 0 3 258 106 64 0 10 5 7 425 0 0 0 100 7 1827 0 0 41 1 41 2 11 11 4 351 0 1 0 99 March 4, 2026 at 01:30:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 107 144 2 4 1 0 1127 0 1 0 99 1 2 0 0 114 48 106 0 5 0 0 5 0 0 0 100 2 0 0 0 22 8 14 0 0 1 0 9 0 0 0 100 3 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 4 0 0 28 217 108 12 0 0 1 0 1121 0 0 0 100 5 0 0 0 9 1 2 0 0 1 0 0 0 0 0 100 6 0 0 7 216 104 11 0 0 2 0 307 0 0 0 100 7 0 0 0 12 2 6 0 0 1 0 20 0 0 0 100 March 4, 2026 at 01:30:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 206 0 0 2168 106 174 4 21 1 0 1085 3 1 0 96 1 110 0 0 215 35 443 5 44 3 0 2842 1 1 0 98 2 175 0 0 106 7 246 5 33 3 0 1868 3 1 0 96 3 169 0 0 146 16 343 11 52 8 1 1887 1 0 0 98 4 4 0 108 273 109 291 0 46 2 0 2686 1 1 0 98 5 207 0 0 111 8 264 7 35 3 0 1975 2 1 0 98 6 182 0 3 255 104 81 2 22 3 0 1492 2 1 0 97 7 1 0 0 106 1 264 4 32 11 0 1644 1 0 0 98 March 4, 2026 at 01:30:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 100 222 0 18 178 0 0 0 1 0 99 1 0 0 0 181 53 273 1 25 179 0 1130 0 1 0 99 2 0 0 0 61 1 124 0 20 162 0 0 0 0 0 100 3 0 0 0 166 87 176 0 22 168 0 9 0 1 0 99 4 0 0 24 287 108 154 2 24 212 0 1121 0 1 0 99 5 0 0 0 66 0 124 0 23 179 0 0 0 0 0 100 6 0 0 3 331 102 249 0 29 170 0 302 0 1 0 99 7 0 0 0 67 1 122 0 20 127 0 0 0 0 0 100 March 4, 2026 at 01:30:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2132 112 133 0 14 8 1 76 0 1 0 99 1 0 0 0 69 22 102 1 6 12 0 1155 0 0 0 100 2 0 0 0 54 16 50 0 8 5 0 0 0 0 0 100 3 0 0 9 49 12 51 0 6 5 1 90 0 1 0 99 4 0 0 37 237 111 42 3 4 5 1 1150 0 0 0 99 5 0 0 0 17 0 20 0 5 6 0 32 0 0 0 100 6 0 0 4 220 102 20 1 7 15 0 321 0 0 0 100 7 0 0 0 14 1 11 0 6 16 0 6 0 0 0 100 March 4, 2026 at 01:30:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 110 125 1 6 0 0 10 0 1 0 99 1 0 0 7 20 3 44 2 1 0 0 1053 0 0 0 100 2 0 0 0 11 0 10 0 1 0 0 0 0 0 0 100 3 0 0 0 21 6 14 0 3 0 0 0 0 0 0 100 4 0 0 24 245 114 37 0 4 4 0 1121 0 0 0 100 5 0 0 0 85 41 74 0 1 0 0 0 0 0 0 100 6 0 0 3 216 104 10 0 0 8 0 309 0 0 0 100 7 0 0 0 13 1 13 0 2 0 0 9 0 0 0 100 March 4, 2026 at 01:30:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 115 123 0 6 1 0 9 0 1 0 99 1 0 0 0 30 3 40 1 1 0 0 1042 0 0 0 100 2 0 0 0 24 0 4 0 1 0 0 0 0 0 0 100 3 0 0 0 29 1 12 0 2 0 0 0 0 0 0 100 4 0 0 136 224 111 21 0 1 3 0 1124 0 0 0 100 5 0 0 0 119 39 96 0 2 0 0 0 0 0 0 100 6 0 0 3 239 106 14 0 2 2 0 308 0 0 0 100 7 0 0 0 25 2 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:31:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 124 104 0 5 0 0 19 0 1 0 99 1 0 0 0 93 41 122 1 3 0 0 1051 0 0 0 100 2 0 0 0 10 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 9 0 3 0 2 0 0 0 0 0 0 100 4 0 0 31 220 109 16 2 0 4 0 1120 0 0 0 99 5 0 0 0 8 0 4 0 0 0 0 3 0 0 0 100 6 0 0 3 266 103 56 0 3 6 0 295 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 18 0 0 0 100 March 4, 2026 at 01:31:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2939 106 1608 28 265 210 0 6059 6 3 0 91 1 34 0 7 793 35 1406 52 306 296 0 9001 7 3 0 90 2 1 0 0 735 1 1304 27 215 258 0 5787 5 2 0 93 3 3 0 0 791 79 1391 46 279 268 0 8271 6 3 0 91 4 3 0 368 876 112 1294 33 259 255 0 7206 6 2 0 92 5 24 0 0 719 4 1274 26 201 245 0 4675 6 2 0 92 6 3 0 3 920 106 1327 41 253 279 0 6905 6 2 0 92 7 22 0 0 607 8 1000 18 156 241 0 4213 5 2 0 93 March 4, 2026 at 01:31:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 116 113 0 5 0 0 7 0 0 0 100 1 0 0 7 28 7 54 0 1 0 0 1302 0 0 0 100 2 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 3 0 0 0 7 0 4 0 2 0 0 0 0 0 0 100 4 0 0 17 217 107 12 0 0 3 0 858 0 0 0 100 5 0 0 0 14 1 14 0 1 0 0 10 0 0 0 100 6 0 0 3 214 102 4 0 0 3 0 304 0 0 0 100 7 0 0 0 100 39 91 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:31:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 118 120 1 7 0 0 14 0 1 0 99 1 0 0 7 70 21 94 1 3 0 0 1310 0 0 0 100 2 0 0 0 67 21 60 0 3 0 0 0 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 17 218 108 14 0 0 0 0 863 0 0 0 100 5 0 0 0 13 6 6 0 1 0 0 10 0 0 0 100 6 0 0 3 221 107 16 0 0 2 0 339 0 0 0 100 7 0 0 0 15 3 12 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:31:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 114 114 0 9 1 0 5 0 1 0 99 1 0 0 7 70 24 90 2 4 1 0 1304 0 0 0 99 2 0 0 0 40 16 32 0 3 1 0 0 0 0 0 100 3 0 0 0 37 10 28 0 3 0 0 0 0 0 0 100 4 0 0 17 216 107 14 1 1 3 0 860 0 0 0 100 5 0 0 0 11 1 6 0 1 1 0 10 0 0 0 100 6 0 0 3 216 102 12 0 1 2 0 302 0 0 0 100 7 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:31:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 127 0 0 2177 113 201 0 17 11 13 519 0 1 0 99 1 623 0 3 169 55 200 3 13 9 7 2056 1 1 0 98 2 21 0 7 48 1 66 0 14 13 7 389 0 0 0 100 3 10 0 0 41 0 44 0 15 2 3 111 0 0 0 100 4 16 0 16 250 108 43 0 8 8 3 940 0 0 0 100 5 28 0 0 32 1 27 0 6 5 6 6 0 0 0 100 6 7 0 4 243 105 37 0 7 9 2 369 0 0 0 100 7 2726 0 115 34 0 79 2 7 2 15 389 1 1 0 99 March 4, 2026 at 01:31:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 113 0 2 0 0 0 0 0 0 100 1 0 0 0 32 10 54 1 3 0 0 1134 0 0 0 100 2 0 0 7 101 48 98 0 1 0 0 260 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 17 219 106 18 0 1 4 0 871 0 0 0 100 5 0 0 0 9 0 6 0 1 0 0 0 0 0 0 100 6 0 0 3 210 102 4 0 0 5 0 304 0 0 0 100 7 0 0 0 9 1 6 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:31:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 335 0 0 2186 103 316 2 24 5 1 1853 2 1 0 97 1 421 0 0 120 9 290 9 30 7 1 2671 2 1 0 97 2 98 0 0 117 33 187 3 13 2 0 1521 2 0 0 97 3 232 0 0 88 18 163 8 17 2 1 1570 4 1 0 96 4 8 0 108 301 109 309 2 28 4 0 2416 1 0 0 99 5 34 0 0 67 0 283 2 29 2 0 1326 1 0 0 98 6 0 0 3 267 102 224 1 27 0 0 1638 1 0 0 99 7 1 0 0 65 0 224 7 26 3 0 1287 1 0 0 99 March 4, 2026 at 01:31:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 110 130 1 4 0 0 18 0 1 0 99 1 0 0 0 23 5 44 1 0 0 0 1142 0 0 0 100 2 0 0 0 24 4 28 0 4 0 0 14 0 0 0 100 3 0 0 0 111 42 106 0 6 7 0 21 0 0 0 100 4 0 0 38 231 111 27 2 5 0 0 1127 0 0 0 100 5 0 0 0 16 5 4 0 1 2 0 15 0 0 0 100 6 14 0 3 215 102 8 1 0 1 0 319 0 0 0 100 7 0 0 0 15 1 6 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:31:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 103 120 1 5 5 0 17 0 1 0 99 1 0 0 0 52 17 86 1 8 11 0 1177 0 0 0 100 2 0 0 8 34 9 34 1 4 9 0 21 0 1 0 99 3 0 0 14 84 34 77 0 5 3 0 3 0 0 0 100 4 0 0 24 236 110 42 0 3 5 0 1154 0 0 0 99 5 0 0 0 18 1 20 0 2 11 1 92 0 0 0 100 6 0 0 3 226 105 16 0 2 4 0 379 0 0 0 100 7 0 0 7 15 1 13 0 5 6 0 7 0 0 0 100 March 4, 2026 at 01:31:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 107 118 0 5 0 0 0 0 1 0 99 1 0 0 0 108 46 130 0 3 0 0 1045 0 0 0 100 2 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 15 1 15 0 3 0 0 3 0 0 0 100 4 0 0 24 224 109 16 0 0 0 0 1133 0 0 0 100 5 0 0 0 28 10 22 0 0 0 0 12 0 0 0 100 6 0 0 3 210 102 2 0 0 1 0 300 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 104 211 0 19 142 0 1 0 1 0 99 1 0 0 0 181 49 246 1 29 191 0 1040 0 1 0 99 2 0 0 0 75 2 103 0 16 150 0 0 0 0 0 100 3 0 0 112 116 54 116 0 22 158 0 0 0 1 0 99 4 0 0 24 305 112 149 1 20 125 0 1124 0 1 0 99 5 0 0 0 75 6 103 0 19 155 0 9 0 0 0 99 6 0 0 3 322 102 207 0 17 127 0 300 0 1 0 99 7 0 0 0 79 2 116 0 18 140 0 1 0 0 0 100 March 4, 2026 at 01:31:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 105 114 0 4 0 0 0 0 1 0 99 1 0 0 0 14 2 38 1 1 0 0 1042 0 0 0 100 2 0 0 0 86 35 80 0 3 0 0 0 0 0 0 100 3 0 0 0 32 11 24 0 1 0 0 0 0 0 0 100 4 0 0 23 225 112 18 1 0 0 0 1123 0 0 0 100 5 0 0 0 30 11 22 1 1 0 0 14 0 0 0 100 6 0 0 4 211 102 4 0 0 0 0 298 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2643 104 1057 18 157 27 0 3862 4 2 0 94 1 24 0 0 475 2 909 37 189 14 0 6606 4 2 0 94 2 0 0 0 452 0 812 18 132 31 0 3880 4 1 0 94 3 1 0 0 508 38 868 18 179 24 0 5406 4 1 0 95 4 1 0 262 642 124 797 11 180 19 0 5240 3 2 0 95 5 19 0 0 460 14 730 15 123 29 0 3337 4 1 0 95 6 60 0 3 647 103 789 16 149 50 0 4749 4 1 0 95 7 1 0 0 395 0 696 11 92 20 0 2745 4 1 0 95 March 4, 2026 at 01:31:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 2330 102 390 14 78 17 0 2256 2 1 0 96 1 1 0 0 282 5 513 19 93 12 0 3508 2 1 0 97 2 10 0 0 240 3 375 9 66 8 0 1642 1 1 0 98 3 9 0 0 330 26 548 21 83 8 0 2329 2 1 0 97 4 1 0 140 446 126 417 14 77 12 0 2779 1 1 0 98 5 4 0 0 243 8 336 5 57 11 0 1467 2 0 0 98 6 0 0 7 445 107 417 22 82 21 0 2510 2 1 0 97 7 1 0 0 135 3 222 3 51 4 0 1276 1 0 0 98 March 4, 2026 at 01:31:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 0 2173 113 141 0 25 5 7 92 0 1 0 99 1 45 0 0 70 6 98 1 10 6 10 1159 0 0 0 99 2 900 0 141 68 16 90 0 13 6 8 176 0 1 0 99 3 101 0 1 91 12 85 0 11 7 4 180 0 0 0 100 4 2430 0 24 286 120 88 4 8 10 12 2311 2 1 0 97 5 30 0 0 42 1 49 0 7 13 8 89 0 0 0 100 6 9 0 3 253 109 50 0 11 21 3 396 0 0 0 100 7 28 0 0 38 1 39 0 8 10 6 99 0 0 0 100 March 4, 2026 at 01:31:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 107 250 0 38 290 0 0 0 1 0 99 1 0 0 0 118 21 209 1 35 225 0 1128 0 1 0 99 2 0 0 0 119 23 173 0 29 247 0 0 0 0 0 100 3 0 0 0 152 81 135 0 35 204 0 0 0 0 0 100 4 0 0 24 282 108 141 1 25 197 0 1120 0 0 0 100 5 0 0 0 63 1 119 0 16 200 0 0 0 0 0 100 6 0 0 3 286 106 163 0 26 194 0 296 0 0 0 99 7 0 0 0 155 0 312 0 31 221 0 10 0 0 0 100 March 4, 2026 at 01:31:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 124 0 1 0 0 1 0 1 0 99 1 0 0 0 112 53 136 1 0 0 0 1124 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 8 0 1 0 0 1 0 0 0 100 4 0 0 24 221 110 18 0 1 4 0 1126 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 3 220 107 12 0 0 5 0 313 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 120 140 1 5 0 0 12 0 1 0 99 1 0 0 0 110 41 134 1 6 0 0 1136 0 0 0 100 2 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 4 0 0 24 217 108 14 0 0 2 0 1120 0 0 0 100 5 0 0 0 18 7 6 0 0 0 0 0 0 0 0 100 6 0 0 3 218 105 12 0 0 5 0 623 0 0 0 100 7 0 0 0 11 0 12 0 1 0 0 19 0 0 0 100 March 4, 2026 at 01:31:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2165 109 203 5 20 2 0 1094 2 1 0 98 1 100 0 0 147 29 316 8 38 2 0 2742 1 1 0 98 2 3 0 0 82 11 156 1 36 4 0 1285 1 0 0 99 3 1 0 0 70 8 156 4 32 1 0 1561 1 0 0 99 4 9 0 93 269 111 142 7 27 5 0 2259 2 0 0 98 5 597 0 0 68 1 169 5 22 9 3 1969 1 1 0 98 6 258 0 4 253 104 65 7 11 2 3 1972 3 1 0 96 7 56 0 0 87 3 153 9 34 4 0 1491 1 0 0 98 March 4, 2026 at 01:31:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 2113 106 64 0 6 1 0 10 0 1 0 99 1 0 0 0 118 48 146 1 5 3 0 1147 0 0 0 99 2 0 0 0 24 3 26 0 2 1 0 15 0 0 0 100 3 0 0 0 13 0 12 0 4 0 0 6 0 0 0 100 4 5 0 38 225 109 20 2 0 3 0 1130 0 0 0 100 5 0 0 0 14 2 4 0 1 1 0 11 0 0 0 100 6 0 0 3 211 102 2 0 0 4 0 307 0 0 0 100 7 0 0 0 83 8 70 1 0 0 0 26 0 0 0 100 March 4, 2026 at 01:31:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 103 214 0 21 138 0 0 0 1 0 99 1 0 0 0 158 50 233 1 23 116 0 1131 0 1 0 99 2 0 0 0 67 6 114 0 15 119 0 11 0 0 0 100 3 0 0 0 120 58 111 1 23 135 0 4 0 1 0 99 4 0 0 24 275 109 133 0 21 153 0 1122 0 1 0 99 5 0 0 0 50 1 93 0 15 185 0 0 0 0 0 100 6 0 0 3 252 102 97 0 19 127 0 287 0 0 0 100 7 0 0 0 103 2 197 0 19 122 0 1 0 0 0 100 March 4, 2026 at 01:31:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 101 106 0 5 5 0 2 0 1 0 99 1 0 0 0 129 49 158 1 6 2 1 1140 0 0 0 99 2 0 0 0 33 6 35 0 6 11 0 28 0 0 0 100 3 0 0 0 28 1 34 0 7 8 0 38 0 0 0 100 4 7 0 32 226 108 29 1 6 17 0 1120 0 1 0 99 5 0 0 7 18 2 16 0 6 6 0 89 0 0 0 100 6 0 0 3 242 112 42 0 7 17 0 335 0 0 0 100 7 0 0 0 16 1 12 0 2 4 0 8 0 0 0 100 March 4, 2026 at 01:31:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 17 1 2 0 0 8 0 1 0 99 1 0 0 0 116 50 142 1 2 0 0 1047 0 0 0 99 2 0 0 0 106 3 100 0 2 0 0 0 0 0 0 100 3 0 0 0 19 0 12 0 2 0 0 0 0 0 0 100 4 0 0 24 226 109 26 1 1 1 0 1122 0 0 0 100 5 0 0 0 17 6 4 0 0 0 0 0 0 0 0 100 6 0 0 10 224 108 20 0 1 7 0 306 0 0 0 100 7 0 0 0 16 2 12 0 1 0 0 7 0 0 0 100 March 4, 2026 at 01:31:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2110 104 31 0 5 1 0 0 0 1 0 99 1 0 0 0 81 28 84 0 1 2 0 1042 0 0 0 100 2 0 0 0 102 1 76 0 0 1 0 0 0 0 0 100 3 0 0 0 86 25 62 0 3 1 0 6 0 0 0 100 4 0 0 28 240 110 20 1 3 1 0 1120 0 0 0 100 5 0 0 0 28 2 6 0 2 0 0 0 0 0 0 100 6 0 0 7 240 107 16 0 1 7 0 315 0 0 0 100 7 0 0 0 25 1 2 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:31:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 101 106 0 2 0 0 0 0 1 0 99 1 0 0 0 115 53 138 1 0 0 0 1043 0 0 0 99 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 17 1 12 0 1 0 0 1 0 0 0 100 4 0 0 24 226 109 18 0 1 2 0 1122 0 0 0 100 5 0 0 0 15 2 14 0 1 0 0 1 0 0 0 100 6 0 0 3 230 111 20 1 0 5 0 299 0 0 0 100 7 0 0 0 8 1 4 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:31:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 0 3039 109 1762 24 302 230 0 6742 6 3 0 91 1 7 0 0 826 22 1504 30 303 254 0 8246 6 3 0 90 2 9 0 0 814 12 1429 21 230 252 0 6209 6 3 0 92 3 7 0 0 902 91 1571 37 293 301 0 7809 7 3 0 90 4 13 0 374 891 122 1318 27 284 232 0 7440 6 3 0 91 5 13 0 0 692 5 1223 18 189 256 0 5157 5 2 0 92 6 13 0 3 898 111 1228 21 251 300 0 6612 7 2 0 91 7 21 0 0 602 11 1050 15 178 223 0 4567 4 2 0 94 March 4, 2026 at 01:31:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 110 106 0 11 0 0 2 0 1 0 99 1 0 0 0 52 19 76 1 3 0 0 1050 0 0 0 100 2 0 0 0 38 13 30 0 3 0 0 0 0 0 0 100 3 0 0 0 52 19 48 0 4 0 0 3 0 0 0 100 4 0 0 24 235 111 26 1 3 0 0 1123 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 218 102 10 0 1 3 0 299 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:31:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 120 1 2 0 0 4 0 1 0 99 1 0 0 0 125 58 148 1 0 0 0 1057 0 0 0 99 2 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 9 0 8 1 1 0 0 20 0 0 0 100 4 0 0 24 221 110 18 1 0 10 0 1123 0 0 0 100 5 0 0 0 16 7 4 0 0 0 0 0 0 0 0 100 6 0 0 3 217 102 10 0 0 3 0 308 0 0 0 100 7 0 0 0 15 0 19 0 2 0 0 9 0 0 0 100 March 4, 2026 at 01:31:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 122 0 1 0 0 0 0 1 0 99 1 0 0 0 118 56 142 1 0 0 0 1074 0 0 0 99 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 8 0 8 0 1 0 0 20 0 0 0 100 4 0 0 23 220 110 16 0 0 2 0 1123 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 4 215 104 6 0 0 4 0 299 0 0 0 100 7 0 0 0 10 1 4 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:31:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 118 0 0 0 0 8 0 1 0 99 1 0 0 0 71 31 96 1 0 0 0 1371 0 0 0 99 2 0 0 0 69 30 68 0 1 0 0 9 0 0 0 100 3 0 0 0 7 0 4 0 0 0 0 10 0 0 0 100 4 0 0 24 224 112 20 0 0 2 0 1125 0 0 0 100 5 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 3 0 300 0 0 0 100 7 0 0 0 7 0 4 0 0 0 0 18 0 0 0 100 March 4, 2026 at 01:31:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 118 0 0 0 0 0 0 1 0 99 1 0 0 0 14 1 44 1 1 2 0 1041 0 0 0 100 2 0 0 0 122 58 118 0 0 1 0 6 0 0 0 100 3 0 0 0 8 0 6 0 0 2 0 10 0 0 0 100 4 0 0 24 222 109 20 1 0 5 0 1122 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 300 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:31:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 106 114 0 4 0 0 0 0 1 0 99 1 0 0 0 12 1 36 1 0 0 0 1044 0 0 0 100 2 0 0 0 98 39 96 0 4 0 0 9 0 0 0 100 3 0 0 0 31 10 30 0 1 0 0 27 0 0 0 100 4 0 0 24 230 114 28 1 1 1 0 1133 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 2 0 298 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 10 1 36 1 0 1 0 1045 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 109 50 106 0 0 0 0 20 0 0 0 100 4 1 0 24 235 116 34 0 1 1 0 1141 0 0 0 100 5 0 0 0 15 7 6 0 1 0 0 0 0 0 0 100 6 0 0 3 211 102 6 0 0 6 0 302 0 0 0 100 7 0 0 0 13 2 10 0 0 0 0 4 0 0 0 100 March 4, 2026 at 01:31:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 2 2156 104 170 0 18 13 6 171 0 1 0 99 1 10 0 0 48 2 68 0 8 6 3 1200 0 0 0 100 2 0 0 0 45 5 28 0 2 6 0 35 0 0 0 100 3 619 0 0 56 8 51 1 4 3 7 900 1 0 0 98 4 61 0 28 277 117 80 0 11 6 7 1520 0 0 0 99 5 1853 0 0 117 39 121 2 7 4 12 349 0 1 0 99 6 910 0 120 229 102 65 0 10 11 12 522 0 1 0 99 7 87 0 0 49 1 67 0 11 11 13 160 0 0 0 100 March 4, 2026 at 01:31:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 109 108 0 8 0 0 3 0 1 0 99 1 0 0 0 44 13 66 1 6 0 0 1126 0 0 0 100 2 0 0 0 22 8 18 0 0 0 0 10 0 0 0 100 3 0 0 0 9 0 6 0 0 0 0 10 0 0 0 100 4 0 0 24 243 114 42 2 5 1 0 1123 0 0 0 100 5 0 0 0 59 27 52 0 0 0 0 0 0 0 0 100 6 0 0 3 223 103 14 0 3 1 0 295 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:31:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 2111 106 116 0 3 0 0 5 0 1 0 99 1 0 0 0 83 34 106 1 3 3 0 1120 0 0 0 100 2 0 0 0 47 20 44 0 1 1 0 5 0 0 0 100 3 21 0 0 10 1 8 0 0 2 0 15 0 0 0 100 4 0 0 24 219 108 18 1 0 3 0 1120 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 6 0 299 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 108 114 0 3 0 0 1 0 1 0 99 1 0 0 0 9 1 32 1 0 0 0 1119 0 0 0 100 2 0 0 0 118 50 116 0 5 0 0 7 0 0 0 100 3 0 0 0 8 0 6 0 1 0 0 3 0 0 0 100 4 0 0 24 224 111 20 0 0 4 0 1123 0 0 0 100 5 0 0 0 13 1 12 0 1 0 0 0 0 0 0 100 6 0 0 3 211 103 4 0 0 2 0 308 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:31:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 110 0 1 0 0 0 0 1 0 99 1 0 0 0 17 3 44 1 1 0 0 1134 0 0 0 100 2 0 0 0 31 8 26 0 2 0 0 328 0 0 0 100 3 0 0 0 109 50 108 0 1 0 0 20 0 0 0 100 4 0 0 24 233 112 37 0 1 2 0 1139 0 0 0 100 5 0 0 0 15 7 4 0 0 0 0 0 0 0 0 100 6 0 0 3 216 102 16 0 1 2 0 307 0 0 0 100 7 0 0 0 10 0 8 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:31:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 0 0 0 0 0 1 0 99 1 0 0 0 22 8 48 0 1 0 0 1121 0 0 0 100 2 0 0 0 16 1 12 0 0 0 0 3 0 0 0 100 3 0 0 0 91 42 86 0 0 0 0 10 0 0 0 100 4 0 0 24 242 120 40 1 2 1 0 1135 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 215 104 6 0 0 0 0 295 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:31:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 107 108 0 3 0 0 0 0 0 0 100 1 0 0 0 107 45 130 1 4 1 0 1123 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 6 0 0 0 0 10 0 0 0 100 4 0 0 24 232 115 28 1 0 1 0 1131 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 3 211 102 4 0 0 0 0 300 0 0 0 100 7 0 0 0 10 0 12 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:31:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 120 0 4 0 0 0 0 1 0 99 1 0 0 0 96 44 120 1 2 0 0 1119 0 0 0 100 2 0 0 0 33 7 26 0 3 0 0 0 0 0 0 100 3 0 0 0 9 1 6 0 1 0 0 10 0 0 0 100 4 0 0 24 228 113 26 0 0 1 0 1127 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 1 0 307 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:31:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 445 0 2 2163 106 194 2 27 9 2 1615 2 1 0 97 1 96 0 0 84 7 157 1 26 1 1 2278 2 1 0 98 2 115 0 0 73 6 144 4 21 1 0 1334 1 0 0 99 3 24 0 0 63 5 128 3 16 2 0 805 2 0 0 98 4 222 0 108 293 114 211 7 26 0 0 3210 3 1 0 97 5 9 0 0 131 36 189 1 25 3 0 1221 1 0 0 98 6 3 0 3 275 103 144 3 27 13 1 1596 1 0 0 99 7 225 0 0 60 1 170 1 18 3 2 1580 2 0 0 98 March 4, 2026 at 01:31:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 0 0 0 0 0 0 1 0 99 1 0 0 0 15 1 48 1 2 0 0 1140 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 4 0 0 23 225 111 24 1 0 3 0 1130 0 0 0 100 5 0 0 0 126 63 116 0 0 0 0 10 0 0 0 100 6 0 0 4 213 102 10 0 0 4 0 315 0 0 0 100 7 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 106 108 0 3 1 0 0 0 1 0 99 1 0 0 0 15 3 38 0 1 1 0 1132 0 0 0 100 2 0 0 0 17 3 14 0 1 1 0 0 0 0 0 100 3 0 0 0 17 1 10 0 0 1 0 0 0 0 0 100 4 0 0 28 219 108 12 1 0 1 0 1120 0 0 0 100 5 0 0 0 119 53 108 0 1 1 0 10 0 0 0 100 6 0 0 7 210 102 4 0 1 2 0 300 0 0 0 100 7 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:31:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 106 107 0 7 0 0 0 0 1 0 99 1 0 0 0 84 35 104 1 2 0 0 1134 0 0 0 100 2 0 0 0 28 10 22 0 3 0 0 0 0 0 0 100 3 0 0 0 23 4 20 0 2 0 0 0 0 0 0 100 4 0 0 24 218 109 14 0 0 0 0 1121 0 0 0 100 5 0 0 0 22 8 18 0 0 0 0 14 0 0 0 100 6 0 0 3 210 102 4 0 1 4 0 294 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:31:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2247 110 302 0 38 157 0 10 0 1 0 99 1 0 0 0 114 5 202 2 32 155 0 1127 0 1 0 99 2 0 0 0 70 3 124 0 16 169 0 6 0 0 0 100 3 0 0 0 155 70 150 0 22 152 0 26 0 0 0 99 4 0 0 31 316 114 182 3 34 142 0 1156 0 1 0 99 5 0 0 0 77 7 125 0 26 125 0 39 0 0 0 99 6 0 0 11 327 109 182 0 31 136 0 383 0 1 0 99 7 0 0 0 109 23 161 0 25 130 0 9 0 0 0 100 March 4, 2026 at 01:31:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 127 104 1 9 0 0 16 0 1 0 99 1 0 0 0 38 8 58 1 4 0 0 1043 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 46 18 40 0 2 0 0 1 0 0 0 100 4 0 0 24 226 110 18 1 1 2 0 1122 0 0 0 100 5 0 0 7 15 1 16 0 3 0 0 0 0 0 0 100 6 0 0 3 212 102 4 0 0 0 0 295 0 0 0 100 7 0 0 0 80 10 70 0 3 0 0 0 0 0 0 100 March 4, 2026 at 01:31:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2135 123 129 0 3 0 0 9 0 1 0 99 1 0 0 0 130 35 138 1 2 0 0 1048 0 0 0 99 2 0 0 0 25 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 25 0 6 0 1 0 0 1 0 0 0 100 4 0 0 24 236 108 18 1 0 0 0 1124 0 0 0 100 5 0 0 0 42 10 14 0 1 0 0 5 0 0 0 100 6 0 0 3 240 106 22 0 1 1 0 344 0 0 0 100 7 0 0 0 24 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 115 127 0 4 0 0 9 0 1 0 99 1 0 0 0 112 44 132 1 3 2 0 1063 0 0 0 100 2 0 0 0 10 2 6 0 1 0 0 0 0 0 0 100 3 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 4 0 0 24 221 109 14 0 0 7 0 1124 0 0 0 100 5 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 6 0 0 3 219 104 16 0 1 7 0 306 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:31:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2841 110 1323 43 248 22 0 6516 7 3 0 90 1 20 0 0 769 19 1344 52 282 41 0 9026 7 2 0 91 2 16 0 0 754 13 1218 34 193 47 0 5193 6 2 0 92 3 1 0 0 740 17 1316 49 278 51 0 8349 6 2 0 92 4 18 0 373 867 112 1221 26 225 18 0 6792 5 2 0 92 5 0 0 0 564 5 908 15 150 22 0 3818 4 1 0 95 6 28 0 3 821 105 1102 24 232 64 0 7256 6 2 0 92 7 2 0 0 554 2 939 23 134 56 0 4677 6 2 0 93 March 4, 2026 at 01:31:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2242 101 299 0 25 209 0 20 0 1 0 99 1 0 0 0 77 2 168 3 29 202 0 1043 0 1 0 99 2 0 0 0 161 31 240 0 27 212 0 0 0 0 0 100 3 0 0 0 217 77 208 1 30 263 0 0 0 1 0 99 4 0 0 24 299 122 153 1 28 223 0 1123 0 1 0 99 5 0 0 0 84 8 148 0 23 211 0 0 0 0 0 100 6 0 0 3 281 109 144 0 30 201 0 304 0 0 0 99 7 0 0 0 67 1 114 3 16 171 0 1 0 0 0 100 March 4, 2026 at 01:31:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 108 132 1 8 0 0 10 0 0 0 100 1 0 0 0 37 10 58 1 5 0 0 1047 0 0 0 100 2 0 0 0 25 7 18 0 3 0 0 0 0 0 0 100 3 0 0 0 8 0 6 0 2 0 0 0 0 0 0 100 4 0 0 24 220 110 16 1 0 2 0 1122 0 0 0 100 5 0 0 0 67 31 60 0 0 0 0 0 0 0 0 100 6 0 0 3 226 110 18 0 0 3 0 318 0 0 0 100 7 0 0 0 7 0 2 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:31:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 124 121 0 9 0 0 10 0 1 0 99 1 0 0 0 82 18 108 2 7 0 0 1049 0 0 0 100 2 0 0 0 43 11 34 0 3 0 0 0 0 0 0 100 3 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 4 0 0 24 221 109 20 0 0 2 0 1127 0 0 0 100 5 0 0 0 16 7 6 0 1 0 0 0 0 0 0 100 6 0 0 3 226 108 24 0 0 8 0 321 0 0 0 100 7 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2149 105 157 1 16 13 6 118 0 1 0 99 1 7 0 0 89 22 107 1 7 6 3 1184 0 0 0 99 2 887 0 113 25 2 38 1 10 9 7 79 0 0 0 99 3 71 0 0 104 27 105 1 7 5 9 64 0 0 0 100 4 19 0 31 256 111 55 0 6 5 4 1205 0 0 0 100 5 1858 0 0 55 4 58 2 7 7 7 449 0 1 0 99 6 633 0 7 262 107 75 1 15 10 10 1616 1 1 0 98 7 65 0 0 48 1 54 0 9 12 6 159 0 0 0 100 March 4, 2026 at 01:31:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 118 0 2 0 0 23 0 1 0 99 1 0 0 0 111 51 136 0 1 0 0 1125 0 0 0 100 2 0 0 0 11 1 12 0 1 0 0 0 0 0 0 100 3 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 4 0 0 24 218 109 14 1 0 4 0 1122 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 3 211 103 4 0 0 3 0 295 0 0 0 100 7 0 0 0 26 10 20 0 0 0 0 14 0 0 0 100 March 4, 2026 at 01:31:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 0 2259 102 435 8 43 131 0 1382 1 1 0 97 1 205 0 0 247 44 434 7 48 111 0 2893 2 1 0 97 2 3 0 0 126 2 281 3 49 174 0 1412 1 1 0 99 3 311 0 0 190 66 232 6 52 127 0 1442 3 1 0 96 4 26 0 122 329 114 234 9 37 139 0 2134 2 1 0 97 5 152 0 0 124 2 269 10 46 131 3 1433 1 1 0 99 6 196 0 15 318 105 200 2 42 142 2 1782 3 1 0 96 7 0 0 0 122 3 290 4 44 130 0 1465 1 0 0 99 March 4, 2026 at 01:31:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 94 0 4 0 0 1 0 1 0 99 1 0 0 0 105 47 126 1 1 0 0 1131 0 0 0 100 2 0 0 0 40 5 32 0 3 0 0 3 0 0 0 100 3 0 0 0 30 10 26 0 0 0 0 18 0 0 0 100 4 0 0 24 223 111 20 0 0 2 0 1127 0 0 0 100 5 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 4 0 288 0 0 0 100 7 0 0 0 9 1 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 114 131 2 10 4 0 13 0 1 0 99 1 0 0 14 111 37 148 1 10 7 1 1137 0 1 0 99 2 0 0 0 32 4 29 0 7 10 0 12 0 0 0 100 3 0 0 10 35 7 38 0 5 12 0 31 0 1 0 99 4 0 0 24 240 108 55 0 5 15 0 1164 0 0 0 99 5 0 0 7 23 7 13 0 4 2 0 13 0 0 0 100 6 0 0 3 232 104 35 0 4 4 0 426 0 0 0 100 7 0 0 0 16 0 13 0 5 13 0 2 0 0 0 100 March 4, 2026 at 01:31:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 114 130 0 5 0 0 7 0 1 0 99 1 0 0 0 56 20 75 1 3 0 0 1041 0 0 0 100 2 0 0 0 39 13 32 0 4 0 0 0 0 0 0 100 3 0 0 0 36 13 32 0 2 0 0 0 0 0 0 100 4 0 0 24 223 109 16 1 0 3 0 1122 0 0 0 100 5 0 0 0 19 2 18 0 1 0 0 0 0 0 0 100 6 0 0 10 214 104 8 0 1 3 0 307 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:32:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 119 122 0 6 0 0 10 0 1 0 99 1 0 0 112 13 2 43 0 2 1 0 1049 0 0 0 99 2 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 66 11 44 0 2 0 0 0 0 0 0 100 4 0 0 24 252 114 30 1 2 2 0 1121 0 0 0 100 5 0 0 0 73 25 52 0 1 0 0 2 0 0 0 100 6 0 0 3 229 103 6 0 1 4 0 298 0 0 0 100 7 0 0 0 24 0 6 0 1 0 0 18 0 0 0 100 March 4, 2026 at 01:32:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 110 202 1 9 76 0 14 0 1 0 99 1 0 0 7 88 1 190 1 15 71 0 1042 0 1 0 99 2 0 0 0 57 1 106 0 13 83 0 0 0 0 0 100 3 0 0 0 95 45 83 0 15 58 0 0 0 0 0 100 4 0 0 24 252 110 78 0 18 84 0 1122 0 0 0 100 5 0 0 0 151 52 179 0 10 61 0 0 0 0 0 100 6 0 0 3 250 102 81 0 7 81 0 297 0 0 0 100 7 0 0 0 48 1 83 0 8 42 0 1 0 0 0 100 March 4, 2026 at 01:32:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2876 113 1376 38 234 38 1 5982 7 3 0 91 1 7 0 0 806 4 1437 39 264 27 0 7795 6 2 0 92 2 6 0 0 735 9 1276 28 182 25 0 5573 6 2 0 92 3 26 0 0 656 4 1259 42 250 34 0 7505 6 2 0 92 4 8 0 353 765 107 1054 22 232 34 0 6591 6 2 0 93 5 1 0 21 658 37 1103 22 162 17 0 5327 5 2 0 93 6 17 0 3 769 104 1043 25 225 30 0 7049 5 2 0 93 7 24 0 0 562 1 992 20 133 13 0 4912 4 2 0 94 March 4, 2026 at 01:32:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 38 0 2 0 0 0 0 1 0 99 1 0 0 0 73 14 98 0 1 0 0 1049 0 0 0 100 2 0 0 0 80 20 74 0 3 0 0 0 0 0 0 100 3 0 0 0 49 20 44 0 1 0 0 0 0 0 0 100 4 0 0 3 225 105 20 0 1 1 0 601 0 0 0 100 5 0 0 21 30 17 20 1 0 0 0 532 0 0 0 100 6 0 0 3 220 104 20 0 0 1 0 335 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 51 0 0 2156 108 171 0 14 12 12 143 0 1 0 99 1 621 0 0 52 8 45 1 8 5 9 907 1 0 0 98 2 11 0 0 82 22 104 1 10 3 3 1203 0 0 0 99 3 0 0 0 62 14 42 0 6 2 0 30 0 0 0 100 4 4 0 7 278 111 66 0 9 5 2 672 0 0 0 100 5 2728 0 135 51 11 85 3 6 8 15 918 1 1 0 98 6 115 0 8 254 103 71 0 13 16 9 511 0 0 0 100 7 41 0 0 50 1 68 0 12 11 11 155 0 0 0 100 March 4, 2026 at 01:32:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 112 0 0 0 0 1 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 113 53 138 1 0 1 0 1125 0 0 0 100 3 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 4 0 0 3 215 105 8 0 0 2 0 597 0 0 0 100 5 0 0 21 25 9 28 0 1 1 0 531 0 0 0 100 6 0 0 3 210 102 4 0 0 3 0 309 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 100 263 0 22 168 0 0 0 1 0 99 1 0 0 0 167 1 332 0 37 193 0 0 0 1 0 99 2 0 0 0 177 55 269 2 23 228 0 1125 0 1 0 99 3 0 0 0 169 85 164 0 22 198 0 0 0 1 0 99 4 0 0 3 288 106 161 1 29 236 0 598 0 1 0 99 5 0 0 21 93 12 152 1 18 210 0 850 0 1 0 99 6 0 0 3 278 102 146 0 24 223 0 302 0 1 0 99 7 0 0 0 72 0 139 0 22 177 0 3 0 1 0 99 March 4, 2026 at 01:32:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 114 0 3 0 0 1 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 113 52 138 0 2 0 0 1127 0 0 0 100 3 0 0 0 10 1 6 0 0 0 0 1 0 0 0 100 4 0 0 3 228 112 20 0 0 2 0 606 0 0 0 100 5 0 0 21 14 5 12 1 1 0 0 526 0 0 0 100 6 0 0 3 214 102 14 0 1 1 0 315 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 154 0 0 2180 101 368 3 43 3 0 1664 1 1 0 98 1 119 0 0 82 5 158 1 43 1 0 1395 1 0 0 99 2 220 0 0 114 33 209 7 23 1 0 3050 3 1 0 96 3 136 0 0 89 1 287 4 42 3 1 1440 2 0 0 98 4 0 0 73 289 123 180 3 25 2 0 1562 3 0 0 97 5 52 0 21 76 12 192 2 30 1 4 2011 1 0 0 99 6 226 0 3 278 103 306 4 33 11 0 2174 1 1 0 98 7 101 0 0 66 0 355 3 29 4 1 1468 1 0 0 98 March 4, 2026 at 01:32:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 117 88 0 10 7 0 15 0 1 0 99 1 13 0 0 85 21 74 0 4 1 0 35 0 0 0 100 2 0 0 0 14 2 36 1 0 3 0 1143 0 0 0 100 3 0 0 0 14 1 11 0 3 0 0 18 0 0 0 100 4 0 0 17 288 124 82 0 2 4 0 612 0 0 0 100 5 0 0 21 16 5 14 0 1 0 0 529 0 0 0 100 6 0 0 3 220 106 12 0 0 1 0 307 0 0 0 100 7 0 0 0 11 1 8 0 1 0 0 7 0 0 0 100 March 4, 2026 at 01:32:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2117 100 133 1 5 3 0 3 0 1 0 99 1 0 0 8 99 43 100 0 3 10 0 0 0 1 0 99 2 0 0 0 37 10 65 1 5 15 0 1130 0 0 0 100 3 0 0 0 22 1 23 0 3 7 0 12 0 0 0 100 4 0 0 3 241 112 44 0 8 13 1 644 0 0 0 100 5 0 0 21 22 5 24 1 7 11 0 568 0 0 0 100 6 0 0 3 226 102 32 0 3 13 2 405 0 0 0 100 7 0 0 7 16 0 16 0 4 4 1 84 0 0 0 100 March 4, 2026 at 01:32:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2177 100 260 0 16 149 0 3 0 1 0 99 1 0 0 0 157 1 303 0 23 130 0 0 0 0 0 100 2 0 0 0 159 49 239 1 22 130 0 1044 0 1 0 99 3 0 0 0 162 93 126 0 24 157 0 0 0 0 0 100 4 0 0 3 275 105 126 0 24 124 0 595 0 0 0 100 5 0 0 21 66 5 109 0 18 75 0 525 0 0 0 100 6 0 0 3 289 111 145 0 25 140 0 310 0 0 0 99 7 0 0 0 78 1 143 0 21 121 0 1 0 0 0 100 March 4, 2026 at 01:32:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2107 102 105 0 3 0 0 0 0 1 0 99 1 0 0 0 33 3 14 0 4 0 0 0 0 0 0 100 2 0 0 0 26 2 34 1 0 0 0 1041 0 0 0 100 3 0 0 0 120 44 97 0 2 0 0 3 0 0 0 100 4 0 0 3 248 110 24 0 3 6 0 597 0 0 0 100 5 0 0 21 30 6 12 1 0 0 0 527 0 0 0 100 6 0 0 3 242 110 20 0 0 6 0 319 0 0 0 100 7 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 100 98 0 3 0 0 0 0 1 0 99 1 0 0 0 114 51 110 0 1 0 0 7 0 0 0 100 2 0 0 0 34 2 62 1 4 0 0 1041 0 0 0 100 3 0 0 0 13 1 10 0 1 0 0 5 0 0 0 100 4 0 0 3 225 107 22 0 0 3 0 609 0 0 0 100 5 0 0 21 18 10 10 0 0 0 0 527 0 0 0 100 6 0 0 3 222 108 14 0 0 2 0 312 0 0 0 100 7 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2596 100 955 29 180 31 0 3967 5 2 0 93 1 4 0 0 573 45 962 34 191 56 0 5212 5 2 0 93 2 2 0 0 618 4 1035 22 155 15 0 5266 4 2 0 95 3 15 0 0 458 3 846 28 187 21 0 5611 4 2 0 95 4 3 0 241 608 112 710 14 164 12 0 4723 4 1 0 94 5 2 0 21 422 10 663 18 120 56 0 3386 4 1 0 95 6 3 0 3 666 110 842 28 153 32 0 5062 4 2 0 94 7 5 0 0 429 1 771 16 117 18 0 3775 3 1 0 96 March 4, 2026 at 01:32:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2359 102 523 14 76 13 0 1778 2 1 0 96 1 7 0 0 275 2 471 19 89 7 0 2396 2 1 0 97 2 0 0 0 236 2 411 14 57 23 0 2659 2 1 0 98 3 3 0 0 218 5 370 20 71 14 0 2171 2 1 0 98 4 0 0 115 387 106 342 10 68 6 0 2304 1 1 0 98 5 0 0 21 177 7 273 6 50 1 0 1928 1 0 0 98 6 2 0 3 385 114 287 14 66 22 0 2405 2 0 0 98 7 0 0 0 242 40 351 5 32 7 1 1703 1 0 0 98 March 4, 2026 at 01:32:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2184 100 260 0 28 204 0 10 0 1 0 99 1 0 0 0 164 1 321 0 35 216 0 0 0 1 0 99 2 0 0 0 84 3 197 0 33 302 0 1041 0 1 0 99 3 0 0 0 175 86 173 0 34 220 0 5 0 1 0 99 4 0 0 3 297 105 183 0 36 217 0 596 0 1 0 99 5 0 0 21 77 4 148 1 28 200 0 526 0 1 0 99 6 0 0 3 300 110 178 0 34 219 0 307 0 1 0 99 7 0 0 0 184 51 263 2 30 232 0 4 0 1 0 99 March 4, 2026 at 01:32:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 105 82 0 4 0 0 11 0 1 0 99 1 0 0 0 42 17 36 0 1 0 0 0 0 0 0 100 2 0 0 0 10 2 34 1 0 0 0 1042 0 0 0 100 3 0 0 0 12 2 8 0 1 0 0 1 0 0 0 100 4 0 0 3 216 105 10 0 1 3 0 599 0 0 0 100 5 0 0 21 14 4 18 0 1 0 0 526 0 0 0 100 6 0 0 3 224 109 18 0 1 3 0 308 0 0 0 100 7 0 0 0 106 30 100 0 4 0 0 0 0 0 0 100 March 4, 2026 at 01:32:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 105 72 0 4 0 0 10 0 1 0 99 1 0 0 0 107 46 102 0 3 0 0 7 0 0 0 100 2 0 0 0 11 2 34 1 0 0 0 1041 0 0 0 100 3 0 0 0 16 4 14 0 0 0 0 10 0 0 0 100 4 0 0 3 221 106 20 0 0 2 0 609 0 0 0 100 5 0 0 21 17 9 10 1 1 0 0 527 0 0 0 100 6 0 0 3 220 106 12 0 0 9 0 307 0 0 0 100 7 0 0 0 54 0 48 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 118 0 0 0 0 15 0 1 0 99 1 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 34 1 0 0 0 1040 0 0 0 100 3 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 4 0 0 3 213 105 6 0 0 0 0 597 0 0 0 100 5 0 0 21 12 4 10 0 0 0 0 525 0 0 0 100 6 0 0 3 225 106 24 0 2 4 0 622 0 0 0 100 7 0 0 0 17 5 12 1 1 0 0 7 0 0 0 100 March 4, 2026 at 01:32:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 112 1 2 0 0 20 0 1 0 99 1 0 0 0 97 44 90 0 2 0 0 0 0 0 0 100 2 0 0 0 21 7 48 1 2 0 0 1042 0 0 0 100 3 0 0 0 15 4 10 0 0 0 0 5 0 0 0 100 4 0 0 3 212 104 6 0 0 3 0 594 0 0 0 100 5 0 0 21 10 4 8 1 0 0 0 527 0 0 0 100 6 0 0 3 214 102 8 0 0 4 0 302 0 0 0 100 7 1 0 0 24 7 24 0 1 0 0 13 0 0 0 100 March 4, 2026 at 01:32:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 100 121 0 1 1 0 20 0 1 0 99 1 0 0 0 10 1 6 0 0 3 0 0 0 0 0 100 2 0 0 0 109 52 134 0 0 0 0 1041 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 4 0 0 3 216 106 10 0 0 8 0 598 0 0 0 100 5 0 0 21 13 4 14 0 0 2 0 525 0 0 0 100 6 0 0 3 231 111 22 0 0 10 0 314 0 0 0 100 7 0 0 0 11 1 8 0 1 0 0 4 0 0 0 100 March 4, 2026 at 01:32:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 0 2151 100 176 0 13 6 12 77 0 1 0 99 1 48 0 0 39 1 39 0 6 3 9 85 0 0 0 100 2 15 0 3 137 52 158 1 5 8 5 1128 0 0 0 100 3 599 0 0 41 5 27 0 3 2 2 917 1 0 0 98 4 1864 0 3 324 104 62 4 6 5 12 998 0 1 0 98 5 51 0 21 52 5 53 1 10 14 4 673 0 0 0 100 6 16 0 3 257 108 54 0 7 11 4 386 0 0 0 100 7 930 0 185 26 0 64 0 10 7 12 180 0 1 0 99 March 4, 2026 at 01:32:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 122 0 0 0 0 15 0 1 0 99 1 0 0 0 15 1 16 1 1 0 0 7 0 0 0 100 2 0 0 0 110 52 134 1 0 0 0 1127 0 0 0 100 3 0 0 0 11 2 8 0 0 0 0 5 0 0 0 100 4 0 0 3 223 107 22 0 0 1 0 609 0 0 0 100 5 0 0 21 15 9 8 0 0 0 0 526 0 0 0 100 6 0 0 3 216 105 8 1 0 0 0 624 0 0 0 100 7 0 0 0 17 4 14 0 0 0 0 6 0 0 0 100 March 4, 2026 at 01:32:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 105 112 0 3 1 0 10 0 1 0 99 1 0 0 0 11 2 4 0 0 1 0 3 0 0 0 100 2 0 0 0 45 14 64 1 3 1 0 1123 0 0 0 100 3 0 0 0 88 39 80 0 1 1 0 4 0 0 0 100 4 0 0 7 213 104 6 0 0 1 0 594 0 0 0 100 5 0 0 21 17 6 10 1 0 1 0 528 0 0 0 100 6 0 0 7 210 102 4 0 1 2 0 298 0 0 0 100 7 0 0 0 17 5 8 1 0 1 0 5 0 0 0 100 March 4, 2026 at 01:32:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 104 115 0 9 0 0 20 0 1 0 99 1 0 0 0 23 6 16 0 4 0 0 0 0 0 0 100 2 0 0 0 28 8 58 1 2 0 0 1120 0 0 0 100 3 0 0 0 79 36 72 0 2 0 0 0 0 0 0 100 4 0 0 3 224 107 16 0 3 2 0 597 0 0 0 100 5 0 0 21 10 4 8 0 0 0 0 525 0 0 0 100 6 21 0 3 211 103 4 0 0 6 0 307 0 0 0 100 7 21 0 0 17 6 12 0 0 2 0 17 0 0 0 100 March 4, 2026 at 01:32:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 124 0 1 3 0 13 0 1 0 99 1 0 0 0 10 2 6 0 1 2 0 0 0 0 0 100 2 0 0 0 87 39 110 1 1 0 0 1122 0 0 0 100 3 0 0 0 47 18 48 0 2 0 0 0 0 0 0 100 4 0 0 3 214 105 8 0 0 5 0 594 0 0 0 100 5 0 0 21 15 5 16 1 0 1 0 527 0 0 0 100 6 0 0 3 214 104 8 0 0 8 0 301 0 0 0 100 7 0 0 0 23 8 18 0 0 0 0 10 0 0 0 100 March 4, 2026 at 01:32:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 118 0 0 0 0 16 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 34 0 0 1 0 1119 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 1 0 0 0 100 4 0 0 3 215 105 10 0 0 4 0 599 0 0 0 100 5 0 0 21 10 4 8 0 0 0 0 525 0 0 0 100 6 0 0 3 223 108 16 0 0 1 0 317 0 0 0 100 7 0 0 0 12 3 8 0 1 0 0 319 0 0 0 100 March 4, 2026 at 01:32:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 114 0 3 0 0 10 0 1 0 99 1 0 0 0 10 1 6 0 0 0 0 7 0 0 0 100 2 0 0 0 10 2 34 1 0 0 0 1121 0 0 0 100 3 0 0 0 111 47 106 0 4 0 0 5 0 0 0 100 4 0 0 3 230 107 36 0 2 14 0 609 0 0 0 100 5 0 0 21 17 9 8 1 0 0 0 526 0 0 0 100 6 0 0 3 220 107 12 0 0 1 0 297 0 0 0 100 7 0 0 0 8 0 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:32:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 108 116 0 8 0 0 10 0 1 0 99 1 0 0 0 97 38 86 0 7 0 0 21 0 0 0 100 2 0 0 0 19 6 44 1 1 0 0 1120 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 3 227 107 18 0 2 1 0 596 0 0 0 100 5 0 0 21 15 4 18 0 1 0 0 526 0 0 0 100 6 0 0 3 222 108 16 0 0 2 0 309 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:32:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 293 0 0 2184 107 271 8 39 0 1 1623 2 1 0 97 1 117 0 0 96 2 214 7 45 2 1 1353 2 0 0 98 2 2 0 0 170 45 337 5 40 1 0 2794 1 1 0 98 3 183 0 0 84 2 178 6 34 2 0 1944 3 0 0 97 4 0 0 87 269 104 221 4 34 12 0 2121 2 0 0 98 5 390 0 21 100 4 270 7 34 4 0 2283 1 0 0 98 6 161 0 3 270 106 125 10 23 4 0 1708 2 1 0 97 7 3 0 0 79 1 185 8 36 0 0 1251 2 0 0 98 March 4, 2026 at 01:32:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 111 217 0 25 142 0 18 0 1 0 99 1 14 0 0 175 41 235 0 21 184 0 11 0 1 0 99 2 0 0 0 75 3 149 1 19 125 0 1145 0 1 0 99 3 0 0 0 140 70 258 0 25 142 0 3 0 0 0 100 4 0 0 17 292 114 145 0 20 180 0 622 0 1 0 99 5 4 0 21 77 7 133 0 23 118 0 536 0 1 0 99 6 0 0 3 270 103 126 0 27 130 0 321 0 1 0 99 7 0 0 0 58 3 85 2 17 132 0 40 0 0 0 100 March 4, 2026 at 01:32:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 114 106 0 2 0 0 0 0 1 0 99 1 0 0 0 105 37 100 0 2 0 0 0 0 0 0 100 2 0 0 0 18 2 42 1 0 0 0 1135 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 3 211 104 4 0 0 2 0 594 0 0 0 100 5 0 0 21 13 5 12 1 0 0 0 527 0 0 0 100 6 0 0 3 212 102 6 0 0 3 0 303 0 0 0 100 7 0 0 0 28 8 28 0 1 0 0 11 0 0 0 100 March 4, 2026 at 01:32:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 106 114 0 4 0 0 4 0 1 0 99 1 0 0 0 112 46 108 0 3 0 0 10 0 0 0 100 2 0 0 0 18 2 40 1 0 1 0 1135 0 0 0 100 3 0 0 0 13 3 9 0 1 0 0 5 0 0 0 100 4 0 0 3 224 108 22 0 0 2 0 609 0 0 0 100 5 0 0 21 17 10 10 0 0 0 0 526 0 0 0 100 6 0 0 3 211 103 4 0 0 2 0 323 0 0 0 100 7 0 0 0 18 5 14 0 1 0 0 5 0 0 0 100 March 4, 2026 at 01:32:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 114 0 1 1 0 0 0 1 0 99 1 0 0 0 110 52 102 0 0 1 0 0 0 0 0 100 2 0 0 0 13 3 34 1 0 2 0 1135 0 0 0 100 3 0 0 0 21 3 10 0 1 1 0 0 0 0 0 100 4 0 0 7 212 104 6 0 1 1 0 594 0 0 0 100 5 0 0 21 18 6 14 1 1 1 0 528 0 0 0 100 6 0 0 7 210 102 2 0 0 2 0 300 0 0 0 100 7 0 0 0 20 6 12 0 0 1 0 5 0 0 0 100 March 4, 2026 at 01:32:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2121 101 130 0 3 10 0 88 0 1 0 99 1 0 0 0 127 51 136 0 7 8 0 38 0 0 0 100 2 0 0 7 22 3 52 1 3 1 1 1082 0 0 0 100 3 0 0 22 24 2 27 0 6 13 0 3 0 0 0 100 4 0 0 2 221 105 20 0 10 16 0 599 0 1 0 99 5 0 0 21 23 5 19 0 2 5 0 531 0 0 0 100 6 0 0 4 242 111 34 1 3 5 0 407 0 0 0 100 7 0 0 0 24 4 21 0 3 4 0 19 0 0 0 100 March 4, 2026 at 01:32:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 110 0 0 5 0 3 0 1 0 99 1 0 0 0 111 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 15 3 41 0 1 3 0 1046 0 0 0 100 3 0 0 7 18 1 15 0 2 0 0 0 0 0 0 100 4 0 0 3 214 104 4 0 0 1 0 594 0 0 0 100 5 0 0 21 17 6 18 1 1 0 0 526 0 0 0 100 6 0 0 3 231 111 24 0 1 0 0 309 0 0 0 100 7 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 101 110 0 1 0 0 3 0 1 0 99 1 0 0 0 125 51 104 0 0 0 0 0 0 0 0 100 2 0 0 0 37 5 210 1 1 1 0 1381 0 0 0 99 3 0 0 112 21 2 15 0 0 0 0 1 0 0 0 100 4 0 0 3 233 106 10 0 1 1 0 597 0 0 0 100 5 0 0 21 29 5 16 0 2 0 0 526 0 0 0 100 6 0 0 3 237 108 14 0 0 0 0 307 0 0 0 100 7 0 0 0 23 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 114 53 110 0 0 0 0 11 0 0 0 100 2 0 0 0 14 2 38 1 1 0 0 1047 0 0 0 100 3 0 0 7 12 1 8 0 0 0 0 5 0 0 0 100 4 0 0 3 228 106 31 0 2 1 0 607 0 0 0 100 5 0 0 21 27 11 18 1 0 0 0 526 0 0 0 100 6 0 0 3 221 107 14 0 1 0 0 305 0 0 0 100 7 0 0 0 10 0 8 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:32:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2749 103 1234 30 231 21 0 5529 6 3 0 91 1 23 0 0 737 28 1288 32 269 45 0 7619 6 2 0 92 2 1 0 0 657 8 1150 33 197 15 0 7398 5 2 0 92 3 33 0 0 600 9 1145 36 236 42 0 6962 6 2 0 92 4 3 0 325 786 121 1117 23 227 24 0 6814 6 2 0 92 5 3 0 21 587 5 1021 21 146 27 0 4786 5 2 0 94 6 31 0 3 815 109 1112 29 213 18 0 6396 5 2 0 93 7 3 0 0 509 2 918 14 128 37 0 4473 6 1 0 93 March 4, 2026 at 01:32:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 102 0 3 0 0 0 0 1 0 99 1 0 0 0 107 48 101 0 4 0 0 4 0 0 0 100 2 0 0 0 13 3 38 1 1 0 0 1046 0 0 0 100 3 0 0 0 22 8 18 0 1 0 0 9 0 0 0 100 4 0 0 3 213 104 6 0 0 2 0 594 0 0 0 100 5 0 0 21 25 4 28 1 1 0 0 527 0 0 0 100 6 0 0 3 211 103 4 0 0 2 0 299 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1491 0 112 2206 106 228 2 35 250 11 945 2 2 0 97 1 1914 0 0 127 4 218 3 48 244 11 453 0 1 0 98 2 41 0 2 193 17 308 1 41 252 11 1316 0 1 0 99 3 30 0 0 252 96 374 0 55 207 12 172 0 1 0 99 4 8 0 3 397 124 307 0 56 251 2 701 0 1 0 99 5 34 0 21 127 10 186 0 32 226 3 577 0 1 0 99 6 5 0 3 323 103 215 0 40 291 2 339 0 1 0 99 7 40 0 0 104 1 176 0 37 194 5 63 0 0 0 100 March 4, 2026 at 01:32:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 110 0 0 0 0 4 0 1 0 99 1 0 0 0 110 51 106 0 0 0 0 10 0 0 0 100 2 0 0 0 9 1 36 1 1 1 0 1131 0 0 0 100 3 0 0 0 17 6 12 0 0 0 0 5 0 0 0 100 4 0 0 3 211 104 4 0 0 1 0 594 0 0 0 100 5 0 0 21 22 4 20 1 1 0 0 527 0 0 0 100 6 0 0 3 211 103 4 0 0 2 0 307 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 110 51 108 0 0 0 0 17 0 0 0 100 2 0 0 0 18 5 44 1 0 0 0 1134 0 0 0 99 3 0 0 0 18 5 14 0 0 0 0 329 0 0 0 100 4 0 0 3 223 107 20 1 0 1 0 610 0 0 0 100 5 0 0 21 27 9 22 0 0 0 0 530 0 0 0 100 6 0 0 3 213 103 6 0 1 5 0 299 0 0 0 100 7 0 0 0 13 0 16 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:32:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 114 0 4 1 0 0 0 1 0 99 1 0 0 0 112 46 104 0 3 1 0 10 0 0 0 100 2 0 0 0 20 7 42 0 0 1 0 1134 0 0 0 100 3 0 0 0 14 3 4 0 0 1 0 0 0 0 0 100 4 0 0 7 212 104 4 0 0 3 0 594 0 0 0 100 5 0 0 21 25 6 22 1 1 0 0 527 0 0 0 100 6 0 0 7 212 103 4 0 0 3 0 299 0 0 0 100 7 0 0 0 11 1 4 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:32:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 2161 101 256 4 24 8 0 1505 2 1 0 97 1 6 0 0 163 41 378 6 34 6 0 1418 2 0 0 98 2 2 0 0 101 4 298 6 34 2 0 2543 1 1 0 98 3 20 0 0 88 9 404 1 32 0 0 1384 1 0 0 99 4 473 0 101 311 110 274 8 35 8 0 2165 1 1 0 98 5 412 0 21 122 4 324 3 32 9 0 2327 2 1 0 97 6 152 0 3 267 108 127 6 24 11 1 1729 3 1 0 96 7 0 0 0 87 2 280 3 31 3 0 1149 1 0 0 98 March 4, 2026 at 01:32:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 100 285 0 30 207 0 0 0 1 0 99 1 0 0 0 183 51 260 0 31 193 0 0 0 0 0 100 2 0 0 0 71 2 159 1 16 180 0 1135 0 1 0 99 3 0 0 0 164 86 144 0 29 133 0 13 0 0 0 100 4 0 0 3 267 105 112 1 24 129 0 594 0 0 0 100 5 0 0 21 88 4 158 1 20 152 0 528 0 0 0 100 6 0 0 3 278 103 140 0 26 166 0 295 0 0 0 100 7 0 0 0 109 0 205 0 23 138 0 0 0 0 0 100 March 4, 2026 at 01:32:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2134 116 99 0 8 10 2 90 0 1 0 99 1 0 0 0 115 33 117 0 8 14 1 20 0 0 0 100 2 0 0 7 34 5 64 3 4 4 0 1072 0 0 0 100 3 0 0 9 35 8 33 0 4 8 0 24 0 1 0 99 4 0 0 2 222 105 11 0 3 10 0 597 0 0 0 100 5 0 0 21 29 4 31 0 2 3 0 538 0 0 0 100 6 0 0 4 226 104 30 1 2 15 1 399 0 0 0 100 7 0 0 0 47 3 43 0 2 6 0 17 0 0 0 100 March 4, 2026 at 01:32:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 109 0 0 0 0 0 0 0 0 100 1 0 0 0 111 51 106 0 0 0 0 7 0 0 0 100 2 0 0 0 25 8 48 1 0 0 0 1050 0 0 0 100 3 0 0 7 12 2 10 0 1 0 0 5 0 0 0 100 4 0 0 2 221 106 18 0 0 9 0 606 0 0 0 100 5 0 0 21 28 9 20 1 0 0 0 526 0 0 0 100 6 0 0 4 212 103 4 0 0 4 0 300 0 0 0 100 7 0 0 0 11 0 6 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:32:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2106 102 107 0 3 0 0 0 0 1 0 99 1 0 0 0 127 50 104 0 3 0 0 21 0 0 0 100 2 0 0 0 38 7 46 0 1 0 0 1048 0 0 0 100 3 0 0 0 38 4 20 0 2 0 0 5 0 0 0 100 4 0 0 2 232 106 8 0 0 0 0 597 0 0 0 100 5 0 0 21 37 4 20 0 1 0 0 526 0 0 0 100 6 0 0 4 231 105 8 0 0 4 0 308 0 0 0 100 7 0 0 0 23 1 4 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:32:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 109 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 26 9 50 1 0 1 0 1056 0 0 0 100 3 0 0 0 12 2 6 0 1 0 0 0 0 0 0 100 4 0 0 3 218 104 16 0 1 5 0 597 0 0 0 100 5 0 0 21 21 4 16 1 0 0 0 527 0 0 0 100 6 0 0 3 212 103 6 0 1 4 0 301 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:32:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2996 105 1713 37 286 246 0 5962 6 4 0 90 1 1 0 0 905 20 1681 31 313 218 0 6969 6 3 0 91 2 18 0 0 844 10 1477 24 215 226 0 6552 6 3 0 91 3 2 0 0 837 101 1377 30 291 304 0 8391 6 3 0 91 4 1 0 367 882 113 1292 27 281 280 0 7201 6 3 0 91 5 2 0 21 741 14 1322 12 222 238 0 5279 6 2 0 91 6 1 0 3 890 110 1282 36 273 229 0 7403 5 2 0 92 7 1 0 0 633 27 1036 16 159 267 0 4199 4 2 0 94 March 4, 2026 at 01:32:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 102 0 3 0 0 20 0 1 0 99 1 0 0 0 19 7 14 0 0 0 0 8 0 0 0 100 2 0 0 0 8 1 32 1 0 0 0 1042 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 3 213 104 6 0 1 1 0 594 0 0 0 100 5 0 0 21 84 34 87 1 4 0 0 527 0 0 0 100 6 0 0 3 226 106 17 0 2 1 0 296 0 0 0 100 7 0 0 0 41 17 36 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:32:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 110 119 0 9 0 0 10 0 1 0 99 1 0 0 0 91 39 86 0 3 0 0 13 0 0 0 100 2 0 0 0 8 1 32 1 0 0 0 1042 0 0 0 100 3 0 0 0 15 4 14 0 1 0 0 10 0 0 0 100 4 0 0 3 223 107 20 1 0 5 0 610 0 0 0 100 5 0 0 21 22 10 14 0 1 0 0 525 0 0 0 100 6 0 0 3 210 102 2 0 0 3 0 302 0 0 0 100 7 0 0 0 41 8 38 0 5 0 0 0 0 0 0 100 March 4, 2026 at 01:32:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 1 0 10 0 1 0 99 1 0 0 0 118 56 110 0 0 1 0 5 0 0 0 100 2 0 0 0 11 2 32 1 0 1 0 1042 0 0 0 100 3 0 0 0 14 3 4 0 0 1 0 0 0 0 0 100 4 0 0 7 212 104 6 0 1 2 0 593 0 0 0 100 5 0 0 21 14 5 10 1 0 1 0 526 0 0 0 100 6 0 0 7 212 103 4 0 0 6 0 303 0 0 0 100 7 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:32:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2147 106 138 0 10 5 5 29 0 1 0 99 1 4 0 0 150 52 145 0 11 5 1 366 0 0 0 100 2 0 0 0 34 1 42 1 3 1 0 1133 0 0 0 100 3 6 0 0 39 4 29 0 6 1 0 57 0 0 0 100 4 3341 0 116 240 105 72 4 3 7 16 1857 2 1 0 97 5 110 0 21 56 4 89 0 16 14 14 786 0 0 0 100 6 55 0 5 250 103 74 0 12 17 12 478 0 0 0 100 7 38 0 0 50 2 79 0 14 5 16 168 0 0 0 100 March 4, 2026 at 01:32:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 111 0 2 0 0 20 0 1 0 99 1 0 0 0 109 45 106 0 2 2 0 0 0 0 0 100 2 0 0 0 15 2 48 0 1 4 0 1126 0 0 0 100 3 0 0 0 11 2 8 0 0 5 0 0 0 0 0 100 4 0 0 3 214 105 8 0 0 9 0 593 0 0 0 100 5 0 0 21 13 4 12 1 0 0 0 530 0 0 0 100 6 0 0 3 211 102 6 0 0 2 0 299 0 0 0 100 7 0 0 0 35 10 30 0 1 1 0 14 0 0 0 100 March 4, 2026 at 01:32:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 134 0 0 2192 102 339 9 31 1 2 1580 1 1 0 98 1 64 0 0 105 20 275 6 27 2 0 1306 1 0 0 99 2 120 0 0 78 2 167 6 27 2 0 2368 2 1 0 98 3 434 0 0 186 39 401 5 30 7 1 1913 2 1 0 97 4 6 0 101 305 107 302 6 26 3 0 2166 1 0 0 98 5 7 0 21 44 5 47 4 8 11 0 1289 3 0 0 97 6 376 0 3 245 102 45 10 13 8 2 1834 4 1 0 95 7 31 0 0 78 4 261 0 26 6 0 1417 1 0 0 99 March 4, 2026 at 01:32:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 8 0 0 0 0 5 0 0 0 100 2 0 0 0 10 1 34 1 0 0 0 1131 0 0 0 100 3 0 0 0 116 52 118 0 1 0 0 5 0 0 0 100 4 0 0 2 221 106 18 0 0 2 0 609 0 0 0 100 5 0 0 21 31 15 22 1 0 0 0 535 0 0 0 100 6 0 0 4 209 102 2 0 0 2 0 302 0 0 0 100 7 0 0 0 16 0 14 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:32:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2118 105 118 0 8 3 0 15 0 1 0 99 1 0 0 0 30 6 26 0 5 5 0 21 0 0 0 100 2 0 0 0 19 1 54 1 2 0 1 1080 0 0 0 100 3 1 0 7 123 47 118 1 5 7 0 34 0 0 0 100 4 0 0 3 229 105 29 0 3 5 2 661 0 0 0 100 5 0 0 31 34 9 42 0 7 18 1 621 0 1 0 99 6 0 0 3 225 104 24 0 6 14 0 312 0 0 0 100 7 0 0 0 21 1 24 0 6 16 0 1 0 0 0 100 March 4, 2026 at 01:33:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 109 0 0 0 0 0 0 1 0 99 1 0 0 0 134 61 128 0 0 0 0 21 0 0 0 100 2 0 0 0 9 1 32 1 0 0 0 1043 0 0 0 100 3 0 0 0 16 4 10 0 0 0 0 3 0 0 0 100 4 0 0 10 212 104 6 0 1 2 0 593 0 0 0 100 5 0 0 21 12 4 12 1 1 0 0 525 0 0 0 100 6 0 0 3 212 102 6 0 0 2 0 306 0 0 0 100 7 0 0 0 18 0 14 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:33:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2174 104 224 0 24 127 0 0 0 1 0 99 1 0 0 0 273 54 392 0 29 149 0 7 0 0 0 99 2 0 0 0 93 2 179 1 22 170 0 1040 0 1 0 99 3 0 0 0 171 77 159 0 31 191 0 5 0 0 0 100 4 0 0 3 296 107 141 0 33 174 0 598 0 1 0 99 5 0 0 21 84 4 117 0 22 110 0 527 0 1 0 99 6 0 0 3 283 102 119 0 28 128 0 295 0 0 0 100 7 0 0 0 87 1 121 0 24 118 0 1 0 0 0 100 March 4, 2026 at 01:33:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 29 11 24 0 1 0 0 14 0 0 0 100 2 0 0 0 110 51 134 1 1 2 0 1045 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 4 0 0 3 212 104 4 0 0 2 0 594 0 0 0 100 5 0 0 21 15 4 12 1 1 0 0 525 0 0 0 100 6 0 0 3 215 102 12 0 1 5 0 308 0 0 0 100 7 0 0 0 15 0 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:33:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2817 113 1383 43 232 27 0 6190 6 3 0 91 1 1 0 0 738 9 1283 29 250 24 0 6665 6 2 0 92 2 3 0 0 711 33 1182 26 178 22 0 6657 5 2 0 93 3 9 0 0 670 7 1243 37 240 26 0 7330 7 2 0 91 4 47 0 353 729 106 978 25 211 33 0 5953 5 2 0 93 5 2 0 14 633 9 1101 24 160 40 0 5659 5 2 0 93 6 30 0 3 846 105 1193 22 193 22 0 6402 4 2 0 94 7 14 0 7 455 1 762 14 112 33 1 4632 4 1 0 94 March 4, 2026 at 01:33:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 116 0 0 1 0 8 0 1 0 99 1 0 0 0 109 51 102 0 1 1 0 0 0 0 0 100 2 0 0 0 14 3 38 0 0 1 0 1062 0 0 0 100 3 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 4 0 0 7 212 104 4 0 0 1 0 595 0 0 0 100 5 0 0 14 14 4 8 0 0 1 0 266 0 0 0 100 6 0 0 7 212 102 6 0 2 2 0 297 0 0 0 100 7 0 0 7 26 4 24 1 1 1 0 261 0 0 0 100 March 4, 2026 at 01:33:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 108 132 0 1 0 0 13 0 1 0 99 1 0 0 0 110 52 104 0 0 0 0 1 0 0 0 100 2 0 0 0 12 2 38 1 0 1 0 1054 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 5 0 0 0 100 4 0 0 3 213 105 6 0 0 5 0 596 0 0 0 100 5 0 0 14 10 3 10 0 1 0 0 266 0 0 0 100 6 0 0 3 209 102 2 0 0 5 0 297 0 0 0 100 7 0 0 7 18 2 14 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:33:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 104 280 2 31 259 0 3 0 2 0 98 1 0 0 0 190 51 277 0 34 227 0 0 0 1 0 99 2 0 0 0 85 2 190 1 33 203 0 1051 0 1 0 99 3 0 0 0 193 104 374 0 50 196 0 2 0 1 0 99 4 0 0 3 288 105 166 0 42 225 0 594 0 1 0 99 5 0 0 14 98 3 197 1 30 234 0 266 0 1 0 99 6 0 0 3 307 102 222 0 45 279 0 307 0 1 0 99 7 0 0 7 95 3 180 0 36 238 0 260 0 1 0 99 March 4, 2026 at 01:33:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 126 0 0 2150 101 176 0 8 3 17 109 0 1 0 99 1 17 0 3 150 51 156 0 9 8 4 155 0 0 0 100 2 19 0 0 42 2 71 2 8 7 4 1233 0 0 0 99 3 615 0 0 59 11 57 1 9 6 2 1276 1 1 0 98 4 1849 0 2 254 106 45 2 4 8 5 941 0 1 0 99 5 21 0 14 43 3 49 0 9 7 6 399 0 0 0 100 6 6 0 4 237 102 30 0 6 7 3 418 0 0 0 100 7 899 0 120 35 2 65 0 7 7 10 370 0 0 0 99 March 4, 2026 at 01:33:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 113 0 2 0 0 5 0 1 0 99 1 0 0 0 110 49 108 0 3 0 0 5 0 0 0 100 2 0 0 0 28 8 56 0 1 1 0 1133 0 0 0 100 3 0 0 0 9 1 6 0 1 0 0 20 0 0 0 100 4 0 0 3 220 106 18 0 0 3 0 606 0 0 0 100 5 0 0 14 17 10 8 0 0 0 0 266 0 0 0 100 6 0 0 3 209 102 2 0 0 2 0 300 0 0 0 100 7 0 0 7 21 2 18 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:33:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 138 0 0 2166 102 186 7 21 3 0 1391 2 1 0 96 1 95 0 0 150 34 224 3 30 0 0 1851 2 1 0 97 2 305 0 0 116 7 254 3 36 2 1 2702 1 1 0 98 3 297 0 0 122 3 390 2 30 5 1 2085 2 1 0 98 4 80 0 73 296 107 198 4 34 4 0 2043 1 0 0 98 5 46 0 14 112 3 278 4 30 10 0 2087 1 0 0 98 6 0 0 3 290 119 92 5 12 3 0 734 3 0 0 96 7 0 0 7 101 3 337 3 33 1 0 2031 1 0 0 99 March 4, 2026 at 01:33:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 90 0 1 0 0 0 0 1 0 99 1 0 0 0 115 47 111 0 4 0 0 7 0 0 0 100 2 0 0 0 26 7 50 1 1 0 0 1133 0 0 0 100 3 0 0 0 26 6 21 0 2 2 0 18 0 0 0 100 4 0 0 17 216 105 8 1 1 3 0 605 0 0 0 100 5 0 0 14 14 2 12 1 1 0 0 298 0 0 0 100 6 0 0 3 223 106 18 0 2 4 0 325 0 0 0 100 7 0 0 7 21 2 16 0 2 0 0 262 0 0 0 100 March 4, 2026 at 01:33:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2178 100 196 0 37 165 0 0 0 1 0 99 1 0 0 0 157 2 233 0 34 155 0 28 0 1 0 99 2 0 0 0 194 52 303 1 23 149 0 1050 0 1 0 99 3 0 0 0 186 94 178 2 29 145 2 81 0 1 0 99 4 0 0 10 382 105 352 0 26 162 0 620 0 1 0 99 5 0 0 14 82 2 153 1 21 142 1 365 0 1 0 99 6 0 0 3 310 110 186 0 25 186 0 326 0 1 0 99 7 0 0 15 94 3 168 0 29 173 0 261 0 1 0 99 March 4, 2026 at 01:33:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 109 0 3 0 0 0 0 1 0 99 1 0 0 0 46 17 38 0 2 0 0 0 0 0 0 100 2 0 0 0 89 36 108 1 3 1 0 1040 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 4 0 0 3 214 104 6 0 0 1 0 594 0 0 0 100 5 0 0 21 12 2 8 0 1 0 0 266 0 0 0 100 6 0 0 3 229 111 20 0 0 3 0 322 0 0 0 100 7 0 0 7 10 2 8 1 2 0 0 263 0 0 0 100 March 4, 2026 at 01:33:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2106 100 91 0 1 0 0 0 0 1 0 99 1 0 0 0 112 44 90 0 1 0 0 8 0 0 0 100 2 0 0 0 51 6 62 1 3 0 0 1042 0 0 0 100 3 0 0 0 34 3 18 0 1 0 0 19 0 0 0 100 4 0 0 3 237 107 18 0 0 6 0 602 0 0 0 100 5 0 0 14 40 9 18 1 1 1 0 266 0 0 0 100 6 0 0 3 240 109 18 0 1 4 0 309 0 0 0 100 7 0 0 7 47 6 30 0 4 0 0 260 0 0 0 100 March 4, 2026 at 01:33:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 102 0 3 1 0 0 0 1 0 99 1 0 0 0 17 4 8 0 2 1 0 0 0 0 0 100 2 0 0 0 115 48 136 0 4 1 0 1041 0 0 0 100 3 0 0 0 11 2 4 0 0 1 0 3 0 0 0 100 4 0 0 4 214 104 4 0 0 2 0 595 0 0 0 100 5 0 0 14 13 3 10 0 2 0 0 266 0 0 0 100 6 0 0 2 235 111 30 0 1 3 0 309 0 0 0 100 7 0 0 7 21 5 12 0 1 1 0 261 0 0 0 100 March 4, 2026 at 01:33:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2682 103 1161 23 196 19 0 4584 5 2 0 93 1 29 0 0 591 3 1075 35 247 21 0 5763 6 2 0 92 2 37 0 0 613 43 947 23 161 21 1 4204 5 2 0 93 3 26 0 0 518 4 935 34 201 18 0 6539 4 2 0 94 4 7 0 268 695 108 933 13 198 23 0 5533 4 2 0 94 5 1 0 14 471 7 829 14 152 3 0 5093 3 2 0 95 6 35 0 4 734 110 984 22 190 21 0 5792 4 2 0 94 7 5 0 7 428 2 734 13 105 20 0 3852 4 1 0 94 March 4, 2026 at 01:33:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2384 103 631 9 91 243 0 1584 1 2 0 97 1 0 0 0 299 34 506 7 101 238 0 1180 1 1 0 98 2 0 0 0 227 1 429 15 66 204 0 1997 1 1 0 98 3 0 0 0 345 98 450 12 85 270 0 1492 1 1 0 97 4 0 0 73 409 115 371 6 78 241 0 1609 1 1 0 98 5 0 0 14 199 4 346 10 62 197 0 1544 1 1 0 98 6 0 0 3 379 102 369 4 73 251 0 1161 1 1 0 98 7 0 0 7 156 3 291 2 53 263 0 1227 1 1 0 98 March 4, 2026 at 01:33:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 2145 101 128 0 7 4 4 64 0 1 0 99 1 6 0 0 41 3 37 0 10 2 2 126 0 0 0 100 2 7 0 0 29 0 15 0 5 5 1 50 0 0 0 100 3 8 0 0 137 48 127 0 6 2 3 59 0 0 0 100 4 2761 0 116 265 118 94 2 7 7 14 1051 1 1 0 98 5 110 0 16 68 4 96 1 14 18 10 728 0 0 0 99 6 30 0 3 252 102 92 0 8 11 9 1234 0 0 0 100 7 616 0 7 47 2 54 2 5 10 7 1215 1 0 0 98 March 4, 2026 at 01:33:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 112 100 0 7 0 0 0 0 0 0 100 1 0 0 0 43 7 40 0 4 0 0 20 0 0 0 100 2 0 0 0 70 31 66 0 2 0 0 0 0 0 0 100 3 0 0 0 23 6 20 0 1 0 0 9 0 0 0 100 4 0 0 2 247 111 42 1 4 2 0 612 0 0 0 100 5 0 0 14 22 8 12 0 1 5 0 566 0 0 0 100 6 0 0 4 212 103 34 1 0 1 0 1147 0 0 0 100 7 0 0 7 11 2 8 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:33:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 16 3 16 0 1 0 0 0 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 13 1 8 0 0 0 0 4 0 0 0 100 4 0 0 3 234 111 28 0 0 5 0 605 0 0 0 100 5 0 0 14 10 3 8 0 0 8 0 573 0 0 0 100 6 0 0 3 214 104 36 1 0 0 0 1125 0 0 0 100 7 0 0 7 11 3 8 0 1 0 0 261 0 0 0 100 March 4, 2026 at 01:33:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 1 0 0 0 0 1 0 99 1 0 0 0 16 3 14 0 0 0 0 20 0 0 0 100 2 0 0 0 121 54 122 1 1 0 0 7 0 0 0 100 3 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 4 0 0 3 221 106 12 1 0 3 0 916 0 0 0 100 5 0 0 14 10 3 8 0 0 4 0 565 0 0 0 100 6 0 0 3 210 102 32 1 0 0 0 1124 0 0 0 100 7 0 0 7 8 2 4 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:33:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 86 0 0 2265 104 530 21 65 150 0 1632 1 2 0 98 1 191 0 0 220 8 373 8 51 162 0 1212 2 1 0 97 2 95 0 0 244 46 420 11 58 137 1 2138 3 1 0 96 3 78 0 0 226 73 339 11 59 167 0 1590 1 1 0 98 4 113 0 72 334 105 331 10 57 160 0 2175 1 1 0 98 5 50 0 14 134 3 356 12 40 113 0 1613 2 1 0 97 6 418 0 4 356 102 310 15 59 134 2 3046 2 1 0 97 7 6 0 7 105 3 195 8 36 148 0 1295 2 1 0 98 March 4, 2026 at 01:33:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 110 0 1 0 0 14 0 1 0 99 1 0 0 0 121 56 115 1 1 0 0 24 0 0 0 100 2 0 0 0 16 2 8 0 3 1 0 15 0 0 0 100 3 0 0 0 17 2 10 0 1 0 0 11 0 0 0 100 4 0 0 17 219 105 18 0 1 5 0 595 0 0 0 100 5 4 0 14 11 2 12 0 1 6 0 576 0 0 0 100 6 0 0 3 223 106 46 1 1 1 0 1149 0 0 0 99 7 0 0 7 16 3 12 0 1 0 0 270 0 0 0 100 March 4, 2026 at 01:33:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 114 0 3 0 0 0 0 1 0 99 1 0 0 0 98 44 92 0 2 0 0 7 0 0 0 100 2 0 0 0 20 7 16 0 1 0 0 0 0 0 0 100 3 0 0 0 15 2 12 0 1 0 0 5 0 0 0 100 4 0 0 3 223 107 22 0 0 1 0 610 0 0 0 100 5 0 0 14 20 9 18 0 2 5 0 567 0 0 0 100 6 0 0 3 223 108 46 1 0 1 0 1139 0 0 0 100 7 0 0 7 12 2 8 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:33:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 100 57 0 5 10 0 0 0 1 0 99 1 0 0 0 120 50 123 0 4 9 0 38 0 0 0 100 2 0 0 0 88 6 81 1 3 6 1 90 0 0 0 100 3 0 0 0 29 3 27 0 4 8 0 25 0 0 0 100 4 0 0 7 223 105 21 0 6 11 0 615 0 0 0 100 5 0 0 21 34 9 32 0 5 7 0 586 0 0 0 100 6 0 0 31 226 105 49 1 3 8 0 1065 0 1 0 99 7 0 0 7 22 4 18 1 4 11 0 336 0 0 0 100 March 4, 2026 at 01:33:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 115 53 106 0 0 0 0 1 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 14 2 10 0 1 0 0 0 0 0 0 100 4 0 0 3 214 105 6 0 0 11 0 596 0 0 0 100 5 0 0 14 26 8 22 2 1 2 0 568 0 0 0 100 6 0 0 10 218 102 47 1 3 1 0 1044 0 0 0 100 7 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:33:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 104 190 0 12 73 0 0 0 1 0 99 1 0 0 0 218 53 291 0 23 64 0 0 0 0 0 100 2 0 0 0 65 2 83 0 12 64 0 0 0 0 0 100 3 0 0 0 133 56 112 0 23 73 0 0 0 0 0 100 4 0 0 3 297 108 143 1 19 103 0 600 0 0 0 100 5 0 0 14 84 12 108 0 16 70 0 587 0 0 0 99 6 0 0 115 267 103 112 0 26 71 0 0 0 0 0 100 7 0 0 7 77 3 133 1 15 62 0 1304 0 0 0 99 March 4, 2026 at 01:33:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2117 109 116 0 3 1 0 1 0 1 0 99 1 0 0 0 113 45 108 0 6 1 0 1 0 0 0 100 2 0 0 0 11 0 8 0 2 0 0 3 0 0 0 100 3 0 0 0 18 4 12 0 1 0 0 1 0 0 0 100 4 0 0 3 222 108 14 0 1 4 0 600 0 0 0 100 5 0 0 14 28 10 22 0 0 0 0 573 0 0 0 100 6 0 0 3 214 103 6 0 1 0 0 3 0 0 0 100 7 0 0 14 13 3 38 1 0 0 0 1304 0 0 0 100 March 4, 2026 at 01:33:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 2828 105 1362 41 293 31 0 6434 6 3 0 91 1 0 0 0 823 8 1470 46 276 35 0 7403 6 2 0 92 2 13 0 0 686 2 1151 21 195 21 0 5578 6 2 0 92 3 19 0 0 729 34 1291 39 256 74 1 7570 6 2 0 92 4 4 0 352 833 119 1187 16 237 44 0 6432 6 2 0 92 5 1 0 14 605 10 934 20 160 37 0 5089 5 2 0 93 6 2 0 4 744 103 1009 22 217 30 0 6558 5 2 0 93 7 0 0 7 545 4 996 20 156 28 0 5992 5 2 0 93 March 4, 2026 at 01:33:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 3 0 0 0 0 1 0 99 1 0 0 0 13 3 10 0 0 1 0 54 0 0 0 100 2 0 0 0 10 0 6 0 0 2 0 0 0 0 0 100 3 3 0 0 132 59 132 0 2 0 0 15 0 0 0 100 4 0 0 3 217 105 10 0 1 2 0 606 0 0 0 100 5 0 0 14 9 2 6 1 0 2 0 563 0 0 0 100 6 0 0 3 217 103 8 0 0 0 0 2 0 0 0 100 7 0 0 7 12 4 40 0 1 0 0 1305 0 0 0 100 March 4, 2026 at 01:33:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 0 0 0 13 3 10 0 0 0 0 9 0 0 0 100 2 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 3 0 0 0 121 57 116 0 0 0 0 5 0 0 0 100 4 0 0 2 218 107 12 0 0 0 0 611 0 0 0 100 5 0 0 14 10 2 8 0 0 2 0 559 0 0 0 100 6 0 0 4 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 7 13 3 40 1 0 0 0 1317 0 0 0 100 March 4, 2026 at 01:33:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 102 270 0 33 251 0 1 0 1 0 99 1 0 0 0 151 2 305 0 33 228 0 3 0 1 0 99 2 0 0 0 82 1 149 0 28 199 0 0 0 1 0 99 3 0 0 0 284 134 295 1 36 261 0 9 0 1 0 99 4 0 0 3 302 108 186 0 35 248 0 606 0 1 0 99 5 0 0 14 87 2 174 0 33 227 0 576 0 1 0 99 6 0 0 3 271 101 142 0 35 255 0 0 0 1 0 99 7 0 0 7 86 5 182 1 23 185 0 1296 0 1 0 99 March 4, 2026 at 01:33:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 1 0 0 0 0 1 0 99 1 0 0 0 12 2 10 0 0 0 0 8 0 0 0 100 2 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 99 45 94 0 1 0 0 320 0 0 0 100 4 0 0 3 241 117 34 0 1 5 0 596 0 0 0 100 5 0 0 14 15 3 18 0 1 8 0 567 0 0 0 100 6 0 0 3 220 106 12 0 0 0 0 8 0 0 0 100 7 0 0 7 14 4 40 2 1 1 0 1295 0 0 0 100 March 4, 2026 at 01:33:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 1 0 99 1 0 0 0 11 2 10 0 1 0 0 7 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 109 50 104 0 0 0 0 5 0 0 0 100 4 0 0 3 231 110 32 0 1 1 0 622 0 0 0 100 5 0 0 14 15 8 6 1 0 1 0 555 0 0 0 100 6 0 0 3 216 105 8 1 0 0 0 5 0 0 0 100 7 0 0 7 15 3 42 0 0 0 0 1295 0 0 0 100 March 4, 2026 at 01:33:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 657 0 3 2147 106 145 2 13 4 9 954 1 1 0 98 1 43 0 0 50 3 51 0 7 10 7 150 0 0 0 100 2 9 0 0 38 1 27 0 6 5 2 67 0 0 0 100 3 9 0 0 42 4 35 0 8 4 2 69 0 0 0 100 4 3 0 3 241 107 27 1 3 3 2 656 0 0 0 100 5 2714 0 127 35 6 62 2 6 7 11 939 1 1 0 98 6 85 0 3 269 107 92 0 15 10 13 169 0 0 0 100 7 30 0 7 145 45 190 1 15 9 7 1540 0 0 0 99 March 4, 2026 at 01:33:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 112 108 0 7 0 0 0 0 1 0 99 1 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 4 0 0 3 215 105 8 1 0 3 0 606 0 0 0 100 5 0 0 14 8 2 6 0 0 4 0 563 0 0 0 100 6 0 0 3 219 106 12 0 0 0 0 6 0 0 0 100 7 0 0 7 116 41 148 1 8 1 0 1378 0 0 0 100 March 4, 2026 at 01:33:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 114 117 0 4 0 0 0 0 1 0 99 1 0 0 0 21 5 20 0 1 0 0 11 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 25 7 24 0 0 0 0 9 0 0 0 100 4 0 0 2 217 106 12 0 0 2 0 608 0 0 0 100 5 0 0 14 11 2 10 0 0 3 0 569 0 0 0 100 6 0 0 4 215 104 10 0 0 1 0 323 0 0 0 100 7 0 0 7 107 37 130 3 2 2 0 1377 0 0 0 99 March 4, 2026 at 01:33:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 120 0 1 0 0 1 0 1 0 99 1 0 0 0 115 53 114 0 0 0 0 10 0 0 0 100 2 0 0 0 8 0 4 0 1 0 0 9 0 0 0 100 3 0 0 0 28 10 24 0 0 0 0 12 0 0 0 100 4 0 0 3 214 105 8 0 0 2 0 606 0 0 0 100 5 0 0 14 10 3 8 1 0 2 0 568 0 0 0 100 6 0 0 3 211 103 2 0 0 0 0 15 0 0 0 100 7 0 0 7 13 3 38 1 0 0 0 1379 0 0 0 100 March 4, 2026 at 01:33:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 114 0 0 0 0 0 0 1 0 99 1 20 0 0 122 55 124 0 1 0 0 16 0 0 0 100 2 0 0 0 8 0 4 0 0 0 0 1 0 0 0 100 3 1 0 0 26 8 22 0 0 0 0 15 0 0 0 100 4 0 0 3 223 106 23 0 1 3 0 617 0 0 0 100 5 24 0 14 15 8 10 0 1 2 0 561 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 7 16 3 44 1 1 0 0 1373 0 0 0 100 March 4, 2026 at 01:33:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 106 108 0 1 0 0 0 0 0 0 100 1 0 0 0 111 47 106 0 2 0 0 0 0 0 0 100 2 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 3 0 0 0 24 8 18 0 0 0 0 6 0 0 0 100 4 0 0 3 214 105 8 0 0 4 0 606 0 0 0 100 5 0 0 14 8 2 6 0 0 2 0 565 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 7 0 0 7 14 4 38 1 0 0 0 1369 0 0 0 99 March 4, 2026 at 01:33:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 112 112 0 2 0 0 0 0 1 0 99 1 0 0 0 113 41 108 0 1 0 0 7 0 0 0 100 2 0 0 0 12 0 12 0 1 0 0 0 0 0 0 100 3 0 0 0 23 7 18 0 0 0 0 326 0 0 0 100 4 0 0 3 212 104 8 0 0 4 0 603 0 0 0 100 5 0 0 14 8 2 6 0 0 6 0 585 0 0 0 100 6 0 0 3 215 104 10 0 0 0 0 5 0 0 0 100 7 0 0 7 10 3 36 1 0 1 0 1371 0 0 0 100 March 4, 2026 at 01:33:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 116 0 0 1 0 1 0 1 0 99 1 0 0 0 111 52 106 1 0 0 0 3 0 0 0 100 2 0 0 0 9 0 6 0 1 0 0 0 0 0 0 100 3 0 0 0 19 3 20 0 1 1 0 0 0 0 0 100 4 0 0 3 214 105 10 0 0 2 0 606 0 0 0 100 5 0 0 14 9 2 8 1 0 6 0 560 0 0 0 100 6 0 0 3 219 106 14 0 0 0 0 9 0 0 0 100 7 0 0 7 18 4 46 1 0 3 0 1373 0 0 0 100 March 4, 2026 at 01:33:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 109 108 0 3 0 0 0 0 1 0 99 1 0 0 0 112 43 108 0 3 0 0 3 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 13 3 10 0 1 0 0 0 0 0 0 100 4 0 0 3 214 105 8 0 0 13 0 605 0 0 0 100 5 0 0 14 9 2 6 0 0 2 0 555 0 0 0 100 6 0 0 3 224 109 16 0 0 0 0 11 0 0 0 100 7 0 0 7 11 3 36 1 0 0 0 1371 0 0 0 100 March 4, 2026 at 01:33:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 112 52 108 1 0 0 0 7 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 17 3 16 0 1 0 0 5 0 0 0 100 4 0 0 3 228 107 32 0 1 1 0 620 0 0 0 100 5 0 0 14 15 7 8 0 0 1 0 565 0 0 0 100 6 0 0 3 216 105 8 1 0 0 0 5 0 0 0 100 7 0 0 7 14 3 40 1 0 1 0 1371 0 0 0 100 March 4, 2026 at 01:33:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 244 0 0 2178 103 232 1 32 11 0 1644 2 1 0 97 1 10 0 0 185 53 222 3 22 7 0 866 2 0 0 98 2 0 0 0 53 1 87 1 13 1 0 770 2 0 0 98 3 266 0 0 64 4 92 4 15 5 0 1662 2 1 0 97 4 343 0 101 267 106 160 4 26 8 1 2126 2 0 0 98 5 14 0 14 45 3 121 2 12 12 0 1801 2 0 0 98 6 194 0 3 270 104 144 0 26 2 0 1523 1 0 0 99 7 56 0 7 71 9 132 3 26 2 0 2774 2 1 0 98 March 4, 2026 at 01:33:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 110 118 0 3 0 0 9 0 1 0 99 1 0 0 0 111 48 104 0 4 0 0 3 0 0 0 100 2 0 0 0 13 2 7 0 3 0 0 0 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 4 0 0 3 220 107 14 0 0 3 0 600 0 0 0 100 5 0 0 14 9 3 6 1 0 3 0 566 0 0 0 100 6 0 0 3 211 102 2 0 0 0 0 1 0 0 0 100 7 0 0 7 10 3 38 0 1 0 0 1383 0 0 0 100 March 4, 2026 at 01:33:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 110 219 0 17 137 0 12 0 1 0 99 1 0 0 0 132 3 248 0 30 159 0 3 0 0 0 100 2 0 0 0 73 1 133 0 21 183 0 0 0 0 0 100 3 0 0 0 242 119 246 0 28 168 0 0 0 1 0 99 4 0 0 3 281 104 152 0 26 172 0 594 0 1 0 99 5 0 0 14 65 2 113 0 19 122 0 570 0 0 0 99 6 0 0 3 278 101 154 0 28 174 0 0 0 0 0 100 7 0 0 7 61 3 147 1 23 168 0 1383 0 1 0 99 March 4, 2026 at 01:33:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 110 122 0 1 0 0 15 0 0 0 99 1 0 0 0 17 2 12 0 1 0 0 0 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 117 54 110 0 0 0 0 1 0 0 0 100 4 0 0 3 215 106 8 0 0 1 0 596 0 0 0 100 5 0 0 14 11 3 10 0 1 2 0 558 0 0 0 100 6 0 0 3 209 101 2 0 1 0 0 0 0 0 0 100 7 0 0 7 16 3 46 1 1 0 0 1384 0 0 0 100 March 4, 2026 at 01:33:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 105 121 1 2 7 0 25 0 1 0 99 1 0 0 0 36 3 36 1 3 0 0 48 0 0 0 100 2 0 0 0 25 1 30 0 6 7 2 86 0 0 0 100 3 0 0 7 130 53 136 0 5 12 0 19 0 1 0 99 4 0 0 3 231 106 40 0 11 15 1 701 0 0 0 100 5 0 0 52 22 9 18 0 5 12 0 582 0 0 0 100 6 0 0 3 223 102 15 0 5 8 0 11 0 0 0 100 7 0 0 7 33 8 54 2 0 2 0 1309 0 0 0 99 March 4, 2026 at 01:33:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 114 0 5 0 0 0 0 1 0 99 1 0 0 0 62 21 54 0 3 0 0 21 0 0 0 100 2 0 0 0 13 2 8 0 1 0 0 0 0 0 0 100 3 0 0 0 68 30 60 0 1 0 0 0 0 0 0 100 4 0 0 3 214 105 6 0 0 3 0 596 0 0 0 100 5 0 0 14 16 2 13 1 1 3 0 564 0 0 0 100 6 0 0 10 213 102 4 0 1 0 0 1 0 0 0 100 7 0 0 7 30 10 54 1 1 0 0 1301 0 0 0 99 March 4, 2026 at 01:33:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 106 107 0 4 0 0 0 0 1 0 99 1 0 0 0 63 14 48 0 3 0 0 0 0 0 0 100 2 0 0 0 96 32 72 0 1 0 0 0 0 0 0 100 3 0 0 0 30 3 8 0 0 0 0 0 0 0 0 100 4 0 0 3 227 104 4 0 0 1 0 594 0 0 0 100 5 0 0 126 14 4 13 0 0 3 0 564 0 0 0 100 6 0 0 3 226 101 2 0 0 0 0 0 0 0 0 100 7 0 0 7 44 11 54 1 1 1 0 1309 0 0 0 100 March 4, 2026 at 01:33:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 112 0 1 0 0 1 0 0 0 100 1 0 0 0 115 52 108 0 0 0 0 4 0 0 0 100 2 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 15 3 10 0 0 1 0 0 0 0 0 100 4 0 0 3 217 106 10 0 0 4 0 597 0 0 0 100 5 0 0 21 13 3 12 0 0 10 0 565 0 0 0 100 6 0 0 3 209 101 2 0 0 2 0 0 0 0 0 100 7 0 0 7 35 12 33 0 0 0 0 818 0 0 0 100 March 4, 2026 at 01:33:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 2841 104 1362 41 238 39 0 5697 6 3 0 91 1 0 0 0 834 23 1431 48 254 33 0 6927 7 2 0 91 2 0 0 0 755 4 1267 30 194 29 0 5204 5 2 0 93 3 0 0 0 651 6 1202 50 237 26 1 7756 7 2 0 91 4 0 0 339 824 131 1182 39 242 31 0 6893 5 2 0 92 5 0 0 14 583 13 930 15 131 16 0 5260 4 1 0 95 6 0 0 3 763 103 1019 37 215 35 1 6473 6 2 0 92 7 0 0 7 547 15 942 19 127 46 0 4841 5 1 0 94 March 4, 2026 at 01:33:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 104 0 4 0 0 0 0 1 0 99 1 0 0 0 109 46 104 0 4 0 0 7 0 0 0 100 2 0 0 0 13 2 9 0 3 0 0 0 0 0 0 100 3 0 0 0 30 7 30 0 1 0 0 11 0 0 0 100 4 0 0 2 234 108 30 1 3 1 0 621 0 0 0 100 5 0 0 14 17 8 10 1 1 2 0 561 0 0 0 100 6 0 0 4 209 102 0 0 0 0 0 0 0 0 0 100 7 0 0 7 14 3 40 1 0 0 0 1293 0 0 0 100 March 4, 2026 at 01:33:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 107 113 0 3 1 0 0 0 1 0 99 1 0 0 0 36 15 30 0 1 1 0 0 0 0 0 100 2 0 0 0 83 33 72 0 2 1 0 0 0 0 0 100 3 0 0 0 21 6 16 0 2 0 0 4 0 0 0 100 4 0 0 3 212 104 6 0 0 1 0 604 0 0 0 100 5 0 0 14 18 7 14 0 0 7 0 578 0 0 0 100 6 0 0 3 208 101 2 0 0 1 0 1 0 0 0 100 7 0 0 7 16 5 40 1 0 1 0 1295 0 0 0 100 March 4, 2026 at 01:33:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 2 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 23 7 18 0 1 0 0 5 0 0 0 100 4 0 0 2 222 106 20 1 1 4 0 607 0 0 0 100 5 0 0 14 8 2 6 0 0 8 0 567 0 0 0 100 6 0 0 4 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 7 10 3 38 0 1 0 0 1294 0 0 0 100 March 4, 2026 at 01:33:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2239 106 323 1 51 233 4 105 0 1 0 99 1 14 0 0 218 44 314 1 52 247 9 64 0 1 0 99 2 5 0 0 116 2 205 1 41 237 1 34 0 1 0 99 3 1505 0 113 219 105 240 2 47 246 17 1297 2 2 0 97 4 142 0 3 347 108 246 1 42 266 13 768 0 1 0 99 5 21 0 17 126 5 233 1 41 235 6 736 0 1 0 99 6 1839 0 3 342 101 260 3 52 275 6 412 0 1 0 98 7 17 0 7 222 3 447 2 45 231 6 1340 0 1 0 99 March 4, 2026 at 01:33:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 0 0 0 1 0 1 0 99 1 0 0 0 12 2 8 0 0 0 0 3 0 0 0 100 2 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 3 0 0 0 15 4 10 0 0 0 0 1 0 0 0 100 4 0 0 2 224 110 18 0 0 11 0 605 0 0 0 100 5 0 0 14 15 3 12 1 1 9 0 577 0 0 0 100 6 0 0 4 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 7 11 3 38 1 1 0 0 1380 0 0 0 100 March 4, 2026 at 01:33:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 256 0 7 2164 107 282 7 34 1 0 1697 2 1 0 97 1 98 0 0 111 9 282 2 37 3 0 1422 1 0 0 98 2 0 0 0 138 17 194 4 26 3 0 1565 1 0 0 99 3 56 0 0 118 28 147 4 23 3 0 920 2 0 0 98 4 192 0 73 268 111 130 8 24 11 1 1816 2 0 0 98 5 134 0 14 82 9 157 5 22 5 2 2251 1 1 0 98 6 2 0 3 284 103 287 2 32 4 0 1669 1 0 0 99 7 237 0 7 45 3 99 5 12 1 3 2974 3 1 0 96 March 4, 2026 at 01:33:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 107 110 0 4 0 0 0 0 1 0 99 1 0 0 0 108 51 104 0 1 0 0 8 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 27 2 16 0 1 0 0 0 0 0 0 100 4 0 0 3 215 105 6 0 0 1 0 597 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 556 0 0 0 100 6 0 0 3 213 102 4 0 0 1 0 1 0 0 0 100 7 0 0 7 23 5 54 1 1 0 0 1384 0 0 0 100 March 4, 2026 at 01:34:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2128 114 116 0 7 6 0 3 0 1 0 99 1 0 0 14 131 46 133 3 10 8 1 102 0 0 0 100 2 0 0 0 27 0 24 0 7 4 0 37 0 0 0 100 3 0 0 0 32 5 32 1 6 2 0 34 0 0 0 100 4 0 0 3 223 104 17 0 4 9 0 619 0 0 0 100 5 0 0 23 20 2 23 0 5 12 0 640 0 1 0 99 6 0 0 3 220 101 16 0 5 14 0 8 0 0 0 100 7 0 0 7 22 3 51 1 2 12 1 1423 0 0 0 100 March 4, 2026 at 01:34:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 100 236 0 16 146 0 0 0 1 0 99 1 0 0 0 186 54 254 0 20 143 0 1 0 0 0 100 2 0 0 0 65 1 114 0 19 119 0 3 0 0 0 100 3 0 0 0 155 83 127 0 27 127 0 10 0 0 0 100 4 0 0 2 275 105 131 1 22 152 0 601 0 0 0 100 5 0 0 14 71 3 129 1 20 153 0 567 0 0 0 99 6 0 0 11 277 102 146 0 33 142 0 0 0 0 0 100 7 0 0 7 140 4 289 1 25 88 0 1297 0 1 0 99 March 4, 2026 at 01:34:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 132 109 0 3 0 0 0 0 1 0 99 1 0 0 112 120 21 119 0 4 0 0 0 0 0 0 100 2 0 0 0 27 0 4 0 1 0 0 0 0 0 0 100 3 0 0 0 26 2 4 0 0 0 0 0 0 0 0 100 4 0 0 3 244 112 22 0 1 1 0 605 0 0 0 100 5 0 0 14 29 4 10 0 0 1 0 567 0 0 0 100 6 0 0 3 226 101 2 0 0 0 0 0 0 0 0 100 7 0 0 14 28 3 38 1 1 0 0 1293 0 0 0 100 March 4, 2026 at 01:34:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 116 0 1 0 0 0 0 1 0 99 1 0 0 7 115 53 112 0 0 0 0 6 0 0 0 100 2 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 8 0 0 0 0 7 0 0 0 100 4 1 0 3 243 116 44 0 0 4 0 628 0 0 0 100 5 0 0 14 24 11 12 0 0 1 0 572 0 0 0 100 6 4 0 3 212 102 6 0 1 0 0 27 0 0 0 100 7 0 0 7 18 3 44 1 0 0 0 1290 0 0 0 100 March 4, 2026 at 01:34:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2862 105 1427 33 243 21 0 5754 6 3 0 91 1 1 0 7 828 45 1480 52 274 51 0 7231 7 2 0 91 2 1 0 0 741 4 1289 33 207 27 0 6274 5 2 0 93 3 16 0 0 725 5 1342 38 232 33 0 7128 6 2 0 92 4 10 0 343 767 111 1095 19 220 25 0 6504 6 2 0 92 5 17 0 14 571 7 968 20 162 62 0 5513 5 2 0 93 6 5 0 7 732 102 939 19 210 38 0 5935 4 2 0 94 7 24 0 0 465 4 803 13 129 19 0 6071 5 2 0 93 March 4, 2026 at 01:34:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 118 106 0 7 0 0 1 0 1 0 99 1 0 0 7 109 36 102 0 6 1 0 260 0 0 0 100 2 0 0 0 25 4 16 0 4 0 0 0 0 0 0 100 3 0 0 0 15 2 14 0 1 0 0 0 0 0 0 100 4 0 0 3 213 105 8 0 0 2 0 595 0 0 0 100 5 0 0 14 11 3 8 1 0 2 0 579 0 0 0 100 6 0 0 3 217 106 8 0 0 0 0 5 0 0 0 100 7 0 0 0 8 1 36 0 2 1 0 1042 0 0 0 100 March 4, 2026 at 01:34:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 901 0 112 2214 103 324 0 43 282 8 134 0 2 0 98 1 114 0 7 273 33 468 0 55 249 15 367 0 1 0 99 2 32 0 1 155 5 264 0 55 247 6 197 0 1 0 99 3 57 0 0 260 99 296 1 52 222 6 189 0 1 0 99 4 17 0 3 318 104 220 0 48 267 5 703 0 1 0 99 5 617 0 14 115 4 197 3 32 188 6 1460 1 1 0 98 6 1820 0 3 321 105 194 2 40 279 3 306 0 1 0 98 7 14 0 0 107 3 221 1 43 277 4 1108 0 1 0 99 March 4, 2026 at 01:34:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 110 0 1 0 0 11 0 1 0 99 1 0 0 7 13 4 10 0 1 0 0 260 0 0 0 100 2 0 0 0 9 0 5 0 2 0 0 0 0 0 0 100 3 0 0 0 113 53 108 0 0 0 0 1 0 0 0 100 4 0 0 3 220 106 18 0 1 7 0 597 0 0 0 100 5 0 0 14 8 2 6 0 0 5 0 578 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 18 6 42 1 1 0 0 1124 0 0 0 99 March 4, 2026 at 01:34:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 108 0 1 0 0 12 0 1 0 99 1 0 0 7 19 6 16 1 0 0 0 269 0 0 0 100 2 0 0 0 16 0 12 0 1 0 0 0 0 0 0 100 3 0 0 0 111 52 108 0 1 0 0 1 0 0 0 100 4 0 0 3 224 106 22 0 2 0 0 611 0 0 0 100 5 0 0 14 21 8 20 0 1 1 0 573 0 0 0 100 6 0 0 3 208 101 2 0 1 0 0 1 0 0 0 100 7 0 0 0 27 8 54 1 0 2 0 1448 0 0 0 99 March 4, 2026 at 01:34:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 112 0 1 0 0 5 0 1 0 99 1 0 0 7 18 6 14 0 1 0 0 291 0 0 0 100 2 0 0 0 9 0 6 0 2 0 0 0 0 0 0 100 3 0 0 0 118 52 110 0 1 0 0 0 0 0 0 100 4 0 0 3 213 105 6 0 0 1 0 596 0 0 0 100 5 0 0 14 10 3 8 1 0 3 0 564 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 0 16 4 38 1 0 0 0 1118 0 0 0 100 March 4, 2026 at 01:34:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 107 252 6 34 4 0 1410 1 1 0 98 1 0 0 7 112 28 205 4 23 2 0 1480 2 0 0 98 2 378 0 0 73 0 192 6 17 5 1 1334 2 0 0 98 3 444 0 0 121 31 214 9 31 5 0 2194 3 1 0 97 4 165 0 87 254 105 138 3 21 2 1 2024 2 1 0 98 5 5 0 25 65 2 116 9 28 5 0 1827 1 0 0 99 6 20 0 3 270 102 177 4 27 5 0 1077 2 0 0 98 7 0 0 0 61 4 229 5 31 0 0 2306 1 0 0 99 March 4, 2026 at 01:34:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 102 242 0 30 130 0 18 0 1 0 99 1 0 0 7 116 12 193 0 28 146 0 266 0 0 0 100 2 18 0 0 67 2 118 0 22 146 0 18 0 0 0 100 3 0 0 0 271 141 259 0 34 170 0 1 0 1 0 99 4 0 0 17 390 106 365 0 36 166 0 614 0 1 0 99 5 0 0 14 80 2 153 0 31 170 0 578 0 1 0 99 6 0 0 3 313 107 201 0 36 189 0 18 0 1 0 99 7 0 0 0 85 2 180 2 23 130 0 1122 0 1 0 99 March 4, 2026 at 01:34:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2118 100 130 0 4 9 0 15 0 1 0 99 1 1 0 7 33 5 30 1 5 7 0 282 0 0 0 100 2 0 0 0 24 0 19 0 6 6 1 23 0 0 0 100 3 0 0 0 27 6 31 0 5 7 4 121 0 0 0 100 4 0 0 13 292 140 98 0 9 20 1 635 0 0 0 100 5 0 0 28 24 4 25 1 2 12 0 592 0 0 0 99 6 0 0 3 257 120 52 3 3 6 0 26 0 0 0 100 7 0 0 0 16 1 45 1 5 9 0 1135 0 0 0 100 March 4, 2026 at 01:34:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 124 0 2 0 0 0 0 0 0 100 1 0 0 7 18 5 14 0 0 0 0 267 0 0 0 100 2 0 0 0 13 1 6 0 0 0 0 1 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 4 0 0 3 226 107 24 0 1 5 0 612 0 0 0 100 5 0 0 21 18 7 11 0 2 3 0 557 0 0 0 100 6 0 0 3 312 151 104 0 0 0 0 5 0 0 0 100 7 0 0 0 26 7 48 1 0 1 0 1044 0 0 0 100 March 4, 2026 at 01:34:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2115 106 83 0 4 1 0 7 0 1 0 99 1 0 0 7 84 7 66 1 3 1 0 261 0 0 0 100 2 0 0 0 32 3 8 0 0 1 0 5 0 0 0 100 3 0 0 0 27 3 6 0 1 0 0 0 0 0 0 100 4 0 0 3 227 104 4 0 0 2 0 594 0 0 0 100 5 0 0 14 31 3 8 0 0 5 0 574 0 0 0 100 6 0 0 3 322 150 102 0 1 1 0 0 0 0 0 100 7 0 0 0 29 3 32 1 0 1 0 1034 0 0 0 100 March 4, 2026 at 01:34:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2119 106 24 1 0 0 0 12 0 1 0 99 1 0 0 7 115 5 110 0 0 0 0 260 0 0 0 100 2 0 0 0 12 0 6 0 0 0 0 3 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 4 0 0 2 217 106 8 1 0 3 0 597 0 0 0 100 5 0 0 14 11 2 8 0 0 2 0 565 0 0 0 100 6 0 0 4 308 151 102 0 1 0 0 0 0 0 0 100 7 0 0 0 11 2 34 1 0 0 0 1034 0 0 0 100 March 4, 2026 at 01:34:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 2805 109 1278 51 249 184 0 5595 6 3 0 91 1 17 0 7 689 7 1248 37 296 123 0 6671 6 2 0 92 2 2 0 0 633 3 1084 32 218 176 0 4805 5 2 0 93 3 2 0 0 710 92 1182 40 279 152 0 5982 5 2 0 93 4 1 0 311 766 105 1119 25 251 160 0 5560 4 2 0 94 5 0 0 14 615 10 1110 36 200 155 0 4544 4 2 0 94 6 2 0 3 921 143 1310 36 252 199 0 5190 4 2 0 94 7 0 0 0 538 4 988 26 171 140 0 4809 4 2 0 94 March 4, 2026 at 01:34:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2267 146 408 8 40 8 0 947 1 1 0 98 1 11 0 7 140 6 218 9 38 12 0 1594 1 0 0 98 2 0 0 0 126 1 203 4 27 13 0 717 1 0 0 99 3 0 0 0 122 4 203 1 36 9 0 1431 1 0 0 99 4 18 0 59 288 109 145 3 30 12 0 683 1 0 0 99 5 0 0 14 117 4 203 2 24 10 0 1358 1 1 0 99 6 0 0 3 287 102 136 0 30 8 0 1264 1 0 0 99 7 0 0 0 109 5 194 4 19 0 0 2080 1 0 0 99 March 4, 2026 at 01:34:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 150 202 0 0 0 0 0 0 0 0 100 1 0 0 7 18 5 16 0 1 0 0 267 0 0 0 100 2 0 0 0 14 0 10 0 1 0 0 10 0 0 0 100 3 0 0 0 14 3 8 0 0 2 0 294 0 0 0 100 4 0 0 2 228 110 26 0 0 0 0 24 0 0 0 100 5 0 0 14 13 7 6 0 0 1 0 565 0 0 0 100 6 0 0 4 211 102 6 0 0 0 0 305 0 0 0 100 7 0 0 0 10 1 38 0 1 1 0 1032 0 0 0 100 March 4, 2026 at 01:34:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 150 200 0 0 0 0 0 0 0 0 100 1 0 0 7 16 5 12 0 0 0 0 260 0 0 0 100 2 0 0 0 16 0 12 1 1 0 0 10 0 0 0 100 3 0 0 0 15 3 10 0 1 5 0 294 0 0 0 100 4 0 0 3 224 108 22 0 1 0 0 9 0 0 0 100 5 0 0 14 8 2 6 0 0 5 0 574 0 0 0 100 6 0 0 3 213 103 4 0 0 0 0 301 0 0 0 100 7 0 0 0 12 3 36 1 0 0 0 1035 0 0 0 100 March 4, 2026 at 01:34:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 2190 150 231 0 9 6 5 64 0 0 0 99 1 44 0 7 47 5 42 1 5 7 1 357 0 0 0 100 2 927 0 113 39 0 74 0 4 4 14 206 0 0 0 99 3 116 0 0 58 4 78 0 16 13 11 435 0 0 0 100 4 35 0 5 263 110 73 1 10 7 10 177 0 0 0 100 5 1823 0 14 44 2 54 3 12 12 4 933 0 1 0 99 6 11 0 3 233 102 34 0 6 5 7 348 0 0 0 100 7 609 0 0 37 1 59 3 5 7 4 1931 1 1 0 98 March 4, 2026 at 01:34:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2230 146 350 0 29 189 0 0 0 1 0 99 1 0 0 7 188 9 363 1 39 248 0 264 0 1 0 99 2 0 0 0 92 1 177 0 35 207 0 13 0 0 0 100 3 0 0 0 184 87 181 1 35 204 0 294 0 1 0 99 4 0 0 3 292 107 156 0 32 198 0 329 0 1 0 99 5 0 0 14 71 2 140 0 28 191 0 570 0 1 0 99 6 0 0 3 282 103 156 0 35 177 0 311 0 1 0 99 7 0 0 0 99 8 211 0 21 185 0 1132 0 1 0 99 March 4, 2026 at 01:34:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 498 0 0 2150 100 269 3 30 7 1 1680 1 1 0 97 1 3 0 7 148 45 207 7 32 1 0 1783 1 0 0 99 2 7 0 0 90 10 220 6 19 1 0 1219 2 0 0 98 3 1 0 0 84 3 224 10 31 6 0 2021 1 0 0 99 4 0 0 73 251 102 183 6 30 2 0 1243 2 0 0 98 5 321 0 14 42 2 94 7 15 6 0 2490 3 1 0 96 6 110 0 3 267 102 284 3 27 2 0 1634 1 0 0 99 7 0 0 0 74 8 239 15 27 5 0 3051 2 1 0 98 March 4, 2026 at 01:34:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 108 0 2 0 0 1 0 0 0 100 1 0 0 7 22 4 22 0 1 0 0 282 0 0 0 100 2 0 0 0 120 51 114 0 0 0 0 4 0 0 0 100 3 0 0 0 29 7 28 0 0 8 0 312 0 0 0 100 4 0 0 17 234 110 30 1 1 0 0 44 0 0 0 100 5 5 0 14 17 8 8 0 1 13 0 570 0 0 0 100 6 0 0 3 217 102 10 1 1 0 0 315 0 0 0 100 7 0 0 0 22 2 50 1 2 2 0 1131 0 0 0 100 March 4, 2026 at 01:34:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 100 0 0 1 0 0 0 0 0 100 1 0 0 7 20 6 12 1 0 1 0 261 0 0 0 100 2 0 0 0 118 52 112 0 1 0 0 0 0 0 0 100 3 0 0 0 28 10 20 0 0 2 0 300 0 0 0 100 4 0 0 7 208 102 0 0 0 1 0 0 0 0 0 100 5 0 0 14 12 3 6 1 0 5 0 566 0 0 0 100 6 0 0 7 210 102 2 0 0 1 0 300 0 0 0 100 7 0 0 0 11 2 32 1 0 2 0 1123 0 0 0 100 March 4, 2026 at 01:34:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2124 101 130 0 11 8 0 2 0 1 0 99 1 0 0 30 27 5 29 0 4 5 0 350 0 0 0 100 2 0 0 0 30 4 24 0 5 11 0 13 0 0 0 100 3 0 0 0 42 11 41 2 2 7 0 329 0 0 0 100 4 0 0 3 229 105 26 2 5 4 0 42 0 0 0 100 5 0 0 14 17 2 16 0 2 5 0 575 0 0 0 100 6 0 0 3 220 102 20 2 2 0 1 391 0 1 0 99 7 0 0 0 112 48 140 1 5 11 0 1043 0 0 0 100 March 4, 2026 at 01:34:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2169 102 241 0 23 149 0 0 0 1 0 99 1 0 0 14 112 6 192 0 31 131 0 260 0 1 0 99 2 0 0 0 180 2 337 0 31 136 0 0 0 0 0 100 3 0 0 0 183 105 151 0 21 180 0 304 0 1 0 99 4 0 0 3 288 103 159 0 27 165 0 0 0 0 0 100 5 0 0 14 75 3 138 0 21 167 0 576 0 1 0 99 6 0 0 3 273 103 139 0 31 136 0 300 0 0 0 100 7 0 0 0 175 52 268 0 22 137 0 1032 0 1 0 99 March 4, 2026 at 01:34:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 101 104 0 0 0 0 1 0 1 0 99 1 0 0 119 18 3 15 0 1 0 0 260 0 0 0 100 2 0 0 0 33 1 12 0 1 0 0 0 0 0 0 100 3 0 0 0 51 14 30 1 0 2 0 310 0 0 0 100 4 0 0 3 231 106 8 0 0 0 0 9 0 0 0 100 5 0 0 14 25 2 6 1 0 1 0 556 0 0 0 100 6 0 0 3 226 102 4 0 0 0 0 303 0 0 0 100 7 0 0 0 124 51 134 1 1 1 0 1033 0 0 0 100 March 4, 2026 at 01:34:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 0 0 0 0 0 1 0 99 1 1 0 14 18 3 16 1 0 0 0 267 0 0 0 100 2 0 0 0 22 1 20 0 1 0 0 0 0 0 0 100 3 0 0 0 28 11 22 0 0 4 0 301 0 0 0 100 4 0 0 3 220 105 18 0 0 0 0 16 0 0 0 100 5 0 0 14 15 8 6 1 0 7 0 573 0 0 0 100 6 0 0 3 212 102 8 0 1 0 0 305 0 0 0 100 7 0 0 0 113 51 138 1 0 0 0 1033 0 0 0 100 March 4, 2026 at 01:34:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2839 108 1362 41 237 23 0 5939 6 3 0 92 1 36 0 7 686 6 1301 34 249 64 0 8381 7 2 0 90 2 0 0 0 707 6 1227 35 188 36 0 5984 6 2 0 93 3 1 0 0 773 41 1363 41 272 29 0 7308 6 2 0 92 4 2 0 339 867 107 1262 34 236 19 0 6311 6 2 0 92 5 0 0 14 556 3 896 10 158 43 0 4758 4 2 0 94 6 23 0 3 806 104 1100 26 210 48 0 6555 5 2 0 93 7 0 0 0 529 7 954 20 148 17 0 5851 4 2 0 94 March 4, 2026 at 01:34:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 104 116 0 1 0 0 5 0 1 0 99 1 0 0 7 17 4 16 0 2 0 0 279 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 114 54 108 0 0 4 0 294 0 0 0 100 4 0 0 3 215 104 6 0 0 0 0 3 0 0 0 100 5 0 0 14 8 2 6 0 0 3 0 573 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 300 0 0 0 100 7 0 0 0 10 1 38 1 1 0 0 1051 0 0 0 100 March 4, 2026 at 01:34:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2206 107 293 0 39 196 0 11 0 1 0 99 1 0 0 7 97 4 185 0 45 272 0 271 0 1 0 99 2 0 0 0 79 1 156 0 24 201 0 0 0 1 0 99 3 0 0 0 270 137 271 0 45 295 0 294 0 1 0 99 4 0 0 3 387 105 361 0 46 234 0 7 0 1 0 99 5 0 0 14 98 2 208 0 34 214 0 569 0 1 0 99 6 0 0 3 306 106 207 0 41 278 0 303 0 1 0 99 7 0 0 0 82 3 192 0 32 205 0 1034 0 1 0 99 March 4, 2026 at 01:34:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 126 0 0 0 0 10 0 1 0 99 1 0 0 7 16 4 12 1 0 0 0 271 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 14 4 10 0 0 1 0 297 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 1 0 0 0 100 5 0 0 14 12 2 16 1 2 0 0 566 0 0 0 100 6 0 0 3 307 151 102 0 0 0 0 300 0 0 0 100 7 0 0 0 9 1 34 1 0 0 0 1033 0 0 0 100 March 4, 2026 at 01:34:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 120 1 0 0 0 323 0 1 0 99 1 0 0 7 16 3 16 0 0 0 0 270 0 0 0 100 2 0 0 0 13 3 10 0 0 0 0 4 0 0 0 100 3 0 0 0 13 4 8 0 0 1 0 294 0 0 0 100 4 0 0 3 223 108 20 0 0 0 0 20 0 0 0 100 5 0 0 14 13 7 6 0 0 3 0 565 0 0 0 100 6 0 0 3 309 151 106 0 0 0 0 305 0 0 0 100 7 0 0 0 11 1 36 1 0 0 0 1032 0 0 0 100 March 4, 2026 at 01:34:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 1 0 0 0 1 0 99 1 0 0 7 17 5 12 0 0 1 0 271 0 0 0 100 2 0 0 0 17 6 10 0 0 1 0 5 0 0 0 100 3 0 0 0 15 5 10 0 1 0 0 294 0 0 0 100 4 0 0 3 207 102 0 0 0 1 0 0 0 0 0 100 5 0 0 14 12 3 8 0 0 9 0 566 0 0 0 100 6 0 0 3 314 151 112 0 1 1 0 300 0 0 0 100 7 0 0 0 10 2 32 1 0 2 0 1034 0 0 0 100 March 4, 2026 at 01:34:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 0 0 0 3 0 1 0 99 1 0 0 7 15 3 12 1 0 0 0 285 0 0 0 100 2 0 0 0 21 8 16 0 0 0 0 15 0 0 0 100 3 0 0 0 13 4 8 0 0 5 0 294 0 0 0 100 4 0 0 3 213 105 6 0 0 0 0 7 0 0 0 100 5 0 0 14 8 2 6 0 0 3 0 566 0 0 0 100 6 0 0 3 309 151 106 0 1 0 0 300 0 0 0 100 7 0 0 0 14 1 44 1 1 1 0 1034 0 0 0 100 March 4, 2026 at 01:34:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 118 0 1 0 0 0 0 1 0 99 1 0 0 7 15 3 14 1 1 0 0 273 0 0 0 100 2 0 0 0 23 7 16 1 0 0 0 10 0 0 0 100 3 0 0 0 15 4 10 1 0 6 0 294 0 0 0 100 4 0 0 3 210 103 4 0 0 2 0 1 0 0 0 100 5 0 0 14 9 2 6 1 0 0 0 559 0 0 0 100 6 0 0 3 310 152 106 0 0 1 0 300 0 0 0 100 7 0 0 0 8 1 32 1 0 0 0 1033 0 0 0 100 March 4, 2026 at 01:34:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 128 0 2 0 0 3 0 1 0 99 1 0 0 7 14 3 12 0 0 0 0 265 0 0 0 100 2 0 0 0 19 6 172 0 0 0 0 651 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 295 0 0 0 100 4 0 0 2 213 105 6 0 0 0 0 4 0 0 0 100 5 0 0 14 8 2 6 0 0 5 0 567 0 0 0 100 6 0 0 4 312 153 106 0 1 0 0 306 0 0 0 100 7 0 0 0 21 6 48 0 0 0 0 1041 0 0 0 100 March 4, 2026 at 01:34:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 116 0 0 0 0 0 0 1 0 99 1 0 0 7 24 5 28 0 1 0 0 279 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 14 4 8 0 0 1 0 294 0 0 0 100 4 0 0 3 220 105 19 0 1 0 0 14 0 0 0 100 5 0 0 14 14 8 6 0 0 4 0 566 0 0 0 100 6 0 0 3 309 151 108 0 1 0 0 305 0 0 0 100 7 0 0 0 23 6 48 1 0 0 0 1039 0 0 0 100 March 4, 2026 at 01:34:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 112 0 1 0 0 0 0 0 0 100 1 0 0 7 13 3 10 0 0 0 0 270 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 14 4 10 0 0 2 0 294 0 0 0 100 4 0 0 3 222 109 14 1 0 0 0 9 0 0 0 100 5 22 0 15 12 3 10 0 0 4 0 579 0 0 0 100 6 0 0 3 315 153 106 0 1 0 0 306 0 0 0 100 7 0 0 0 22 8 46 1 0 0 0 1040 0 0 0 100 March 4, 2026 at 01:34:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 7 16 3 12 1 0 0 0 270 0 0 0 100 2 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 3 0 0 0 13 4 8 0 0 0 0 294 0 0 0 100 4 0 0 2 209 103 2 0 0 0 0 1 0 0 0 100 5 0 0 14 9 2 6 1 0 1 0 557 0 0 0 100 6 0 0 4 307 151 102 0 0 0 0 300 0 0 0 100 7 0 0 0 17 5 42 1 0 0 0 1034 0 0 0 100 March 4, 2026 at 01:34:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 894 0 114 2136 104 98 0 13 3 7 482 0 1 0 99 1 119 0 7 162 12 180 0 11 5 13 399 0 0 0 100 2 21 0 2 57 5 58 0 8 5 3 183 0 0 0 100 3 14 0 0 50 4 60 0 8 9 6 371 0 0 0 100 4 24 0 3 246 105 42 0 7 3 4 116 0 0 0 100 5 1870 0 14 41 2 56 2 10 15 15 894 0 1 0 99 6 18 0 3 325 144 128 0 8 9 5 445 0 0 0 100 7 605 0 0 40 3 63 3 6 5 3 2004 1 1 0 98 March 4, 2026 at 01:34:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 111 0 1 0 0 0 0 0 0 100 1 0 0 7 117 54 112 0 1 0 0 271 0 0 0 100 2 0 0 0 22 8 16 0 0 0 0 10 0 0 0 100 3 0 0 0 14 4 12 0 2 0 0 297 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 3 0 569 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 300 0 0 0 100 7 0 0 0 8 1 32 1 0 0 0 1111 0 0 0 100 March 4, 2026 at 01:34:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 112 0 0 0 0 0 0 0 0 100 1 0 0 7 114 53 112 0 0 0 0 278 0 0 0 100 2 0 0 0 18 6 12 0 0 0 0 6 0 0 0 100 3 0 0 0 15 4 12 0 2 0 0 294 0 0 0 100 4 0 0 3 221 105 22 0 1 0 0 9 0 0 0 100 5 0 0 14 15 7 8 0 0 3 0 562 0 0 0 100 6 0 0 3 214 102 12 0 0 0 0 313 0 0 0 100 7 0 0 0 11 1 36 1 0 0 0 1111 0 0 0 100 March 4, 2026 at 01:34:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 1 0 0 0 0 0 100 1 0 0 7 116 55 110 1 0 1 0 271 0 0 0 100 2 0 0 0 21 7 12 1 0 1 0 6 0 0 0 100 3 0 0 0 16 5 8 0 0 3 0 294 0 0 0 100 4 0 0 7 212 102 2 0 0 1 0 0 0 0 0 100 5 0 0 14 16 3 16 1 1 4 0 567 0 0 0 100 6 0 0 7 210 102 4 0 1 0 0 300 0 0 0 100 7 0 0 0 10 2 32 0 0 1 0 1110 0 0 0 100 March 4, 2026 at 01:34:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43 0 0 2238 102 339 11 41 3 0 2335 2 1 0 96 1 61 0 7 235 50 305 8 38 2 1 1755 1 0 0 98 2 517 0 0 96 3 269 3 30 7 0 1407 1 0 0 98 3 35 0 0 105 6 187 13 24 2 0 1275 3 0 0 97 4 110 0 101 284 105 180 4 29 1 0 1345 1 0 0 98 5 290 0 14 85 3 171 5 25 7 0 2287 2 1 0 98 6 48 0 3 294 107 153 6 23 1 0 1862 2 1 0 97 7 20 0 0 67 3 166 5 27 1 0 2388 1 0 0 99 March 4, 2026 at 01:34:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 100 242 0 29 113 0 0 0 1 0 99 1 0 0 7 178 53 243 0 26 157 0 260 0 0 0 100 2 0 0 0 60 1 105 0 17 142 0 3 0 0 0 100 3 0 0 0 169 91 157 0 23 151 0 294 0 0 0 100 4 0 0 4 375 109 327 0 18 151 0 11 0 0 0 99 5 0 0 14 80 2 147 0 26 144 0 573 0 0 0 100 6 0 0 2 285 103 156 0 25 167 0 300 0 0 0 100 7 0 0 0 72 1 172 1 24 124 0 1122 0 1 0 99 March 4, 2026 at 01:34:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 116 0 2 0 0 1 0 1 0 99 1 0 0 7 110 53 106 0 0 0 0 260 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 16 5 8 0 0 0 0 295 0 0 0 100 4 0 0 3 226 111 18 0 0 0 0 13 0 0 0 100 5 0 0 14 10 2 8 1 0 0 0 561 0 0 0 100 6 0 0 3 211 102 4 0 1 0 0 300 0 0 0 100 7 0 0 0 13 1 42 1 1 0 0 1123 0 0 0 100 March 4, 2026 at 01:34:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 116 0 0 0 0 0 0 0 0 100 1 0 0 7 112 53 110 1 0 0 0 267 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 3 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 4 0 0 3 225 109 22 0 0 0 0 14 0 0 0 100 5 0 0 14 13 7 6 1 0 6 0 568 0 0 0 100 6 0 0 3 221 106 18 0 0 0 0 338 0 0 0 100 7 0 0 0 12 1 40 1 1 0 0 1124 0 0 0 100 March 4, 2026 at 01:34:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2119 101 138 0 8 4 4 113 0 1 0 99 1 0 0 0 136 53 133 0 5 10 0 49 0 0 0 100 2 0 0 15 21 2 20 1 5 13 0 265 0 1 0 99 3 0 0 0 25 3 31 0 10 18 1 324 0 0 0 100 4 1 0 3 236 108 32 1 3 2 1 75 0 0 0 100 5 2 0 14 23 5 29 0 4 16 0 578 0 0 0 100 6 0 0 3 219 103 12 0 0 4 1 308 0 0 0 100 7 0 0 0 23 3 51 1 4 4 0 1132 0 0 0 100 March 4, 2026 at 01:34:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 113 0 2 0 0 0 0 1 0 99 1 0 0 7 122 51 122 0 5 0 0 0 0 0 0 100 2 0 0 7 11 3 6 0 0 0 0 259 0 0 0 100 3 0 0 0 12 3 6 0 0 4 0 294 0 0 0 100 4 0 0 2 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 28 10 26 0 0 0 0 576 0 0 0 100 6 0 0 4 210 102 2 0 0 0 0 300 0 0 0 100 7 0 0 0 11 1 34 1 0 0 0 1039 0 0 0 100 March 4, 2026 at 01:34:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2111 101 123 0 2 1 0 0 0 1 0 99 1 0 0 0 135 52 112 0 2 2 0 1 0 0 0 100 2 0 0 7 31 4 14 0 1 2 0 263 0 0 0 100 3 0 0 0 28 3 8 0 0 3 0 294 0 0 0 100 4 0 0 3 226 103 4 0 0 1 0 2 0 0 0 100 5 0 0 14 45 12 28 0 0 3 0 583 0 0 0 100 6 0 0 3 225 102 2 0 0 0 0 300 0 0 0 100 7 0 0 0 26 2 34 1 0 1 0 1033 0 0 0 100 March 4, 2026 at 01:34:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 101 106 0 2 0 0 0 0 1 0 99 1 0 0 0 120 51 112 0 2 0 0 0 0 0 0 100 2 0 0 7 17 3 16 1 1 0 0 260 0 0 0 100 3 0 0 0 12 3 6 0 0 3 0 294 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 19 7 16 1 0 6 0 571 0 0 0 100 6 0 0 3 212 103 6 0 1 0 0 301 0 0 0 100 7 0 0 0 10 1 32 1 0 0 0 1034 0 0 0 100 March 4, 2026 at 01:34:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 2902 103 1506 61 272 27 0 5871 6 3 0 91 1 16 0 0 807 18 1498 58 323 39 0 7896 6 2 0 91 2 3 0 7 739 6 1202 28 210 51 0 6470 6 2 0 92 3 1 0 0 744 6 1326 49 269 59 0 8179 6 2 0 92 4 1 0 367 802 105 1155 29 257 25 0 6505 6 2 0 92 5 7 0 14 650 17 1068 21 165 19 1 4500 5 2 0 94 6 2 0 3 856 128 1160 24 237 53 0 6474 6 2 0 92 7 4 0 0 469 4 784 16 148 41 1 4931 4 2 0 94 March 4, 2026 at 01:34:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 44 0 1 1 0 0 0 0 0 100 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 0 0 7 12 4 6 0 0 1 0 260 0 0 0 100 3 0 0 0 23 9 18 0 1 1 0 300 0 0 0 100 4 0 0 3 210 102 2 0 1 1 0 10 0 0 0 100 5 0 0 14 84 3 78 0 1 4 0 566 0 0 0 100 6 0 0 3 310 153 104 0 0 1 0 300 0 0 0 100 7 0 0 0 10 2 32 1 0 2 0 1032 0 0 0 100 March 4, 2026 at 01:34:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2141 102 143 0 8 6 4 74 0 1 0 99 1 13 0 0 34 1 28 0 7 8 5 105 0 0 0 100 2 28 0 7 39 3 50 0 9 4 7 318 0 0 0 100 3 904 0 114 49 11 74 0 8 7 10 433 0 0 0 99 4 98 0 3 253 104 63 0 10 12 6 175 0 0 0 100 5 23 0 15 48 2 55 0 8 9 7 693 0 0 0 100 6 41 0 3 354 154 172 0 11 6 9 476 0 0 0 100 7 2428 0 0 45 1 76 4 7 4 9 2213 2 1 0 97 March 4, 2026 at 01:34:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 101 286 0 40 269 0 0 0 1 0 99 1 0 0 0 176 1 356 1 44 281 0 0 0 1 0 99 2 0 0 7 106 9 183 1 41 241 0 260 0 1 0 99 3 0 0 0 199 90 229 0 40 293 0 304 0 1 0 99 4 0 0 3 300 102 210 1 46 257 0 10 0 1 0 99 5 0 0 14 95 2 186 1 33 208 0 563 0 1 0 99 6 0 0 3 380 147 272 1 45 252 0 301 0 1 0 99 7 0 0 0 84 1 191 2 23 198 0 1118 0 1 0 99 March 4, 2026 at 01:34:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 110 0 0 0 0 1 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 7 116 55 114 0 0 0 0 263 0 0 0 100 3 0 0 0 24 9 18 0 0 2 0 622 0 0 0 100 4 0 0 3 212 103 8 0 0 0 0 17 0 0 0 100 5 0 0 14 17 2 16 0 0 7 0 570 0 0 0 100 6 0 0 3 214 104 8 0 0 0 0 304 0 0 0 100 7 0 0 0 8 1 32 1 0 0 0 1117 0 0 0 100 March 4, 2026 at 01:34:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 1 0 0 0 0 0 0 100 1 0 0 0 9 1 6 0 0 0 0 7 0 0 0 100 2 0 0 7 118 57 114 0 0 0 0 265 0 0 0 100 3 0 0 0 12 3 6 0 0 2 0 294 0 0 0 100 4 0 0 3 211 102 8 0 0 0 0 15 0 0 0 100 5 0 0 14 23 7 16 0 0 0 0 567 0 0 0 100 6 0 0 3 222 104 24 0 1 0 0 313 0 0 0 100 7 0 0 0 11 1 36 1 0 1 0 1116 0 0 0 100 March 4, 2026 at 01:34:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 59 0 0 2231 102 368 5 60 5 0 2070 2 1 0 97 1 167 0 0 130 2 310 8 48 4 1 1848 1 0 0 98 2 267 0 7 214 24 325 12 44 2 1 1937 2 1 0 98 3 8 0 0 142 4 319 6 51 4 0 2400 2 0 0 98 4 108 0 100 272 104 182 6 29 4 1 1643 3 1 0 97 5 49 0 14 201 35 283 15 34 9 0 2348 2 1 0 97 6 275 0 6 300 104 201 3 42 3 0 2283 2 1 0 98 7 78 0 0 113 7 226 12 33 4 0 2524 2 0 0 98 March 4, 2026 at 01:35:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 108 0 1 0 0 0 0 1 0 99 1 0 0 0 11 2 8 0 0 0 0 9 0 0 0 100 2 0 0 7 10 3 6 1 0 0 0 260 0 0 0 100 3 0 0 0 12 3 6 0 0 1 0 294 0 0 0 100 4 0 0 3 210 102 2 0 0 0 0 3 0 0 0 100 5 0 0 14 116 52 114 1 0 3 0 567 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 302 0 0 0 100 7 0 0 0 25 8 52 1 0 0 0 1152 0 0 0 99 March 4, 2026 at 01:35:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2246 102 393 2 32 133 0 87 0 1 0 99 1 0 0 0 90 2 159 0 34 139 0 22 0 0 0 100 2 0 0 7 74 3 129 0 22 119 0 261 0 0 0 100 3 0 0 0 161 77 147 0 26 117 0 312 0 1 0 99 4 0 0 3 277 104 137 0 24 132 1 86 0 0 0 99 5 0 0 14 191 52 254 0 25 135 0 587 0 1 0 99 6 1 0 10 281 103 149 0 32 157 0 323 0 1 0 99 7 0 0 9 77 6 167 1 28 155 0 1144 0 1 0 99 March 4, 2026 at 01:35:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 113 0 0 0 0 0 0 1 0 99 1 0 0 0 16 1 12 0 1 0 0 0 0 0 0 100 2 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 3 0 0 0 25 9 18 1 0 3 0 303 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 117 52 114 0 0 3 0 567 0 0 0 100 6 0 0 3 214 103 6 0 0 0 0 301 0 0 0 100 7 0 0 7 9 1 34 1 1 0 0 1036 0 0 0 100 March 4, 2026 at 01:35:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2110 101 119 0 1 0 0 0 0 1 0 99 1 0 0 0 29 2 8 0 0 0 0 12 0 0 0 100 2 0 0 7 27 3 6 0 0 0 0 260 0 0 0 100 3 22 0 0 40 9 18 0 0 3 0 304 0 0 0 100 4 0 0 3 229 103 8 0 0 0 0 7 0 0 0 100 5 0 0 14 141 60 114 0 0 3 0 567 0 0 0 100 6 1 0 3 240 106 22 0 0 0 0 321 0 0 0 100 7 0 0 0 33 1 42 2 1 1 0 1033 0 0 0 100 March 4, 2026 at 01:35:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 101 110 0 0 1 0 0 0 1 0 99 1 0 0 0 14 2 6 0 1 1 0 0 0 0 0 100 2 0 0 7 19 4 16 1 1 1 0 260 0 0 0 100 3 0 0 0 31 12 22 0 0 8 0 302 0 0 0 100 4 0 0 7 211 102 0 0 0 1 0 0 0 0 0 100 5 0 0 14 121 53 116 1 1 12 0 567 0 0 0 100 6 0 0 7 214 103 4 1 0 1 0 301 0 0 0 100 7 0 0 0 12 2 32 1 0 1 0 1027 0 0 0 100 March 4, 2026 at 01:35:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2878 104 1434 43 233 17 0 5719 6 3 0 91 1 0 0 7 808 16 1448 50 298 24 0 7484 6 2 0 92 2 0 0 0 722 10 1214 33 190 48 0 5659 6 2 0 92 3 0 0 0 667 13 1199 39 244 70 0 7894 6 2 0 91 4 0 0 367 761 107 1073 29 234 23 0 6357 6 2 0 92 5 0 0 14 650 33 1034 12 162 22 0 4952 5 2 0 94 6 33 0 3 777 108 1030 26 229 68 0 6624 5 2 0 93 7 0 0 0 595 4 1021 17 148 46 0 5513 6 2 0 93 March 4, 2026 at 01:35:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2190 104 220 0 33 208 0 4 0 1 0 99 1 0 0 7 287 53 456 0 46 228 0 270 0 1 0 99 2 0 0 0 82 1 170 1 32 269 0 3 0 1 0 99 3 0 0 0 178 92 161 3 33 236 0 304 0 1 0 99 4 0 0 3 284 102 163 1 40 280 0 0 0 1 0 99 5 0 0 14 77 2 160 0 32 194 0 566 0 0 0 99 6 0 0 3 297 102 194 1 44 264 0 300 0 1 0 99 7 0 0 0 150 2 256 2 26 203 0 1034 0 1 0 99 March 4, 2026 at 01:35:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2142 104 133 0 6 1 1 77 0 1 0 99 1 3322 0 120 107 32 146 4 3 10 16 1529 2 1 0 97 2 153 0 0 99 22 129 0 13 9 17 165 0 0 0 100 3 40 0 2 59 8 75 0 11 10 6 468 0 0 0 100 4 5 0 3 240 103 36 0 7 2 4 117 0 0 0 100 5 11 0 14 41 2 37 0 4 16 2 650 0 0 0 100 6 6 0 3 235 102 25 0 9 3 3 364 0 0 0 100 7 5 0 0 30 1 45 1 3 3 2 1059 0 0 0 100 March 4, 2026 at 01:35:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 1 0 0 0 0 1 0 99 1 0 0 7 23 3 22 1 0 0 0 277 0 0 0 100 2 0 0 0 112 51 112 0 1 0 0 0 0 0 0 100 3 0 0 0 22 8 16 1 0 3 0 301 0 0 0 100 4 0 0 3 210 102 6 0 0 0 0 5 0 0 0 100 5 0 0 14 18 8 6 2 0 1 0 565 0 0 0 100 6 0 0 3 218 104 16 0 0 0 0 316 0 0 0 100 7 0 0 0 11 1 36 1 0 0 0 1120 0 0 0 100 March 4, 2026 at 01:35:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 108 0 1 0 0 0 0 0 0 100 1 0 0 7 22 4 20 0 0 0 0 301 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 24 9 20 0 0 2 0 619 0 0 0 100 4 0 0 3 211 103 2 0 0 0 0 2 0 0 0 100 5 0 0 14 10 2 10 0 0 3 0 564 0 0 0 100 6 0 0 3 212 103 6 0 0 0 0 302 0 0 0 100 7 0 0 0 13 3 36 1 0 1 0 1119 0 0 0 100 March 4, 2026 at 01:35:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 106 0 0 0 0 0 0 1 0 99 1 0 0 7 19 3 18 0 0 0 0 270 0 0 0 100 2 0 0 0 109 51 104 0 1 0 0 0 0 0 0 100 3 0 0 0 16 3 18 0 1 2 0 294 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 9 2 6 1 0 0 0 597 0 0 0 100 6 0 0 3 224 109 16 0 0 0 0 311 0 0 0 100 7 0 0 0 9 1 34 1 0 0 0 1120 0 0 0 100 March 4, 2026 at 01:35:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2233 103 471 7 58 136 0 1453 1 1 0 98 1 0 0 7 229 5 429 8 56 132 0 1620 1 1 0 98 2 74 0 0 197 30 404 5 47 132 0 1415 1 1 0 98 3 57 0 0 195 75 240 6 34 140 0 1393 2 1 0 97 4 374 0 98 325 107 222 7 41 121 0 2133 4 1 0 95 5 297 0 14 136 5 296 5 46 107 2 1747 2 1 0 97 6 228 0 3 399 126 403 8 51 142 0 1915 1 1 0 98 7 19 0 0 97 3 228 6 42 129 1 2267 1 1 0 98 March 4, 2026 at 01:35:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 110 0 1 3 1 12 0 1 0 99 1 0 0 7 23 3 18 1 0 0 0 261 0 0 0 100 2 0 0 0 10 1 4 0 0 2 0 12 0 0 0 100 3 0 0 0 17 3 16 0 3 2 0 300 0 0 0 100 4 0 0 17 214 105 6 0 1 1 0 5 0 0 0 100 5 0 0 14 14 2 12 1 1 2 0 575 0 0 0 100 6 0 0 3 323 156 116 0 0 0 0 311 0 0 0 100 7 1 0 0 11 1 34 1 1 4 0 1134 0 0 0 100 March 4, 2026 at 01:35:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2121 101 133 1 5 12 0 19 0 1 0 99 1 1 0 15 31 3 29 1 3 5 0 267 0 1 0 99 2 0 0 7 17 1 15 0 2 8 1 77 0 0 0 100 3 0 0 14 18 3 18 0 2 5 1 303 0 0 0 100 4 0 0 3 225 103 28 0 5 12 0 25 0 0 0 100 5 0 0 14 36 7 40 1 6 6 0 584 0 0 0 100 6 0 0 3 350 163 154 0 5 3 0 373 0 0 0 100 7 0 0 0 22 1 56 0 6 10 3 1196 0 0 0 100 March 4, 2026 at 01:35:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 106 0 0 1 0 0 0 0 0 100 1 0 0 7 22 4 14 0 1 1 0 260 0 0 0 100 2 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 3 0 0 7 19 5 15 0 4 3 0 295 0 0 0 100 4 0 0 3 210 102 0 0 0 1 0 0 0 0 0 100 5 0 0 14 27 10 22 1 0 3 0 574 0 0 0 100 6 0 0 3 317 152 112 0 1 1 0 300 0 0 0 100 7 0 0 0 14 3 34 1 0 1 0 1038 0 0 0 100 March 4, 2026 at 01:35:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 101 112 0 1 0 0 4 0 1 0 99 1 0 0 7 34 3 14 0 0 0 0 260 0 0 0 100 2 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 3 0 0 112 17 4 13 0 0 2 0 295 0 0 0 100 4 0 0 2 230 104 6 0 1 0 0 3 0 0 0 100 5 0 0 14 46 12 26 1 0 6 0 581 0 0 0 100 6 0 0 4 325 152 102 0 0 0 0 300 0 0 0 100 7 0 0 0 32 5 40 1 0 0 0 1042 0 0 0 100 March 4, 2026 at 01:35:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 101 195 0 14 61 0 0 0 1 0 99 1 0 0 7 103 4 176 1 13 52 0 260 0 0 0 100 2 0 0 0 52 0 93 0 13 61 0 3 0 0 0 100 3 0 0 7 110 54 103 0 18 56 0 294 0 0 0 100 4 0 0 3 245 102 77 0 19 77 0 0 0 0 0 100 5 0 0 14 58 11 87 0 15 49 0 576 0 0 0 100 6 0 0 3 351 152 187 0 17 76 0 300 0 0 0 100 7 0 0 0 55 1 127 1 12 80 0 1036 0 0 0 100 March 4, 2026 at 01:35:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2729 103 1217 43 210 22 0 5605 6 3 0 92 1 5 0 7 649 3 1194 36 241 42 0 6536 5 2 0 93 2 5 0 0 525 0 908 20 175 54 1 4994 5 1 0 94 3 0 0 0 500 5 893 22 205 65 0 6005 5 2 0 93 4 2 0 283 697 103 955 19 223 14 0 4726 4 2 0 94 5 0 0 14 490 11 907 11 167 39 0 5005 5 2 0 94 6 1 0 3 833 147 1133 22 204 43 0 5726 5 2 0 94 7 3 0 0 502 9 943 26 134 35 1 5192 5 2 0 93 March 4, 2026 at 01:35:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2244 107 341 11 49 12 0 1071 1 1 0 98 1 0 0 7 210 51 274 5 49 8 0 1276 1 0 0 99 2 0 0 0 106 1 164 8 29 5 0 844 0 0 0 99 3 1 0 0 108 2 167 3 36 4 0 1287 1 0 0 99 4 0 0 59 282 104 139 2 33 9 0 1183 1 0 0 99 5 1 0 14 126 13 205 6 29 5 0 1240 1 0 0 98 6 0 0 3 329 105 201 10 44 7 0 1090 1 0 0 99 7 1 0 0 113 1 227 5 23 2 0 1892 1 0 0 99 March 4, 2026 at 01:35:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 888 0 113 2138 109 162 1 8 2 7 125 0 1 0 99 1 1904 0 7 131 44 130 3 9 2 7 610 0 1 0 99 2 52 0 3 60 9 71 0 8 7 9 125 0 0 0 100 3 26 0 0 56 1 70 0 16 9 4 539 0 0 0 100 4 615 0 3 251 105 55 1 7 6 10 1248 1 0 0 98 5 46 0 14 45 4 44 0 5 3 6 643 0 0 0 100 6 10 0 3 237 102 31 0 4 4 2 57 0 0 0 100 7 21 0 0 34 3 52 0 3 5 2 1082 0 0 0 100 March 4, 2026 at 01:35:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2118 108 126 1 1 0 0 11 0 0 0 99 1 0 0 7 13 3 8 1 1 0 0 260 0 0 0 100 2 0 0 0 111 50 110 0 1 0 0 0 0 0 0 100 3 0 0 0 17 1 12 0 0 1 0 297 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 300 0 0 0 100 5 0 0 14 12 4 10 0 0 4 0 566 0 0 0 100 6 0 0 3 208 101 2 0 0 0 0 10 0 0 0 100 7 0 0 0 8 1 32 1 0 1 0 1120 0 0 0 100 March 4, 2026 at 01:35:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2199 109 288 0 38 268 0 11 0 1 0 99 1 0 0 7 102 5 195 0 38 212 0 262 0 0 0 100 2 0 0 0 172 48 244 0 30 229 0 0 0 0 0 100 3 0 0 0 165 82 163 0 37 236 0 294 0 1 0 99 4 0 0 3 304 107 205 0 38 270 0 302 0 0 0 100 5 0 0 14 76 4 156 0 33 207 0 570 0 1 0 99 6 0 0 3 295 102 184 0 45 236 0 14 0 1 0 99 7 0 0 0 145 1 318 1 29 197 0 1116 0 1 0 99 March 4, 2026 at 01:35:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 118 0 0 1 0 328 0 0 0 99 1 0 0 7 12 3 10 0 0 0 0 265 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 20 1 22 0 1 2 0 294 0 0 0 100 4 0 0 3 311 154 104 0 0 0 0 300 0 0 0 100 5 0 0 14 13 4 12 1 1 6 0 562 0 0 0 100 6 0 0 3 209 101 2 0 0 0 0 10 0 0 0 100 7 0 0 0 10 1 36 1 0 1 0 1120 0 0 0 100 March 4, 2026 at 01:35:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 105 0 0 2231 108 387 13 31 8 0 1677 2 1 0 97 1 4 0 7 138 3 357 11 51 4 0 2059 2 1 0 98 2 123 0 0 126 0 292 4 37 2 0 1652 1 0 0 98 3 2 0 0 144 8 263 12 39 2 0 1981 1 0 0 99 4 4 0 87 336 148 231 3 20 1 0 1184 2 0 0 97 5 158 0 14 98 9 215 5 26 5 0 2207 2 1 0 97 6 308 0 11 291 103 168 12 23 3 0 2063 3 1 0 96 7 260 0 0 124 1 314 10 36 4 0 2746 1 1 0 98 March 4, 2026 at 01:35:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 118 0 1 1 0 6 0 0 0 99 1 0 0 7 17 5 6 1 0 1 0 260 0 0 0 100 2 0 0 0 12 2 0 0 0 1 0 0 0 0 0 100 3 17 0 0 123 53 114 0 0 15 0 305 0 0 0 100 4 0 0 21 228 109 20 0 2 2 0 322 0 0 0 100 5 5 0 14 27 9 20 0 1 6 0 581 0 0 0 100 6 0 0 7 212 101 6 0 2 0 0 14 0 0 0 100 7 0 0 0 20 3 38 1 1 1 0 1131 0 0 0 100 March 4, 2026 at 01:35:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 0 0 0 0 0 0 0 100 1 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 115 51 110 0 0 1 0 294 0 0 0 100 4 0 0 2 235 114 28 1 1 0 0 313 0 0 0 100 5 0 0 14 23 6 28 0 2 2 0 570 0 0 0 100 6 0 0 4 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 0 8 1 32 0 0 0 0 1124 0 0 0 100 March 4, 2026 at 01:35:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2191 103 279 1 36 174 1 66 0 1 0 99 1 0 0 7 173 37 245 0 30 150 0 297 0 0 0 99 2 0 0 0 77 1 131 0 24 130 0 12 0 0 0 100 3 0 0 0 213 107 210 0 41 174 0 305 0 1 0 99 4 1 0 3 288 107 155 0 27 179 0 327 0 0 0 100 5 0 0 14 92 6 165 1 19 139 0 576 0 0 0 100 6 0 0 11 295 103 183 0 30 153 0 6 0 1 0 99 7 0 0 0 177 8 356 1 24 126 2 1152 0 1 0 99 March 4, 2026 at 01:35:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 111 0 1 0 0 0 0 1 0 99 1 0 0 14 117 55 114 0 1 0 0 262 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 19 2 12 0 0 2 0 295 0 0 0 100 4 0 0 3 212 103 2 0 0 0 0 300 0 0 0 100 5 0 0 14 17 6 16 0 1 3 0 566 0 0 0 100 6 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 21 7 44 1 0 1 0 1043 0 0 0 100 March 4, 2026 at 01:35:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2108 101 113 0 0 0 0 0 0 1 0 99 1 0 0 7 133 54 114 1 1 0 0 272 0 0 0 100 2 0 0 0 22 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 31 1 10 0 1 6 0 294 0 0 0 100 4 0 0 3 228 103 8 0 0 0 0 305 0 0 0 100 5 0 0 14 35 10 12 0 1 6 0 568 0 0 0 100 6 0 0 3 233 103 18 0 2 0 0 16 0 0 0 100 7 0 0 0 51 10 66 1 1 1 0 1049 0 0 0 100 March 4, 2026 at 01:35:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 101 122 0 2 0 0 0 0 0 0 100 1 0 0 7 113 54 108 0 0 0 0 281 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 0 0 1 0 294 0 0 0 100 4 0 0 2 213 103 2 0 0 0 0 300 0 0 0 100 5 0 0 14 23 5 20 0 0 3 0 570 0 0 0 100 6 0 0 4 210 102 2 0 0 0 0 1 0 0 0 100 7 0 0 0 30 10 52 2 0 0 0 1041 0 0 0 100 March 4, 2026 at 01:35:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 0 2863 105 1336 34 211 26 0 5687 7 3 0 91 1 21 0 7 735 9 1340 29 247 39 0 7088 7 2 0 91 2 40 0 0 738 42 1217 23 160 59 0 4930 6 2 0 93 3 2 0 0 626 4 1142 26 195 31 0 7261 5 2 0 93 4 0 0 339 759 111 1047 24 207 16 0 5958 4 2 0 94 5 13 0 14 589 7 973 18 140 36 0 4970 4 1 0 94 6 4 0 3 770 103 1029 28 194 44 0 5894 5 2 0 93 7 12 0 0 502 5 864 20 128 25 0 5232 5 2 0 94 March 4, 2026 at 01:35:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2184 100 169 0 25 205 0 0 0 1 0 99 1 0 0 7 99 5 194 0 35 243 0 261 0 1 0 99 2 0 0 0 177 54 235 0 24 190 0 6 0 0 0 100 3 0 0 0 165 83 167 0 39 237 0 294 0 0 0 99 4 0 0 3 287 104 166 1 32 234 0 301 0 0 0 99 5 0 0 14 175 5 245 0 25 184 0 566 0 0 0 100 6 0 0 3 300 101 191 0 31 231 0 0 0 1 0 99 7 0 0 0 155 1 333 0 26 183 0 1044 0 1 0 99 March 4, 2026 at 01:35:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 108 0 2 0 0 5 0 0 0 100 1 0 0 7 15 4 12 1 2 0 0 271 0 0 0 100 2 0 0 0 120 55 120 0 1 0 0 6 0 0 0 100 3 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 4 0 0 3 214 105 6 0 0 0 0 302 0 0 0 100 5 0 0 14 20 4 18 0 1 1 0 567 0 0 0 100 6 0 0 3 211 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 34 1 0 1 0 1043 0 0 0 100 March 4, 2026 at 01:35:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 0 0 100 1 0 0 7 15 4 14 0 0 0 0 268 0 0 0 100 2 0 0 0 118 56 114 0 0 0 0 10 0 0 0 100 3 0 0 0 10 2 6 0 1 1 0 297 0 0 0 100 4 0 0 3 216 105 12 0 0 0 0 308 0 0 0 100 5 0 0 14 28 11 20 0 0 2 0 566 0 0 0 100 6 1 0 3 221 105 22 0 1 0 0 41 0 0 0 100 7 0 0 0 14 2 40 1 0 0 0 1044 0 0 0 100 March 4, 2026 at 01:35:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 0 1 0 0 0 0 0 100 1 0 0 7 20 7 16 0 0 1 0 264 0 0 0 100 2 0 0 0 114 53 108 0 1 1 0 323 0 0 0 100 3 0 0 0 18 4 16 0 1 2 0 295 0 0 0 100 4 0 0 3 217 105 10 0 0 1 0 310 0 0 0 100 5 0 0 14 23 5 20 1 0 8 0 564 0 0 0 100 6 0 0 3 207 101 0 0 0 1 0 0 0 0 0 100 7 0 0 0 10 2 32 1 0 1 0 1033 0 0 0 100 March 4, 2026 at 01:35:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 1 0 0 0 0 0 0 100 1 0 0 7 29 12 24 0 0 0 0 272 0 0 0 100 2 0 0 0 106 50 102 0 1 0 0 3 0 0 0 100 3 0 0 0 11 2 6 0 0 3 0 294 0 0 0 100 4 0 0 2 223 107 20 1 1 0 0 304 0 0 0 100 5 0 0 14 23 5 20 0 0 4 0 568 0 0 0 100 6 0 0 4 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 34 1 0 1 0 1043 0 0 0 100 March 4, 2026 at 01:35:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 0 2154 106 184 0 8 13 14 110 0 1 0 99 1 614 0 7 45 5 37 2 5 9 4 1169 1 0 0 98 2 4 0 0 129 50 114 0 2 4 1 44 0 0 0 100 3 896 0 113 20 2 40 1 7 6 6 450 0 0 0 99 4 120 0 2 248 104 53 1 8 6 10 386 0 0 0 100 5 1839 0 16 60 4 70 2 9 10 9 932 0 1 0 99 6 32 0 4 247 101 57 0 14 10 7 230 0 0 0 100 7 15 0 0 38 1 67 0 9 13 3 1232 0 0 0 100 March 4, 2026 at 01:35:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 114 0 1 0 0 5 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 260 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 3 0 0 0 11 3 6 0 0 1 0 295 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 300 0 0 0 100 5 0 0 14 29 5 34 0 1 2 0 564 0 0 0 100 6 0 0 3 212 103 4 0 0 0 0 3 0 0 0 100 7 0 0 0 9 1 34 1 0 0 0 1125 0 0 0 100 March 4, 2026 at 01:35:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 118 0 1 0 0 324 0 1 0 99 1 0 0 7 18 6 16 0 0 0 0 271 0 0 0 100 2 0 0 0 107 50 104 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 4 0 0 3 214 103 11 0 1 0 0 305 0 0 0 100 5 0 0 14 30 9 20 1 0 5 0 572 0 0 0 100 6 0 0 3 223 103 30 0 3 0 0 21 0 0 0 100 7 0 0 0 23 5 52 1 1 0 0 1135 0 0 0 100 March 4, 2026 at 01:35:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 1 0 0 10 0 0 0 100 1 0 0 7 12 4 8 0 0 0 0 260 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 5 0 294 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 301 0 0 0 100 5 0 0 14 22 5 20 0 0 9 0 566 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 0 20 7 44 1 0 0 0 1123 0 0 0 100 March 4, 2026 at 01:35:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 0 0 0 10 0 0 0 100 1 0 0 7 13 4 8 1 0 0 0 260 0 0 0 100 2 1 0 0 108 51 104 0 0 0 0 8 0 0 0 100 3 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 4 24 0 3 211 104 6 0 1 0 0 307 0 0 0 100 5 0 0 14 20 4 18 0 0 4 0 570 0 0 0 100 6 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 7 0 0 0 30 9 60 0 1 0 0 1123 0 0 0 100 March 4, 2026 at 01:35:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 126 0 1 1 0 10 0 1 0 99 1 0 0 7 16 5 12 0 0 0 0 261 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 8 0 0 0 0 294 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 5 0 0 14 23 5 22 0 0 3 0 566 0 0 0 100 6 0 0 3 210 102 6 0 1 2 0 1 0 0 0 100 7 0 0 0 19 5 44 1 0 4 0 1115 0 0 0 100 March 4, 2026 at 01:35:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 112 0 0 0 0 12 0 1 0 99 1 0 0 7 14 4 10 0 0 0 0 260 0 0 0 100 2 0 0 0 106 50 102 0 0 0 0 3 0 0 0 100 3 0 0 0 9 2 4 0 0 4 0 294 0 0 0 100 4 0 0 3 215 105 8 1 0 0 0 305 0 0 0 100 5 0 0 14 20 4 18 1 0 8 0 564 0 0 0 100 6 0 0 3 209 101 4 0 0 0 0 5 0 0 0 100 7 0 0 0 22 7 46 2 0 1 0 1440 0 0 0 99 March 4, 2026 at 01:35:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 0 0 10 0 1 0 99 1 0 0 7 19 4 22 0 1 0 0 267 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 6 0 294 0 0 0 100 4 0 0 3 212 103 8 0 0 0 0 305 0 0 0 100 5 0 0 14 27 10 20 0 0 3 0 565 0 0 0 100 6 0 0 3 217 103 16 0 0 0 0 19 0 0 0 100 7 0 0 0 24 7 50 1 0 1 0 1121 0 0 0 100 March 4, 2026 at 01:35:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 106 0 0 1 0 10 0 1 0 99 1 0 0 7 18 5 10 1 0 1 0 260 0 0 0 100 2 0 0 0 113 51 110 0 1 1 0 0 0 0 0 100 3 0 0 0 14 4 6 0 0 1 0 295 0 0 0 100 4 0 0 7 212 103 2 0 0 1 0 300 0 0 0 100 5 0 0 14 23 5 20 0 1 0 0 569 0 0 0 100 6 0 0 7 208 101 0 0 0 1 0 0 0 0 0 100 7 0 0 0 21 7 40 1 0 1 0 1116 0 0 0 99 March 4, 2026 at 01:35:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 108 0 1 0 0 10 0 0 0 99 1 0 0 7 12 4 8 0 0 0 0 260 0 0 0 100 2 0 0 0 106 50 102 0 0 0 0 3 0 0 0 100 3 0 0 0 9 2 4 0 0 2 0 294 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 301 0 0 0 100 5 0 0 14 22 5 20 0 0 2 0 565 0 0 0 100 6 0 0 3 212 103 4 0 0 0 0 2 0 0 0 100 7 0 0 0 26 10 50 0 0 2 0 1123 0 0 0 100 March 4, 2026 at 01:35:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2281 102 376 13 66 141 0 1488 1 2 0 97 1 4 0 7 182 5 429 14 63 163 0 1734 2 1 0 97 2 100 0 0 128 7 214 9 40 121 0 1597 2 1 0 97 3 19 0 0 340 118 519 10 77 133 0 2007 1 1 0 98 4 80 0 141 366 108 362 12 76 175 0 1903 2 1 0 96 5 223 0 14 210 5 349 4 57 138 0 2138 2 1 0 98 6 156 0 3 387 102 391 3 70 164 0 1629 2 1 0 97 7 53 0 2 206 3 578 4 53 99 0 2649 1 1 0 98 March 4, 2026 at 01:35:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 108 0 0 0 0 5 0 0 0 100 1 0 0 7 13 4 10 0 1 0 0 271 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 10 0 0 0 100 3 0 0 0 13 3 8 0 1 1 0 295 0 0 0 100 4 0 0 3 314 153 114 0 1 0 0 301 0 0 0 100 5 0 0 14 23 5 20 0 1 3 0 568 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 34 1 1 1 0 1122 0 0 0 100 March 4, 2026 at 01:35:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 0 0 0 0 0 0 0 100 1 0 0 7 15 4 12 1 0 0 0 267 0 0 0 100 2 0 0 0 22 8 18 0 0 0 0 14 0 0 0 100 3 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 4 0 0 3 312 153 108 0 0 0 0 305 0 0 0 100 5 0 0 14 27 10 18 0 0 4 0 567 0 0 0 100 6 0 0 3 216 103 14 0 0 0 0 16 0 0 0 100 7 0 0 0 12 1 40 1 1 1 0 1127 0 0 0 100 March 4, 2026 at 01:35:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 0 0 0 0 0 0 0 100 1 0 0 7 14 5 10 0 0 0 0 281 0 0 0 100 2 0 0 0 21 8 14 0 0 0 0 7 0 0 0 100 3 0 0 0 9 2 4 0 0 2 0 294 0 0 0 100 4 0 0 3 313 153 104 0 0 0 0 300 0 0 0 100 5 0 0 14 27 5 30 0 1 5 0 566 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 7 0 0 0 12 3 36 1 0 1 0 1125 0 0 0 100 March 4, 2026 at 01:35:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2110 100 120 0 6 2 0 23 0 1 0 99 1 0 0 7 29 5 22 0 2 1 0 272 0 0 0 100 2 0 0 0 39 8 37 0 3 7 0 53 0 0 0 100 3 0 0 9 21 2 23 0 8 19 0 378 0 1 0 99 4 0 0 2 250 118 52 2 7 10 0 318 0 0 0 100 5 0 0 14 32 4 34 1 3 10 2 641 0 0 0 100 6 0 0 4 289 136 89 0 3 4 0 2 0 0 0 100 7 0 0 0 30 5 62 2 8 13 0 1053 0 0 0 100 March 4, 2026 at 01:35:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 104 125 0 1 1 0 4 0 1 0 99 1 0 0 14 18 5 14 0 1 0 0 261 0 0 0 100 2 0 0 0 9 0 2 0 0 0 0 1 0 0 0 100 3 0 0 0 13 2 10 0 1 5 0 294 0 0 0 100 4 0 0 2 210 103 2 0 0 0 0 300 0 0 0 100 5 0 0 14 24 5 22 0 0 7 0 570 0 0 0 100 6 0 0 4 310 151 104 0 0 0 0 3 0 0 0 100 7 0 0 0 29 10 52 0 0 3 0 1047 0 0 0 100 March 4, 2026 at 01:35:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2109 102 112 0 2 0 0 5 0 1 0 99 1 0 0 7 30 4 10 1 0 0 0 259 0 0 0 100 2 0 0 0 22 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 25 2 4 0 0 1 0 294 0 0 0 100 4 0 0 3 225 103 2 0 0 0 0 300 0 0 0 100 5 0 0 14 36 4 18 0 0 0 0 572 0 0 0 100 6 0 0 3 324 150 103 0 1 1 0 0 0 0 0 100 7 0 0 0 42 7 54 1 1 0 0 1041 0 0 0 100 March 4, 2026 at 01:35:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 120 0 2 0 0 3 0 1 0 99 1 0 0 7 15 4 12 0 0 0 0 267 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 213 103 8 0 0 0 0 305 0 0 0 100 5 0 0 14 99 45 92 0 1 5 0 559 0 0 0 100 6 0 0 10 244 117 44 0 2 0 0 13 0 0 0 100 7 0 0 0 35 11 60 1 0 1 0 1047 0 0 0 99 March 4, 2026 at 01:35:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2902 104 1480 48 277 35 0 5931 6 3 0 91 1 2 0 7 720 7 1256 64 282 30 0 7880 7 2 0 91 2 1 0 0 690 6 1185 32 196 14 0 5722 5 2 0 93 3 1 0 0 661 5 1171 34 256 14 0 8051 5 2 0 93 4 26 0 353 834 129 1136 20 235 25 0 6010 6 2 0 92 5 19 0 14 612 22 981 18 170 30 0 5273 5 1 0 94 6 41 0 3 802 102 1104 37 238 11 0 6112 6 2 0 93 7 18 0 0 558 9 997 23 143 8 0 5422 5 2 0 93 March 4, 2026 at 01:35:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 0 0 0 0 0 1 0 99 1 0 0 7 25 8 26 0 1 0 0 265 0 0 0 100 2 0 0 0 8 1 6 0 1 0 0 11 0 0 0 100 3 0 0 0 10 2 6 1 0 5 0 294 0 0 0 100 4 0 0 3 307 152 102 0 0 0 0 300 0 0 0 100 5 0 0 14 22 5 20 0 0 5 0 565 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 0 8 1 32 1 0 0 0 1033 0 0 0 100 March 4, 2026 at 01:35:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 101 242 1 30 257 0 0 0 1 0 99 1 0 0 7 104 10 184 1 33 235 0 270 0 1 0 99 2 0 0 0 163 2 326 0 36 202 0 15 0 0 0 100 3 0 0 0 166 79 177 1 33 245 0 294 0 1 0 99 4 0 0 3 399 153 288 0 49 266 0 300 0 0 0 100 5 0 0 14 91 4 182 0 31 207 0 563 0 1 0 99 6 0 0 3 282 102 159 1 36 223 0 4 0 0 0 100 7 0 0 0 70 1 150 1 28 148 0 1033 0 1 0 99 March 4, 2026 at 01:35:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 1 0 0 0 0 1 0 99 1 0 0 7 24 9 20 0 1 0 0 266 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 11 0 0 0 100 3 0 0 0 12 3 6 0 0 4 0 295 0 0 0 100 4 0 0 3 309 153 102 0 0 0 0 300 0 0 0 100 5 0 0 14 22 5 20 0 0 4 0 572 0 0 0 100 6 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 32 1 0 0 0 1033 0 0 0 100 March 4, 2026 at 01:35:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2134 100 135 0 11 3 1 103 0 1 0 99 1 11 0 7 49 8 49 0 8 4 3 670 0 0 0 100 2 4 0 0 36 2 21 0 4 1 0 59 0 0 0 100 3 2740 0 113 51 6 91 2 5 11 13 735 1 1 0 98 4 133 0 3 351 152 179 0 15 7 14 454 0 0 0 100 5 19 0 14 59 10 57 1 9 9 6 688 0 0 0 100 6 618 0 3 253 104 67 1 4 9 10 945 1 0 0 98 7 19 0 0 44 1 87 0 7 6 7 1204 0 0 0 100 March 4, 2026 at 01:35:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 0 0 100 1 0 0 7 13 4 8 0 0 0 0 260 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 11 0 0 0 100 3 0 0 0 19 6 14 0 1 0 0 299 0 0 0 100 4 0 0 3 314 152 112 0 1 1 0 300 0 0 0 100 5 0 0 14 22 5 20 0 0 2 0 561 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 0 12 3 38 1 1 0 0 1119 0 0 0 100 March 4, 2026 at 01:36:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 105 239 9 36 1 0 1387 1 1 0 98 1 361 0 7 97 5 141 10 27 2 0 2288 2 1 0 97 2 52 0 0 91 2 168 6 30 6 1 1621 1 0 0 98 3 90 0 0 92 7 165 3 31 3 0 1745 2 0 0 98 4 166 0 115 290 120 121 16 29 1 1 2078 2 1 0 97 5 6 0 14 164 37 297 2 34 11 0 2082 1 1 0 99 6 0 0 3 275 101 159 7 31 0 0 1604 1 0 0 98 7 143 0 0 57 1 136 6 22 3 1 2271 2 0 0 98 March 4, 2026 at 01:36:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 100 237 0 25 146 0 0 0 1 0 99 1 0 0 7 88 6 165 0 33 187 0 261 0 1 0 99 2 0 0 0 151 0 282 0 20 111 0 0 0 0 0 100 3 0 0 0 172 89 156 0 21 140 0 297 0 1 0 99 4 0 0 3 283 103 162 0 34 182 0 300 0 0 0 99 5 0 0 14 192 54 266 0 27 175 0 567 0 1 0 99 6 0 0 3 289 111 153 0 28 101 0 14 0 0 0 99 7 0 0 0 81 2 179 1 17 170 0 1122 0 1 0 99 March 4, 2026 at 01:36:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 102 128 1 2 4 0 40 0 1 0 99 1 0 0 7 23 4 36 0 11 16 0 296 0 1 0 99 2 0 0 8 21 1 27 0 9 11 2 142 0 0 0 100 3 0 0 14 20 3 23 0 6 13 0 311 0 0 0 100 4 0 0 3 222 103 11 0 2 2 0 316 0 0 0 100 5 0 0 14 127 53 124 1 4 15 0 566 0 0 0 100 6 0 0 10 244 112 48 0 5 8 0 43 0 0 0 100 7 0 0 0 16 1 40 1 1 7 0 1122 0 0 0 100 March 4, 2026 at 01:36:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 112 0 1 0 0 0 0 0 0 100 1 0 0 7 17 4 12 0 0 0 0 265 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 7 0 2 2 0 294 0 0 0 100 4 0 0 3 214 103 10 0 0 0 0 308 0 0 0 100 5 0 0 14 127 60 118 0 0 5 0 577 0 0 0 100 6 0 0 3 236 112 32 0 0 0 0 26 0 0 0 100 7 0 0 7 15 2 40 1 1 1 0 1037 0 0 0 100 March 4, 2026 at 01:36:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 100 106 0 1 1 0 0 0 1 0 99 1 0 0 7 31 5 8 1 0 1 0 260 0 0 0 100 2 0 0 0 24 1 0 0 0 1 0 0 0 0 0 100 3 0 0 112 20 6 13 0 0 4 0 300 0 0 0 100 4 0 0 7 231 104 4 0 0 1 0 301 0 0 0 100 5 0 0 14 137 54 116 0 0 2 0 559 0 0 0 100 6 0 0 7 241 108 18 1 1 0 0 6 0 0 0 100 7 0 0 0 34 2 44 1 1 1 0 1034 0 0 0 100 March 4, 2026 at 01:36:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 118 0 2 0 0 0 0 0 0 100 1 0 0 7 15 5 10 0 0 0 0 261 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 11 2 6 0 0 11 0 294 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 300 0 0 0 100 5 0 0 14 53 19 48 0 0 10 0 576 0 0 0 100 6 0 0 3 300 146 94 0 1 0 0 15 0 0 0 100 7 0 0 0 10 1 34 0 0 0 0 1033 0 0 0 100 March 4, 2026 at 01:36:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 0 2930 103 1496 43 264 268 0 6391 7 3 0 90 1 26 0 7 817 8 1477 42 284 271 0 7570 7 3 0 91 2 9 0 0 851 2 1540 25 202 221 0 5725 5 3 0 92 3 1 0 0 885 87 1561 42 310 245 0 8113 6 3 0 91 4 15 0 353 807 106 1202 27 253 307 0 6225 5 3 0 92 5 24 0 14 673 5 1149 20 174 300 0 5197 5 2 0 93 6 0 0 3 950 148 1306 25 235 249 0 6034 6 2 0 92 7 1 0 0 615 9 1125 13 176 222 0 5220 4 2 0 94 March 4, 2026 at 01:36:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 66 0 2 0 0 0 0 1 0 99 1 0 0 7 19 5 20 0 1 0 0 261 0 0 0 100 2 0 0 0 9 2 2 0 0 0 0 1 0 0 0 100 3 0 0 0 11 3 6 0 0 1 0 295 0 0 0 100 4 0 0 3 217 107 10 0 0 0 0 305 0 0 0 100 5 0 0 14 13 4 12 0 1 6 0 577 0 0 0 100 6 0 0 3 311 151 104 0 0 0 0 0 0 0 0 100 7 0 0 0 58 2 78 1 0 1 0 1032 0 0 0 100 March 4, 2026 at 01:36:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 944 0 112 2131 100 187 0 13 4 23 188 0 1 0 99 1 664 0 7 64 4 93 2 20 10 15 1305 1 0 0 98 2 71 0 1 60 0 83 0 16 1 15 152 0 0 0 100 3 12 0 0 48 2 45 0 9 7 3 480 0 0 0 100 4 24 0 3 257 112 55 0 7 2 5 379 0 0 0 100 5 1823 0 14 49 8 46 2 6 9 7 853 0 1 0 99 6 17 0 3 345 154 142 0 2 7 4 31 0 0 0 100 7 8 0 0 37 1 57 1 3 5 5 1054 0 0 0 100 March 4, 2026 at 01:36:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 7 14 5 10 0 0 0 0 281 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 6 0 0 1 0 297 0 0 0 100 4 0 0 3 226 110 18 0 0 0 0 310 0 0 0 100 5 0 0 14 13 4 12 0 0 0 0 578 0 0 0 100 6 0 0 3 315 155 108 0 0 0 0 3 0 0 0 100 7 0 0 0 12 3 36 1 0 1 0 1120 0 0 0 100 March 4, 2026 at 01:36:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 1 0 0 0 0 0 0 100 1 0 0 7 14 4 10 0 1 0 0 263 0 0 0 100 2 0 0 0 9 0 6 0 0 0 0 2 0 0 0 100 3 0 0 0 16 3 16 0 1 1 0 295 0 0 0 100 4 0 0 3 226 110 18 0 0 0 0 634 0 0 0 100 5 0 0 14 12 3 10 1 0 1 0 613 0 0 0 100 6 0 0 3 311 153 104 0 0 0 0 1 0 0 0 100 7 0 0 0 9 1 38 0 0 0 0 1129 0 0 0 100 March 4, 2026 at 01:36:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 121 160 0 2 1 0 0 0 0 0 100 1 0 0 7 16 5 12 0 1 0 0 261 0 0 0 100 2 0 0 0 17 5 12 0 0 1 0 5 0 0 0 100 3 0 0 0 14 2 12 0 0 4 0 294 0 0 0 100 4 0 0 3 214 103 12 0 1 1 0 299 0 0 0 100 5 0 0 14 14 4 14 0 0 2 0 586 0 0 0 100 6 0 0 3 268 131 60 0 1 0 0 0 0 0 0 100 7 0 0 0 9 1 34 1 0 3 0 1116 0 0 0 100 March 4, 2026 at 01:36:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 74 0 0 2217 129 346 8 31 2 0 1603 1 1 0 98 1 0 0 7 105 4 240 7 32 2 0 1861 1 0 0 99 2 2 0 0 76 5 205 5 34 7 0 1667 2 0 0 98 3 250 0 0 100 3 236 5 41 7 0 2230 2 1 0 97 4 287 0 87 296 104 313 8 44 6 0 2136 2 1 0 98 5 134 0 14 173 23 353 4 36 4 0 2268 1 0 0 98 6 227 0 3 296 103 162 9 32 2 0 2000 3 1 0 96 7 0 0 0 46 3 129 6 12 4 0 2153 3 0 0 96 March 4, 2026 at 01:36:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 100 120 0 2 0 0 9 0 1 0 99 1 0 0 7 18 4 16 0 0 0 0 286 0 0 0 100 2 1 0 0 10 0 2 0 1 0 0 16 0 0 0 100 3 0 0 0 12 2 6 0 0 2 0 310 0 0 0 100 4 4 0 17 218 103 16 1 1 0 0 326 0 0 0 100 5 0 0 14 125 59 123 0 3 3 0 564 0 0 0 100 6 0 0 3 219 104 14 0 1 0 0 15 0 0 0 100 7 0 0 0 34 10 60 1 1 0 0 1145 0 0 0 99 March 4, 2026 at 01:36:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 100 129 0 3 6 0 33 0 0 0 99 1 0 0 21 26 5 29 0 5 1 0 428 0 0 0 100 2 0 0 0 19 1 17 0 5 10 0 22 0 0 0 100 3 0 0 7 22 3 19 0 3 19 0 303 0 0 0 100 4 0 0 7 221 104 19 0 6 18 0 315 0 0 0 100 5 0 0 14 121 54 112 0 1 9 0 566 0 0 0 100 6 0 0 7 226 102 23 0 4 5 0 7 0 0 0 100 7 0 0 9 41 11 68 2 4 14 0 1147 0 1 0 99 March 4, 2026 at 01:36:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 0 0 0 0 100 1 0 0 7 17 5 10 0 0 0 0 260 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 13 2 8 0 0 2 0 294 0 0 0 100 4 0 0 10 211 103 6 0 2 0 0 303 0 0 0 100 5 0 0 14 113 54 110 0 0 2 0 570 0 0 0 100 6 0 0 3 229 111 20 0 0 0 0 11 0 0 0 100 7 0 0 0 13 3 34 1 0 0 0 1036 0 0 0 100 March 4, 2026 at 01:36:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 103 218 0 21 134 0 3 0 1 0 99 1 0 0 7 92 4 136 1 32 143 0 260 0 0 0 100 2 0 0 0 79 1 122 0 24 127 0 0 0 0 0 100 3 0 0 112 190 90 197 0 36 159 0 294 0 1 0 99 4 0 0 3 300 103 153 0 33 147 0 300 0 0 0 100 5 0 0 14 270 49 405 1 29 147 0 566 0 0 0 100 6 0 0 3 308 112 154 0 30 132 0 9 0 0 0 100 7 0 0 0 82 1 146 1 18 102 0 1032 0 1 0 99 March 4, 2026 at 01:36:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 26 0 2 0 0 5 0 0 0 100 1 0 0 14 16 4 14 0 2 0 0 271 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 12 3 6 0 0 6 0 295 0 0 0 100 4 0 0 3 211 103 6 0 1 0 0 303 0 0 0 100 5 0 0 14 114 4 110 0 0 4 0 568 0 0 0 100 6 0 0 3 329 161 122 0 0 0 0 12 0 0 0 100 7 0 0 0 10 1 34 0 0 1 0 1032 0 0 0 100 March 4, 2026 at 01:36:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 2788 105 1253 29 231 21 0 5284 6 3 0 91 1 21 0 7 654 4 1135 41 243 31 0 6641 6 2 0 92 2 7 0 0 617 0 1059 33 178 34 0 5777 6 2 0 93 3 14 0 0 603 4 1140 58 250 45 1 7585 6 2 0 92 4 18 0 311 717 106 924 23 207 26 0 5070 5 2 0 93 5 18 0 14 615 10 1002 15 152 38 1 4671 5 2 0 94 6 18 0 3 824 151 1017 27 203 26 0 5487 5 2 0 94 7 1 0 0 473 5 803 8 115 41 0 4813 4 1 0 94 March 4, 2026 at 01:36:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 101 249 3 23 1 0 943 1 1 0 98 1 0 0 7 91 5 137 5 29 7 0 1064 0 0 0 99 2 5 0 0 68 1 104 2 22 1 0 542 1 0 0 99 3 0 0 0 72 2 118 4 26 3 0 894 0 0 0 99 4 0 0 45 264 105 103 4 24 5 0 700 0 0 0 99 5 0 0 14 187 59 228 4 14 7 0 939 1 0 0 99 6 1 0 3 274 102 104 1 26 2 0 729 1 0 0 99 7 6 0 0 79 4 162 10 18 2 0 1822 1 0 0 99 March 4, 2026 at 01:36:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 1 0 302 0 1 0 99 1 0 0 7 24 5 20 1 0 0 0 260 0 0 0 100 2 0 0 0 12 0 14 0 1 0 0 13 0 0 0 100 3 0 0 0 9 2 4 0 0 2 0 295 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 5 0 0 14 124 59 120 1 0 0 0 577 0 0 0 100 6 0 0 3 213 104 8 0 1 0 0 6 0 0 0 100 7 0 0 0 10 1 34 1 0 1 0 1032 0 0 0 100 March 4, 2026 at 01:36:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2244 101 387 0 35 276 0 298 0 1 0 99 1 0 0 7 125 6 233 0 34 313 0 261 0 1 0 99 2 0 0 0 86 0 176 0 27 188 0 10 0 0 0 100 3 0 0 0 168 83 174 1 37 246 0 294 0 1 0 99 4 0 0 3 274 103 152 0 36 198 0 0 0 1 0 99 5 0 0 14 177 54 259 0 31 292 0 574 0 1 0 99 6 0 0 3 297 106 175 0 38 299 0 0 0 1 0 99 7 0 0 0 84 2 180 1 20 188 0 1032 0 1 0 99 March 4, 2026 at 01:36:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 3 2158 101 175 0 12 17 13 519 0 1 0 99 1 49 0 7 61 5 65 0 9 11 8 388 0 0 0 100 2 40 0 0 42 0 42 0 8 5 5 81 0 0 0 100 3 13 0 0 45 1 44 0 7 4 5 353 0 0 0 100 4 4 0 3 241 105 28 0 7 4 1 67 0 0 0 100 5 4 0 14 44 9 28 1 2 0 1 613 0 0 0 100 6 946 0 124 311 144 138 1 5 3 13 130 0 0 0 99 7 2485 0 0 75 10 127 2 12 11 13 2286 2 1 0 97 March 4, 2026 at 01:36:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 128 170 0 1 4 0 309 0 1 0 99 1 0 0 7 24 5 22 0 0 0 0 267 0 0 0 100 2 0 0 0 8 0 6 0 0 0 0 17 0 0 0 100 3 0 0 0 9 1 4 0 0 2 0 294 0 0 0 100 4 0 0 3 225 105 30 0 1 0 0 17 0 0 0 100 5 0 0 14 21 10 10 0 0 0 0 891 0 0 0 100 6 0 0 3 211 102 6 0 0 0 0 5 0 0 0 100 7 0 0 0 67 28 90 1 0 0 0 1117 0 0 0 100 March 4, 2026 at 01:36:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 96 0 0 2231 156 317 9 27 11 0 1691 1 1 0 98 1 29 0 7 115 6 210 3 29 4 0 1728 1 0 0 99 2 219 0 14 41 1 57 4 13 1 0 1051 3 0 0 97 3 496 0 0 72 2 126 5 23 5 2 1483 2 0 0 98 4 97 0 91 244 104 96 2 20 1 1 1165 1 0 0 98 5 134 0 14 69 3 101 6 19 8 0 2358 2 1 0 98 6 53 0 7 263 103 301 3 25 1 0 1782 2 0 0 98 7 0 0 0 57 2 154 5 18 7 0 2210 1 0 0 99 March 4, 2026 at 01:36:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 151 140 0 2 3 0 322 0 0 0 99 1 0 0 7 112 10 104 0 1 0 0 271 0 0 0 100 2 0 0 0 12 0 11 0 1 0 0 29 0 0 0 100 3 0 0 0 10 1 4 0 1 1 0 303 0 0 0 100 4 14 0 17 211 102 8 0 1 1 1 9 0 0 0 100 5 4 0 14 19 4 20 0 1 0 0 570 0 0 0 100 6 0 0 3 214 103 6 0 1 0 0 2 0 0 0 100 7 0 0 0 27 6 52 1 0 0 0 1137 0 0 0 100 March 4, 2026 at 01:36:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2215 153 312 0 29 137 0 302 0 1 0 99 1 0 0 7 89 6 164 0 33 160 0 260 0 0 0 100 2 0 0 0 63 1 123 0 18 161 0 0 0 0 0 100 3 0 0 0 162 86 150 0 27 189 0 294 0 1 0 99 4 0 0 3 347 104 279 0 35 147 0 1 0 1 0 99 5 0 0 14 82 5 144 0 25 158 0 565 0 1 0 99 6 0 0 3 297 103 186 0 28 171 0 0 0 0 0 100 7 0 0 0 80 9 162 2 21 147 0 1127 0 1 0 99 March 4, 2026 at 01:36:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 8 2168 151 131 0 5 10 1 376 0 1 0 99 1 0 0 7 137 5 144 0 7 6 1 311 0 0 0 100 2 0 0 0 26 2 27 0 4 2 0 38 0 0 0 100 3 0 0 21 15 2 12 0 5 7 0 297 0 0 0 100 4 0 0 3 217 102 14 0 3 4 0 9 0 0 0 100 5 0 0 14 19 4 15 0 5 13 0 568 0 0 0 100 6 0 0 3 223 104 18 1 5 10 0 72 0 0 0 100 7 0 0 0 42 12 69 1 4 6 0 1074 0 0 0 99 March 4, 2026 at 01:36:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 107 0 2 2 0 302 0 1 0 99 1 0 0 7 125 5 120 1 0 0 0 267 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 12 1 7 0 2 1 0 294 0 0 0 100 4 0 0 10 219 104 18 0 1 0 0 12 0 0 0 100 5 0 0 14 17 9 6 1 0 0 0 566 0 0 0 100 6 0 0 3 219 104 12 0 0 0 0 7 0 0 0 100 7 0 0 0 30 7 58 1 1 1 0 1041 0 0 0 100 March 4, 2026 at 01:36:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 151 206 0 2 6 0 300 0 1 0 99 1 0 0 7 52 6 30 0 1 0 0 281 0 0 0 100 2 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 3 0 0 112 9 1 5 0 0 2 0 294 0 0 0 100 4 0 0 2 227 102 4 0 0 0 0 0 0 0 0 100 5 0 0 14 29 4 10 1 1 0 0 568 0 0 0 100 6 0 0 4 231 104 6 0 0 0 0 5 0 0 0 100 7 0 0 0 44 9 52 1 0 0 0 1040 0 0 0 100 March 4, 2026 at 01:36:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 210 0 0 0 0 298 0 1 0 99 1 0 0 7 19 6 16 0 0 0 0 269 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 11 2 6 0 0 3 0 295 0 0 0 100 4 0 0 3 212 103 6 0 1 0 0 4 0 0 0 100 5 0 0 14 10 3 6 0 0 0 0 567 0 0 0 100 6 0 0 3 210 102 4 0 1 0 0 0 0 0 0 100 7 0 0 0 36 12 60 1 0 0 0 1063 0 0 0 100 March 4, 2026 at 01:36:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2942 108 1520 43 302 219 0 6002 6 3 0 90 1 19 0 7 942 8 1662 49 324 223 0 7813 7 3 0 91 2 0 0 7 798 3 1406 42 241 286 0 6081 7 2 0 91 3 0 0 0 955 125 1581 41 302 287 0 8128 5 3 0 92 4 1 0 367 1009 105 1586 29 311 273 0 6320 6 3 0 92 5 0 0 14 724 9 1257 20 208 285 1 5326 4 2 0 94 6 15 0 3 860 106 1219 25 250 266 0 6750 5 2 0 93 7 0 0 0 589 3 1046 30 168 233 0 5898 6 2 0 92 March 4, 2026 at 01:36:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 10 0 2 0 0 305 0 0 0 99 1 0 0 7 121 4 118 1 1 0 0 271 0 0 0 100 2 0 0 0 9 0 4 0 0 0 0 13 0 0 0 100 3 0 0 0 109 51 104 0 0 1 0 294 0 0 0 100 4 0 0 2 215 103 14 0 1 0 0 1 0 0 0 100 5 0 0 14 23 9 20 1 0 0 0 575 0 0 0 100 6 0 0 4 211 103 4 0 0 0 0 1 0 0 0 100 7 0 0 0 10 1 34 1 0 0 0 1033 0 0 0 100 March 4, 2026 at 01:36:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 14 0 2 2 0 300 0 0 0 100 1 0 0 7 117 4 116 0 3 0 0 267 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 10 0 0 0 100 3 0 0 0 107 51 102 0 0 2 0 294 0 0 0 100 4 0 0 3 217 104 16 0 0 0 0 13 0 0 0 100 5 0 0 14 26 14 16 1 0 0 0 573 0 0 0 100 6 0 0 3 215 104 10 0 0 0 0 10 0 0 0 100 7 0 0 0 13 1 38 1 0 0 0 1031 0 0 0 100 March 4, 2026 at 01:36:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 6 0 0 4 0 301 0 1 0 99 1 0 0 7 123 5 116 0 1 1 0 260 0 0 0 100 2 0 0 0 9 1 2 0 0 1 0 10 0 0 0 100 3 0 0 0 110 52 104 0 1 1 0 294 0 0 0 100 4 0 0 7 213 103 6 0 0 1 0 1 0 0 0 100 5 0 0 14 27 9 26 0 1 1 0 572 0 0 0 100 6 0 0 7 213 102 2 0 0 1 0 0 0 0 0 100 7 0 0 0 13 2 34 1 0 1 0 1033 0 0 0 100 March 4, 2026 at 01:36:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 104 0 0 2148 102 80 0 15 13 14 464 0 1 0 99 1 35 0 7 163 4 175 0 9 11 8 352 0 0 0 100 2 49 0 2 45 0 55 0 10 10 9 124 0 0 0 100 3 17 0 0 46 5 34 0 8 9 1 365 0 0 0 100 4 11 0 3 247 106 39 0 5 4 3 109 0 0 0 100 5 609 0 14 45 7 39 2 6 4 3 1782 1 1 0 98 6 4 0 3 339 151 133 0 8 3 1 78 0 0 0 100 7 2722 0 112 27 1 92 3 6 4 17 1561 1 1 0 98 March 4, 2026 at 01:36:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 38 0 3 4 0 300 0 0 0 100 1 0 0 7 96 4 90 1 0 0 0 263 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 10 0 0 0 100 3 0 0 0 8 1 4 0 0 4 0 294 0 0 0 100 4 0 0 3 219 107 12 1 0 0 0 6 0 0 0 100 5 0 0 14 13 4 10 1 0 1 0 565 0 0 0 100 6 0 0 3 318 153 114 0 1 1 0 4 0 0 0 100 7 0 0 0 11 1 36 1 1 2 0 1116 0 0 0 100 March 4, 2026 at 01:36:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2190 108 268 8 30 3 0 1972 1 1 0 98 1 268 0 7 88 4 202 7 27 6 0 2181 2 1 0 97 2 127 0 0 65 2 256 4 19 2 2 1682 2 0 0 98 3 275 0 11 61 4 92 3 23 8 0 1360 2 0 0 97 4 54 0 87 270 104 272 1 32 5 0 1715 1 1 0 98 5 7 0 14 55 5 99 2 24 10 0 1704 2 0 0 98 6 152 0 3 360 152 218 2 31 3 0 1414 1 0 0 99 7 125 0 0 61 3 204 3 26 5 1 2687 2 1 0 98 March 4, 2026 at 01:36:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 120 0 2 0 0 300 0 0 0 100 1 0 0 7 26 6 24 0 0 0 0 271 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 1 0 0 0 100 3 0 0 0 23 8 16 1 0 1 0 301 0 0 0 100 4 0 0 2 221 104 19 0 1 0 0 13 0 0 0 100 5 0 0 14 15 9 6 0 0 0 0 566 0 0 0 100 6 0 0 4 311 152 106 0 0 0 0 5 0 0 0 100 7 0 0 0 16 1 42 1 0 0 0 1122 0 0 0 100 March 4, 2026 at 01:36:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 103 122 1 3 7 0 322 0 1 0 99 1 0 0 7 113 43 125 0 10 14 0 283 0 0 0 100 2 0 0 0 13 0 12 0 8 9 0 4 0 1 0 99 3 0 0 0 30 6 28 0 4 11 0 343 0 0 0 100 4 0 0 3 219 102 17 1 7 3 0 17 0 0 0 100 5 0 0 14 22 4 27 2 4 5 0 720 0 0 0 100 6 1 0 25 250 117 52 0 5 8 0 15 0 0 0 100 7 0 0 7 19 3 47 1 7 11 0 1036 0 0 0 100 March 4, 2026 at 01:36:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 102 112 0 1 10 0 301 0 0 0 99 1 0 0 7 143 62 144 1 1 0 0 272 0 0 0 100 2 0 0 0 11 1 4 0 1 0 0 4 0 0 0 100 3 0 0 0 11 2 4 0 0 11 0 295 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 10 3 6 1 0 0 0 566 0 0 0 100 6 0 0 3 212 102 5 0 1 0 0 0 0 0 0 100 7 0 0 0 13 1 36 1 0 0 0 1033 0 0 0 100 March 4, 2026 at 01:36:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 102 250 2 23 168 0 298 0 1 0 99 1 0 0 7 248 62 334 1 37 190 0 271 0 1 0 99 2 0 0 0 95 2 151 0 23 139 0 5 0 0 0 100 3 0 0 0 186 91 156 1 28 220 0 294 0 1 0 99 4 0 0 3 297 102 155 1 33 151 0 0 0 1 0 99 5 0 0 14 83 5 121 1 25 142 0 569 0 1 0 99 6 0 0 115 362 102 310 0 28 138 0 0 0 1 0 99 7 0 0 0 92 1 170 2 28 122 0 1032 0 1 0 99 March 4, 2026 at 01:36:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 108 0 0 1 0 299 0 0 0 99 1 0 0 7 142 63 136 0 0 0 0 271 0 0 0 100 2 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 2 0 0 2 0 294 0 0 0 100 4 0 0 3 211 103 2 0 0 0 0 0 0 0 0 100 5 0 0 14 10 3 6 0 0 0 0 565 0 0 0 100 6 0 0 10 212 102 6 0 0 0 0 3 0 0 0 100 7 0 0 0 10 1 34 0 0 0 0 1032 0 0 0 100 March 4, 2026 at 01:36:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2842 104 1386 37 265 59 0 7250 7 3 0 91 1 16 0 7 823 27 1406 34 280 33 0 7328 6 2 0 92 2 9 0 0 772 30 1296 22 204 23 0 5971 5 2 0 93 3 19 0 0 703 2 1336 49 260 48 0 8387 7 2 0 91 4 1 0 367 877 105 1251 20 228 30 0 5812 6 2 0 92 5 1 0 14 562 11 975 18 181 29 0 5737 6 2 0 93 6 5 0 3 817 105 1113 32 229 21 0 6813 5 2 0 93 7 31 0 0 496 4 868 19 146 19 0 5243 5 2 0 93 March 4, 2026 at 01:36:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 0 0 1 0 298 0 1 0 99 1 0 0 7 24 9 16 1 0 1 0 265 0 0 0 100 2 0 0 0 108 51 102 0 1 0 0 0 0 0 0 100 3 0 0 0 14 2 6 1 1 2 0 304 0 0 0 100 4 0 0 7 210 102 2 0 0 1 0 0 0 0 0 100 5 0 0 14 20 5 18 1 1 1 0 567 0 0 0 100 6 0 0 7 212 102 2 0 0 1 0 0 0 0 0 100 7 0 0 0 13 2 34 1 0 1 0 1032 0 0 0 100 March 4, 2026 at 01:36:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 114 0 1 9 0 302 0 1 0 99 1 0 0 7 27 10 22 0 0 0 0 270 0 0 0 100 2 0 0 0 115 55 110 0 0 0 0 6 0 0 0 100 3 0 0 0 12 2 8 1 1 6 0 308 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 11 4 8 0 0 0 0 568 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 34 1 0 0 0 1032 0 0 0 100 March 4, 2026 at 01:36:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2184 102 265 0 23 238 0 298 0 1 0 99 1 0 0 7 103 10 192 0 35 294 0 267 0 1 0 99 2 0 0 0 185 50 271 0 32 214 0 0 0 0 0 100 3 0 0 0 162 81 160 0 29 216 0 304 0 0 0 99 4 0 0 3 287 102 176 0 30 227 0 0 0 0 0 100 5 0 0 14 64 3 119 0 24 179 0 566 0 0 0 99 6 0 0 3 361 102 327 0 42 205 0 0 0 0 0 100 7 0 0 0 82 1 193 0 25 225 0 1031 0 1 0 99 March 4, 2026 at 01:36:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2111 103 119 1 0 3 0 305 0 0 0 100 1 0 0 7 25 9 22 0 1 0 0 601 0 0 0 100 2 0 0 0 113 54 108 0 0 0 0 7 0 0 0 100 3 0 0 0 13 2 10 1 0 6 0 310 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 1 0 0 0 100 5 0 0 14 11 4 10 0 1 0 0 569 0 0 0 100 6 0 0 3 218 104 14 0 0 0 0 7 0 0 0 100 7 0 0 0 14 1 44 1 1 0 0 1033 0 0 0 100 March 4, 2026 at 01:36:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 116 0 0 3 0 300 0 0 0 100 1 0 0 7 15 4 14 1 1 0 0 267 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 3 0 304 0 0 0 100 4 1 0 3 218 104 18 0 0 0 0 15 0 0 0 100 5 0 0 14 15 9 6 1 0 1 0 565 0 0 0 100 6 0 0 3 219 106 14 0 0 0 0 10 0 0 0 100 7 0 0 0 14 1 40 1 0 0 0 1032 0 0 0 100 March 4, 2026 at 01:36:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 122 0 1 3 0 301 0 0 0 99 1 0 0 7 23 9 20 0 0 0 0 288 0 0 0 100 2 0 0 0 111 53 108 0 1 0 0 6 0 0 0 100 3 0 0 0 10 1 8 0 0 5 0 328 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 11 4 8 0 0 0 0 568 0 0 0 100 6 0 0 3 217 105 8 0 0 0 0 10 0 0 0 100 7 0 0 0 17 3 42 1 0 0 0 1035 0 0 0 100 March 4, 2026 at 01:36:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 116 0 1 1 0 299 0 1 0 99 1 0 0 7 36 13 36 0 1 0 0 272 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 8 0 0 4 0 308 0 0 0 100 4 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 9 3 6 0 0 0 0 566 0 0 0 100 6 0 0 4 212 102 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 34 1 0 0 0 1032 0 0 0 100 March 4, 2026 at 01:36:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 115 0 1 3 0 300 0 0 0 100 1 0 0 7 28 10 26 0 0 1 0 585 0 0 0 100 2 0 0 0 70 31 64 0 0 2 0 3 0 0 0 100 3 0 0 0 53 22 52 0 1 4 0 310 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 1 0 0 0 100 5 0 0 14 12 4 8 0 0 0 0 569 0 0 0 100 6 0 0 3 220 104 18 0 0 3 0 4 0 0 0 100 7 0 0 0 10 1 34 1 0 0 0 1032 0 0 0 100 March 4, 2026 at 01:36:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 115 0 1 5 0 300 0 0 0 100 1 0 0 7 53 22 48 1 2 0 0 260 0 0 0 100 2 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 3 0 0 0 72 33 66 0 0 2 0 304 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 9 3 6 1 0 0 0 566 0 0 0 100 6 0 0 3 224 109 16 0 0 0 0 11 0 0 0 100 7 0 0 0 10 1 36 0 1 1 0 1035 0 0 0 100 March 4, 2026 at 01:36:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 72 0 0 2155 105 165 0 6 7 3 400 0 1 0 99 1 9 0 7 151 54 147 0 11 5 2 376 0 0 0 100 2 4 0 0 41 2 31 0 6 3 1 51 0 0 0 100 3 3320 0 113 34 1 75 4 6 18 14 1548 2 1 0 97 4 105 0 3 261 104 85 0 9 8 19 139 0 0 0 100 5 27 0 15 60 11 65 0 12 11 9 720 0 0 0 100 6 28 0 3 248 103 60 0 13 5 7 158 0 0 0 100 7 33 0 0 42 3 64 1 6 0 3 1167 0 0 0 100 March 4, 2026 at 01:36:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 107 122 0 0 8 0 306 0 1 0 99 1 0 0 7 116 55 110 0 0 1 0 263 0 0 0 100 2 0 0 0 13 3 6 0 0 1 0 4 0 0 0 100 3 0 0 0 10 2 2 0 0 7 0 294 0 0 0 100 4 0 0 7 209 102 4 0 1 0 0 0 0 0 0 100 5 0 0 14 15 5 10 0 0 1 0 577 0 0 0 100 6 0 0 7 212 102 2 0 0 1 0 0 0 0 0 100 7 0 0 0 13 2 34 1 0 1 0 1110 0 0 0 100 March 4, 2026 at 01:36:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 108 124 0 0 8 0 626 0 1 0 99 1 0 0 7 118 56 116 0 0 0 0 264 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 13 1 10 1 0 6 0 303 0 0 0 100 4 0 0 3 215 103 16 0 2 0 0 1 0 0 0 100 5 0 0 14 11 4 8 0 0 0 0 567 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 1 0 0 0 100 7 0 0 0 10 1 34 1 0 0 0 1111 0 0 0 100 March 4, 2026 at 01:36:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 116 0 0 8 0 303 0 0 0 100 1 0 0 7 124 59 120 1 0 0 0 265 0 0 0 100 2 0 0 0 6 0 2 0 0 1 0 0 0 0 0 100 3 0 0 0 7 1 4 0 0 3 0 294 0 0 0 100 4 0 0 3 211 102 6 0 0 0 0 0 0 0 0 100 5 0 0 14 14 3 16 1 1 0 0 566 0 0 0 100 6 0 0 3 213 102 10 0 1 2 0 10 0 0 0 100 7 0 0 0 10 1 34 1 0 1 0 1112 0 0 0 100 March 4, 2026 at 01:36:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 114 0 1 2 0 297 0 1 0 99 1 0 0 7 127 60 124 0 0 0 0 270 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 2 0 295 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 11 4 8 0 0 0 0 568 0 0 0 100 6 0 0 3 210 102 4 0 0 0 0 10 0 0 0 100 7 0 0 0 11 1 36 1 0 1 0 1113 0 0 0 100 March 4, 2026 at 01:36:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 116 0 0 1 0 300 0 1 0 99 1 0 0 7 122 58 120 0 0 0 0 272 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 2 0 294 0 0 0 100 4 0 0 3 218 104 20 0 0 0 0 14 0 0 0 100 5 0 0 14 18 10 8 0 0 0 0 566 0 0 0 100 6 0 0 3 217 102 18 0 1 0 0 15 0 0 0 100 7 0 0 0 14 1 40 1 0 2 0 1111 0 0 0 100 March 4, 2026 at 01:36:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 308 0 0 2218 135 328 11 19 4 0 2241 2 1 0 97 1 29 0 7 126 22 215 4 32 6 0 1605 2 0 0 98 2 122 0 0 58 2 101 2 24 0 0 1148 2 0 0 98 3 5 0 0 87 5 191 6 34 3 0 1788 1 0 0 99 4 18 0 87 243 104 174 6 24 2 0 1345 1 1 0 99 5 5 0 14 82 9 160 5 18 0 0 1661 2 0 0 98 6 233 0 3 265 104 113 4 20 4 1 1206 1 0 0 99 7 284 0 0 54 3 93 2 14 1 0 2757 3 1 0 96 March 4, 2026 at 01:37:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 152 212 0 0 1 0 298 0 1 0 99 1 0 0 7 18 5 14 1 0 0 0 269 0 0 0 100 2 0 0 0 20 7 16 0 1 0 0 12 0 0 0 100 3 0 0 0 10 2 6 0 0 1 0 298 0 0 0 100 4 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 10 3 6 2 0 0 0 566 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 38 1 1 1 0 1142 0 0 0 100 March 4, 2026 at 01:37:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2213 152 301 0 13 134 0 301 0 1 0 99 1 0 0 7 81 6 150 0 29 132 0 261 0 0 0 100 2 0 0 0 74 6 129 0 17 127 0 6 0 0 0 100 3 0 0 0 145 68 149 0 25 122 0 294 0 0 0 99 4 0 0 3 278 102 151 0 29 154 0 0 0 1 0 99 5 0 0 14 58 4 107 0 18 112 0 568 0 0 0 100 6 0 0 3 315 102 219 0 26 91 0 0 0 0 0 100 7 0 0 0 70 1 160 1 22 118 0 1123 0 1 0 99 March 4, 2026 at 01:37:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2160 152 209 0 3 1 0 307 0 1 0 99 1 0 0 7 18 4 20 0 2 0 0 271 0 0 0 100 2 0 0 0 27 10 20 1 0 0 0 12 0 0 0 100 3 0 0 0 17 2 10 0 0 3 0 294 0 0 0 100 4 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 9 3 6 0 0 0 0 566 0 0 0 100 6 0 0 4 212 101 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 36 1 1 0 0 1123 0 0 0 100 March 4, 2026 at 01:37:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2140 130 180 0 4 7 0 319 0 1 0 99 1 0 0 7 74 26 79 0 5 9 0 292 0 0 0 100 2 0 0 0 30 7 32 0 5 5 1 95 0 0 0 100 3 0 0 8 24 3 24 0 3 10 0 304 0 1 0 99 4 0 0 3 231 104 33 1 3 6 0 43 0 0 0 100 5 0 0 14 33 12 25 0 0 6 0 644 0 0 0 100 6 0 0 3 224 103 26 0 10 10 0 53 0 0 0 100 7 0 0 7 18 1 43 0 3 5 0 1036 0 0 0 100 March 4, 2026 at 01:37:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 102 117 0 1 5 0 300 0 1 0 99 1 0 0 7 120 55 110 1 0 1 0 260 0 0 0 100 2 0 0 0 14 1 10 0 1 1 0 0 0 0 0 100 3 0 0 0 13 3 4 0 0 3 0 294 0 0 0 100 4 0 0 7 211 102 4 0 0 1 0 3 0 0 0 100 5 0 0 14 30 12 24 1 0 1 0 582 0 0 0 100 6 0 0 7 211 101 2 0 1 0 0 0 0 0 0 100 7 0 0 0 16 2 36 1 0 1 0 1032 0 0 0 100 March 4, 2026 at 01:37:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2109 103 120 0 0 5 0 300 0 1 0 99 1 0 0 7 130 54 112 0 2 0 0 260 0 0 0 100 2 0 0 0 23 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 30 2 14 0 1 3 0 294 0 0 0 100 4 0 0 3 224 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 39 10 18 0 0 0 0 574 0 0 0 100 6 0 0 3 230 104 8 0 1 0 0 8 0 0 0 100 7 0 0 0 26 1 34 1 0 0 0 1034 0 0 0 100 March 4, 2026 at 01:37:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 118 0 1 6 0 300 0 1 0 99 1 0 0 7 116 55 112 0 0 0 0 260 0 0 0 100 2 0 0 0 7 0 2 0 0 2 0 0 0 0 0 100 3 0 0 0 10 2 4 0 0 2 0 294 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 14 21 8 16 1 0 0 0 571 0 0 0 100 6 0 0 3 211 101 6 0 0 1 0 0 0 0 0 100 7 0 0 0 12 1 34 1 0 0 0 1033 0 0 0 100 March 4, 2026 at 01:37:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 0 2862 103 1444 54 228 29 1 5990 6 3 0 91 1 0 0 0 825 34 1450 47 274 26 0 7394 6 2 0 92 2 18 0 2 697 4 1135 35 199 47 1 4674 6 2 0 93 3 39 0 7 719 4 1369 49 262 47 1 8496 7 2 0 91 4 0 0 353 819 122 1143 24 250 24 0 5789 5 2 0 93 5 3 0 14 567 9 924 13 146 17 0 4675 4 1 0 94 6 17 0 3 829 106 1110 39 226 72 0 6826 6 2 0 92 7 0 0 0 491 3 847 13 137 32 0 4746 4 1 0 95 March 4, 2026 at 01:37:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 116 0 1 2 0 299 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 5 0 0 0 100 3 0 0 7 15 4 12 1 1 3 0 562 0 0 0 100 4 0 0 3 310 151 108 0 0 0 0 10 0 0 0 100 5 0 0 14 30 11 28 2 1 0 0 582 0 0 0 100 6 0 0 3 210 101 4 0 0 0 0 5 0 0 0 100 7 0 0 0 12 1 38 0 0 0 0 1034 0 0 0 100 March 4, 2026 at 01:37:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 112 0 0 9 0 300 0 1 0 99 1 0 0 0 14 4 8 0 0 0 0 22 0 0 0 100 2 0 0 0 21 7 14 1 0 0 0 10 0 0 0 100 3 0 0 7 19 7 16 0 0 4 0 559 0 0 0 100 4 0 0 3 309 152 104 0 0 0 0 10 0 0 0 100 5 0 0 14 9 3 8 0 1 0 0 566 0 0 0 100 6 0 0 3 213 103 4 0 0 0 0 3 0 0 0 100 7 0 0 0 15 3 38 2 0 1 0 1035 0 0 0 100 March 4, 2026 at 01:37:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 112 0 0 0 0 300 0 0 0 99 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 5 0 0 0 100 3 0 0 7 12 4 8 0 0 4 0 554 0 0 0 100 4 0 0 3 308 151 106 0 1 0 0 10 0 0 0 100 5 1 0 14 12 3 8 1 0 0 0 609 0 0 0 100 6 0 0 3 212 101 10 0 1 0 0 0 0 0 0 100 7 0 0 0 10 1 34 1 0 0 0 1033 0 0 0 100 March 4, 2026 at 01:37:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 102 270 0 31 263 0 310 0 1 0 99 1 0 0 0 107 7 208 0 46 274 0 6 0 1 0 99 2 0 0 0 89 6 155 0 29 186 0 325 0 0 0 99 3 0 0 7 173 90 162 0 34 253 0 556 0 1 0 99 4 0 0 3 397 152 288 0 38 205 0 10 0 0 0 100 5 0 0 14 69 4 132 0 21 193 0 566 0 0 0 99 6 0 0 3 374 102 344 0 43 231 0 2 0 1 0 99 7 0 0 0 102 1 231 1 35 246 0 1032 0 1 0 99 March 4, 2026 at 01:37:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 114 0 0 13 0 299 0 1 0 99 1 0 0 0 25 8 20 0 1 0 0 10 0 0 0 100 2 0 0 0 9 0 4 0 2 0 0 3 0 0 0 100 3 0 0 7 17 6 12 1 0 9 0 558 0 0 0 100 4 0 0 3 308 151 104 0 0 0 0 10 0 0 0 100 5 0 0 14 9 3 6 0 0 0 0 565 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 34 1 0 0 0 1033 0 0 0 100 March 4, 2026 at 01:37:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 126 0 1 0 0 302 0 1 0 99 1 0 0 0 21 8 16 0 0 0 0 13 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 2 0 0 0 100 3 0 0 7 20 7 20 0 1 0 0 566 0 0 0 100 4 0 0 3 310 151 108 0 0 0 0 25 0 0 0 100 5 0 0 14 25 12 18 0 0 0 0 582 0 0 0 100 6 0 0 3 212 102 8 0 0 0 0 8 0 0 0 100 7 0 0 0 16 1 42 1 0 1 0 1033 0 0 0 100 March 4, 2026 at 01:37:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 2 0 298 0 1 0 99 1 0 0 0 34 10 28 0 1 1 0 10 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 7 16 5 10 0 0 1 0 557 0 0 0 100 4 0 0 7 309 151 106 0 0 0 0 10 0 0 0 100 5 0 0 14 14 5 8 1 0 1 0 566 0 0 0 100 6 0 0 7 210 101 0 0 0 1 0 0 0 0 0 100 7 0 0 0 12 2 34 0 0 1 0 1034 0 0 0 100 March 4, 2026 at 01:37:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 116 0 0 2 0 307 0 0 0 100 1 0 0 0 22 8 18 0 1 0 0 327 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 17 6 12 1 0 10 0 560 0 0 0 100 4 0 0 3 308 151 104 0 0 0 0 10 0 0 0 100 5 0 0 14 11 4 8 0 0 0 0 567 0 0 0 100 6 0 0 3 217 105 10 0 0 0 0 5 0 0 0 100 7 0 0 0 11 1 36 1 1 2 0 1035 0 0 0 100 March 4, 2026 at 01:37:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 116 0 0 5 0 300 0 1 0 99 1 0 0 0 12 2 8 0 1 3 0 0 0 0 0 100 2 0 0 0 11 0 12 0 2 0 0 0 0 0 0 100 3 0 0 7 12 4 8 1 0 1 0 554 0 0 0 100 4 0 0 3 307 151 104 0 0 0 0 10 0 0 0 100 5 0 0 14 9 3 6 0 0 0 0 566 0 0 0 100 6 0 0 3 220 106 16 0 0 1 0 6 0 0 0 100 7 0 0 0 13 2 38 1 0 2 0 1033 0 0 0 100 March 4, 2026 at 01:37:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 117 0 1 5 0 305 0 0 0 99 1 0 0 0 11 2 8 0 2 0 0 14 0 0 0 100 2 22 0 0 13 3 8 0 0 0 0 7 0 0 0 100 3 0 0 7 26 8 26 0 1 3 0 557 0 0 0 100 4 0 0 3 307 151 104 0 0 0 0 10 0 0 0 100 5 1 0 14 11 4 8 0 0 0 0 572 0 0 0 100 6 0 0 3 220 107 12 0 0 0 0 10 0 0 0 100 7 0 0 0 11 2 36 0 0 0 0 1034 0 0 0 100 March 4, 2026 at 01:37:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 118 0 1 0 0 300 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 14 4 12 0 0 0 0 561 0 0 0 100 4 0 0 3 311 152 106 0 0 0 0 10 0 0 0 100 5 1 0 14 27 13 22 1 0 0 0 583 0 0 0 100 6 0 0 3 217 105 12 0 0 0 0 10 0 0 0 100 7 0 0 0 14 1 40 1 0 1 0 1029 0 0 0 100 March 4, 2026 at 01:37:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 118 0 1 1 0 308 0 0 0 100 1 0 0 0 18 5 14 0 0 0 0 5 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 19 6 16 0 1 3 0 559 0 0 0 100 4 0 0 3 311 151 112 0 1 0 0 0 0 0 0 100 5 0 0 14 9 3 6 0 0 0 0 567 0 0 0 100 6 0 0 3 227 109 16 0 0 0 0 330 0 0 0 100 7 0 0 0 16 4 40 1 0 0 0 1032 0 0 0 100 March 4, 2026 at 01:37:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 103 113 0 0 3 0 300 0 0 0 100 1 0 0 0 17 6 12 0 0 0 0 5 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 13 4 8 1 0 2 0 555 0 0 0 100 4 0 0 3 311 152 108 0 2 0 0 10 0 0 0 100 5 0 0 14 12 4 8 0 0 0 0 566 0 0 0 100 6 0 0 3 212 101 10 0 1 0 0 0 0 0 0 100 7 0 0 0 10 1 34 1 0 1 0 1028 0 0 0 100 March 4, 2026 at 01:37:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 115 0 0 3 0 300 0 1 0 99 1 0 0 0 25 8 22 0 0 1 0 9 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 22 9 18 0 0 3 0 563 0 0 0 100 4 0 0 3 309 152 104 0 0 0 0 10 0 0 0 100 5 0 0 14 11 5 6 0 0 0 0 567 0 0 0 100 6 0 0 3 212 101 8 0 0 2 0 0 0 0 0 100 7 0 0 0 15 3 40 1 0 2 0 1030 0 0 0 100 March 4, 2026 at 01:37:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 115 0 0 8 0 300 0 0 0 100 1 0 0 0 22 8 16 0 0 0 0 9 0 0 0 100 2 0 0 0 6 0 2 0 1 0 0 3 0 0 0 100 3 0 0 7 12 4 8 0 0 4 0 554 0 0 0 100 4 0 0 3 307 151 104 0 0 0 0 10 0 0 0 100 5 0 0 14 9 3 6 1 0 0 0 565 0 0 0 100 6 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 7 0 0 0 15 1 44 1 1 1 0 1028 0 0 0 100 March 4, 2026 at 01:37:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 132 0 1 1 0 304 0 0 0 99 1 0 0 0 20 7 16 0 0 0 0 329 0 0 0 100 2 0 0 0 14 4 10 0 0 0 0 6 0 0 0 100 3 0 0 7 18 6 16 0 0 0 0 563 0 0 0 100 4 0 0 3 310 151 110 0 0 0 0 34 0 0 0 100 5 0 0 14 21 10 16 0 0 0 0 578 0 0 0 100 6 0 0 3 211 101 8 0 0 0 0 8 0 0 0 100 7 0 0 0 17 2 42 1 0 0 0 1029 0 0 0 100 March 4, 2026 at 01:37:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 112 0 0 4 0 300 0 1 0 99 1 0 0 0 14 3 6 0 1 0 0 0 0 0 0 100 2 0 0 0 23 8 14 0 0 1 0 10 0 0 0 100 3 0 0 7 16 5 10 1 0 1 0 557 0 0 0 100 4 0 0 7 308 151 104 0 0 1 0 10 0 0 0 100 5 0 0 14 16 6 10 0 0 1 0 567 0 0 0 100 6 0 0 7 210 101 0 0 0 1 0 0 0 0 0 100 7 0 0 0 13 2 34 1 0 1 0 1029 0 0 0 100 March 4, 2026 at 01:37:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 127 0 0 2144 101 169 0 6 6 10 378 0 1 0 99 1 26 0 1 49 2 60 0 10 6 7 119 0 0 0 100 2 18 0 0 42 4 36 0 6 5 3 103 0 0 0 100 3 4 0 7 46 6 38 1 8 2 1 617 0 0 0 100 4 1832 0 3 291 130 98 2 7 5 7 366 0 1 0 99 5 25 0 14 86 24 98 0 6 9 9 679 0 0 0 100 6 13 0 3 242 102 46 0 8 8 1 180 0 0 0 100 7 1508 0 112 32 2 89 3 4 8 12 2099 2 1 0 98 March 4, 2026 at 01:37:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 105 122 0 1 2 0 300 0 0 0 99 1 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 2 0 0 0 20 5 20 0 1 1 0 5 0 0 0 100 3 0 0 7 14 5 10 0 0 1 0 554 0 0 0 100 4 0 0 2 211 103 6 0 0 0 0 10 0 0 0 100 5 0 0 14 111 54 108 1 0 1 0 567 0 0 0 100 6 0 0 4 211 102 6 0 0 0 0 0 0 0 0 100 7 0 0 0 15 3 40 1 1 0 0 1111 0 0 0 100 March 4, 2026 at 01:37:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 117 0 0 3 0 305 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 28 10 20 1 0 0 0 334 0 0 0 100 3 0 0 7 22 7 20 1 2 3 0 562 0 0 0 100 4 0 0 3 209 102 4 0 0 0 0 10 0 0 0 100 5 0 0 14 109 53 106 0 0 0 0 566 0 0 0 100 6 0 0 3 207 101 2 0 1 0 0 0 0 0 0 100 7 0 0 0 12 2 36 1 0 1 0 1112 0 0 0 100 March 4, 2026 at 01:37:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 117 0 2 3 0 300 0 1 0 99 1 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 1 0 7 27 8 30 1 1 7 0 566 0 0 0 100 4 0 0 3 210 102 6 0 0 0 0 10 0 0 0 100 5 0 0 14 127 62 120 1 0 1 0 581 0 0 0 100 6 0 0 3 209 101 4 0 0 0 0 5 0 0 0 100 7 0 0 0 12 1 36 0 0 0 0 1112 0 0 0 100 March 4, 2026 at 01:37:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 116 0 0 4 0 300 0 0 0 100 1 0 0 0 13 4 8 0 0 0 0 22 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 29 11 24 0 0 1 0 564 0 0 0 100 4 0 0 3 215 102 16 0 2 0 0 13 0 0 0 100 5 0 0 14 109 53 106 0 0 0 0 566 0 0 0 100 6 0 0 3 211 102 2 0 0 0 0 1 0 0 0 100 7 0 0 0 16 4 40 1 1 0 0 1115 0 0 0 100 March 4, 2026 at 01:37:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 114 0 0 4 0 300 0 1 0 99 1 0 0 0 14 3 12 0 0 0 0 10 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 26 11 22 0 0 5 0 563 0 0 0 100 4 0 0 3 209 102 4 0 0 0 0 10 0 0 0 100 5 0 0 14 110 53 106 1 0 0 0 566 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 38 1 0 0 0 1128 0 0 0 100 March 4, 2026 at 01:37:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 119 0 1 0 0 305 0 0 0 100 1 0 0 0 13 3 8 0 0 0 0 1 0 0 0 100 2 0 0 0 12 2 8 0 0 0 0 3 0 0 0 100 3 0 0 7 26 10 20 1 0 1 0 876 0 0 0 100 4 0 0 3 211 102 6 0 0 0 0 10 0 0 0 100 5 0 0 14 115 53 118 0 1 0 0 566 0 0 0 100 6 0 0 3 212 101 6 0 0 0 0 0 0 0 0 100 7 0 0 0 15 3 40 1 0 0 0 1114 0 0 0 100 March 4, 2026 at 01:37:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 114 0 0 2 0 301 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 20 7 14 0 0 0 0 10 0 0 0 100 3 0 0 7 13 4 12 1 1 1 0 558 0 0 0 100 4 0 0 3 209 102 4 0 0 0 0 10 0 0 0 100 5 0 0 14 113 54 110 0 1 0 0 567 0 0 0 100 6 0 0 3 212 101 10 0 1 0 0 0 0 0 0 100 7 0 0 0 10 1 34 1 0 1 0 1111 0 0 0 100 March 4, 2026 at 01:37:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 299 0 13 2150 102 185 9 17 7 0 2083 3 1 0 96 1 252 0 0 92 2 190 10 45 1 0 2002 1 0 0 98 2 131 0 0 117 8 207 8 28 9 0 1631 2 0 0 98 3 273 0 7 121 13 258 10 31 17 0 2558 2 1 0 97 4 42 0 87 330 113 254 10 43 4 0 1900 1 0 0 98 5 6 0 14 173 40 269 13 45 2 0 2325 2 0 0 98 6 2 0 3 307 101 291 4 44 8 0 1931 1 0 0 99 7 0 0 0 80 2 185 3 28 1 0 2510 1 0 0 99 March 4, 2026 at 01:37:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 115 0 0 2 0 304 0 0 0 100 1 0 0 0 16 3 8 0 0 1 0 7 0 0 0 100 2 0 0 0 16 3 8 0 0 1 0 8 0 0 0 100 3 0 0 7 35 12 30 0 2 2 0 577 0 0 0 100 4 0 0 21 310 151 108 0 1 6 0 15 0 0 0 100 5 0 0 14 17 5 10 1 1 6 0 579 0 0 0 100 6 13 0 7 217 102 4 0 0 3 0 9 0 0 0 100 7 0 0 0 21 2 47 1 3 1 0 1137 0 0 0 100 March 4, 2026 at 01:37:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1631 0 27 2279 103 431 67 41 138 17 1357 5 2 0 93 1 1625 0 0 169 2 234 11 38 143 6 2078 6 1 0 93 2 1746 0 12 129 4 154 10 35 135 7 1458 5 1 0 94 3 2267 0 7 184 13 281 31 38 148 13 2209 5 1 0 94 4 610 0 159 419 146 340 19 50 78 15 1030 4 1 0 95 5 1884 0 21 198 8 368 79 35 133 18 1577 3 2 0 96 6 7049 0 26 384 103 313 47 45 156 22 1486 7 3 0 91 7 2152 0 1 180 2 342 73 42 108 14 2581 6 2 0 93 March 4, 2026 at 01:37:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 45 0 0 2225 103 299 1 39 169 0 778 2 1 0 96 1 79 0 0 147 5 228 6 42 157 0 345 5 1 0 94 2 0 0 0 223 42 284 4 46 90 0 360 2 1 0 98 3 1 0 7 200 75 219 5 43 194 0 777 3 1 0 96 4 24 0 87 320 105 207 8 41 170 0 307 8 1 0 91 5 0 0 21 140 7 215 6 31 140 0 781 3 1 0 97 6 40 0 3 404 106 354 6 45 156 0 1119 5 1 0 95 7 0 0 0 96 3 179 3 27 140 0 1375 2 1 0 97 March 4, 2026 at 01:37:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 108 123 0 1 2 0 309 0 1 0 99 1 0 0 0 15 2 14 0 1 0 0 2 0 0 0 100 2 0 0 0 112 52 106 0 1 1 0 1 0 0 0 100 3 0 0 7 11 3 6 0 0 0 0 264 0 0 0 100 4 0 0 3 216 102 9 0 1 0 0 0 0 0 0 100 5 0 0 14 14 3 10 0 0 0 0 267 0 0 0 100 6 0 0 3 218 105 12 0 1 1 0 596 0 0 0 100 7 3 0 0 9 1 32 1 0 0 0 1126 0 0 0 100 March 4, 2026 at 01:37:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2128 111 133 0 1 3 0 316 0 1 0 99 1 0 0 0 14 3 8 0 0 0 0 4 0 0 0 100 2 0 0 0 117 50 116 0 2 0 0 1 0 0 0 100 3 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 4 0 0 2 223 104 15 0 1 0 0 1 0 0 0 100 5 0 0 14 19 8 14 1 1 0 0 276 0 0 0 100 6 0 0 4 216 104 10 0 0 4 0 599 0 0 0 100 7 0 0 0 13 1 36 1 0 2 0 1124 0 0 0 100 March 4, 2026 at 01:37:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 109 122 1 1 0 0 310 0 1 0 99 1 0 0 0 11 2 6 1 0 0 0 5 0 0 0 100 2 0 0 0 109 50 102 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 4 0 0 3 220 104 14 0 0 0 0 4 0 0 0 100 5 0 0 14 14 5 12 0 0 0 0 268 0 0 0 100 6 0 0 3 215 105 8 0 0 2 0 595 0 0 0 100 7 0 0 0 14 4 38 1 0 1 0 1126 0 0 0 100 March 4, 2026 at 01:37:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 6 2175 106 219 2 23 36 13 454 0 1 0 99 1 44 0 1 52 1 96 2 23 20 9 178 0 0 0 100 2 52 0 19 72 12 115 4 17 29 9 146 0 0 0 99 3 563 0 30 55 2 92 4 13 1682 16 509 1 2 0 97 4 35 0 11 319 140 147 1 19 2300 3 102 0 1 0 99 5 19 0 22 44 4 85 0 13 1370 6 355 0 1 0 99 6 1106 0 16 254 104 101 1 19 38 11 920 0 1 0 99 7 54 0 8 51 1 123 2 21 97 11 928 0 1 0 99 March 4, 2026 at 01:37:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 2130 103 130 0 3 14 1 309 0 1 0 99 1 142 0 0 30 3 26 0 4 5 2 35 0 0 0 100 2 290 0 49 21 0 32 1 4 27 4 129 0 1 0 99 3 6 0 7 28 3 27 0 3 9 2 269 0 0 0 100 4 3 0 6 331 151 129 2 4 2 3 9 0 1 0 99 5 27 0 14 30 5 25 0 1 4 5 279 0 0 0 100 6 6 0 10 235 104 33 0 4 9 2 607 0 0 0 100 7 3 0 0 26 1 51 1 1 6 1 779 0 0 0 100 March 4, 2026 at 01:37:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 378 2109 102 109 0 1 1 0 300 0 1 0 99 1 0 0 0 65 1 4 0 0 0 0 0 0 0 0 100 2 0 0 7 64 0 4 0 1 1 0 0 0 0 0 100 3 0 0 7 64 2 6 0 1 0 0 259 0 0 0 100 4 0 0 3 369 151 108 0 0 0 0 0 0 0 0 100 5 0 0 14 66 2 6 1 0 0 0 266 0 0 0 100 6 0 0 3 273 105 11 0 2 3 0 595 0 0 0 100 7 0 0 7 64 1 34 1 1 0 0 749 0 0 0 100 March 4, 2026 at 01:37:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 122 1 2 6 0 313 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 318 152 112 0 1 1 0 0 0 0 0 100 5 0 0 14 26 9 26 0 2 0 0 273 0 0 0 100 6 0 0 3 219 105 10 0 0 4 0 601 0 0 0 100 7 0 0 0 13 1 40 0 2 0 0 751 0 0 0 100 March 4, 2026 at 01:37:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 116 0 1 6 0 301 0 1 0 99 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 7 12 3 4 1 0 1 0 259 0 0 0 100 4 0 0 7 310 151 102 0 0 1 0 0 0 0 0 100 5 0 0 14 13 3 8 0 0 1 0 266 0 0 0 100 6 0 0 7 219 104 18 0 2 1 0 594 0 0 0 100 7 0 0 0 13 3 34 1 0 1 0 750 0 0 0 100 March 4, 2026 at 01:37:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 116 152 0 0 1 0 327 0 1 0 99 1 3 0 0 14 2 16 0 1 15 0 73 0 0 0 100 2 848 0 0 14 1 14 0 3 65 0 718 0 1 0 99 3 503 0 8 13 2 12 0 2 36 0 404 0 0 0 100 4 322 0 4 239 115 42 0 3 29 0 104 0 0 0 100 5 0 0 14 90 44 84 0 2 0 0 270 0 0 0 100 6 0 0 3 214 104 8 0 0 2 0 596 0 0 0 100 7 0 0 0 10 2 34 1 0 0 0 750 0 0 0 100 March 4, 2026 at 01:37:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2187 121 227 0 12 76 0 320 0 1 0 99 1 0 0 0 54 1 99 0 15 95 0 0 0 0 0 100 2 0 0 0 32 0 52 0 10 55 0 0 0 0 0 100 3 0 0 7 112 61 99 0 16 117 0 259 0 0 0 100 4 0 0 3 264 102 111 0 15 84 0 0 0 0 0 100 5 0 0 14 134 52 159 1 12 47 0 266 0 0 0 100 6 0 0 3 315 104 206 0 19 55 0 594 0 0 0 100 7 0 0 0 50 2 114 1 14 43 0 742 0 0 0 100 March 4, 2026 at 01:37:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 122 170 0 2 6 0 320 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 109 52 106 0 0 0 0 266 0 0 0 100 6 0 0 3 213 104 6 0 0 8 0 594 0 0 0 100 7 0 0 0 12 2 36 1 0 1 0 741 0 0 0 100 March 4, 2026 at 01:37:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 123 165 1 1 8 0 328 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 10 2 8 1 1 0 0 267 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 120 58 116 0 0 0 0 278 0 0 0 100 6 0 0 3 216 105 8 0 0 5 0 617 0 0 0 100 7 0 0 0 13 2 38 1 0 1 0 743 0 0 0 100 March 4, 2026 at 01:37:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 122 158 0 1 0 0 320 0 0 0 99 1 0 0 0 16 3 16 0 1 0 0 23 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 108 52 106 0 0 0 0 266 0 0 0 100 6 0 0 3 215 105 8 0 0 0 0 595 0 0 0 100 7 0 0 0 14 4 38 1 0 1 0 744 0 0 0 100 March 4, 2026 at 01:37:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 122 160 0 1 4 0 325 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 3 0 0 7 9 2 6 0 0 0 0 261 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 114 55 110 1 0 0 0 271 0 0 0 100 6 0 0 3 213 104 6 0 0 3 0 595 0 0 0 100 7 0 0 0 9 2 34 0 0 0 0 742 0 0 0 100 March 4, 2026 at 01:37:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 123 156 0 0 5 0 320 0 1 0 99 1 0 0 0 15 3 10 0 0 2 0 3 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 108 52 106 0 0 0 0 266 0 0 0 100 6 0 0 3 218 105 12 0 1 4 0 593 0 0 0 100 7 0 0 0 13 2 42 1 2 2 0 742 0 0 0 100 March 4, 2026 at 01:37:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 122 156 0 0 5 0 320 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 14 2 14 1 1 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 110 53 108 0 0 0 0 267 0 0 0 100 6 0 0 3 213 104 6 0 0 2 0 594 0 0 0 100 7 0 0 0 10 2 34 1 0 0 0 742 0 0 0 100 March 4, 2026 at 01:37:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 122 172 1 0 9 0 334 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 12 2 10 0 1 0 0 267 0 0 0 100 4 0 0 3 213 102 12 0 1 0 0 0 0 0 0 100 5 0 0 14 122 60 114 0 0 0 0 273 0 0 0 100 6 0 0 3 214 104 6 1 0 6 0 594 0 0 0 100 7 0 0 0 12 2 38 0 0 0 0 741 0 0 0 100 March 4, 2026 at 01:37:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 121 153 0 0 5 0 320 0 1 0 99 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 7 11 3 4 0 0 1 0 259 0 0 0 100 4 0 0 7 208 102 0 0 0 1 0 0 0 0 0 100 5 0 0 14 112 53 108 1 1 0 0 266 0 0 0 100 6 0 0 7 215 104 6 1 0 2 0 594 0 0 0 100 7 0 0 0 13 3 34 1 0 1 0 742 0 0 0 100 March 4, 2026 at 01:37:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 123 157 0 1 1 0 320 0 0 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 115 52 120 0 1 0 0 266 0 0 0 100 6 0 0 3 213 104 6 0 0 1 0 594 0 0 0 100 7 0 0 0 11 2 34 1 0 0 0 743 0 0 0 100 March 4, 2026 at 01:37:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 123 157 0 0 5 0 321 0 1 0 99 1 0 0 0 8 1 4 0 0 1 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 9 2 4 1 0 0 0 259 0 0 0 100 4 0 0 3 208 102 4 0 1 0 0 0 0 0 0 100 5 0 0 14 110 52 108 0 0 0 0 266 0 0 0 100 6 0 0 3 223 105 24 0 1 4 0 594 0 0 0 100 7 0 0 0 13 2 40 1 0 1 0 741 0 0 0 100 March 4, 2026 at 01:37:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 122 155 0 0 3 0 320 0 0 0 99 1 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 2 207 102 2 0 1 0 0 0 0 0 0 100 5 0 0 14 108 52 106 0 0 0 0 266 0 0 0 100 6 0 0 4 213 104 6 0 0 3 0 594 0 0 0 100 7 0 0 0 9 2 34 0 0 0 0 742 0 0 0 100 March 4, 2026 at 01:37:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 124 170 1 1 5 0 333 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 11 2 8 1 0 0 0 266 0 0 0 100 4 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 116 57 110 1 0 0 0 271 0 0 0 100 6 0 0 4 215 104 8 0 0 1 0 594 0 0 0 100 7 0 0 0 18 2 48 1 1 0 0 743 0 0 0 100 March 4, 2026 at 01:37:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 121 169 0 1 0 0 320 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 110 52 106 0 0 0 0 266 0 0 0 100 6 0 0 3 215 105 8 0 0 2 0 596 0 0 0 100 7 0 0 0 16 4 40 1 0 0 0 744 0 0 0 100 March 4, 2026 at 01:38:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 123 158 0 1 8 0 321 0 1 0 99 1 0 0 0 11 2 8 0 0 0 0 9 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 1 0 0 0 259 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 108 52 106 0 0 0 0 266 0 0 0 100 6 0 0 3 213 104 6 0 0 13 0 594 0 0 0 100 7 0 0 0 11 2 38 0 0 1 0 759 0 0 0 100 March 4, 2026 at 01:38:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 122 158 0 1 5 0 320 0 0 0 99 1 0 0 0 18 3 18 0 1 0 0 3 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 2 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 108 52 106 0 0 0 0 266 0 0 0 100 6 0 0 4 218 105 12 0 0 3 0 593 0 0 0 100 7 0 0 0 12 2 38 1 0 1 0 742 0 0 0 100 March 4, 2026 at 01:38:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 123 155 0 0 1 0 320 0 0 0 100 1 0 0 0 9 1 4 0 0 1 0 0 0 0 0 100 2 0 0 0 11 0 12 0 1 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 2 207 102 2 0 1 0 0 0 0 0 0 100 5 0 0 14 109 52 106 1 0 0 0 266 0 0 0 100 6 0 0 4 213 104 6 0 0 0 0 594 0 0 0 100 7 0 0 0 9 2 34 0 0 0 0 743 0 0 0 100 March 4, 2026 at 01:38:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 123 171 1 0 3 0 338 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 10 2 8 0 0 0 0 266 0 0 0 100 4 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 117 57 110 0 0 0 0 271 0 0 0 100 6 0 0 4 213 104 6 0 0 0 0 595 0 0 0 100 7 0 0 0 13 2 38 1 0 0 0 742 0 0 0 100 March 4, 2026 at 01:38:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 122 154 0 0 1 0 320 0 1 0 99 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 0 0 0 10 1 2 0 1 1 0 0 0 0 0 100 3 0 0 7 16 3 14 1 1 1 0 259 0 0 0 100 4 0 0 7 208 102 0 0 0 1 0 0 0 0 0 100 5 0 0 14 111 53 106 0 0 1 0 266 0 0 0 100 6 0 0 7 214 104 8 0 1 0 0 593 0 0 0 100 7 0 0 0 13 3 34 1 0 1 0 741 0 0 0 100 March 4, 2026 at 01:38:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 123 162 0 0 0 0 321 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 10 2 6 0 0 0 0 259 0 0 0 100 4 0 0 3 212 102 10 0 1 0 0 0 0 0 0 100 5 0 0 14 108 52 106 0 0 0 0 266 0 0 0 100 6 0 0 3 213 104 6 0 0 1 0 595 0 0 0 100 7 0 0 0 10 2 34 1 0 0 0 743 0 0 0 100 March 4, 2026 at 01:38:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 122 160 0 2 0 0 320 0 0 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 108 52 106 1 0 0 0 266 0 0 0 100 6 0 0 3 216 105 10 0 0 0 0 593 0 0 0 100 7 0 0 0 9 2 34 0 0 1 0 742 0 0 0 100 March 4, 2026 at 01:38:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 123 157 0 0 1 0 320 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 3 209 102 2 0 1 1 0 0 0 0 0 100 5 0 0 14 113 52 116 0 1 1 0 266 0 0 0 100 6 0 0 3 213 104 6 0 0 4 0 593 0 0 0 100 7 0 0 0 10 2 34 1 0 0 0 741 0 0 0 100 March 4, 2026 at 01:38:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 123 169 1 0 5 0 337 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 11 2 8 1 0 0 0 266 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 119 58 112 1 1 0 0 271 0 0 0 100 6 0 0 3 218 104 18 0 1 1 0 595 0 0 0 100 7 0 0 0 12 2 40 0 0 0 0 743 0 0 0 100 March 4, 2026 at 01:38:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 114 140 0 0 2 0 311 0 0 0 100 1 0 0 0 28 11 24 0 1 0 0 32 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 108 52 106 0 0 0 0 266 0 0 0 100 6 0 0 3 215 105 8 0 0 0 0 596 0 0 0 100 7 0 0 0 14 4 38 1 0 0 0 744 0 0 0 100 March 4, 2026 at 01:38:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 117 0 0 1 0 300 0 0 0 100 1 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 1 0 14 76 36 72 1 0 0 0 310 0 0 0 100 6 0 0 3 248 120 42 0 1 4 0 593 0 0 0 100 7 0 0 0 15 2 44 1 1 0 0 742 0 0 0 100 March 4, 2026 at 01:38:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 131 0 1 4 0 300 0 0 0 99 1 0 0 0 53 23 48 0 0 0 0 23 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 3 275 134 68 0 0 3 0 594 0 0 0 100 7 0 0 0 54 23 80 0 1 0 0 742 0 0 0 100 March 4, 2026 at 01:38:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 117 0 1 0 0 300 0 1 0 99 1 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 1 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 3 214 104 6 0 0 3 0 594 0 0 0 100 7 0 0 0 110 52 134 1 0 0 0 741 0 0 0 100 March 4, 2026 at 01:38:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 109 147 1 1 8 0 316 0 1 0 99 1 0 0 0 54 22 54 0 1 0 0 22 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 1 0 7 10 2 8 0 0 0 0 266 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 17 7 10 1 0 0 0 271 0 0 0 100 6 0 0 3 213 104 6 0 0 1 0 595 0 0 0 100 7 0 0 0 102 47 126 0 0 0 0 742 0 0 0 100 March 4, 2026 at 01:38:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 152 214 0 0 1 0 300 0 1 0 99 1 0 0 0 52 22 44 0 0 1 0 20 0 0 0 100 2 0 0 0 13 1 10 0 1 1 0 0 0 0 0 100 3 0 0 7 11 3 4 0 0 1 0 259 0 0 0 100 4 0 0 7 208 102 2 0 1 0 0 0 0 0 0 100 5 0 0 14 11 3 6 0 0 1 0 266 0 0 0 100 6 0 0 7 214 104 6 0 0 1 0 593 0 0 0 100 7 0 0 0 13 3 34 1 0 1 0 743 0 0 0 100 March 4, 2026 at 01:38:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 152 216 0 0 0 0 300 0 0 0 100 1 0 0 0 49 22 44 0 0 0 0 22 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 3 213 104 6 0 0 8 0 594 0 0 0 100 7 0 0 0 10 2 34 1 0 0 0 742 0 0 0 100 March 4, 2026 at 01:38:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 153 220 0 0 9 0 300 0 0 0 99 1 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 14 2 14 1 1 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 3 216 105 10 0 0 2 0 595 0 0 0 100 7 0 0 0 10 2 34 1 0 0 0 742 0 0 0 100 March 4, 2026 at 01:38:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 153 223 0 0 2 0 301 0 0 0 100 1 0 0 0 49 22 44 0 0 0 0 22 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 12 3 8 0 0 0 0 260 0 0 0 100 4 0 0 2 212 102 10 0 1 0 0 0 0 0 0 100 5 0 0 14 8 2 6 1 0 0 0 266 0 0 0 100 6 0 0 4 213 104 6 0 0 6 0 593 0 0 0 100 7 0 0 0 9 2 34 0 0 0 0 741 0 0 0 100 March 4, 2026 at 01:38:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 154 227 1 2 0 0 309 0 1 0 99 1 0 0 0 45 20 40 0 0 0 0 19 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 9 2 6 0 0 0 0 261 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 15 7 10 0 0 0 0 271 0 0 0 100 6 0 0 3 213 104 6 0 0 1 0 594 0 0 0 100 7 0 0 0 15 2 44 1 1 1 0 752 0 0 0 100 March 4, 2026 at 01:38:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 213 0 0 1 0 300 0 0 0 100 1 0 0 0 49 22 44 0 0 0 0 22 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 15 2 16 0 1 0 0 266 0 0 0 100 6 0 0 3 215 105 10 0 1 0 0 595 0 0 0 100 7 0 0 0 14 4 38 1 0 0 0 744 0 0 0 100 March 4, 2026 at 01:38:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 152 216 0 0 0 0 300 0 0 0 100 1 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 9 2 4 1 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 10 2 8 0 0 0 0 266 0 0 0 100 6 0 0 3 218 104 16 0 1 0 0 595 0 0 0 100 7 0 0 0 9 2 34 0 0 0 0 741 0 0 0 100 March 4, 2026 at 01:38:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 152 220 0 0 0 0 300 0 0 0 99 1 0 0 0 53 23 48 0 0 0 0 23 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 1 0 0 0 266 0 0 0 100 6 0 0 3 218 105 12 0 0 2 0 593 0 0 0 100 7 0 0 0 12 3 36 1 0 0 0 744 0 0 0 100 March 4, 2026 at 01:38:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 153 217 0 0 0 0 300 0 0 0 100 1 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 10 4 6 0 0 0 0 266 0 0 0 100 6 0 0 3 215 104 8 0 0 4 0 594 0 0 0 100 7 0 0 0 16 2 44 2 1 1 0 742 0 0 0 100 March 4, 2026 at 01:38:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 152 236 2 3 4 0 310 0 1 0 99 1 0 0 0 49 22 44 0 0 0 0 22 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 9 2 6 0 1 0 0 264 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 17 8 12 0 0 0 0 272 0 0 0 100 6 0 0 3 214 104 6 0 0 0 0 594 0 0 0 100 7 0 0 0 19 4 46 0 0 0 0 745 0 0 0 100 March 4, 2026 at 01:38:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 151 213 0 0 1 0 300 0 1 0 99 1 0 0 0 50 22 42 0 0 1 0 20 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 7 12 3 4 1 0 1 0 259 0 0 0 100 4 0 0 7 208 102 0 0 0 1 0 0 0 0 0 100 5 0 0 14 13 3 6 0 0 1 0 266 0 0 0 100 6 0 0 7 214 104 8 0 1 1 0 594 0 0 0 100 7 0 0 0 13 3 34 1 0 1 0 743 0 0 0 100 March 4, 2026 at 01:38:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 153 219 0 0 7 0 300 0 0 0 100 1 0 0 0 54 22 54 0 1 0 0 22 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 10 3 8 1 0 0 0 267 0 0 0 100 6 0 0 3 213 104 6 0 0 3 0 595 0 0 0 100 7 0 0 0 9 2 34 0 0 0 0 742 0 0 0 100 March 4, 2026 at 01:38:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 154 224 0 0 3 0 300 0 1 0 99 1 0 0 0 52 22 46 0 1 0 0 20 0 0 0 100 2 0 0 0 12 1 12 0 2 0 0 0 0 0 0 100 3 0 0 7 10 3 7 0 1 0 0 259 0 0 0 100 4 0 0 3 209 103 4 0 1 1 0 0 0 0 0 100 5 0 0 14 10 3 8 0 0 0 0 266 0 0 0 100 6 0 0 3 219 106 12 1 0 0 0 593 0 0 0 100 7 0 0 0 12 3 36 1 0 0 0 742 0 0 0 100 March 4, 2026 at 01:38:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 151 213 0 0 2 0 300 0 1 0 99 1 0 0 0 51 22 46 0 0 0 0 22 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 3 213 104 8 0 1 2 0 594 0 0 0 100 7 0 0 0 9 2 34 0 0 0 0 743 0 0 0 100 March 4, 2026 at 01:38:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 153 225 0 1 3 0 305 0 0 0 99 1 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 16 2 18 1 1 0 0 266 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 22 10 18 0 0 0 0 280 0 0 0 100 6 0 0 3 214 104 6 0 0 1 0 595 0 0 0 100 7 0 0 0 13 2 38 1 0 0 0 741 0 0 0 100 March 4, 2026 at 01:38:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 215 0 0 3 0 300 0 1 0 99 1 0 0 0 53 24 48 0 0 0 0 70 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 10 2 6 0 0 0 0 259 0 0 0 100 4 0 0 3 212 102 12 0 2 0 0 0 0 0 0 100 5 0 0 14 10 3 8 1 0 0 0 267 0 0 0 100 6 0 0 3 215 105 8 0 0 3 0 594 0 0 0 100 7 0 0 0 14 4 38 1 0 0 0 744 0 0 0 100 March 4, 2026 at 01:38:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 152 218 0 1 7 0 300 0 1 0 99 1 0 0 0 51 22 48 0 0 0 0 29 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 2 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 4 213 104 6 0 0 1 0 595 0 0 0 100 7 0 0 0 12 2 38 1 0 0 0 759 0 0 0 100 March 4, 2026 at 01:38:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 131 178 0 2 1 0 300 0 0 0 100 1 0 0 0 53 23 48 0 0 0 0 23 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 14 2 20 0 1 0 0 266 0 0 0 100 6 0 0 3 261 126 54 0 1 3 0 593 0 0 0 100 7 0 0 0 9 2 34 0 0 0 0 742 0 0 0 100 March 4, 2026 at 01:38:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 0 0 5 0 300 0 0 0 100 1 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 9 2 4 1 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 10 2 8 0 0 0 0 266 0 0 0 100 6 0 0 3 318 154 118 0 1 2 0 595 0 0 0 100 7 0 0 0 11 2 34 1 0 0 0 743 0 0 0 100 March 4, 2026 at 01:38:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 124 0 1 1 0 308 0 0 0 99 1 0 0 0 50 22 44 0 0 0 0 22 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 10 2 8 0 0 0 0 262 0 0 0 100 4 0 0 3 212 102 4 0 1 0 0 5 0 0 0 100 5 1 0 14 25 9 18 1 0 0 0 280 0 0 0 100 6 0 0 3 315 155 108 0 0 0 0 617 0 0 0 100 7 0 0 0 13 2 40 1 0 1 0 742 0 0 0 100 March 4, 2026 at 01:38:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 1 0 300 0 0 0 100 1 0 0 0 50 22 42 0 0 1 0 20 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 7 11 3 4 0 0 1 0 259 0 0 0 100 4 0 0 7 208 102 2 0 1 0 0 0 0 0 0 100 5 0 0 14 11 3 6 0 0 1 0 266 0 0 0 100 6 0 0 7 316 154 108 0 0 7 0 593 0 0 0 100 7 0 0 0 17 3 44 0 1 1 0 742 0 0 0 100 March 4, 2026 at 01:38:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 130 0 1 1 0 300 0 0 0 100 1 0 0 0 50 22 44 0 0 0 0 22 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 3 313 154 106 0 0 4 0 594 0 0 0 100 7 0 0 0 12 2 36 1 0 0 0 742 0 0 0 100 March 4, 2026 at 01:38:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 120 0 0 7 0 300 0 0 0 100 1 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 9 2 4 1 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 3 316 155 110 0 0 0 0 594 0 0 0 100 7 0 0 0 9 2 34 0 0 0 0 741 0 0 0 100 March 4, 2026 at 01:38:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 122 0 1 1 0 302 0 1 0 99 1 0 0 0 59 24 60 0 1 0 0 29 0 0 0 100 2 0 0 0 11 2 168 0 0 0 0 341 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 10 3 8 1 0 0 0 267 0 0 0 100 6 0 0 3 315 155 108 0 0 1 0 610 0 0 0 100 7 0 0 0 12 3 36 1 0 1 0 742 0 0 0 100 March 4, 2026 at 01:38:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 128 2 1 2 0 310 0 0 0 100 1 1 0 0 55 24 50 0 0 1 0 26 0 0 0 100 2 0 0 0 12 0 14 0 1 0 0 1 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 212 102 7 0 0 0 0 3 0 0 0 100 5 0 0 14 20 10 14 0 0 1 0 273 0 0 0 100 6 0 0 3 314 154 108 0 1 0 0 598 0 0 0 100 7 0 0 0 15 2 42 1 0 1 0 744 0 0 0 100 March 4, 2026 at 01:38:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 116 0 0 0 0 300 0 0 0 99 1 0 0 0 49 22 44 0 0 0 0 22 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 10 2 6 0 0 0 0 266 0 0 0 100 6 0 0 3 315 155 108 0 0 0 0 595 0 0 0 100 7 0 0 0 14 4 38 1 0 1 0 744 0 0 0 100 March 4, 2026 at 01:38:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 116 0 0 1 0 300 0 0 0 100 1 0 0 0 49 22 44 0 0 0 0 22 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 15 2 18 1 1 1 0 260 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 3 313 154 106 0 0 4 0 594 0 0 0 100 7 0 0 0 10 2 34 1 0 0 0 742 0 0 0 100 March 4, 2026 at 01:38:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 128 0 0 2 0 301 0 0 0 100 1 0 0 0 55 23 48 1 0 0 0 23 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 10 2 6 0 0 0 0 259 0 0 0 100 4 0 0 2 212 102 10 0 1 0 0 0 0 0 0 100 5 0 0 14 8 2 6 1 0 0 0 266 0 0 0 100 6 0 0 4 316 155 110 0 0 1 0 595 0 0 0 100 7 0 0 0 9 2 34 0 0 1 0 743 0 0 0 100 March 4, 2026 at 01:38:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 116 0 0 0 0 300 0 0 0 100 1 0 0 0 37 15 30 0 0 0 0 13 0 0 0 100 2 0 0 0 19 6 14 1 1 0 0 7 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 265 0 0 0 100 6 0 0 3 313 154 106 0 0 0 0 593 0 0 0 100 7 0 0 0 10 2 34 1 0 1 0 741 0 0 0 100 March 4, 2026 at 01:38:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 125 1 0 1 0 304 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 14 22 8 22 0 1 0 0 271 0 0 0 100 6 0 0 3 315 154 110 0 0 1 0 601 0 0 0 100 7 0 0 0 14 2 43 0 1 1 0 750 0 0 0 100 March 4, 2026 at 01:38:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 114 0 0 4 0 300 0 0 0 100 1 0 0 0 10 2 4 0 1 1 0 0 0 0 0 100 2 0 0 0 47 21 40 0 0 1 0 20 0 0 0 100 3 0 0 7 11 3 4 1 0 1 0 259 0 0 0 100 4 0 0 6 207 102 0 0 0 1 0 0 0 0 0 100 5 0 0 14 14 3 8 0 0 1 0 266 0 0 0 100 6 0 0 1 319 154 118 0 2 4 0 594 0 0 0 100 7 0 0 0 12 3 32 1 0 1 0 742 0 0 0 100 March 4, 2026 at 01:38:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 0 0 4 0 300 0 0 0 100 1 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 2 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 209 102 4 0 1 0 0 0 0 0 0 100 5 0 0 14 9 3 6 1 0 0 0 266 0 0 0 100 6 0 0 3 313 154 106 0 0 0 0 595 0 0 0 100 7 0 0 0 7 1 32 0 0 0 0 743 0 0 0 100 March 4, 2026 at 01:38:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 122 0 0 5 0 300 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 3 318 155 114 0 1 2 0 593 0 0 0 100 7 0 0 0 15 2 44 1 1 1 0 743 0 0 0 100 March 4, 2026 at 01:38:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 128 0 1 3 0 300 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 2 0 0 0 47 21 42 0 0 0 0 21 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 3 311 153 106 0 0 1 0 595 0 0 0 100 7 0 0 0 10 1 34 1 0 0 0 742 0 0 0 100 March 4, 2026 at 01:38:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 124 1 2 2 0 309 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 3 0 0 7 9 2 4 1 0 0 0 259 0 0 0 100 4 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 15 7 10 0 0 0 0 271 0 0 0 100 6 0 0 4 316 154 110 0 0 1 0 601 0 0 0 100 7 0 0 0 15 3 42 0 0 0 0 746 0 0 0 100 March 4, 2026 at 01:38:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 118 0 1 1 0 300 0 0 0 100 1 0 0 0 18 4 18 0 1 0 0 23 0 0 0 100 2 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 14 10 2 6 1 0 0 0 266 0 0 0 100 6 0 0 3 315 155 108 0 0 1 0 595 0 0 0 100 7 0 0 0 12 3 36 1 0 0 0 744 0 0 0 100 March 4, 2026 at 01:38:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2125 103 144 0 0 3 0 333 0 0 0 99 1 1 0 0 12 2 9 0 2 0 0 51 0 0 0 100 2 17 0 1 40 7 53 0 4 0 1 176 0 0 0 99 3 0 0 9 14 2 14 1 1 0 0 272 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 1293 0 14 66 49 24 1 0 0 0 384 0 0 0 99 6 1 0 3 314 154 109 0 2 2 0 618 0 0 0 100 7 0 0 0 14 1 41 1 2 0 0 745 0 0 0 100 March 4, 2026 at 01:38:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 103 222 0 9 37 0 300 0 1 0 99 1 0 0 0 63 4 107 0 15 51 0 3 0 0 0 100 2 0 0 0 40 2 63 0 11 30 0 29 0 0 0 100 3 0 0 7 118 68 94 0 9 66 0 263 0 0 0 100 4 0 0 2 246 102 78 0 8 38 0 0 0 0 0 100 5 75 0 14 138 90 95 0 10 33 0 308 0 0 0 100 6 0 0 4 415 155 306 0 12 58 0 594 0 0 0 100 7 0 0 0 73 1 163 1 13 48 0 742 0 0 0 100