March 4, 2026 at 01:29:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 644 0 100 3918 130 5032 49 235 1056 6 5887 10 8 0 82 1 779 0 50 919 15 3275 18 327 1165 11 8759 6 5 0 89 2 782 0 55 734 12 3064 13 280 1148 7 5899 2 6 0 92 3 769 0 91 1056 411 2545 14 314 1076 10 5533 3 6 0 91 4 723 0 74 868 14 2974 13 303 1160 9 5607 3 5 0 91 5 797 0 34 3080 2430 2498 17 268 1268 7 6937 7 7 0 86 6 627 0 154 915 16 2974 17 286 1137 11 5781 2 7 0 91 7 907 0 56 1778 23 4478 29 268 1148 8 3974 9 7 0 85 March 4, 2026 at 01:29:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9817 0 24 2422 113 922 18 205 1301 76 3791 5 6 0 89 1 2824 0 4 263 3 582 24 126 614 24 1900 14 6 0 80 2 9869 0 93 434 41 661 33 187 816 53 4972 14 13 0 73 3 7685 0 53 943 379 891 15 182 715 72 2072 4 33 0 64 4 3687 0 14 685 6 1490 13 247 1045 75 1971 6 4 0 90 5 8012 0 62 493 59 892 18 190 878 74 2207 9 8 0 83 6 5023 0 24 264 3 694 16 207 1032 57 1217 8 5 0 87 7 2492 0 24 455 22 1135 5 206 978 94 1252 2 4 0 94 March 4, 2026 at 01:29:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 80 0 0 2241 141 380 0 81 612 1 622 0 2 0 98 1 0 0 0 431 0 895 0 86 519 1 0 0 2 0 98 2 31 0 17 299 104 276 0 92 539 0 1326 0 2 0 98 3 0 0 0 430 333 256 0 82 632 1 0 0 2 0 98 4 0 0 0 103 3 267 0 84 641 1 294 0 1 0 98 5 0 0 10 300 104 247 0 86 534 0 259 0 1 0 99 6 0 0 0 91 0 251 0 95 547 0 0 0 2 0 98 7 0 0 0 179 11 321 0 89 534 0 0 0 1 0 99 March 4, 2026 at 01:29:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2250 115 464 1 117 796 0 601 0 2 0 97 1 0 0 0 520 15 1074 1 125 707 0 0 0 2 0 98 2 26 0 17 343 105 397 3 133 927 0 1039 0 2 0 97 3 0 0 0 496 359 348 1 113 890 0 0 0 3 0 97 4 0 0 0 188 26 400 1 129 794 0 294 0 2 0 98 5 0 0 10 343 104 356 1 118 720 0 259 0 2 0 98 6 0 0 0 136 1 386 0 131 817 0 79 0 2 0 98 7 0 0 0 169 0 397 1 120 719 0 190 0 2 0 98 March 4, 2026 at 01:29:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 102 276 0 25 215 0 608 0 1 0 99 1 4 0 0 215 0 425 0 35 171 0 8 0 1 0 99 2 0 0 3 281 102 159 0 34 238 0 0 0 1 0 99 3 0 0 0 210 140 143 0 32 274 0 7 0 1 0 99 4 0 0 0 109 16 193 0 39 237 0 294 0 1 0 99 5 0 0 10 352 146 206 0 37 207 0 259 0 1 0 99 6 0 0 0 71 1 172 0 27 213 0 1037 0 1 0 99 7 0 0 14 73 1 152 0 30 215 0 266 0 0 0 100 March 4, 2026 at 01:29:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 102 233 0 35 139 0 599 0 1 0 99 1 0 0 0 78 0 151 0 25 153 0 0 0 2 0 98 2 0 0 4 261 103 111 0 27 124 0 2 0 2 0 98 3 0 0 0 205 127 162 0 25 175 0 0 0 2 0 98 4 0 0 0 207 4 418 1 39 172 0 295 0 1 0 99 5 0 0 9 372 155 235 1 30 204 0 258 0 2 0 98 6 0 0 0 76 2 172 1 28 174 0 1037 0 2 0 98 7 0 0 14 64 1 134 0 24 192 0 266 0 2 0 98 March 4, 2026 at 01:29:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3193 0 22 2278 106 413 10 64 98 36 1794 3 7 0 91 1 815 0 9 267 2 474 9 61 187 29 871 1 1 0 99 2 340 0 35 375 102 355 6 57 65 25 1052 0 1 0 99 3 1108 0 1 195 24 309 2 46 58 19 592 2 2 0 96 4 1098 0 13 159 5 311 4 42 107 25 944 2 1 0 97 5 4409 0 16 407 131 357 10 45 190 27 1672 2 2 0 96 6 1038 0 3 157 8 306 1 45 135 23 1735 1 1 0 98 7 2062 0 17 151 2 302 3 41 58 32 1290 2 1 0 97 March 4, 2026 at 01:29:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 20 2115 103 82 0 4 5 0 608 0 1 0 99 1 1 0 0 57 0 28 0 3 2 0 1 0 2 0 98 2 2 0 17 236 104 22 0 2 2 0 10 0 0 0 100 3 1 0 2 117 51 112 1 2 0 0 4 0 0 0 100 4 0 0 0 20 3 12 1 0 0 0 301 0 0 0 100 5 30 0 17 232 109 24 2 2 1 0 321 0 0 0 99 6 2 0 0 21 3 40 2 1 2 0 1140 0 0 0 100 7 2 0 14 11 1 4 0 1 1 0 274 0 0 0 100 March 4, 2026 at 01:29:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 110 0 0 0 0 600 0 1 0 99 1 0 0 0 15 1 8 0 0 1 0 0 0 0 0 100 2 0 0 4 208 102 2 0 0 1 0 0 0 0 0 100 3 0 0 0 111 52 104 0 1 1 0 0 0 0 0 100 4 0 0 0 15 5 8 0 0 1 0 295 0 0 0 100 5 0 0 9 231 112 24 0 0 1 0 270 0 0 0 100 6 6 0 0 12 2 34 1 1 1 0 1129 0 0 0 100 7 0 0 14 10 3 6 0 0 1 0 267 0 0 0 100 March 4, 2026 at 01:29:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 118 2 0 0 0 610 0 1 0 99 1 0 0 0 23 3 22 0 0 0 0 25 0 0 0 100 2 0 0 4 214 104 10 0 0 0 0 11 0 0 0 100 3 0 0 0 112 51 108 0 0 1 0 0 0 0 0 100 4 0 0 0 18 4 18 0 1 0 0 315 0 0 0 100 5 0 0 9 231 116 18 0 0 1 0 268 0 0 0 100 6 0 0 0 10 1 36 1 0 1 0 1136 0 0 0 100 7 0 0 14 9 1 8 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:29:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 18 2167 103 209 1 22 62 0 626 0 1 0 99 1 14 0 6 69 2 125 1 29 54 6 37 0 0 0 100 2 22 0 4 251 102 73 1 15 32 4 19 0 0 0 100 3 15 0 7 233 105 235 0 22 62 1 55 0 1 0 99 4 2 0 0 121 4 218 0 24 58 3 351 0 0 0 99 5 293 0 11 289 114 132 0 21 65 2 407 0 0 0 99 6 23 0 10 73 2 171 1 31 62 0 1169 0 1 0 99 7 14 0 14 68 1 124 0 22 52 4 312 0 0 0 100 March 4, 2026 at 01:29:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 111 0 1 0 0 599 0 1 0 99 1 0 0 0 17 1 10 0 0 0 0 1 0 0 0 100 2 0 0 4 213 103 4 0 0 0 0 2 0 0 0 100 3 0 0 0 110 51 104 0 0 0 0 0 0 0 0 100 4 0 0 0 14 3 8 0 0 0 0 294 0 0 0 100 5 0 0 9 217 105 8 1 0 0 0 259 0 0 0 100 6 0 0 0 11 1 34 1 0 1 0 1075 0 0 0 100 7 0 0 21 8 1 6 0 2 0 0 266 0 0 0 100 March 4, 2026 at 01:29:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 102 111 0 1 2 0 600 0 1 0 99 1 0 0 0 15 0 8 0 0 0 0 0 0 0 0 100 2 0 0 4 209 102 4 0 1 0 0 0 0 0 0 100 3 0 0 0 110 51 104 0 1 0 0 0 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 294 0 0 0 100 5 0 0 9 222 105 20 0 0 0 0 259 0 0 0 100 6 0 0 0 9 1 32 1 0 1 0 1073 0 0 0 100 7 0 0 14 9 1 6 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:29:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 102 110 0 0 0 0 599 0 1 0 99 1 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 2 0 0 4 211 103 4 0 1 0 0 2 0 0 0 100 3 0 0 0 110 51 104 0 1 0 0 0 0 0 0 100 4 0 0 0 13 3 8 0 0 0 0 294 0 0 0 100 5 0 0 9 220 106 12 0 1 0 0 260 0 0 0 100 6 0 0 0 14 2 42 1 1 1 0 1070 0 0 0 100 7 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 110 0 0 0 0 601 0 1 0 99 1 0 0 0 17 0 16 0 0 0 0 9 0 0 0 100 2 0 0 3 208 101 2 0 1 0 0 0 0 0 0 100 3 0 0 0 110 52 106 0 0 0 0 0 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 294 0 1 0 99 5 0 0 10 220 110 8 0 0 0 0 259 0 0 0 100 6 0 0 0 14 2 40 0 0 0 0 1079 0 0 0 100 7 0 0 14 10 1 10 0 1 0 0 273 0 0 0 100 March 4, 2026 at 01:29:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 222 0 14 2463 102 701 12 76 78 4 2406 2 2 0 96 1 156 0 0 394 1 686 13 82 93 2 1321 2 1 0 97 2 160 0 116 498 102 572 11 62 82 2 1265 2 1 0 97 3 582 0 0 463 92 699 17 71 82 0 1499 3 1 0 96 4 333 0 0 382 19 657 12 60 99 4 1547 2 1 0 97 5 4684 0 11 524 111 571 10 53 120 8 1866 4 2 0 95 6 727 0 8 291 2 576 17 65 132 7 2771 2 1 0 96 7 72 0 0 199 1 328 4 30 67 3 696 1 0 0 98 March 4, 2026 at 01:29:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 103 18 0 1 2 0 870 0 1 0 99 1 2 0 0 130 4 126 0 3 0 0 15 0 0 0 100 2 0 0 18 213 103 6 0 0 2 0 9 0 0 0 100 3 51 0 0 24 6 19 0 2 0 0 14 0 0 0 100 4 0 0 0 34 12 26 0 1 0 0 301 0 0 0 100 5 0 0 2 298 144 90 0 1 0 0 1 0 0 0 100 6 0 0 7 20 5 42 1 0 1 0 1401 0 0 0 100 7 0 0 0 13 2 6 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:29:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 103 6 0 0 0 0 865 0 1 0 99 1 0 0 0 113 0 108 0 0 0 0 0 0 0 0 100 2 0 0 4 210 102 4 0 0 0 0 2 0 0 0 100 3 0 0 0 21 8 16 0 0 0 0 9 0 0 0 100 4 0 0 0 12 3 8 0 0 0 0 294 0 0 0 100 5 0 0 2 312 153 105 0 1 0 0 0 0 0 0 100 6 0 0 7 13 4 38 1 0 1 0 1391 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:29:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 103 10 2 1 0 0 866 0 1 0 99 1 0 0 0 118 1 110 0 0 1 0 0 0 0 0 100 2 0 0 7 213 101 10 0 1 1 0 0 0 0 0 100 3 0 0 0 25 9 16 1 0 1 0 9 0 0 0 100 4 0 0 0 17 5 8 1 0 1 0 295 0 0 0 100 5 0 0 7 316 154 106 0 0 1 0 1 0 0 0 100 6 0 0 7 15 4 38 1 1 1 0 1388 0 0 0 100 7 0 0 0 13 3 6 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:29:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 16 2125 103 44 1 11 3 5 904 0 1 0 99 1 5 0 2 127 0 131 0 1 2 1 35 0 0 0 100 2 24 0 6 226 102 23 1 4 1 3 16 0 0 0 100 3 16 0 9 49 9 70 0 11 2 8 69 0 0 0 99 4 12 0 16 35 3 34 0 5 4 6 367 0 1 0 99 5 281 0 4 334 160 132 0 14 9 3 131 0 0 0 100 6 16 0 7 18 4 46 1 3 2 1 1404 0 0 0 99 7 14 0 5 20 1 28 0 8 4 5 36 0 0 0 100 March 4, 2026 at 01:29:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2113 103 86 0 3 0 0 866 0 1 0 99 1 0 0 0 40 1 32 0 1 0 0 1 0 0 0 100 2 0 0 4 209 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 13 2 10 0 0 1 0 0 0 0 0 100 4 0 0 0 15 3 11 0 1 2 0 294 0 0 0 100 5 0 0 2 315 152 106 0 0 1 0 0 0 0 0 100 6 0 0 7 19 5 42 1 0 1 0 1335 0 0 0 100 7 0 0 0 12 0 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:29:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 103 112 0 0 0 0 866 0 1 0 99 1 0 0 0 17 1 12 0 1 0 0 1 0 0 0 100 2 0 0 4 212 102 4 0 0 0 0 2 0 0 0 100 3 0 0 0 14 3 8 0 1 0 0 1 0 0 0 100 4 0 0 7 21 3 23 0 1 0 0 294 0 0 0 100 5 0 0 2 314 152 104 0 1 0 0 0 0 0 0 100 6 0 0 7 14 4 38 1 1 1 0 1330 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:29:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 103 108 2 0 0 0 866 0 1 0 99 1 0 0 0 16 0 10 0 0 0 0 0 0 0 0 100 2 0 0 4 209 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 4 0 0 7 16 3 10 1 0 0 0 294 0 0 0 100 5 0 0 2 322 153 118 0 3 0 0 0 0 0 0 100 6 0 0 7 15 3 40 1 2 1 0 1328 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:29:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 14 2110 104 110 0 1 0 0 893 0 1 0 99 1 0 0 0 17 2 12 0 0 0 0 2 0 0 0 100 2 0 0 4 210 102 4 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 5 0 0 2 312 152 102 0 0 0 0 0 0 0 0 100 6 0 0 7 14 4 38 2 0 0 0 1329 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:29:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 270 0 14 3222 103 2423 72 232 116 2 8549 13 4 0 82 1 351 0 0 1166 4 2344 75 244 94 4 8215 13 4 0 84 2 202 0 410 1209 101 2158 80 205 100 3 6542 13 3 0 84 3 227 0 0 954 7 1882 77 202 250 4 7254 13 3 0 83 4 355 0 0 959 7 1899 76 173 118 5 7984 15 3 0 81 5 5005 0 11 1219 146 1937 69 186 146 5 7196 15 4 0 81 6 910 0 8 666 8 1283 50 133 144 13 8579 16 3 0 80 7 154 0 0 748 1 1446 47 127 262 7 7558 14 3 0 83 March 4, 2026 at 01:29:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 14 4616 106 4972 104 551 510 2 23146 46 11 0 43 1 32 0 0 3038 8 6201 96 661 446 2 21185 41 10 0 50 2 19 0 1333 2775 118 5541 76 569 570 1 20944 37 10 0 53 3 75 0 0 2627 56 5206 67 505 557 0 23324 42 9 0 48 4 22 0 0 2551 5 5213 79 523 514 0 21833 46 9 0 45 5 45 0 3 2814 110 5287 64 470 459 1 20871 41 9 0 51 6 11 0 12 2648 13 5372 80 480 534 1 20855 41 8 0 50 7 2 0 0 2496 6 5100 75 467 515 0 22181 45 9 0 46 March 4, 2026 at 01:29:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 28 4721 108 5279 77 536 376 1 23449 41 10 0 49 1 9 0 0 2838 8 5850 77 536 688 3 22398 42 10 0 48 2 5 0 1375 2728 105 5526 63 472 411 0 20821 41 9 0 49 3 15 0 0 2573 8 5183 81 492 364 0 22663 42 9 0 49 4 11 0 0 2902 7 5828 73 529 408 0 21289 42 9 0 49 5 19 0 3 2309 111 4179 66 372 585 0 19408 43 9 0 48 6 41 0 0 2498 23 5076 92 485 429 0 22634 44 8 0 47 7 13 0 7 2497 12 5118 84 458 306 0 21386 39 8 0 52 March 4, 2026 at 01:29:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 5141 112 6199 106 596 368 0 21190 40 11 0 50 1 8 0 0 2942 9 6037 103 583 348 0 22059 45 9 0 46 2 2 0 1291 2732 113 5382 85 492 409 3 22153 38 10 0 52 3 21 0 0 2824 4 5798 80 533 439 0 21878 43 9 0 48 4 25 0 0 2415 8 4920 69 446 504 1 24860 44 10 0 46 5 12 0 3 2497 106 4620 69 408 319 0 19604 44 8 0 47 6 25 0 0 2714 15 5568 87 486 427 0 23262 39 10 0 52 7 7 0 14 2270 14 4578 61 382 382 3 20445 46 8 0 47 March 4, 2026 at 01:29:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 5014 108 5945 97 605 443 0 20453 41 11 0 48 1 3 0 0 2842 9 5707 92 556 377 1 22295 45 10 0 46 2 7 0 1334 2543 116 4968 98 465 530 0 19391 41 9 0 50 3 8 0 0 2653 10 5319 106 519 377 0 21393 46 9 0 45 4 8 0 14 2601 15 5231 88 494 426 0 18938 39 8 0 52 5 0 0 2 2640 109 4901 92 411 300 0 18369 37 9 0 54 6 8 0 0 2442 20 4913 111 456 541 0 20437 45 9 0 46 7 4 0 7 2127 9 4100 63 346 344 1 17900 39 8 0 53 March 4, 2026 at 01:29:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 4475 108 4797 50 476 384 2 17711 43 10 0 48 1 1 0 0 2826 10 5563 62 543 440 4 19593 37 9 0 54 2 9 0 1339 1888 109 3508 61 357 344 0 16556 49 8 0 43 3 10 0 0 2491 14 4927 75 470 438 0 19989 45 9 0 46 4 2 0 0 2462 11 4855 57 467 408 0 19904 40 9 0 51 5 12 0 3 2759 122 5032 63 429 457 1 17236 37 8 0 55 6 7 0 14 2498 8 4950 62 428 357 4 18200 43 8 0 50 7 8 0 0 2140 13 4202 60 343 458 0 17832 40 8 0 53 March 4, 2026 at 01:29:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 50 5025 104 5985 100 647 335 0 21579 42 10 0 48 1 6 0 0 2736 11 5465 134 591 503 0 24571 44 10 0 46 2 3 0 1320 2631 115 5213 121 513 483 0 20783 42 10 0 48 3 6 0 0 2676 72 5103 118 549 545 1 22043 39 10 0 51 4 4 0 7 2853 17 5824 123 540 326 0 18908 39 8 0 52 5 2 0 2 2855 108 5452 123 501 430 1 23865 43 10 0 48 6 11 0 14 2480 7 5027 116 480 509 2 21885 43 9 0 48 7 5 0 0 2424 11 4918 80 404 432 1 19148 43 8 0 49 March 4, 2026 at 01:29:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 5231 104 6490 97 612 294 0 21577 43 11 0 46 1 4 0 0 3043 10 6196 101 598 494 0 23376 41 10 0 50 2 8 0 1328 2711 108 5406 83 496 439 0 21663 41 10 0 50 3 5 0 0 2511 13 4973 78 472 426 0 21239 44 9 0 47 4 5 0 0 2533 12 5113 93 471 313 0 21961 45 9 0 46 5 7 0 2 2379 112 4304 66 371 410 1 20934 40 9 0 51 6 5 0 14 2478 11 5075 97 443 528 1 23120 42 9 0 49 7 8 0 0 2300 8 4733 76 394 407 0 19552 40 8 0 52 March 4, 2026 at 01:29:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 4694 104 5407 64 505 307 3 20173 42 10 0 48 1 3 0 0 2665 2 5266 82 528 523 2 20989 44 9 0 47 2 3 0 1304 2769 107 5504 73 479 364 0 19756 38 9 0 53 3 5 0 0 2708 10 5555 62 499 408 3 22027 44 9 0 46 4 4 0 0 2715 26 5441 69 489 333 0 19851 38 9 0 53 5 6 0 3 2267 112 4161 67 358 396 1 18731 44 8 0 48 6 2 0 7 2565 12 5278 58 438 389 0 20907 38 9 0 53 7 5 0 14 2085 6 4108 56 334 353 0 17617 44 7 0 49 March 4, 2026 at 01:29:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 85 0 0 3106 104 2023 9 193 89 0 8119 11 4 0 85 1 55 0 0 839 3 1605 4 154 112 0 6497 14 3 0 83 2 56 0 480 923 111 1545 5 147 205 2 6575 14 3 0 83 3 58 0 0 850 4 1678 5 166 159 1 7004 14 3 0 84 4 6 0 0 978 35 1882 7 163 126 0 7555 13 3 0 84 5 50 0 2 1039 106 1624 8 118 79 1 7422 14 3 0 83 6 75 0 145 744 8 1481 3 128 223 1 6874 13 3 0 84 7 80 0 14 836 4 1560 7 111 157 0 6838 13 3 0 84 March 4, 2026 at 01:29:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 105 126 1 0 0 0 310 0 1 0 99 1 0 0 0 17 1 28 0 1 0 0 17 0 0 0 100 2 0 0 4 216 105 8 0 1 0 0 7 0 0 0 100 3 0 0 0 8 0 4 0 1 0 0 3 0 0 0 100 4 0 0 0 110 51 104 0 0 0 0 5 0 0 0 100 5 0 0 2 224 109 38 1 1 1 0 1423 0 0 0 99 6 0 0 7 15 4 12 1 0 0 0 562 0 0 0 100 7 0 0 14 27 6 30 1 1 3 0 284 0 0 0 100 March 4, 2026 at 01:29:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2177 101 243 0 21 71 0 300 0 1 0 99 1 0 0 0 78 2 137 0 22 81 0 2 0 0 0 100 2 0 0 4 260 104 104 0 16 76 0 2 0 0 0 100 3 0 0 0 162 106 322 0 22 72 0 0 0 0 0 100 4 0 0 0 170 51 234 0 24 84 0 0 0 0 0 100 5 0 0 2 283 104 167 1 13 94 0 1425 0 1 0 99 6 0 0 7 93 5 173 1 21 79 0 560 0 0 0 99 7 0 0 14 69 8 116 0 16 58 0 276 0 0 0 100 March 4, 2026 at 01:29:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 0 0 0 0 300 0 1 0 99 1 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 2 0 0 4 217 104 16 0 1 0 0 1 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 106 51 100 0 0 0 0 0 0 0 0 100 5 0 0 2 219 105 38 1 0 1 0 1426 0 0 0 100 6 0 0 7 14 4 12 0 1 0 0 560 0 0 0 100 7 0 0 14 27 11 24 0 0 0 0 275 0 0 0 100 March 4, 2026 at 01:29:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 19 2117 101 137 0 10 1 7 351 0 1 0 99 1 14 0 7 21 0 16 1 4 3 2 23 0 0 0 100 2 10 0 9 228 106 33 1 5 0 6 33 0 0 0 100 3 8 0 2 20 0 26 0 7 2 2 22 0 0 0 100 4 10 0 0 122 51 120 2 3 7 1 35 0 0 0 100 5 281 0 3 227 106 46 1 4 17 0 1525 0 0 0 99 6 4 0 17 27 6 29 0 5 2 1 594 0 1 0 99 7 16 0 14 35 5 39 0 8 1 6 335 0 0 0 100 March 4, 2026 at 01:29:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 113 1 0 1 0 300 0 1 0 99 1 0 0 0 14 2 4 0 0 1 0 0 0 0 0 100 2 0 0 11 213 104 8 0 1 1 0 1 0 0 0 100 3 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 4 0 0 0 111 53 104 0 1 0 0 1 0 0 0 100 5 0 0 2 215 102 36 2 1 1 0 1368 0 0 0 99 6 0 0 7 23 7 16 1 1 1 0 560 0 0 0 100 7 0 0 14 15 4 6 0 1 1 0 267 0 0 0 100 March 4, 2026 at 01:29:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 101 120 0 1 0 0 300 0 1 0 99 1 0 0 0 10 0 4 0 0 0 0 18 0 0 0 100 2 0 0 4 224 106 20 0 1 0 0 17 0 0 0 100 3 0 0 7 10 0 6 0 1 0 0 0 0 0 0 100 4 0 0 0 113 51 110 0 1 0 0 0 0 0 0 100 5 0 0 2 228 109 44 1 0 0 0 1374 0 0 0 100 6 0 0 7 18 5 14 1 0 0 0 558 0 0 0 100 7 0 0 14 16 1 14 0 0 0 0 274 0 0 0 100 March 4, 2026 at 01:29:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 101 112 0 0 2 0 300 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 4 214 103 10 0 1 1 0 0 0 0 0 100 3 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 4 0 0 0 110 51 104 0 1 0 0 0 0 0 0 100 5 0 0 2 221 104 46 1 1 0 0 1364 0 0 0 100 6 0 0 7 18 6 14 0 0 0 0 561 0 0 0 100 7 0 0 14 12 1 8 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:29:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 300 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 2 0 0 4 212 104 6 0 0 0 0 2 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 106 51 100 0 0 0 0 0 0 0 0 100 5 0 0 2 217 104 38 1 1 0 0 1365 0 0 0 100 6 0 0 7 16 5 14 0 0 0 0 558 0 0 0 100 7 0 0 14 8 1 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:30:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 545 0 0 3211 108 1949 51 363 102 9 10558 16 4 0 79 1 3285 0 22 1205 4 2105 62 410 126 8 11825 16 4 0 80 2 817 0 900 1147 104 1838 55 348 212 9 9571 16 4 0 80 3 826 0 0 1106 2 1949 62 369 166 3 11649 17 4 0 79 4 418 0 0 1060 21 1744 69 346 116 3 9129 12 3 0 85 5 2797 0 5 1119 120 1515 45 269 148 7 10334 15 4 0 82 6 1197 0 0 998 8 1742 47 358 174 6 10939 17 3 0 79 7 323 0 7 813 6 1323 26 231 116 6 8347 10 3 0 88 March 4, 2026 at 01:30:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 183 0 0 3784 109 2819 83 564 211 0 15126 24 6 0 70 1 404 0 14 1762 14 2995 88 604 187 0 17689 26 6 0 68 2 112 0 1416 1614 116 2648 75 468 179 0 14278 24 5 0 71 3 333 0 0 1634 11 2862 93 569 191 3 18631 22 6 0 73 4 454 0 52 1564 11 2649 68 543 233 1 15620 27 5 0 68 5 258 0 4 1530 104 2166 52 395 157 5 13323 21 4 0 75 6 358 0 0 1407 9 2421 72 498 170 3 15459 19 4 0 76 7 117 0 7 1174 3 1924 37 317 159 1 13598 18 4 0 79 March 4, 2026 at 01:30:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 3833 103 2935 60 569 172 3 15466 24 6 0 70 1 117 0 14 1719 12 3021 83 618 276 3 18767 27 6 0 67 2 100 0 1418 1634 118 2745 74 479 223 3 15378 23 6 0 71 3 10 0 0 1659 8 3020 73 572 172 2 19537 23 6 0 71 4 61 0 0 1585 13 2742 52 568 175 0 16213 24 5 0 71 5 41 0 2 1616 112 2379 52 416 238 4 14694 20 4 0 76 6 49 0 0 1549 15 2727 73 566 180 4 16991 23 5 0 73 7 96 0 7 1234 6 2042 52 380 157 1 13886 19 4 0 77 March 4, 2026 at 01:30:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 4101 109 3434 105 683 230 1 15224 22 6 0 72 1 0 0 0 1921 14 3525 95 747 361 2 19014 30 6 0 64 2 40 0 1433 1674 112 2829 66 561 243 1 16414 25 6 0 69 3 6 0 0 1852 78 3242 96 673 240 1 20311 24 6 0 70 4 1 0 0 1736 10 3047 72 657 277 1 17816 24 5 0 71 5 1 0 2 1599 108 2271 40 465 309 1 14704 19 4 0 77 6 3 0 0 1584 6 2792 76 599 281 0 16734 22 5 0 73 7 2 0 7 1345 12 2310 49 436 228 1 14980 18 4 0 78 March 4, 2026 at 01:30:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 4149 104 3595 69 739 234 0 17851 24 7 0 69 1 0 0 0 2016 15 3674 92 777 317 1 21148 27 6 0 67 2 0 0 1417 1771 118 2969 65 597 358 8 16368 24 6 0 70 3 0 0 14 1932 15 3518 102 689 334 0 22247 26 6 0 68 4 0 0 0 1736 15 3056 65 681 204 0 17043 23 5 0 72 5 3 0 3 1712 108 2436 43 474 280 3 15466 20 4 0 76 6 0 0 36 1715 8 3152 87 655 276 2 19616 26 5 0 69 7 0 0 7 1370 10 2372 44 459 333 0 16595 19 4 0 77 March 4, 2026 at 01:30:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 88 0 0 4146 104 3674 126 768 249 1 17225 23 7 0 70 1 12 0 7 2078 9 3806 103 798 306 1 20586 22 6 0 71 2 2 0 1181 1837 119 3081 77 571 518 0 17499 19 6 0 75 3 139 0 0 1923 8 3629 117 721 377 0 21109 22 6 0 72 4 6 0 14 1791 7 3246 68 697 272 4 18860 21 5 0 74 5 9 0 1 1780 107 2736 59 506 278 0 14845 18 4 0 78 6 26 0 0 1764 21 3284 94 658 561 0 19338 22 5 0 72 7 17 0 0 1424 11 2566 52 459 404 1 16383 18 4 0 78 March 4, 2026 at 01:30:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 105 124 0 1 0 0 312 0 1 0 99 1 0 0 7 22 5 15 1 1 1 0 270 0 0 0 100 2 0 0 21 310 151 106 0 3 1 0 3 0 0 0 100 3 0 0 0 20 3 36 1 0 3 0 1138 0 0 0 100 4 0 0 14 23 6 21 0 2 1 0 570 0 0 0 100 5 0 0 7 221 104 10 0 1 1 0 294 0 0 0 100 6 1 0 0 21 6 10 0 0 1 0 13 0 0 0 100 7 0 0 0 16 3 4 0 0 1 0 9 0 0 0 100 March 4, 2026 at 01:30:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 106 134 1 2 0 0 320 0 1 0 99 1 0 0 7 9 2 6 0 0 0 0 260 0 0 0 100 2 0 0 3 310 153 104 0 0 0 0 2 0 0 0 100 3 0 0 0 11 1 38 1 1 0 0 1137 0 0 0 100 4 0 0 14 21 7 16 0 2 2 0 594 0 0 0 100 5 0 0 3 230 110 16 0 1 3 0 294 0 0 0 100 6 0 0 0 9 1 6 0 1 0 0 1 0 0 0 100 7 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:30:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 108 193 1 9 38 0 310 0 1 0 99 1 0 0 7 51 3 83 0 14 47 0 260 0 0 0 100 2 0 0 4 340 153 160 0 8 39 0 1 0 0 0 100 3 0 0 0 92 45 117 1 17 76 0 1130 0 0 0 99 4 0 0 14 87 4 158 1 13 44 0 565 0 0 0 100 5 0 0 2 252 104 84 0 12 42 0 294 0 0 0 100 6 0 0 0 40 2 71 0 12 45 0 1 0 0 0 100 7 0 0 0 37 0 64 0 6 39 0 0 0 0 0 100 March 4, 2026 at 01:30:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 12 2133 109 148 2 6 3 3 342 0 1 0 99 1 25 0 13 31 5 34 1 5 1 8 292 0 0 0 100 2 8 0 10 340 157 140 1 8 1 1 32 0 0 0 100 3 30 0 16 31 1 67 2 6 3 5 1180 0 1 0 99 4 2 0 33 19 4 26 0 5 3 4 606 0 0 0 99 5 283 0 4 246 107 30 2 7 13 3 409 0 0 0 100 6 11 0 3 27 1 27 0 4 4 4 32 0 0 0 100 7 2 0 0 27 1 17 3 6 3 1 21 0 0 0 100 March 4, 2026 at 01:30:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 114 0 0 0 0 300 0 1 0 99 1 0 0 7 12 2 8 0 1 0 0 259 0 0 0 100 2 0 0 3 310 151 104 0 1 0 0 0 0 0 0 100 3 0 0 0 10 1 34 0 0 0 0 1075 0 0 0 100 4 0 0 14 16 4 11 0 2 0 0 566 0 0 0 100 5 0 0 10 218 104 10 0 1 0 0 294 0 0 0 100 6 0 0 0 12 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 14 0 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:30:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 106 0 2 0 0 300 0 1 0 99 1 0 0 7 13 3 10 0 1 0 0 260 0 0 0 100 2 0 0 4 311 152 104 0 1 0 0 2 0 0 0 100 3 0 0 0 9 1 32 1 0 0 0 1070 0 0 0 100 4 0 0 21 18 4 13 1 1 0 0 566 0 0 0 100 5 0 0 2 220 104 10 0 0 0 0 294 0 0 0 100 6 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:30:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 101 122 1 1 0 0 300 0 1 0 99 1 0 0 7 19 4 14 0 0 0 0 265 0 0 0 100 2 0 0 4 309 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 13 1 38 2 0 0 0 1076 0 0 0 100 4 0 0 21 13 4 8 1 1 0 0 566 0 0 0 100 5 0 0 2 222 109 8 0 0 0 0 294 0 0 0 100 6 0 0 0 11 1 8 0 0 0 0 9 0 0 0 100 7 0 0 0 12 0 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:30:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 116 0 1 2 0 299 0 1 0 99 1 0 0 7 17 3 20 1 1 0 0 259 0 0 0 100 2 0 0 4 311 152 104 0 0 0 0 2 0 0 0 100 3 0 0 0 13 1 40 1 1 2 0 1070 0 0 0 100 4 0 0 14 11 4 6 0 0 0 0 566 0 0 0 100 5 0 0 2 217 104 8 1 0 0 0 294 0 0 0 100 6 0 0 0 13 3 10 0 0 0 0 1 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:30:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 271 0 0 2516 103 945 46 182 29 8 4461 4 2 0 94 1 282 0 7 455 5 874 49 205 32 1 4161 4 2 0 94 2 166 0 172 677 151 891 42 158 19 6 3963 4 1 0 94 3 157 0 0 386 1 843 40 172 56 2 5631 4 2 0 94 4 234 0 14 384 4 747 28 161 49 2 4416 4 1 0 94 5 5324 0 11 643 109 827 29 136 79 9 4275 6 2 0 92 6 974 0 1 329 1 626 27 138 50 13 3630 4 1 0 95 7 129 0 0 334 0 677 20 116 45 10 3681 3 1 0 96 March 4, 2026 at 01:30:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 103 56 0 4 0 0 306 0 1 0 99 1 0 0 7 16 3 12 0 2 2 0 271 0 0 0 100 2 0 0 17 214 102 14 0 2 1 0 14 0 0 0 100 3 0 0 0 177 51 198 0 0 0 0 1132 0 0 0 100 4 0 0 14 13 4 8 0 0 3 0 579 0 0 0 100 5 49 0 3 230 107 22 0 0 0 0 310 0 0 0 100 6 0 0 0 17 2 12 0 0 1 0 13 0 0 0 100 7 0 0 0 13 1 8 0 2 0 0 14 0 0 0 100 March 4, 2026 at 01:30:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 112 1 0 1 0 300 0 1 0 99 1 0 0 7 14 4 8 0 0 1 0 263 0 0 0 100 2 0 0 4 211 101 4 0 0 1 0 0 0 0 0 100 3 1 0 0 119 53 148 1 2 1 0 1130 0 0 0 100 4 0 0 14 17 6 8 1 0 1 0 566 0 0 0 100 5 0 0 2 228 110 20 0 1 1 0 303 0 0 0 100 6 0 0 0 11 3 4 0 0 1 0 1 0 0 0 100 7 0 0 0 13 3 4 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:30:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 116 0 0 0 0 300 0 1 0 99 1 0 0 7 20 5 22 1 1 0 0 275 0 0 0 100 2 0 0 3 209 102 4 0 1 0 0 5 0 0 0 100 3 0 0 0 109 51 134 1 0 0 0 1128 0 0 0 100 4 0 0 14 10 4 6 0 0 0 0 566 0 0 0 100 5 0 0 3 235 116 20 1 0 1 0 303 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 15 2 12 0 0 0 0 6 0 0 0 100 March 4, 2026 at 01:30:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 2 2157 101 206 0 18 48 9 363 0 1 0 99 1 2 0 7 62 4 110 0 17 62 3 294 0 0 0 99 2 19 0 4 245 101 63 1 13 30 5 28 0 0 0 100 3 2 0 2 216 101 231 2 17 67 1 1149 0 1 0 99 4 1 0 14 120 4 213 1 17 51 2 590 0 0 0 99 5 9 0 9 292 111 134 0 13 64 4 317 0 1 0 99 6 3 0 21 64 3 112 0 21 67 1 58 0 1 0 99 7 17 0 4 53 1 97 1 15 51 5 28 0 0 0 100 March 4, 2026 at 01:30:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 118 0 3 0 0 300 0 1 0 99 1 0 0 7 17 4 12 0 0 0 0 264 0 0 0 100 2 0 0 3 211 102 4 0 0 0 0 5 0 0 0 100 3 0 0 0 35 13 56 1 0 1 0 1074 0 0 0 100 4 1 0 14 95 42 88 0 2 8 0 293 0 0 0 100 5 278 0 3 226 106 21 0 3 7 0 87 0 0 0 100 6 0 0 0 17 2 12 0 3 0 0 557 0 0 0 100 7 0 0 7 9 0 7 0 2 1 0 47 0 0 0 100 March 4, 2026 at 01:30:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 114 1 1 0 0 300 0 1 0 99 1 0 0 7 13 3 8 0 0 0 0 259 0 0 0 100 2 0 0 4 207 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 12 1 32 1 0 1 0 1071 0 0 0 100 4 0 0 14 109 53 104 0 0 0 0 266 0 0 0 100 5 0 0 2 215 103 6 0 1 0 0 0 0 0 0 100 6 0 0 7 14 2 11 1 1 0 0 300 0 0 0 100 7 0 0 0 13 1 4 0 0 1 0 294 0 0 0 100 March 4, 2026 at 01:30:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2101 100 114 0 1 1 0 300 0 1 0 99 1 0 0 7 12 3 8 1 0 0 0 259 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 2 0 0 0 100 3 0 0 0 8 1 34 0 1 0 0 1069 0 0 0 100 4 0 0 14 109 53 102 1 0 0 0 266 0 0 0 100 5 0 0 3 219 103 14 0 0 1 0 0 0 0 0 100 6 0 0 0 13 2 9 0 1 0 0 300 0 0 0 100 7 0 0 0 11 2 6 1 0 0 0 295 0 0 0 100 March 4, 2026 at 01:30:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 114 0 0 0 0 300 0 1 0 99 1 0 0 7 17 3 16 0 0 0 0 269 0 0 0 100 2 0 0 3 209 101 4 0 0 0 0 8 0 0 0 100 3 0 0 0 12 2 36 1 0 1 0 1071 0 0 0 100 4 0 0 14 107 52 102 0 0 0 0 266 0 0 0 100 5 0 0 3 221 109 6 0 1 0 0 0 0 0 0 100 6 0 0 7 12 2 9 0 0 0 0 300 0 0 0 100 7 0 0 0 19 2 20 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:30:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 114 0 0 3 0 300 0 1 0 99 1 0 0 7 12 3 10 0 0 0 0 259 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 2 0 0 0 100 3 0 0 0 13 2 40 1 0 1 0 1070 0 0 0 100 4 0 0 14 106 52 102 0 0 0 0 266 0 0 0 100 5 0 0 3 214 103 6 0 0 0 0 0 0 0 0 100 6 0 0 0 13 3 10 0 0 1 0 300 0 0 0 100 7 0 0 0 8 1 4 0 0 2 0 294 0 0 0 100 March 4, 2026 at 01:30:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 457 0 0 4373 107 4094 74 443 181 15 9332 25 7 0 68 1 461 0 7 2355 12 4199 93 423 282 17 9674 27 7 0 66 2 294 0 1307 1941 106 3248 48 283 235 11 7830 19 6 0 75 3 316 0 14 2026 13 3592 63 341 239 8 9657 21 6 0 73 4 180 0 0 1743 16 2933 38 273 225 2 7508 17 5 0 78 5 2481 0 9 1708 112 2467 44 174 309 16 6742 18 10 0 72 6 1065 0 1 1902 11 3453 47 298 251 34 8485 21 6 0 73 7 262 0 3 1554 22 2691 35 204 253 21 7101 17 4 0 79 March 4, 2026 at 01:30:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 94 0 0 4483 113 4150 83 485 233 0 9322 27 8 0 66 1 85 0 23 2441 17 4259 104 464 256 0 9890 25 7 0 69 2 34 0 1418 2156 112 3627 58 295 336 0 8424 24 6 0 70 3 40 0 0 2213 23 3808 82 349 287 0 8976 23 6 0 71 4 32 0 14 1882 15 3180 58 305 203 0 9442 22 5 0 73 5 17 0 2 1986 130 3023 35 221 300 0 7333 19 5 0 76 6 45 0 0 1970 19 3440 64 295 353 0 8684 23 5 0 72 7 29 0 0 1635 14 2751 38 189 294 0 6729 18 4 0 78 March 4, 2026 at 01:30:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 190 0 5 4275 121 3833 57 434 329 21 9200 23 7 0 70 1 160 0 5 2144 23 3757 78 421 231 11 8237 23 6 0 71 2 89 0 1230 1907 120 3245 46 298 180 8 8013 19 6 0 75 3 93 0 26 2040 14 3632 66 327 255 11 7965 22 5 0 73 4 250 0 21 1742 29 2982 43 286 271 16 9029 17 5 0 78 5 5224 0 22 1752 149 2561 40 207 254 11 6162 19 5 0 76 6 1522 0 38 1764 35 3049 40 262 196 26 7419 20 5 0 75 7 252 0 4 1285 27 2128 27 173 278 24 6249 14 4 0 83 March 4, 2026 at 01:30:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 102 118 0 0 0 0 307 0 1 0 99 1 42 0 0 30 3 30 0 3 0 0 40 0 0 0 100 2 3 0 18 225 106 23 0 2 0 0 315 0 0 0 100 3 0 0 0 16 1 6 0 1 1 0 8 0 0 0 100 4 0 0 21 29 8 56 1 2 2 0 1742 0 0 0 99 5 0 0 2 228 111 14 0 2 0 0 16 0 0 0 100 6 0 0 7 22 3 19 0 5 0 0 265 0 0 0 100 7 0 0 0 116 51 108 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:30:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 101 183 1 15 59 0 300 0 1 0 99 1 0 0 0 72 4 123 0 20 70 0 8 0 0 0 100 2 0 0 4 245 102 69 0 10 61 0 294 0 0 0 100 3 0 0 0 129 64 118 0 19 73 0 0 0 0 0 100 4 3 0 14 124 5 257 1 17 63 0 1693 0 1 0 99 5 0 0 2 258 102 93 0 14 37 0 0 0 0 0 100 6 0 0 14 62 6 111 0 17 61 0 308 0 0 0 100 7 0 0 0 147 51 175 0 11 39 0 0 0 0 0 100 March 4, 2026 at 01:30:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 0 0 0 300 0 1 0 99 1 0 0 0 25 6 20 0 0 0 0 9 0 0 0 100 2 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 16 6 40 1 0 0 0 1697 0 0 0 100 5 0 0 3 211 102 2 0 0 0 0 0 0 0 0 100 6 0 0 14 15 4 12 1 0 0 0 260 0 0 0 100 7 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:30:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 127 0 22 2202 102 304 2 30 12 13 1106 0 1 0 98 1 241 0 2 119 8 202 0 24 11 8 323 1 0 0 99 2 74 0 20 261 102 96 7 23 9 4 600 1 0 0 99 3 235 0 1 85 0 125 2 26 8 4 378 0 0 0 99 4 154 0 17 91 5 206 12 29 32 4 2011 0 1 0 99 5 5387 0 46 292 128 131 3 32 67 8 919 2 1 0 96 6 1480 0 14 105 5 142 2 26 44 13 966 1 1 0 98 7 369 0 0 168 51 231 4 22 10 18 311 0 0 0 99 March 4, 2026 at 01:30:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 45 0 0 2118 105 83 0 4 0 0 310 0 1 0 99 1 0 0 0 29 1 18 0 1 0 0 8 0 0 0 100 2 6 0 17 211 102 6 0 1 0 0 302 0 0 0 100 3 0 0 0 18 2 10 0 2 0 0 12 0 0 0 100 4 0 0 14 56 6 76 1 1 2 0 1709 0 0 0 99 5 0 0 10 228 104 20 0 3 0 0 4 0 0 0 100 6 0 0 7 20 4 16 0 2 0 0 262 0 0 0 100 7 0 0 0 113 51 104 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:30:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 106 63 2 3 0 0 318 0 1 0 99 1 0 0 0 34 0 26 0 2 0 0 0 0 0 0 100 2 0 0 4 211 102 2 0 0 0 0 294 0 0 0 100 3 0 0 0 13 1 8 0 0 0 0 6 0 0 0 100 4 0 0 14 16 5 40 2 1 0 0 1696 0 0 0 100 5 0 0 2 220 108 4 0 0 0 0 0 0 0 0 100 6 0 0 7 14 4 10 0 1 0 0 268 0 0 0 100 7 0 0 0 165 51 159 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:30:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2164 116 103 0 18 52 0 309 0 1 0 99 1 0 0 0 170 0 215 0 23 57 0 0 0 1 0 99 2 0 0 3 258 102 101 0 12 89 0 294 0 0 0 100 3 0 0 0 125 69 105 0 21 97 0 0 0 0 0 100 4 0 0 14 132 6 277 1 17 65 0 1697 0 1 0 99 5 0 0 3 263 102 104 0 18 51 0 0 0 0 0 100 6 0 0 7 68 5 114 1 17 61 0 261 0 0 0 100 7 0 0 0 124 42 152 0 12 51 0 0 0 0 0 100 March 4, 2026 at 01:30:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 7 2205 159 223 0 11 7 3 436 0 1 0 99 1 17 0 18 92 2 105 0 13 5 3 79 0 1 0 99 2 14 0 3 242 103 53 1 12 4 10 369 0 0 0 100 3 15 0 1 25 0 30 0 8 12 1 42 0 0 0 100 4 7 0 18 32 7 72 4 8 2 5 1740 0 0 0 99 5 28 0 10 230 109 36 0 10 7 3 58 0 0 0 100 6 1664 0 11 34 4 45 3 6 27 6 581 1 1 0 98 7 49 0 2 39 1 72 0 17 9 13 193 0 0 0 100 March 4, 2026 at 01:30:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24799 0 20 2308 106 401 15 55 55 32 1343 8 23 0 69 1 210 0 39 211 0 332 2 59 38 28 757 0 1 0 98 2 777 0 14 354 102 251 5 40 33 22 969 1 2 0 97 3 9744 0 144 190 1 414 6 55 88 55 2081 4 3 0 93 4 1293 0 18 211 6 370 0 66 72 44 1575 2 1 0 98 5 221 0 5 420 133 360 3 49 65 38 1778 0 1 0 98 6 3147 0 31 236 22 406 7 61 85 24 1716 1 2 0 98 7 97 0 6 221 33 326 1 39 39 28 865 0 1 0 99 March 4, 2026 at 01:30:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 101 122 1 2 0 0 300 0 1 0 99 1 0 0 21 49 2 8 0 2 3 0 0 0 1 0 99 2 0 0 235 212 101 2 0 0 3 0 0 0 0 0 100 3 0 0 0 51 5 8 0 0 1 0 5 0 0 0 100 4 0 0 14 55 7 12 1 1 1 0 569 0 0 0 100 5 0 0 2 249 103 34 1 0 1 0 1043 0 0 0 100 6 0 0 7 52 5 10 0 0 1 0 263 0 0 0 100 7 66 0 0 163 58 118 0 1 1 0 302 0 0 0 100 March 4, 2026 at 01:30:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 615 0 0 2139 101 86 0 10 7 7 501 1 1 0 98 1 899 0 114 102 1 134 1 10 9 10 143 0 1 0 99 2 142 0 4 251 101 62 1 7 6 14 153 0 0 0 100 3 17 0 2 48 2 48 0 8 3 3 189 0 0 0 100 4 1832 0 14 44 3 45 2 5 5 8 933 0 1 0 99 5 22 0 2 248 108 71 1 10 6 6 1202 0 0 0 100 6 14 0 7 45 5 46 1 7 8 3 360 0 0 0 100 7 3 0 0 145 57 134 1 6 5 0 352 0 0 0 100 March 4, 2026 at 01:30:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 101 162 0 17 38 0 301 0 1 0 99 1 0 0 0 60 2 101 1 12 46 0 0 0 0 0 100 2 0 0 4 238 101 60 1 14 37 0 0 0 0 0 100 3 0 0 0 114 57 108 0 16 73 0 0 0 0 0 100 4 0 0 14 97 5 169 1 13 39 0 566 0 0 0 100 5 0 0 2 281 103 161 1 12 49 0 1121 0 0 0 99 6 0 0 7 63 5 109 0 16 57 0 261 0 0 0 100 7 0 0 0 150 57 176 0 12 29 0 302 0 0 0 100 March 4, 2026 at 01:30:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 102 0 2 0 0 300 0 1 0 99 1 0 0 0 16 2 11 0 2 0 0 1 0 0 0 100 2 0 0 4 210 101 8 0 1 0 0 0 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 10 3 4 0 0 0 0 567 0 0 0 100 5 0 0 2 226 103 44 1 0 0 0 1120 0 0 0 100 6 0 0 7 17 5 15 0 1 0 0 262 0 0 0 100 7 0 0 0 121 58 116 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:30:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2119 105 124 1 0 0 0 313 0 1 0 99 1 0 0 0 12 1 8 0 1 1 0 3 0 0 0 100 2 0 0 4 212 101 12 0 2 2 0 15 0 0 0 100 3 0 0 0 8 0 8 0 1 1 0 0 0 0 0 100 4 0 0 14 10 3 4 2 0 0 0 565 0 0 0 100 5 0 0 2 213 103 36 0 0 1 0 1124 0 0 0 100 6 0 0 7 14 4 10 0 1 0 0 260 0 0 0 100 7 0 0 0 117 55 112 0 1 0 0 317 0 0 0 100 March 4, 2026 at 01:30:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 120 0 0 0 0 308 0 1 0 99 1 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 2 0 0 4 208 102 4 0 1 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 10 4 6 0 0 0 0 567 0 0 0 100 5 0 0 2 213 103 34 1 0 0 0 1122 0 0 0 100 6 21 0 7 18 5 14 1 0 0 0 267 0 0 0 100 7 22 0 0 114 54 108 1 0 0 0 299 0 0 0 100 March 4, 2026 at 01:30:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 122 0 0 0 0 308 0 1 0 99 1 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 2 0 0 4 209 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 12 0 12 0 1 0 0 5 0 0 0 100 4 0 0 14 18 4 24 0 1 0 0 578 0 0 0 100 5 0 0 2 220 110 34 1 0 0 0 1118 0 0 0 100 6 0 0 7 15 3 14 0 0 0 0 266 0 0 0 100 7 0 0 0 114 53 110 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:30:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 122 0 0 0 0 306 0 1 0 99 1 0 0 0 7 0 4 0 0 2 0 0 0 0 0 100 2 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 2 0 0 0 0 0 100 4 0 0 14 11 3 8 0 0 2 0 567 0 0 0 100 5 0 0 3 220 103 48 1 1 0 0 1116 0 0 0 100 6 0 0 7 20 5 18 0 0 0 0 262 0 0 0 100 7 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:30:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 78 1 1 0 0 308 0 1 0 99 1 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 2 0 0 4 210 102 4 0 0 0 0 1 0 0 0 100 3 0 0 0 48 1 44 0 2 0 0 0 0 0 0 100 4 0 0 14 10 3 4 1 0 0 0 565 0 0 0 100 5 0 0 2 215 104 36 1 0 0 0 1118 0 0 0 100 6 0 0 7 13 3 10 0 0 0 0 260 0 0 0 100 7 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:30:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 334 0 0 2206 106 217 4 22 11 1 711 1 2 0 98 1 106 0 0 90 2 143 0 23 4 2 312 0 0 0 99 2 3 0 45 291 103 155 0 12 0 0 444 0 0 0 99 3 273 0 0 162 4 408 0 19 4 1 754 1 0 0 99 4 105 0 14 79 3 123 1 14 7 0 978 0 0 0 99 5 201 0 3 302 136 134 0 7 2 0 1601 1 1 0 99 6 203 0 7 74 5 124 2 13 4 1 759 1 1 0 99 7 182 0 0 202 58 267 2 9 5 2 583 0 0 0 99 March 4, 2026 at 01:30:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 112 0 1 0 0 299 0 1 0 99 1 0 0 0 11 2 4 0 0 1 0 1 0 0 0 100 2 0 0 7 219 106 12 0 0 1 0 8 0 0 0 100 3 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 4 2 0 14 15 6 8 0 0 1 0 582 0 0 0 100 5 0 0 7 217 103 38 1 1 1 0 1138 0 0 0 100 6 0 0 7 25 6 22 0 1 1 0 264 0 0 0 100 7 0 0 0 117 55 110 0 0 1 0 296 0 0 0 100 March 4, 2026 at 01:30:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 112 0 0 0 0 300 0 1 0 99 1 0 0 0 16 2 12 0 0 0 0 7 0 0 0 100 2 0 0 4 226 107 26 0 1 0 0 20 0 0 0 100 3 0 0 0 11 1 9 0 1 0 0 5 0 0 0 100 4 0 0 14 10 4 6 0 0 0 0 586 0 0 0 100 5 0 0 2 220 108 34 1 0 0 0 1136 0 0 0 100 6 0 0 7 15 4 12 0 0 0 0 262 0 0 0 100 7 0 0 0 114 53 110 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:30:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 101 176 1 11 47 0 300 0 1 0 99 1 0 0 0 52 0 96 0 15 60 0 0 0 0 0 100 2 0 0 4 257 106 93 0 11 41 0 8 0 0 0 100 3 0 0 0 118 63 103 0 13 56 0 0 0 0 0 100 4 0 0 14 107 3 198 1 14 52 0 567 0 0 0 100 5 0 0 2 259 103 128 1 13 60 0 1136 0 0 0 99 6 0 0 7 69 5 116 0 13 62 0 261 0 0 0 100 7 0 0 0 166 53 216 0 14 55 0 293 0 0 0 100 March 4, 2026 at 01:30:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 833 0 45 2431 102 626 9 133 80 75 3015 2 2 0 96 1 979 0 141 306 1 569 3 144 125 89 2191 1 1 0 98 2 121 0 32 504 105 508 3 121 294 85 2196 1 2 0 98 3 4075 0 25 346 1 569 5 116 255 77 3271 1 3 0 96 4 4250 0 143 326 3 680 2 147 125 112 3911 2 2 0 96 5 1432 0 138 465 135 490 5 82 185 94 6156 1 2 0 97 6 144 0 21 351 4 751 6 173 96 99 3352 1 1 0 98 7 214 0 18 396 53 656 3 129 217 75 2999 1 1 0 98 March 4, 2026 at 01:30:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 91 2118 101 81 0 4 8 4 335 0 2 0 98 1 7 0 8 84 1 76 0 6 11 2 13 0 1 0 99 2 3 0 4 226 101 14 0 3 5 2 11 0 0 0 100 3 2 0 0 26 1 16 0 2 3 2 11 0 0 0 100 4 4 0 14 30 3 17 0 2 1 4 574 0 0 0 100 5 6 0 2 239 105 56 0 3 3 0 846 0 0 0 99 6 11 0 7 34 4 25 0 2 5 3 271 0 0 0 100 7 26 0 0 130 53 118 0 1 2 2 305 0 0 0 100 March 4, 2026 at 01:30:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2204 101 40 0 2 3 0 300 0 2 0 98 1 0 0 679 91 0 84 0 1 2 0 0 0 1 0 99 2 0 0 11 314 101 4 0 1 0 0 0 0 0 0 100 3 0 0 0 112 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 113 3 4 0 0 0 0 567 0 0 0 100 5 0 0 2 320 103 34 1 0 1 0 763 0 0 0 100 6 0 0 7 120 5 12 0 0 0 0 262 0 0 0 100 7 0 0 0 221 53 112 0 2 0 0 294 0 0 0 100 March 4, 2026 at 01:30:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 101 116 2 2 0 0 309 0 1 0 99 1 0 0 0 11 0 6 0 1 0 0 0 0 0 0 100 2 0 0 4 216 101 14 0 1 0 0 0 0 0 0 100 3 0 0 0 11 1 6 0 1 0 0 0 0 0 0 100 4 0 0 14 11 3 4 1 0 0 0 566 0 0 0 100 5 0 0 2 225 109 38 1 0 0 0 768 0 0 0 100 6 0 0 7 19 4 14 0 0 0 0 265 0 0 0 100 7 0 0 0 124 53 119 1 1 0 0 297 0 0 0 100 March 4, 2026 at 01:30:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 104 0 0 0 0 300 0 1 0 99 1 0 0 0 9 1 6 0 0 1 0 0 0 0 0 100 2 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 2 0 0 0 0 0 100 4 0 0 14 11 4 8 0 0 2 0 566 0 0 0 100 5 0 0 2 215 103 40 0 0 4 0 760 0 0 0 100 6 0 0 7 14 4 12 1 0 0 0 261 0 0 0 100 7 0 0 0 118 52 112 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:30:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6440 0 144 2558 104 693 13 122 439 124 8356 3 4 0 92 1 9213 0 547 516 1 558 4 115 320 110 7976 3 4 0 93 2 4047 0 23 594 102 536 14 99 448 126 12360 4 5 0 92 3 2176 0 27 493 10 582 10 110 99 89 5740 2 3 0 95 4 1067 0 407 449 3 507 7 108 108 90 6123 2 4 0 95 5 5757 0 15 591 116 431 6 86 83 65 2339 1 2 0 97 6 4160 0 377 477 4 358 6 83 192 52 7338 2 4 0 94 7 13111 0 503 514 34 422 8 58 328 72 7166 4 5 0 91 March 4, 2026 at 01:30:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2124 101 38 0 2 3 0 300 0 2 0 98 1 0 0 0 33 1 6 0 0 0 0 0 0 0 0 100 2 0 0 115 220 101 10 0 1 4 0 0 0 0 0 100 3 0 0 0 206 51 180 0 1 0 0 0 0 0 0 100 4 0 0 14 33 3 6 0 0 0 0 565 0 0 0 100 5 0 0 10 235 103 36 0 1 1 0 1152 0 0 0 100 6 0 0 7 36 4 10 0 0 0 0 261 0 0 0 100 7 0 0 0 42 3 14 0 0 0 0 295 0 0 0 100 March 4, 2026 at 01:30:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2154 102 74 1 1 2 0 301 0 1 0 99 1 0 0 0 96 2 40 0 1 1 0 0 0 0 0 100 2 0 0 339 214 101 6 0 0 3 0 0 0 0 0 100 3 0 0 0 161 52 102 0 0 1 0 0 0 0 0 100 4 0 0 14 67 6 8 1 0 1 0 569 0 0 0 100 5 0 0 3 268 103 36 1 0 1 0 1134 0 0 0 100 6 0 0 7 68 4 10 0 2 1 0 259 0 0 0 100 7 0 0 0 73 4 14 0 0 1 0 295 0 0 0 100 March 4, 2026 at 01:30:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 12 0 1 0 0 306 0 1 0 99 1 0 0 0 118 1 120 0 2 0 0 27 0 0 0 100 2 0 0 3 213 102 8 0 0 0 0 9 0 0 0 100 3 0 0 0 111 51 108 0 1 2 0 5 0 0 0 100 4 0 0 14 9 3 6 0 1 0 0 566 0 0 0 100 5 0 0 3 224 109 44 1 1 2 0 1135 0 0 0 100 6 0 0 7 13 4 10 1 0 0 0 261 0 0 0 100 7 0 0 0 17 2 12 1 1 0 0 294 0 0 0 100 March 4, 2026 at 01:30:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2360 101 593 1 144 1716 6 307 0 5 0 95 1 0 0 0 381 1 757 2 157 1688 6 1 0 5 0 95 2 0 0 3 539 101 769 1 145 1662 2 0 0 4 0 96 3 0 0 0 503 245 609 3 152 1743 6 0 0 5 0 95 4 0 0 14 328 6 778 2 170 1917 8 565 0 5 0 95 5 0 0 3 461 104 623 3 122 1600 3 1134 0 5 0 95 6 0 0 7 302 5 674 2 158 1717 4 260 0 4 0 96 7 0 0 0 239 9 515 3 113 1553 5 252 0 4 0 96 March 4, 2026 at 01:30:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2222 0 7 2607 103 1116 9 148 84 43 3462 6 3 0 91 1 755 0 6 436 6 915 6 116 256 30 3187 4 2 0 94 2 6699 0 100 436 101 473 8 56 168 35 4355 8 4 0 88 3 2250 0 13 434 45 744 7 110 117 45 3446 7 2 0 91 4 538 0 19 258 4 469 8 65 113 36 4145 5 2 0 93 5 536 0 9 666 131 943 5 93 202 22 3646 3 2 0 95 6 315 0 17 412 29 824 2 90 124 18 4505 4 2 0 94 7 6638 0 5 447 2 966 5 92 139 19 3269 5 3 0 92 March 4, 2026 at 01:31:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 40 0 14 2181 103 226 2 25 9 0 567 0 1 0 98 1 52 0 10 31 1 28 1 4 220 1 388 1 1 0 98 2 21 0 46 235 101 32 2 4 10 3 694 1 1 0 98 3 19 0 0 111 3 190 2 28 21 0 632 0 0 0 99 4 63 0 14 63 4 105 1 16 10 0 705 1 0 0 99 5 134 0 2 343 155 176 4 6 156 2 1911 2 1 0 97 6 125 0 7 58 3 93 0 14 8 2 843 1 0 0 99 7 93 0 7 66 0 108 3 17 12 1 938 1 0 0 99 March 4, 2026 at 01:31:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 19 0 3 0 0 294 0 1 0 99 1 0 0 0 108 1 102 0 3 0 0 0 0 0 0 100 2 0 0 4 212 102 2 0 1 0 0 0 0 0 0 100 3 0 0 0 21 3 16 0 1 0 0 301 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 266 0 0 0 100 5 0 0 2 323 158 144 1 0 0 0 1130 0 0 0 99 6 0 0 7 13 4 10 1 0 0 0 265 0 0 0 100 7 0 0 0 11 1 6 0 2 0 0 300 0 0 0 100 March 4, 2026 at 01:31:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2108 101 76 2 1 0 0 295 0 1 0 99 1 0 0 0 64 1 40 0 0 0 0 0 0 0 0 100 2 0 0 4 225 102 3 0 1 0 0 0 0 0 0 100 3 0 0 0 45 5 26 0 1 0 0 312 0 0 0 100 4 0 0 14 27 3 8 1 0 0 0 274 0 0 0 100 5 0 0 2 348 165 146 2 0 0 0 1132 0 0 0 99 6 0 0 7 27 3 8 0 0 0 0 260 0 0 0 100 7 0 0 0 28 1 11 0 1 0 0 309 0 0 0 100 March 4, 2026 at 01:31:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2301 103 477 4 97 1602 0 300 0 4 0 95 1 0 0 0 214 1 446 1 113 1922 1 0 0 4 0 96 2 0 0 4 383 102 420 0 103 1668 0 0 0 4 0 96 3 0 0 0 431 210 507 1 123 1800 0 301 0 3 0 97 4 0 0 14 189 3 432 1 115 1807 0 266 0 4 0 96 5 0 0 2 608 163 787 3 120 1670 0 1131 0 3 0 97 6 0 0 7 268 4 566 2 114 1643 0 262 0 4 0 96 7 0 0 0 204 2 437 2 85 1625 0 301 0 4 0 96 March 4, 2026 at 01:31:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2415 102 663 8 39 15 0 1636 2 2 0 96 1 27 0 0 325 5 610 16 37 25 0 1810 4 1 0 95 2 56 0 130 305 103 177 4 9 376 0 1952 3 2 0 95 3 40 0 5 386 74 574 21 36 19 0 1630 3 1 0 96 4 20 0 14 306 5 537 3 36 20 0 1334 1 1 0 98 5 8 0 2 592 105 745 9 22 14 0 2363 2 1 0 97 6 64 0 7 77 3 90 5 7 478 0 2891 4 2 0 94 7 119 0 0 142 2 225 4 11 21 0 1844 3 1 0 96 March 4, 2026 at 01:31:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 62 0 2 0 0 294 0 1 0 99 1 0 0 0 63 7 56 0 2 0 0 9 0 0 0 100 2 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 116 51 112 0 0 0 0 300 0 0 0 100 4 0 0 14 13 5 8 0 0 0 0 267 0 0 0 100 5 0 0 2 215 105 34 1 0 0 0 1125 0 0 0 100 6 0 0 7 13 4 10 1 0 0 0 262 0 0 0 100 7 0 0 0 11 2 4 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:31:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 108 1 1 0 0 295 0 1 0 99 1 0 0 0 22 8 14 0 0 1 0 9 0 0 0 100 2 0 0 3 208 101 2 0 0 1 0 0 0 0 0 100 3 0 0 0 121 52 114 0 0 1 0 300 0 0 0 100 4 0 0 15 20 8 18 0 1 1 0 269 0 0 0 100 5 0 0 3 213 103 34 1 0 1 0 1125 0 0 0 100 6 0 0 7 12 4 6 0 0 1 0 260 0 0 0 100 7 0 0 0 11 3 4 0 0 1 0 301 0 0 0 100 March 4, 2026 at 01:31:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 76 0 2 0 0 300 0 1 0 99 1 0 0 0 59 7 54 0 3 0 0 17 0 0 0 100 2 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 122 51 124 0 0 0 0 312 0 0 0 100 4 0 0 14 16 6 12 0 0 0 0 288 0 0 0 100 5 0 0 2 225 110 42 0 1 2 0 1125 0 0 0 100 6 0 0 7 13 4 10 0 0 0 0 262 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:31:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2286 107 426 2 91 1342 0 308 0 3 0 96 1 0 0 0 236 4 474 0 107 1483 0 8 0 2 0 98 2 0 0 4 406 101 437 1 81 1334 0 0 0 3 0 97 3 0 0 0 429 210 475 1 106 1444 0 300 0 3 0 97 4 0 0 14 183 11 389 1 88 1401 0 278 0 3 0 97 5 0 0 2 456 103 574 2 86 1283 0 1127 0 3 0 97 6 0 0 7 180 10 384 1 93 1124 0 340 0 3 0 97 7 0 0 0 185 1 392 1 79 1138 0 300 0 3 0 97 March 4, 2026 at 01:31:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 107 20 0 2 0 0 303 0 1 0 99 1 0 0 0 110 2 106 0 2 0 0 1 0 0 0 100 2 0 0 4 210 102 4 0 0 0 0 1 0 0 0 100 3 0 0 0 18 2 14 0 0 0 0 300 0 0 0 100 4 0 0 14 10 4 6 0 0 0 0 267 0 0 0 100 5 0 0 2 217 103 36 1 1 0 0 1126 0 0 0 100 6 0 0 8 115 54 112 12 1 0 0 261 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:31:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 108 16 1 1 0 0 303 0 1 0 99 1 0 0 0 109 0 104 0 2 0 0 0 0 0 0 100 2 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 18 2 14 0 0 0 0 300 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 266 0 0 0 100 5 0 0 2 217 105 38 1 0 0 0 1129 0 0 0 100 6 0 0 7 115 53 112 0 1 0 0 260 0 0 0 100 7 0 0 1 10 1 8 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:31:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 74 0 2 0 0 326 0 1 0 99 1 0 0 0 54 1 46 0 0 0 0 0 0 0 0 100 2 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 0 22 4 18 0 0 0 0 301 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 266 0 0 0 100 5 0 0 2 217 105 38 1 0 0 0 1127 0 0 0 100 6 0 0 7 113 54 110 0 0 0 0 262 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:31:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 104 104 1 3 0 0 315 0 1 0 99 1 1 0 0 42 5 40 0 3 0 0 15 0 0 0 100 2 0 0 4 218 105 14 0 2 0 0 7 0 0 0 100 3 0 0 0 23 3 20 1 0 0 0 303 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 266 0 0 0 100 5 0 0 2 224 110 38 3 0 1 0 1135 0 0 0 100 6 0 0 7 114 53 114 0 0 0 0 341 0 0 0 100 7 0 0 0 14 1 10 1 1 1 0 300 0 0 0 100 March 4, 2026 at 01:31:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 36 0 4 0 0 294 0 1 0 99 1 0 0 0 83 2 76 0 3 1 0 0 0 0 0 100 2 0 0 3 226 107 26 0 1 1 0 9 0 0 0 100 3 0 0 0 19 2 16 0 0 0 0 300 0 0 0 100 4 0 0 14 9 3 6 0 0 2 0 266 0 0 0 100 5 0 0 3 212 103 34 0 0 0 0 1125 0 0 0 100 6 0 0 7 116 54 114 1 1 0 0 262 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:31:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1689 0 112 2130 103 164 3 8 7 13 6915 2 2 0 96 1 110 0 0 59 0 85 0 15 8 20 174 0 0 0 100 2 57 0 7 261 107 67 0 12 7 6 162 0 0 0 100 3 13 0 0 57 3 62 0 11 6 4 468 0 1 0 99 4 13 0 14 32 3 23 0 6 3 2 302 0 0 0 100 5 26 0 2 242 105 63 1 3 3 5 1247 0 0 0 99 6 1855 0 7 46 7 47 2 9 4 5 621 0 1 0 99 7 11 0 0 128 48 122 0 5 8 2 340 0 0 0 100 March 4, 2026 at 01:31:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 48 0 3 0 0 295 0 1 0 99 1 0 0 0 69 1 62 0 4 0 0 1 0 0 0 100 2 0 0 4 222 107 16 0 0 0 0 9 0 0 0 100 3 0 0 0 21 2 24 0 1 0 0 300 0 1 0 99 4 0 0 14 8 3 4 0 0 0 0 266 0 0 0 100 5 0 0 2 215 104 36 1 0 0 0 1205 0 0 0 100 6 0 0 7 15 4 12 0 0 0 0 262 0 0 0 100 7 0 0 0 109 52 104 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:31:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 582 0 0 5782 109 7694 75 278 108 0 21397 18 12 0 70 1 368 0 0 4159 13 8594 77 294 83 0 20347 17 11 0 72 2 67 0 7 3658 112 7048 46 194 88 0 17742 16 10 0 74 3 104 0 0 3530 18 7257 60 233 71 0 17249 17 9 0 74 4 317 0 0 2876 20 6276 30 191 80 0 20968 13 8 0 78 5 106 0 21 2131 112 4166 23 119 56 0 9496 8 6 0 86 6 18 0 0 2942 13 6039 35 154 49 0 12815 11 7 0 82 7 83 0 7 2134 19 4532 24 102 43 0 11445 9 7 0 84 March 4, 2026 at 01:31:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 0 6970 108 10678 53 305 136 0 25121 22 15 0 63 1 22 0 0 4523 12 9472 53 323 105 0 23117 20 13 0 67 2 17 0 3 3601 112 6861 51 206 83 0 18378 16 10 0 74 3 10 0 0 4843 13 10130 50 260 68 0 18003 15 11 0 74 4 5 0 0 2633 16 5338 27 211 111 0 13862 12 7 0 81 5 15 0 3 2511 119 4991 14 124 107 0 14335 13 8 0 79 6 15 0 14 3293 15 6914 33 209 69 0 15372 14 9 0 77 7 12 0 7 2137 13 4478 23 105 70 0 11348 10 6 0 84 March 4, 2026 at 01:31:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 6632 108 9570 99 450 849 0 25724 23 17 0 60 1 29 0 7 5132 16 10581 84 513 832 0 22174 19 14 0 67 2 10 0 3 3874 108 7494 78 357 630 0 16135 14 10 0 76 3 11 0 0 4116 133 8459 83 402 876 0 18051 16 11 0 73 4 14 0 0 2722 15 5843 43 339 924 0 15456 15 10 0 75 5 3 0 3 2308 117 4533 70 259 943 0 9671 9 7 0 84 6 11 0 0 3491 11 7456 44 327 712 0 17036 15 11 0 74 7 22 0 14 2399 17 5283 41 230 811 0 13322 12 9 0 80 March 4, 2026 at 01:31:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 3301 103 2617 8 73 32 0 6332 6 4 0 90 1 3 0 7 1200 6 2461 13 87 24 0 5481 5 3 0 92 2 7 0 3 1132 107 2010 6 50 18 0 6796 5 3 0 91 3 2 0 2 1011 3 1996 5 66 18 0 3125 2 2 0 96 4 1 0 0 622 50 1191 7 46 18 0 3593 3 2 0 95 5 2 0 3 830 106 1283 3 36 16 0 3343 3 2 0 95 6 3 0 0 934 4 1935 5 45 30 0 3546 3 2 0 95 7 18 0 14 716 7 1578 9 36 19 0 4970 4 3 0 93 March 4, 2026 at 01:31:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 102 0 0 0 0 0 0 1 0 99 1 0 0 7 13 3 8 0 1 0 0 260 0 0 0 100 2 0 0 4 212 102 34 1 0 1 0 1214 0 0 0 100 3 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 4 0 0 0 128 61 122 1 0 0 0 600 0 0 0 100 5 0 0 2 211 102 2 1 0 0 0 300 0 0 0 100 6 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 7 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:31:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 106 0 0 0 0 3 0 1 0 99 1 0 0 7 16 4 14 1 0 0 0 267 0 0 0 100 2 0 0 3 212 102 36 1 0 0 0 1215 0 0 0 100 3 0 0 0 17 0 12 0 0 0 0 3 0 0 0 100 4 0 0 1 137 63 134 2 1 0 0 612 0 0 0 100 5 0 0 3 210 102 2 0 0 0 0 300 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 1 0 0 0 100 7 0 0 14 13 4 10 0 0 0 0 273 0 0 0 100 March 4, 2026 at 01:31:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 49 0 0 2498 105 897 79 177 54 1 3805 5 3 0 92 1 2 0 7 493 6 987 82 203 35 0 3480 4 2 0 94 2 25 0 144 351 103 328 37 67 208 1 4047 5 2 0 92 3 18 0 0 224 2 438 37 94 259 2 3482 6 2 0 93 4 8 0 9 425 16 892 51 154 55 2 4123 5 2 0 93 5 36 0 2 612 108 835 66 174 43 2 3817 6 2 0 93 6 0 0 0 361 40 632 32 89 167 0 2870 4 2 0 94 7 4 0 35 80 2 105 16 23 206 0 3004 6 2 0 92 March 4, 2026 at 01:31:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2333 107 599 1 116 2046 0 9 0 5 0 95 1 0 0 7 283 3 634 3 124 2027 0 260 0 3 0 97 2 0 0 3 486 103 635 4 101 1941 0 1131 0 4 0 96 3 0 0 0 414 211 449 1 111 1745 0 0 0 4 0 96 4 0 0 0 206 5 458 3 130 2103 0 595 0 4 0 96 5 0 0 3 421 103 470 2 126 1936 0 300 0 3 0 97 6 0 0 0 305 51 555 1 130 2022 0 0 0 4 0 96 7 0 0 14 204 3 419 2 99 1920 0 268 0 4 0 96 March 4, 2026 at 01:31:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 109 128 0 3 2 0 7 0 1 0 99 1 0 0 7 38 3 29 0 7 10 0 260 0 0 0 100 2 0 0 4 265 105 104 1 4 14 0 1136 0 0 0 99 3 0 0 0 70 23 44 0 4 14 0 0 0 0 0 100 4 0 0 0 49 5 43 1 3 16 0 594 0 0 0 100 5 0 0 2 242 103 31 1 5 3 0 301 0 0 0 100 6 0 0 0 133 52 116 0 4 3 0 0 0 0 0 100 7 0 0 126 20 2 29 1 3 4 0 266 0 0 0 100 March 4, 2026 at 01:31:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 107 110 0 3 0 0 9 0 1 0 99 1 0 0 7 15 3 10 0 1 0 0 260 0 0 0 100 2 0 0 4 212 102 34 1 0 0 0 1129 0 0 0 100 3 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 4 0 0 0 15 4 9 1 0 0 0 591 0 0 0 100 5 0 0 2 224 102 14 0 2 0 0 300 0 0 0 100 6 0 0 0 110 51 106 0 1 0 0 0 0 0 0 100 7 0 0 21 16 4 12 0 1 0 0 269 0 0 0 100 March 4, 2026 at 01:31:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2323 106 424 7 20 31 0 1986 3 2 0 95 1 0 0 7 365 4 676 14 29 33 0 2193 4 1 0 94 2 0 0 144 392 106 381 7 15 38 0 3857 4 2 0 94 3 0 0 0 315 7 504 5 21 30 0 2770 4 1 0 95 4 3 0 0 220 6 346 3 15 34 0 2126 3 1 0 96 5 0 0 2 504 104 555 3 10 12 0 1482 2 1 0 98 6 15 0 0 313 17 558 5 20 12 0 1138 2 1 0 97 7 0 0 14 290 40 483 5 18 30 0 2231 3 1 0 96 March 4, 2026 at 01:31:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 82 0 2 2 0 0 0 1 0 99 1 0 0 7 18 4 20 0 2 1 0 278 0 0 0 100 2 0 0 3 215 103 40 1 1 0 0 1138 0 0 0 100 3 0 0 0 22 7 16 1 0 0 0 303 0 0 0 100 4 0 0 0 54 6 50 1 1 0 0 334 0 0 0 100 5 1 0 3 217 107 6 0 0 0 0 307 0 0 0 100 6 0 0 0 14 2 10 0 0 0 0 6 0 0 0 100 7 0 0 14 114 53 110 1 0 0 0 268 0 0 0 100 March 4, 2026 at 01:31:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2325 100 569 1 97 1196 0 0 0 3 0 97 1 0 0 7 239 4 528 0 99 1369 0 260 0 3 0 97 2 0 0 3 377 103 418 1 93 1171 0 1130 0 3 0 97 3 0 0 0 387 194 497 0 96 1324 0 301 0 3 0 97 4 0 0 0 194 3 433 1 98 1264 0 300 0 3 0 97 5 0 0 3 362 102 338 3 86 1199 0 300 0 3 0 97 6 0 0 0 173 4 403 1 105 1324 0 6 0 2 0 98 7 0 0 14 294 45 530 0 74 1063 0 266 0 3 0 97 March 4, 2026 at 01:31:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 106 0 0 0 0 1 0 1 0 99 1 0 0 7 22 5 18 0 1 0 0 262 0 0 0 100 2 0 0 4 211 103 34 1 0 0 0 1131 0 0 0 100 3 0 0 0 119 57 114 0 0 0 0 303 0 0 0 100 4 0 0 0 15 3 10 0 1 0 0 300 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 14 11 4 8 0 0 0 0 269 0 0 0 100 March 4, 2026 at 01:31:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 390 0 14 5436 107 7558 60 252 115 17 24095 18 11 0 71 1 1244 0 10 3458 15 7099 55 266 75 15 22531 15 9 0 76 2 103 0 4 2772 116 5171 31 173 68 9 14956 13 8 0 79 3 105 0 0 2908 25 6109 60 204 81 3 16518 16 8 0 76 4 28 0 0 1947 14 3986 34 202 94 1 9290 8 5 0 87 5 43 0 2 1727 107 3231 16 104 64 4 9881 7 5 0 88 6 70 0 0 2208 7 4644 33 157 86 0 10011 8 6 0 86 7 2746 0 113 1440 7 2962 21 94 56 15 7277 6 5 0 89 March 4, 2026 at 01:31:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 6683 107 9865 50 326 134 0 25360 25 15 0 60 1 11 0 14 4403 10 9191 62 370 91 0 22712 19 12 0 69 2 16 0 4 3906 111 7659 41 222 124 0 18706 17 10 0 73 3 5 0 0 4628 18 9694 43 279 93 0 19770 16 11 0 73 4 5 0 7 2577 27 5205 33 217 107 0 14125 12 8 0 80 5 6 0 2 2518 114 4898 26 109 92 0 11980 11 7 0 82 6 16 0 0 3114 9 6432 38 253 132 0 15214 12 8 0 80 7 6 0 0 2654 8 5670 18 115 85 0 13976 12 8 0 81 March 4, 2026 at 01:31:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 6210 107 8747 52 365 148 0 23810 22 14 0 65 1 13 0 0 5048 11 10601 65 382 110 0 23792 21 14 0 65 2 7 0 18 4304 112 8574 39 250 141 0 20172 18 11 0 71 3 9 0 0 4127 12 8622 47 306 61 0 20331 17 11 0 72 4 4 0 7 2648 28 5517 36 253 123 0 14649 12 8 0 80 5 5 0 2 2617 126 4931 22 147 81 0 11839 11 7 0 82 6 7 0 0 3049 10 6536 50 227 128 0 17056 14 9 0 77 7 0 0 0 2456 8 5155 27 138 38 0 9473 8 6 0 86 March 4, 2026 at 01:31:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 3886 108 3810 23 197 993 0 7671 8 8 0 84 1 1 0 0 1957 6 4217 18 241 993 0 9621 7 7 0 85 2 3 0 18 1773 114 3237 10 151 894 0 8177 7 7 0 87 3 1 0 0 1868 152 3945 12 186 975 0 7779 6 6 0 88 4 1 0 7 1219 8 2517 9 178 974 0 6592 5 6 0 90 5 4 0 2 1137 107 1978 10 126 840 0 4527 4 5 0 91 6 3 0 0 1152 9 2414 13 155 954 0 4721 4 5 0 91 7 5 0 0 1148 25 2396 10 130 899 0 4714 4 4 0 92 March 4, 2026 at 01:31:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 116 1 1 0 0 10 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 18 306 152 102 0 0 0 0 266 0 0 0 100 3 0 0 4 15 2 16 0 2 0 0 849 0 0 0 100 4 0 0 4 20 5 40 2 0 0 0 1224 0 1 0 99 5 0 0 2 214 104 6 0 0 0 0 1 0 0 0 100 6 0 0 0 13 2 10 0 2 0 0 300 0 0 0 100 7 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 14 2350 134 568 48 110 183 0 3545 5 3 0 92 1 0 0 0 257 2 489 54 112 183 0 3095 7 2 0 91 2 45 0 158 469 123 497 43 88 80 0 3768 6 2 0 92 3 0 0 17 344 4 659 60 133 57 1 4096 5 3 0 93 4 11 0 0 224 4 461 38 90 208 0 4177 5 2 0 93 5 5 0 9 567 106 708 55 138 138 4 3433 5 2 0 94 6 3 0 0 378 3 749 63 137 64 2 3473 4 1 0 94 7 1 0 0 472 3 1004 74 195 15 0 2929 4 1 0 95 March 4, 2026 at 01:31:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 151 183 0 3 0 0 0 0 1 0 99 1 0 0 0 35 1 24 0 3 1 0 0 0 0 0 100 2 0 0 17 221 109 16 0 0 1 0 273 0 0 0 100 3 0 0 7 19 5 12 1 1 1 0 854 0 1 0 99 4 0 0 0 23 6 48 1 1 1 0 1135 0 0 0 100 5 0 0 3 218 104 8 0 1 1 0 1 0 0 0 100 6 0 0 0 15 3 6 1 0 1 0 301 0 0 0 100 7 0 0 7 20 2 14 0 1 1 0 1 0 0 0 100 March 4, 2026 at 01:31:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2164 152 207 0 3 0 0 7 0 1 0 99 1 0 0 0 36 0 12 0 2 0 0 0 0 0 0 100 2 0 0 17 234 108 14 0 0 0 0 275 0 0 0 100 3 0 0 7 30 4 12 0 0 0 0 855 0 1 0 99 4 0 0 0 29 3 34 1 0 1 0 1132 0 0 0 100 5 0 0 3 245 113 18 0 0 1 0 18 0 0 0 100 6 0 0 0 35 2 22 0 1 0 0 307 0 0 0 100 7 0 0 0 37 0 18 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2336 128 524 0 116 1674 0 0 0 5 0 95 1 0 0 0 367 0 781 1 139 2011 0 0 0 3 0 97 2 0 0 18 406 105 449 3 98 1774 0 271 0 4 0 96 3 0 0 7 490 237 635 4 131 1712 0 855 0 4 0 96 4 0 0 0 272 3 612 3 124 1692 0 1134 0 4 0 96 5 0 0 2 384 103 427 3 111 1544 0 0 0 4 0 96 6 0 0 0 226 4 491 1 130 1549 1 301 0 4 0 96 7 0 0 0 201 4 464 1 113 1762 0 5 0 4 0 96 March 4, 2026 at 01:31:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2446 105 759 11 36 16 0 1304 5 2 0 94 1 0 0 0 281 3 531 5 27 15 0 1439 2 1 0 97 2 0 0 144 426 102 445 8 21 20 0 2226 3 1 0 96 3 0 0 7 179 31 233 9 17 34 0 3881 5 2 0 93 4 0 0 0 352 4 696 10 30 33 0 3636 3 2 0 95 5 1 0 2 413 133 295 8 13 26 0 2310 4 1 0 95 6 0 0 0 300 4 545 1 22 32 0 2116 2 1 0 97 7 9 0 0 270 5 496 2 20 19 0 793 2 1 0 98 March 4, 2026 at 01:31:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 108 116 0 0 0 0 10 0 1 0 99 1 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 2 0 0 18 206 102 2 0 0 0 0 266 0 0 0 100 3 0 0 7 14 4 10 1 0 0 0 854 0 0 0 100 4 0 0 0 11 3 34 1 0 1 0 1133 0 0 0 100 5 0 0 2 312 153 104 0 0 0 0 0 0 0 0 100 6 0 0 0 17 2 12 1 2 0 0 300 0 0 0 100 7 0 0 0 20 0 20 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:31:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 107 114 0 0 0 0 10 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 18 206 102 2 0 0 0 0 266 0 0 0 100 3 0 0 7 13 4 10 0 0 0 0 854 0 0 0 100 4 0 0 0 11 3 34 1 0 1 0 1132 0 0 0 100 5 0 0 2 314 154 106 0 0 0 0 1 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 7 0 0 0 19 2 14 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:31:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 107 130 0 1 0 0 14 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 17 206 102 2 0 0 0 0 266 0 0 0 100 3 0 0 7 15 4 12 1 0 0 0 854 0 0 0 100 4 0 0 0 11 3 34 1 0 0 0 1134 0 0 0 100 5 0 0 3 324 160 114 0 0 0 0 13 0 0 0 100 6 0 0 0 14 2 12 0 0 0 0 305 0 0 0 100 7 0 0 0 20 0 16 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2295 106 483 0 81 1063 0 11 0 4 0 96 1 0 0 0 216 0 486 0 109 1379 0 75 0 3 0 97 2 0 0 18 468 121 529 1 95 1041 0 276 0 3 0 97 3 0 0 7 394 208 404 1 104 1301 0 854 0 3 0 97 4 0 0 0 193 4 458 0 106 1212 0 1132 0 3 0 97 5 0 0 2 415 129 408 0 85 1182 0 0 0 2 0 98 6 0 0 0 246 2 537 0 99 1049 0 300 0 3 0 97 7 0 0 0 245 3 515 0 78 1247 0 14 0 3 0 97 March 4, 2026 at 01:31:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 106 0 1 0 0 3 0 1 0 99 1 0 0 0 6 0 2 0 1 0 0 1 0 0 0 100 2 0 0 17 217 107 12 1 0 0 0 274 0 0 0 100 3 0 0 7 114 54 110 1 0 0 0 854 0 0 0 100 4 0 0 0 11 3 34 1 0 0 0 1133 0 0 0 100 5 0 0 3 216 105 8 0 0 0 0 2 0 0 0 100 6 0 0 0 14 2 8 1 0 0 0 300 0 0 0 100 7 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:31:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2141 104 130 0 5 6 4 105 0 1 0 99 1 2732 0 113 35 1 60 2 3 7 16 366 1 1 0 98 2 96 0 17 276 108 98 0 15 14 13 479 0 0 0 99 3 53 0 7 151 54 179 2 14 14 8 966 0 0 0 100 4 17 0 2 47 3 75 1 8 7 5 1316 0 0 0 100 5 751 0 3 241 103 41 2 5 4 6 6516 2 1 0 97 6 8 0 0 38 2 30 0 6 7 1 383 0 0 0 100 7 25 0 0 41 2 28 0 3 3 3 88 0 0 0 100 March 4, 2026 at 01:31:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 100 0 3 0 0 0 0 1 0 99 1 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 2 0 0 21 219 108 14 0 0 1 0 275 0 0 0 100 3 0 0 7 119 55 112 1 1 2 0 854 0 0 0 100 4 0 0 0 21 6 46 1 1 2 0 1215 0 0 0 100 5 0 0 7 221 104 12 0 2 1 0 2 0 0 0 100 6 0 0 0 18 5 10 0 0 1 0 304 0 0 0 100 7 0 0 0 21 2 14 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:31:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 52 0 7 4443 105 5301 47 186 51 0 17209 12 7 0 81 1 86 0 0 2338 8 4914 59 233 93 0 13950 14 7 0 79 2 19 0 4 2260 113 4054 46 159 60 0 9384 8 5 0 87 3 53 0 15 2239 44 4668 45 159 32 0 11831 9 6 0 85 4 46 0 0 1469 9 3104 26 131 55 0 8670 7 5 0 88 5 452 0 2 902 113 1315 9 64 49 0 3851 4 2 0 94 6 182 0 0 1339 4 3010 26 109 40 0 9652 7 4 0 88 7 3 0 2 804 2 1607 13 59 34 0 5050 4 2 0 94 March 4, 2026 at 01:31:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 6544 107 9774 77 400 487 0 27086 26 16 0 57 1 6 0 14 5208 14 11053 101 490 478 0 25631 20 14 0 65 2 16 0 3 4373 106 8516 68 352 420 0 19571 18 12 0 70 3 9 0 0 4626 114 9503 75 413 548 0 20136 16 12 0 72 4 3 0 0 2462 25 5153 45 310 528 0 12043 11 8 0 81 5 55 0 10 2121 119 3979 46 215 465 0 9017 8 6 0 86 6 15 0 0 2903 9 6469 92 315 560 0 17453 15 10 0 76 7 0 0 0 2252 8 4791 33 171 524 0 11325 9 7 0 84 March 4, 2026 at 01:31:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6793 111 9810 60 353 115 0 23023 20 13 0 66 1 9 0 0 4614 12 9740 56 357 90 0 23933 20 13 0 66 2 8 0 19 3862 114 7634 54 228 130 0 22016 20 12 0 68 3 9 0 84 4484 17 9382 40 282 86 0 21395 17 11 0 72 4 0 0 0 3002 15 6247 30 236 103 0 15989 14 9 0 78 5 4 0 8 2461 112 4854 17 153 76 0 10878 10 6 0 84 6 7 0 0 2838 16 6049 30 250 105 0 14760 13 8 0 79 7 5 0 0 2556 9 5324 14 141 78 0 12334 10 7 0 84 March 4, 2026 at 01:31:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 4539 104 5175 24 178 72 0 13809 12 8 0 80 1 5 0 0 2287 15 4877 25 199 57 0 13159 11 7 0 82 2 5 0 17 2109 106 4016 20 122 85 0 10580 9 6 0 85 3 2 0 0 1950 5 3930 14 137 34 0 8323 7 4 0 88 4 6 0 0 1528 8 3131 23 131 42 0 6282 6 4 0 90 5 1 0 10 1329 108 2402 14 75 56 0 6656 6 4 0 91 6 2 0 0 1797 29 3864 13 113 68 0 9903 7 5 0 88 7 3 0 0 1373 12 2825 12 68 24 0 6510 6 4 0 91 March 4, 2026 at 01:31:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2335 103 448 51 96 189 2 3729 6 3 0 91 1 42 0 7 311 3 604 66 135 73 2 3429 5 2 0 93 2 57 0 144 564 102 731 89 169 62 0 3347 5 2 0 94 3 0 0 0 573 22 1043 94 195 23 0 3493 4 2 0 94 4 0 0 9 221 3 454 37 74 222 1 4161 5 3 0 92 5 1 0 2 454 105 461 41 84 73 0 3754 8 2 0 90 6 0 0 7 445 30 834 75 155 36 0 3439 4 2 0 94 7 0 0 0 309 9 577 41 107 47 0 3178 5 2 0 93 March 4, 2026 at 01:31:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 105 139 2 1 0 0 330 0 1 0 99 1 0 0 0 14 1 6 0 2 0 0 0 0 0 0 100 2 0 0 25 211 102 10 1 1 1 0 269 0 0 0 100 3 0 0 0 110 51 106 0 0 0 0 3 0 0 0 100 4 0 0 0 16 4 38 1 1 1 0 1135 0 0 0 100 5 0 0 2 233 108 26 0 1 0 0 303 0 0 0 100 6 0 0 7 14 3 12 1 1 0 0 567 0 0 0 100 7 0 0 0 24 7 18 0 1 1 0 20 0 0 0 100 March 4, 2026 at 01:31:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2370 109 636 3 107 1895 0 309 0 5 0 95 1 0 0 0 237 1 468 2 112 2116 0 0 0 4 0 96 2 0 0 18 413 102 435 2 105 1900 0 266 0 4 0 96 3 0 0 0 537 253 715 3 138 1629 0 0 0 4 0 96 4 0 0 0 227 6 504 3 125 1851 0 1132 0 5 0 95 5 0 0 2 426 105 466 3 112 1821 0 297 0 4 0 96 6 0 0 7 224 3 479 2 118 2117 0 562 0 5 0 95 7 0 0 0 316 2 644 1 106 1886 0 0 0 4 0 96 March 4, 2026 at 01:31:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2134 106 137 0 8 14 0 309 0 1 0 99 1 0 0 0 24 1 28 0 7 17 0 0 0 0 0 100 2 0 0 18 222 102 33 0 6 11 0 266 0 0 0 100 3 0 0 0 160 71 147 0 10 16 0 0 0 0 0 100 4 0 0 0 27 3 63 1 6 19 0 1130 0 0 0 100 5 0 0 2 230 103 33 2 4 16 0 297 0 0 0 100 6 0 0 7 27 3 38 1 7 15 0 557 0 0 0 100 7 0 0 0 37 2 56 0 2 11 0 0 0 0 0 100 March 4, 2026 at 01:31:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2457 109 743 2 17 10 0 1503 3 2 0 95 1 0 0 0 319 3 575 7 22 46 0 1741 2 1 0 97 2 0 0 130 535 103 714 10 20 27 0 1982 2 1 0 96 3 0 0 0 239 33 361 8 13 40 0 2532 4 1 0 95 4 0 0 0 42 3 49 5 5 29 0 4095 5 2 0 93 5 1 0 16 448 108 437 3 18 21 0 3240 4 1 0 95 6 2 0 7 325 5 580 9 24 18 0 1856 5 1 0 94 7 0 0 0 229 18 393 3 16 11 0 965 1 0 0 98 March 4, 2026 at 01:31:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 105 86 1 1 1 0 325 0 1 0 99 1 0 0 0 44 2 34 0 0 1 0 0 0 0 0 100 2 0 0 7 210 101 2 0 0 1 0 0 0 0 0 100 3 0 0 0 12 2 2 0 0 1 0 0 0 0 0 100 4 0 0 0 22 7 40 1 0 1 0 1133 0 0 0 100 5 0 0 21 216 104 8 1 0 1 0 859 0 0 0 100 6 0 0 7 25 8 16 1 1 1 0 269 0 0 0 100 7 0 0 0 114 53 108 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:31:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 104 136 1 1 1 0 314 0 1 0 99 1 0 0 0 9 1 6 0 0 0 0 18 0 0 0 100 2 0 0 3 211 102 8 0 0 0 0 9 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 4 0 0 0 15 5 38 1 0 0 0 1135 0 0 0 100 5 0 0 17 225 110 12 1 0 0 0 865 0 0 0 100 6 0 0 7 24 8 22 1 0 0 0 274 0 0 0 100 7 0 0 0 114 51 110 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:31:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2327 102 584 1 102 1132 0 300 0 3 0 97 1 0 0 0 304 2 644 3 111 1150 0 0 0 3 0 97 2 0 0 4 385 101 400 1 81 1178 0 0 0 3 0 97 3 0 0 0 344 171 405 1 99 1247 0 0 0 3 0 97 4 0 0 0 184 3 459 0 107 1368 0 1130 0 3 0 97 5 0 0 16 364 105 346 1 88 1122 0 860 0 3 0 97 6 0 0 7 197 10 418 1 95 1212 0 269 0 3 0 97 7 0 0 0 271 52 468 1 84 1049 0 1 0 3 0 97 March 4, 2026 at 01:31:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 177 0 0 3488 106 3085 32 105 49 5 9092 8 5 0 88 1 994 0 114 1109 4 2305 22 109 62 8 7944 9 4 0 87 2 133 0 4 1200 105 1913 20 91 43 12 4333 3 2 0 94 3 469 0 2 1539 6 3479 23 107 24 5 10595 5 3 0 92 4 113 0 0 798 8 1634 11 80 39 3 6184 4 3 0 94 5 1838 0 16 742 109 1002 10 53 10 8 4097 3 2 0 95 6 810 0 7 1018 10 2191 18 78 45 9 12543 7 4 0 90 7 21 0 0 791 41 1576 8 57 36 6 4548 4 3 0 93 March 4, 2026 at 01:32:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 6476 110 9324 63 340 205 0 25259 23 14 0 63 1 11 0 0 5101 12 10975 56 376 102 0 26142 23 14 0 63 2 6 0 4 3920 112 7623 42 240 90 0 18036 17 10 0 73 3 10 0 3 4394 10 9038 70 311 128 0 19487 16 11 0 74 4 3 0 0 2634 15 5380 44 251 141 0 15084 11 8 0 81 5 1 0 16 2195 121 4017 19 119 58 0 9561 8 5 0 87 6 4 0 7 3467 13 7391 49 231 108 0 16740 14 9 0 77 7 13 0 3 2387 9 5086 19 116 112 0 13411 12 7 0 80 March 4, 2026 at 01:32:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 6712 106 9909 83 376 121 0 24756 22 15 0 63 1 5 0 0 5168 15 10936 88 418 99 0 23927 20 13 0 67 2 10 0 4 3899 122 7860 53 247 123 0 20319 19 11 0 70 3 5 0 0 3926 15 7973 51 299 79 0 20673 16 10 0 74 4 6 0 0 2569 20 5333 26 215 106 0 16387 14 9 0 77 5 4 0 16 1999 111 3760 18 125 69 0 11903 10 6 0 84 6 3 0 0 3276 10 7060 39 223 97 0 14782 13 8 0 79 7 9 0 7 2756 11 5751 25 128 61 0 10818 9 6 0 85 March 4, 2026 at 01:32:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 5491 114 7279 117 438 2368 1 20390 22 16 0 62 1 15 0 0 4163 9 8873 146 544 2182 0 20830 19 16 0 65 2 11 0 172 3197 113 6111 114 416 1765 1 14518 16 12 0 72 3 5 0 7 3297 193 6457 122 496 2237 1 16832 15 13 0 72 4 42 0 11 2613 18 5497 125 432 2185 0 15831 17 13 0 69 5 5 0 30 2324 120 4362 84 338 1845 1 12312 11 10 0 79 6 6 0 0 2965 7 6391 103 439 2149 0 14872 15 12 0 72 7 44 0 7 2321 16 4894 102 345 1924 0 12935 14 11 0 75 March 4, 2026 at 01:32:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 101 211 0 19 113 0 2 0 1 0 99 1 0 0 0 71 1 118 0 17 88 0 0 0 0 0 100 2 0 0 3 263 102 105 0 18 112 0 0 0 0 0 100 3 0 0 0 122 62 95 0 20 100 0 300 0 0 0 100 4 0 0 7 57 5 95 0 19 105 0 0 0 0 0 100 5 3 0 17 346 152 199 1 13 106 0 1995 0 1 0 99 6 0 0 0 66 6 111 0 13 85 0 9 0 0 0 100 7 0 0 7 125 4 229 1 13 100 0 260 0 0 0 100 March 4, 2026 at 01:32:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 103 108 0 1 0 0 6 0 0 0 99 1 0 0 0 22 0 2 0 0 0 0 3 0 0 0 100 2 0 0 2 234 105 12 0 1 0 0 2 0 0 0 100 3 0 0 0 34 1 16 1 1 0 0 300 0 0 0 100 4 0 0 0 35 2 14 0 3 0 0 5 0 0 0 100 5 8 0 130 283 137 105 2 1 0 0 1995 0 1 0 99 6 0 0 0 79 27 60 0 2 0 0 11 0 0 0 100 7 0 0 7 32 4 14 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:32:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 106 0 0 0 0 3 0 0 0 100 1 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 2 0 0 4 213 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 10 1 4 0 1 0 0 300 0 0 0 100 4 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 5 0 0 23 221 106 42 2 0 0 0 1988 0 0 0 99 6 0 0 0 118 56 114 0 1 0 0 6 0 0 0 100 7 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:32:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 2171 103 172 6 5 38 0 3160 6 2 0 92 1 0 0 0 363 6 668 12 38 17 0 2012 3 1 0 96 2 1 0 129 592 104 812 11 28 15 0 1844 5 1 0 94 3 0 0 0 327 3 601 9 24 25 0 1823 3 1 0 96 4 0 0 0 246 6 402 0 20 15 0 994 2 1 0 98 5 0 0 17 441 109 443 7 14 28 0 3613 2 1 0 97 6 0 0 0 439 55 760 7 32 33 0 1786 2 1 0 97 7 0 0 7 119 6 165 3 8 24 0 3101 5 1 0 94 March 4, 2026 at 01:32:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2324 102 484 1 109 1734 0 2 0 3 0 97 1 0 0 0 594 48 1056 1 122 1647 0 0 0 2 0 98 2 0 0 4 425 107 503 0 108 1653 0 15 0 3 0 97 3 0 0 0 412 194 499 0 113 1675 0 552 0 3 0 97 4 0 0 0 214 3 460 0 113 1625 0 21 0 3 0 97 5 0 0 16 407 112 454 1 97 1520 0 1739 0 3 0 97 6 0 0 0 210 6 455 2 117 1524 0 8 0 3 0 97 7 0 0 7 209 3 444 2 94 1506 0 261 0 3 0 97 March 4, 2026 at 01:32:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 104 136 0 5 14 0 6 0 0 0 100 1 0 0 0 41 0 72 0 7 16 0 0 0 0 0 100 2 0 0 4 332 154 143 0 4 19 0 1 0 0 0 100 3 0 0 0 51 26 38 2 10 16 0 337 0 0 0 100 4 0 0 0 37 1 57 0 8 23 0 257 0 0 0 100 5 0 0 16 222 105 50 2 2 10 0 1694 0 0 0 99 6 0 0 0 16 0 21 0 3 22 0 0 0 0 0 100 7 0 0 7 32 9 36 0 1 7 0 269 0 0 0 100 March 4, 2026 at 01:32:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 108 0 2 0 0 3 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 2 0 0 4 313 153 107 0 2 0 0 0 0 0 0 100 3 0 0 0 13 3 8 0 0 0 0 296 0 0 0 100 4 0 0 0 17 2 12 0 0 0 0 300 0 0 0 100 5 0 0 16 218 105 40 2 0 1 0 1696 0 0 0 100 6 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 7 0 0 7 26 11 22 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:32:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1007 0 113 2182 104 205 0 15 15 12 1142 1 1 0 98 1 1926 0 0 117 2 171 4 23 9 17 657 1 1 0 99 2 82 0 7 411 154 282 1 20 25 10 1052 0 0 0 99 3 33 0 0 563 1 1557 1 19 6 7 8955 2 1 0 97 4 80 0 0 64 2 60 4 14 24 2 2369 4 1 0 96 5 15 0 16 275 105 121 3 13 14 3 2614 0 1 0 99 6 446 0 0 47 0 50 0 10 4 3 222 0 0 0 100 7 749 0 7 102 11 145 6 14 7 2 7026 2 1 0 97 March 4, 2026 at 01:32:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 74 0 0 6879 110 10110 76 356 159 0 26182 23 15 0 62 1 9 0 0 4704 14 9998 82 376 117 0 24144 22 13 0 65 2 13 0 4 4008 112 7771 64 238 97 0 20550 19 11 0 69 3 23 0 0 4145 14 8661 70 337 94 0 20600 16 10 0 73 4 3 0 0 2902 13 5952 55 247 126 0 13675 14 8 0 79 5 21 0 16 2199 110 4196 26 145 79 0 12026 10 6 0 84 6 11 0 0 3267 9 6989 48 246 69 0 17024 14 9 0 77 7 12 0 7 2199 13 4605 40 149 57 0 9136 8 5 0 87 March 4, 2026 at 01:32:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 6583 110 9684 90 435 734 0 25741 23 16 0 61 1 11 0 0 4347 10 9228 79 480 721 0 22031 19 13 0 68 2 20 0 6 3749 114 7311 42 336 777 0 17479 17 11 0 73 3 26 0 0 3866 132 7849 58 405 665 0 17114 14 10 0 76 4 3 0 0 2835 10 5845 43 363 800 0 12252 11 8 0 81 5 10 0 15 2640 120 5275 34 237 750 0 12916 11 8 0 81 6 10 0 0 3293 12 6987 43 311 745 0 15730 13 10 0 77 7 9 0 7 2457 15 5494 52 236 608 0 14038 12 8 0 80 March 4, 2026 at 01:32:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 36 1 1 0 0 1216 0 1 0 99 1 0 0 0 108 1 104 0 1 0 0 2 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 127 59 122 0 1 0 0 300 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 17 208 102 2 0 0 0 0 266 0 0 0 100 6 0 0 0 11 2 6 1 0 0 0 600 0 0 0 100 7 0 0 7 17 2 12 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:32:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 36 1 1 0 0 1217 0 1 0 99 1 0 0 0 105 0 100 0 0 0 0 0 0 0 0 100 2 0 0 3 212 103 4 0 0 0 0 1 0 0 0 100 3 0 0 0 127 59 122 0 0 0 0 303 0 0 0 100 4 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 5 0 0 17 210 102 2 0 0 0 0 266 0 0 0 100 6 0 0 0 12 2 4 0 0 0 0 600 0 0 0 100 7 0 0 7 18 2 14 0 0 0 0 259 0 0 0 100 March 4, 2026 at 01:32:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 64 1 2 0 0 1216 0 1 0 99 1 0 0 0 82 1 76 0 2 0 0 2 0 0 0 100 2 0 0 3 212 102 10 0 1 2 0 0 0 0 0 100 3 0 0 0 131 60 124 1 0 0 0 304 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 5 0 0 17 208 102 2 0 0 0 0 266 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 600 0 0 0 100 7 0 0 7 16 2 12 1 0 0 0 260 0 0 0 100 March 4, 2026 at 01:32:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 100 1 3 0 0 1216 0 1 0 99 1 0 0 0 48 2 38 0 0 1 0 1 0 0 0 100 2 0 0 4 210 102 4 0 0 1 0 0 0 0 0 100 3 0 0 0 132 59 130 0 1 1 0 302 0 0 0 100 4 0 0 0 19 7 12 0 0 1 0 4 0 0 0 100 5 0 0 16 211 103 4 1 0 1 0 271 0 0 0 100 6 0 0 0 12 3 4 1 0 1 0 600 0 0 0 100 7 0 0 7 21 4 14 0 0 1 0 261 0 0 0 100 March 4, 2026 at 01:32:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 102 250 0 19 112 0 1213 0 1 0 99 1 0 0 0 58 1 108 0 16 96 0 2 0 0 0 100 2 0 0 3 262 102 107 0 16 83 0 0 0 0 0 100 3 0 0 0 263 136 241 0 21 118 0 301 0 1 0 99 4 0 0 0 82 3 153 0 27 127 0 14 0 0 0 99 5 0 0 17 277 109 116 0 15 111 0 266 0 0 0 100 6 0 0 0 147 3 285 1 18 129 0 607 0 0 0 99 7 0 0 7 81 2 145 0 17 120 0 264 0 0 0 100 March 4, 2026 at 01:32:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 134 1 0 0 0 1213 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 129 59 124 0 0 1 0 303 0 0 0 100 4 0 0 0 13 2 14 0 1 0 0 0 0 0 0 100 5 0 0 16 208 102 2 0 0 0 0 266 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 601 0 0 0 100 7 0 0 7 18 3 16 0 1 0 0 261 0 0 0 100 March 4, 2026 at 01:32:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 138 1 0 0 0 1214 0 1 0 99 1 0 0 0 10 2 4 0 0 0 0 3 0 0 0 100 2 0 0 3 211 102 4 0 1 0 0 0 0 0 0 100 3 0 0 0 128 59 122 1 0 0 0 303 0 0 0 100 4 0 0 0 11 2 6 0 1 1 0 0 0 0 0 100 5 0 0 17 213 102 12 1 1 0 0 277 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 600 0 0 0 100 7 0 0 7 18 3 14 1 0 0 0 261 0 0 0 100 March 4, 2026 at 01:32:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 100 1 0 0 0 1214 0 1 0 99 1 0 0 0 43 2 40 0 2 0 0 4 0 0 0 100 2 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 126 58 122 0 0 0 0 302 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 5 0 0 16 208 102 2 0 0 0 0 266 0 0 0 100 6 0 0 0 10 2 6 1 1 0 0 599 0 0 0 100 7 0 0 7 16 2 12 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:32:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 98 1 2 0 0 1212 0 1 0 99 1 0 0 0 48 2 40 0 0 0 0 3 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 127 59 122 0 0 0 0 300 0 0 0 100 4 0 0 0 13 3 8 0 0 0 0 1 0 0 0 100 5 0 0 17 210 102 4 0 0 0 0 266 0 0 0 100 6 0 0 0 14 2 12 1 1 0 0 600 0 0 0 100 7 0 0 7 16 2 12 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:32:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2332 103 840 1 7 20 0 6031 1 1 0 97 1 103 0 0 42 0 33 1 8 13 0 872 0 0 0 100 2 33 0 4 217 102 24 0 5 9 0 872 0 0 0 100 3 332 0 0 134 55 141 0 6 10 0 418 0 0 0 99 4 4 0 0 49 8 74 1 8 2 0 133 0 0 0 100 5 31 0 16 474 109 760 0 10 4 0 4641 1 1 0 98 6 0 0 0 23 3 27 0 2 0 0 649 0 0 0 100 7 0 0 7 39 2 51 3 6 39 0 2276 3 0 0 96 March 4, 2026 at 01:32:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 6996 107 10313 103 419 98 0 26275 24 15 0 61 1 64 0 0 4560 10 9483 93 397 110 0 24433 20 13 0 67 2 17 0 3 4321 109 8416 61 284 105 0 19809 17 11 0 72 3 39 0 2 4232 18 8969 88 304 65 0 21377 17 11 0 72 4 11 0 0 2720 16 5489 42 236 97 0 12189 11 7 0 82 5 7 0 17 2055 112 4083 25 141 108 0 12546 11 6 0 83 6 11 0 0 3664 15 7844 46 236 98 0 17036 15 9 0 76 7 85 0 7 2105 12 4438 26 138 39 0 11183 12 6 0 82 March 4, 2026 at 01:32:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 6446 114 9135 71 373 152 0 25508 24 15 0 61 1 9 0 0 5098 15 10667 85 397 90 0 25527 21 13 0 66 2 9 0 4 3730 112 7400 40 258 104 0 19202 16 10 0 74 3 2 0 7 4298 17 9088 54 289 65 0 21345 16 11 0 72 4 14 0 0 2769 13 5693 33 237 118 0 14710 14 8 0 78 5 6 0 2 2453 113 4745 25 151 58 0 10591 9 6 0 85 6 6 0 14 3073 12 6467 29 227 84 0 15995 13 8 0 79 7 4 0 0 2527 8 5335 26 150 62 0 11851 11 6 0 83 March 4, 2026 at 01:32:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 6495 107 9347 66 328 122 0 26132 24 15 0 61 1 11 0 0 4228 12 8932 67 358 109 0 21606 18 12 0 70 2 22 0 3 3118 110 5748 43 219 84 0 14888 12 8 0 81 3 4 0 7 3955 18 8317 43 290 65 0 18735 15 10 0 75 4 9 0 0 2090 22 4338 37 207 82 0 13646 13 7 0 80 5 2 0 3 2281 114 4509 27 134 87 0 11651 11 6 0 83 6 9 0 14 3617 13 7860 44 230 93 0 18361 15 10 0 75 7 2 0 0 2855 8 5835 23 118 65 0 10436 9 6 0 85 March 4, 2026 at 01:32:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 4 0 0 0 0 1 0 99 1 0 0 0 21 8 14 0 0 1 0 6 0 0 0 100 2 0 0 4 317 154 138 1 1 1 0 1215 0 0 0 99 3 0 0 7 14 5 8 0 0 1 0 560 0 0 0 100 4 0 0 0 15 5 8 0 0 1 0 3 0 0 0 100 5 0 0 2 212 103 4 0 0 1 0 294 0 0 0 100 6 0 0 14 11 3 6 0 0 1 0 566 0 0 0 100 7 0 0 0 9 2 2 0 0 1 0 1 0 0 0 100 March 4, 2026 at 01:32:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2302 100 543 0 81 911 0 3 0 3 0 97 1 0 0 0 165 16 329 0 87 964 0 55 0 2 0 98 2 0 0 4 413 141 397 1 68 967 0 1224 0 3 0 97 3 0 0 7 331 171 362 1 89 1021 0 567 0 2 0 98 4 0 0 0 169 3 376 0 94 1129 0 33 0 3 0 97 5 0 0 2 444 109 481 1 72 970 0 297 0 2 0 97 6 0 0 14 175 2 395 0 95 962 0 591 0 2 0 98 7 0 0 0 136 0 300 0 65 952 0 18 0 2 0 98 March 4, 2026 at 01:32:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 109 52 104 0 0 0 0 1 0 0 0 100 2 0 0 4 213 104 36 1 0 2 0 1216 0 0 0 100 3 0 0 7 13 4 8 1 0 0 0 559 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 5 0 0 2 212 103 5 0 1 0 0 294 0 0 0 100 6 0 0 14 12 2 8 0 0 0 0 565 0 0 0 100 7 0 0 0 20 7 16 0 1 0 0 10 0 0 0 100 March 4, 2026 at 01:32:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 74 0 3 0 0 1 0 1 0 99 1 0 0 0 23 9 18 0 1 0 0 4 0 0 0 100 2 0 0 4 220 107 44 1 1 1 0 1217 0 0 0 100 3 0 0 7 103 48 100 0 1 0 0 562 0 0 0 100 4 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 5 0 0 2 255 103 46 0 2 0 0 293 0 0 0 100 6 0 0 14 10 2 6 1 0 0 0 567 0 0 0 100 7 1 0 0 21 8 16 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:32:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 120 0 2 1 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 4 213 104 34 1 0 0 0 1216 0 0 0 100 3 0 0 7 112 54 108 0 0 0 0 560 0 0 0 100 4 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 5 0 0 2 212 102 4 0 0 0 0 295 0 0 0 100 6 0 0 14 7 2 4 0 0 0 0 565 0 0 0 100 7 0 0 0 19 6 14 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:32:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 110 0 2 0 0 0 0 1 0 99 1 0 0 0 14 2 14 0 2 0 0 1 0 0 0 100 2 0 0 4 213 104 36 1 0 0 0 1218 0 0 0 100 3 0 0 7 115 54 110 1 0 0 0 560 0 0 0 100 4 0 0 0 10 2 6 0 0 0 0 1 0 0 0 100 5 0 0 2 215 102 6 0 2 0 0 294 0 0 0 100 6 0 0 14 7 2 4 0 0 0 0 566 0 0 0 100 7 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:32:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 596 0 3 2132 101 168 7 19 56 6 436 3 1 0 95 1 2277 0 0 29 3 34 1 9 96 4 481 3 1 0 96 2 3585 0 49 238 103 335 47 34 87 7 2287 2 2 0 96 3 1025 0 7 144 54 222 19 26 37 5 1008 3 1 0 96 4 359 0 0 46 4 68 5 12 16 2 196 4 0 0 96 5 1789 0 3 231 107 44 2 12 103 2 913 3 1 0 96 6 2027 0 14 44 3 105 23 20 104 5 1350 4 1 0 95 7 737 0 0 57 8 84 15 20 49 6 241 4 0 0 95 March 4, 2026 at 01:32:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2007 0 0 3024 102 1760 853 83 136 3 6481 79 7 0 14 1 1688 0 0 1216 7 2214 1080 100 130 3 6208 80 6 0 14 2 4407 0 1012 1215 115 2288 1059 92 138 5 8165 78 8 0 14 3 4045 0 343 1217 20 2600 1224 100 190 2 6264 78 7 0 15 4 2367 0 0 1144 8 2012 1012 102 104 5 5969 80 6 0 15 5 2352 0 3 1262 108 1904 943 85 145 3 5662 80 5 0 15 6 1677 0 14 967 8 1674 831 85 114 2 5841 80 5 0 15 7 1674 0 0 1014 23 1664 816 121 171 3 6939 80 5 0 15 March 4, 2026 at 01:32:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2113 102 44 0 4 1 0 9 0 1 0 99 1 0 0 0 15 2 10 0 1 0 0 8 0 0 0 100 2 0 0 18 312 153 136 1 0 1 0 1236 0 0 0 99 3 1 0 7 83 3 76 0 2 0 0 564 0 0 0 100 4 1 0 0 30 3 26 0 6 4 0 9 0 0 0 100 5 0 0 2 215 103 4 0 1 0 0 1 0 0 0 100 6 3 0 14 21 7 14 0 0 0 0 301 0 0 0 100 7 0 0 0 18 4 15 0 2 0 0 606 0 0 0 100 March 4, 2026 at 01:32:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 2 0 0 4 313 154 136 1 0 1 0 1229 0 0 0 99 3 0 0 7 18 3 14 0 0 0 0 560 0 0 0 100 4 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 21 8 16 0 0 0 0 605 0 0 0 100 March 4, 2026 at 01:32:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 108 0 0 0 0 0 0 1 0 99 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 0 0 7 312 153 134 1 0 1 0 1229 0 0 0 99 3 0 0 7 22 4 14 2 0 1 0 559 0 0 0 100 4 0 0 0 22 5 14 0 1 1 0 3 0 0 0 100 5 0 0 7 216 102 12 0 1 1 0 0 0 0 0 100 6 0 0 14 8 2 2 0 0 1 0 266 0 0 0 100 7 0 0 0 27 10 18 1 0 1 0 604 0 0 0 100 March 4, 2026 at 01:32:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2323 103 499 19 37 9 0 1263 4 2 0 94 1 0 0 0 332 6 619 18 58 16 0 1295 3 1 0 96 2 41 0 130 601 143 742 22 54 68 1 4258 8 2 0 90 3 0 0 7 245 14 386 27 38 45 0 2836 5 1 0 94 4 35 0 0 85 4 87 10 13 74 0 4053 10 2 0 88 5 7 0 2 260 108 31 7 5 69 1 4243 11 2 0 87 6 0 0 22 236 2 425 14 33 76 1 2349 4 2 0 94 7 5 0 7 411 12 756 12 50 15 0 1912 2 1 0 97 March 4, 2026 at 01:32:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2418 104 623 10 36 16 0 1707 3 2 0 95 1 0 0 0 367 6 561 3 29 12 0 1411 2 1 0 97 2 0 0 172 628 149 792 1 28 18 0 2783 2 1 0 96 3 3 0 7 361 7 648 7 30 24 0 2156 7 1 0 92 4 0 0 0 77 4 81 3 12 34 1 3293 6 2 0 93 5 4 0 2 264 102 53 4 2 42 0 3242 6 1 0 93 6 2 0 14 327 5 638 11 35 24 0 2008 2 1 0 97 7 22 0 0 324 4 626 10 27 15 0 1729 2 1 0 97 March 4, 2026 at 01:32:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2120 104 103 0 5 0 0 295 0 1 0 99 1 0 0 0 58 9 34 0 2 0 0 310 0 0 0 100 2 0 0 4 331 155 138 1 0 0 0 1139 0 0 0 100 3 0 0 7 32 2 12 0 0 0 0 260 0 0 0 100 4 0 0 0 35 2 14 0 2 0 0 300 0 0 0 100 5 0 0 2 234 102 8 0 2 0 0 0 0 0 0 100 6 0 0 14 25 1 4 0 1 0 0 266 0 0 0 100 7 0 0 0 24 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:32:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 80 0 7 2141 102 116 0 10 4 10 369 0 1 0 99 1 4 0 0 91 9 86 0 11 2 1 412 0 0 0 100 2 5 0 4 240 105 53 1 2 2 3 1253 0 0 0 99 3 3427 0 120 39 2 64 5 5 10 13 7121 2 2 0 96 4 76 0 0 155 51 169 1 10 12 8 448 0 0 0 100 5 27 0 4 248 102 43 0 8 9 8 155 0 0 0 100 6 17 0 14 50 1 59 0 10 8 2 438 0 0 0 100 7 27 0 0 35 0 34 0 6 5 5 67 0 0 0 100 March 4, 2026 at 01:32:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 108 1 0 0 0 37 0 1 0 99 1 0 0 0 29 11 23 1 1 0 0 596 0 0 0 100 2 0 0 4 213 104 36 1 0 2 0 1220 0 0 0 100 3 0 0 7 16 2 12 0 0 0 0 260 0 0 0 100 4 0 0 0 113 54 108 0 0 0 0 302 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 126 0 0 5795 104 7648 121 527 2030 0 20556 19 15 0 66 1 147 0 0 4244 14 9005 156 590 2068 0 20880 17 13 0 70 2 259 0 5 3618 106 7096 97 427 1908 1 17237 14 13 0 73 3 12 0 7 3446 193 7078 198 502 2011 0 18474 18 12 0 71 4 96 0 0 2766 30 5798 65 411 2199 1 14422 12 11 0 77 5 224 0 1 2245 121 4727 53 286 2199 0 14978 10 9 0 81 6 16 0 14 2455 11 5281 84 381 1916 1 12062 11 10 0 79 7 19 0 0 2239 3 4956 50 301 2069 1 11412 10 10 0 80 March 4, 2026 at 01:32:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 6712 106 9841 86 413 242 0 26442 24 15 0 60 1 0 0 0 5439 15 11781 94 476 175 0 25068 21 14 0 66 2 2 0 6 3750 122 7480 58 304 252 0 21894 20 12 0 69 3 0 0 0 4369 72 9167 71 386 228 0 20147 16 11 0 73 4 0 0 2 3104 18 6406 44 312 273 0 15412 14 9 0 77 5 0 0 1 2047 107 3681 27 163 154 0 8580 8 5 0 86 6 1 0 21 2767 7 5974 32 259 212 0 15567 13 8 0 78 7 3 0 0 2103 6 4349 26 149 205 0 10865 10 6 0 85 March 4, 2026 at 01:32:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2641 106 1171 8 59 12 0 2802 3 2 0 95 1 8 0 0 628 9 1290 3 54 23 0 3245 2 2 0 96 2 2 0 4 793 108 1174 9 36 23 0 3424 2 2 0 97 3 6 0 0 442 10 936 8 49 6 0 2047 2 1 0 97 4 1 0 0 405 49 777 5 38 14 0 2224 2 1 0 96 5 6 0 2 677 103 1031 3 30 24 0 2748 2 1 0 97 6 0 0 21 405 6 861 2 40 23 0 2998 2 1 0 97 7 1 0 0 387 4 790 0 25 4 0 2024 2 1 0 97 March 4, 2026 at 01:32:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 106 0 0 0 0 0 0 1 0 99 1 0 0 0 32 11 28 1 1 0 0 607 0 0 0 100 2 0 0 4 224 105 46 0 0 0 0 1225 0 0 0 100 3 0 0 0 10 2 166 0 0 0 0 331 0 0 0 100 4 0 0 0 108 52 102 0 0 0 0 1 0 0 0 100 5 0 0 2 214 103 6 0 1 1 0 300 0 0 0 100 6 0 0 21 14 3 16 0 2 1 0 526 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 1 1 0 0 0 1 0 99 1 0 0 0 29 11 22 1 0 1 0 601 0 0 0 100 2 0 0 4 213 103 34 1 0 1 0 1221 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 4 0 0 0 113 54 106 0 0 0 0 2 0 0 0 100 5 0 0 2 213 103 6 0 0 1 0 301 0 0 0 100 6 0 0 21 18 6 14 0 0 1 0 530 0 0 0 100 7 0 0 0 14 2 12 0 1 1 0 2 0 0 0 100 March 4, 2026 at 01:32:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2199 101 273 3 46 554 0 0 0 2 0 98 1 0 0 0 105 9 199 0 39 448 0 603 0 1 0 98 2 0 0 4 326 106 263 1 37 358 0 1227 0 1 0 99 3 0 0 0 223 98 211 0 40 478 0 0 0 1 0 99 4 0 0 0 174 45 261 0 38 485 0 37 0 1 0 99 5 0 0 2 313 118 191 0 29 476 0 300 0 1 0 99 6 0 0 21 100 3 210 1 43 461 0 533 0 2 0 98 7 0 0 0 145 0 291 0 38 490 0 5 0 1 0 99 March 4, 2026 at 01:32:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 112 0 1 0 0 0 0 1 0 99 1 0 0 0 29 9 30 1 1 0 0 603 0 0 0 100 2 0 0 4 211 103 34 1 0 0 0 1214 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 5 0 0 0 100 5 0 0 2 313 153 104 1 0 0 0 300 0 0 0 100 6 0 0 21 15 5 12 2 0 0 0 533 0 0 0 100 7 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:32:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 118 0 0 0 0 1 0 1 0 99 1 0 0 0 29 10 24 1 0 0 0 604 0 0 0 100 2 0 0 4 217 104 44 1 1 0 0 1217 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 2 0 0 0 100 5 0 0 2 312 153 104 0 0 0 0 300 0 0 0 100 6 0 0 21 10 3 8 0 0 0 0 525 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 70 0 1 0 0 0 0 1 0 99 1 0 0 0 27 10 22 1 0 0 0 602 0 0 0 100 2 0 0 4 211 103 34 1 0 1 0 1215 0 0 0 100 3 0 0 0 48 1 44 0 2 0 0 0 0 0 0 100 4 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 5 0 0 2 312 153 104 0 0 0 0 300 0 0 0 100 6 0 0 21 10 3 8 0 0 0 0 526 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 8 0 1 0 0 0 0 1 0 99 1 0 0 0 26 10 22 0 0 0 0 604 0 0 0 100 2 0 0 4 214 104 38 0 0 0 0 1218 0 0 0 100 3 0 0 0 116 1 116 0 2 0 0 0 0 0 0 100 4 0 0 0 10 2 4 0 1 0 0 1 0 0 0 100 5 0 0 2 313 153 104 0 0 0 0 300 0 0 0 100 6 0 0 21 11 3 10 0 0 0 0 526 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 14 0 2 0 0 0 0 1 0 99 1 0 0 0 26 9 22 1 0 1 0 604 0 0 0 100 2 0 0 4 211 103 34 1 0 0 0 1214 0 0 0 100 3 0 0 0 113 0 108 0 2 1 0 0 0 0 0 100 4 0 0 0 21 4 24 0 1 3 0 14 0 0 0 100 5 0 0 2 319 159 104 1 0 0 0 300 0 0 0 100 6 0 0 21 17 4 16 2 0 0 0 533 0 0 0 100 7 0 0 0 14 0 16 0 0 1 0 5 0 0 0 100 March 4, 2026 at 01:32:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 8 0 1 0 0 0 0 1 0 99 1 0 0 0 25 9 20 1 0 0 0 603 0 0 0 100 2 0 0 4 215 105 38 1 0 0 0 1219 0 0 0 100 3 0 0 0 113 1 108 0 1 0 0 0 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 1 0 0 0 100 5 0 0 2 312 153 104 0 0 0 0 300 0 0 0 100 6 0 0 21 10 3 8 0 0 0 0 527 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 0 6048 106 8481 65 282 139 0 23088 22 14 0 64 1 7 0 0 4243 12 8811 81 384 78 0 17714 15 10 0 75 2 2 0 3 3345 115 6441 54 232 119 0 16110 13 8 0 78 3 5 0 0 3452 6 6982 62 272 144 0 18715 12 9 0 78 4 2 0 0 2105 11 4259 30 192 101 0 13311 16 7 0 78 5 4 0 3 2454 124 5223 18 116 78 0 18169 11 6 0 83 6 13 0 21 2950 8 6388 47 191 128 0 15242 12 8 0 80 7 27 0 0 1769 6 3771 25 102 101 0 10857 10 6 0 84 March 4, 2026 at 01:32:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6537 105 9469 63 327 181 0 25493 24 15 0 61 1 13 0 0 4872 10 10470 77 396 132 0 24659 20 13 0 66 2 10 0 3 4031 114 7923 34 273 103 0 19345 17 11 0 72 3 0 0 0 4648 18 9804 70 324 115 0 20971 17 11 0 72 4 5 0 0 2794 10 5778 35 259 133 0 16710 15 9 0 76 5 5 0 3 2432 122 4748 19 144 115 0 12502 11 7 0 82 6 5 0 21 2839 13 6160 31 222 92 0 15600 13 8 0 78 7 2 0 0 1764 7 3698 13 101 71 0 9308 8 5 0 87 March 4, 2026 at 01:32:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 7 6678 114 10045 55 355 168 0 25443 26 15 0 59 1 10 0 0 4828 9 10422 69 420 119 0 22813 20 12 0 68 2 8 0 4 3833 110 7371 30 260 99 0 18921 16 10 0 74 3 2 0 0 4313 28 9047 39 283 127 0 20646 17 11 0 72 4 5 0 0 2373 18 4856 30 241 141 0 14913 13 8 0 79 5 8 0 2 2425 110 4909 13 143 103 0 14230 12 8 0 81 6 10 0 14 3437 16 7328 34 238 84 0 17325 13 9 0 78 7 5 0 0 1976 10 4208 16 123 73 0 9611 9 5 0 86 March 4, 2026 at 01:32:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2806 104 1592 8 123 998 0 3444 3 5 0 92 1 2 0 0 766 4 1529 13 132 1016 0 3217 2 4 0 94 2 0 0 4 974 107 1588 4 107 912 0 3046 2 4 0 94 3 0 0 0 853 195 1565 11 125 959 0 2627 2 4 0 94 4 0 0 0 430 7 963 6 114 961 0 1724 1 3 0 96 5 0 0 2 613 110 826 2 77 921 0 1012 1 3 0 96 6 2 0 14 400 7 863 8 98 1041 0 2819 2 4 0 95 7 3 0 0 312 3 638 6 77 819 0 1151 1 3 0 96 March 4, 2026 at 01:32:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 58 0 4 0 0 559 0 1 0 99 1 0 0 0 68 2 88 0 2 0 0 1215 0 0 0 100 2 0 0 4 226 108 18 1 2 0 0 306 0 0 0 100 3 0 0 0 111 52 107 0 1 0 0 293 0 1 0 99 4 0 0 0 15 2 10 0 1 0 0 0 0 0 0 100 5 0 0 2 213 101 8 0 1 0 0 0 0 0 0 100 6 0 0 14 11 4 8 0 0 0 0 267 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:32:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 104 76 0 0 0 0 569 0 1 0 99 1 0 0 0 69 5 98 1 4 1 0 1237 0 0 0 100 2 0 0 4 222 107 14 0 1 2 0 309 0 0 0 100 3 0 0 0 111 52 108 0 0 1 0 297 0 0 0 100 4 0 0 0 16 4 12 0 1 0 0 6 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 14 11 3 8 0 1 1 0 274 0 0 0 100 7 0 0 0 7 0 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:33:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 42 2 2 0 0 560 0 1 0 99 1 0 0 0 97 8 118 1 1 0 0 1226 0 0 0 99 2 0 0 3 210 102 4 0 1 0 0 300 0 0 0 100 3 0 0 0 110 52 108 0 1 0 0 294 0 0 0 100 4 0 0 0 14 3 6 0 0 0 0 0 0 0 0 100 5 0 0 3 210 101 2 0 0 1 0 0 0 0 0 100 6 0 0 14 8 2 8 0 2 0 0 266 0 0 0 100 7 0 0 0 8 0 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:33:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 103 112 0 4 0 0 560 0 1 0 99 1 1 0 0 40 9 62 1 2 0 0 1227 0 0 0 100 2 0 0 4 210 102 4 0 0 0 0 300 0 0 0 100 3 0 0 0 111 52 106 0 1 0 0 294 0 0 0 100 4 0 0 0 14 5 8 0 0 0 0 3 0 0 0 100 5 0 0 2 209 101 0 0 0 0 0 0 0 0 0 100 6 0 0 14 11 4 8 0 0 0 0 268 0 0 0 100 7 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:33:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2117 104 77 0 1 0 0 565 0 0 0 99 1 0 0 0 72 9 98 0 1 0 0 1227 0 0 0 100 2 0 0 4 212 102 6 1 0 1 0 300 0 0 0 100 3 0 0 0 112 51 106 1 0 0 0 294 0 0 0 100 4 0 0 0 16 5 12 0 0 3 0 2 0 0 0 100 5 0 0 2 217 108 4 0 0 0 0 0 0 0 0 100 6 0 0 14 15 3 16 1 0 0 0 280 0 0 0 100 7 0 0 0 14 0 16 0 0 2 0 7 0 0 0 100 March 4, 2026 at 01:33:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 104 10 0 1 1 0 560 0 1 0 99 1 0 0 0 135 8 164 1 2 1 0 1224 0 0 0 99 2 0 0 3 210 102 4 0 0 0 0 300 0 0 0 100 3 0 0 0 108 51 104 0 0 0 0 294 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 2 0 0 0 100 5 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:33:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1866 0 7 3018 106 1886 872 123 54 0 4889 80 6 0 14 1 17 0 0 1026 15 1929 911 124 72 1 5794 81 5 0 14 2 281 0 927 992 110 1652 804 113 50 0 4151 82 5 0 14 3 7 0 0 1000 13 2004 917 137 61 0 4684 82 5 0 14 4 10 0 0 1144 3 2218 1070 117 61 0 4660 81 5 0 14 5 14 0 2 1192 114 1905 919 130 71 0 4299 81 5 0 14 6 28 0 14 914 3 1915 901 109 53 0 4605 81 5 0 14 7 9 0 0 1035 9 2011 976 101 52 0 4419 82 4 0 14 March 4, 2026 at 01:33:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 103 79 9 4 0 0 313 2 0 0 98 1 2 0 0 75 4 113 11 11 1 0 1364 1 0 0 98 2 0 0 18 227 103 37 9 4 0 0 425 2 0 0 98 3 0 0 0 35 5 55 13 2 0 0 119 2 0 0 98 4 0 0 0 133 55 139 5 8 0 0 132 2 0 0 98 5 0 0 2 228 102 21 4 6 1 0 98 1 0 0 98 6 7 0 14 21 4 26 4 8 1 0 659 1 0 0 99 7 0 0 0 29 2 38 11 7 0 0 371 1 0 0 99 March 4, 2026 at 01:33:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 102 4 0 0 1 0 260 0 1 0 99 1 0 0 0 116 3 138 0 0 1 0 1227 0 0 0 99 2 0 0 7 214 102 10 1 1 1 0 300 0 0 0 100 3 0 0 0 10 1 2 0 1 1 0 0 0 0 0 100 4 0 0 0 128 61 120 0 0 0 0 8 0 0 0 100 5 0 0 7 221 102 12 0 0 1 0 1 0 0 0 100 6 0 0 14 20 8 14 0 0 1 0 568 0 0 0 100 7 0 0 0 13 3 4 1 0 1 0 295 0 0 0 100 March 4, 2026 at 01:33:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 102 14 0 1 1 0 265 0 1 0 99 1 0 0 0 112 2 136 1 0 0 0 1228 0 0 0 100 2 0 0 3 211 102 6 0 1 3 0 300 0 0 0 100 3 0 0 0 11 0 10 0 1 1 0 0 0 0 0 100 4 0 0 0 126 59 120 0 1 0 0 31 0 0 0 100 5 0 0 3 227 108 14 0 0 2 0 0 0 0 0 100 6 1 0 14 19 6 18 0 0 0 0 577 0 0 0 100 7 0 0 0 15 1 16 0 0 2 0 299 0 0 0 100 March 4, 2026 at 01:33:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 102 8 1 1 0 0 260 0 1 0 99 1 0 0 0 112 2 136 1 0 0 0 1228 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 300 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 122 59 116 0 0 0 0 7 0 0 0 100 5 0 0 3 217 103 6 0 0 0 0 0 0 0 0 100 6 0 0 14 17 6 14 1 0 0 0 567 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:33:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2450 105 743 27 64 13 0 1545 3 2 0 95 1 0 0 0 379 4 726 37 70 10 0 2587 6 1 0 93 2 3 0 130 471 104 500 24 54 14 1 2149 4 1 0 95 3 24 0 0 272 5 495 13 46 120 3 1666 4 1 0 95 4 0 0 7 149 8 235 7 24 56 2 2331 5 1 0 94 5 36 0 2 523 104 571 22 45 30 5 2069 4 1 0 95 6 2 0 26 107 6 134 10 17 55 1 2994 5 2 0 93 7 0 0 14 137 46 133 4 7 190 2 3394 6 2 0 92 March 4, 2026 at 01:33:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2157 146 160 0 2 0 0 260 0 1 0 99 1 0 0 0 53 2 76 1 2 0 0 1135 0 0 0 100 2 0 0 4 214 103 6 1 0 0 0 300 0 0 0 100 3 0 0 0 18 5 12 0 0 0 0 9 0 0 0 100 4 0 0 0 14 2 8 0 0 1 0 0 0 0 0 100 5 0 0 9 217 101 14 0 2 0 0 0 0 0 0 100 6 0 0 14 16 5 12 0 1 0 0 567 0 0 0 100 7 0 0 0 23 7 15 1 2 0 0 294 0 0 0 100 March 4, 2026 at 01:33:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2178 152 134 0 2 0 0 260 0 1 0 99 1 0 0 0 108 3 114 1 2 0 0 1137 0 0 0 100 2 0 0 4 226 103 4 0 0 0 0 300 0 0 0 100 3 0 0 0 31 4 10 0 0 0 0 8 0 0 0 100 4 0 0 0 26 3 4 0 0 0 0 2 0 0 0 100 5 0 0 2 227 101 4 0 0 0 0 0 0 0 0 100 6 0 0 14 32 5 16 0 3 0 0 566 0 0 0 100 7 0 0 112 14 3 9 0 0 0 0 299 0 0 0 100 March 4, 2026 at 01:33:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2357 146 612 3 117 1952 0 12 0 5 0 95 1 0 0 3 348 3 705 3 151 1857 0 253 0 4 0 96 2 0 0 3 416 105 507 2 135 1642 0 760 0 4 0 96 3 0 0 0 400 200 481 2 133 1713 1 8 0 4 0 96 4 0 0 0 239 4 550 0 151 1693 0 2 0 3 0 97 5 0 0 3 385 110 403 4 119 1624 0 674 0 4 0 96 6 0 0 14 251 5 553 2 135 1620 0 578 0 4 0 96 7 0 0 7 201 5 465 2 110 1715 0 300 0 4 0 96 March 4, 2026 at 01:33:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2426 103 636 5 27 56 0 1151 3 2 0 95 1 0 0 7 351 4 634 1 36 54 0 1136 2 1 0 97 2 0 0 130 658 146 861 4 29 51 0 3054 2 2 0 96 3 0 0 0 366 48 588 7 34 61 0 1841 5 1 0 94 4 0 0 0 94 5 115 4 17 85 0 3093 6 2 0 93 5 1 0 2 271 101 78 4 14 77 1 3068 5 2 0 93 6 0 0 14 461 10 802 9 39 48 0 1926 2 1 0 97 7 0 0 0 350 7 690 6 27 53 0 1880 2 1 0 97 March 4, 2026 at 01:33:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 72 0 3 0 0 1 0 1 0 99 1 0 0 7 17 6 12 0 0 0 0 264 0 0 0 100 2 0 0 4 312 153 134 2 0 0 0 1436 0 0 0 100 3 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 4 0 0 0 29 7 24 0 0 0 0 9 0 0 0 100 5 4 0 2 221 105 12 0 0 0 0 6 0 0 0 100 6 0 0 14 44 4 38 0 0 0 0 568 0 0 0 100 7 0 0 0 15 3 8 1 0 0 0 301 0 0 0 100 March 4, 2026 at 01:33:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 112 0 1 0 0 0 0 1 0 99 1 0 0 7 14 5 10 0 1 0 0 265 0 0 0 100 2 0 0 4 299 147 120 1 0 1 0 1434 0 0 0 99 3 0 0 0 24 8 20 0 1 0 0 1 0 0 0 100 4 0 0 0 30 9 24 0 0 0 0 12 0 0 0 100 5 0 0 2 211 102 4 0 0 0 0 0 0 0 0 100 6 0 0 14 12 3 10 0 1 0 0 566 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:33:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 2 0 0 0 1 0 99 1 0 0 7 18 3 16 1 2 1 0 260 0 0 0 100 2 0 0 3 211 103 34 2 0 1 0 1435 0 0 0 100 3 0 0 0 111 52 106 0 1 0 0 0 0 0 0 100 4 0 0 0 30 9 22 0 0 1 0 10 0 0 0 100 5 0 0 3 213 103 6 0 0 1 0 1 0 0 0 100 6 0 0 14 16 6 10 1 1 1 0 566 0 0 0 100 7 0 0 0 13 4 6 0 0 1 0 295 0 0 0 100 March 4, 2026 at 01:33:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 977 0 113 5713 108 7620 145 489 1197 11 20711 21 14 0 64 1 218 0 7 3572 10 7386 104 511 1423 15 17367 15 12 0 73 2 1877 0 7 3117 105 5986 80 389 1536 9 16147 12 11 0 77 3 36 0 0 3257 217 6356 94 464 1478 6 15136 12 10 0 77 4 756 0 0 2402 19 5055 92 437 1488 9 18338 13 9 0 78 5 37 0 2 2383 121 4872 53 282 1536 4 12771 9 8 0 82 6 224 0 0 2769 13 6282 105 400 1523 3 16236 10 8 0 81 7 34 0 14 2006 9 4295 48 295 1414 3 10705 9 8 0 83 March 4, 2026 at 01:33:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 6884 107 10098 75 382 145 0 26014 24 15 0 62 1 17 0 0 4966 11 10532 76 395 173 0 25390 22 14 0 64 2 6 0 4 4077 118 8104 38 240 147 0 21153 19 11 0 70 3 3 0 0 4729 22 10015 61 331 114 0 22626 18 12 0 70 4 4 0 11 2739 13 5553 45 230 88 0 12670 12 7 0 81 5 6 0 2 2162 110 4106 20 145 151 0 10144 8 6 0 86 6 8 0 0 2798 20 6152 36 239 138 0 16559 14 9 0 77 7 12 0 14 1912 9 4010 9 122 84 0 9998 8 5 0 87 March 4, 2026 at 01:33:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3125 104 2364 15 90 16 0 5903 6 4 0 90 1 1 0 0 1123 6 2438 11 87 35 0 5817 5 3 0 92 2 5 0 3 847 105 1297 7 52 28 0 4574 3 2 0 95 3 7 0 0 1012 8 2146 13 61 33 0 5760 4 3 0 93 4 1 0 7 745 45 1343 9 67 11 0 3018 3 2 0 96 5 3 0 3 547 107 661 9 30 26 0 2092 2 1 0 97 6 7 0 0 786 7 1643 7 71 21 0 3247 3 2 0 95 7 0 0 14 484 11 1034 5 33 24 0 3243 3 2 0 96 March 4, 2026 at 01:33:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 100 0 0 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 4 210 103 4 0 0 0 0 595 0 0 0 100 3 0 0 0 30 8 54 0 0 0 0 1230 0 0 0 100 4 0 0 7 113 55 108 1 0 0 0 260 0 0 0 100 5 0 0 2 211 101 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 1 1 0 0 300 0 0 0 100 7 0 0 14 9 2 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:33:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 110 0 1 0 0 0 0 1 0 99 1 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 2 0 0 4 212 104 6 0 0 0 0 595 0 0 0 100 3 0 0 0 30 8 54 1 0 0 0 1230 0 0 0 100 4 0 0 7 113 55 108 0 0 0 0 259 0 0 0 100 5 0 0 2 213 102 6 0 0 0 0 2 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 7 0 0 14 10 2 8 0 1 1 0 266 0 0 0 100 March 4, 2026 at 01:33:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2188 100 282 2 36 469 0 10 0 2 0 98 1 0 0 0 108 11 192 1 39 545 0 1 0 1 0 99 2 0 0 4 386 104 369 2 46 439 0 600 0 1 0 99 3 0 0 0 212 100 249 2 41 533 0 1230 0 2 0 98 4 0 0 7 181 49 277 1 46 523 0 262 0 2 0 98 5 0 0 2 291 106 163 1 29 379 0 0 0 1 0 99 6 0 0 0 92 1 209 0 49 484 0 300 0 1 0 99 7 0 0 14 77 2 159 1 37 424 0 274 0 1 0 99 March 4, 2026 at 01:33:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 102 0 0 0 0 3 0 1 0 99 1 1 0 0 114 54 110 0 0 0 0 9 0 0 0 100 2 0 0 4 211 103 4 1 0 0 0 594 0 0 0 100 3 0 0 0 32 9 56 1 0 0 0 1223 0 0 0 100 4 0 0 7 13 5 8 0 0 0 0 260 0 0 0 100 5 0 0 2 213 102 6 0 0 0 0 2 0 0 0 100 6 20 0 0 12 2 8 0 0 0 0 305 0 0 0 100 7 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:33:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 106 0 1 3 0 0 0 1 0 99 1 0 0 0 118 52 116 0 7 1 0 0 0 0 0 100 2 0 0 3 220 103 20 0 4 1 0 594 0 0 0 100 3 0 0 0 38 9 64 1 4 2 0 1224 0 0 0 100 4 0 0 7 16 5 13 1 3 2 0 260 0 0 0 100 5 0 0 3 216 102 10 0 2 1 0 0 0 0 0 100 6 0 0 7 13 2 10 1 0 0 0 300 0 0 0 100 7 0 0 14 12 4 8 0 0 0 0 267 0 0 0 100 March 4, 2026 at 01:33:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 104 0 0 1 0 0 0 1 0 99 1 0 0 0 109 51 104 0 1 0 0 0 0 0 0 100 2 0 0 4 216 103 10 0 2 0 0 594 0 0 0 100 3 0 0 0 33 9 56 1 0 0 0 1226 0 0 0 100 4 0 0 7 17 5 14 0 1 0 0 260 0 0 0 100 5 0 0 2 214 102 6 0 0 0 0 2 0 0 0 100 6 0 0 0 12 1 6 0 0 0 0 300 0 0 0 100 7 0 0 21 9 2 8 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:33:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 108 1 2 0 0 24 0 1 0 99 1 0 0 0 110 52 102 0 0 1 0 0 0 0 0 100 2 0 0 7 212 103 4 1 0 1 0 593 0 0 0 100 3 0 0 0 33 9 54 1 0 2 0 1227 0 0 0 100 4 0 0 7 21 7 12 0 1 1 0 261 0 0 0 100 5 0 0 7 216 103 8 0 0 1 0 2 0 0 0 100 6 0 0 0 12 2 4 0 0 1 0 300 0 0 0 100 7 0 0 14 15 4 8 1 0 1 0 267 0 0 0 100 March 4, 2026 at 01:33:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 116 1 0 0 0 15 0 1 0 99 1 0 0 0 112 52 110 0 0 2 0 9 0 0 0 100 2 0 0 3 218 103 14 1 0 0 0 618 0 0 0 100 3 0 0 0 33 9 60 0 0 0 0 1216 0 0 0 100 4 0 0 7 24 7 22 0 1 1 0 288 0 0 0 100 5 0 0 3 231 109 24 0 1 1 0 40 0 0 0 100 6 3 0 0 14 2 12 0 0 3 0 309 0 0 0 100 7 0 0 14 15 2 18 0 0 1 0 273 0 0 0 100 March 4, 2026 at 01:33:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 102 0 0 0 0 1 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 2 0 0 3 210 103 4 0 0 0 0 594 0 0 0 100 3 0 0 0 30 8 54 1 0 0 0 1215 0 0 0 100 4 0 0 7 14 5 8 1 0 0 0 260 0 0 0 100 5 0 0 3 213 101 6 0 0 1 0 0 0 0 0 100 6 0 0 0 16 2 14 1 1 0 0 301 0 0 0 100 7 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:33:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 5274 104 6879 78 300 146 0 21291 20 12 0 68 1 0 0 0 3608 20 7538 82 330 116 0 18373 15 10 0 75 2 2 0 4 2848 110 5462 49 217 117 0 14883 12 7 0 81 3 17 0 0 3362 13 6921 49 231 55 0 15685 13 8 0 79 4 1 0 0 2216 10 4616 35 191 83 0 12416 11 7 0 82 5 1 0 9 1909 112 3581 20 107 96 0 9455 8 5 0 87 6 0 0 0 2500 12 5182 43 180 94 0 13008 14 6 0 80 7 2 0 14 2206 15 5246 16 111 61 0 17426 9 5 0 86 March 4, 2026 at 01:33:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 6184 110 8564 64 334 149 0 22616 21 14 0 65 1 1 0 0 4683 8 9772 69 372 107 0 21818 19 12 0 69 2 0 0 4 3843 116 7736 50 241 124 0 20831 19 11 0 70 3 1 0 0 4327 16 9134 53 323 91 0 20333 16 10 0 74 4 1 0 14 2982 17 6174 31 232 100 0 18063 15 9 0 76 5 0 0 9 2701 113 5513 18 133 109 0 15029 14 8 0 78 6 0 0 0 2917 6 6218 37 213 93 0 14175 12 8 0 80 7 0 0 0 2563 18 5363 19 124 64 0 11851 10 6 0 84 March 4, 2026 at 01:33:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 6760 107 9964 55 347 126 0 25706 24 15 0 61 1 14 0 0 4703 13 10029 56 406 113 0 24786 22 13 0 65 2 6 0 4 3753 115 7451 32 261 109 0 18032 16 10 0 74 3 6 0 0 4288 16 9223 53 320 93 0 19350 16 10 0 73 4 2 0 0 2674 17 5422 22 257 99 0 12538 11 7 0 82 5 3 0 23 2524 123 4863 25 160 114 0 12827 10 7 0 83 6 2 0 0 3292 8 7079 35 230 159 0 17350 14 9 0 77 7 3 0 0 2052 12 4388 23 129 87 0 13834 11 7 0 82 March 4, 2026 at 01:33:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 3170 103 2334 7 134 1088 0 5584 5 6 0 89 1 1 0 0 1043 9 2195 8 170 1115 0 4056 3 5 0 92 2 1 0 4 1180 144 2038 6 119 981 0 3271 3 5 0 92 3 0 0 0 1041 193 2040 4 136 985 0 4051 3 5 0 92 4 3 0 0 595 5 1231 11 128 954 0 1919 2 4 0 95 5 0 0 23 833 117 1320 8 111 974 0 3174 3 4 0 94 6 1 0 0 683 8 1452 6 112 1046 0 4297 3 4 0 93 7 2 0 0 736 8 1583 1 107 932 0 2597 2 4 0 94 March 4, 2026 at 01:33:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 114 0 2 6 0 0 0 1 0 99 1 0 0 0 162 51 205 0 5 10 0 300 0 0 0 100 2 0 0 4 226 102 38 0 4 9 0 0 0 0 0 100 3 0 0 0 58 32 41 0 6 20 0 594 0 0 0 100 4 0 0 0 30 2 41 0 3 15 0 2 0 0 0 100 5 0 0 23 234 111 36 2 2 8 0 534 0 0 0 99 6 0 0 0 28 3 70 1 6 10 0 1207 0 0 0 100 7 0 0 0 15 0 16 0 3 12 0 0 0 0 0 100 March 4, 2026 at 01:33:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 108 0 1 1 0 6 0 1 0 99 1 0 0 0 122 51 120 0 2 2 0 303 0 0 0 100 2 0 0 4 210 103 4 0 0 0 0 1 0 0 0 100 3 0 0 0 16 4 10 1 1 0 0 598 0 0 0 100 4 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 5 0 0 23 229 112 27 0 1 0 0 542 0 0 0 99 6 0 0 0 13 3 38 1 1 1 0 1210 0 0 0 100 7 0 0 0 11 1 6 0 0 1 0 4 0 0 0 100 March 4, 2026 at 01:33:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 115 51 111 0 1 0 0 300 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 13 4 8 0 0 0 0 595 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 2 0 0 0 100 5 0 0 24 229 112 22 0 0 0 0 533 0 0 0 100 6 0 0 0 14 3 40 1 1 0 0 1207 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:33:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 113 0 3 0 0 0 0 1 0 99 1 0 0 0 117 52 104 1 0 1 0 300 0 0 0 100 2 0 0 7 216 103 14 0 1 1 0 1 0 0 0 100 3 0 0 0 15 4 6 1 0 1 0 594 0 0 0 100 4 0 0 0 11 3 2 0 0 1 0 1 0 0 0 100 5 0 0 28 227 111 22 0 0 1 0 536 0 0 0 99 6 0 0 0 18 5 38 1 0 2 0 1207 0 0 0 100 7 0 0 0 10 2 2 0 0 1 0 1 0 0 0 100 March 4, 2026 at 01:33:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 122 0 0 1 0 5 0 1 0 99 1 0 0 0 109 51 106 0 0 0 0 307 0 0 0 100 2 0 0 4 218 103 18 0 0 0 0 14 0 0 0 100 3 0 0 0 17 3 18 0 1 0 0 594 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 2 0 0 0 100 5 0 0 23 234 116 22 3 0 1 0 536 0 0 0 99 6 0 0 0 15 4 42 0 0 1 0 1207 0 0 0 100 7 0 0 0 12 0 12 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:33:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 0 0 0 0 1 0 1 0 99 1 0 0 0 107 51 102 0 0 0 0 300 0 0 0 100 2 0 0 4 210 103 4 0 0 0 0 1 0 0 0 100 3 0 0 0 12 3 6 1 0 0 0 593 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 1 0 0 0 100 5 0 0 23 224 110 20 0 0 0 0 535 0 0 0 99 6 0 0 0 16 5 40 1 0 0 0 1208 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:33:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2931 112 1703 796 103 77 0 4269 73 5 0 22 1 2 0 0 1203 23 2522 1194 117 142 0 4561 74 5 0 21 2 278 0 816 1058 123 1893 893 105 66 0 5025 73 5 0 22 3 1578 0 0 879 7 1920 847 102 91 0 5313 74 5 0 21 4 309 0 0 943 11 1785 878 110 103 1 4577 74 5 0 22 5 10 0 23 1039 114 1508 714 96 89 2 4411 75 4 0 21 6 3 0 0 895 6 1830 888 96 68 0 5574 74 4 0 22 7 0 0 0 797 4 1554 760 95 66 0 4267 75 4 0 21 March 4, 2026 at 01:33:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2177 102 228 37 30 15 0 509 9 1 0 90 1 0 0 0 102 2 265 104 49 17 0 660 9 1 0 90 2 5 0 74 289 105 164 60 40 25 0 887 9 1 0 91 3 2 0 0 105 9 163 72 34 4 0 1053 9 0 0 90 4 4 0 0 197 50 275 62 45 18 0 632 9 1 0 91 5 2 0 23 278 105 173 51 37 8 0 1409 9 1 0 91 6 0 0 0 81 3 155 40 31 14 0 1668 9 1 0 90 7 0 0 0 102 1 223 95 48 3 0 626 9 1 0 90 March 4, 2026 at 01:33:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 120 0 0 0 0 9 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 2 0 0 3 214 104 8 0 1 0 0 301 0 0 0 100 3 0 0 0 15 4 10 0 1 0 0 595 0 0 0 100 4 0 0 0 112 53 106 0 0 0 0 3 0 0 0 100 5 0 0 24 213 104 8 1 0 0 0 526 0 0 0 100 6 0 0 0 16 4 40 1 0 0 0 1221 0 0 0 100 7 0 0 0 8 1 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:33:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 107 112 0 2 1 0 14 0 1 0 99 1 1 0 0 27 0 22 0 3 0 0 7 0 0 0 100 2 0 0 4 222 105 20 0 0 0 0 313 0 0 0 100 3 0 0 0 17 4 12 1 1 0 0 594 0 0 0 100 4 0 0 0 108 52 102 0 0 0 0 1 0 0 0 100 5 0 0 23 220 109 10 1 1 2 0 527 0 0 0 100 6 0 0 0 17 2 48 1 1 1 0 1219 0 0 0 100 7 0 0 0 14 1 14 0 1 2 0 0 0 0 0 100 March 4, 2026 at 01:33:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 121 0 0 0 0 7 0 1 0 99 1 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 2 0 0 4 212 103 6 0 0 0 0 300 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 594 0 0 0 100 4 0 0 0 106 51 100 0 0 0 0 0 0 0 0 100 5 0 0 23 215 105 8 0 1 0 0 525 0 0 0 100 6 0 0 0 15 3 40 1 1 0 0 1220 0 0 0 100 7 0 0 0 12 0 14 0 3 0 0 0 0 0 0 100 March 4, 2026 at 01:33:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2476 105 788 33 62 12 0 1491 3 2 0 96 1 0 0 0 255 3 465 26 49 23 0 1297 4 1 0 95 2 0 0 139 509 104 600 11 38 12 0 1456 3 2 0 95 3 0 0 14 152 6 229 12 22 61 2 3304 5 2 0 93 4 0 0 0 281 11 487 17 39 38 0 1892 6 1 0 93 5 58 0 23 337 144 116 9 8 64 2 3524 6 2 0 92 6 0 0 0 61 4 71 5 6 65 2 4222 6 2 0 92 7 0 0 0 394 4 656 10 38 12 1 1402 3 1 0 96 March 4, 2026 at 01:33:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 78 0 4 0 0 0 0 1 0 99 1 0 0 7 11 2 8 0 2 0 0 16 0 0 0 100 2 0 0 3 215 105 8 0 0 0 0 300 0 0 0 100 3 0 0 0 22 6 15 0 2 0 0 595 0 0 0 100 4 0 0 0 20 5 16 0 1 1 0 17 0 0 0 100 5 0 0 24 313 154 106 1 0 0 0 526 0 0 0 100 6 0 0 0 15 2 38 1 0 0 0 1130 0 0 0 100 7 0 0 0 54 0 44 0 3 0 0 9 0 0 0 100 March 4, 2026 at 01:33:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 100 106 0 1 1 0 0 0 1 0 99 1 0 0 0 32 2 12 0 2 2 0 0 0 0 0 100 2 0 0 11 233 106 13 0 2 1 0 301 0 0 0 100 3 0 0 112 19 4 9 1 0 1 0 594 0 0 0 100 4 0 0 0 36 7 10 0 0 1 0 9 0 0 0 100 5 0 0 23 332 155 110 1 0 1 0 528 0 0 0 100 6 0 0 0 37 7 44 0 0 1 0 1133 0 0 0 100 7 0 0 0 35 2 12 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:33:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2304 103 523 3 114 1857 0 5 0 5 0 95 1 0 0 0 257 1 554 3 127 1855 0 7 0 4 0 96 2 0 0 4 419 106 481 4 130 1665 0 312 0 3 0 97 3 0 0 7 412 205 492 4 132 1818 0 594 0 5 0 95 4 0 0 0 211 8 473 4 143 1805 0 30 0 4 0 96 5 0 0 23 492 153 536 2 115 1687 1 527 0 4 0 96 6 0 0 0 256 2 577 9 129 1666 0 1127 0 4 0 96 7 0 0 0 250 0 556 3 115 1446 0 0 0 3 0 97 March 4, 2026 at 01:33:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2547 106 839 9 48 44 0 1447 5 2 0 93 1 0 0 0 440 39 700 6 40 45 0 1396 3 1 0 96 2 0 0 129 513 105 551 5 26 61 0 2226 3 1 0 96 3 0 0 0 350 61 471 5 34 30 0 1396 1 1 0 98 4 0 0 0 345 4 510 5 30 48 0 1697 3 1 0 96 5 1 0 24 418 104 254 6 9 41 0 2960 4 1 0 94 6 1 0 0 359 7 680 8 37 48 0 3219 3 1 0 96 7 0 0 286 153 2 256 5 17 58 0 2832 5 2 0 94 March 4, 2026 at 01:33:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 106 114 1 0 0 0 9 0 1 0 99 1 0 0 0 114 51 115 0 2 0 0 1 0 0 0 100 2 0 0 3 214 104 8 0 0 0 0 300 0 0 0 100 3 0 0 0 17 5 12 0 0 0 0 596 0 0 0 100 4 0 0 0 18 2 10 0 0 0 0 0 0 0 0 100 5 0 0 24 213 104 6 1 0 0 0 527 0 0 0 100 6 0 0 0 14 3 40 1 0 0 0 1130 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:33:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2714 0 112 2132 101 137 2 5 6 11 401 1 2 0 98 1 144 0 0 164 56 190 0 12 11 18 137 0 0 0 100 2 31 0 6 249 104 52 0 8 5 8 450 0 0 0 100 3 17 0 0 51 4 48 1 9 5 2 732 0 0 0 100 4 715 0 0 41 1 49 2 12 10 8 6558 2 1 0 97 5 31 0 23 252 104 63 1 15 6 6 587 0 0 0 100 6 5 0 0 40 1 63 1 5 4 2 1273 0 0 0 100 7 14 0 0 43 4 51 1 8 4 5 112 0 0 0 100 March 4, 2026 at 01:33:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 108 0 1 0 0 0 0 1 0 99 1 0 0 0 123 58 118 0 0 0 0 11 0 0 0 100 2 0 0 4 222 106 22 0 1 0 0 302 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 595 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 23 213 104 6 0 0 0 0 526 0 0 0 100 6 0 0 0 11 2 36 1 0 0 0 1211 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:33:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 54 0 0 5473 105 7728 96 431 1361 0 25509 18 13 0 68 1 57 0 0 3337 30 6849 147 471 1526 0 15565 13 10 0 77 2 12 0 3 3050 117 5836 67 329 1303 0 12710 12 9 0 79 3 43 0 0 2773 188 5529 84 372 1499 0 13758 11 10 0 79 4 331 0 0 1937 6 4171 93 357 1548 0 10539 10 8 0 82 5 26 0 24 1876 116 3547 34 229 1527 0 8136 7 7 0 86 6 3 0 0 2312 4 4919 67 312 1368 0 12336 13 8 0 79 7 223 0 0 1598 6 3668 113 233 1245 0 9066 7 7 0 86 March 4, 2026 at 01:33:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 14 6313 107 8893 38 336 129 0 25243 23 14 0 62 1 8 0 0 4833 13 10358 62 354 95 0 25072 21 13 0 65 2 9 0 3 4001 107 7853 40 265 68 0 16948 15 9 0 76 3 5 0 0 4237 11 9147 53 323 116 0 22412 18 12 0 70 4 10 0 0 2828 14 5781 28 258 129 0 16161 15 9 0 76 5 3 0 10 2454 117 4763 27 167 72 0 12904 11 7 0 82 6 7 0 0 3353 23 7290 37 232 78 0 16098 14 9 0 78 7 2 0 0 1984 10 4153 21 135 98 0 10104 8 5 0 87 March 4, 2026 at 01:33:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 14 3474 109 2932 13 111 41 0 7501 6 5 0 89 1 2 0 0 1348 8 2767 15 111 24 0 7873 6 4 0 90 2 6 0 4 1070 106 1623 14 65 25 0 4213 4 2 0 94 3 1 0 0 1027 6 2061 10 78 17 0 5080 4 3 0 94 4 1 0 115 882 10 1803 8 61 22 0 3529 3 2 0 95 5 2 0 9 816 108 1184 3 33 24 0 3530 3 2 0 96 6 1 0 0 1458 40 3233 7 89 33 0 7866 6 4 0 89 7 3 0 0 836 7 1749 7 46 29 0 4786 5 3 0 93 March 4, 2026 at 01:33:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 107 116 0 0 0 0 275 0 1 0 99 1 0 0 0 12 1 32 1 0 0 0 1212 0 0 0 100 2 0 0 4 210 102 4 0 0 0 0 1 0 0 0 100 3 0 0 0 16 4 10 0 0 0 0 301 0 0 0 99 4 0 0 0 13 2 6 1 1 0 0 294 0 0 0 100 5 0 0 9 220 105 18 0 1 0 0 560 0 0 0 100 6 0 0 0 115 53 112 0 2 0 0 2 0 0 0 100 7 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:33:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2118 108 124 0 1 1 0 276 0 1 0 99 1 0 0 0 10 2 32 1 0 1 0 1211 0 0 0 100 2 0 0 3 208 102 2 0 0 1 0 1 0 0 0 100 3 0 0 0 15 4 8 1 0 1 0 300 0 1 0 99 4 0 0 0 16 4 6 0 0 1 0 295 0 0 0 100 5 0 0 10 217 106 10 0 0 1 0 562 0 0 0 100 6 0 0 0 115 53 108 0 1 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 1 1 0 1 0 0 0 100 March 4, 2026 at 01:33:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2217 107 333 1 50 521 0 280 0 2 0 98 1 0 0 0 121 2 271 1 59 660 0 1228 0 2 0 98 2 0 0 4 304 102 204 0 40 507 0 30 0 1 0 98 3 0 0 0 217 115 208 1 50 448 0 300 0 2 0 98 4 0 0 0 210 2 426 0 50 507 0 294 0 1 0 99 5 0 0 9 307 110 189 1 45 542 0 559 0 2 0 98 6 0 0 0 217 52 341 0 57 574 0 2 0 1 0 99 7 0 0 0 105 2 215 1 43 510 0 0 0 2 0 98 March 4, 2026 at 01:33:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 108 126 0 0 0 0 276 0 1 0 99 1 0 0 0 8 1 32 1 0 0 0 1213 0 0 0 100 2 0 0 4 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 14 4 10 0 0 0 0 300 0 0 0 100 4 20 0 0 12 3 6 0 0 0 0 299 0 0 0 100 5 0 0 9 215 104 6 2 0 0 0 560 0 0 0 100 6 1 0 0 113 53 108 0 1 0 0 6 0 0 0 100 7 0 0 0 11 1 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:33:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2120 109 128 1 0 0 0 277 0 1 0 99 1 0 0 0 10 1 32 1 0 0 0 1207 0 0 0 100 2 0 0 4 208 102 2 0 0 0 0 1 0 0 0 100 3 0 0 0 18 5 14 0 0 0 0 301 0 0 0 100 4 0 0 0 9 2 3 1 0 0 0 288 0 0 0 100 5 0 0 9 214 104 8 0 0 0 0 563 0 0 0 100 6 0 0 0 110 52 106 0 2 0 0 18 0 0 0 100 7 0 0 0 18 5 14 0 0 0 0 6 0 0 0 100 March 4, 2026 at 01:34:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2124 108 134 0 1 1 0 276 0 1 0 99 1 0 0 0 8 1 32 1 0 1 0 1206 0 0 0 100 2 0 0 4 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 15 4 10 1 0 0 0 300 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 9 213 104 6 0 0 0 0 560 0 0 0 100 6 0 0 0 111 52 106 0 0 0 0 294 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:34:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 107 126 0 0 0 0 275 0 1 0 99 1 0 0 0 13 2 42 1 1 0 0 1208 0 0 0 100 2 0 0 4 208 102 2 0 0 0 0 1 0 0 0 100 3 0 0 0 14 4 10 0 0 0 0 300 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 9 213 104 6 0 0 0 0 561 0 0 0 100 6 0 0 0 112 53 108 0 0 0 0 296 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:34:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2122 107 136 1 0 0 0 281 0 1 0 99 1 0 0 0 10 1 38 0 0 1 0 1214 0 0 0 100 2 0 0 4 212 102 12 0 0 1 0 12 0 0 0 100 3 0 0 0 15 4 12 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 4 0 0 2 0 1 0 0 0 100 5 0 0 9 222 110 8 2 0 0 0 561 0 0 0 100 6 0 0 0 109 52 104 0 0 0 0 294 0 0 0 100 7 0 0 0 14 2 12 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:34:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 107 124 0 0 0 0 275 0 1 0 99 1 0 0 0 10 1 34 1 1 2 0 1207 0 0 0 100 2 0 0 4 211 102 8 0 1 0 0 1 0 0 0 100 3 0 0 0 14 4 10 0 0 0 0 300 0 0 0 100 4 0 0 0 8 1 2 0 1 0 0 0 0 0 0 100 5 0 0 9 213 104 6 0 0 0 0 559 0 0 0 100 6 0 0 0 113 53 106 1 0 0 0 296 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:34:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 14 5084 108 6334 71 259 89 0 17701 15 10 0 75 1 1 0 0 3215 11 6781 70 287 97 0 17885 18 9 0 74 2 6 0 3 3082 106 6457 57 193 88 0 22207 15 9 0 76 3 4 0 0 2901 11 6089 61 207 92 0 14062 11 7 0 82 4 1 0 0 1806 4 3692 31 161 45 0 9810 9 5 0 86 5 31 0 10 1806 109 3260 18 96 54 0 9540 8 5 0 87 6 7 0 0 2245 34 4731 23 154 53 0 11395 10 6 0 84 7 0 0 0 1621 7 3455 17 95 49 0 8433 7 4 0 88 March 4, 2026 at 01:34:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 6678 115 9713 59 349 155 0 22862 22 14 0 64 1 14 0 0 4705 10 10202 68 395 123 0 26064 23 14 0 63 2 12 0 18 3705 106 7410 48 238 105 0 18027 17 10 0 73 3 6 0 0 4524 17 9578 60 330 95 0 23648 17 12 0 71 4 5 0 1 3153 9 6501 33 257 106 0 16369 14 9 0 77 5 7 0 2 1980 108 3759 24 138 98 0 11086 10 6 0 84 6 10 0 7 3306 23 6973 42 222 115 0 17361 14 9 0 77 7 3 0 0 2094 11 4358 20 118 44 0 8980 8 5 0 87 March 4, 2026 at 01:34:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 6638 109 9399 54 376 143 0 24033 22 14 0 64 1 13 0 0 4533 15 9543 65 390 117 0 22725 18 12 0 69 2 12 0 21 4031 109 7880 49 278 117 0 18641 18 10 0 72 3 11 0 0 4243 18 8747 74 363 136 0 22046 17 11 0 72 4 3 0 0 2778 17 5794 45 280 119 0 16101 14 8 0 78 5 5 0 7 2843 112 5671 17 154 96 0 13824 13 8 0 80 6 5 0 7 3122 20 6639 30 241 106 0 16054 13 9 0 78 7 4 0 0 2302 11 4855 16 144 107 0 11373 10 6 0 84 March 4, 2026 at 01:34:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 3442 105 2960 21 192 1196 0 7228 7 7 0 86 1 1 0 0 1600 5 3400 17 195 1123 0 7159 6 6 0 87 2 4 0 18 1340 110 2320 9 153 957 0 5355 5 5 0 90 3 0 0 0 1410 168 2620 10 156 960 0 6699 4 5 0 90 4 7 0 7 862 14 1765 15 163 1095 0 3673 4 5 0 92 5 0 0 2 887 110 1406 4 103 915 0 3416 2 4 0 94 6 1 0 0 1178 44 2438 9 149 1008 0 5097 4 5 0 91 7 0 0 0 893 3 1867 8 112 980 0 2289 2 3 0 95 March 4, 2026 at 01:34:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2107 102 112 0 1 0 0 1 0 1 0 99 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 18 212 103 6 0 0 0 0 266 0 0 0 100 3 0 0 0 14 4 38 1 0 0 0 1806 0 0 0 99 4 0 0 7 24 9 20 0 1 0 0 268 0 0 0 100 5 0 0 2 211 102 4 1 0 0 0 303 0 0 0 100 6 0 0 0 107 51 104 0 1 0 0 1 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 4 0 0 0 100 March 4, 2026 at 01:34:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 108 0 3 0 0 3 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 18 216 103 10 1 2 0 0 266 0 0 0 100 3 0 0 0 18 5 42 1 0 1 0 1805 0 0 0 100 4 0 0 7 25 9 20 0 0 0 0 270 0 0 0 100 5 0 0 2 213 104 4 0 0 0 0 303 0 0 0 100 6 0 0 0 23 6 20 0 2 0 0 8 0 0 0 100 7 0 0 0 111 50 112 0 3 0 0 13 0 0 0 100 March 4, 2026 at 01:34:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 120 0 5 2 0 1 0 1 0 99 1 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 2 0 0 18 212 102 4 0 1 0 0 266 0 0 0 100 3 0 0 0 16 4 38 2 0 0 0 1806 0 0 0 100 4 0 0 7 22 4 16 1 2 0 0 260 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 6 0 0 0 98 46 96 0 2 0 0 0 0 0 0 100 7 0 0 0 27 10 20 0 0 1 0 9 0 0 0 100 March 4, 2026 at 01:34:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 104 0 0 0 0 23 0 1 0 99 1 0 0 0 12 3 8 0 2 0 0 1 0 0 0 100 2 0 0 18 208 102 4 0 1 0 0 266 0 0 0 100 3 0 0 0 13 4 38 0 0 0 0 1802 0 0 0 100 4 0 0 7 21 4 16 0 0 0 0 260 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 6 0 0 0 111 53 106 0 0 0 0 4 0 0 0 100 7 0 0 0 18 6 14 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:34:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2111 103 114 0 3 2 0 2 0 1 0 99 1 0 0 0 19 1 18 0 3 1 0 0 0 0 0 100 2 0 0 18 209 103 6 0 0 2 0 266 0 0 0 100 3 0 0 0 18 4 43 2 1 0 0 1804 0 0 0 100 4 0 0 7 29 6 26 0 1 1 0 268 0 0 0 100 5 0 0 2 222 108 8 1 0 0 0 306 0 0 0 100 6 0 0 0 114 51 114 0 0 0 0 14 0 0 0 100 7 0 0 0 22 7 18 0 1 0 0 7 0 0 0 100 March 4, 2026 at 01:34:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 0 0 0 0 1 0 99 1 0 0 0 11 1 6 0 1 1 0 0 0 0 0 100 2 0 0 17 213 103 12 1 1 1 0 266 0 0 0 100 3 0 0 0 14 4 38 1 0 0 0 1802 0 0 0 99 4 0 0 7 20 4 16 0 0 0 0 260 0 0 0 100 5 0 0 3 210 102 2 0 0 0 0 300 0 0 0 100 6 0 0 0 108 51 104 0 0 0 0 2 0 0 0 100 7 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:34:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1840 0 0 2919 106 1763 823 120 98 1 5086 64 6 0 30 1 23 0 0 847 2 1746 803 126 96 0 4766 66 4 0 30 2 49 0 705 878 107 1430 702 112 64 0 4398 67 4 0 29 3 11 0 0 686 13 1280 589 113 62 0 5860 67 4 0 29 4 1 0 7 710 7 1495 646 101 68 0 4854 67 4 0 29 5 0 0 2 1010 103 1573 782 122 85 0 4595 67 4 0 29 6 4 0 0 812 30 1583 764 100 69 1 4206 67 4 0 29 7 258 0 0 858 7 1706 794 110 78 0 4759 67 4 0 29 March 4, 2026 at 01:34:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2305 102 442 134 69 11 0 1220 15 2 0 84 1 2 0 0 232 3 369 101 69 14 0 1544 15 1 0 84 2 1 0 144 335 105 270 87 55 10 0 1297 17 1 0 82 3 4 0 0 256 43 463 110 57 7 0 1090 16 1 0 84 4 12 0 7 170 9 326 101 56 14 0 3318 16 1 0 83 5 0 0 2 359 107 271 96 43 14 0 1220 17 1 0 82 6 3 0 0 197 8 371 124 60 15 0 1557 17 1 0 82 7 24 0 0 151 3 333 131 49 8 0 1219 16 1 0 83 March 4, 2026 at 01:34:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 108 0 0 1 0 0 0 1 0 99 1 0 0 0 12 2 4 0 0 1 0 0 0 0 0 100 2 3 0 21 207 102 2 0 0 1 0 268 0 0 0 100 3 0 0 0 110 51 104 0 2 0 0 0 0 0 0 100 4 0 0 7 32 10 58 1 2 1 0 2080 0 0 0 99 5 0 0 7 219 105 10 1 0 1 0 301 0 0 0 100 6 0 0 0 12 3 2 0 0 1 0 1 0 0 0 100 7 0 0 0 24 9 16 0 0 1 0 11 0 0 0 100 March 4, 2026 at 01:34:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 112 0 1 0 0 0 0 1 0 99 1 0 0 0 12 1 10 0 1 2 0 0 0 0 0 100 2 0 0 17 208 102 4 1 0 3 0 266 0 0 0 100 3 0 0 0 107 50 104 0 0 2 0 0 0 0 0 100 4 0 0 7 27 9 54 1 0 0 0 2086 0 0 0 99 5 0 0 3 226 109 16 0 1 0 0 306 0 0 0 100 6 0 0 0 14 2 12 0 0 1 0 14 0 0 0 100 7 0 0 0 24 8 20 0 0 0 0 12 0 0 0 100 March 4, 2026 at 01:34:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 110 0 0 0 0 1 0 1 0 99 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 17 206 102 2 0 0 0 0 266 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 27 8 50 3 0 2 0 2077 0 0 0 99 5 0 0 3 219 104 18 0 1 1 0 300 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 18 6 12 1 0 0 0 6 0 0 0 100 March 4, 2026 at 01:34:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17871 0 9 2768 107 2208 530 615 351 22 6118 42 10 0 49 1 14782 0 17 657 5 2051 513 577 332 19 6128 39 8 0 53 2 7895 0 215 587 104 943 158 250 177 19 5176 44 5 0 51 3 12229 0 0 611 17 1789 472 450 300 17 5678 43 7 0 50 4 13974 0 17 665 17 2018 491 571 352 22 8437 36 8 0 56 5 6989 0 22 683 118 1147 249 305 151 23 4623 42 5 0 54 6 3907 0 14 325 6 641 83 184 91 18 4152 46 4 0 49 7 16896 0 0 585 8 1865 503 462 369 29 6226 42 9 0 50 March 4, 2026 at 01:34:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1027 0 7 2947 103 1628 170 415 4274 4 5671 27 10 0 64 1 1203 0 7 934 13 1856 185 423 2438 7 6340 32 6 0 62 2 110 0 592 849 106 1437 206 366 2400 1 6808 36 8 0 56 3 744 0 0 1203 292 2115 265 515 4060 3 7085 46 10 0 45 4 1284 0 14 921 9 1872 224 454 3532 2 8982 51 9 0 40 5 535 0 3 1001 109 1556 131 323 3958 2 4654 30 8 0 62 6 507 0 0 793 16 1617 174 444 3991 1 6508 47 9 0 44 7 951 0 0 922 10 1991 197 473 4271 1 5840 22 8 0 70 March 4, 2026 at 01:34:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2108 101 91 0 5 0 0 0 0 1 0 99 1 0 0 7 21 2 22 0 3 1 0 300 0 0 0 100 2 0 0 11 225 104 10 0 2 0 0 260 0 0 0 100 3 0 0 0 12 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 36 13 54 1 0 1 0 1707 0 0 0 99 5 0 0 2 219 102 8 0 2 0 0 0 0 0 0 100 6 0 0 0 130 50 120 0 1 0 0 0 0 0 0 100 7 0 0 0 16 3 6 0 1 0 0 294 0 0 0 100 March 4, 2026 at 01:34:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 100 109 0 5 0 0 0 0 1 0 99 1 0 0 0 21 4 14 0 3 1 0 302 0 0 0 100 2 0 0 11 215 104 8 1 1 0 0 260 0 0 0 100 3 0 0 0 13 0 14 0 1 0 0 1 0 0 0 100 4 0 0 14 37 13 62 2 1 1 0 1716 0 0 0 99 5 0 0 2 229 108 14 0 2 0 0 9 0 0 0 100 6 0 0 0 108 50 104 0 1 0 0 1 0 0 0 100 7 0 0 0 15 2 10 0 1 0 0 294 0 0 0 100 March 4, 2026 at 01:34:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2104 100 113 0 0 0 0 0 0 1 0 99 1 0 0 0 28 3 6 0 0 0 0 301 0 0 0 100 2 0 0 11 227 104 6 0 0 0 0 260 0 0 0 100 3 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 45 13 54 1 0 0 0 1702 0 0 0 99 5 0 0 2 227 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 121 50 100 0 0 0 0 0 0 0 0 100 7 0 0 0 29 2 8 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:34:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2119 102 127 0 5 2 0 839 0 1 0 99 1 0 0 0 31 6 28 2 4 0 0 364 0 0 0 100 2 0 0 11 277 133 78 0 5 0 0 294 0 0 0 100 3 32 0 0 24 3 28 0 4 5 0 49 0 0 0 100 4 10 0 14 46 13 87 1 4 7 0 2544 0 1 0 99 5 4 0 2 232 106 34 0 3 1 0 43 0 0 0 100 6 0 0 0 58 22 68 0 5 0 0 84 0 0 0 100 7 0 0 0 18 3 12 0 2 0 0 374 0 0 0 100 March 4, 2026 at 01:34:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2341 110 625 0 145 1934 0 9 0 5 0 94 1 0 0 0 250 2 577 0 151 2181 0 300 0 4 0 96 2 0 0 11 589 130 741 0 126 1709 0 260 0 5 0 95 3 0 0 0 460 234 600 0 138 1905 0 0 0 5 0 95 4 0 0 14 309 24 652 3 151 1959 0 977 0 5 0 95 5 0 0 2 464 106 611 1 124 1822 0 717 0 4 0 96 6 0 0 0 227 2 505 0 137 1858 0 1 0 4 0 96 7 0 0 0 216 1 471 1 112 1746 0 294 0 4 0 96 March 4, 2026 at 01:34:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 122 0 1 1 0 9 0 1 0 99 1 0 0 0 20 7 12 0 0 1 0 308 0 0 0 100 2 0 0 14 210 103 4 0 0 1 0 260 0 0 0 100 3 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 4 0 0 14 119 57 112 1 0 0 0 569 0 0 0 100 5 0 0 7 219 104 38 1 0 1 0 1127 0 0 0 100 6 0 0 0 13 2 6 0 0 1 0 0 0 0 0 100 7 0 0 0 14 4 6 0 0 1 0 295 0 0 0 100 March 4, 2026 at 01:34:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 106 124 0 0 0 0 6 0 1 0 99 1 0 0 0 17 4 14 0 0 0 0 310 0 0 0 100 2 0 0 11 212 103 8 1 0 0 0 278 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 1 0 14 122 58 122 0 0 0 0 602 0 0 0 100 5 1 0 2 225 109 42 2 0 2 0 1133 0 0 0 100 6 0 0 0 18 1 18 0 2 0 0 5 0 0 0 100 7 0 0 0 14 2 10 1 1 0 0 294 0 0 0 100 March 4, 2026 at 01:34:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2121 108 132 0 1 0 0 27 0 1 0 99 1 0 0 0 16 4 8 1 0 0 0 305 0 0 0 100 2 0 0 11 209 103 4 0 0 0 0 260 0 0 0 100 3 0 0 0 11 1 8 0 0 0 0 13 0 0 0 100 4 0 0 14 111 54 106 1 0 0 0 566 0 0 0 100 5 3 0 2 219 104 48 0 0 0 0 1141 0 0 0 100 6 0 0 0 15 2 12 0 0 1 0 25 0 0 0 100 7 0 0 0 13 2 12 0 1 1 0 294 0 0 0 100 March 4, 2026 at 01:34:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 114 0 0 0 0 6 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 2 0 0 11 210 103 6 0 1 0 0 263 0 0 0 100 3 0 0 0 13 2 10 0 1 0 0 4 0 0 0 100 4 0 0 14 113 55 110 0 0 0 0 571 0 0 0 100 5 0 0 2 229 110 50 1 0 1 0 1137 0 0 0 100 6 0 0 0 12 1 8 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:34:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 16 4 14 0 1 1 0 302 0 0 0 100 2 0 0 11 212 104 8 0 0 0 0 260 0 0 0 100 3 0 0 0 22 7 20 0 0 2 0 15 0 0 0 100 4 1 0 14 114 55 110 1 0 3 0 570 0 0 0 100 5 20 0 2 217 104 40 1 1 0 0 1131 0 0 0 100 6 1 0 0 15 3 10 1 0 0 0 10 0 0 0 100 7 0 0 0 12 2 8 0 1 0 0 294 0 0 0 100 March 4, 2026 at 01:34:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 13 3 8 0 0 0 0 301 0 0 0 100 2 0 0 11 213 103 12 1 1 0 0 260 0 0 0 100 3 0 0 0 19 7 14 0 0 0 0 7 0 0 0 100 4 0 0 14 114 56 110 0 0 0 0 570 0 0 0 100 5 0 0 2 214 103 36 1 0 1 0 1112 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 6 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:34:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 2 0 0 0 0 1 0 99 1 0 0 0 14 4 8 1 0 0 0 305 0 0 0 100 2 0 0 11 209 103 4 0 0 0 0 260 0 0 0 100 3 0 0 0 18 6 14 0 0 0 0 9 0 0 0 100 4 0 0 14 76 34 76 0 0 0 0 582 0 0 0 100 5 0 0 2 278 132 94 1 3 0 0 1119 0 1 0 99 6 0 0 0 14 1 10 0 0 0 0 5 0 0 0 100 7 0 0 0 12 2 8 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:34:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 2 0 0 11 211 103 6 0 0 0 0 260 0 0 0 100 3 0 0 0 21 6 20 0 1 0 0 9 0 0 0 100 4 0 0 14 12 5 8 0 0 0 0 567 0 0 0 100 5 0 0 2 313 153 136 0 0 0 0 1113 0 1 0 99 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:34:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 116 0 0 0 0 3 0 1 0 99 1 0 0 0 13 4 8 0 0 0 0 302 0 0 0 100 2 0 0 10 210 103 6 0 0 0 0 263 0 0 0 100 3 0 0 0 22 7 16 0 0 2 0 11 0 0 0 100 4 0 0 14 16 4 18 1 1 2 0 570 0 0 0 100 5 0 0 3 316 153 140 1 0 0 0 1118 0 1 0 99 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:34:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 124 1 0 0 0 7 0 1 0 99 1 0 0 0 15 5 10 0 0 0 0 304 0 0 0 100 2 0 0 11 213 104 8 1 0 0 0 260 0 0 0 100 3 0 0 0 8 0 6 0 0 0 0 0 0 0 0 100 4 0 0 14 14 5 12 0 0 3 0 569 0 0 0 100 5 0 0 2 315 153 138 1 0 3 0 1113 0 1 0 99 6 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 7 0 0 0 12 2 8 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:34:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 106 122 0 0 0 0 9 0 1 0 99 1 0 0 0 16 5 8 1 0 1 0 305 0 0 0 100 2 0 0 11 209 103 4 0 0 1 0 260 0 0 0 100 3 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 4 0 0 14 20 8 14 0 0 2 0 568 0 0 0 100 5 0 0 2 320 154 148 1 1 1 0 1113 0 1 0 99 6 0 0 0 12 2 6 0 0 1 0 0 0 0 0 100 7 0 0 0 13 4 6 0 0 1 0 295 0 0 0 100 March 4, 2026 at 01:34:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 126 0 1 0 0 9 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 2 0 0 10 209 103 4 0 0 0 0 260 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 19 6 20 0 0 0 0 582 0 0 0 100 5 0 0 3 329 158 148 1 0 0 0 1118 0 1 0 99 6 0 0 0 14 1 10 0 0 0 0 5 0 0 0 100 7 0 0 0 12 2 8 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:34:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 2927 108 2179 11 37 18 0 9455 4 3 0 92 1 17 0 0 612 6 1362 11 42 9 0 3473 3 2 0 95 2 171 0 11 865 104 1361 6 28 13 1 2879 2 2 0 96 3 6 0 0 464 0 946 7 33 11 0 2514 2 1 0 97 4 0 0 14 242 4 444 5 26 21 0 1894 1 1 0 98 5 15 0 2 585 114 911 5 17 1 0 4826 2 1 0 97 6 2 0 0 334 37 567 6 18 47 0 2802 5 1 0 94 7 0 0 0 172 5 320 2 12 2 0 777 1 0 0 99 March 4, 2026 at 01:34:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 6606 109 9536 74 363 108 0 25397 24 15 0 61 1 19 0 2 4632 13 9685 65 401 131 0 23314 20 13 0 67 2 2 0 4 4477 111 8845 57 275 95 0 20762 18 11 0 71 3 31 0 7 3783 21 7788 67 331 78 0 18733 15 10 0 75 4 3 0 0 2840 22 5780 44 256 98 0 14634 13 8 0 79 5 12 0 16 2509 118 4904 35 166 96 0 11860 11 7 0 82 6 0 0 0 3035 14 6405 40 251 108 0 16215 13 8 0 79 7 2 0 0 2667 11 5643 23 132 62 0 12549 10 7 0 83 March 4, 2026 at 01:34:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 6681 111 9481 128 574 740 0 25363 23 16 0 62 1 7 0 0 4626 13 9425 125 529 677 0 22569 20 14 0 67 2 6 0 3 4165 123 8066 72 386 619 0 17926 17 11 0 72 3 3 0 0 4951 112 10175 109 479 610 0 21372 17 13 0 70 4 8 0 14 2862 13 5945 60 383 689 0 14674 13 9 0 78 5 7 0 3 2541 114 4922 55 250 781 0 13921 12 9 0 79 6 8 0 0 3415 10 7303 54 329 641 0 17336 14 10 0 76 7 9 0 7 2018 19 4179 51 218 609 0 9549 8 6 0 86 March 4, 2026 at 01:34:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 6295 105 8862 69 412 103 0 22452 20 13 0 67 1 8 0 0 3995 10 8701 80 408 139 0 23281 20 13 0 67 2 4 0 5 3420 110 6446 35 272 77 0 13480 12 8 0 80 3 4 0 0 3906 6 8059 61 327 103 0 17553 14 10 0 76 4 5 0 14 2337 13 4646 28 225 84 0 12267 10 7 0 83 5 4 0 1 1790 116 3392 20 121 87 0 10898 10 6 0 84 6 4 0 0 2953 17 6282 40 235 70 0 14183 10 7 0 82 7 6 0 7 1857 24 3859 16 144 60 0 10202 9 5 0 86 March 4, 2026 at 01:34:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 70 0 2 0 0 0 0 1 0 99 1 0 0 0 23 4 18 0 1 0 0 296 0 0 0 100 2 0 0 3 208 101 6 0 1 1 0 0 0 0 0 100 3 0 0 0 43 0 37 0 0 0 0 0 0 0 0 100 4 0 0 14 20 6 20 0 1 0 0 578 0 0 0 100 5 1 0 3 236 116 24 1 0 0 0 315 0 0 0 100 6 0 0 0 13 1 38 1 0 0 0 1126 0 0 0 100 7 0 0 7 113 52 110 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:34:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 104 0 0 0 0 0 0 1 0 99 1 0 0 0 17 2 10 0 0 0 0 294 0 0 0 100 2 0 0 4 210 101 4 0 2 0 0 3 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 18 4 22 0 3 0 0 566 0 0 0 100 5 0 0 2 234 113 24 1 0 0 0 311 0 0 0 100 6 0 0 0 10 2 34 1 0 0 0 1123 0 0 0 100 7 0 0 7 108 52 104 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:34:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 0 0 0 3 0 1 0 99 1 0 0 0 26 6 20 1 0 0 0 303 0 0 0 100 2 0 0 3 207 101 2 0 0 0 0 1 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 19 6 16 1 0 0 0 567 0 0 0 100 5 0 0 3 231 112 24 0 0 0 0 314 0 0 0 100 6 0 0 0 10 1 36 1 0 0 0 1124 0 0 0 100 7 0 0 7 110 52 106 1 0 0 0 263 0 0 0 100 March 4, 2026 at 01:34:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2288 102 476 2 47 481 0 0 0 2 0 98 1 0 0 0 129 2 248 0 55 483 0 298 0 2 0 98 2 0 0 4 349 101 302 1 43 489 0 0 0 1 0 99 3 0 0 0 228 125 376 1 42 513 0 331 0 2 0 98 4 0 0 14 115 6 222 2 55 552 0 566 0 1 0 99 5 0 0 2 328 110 244 2 41 547 0 309 0 1 0 98 6 0 0 0 128 7 280 2 61 524 0 1125 0 2 0 98 7 0 0 7 199 47 315 1 46 492 0 260 0 1 0 99 March 4, 2026 at 01:34:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 110 0 1 1 0 0 0 1 0 99 1 0 0 0 14 4 6 0 0 1 0 299 0 0 0 100 2 0 0 7 211 102 2 0 0 1 0 0 0 0 0 100 3 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 4 0 0 14 20 7 14 0 0 1 0 568 0 0 0 100 5 0 0 7 233 110 24 1 1 1 0 311 0 0 0 100 6 0 0 0 19 4 46 1 1 1 0 1125 0 0 0 100 7 0 0 7 114 54 110 0 1 0 0 262 0 0 0 100 March 4, 2026 at 01:34:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 117 0 1 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 2 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 9 0 5 0 0 0 0 0 0 0 0 100 4 1 0 14 29 10 30 0 0 0 0 601 0 0 0 100 5 0 0 2 237 118 20 0 0 1 0 311 0 0 0 100 6 1 0 0 18 4 44 1 1 0 0 1130 0 0 0 100 7 0 0 7 112 52 110 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:34:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2188 106 248 11 29 5 0 720 3 1 0 96 1 8 0 0 118 6 209 13 40 5 0 1170 5 0 0 95 2 31 0 101 298 103 268 49 36 9 0 934 3 1 0 96 3 1331 0 0 86 1 144 17 29 0 1 795 6 1 0 93 4 13 0 14 78 6 95 10 28 0 0 1088 6 0 0 94 5 11 0 3 295 110 143 8 22 3 0 882 4 0 0 96 6 4 0 0 73 2 228 19 31 7 0 2010 5 1 0 94 7 21 0 7 164 46 210 8 20 4 0 938 4 0 0 96 March 4, 2026 at 01:34:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2545 107 757 31 136 9 0 3395 25 2 0 73 1 2 0 0 517 15 841 38 131 14 0 3064 29 2 0 69 2 0 0 270 591 106 677 35 114 23 0 2797 24 2 0 75 3 5 0 0 455 15 673 28 134 10 0 3947 23 2 0 76 4 2 0 14 430 15 661 34 127 17 0 3803 25 2 0 73 5 5 0 2 582 108 628 18 108 12 0 3359 19 2 0 80 6 0 0 0 430 14 704 25 132 23 0 4231 18 1 0 81 7 0 0 7 413 11 702 18 85 9 0 4374 8 2 0 90 March 4, 2026 at 01:34:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2504 104 786 29 121 20 0 3424 27 2 0 70 1 0 0 0 416 6 660 43 137 21 0 3418 29 2 0 69 2 0 0 108 562 110 605 29 99 22 0 2793 28 2 0 70 3 0 0 0 449 11 754 30 129 15 0 4272 23 2 0 75 4 0 0 14 438 12 736 22 125 11 0 4008 22 2 0 77 5 0 0 3 588 106 664 17 105 19 0 2959 13 2 0 86 6 0 0 0 415 18 703 27 120 16 0 3701 18 1 0 81 7 0 0 0 391 10 738 17 106 18 0 4470 14 2 0 85 March 4, 2026 at 01:34:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2349 105 474 24 88 7 0 1915 19 2 0 80 1 1 0 0 293 7 455 21 94 8 0 2236 13 1 0 86 2 2 0 131 416 106 350 17 69 10 0 1623 16 1 0 83 3 2 0 7 286 3 539 22 84 5 0 3942 15 1 0 84 4 0 0 14 290 12 472 18 79 5 0 2484 19 1 0 80 5 3 0 1 473 116 431 14 77 10 0 1747 9 1 0 90 6 5 0 0 251 10 407 15 78 8 0 2184 12 1 0 86 7 0 0 0 247 20 370 11 54 10 0 2551 11 1 0 88 March 4, 2026 at 01:34:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 116 0 1 0 0 3 0 1 0 99 1 0 0 0 16 4 11 0 2 3 0 18 0 0 0 100 2 0 0 3 220 103 16 0 0 1 0 8 0 0 0 100 3 1 0 7 16 3 46 2 1 1 0 1394 0 0 0 99 4 6 0 14 21 6 16 2 1 0 0 584 0 0 0 100 5 0 0 3 231 113 22 0 2 0 0 17 0 0 0 100 6 0 0 0 23 4 26 0 1 0 0 20 0 0 0 100 7 0 0 0 113 52 110 0 0 1 0 595 0 0 0 100 March 4, 2026 at 01:34:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 3 0 0 7 12 3 38 1 0 0 0 1391 0 0 0 100 4 0 0 14 12 4 10 0 0 0 0 566 0 0 0 100 5 0 0 3 217 105 10 0 0 0 0 3 0 0 0 100 6 0 0 0 24 8 20 0 0 0 0 11 0 0 0 100 7 0 0 0 109 52 104 0 0 0 0 595 0 0 0 100 March 4, 2026 at 01:34:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 923 0 113 2134 100 180 0 14 7 13 164 0 1 0 99 1 67 0 0 59 1 83 0 15 5 10 197 0 0 0 100 2 17 0 7 245 102 42 0 9 3 6 63 0 0 0 100 3 727 0 7 51 3 90 3 8 8 9 7917 2 1 0 97 4 50 0 14 43 4 40 0 8 4 1 648 0 0 0 100 5 8 0 2 244 105 35 0 6 1 2 78 0 0 0 100 6 1843 0 0 135 46 139 2 11 4 10 388 0 1 0 99 7 24 0 0 70 15 83 1 11 7 8 722 0 0 0 100 March 4, 2026 at 01:34:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2304 100 482 21 66 83 0 1282 4 2 0 94 1 34 0 0 328 2 626 27 68 132 3 2083 4 1 0 95 2 0 0 129 300 102 174 8 12 167 0 2438 5 2 0 94 3 1 0 14 209 11 385 16 31 46 0 3614 4 2 0 94 4 25 0 14 54 4 47 5 9 134 3 3566 6 2 0 92 5 0 0 11 527 103 605 22 58 104 0 1867 4 3 0 93 6 4 0 0 365 39 617 16 39 141 5 2117 4 1 0 95 7 0 0 0 385 15 702 25 52 10 1 1990 3 1 0 97 March 4, 2026 at 01:34:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 109 0 1 0 0 23 0 1 0 99 1 0 0 0 34 9 20 0 1 1 0 6 0 0 0 100 2 0 0 4 212 103 4 0 1 1 0 0 0 0 0 100 3 0 0 7 18 5 38 1 1 1 0 1377 0 0 0 100 4 2 0 21 18 6 10 1 1 1 0 581 0 0 0 100 5 0 0 2 218 105 10 0 0 1 0 2 0 0 0 100 6 0 0 0 17 4 6 0 1 1 0 2 0 0 0 100 7 0 0 0 116 54 106 0 0 1 0 595 0 0 0 100 March 4, 2026 at 01:34:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2107 100 107 0 0 0 0 0 0 1 0 99 1 0 0 0 47 7 26 1 0 0 0 19 0 0 0 100 2 0 0 4 228 103 8 0 0 0 0 18 0 0 0 100 3 0 0 7 28 3 38 1 0 0 0 1374 0 0 0 100 4 0 0 14 33 4 16 0 1 0 0 570 0 0 0 100 5 0 0 2 245 110 24 0 2 0 0 12 0 0 0 100 6 0 0 0 29 1 12 0 1 0 0 12 0 0 0 100 7 0 0 0 128 52 108 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:34:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 101 106 0 0 0 0 1 0 1 0 99 1 0 0 0 26 6 20 0 0 0 0 6 0 0 0 100 2 0 0 4 212 103 4 0 0 0 0 0 0 0 0 100 3 0 0 7 12 3 36 1 0 1 0 1375 0 0 0 100 4 0 0 14 11 4 6 0 0 0 0 566 0 0 0 100 5 0 0 2 216 103 8 0 1 0 0 0 0 0 0 100 6 0 0 0 15 1 14 0 1 0 0 1 0 0 0 100 7 0 0 0 112 52 106 1 0 0 0 594 0 0 0 100 March 4, 2026 at 01:34:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 116 0 3 0 0 27 0 1 0 99 1 0 0 0 34 7 34 0 0 3 0 43 0 0 0 100 2 0 0 4 216 103 16 0 4 0 0 816 0 0 0 100 3 0 0 7 20 4 52 1 4 1 0 1401 0 0 0 99 4 0 0 14 27 5 36 1 4 0 0 1427 0 0 0 99 5 0 0 2 224 106 22 0 3 0 0 51 0 0 0 100 6 0 0 0 32 10 34 0 4 0 0 121 0 0 0 100 7 0 0 0 97 43 92 1 3 1 0 636 0 0 0 100 March 4, 2026 at 01:35:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2331 101 590 2 111 1747 0 256 0 4 0 96 1 0 0 0 255 0 553 1 140 1836 0 0 0 4 0 96 2 0 0 4 449 105 543 3 124 1730 0 0 0 4 0 96 3 0 0 7 477 244 650 5 158 1893 1 1376 0 4 0 96 4 0 0 8 257 4 570 5 146 1924 0 310 0 5 0 95 5 0 0 2 541 121 692 2 123 1636 0 0 0 4 0 96 6 0 0 0 285 27 573 1 116 1668 0 1 0 4 0 96 7 0 0 0 199 7 434 2 88 1599 0 602 0 4 0 96 March 4, 2026 at 01:35:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 106 0 0 0 0 266 0 1 0 99 1 0 0 0 11 1 10 0 1 1 0 2 0 0 0 100 2 0 0 4 208 101 2 0 1 0 0 0 0 0 0 100 3 0 0 7 27 7 52 1 0 0 0 1376 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 5 0 0 2 313 153 106 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 24 8 18 1 1 1 0 600 0 0 0 100 March 4, 2026 at 01:35:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 106 0 0 0 0 266 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 3 0 0 7 28 7 54 1 0 0 0 1377 0 0 0 100 4 0 0 0 15 3 10 0 0 0 0 306 0 0 0 100 5 0 0 2 322 159 112 0 0 0 0 8 0 0 0 100 6 0 0 0 11 1 10 0 0 0 0 12 0 0 0 100 7 0 0 0 24 7 20 1 0 0 0 602 0 0 0 100 March 4, 2026 at 01:35:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 101 112 0 2 0 0 272 0 1 0 99 1 0 0 0 15 2 14 0 1 0 0 14 0 0 0 100 2 0 0 3 211 101 6 0 1 2 0 0 0 0 0 100 3 0 0 7 28 7 54 1 1 0 0 1402 0 0 0 100 4 0 0 0 12 3 8 0 1 0 0 305 0 0 0 100 5 0 0 3 313 153 106 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 4 0 1 0 0 1 0 0 0 100 7 0 0 0 28 9 24 2 0 0 0 616 0 0 0 100 March 4, 2026 at 01:35:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2102 101 108 0 1 0 0 266 0 1 0 99 1 0 0 0 7 0 4 0 0 0 0 6 0 0 0 100 2 0 0 4 212 101 8 0 0 1 0 3 0 0 0 100 3 0 0 7 26 6 50 2 0 1 0 1376 0 0 0 100 4 0 0 0 12 3 6 1 0 1 0 304 0 0 0 100 5 0 0 2 313 153 106 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 10 1 0 0 0 5 0 0 0 100 7 0 0 0 22 8 16 0 0 0 0 605 0 0 0 100 March 4, 2026 at 01:35:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 110 0 1 1 0 266 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 20 0 7 29 8 56 0 0 0 0 1384 0 0 0 100 4 0 0 0 11 3 4 0 0 0 0 300 0 0 0 100 5 0 0 3 318 154 114 0 0 3 0 5 0 0 0 100 6 0 0 0 20 7 16 0 0 0 0 9 0 0 0 100 7 0 0 0 10 2 6 0 0 1 0 594 0 0 0 100 March 4, 2026 at 01:35:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 108 0 1 0 0 266 0 1 0 99 1 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 2 0 0 3 208 101 2 0 1 1 0 0 0 0 0 100 3 0 0 7 28 6 54 1 1 2 0 1370 0 0 0 100 4 0 0 0 14 5 6 0 0 1 0 301 0 0 0 100 5 0 0 3 315 154 108 0 0 1 0 1 0 0 0 100 6 0 0 0 21 8 14 0 0 1 0 8 0 0 0 100 7 0 0 0 14 4 6 1 0 1 0 596 0 0 0 100 March 4, 2026 at 01:35:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 112 0 1 0 0 266 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 7 30 7 56 1 0 1 0 1370 0 0 0 100 4 0 0 0 19 4 16 0 1 0 0 326 0 0 0 100 5 0 0 3 319 158 110 0 0 0 0 7 0 0 0 100 6 0 0 0 22 6 20 0 0 0 0 17 0 0 0 100 7 0 0 0 13 2 8 1 0 0 0 594 0 0 0 100 March 4, 2026 at 01:35:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 94 0 3 0 0 267 0 1 0 99 1 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 7 26 6 50 2 0 1 0 1370 0 0 0 100 4 0 0 0 11 3 4 1 0 0 0 300 0 0 0 100 5 0 0 3 332 153 124 0 2 0 0 0 0 0 0 100 6 0 0 0 23 8 16 0 0 0 0 11 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:35:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 112 0 0 0 0 267 0 1 0 99 1 0 0 0 10 1 8 0 1 0 0 7 0 0 0 100 2 0 0 2 207 101 2 0 0 1 0 3 0 0 0 100 3 0 0 7 28 7 54 1 1 1 0 1378 0 0 0 100 4 0 0 0 13 3 8 0 0 1 0 303 0 0 0 100 5 0 0 4 318 154 114 0 1 1 0 1 0 0 0 100 6 0 0 0 24 8 18 1 1 0 0 11 0 0 0 100 7 0 0 0 10 2 8 0 1 0 0 597 0 0 0 100 March 4, 2026 at 01:35:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 108 0 0 1 0 265 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 4 208 101 2 0 1 0 0 0 0 0 0 100 3 0 0 7 24 5 50 1 0 0 0 1370 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 5 0 0 2 320 155 114 0 0 1 0 0 0 0 0 100 6 0 0 0 22 6 24 0 2 3 0 6 0 0 0 100 7 0 0 0 11 2 6 1 0 0 0 593 0 0 0 100 March 4, 2026 at 01:35:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 104 0 1 0 0 266 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 2 0 0 4 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 7 29 8 54 1 0 0 0 1376 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 5 0 0 2 316 153 108 0 1 0 0 0 0 0 0 100 6 0 0 0 18 6 14 1 1 0 0 9 0 0 0 100 7 0 0 0 10 2 4 1 0 0 0 595 0 0 0 100 March 4, 2026 at 01:35:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 108 0 0 0 0 266 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 4 209 102 0 0 0 0 0 0 0 0 0 100 3 0 0 7 27 6 52 2 0 0 0 1370 0 0 0 100 4 0 0 0 15 3 8 1 0 0 0 305 0 0 0 100 5 1 0 2 322 159 112 0 0 0 0 8 0 0 0 100 6 1 0 0 29 9 30 0 2 0 0 20 0 0 0 100 7 0 0 0 16 2 18 0 1 0 0 594 0 0 0 100 March 4, 2026 at 01:35:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 78 0 14 2833 101 1619 16 62 21 0 6020 4 3 0 92 1 17 0 0 1136 2 2748 18 65 27 0 10788 4 3 0 93 2 225 0 4 839 101 1322 7 43 8 0 3198 3 2 0 95 3 41 0 7 609 12 1222 18 55 5 0 3768 2 2 0 96 4 5 0 0 362 3 731 7 40 11 0 2492 2 1 0 97 5 6 0 2 590 147 695 4 26 17 0 1866 2 1 0 97 6 50 0 0 496 6 1036 9 33 26 0 4134 7 2 0 91 7 217 0 0 528 2 1113 7 20 12 0 2819 2 1 0 96 March 4, 2026 at 01:35:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 6676 108 9699 87 381 153 0 23308 22 14 0 64 1 11 0 21 4403 7 9185 84 401 119 0 23619 19 12 0 69 2 10 0 4 3952 112 7610 59 258 118 0 18167 16 10 0 74 3 10 0 0 4380 18 9208 74 313 79 0 20112 17 11 0 72 4 6 0 0 2813 10 5827 38 233 138 0 16717 15 9 0 77 5 6 0 2 2443 117 4573 30 170 118 0 12829 11 7 0 82 6 4 0 0 3422 16 7313 57 257 110 0 16400 13 9 0 78 7 6 0 0 2284 15 4803 34 167 52 0 12859 12 7 0 82 March 4, 2026 at 01:35:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 6852 106 10065 118 503 517 0 26002 24 16 0 60 1 10 0 23 4906 15 10386 105 559 678 0 25228 22 15 0 64 2 9 0 4 4139 111 8286 72 387 704 0 22058 19 13 0 69 3 10 0 0 4807 139 10101 110 480 748 0 20609 17 12 0 71 4 13 0 0 3026 14 6138 53 375 654 0 14433 14 9 0 77 5 15 0 2 2189 119 4163 45 251 640 0 10062 9 7 0 84 6 4 0 0 2740 16 5704 47 315 707 0 13072 10 8 0 82 7 0 0 0 2041 11 4450 37 202 662 0 11722 10 7 0 83 March 4, 2026 at 01:35:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 5626 115 7442 62 286 93 0 18166 19 11 0 70 1 8 0 0 3597 12 7723 57 319 86 0 20050 17 11 0 73 2 9 0 28 3267 112 6418 39 207 118 0 16250 12 8 0 79 3 2 0 0 3796 10 8177 50 258 61 0 19316 15 10 0 75 4 6 0 0 2387 18 4839 21 222 84 0 12453 11 7 0 82 5 1 0 7 1873 118 3390 14 127 54 0 8048 7 5 0 88 6 14 0 0 2634 13 5547 26 180 88 0 13653 12 7 0 81 7 0 0 0 1531 10 3147 18 96 25 0 7565 6 4 0 90 March 4, 2026 at 01:35:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 150 212 0 2 0 0 0 0 1 0 99 1 0 0 0 22 7 14 0 0 0 0 10 0 0 0 100 2 0 0 25 214 105 38 3 0 0 0 1646 0 0 0 99 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 0 12 2 6 0 0 0 0 305 0 0 0 100 5 0 0 2 222 108 12 0 1 0 0 7 0 0 0 100 6 0 0 0 17 4 16 0 0 0 0 17 0 0 0 100 7 0 0 0 13 2 10 0 0 0 0 595 0 0 0 100 March 4, 2026 at 01:35:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 210 0 2 0 0 1 0 1 0 99 1 0 0 0 29 9 26 0 1 1 0 10 0 0 0 100 2 0 0 24 212 105 38 1 0 0 0 1642 0 0 0 99 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 3 218 103 9 0 2 0 0 0 0 0 0 100 6 0 0 0 12 2 8 1 0 0 0 4 0 0 0 100 7 0 0 0 12 2 6 1 1 0 0 595 0 0 0 100 March 4, 2026 at 01:35:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 218 0 0 0 0 4 0 1 0 99 1 0 0 0 25 8 18 1 0 0 0 14 0 0 0 100 2 1 0 24 220 105 54 0 2 1 0 1670 0 0 0 99 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 14 4 10 0 0 0 0 304 0 0 0 100 5 0 0 3 217 104 10 0 0 0 0 1 0 0 0 100 6 0 0 0 12 3 8 0 0 0 0 2 0 0 0 100 7 0 0 0 11 2 6 1 0 0 0 596 0 0 0 100 March 4, 2026 at 01:35:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2216 126 335 0 38 494 0 1 0 2 0 98 1 0 0 7 96 2 208 0 44 521 0 260 0 1 0 99 2 0 0 17 364 129 296 3 46 495 0 1384 0 1 0 99 3 0 0 0 199 110 183 0 50 407 0 0 0 1 0 99 4 0 0 0 113 8 225 2 51 497 0 310 0 1 0 98 5 0 0 3 308 103 211 0 33 461 0 0 0 1 0 99 6 0 0 0 98 3 190 1 47 521 0 3 0 1 0 99 7 0 0 0 199 2 403 1 43 440 0 594 0 1 0 99 March 4, 2026 at 01:35:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 110 0 1 0 0 0 0 1 0 99 1 0 0 7 15 4 10 1 1 0 0 262 0 0 0 100 2 0 0 18 315 153 138 1 0 2 0 1384 0 0 0 100 3 0 0 0 11 1 12 0 1 0 0 0 0 0 0 100 4 0 0 0 20 8 14 0 0 0 0 306 0 0 0 100 5 0 0 2 211 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 17 6 12 0 0 0 0 8 0 0 0 100 7 0 0 0 12 3 8 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:35:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 0 0 0 0 2 0 1 0 99 1 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 2 0 0 17 311 153 136 1 1 0 0 1385 0 0 0 99 3 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 4 0 0 0 27 7 26 0 1 0 0 310 0 0 0 100 5 0 0 3 221 108 10 0 0 1 0 8 0 0 0 100 6 0 0 0 14 2 14 0 0 0 0 12 0 0 0 100 7 0 0 0 15 3 10 1 0 0 0 594 0 0 0 100 March 4, 2026 at 01:35:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 523 0 0 2201 100 291 19 35 6 0 986 5 2 0 94 1 809 0 7 127 6 163 14 29 8 1 1103 8 1 0 91 2 4 0 185 314 120 204 14 28 3 0 2216 6 1 0 94 3 3 0 0 166 29 224 19 39 2 0 973 6 0 0 94 4 4 0 0 130 10 222 19 33 0 1 1269 6 1 0 93 5 14 0 3 337 104 181 35 22 3 0 588 3 0 0 96 6 19 0 0 140 3 253 10 46 3 0 1108 3 0 0 96 7 5 0 0 98 4 172 12 32 2 0 1340 6 0 0 93 March 4, 2026 at 01:35:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2591 107 742 31 135 13 0 3414 21 3 0 76 1 0 0 7 561 10 796 43 131 13 0 3895 24 2 0 74 2 3 0 632 588 117 629 32 102 23 0 3371 24 2 0 74 3 0 0 0 575 24 924 38 158 19 0 5646 16 2 0 82 4 0 0 0 424 8 587 27 110 8 0 3246 33 2 0 65 5 5 0 3 589 107 511 22 95 21 0 2798 27 1 0 72 6 1 0 0 534 8 802 25 142 17 0 3695 12 2 0 86 7 3 0 0 456 7 687 28 93 15 0 3949 14 2 0 85 March 4, 2026 at 01:35:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2474 104 571 35 89 11 0 2582 34 2 0 63 1 2 0 7 492 5 768 39 137 16 0 3811 31 2 0 67 2 0 0 424 559 106 604 37 109 12 0 3203 28 2 0 70 3 1 0 0 510 17 804 32 140 26 0 5149 25 2 0 73 4 1 0 0 458 18 709 22 144 16 0 4324 14 2 0 85 5 1 0 2 687 115 742 18 113 15 0 3415 10 2 0 88 6 1 0 0 475 10 749 25 113 19 0 3389 15 2 0 84 7 1 0 0 388 5 609 16 93 19 0 3227 14 1 0 85 March 4, 2026 at 01:35:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2369 108 469 16 76 11 0 1677 17 2 0 81 1 3 0 7 311 12 461 19 81 17 0 2423 15 1 0 84 2 0 0 255 421 109 376 17 61 10 0 2098 14 1 0 85 3 0 0 0 279 4 415 22 83 11 0 2601 15 1 0 84 4 0 0 0 294 22 448 20 80 13 0 3126 12 1 0 87 5 0 0 3 448 103 360 17 57 13 0 2276 16 1 0 82 6 0 0 0 339 14 493 19 86 7 0 2085 11 1 0 88 7 4 0 14 263 10 366 15 60 9 0 2002 12 1 0 87 March 4, 2026 at 01:35:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2153 100 138 0 12 11 4 80 0 1 0 99 1 25 0 7 57 5 58 0 11 9 7 372 0 0 0 100 2 926 0 130 233 102 66 0 11 5 11 454 0 1 0 99 3 64 0 0 59 3 63 1 10 7 9 130 0 0 0 100 4 20 0 3 162 57 193 1 11 5 7 1299 0 1 0 99 5 51 0 3 265 109 58 0 9 5 5 397 0 0 0 100 6 1857 0 0 68 6 76 2 5 2 10 409 1 1 0 99 7 722 0 14 46 2 56 2 9 10 7 7113 2 1 0 97 March 4, 2026 at 01:35:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 106 0 0 0 0 1 0 1 0 99 1 0 0 7 15 3 14 0 1 2 0 260 0 0 0 100 2 0 0 3 209 102 2 1 0 0 0 294 0 0 0 100 3 0 0 0 16 1 12 0 0 0 0 3 0 0 0 100 4 0 0 0 115 55 138 1 0 0 0 1214 0 0 0 100 5 0 0 3 211 102 2 1 0 0 0 300 0 0 0 100 6 0 0 0 27 10 24 0 0 0 0 13 0 0 0 100 7 0 0 14 8 2 6 0 0 0 0 566 0 0 0 100 March 4, 2026 at 01:35:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 108 0 3 1 0 14 0 1 0 99 1 0 0 7 16 4 10 1 0 0 0 262 0 0 0 100 2 0 0 4 208 102 2 0 0 0 0 294 0 0 0 100 3 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 4 0 0 0 56 23 78 1 1 0 0 1213 0 0 0 100 5 0 0 2 286 138 86 0 2 0 0 312 0 0 0 100 6 0 0 0 23 9 20 0 1 0 0 14 0 0 0 100 7 0 0 14 12 2 14 0 0 0 0 573 0 0 0 100 March 4, 2026 at 01:35:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 61 0 14 2330 100 526 22 50 40 2 2967 5 3 0 92 1 0 0 7 285 3 523 30 59 52 0 3358 5 2 0 94 2 1 0 129 322 102 241 12 43 268 1 3326 5 2 0 93 3 11 0 7 390 2 776 31 90 55 0 2371 4 1 0 95 4 1 0 0 355 5 728 29 72 38 0 3731 6 1 0 93 5 0 0 3 723 160 932 22 67 32 0 2829 3 1 0 95 6 0 0 0 147 1 257 12 33 334 4 2813 5 2 0 93 7 0 0 22 305 2 585 28 65 55 0 2986 4 3 0 94 March 4, 2026 at 01:35:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 107 0 1 0 0 0 0 1 0 99 1 0 0 7 25 4 16 0 1 0 0 262 0 0 0 100 2 0 0 4 211 102 4 0 0 0 0 294 0 0 0 100 3 0 0 0 17 2 14 0 2 0 0 0 0 0 0 100 4 0 0 7 27 11 50 1 1 0 0 1129 0 0 0 100 5 0 0 2 311 152 102 0 0 0 0 300 0 0 0 100 6 0 0 0 13 2 4 0 1 0 0 1 0 0 0 100 7 2 0 14 9 2 8 0 1 0 0 580 0 0 0 100 March 4, 2026 at 01:35:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2107 100 83 0 2 0 0 0 0 1 0 99 1 0 0 7 52 3 32 0 1 0 0 259 0 0 0 100 2 0 0 3 225 102 2 1 0 0 0 294 0 0 0 100 3 0 0 0 24 1 4 0 0 0 0 0 0 0 0 100 4 0 0 0 57 11 64 0 3 0 0 1129 0 0 0 99 5 0 0 3 337 158 110 1 1 0 0 308 0 0 0 100 6 0 0 0 30 2 14 0 0 0 0 12 0 0 0 100 7 0 0 14 31 4 14 0 1 0 0 571 0 0 0 100 March 4, 2026 at 01:35:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 101 108 0 2 0 0 1 0 1 0 99 1 0 0 7 24 4 16 1 1 0 0 262 0 0 0 100 2 0 0 4 209 102 2 0 0 0 0 294 0 0 0 100 3 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 4 0 0 0 30 10 56 1 1 1 0 1126 0 0 0 100 5 0 0 2 312 152 102 0 0 0 0 300 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 14 12 3 10 0 0 0 0 567 0 0 0 100 March 4, 2026 at 01:35:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 101 113 1 5 3 0 69 0 1 0 99 1 0 0 7 25 3 26 0 2 0 0 292 0 0 0 100 2 0 0 4 213 103 10 0 1 0 0 322 0 0 0 100 3 0 0 0 11 1 10 0 2 0 0 39 0 0 0 100 4 0 0 0 48 11 78 2 4 4 0 1176 0 0 0 99 5 0 0 2 325 153 130 1 3 0 0 344 0 0 0 100 6 0 0 0 18 2 24 1 3 0 0 901 0 0 0 100 7 0 0 14 19 4 22 1 1 0 0 1410 0 0 0 99 March 4, 2026 at 01:35:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2305 102 529 7 124 1828 0 0 0 5 0 95 1 0 0 0 264 4 550 4 137 1714 0 4 0 4 0 96 2 0 0 4 420 102 488 3 113 1677 0 294 0 4 0 96 3 0 0 7 422 220 469 4 132 1725 0 258 0 5 0 95 4 0 0 0 367 11 817 5 138 1696 0 1116 0 4 0 96 5 0 0 2 507 153 574 4 114 1670 0 309 0 5 0 95 6 0 0 0 213 2 482 4 126 1732 0 1 0 4 0 96 7 0 0 14 212 2 481 5 117 1633 0 566 0 4 0 96 March 4, 2026 at 01:35:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 6 0 1 1 0 1 0 1 0 99 1 0 0 0 117 2 110 0 0 1 0 0 0 0 0 100 2 0 0 4 210 102 2 1 0 1 0 294 0 0 0 100 3 0 0 7 12 4 8 0 1 0 0 260 0 0 0 100 4 0 0 0 14 5 36 0 0 1 0 1117 0 0 0 100 5 0 0 2 325 158 116 1 0 1 0 306 0 0 0 100 6 0 0 0 18 4 16 0 1 1 0 2 0 0 0 100 7 0 0 14 16 6 12 0 0 1 0 569 0 0 0 100 March 4, 2026 at 01:35:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 72 0 1 0 0 0 0 1 0 99 1 0 0 0 55 2 48 0 1 0 0 2 0 0 0 100 2 0 0 4 208 102 2 0 0 0 0 294 0 0 0 100 3 0 0 7 12 3 8 1 0 0 0 260 0 0 0 100 4 0 0 0 17 4 40 1 0 0 0 1123 0 0 0 100 5 0 0 2 332 165 120 0 0 0 0 318 0 0 0 100 6 0 0 0 15 2 14 0 0 0 0 13 0 0 0 100 7 0 0 14 18 3 22 0 2 1 0 566 0 0 0 100 March 4, 2026 at 01:35:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 106 0 0 0 0 24 0 1 0 99 1 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 2 0 0 3 209 102 4 0 0 0 0 295 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 0 21 5 48 1 0 1 0 1123 0 0 0 100 5 0 0 3 327 159 120 1 0 0 0 334 0 0 0 100 6 0 0 0 14 2 14 0 1 0 0 12 0 0 0 100 7 0 0 14 15 5 12 1 0 0 0 574 0 0 0 100 March 4, 2026 at 01:35:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 120 0 3 0 0 1 0 1 0 99 1 0 0 0 17 2 12 0 0 0 0 2 0 0 0 100 2 0 0 4 212 103 10 0 0 0 0 301 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 0 15 4 42 0 0 0 0 1124 0 0 0 100 5 0 0 2 325 159 118 0 0 0 0 317 0 0 0 100 6 0 0 0 9 1 4 0 1 1 0 3 0 0 0 100 7 0 0 14 12 2 12 0 0 0 0 568 0 0 0 100 March 4, 2026 at 01:35:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 108 0 1 1 0 5 0 1 0 99 1 20 0 0 23 2 24 0 3 1 0 16 0 0 0 100 2 0 0 4 223 108 16 1 0 0 0 300 0 0 0 100 3 0 0 7 13 4 8 0 0 0 0 265 0 0 0 100 4 0 0 0 14 4 38 1 1 1 0 1117 0 0 0 100 5 0 0 2 314 153 106 1 0 0 0 300 0 0 0 100 6 0 0 0 10 0 8 0 3 2 0 0 0 0 0 100 7 1 0 14 16 5 16 1 1 3 0 576 0 0 0 100 March 4, 2026 at 01:35:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 1 0 0 0 23 0 1 0 99 1 0 0 0 19 3 14 0 0 0 0 2 0 0 0 100 2 0 0 4 222 109 16 0 0 0 0 304 0 0 0 100 3 0 0 7 11 3 6 1 0 0 0 260 0 0 0 100 4 0 0 0 13 4 36 1 0 0 0 1110 0 0 0 100 5 0 0 2 310 152 102 0 0 0 0 300 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 7 0 0 14 11 3 10 0 0 0 0 568 0 0 0 100 March 4, 2026 at 01:35:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 3 0 0 0 0 1 0 99 1 0 0 0 19 2 14 0 0 0 0 0 0 0 0 100 2 0 0 3 224 108 22 0 1 1 0 303 0 0 0 100 3 0 0 7 11 3 8 0 0 0 0 260 0 0 0 100 4 0 0 0 17 4 40 1 0 0 0 1114 0 0 0 100 5 0 0 3 326 158 112 0 2 0 0 308 0 0 0 100 6 0 0 0 15 1 14 0 0 0 0 14 0 0 0 100 7 0 0 14 16 4 14 1 0 0 0 571 0 0 0 100 March 4, 2026 at 01:35:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 0 0 1 0 1 0 99 1 0 0 0 20 3 14 0 0 0 0 2 0 0 0 100 2 0 0 3 222 108 16 0 1 0 0 304 0 0 0 100 3 0 0 7 14 3 14 0 1 0 0 260 0 0 0 100 4 0 0 0 13 4 36 1 0 0 0 1108 0 0 0 100 5 0 0 3 310 152 102 0 0 0 0 300 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 14 9 2 8 0 0 0 0 566 0 0 0 100 March 4, 2026 at 01:35:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 104 0 1 0 0 0 0 1 0 99 1 0 0 0 17 2 12 0 0 0 0 0 0 0 0 100 2 0 0 3 225 109 18 1 0 0 0 321 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 4 0 0 0 18 5 46 0 0 1 0 1119 0 0 0 100 5 0 0 3 315 152 110 1 0 0 0 316 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 4 0 0 0 100 7 0 0 14 14 4 12 0 0 0 0 571 0 0 0 100 March 4, 2026 at 01:35:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 21 4 16 0 0 0 0 4 0 0 0 100 2 0 0 4 208 102 2 0 0 0 0 294 0 0 0 100 3 0 0 7 13 3 8 1 0 0 0 260 0 0 0 100 4 0 0 0 32 11 60 1 1 4 0 1119 0 0 0 100 5 0 0 2 313 153 106 0 0 0 0 300 0 0 0 100 6 0 0 0 15 2 12 1 0 2 0 2 0 0 0 100 7 0 0 14 12 3 12 0 0 2 0 566 0 0 0 100 March 4, 2026 at 01:35:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 104 0 0 1 0 1 0 1 0 99 1 0 0 0 22 3 14 0 0 1 0 0 0 0 0 100 2 0 0 7 209 102 2 0 0 1 0 294 0 0 0 100 3 0 0 7 13 4 6 0 0 1 0 260 0 0 0 100 4 0 0 0 30 11 52 1 1 0 0 1118 0 0 0 100 5 0 0 7 317 152 114 0 1 1 0 301 0 0 0 100 6 1 0 0 24 7 16 1 0 1 0 11 0 0 0 100 7 0 0 14 20 6 16 1 0 1 0 576 0 0 0 100 March 4, 2026 at 01:35:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 98 0 2 0 0 0 0 1 0 99 1 0 0 0 19 3 14 0 0 0 0 2 0 0 0 100 2 0 0 4 208 102 2 0 0 0 0 294 0 0 0 100 3 0 0 7 13 3 11 0 0 0 0 260 0 0 0 100 4 0 0 0 41 11 62 3 2 0 0 1145 0 0 0 100 5 0 0 2 317 157 106 0 0 0 0 307 0 0 0 100 6 0 0 0 13 1 12 0 0 0 0 12 0 0 0 100 7 0 0 14 16 4 16 0 0 0 0 570 0 0 0 100 March 4, 2026 at 01:35:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 3213 101 2960 16 48 15 0 11719 5 3 0 92 1 25 0 0 635 5 1269 13 56 15 0 4443 3 2 0 95 2 115 0 4 868 102 1312 8 38 10 0 1955 2 1 0 97 3 26 0 7 472 4 944 14 45 29 0 4471 6 2 0 92 4 3 0 0 482 12 1038 7 36 18 0 3538 2 2 0 96 5 2 0 2 538 146 573 4 17 10 0 1686 1 1 0 98 6 247 0 0 521 1 1092 6 28 15 0 2738 2 1 0 96 7 8 0 14 304 4 721 6 20 27 0 3072 2 1 0 96 March 4, 2026 at 01:35:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 6313 111 9151 79 363 130 0 22951 22 14 0 64 1 38 0 0 4961 14 10420 85 400 147 0 25262 21 13 0 66 2 18 0 4 4086 119 8204 62 242 97 0 20644 19 11 0 70 3 43 0 7 4538 22 9401 51 343 101 0 21330 16 10 0 74 4 6 0 0 2834 15 5904 34 279 99 0 16103 14 9 0 77 5 1 0 2 2530 117 4850 30 150 127 0 12551 11 7 0 82 6 9 0 0 3072 15 6477 35 231 137 0 15070 13 8 0 79 7 6 0 14 2182 21 4580 23 118 80 0 11859 10 6 0 84 March 4, 2026 at 01:35:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 6490 106 9447 75 466 674 0 25213 23 16 0 61 1 8 0 0 4943 11 10832 97 521 702 0 24604 21 15 0 64 2 9 0 4 4248 110 8405 64 350 656 0 19596 17 12 0 71 3 9 0 0 4118 144 8409 62 405 719 0 21805 17 12 0 71 4 7 0 0 2957 14 6232 57 362 777 0 13318 13 9 0 78 5 1 0 2 2566 117 5013 46 248 708 0 12063 11 8 0 82 6 6 0 7 2768 14 5952 53 341 712 0 15137 13 9 0 79 7 3 0 14 2566 14 5341 35 223 690 0 11361 10 7 0 83 March 4, 2026 at 01:35:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 14 5410 104 7117 46 266 123 0 21474 20 12 0 67 1 3 0 0 4216 12 8999 43 289 121 0 19973 17 11 0 72 2 7 0 4 3649 114 7061 32 190 101 0 13249 12 8 0 80 3 5 0 0 3001 10 6469 43 238 147 0 16682 14 9 0 78 4 1 0 0 1977 17 3995 17 186 90 0 10951 8 6 0 86 5 2 0 2 1922 119 3576 11 106 102 0 8450 8 5 0 88 6 8 0 0 2482 10 5136 25 169 92 0 12935 9 6 0 84 7 4 0 7 2167 10 4716 18 98 133 0 12752 11 7 0 82 March 4, 2026 at 01:35:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 112 0 4 1 0 266 0 1 0 99 1 0 0 0 17 4 10 0 0 0 0 2 0 0 0 100 2 0 0 3 220 108 14 0 0 0 0 309 0 0 0 100 3 0 0 0 11 2 6 1 0 0 0 300 0 0 0 100 4 0 0 0 30 10 52 1 1 0 0 1122 0 0 0 100 5 0 0 3 313 152 102 0 0 0 0 8 0 0 0 100 6 1 0 0 19 1 19 0 3 0 0 12 0 0 0 100 7 0 0 7 16 3 12 1 0 1 0 555 0 0 0 100 March 4, 2026 at 01:35:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 66 0 0 0 0 270 0 1 0 99 1 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 2 0 0 4 225 110 20 0 0 0 0 315 0 0 0 100 3 0 0 0 49 2 46 0 3 0 0 300 0 0 0 100 4 0 0 0 109 52 132 1 0 0 0 1118 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 8 0 0 0 0 1 0 0 0 100 7 0 0 7 17 3 16 0 2 0 0 554 0 0 0 100 March 4, 2026 at 01:35:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 48 0 2 0 0 266 0 1 0 99 1 0 0 0 16 5 12 0 0 0 0 5 0 0 0 100 2 0 0 3 230 111 22 2 0 0 0 318 0 0 0 100 3 0 0 0 66 2 60 0 2 0 0 300 0 0 0 100 4 0 0 0 109 52 132 1 0 0 0 1118 0 0 0 100 5 0 0 3 212 102 4 0 1 3 0 0 0 0 0 100 6 0 0 0 15 2 20 0 2 1 0 0 0 0 0 100 7 0 0 7 21 3 18 1 0 0 0 556 0 0 0 100 March 4, 2026 at 01:35:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2227 103 306 0 51 476 0 530 0 2 0 98 1 0 0 0 134 2 242 0 47 540 0 11 0 1 0 99 2 0 0 4 315 110 214 0 50 389 0 311 0 1 0 99 3 0 0 0 234 106 404 0 43 512 0 300 0 1 0 98 4 0 0 0 134 27 245 1 40 485 0 1119 0 2 0 98 5 0 0 2 288 102 186 0 36 514 0 0 0 1 0 99 6 0 0 0 104 2 214 0 40 548 0 1 0 1 0 99 7 0 0 0 146 27 247 1 46 419 0 295 0 1 0 99 March 4, 2026 at 01:35:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2111 104 91 0 3 1 0 527 0 1 0 99 1 0 0 0 47 6 38 0 2 1 0 7 0 0 0 100 2 0 0 4 218 107 12 0 0 1 0 307 0 0 0 100 3 0 0 0 12 3 4 1 0 1 0 300 0 0 0 100 4 0 0 0 12 3 34 1 0 1 0 1118 0 0 0 100 5 0 0 2 208 101 0 0 0 1 0 0 0 0 0 100 6 0 0 0 13 4 6 0 0 1 0 2 0 0 0 100 7 0 0 0 117 54 110 1 1 0 0 295 0 0 0 100 March 4, 2026 at 01:35:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2114 103 70 0 4 1 0 526 0 1 0 99 1 0 0 0 58 4 54 0 2 0 0 10 0 0 0 100 2 0 0 4 227 110 22 1 0 0 0 330 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 300 0 0 0 100 4 0 0 0 13 2 36 1 0 0 0 1124 0 0 0 100 5 1 0 2 218 106 4 1 0 0 0 7 0 0 0 100 6 0 0 0 14 2 14 0 0 0 0 14 0 0 0 100 7 0 0 0 131 52 127 0 3 1 0 294 0 0 0 100 March 4, 2026 at 01:35:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2212 106 186 24 30 1 0 1658 5 1 0 94 1 1321 0 0 194 3 230 17 31 7 1 966 6 1 0 93 2 0 0 171 302 109 161 10 28 5 0 897 4 0 0 95 3 17 0 0 101 3 153 7 31 8 1 1154 4 0 0 96 4 0 0 0 122 2 246 10 32 3 0 2095 6 1 0 94 5 0 0 3 294 102 128 10 23 3 0 1121 4 1 0 96 6 18 0 7 162 6 251 43 27 3 0 835 5 0 0 95 7 521 0 0 193 46 299 18 26 19 0 1300 8 1 0 91 March 4, 2026 at 01:35:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 21 2618 111 771 29 130 14 0 3746 26 3 0 72 1 0 0 0 531 15 757 33 125 36 0 3830 26 2 0 73 2 1 0 634 586 111 654 35 116 24 0 3883 24 2 0 74 3 8 0 0 503 20 717 37 129 22 0 4337 23 2 0 75 4 0 0 0 512 13 724 31 134 23 0 3240 25 2 0 73 5 1 0 2 690 109 731 22 109 27 0 4694 16 2 0 82 6 0 0 0 505 6 734 27 127 22 0 3646 21 2 0 78 7 3 0 0 431 7 602 12 92 17 0 3517 13 2 0 86 March 4, 2026 at 01:36:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2574 108 792 34 127 21 0 4262 21 3 0 76 1 0 0 0 464 7 641 42 128 32 0 3461 34 2 0 64 2 0 0 466 612 114 672 33 123 29 0 3665 22 2 0 76 3 0 0 0 492 12 776 40 133 35 0 4054 26 2 0 72 4 0 0 0 450 14 659 31 127 21 0 3264 25 2 0 73 5 0 0 2 671 113 699 13 98 27 0 3227 9 2 0 89 6 0 0 0 462 3 775 26 130 23 0 5390 16 2 0 82 7 0 0 0 388 6 566 15 81 35 0 2918 19 1 0 80 March 4, 2026 at 01:36:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2405 116 493 18 84 7 0 2538 16 2 0 82 1 2 0 7 303 6 420 13 75 7 0 1924 21 1 0 78 2 0 0 353 463 113 391 21 65 14 0 2191 18 1 0 81 3 0 0 0 369 22 528 24 99 14 0 2779 14 1 0 84 4 3 0 0 283 5 392 15 75 8 0 2272 10 1 0 88 5 0 0 3 487 105 418 12 70 11 0 1995 10 1 0 88 6 0 0 0 282 9 431 11 65 9 0 3244 11 1 0 88 7 2 0 0 267 8 383 12 47 8 0 2018 12 1 0 87 March 4, 2026 at 01:36:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2110 102 82 1 3 0 0 280 0 1 0 99 1 1 0 7 34 6 26 1 1 1 0 272 0 0 0 100 2 0 0 3 211 102 4 1 0 0 0 301 0 0 0 100 3 0 0 0 123 54 120 0 0 0 0 306 0 0 0 100 4 1 0 0 13 2 8 0 0 0 0 13 0 0 0 100 5 0 0 3 221 107 10 0 1 0 0 9 0 0 0 100 6 0 0 0 32 7 68 1 2 0 0 1158 0 0 0 99 7 4 0 0 37 2 33 0 5 0 0 318 0 0 0 100 March 4, 2026 at 01:36:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 112 0 1 0 0 270 0 1 0 99 1 0 0 7 12 3 8 0 1 0 0 260 0 0 0 100 2 0 0 3 210 103 4 0 0 0 0 302 0 0 0 100 3 0 0 0 117 52 112 0 0 0 0 300 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 3 212 101 10 0 1 0 0 0 0 0 0 100 6 0 0 0 26 10 52 0 0 0 0 1135 0 0 0 100 7 0 0 0 11 2 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:36:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 52 0 14 2141 101 141 0 11 4 10 344 0 1 0 99 1 711 0 7 45 3 32 2 6 2 3 6776 2 1 0 97 2 9 0 3 244 102 36 0 7 2 3 394 0 0 0 100 3 13 0 0 151 54 140 1 4 3 4 392 0 0 0 100 4 2738 0 114 29 2 57 2 6 10 13 383 1 1 0 98 5 92 0 3 250 101 65 0 16 12 11 149 0 0 0 100 6 21 0 1 58 7 95 1 9 7 5 1279 0 0 0 100 7 5 0 0 53 8 45 1 5 8 0 377 0 0 0 100 March 4, 2026 at 01:36:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2328 102 500 22 45 213 0 2953 6 2 0 92 1 0 0 7 411 5 793 21 74 40 0 2661 3 1 0 96 2 1 0 151 519 104 634 25 72 40 1 2888 4 1 0 95 3 24 0 7 352 40 565 22 44 48 0 3130 7 2 0 91 4 36 0 22 221 11 389 12 36 191 3 2814 6 2 0 92 5 18 0 16 414 105 352 11 21 58 1 3126 6 2 0 93 6 2 0 0 246 4 503 15 35 59 0 3932 5 2 0 94 7 2 0 0 330 13 633 28 57 47 0 2890 4 1 0 95 March 4, 2026 at 01:36:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2113 103 112 0 2 0 0 267 0 1 0 99 1 0 0 7 18 5 8 1 1 1 0 260 0 0 0 100 2 0 0 4 221 102 10 1 1 1 0 300 0 0 0 100 3 0 0 0 12 3 4 0 0 1 0 300 0 0 0 100 4 0 0 0 123 58 114 0 1 1 0 9 0 0 0 100 5 0 0 9 213 102 7 0 3 1 0 0 0 0 0 100 6 0 0 0 23 6 44 1 1 1 0 1120 0 0 0 100 7 0 0 0 21 4 16 0 1 1 0 295 0 0 0 100 March 4, 2026 at 01:36:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2112 101 123 0 4 2 0 266 0 1 0 99 1 0 0 7 28 3 8 0 0 0 0 260 0 0 0 100 2 0 0 4 232 103 8 0 1 0 0 302 0 0 0 100 3 0 0 0 26 2 6 0 0 0 0 300 0 0 0 100 4 0 0 0 140 58 116 0 0 0 0 31 0 0 0 100 5 0 0 2 240 107 8 0 0 0 0 7 0 0 0 100 6 0 0 0 42 6 58 1 3 0 0 1139 0 0 0 100 7 0 0 0 30 2 10 0 2 0 0 294 0 0 0 100 March 4, 2026 at 01:36:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2104 101 116 0 0 0 0 266 0 1 0 99 1 0 0 7 13 3 8 0 0 0 0 260 0 0 0 100 2 0 0 4 209 102 2 0 0 0 0 300 0 0 0 100 3 0 0 0 13 3 6 1 0 0 0 301 0 0 0 100 4 0 0 0 107 51 100 0 0 0 0 0 0 0 0 100 5 0 0 2 211 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 25 9 48 1 0 0 0 1124 0 0 0 100 7 0 0 0 12 2 6 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:36:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2123 102 148 2 5 5 0 1144 0 1 0 99 1 0 0 7 25 3 37 0 6 2 0 358 0 0 0 100 2 0 0 4 217 104 8 0 1 0 0 312 0 0 0 100 3 0 0 0 14 2 12 0 2 0 0 324 0 0 0 100 4 0 0 0 113 52 114 0 1 0 0 18 0 0 0 100 5 0 0 2 215 103 10 0 1 3 0 821 0 0 0 100 6 0 0 0 37 10 73 0 4 1 0 1202 0 0 0 99 7 0 0 0 20 4 25 1 3 1 0 371 0 0 0 100 March 4, 2026 at 01:36:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2406 106 740 5 127 1652 0 978 0 4 0 95 1 0 0 1 255 11 564 4 136 1815 0 166 0 4 0 96 2 0 0 17 518 119 674 2 123 1764 0 563 0 4 0 96 3 0 0 2 526 271 563 4 136 1845 0 302 0 5 0 95 4 0 0 0 313 28 654 2 145 1736 0 0 0 4 0 96 5 0 0 2 531 102 713 0 115 1969 0 0 0 5 0 95 6 0 0 0 241 3 527 2 131 1753 0 1 0 4 0 96 7 0 0 5 223 4 474 1 100 1503 0 551 0 4 0 96 March 4, 2026 at 01:36:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 104 0 0 0 0 0 0 1 0 99 1 0 0 0 20 7 44 1 0 0 0 1123 0 0 0 100 2 0 0 18 313 155 108 1 0 0 0 568 0 0 0 100 3 0 0 0 13 2 8 0 0 0 0 299 0 0 0 100 4 0 0 0 11 1 6 0 1 0 0 0 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 1 0 0 0 100 7 0 0 7 17 6 12 1 0 0 0 559 0 0 0 100 March 4, 2026 at 01:36:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 20 7 44 1 0 1 0 1123 0 0 0 100 2 0 0 18 312 154 108 0 0 1 0 566 0 0 0 100 3 0 0 0 16 2 18 1 2 0 0 300 0 0 0 100 4 0 0 0 16 1 12 0 0 0 0 5 0 0 0 100 5 0 0 2 221 110 6 0 0 0 0 5 0 0 0 100 6 0 0 0 12 2 10 0 0 0 0 11 0 0 0 100 7 0 0 7 17 4 14 1 0 0 0 553 0 0 0 100 March 4, 2026 at 01:36:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 108 0 0 0 0 25 0 1 0 99 1 0 0 0 30 10 54 2 0 0 0 1135 0 0 0 99 2 0 0 18 316 155 116 0 1 0 0 579 0 0 0 100 3 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 4 0 0 0 18 1 16 0 1 2 0 0 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 1 8 0 0 0 0 4 0 0 0 100 7 0 0 7 21 6 22 0 0 0 0 563 0 0 0 100 March 4, 2026 at 01:36:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 0 0 0 1 0 1 0 99 1 0 0 0 23 8 46 1 0 0 0 1127 0 0 0 99 2 0 0 18 311 154 106 1 0 0 0 565 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 4 0 0 0 15 1 10 0 1 1 0 3 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 10 0 0 0 0 11 0 0 0 100 7 0 0 7 23 8 24 1 1 1 0 570 0 0 0 100 March 4, 2026 at 01:36:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 1 0 0 0 0 1 0 99 1 0 0 0 11 2 36 1 1 0 0 1115 0 0 0 100 2 0 0 17 315 155 110 1 0 2 0 569 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 4 20 0 0 17 3 10 0 0 1 0 5 0 0 0 100 5 0 0 3 214 102 10 0 1 1 0 0 0 0 0 100 6 0 0 0 11 2 8 0 0 2 0 1 0 0 0 100 7 1 0 7 33 13 32 0 0 1 0 573 0 0 0 100 March 4, 2026 at 01:36:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 116 0 1 0 0 1 0 1 0 99 1 0 0 0 11 2 32 1 0 3 0 1110 0 0 0 100 2 0 0 21 311 154 106 0 0 1 0 565 0 0 0 100 3 0 0 0 15 3 6 1 0 1 0 300 0 0 0 100 4 0 0 0 9 2 0 0 0 1 0 0 0 0 0 100 5 0 0 7 213 102 4 0 0 1 0 0 0 0 0 100 6 0 0 0 19 4 16 0 1 1 0 2 0 0 0 100 7 0 0 7 30 12 22 1 0 1 0 565 0 0 0 100 March 4, 2026 at 01:36:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 114 0 0 1 0 0 0 1 0 99 1 0 0 0 7 1 32 0 0 0 0 1109 0 0 0 100 2 0 0 18 312 155 108 0 0 0 0 568 0 0 0 100 3 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 4 0 0 0 10 1 4 0 0 0 0 5 0 0 0 100 5 0 0 2 218 108 6 0 0 0 0 5 0 0 0 100 6 1 0 0 16 4 14 0 0 0 0 13 0 0 0 100 7 0 0 7 33 12 30 1 0 0 0 565 0 0 0 100 March 4, 2026 at 01:36:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 1 0 99 1 0 0 0 9 1 32 2 0 1 0 1108 0 0 0 100 2 0 0 18 311 154 106 1 0 0 0 566 0 0 0 100 3 0 0 0 13 3 8 0 0 0 0 301 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 10 0 0 1 0 2 0 0 0 100 7 0 0 7 32 12 32 1 1 0 0 565 0 0 0 100 March 4, 2026 at 01:36:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 82 0 3 0 0 3 0 1 0 99 1 0 0 0 13 1 40 2 2 2 0 1115 0 0 0 100 2 1 0 18 316 156 110 1 0 0 0 591 0 0 0 100 3 0 0 0 55 2 50 0 1 0 0 300 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 2 212 103 4 0 0 0 0 1 0 0 0 100 6 0 0 0 10 1 8 0 0 0 0 6 0 0 0 100 7 0 0 7 33 13 30 0 0 1 0 574 0 0 0 100 March 4, 2026 at 01:36:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 48 0 1 0 0 0 0 1 0 99 1 0 0 0 9 1 34 1 0 0 0 1108 0 0 0 100 2 0 0 18 311 154 108 0 0 1 0 567 0 0 0 100 3 0 0 0 78 2 70 1 0 0 0 300 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 6 0 1 1 0 0 0 0 0 100 7 0 0 7 28 10 26 1 0 3 0 562 0 0 0 100 March 4, 2026 at 01:36:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 0 0 0 0 0 1 0 99 1 0 0 0 11 1 40 0 1 1 0 1109 0 0 0 100 2 0 0 18 312 155 108 0 0 0 0 568 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 2 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 7 0 0 7 30 12 26 1 0 0 0 562 0 0 0 100 March 4, 2026 at 01:36:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 106 0 2 0 0 0 0 1 0 99 1 0 0 0 9 1 34 1 0 0 0 1109 0 0 0 100 2 0 0 17 316 154 114 2 1 1 0 566 0 0 0 100 3 0 0 0 12 2 8 0 1 0 0 300 0 0 0 100 4 0 0 0 11 1 10 0 0 0 0 13 0 0 0 100 5 0 0 3 230 109 15 0 3 0 0 8 0 0 0 100 6 0 0 0 14 2 10 0 0 0 0 6 0 0 0 100 7 0 0 7 32 12 26 1 0 0 0 566 0 0 0 100 March 4, 2026 at 01:36:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2605 101 1049 13 44 33 0 4139 7 2 0 91 1 104 0 0 722 1 1522 16 72 13 0 4992 3 2 0 95 2 178 0 18 858 150 1355 8 39 26 1 3906 4 2 0 94 3 7 0 0 603 3 1237 9 49 22 0 3125 2 2 0 96 4 308 0 0 561 3 1143 6 37 22 0 2237 2 1 0 97 5 3 0 2 468 104 484 1 19 0 0 1072 1 0 0 99 6 7 0 0 615 2 1826 8 26 39 0 9901 3 2 0 95 7 23 0 7 300 13 581 7 15 17 0 2506 2 1 0 97 March 4, 2026 at 01:36:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 6468 110 9315 72 363 135 0 24663 24 15 0 62 1 13 0 0 4716 14 10033 78 423 155 0 25488 22 13 0 65 2 6 0 3 3893 117 7624 55 284 82 0 18514 16 10 0 74 3 7 0 0 5004 17 10390 69 354 84 0 20502 17 11 0 71 4 7 0 0 3171 14 6530 50 255 105 0 16838 15 9 0 76 5 0 0 17 1962 115 3729 19 133 119 0 10683 9 6 0 85 6 6 0 7 2973 10 6442 31 226 77 0 15478 13 8 0 79 7 11 0 0 2134 20 4424 32 130 87 0 11942 10 6 0 84 March 4, 2026 at 01:36:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 6763 109 9806 90 478 655 0 22925 23 15 0 62 1 11 0 0 4818 12 10151 75 479 695 0 23343 20 14 0 66 2 9 0 3 4281 116 8363 45 315 644 0 19693 16 11 0 72 3 7 0 0 4144 132 8619 88 429 726 0 22447 18 13 0 69 4 5 0 0 2781 13 5794 47 359 661 0 14634 13 9 0 78 5 8 0 17 2660 120 5164 48 243 635 0 13362 12 8 0 80 6 11 0 0 3018 12 6347 57 328 621 0 14644 13 9 0 78 7 6 0 7 2352 14 5027 42 215 650 0 11658 10 7 0 83 March 4, 2026 at 01:36:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 5917 109 8173 62 321 143 0 20308 20 12 0 68 1 2 0 0 3830 16 7857 44 359 95 0 20709 16 11 0 73 2 8 0 4 3144 113 6084 38 232 96 0 15551 14 8 0 78 3 5 0 0 3303 23 7026 48 274 61 0 16530 14 9 0 78 4 5 0 0 2283 13 4698 31 223 103 0 12878 12 7 0 82 5 4 0 16 2144 121 4111 16 131 94 0 11014 10 6 0 84 6 5 0 7 2563 10 5474 37 221 90 0 13172 11 7 0 82 7 1 0 0 2069 15 4444 13 117 46 0 8970 7 5 0 88 March 4, 2026 at 01:36:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 112 0 1 0 0 0 0 1 0 99 1 0 0 0 23 2 50 0 0 2 0 1127 0 0 0 100 2 0 0 3 214 104 10 0 0 0 0 611 0 0 0 100 3 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 4 1 0 0 28 10 26 0 0 0 0 41 0 0 0 100 5 0 0 17 219 109 10 0 0 0 0 571 0 0 0 100 6 0 0 7 17 4 14 0 0 0 0 269 0 0 0 100 7 0 0 0 18 3 14 0 1 0 0 5 0 0 0 100 March 4, 2026 at 01:36:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 104 0 0 0 0 0 0 1 0 99 1 0 0 0 23 1 52 1 2 1 0 1118 0 0 0 100 2 0 0 4 212 104 6 0 0 0 0 594 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 4 0 0 0 23 9 18 0 0 0 0 14 0 0 0 100 5 0 0 16 214 104 8 1 1 0 0 569 0 0 0 100 6 0 0 7 12 4 8 0 0 0 0 261 0 0 0 100 7 0 0 0 11 1 7 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:36:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 104 0 2 0 0 4 0 1 0 99 1 0 0 0 19 1 44 1 0 0 0 1118 0 0 0 100 2 0 0 4 215 105 8 1 0 0 0 595 0 0 0 100 3 0 0 0 108 50 104 0 0 0 0 1 0 0 0 100 4 0 0 0 25 10 20 0 0 0 0 14 0 0 0 100 5 0 0 16 215 105 10 0 0 0 0 571 0 0 0 100 6 0 0 7 13 4 10 0 0 0 0 265 0 0 0 100 7 0 0 0 15 3 10 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:36:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2211 101 317 3 48 519 0 0 0 2 0 98 1 0 0 0 122 1 262 3 47 484 0 1118 0 2 0 98 2 0 0 4 318 105 229 3 44 445 0 601 0 1 0 98 3 0 0 0 305 162 293 1 51 453 0 0 0 2 0 98 4 0 0 0 146 10 287 1 65 505 0 5 0 1 0 99 5 0 0 16 299 104 190 2 42 470 0 565 0 1 0 99 6 0 0 7 280 26 519 3 66 445 0 260 0 1 0 99 7 0 0 0 111 2 232 1 50 516 0 1 0 1 0 99 March 4, 2026 at 01:36:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 102 0 0 0 0 0 0 1 0 99 1 0 0 0 9 1 34 1 0 0 0 1118 0 0 0 100 2 0 0 3 224 109 18 0 0 0 0 602 0 0 0 100 3 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 4 0 0 0 14 4 8 0 1 0 0 1 0 0 0 100 5 0 0 17 212 104 6 0 0 0 0 566 0 0 0 100 6 0 0 7 121 54 118 0 0 0 0 262 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:36:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 108 0 1 0 0 1 0 1 0 99 1 0 0 0 9 1 34 1 0 1 0 1118 0 0 0 99 2 0 0 4 222 109 16 0 0 0 0 603 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 19 4 12 0 1 0 0 6 0 0 0 100 5 0 0 16 220 110 10 1 0 0 0 574 0 0 0 100 6 0 0 7 122 53 122 0 0 0 0 271 0 0 0 100 7 0 0 0 15 2 10 0 1 0 0 3 0 0 0 100 March 4, 2026 at 01:36:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2194 102 262 9 36 5 0 782 5 1 0 94 1 670 0 0 114 2 177 21 37 11 0 2027 7 1 0 92 2 261 0 158 326 110 223 37 31 7 0 1653 5 1 0 94 3 21 0 0 110 1 136 14 25 4 0 801 8 0 0 92 4 23 0 0 157 5 276 38 43 8 0 940 4 1 0 95 5 0 0 16 322 109 215 12 28 3 0 1275 4 1 0 96 6 55 0 7 199 47 271 35 34 1 0 1392 4 1 0 96 7 357 0 0 87 2 141 13 26 4 0 1210 4 1 0 95 March 4, 2026 at 01:36:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2526 106 688 30 111 16 0 2990 28 3 0 69 1 1 0 0 528 16 802 34 130 35 0 4963 26 2 0 72 2 5 0 368 617 108 720 26 115 39 0 3733 22 2 0 76 3 2 0 0 447 18 650 37 131 20 0 3736 29 2 0 69 4 0 0 0 453 12 723 30 140 3 0 3729 23 2 0 75 5 2 0 16 630 109 700 16 113 21 0 4134 14 2 0 85 6 0 0 7 448 16 700 22 119 25 0 4285 19 2 0 79 7 0 0 0 405 7 637 13 94 22 0 3536 12 1 0 86 March 4, 2026 at 01:36:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2532 103 701 29 113 28 0 3504 24 2 0 73 1 0 0 0 462 8 726 38 142 15 0 4767 27 2 0 71 2 0 0 367 592 109 675 27 124 19 0 3334 25 2 0 73 3 0 0 0 442 15 646 30 117 24 0 3675 28 2 0 70 4 0 0 0 456 18 718 37 137 18 0 3764 23 2 0 75 5 0 0 17 630 109 699 17 111 24 0 4623 12 2 0 86 6 0 0 8 438 12 672 23 108 26 0 3823 20 2 0 78 7 0 0 0 458 6 729 17 94 20 0 3420 11 2 0 87 March 4, 2026 at 01:36:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2390 110 453 23 73 8 0 1935 18 2 0 81 1 0 0 0 380 7 560 20 90 12 0 2970 12 1 0 86 2 0 0 245 434 114 419 12 63 16 0 3104 14 1 0 85 3 5 0 0 317 3 543 17 89 23 0 2986 12 1 0 87 4 3 0 0 247 8 363 18 62 11 0 2137 16 1 0 83 5 0 0 21 438 122 311 12 41 17 0 2090 18 1 0 81 6 0 0 7 283 13 413 9 71 6 0 2597 13 1 0 86 7 0 0 0 257 6 400 17 57 24 0 2099 13 1 0 86 March 4, 2026 at 01:36:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2121 106 59 1 3 0 0 302 0 0 0 99 1 1 0 0 27 2 20 0 1 1 0 308 0 0 0 100 2 0 0 18 215 103 38 1 1 0 0 1128 0 0 0 100 3 0 0 0 28 6 24 0 1 0 0 16 0 0 0 100 4 4 0 0 25 2 26 1 3 2 0 25 0 0 0 100 5 2 0 16 322 158 110 0 1 0 0 590 0 0 0 100 6 2 0 7 22 4 22 1 1 0 0 293 0 0 0 100 7 0 0 0 69 2 63 0 3 4 0 10 0 0 0 100 March 4, 2026 at 01:36:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 76 1 2 0 0 295 0 1 0 99 1 0 0 0 50 3 44 0 2 0 0 301 0 0 0 100 2 0 0 3 211 102 34 1 0 0 0 1125 0 0 0 100 3 0 0 0 24 9 20 0 0 0 0 11 0 0 0 100 4 0 0 0 11 2 6 0 0 0 0 3 0 0 0 100 5 0 0 17 312 153 104 2 0 0 0 565 0 0 0 100 6 0 0 7 13 4 8 1 0 0 0 261 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:36:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 2 2151 103 128 0 11 8 9 407 0 1 0 99 1 1859 0 0 95 2 101 2 11 3 7 630 0 1 0 99 2 735 0 3 248 103 85 3 7 15 12 7645 2 1 0 97 3 18 0 0 70 10 81 1 14 8 9 161 0 0 0 100 4 18 0 0 53 7 48 0 8 1 4 95 0 0 0 100 5 928 0 132 334 148 169 0 7 7 14 763 0 1 0 99 6 79 0 7 59 5 71 0 12 11 13 371 0 0 0 100 7 13 0 0 46 2 60 0 12 8 10 88 0 0 0 100 March 4, 2026 at 01:36:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2235 102 194 17 34 299 0 3976 10 2 0 88 1 48 0 7 221 3 292 19 27 331 1 3851 9 2 0 89 2 0 0 152 594 102 817 31 79 41 0 3512 6 2 0 92 3 2 0 14 512 8 1029 39 90 33 0 2444 3 1 0 96 4 0 0 0 271 39 437 19 35 254 0 2500 4 1 0 94 5 0 0 16 347 104 247 8 29 268 0 3483 5 1 0 93 6 3 0 7 294 3 546 28 62 53 2 4029 9 2 0 90 7 0 0 0 440 13 889 34 84 32 0 2284 3 1 0 96 March 4, 2026 at 01:36:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 90 1 3 0 0 297 0 0 0 99 1 0 0 0 25 8 20 0 0 0 0 309 0 0 0 100 2 0 0 11 212 103 34 1 1 2 0 1116 0 0 0 100 3 0 0 0 33 2 25 0 1 0 0 1 0 0 0 100 4 0 0 0 13 3 4 0 0 0 0 0 0 0 0 100 5 3 0 16 212 103 4 0 0 0 0 581 0 0 0 100 6 0 0 7 13 3 8 0 0 0 0 261 0 0 0 100 7 0 0 0 122 53 116 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:36:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 104 74 0 3 0 0 300 0 1 0 99 1 0 0 0 88 9 66 0 2 0 0 310 0 0 0 100 2 0 0 4 227 102 34 1 1 0 0 1115 0 0 0 100 3 0 0 112 12 1 9 0 2 0 0 0 0 0 0 100 4 0 0 0 31 2 8 0 0 0 0 5 0 0 0 100 5 1 0 16 237 108 8 2 0 0 0 574 0 0 0 100 6 0 0 7 34 3 16 1 1 0 0 271 0 0 0 100 7 0 0 3 137 52 122 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:36:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 110 0 3 0 0 294 0 1 0 99 1 0 0 0 39 8 32 0 2 0 0 309 0 0 0 100 2 0 0 4 210 102 32 1 0 1 0 1114 0 0 0 100 3 0 0 7 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 5 0 0 16 213 104 6 0 0 0 0 567 0 0 0 100 6 0 0 7 11 3 6 0 0 0 0 261 0 0 0 100 7 0 0 0 114 53 110 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:36:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 104 116 0 5 0 0 334 0 1 0 99 1 0 0 0 44 9 42 1 3 1 0 1136 0 0 0 99 2 0 0 4 214 102 46 1 3 1 0 1936 0 0 0 99 3 0 0 0 21 3 25 0 4 1 0 110 0 0 0 100 4 0 0 0 22 3 24 0 3 0 0 56 0 0 0 100 5 0 0 16 213 103 11 0 1 0 0 609 0 0 0 100 6 0 0 7 23 3 33 0 6 0 0 348 0 0 0 100 7 0 0 0 117 52 121 0 5 0 0 31 0 0 0 100 March 4, 2026 at 01:36:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2371 102 733 3 139 1779 0 325 0 5 0 95 1 0 0 0 244 5 556 2 156 1874 0 304 0 5 0 95 2 0 0 4 474 125 576 2 133 1726 0 208 0 4 0 96 3 0 0 0 472 260 986 2 153 1746 0 303 0 4 0 96 4 0 0 0 235 5 514 2 143 1772 0 7 0 4 0 96 5 0 0 16 451 103 543 1 123 1547 0 566 0 4 0 96 6 0 0 7 219 2 491 4 120 1804 0 310 0 4 0 96 7 0 0 0 257 30 537 2 128 1651 0 857 0 4 0 96 March 4, 2026 at 01:36:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 22 0 3 0 0 296 0 1 0 99 1 0 0 0 111 4 100 0 2 1 0 301 0 0 0 100 2 0 0 7 316 151 112 0 2 1 0 0 0 0 0 100 3 0 0 0 16 2 8 0 1 1 0 0 0 0 0 100 4 0 0 0 25 10 16 0 0 1 0 11 0 0 0 100 5 0 0 21 214 103 6 2 0 1 0 567 0 0 0 100 6 0 0 7 17 6 10 1 0 1 0 264 0 0 0 100 7 0 0 0 18 5 40 1 0 2 0 1116 0 0 0 100 March 4, 2026 at 01:36:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 76 0 2 0 0 295 0 1 0 99 1 0 0 0 44 2 38 0 2 0 0 300 0 0 0 100 2 0 0 4 308 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 18 1 15 0 0 0 0 0 0 0 0 100 4 0 0 0 23 7 16 1 0 0 0 34 0 0 0 100 5 0 0 16 219 110 8 0 0 0 0 573 0 0 0 100 6 0 0 7 18 5 18 0 0 0 0 273 0 0 0 100 7 0 0 0 18 4 44 1 1 1 0 1117 0 0 0 100 March 4, 2026 at 01:36:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 44 0 3 0 0 297 0 1 0 99 1 0 0 0 82 3 76 1 4 0 0 301 0 0 0 100 2 0 0 4 310 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 25 2 26 0 1 0 0 7 0 0 0 100 4 0 0 0 22 8 18 0 0 0 0 34 0 0 0 100 5 0 0 16 210 103 4 0 0 0 0 566 0 0 0 100 6 0 0 7 16 4 16 0 0 0 0 272 0 0 0 100 7 0 0 0 14 3 40 1 1 0 0 1138 0 0 0 100 March 4, 2026 at 01:36:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 88 1 2 0 0 294 0 1 0 99 1 0 0 0 34 2 28 0 0 1 0 303 0 0 0 100 2 0 0 4 307 151 102 0 0 0 0 3 0 0 0 100 3 0 0 0 21 1 18 0 1 0 0 6 0 0 0 100 4 0 0 0 24 8 22 0 1 1 0 12 0 0 0 100 5 0 0 16 220 107 16 0 1 0 0 576 0 0 0 100 6 0 0 7 12 3 8 0 0 0 0 260 0 0 0 100 7 0 0 0 15 4 40 1 0 0 0 1116 0 0 0 100 March 4, 2026 at 01:36:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 104 0 2 0 0 302 0 1 0 99 1 0 0 0 24 2 18 0 2 0 0 300 0 0 0 100 2 0 0 4 306 151 100 0 0 0 0 0 0 0 0 100 3 20 0 0 21 2 20 0 2 2 0 6 0 0 0 100 4 0 0 0 9 2 4 0 0 1 0 0 0 0 0 100 5 0 0 16 227 110 20 2 0 1 0 575 0 0 0 100 6 0 0 7 11 3 9 1 1 0 0 260 0 0 0 100 7 1 0 0 13 4 40 0 1 0 0 1118 0 0 0 100 March 4, 2026 at 01:36:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 66 0 2 0 0 295 0 1 0 99 1 0 0 0 54 2 48 0 2 0 0 300 0 0 0 100 2 0 0 4 306 151 100 0 0 0 0 0 0 0 0 100 3 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 4 0 0 0 8 1 2 0 0 1 0 0 0 0 0 100 5 0 0 16 226 109 26 0 1 0 0 574 0 0 0 100 6 0 0 7 14 5 10 0 0 0 0 262 0 0 0 100 7 0 0 0 15 4 40 1 0 0 0 1111 0 0 0 100 March 4, 2026 at 01:36:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 50 0 3 0 0 299 0 1 0 99 1 0 0 0 77 2 70 1 2 0 0 300 0 0 0 100 2 0 0 4 306 151 100 0 0 0 0 0 0 0 0 100 3 0 0 0 16 1 12 0 0 0 0 0 0 0 0 100 4 0 0 0 10 1 4 0 0 0 0 5 0 0 0 100 5 0 0 16 236 115 28 0 0 1 0 583 0 0 0 100 6 0 0 7 16 4 16 0 0 1 0 272 0 0 0 100 7 0 0 0 15 3 42 1 0 0 0 1109 0 0 0 100 March 4, 2026 at 01:36:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 106 1 0 0 0 294 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 2 0 0 4 306 151 100 0 0 0 0 0 0 0 0 100 3 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 16 224 110 18 0 0 0 0 577 0 0 0 100 6 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 7 0 0 0 15 4 40 1 0 2 0 1113 0 0 0 100 March 4, 2026 at 01:36:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 74 0 2 0 0 299 0 1 0 99 1 0 0 0 48 2 42 0 2 0 0 300 0 0 0 100 2 0 0 4 307 151 102 0 0 2 0 3 0 0 0 100 3 0 0 0 19 1 18 0 0 0 0 16 0 0 0 100 4 0 0 0 12 2 10 0 0 0 0 9 0 0 0 100 5 0 0 16 230 110 22 2 1 0 0 591 0 0 0 100 6 0 0 7 14 3 10 1 1 0 0 263 0 0 0 100 7 0 0 0 17 3 46 1 1 0 0 1108 0 0 0 100 March 4, 2026 at 01:36:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2117 103 18 0 2 1 0 300 0 1 0 99 1 0 0 0 111 2 108 0 3 0 0 311 0 0 0 100 2 0 0 4 308 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 18 1 16 0 0 3 0 0 0 0 0 100 4 0 0 0 22 8 16 1 0 0 0 9 0 0 0 100 5 0 0 16 211 103 6 0 0 2 0 566 0 0 0 100 6 0 0 7 13 4 10 0 0 0 0 261 0 0 0 100 7 0 0 0 20 5 46 1 1 0 0 1112 0 0 0 100 March 4, 2026 at 01:36:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 28 0 1 1 0 299 0 1 0 99 1 0 0 0 57 4 48 1 0 1 0 301 0 0 0 100 2 0 0 7 307 151 102 0 1 0 0 0 0 0 0 100 3 0 0 0 58 2 52 0 1 1 0 0 0 0 0 100 4 0 0 0 23 9 14 0 0 1 0 10 0 0 0 100 5 0 0 21 211 103 4 0 0 1 0 566 0 0 0 100 6 0 0 7 15 5 8 0 0 1 0 261 0 0 0 100 7 0 0 0 17 5 38 1 0 1 0 1110 0 0 0 100 March 4, 2026 at 01:36:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 12 1 2 2 0 294 0 1 0 99 1 0 0 0 18 3 22 0 1 0 0 309 0 0 0 100 2 0 0 4 308 151 104 0 0 0 0 18 0 0 0 100 3 0 0 0 117 1 112 0 0 0 0 0 0 0 0 100 4 0 0 0 22 7 16 0 0 0 0 14 0 0 0 100 5 0 0 16 218 109 8 0 0 0 0 573 0 0 0 100 6 0 0 7 16 4 16 0 0 0 0 272 0 0 0 100 7 0 0 0 18 4 44 1 0 1 0 1110 0 0 0 100 March 4, 2026 at 01:36:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 41 0 0 2872 105 2274 14 33 15 0 11281 4 3 0 93 1 3 0 0 322 3 686 6 20 29 0 3505 6 1 0 93 2 63 0 4 690 150 866 7 27 15 0 2140 2 1 0 97 3 3 0 0 375 2 716 10 29 2 0 1530 1 1 0 98 4 55 0 0 260 9 490 6 21 9 0 1627 2 1 0 97 5 61 0 16 297 104 148 2 10 0 0 873 0 0 0 99 6 175 0 7 304 6 605 8 27 5 0 1446 1 1 0 98 7 297 0 0 482 3 981 6 17 7 0 3099 1 1 0 97 March 4, 2026 at 01:36:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 7 6682 107 9862 70 406 171 0 26134 25 15 0 59 1 19 0 0 5420 12 11550 96 426 101 0 26848 22 14 0 64 2 4 0 4 4167 112 7999 64 306 142 0 19464 17 10 0 73 3 7 0 0 4250 16 9018 61 339 97 0 22060 19 12 0 69 4 12 0 0 2568 21 5256 35 253 128 0 14173 13 8 0 79 5 3 0 16 1913 121 3440 23 150 48 0 7710 7 5 0 89 6 4 0 0 3361 14 7023 47 229 118 0 15345 12 8 0 80 7 2 0 0 2095 7 4524 15 133 70 0 13164 10 7 0 83 March 4, 2026 at 01:37:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6595 109 9698 95 463 700 0 25575 24 16 0 61 1 10 0 0 5425 9 11521 103 540 710 0 24846 20 15 0 66 2 5 0 3 3831 110 7345 74 363 546 0 17633 15 11 0 74 3 7 0 0 4058 154 8413 79 433 630 0 19610 17 11 0 72 4 4 0 0 2929 15 5946 57 387 722 0 15764 14 9 0 78 5 7 0 17 2557 116 4870 30 224 661 0 12257 10 8 0 82 6 4 0 7 3368 9 7292 49 353 626 0 16060 13 10 0 77 7 7 0 0 2160 18 4687 28 220 695 0 11592 11 8 0 82 March 4, 2026 at 01:37:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 5722 112 7886 57 315 124 0 24287 22 14 0 65 1 6 0 0 4164 12 8686 64 358 119 0 19568 16 11 0 73 2 8 0 3 3700 107 7405 39 231 79 0 16366 14 9 0 77 3 3 0 0 3858 9 8119 41 286 97 0 19092 16 10 0 74 4 7 0 0 2220 9 4563 30 232 78 0 12367 11 7 0 82 5 5 0 17 2207 109 4212 15 117 80 0 11723 10 6 0 83 6 5 0 7 2632 16 5550 32 215 70 0 12830 10 7 0 83 7 2 0 0 1931 20 4001 18 125 92 0 8775 7 5 0 88 March 4, 2026 at 01:37:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 146 2 3 0 0 1123 0 1 0 99 1 0 0 0 10 2 6 0 0 0 0 300 0 0 0 100 2 0 0 4 211 103 4 0 0 0 0 0 0 0 0 100 3 0 0 0 13 3 8 0 0 0 0 5 0 0 0 100 4 0 0 0 18 1 14 0 1 0 0 5 0 0 0 100 5 0 0 16 222 110 10 2 0 0 0 867 0 0 0 100 6 0 0 7 16 3 16 1 0 0 0 272 0 0 0 100 7 0 0 0 110 50 106 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:37:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 111 124 0 0 1 0 1134 0 1 0 99 1 0 0 0 45 2 50 0 4 1 0 300 0 0 0 100 2 0 0 4 212 104 6 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 4 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 5 0 0 16 214 105 8 0 0 0 0 861 0 0 0 100 6 0 0 7 13 3 10 0 1 0 0 264 0 0 0 100 7 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:37:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 110 70 1 3 0 0 1136 0 1 0 99 1 0 0 0 107 2 102 1 1 0 0 303 0 0 0 100 2 0 0 4 211 103 6 0 0 0 0 1 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 5 0 0 0 100 4 0 0 0 17 1 12 0 0 0 0 3 0 0 0 100 5 0 0 16 214 104 8 1 0 0 0 862 0 0 0 100 6 0 0 7 12 2 8 0 0 0 0 260 0 0 0 100 7 0 0 0 105 50 102 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:37:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2227 108 341 2 45 509 0 1127 0 2 0 98 1 0 0 0 181 2 353 1 56 479 0 300 0 1 0 99 2 0 0 4 375 130 292 1 44 525 0 2 0 1 0 99 3 0 0 0 219 114 222 0 49 505 0 0 0 1 0 99 4 0 0 0 119 1 231 0 51 513 0 0 0 1 0 99 5 0 0 16 292 104 177 0 38 491 0 861 0 1 0 98 6 0 0 7 99 2 206 0 50 529 0 260 0 1 0 99 7 0 0 0 144 26 240 0 31 465 0 1 0 1 0 99 March 4, 2026 at 01:37:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 108 148 2 1 1 0 1123 0 1 0 99 1 0 0 0 27 5 20 0 0 1 0 301 0 0 0 100 2 0 0 7 317 153 114 0 1 0 0 0 0 0 0 100 3 0 0 0 12 3 4 0 0 1 0 2 0 0 0 100 4 0 0 0 13 3 2 0 0 1 0 1 0 0 0 100 5 0 0 21 215 104 6 2 0 1 0 861 0 0 0 100 6 0 0 7 13 4 6 1 0 1 0 261 0 0 0 100 7 0 0 0 11 2 4 0 0 1 0 1 0 0 0 100 March 4, 2026 at 01:37:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 109 112 1 3 1 0 1128 0 1 0 99 1 0 0 0 61 3 58 0 1 0 0 300 0 0 0 100 2 0 0 4 321 154 116 0 2 1 0 2 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 4 0 0 0 12 2 6 0 0 0 0 26 0 0 0 100 5 0 0 16 219 109 10 0 0 0 0 867 0 0 0 100 6 0 0 7 14 3 14 0 0 1 0 272 0 0 0 100 7 0 0 0 9 0 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:37:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 127 0 0 2197 111 192 13 21 4 0 1765 4 2 0 94 1 0 0 0 168 4 202 10 26 2 0 834 5 0 0 95 2 2 0 116 408 153 288 30 22 4 0 697 3 0 0 97 3 1225 0 0 77 4 135 36 25 1 1 847 6 1 0 93 4 100 0 0 85 1 222 46 27 2 0 803 4 1 0 95 5 182 0 16 297 104 231 29 31 8 1 1797 4 1 0 95 6 7 0 7 92 3 135 28 25 5 0 861 3 0 0 97 7 7 0 0 74 0 144 13 33 3 0 962 3 0 0 97 March 4, 2026 at 01:37:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2522 108 705 38 116 14 0 4081 26 3 0 71 1 0 0 0 433 15 656 28 130 14 0 4376 27 2 0 71 2 0 0 269 635 114 796 32 132 29 0 3944 23 2 0 74 3 4 0 0 471 24 722 29 131 20 0 4225 21 2 0 77 4 2 0 14 408 11 668 23 130 17 0 4194 24 2 0 75 5 5 0 3 560 105 522 20 97 14 0 2819 17 1 0 82 6 0 0 0 518 10 876 34 148 20 0 4135 18 2 0 80 7 0 0 7 410 3 651 12 91 29 0 3864 14 1 0 85 March 4, 2026 at 01:37:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2519 108 670 24 123 21 0 3285 23 3 0 74 1 0 0 0 510 18 825 44 144 19 0 5494 24 2 0 74 2 0 0 255 628 110 742 24 114 22 0 4541 17 2 0 81 3 0 0 0 427 13 704 27 129 15 0 4195 22 2 0 76 4 0 0 0 416 10 691 27 134 25 0 3602 23 2 0 75 5 0 0 3 622 103 683 24 98 21 0 2966 21 2 0 77 6 0 0 0 436 6 724 26 118 35 0 3875 24 2 0 75 7 0 0 21 426 11 674 19 94 12 0 4209 20 2 0 78 March 4, 2026 at 01:37:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2421 105 521 19 91 22 0 2655 19 2 0 79 1 0 0 0 299 7 482 27 92 9 0 3383 21 1 0 77 2 3 0 171 493 118 469 15 74 18 0 2401 15 1 0 84 3 0 0 0 284 10 469 17 97 8 0 3085 17 1 0 82 4 0 0 0 286 9 442 24 90 21 0 2791 17 1 0 82 5 0 0 3 499 108 475 17 78 5 0 2425 7 1 0 92 6 0 0 0 281 17 453 15 84 13 0 2305 16 1 0 82 7 0 0 7 299 12 419 18 73 9 0 2402 12 1 0 87 March 4, 2026 at 01:37:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 21 2118 103 111 0 4 0 0 545 0 1 0 99 1 0 0 0 33 8 54 2 0 0 0 1148 0 0 0 99 2 2 0 18 212 103 8 0 1 1 0 8 0 0 0 100 3 1 0 0 16 1 12 1 1 0 0 308 0 0 0 100 4 1 0 0 39 7 36 0 6 0 0 325 0 0 0 100 5 4 0 2 219 106 6 0 0 3 0 16 0 0 0 100 6 0 0 0 123 51 126 0 3 0 0 14 0 0 0 100 7 0 0 0 17 1 12 0 2 1 0 295 0 0 0 100 March 4, 2026 at 01:37:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2105 103 64 0 0 0 0 525 0 1 0 99 1 0 0 0 61 3 86 1 1 0 0 1123 0 0 0 100 2 0 0 4 214 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 27 10 22 0 0 0 0 311 0 0 0 100 5 0 0 2 212 104 2 0 0 0 0 1 0 0 0 100 6 0 0 0 109 50 106 0 1 0 0 3 0 0 0 100 7 0 0 0 15 1 14 1 1 0 0 294 0 0 0 100 March 4, 2026 at 01:37:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 21 2145 103 71 0 11 4 6 840 0 1 0 99 1 22 0 0 161 9 160 1 7 2 4 982 0 0 0 99 2 2716 0 117 235 103 66 2 5 7 13 467 1 1 0 98 3 114 0 0 54 2 92 0 13 7 25 459 0 0 0 100 4 29 0 2 61 10 74 1 15 9 7 423 0 0 0 100 5 48 0 2 251 101 58 0 11 2 7 123 0 0 0 100 6 6 0 0 130 46 125 0 7 5 0 85 0 0 0 100 7 714 0 0 38 1 32 2 5 4 9 6761 2 1 0 97 March 4, 2026 at 01:37:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 793 0 47 2159 106 212 5 20 1749 5 1673 2 4 0 94 1 86 0 38 160 45 212 4 30 46 7 466 0 1 0 99 2 1128 0 11 293 113 161 3 28 65 10 430 0 1 0 99 3 29 0 0 74 11 106 3 20 1287 12 466 0 1 0 99 4 32 0 0 61 4 80 0 18 1423 3 413 0 1 0 99 5 93 0 33 286 115 136 4 26 126 11 207 0 0 0 99 6 9 0 13 51 1 70 1 14 1270 7 78 0 1 0 99 7 24 0 17 66 2 119 0 24 37 18 515 0 0 0 99 March 4, 2026 at 01:37:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 14 2137 103 153 1 3 8 4 1086 0 1 0 99 1 8 0 71 28 6 24 6 2 7 0 281 0 2 0 98 2 10 0 7 328 147 117 0 6 0 4 14 0 0 0 100 3 8 0 0 33 3 18 1 1 8 3 307 0 0 0 100 4 3 0 0 31 4 14 0 2 5 1 307 0 0 0 100 5 2 0 7 269 121 59 0 4 3 2 88 0 0 0 100 6 6 0 17 26 1 22 0 4 3 2 32 0 1 0 99 7 5 0 0 49 11 36 0 1 5 2 301 0 0 0 100 March 4, 2026 at 01:37:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2187 104 154 3 3 0 0 1019 0 1 0 99 1 0 0 56 81 4 12 0 1 2 0 262 0 1 0 99 2 0 0 3 288 104 10 0 1 0 0 7 0 0 0 100 3 0 0 455 19 1 8 0 0 2 0 300 0 0 0 99 4 0 0 0 83 3 4 0 0 0 0 300 0 0 0 100 5 0 0 3 330 127 46 0 1 1 0 28 0 0 0 100 6 0 0 0 81 0 4 0 0 0 0 0 0 0 0 100 7 0 0 7 188 51 112 1 1 0 0 295 0 0 0 100 March 4, 2026 at 01:37:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 142 0 3 0 0 1009 0 1 0 99 1 0 0 7 19 4 14 0 1 0 0 259 0 0 0 100 2 0 0 3 216 103 16 0 1 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 1 0 0 300 0 0 0 100 4 0 0 0 11 3 2 1 0 0 0 300 0 0 0 100 5 0 0 3 249 121 42 0 1 0 0 20 0 0 0 100 6 0 0 0 10 1 4 0 1 0 0 1 0 0 0 100 7 0 0 0 111 51 106 0 1 0 0 294 0 0 0 100 March 4, 2026 at 01:37:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2106 102 138 2 0 0 0 1033 0 1 0 99 1 0 0 7 21 4 16 1 0 0 0 259 0 0 0 100 2 0 0 4 216 104 10 0 0 0 0 2 0 0 0 100 3 0 0 0 14 1 12 0 1 0 0 300 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 5 0 0 2 250 122 46 0 1 0 0 21 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 109 51 104 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 138 0 1 0 0 1013 0 1 0 99 1 0 0 7 21 4 18 0 1 0 0 261 0 0 0 100 2 0 0 3 213 103 10 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 1 0 0 0 300 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 5 0 0 3 241 117 30 0 1 0 0 17 0 0 0 100 6 0 0 0 22 8 20 0 2 0 0 10 0 0 0 100 7 0 0 0 109 51 104 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 103 112 1 1 0 0 1009 0 1 0 99 1 0 0 7 45 4 42 0 1 0 0 259 0 0 0 100 2 0 0 3 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 4 0 0 0 11 2 8 0 1 1 0 300 0 0 0 100 5 0 0 3 214 103 4 0 0 0 0 1 0 0 0 100 6 0 0 0 46 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 110 51 104 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2113 103 128 2 2 0 0 1021 0 1 0 99 1 0 0 7 35 4 28 0 1 0 0 259 0 0 0 100 2 0 0 4 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 10 1 8 0 1 0 0 308 0 0 0 100 4 0 0 0 11 2 4 1 0 0 0 300 0 0 0 100 5 0 0 2 235 107 26 0 2 0 0 6 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 112 51 110 0 1 0 0 294 0 0 0 100 March 4, 2026 at 01:37:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 103 136 0 1 0 0 1009 0 1 0 99 1 0 0 7 21 4 18 1 1 0 0 259 0 0 0 100 2 0 0 3 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 300 0 0 0 100 5 0 0 3 210 101 2 0 1 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 109 51 104 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2139 132 198 2 2 0 0 1010 0 1 0 99 1 0 0 7 22 5 18 0 0 0 0 259 0 0 0 100 2 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 300 0 0 0 100 5 0 0 3 216 102 10 0 2 0 0 0 0 0 0 100 6 0 0 0 54 21 56 0 2 1 0 20 0 0 0 100 7 0 0 0 54 23 48 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2162 153 236 0 0 0 0 1014 0 1 0 99 1 0 0 7 23 5 18 0 1 0 0 270 0 0 0 100 2 0 0 4 217 104 14 0 1 0 0 2 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 300 0 0 0 100 4 0 0 0 11 3 8 0 1 0 0 300 0 0 0 100 5 0 0 2 210 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 49 20 44 0 0 0 0 20 0 0 0 100 7 0 0 0 17 2 16 1 1 0 0 295 0 0 0 100 March 4, 2026 at 01:37:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2142 136 206 1 2 0 0 1010 0 1 0 99 1 0 0 7 57 22 52 0 1 1 0 260 0 0 0 100 2 0 0 3 211 103 6 0 0 1 0 0 0 0 0 100 3 0 0 0 11 3 4 0 0 1 0 300 0 0 0 100 4 0 0 0 13 4 4 1 0 1 0 301 0 0 0 100 5 0 0 3 210 101 0 0 0 1 0 0 0 0 0 100 6 0 0 0 47 21 40 0 0 1 0 20 0 0 0 100 7 0 0 0 13 3 6 0 0 1 0 295 0 0 0 100 March 4, 2026 at 01:37:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2121 104 152 2 3 0 0 1024 0 1 0 99 1 0 0 7 124 55 122 1 0 0 0 268 0 0 0 100 2 0 0 4 215 104 12 0 0 0 0 20 0 0 0 100 3 0 0 0 12 2 10 1 0 0 0 308 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 321 0 0 0 100 5 0 0 2 228 108 12 0 2 0 0 5 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 14 1 12 0 1 0 0 294 0 0 0 100 March 4, 2026 at 01:37:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 103 126 1 2 0 0 1010 0 1 0 99 1 0 0 7 141 54 140 0 3 0 0 259 0 0 0 100 2 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 48 21 42 0 0 0 0 21 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 146 0 2 0 0 1009 0 1 0 99 1 0 0 7 115 54 108 0 0 0 0 259 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 10 1 4 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 144 1 0 0 0 1008 0 1 0 99 1 0 0 7 114 54 110 0 0 0 0 259 0 0 0 100 2 0 0 4 216 103 16 0 1 1 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 12 3 8 1 1 0 0 300 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 103 148 1 1 0 0 1010 0 1 0 99 1 0 0 7 113 54 108 1 0 0 0 259 0 0 0 100 2 0 0 4 215 104 10 0 0 1 0 2 0 0 0 100 3 0 0 0 12 2 10 0 1 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 104 119 2 3 0 0 1015 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 4 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 8 1 0 0 0 302 0 0 0 100 4 0 0 0 8 2 4 0 1 0 0 300 0 0 0 100 5 0 0 2 254 108 38 0 2 0 0 5 0 0 0 100 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 17 3 13 0 1 0 0 303 0 0 0 100 March 4, 2026 at 01:37:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 146 0 0 0 0 1009 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 11 2 6 0 1 0 0 300 0 0 0 100 4 0 0 0 12 2 10 0 1 0 0 300 0 0 0 100 5 0 0 2 209 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 10 1 4 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 144 1 0 0 0 1009 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 4 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 12 2 6 1 1 0 0 300 0 0 0 100 5 0 0 2 212 101 8 0 1 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 122 1 0 0 0 1009 0 1 0 99 1 0 0 7 134 54 130 1 2 0 0 259 0 0 0 100 2 0 0 3 215 104 12 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 11 3 8 0 1 0 0 300 0 0 0 100 5 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 295 0 0 0 100 March 4, 2026 at 01:37:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 140 1 3 0 0 1009 0 1 0 99 1 0 0 7 126 56 116 0 0 1 0 260 0 0 0 100 2 0 0 7 212 103 6 0 0 1 0 0 0 0 0 100 3 0 0 0 13 3 4 1 0 1 0 300 0 0 0 100 4 0 0 0 13 4 4 0 0 1 0 301 0 0 0 100 5 0 0 7 211 101 2 0 0 1 0 0 0 0 0 100 6 0 0 0 52 21 48 0 1 1 0 20 0 0 0 100 7 0 0 0 18 5 10 0 0 1 0 297 0 0 0 100 March 4, 2026 at 01:37:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 142 0 2 0 0 1016 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 5 0 0 2 226 106 12 0 2 0 0 5 0 0 0 100 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 23 2 28 2 1 0 0 306 0 0 0 100 March 4, 2026 at 01:37:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 116 1 2 0 0 1009 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 4 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 5 0 0 2 237 101 28 0 2 0 0 0 0 0 0 100 6 0 0 0 47 21 42 0 0 0 0 21 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 102 156 1 1 0 0 1009 0 1 0 99 1 0 0 7 113 54 108 1 0 0 0 259 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 103 148 1 0 0 0 1010 0 1 0 99 1 0 0 7 117 54 118 0 1 0 0 259 0 0 0 100 2 0 0 3 216 103 12 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 5 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 1 47 20 44 0 1 0 0 20 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 295 0 0 0 100 March 4, 2026 at 01:37:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 124 0 2 0 0 1009 0 1 0 99 1 0 0 7 131 54 128 0 2 0 0 259 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 5 0 0 2 211 101 2 0 1 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 12 2 6 1 0 0 0 295 0 0 0 100 March 4, 2026 at 01:37:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 128 1 2 0 0 1014 0 1 0 99 1 0 0 7 143 54 140 0 1 0 0 269 0 0 0 100 2 0 0 4 216 103 16 0 1 0 0 0 0 0 0 100 3 0 0 0 11 2 8 0 1 0 0 301 0 0 0 100 4 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 5 0 0 2 217 107 2 0 0 1 0 4 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 16 2 14 0 0 0 0 297 0 0 0 100 March 4, 2026 at 01:37:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 144 1 0 0 0 1009 0 1 0 99 1 0 0 7 113 54 108 1 0 0 0 259 0 0 0 100 2 0 0 4 215 104 10 0 0 0 0 2 0 0 0 100 3 0 0 0 13 2 14 0 1 0 0 300 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 43 19 38 0 0 0 0 19 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 102 1 1 0 0 1009 0 1 0 99 1 0 0 7 114 55 110 0 0 0 0 260 0 0 0 100 2 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 3 251 101 44 0 3 0 0 0 0 0 0 100 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 122 0 1 0 0 1009 0 1 0 99 1 0 0 7 114 55 110 0 0 0 0 261 0 0 0 100 2 0 0 4 215 104 12 0 0 0 0 2 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 4 0 0 0 15 3 14 0 1 3 0 300 0 0 0 100 5 0 0 2 230 101 20 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 12 2 6 1 0 0 0 295 0 0 0 100 March 4, 2026 at 01:37:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 146 2 1 0 0 1009 0 1 0 99 1 0 0 7 119 57 112 0 0 1 0 261 0 0 0 100 2 0 0 7 212 103 6 0 0 1 0 0 0 0 0 100 3 0 0 0 12 3 4 0 0 1 0 300 0 0 0 100 4 0 0 0 16 4 6 1 0 2 0 301 0 0 0 100 5 0 0 7 214 101 10 0 1 3 0 1 0 0 0 100 6 0 0 0 53 23 44 1 0 1 0 24 0 0 0 100 7 0 0 0 15 3 8 0 0 1 0 296 0 0 0 100 March 4, 2026 at 01:37:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 150 1 0 0 0 1014 0 1 0 99 1 0 0 7 123 57 122 1 0 1 0 275 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 14 2 13 0 0 0 0 305 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 321 0 0 0 100 5 0 0 2 217 108 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 12 1 10 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 144 0 2 0 0 1009 0 1 0 99 1 0 0 7 120 55 114 0 1 0 0 260 0 0 0 100 2 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 3 214 101 8 0 0 0 0 0 0 0 0 100 6 0 0 0 50 21 46 0 0 0 0 21 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 146 1 0 0 0 1010 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 5 0 0 2 210 101 2 0 1 1 0 0 0 0 0 100 6 0 0 0 50 20 48 0 1 0 0 20 0 0 0 100 7 0 0 0 10 1 4 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 144 1 0 0 0 1008 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 4 213 103 10 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 12 3 6 1 0 0 0 300 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 42 0 1 0 0 20 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 144 1 0 0 0 1009 0 1 0 99 1 0 0 7 114 55 110 1 0 0 0 260 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 47 20 42 0 0 1 0 20 0 0 0 100 7 0 0 0 12 1 10 0 1 0 0 294 0 0 0 100 March 4, 2026 at 01:37:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2116 102 140 0 4 1 0 1018 0 1 0 99 1 0 0 7 137 55 134 0 3 0 0 273 0 0 0 100 2 0 0 3 217 103 12 0 2 0 0 1 0 0 0 100 3 0 0 0 12 2 8 1 0 0 0 301 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 3 214 107 0 0 0 0 0 0 0 0 0 100 6 0 0 0 48 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 14 1 10 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 102 144 1 0 0 0 1008 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 10 1 4 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 144 1 1 0 0 1009 0 1 0 99 1 0 0 7 116 54 116 0 1 0 0 259 0 0 0 100 2 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 2 1 0 0 0 300 0 0 0 100 5 0 0 3 211 101 2 0 1 0 0 0 0 0 0 100 6 0 0 0 46 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 130 1 0 0 0 1009 0 1 0 99 1 0 0 7 130 54 126 1 2 1 0 259 0 0 0 100 2 0 0 3 223 104 24 0 1 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 12 3 8 0 0 0 0 300 0 0 0 100 5 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 295 0 0 0 100 March 4, 2026 at 01:37:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 103 148 0 2 0 0 1033 0 1 0 99 1 0 0 7 124 58 114 0 0 1 0 262 0 0 0 100 2 0 0 7 212 103 6 0 0 1 0 0 0 0 0 100 3 0 0 0 12 3 4 1 0 1 0 300 0 0 0 100 4 0 0 0 13 4 4 0 0 1 0 301 0 0 0 100 5 0 0 7 209 101 0 0 0 1 0 0 0 0 0 100 6 0 0 0 48 21 40 0 0 1 0 20 0 0 0 100 7 0 0 0 14 3 6 0 0 1 0 295 0 0 0 100 March 4, 2026 at 01:37:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 150 1 0 0 0 1016 0 1 0 99 1 0 0 7 122 56 124 0 0 0 0 280 0 0 0 100 2 0 0 4 219 104 18 0 1 0 0 25 0 0 0 100 3 0 0 0 15 2 16 0 1 0 0 300 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 5 0 0 2 213 106 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 13 1 8 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 144 1 0 0 0 1009 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 4 0 0 0 14 2 12 1 1 0 0 300 0 0 0 100 5 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 50 21 46 0 0 0 0 21 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:37:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 146 1 0 0 0 1009 0 1 0 99 1 0 0 7 113 54 108 1 0 0 0 259 0 0 0 100 2 0 0 3 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 5 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 144 0 0 0 0 1009 0 1 0 99 1 0 0 7 114 55 110 0 0 0 0 260 0 0 0 100 2 0 0 4 213 103 10 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 4 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 5 0 0 2 213 101 10 0 1 0 0 0 0 0 0 100 6 0 0 0 45 20 42 0 1 0 0 20 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 102 144 1 0 0 0 1008 0 1 0 99 1 0 0 7 114 55 110 0 0 0 0 260 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 5 0 0 2 210 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 50 20 50 0 1 0 0 20 0 0 0 100 7 0 0 0 10 1 4 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 102 140 1 2 0 0 1017 0 1 0 99 1 0 0 7 132 55 132 0 2 0 0 271 0 0 0 100 2 0 0 3 215 103 10 0 0 0 0 5 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 2 1 0 0 0 300 0 0 0 100 5 0 0 3 213 106 0 0 0 0 0 0 0 0 0 100 6 0 0 0 48 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 12 1 8 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 102 146 1 2 0 0 1008 0 1 0 99 1 0 0 7 114 54 108 1 0 0 0 259 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 300 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 47 20 42 0 0 2 0 20 0 0 0 100 7 0 0 0 12 1 12 0 1 2 0 294 0 0 0 100 March 4, 2026 at 01:38:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 152 0 2 1 0 1009 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 46 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 146 1 1 0 0 1009 0 1 0 99 1 0 0 7 114 55 110 0 0 0 0 260 0 0 0 100 2 0 0 3 215 104 12 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 300 0 0 0 100 5 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 12 2 6 1 0 0 0 295 0 0 0 100 March 4, 2026 at 01:38:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 148 1 0 0 0 1009 0 1 0 99 1 0 0 7 119 56 116 0 1 1 0 260 0 0 0 100 2 0 0 3 211 103 6 0 0 1 0 0 0 0 0 100 3 0 0 0 11 3 4 0 0 1 0 300 0 0 0 100 4 0 0 0 13 4 4 1 0 1 0 301 0 0 0 100 5 0 0 3 208 101 0 0 0 1 0 0 0 0 0 100 6 0 0 0 48 21 40 0 0 1 0 20 0 0 0 100 7 0 0 0 13 3 6 0 0 1 0 295 0 0 0 100 March 4, 2026 at 01:38:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 150 0 0 0 0 1016 0 1 0 99 1 0 0 7 124 56 122 2 0 0 0 272 0 0 0 100 2 0 0 4 220 104 18 0 1 0 0 7 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 300 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 321 0 0 0 100 5 0 0 2 214 107 0 0 0 0 0 0 0 0 0 100 6 0 0 0 46 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 12 1 10 0 1 0 0 294 0 0 0 100 March 4, 2026 at 01:38:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 144 1 0 0 0 1009 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 4 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 47 21 44 0 1 0 0 21 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 134 1 0 0 0 1009 0 1 0 99 1 0 0 7 125 55 122 0 2 0 0 260 0 0 0 100 2 0 0 4 215 104 10 0 0 1 0 2 0 0 0 100 3 0 0 0 12 2 10 0 1 1 0 300 0 0 0 100 4 0 0 0 10 3 6 0 1 0 0 301 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 49 20 44 0 0 0 0 20 0 0 0 100 7 0 0 0 10 1 4 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 134 0 3 0 0 1009 0 1 0 99 1 0 0 7 129 54 122 0 0 0 0 259 0 0 0 100 2 0 0 4 215 103 10 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 4 0 0 0 15 3 12 1 1 0 0 300 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 42 0 1 0 0 20 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 144 1 0 0 0 1009 0 1 0 99 1 0 0 7 115 55 110 1 0 0 0 260 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 2 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 46 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 152 1 1 0 0 1016 0 1 0 99 1 0 0 7 118 55 118 0 0 1 0 271 0 0 0 100 2 0 0 3 215 103 10 0 0 0 0 5 0 0 0 100 3 0 0 0 11 2 6 1 0 0 0 300 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 5 0 0 3 217 107 6 0 1 1 0 0 0 0 0 100 6 0 0 0 47 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 13 1 10 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 146 1 1 0 0 1009 0 1 0 99 1 0 0 7 114 55 110 0 0 0 0 260 0 0 0 100 2 0 0 4 213 104 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 300 0 0 0 100 5 0 0 2 210 101 2 0 1 1 0 0 0 0 0 100 6 0 0 0 49 20 50 0 1 0 0 20 0 0 0 100 7 0 0 0 10 1 4 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 144 0 0 0 0 1009 0 1 0 99 1 0 0 7 112 54 108 0 0 0 0 259 0 0 0 100 2 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 2 1 0 0 0 300 0 0 0 100 5 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 46 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 142 1 2 0 0 1009 0 1 0 99 1 0 0 7 113 54 108 1 0 0 0 259 0 0 0 100 2 0 0 3 215 104 12 0 0 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 5 0 0 3 213 103 2 0 1 0 0 0 0 0 0 100 6 0 0 0 49 20 44 0 0 2 0 20 0 0 0 100 7 0 0 0 15 2 18 0 1 1 0 295 0 0 0 100 March 4, 2026 at 01:38:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 102 144 1 3 0 0 1009 0 1 0 99 1 0 0 7 128 57 122 0 2 1 0 261 0 0 0 100 2 0 0 7 212 103 6 0 0 1 0 0 0 0 0 100 3 0 0 0 13 3 4 1 0 1 0 300 0 0 0 100 4 0 0 0 13 4 4 0 0 1 0 301 0 0 0 100 5 0 0 7 212 101 2 0 1 1 0 0 0 0 0 100 6 0 0 0 49 21 40 0 0 1 0 20 0 0 0 100 7 0 0 0 16 3 8 0 0 1 0 295 0 0 0 100 March 4, 2026 at 01:38:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 138 1 2 0 0 1016 0 1 0 99 1 0 0 7 135 55 132 0 0 0 0 270 0 0 0 100 2 0 0 4 217 104 12 0 0 0 0 7 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 2 213 106 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 20 42 0 1 0 0 20 0 0 0 100 7 0 0 0 12 1 8 1 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 148 0 1 0 0 1009 0 1 0 99 1 0 0 7 116 54 116 0 1 0 0 259 0 0 0 100 2 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 2 1 0 0 0 300 0 0 0 100 5 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 48 21 42 0 0 0 0 21 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:38:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 134 1 3 0 0 1034 0 1 0 99 1 0 0 7 115 54 110 1 0 0 0 259 0 0 0 100 2 0 0 4 219 104 18 0 1 0 0 2 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 301 0 0 0 100 5 0 0 2 223 101 14 0 3 0 0 0 0 0 0 100 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 293 0 0 0 100 March 4, 2026 at 01:38:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2125 102 178 1 4 0 0 1106 0 1 0 99 1 1283 0 10 107 47 108 1 0 0 0 294 0 0 0 99 2 5 0 5 234 110 40 0 3 0 0 41 0 0 0 100 3 0 0 0 11 2 6 1 0 0 0 300 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 5 0 0 2 277 168 2 0 0 0 0 0 0 0 0 100 6 0 0 0 40 17 36 0 1 0 0 29 0 0 0 100 7 34 0 0 30 1 36 2 3 0 0 541 1 0 0 99 March 4, 2026 at 01:38:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2766 102 1471 0 2 8 0 1012 0 1 0 99 1 0 0 7 15 4 10 0 1 0 0 262 0 0 0 100 2 0 0 3 304 148 98 0 1 0 0 3 0 0 0 100 3 0 0 0 25 8 24 0 2 2 0 300 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 5 0 0 3 1120 1009 8 0 1 78 0 0 0 1 0 99 6 2564 0 0 157 5 280 3 0 74 0 1162 1 2 0 97 7 0 0 0 659 1 1300 2 0 55 0 294 0 1 0 99 March 4, 2026 at 01:38:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2551 102 1036 2 0 6 0 1019 0 1 0 99 1 0 0 7 13 4 8 0 0 0 0 259 0 0 0 100 2 0 0 3 279 103 132 1 0 30 0 517 0 1 0 99 3 0 0 0 113 52 108 1 1 0 0 600 0 0 0 100 4 0 0 0 12 2 10 0 1 0 0 0 0 0 0 100 5 0 0 3 824 690 63 4 2 42 0 158 0 0 0 99 6 0 0 0 12 2 4 0 1 1 0 281 0 0 0 100 7 0 0 0 449 0 888 1 1 38 0 8 0 1 0 99 March 4, 2026 at 01:38:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 102 129 1 3 1 0 1014 0 1 0 99 1 0 0 7 22 4 16 1 2 0 0 259 0 0 0 100 2 0 0 4 231 106 24 0 2 0 0 13 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 600 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 5 1 0 2 225 115 14 0 0 2 0 30 0 0 0 100 6 0 0 0 8 1 4 0 1 0 0 294 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:38:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2143 103 176 0 4 2 0 1012 0 1 0 99 1 0 0 7 62 4 56 0 1 0 0 259 0 0 0 100 2 0 0 4 228 103 34 1 0 1 0 79 0 0 0 100 3 0 0 0 114 54 108 1 0 0 0 600 0 0 0 100 4 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 5 0 0 2 359 241 20 0 2 4 0 11 0 0 0 100 6 0 0 0 10 2 4 0 1 0 0 294 0 0 0 100 7 0 0 0 45 1 74 0 2 3 0 0 0 0 0 100 March 4, 2026 at 01:38:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2225 103 385 1 14 36 0 1012 0 1 0 99 1 0 0 7 113 4 206 0 12 36 0 259 0 0 0 100 2 0 0 4 260 106 95 0 9 26 0 13 0 0 0 100 3 0 0 0 221 126 180 0 13 41 0 600 0 0 0 100 4 0 0 0 55 2 96 0 12 44 0 0 0 0 0 100 5 0 0 2 453 296 108 1 13 40 0 113 0 0 0 100 6 0 0 0 63 1 112 1 13 31 0 294 0 0 0 100 7 0 0 0 114 0 218 0 10 39 0 0 0 0 0 100 March 4, 2026 at 01:38:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2152 102 233 2 0 1 0 1012 0 1 0 99 1 0 0 7 18 6 10 0 0 1 0 260 0 0 0 100 2 0 0 7 230 104 36 1 1 2 0 78 0 0 0 100 3 0 0 0 114 54 106 1 0 1 0 600 0 0 0 100 4 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 5 0 0 7 336 222 9 0 0 7 0 12 0 0 0 100 6 0 0 0 11 2 2 0 0 1 0 294 0 0 0 100 7 0 0 0 57 2 92 0 0 4 0 1 0 0 0 100 March 4, 2026 at 01:38:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 102 150 0 4 1 0 1022 0 1 0 99 1 0 0 7 17 5 14 1 0 0 0 268 0 0 0 100 2 0 0 3 238 108 34 0 2 0 0 38 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 600 0 0 0 100 4 0 0 0 10 2 6 0 0 0 0 21 0 0 0 100 5 0 0 3 237 121 22 0 0 2 0 42 0 0 0 100 6 0 0 0 11 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 15 0 16 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:38:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2159 102 256 2 3 3 0 1011 0 1 0 99 1 0 0 7 12 4 8 0 0 0 0 259 0 0 0 100 2 0 0 3 228 103 36 0 0 0 0 82 0 0 0 100 3 0 0 0 112 53 106 1 0 0 0 600 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 5 0 0 3 355 243 8 0 1 9 0 11 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 295 0 0 0 100 7 0 0 0 56 0 96 0 0 4 0 0 0 0 0 100 March 4, 2026 at 01:38:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2127 102 192 1 1 1 0 1014 0 1 0 99 1 0 0 7 12 4 8 0 0 0 0 259 0 0 0 100 2 0 0 3 226 107 24 0 0 0 0 28 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 599 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 5 1 0 3 285 170 16 0 0 2 0 39 0 0 0 100 6 0 0 0 10 1 4 1 1 0 0 294 0 0 0 100 7 0 0 0 28 0 40 0 0 0 0 0 0 0 0 100