March 4, 2026 at 01:39:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 736 0 36 4342 135 6203 64 413 1423 15 6259 7 9 0 84 1 1286 0 47 1156 25 3685 19 376 1458 21 7637 5 7 0 88 2 963 0 232 851 19 2627 18 289 1402 13 7407 6 5 0 89 3 1115 0 159 1266 501 3209 22 447 1472 27 6393 11 7 0 83 4 823 0 97 1137 23 4728 17 408 1423 27 11812 4 7 0 90 5 810 0 94 3624 2736 3722 18 362 1541 14 9886 3 12 0 85 6 978 0 161 1166 12 3781 27 466 1483 22 6653 12 7 0 81 7 857 0 40 2194 21 5372 34 296 1292 20 4475 4 7 0 88 March 4, 2026 at 01:39:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 681 0 76 2414 100 539 37 160 1746 34 1498 6 4 0 90 1 9652 0 65 510 55 897 44 178 1963 59 2380 16 7 0 77 2 5683 0 14 361 1 550 41 120 1357 48 3454 7 14 0 80 3 8878 0 74 885 272 822 43 159 1367 59 3707 15 30 0 54 4 2586 0 42 406 3 619 29 153 1365 46 1639 5 15 0 80 5 4526 0 28 453 7 913 22 147 2129 55 2473 5 5 0 90 6 4786 0 33 451 28 916 27 183 2371 85 1645 3 4 0 93 7 6281 0 26 361 6 728 42 185 1775 94 3558 4 7 0 89 March 4, 2026 at 01:39:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 100 18 7 4 119 0 0 0 9 0 91 1 0 0 10 249 109 32 4 4 97 0 258 0 9 0 91 2 30 0 0 201 41 209 4 4 91 0 1012 0 9 0 91 3 0 0 17 267 141 11 5 3 81 0 538 0 9 0 91 4 0 0 0 29 3 9 4 1 90 0 2 0 9 0 91 5 0 0 0 26 1 3 4 2 87 0 0 0 9 0 91 6 0 0 42 60 2 121 0 43 137 0 337 0 2 0 98 7 40 0 0 44 4 118 0 35 159 0 310 0 1 0 99 March 4, 2026 at 01:39:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2201 101 314 6 86 712 0 0 0 11 0 89 1 0 0 10 315 103 250 6 80 735 2 258 0 11 0 89 2 0 0 0 103 2 237 7 84 711 1 0 0 10 0 90 3 0 0 17 647 440 258 5 86 658 1 266 0 11 0 89 4 0 0 0 101 1 223 5 71 609 3 0 0 10 0 90 5 0 0 0 95 1 208 5 74 565 1 1 0 10 0 90 6 23 0 0 154 2 354 0 97 832 3 1555 0 2 0 98 7 0 0 0 482 26 974 0 99 605 1 342 0 2 0 98 March 4, 2026 at 01:39:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 100 449 1 90 605 0 13 0 2 0 98 1 0 0 9 424 103 498 1 89 618 0 263 0 2 0 98 2 0 0 0 100 1 261 1 84 671 0 0 0 2 0 98 3 0 0 18 634 431 340 0 92 566 0 266 0 2 0 98 4 0 0 0 263 2 582 1 88 635 0 2 0 2 0 98 5 0 0 0 109 8 255 1 93 615 0 6 0 1 0 99 6 0 0 0 103 3 275 0 81 597 0 1297 0 2 0 98 7 0 0 0 106 2 257 0 78 589 0 594 0 1 0 98 March 4, 2026 at 01:39:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2194 101 367 1 59 450 0 0 0 2 0 98 1 0 0 10 316 103 246 1 59 502 0 258 0 1 0 99 2 0 0 0 104 2 228 0 66 421 0 0 0 1 0 99 3 0 0 18 542 351 735 0 61 483 0 1057 0 2 0 98 4 0 0 0 104 1 226 1 68 439 0 0 0 1 0 99 5 0 0 0 94 0 210 1 63 401 0 0 0 1 0 99 6 0 0 0 113 5 251 2 67 513 0 505 0 2 0 98 7 0 0 0 146 21 277 0 70 463 0 594 0 1 0 99 March 4, 2026 at 01:39:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 1 1 0 0 0 1 0 99 1 0 0 14 215 103 6 0 0 1 0 258 0 0 0 100 2 0 0 0 13 2 4 0 0 1 0 0 0 0 0 100 3 0 0 21 217 104 46 1 1 2 0 1262 0 0 0 100 4 0 0 0 11 3 4 0 1 0 0 2 0 0 0 100 5 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 6 0 0 0 14 4 6 0 0 1 0 300 0 0 0 100 7 0 0 0 118 52 112 0 0 1 0 593 0 0 0 100 March 4, 2026 at 01:39:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 108 0 0 0 0 1 0 1 0 99 1 0 0 10 214 103 10 0 0 0 0 257 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 17 211 104 36 1 0 0 0 1262 0 0 0 100 4 0 0 0 9 1 4 0 0 1 0 0 0 0 0 100 5 0 0 0 6 0 2 0 0 2 0 0 0 0 0 100 6 0 0 0 14 4 10 0 0 1 0 300 0 0 0 100 7 0 0 0 118 52 115 0 1 1 0 595 0 0 0 100 March 4, 2026 at 01:39:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 112 0 1 0 0 0 0 1 0 99 1 0 0 10 212 103 6 0 0 0 0 258 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 17 212 104 38 0 0 0 0 1261 0 0 0 100 4 0 0 0 13 3 10 0 1 0 0 3 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 110 52 107 0 2 0 0 301 0 0 0 100 7 0 0 0 16 4 6 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:39:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 122 1 0 1 0 10 0 1 0 99 1 0 0 10 214 103 10 0 0 0 0 265 0 0 0 100 2 0 0 0 12 3 6 0 0 0 0 2 0 0 0 100 3 0 0 17 213 104 40 1 1 1 0 1266 0 0 0 100 4 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 5 0 0 0 13 5 6 0 1 0 0 0 0 0 0 100 6 0 0 0 115 53 111 0 0 0 0 305 0 0 0 100 7 0 0 0 12 2 8 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:39:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 114 0 0 0 0 0 0 1 0 99 1 0 0 10 215 103 8 0 0 0 0 257 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 18 209 103 36 1 0 0 0 1262 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 111 53 106 0 0 0 0 300 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:39:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 114 0 0 0 0 0 0 1 0 99 1 0 0 10 213 103 6 0 0 0 0 258 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 17 212 105 38 0 0 0 0 1262 0 0 0 100 4 0 0 0 12 2 6 0 0 0 0 1 0 0 0 100 5 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 6 0 0 0 115 53 115 0 2 0 0 300 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:39:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 114 0 0 0 0 0 0 1 0 99 1 0 0 10 214 103 10 0 0 0 0 258 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 17 211 104 36 1 0 0 0 1265 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 5 0 0 0 6 0 2 0 0 1 0 0 0 0 0 100 6 0 0 0 78 35 74 0 0 1 0 300 0 0 0 100 7 0 0 0 52 21 52 0 2 3 0 594 0 0 0 100 March 4, 2026 at 01:39:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 1 0 99 1 0 0 10 212 103 6 0 0 0 0 258 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 17 211 104 36 1 0 0 0 1262 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 300 0 0 0 100 7 0 0 0 109 52 105 0 1 0 0 594 0 0 0 100 March 4, 2026 at 01:39:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 212 0 1 0 0 0 0 1 0 99 1 0 0 9 220 103 20 0 2 0 0 269 0 0 0 100 2 0 0 0 8 1 4 0 1 0 0 5 0 0 0 100 3 0 0 19 217 106 44 1 1 0 0 1266 0 0 0 100 4 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 5 0 0 0 11 6 0 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 8 0 0 0 0 304 0 0 0 100 7 0 0 0 20 5 14 0 1 2 0 593 0 0 0 100 March 4, 2026 at 01:39:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 214 0 1 0 0 0 0 1 0 99 1 0 0 10 219 104 10 0 1 2 0 259 0 0 0 100 2 0 0 0 9 1 12 0 1 0 0 0 0 0 0 100 3 0 0 18 210 104 36 0 0 0 0 1263 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 8 0 0 0 0 300 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 595 0 0 0 100 March 4, 2026 at 01:39:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 213 0 1 0 0 0 0 1 0 99 1 0 0 10 213 103 6 0 0 1 0 258 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 3 0 0 18 211 104 36 1 0 1 0 1261 0 0 0 100 4 0 0 0 10 3 2 0 0 1 0 2 0 0 0 100 5 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 6 0 0 0 14 4 6 0 0 1 0 300 0 0 0 100 7 0 0 0 11 3 4 0 0 1 0 594 0 0 0 100 March 4, 2026 at 01:39:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 218 0 0 0 0 0 0 1 0 99 1 0 0 10 218 103 18 0 4 0 0 258 0 0 0 100 2 0 0 0 12 1 10 0 4 1 0 0 0 0 0 100 3 0 0 17 217 104 46 2 2 0 0 1262 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 17 4 12 0 1 0 0 300 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:39:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 212 0 0 0 0 0 0 1 0 99 1 0 0 9 213 103 6 0 0 0 0 258 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 2 0 19 212 104 38 0 1 1 0 1278 0 0 0 100 4 0 0 0 14 3 12 0 1 1 0 3 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 13 4 8 0 0 0 0 301 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 593 0 0 0 100 March 4, 2026 at 01:39:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 214 0 0 0 0 0 0 1 0 99 1 0 0 9 221 105 18 0 0 0 0 270 0 0 0 100 2 0 0 0 13 3 10 0 0 0 0 9 0 0 0 100 3 0 0 19 215 104 40 1 0 0 0 1279 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 12 6 2 0 0 0 0 21 0 0 0 100 6 0 0 0 12 3 8 0 0 0 0 300 0 0 0 100 7 0 0 0 12 2 8 0 0 0 0 595 0 0 0 100 March 4, 2026 at 01:39:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 215 0 0 0 0 0 0 1 0 99 1 0 0 10 216 104 12 1 0 0 0 267 0 0 0 100 2 0 0 0 11 2 8 0 0 0 0 19 0 0 0 100 3 0 0 17 210 104 36 0 0 1 0 1277 0 0 0 100 4 0 0 0 12 2 6 0 0 1 0 2 0 0 0 100 5 0 0 0 9 0 8 0 1 1 0 0 0 0 0 100 6 0 0 0 14 4 8 1 0 0 0 300 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:39:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 691 0 0 2200 100 353 8 36 97 5 513 1 1 0 98 1 924 0 10 301 106 196 10 38 53 4 767 2 1 0 97 2 636 0 0 73 2 128 2 16 91 0 589 2 1 0 97 3 3930 0 67 294 105 227 10 32 125 12 2139 3 9 0 88 4 1347 0 1 119 3 265 8 32 126 10 931 4 1 0 95 5 634 0 0 113 1 212 8 30 45 10 462 4 1 0 96 6 190 0 0 142 26 245 15 50 22 6 920 1 1 0 98 7 869 0 0 94 3 157 3 17 55 2 1058 2 1 0 97 March 4, 2026 at 01:39:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 2158 100 203 0 13 96 0 9 0 1 0 99 1 14 0 9 269 103 110 0 18 72 0 315 0 0 0 100 2 0 0 0 52 1 80 0 10 86 0 0 0 0 0 100 3 0 0 47 332 178 273 1 15 82 0 1355 0 1 0 99 4 23 0 0 83 7 133 0 19 95 0 18 0 0 0 99 5 0 0 0 42 0 63 0 13 61 0 4 0 0 0 100 6 0 0 0 187 54 250 0 22 103 0 312 0 1 0 99 7 0 0 0 48 2 73 0 15 48 0 598 0 0 0 100 March 4, 2026 at 01:39:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 122 0 1 0 0 0 0 1 0 99 1 0 0 10 215 104 8 0 0 0 0 260 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 7 0 18 211 104 36 1 0 0 0 1351 0 0 0 100 4 0 0 0 18 7 12 0 0 0 0 10 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 73 34 68 0 0 0 0 300 0 0 0 100 7 0 0 0 50 21 46 0 1 1 0 593 0 0 0 100 March 4, 2026 at 01:39:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 171 0 1 1 0 0 0 1 0 99 1 8 0 10 227 106 28 1 1 2 0 301 0 0 0 100 2 0 0 0 9 1 6 0 0 0 0 7 0 0 0 100 3 0 0 17 215 104 40 1 0 0 0 1355 0 0 0 100 4 0 0 0 21 8 16 0 0 0 0 11 0 0 0 100 5 0 0 0 12 5 2 0 1 0 0 0 0 0 0 100 6 0 0 0 12 3 6 1 0 0 0 300 0 0 0 100 7 0 0 0 59 26 52 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:40:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4359 0 142 2524 102 726 17 110 64 45 2584 5 3 0 92 1 1497 0 26 534 104 552 17 109 58 41 2597 3 2 0 95 2 25314 0 26 357 4 584 19 125 96 43 3058 10 23 0 68 3 1619 0 237 547 104 675 13 128 93 43 4780 2 3 0 95 4 6652 0 14 317 8 514 19 111 95 42 2370 3 3 0 95 5 5639 0 6 371 2 519 6 93 104 60 2077 2 2 0 96 6 2025 0 29 306 4 544 14 111 98 47 1937 3 2 0 95 7 1508 0 198 310 19 571 12 96 69 40 2808 2 2 0 96 March 4, 2026 at 01:40:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 628 0 0 2337 101 518 30 94 51 0 1391 2 2 0 96 1 687 0 14 526 108 598 37 112 78 4 1831 4 1 0 95 2 416 0 7 317 45 494 28 86 52 1 1434 2 1 0 98 3 295 0 63 428 105 476 23 79 44 0 2988 2 1 0 96 4 880 0 0 249 5 439 22 69 34 2 1188 2 1 0 97 5 324 0 0 212 5 349 15 47 48 0 1263 2 1 0 97 6 476 0 0 199 2 357 16 60 53 2 1574 4 1 0 95 7 456 0 56 180 5 310 17 57 59 2 1426 2 2 0 97 March 4, 2026 at 01:40:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 231 2150 100 200 0 9 79 0 0 0 1 0 99 1 0 0 2 311 104 127 0 19 81 0 301 0 1 0 99 2 0 0 14 113 10 124 0 18 75 0 306 0 0 0 100 3 12 0 19 438 202 337 1 19 101 0 1355 0 1 0 99 4 0 0 0 95 1 105 0 19 70 0 0 0 0 0 100 5 0 0 0 82 6 74 0 7 70 0 9 0 0 0 100 6 0 0 0 82 1 79 0 10 76 0 0 0 0 0 100 7 0 0 7 75 3 70 0 16 62 0 594 0 0 0 100 March 4, 2026 at 01:40:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2105 100 115 0 1 0 0 0 0 1 0 99 1 0 0 2 235 103 8 0 1 1 0 302 0 0 0 99 2 0 0 7 32 3 8 1 0 0 0 259 0 0 0 100 3 0 0 19 331 154 140 1 1 2 0 1351 0 1 0 99 4 0 0 0 34 5 10 0 1 0 0 7 0 0 0 100 5 0 0 0 37 6 14 0 0 0 0 10 0 0 0 100 6 0 0 0 27 1 4 0 0 0 0 2 0 0 0 100 7 0 0 0 30 3 6 0 1 0 0 594 0 0 0 100 March 4, 2026 at 01:40:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 100 116 0 0 0 0 0 0 1 0 99 1 0 0 2 223 104 16 1 0 0 0 313 0 0 0 100 2 0 0 7 18 5 14 0 0 0 0 269 0 0 0 100 3 0 0 19 317 154 142 1 0 0 0 1357 0 0 0 99 4 0 0 0 13 2 6 0 1 1 0 0 0 0 0 100 5 0 0 0 27 12 18 0 1 1 0 10 0 0 0 100 6 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 14 2 8 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:40:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4644 0 157 2667 102 1064 45 181 160 71 3680 6 4 0 90 1 3638 0 326 787 104 1075 55 205 141 75 5531 8 4 0 88 2 2948 0 16 610 5 1085 45 191 152 58 3879 3 3 0 94 3 42815 0 294 927 138 1129 57 193 196 57 6040 15 10 0 76 4 6037 0 7 579 11 889 32 181 172 65 4003 4 3 0 93 5 1115 0 7 459 14 764 17 127 97 71 3758 3 2 0 95 6 1570 0 24 493 4 850 26 160 114 53 2837 4 2 0 93 7 913 0 17 412 3 759 16 128 95 53 2860 3 2 0 95 March 4, 2026 at 01:40:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 70 2109 100 114 0 6 6 0 16 0 2 0 98 1 2 0 2 237 103 18 0 3 6 0 313 0 1 0 99 2 0 0 7 27 2 12 0 1 0 0 320 0 0 0 100 3 19 0 33 334 155 150 1 2 3 0 1407 0 1 0 99 4 2 0 7 33 5 16 0 2 14 0 11 0 0 0 100 5 65 0 0 28 4 14 0 2 0 0 21 0 0 0 100 6 0 0 0 23 0 6 0 0 0 0 4 0 0 0 100 7 0 0 0 25 2 6 0 1 0 0 595 0 0 0 100 March 4, 2026 at 01:40:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2219 100 208 0 15 81 0 0 0 2 0 98 1 0 0 465 270 103 108 0 21 76 0 300 0 1 0 99 2 0 0 7 129 2 103 1 16 92 0 259 0 1 0 99 3 1 0 18 507 235 386 1 23 67 0 1355 0 1 0 99 4 0 0 0 152 5 142 0 23 90 0 2 0 0 0 100 5 0 0 0 155 6 143 0 19 91 0 9 0 0 0 100 6 0 0 0 123 0 90 0 15 66 0 0 0 0 0 100 7 0 0 0 121 2 91 0 13 50 0 595 0 0 0 100 March 4, 2026 at 01:40:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 100 140 0 5 15 0 0 0 1 0 99 1 0 0 2 238 102 57 1 8 13 0 300 0 0 0 100 2 0 0 7 26 2 39 0 2 21 0 259 0 0 0 100 3 0 0 19 293 157 186 1 10 30 0 1356 0 1 0 99 4 0 0 0 134 48 158 0 10 21 0 0 0 0 0 100 5 0 0 0 39 6 56 0 6 12 0 9 0 0 0 100 6 0 0 0 31 0 48 0 7 10 0 0 0 0 0 100 7 0 0 0 22 2 28 0 4 7 0 593 0 0 0 100 March 4, 2026 at 01:40:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35772 0 208 2664 101 1095 39 193 117 60 3998 12 9 0 79 1 924 0 29 784 116 1066 42 210 103 69 4153 4 3 0 93 2 3405 0 19 496 9 777 29 145 134 41 3027 3 3 0 94 3 10848 0 207 797 104 985 36 159 172 62 6746 8 5 0 87 4 5714 0 70 593 29 893 19 143 137 73 5204 7 4 0 90 5 4277 0 316 516 14 964 30 172 134 79 3481 4 3 0 93 6 1603 0 22 572 3 1091 29 175 134 83 3542 5 2 0 93 7 1687 0 8 427 9 712 31 136 72 41 3385 3 2 0 95 March 4, 2026 at 01:40:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2109 100 72 0 3 6 0 9 0 2 0 98 1 45 0 2 251 107 34 0 4 6 0 320 0 1 0 99 2 40 0 7 75 25 65 0 5 1 0 271 0 0 0 100 3 11 0 19 225 102 37 1 2 0 0 1127 0 0 0 99 4 3 0 14 29 3 14 1 2 0 0 313 0 0 0 100 5 0 0 0 126 3 106 0 1 0 0 16 0 0 0 100 6 0 0 7 22 0 8 0 2 0 0 16 0 0 0 100 7 0 0 0 26 2 8 0 2 0 0 607 0 0 0 100 March 4, 2026 at 01:40:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2136 100 98 0 1 4 0 0 0 1 0 99 1 0 0 233 229 109 22 0 0 5 0 310 0 1 0 99 2 0 0 7 63 11 22 1 0 1 0 262 0 0 0 100 3 1 0 5 331 143 128 1 2 1 0 1086 0 0 0 99 4 0 0 14 46 5 6 0 0 1 0 268 0 0 0 100 5 0 0 0 61 2 20 0 1 0 0 0 0 0 0 100 6 0 0 0 45 2 4 0 1 1 0 0 0 0 0 100 7 0 0 0 47 3 6 0 1 1 0 594 0 0 0 100 March 4, 2026 at 01:40:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2185 100 201 0 17 55 0 0 0 1 0 99 1 0 0 233 265 108 83 0 12 70 0 309 0 1 0 99 2 0 0 7 82 4 75 0 11 68 0 259 0 0 0 100 3 0 0 5 445 210 331 1 22 63 0 1087 0 1 0 99 4 0 0 14 100 3 114 0 17 74 0 266 0 0 0 100 5 0 0 0 91 1 101 0 16 80 0 0 0 0 0 100 6 0 0 0 89 1 94 0 24 77 0 0 0 0 0 100 7 0 0 0 77 2 65 0 19 52 0 594 0 0 0 100 March 4, 2026 at 01:40:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 433 0 21 2178 100 214 3 21 8 16 309 0 2 0 98 1 35 0 22 306 109 128 0 30 30 13 634 0 1 0 99 2 5483 0 139 64 3 115 4 22 42 22 2669 1 3 0 96 3 2165 0 12 403 151 298 0 33 42 26 1774 1 1 0 98 4 97 0 16 102 5 196 0 36 22 34 718 0 0 0 99 5 88 0 1 91 1 154 1 30 24 25 388 0 0 0 100 6 21 0 5 90 2 125 2 27 13 15 260 0 0 0 100 7 23 0 12 79 2 107 1 22 18 14 827 0 0 0 100 March 4, 2026 at 01:40:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2859 0 36 2610 101 800 18 112 59 38 3754 8 3 0 90 1 34457 0 84 778 137 921 32 165 52 41 3436 11 8 0 81 2 4757 0 312 389 7 663 8 103 82 43 3790 5 4 0 92 3 4268 0 272 637 112 835 20 131 91 36 4429 5 3 0 92 4 5847 0 39 450 8 651 8 106 100 30 3204 6 2 0 92 5 955 0 2 431 11 775 21 117 66 54 2564 2 1 0 96 6 1373 0 14 395 5 632 8 110 64 40 2726 3 2 0 96 7 945 0 11 386 4 599 12 93 60 34 2442 2 1 0 97 March 4, 2026 at 01:40:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2170 100 110 0 0 2 0 0 0 2 0 98 1 0 0 2 286 102 4 0 1 0 0 300 0 0 0 100 2 0 0 469 34 10 24 1 0 2 0 263 0 0 0 99 3 44 0 5 376 149 130 1 1 0 0 1103 0 1 0 99 4 3 0 14 82 4 6 0 0 0 0 284 0 0 0 100 5 0 0 0 84 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 88 1 12 0 0 0 0 0 0 0 0 100 7 0 0 0 81 2 4 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:40:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 0 0 0 0 0 1 0 99 1 0 0 2 211 102 2 0 0 0 0 300 0 0 0 100 2 0 0 7 9 2 6 0 0 0 0 259 0 0 0 100 3 0 0 5 319 157 144 1 0 1 0 1095 0 0 0 99 4 0 0 14 13 4 10 0 0 0 0 267 0 0 0 100 5 0 0 0 11 2 6 0 0 1 0 0 0 0 0 100 6 0 0 0 20 1 22 0 1 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:40:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 100 204 0 16 82 0 0 0 1 0 99 1 0 0 2 282 102 145 1 20 98 0 300 0 0 0 100 2 0 0 7 50 2 87 0 18 81 0 259 0 0 0 100 3 0 0 5 450 235 414 0 20 79 0 1095 0 1 0 99 4 0 0 14 79 6 145 0 24 96 0 268 0 0 0 100 5 0 0 0 60 2 109 0 15 80 0 0 0 0 0 100 6 0 0 0 84 2 149 0 22 108 0 0 0 0 0 100 7 0 0 0 53 2 90 2 18 65 0 593 0 0 0 100 March 4, 2026 at 01:40:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1762 0 190 2693 101 1114 32 178 111 56 2749 3 3 0 94 1 3450 0 319 748 104 1036 26 180 124 61 4103 7 4 0 89 2 1358 0 39 530 13 898 22 153 132 52 3394 3 3 0 94 3 43151 0 188 851 134 1139 35 167 176 55 6393 14 11 0 75 4 9256 0 65 681 25 983 27 168 149 66 5056 7 4 0 89 5 952 0 14 486 5 889 14 145 106 95 2665 3 2 0 95 6 1579 0 6 581 16 1033 21 163 99 60 5107 4 2 0 94 7 2087 0 6 427 3 729 13 129 73 53 3572 5 1 0 94 March 4, 2026 at 01:40:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 0 2132 105 121 0 2 0 0 26 0 1 0 99 1 30 0 3 243 105 33 0 3 2 0 341 0 0 0 100 2 0 0 77 36 9 35 1 3 6 0 282 0 1 0 99 3 16 0 19 235 105 44 2 0 6 0 1124 0 1 0 99 4 9 0 21 111 46 102 1 4 0 0 273 0 0 0 100 5 0 0 0 39 8 17 1 3 1 0 7 0 0 0 100 6 0 0 0 25 1 8 0 1 0 0 10 0 0 0 100 7 0 0 0 28 2 12 0 2 0 0 598 0 0 0 100 March 4, 2026 at 01:40:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2192 106 110 0 3 0 0 9 0 1 0 99 1 0 0 7 285 102 4 0 1 1 0 300 0 0 0 100 2 9 0 49 83 2 18 0 1 4 0 305 0 1 0 99 3 0 0 469 217 102 34 1 0 2 0 1089 0 1 0 99 4 0 0 14 123 22 44 0 1 0 0 266 0 0 0 100 5 0 0 0 162 32 84 0 3 0 0 0 0 0 0 100 6 0 0 0 84 2 8 0 1 0 0 0 0 0 0 100 7 0 0 0 82 2 4 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:40:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 114 0 3 0 0 9 0 1 0 99 1 0 0 2 218 102 6 1 2 1 0 300 0 0 0 100 2 1 0 7 12 3 6 0 0 1 0 259 0 0 0 100 3 0 0 5 208 102 32 0 0 1 0 1090 0 0 0 100 4 0 0 14 12 5 6 0 0 1 0 268 0 0 0 100 5 0 0 0 115 51 110 0 0 1 0 0 0 0 0 100 6 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 7 0 0 0 12 3 4 1 0 1 0 594 0 0 0 100 March 4, 2026 at 01:40:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6152 0 181 2500 107 701 18 112 134 49 2522 5 3 0 92 1 6329 0 136 533 104 569 10 141 129 49 2584 3 2 0 95 2 598 0 15 390 7 613 11 104 171 49 2334 1 2 0 97 3 18265 0 241 596 185 656 16 116 173 55 3593 5 4 0 90 4 2423 0 32 326 3 535 5 129 160 45 1781 1 2 0 97 5 1198 0 16 380 44 533 6 90 135 49 3250 2 2 0 96 6 250 0 22 309 3 518 5 107 143 38 1485 1 1 0 98 7 466 0 15 279 3 450 5 90 98 43 1719 1 1 0 98 March 4, 2026 at 01:40:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 908 0 70 2411 101 580 11 86 52 14 1987 3 3 0 94 1 15705 0 9 525 102 586 20 89 49 13 2323 6 5 0 88 2 825 0 7 298 10 510 19 76 75 8 2141 2 2 0 96 3 2567 0 35 575 153 657 29 93 57 6 1900 4 2 0 94 4 5052 0 29 409 35 565 28 89 90 7 3412 5 2 0 92 5 1387 0 178 234 2 432 16 76 44 22 1117 3 1 0 96 6 1226 0 1 351 2 570 12 76 76 24 1287 1 1 0 98 7 397 0 9 195 3 317 10 61 38 13 1681 1 1 0 98 March 4, 2026 at 01:40:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2175 100 56 0 1 1 0 0 0 2 0 98 1 0 0 464 227 103 12 0 1 1 0 7 0 0 0 100 2 0 0 7 89 5 16 0 0 0 0 572 0 0 0 99 3 0 0 5 341 132 64 0 0 0 0 1 0 0 0 100 4 2 0 14 89 3 44 1 1 0 0 1365 0 1 0 99 5 0 0 0 89 9 6 0 0 0 0 1 0 0 0 100 6 44 0 0 193 7 116 0 0 0 0 9 0 0 0 100 7 0 0 0 88 2 12 0 2 0 0 593 0 0 0 100 March 4, 2026 at 01:40:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 20 0 1 0 0 0 0 1 0 99 1 0 0 7 221 102 14 0 2 0 0 9 0 0 0 100 2 0 0 7 17 4 14 1 0 0 0 578 0 0 0 100 3 0 0 7 209 102 2 0 0 0 0 0 0 0 0 100 4 0 0 14 16 4 42 1 1 0 0 1355 0 0 0 100 5 0 0 0 97 45 90 0 1 0 0 0 0 0 0 100 6 0 0 0 130 8 130 0 1 0 0 11 0 0 0 100 7 0 0 0 10 2 6 0 1 0 0 595 0 0 0 100 March 4, 2026 at 01:40:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 4 0 0 0 0 0 0 1 0 99 1 0 0 7 217 101 8 0 0 0 0 0 0 0 0 100 2 0 0 7 12 3 8 0 0 0 0 559 0 0 0 100 3 0 0 7 209 102 2 0 0 0 0 0 0 0 0 100 4 0 0 14 14 4 38 1 0 2 0 1357 0 0 0 100 5 0 0 0 110 52 104 0 0 0 0 0 0 0 0 100 6 0 0 0 125 7 120 1 1 1 0 9 0 0 0 100 7 0 0 0 13 2 14 0 1 1 0 593 0 0 0 100 March 4, 2026 at 01:40:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2430 0 136 2741 100 1179 43 233 170 69 3583 4 5 0 91 1 2127 0 220 839 102 1166 48 236 182 52 5634 4 4 0 92 2 4906 0 189 587 4 1032 47 177 209 56 6111 6 4 0 90 3 7505 0 95 900 159 1117 37 218 235 54 4043 6 4 0 90 4 4206 0 124 602 4 1122 41 211 175 74 5237 6 4 0 90 5 3295 0 44 587 19 1000 22 173 176 55 3160 4 3 0 93 6 3236 0 20 688 17 1174 21 215 214 54 3951 4 3 0 93 7 36401 0 35 680 26 1059 52 159 177 78 3981 13 8 0 80 March 4, 2026 at 01:40:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 0 2138 105 174 1 5 0 0 18 0 1 0 99 1 7 0 73 219 102 8 0 2 6 0 17 0 1 0 99 2 0 0 14 29 3 16 0 2 6 0 575 0 1 0 99 3 12 0 17 223 101 8 0 2 0 0 11 0 0 0 100 4 0 0 0 25 2 34 1 1 0 0 1123 0 0 0 100 5 18 0 14 31 6 12 1 1 0 0 291 0 0 0 100 6 6 0 0 29 3 12 0 2 0 0 7 0 0 0 100 7 5 0 0 89 33 70 0 1 0 0 604 0 0 0 100 March 4, 2026 at 01:40:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2191 106 230 0 0 0 0 9 0 1 0 99 1 0 0 45 286 101 16 0 1 3 0 5 0 1 0 99 2 0 0 469 24 3 18 1 0 3 0 563 0 1 0 99 3 0 0 4 280 101 2 0 1 0 0 0 0 0 0 100 4 0 0 0 92 4 48 1 0 0 0 1112 0 0 0 99 5 0 0 14 87 9 6 0 0 2 0 266 0 0 0 100 6 0 0 0 86 3 10 0 1 0 0 2 0 0 0 100 7 0 0 0 87 2 12 1 1 0 0 594 0 0 0 100 March 4, 2026 at 01:40:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 174 0 0 0 0 9 0 1 0 99 1 0 0 2 254 123 48 0 1 0 0 0 0 0 0 100 2 0 0 7 11 3 8 0 0 0 0 560 0 0 0 100 3 0 0 5 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1098 0 0 0 100 5 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:40:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2936 0 130 2597 107 892 21 140 73 59 2750 3 3 0 94 1 3475 0 222 799 135 958 36 167 73 64 3666 6 3 0 91 2 34978 0 32 508 8 874 22 117 94 67 4950 12 9 0 80 3 800 0 66 697 113 848 15 141 71 46 2864 2 2 0 96 4 1867 0 185 419 6 781 21 135 109 57 4052 3 3 0 94 5 10007 0 138 374 5 652 14 100 124 62 5081 4 4 0 92 6 8235 0 25 484 4 703 12 114 120 62 3512 5 3 0 91 7 1239 0 35 426 4 735 11 126 98 59 2960 2 2 0 96 March 4, 2026 at 01:40:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2169 101 234 2 21 54 0 392 2 1 0 97 1 5 0 3 287 102 104 2 20 76 0 115 2 0 0 98 2 82 0 7 67 3 92 0 14 78 0 660 0 1 0 99 3 47 0 31 324 159 159 1 14 61 0 22 1 0 0 99 4 123 0 7 85 5 161 1 25 83 0 1456 0 1 0 99 5 12 0 14 72 3 99 0 13 65 0 348 0 0 0 100 6 75 0 0 132 27 167 0 17 53 0 32 1 0 0 99 7 1 0 70 70 7 109 2 14 74 0 125 0 1 0 98 March 4, 2026 at 01:40:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 101 194 0 2 0 0 300 0 1 0 99 1 0 0 3 281 101 0 0 0 0 0 0 0 0 0 100 2 0 0 469 16 2 8 0 0 2 0 555 0 1 0 99 3 0 0 4 311 108 32 0 2 0 0 10 0 0 0 100 4 0 0 0 90 5 40 2 0 0 0 1390 0 0 0 100 5 0 0 14 82 3 8 0 1 0 0 266 0 0 0 100 6 0 0 0 85 3 8 0 1 0 0 3 0 0 0 100 7 0 0 42 76 1 6 0 0 2 0 0 0 1 0 99 March 4, 2026 at 01:40:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 186 0 2 0 0 300 0 1 0 99 1 0 0 2 213 101 4 0 0 0 0 5 0 0 0 100 2 0 0 7 15 4 14 0 0 0 0 560 0 0 0 100 3 0 0 5 249 106 44 0 2 0 0 9 0 0 0 100 4 0 0 0 26 6 58 1 1 0 0 1401 0 0 0 100 5 0 0 14 19 11 10 0 0 0 0 288 0 0 0 100 6 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 6 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:40:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 212 1 0 0 0 300 0 1 0 99 1 0 0 3 209 101 0 0 0 0 0 0 0 0 0 100 2 0 0 7 12 3 8 1 0 0 0 555 0 0 0 100 3 0 0 4 216 106 10 0 0 0 0 8 0 0 0 100 4 0 0 0 21 7 44 1 0 0 0 1393 0 0 0 100 5 0 0 14 15 3 16 1 1 0 0 266 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3955 0 34 2729 102 1013 47 206 111 55 3824 6 3 0 90 1 34086 0 24 852 106 1102 52 196 102 49 4529 12 8 0 80 2 4190 0 483 516 13 997 33 170 116 73 4904 7 4 0 90 3 3383 0 88 887 132 1147 33 191 119 80 5812 4 3 0 93 4 5873 0 32 612 6 997 35 175 112 55 4497 8 4 0 88 5 5965 0 147 475 4 858 15 152 123 66 3744 4 3 0 93 6 5113 0 17 485 3 847 19 175 127 64 4156 5 3 0 92 7 930 0 34 442 4 779 14 136 93 52 2583 2 2 0 96 March 4, 2026 at 01:40:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 101 186 0 14 73 0 300 0 1 0 99 1 0 0 3 267 101 97 0 15 82 0 0 0 0 0 100 2 0 0 7 68 2 74 0 13 66 0 557 0 1 0 99 3 44 0 3 423 212 186 0 10 68 0 9 0 0 0 100 4 0 0 28 70 5 125 2 14 72 0 1397 0 1 0 99 5 3 0 14 69 2 107 0 10 81 0 268 0 0 0 100 6 0 0 7 114 2 200 0 15 46 0 2 0 0 0 100 7 0 0 70 77 2 103 0 15 79 0 0 0 1 0 99 March 4, 2026 at 01:40:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 101 108 0 3 0 0 300 0 1 0 99 1 0 0 2 281 101 0 0 0 0 0 0 0 0 0 100 2 0 0 469 15 2 6 0 0 2 0 553 0 0 0 99 3 0 0 5 388 151 110 0 3 0 0 9 0 0 0 100 4 0 0 0 96 9 48 1 1 0 0 1389 0 0 0 100 5 0 0 14 79 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 84 1 8 0 2 0 0 0 0 0 0 100 7 0 0 42 83 2 16 0 2 2 0 0 0 1 0 99 March 4, 2026 at 01:40:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 118 0 0 0 0 300 0 1 0 99 1 0 0 7 213 101 8 0 0 0 0 10 0 0 0 100 2 0 0 7 11 2 8 1 0 0 0 560 0 0 0 100 3 0 0 7 220 107 14 0 0 0 0 9 0 0 0 100 4 0 0 0 36 13 60 0 0 0 0 1397 0 0 0 100 5 0 0 14 99 50 90 0 1 0 0 266 0 0 0 100 6 0 0 0 11 2 8 0 1 0 0 2 0 0 0 100 7 0 0 0 14 2 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7453 0 219 2676 101 987 19 168 136 74 4636 5 4 0 90 1 5010 0 127 747 104 1027 35 201 109 84 3955 6 3 0 91 2 4255 0 41 507 3 778 20 138 87 64 3822 6 3 0 92 3 1407 0 57 778 117 996 23 178 93 61 3698 3 2 0 94 4 36479 0 16 460 6 868 33 161 95 58 4798 11 8 0 80 5 555 0 25 460 31 750 13 130 50 48 2588 2 1 0 96 6 1372 0 13 432 2 764 19 138 95 44 4251 4 3 0 94 7 7231 0 312 337 9 607 16 95 106 55 3591 4 4 0 92 March 4, 2026 at 01:40:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2112 101 62 1 4 7 0 309 0 2 0 98 1 2 0 14 239 102 27 0 5 8 0 10 0 1 0 99 2 44 0 7 85 6 69 0 3 0 0 573 0 0 0 100 3 21 0 21 331 150 116 0 1 4 0 17 0 0 0 100 4 28 0 0 36 6 44 2 2 1 0 1414 0 0 0 99 5 4 0 14 27 3 8 0 2 1 0 270 0 0 0 100 6 0 0 0 31 4 8 0 1 1 0 9 0 0 0 100 7 0 0 0 33 4 10 0 2 2 0 18 0 0 0 100 March 4, 2026 at 01:40:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2196 102 169 0 13 74 0 300 0 2 0 98 1 0 0 352 262 101 94 0 11 78 0 0 0 1 0 99 2 0 0 7 104 8 70 0 12 44 0 565 0 0 0 99 3 0 0 5 479 207 208 0 13 71 0 0 0 1 0 99 4 0 0 0 115 4 132 1 17 79 0 1384 0 1 0 99 5 0 0 14 107 2 92 0 11 60 0 266 0 0 0 100 6 0 0 0 162 1 202 0 20 75 0 0 0 0 0 100 7 0 0 0 107 2 91 0 14 84 0 0 0 0 0 100 March 4, 2026 at 01:40:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2105 101 103 0 2 0 0 300 0 1 0 99 1 0 0 2 230 102 4 0 1 0 0 1 0 0 0 100 2 3 0 7 40 8 24 1 1 0 0 562 0 0 0 100 3 0 0 5 336 150 116 0 2 0 0 0 0 0 0 100 4 0 0 0 32 5 38 1 0 1 0 1383 0 0 0 99 5 0 0 14 25 2 4 1 0 0 0 266 0 0 0 100 6 0 0 0 28 3 8 0 0 0 0 3 0 0 0 100 7 0 0 0 25 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4827 0 61 2446 101 554 16 91 75 66 3605 3 3 0 93 1 686 0 20 528 103 560 13 114 57 56 1774 1 1 0 97 2 403 0 33 296 11 446 4 88 56 35 2959 1 1 0 98 3 9003 0 162 572 145 598 10 109 37 64 2358 3 3 0 94 4 1356 0 140 245 5 453 10 105 44 44 3272 2 2 0 96 5 304 0 30 278 11 413 6 83 46 50 1472 1 1 0 98 6 462 0 5 247 3 403 7 96 69 39 1772 1 1 0 98 7 7384 0 185 211 3 358 11 61 83 44 2208 2 3 0 96 March 4, 2026 at 01:40:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5349 0 14 2366 101 475 16 61 80 7 2285 4 3 0 93 1 1045 0 2 489 103 491 12 62 39 15 1818 2 1 0 97 2 1230 0 10 219 3 409 9 58 65 20 1622 1 1 0 98 3 26379 0 61 434 105 413 12 69 31 8 1886 9 6 0 86 4 462 0 70 228 4 416 19 48 43 9 2545 2 2 0 96 5 987 0 15 168 9 252 12 37 15 7 1471 2 1 0 97 6 416 0 0 225 12 367 10 46 44 8 1098 3 1 0 96 7 3258 0 178 148 4 230 5 32 47 13 1142 4 1 0 95 March 4, 2026 at 01:40:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 462 2117 102 112 1 1 1 0 300 0 1 0 99 1 0 0 7 281 101 0 0 0 0 0 0 0 0 0 100 2 0 0 7 83 2 6 0 0 0 0 556 0 0 0 100 3 0 0 7 284 101 6 0 1 0 0 0 0 0 0 100 4 0 0 42 95 6 56 2 2 2 0 1383 0 1 0 99 5 2 0 14 182 52 104 0 0 0 0 265 0 0 0 100 6 44 0 0 95 4 16 0 0 0 0 7 0 0 0 100 7 0 0 0 81 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 102 186 0 9 65 0 300 0 1 0 99 1 0 0 7 271 102 126 0 20 86 0 1 0 0 0 100 2 0 0 7 42 2 66 1 11 35 0 553 0 0 0 100 3 0 0 7 307 160 83 0 18 60 0 0 0 1 0 99 4 0 0 0 62 6 131 1 16 62 0 1383 0 1 0 99 5 0 0 14 151 52 193 0 9 61 0 266 0 0 0 100 6 0 0 0 130 7 225 0 18 80 0 11 0 0 0 100 7 0 0 0 46 1 80 0 13 56 0 0 0 0 0 100 March 4, 2026 at 01:40:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 106 0 0 0 0 300 0 1 0 99 1 0 0 7 209 101 0 0 0 0 0 0 0 0 0 100 2 0 0 7 11 2 8 0 1 0 0 552 0 0 0 100 3 0 0 7 208 101 2 0 0 0 0 0 0 0 0 100 4 0 0 0 16 5 38 1 0 1 0 1384 0 0 0 100 5 0 0 14 108 52 104 0 0 0 0 266 0 0 0 100 6 0 0 0 26 6 20 0 0 0 0 9 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1972 0 118 2760 103 1278 42 202 85 70 3786 4 3 0 93 1 2149 0 389 776 104 1064 33 193 93 78 4318 4 3 0 94 2 34050 0 26 640 5 1000 41 148 406 38 4483 13 7 0 80 3 1122 0 72 717 102 897 20 177 143 60 3226 3 3 0 94 4 3692 0 196 511 10 917 19 157 129 78 4922 4 3 0 93 5 9512 0 59 625 22 917 31 135 177 50 4653 8 4 0 88 6 6491 0 24 571 9 922 20 158 162 77 3248 7 3 0 90 7 30553 0 18 511 6 867 24 114 361 60 6261 13 9 0 78 March 4, 2026 at 01:40:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 101 82 0 3 5 0 313 0 1 0 99 1 24 0 2 269 122 44 0 2 0 0 10 0 0 0 100 2 0 0 7 128 2 113 0 2 0 0 563 0 0 0 100 3 0 0 103 215 102 12 0 3 5 0 23 0 1 0 99 4 0 0 0 38 5 16 2 1 0 0 1195 0 0 0 100 5 3 0 21 27 3 44 0 4 0 0 496 0 0 0 100 6 73 0 0 33 5 15 0 1 0 0 18 0 0 0 100 7 0 0 0 30 1 18 0 5 2 0 12 0 0 0 100 March 4, 2026 at 01:40:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 462 2117 101 8 0 0 1 0 300 0 1 0 99 1 0 0 7 382 151 102 0 1 1 0 0 0 0 0 100 2 0 0 7 186 3 108 1 1 1 0 554 0 0 0 100 3 0 0 49 277 101 6 0 1 2 0 0 0 1 0 99 4 0 0 0 89 5 8 0 0 1 0 300 0 0 0 100 5 0 0 14 87 4 38 1 0 3 0 1361 0 0 0 99 6 0 0 0 95 8 16 0 1 1 0 11 0 0 0 100 7 0 0 0 89 3 10 1 2 1 0 1 0 0 0 100 March 4, 2026 at 01:40:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 103 112 0 17 78 0 300 0 1 0 99 1 0 0 2 326 132 168 0 18 77 0 0 0 0 0 100 2 0 0 7 147 4 180 0 12 66 0 553 0 0 0 100 3 0 0 5 353 174 150 0 22 88 0 0 0 0 0 100 4 0 0 0 63 8 102 0 17 87 0 300 0 0 0 100 5 0 0 14 51 3 123 1 8 76 0 1360 0 0 0 99 6 0 0 0 110 6 199 0 17 62 0 9 0 0 0 100 7 0 0 0 68 2 112 0 11 66 0 1 0 0 0 100 March 4, 2026 at 01:40:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33788 0 22 2509 101 748 17 139 63 59 2625 10 10 0 80 1 3823 0 164 631 103 616 11 118 85 50 3622 4 2 0 94 2 2512 0 22 363 3 576 12 106 108 56 4544 2 2 0 95 3 8561 0 223 565 111 634 13 118 117 60 4016 5 4 0 91 4 3816 0 36 430 14 623 11 137 126 57 2779 2 3 0 95 5 3710 0 138 367 12 650 18 112 87 60 3794 2 3 0 95 6 3202 0 217 388 27 665 11 119 94 73 1849 3 2 0 96 7 443 0 11 332 9 501 8 97 57 54 1539 1 1 0 98 March 4, 2026 at 01:40:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 231 0 28 2285 102 346 8 43 16 1 1448 2 2 0 96 1 360 0 3 390 102 338 13 43 44 2 1134 2 1 0 98 2 642 0 7 286 5 402 9 24 35 0 1798 1 1 0 98 3 698 0 32 545 147 602 22 51 65 5 1366 2 1 0 97 4 151 0 42 146 5 237 4 30 5 3 810 3 1 0 96 5 458 0 14 143 9 262 13 29 60 5 1973 1 1 0 98 6 531 0 0 154 5 293 6 46 28 2 1197 3 1 0 97 7 563 0 7 105 5 152 6 24 53 2 641 1 0 0 98 March 4, 2026 at 01:40:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2171 101 46 0 4 2 0 300 0 1 0 98 1 0 0 465 224 102 4 0 1 2 0 0 0 0 0 100 2 0 0 7 164 3 86 1 1 0 0 566 0 0 0 100 3 0 0 5 382 151 110 0 2 0 0 18 0 0 0 100 4 0 0 0 86 4 8 0 0 0 0 300 0 0 0 100 5 0 0 14 82 3 36 1 0 0 0 1358 0 0 0 99 6 0 0 0 79 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 94 7 16 1 1 0 0 10 0 0 0 100 March 4, 2026 at 01:40:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 108 0 0 0 0 301 0 1 0 99 1 0 0 2 209 101 0 0 0 0 0 0 0 0 0 100 2 0 0 7 14 2 8 0 1 0 0 553 0 0 0 100 3 0 0 5 313 151 112 0 2 1 0 0 0 0 0 100 4 0 0 0 18 5 10 1 1 0 0 301 0 0 0 100 5 0 0 14 15 3 50 1 1 1 0 1358 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 19 7 14 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:40:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 101 194 0 21 60 0 300 0 1 0 99 1 0 0 2 253 102 83 0 14 71 0 0 0 0 0 100 2 0 0 7 43 2 76 0 13 62 0 552 0 0 0 100 3 0 0 5 416 204 205 1 20 86 0 2 0 0 0 100 4 0 0 0 52 5 83 1 13 79 0 300 0 0 0 100 5 0 0 14 50 3 125 1 14 76 0 1358 0 0 0 99 6 0 0 0 103 1 188 0 16 53 0 2 0 0 0 100 7 0 0 0 63 6 104 0 13 81 0 7 0 0 0 100 March 4, 2026 at 01:40:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36467 0 313 2652 103 1003 41 175 114 74 5153 13 10 0 77 1 3549 0 35 930 110 1127 29 180 101 73 4097 5 3 0 92 2 3493 0 38 538 5 753 27 146 123 32 3337 6 2 0 92 3 1164 0 105 772 115 979 34 166 124 68 3184 5 3 0 93 4 10504 0 130 529 9 962 31 163 181 53 6181 5 5 0 90 5 5101 0 24 427 5 776 14 128 130 52 4189 3 3 0 94 6 1856 0 205 553 26 962 22 162 87 75 3515 4 3 0 93 7 1448 0 20 477 5 857 19 115 101 57 3045 3 2 0 95 March 4, 2026 at 01:40:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 103 165 1 5 0 0 304 0 1 0 99 1 0 0 9 271 120 56 0 2 6 0 7 0 1 0 99 2 0 0 7 19 2 4 1 0 0 0 555 0 0 0 100 3 44 0 5 243 107 26 0 3 0 0 8 0 0 0 100 4 0 0 0 24 3 8 0 0 0 0 300 0 0 0 100 5 3 0 14 29 9 36 1 0 1 0 1369 0 0 0 100 6 0 0 0 24 2 8 0 0 0 0 7 0 0 0 100 7 0 0 70 30 7 29 0 2 6 0 9 0 1 0 99 March 4, 2026 at 01:41:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 101 112 1 0 0 0 300 0 1 0 99 1 0 0 464 318 150 104 0 0 2 0 0 0 1 0 99 2 0 0 7 81 2 6 0 1 0 0 554 0 0 0 100 3 0 0 5 294 108 16 1 0 0 0 9 0 0 0 100 4 0 0 0 85 3 6 1 0 0 0 300 0 0 0 100 5 0 0 14 85 4 40 1 0 0 0 1362 0 0 0 99 6 0 0 0 79 1 2 0 0 0 0 0 0 0 0 100 7 0 0 42 75 1 4 0 0 2 0 0 0 1 0 99 March 4, 2026 at 01:41:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 102 0 3 0 0 300 0 1 0 99 1 0 0 7 311 150 108 0 1 2 0 0 0 0 0 100 2 0 0 7 11 3 4 0 0 1 0 553 0 0 0 100 3 0 0 7 237 108 30 0 2 1 0 9 0 0 0 100 4 0 0 0 15 4 6 0 0 1 0 300 0 0 0 100 5 0 0 14 14 4 36 2 0 2 0 1361 0 0 0 100 6 0 0 0 13 3 4 0 0 1 0 2 0 0 0 100 7 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:41:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34265 0 12 2735 101 1206 51 194 164 73 5425 12 9 0 79 1 2209 0 122 929 132 1282 35 260 172 64 3542 5 3 0 92 2 992 0 24 565 4 987 41 187 154 54 5324 5 3 0 92 3 1752 0 264 892 169 1171 49 222 184 57 4054 4 3 0 93 4 5283 0 317 623 10 1261 43 199 234 68 4319 4 5 0 91 5 4013 0 39 550 9 994 22 174 202 73 4798 4 4 0 92 6 9029 0 34 612 1 1027 29 185 178 50 4102 6 4 0 90 7 5875 0 18 510 2 740 21 127 271 53 3061 6 3 0 92 March 4, 2026 at 01:41:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 58 0 0 2131 105 72 0 7 0 0 337 0 1 0 99 1 6 0 3 237 102 18 1 4 6 0 15 0 1 0 99 2 23 0 0 29 4 14 0 2 1 0 310 0 0 0 100 3 0 0 32 226 103 14 1 3 2 0 275 0 0 0 99 4 21 0 0 130 55 114 0 2 0 0 314 0 0 0 100 5 3 0 84 19 3 44 1 1 6 0 1387 0 2 0 98 6 0 0 0 28 3 10 0 1 0 0 22 0 0 0 100 7 0 0 0 82 1 64 0 1 0 0 7 0 0 0 100 March 4, 2026 at 01:41:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2168 107 131 0 3 4 0 309 0 2 0 98 1 0 0 345 220 101 12 0 0 5 0 7 0 1 0 99 2 0 0 0 68 4 10 0 1 0 0 296 0 0 0 100 3 0 0 12 311 125 56 0 1 0 0 262 0 0 0 100 4 0 0 0 112 22 58 1 2 0 0 300 0 0 0 100 5 0 0 14 87 16 55 0 2 0 0 1362 0 0 0 100 6 0 0 0 66 1 10 0 1 0 0 13 0 0 0 100 7 0 0 0 68 2 12 0 1 1 0 5 0 0 0 100 March 4, 2026 at 01:41:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2122 107 137 0 4 0 0 309 0 1 0 99 1 0 0 2 247 110 22 0 2 1 0 0 0 0 0 100 2 0 0 0 28 3 6 0 0 0 0 295 0 0 0 100 3 0 0 12 298 133 76 0 2 0 0 259 0 0 0 100 4 0 0 0 31 3 8 0 1 2 0 300 0 0 0 100 5 0 0 14 31 3 44 1 1 3 0 1362 0 0 0 100 6 0 0 0 26 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 22 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3066 0 33 2270 108 372 3 48 65 35 1802 2 3 0 95 1 1010 0 194 432 149 335 5 51 29 34 1395 1 2 0 98 2 2150 0 29 207 3 223 4 47 48 28 962 3 1 0 96 3 1263 0 143 347 104 235 4 43 30 30 1003 1 2 0 98 4 902 0 10 140 4 190 1 47 25 20 928 1 0 0 99 5 256 0 22 148 3 233 5 33 32 24 3047 1 1 0 98 6 2524 0 5 141 1 222 6 43 72 23 949 1 1 0 98 7 2264 0 7 127 0 210 1 39 37 32 870 1 1 0 99 March 4, 2026 at 01:41:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5812 0 273 2579 103 1002 34 153 146 33 3455 6 5 0 88 1 3294 0 11 709 104 891 33 166 174 29 3163 4 3 0 94 2 35453 0 128 438 3 733 29 120 129 41 4419 12 8 0 80 3 1171 0 87 750 156 904 18 167 146 35 3861 5 2 0 93 4 1023 0 4 490 15 705 14 122 116 24 2250 5 1 0 94 5 515 0 31 443 35 746 22 113 147 26 3432 2 2 0 96 6 363 0 5 466 11 844 22 131 133 23 2361 3 2 0 96 7 2674 0 4 393 4 698 14 76 160 31 2321 2 2 0 95 March 4, 2026 at 01:41:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2172 101 198 0 3 2 0 1 0 1 0 98 1 0 0 464 223 101 6 0 1 2 0 0 0 1 0 99 2 0 0 0 85 3 6 0 0 0 0 595 0 0 0 100 3 44 0 12 292 108 16 0 0 0 0 271 0 0 0 99 4 0 0 0 88 4 10 0 0 0 0 300 0 0 0 100 5 3 0 14 87 3 40 1 1 0 0 1353 0 0 0 100 6 0 0 0 86 1 8 0 2 2 0 1 0 0 0 100 7 0 0 0 99 8 28 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 212 0 0 0 0 0 0 1 0 99 1 0 0 3 211 101 4 0 0 0 0 7 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 594 0 0 0 100 3 0 0 11 221 108 18 0 0 0 0 268 0 0 0 100 4 0 0 0 18 5 12 1 0 0 0 302 0 0 0 100 5 0 0 14 15 8 36 1 0 0 0 1354 0 0 0 100 6 0 0 0 15 2 14 0 0 0 0 13 0 0 0 100 7 0 0 0 13 1 12 0 1 1 0 5 0 0 0 100 March 4, 2026 at 01:41:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 218 0 1 0 0 0 0 1 0 99 1 0 0 2 209 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 594 0 0 0 100 3 0 0 12 220 108 16 0 0 0 0 269 0 0 0 100 4 0 0 0 14 4 8 0 0 0 0 300 0 0 0 100 5 0 0 14 11 3 36 1 0 0 0 1350 0 0 0 99 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11251 0 330 2644 100 1127 25 182 191 79 4877 4 7 0 89 1 7760 0 39 828 101 947 34 183 149 58 5432 6 4 0 90 2 1785 0 19 610 5 1082 30 170 139 98 4155 3 3 0 94 3 2301 0 94 735 108 980 20 164 92 70 3672 4 2 0 93 4 663 0 40 521 7 875 15 152 80 47 4581 4 2 0 94 5 3136 0 21 511 6 763 23 114 80 43 3936 6 2 0 91 6 35977 0 315 461 20 835 26 146 78 82 3477 14 8 0 78 7 1047 0 11 415 13 692 19 124 123 49 2959 3 2 0 95 March 4, 2026 at 01:41:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 63 0 77 2169 105 217 0 18 78 0 19 0 2 0 98 1 16 0 3 279 105 99 0 16 91 0 19 0 1 0 99 2 20 0 0 50 2 63 0 15 59 0 603 0 0 0 100 3 0 0 24 322 156 99 0 18 79 0 273 0 0 0 100 4 16 0 14 72 5 102 0 10 76 0 576 0 0 0 100 5 0 0 0 68 2 117 1 13 71 0 1111 0 0 0 99 6 0 0 0 150 19 226 0 20 65 0 8 0 0 0 100 7 1 0 0 126 35 145 0 16 53 0 1 0 0 0 100 March 4, 2026 at 01:41:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2186 106 132 0 3 2 0 9 0 2 0 98 1 0 0 465 281 132 70 0 1 3 0 0 0 1 0 99 2 0 0 0 99 2 24 0 4 0 0 594 0 0 0 100 3 0 0 11 282 103 6 0 0 0 0 262 0 0 0 100 4 0 0 14 93 7 16 1 0 0 0 569 0 0 0 100 5 0 0 0 82 2 34 1 0 0 0 1090 0 0 0 100 6 0 0 0 81 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 94 8 18 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 126 0 0 0 0 9 0 1 0 99 1 0 0 2 309 150 104 0 0 0 0 7 0 0 0 100 2 0 0 0 16 4 12 0 0 0 0 595 0 0 0 100 3 0 0 12 215 103 18 0 1 0 0 259 0 0 0 100 4 0 0 14 15 5 12 0 0 0 0 566 0 0 0 100 5 0 0 0 18 9 36 1 0 1 0 1111 0 0 0 100 6 0 0 0 16 2 16 0 0 0 0 14 0 0 0 100 7 0 0 0 13 1 12 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:41:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 41001 0 140 2371 107 559 24 102 98 56 3810 11 8 0 81 1 3384 0 193 563 143 592 4 114 73 59 2080 2 2 0 97 2 1387 0 142 294 10 539 4 87 64 68 3599 1 2 0 96 3 2811 0 59 497 103 394 8 86 50 51 2918 4 1 0 95 4 481 0 38 284 6 489 5 98 54 53 1686 1 2 0 97 5 402 0 12 226 2 381 1 80 29 39 2271 1 1 0 98 6 145 0 11 231 0 390 4 88 43 43 1492 1 1 0 98 7 106 0 9 206 2 263 1 56 35 26 1386 1 1 0 98 March 4, 2026 at 01:41:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3174 0 79 2446 101 716 26 94 57 17 2584 4 6 0 91 1 4738 0 6 700 103 826 32 113 78 18 3315 6 3 0 90 2 1432 0 179 412 49 694 12 85 55 15 2590 3 2 0 96 3 568 0 46 601 104 745 18 82 43 15 2536 2 1 0 96 4 586 0 14 249 5 400 11 59 47 13 1283 2 1 0 97 5 702 0 1 277 2 546 16 73 40 15 2654 2 1 0 97 6 761 0 0 265 3 483 10 66 41 13 1783 2 1 0 97 7 2277 0 11 226 6 374 12 58 52 6 1607 5 1 0 93 March 4, 2026 at 01:41:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2215 100 180 0 11 69 0 0 0 2 0 98 1 0 0 465 269 101 92 0 13 73 0 0 0 1 0 99 2 0 0 0 132 10 89 0 9 44 0 593 0 0 0 100 3 0 0 10 452 198 151 0 12 56 0 563 0 1 0 99 4 2 0 14 134 4 104 0 15 79 0 268 0 1 0 99 5 0 0 0 127 3 115 2 4 70 0 1088 0 1 0 99 6 44 0 0 191 7 218 0 18 69 0 9 0 0 0 100 7 0 0 0 134 1 116 0 18 75 0 0 0 0 0 100 March 4, 2026 at 01:41:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 0 0 0 0 0 0 0 1 0 99 1 0 0 2 210 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 20 3 16 0 1 0 0 595 0 0 0 100 3 0 0 12 311 153 108 1 0 0 0 559 0 0 0 100 4 0 0 14 10 3 6 0 1 0 0 266 0 0 0 100 5 0 0 0 10 2 34 1 0 0 0 1086 0 0 0 100 6 0 0 0 21 7 16 0 0 0 0 9 0 0 0 100 7 0 0 0 105 0 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 101 0 2 0 0 0 0 1 0 99 1 0 0 3 212 101 6 0 1 0 0 9 0 0 0 100 2 0 0 0 20 3 14 0 0 0 0 594 0 0 0 100 3 0 0 11 314 153 114 1 1 0 0 566 0 0 0 100 4 0 0 14 13 4 10 0 0 0 0 268 0 0 0 100 5 0 0 0 15 7 34 1 0 0 0 1087 0 0 0 100 6 0 0 0 31 9 26 0 1 0 0 17 0 0 0 100 7 0 0 0 19 0 20 0 2 0 0 1 0 0 0 100 March 4, 2026 at 01:41:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10892 0 147 2750 101 1298 40 222 230 53 5620 7 6 0 87 1 35286 0 50 910 103 1168 53 236 422 74 7575 16 11 0 73 2 9072 0 12 733 7 1171 39 200 271 70 4001 7 3 0 90 3 3266 0 267 874 119 1090 45 213 128 67 5471 6 3 0 91 4 2533 0 390 566 4 1066 41 204 153 85 3583 4 3 0 93 5 834 0 11 446 4 744 15 142 78 69 2715 3 2 0 95 6 26853 0 21 561 7 984 31 173 432 47 4559 10 6 0 84 7 738 0 12 491 5 816 34 136 110 41 3369 5 2 0 92 March 4, 2026 at 01:41:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2124 100 202 0 0 1 0 10 0 1 0 99 1 0 0 9 228 102 8 0 1 6 0 278 0 0 0 99 2 0 0 0 40 4 22 0 2 2 0 604 0 0 0 100 3 17 0 33 232 106 44 1 1 1 0 1415 0 0 0 99 4 2 0 14 33 5 16 0 3 0 0 287 0 0 0 100 5 55 0 7 37 6 18 0 3 1 0 17 0 0 0 100 6 0 0 70 20 2 10 0 2 5 0 10 0 1 0 99 7 2 0 0 24 1 2 0 1 1 0 9 0 0 0 100 March 4, 2026 at 01:41:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2213 100 283 0 11 77 0 0 0 1 0 99 1 0 0 471 272 102 119 0 13 96 0 259 0 1 0 99 2 0 0 0 129 3 92 1 11 69 0 594 0 0 0 99 3 0 0 5 373 157 98 2 11 61 0 1388 0 1 0 99 4 0 0 14 133 4 106 0 14 78 0 266 0 0 0 100 5 0 0 0 136 7 102 0 11 57 0 9 0 0 0 100 6 0 0 42 170 1 196 0 14 76 0 0 0 1 0 99 7 0 0 0 120 0 85 0 12 74 0 0 0 0 0 100 March 4, 2026 at 01:41:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 200 0 0 0 0 0 0 1 0 99 1 0 0 10 211 102 2 1 0 0 0 259 0 0 0 100 2 0 0 0 19 3 14 0 0 0 0 594 0 0 0 100 3 0 0 4 213 104 38 0 0 0 0 1386 0 1 0 99 4 0 0 14 16 5 12 0 0 1 0 269 0 0 0 100 5 0 0 0 22 7 24 0 1 2 0 10 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3608 0 39 2669 101 861 25 148 107 65 3006 3 4 0 93 1 1984 0 138 677 106 871 26 172 102 67 4966 4 3 0 94 2 1412 0 251 430 6 750 24 138 68 71 2987 2 2 0 96 3 26554 0 64 630 105 763 26 153 43 49 4335 9 8 0 82 4 1230 0 207 406 6 731 25 153 87 62 2857 2 3 0 95 5 8233 0 135 428 16 653 23 114 135 56 5040 5 4 0 91 6 9302 0 50 482 10 687 18 133 125 51 2900 7 3 0 90 7 748 0 11 414 3 722 11 137 78 70 2233 2 1 0 97 March 4, 2026 at 01:41:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 933 0 70 2274 102 341 31 67 63 4 1044 3 3 0 94 1 151 0 9 360 103 289 10 58 21 1 1447 3 2 0 95 2 623 0 0 135 4 223 11 47 30 6 949 1 1 0 98 3 289 0 47 377 106 330 25 59 15 2 2220 2 1 0 97 4 291 0 14 156 4 257 8 51 23 3 1111 1 1 0 98 5 228 0 0 142 9 257 6 42 10 0 1032 1 1 0 98 6 337 0 0 317 49 440 11 52 10 2 1159 2 1 0 98 7 982 0 7 141 1 250 13 40 37 0 991 1 1 0 98 March 4, 2026 at 01:41:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2176 100 126 0 2 2 0 0 0 2 0 98 1 0 0 471 228 104 18 0 1 2 0 263 0 1 0 99 2 0 0 0 82 2 4 0 0 0 0 300 0 0 0 100 3 0 0 5 300 111 52 1 0 1 0 1399 0 1 0 99 4 0 0 14 80 2 4 0 0 0 0 266 0 0 0 100 5 0 0 0 81 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 184 52 105 1 1 0 0 295 0 0 0 100 7 0 0 0 82 0 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 101 190 1 11 67 0 1 0 1 0 99 1 0 0 10 262 103 101 1 15 74 0 259 0 0 0 100 2 0 0 0 56 2 100 0 17 66 0 300 0 0 0 100 3 0 0 4 321 164 130 2 13 99 0 1399 0 1 0 99 4 0 0 14 52 3 91 0 13 72 0 268 0 0 0 100 5 0 0 0 50 2 93 0 11 86 0 0 0 0 0 100 6 0 0 0 196 48 282 0 18 53 0 294 0 0 0 100 7 0 0 0 56 3 97 0 15 79 0 0 0 0 0 100 March 4, 2026 at 01:41:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 154 0 1 0 0 0 0 1 0 99 1 0 0 10 218 104 16 0 1 0 0 260 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 3 0 0 3 226 110 50 1 0 1 0 1398 0 1 0 99 4 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 7 0 0 0 69 31 64 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1184 0 33 2757 101 1235 42 244 82 64 5143 5 6 0 89 1 3199 0 335 807 111 1129 48 230 102 42 5659 5 4 0 91 2 8579 0 187 647 5 1125 38 184 148 60 5241 6 4 0 89 3 10170 0 118 963 111 1148 39 190 143 64 5347 8 4 0 88 4 2460 0 23 604 4 1048 28 191 91 69 4620 7 3 0 90 5 675 0 11 557 22 954 31 160 90 59 4128 3 2 0 95 6 36406 0 13 633 27 1054 25 192 117 53 4324 11 6 0 82 7 1198 0 134 488 1 890 18 136 82 50 2990 3 4 0 92 March 4, 2026 at 01:41:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2124 105 120 0 0 0 0 8 0 1 0 99 1 0 0 87 214 103 8 0 2 5 0 262 0 1 0 99 2 0 0 0 21 1 6 0 0 6 0 300 0 0 0 99 3 0 0 3 221 103 4 0 0 0 0 300 0 0 0 100 4 2 0 14 22 3 6 0 0 0 0 268 0 0 0 100 5 0 0 0 22 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 35 7 42 2 0 0 0 1392 0 0 0 100 7 0 0 0 109 45 95 0 3 0 0 0 0 0 0 100 March 4, 2026 at 01:41:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2185 106 122 0 3 3 0 9 0 2 0 98 1 0 0 14 293 103 8 1 1 1 0 259 0 0 0 100 2 0 0 462 22 2 12 0 1 4 0 300 0 1 0 99 3 0 0 7 288 103 14 1 1 1 0 300 0 0 0 100 4 0 0 14 88 5 10 0 0 1 0 268 0 0 0 100 5 0 0 0 86 3 8 0 1 0 0 0 0 0 0 100 6 0 0 0 87 3 34 2 0 1 0 1394 0 0 0 99 7 0 0 0 178 50 100 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:41:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 106 251 0 18 91 0 10 0 1 0 99 1 0 0 10 265 103 117 0 16 69 0 259 0 0 0 100 2 0 0 0 40 1 67 0 12 53 0 300 0 0 0 100 3 0 0 3 313 158 103 0 18 90 0 300 0 0 0 100 4 0 0 14 50 3 86 1 13 79 0 266 0 0 0 100 5 0 0 0 48 2 78 0 9 57 0 0 0 0 0 100 6 0 0 0 117 4 244 1 15 90 0 1395 0 1 0 99 7 0 0 0 110 31 150 0 16 73 0 0 0 0 0 100 March 4, 2026 at 01:41:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3080 0 30 2776 105 1232 38 216 70 52 3707 4 4 0 92 1 2512 0 207 838 110 1143 49 237 112 47 4358 7 3 0 90 2 9803 0 326 533 3 943 38 169 184 57 5288 6 6 0 88 3 7888 0 82 875 106 1097 51 211 127 59 4869 7 4 0 89 4 4537 0 123 587 6 1068 40 188 100 84 6118 5 3 0 91 5 641 0 33 505 3 924 31 181 86 69 3046 3 2 0 95 6 1557 0 10 534 8 1038 40 192 102 55 4961 4 3 0 94 7 33386 0 25 410 0 714 28 126 60 44 3209 11 7 0 82 March 4, 2026 at 01:41:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 2135 103 136 1 3 0 0 33 0 1 0 99 1 0 0 73 217 101 9 0 2 5 0 18 0 1 0 99 2 2 0 7 32 4 14 1 0 5 0 569 0 1 0 99 3 11 0 25 230 105 20 0 4 0 0 326 0 0 0 100 4 69 0 0 42 6 34 0 4 0 0 25 0 0 0 100 5 3 0 14 35 9 14 0 0 0 0 309 0 0 0 100 6 2 0 0 134 54 152 0 6 0 0 1436 0 0 0 99 7 0 0 0 25 1 4 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:41:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 100 100 0 2 0 0 0 0 1 0 99 1 0 0 16 260 101 2 0 1 3 0 0 0 1 0 99 2 0 0 350 14 3 10 1 1 4 0 563 0 0 0 99 3 0 0 5 266 104 8 1 1 0 0 300 0 0 0 100 4 0 0 0 77 9 22 0 2 0 0 12 0 0 0 100 5 0 0 14 102 22 48 0 1 0 0 265 0 0 0 100 6 0 0 0 129 33 106 1 2 0 0 1393 0 0 0 100 7 0 0 0 67 0 10 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:41:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 100 110 0 0 0 0 0 0 1 0 99 1 0 0 17 234 102 8 0 0 0 0 1 0 0 0 100 2 0 0 126 11 2 6 0 0 1 0 558 0 0 0 100 3 0 0 4 232 104 6 0 0 0 0 300 0 0 0 100 4 0 0 0 40 8 16 0 0 0 0 9 0 0 0 100 5 1 0 14 87 31 62 1 0 0 0 297 0 0 0 100 6 0 0 0 76 25 83 1 2 1 0 1393 0 0 0 99 7 0 0 0 25 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1548 0 320 2256 101 385 1 46 104 24 369 1 2 0 97 1 55 0 11 344 101 202 3 55 92 23 269 0 1 0 99 2 36 0 35 124 2 168 1 39 65 16 813 0 1 0 98 3 2363 0 13 426 166 222 6 57 150 22 1073 1 2 0 98 4 2163 0 10 165 9 227 2 46 101 21 631 1 1 0 98 5 3532 0 34 213 5 207 4 34 113 19 2271 1 1 0 98 6 157 0 9 290 50 452 10 58 101 20 1836 0 1 0 99 7 53 0 11 167 3 246 1 46 105 22 387 0 1 0 99 March 4, 2026 at 01:41:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1239 0 18 2611 102 1063 30 155 90 43 3726 5 3 0 92 1 1910 0 181 731 103 982 31 162 117 49 3130 4 2 0 94 2 3114 0 93 546 3 799 16 114 68 34 2902 4 3 0 93 3 1701 0 101 644 106 816 30 154 91 39 3729 4 3 0 93 4 33995 0 12 480 7 852 28 138 80 31 3011 11 7 0 82 5 4949 0 142 441 12 794 14 110 75 33 3635 6 3 0 92 6 3944 0 8 479 7 910 19 121 128 45 6385 6 3 0 91 7 2999 0 3 566 34 996 18 103 99 25 3498 5 2 0 93 March 4, 2026 at 01:41:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2199 107 174 2 1 0 0 21 0 1 0 99 1 0 0 2 287 101 6 0 1 0 0 7 0 0 0 100 2 0 0 49 86 3 16 1 0 1 0 562 0 1 0 99 3 0 0 467 223 104 10 1 1 1 0 300 0 0 0 99 4 0 0 0 81 2 4 0 0 0 0 2 0 0 0 100 5 3 0 14 91 8 12 0 1 0 0 267 0 0 0 100 6 0 0 0 90 3 42 1 0 0 0 1398 0 0 0 100 7 0 0 0 130 24 56 0 3 0 0 0 0 0 0 100 March 4, 2026 at 01:41:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 106 204 0 3 0 0 9 0 1 0 99 1 0 0 2 215 101 12 0 2 0 0 0 0 0 0 100 2 0 0 7 13 2 6 0 0 0 0 559 0 0 0 100 3 0 0 5 214 105 8 0 0 0 0 300 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 14 10 2 8 0 0 0 0 266 0 0 0 100 6 0 0 0 12 3 38 0 0 0 0 1392 0 0 0 100 7 0 0 0 24 0 16 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 144 1 2 0 0 10 0 1 0 99 1 0 0 2 297 140 94 0 1 1 0 0 0 0 0 100 2 0 0 7 11 3 4 1 0 1 0 558 0 0 0 100 3 0 0 5 214 105 8 0 0 1 0 300 0 0 0 100 4 0 0 0 10 3 2 0 0 1 0 2 0 0 0 100 5 0 0 14 12 3 8 0 0 1 0 266 0 0 0 100 6 0 0 0 15 4 36 1 0 1 0 1393 0 0 0 100 7 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:41:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 604 0 35 2744 107 1149 36 206 182 42 3776 5 4 0 91 1 36015 0 447 844 123 1154 32 203 157 68 3554 12 10 0 78 2 1343 0 11 640 2 1058 31 165 178 50 3124 5 3 0 93 3 5256 0 98 893 184 1126 27 189 230 60 4754 4 4 0 92 4 10803 0 215 575 2 976 24 149 219 61 3778 7 4 0 89 5 6517 0 19 541 3 863 29 138 221 66 5378 7 4 0 90 6 2098 0 12 549 6 1006 27 174 204 70 6728 5 3 0 92 7 1078 0 20 486 9 889 12 159 167 61 2567 3 2 0 96 March 4, 2026 at 01:41:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2116 101 113 0 8 5 0 6 0 2 0 98 1 0 0 2 242 102 22 0 4 6 0 19 0 1 0 99 2 1 0 7 31 2 22 1 1 1 0 576 0 0 0 100 3 22 0 33 334 157 123 1 2 1 0 584 0 0 0 100 4 53 0 0 38 7 21 1 2 0 0 16 0 0 0 100 5 2 0 0 30 1 10 0 1 1 0 9 0 0 0 100 6 24 0 0 29 4 42 1 1 0 0 1404 0 0 0 100 7 0 0 0 23 1 5 0 2 0 0 13 0 0 0 100 March 4, 2026 at 01:41:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2161 102 119 0 0 2 0 4 0 1 0 99 1 0 0 352 221 101 14 0 2 3 0 7 0 1 0 99 2 0 0 7 67 4 10 0 1 0 0 564 0 0 0 100 3 0 0 19 370 155 120 0 1 0 0 567 0 0 0 100 4 0 0 0 74 7 16 0 1 0 0 9 0 0 0 100 5 0 0 0 69 6 6 0 0 0 0 0 0 0 0 100 6 0 0 0 70 3 42 1 0 0 0 1387 0 0 0 100 7 0 0 0 63 0 9 0 2 0 0 8 0 0 0 100 March 4, 2026 at 01:41:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2104 100 111 0 1 0 0 0 0 1 0 99 1 0 0 3 230 101 2 0 1 0 0 0 0 0 0 100 2 0 0 7 28 3 6 0 0 0 0 560 0 0 0 100 3 0 0 18 331 155 110 0 0 0 0 566 0 0 0 100 4 0 0 0 38 8 14 0 0 0 0 11 0 0 0 100 5 0 0 0 28 1 6 0 1 0 0 0 0 0 0 100 6 0 0 0 30 3 36 1 0 1 0 1380 0 0 0 100 7 0 0 0 25 1 4 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:41:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1040 0 144 2363 101 556 6 108 64 45 1448 1 2 0 97 1 3711 0 161 523 103 444 13 104 57 50 2184 3 2 0 95 2 453 0 22 270 3 447 8 84 45 49 3087 1 2 0 97 3 369 0 65 580 154 558 5 101 55 57 2786 1 1 0 97 4 25073 0 200 242 8 395 12 75 100 42 3769 8 5 0 87 5 2317 0 16 252 3 410 3 85 63 46 1500 1 2 0 97 6 457 0 21 252 4 425 6 78 57 53 2887 1 1 0 98 7 2689 0 13 238 1 360 5 65 69 28 1581 1 2 0 97 March 4, 2026 at 01:41:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 662 0 71 2410 102 644 14 89 108 11 1828 2 3 0 95 1 1528 0 2 571 103 648 17 103 133 13 2155 3 2 0 94 2 843 0 9 377 4 677 8 74 91 10 2234 2 1 0 97 3 1065 0 244 565 171 578 21 82 96 12 2301 3 2 0 95 4 18092 0 20 435 46 703 16 90 124 18 2013 7 6 0 88 5 2726 0 2 285 1 518 14 89 145 5 2049 3 2 0 96 6 1022 0 0 366 3 746 16 101 90 14 3148 4 2 0 95 7 1604 0 0 338 3 529 18 83 121 14 1373 4 1 0 95 March 4, 2026 at 01:41:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 100 84 0 2 1 0 0 0 1 0 99 1 0 0 464 234 101 18 0 1 1 0 0 0 0 0 100 2 0 0 7 83 2 6 0 0 0 0 561 0 0 0 100 3 2 0 19 290 106 12 1 0 0 0 567 0 0 0 100 4 0 0 0 164 44 85 0 1 0 0 0 0 0 0 100 5 44 0 0 92 6 16 0 0 0 0 9 0 0 0 100 6 0 0 0 104 11 54 1 1 0 0 1387 0 0 0 100 7 0 0 0 95 0 18 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:41:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 134 1 4 1 0 9 0 1 0 99 1 0 0 3 214 101 6 0 1 0 0 7 0 0 0 100 2 0 0 7 9 2 4 1 0 0 0 560 0 0 0 100 3 0 0 18 214 106 10 0 0 0 0 566 0 0 0 100 4 0 0 0 13 3 8 0 0 0 0 2 0 0 0 100 5 0 0 0 30 12 24 0 1 1 0 9 0 0 0 100 6 0 0 0 30 10 54 1 0 2 0 1392 0 0 0 100 7 0 0 0 85 18 80 0 1 0 0 4 0 0 0 100 March 4, 2026 at 01:41:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 208 0 0 0 0 0 0 1 0 99 1 0 0 2 211 101 2 0 0 0 0 0 0 0 0 100 2 0 0 7 8 2 4 0 0 0 0 558 0 0 0 100 3 0 0 19 214 106 10 0 0 0 0 566 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 22 6 18 0 0 0 0 9 0 0 0 100 6 0 0 0 17 3 46 1 1 0 0 1388 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1164 0 29 2734 100 1272 45 208 121 76 3171 3 4 0 93 1 5650 0 229 820 102 1038 44 196 151 54 4524 7 3 0 90 2 7477 0 11 553 5 763 28 148 170 63 3649 6 3 0 92 3 4391 0 378 692 107 902 34 145 92 60 5482 4 4 0 92 4 549 0 53 495 4 839 17 168 112 41 3357 3 2 0 95 5 5367 0 4 490 27 754 20 121 119 52 3221 4 3 0 93 6 33288 0 199 557 8 954 36 152 392 53 5121 13 10 0 77 7 31625 0 36 471 1 726 28 121 354 61 4667 14 6 0 80 March 4, 2026 at 01:41:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2180 107 181 0 22 67 0 13 0 1 0 99 1 0 0 3 300 104 133 1 19 89 0 14 0 1 0 99 2 4 0 7 117 3 183 0 15 49 0 571 0 0 0 100 3 0 0 18 330 161 108 0 20 77 0 310 0 0 0 99 4 2 0 84 64 5 103 0 18 74 0 282 0 1 0 99 5 11 0 7 92 13 122 0 14 92 0 16 0 0 0 100 6 0 0 0 172 41 198 0 21 77 0 301 0 0 0 100 7 16 0 0 84 4 145 1 14 85 0 1114 0 1 0 99 March 4, 2026 at 01:41:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 107 162 0 1 0 0 11 0 1 0 99 1 0 0 465 225 102 18 0 1 2 0 0 0 1 0 99 2 0 0 7 82 2 6 0 1 0 0 558 0 0 0 100 3 0 0 3 284 104 6 0 0 0 0 300 0 0 0 100 4 0 0 56 80 5 10 0 0 2 0 269 0 1 0 99 5 0 0 0 82 0 6 0 0 0 0 0 0 0 0 100 6 0 0 0 98 10 22 0 1 0 0 295 0 0 0 100 7 0 0 0 129 24 82 1 2 0 0 1086 0 0 0 100 March 4, 2026 at 01:41:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 109 234 1 0 0 0 21 0 1 0 99 1 0 0 2 216 102 8 0 1 0 0 7 0 0 0 100 2 0 0 7 12 4 8 0 0 0 0 562 0 0 0 100 3 0 0 5 212 104 6 0 0 0 0 300 0 0 0 100 4 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 5 0 0 0 16 7 6 0 0 0 0 21 0 0 0 100 6 0 0 0 14 2 10 0 0 0 0 300 0 0 0 100 7 0 0 0 11 1 36 1 0 1 0 1087 0 0 0 100 March 4, 2026 at 01:41:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2077 0 24 2632 109 1060 35 170 63 67 5170 6 3 0 91 1 3583 0 27 754 103 800 23 162 62 43 3350 4 3 0 93 2 2329 0 36 522 5 746 22 122 104 50 2760 2 2 0 96 3 2265 0 350 684 114 963 27 170 105 57 4168 3 3 0 94 4 34520 0 161 487 6 886 29 163 139 72 4299 11 10 0 79 5 6362 0 26 429 3 744 19 129 128 51 3951 4 3 0 93 6 807 0 18 482 3 886 15 157 80 68 3334 2 1 0 96 7 1334 0 183 406 2 753 9 119 84 62 3764 2 2 0 96 March 4, 2026 at 01:41:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 456 0 70 2192 102 288 14 38 17 5 701 1 2 0 96 1 184 0 2 333 102 204 4 33 17 1 1001 1 1 0 98 2 1091 0 7 136 3 229 6 23 30 7 1012 3 1 0 97 3 713 0 33 305 108 173 9 36 20 3 778 3 1 0 97 4 311 0 14 201 53 247 4 25 4 0 846 2 0 0 98 5 156 0 0 105 2 162 11 29 10 1 480 1 0 0 99 6 675 0 0 92 2 146 1 22 16 0 861 1 1 0 98 7 50 0 7 122 3 218 6 23 9 1 2103 1 1 0 98 March 4, 2026 at 01:41:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2222 101 195 0 11 51 0 1 0 1 0 99 1 0 0 465 268 102 106 0 22 85 0 294 0 1 0 99 2 0 0 7 182 4 198 0 18 62 0 562 0 1 0 99 3 0 0 4 389 164 98 0 17 88 0 300 0 0 0 99 4 0 0 14 238 59 207 2 16 67 0 277 0 1 0 99 5 0 0 0 112 1 71 0 15 70 0 0 0 0 0 100 6 0 0 0 115 1 77 0 20 68 0 0 0 0 0 100 7 0 0 0 123 1 113 1 13 73 0 1087 0 0 0 100 March 4, 2026 at 01:41:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 0 0 0 0 0 1 0 99 1 0 0 2 213 102 4 0 1 0 0 294 0 0 0 100 2 0 0 7 13 3 8 0 1 0 0 559 0 0 0 100 3 0 0 5 215 104 8 0 1 0 0 300 0 0 0 100 4 0 0 14 124 59 125 0 2 0 0 276 0 0 0 100 5 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 32 1 0 0 0 1087 0 0 0 100 March 4, 2026 at 01:41:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 120 1 0 0 0 12 0 1 0 99 1 0 0 7 215 102 8 0 0 0 0 299 0 0 0 100 2 0 0 7 11 3 6 1 0 0 0 559 0 0 0 100 3 0 0 7 213 104 6 0 0 0 0 300 0 0 0 100 4 0 0 14 71 32 66 0 0 0 0 276 0 0 0 100 5 0 0 0 74 33 68 0 2 0 0 0 0 0 0 100 6 0 0 0 12 1 6 0 0 0 0 5 0 0 0 100 7 0 0 0 12 1 38 1 1 0 0 1088 0 0 0 100 March 4, 2026 at 01:42:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1907 0 29 2727 102 1203 41 220 139 81 6008 7 4 0 89 1 2314 0 189 897 129 1183 39 238 105 68 5261 4 3 0 93 2 1905 0 15 647 4 1036 33 171 149 60 4217 4 2 0 93 3 1533 0 116 777 114 1047 52 204 114 59 4032 4 5 0 91 4 37286 0 140 518 10 881 35 176 146 49 4744 12 9 0 79 5 5493 0 130 516 12 881 32 147 120 62 3523 4 4 0 92 6 7676 0 223 589 3 978 38 186 142 65 4182 6 4 0 90 7 5612 0 25 527 3 791 24 126 116 61 3000 6 2 0 91 March 4, 2026 at 01:42:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 102 144 1 0 1 0 1089 0 1 0 99 1 44 0 9 337 157 124 0 2 6 0 303 0 1 0 99 2 0 0 7 23 4 6 0 0 1 0 562 0 0 0 100 3 0 0 5 223 104 6 0 0 1 0 300 0 0 0 100 4 2 0 14 24 4 4 0 0 1 0 270 0 0 0 100 5 0 0 0 25 2 8 0 2 1 0 0 0 0 0 100 6 0 0 70 15 1 14 0 1 6 0 0 0 1 0 99 7 0 0 0 23 2 4 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:42:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2227 101 243 2 11 68 0 1086 0 1 0 98 1 0 0 464 367 157 190 1 12 65 0 303 0 1 0 99 2 0 0 7 169 3 176 0 10 62 0 559 0 0 0 99 3 0 0 5 381 161 89 0 17 61 0 300 0 1 0 99 4 0 0 14 125 3 96 0 20 84 0 266 0 0 0 100 5 0 0 0 129 1 105 0 15 59 0 0 0 0 0 100 6 0 0 42 119 0 96 0 18 95 0 0 0 1 0 99 7 0 0 0 121 1 91 0 15 78 0 0 0 0 0 100 March 4, 2026 at 01:42:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 138 1 2 0 0 1088 0 1 0 99 1 0 0 3 329 158 120 0 1 0 0 305 0 0 0 100 2 0 0 7 12 3 8 1 0 0 0 558 0 0 0 100 3 0 0 4 212 104 6 0 0 0 0 300 0 0 0 100 4 0 0 14 14 6 10 0 0 0 0 273 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 1 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 7 0 0 0 9 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3215 0 195 2651 103 1225 34 203 130 88 5226 5 4 0 90 1 1375 0 25 963 132 1320 33 198 97 73 5127 4 2 0 93 2 34434 0 54 621 8 927 31 141 72 46 4161 11 8 0 81 3 2370 0 271 769 106 1074 30 186 76 51 4529 7 3 0 90 4 605 0 44 534 10 846 29 177 104 57 3584 3 3 0 95 5 1026 0 6 438 9 671 20 117 102 37 2374 3 2 0 95 6 11927 0 241 476 2 956 25 168 160 69 6277 8 5 0 87 7 8602 0 27 504 6 801 17 121 161 85 3025 5 3 0 92 March 4, 2026 at 01:42:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2124 106 124 0 3 6 0 19 0 2 0 98 1 46 0 2 244 106 62 1 7 7 0 1413 0 1 0 99 2 9 0 7 71 22 63 0 4 0 0 580 0 0 0 100 3 0 0 26 226 104 10 0 2 0 0 315 0 0 0 100 4 5 0 14 88 34 72 0 3 1 0 280 0 0 0 100 5 0 0 0 23 0 4 0 0 2 0 9 0 0 0 100 6 40 0 0 30 5 8 0 1 0 0 14 0 0 0 100 7 2 0 0 29 2 11 0 4 0 0 6 0 0 0 100 March 4, 2026 at 01:42:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2154 100 66 0 2 1 0 0 0 1 0 99 1 0 0 345 236 109 26 0 0 4 0 303 0 1 0 99 2 0 0 7 165 31 140 0 3 0 0 1652 0 1 0 99 3 0 0 5 271 107 16 0 1 0 0 300 0 0 0 100 4 0 0 14 59 2 6 0 2 0 0 266 0 0 0 100 5 0 0 0 57 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 98 21 42 0 1 0 0 1 0 0 0 100 7 0 0 0 58 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:42:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2168 100 195 0 14 72 0 0 0 2 0 98 1 0 0 122 274 108 106 0 19 99 0 303 0 0 0 99 2 0 0 7 117 4 200 2 9 57 0 1646 0 1 0 99 3 0 0 4 337 161 102 0 21 82 0 300 0 1 0 99 4 0 0 14 75 4 98 1 17 57 0 268 0 0 0 100 5 0 0 0 68 0 82 0 7 49 0 0 0 0 0 100 6 0 0 0 153 50 166 0 13 74 0 0 0 0 0 100 7 0 0 0 84 1 115 0 13 74 0 0 0 0 0 100 March 4, 2026 at 01:42:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3137 0 219 2251 100 414 5 57 82 34 1027 1 3 0 96 1 813 0 10 376 109 239 6 49 23 27 1443 2 1 0 97 2 251 0 16 141 4 226 2 49 23 32 3845 1 1 0 98 3 3616 0 140 400 104 246 1 38 32 35 1148 2 1 0 97 4 254 0 29 179 3 275 3 56 46 31 1195 1 1 0 98 5 260 0 21 133 0 181 6 38 33 21 632 0 1 0 99 6 2512 0 7 253 50 316 4 44 50 32 1029 1 1 0 98 7 2405 0 7 117 1 175 3 28 41 19 702 1 1 0 98 March 4, 2026 at 01:42:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3724 0 119 2398 102 567 16 108 89 36 2220 3 3 0 94 1 1023 0 13 612 105 705 8 107 60 38 2586 4 2 0 94 2 2495 0 19 377 4 589 14 92 66 31 3567 4 2 0 94 3 817 0 97 530 106 594 16 101 47 42 2515 2 1 0 97 4 1307 0 18 323 10 504 17 95 62 18 2618 3 1 0 96 5 34750 0 89 381 38 443 21 58 25 23 2023 10 8 0 82 6 828 0 13 290 2 466 8 94 64 30 3474 2 2 0 96 7 5100 0 185 233 4 376 7 54 51 22 1941 5 2 0 93 March 4, 2026 at 01:42:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 462 2115 100 92 0 4 1 0 0 0 1 0 99 1 44 0 7 307 107 26 0 3 0 0 303 0 0 0 100 2 0 0 7 88 4 38 0 0 0 0 1649 0 0 0 99 3 0 0 7 287 104 6 0 0 0 0 300 0 0 0 100 4 2 0 14 83 3 6 0 0 0 0 268 0 0 0 100 5 0 0 42 181 50 114 0 2 1 0 0 0 1 0 99 6 0 0 0 92 0 12 0 0 0 0 0 0 0 0 100 7 0 0 0 83 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:42:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 102 0 0 1 0 0 0 1 0 99 1 0 0 7 221 107 14 0 0 1 0 303 0 0 0 100 2 0 0 7 16 5 38 2 0 2 0 1646 0 0 0 100 3 0 0 7 213 104 8 0 1 0 0 300 0 0 0 100 4 0 0 14 13 5 6 0 0 1 0 268 0 0 0 100 5 0 0 0 108 50 102 0 0 1 0 0 0 0 0 100 6 0 0 0 24 1 20 0 1 1 0 0 0 0 0 100 7 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:42:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 100 161 0 15 63 0 0 0 1 0 99 1 0 0 7 272 107 116 0 15 59 0 302 0 0 0 100 2 0 0 7 119 4 246 2 14 58 0 1646 0 0 0 99 3 0 0 7 349 180 127 0 17 77 0 300 0 0 0 99 4 0 0 14 82 3 152 0 26 91 0 266 0 0 0 100 5 0 0 0 154 50 197 0 15 47 0 0 0 0 0 100 6 0 0 0 66 0 118 0 26 79 0 0 0 0 0 100 7 0 0 0 50 1 84 0 13 62 0 0 0 0 0 100 March 4, 2026 at 01:42:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8943 0 165 2690 101 943 28 185 157 71 5489 8 5 0 87 1 35284 0 214 822 109 1114 33 206 104 82 5986 12 9 0 79 2 2025 0 197 635 5 1128 37 186 75 74 4977 4 3 0 94 3 3392 0 126 877 105 1147 50 220 89 75 4379 8 3 0 89 4 1072 0 24 563 6 973 24 183 84 42 3640 4 3 0 94 5 2320 0 19 497 17 754 19 136 78 41 3760 7 2 0 91 6 724 0 13 611 35 1024 25 189 125 44 3164 3 2 0 95 7 10356 0 146 428 2 746 14 117 165 49 3606 4 5 0 91 March 4, 2026 at 01:42:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2118 101 122 0 5 5 0 6 0 2 0 98 1 0 0 2 243 103 30 0 1 6 0 337 0 1 0 99 2 45 0 0 41 9 54 0 2 1 0 1417 0 0 0 99 3 5 0 33 227 105 12 0 1 1 0 592 0 0 0 100 4 19 0 7 34 6 21 0 5 0 0 285 0 0 0 100 5 11 0 0 35 8 9 1 2 1 0 36 0 0 0 100 6 24 0 0 140 52 131 0 3 0 0 29 0 0 0 100 7 0 0 0 31 2 13 0 3 0 0 10 0 0 0 100 March 4, 2026 at 01:42:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 101 102 0 3 2 0 1 0 2 0 98 1 0 0 465 228 102 14 0 3 2 0 294 0 1 0 99 2 0 0 0 97 9 48 1 0 0 0 1396 0 0 0 99 3 0 0 17 284 105 8 0 0 0 0 565 0 0 0 100 4 0 0 7 84 4 6 1 0 0 0 264 0 0 0 100 5 0 0 0 115 19 40 0 1 0 0 0 0 0 0 100 6 0 0 0 149 31 70 0 2 0 0 0 0 0 0 100 7 0 0 0 80 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 1 0 99 1 0 0 7 216 102 12 0 1 0 0 294 0 0 0 100 2 0 0 0 25 9 48 1 0 0 0 1397 0 0 0 100 3 0 0 21 213 105 8 0 0 0 0 566 0 0 0 100 4 4 0 7 10 3 6 0 1 0 0 261 0 0 0 100 5 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 6 0 0 0 16 1 10 0 0 0 0 1 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35272 0 196 2423 101 487 20 91 460 46 2291 10 7 0 83 1 16775 0 46 558 105 562 21 134 319 49 3721 7 5 0 88 2 303 0 10 442 13 821 9 141 135 52 3116 1 2 0 97 3 17972 0 256 566 163 456 12 101 151 43 2838 7 6 0 87 4 572 0 25 300 4 541 12 120 136 53 1981 1 2 0 97 5 297 0 11 357 40 551 4 97 140 38 1471 1 1 0 98 6 777 0 24 324 2 576 9 118 189 49 2089 1 2 0 97 7 3632 0 124 241 7 420 9 93 152 39 3239 2 2 0 96 March 4, 2026 at 01:42:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1803 0 0 2446 102 653 28 149 54 15 2603 4 3 0 93 1 817 0 77 588 103 702 39 149 77 22 2402 3 2 0 95 2 637 0 7 410 5 679 29 101 54 7 3306 3 2 0 95 3 353 0 49 549 109 592 21 106 19 7 2105 3 2 0 96 4 677 0 7 324 4 552 19 99 59 9 2654 4 2 0 94 5 3220 0 178 351 44 580 19 84 76 11 1880 3 2 0 95 6 5671 0 14 370 2 572 27 106 86 17 2293 6 2 0 92 7 1250 0 4 278 4 515 16 90 40 23 1798 2 1 0 97 March 4, 2026 at 01:42:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2192 106 121 0 0 0 0 13 0 1 0 99 1 0 0 49 281 102 8 0 0 3 0 301 0 1 0 99 2 0 0 462 25 3 46 1 2 3 0 1393 0 1 0 99 3 0 0 21 314 116 42 0 2 0 0 266 0 0 0 100 4 0 0 7 98 6 26 1 1 0 0 580 0 0 0 100 5 0 0 0 163 45 76 0 0 0 0 0 0 0 0 100 6 0 0 0 81 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 92 1 16 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 105 115 0 0 0 0 10 0 1 0 99 1 0 0 2 250 121 42 0 1 0 0 294 0 0 0 100 2 0 0 0 12 3 36 1 0 0 0 1396 0 0 0 100 3 0 0 19 273 134 68 1 0 2 0 266 0 0 0 100 4 0 0 7 14 3 14 0 1 0 0 559 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 16 1 14 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:42:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 118 0 0 1 0 10 0 1 0 99 1 0 0 2 309 151 102 0 0 1 0 294 0 0 0 100 2 0 0 0 14 4 36 1 0 1 0 1392 0 0 0 99 3 0 0 19 210 104 6 0 0 1 0 266 0 0 0 100 4 0 0 7 15 5 8 1 0 0 0 560 0 0 0 100 5 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 6 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 18 2 12 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:42:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8646 0 331 2754 104 1289 41 225 244 51 5120 6 6 0 88 1 39777 0 38 1033 112 1371 59 227 243 63 6801 15 10 0 74 2 2072 0 10 647 3 1033 21 161 138 45 4370 6 3 0 92 3 2319 0 208 828 178 1098 29 196 185 59 3872 3 3 0 94 4 4047 0 49 646 6 1041 25 191 218 56 5154 5 3 0 92 5 3830 0 19 480 3 802 20 156 182 55 3624 4 3 0 93 6 1653 0 194 523 3 1024 30 206 168 72 2867 5 5 0 90 7 1392 0 7 512 6 903 35 132 162 42 2668 3 2 0 95 March 4, 2026 at 01:42:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2110 100 98 1 2 6 0 18 0 2 0 98 1 6 0 3 311 124 122 0 6 6 0 1394 0 1 0 99 2 0 0 0 29 2 10 1 2 2 0 309 0 0 0 100 3 50 0 32 270 127 61 0 4 0 0 296 0 0 0 100 4 0 0 7 33 5 16 1 1 0 0 577 0 0 0 100 5 23 0 7 24 1 8 0 2 1 0 10 0 0 0 100 6 1 0 0 31 2 23 0 5 0 0 11 0 0 0 100 7 32 0 0 30 3 14 0 1 0 0 12 0 0 0 100 March 4, 2026 at 01:42:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 100 118 0 1 1 0 4 0 2 0 98 1 0 0 465 222 103 38 1 0 2 0 1383 0 1 0 99 2 0 0 0 85 3 8 0 1 0 0 302 0 0 0 100 3 0 0 18 392 159 118 0 0 0 0 275 0 0 0 100 4 0 0 7 87 5 12 0 1 0 0 567 0 0 0 100 5 0 0 0 91 7 12 0 2 0 0 10 0 0 0 100 6 0 0 0 81 1 6 0 2 0 0 1 0 0 0 100 7 0 0 0 84 1 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 120 0 1 1 0 1 0 1 0 99 1 0 0 2 214 103 34 1 0 1 0 1381 0 0 0 100 2 0 0 0 13 2 10 0 1 0 0 309 0 0 0 100 3 0 0 19 285 140 82 0 0 0 0 293 0 0 0 100 4 0 0 7 52 23 46 1 1 0 0 562 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 8 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:42:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10165 0 303 2655 100 1106 48 203 167 68 4998 7 6 0 87 1 6836 0 34 884 106 1134 32 218 120 75 5563 5 4 0 91 2 6143 0 33 587 1 899 27 167 108 71 3719 5 3 0 92 3 2079 0 103 730 117 960 25 175 120 64 4385 4 2 0 93 4 1665 0 204 538 34 903 24 164 91 46 4500 4 3 0 93 5 837 0 22 489 2 819 19 142 52 45 2364 5 2 0 94 6 1681 0 135 539 4 1005 29 176 62 49 3749 3 2 0 94 7 34014 0 21 417 2 695 26 115 117 43 4368 13 8 0 79 March 4, 2026 at 01:42:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 101 204 0 15 79 0 18 0 1 0 99 1 0 0 7 278 103 110 0 20 96 0 303 0 0 0 100 2 3 0 0 174 32 227 0 12 58 0 309 0 1 0 99 3 72 0 35 363 175 148 1 19 85 0 293 0 0 0 99 4 0 0 7 81 9 104 1 20 84 0 576 0 0 0 99 5 0 0 70 66 2 114 0 22 82 0 16 0 1 0 99 6 27 0 0 77 4 135 1 20 98 0 1127 0 0 0 99 7 0 0 7 64 1 90 0 13 79 0 7 0 0 0 100 March 4, 2026 at 01:42:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 100 110 0 0 0 0 0 0 1 0 99 1 0 0 3 250 102 6 0 2 0 0 294 0 0 0 100 2 0 0 238 18 1 16 0 1 4 0 300 0 1 0 99 3 0 0 18 254 108 14 0 0 0 0 275 0 0 0 100 4 0 0 7 148 54 109 0 1 0 0 561 0 0 0 100 5 0 0 14 47 3 8 0 0 4 0 1 0 1 0 99 6 0 0 0 46 2 34 1 0 1 0 1087 0 0 0 100 7 0 0 0 49 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:42:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 100 138 0 4 0 0 3 0 1 0 99 1 0 0 3 245 102 2 0 0 0 0 294 0 0 0 100 2 0 0 224 14 1 8 0 0 2 0 300 0 0 0 100 3 0 0 18 257 108 24 0 1 0 0 275 0 0 0 100 4 1 0 7 98 29 60 1 0 0 0 568 0 0 0 100 5 0 0 14 89 10 46 0 1 0 0 10 0 0 0 100 6 0 0 0 48 2 38 1 0 0 0 1092 0 0 0 100 7 0 0 0 46 1 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 212 0 0 0 0 1 0 1 0 99 1 0 0 2 213 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 12 1 4 1 0 0 0 300 0 0 0 100 3 0 0 19 220 108 14 0 0 0 0 272 0 0 0 100 4 0 0 7 16 4 10 0 0 0 0 559 0 0 0 100 5 0 0 14 11 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 34 1 0 0 0 1087 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34806 0 64 2822 102 1171 51 229 406 69 5628 16 8 0 76 1 6289 0 36 918 105 1285 51 266 167 75 6137 6 4 0 90 2 1474 0 14 653 14 1169 25 192 150 73 3632 4 2 0 94 3 27781 0 224 838 106 1203 56 242 332 77 5042 11 10 0 79 4 1348 0 30 569 10 932 25 173 104 65 4948 4 3 0 93 5 683 0 4 572 31 930 28 160 53 53 2587 3 2 0 95 6 4025 0 551 514 4 1070 31 164 127 65 7020 6 4 0 90 7 13528 0 12 504 4 697 32 123 192 44 2602 7 4 0 89 March 4, 2026 at 01:42:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 70 2161 106 199 0 13 75 0 9 0 2 0 98 1 0 0 14 280 103 125 0 19 86 0 294 0 1 0 99 2 0 0 0 121 1 187 0 12 57 0 0 0 0 0 100 3 2 0 21 321 163 81 1 18 80 0 569 0 1 0 99 4 0 0 7 75 4 107 0 15 77 0 563 0 0 0 100 5 0 0 0 166 51 191 0 13 73 0 0 0 0 0 100 6 0 0 0 70 2 127 1 19 62 0 1087 0 0 0 100 7 0 0 0 62 0 91 0 17 94 0 0 0 0 0 100 March 4, 2026 at 01:42:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2184 106 106 1 2 2 0 9 0 2 0 98 1 0 0 469 235 103 20 0 3 2 0 294 0 1 0 99 2 0 0 0 91 1 14 0 1 0 0 0 0 0 0 100 3 0 0 21 282 103 6 0 1 0 0 565 0 0 0 100 4 0 0 7 87 5 8 1 0 0 0 559 0 0 0 100 5 0 0 0 182 52 104 0 0 0 0 2 0 0 0 100 6 0 0 0 86 3 38 1 1 0 0 1089 0 0 0 100 7 0 0 0 79 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 108 104 1 2 0 0 22 0 1 0 99 1 0 0 7 239 103 28 0 2 0 0 294 0 0 0 100 2 0 0 0 22 3 16 0 0 0 0 2 0 0 0 100 3 0 0 21 211 104 6 0 0 0 0 567 0 0 0 100 4 0 0 7 14 4 8 0 0 0 0 559 0 0 0 100 5 0 0 0 116 58 104 0 0 0 0 21 0 0 0 100 6 0 0 0 14 1 42 1 3 1 0 1093 0 0 0 100 7 0 0 0 15 0 18 0 2 0 0 5 0 0 0 100 March 4, 2026 at 01:42:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4258 0 135 2755 107 1231 61 230 164 79 4555 7 4 0 89 1 3160 0 317 881 110 1265 65 241 104 67 6578 8 4 0 88 2 3536 0 34 636 10 967 28 192 98 75 4973 5 3 0 92 3 1310 0 92 832 108 1155 40 223 96 51 4809 6 3 0 91 4 1050 0 21 538 4 919 32 195 143 44 3458 3 3 0 94 5 6999 0 13 572 30 953 32 168 143 57 3589 4 3 0 93 6 34171 0 38 594 3 943 47 178 170 34 4178 13 9 0 78 7 1976 0 183 461 1 866 20 145 127 63 3985 3 3 0 94 March 4, 2026 at 01:42:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 70 2112 101 13 1 3 6 0 13 0 2 0 98 1 10 0 16 232 104 16 1 1 6 0 625 0 1 0 99 2 0 0 0 124 51 108 0 1 0 0 2 0 0 0 100 3 0 0 19 231 103 14 0 3 0 0 325 0 0 0 100 4 55 0 14 36 8 20 0 2 0 0 572 0 0 0 100 5 24 0 0 23 1 4 0 1 1 0 10 0 0 0 100 6 0 0 0 26 2 6 0 1 0 0 23 0 0 0 100 7 16 0 0 132 3 146 1 4 1 0 1111 0 0 0 100 March 4, 2026 at 01:42:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2199 100 187 0 16 67 0 0 0 2 0 98 1 0 0 366 261 104 83 0 13 65 0 560 0 1 0 99 2 0 0 0 255 50 289 0 13 58 0 0 0 0 0 100 3 0 0 5 369 160 91 0 16 70 0 300 0 0 0 100 4 0 0 7 123 10 105 0 18 70 0 572 0 0 0 99 5 0 0 0 109 2 98 0 14 76 0 2 0 0 0 100 6 0 0 0 98 0 74 0 16 93 0 0 0 0 0 100 7 0 0 0 123 3 141 1 16 74 0 1087 0 0 0 99 March 4, 2026 at 01:42:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2115 102 127 1 1 0 0 2 0 1 0 99 1 0 0 16 230 104 6 0 0 0 0 561 0 0 0 100 2 0 0 0 25 1 4 0 0 0 0 0 0 0 0 100 3 0 0 5 322 151 102 0 0 0 0 300 0 0 0 100 4 0 0 7 40 10 18 1 0 0 0 568 0 0 0 100 5 0 0 0 23 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 23 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 28 2 36 1 0 0 0 1087 0 0 0 100 March 4, 2026 at 01:42:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 427 0 19 2355 102 520 7 90 58 36 1379 1 2 0 97 1 858 0 25 449 104 393 6 73 36 32 2031 1 1 0 97 2 2820 0 40 283 2 378 6 62 46 36 1321 4 4 0 92 3 1166 0 62 515 146 477 10 74 66 44 2023 2 1 0 96 4 592 0 17 228 11 358 6 57 69 30 3251 1 1 0 97 5 8187 0 301 181 7 314 6 56 114 40 2020 2 3 0 95 6 2398 0 14 216 1 402 7 83 70 42 1730 1 1 0 97 7 181 0 10 204 5 363 8 74 60 35 2566 1 1 0 98 March 4, 2026 at 01:42:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 767 0 6 2481 102 703 16 111 48 24 1750 2 2 0 95 1 1208 0 162 624 138 719 20 106 38 24 2778 3 2 0 95 2 34278 0 80 376 5 624 27 88 70 22 3231 12 8 0 79 3 387 0 47 578 110 619 21 87 58 16 2725 5 1 0 94 4 481 0 8 374 6 680 21 81 57 17 3971 3 2 0 95 5 3717 0 183 268 2 463 13 67 75 30 1787 2 2 0 96 6 5131 0 22 367 2 512 15 72 104 19 1843 5 2 0 93 7 1091 0 2 252 4 431 3 49 62 30 2435 2 1 0 97 March 4, 2026 at 01:42:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 462 2113 100 28 0 2 2 0 0 0 1 0 99 1 2 0 16 312 116 34 0 2 1 0 266 0 0 0 100 2 0 0 42 125 24 52 0 2 2 0 294 0 1 0 99 3 44 0 5 306 112 32 1 2 1 0 310 0 0 0 99 4 0 0 7 87 5 8 0 0 1 0 562 0 0 0 100 5 0 0 0 91 3 14 0 1 0 0 2 0 0 0 100 6 0 0 0 182 1 102 0 0 1 0 0 0 0 0 100 7 0 0 0 86 3 38 1 1 1 0 1083 0 0 0 100 March 4, 2026 at 01:42:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 101 167 0 14 69 0 1 0 1 0 99 1 0 0 17 271 111 108 0 17 77 0 266 0 0 0 100 2 0 0 0 143 24 228 0 12 61 0 294 0 0 0 100 3 0 0 4 322 163 109 0 18 61 0 309 0 0 0 100 4 0 0 7 59 4 105 0 16 71 0 559 0 0 0 100 5 0 0 0 46 1 71 0 7 64 0 0 0 0 0 100 6 0 0 0 102 19 132 0 17 77 0 0 0 0 0 100 7 0 0 0 48 2 110 1 12 66 0 1085 0 1 0 99 March 4, 2026 at 01:42:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 1 0 99 1 0 0 16 211 103 4 0 0 0 0 266 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 5 224 109 18 0 0 0 0 309 0 0 0 100 4 0 0 7 18 5 16 1 1 0 0 560 0 0 0 100 5 0 0 0 18 2 12 0 0 0 0 2 0 0 0 100 6 0 0 0 107 51 103 0 1 0 0 1 0 0 0 100 7 0 0 0 11 2 36 1 0 0 0 1084 0 0 0 99 March 4, 2026 at 01:42:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1656 0 15 2752 103 1250 59 261 91 77 5160 7 4 0 90 1 2078 0 41 862 119 1224 40 256 141 61 5038 4 3 0 93 2 2981 0 32 626 3 979 42 194 124 52 3716 7 3 0 91 3 30147 0 280 803 109 992 46 191 344 54 4977 14 9 0 77 4 4211 0 199 601 11 1013 37 189 125 74 4337 4 4 0 92 5 4575 0 205 508 12 859 25 137 137 76 4870 6 4 0 90 6 41366 0 126 612 19 901 38 164 430 42 4646 12 8 0 80 7 3154 0 31 466 3 803 21 142 128 49 3262 3 3 0 94 March 4, 2026 at 01:42:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 2130 102 105 0 4 6 0 29 0 1 0 99 1 11 0 23 244 111 55 1 3 0 0 1373 0 0 0 99 2 24 0 0 107 43 91 0 3 1 0 304 0 0 0 100 3 3 0 19 227 103 10 1 3 0 0 312 0 0 0 100 4 16 0 0 30 5 10 0 0 0 0 317 0 0 0 100 5 44 0 70 38 6 38 0 3 5 0 40 0 1 0 99 6 0 0 7 41 1 25 0 2 0 0 284 0 0 0 100 7 5 0 0 27 2 8 0 2 0 0 10 0 0 0 100 March 4, 2026 at 01:42:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 504 2107 100 111 0 1 1 0 0 0 2 0 98 1 0 0 17 290 105 40 1 1 0 0 1360 0 1 0 99 2 0 0 0 142 32 66 0 1 0 0 294 0 0 0 100 3 0 0 4 320 122 44 0 1 0 0 300 0 0 0 100 4 0 0 0 82 3 4 0 0 0 0 300 0 0 0 100 5 0 0 0 105 7 28 0 1 1 0 9 0 0 0 100 6 0 0 7 85 2 14 0 1 0 0 263 0 0 0 100 7 0 0 0 80 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 101 178 0 13 77 0 0 0 1 0 99 1 0 0 16 256 104 126 1 9 99 0 1360 0 1 0 99 2 0 0 0 95 1 171 0 12 58 0 294 0 0 0 100 3 0 0 5 409 206 195 0 15 64 0 305 0 0 0 99 4 0 0 0 48 3 80 0 13 81 0 300 0 0 0 100 5 0 0 0 56 7 82 0 8 71 0 6 0 0 0 100 6 0 0 7 50 1 93 1 16 82 0 259 0 0 0 100 7 0 0 0 59 1 109 0 12 77 0 0 0 0 0 100 March 4, 2026 at 01:42:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6624 0 50 2451 102 531 12 79 117 46 2889 4 4 0 92 1 2264 0 145 507 110 590 7 124 74 77 4288 3 2 0 95 2 413 0 28 275 3 423 5 87 47 47 1583 1 1 0 98 3 27145 0 232 570 148 545 13 94 65 40 2356 9 6 0 85 4 576 0 11 239 3 385 5 82 33 36 1835 1 1 0 97 5 270 0 9 209 1 277 5 66 45 29 809 1 1 0 98 6 3425 0 140 235 1 451 8 88 83 43 2822 2 2 0 96 7 2393 0 10 208 4 314 5 58 62 38 2556 1 2 0 97 March 4, 2026 at 01:42:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1187 0 70 2423 100 593 20 76 36 11 2435 4 3 0 93 1 909 0 16 520 109 584 25 81 46 13 3325 3 2 0 94 2 3703 0 178 238 5 409 7 48 65 19 2029 2 2 0 96 3 4164 0 42 653 143 662 16 70 70 18 1950 4 3 0 93 4 605 0 25 285 5 496 13 66 26 18 2088 4 1 0 95 5 865 0 1 372 9 592 9 66 54 9 1750 2 1 0 97 6 609 0 8 300 2 569 5 56 44 16 2059 2 1 0 97 7 1800 0 11 193 2 324 23 52 27 6 977 3 1 0 96 March 4, 2026 at 01:42:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2169 100 116 0 1 1 0 0 0 2 0 98 1 2 0 477 265 124 88 1 2 2 0 1356 0 1 0 99 2 44 0 0 93 7 14 1 0 0 0 303 0 0 0 100 3 0 0 5 343 132 64 0 0 0 0 0 0 0 0 100 4 0 0 0 84 3 8 0 1 0 0 600 0 0 0 100 5 0 0 0 83 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 80 2 4 0 0 0 0 262 0 0 0 100 7 0 0 0 79 1 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:42:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 112 0 0 1 0 0 0 1 0 99 1 0 0 21 228 111 50 1 0 1 0 1357 0 0 0 99 2 0 0 0 105 49 100 0 1 1 0 303 0 0 0 100 3 0 0 7 209 102 4 0 1 0 0 0 0 0 0 100 4 0 0 0 14 4 6 0 0 1 0 600 0 0 0 100 5 0 0 0 12 3 4 0 0 1 0 2 0 0 0 100 6 0 0 7 12 3 4 1 0 1 0 259 0 0 0 100 7 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:42:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 102 214 0 10 74 0 0 0 1 0 99 1 0 0 16 259 105 128 1 21 91 0 1355 0 1 0 99 2 0 0 0 204 55 288 0 16 68 0 303 0 0 0 100 3 0 0 5 319 161 114 0 21 95 0 0 0 0 0 100 4 0 0 0 66 4 107 1 20 94 0 600 0 0 0 100 5 0 0 0 51 2 93 0 14 89 0 0 0 0 0 100 6 0 0 7 46 4 69 0 15 62 0 259 0 0 0 100 7 0 0 0 49 1 88 0 15 56 0 0 0 0 0 100 March 4, 2026 at 01:42:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2872 0 302 2682 101 1142 29 204 107 62 2950 5 4 0 91 1 1259 0 57 826 104 1123 34 192 137 55 4857 4 4 0 93 2 42194 0 32 629 8 891 32 149 150 49 4623 14 12 0 74 3 6417 0 191 844 145 1026 35 150 119 52 5616 6 4 0 90 4 4167 0 189 527 10 978 24 178 125 75 4201 4 3 0 93 5 3306 0 6 491 3 873 19 154 119 63 3569 4 2 0 94 6 2230 0 19 518 6 949 37 175 89 61 6091 6 3 0 92 7 1472 0 19 407 4 674 18 101 44 50 2385 3 2 0 95 March 4, 2026 at 01:42:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 100 116 0 2 0 0 13 0 1 0 99 1 31 0 87 244 109 69 1 3 7 0 1397 0 2 0 98 2 0 0 0 28 3 14 0 0 6 0 313 0 0 0 100 3 0 0 18 326 151 116 0 1 0 0 16 0 0 0 100 4 46 0 0 37 7 24 0 0 0 0 623 0 0 0 100 5 23 0 0 31 8 6 0 0 1 0 30 0 0 0 100 6 19 0 0 24 1 8 0 3 0 0 16 0 0 0 100 7 0 0 14 27 1 14 0 2 0 0 272 0 0 0 100 March 4, 2026 at 01:42:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 101 120 0 2 0 0 1 0 1 0 99 1 0 0 59 283 104 40 1 1 3 0 1362 0 1 0 99 2 0 0 462 20 3 12 0 0 2 0 303 0 1 0 99 3 0 0 3 342 132 66 0 0 0 0 18 0 0 0 100 4 0 0 0 136 28 60 0 1 0 0 608 0 0 0 100 5 0 0 0 81 2 4 0 0 0 0 2 0 0 0 100 6 0 0 0 81 1 4 0 0 0 0 0 0 0 0 100 7 1 0 7 81 1 8 1 2 0 0 259 0 0 0 100 March 4, 2026 at 01:42:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 116 0 0 0 0 0 0 1 0 99 1 0 0 16 220 104 46 1 1 0 0 1362 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 4 0 0 0 123 59 119 0 1 0 0 609 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 7 0 0 7 6 1 2 0 0 0 0 259 0 0 0 100 March 4, 2026 at 01:42:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2686 0 191 2691 101 1120 39 190 120 61 4851 6 4 0 90 1 1921 0 42 880 117 1195 48 210 131 53 5362 6 3 0 91 2 1926 0 25 593 3 958 33 185 206 40 4041 5 3 0 92 3 10445 0 348 838 155 1182 44 222 251 66 4721 4 5 0 91 4 7068 0 44 753 46 1062 27 197 192 48 5340 4 4 0 92 5 546 0 21 472 2 817 14 158 192 63 2241 2 2 0 96 6 1284 0 125 501 4 956 40 185 165 61 3031 3 2 0 95 7 34103 0 25 478 2 836 24 146 119 57 3176 10 7 0 83 March 4, 2026 at 01:42:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 204 0 0 2172 101 191 4 27 16 0 630 1 1 0 97 1 344 0 24 321 110 179 7 28 6 1 866 1 1 0 98 2 750 0 70 192 44 251 9 28 37 3 723 1 2 0 97 3 503 0 32 283 104 128 6 24 25 1 667 1 1 0 98 4 506 0 0 87 4 142 5 20 16 3 1788 1 1 0 98 5 305 0 0 94 5 170 13 28 18 1 500 1 0 0 99 6 687 0 0 83 2 165 14 34 22 0 725 2 1 0 97 7 573 0 7 65 3 89 6 16 19 1 968 3 0 0 97 March 4, 2026 at 01:42:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 114 0 1 0 0 5 0 1 0 99 1 0 0 17 235 107 26 0 0 0 0 303 0 0 0 100 2 0 0 14 78 33 72 0 3 5 0 294 0 0 0 100 3 0 0 18 219 103 20 0 1 4 0 8 0 0 0 100 4 0 0 0 20 3 40 2 0 0 0 1387 0 0 0 99 5 0 0 0 28 12 14 0 0 0 0 10 0 0 0 100 6 0 0 0 11 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 54 21 48 1 1 0 0 562 0 0 0 100 March 4, 2026 at 01:43:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 100 110 0 0 0 0 0 0 1 0 99 1 0 0 17 318 121 44 1 2 4 0 266 0 0 0 100 2 0 0 28 76 2 8 0 0 3 0 294 0 1 0 99 3 0 0 451 213 102 4 0 0 1 0 0 0 0 0 100 4 0 0 0 81 3 36 1 0 0 0 1391 0 0 0 99 5 0 0 0 87 7 14 0 0 0 0 9 0 0 0 100 6 0 0 0 75 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 140 34 67 0 1 0 0 559 0 0 0 100 March 4, 2026 at 01:43:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 112 0 1 2 0 0 0 1 0 99 1 0 0 21 227 110 20 0 0 1 0 266 0 0 0 100 2 0 0 0 95 44 90 0 1 1 0 294 0 0 0 100 3 0 0 7 215 102 12 0 0 2 0 0 0 0 0 100 4 0 0 0 16 4 36 1 0 1 0 1391 0 0 0 100 5 0 0 0 24 9 16 0 0 1 0 11 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 7 12 3 6 1 1 0 0 558 0 0 0 100 March 4, 2026 at 01:43:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5554 0 324 2780 104 1285 79 284 256 75 5394 7 6 0 87 1 5646 0 45 1088 104 1486 62 306 260 43 4916 6 4 0 90 2 1452 0 27 745 12 1261 44 227 184 59 5830 6 3 0 91 3 10864 0 401 949 160 1434 56 267 289 66 6136 9 7 0 84 4 4286 0 8 739 7 1441 41 233 268 80 5827 6 4 0 90 5 1408 0 16 675 16 1174 52 207 186 57 3509 5 2 0 92 6 33618 0 13 706 26 1248 46 222 165 40 4397 11 8 0 81 7 1215 0 18 521 6 853 29 152 160 42 4086 3 2 0 95 March 4, 2026 at 01:43:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2107 101 118 0 1 6 0 2 0 2 0 98 1 2 0 17 228 105 10 1 0 0 0 269 0 0 0 100 2 0 0 0 21 1 4 0 0 0 0 294 0 0 0 100 3 0 0 10 219 102 4 0 1 0 0 0 0 0 0 100 4 0 0 0 33 6 48 3 0 6 0 1394 0 1 0 99 5 0 0 0 23 2 6 0 0 0 0 3 0 0 0 100 6 44 0 0 35 8 18 0 0 0 0 11 0 0 0 100 7 0 0 7 121 53 107 1 1 0 0 561 0 0 0 100 March 4, 2026 at 01:43:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2181 101 106 0 4 2 0 5 0 1 0 99 1 0 0 17 401 147 124 0 3 0 0 280 0 0 0 100 2 0 0 0 82 2 4 0 0 0 0 295 0 0 0 100 3 0 0 11 285 102 8 0 0 0 0 7 0 0 0 100 4 0 0 490 23 3 48 1 2 2 0 1390 0 1 0 99 5 0 0 0 90 7 12 0 1 0 0 0 0 0 0 100 6 0 0 0 90 6 12 0 0 0 0 8 0 0 0 100 7 0 0 7 101 10 24 0 0 0 0 559 0 0 0 100 March 4, 2026 at 01:43:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 0 0 0 0 1 0 1 0 99 1 0 0 17 309 152 104 0 0 0 0 266 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 4 210 102 4 0 0 0 0 0 0 0 0 100 4 0 0 0 13 3 38 1 1 0 0 1391 0 0 0 99 5 0 0 0 13 4 6 0 0 1 0 2 0 0 0 100 6 0 0 0 23 7 24 0 1 0 0 9 0 0 0 100 7 0 0 7 10 2 6 1 0 0 0 558 0 0 0 100 March 4, 2026 at 01:43:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1365 0 20 2658 102 1028 31 164 98 41 4120 3 3 0 93 1 2807 0 202 796 132 1003 28 148 105 57 4812 5 3 0 92 2 11120 0 23 464 3 787 30 137 166 53 4401 7 4 0 89 3 42987 0 223 847 103 975 23 146 169 65 4653 15 11 0 75 4 3665 0 313 537 16 1040 31 162 132 79 5614 6 4 0 90 5 878 0 14 466 2 841 13 132 60 73 3197 4 2 0 94 6 564 0 14 527 13 984 16 161 73 71 3380 3 1 0 96 7 379 0 22 385 3 602 6 95 51 36 2711 3 1 0 96 March 4, 2026 at 01:43:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2218 101 272 0 21 86 0 9 0 2 0 98 1 48 0 17 314 108 145 0 23 69 0 292 0 0 0 99 2 2 0 0 99 1 104 1 11 61 0 303 0 0 0 100 3 0 0 18 328 156 106 1 18 76 0 4 0 0 0 100 4 16 0 0 86 5 152 3 29 93 0 1408 0 1 0 99 5 24 0 7 66 2 88 1 15 64 0 15 0 0 0 100 6 0 0 70 120 28 171 0 28 94 0 5 0 2 0 98 7 11 0 7 64 2 88 2 16 65 0 589 0 0 0 100 March 4, 2026 at 01:43:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 343 2115 102 150 0 4 4 0 0 0 1 0 99 1 0 0 17 332 108 72 0 3 1 0 275 0 0 0 100 2 0 0 0 60 1 2 0 0 0 0 294 0 0 0 100 3 0 0 3 286 114 28 0 1 0 0 0 0 0 0 100 4 0 0 0 65 3 36 1 0 0 0 1385 0 1 0 99 5 0 0 0 60 0 2 0 0 0 0 0 0 0 0 100 6 0 0 28 64 3 12 0 2 3 0 1 0 1 0 99 7 0 0 7 65 2 8 0 1 1 0 561 0 0 0 100 March 4, 2026 at 01:43:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2111 102 118 0 1 1 0 5 0 1 0 99 1 0 0 17 255 110 34 0 1 0 0 290 0 0 0 100 2 0 0 0 24 1 2 0 0 0 0 294 0 0 0 100 3 0 0 4 286 131 68 0 1 0 0 7 0 0 0 100 4 0 0 0 69 22 76 3 1 1 0 1383 0 0 0 99 5 0 0 0 31 6 2 0 0 0 0 2 0 0 0 100 6 0 0 0 28 2 6 0 0 0 0 0 0 0 0 100 7 1 0 7 29 2 10 0 0 0 0 559 0 0 0 100 March 4, 2026 at 01:43:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1047 0 197 2189 102 242 3 27 20 28 804 1 1 0 97 1 144 0 22 343 109 176 1 29 37 25 705 0 1 0 99 2 5221 0 118 90 1 166 3 33 99 37 1380 1 2 0 97 3 3614 0 28 393 109 168 3 30 44 29 704 1 1 0 98 4 93 0 1 216 45 320 4 42 22 37 1835 0 1 0 99 5 86 0 3 123 0 146 0 26 23 24 1356 0 0 0 99 6 481 0 38 127 2 184 2 31 16 32 912 1 2 0 97 7 19 0 19 99 2 122 0 24 11 19 868 0 0 0 100 March 4, 2026 at 01:43:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2045 0 85 2592 102 889 20 147 77 36 3526 5 4 0 92 1 2828 0 315 640 109 865 30 154 68 53 4571 5 4 0 91 2 5264 0 6 433 4 735 19 109 98 36 4137 4 3 0 94 3 38431 0 106 683 105 734 32 135 93 29 3633 13 8 0 78 4 978 0 11 501 36 840 17 112 69 40 3435 3 2 0 95 5 1313 0 2 372 4 631 12 98 43 33 2402 4 2 0 94 6 1357 0 2 375 17 650 13 104 46 29 2404 3 2 0 96 7 418 0 21 438 5 693 16 78 38 22 2384 4 2 0 94 March 4, 2026 at 01:43:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2247 102 194 0 17 56 0 0 0 2 0 98 1 3 0 483 262 103 94 0 21 93 0 268 0 1 0 99 2 0 0 0 125 1 85 0 15 69 0 294 0 0 0 100 3 0 0 7 381 157 132 0 18 64 0 0 0 1 0 99 4 44 0 0 145 16 139 1 20 63 0 1094 0 1 0 99 5 0 0 0 198 40 154 0 12 51 0 300 0 0 0 100 6 0 0 0 136 2 115 0 18 88 0 0 0 0 0 100 7 0 0 7 194 6 153 0 15 79 0 561 0 0 0 100 March 4, 2026 at 01:43:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 152 0 2 0 0 0 0 1 0 99 1 0 0 17 209 102 4 0 1 0 0 266 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 294 0 0 0 100 3 0 0 3 213 101 10 0 1 0 0 0 0 0 0 100 4 0 0 0 26 10 50 1 0 0 0 1093 0 0 0 99 5 0 0 0 9 2 4 0 0 0 0 302 0 0 0 100 6 0 0 0 13 3 8 0 1 0 0 1 0 0 0 100 7 0 0 7 71 33 66 0 0 0 0 560 0 0 0 100 March 4, 2026 at 01:43:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 196 0 1 0 0 5 0 1 0 99 1 0 0 16 236 115 30 0 1 0 0 267 0 0 0 100 2 0 0 0 17 4 16 0 0 0 0 308 0 0 0 100 3 0 0 5 214 101 14 0 0 1 0 7 0 0 0 100 4 0 0 0 26 9 50 1 0 1 0 1093 0 0 0 100 5 0 0 0 15 8 4 0 0 0 0 321 0 0 0 100 6 0 0 0 11 2 8 0 1 0 0 0 0 0 0 100 7 0 0 7 11 2 8 0 0 0 0 558 0 0 0 100 March 4, 2026 at 01:43:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2454 0 206 2634 103 1012 30 186 101 62 3220 5 3 0 91 1 34470 0 145 787 126 988 31 179 98 60 7289 12 9 0 78 2 3205 0 23 562 17 875 29 183 111 48 3580 3 3 0 94 3 9203 0 361 669 112 897 37 176 162 57 5415 6 4 0 90 4 6768 0 25 579 13 882 31 168 168 70 4393 5 4 0 91 5 3776 0 23 532 4 749 20 137 116 57 2974 5 2 0 93 6 3127 0 25 476 3 831 32 150 102 42 3285 5 2 0 93 7 857 0 24 433 2 813 19 158 85 60 2957 5 2 0 93 March 4, 2026 at 01:43:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2114 101 121 0 5 6 0 20 0 2 0 98 1 55 0 2 251 108 58 1 2 6 0 1106 0 1 0 99 2 6 0 21 24 3 12 0 2 0 0 564 0 0 0 100 3 0 0 19 318 150 104 0 1 1 0 12 0 0 0 100 4 0 0 0 30 2 18 0 3 0 0 11 0 0 0 100 5 23 0 0 24 1 4 1 1 2 0 310 0 0 0 100 6 16 0 0 35 6 16 1 1 0 0 23 0 0 0 100 7 19 0 7 25 2 8 0 0 1 0 570 0 0 0 100 March 4, 2026 at 01:43:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2224 101 194 0 16 82 0 0 0 2 0 98 1 0 0 465 279 109 145 1 15 77 0 1100 0 1 0 99 2 0 0 14 142 2 104 0 8 62 0 560 0 0 0 99 3 0 0 4 468 203 288 0 17 74 0 0 0 1 0 99 4 0 0 0 132 2 105 0 19 59 0 0 0 0 0 100 5 0 0 0 118 2 77 0 13 42 0 302 0 0 0 100 6 0 0 0 130 3 95 0 18 79 0 0 0 0 0 100 7 0 0 7 117 2 78 0 16 56 0 562 0 0 0 100 March 4, 2026 at 01:43:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 112 0 0 0 0 0 0 1 0 99 1 0 0 2 226 109 46 1 0 1 0 1100 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 559 0 0 0 100 3 0 0 5 304 150 100 0 0 0 0 0 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 9 1 4 0 1 0 0 300 0 0 0 100 6 0 0 0 15 3 10 0 0 0 0 1 0 0 0 100 7 0 0 7 8 2 4 0 0 0 0 559 0 0 0 100 March 4, 2026 at 01:43:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 992 0 132 2371 102 552 8 98 41 54 1518 1 3 0 96 1 980 0 42 459 111 451 6 97 47 38 4668 3 2 0 95 2 2881 0 42 330 3 412 8 77 65 34 1999 3 2 0 95 3 3986 0 67 551 145 524 5 104 91 51 3797 2 3 0 95 4 3977 0 298 215 3 408 1 82 76 51 1815 2 2 0 96 5 24234 0 5 280 8 444 11 97 72 57 2146 6 4 0 90 6 2263 0 15 265 5 447 2 84 40 44 1772 1 1 0 98 7 255 0 14 241 4 401 8 82 57 51 1842 1 1 0 98 March 4, 2026 at 01:43:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3823 0 2 2429 102 563 19 98 60 11 2149 3 2 0 94 1 889 0 75 508 105 628 24 118 112 23 2998 2 3 0 95 2 1766 0 190 317 46 556 17 65 45 20 2005 2 2 0 96 3 1697 0 33 533 102 617 17 95 55 24 2658 5 2 0 93 4 554 0 7 235 3 399 10 81 31 13 1355 4 1 0 95 5 11664 0 7 210 4 336 22 60 85 6 1279 4 4 0 91 6 1774 0 13 260 6 429 13 68 38 4 1431 3 1 0 96 7 2924 0 10 200 5 317 12 46 81 8 1941 2 1 0 97 March 4, 2026 at 01:43:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2185 106 122 0 0 1 0 9 0 1 0 99 1 0 0 44 282 103 38 1 0 3 0 1087 0 1 0 99 2 3 0 476 96 43 86 0 0 2 0 563 0 1 0 99 3 0 0 5 299 111 20 0 1 1 0 0 0 0 0 100 4 0 0 0 86 3 8 0 1 0 0 0 0 0 0 100 5 0 0 0 82 2 4 0 0 1 0 2 0 0 0 100 6 0 0 0 84 2 6 0 1 1 0 300 0 0 0 100 7 0 0 7 87 5 8 0 0 1 0 562 0 0 0 100 March 4, 2026 at 01:43:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 107 206 0 11 73 0 9 0 1 0 99 1 0 0 2 259 103 134 1 17 91 0 1087 0 1 0 99 2 0 0 14 50 2 84 0 9 65 0 560 0 0 0 100 3 0 0 4 396 209 282 0 12 72 0 0 0 0 0 100 4 0 0 0 62 2 110 0 16 72 0 0 0 0 0 100 5 0 0 0 45 1 82 1 11 64 0 0 0 0 0 100 6 0 0 0 52 1 96 1 13 84 0 300 0 0 0 100 7 1 0 7 54 4 86 0 10 56 0 559 0 0 0 100 March 4, 2026 at 01:43:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 107 126 0 0 0 0 9 0 1 0 99 1 0 0 2 219 104 44 0 1 2 0 1088 0 0 0 100 2 0 0 14 8 2 6 0 0 0 0 560 0 0 0 100 3 0 0 5 304 150 100 0 0 0 0 0 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 1 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 301 0 0 0 100 7 0 0 7 13 4 8 2 0 0 0 558 0 0 0 100 March 4, 2026 at 01:43:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2013 0 222 2641 109 1049 26 176 85 69 4480 3 4 0 92 1 34539 0 22 825 106 1155 45 175 90 81 5364 12 8 0 80 2 2365 0 211 484 4 861 29 139 84 59 4848 6 3 0 91 3 1773 0 52 768 127 970 26 167 129 60 3328 6 2 0 92 4 6698 0 25 527 22 861 24 171 103 51 3829 4 4 0 92 5 8668 0 144 468 10 715 13 119 120 54 3123 5 4 0 92 6 3123 0 24 521 4 785 19 147 97 66 4510 5 2 0 93 7 4252 0 120 440 5 756 22 122 116 66 3309 3 2 0 94 March 4, 2026 at 01:43:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 70 2119 105 116 0 4 6 0 20 0 2 0 98 1 2 0 9 238 103 49 2 6 8 0 1359 0 1 0 99 2 13 0 14 34 4 29 0 4 0 0 583 0 0 0 100 3 0 0 19 299 139 90 0 2 1 0 25 0 0 0 100 4 17 0 0 44 12 30 0 2 0 0 16 0 0 0 100 5 0 0 0 33 4 17 0 5 3 0 23 0 0 0 100 6 24 0 0 26 1 8 0 3 0 0 310 0 0 0 100 7 0 0 7 34 3 18 0 2 0 0 315 0 0 0 100 March 4, 2026 at 01:43:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2186 107 106 0 3 1 0 9 0 1 0 99 1 0 0 471 242 103 56 1 2 1 0 1346 0 1 0 99 2 0 0 14 82 2 6 1 0 0 0 560 0 0 0 100 3 0 0 5 381 150 110 0 1 0 0 0 0 0 0 100 4 0 0 0 82 3 4 0 0 0 0 0 0 0 0 100 5 0 0 0 78 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 85 2 8 1 0 0 0 301 0 0 0 100 7 0 0 0 93 3 16 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 107 195 0 9 66 0 9 0 1 0 99 1 0 0 9 257 103 122 2 14 77 0 1345 0 1 0 99 2 0 0 14 54 3 94 0 10 58 0 561 0 0 0 100 3 0 0 5 406 210 310 0 15 67 0 0 0 0 0 100 4 0 0 1 62 3 109 0 25 95 0 0 0 0 0 100 5 0 0 0 55 1 103 0 14 73 0 2 0 0 0 100 6 0 0 0 50 1 87 0 18 73 0 300 0 0 0 100 7 0 0 0 52 4 74 1 13 50 0 300 0 0 0 100 March 4, 2026 at 01:43:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1843 0 30 2754 108 1215 50 222 67 66 4244 5 3 0 91 1 2661 0 205 837 104 1204 45 239 95 50 5283 6 4 0 90 2 1867 0 144 562 3 1029 38 185 76 73 5596 5 3 0 92 3 3304 0 94 849 134 1019 37 186 191 49 3743 6 3 0 91 4 5567 0 137 569 4 897 28 164 119 43 3487 5 4 0 91 5 3501 0 7 517 1 920 23 146 110 60 2856 3 3 0 94 6 8492 0 192 518 11 985 37 190 160 52 4248 4 4 0 92 7 36342 0 25 490 5 873 28 144 257 69 6677 13 9 0 78 March 4, 2026 at 01:43:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2110 101 120 0 2 3 0 9 0 2 0 98 1 39 0 16 234 106 45 1 2 1 0 1370 0 0 0 99 2 6 0 14 34 4 24 0 2 4 0 599 0 0 0 100 3 5 0 19 228 102 14 1 2 1 0 48 2 0 0 98 4 71 0 0 40 3 34 0 4 0 0 40 0 0 0 100 5 46 0 0 36 10 16 0 2 1 0 15 0 0 0 100 6 1 0 0 123 51 106 0 0 0 0 301 0 0 0 100 7 0 0 0 26 2 10 0 0 0 0 309 0 0 0 100 March 4, 2026 at 01:43:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 116 0 0 4 0 0 0 1 0 99 1 0 0 10 221 103 36 1 1 0 0 1349 0 0 0 100 2 0 0 28 14 2 14 0 1 5 0 559 0 0 0 99 3 0 0 4 210 101 0 0 0 0 0 0 0 0 0 100 4 0 0 0 14 3 4 0 0 0 0 0 0 0 0 100 5 0 0 0 24 7 16 0 0 0 0 9 0 0 0 100 6 0 0 0 77 33 68 0 0 0 0 301 0 0 0 100 7 0 0 0 52 21 44 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:43:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2168 101 108 0 2 3 0 0 0 1 0 99 1 0 0 10 289 103 40 1 2 1 0 1345 0 1 0 99 2 0 0 462 20 4 12 0 0 3 0 562 0 1 0 99 3 0 0 4 274 101 0 0 0 1 0 0 0 0 0 100 4 0 0 0 84 4 8 0 1 1 0 0 0 0 0 100 5 0 0 0 97 9 30 0 1 1 0 11 0 0 0 100 6 0 0 0 79 2 4 0 0 1 0 300 0 0 0 100 7 0 0 0 177 52 105 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:43:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 101 210 0 11 74 0 0 0 1 0 99 1 0 0 10 271 103 152 1 17 85 0 1347 0 1 0 99 2 0 0 14 38 2 67 0 14 48 0 559 0 0 0 100 3 0 0 3 291 156 161 0 16 69 0 0 0 0 0 100 4 0 0 0 51 3 90 0 13 71 0 0 0 0 0 100 5 0 0 0 52 7 77 0 9 61 0 6 0 0 0 100 6 0 0 0 66 2 111 1 12 98 0 300 0 0 0 100 7 0 0 0 140 52 166 1 14 61 0 300 0 0 0 100 March 4, 2026 at 01:43:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6888 0 195 2681 103 1108 31 206 155 61 4996 6 5 0 89 1 6182 0 152 935 133 1224 39 196 131 60 6577 6 4 0 90 2 1234 0 30 557 12 918 24 178 71 62 3761 3 2 0 95 3 1197 0 88 746 102 988 28 176 67 61 5056 4 3 0 93 4 1108 0 13 525 4 894 22 168 93 45 3116 3 2 0 95 5 35712 0 15 452 4 747 28 125 108 50 3104 11 8 0 81 6 9451 0 326 547 5 904 27 151 134 61 4056 7 5 0 88 7 1652 0 24 475 11 806 17 128 142 74 3136 5 2 0 93 March 4, 2026 at 01:43:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 101 126 0 2 4 0 0 0 1 0 99 1 0 0 9 324 153 137 1 1 0 0 1348 0 0 0 99 2 1 0 14 30 5 20 0 1 0 0 576 0 0 0 100 3 44 0 12 237 108 20 0 1 0 0 15 0 0 0 100 4 0 0 0 22 2 8 0 0 0 0 5 0 0 0 100 5 0 0 0 31 8 6 0 0 0 0 21 0 0 0 100 6 0 0 0 25 2 10 0 1 0 0 300 0 0 0 100 7 0 0 70 17 2 10 0 1 3 0 300 0 1 0 99 March 4, 2026 at 01:43:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 462 2110 100 114 0 0 2 0 0 0 1 0 99 1 1 0 10 390 153 144 2 1 3 0 1347 0 1 0 99 2 0 0 14 88 6 12 1 0 0 0 564 0 0 0 100 3 0 0 4 292 107 14 0 1 0 0 9 0 0 0 100 4 0 0 0 81 2 4 0 1 0 0 0 0 0 0 100 5 0 0 0 82 2 6 0 0 0 0 2 0 0 0 100 6 0 0 0 83 2 6 0 0 0 0 300 0 0 0 100 7 0 0 42 79 2 10 0 0 1 0 300 0 0 0 99 March 4, 2026 at 01:43:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 116 0 0 0 0 0 0 1 0 99 1 0 0 10 312 153 136 0 0 0 0 1346 0 0 0 100 2 1 0 14 8 2 4 1 0 0 0 629 0 0 0 99 3 0 0 4 219 107 12 0 0 0 0 9 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 8 1 0 0 0 301 0 0 0 100 7 0 0 0 11 2 6 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5589 0 210 2714 102 1176 30 178 188 64 4258 7 5 0 88 1 1541 0 145 1011 129 1486 36 224 169 57 5225 4 4 0 92 2 7359 0 319 598 5 1081 18 171 228 70 4929 6 4 0 90 3 7670 0 107 1019 171 1283 37 196 249 56 4873 6 4 0 89 4 3456 0 17 605 4 1089 18 195 203 84 3326 3 3 0 94 5 34154 0 19 511 15 858 32 154 163 66 5182 10 8 0 82 6 2742 0 24 566 3 986 17 165 200 71 3868 5 3 0 92 7 1101 0 7 485 4 842 17 147 155 41 3251 5 2 0 93 March 4, 2026 at 01:43:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 101 112 0 4 0 0 10 0 1 0 99 1 0 0 73 221 103 43 1 2 4 0 1095 0 2 0 98 2 32 0 14 36 4 20 0 0 5 0 578 0 1 0 99 3 46 0 17 234 105 25 0 3 1 0 24 0 0 0 100 4 3 0 0 28 3 12 0 3 0 0 14 0 0 0 100 5 0 0 7 25 1 10 0 2 0 0 4 0 0 0 100 6 0 0 7 27 3 10 0 1 0 0 570 0 0 0 100 7 21 0 0 124 52 107 0 1 0 0 309 0 0 0 100 March 4, 2026 at 01:43:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 100 118 2 1 0 0 8 0 1 0 99 1 0 0 38 317 128 91 1 3 3 0 1087 0 1 0 99 2 0 0 364 25 4 16 1 0 3 0 567 0 0 0 99 3 0 0 4 277 107 18 1 1 0 0 18 0 0 0 100 4 0 0 0 65 2 6 0 0 0 0 3 0 0 0 100 5 0 0 0 72 7 8 0 1 0 0 2 0 0 0 100 6 0 0 7 68 3 10 1 1 0 0 562 0 0 0 100 7 0 0 0 115 26 56 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:43:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 100 110 0 0 0 0 0 0 1 0 99 1 0 0 115 314 152 137 2 0 0 0 1087 0 0 0 99 2 0 0 14 24 2 4 0 0 0 0 560 0 0 0 100 3 0 0 4 236 107 14 0 0 0 0 10 0 0 0 100 4 0 0 0 29 2 12 0 1 0 0 0 0 0 0 100 5 0 0 0 24 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 30 4 10 0 0 0 0 561 0 0 0 100 7 0 0 0 27 2 6 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 450 0 24 2386 100 527 9 104 55 35 1822 1 2 0 97 1 368 0 43 525 147 486 5 90 54 36 2469 1 2 0 97 2 260 0 27 238 3 321 4 68 42 41 2801 1 2 0 97 3 4147 0 72 544 108 438 7 90 83 34 1816 2 2 0 95 4 3958 0 198 261 3 446 6 89 62 56 1836 2 2 0 96 5 6346 0 231 236 4 459 11 81 95 71 3567 2 3 0 95 6 6016 0 31 327 8 581 7 107 43 81 2497 2 2 0 97 7 1018 0 15 256 3 441 3 74 50 50 2326 2 1 0 96 March 4, 2026 at 01:43:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3267 0 82 2540 100 768 24 114 149 16 2215 4 3 0 92 1 305 0 3 712 114 947 31 139 86 14 3121 2 2 0 96 2 751 0 16 342 7 568 12 76 96 15 1685 2 2 0 97 3 760 0 32 663 156 823 24 105 90 9 2228 3 2 0 96 4 993 0 0 296 5 486 7 85 133 5 1757 3 1 0 95 5 3638 0 201 280 1 501 11 54 107 19 1457 4 2 0 94 6 30932 0 16 354 6 609 18 72 174 18 3934 12 8 0 81 7 294 0 7 297 23 491 6 61 88 17 1442 1 1 0 98 March 4, 2026 at 01:43:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2172 100 112 0 1 2 0 0 0 2 0 98 1 0 0 3 288 103 36 1 1 1 0 1088 0 1 0 99 2 2 0 476 112 51 105 0 1 2 0 266 0 1 0 99 3 0 0 4 278 101 0 0 0 0 0 0 0 0 0 100 4 0 0 0 84 4 6 0 0 0 0 295 0 0 0 100 5 0 0 0 81 1 4 0 0 1 0 2 0 0 0 100 6 44 0 7 99 8 30 1 1 0 0 271 0 0 0 99 7 0 0 0 89 4 10 1 0 0 0 600 0 0 0 100 March 4, 2026 at 01:43:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 126 1 0 0 0 17 0 1 0 99 1 0 0 3 218 104 38 1 1 0 0 1109 0 0 0 99 2 0 0 14 111 52 110 0 2 0 0 272 0 0 0 100 3 0 0 4 210 102 6 0 0 0 0 8 0 0 0 100 4 0 0 0 13 3 8 0 0 0 0 294 0 0 0 100 5 0 0 0 13 6 0 0 0 0 0 0 0 0 0 100 6 0 0 7 25 8 22 0 0 0 0 268 0 0 0 100 7 0 0 0 22 4 20 0 1 0 0 600 0 0 0 100 March 4, 2026 at 01:43:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 1 0 99 1 0 0 2 215 103 36 0 0 1 0 1087 0 0 0 100 2 0 0 14 25 11 20 0 0 0 0 267 0 0 0 100 3 0 0 5 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 0 55 25 48 0 1 0 0 294 0 0 0 100 5 0 0 0 46 20 42 0 1 0 0 2 0 0 0 100 6 0 0 7 23 8 20 0 0 0 0 268 0 0 0 100 7 0 0 0 14 4 10 1 1 0 0 599 0 0 0 100 March 4, 2026 at 01:43:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1774 0 131 2702 101 1255 45 244 110 87 3957 4 3 0 93 1 34217 0 19 893 107 1262 45 229 100 64 5364 13 9 0 78 2 767 0 22 563 9 904 32 161 62 39 5123 4 2 0 94 3 1028 0 85 755 101 1030 42 204 96 40 3438 4 3 0 94 4 2980 0 18 543 8 933 39 181 140 55 3734 7 3 0 90 5 12921 0 504 523 18 984 33 154 224 81 5025 6 6 0 87 6 8038 0 35 614 26 938 30 167 115 90 5177 6 3 0 91 7 1925 0 14 565 5 958 25 146 107 65 3787 3 3 0 94 March 4, 2026 at 01:43:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 40 0 0 2163 103 190 0 8 62 0 14 0 1 0 99 1 1 0 9 331 103 246 1 18 70 0 1095 0 1 0 99 2 3 0 14 61 2 80 0 14 77 0 289 0 1 0 99 3 0 0 19 332 161 108 1 19 74 0 14 0 0 0 100 4 44 0 0 87 7 121 0 16 76 0 316 0 0 0 100 5 12 0 70 48 1 76 0 17 67 0 31 0 1 0 99 6 0 0 7 177 53 215 1 24 67 0 269 0 1 0 99 7 0 0 0 66 5 87 0 8 50 0 623 0 0 0 100 March 4, 2026 at 01:43:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 101 104 0 2 0 0 1 0 1 0 99 1 0 0 2 290 103 38 1 0 1 0 1087 0 0 0 99 2 0 0 476 14 1 6 0 1 2 0 266 0 1 0 99 3 0 0 5 278 101 0 0 0 0 0 0 0 0 0 100 4 0 0 0 94 9 16 0 0 0 0 303 0 0 0 100 5 0 0 42 73 0 2 0 0 2 0 0 0 1 0 99 6 0 0 7 183 52 109 0 1 0 0 258 0 0 0 100 7 0 0 0 95 4 16 1 2 0 0 600 0 0 0 100 March 4, 2026 at 01:43:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 122 1 0 0 0 13 0 1 0 99 1 0 0 3 218 103 38 1 0 0 0 1087 0 0 0 100 2 0 0 14 14 1 14 2 1 1 0 271 0 0 0 100 3 0 0 4 208 101 4 0 0 0 0 7 0 0 0 100 4 0 0 0 23 9 18 0 0 0 0 303 0 0 0 100 5 0 0 0 12 6 2 0 0 0 0 2 0 0 0 100 6 3 0 7 111 52 109 0 1 0 0 261 0 0 0 100 7 0 0 0 18 4 12 1 0 0 0 600 0 0 0 100 March 4, 2026 at 01:43:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3216 0 62 2539 101 660 8 126 78 53 3321 3 3 0 94 1 2035 0 307 561 113 648 8 133 77 52 3011 2 2 0 96 2 896 0 35 358 3 594 8 122 67 73 2336 1 1 0 97 3 1172 0 69 515 101 514 8 110 59 50 2262 2 2 0 96 4 340 0 15 299 11 493 10 118 65 54 2023 1 2 0 97 5 5494 0 189 305 0 484 12 98 121 48 2236 2 3 0 95 6 7725 0 17 413 35 635 10 120 111 68 3373 4 3 0 94 7 38995 0 152 373 11 501 15 84 101 54 4364 12 9 0 80 March 4, 2026 at 01:43:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 137 0 70 2291 102 518 9 64 29 1 1789 2 3 0 95 1 554 0 7 534 118 584 21 70 28 2 2295 2 2 0 96 2 925 0 14 203 7 350 19 41 29 4 1603 3 1 0 96 3 305 0 56 431 102 430 16 50 8 0 1519 2 1 0 97 4 689 0 0 189 4 326 10 49 26 3 1220 2 1 0 98 5 58 0 0 152 3 225 11 30 7 0 781 1 1 0 98 6 639 0 7 150 6 265 10 41 19 0 1225 1 1 0 98 7 440 0 0 132 5 185 3 17 31 2 931 3 0 0 97 March 4, 2026 at 01:43:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2229 108 188 0 17 67 0 301 0 2 0 98 1 0 0 465 448 153 363 1 28 64 0 1089 0 1 0 99 2 0 0 14 137 7 111 0 25 71 0 275 0 1 0 99 3 0 0 5 385 154 109 0 27 101 0 0 0 1 0 99 4 0 0 0 132 4 105 0 18 71 0 294 0 0 0 100 5 0 0 7 112 1 70 0 16 53 0 0 0 0 0 100 6 0 0 7 129 3 100 0 16 94 0 262 0 0 0 100 7 0 0 0 129 4 90 0 9 69 0 300 0 0 0 100 March 4, 2026 at 01:43:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 300 0 1 0 99 1 0 0 2 321 152 142 1 0 0 0 1086 0 0 0 100 2 0 0 14 18 7 14 0 0 0 0 276 0 0 0 100 3 0 0 5 207 101 0 0 0 0 0 0 0 0 0 100 4 0 0 0 15 4 8 0 0 0 0 295 0 0 0 100 5 0 0 0 14 1 14 0 1 0 0 2 0 0 0 100 6 0 0 14 15 3 14 0 1 0 0 260 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 118 3 0 0 0 308 0 1 0 99 1 0 0 2 315 148 138 1 1 1 0 1094 0 0 0 100 2 0 0 14 32 12 30 0 1 0 0 281 0 0 0 100 3 0 0 5 210 102 6 0 0 0 0 8 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 5 0 0 0 15 7 2 0 0 0 0 21 0 0 0 100 6 0 0 7 14 2 12 0 0 0 0 259 0 0 0 100 7 0 0 0 13 2 10 0 2 0 0 300 0 0 0 100 March 4, 2026 at 01:43:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10469 0 44 2885 105 1244 53 216 157 81 5333 8 5 0 86 1 3516 0 42 934 131 1307 50 229 129 57 5848 5 4 0 91 2 2280 0 204 607 10 1100 36 200 71 82 4258 5 3 0 92 3 3107 0 394 880 109 1313 33 210 98 83 4491 6 4 0 90 4 901 0 14 572 15 927 36 191 81 40 3213 5 2 0 93 5 1366 0 8 463 3 696 19 130 63 50 3730 4 2 0 94 6 35693 0 23 569 5 1019 39 197 96 43 4463 12 8 0 80 7 6209 0 127 501 4 877 27 134 141 53 5381 5 4 0 92 March 4, 2026 at 01:43:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 102 110 0 1 0 0 300 0 1 0 99 1 0 0 79 238 110 56 0 1 6 0 1079 0 1 0 98 2 2 0 14 19 2 6 0 0 6 0 268 0 0 0 100 3 44 0 5 316 149 100 0 1 0 0 8 0 0 0 100 4 0 0 0 21 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 18 0 2 0 0 0 0 0 0 0 0 100 6 0 0 7 27 4 14 0 0 0 0 558 0 0 0 100 7 0 0 0 26 1 14 0 2 0 0 300 0 0 0 100 March 4, 2026 at 01:43:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2225 102 197 0 17 96 0 300 0 1 0 99 1 0 0 44 329 103 121 2 15 76 0 1079 0 1 0 99 2 0 0 476 120 3 214 1 18 52 0 266 0 1 0 99 3 0 0 5 527 230 246 0 25 105 0 9 0 1 0 99 4 0 0 0 142 2 132 0 24 86 0 0 0 0 0 100 5 0 0 0 127 1 96 0 13 84 0 2 0 0 0 100 6 0 0 7 133 3 111 0 22 83 0 552 0 0 0 100 7 0 0 0 120 2 81 0 16 35 0 301 0 0 0 100 March 4, 2026 at 01:43:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 122 1 1 0 0 300 0 1 0 99 1 0 0 2 214 103 34 1 0 0 0 1078 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 5 317 156 112 1 0 0 0 9 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 10 0 0 0 0 552 0 0 0 100 7 0 0 0 11 1 6 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:43:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9855 0 119 2573 103 920 23 156 140 66 4571 7 5 0 88 1 5287 0 36 795 106 962 23 174 151 59 6257 5 4 0 91 2 3172 0 38 520 2 900 17 144 124 59 3579 3 3 0 93 3 40530 0 287 845 128 1080 27 157 142 78 5357 14 10 0 76 4 1451 0 125 478 9 902 10 168 108 77 3177 3 2 0 95 5 907 0 14 417 23 665 9 112 65 52 2298 2 1 0 96 6 875 0 27 378 4 689 12 119 72 60 3057 3 2 0 94 7 1639 0 180 320 7 581 17 106 83 49 2275 4 2 0 95 March 4, 2026 at 01:44:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2126 102 120 0 4 0 0 314 0 1 0 99 1 0 0 3 231 104 38 0 1 0 0 1088 0 0 0 100 2 4 0 14 25 2 6 0 1 1 0 277 0 0 0 100 3 24 0 101 214 102 7 0 3 5 0 10 0 1 0 99 4 0 0 7 32 3 14 0 3 5 0 18 0 0 0 99 5 53 0 0 39 6 22 0 0 0 0 19 0 0 0 100 6 1 0 7 36 4 20 0 2 0 0 566 0 0 0 100 7 18 0 0 130 53 113 0 2 0 0 317 0 0 0 100 March 4, 2026 at 01:44:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2158 102 113 0 4 4 0 300 0 1 0 99 1 0 0 7 269 103 36 1 1 1 0 1078 0 0 0 99 2 0 0 14 64 3 6 0 0 1 0 266 0 0 0 100 3 0 0 350 219 101 16 0 2 4 0 0 0 1 0 99 4 0 0 0 66 3 6 0 1 1 0 0 0 0 0 100 5 0 0 0 76 8 18 0 1 1 0 11 0 0 0 100 6 0 0 7 66 4 8 0 0 1 0 556 0 0 0 100 7 0 0 0 161 51 104 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:44:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2176 102 223 1 12 72 0 300 0 1 0 99 1 0 0 122 261 103 129 1 20 78 0 1078 0 1 0 99 2 0 0 14 120 2 194 0 16 73 0 266 0 0 0 100 3 0 0 3 330 161 88 0 18 82 0 0 0 0 0 100 4 0 0 0 73 2 94 0 15 64 0 0 0 0 0 100 5 0 0 0 80 6 98 0 10 64 0 9 0 0 0 100 6 1 0 7 61 4 67 0 15 50 0 552 0 0 0 100 7 0 0 0 166 51 186 0 17 57 0 300 0 0 0 100 March 4, 2026 at 01:44:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 671 0 22 2225 104 274 5 34 22 18 1918 2 2 0 97 1 144 0 5 355 105 188 1 42 30 25 869 0 1 0 99 2 3380 0 198 121 2 201 7 31 61 21 2103 1 2 0 98 3 6056 0 130 334 102 238 4 44 58 36 1253 2 2 0 96 4 1727 0 47 192 5 214 3 42 42 26 600 1 2 0 98 5 393 0 10 179 7 264 1 46 28 37 1157 0 1 0 99 6 173 0 16 147 4 247 3 52 27 31 1191 0 1 0 98 7 318 0 24 198 34 258 4 45 26 28 824 0 1 0 99 March 4, 2026 at 01:44:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1042 0 10 2566 102 944 27 139 55 34 2402 3 2 0 94 1 33497 0 14 693 110 807 39 128 61 33 5356 13 8 0 79 2 1486 0 198 400 8 710 16 111 48 34 3490 2 2 0 96 3 1047 0 65 647 111 792 22 137 75 28 3273 4 2 0 94 4 874 0 7 339 6 577 14 110 57 21 2349 2 2 0 96 5 5813 0 125 406 37 670 11 83 70 32 2974 3 3 0 94 6 5838 0 29 484 4 830 29 116 90 35 3699 5 3 0 92 7 1384 0 81 357 3 637 19 90 85 44 3122 4 3 0 93 March 4, 2026 at 01:44:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2192 108 128 0 1 0 0 9 0 1 0 99 1 0 0 476 221 102 6 0 1 2 0 300 0 1 0 99 2 2 0 14 90 5 40 3 0 1 0 1345 0 1 0 99 3 0 0 7 282 102 0 0 0 0 0 0 0 0 0 100 4 0 0 0 82 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 183 51 104 0 0 0 0 2 0 0 0 100 6 0 0 7 89 3 10 0 0 0 0 555 0 0 0 100 7 0 0 42 85 1 18 0 1 1 0 300 0 1 0 99 March 4, 2026 at 01:44:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 107 128 0 1 0 0 9 0 1 0 99 1 0 0 7 213 102 4 0 0 0 0 300 0 0 0 100 2 0 0 14 13 4 40 0 1 0 0 1344 0 0 0 100 3 0 0 7 207 101 0 0 0 0 0 0 0 0 0 100 4 0 0 0 13 3 6 0 0 0 0 2 0 0 0 100 5 0 0 0 111 52 104 0 0 0 0 1 0 0 0 100 6 0 0 7 14 4 10 0 0 0 0 554 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 107 219 0 15 63 0 9 0 1 0 99 1 0 0 7 284 102 146 1 20 89 0 300 0 0 0 100 2 0 0 14 74 4 160 0 12 56 0 1344 0 1 0 99 3 0 0 7 321 160 117 0 18 71 0 0 0 0 0 100 4 0 0 0 49 2 91 0 16 71 0 0 0 0 0 100 5 0 0 0 148 52 180 0 12 73 0 2 0 0 0 100 6 0 0 7 50 3 87 1 16 76 0 554 0 1 0 99 7 0 0 0 47 1 75 0 14 68 0 300 0 0 0 100 March 4, 2026 at 01:44:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6870 0 40 2765 107 1113 25 182 143 56 5054 6 5 0 89 1 34727 0 144 876 109 1227 37 234 80 67 4839 14 8 0 78 2 2612 0 56 646 25 1064 35 184 91 67 4926 4 3 0 94 3 2801 0 269 769 103 1076 28 196 77 71 3704 5 4 0 92 4 3385 0 198 540 6 975 28 155 123 68 5280 5 3 0 92 5 5813 0 8 509 18 852 16 138 102 59 3837 4 3 0 93 6 2429 0 124 497 5 915 14 177 91 62 4727 4 3 0 93 7 4876 0 9 481 4 784 18 135 111 52 3465 5 2 0 92 March 4, 2026 at 01:44:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 102 119 0 2 0 0 25 0 1 0 99 1 60 0 2 242 107 26 0 1 5 0 337 0 1 0 99 2 13 0 14 49 11 62 1 2 2 0 1356 0 0 0 99 3 20 0 26 241 111 24 0 2 0 0 8 0 0 0 100 4 1 0 70 84 35 80 0 3 5 0 5 0 1 0 99 5 0 0 0 30 7 6 0 1 0 0 11 0 0 0 100 6 0 0 7 27 3 10 0 1 0 0 561 0 0 0 100 7 2 0 0 31 3 18 0 2 0 0 310 0 0 0 100 March 4, 2026 at 01:44:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 101 112 0 0 0 0 0 0 1 0 99 1 0 0 464 230 108 16 0 0 1 0 309 0 1 0 99 2 0 0 14 84 4 38 1 0 1 0 1344 0 0 0 99 3 0 0 5 282 101 4 0 2 0 0 0 0 0 0 100 4 0 0 42 182 52 115 0 2 1 0 0 0 1 0 99 5 0 0 0 81 1 4 0 1 0 0 0 0 0 0 100 6 0 0 7 85 4 10 0 0 0 0 557 0 0 0 100 7 0 0 0 81 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 110 0 0 1 0 0 0 1 0 99 1 0 0 2 224 108 14 1 0 1 0 309 0 0 0 100 2 0 0 14 15 5 38 2 0 1 0 1344 0 0 0 100 3 0 0 5 206 101 0 0 0 1 0 0 0 0 0 100 4 0 0 0 73 33 66 0 0 2 0 0 0 0 0 100 5 0 0 0 53 21 50 0 2 3 0 2 0 0 0 100 6 0 0 7 13 4 8 1 0 1 0 553 0 0 0 100 7 0 0 0 11 2 4 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:44:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8836 0 325 2398 102 626 14 103 220 51 4496 4 6 0 91 1 21397 0 140 529 112 574 16 126 130 55 2289 6 5 0 89 2 414 0 41 380 4 701 9 120 142 64 2810 1 1 0 97 3 1153 0 54 652 163 585 9 135 139 50 1923 1 1 0 97 4 340 0 9 303 7 499 10 112 128 42 1455 1 1 0 98 5 13881 0 17 330 42 483 8 93 86 48 2400 4 3 0 93 6 1486 0 17 281 3 460 6 99 110 30 2484 3 2 0 96 7 301 0 7 282 1 489 11 76 133 46 1382 1 1 0 98 March 4, 2026 at 01:44:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3592 0 178 2361 102 573 16 80 65 20 2102 3 3 0 94 1 2925 0 75 592 144 618 24 87 66 22 2040 2 3 0 95 2 464 0 16 276 5 508 11 65 20 20 2824 2 1 0 96 3 288 0 33 455 103 472 21 76 26 16 1905 2 1 0 97 4 1022 0 0 275 6 502 13 84 53 8 1627 2 1 0 97 5 3704 0 7 214 1 344 21 67 65 7 1704 5 4 0 92 6 643 0 7 281 9 491 15 79 31 11 1898 4 1 0 95 7 2993 0 19 230 2 244 12 40 46 7 1323 3 1 0 96 March 4, 2026 at 01:44:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 462 2126 102 132 0 2 1 0 8 0 1 0 99 1 44 0 44 356 138 86 0 0 1 0 21 0 1 0 99 2 0 0 14 124 22 80 1 1 0 0 1349 0 1 0 99 3 0 0 5 284 104 6 0 0 0 0 301 0 0 0 100 4 0 0 0 82 2 6 0 0 0 0 0 0 0 0 100 5 0 0 0 87 7 4 0 0 1 0 21 0 0 0 100 6 0 0 7 82 3 6 0 0 0 0 555 0 0 0 100 7 0 0 0 90 1 14 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 150 0 1 0 0 0 0 1 0 99 1 0 0 2 221 107 12 0 0 0 0 9 0 0 0 100 2 0 0 14 74 35 100 1 1 0 0 1345 0 0 0 100 3 0 0 5 211 103 4 1 0 0 0 300 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 2 0 0 0 100 6 0 0 7 10 3 6 1 0 0 0 552 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 216 0 0 0 0 0 0 1 0 99 1 0 0 2 227 108 22 0 1 0 0 10 0 0 0 100 2 0 0 14 11 3 36 2 0 0 0 1344 0 0 0 100 3 0 0 5 210 103 4 0 0 0 0 300 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 7 13 4 10 0 0 0 0 555 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8884 0 33 2760 102 1271 56 244 251 62 4464 6 6 0 89 1 5646 0 327 901 109 1177 44 239 244 63 3964 7 4 0 89 2 3913 0 43 629 5 1063 32 185 213 70 5271 5 4 0 91 3 38888 0 102 938 162 1189 55 193 202 61 4957 13 9 0 77 4 2427 0 197 616 5 1086 28 187 156 66 3744 5 3 0 92 5 1487 0 133 520 23 862 22 144 154 68 5606 4 2 0 93 6 1574 0 22 576 15 1008 25 199 161 60 4178 4 3 0 93 7 614 0 10 493 3 959 29 158 186 38 3344 3 2 0 95 March 4, 2026 at 01:44:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 70 2114 104 112 1 0 6 0 26 0 2 0 98 1 5 0 9 232 101 20 0 4 6 0 10 0 1 0 99 2 58 0 14 43 8 61 0 4 1 0 1366 0 0 0 99 3 0 0 19 306 143 90 1 1 0 0 315 0 0 0 100 4 1 0 0 24 1 6 0 1 0 0 17 0 0 0 100 5 0 0 0 42 9 27 1 2 0 0 8 0 0 0 100 6 0 0 7 30 4 12 1 1 0 0 571 0 0 0 100 7 23 0 0 28 2 14 0 1 1 0 321 0 0 0 100 March 4, 2026 at 01:44:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2181 101 123 0 1 2 0 7 0 2 0 98 1 0 0 464 226 103 18 1 0 2 0 15 0 1 0 99 2 0 0 14 107 9 62 1 1 0 0 1359 0 1 0 99 3 0 0 3 297 110 18 1 0 0 0 300 0 0 0 100 4 0 0 0 111 17 34 0 1 0 0 0 0 0 0 100 5 0 0 0 87 7 4 0 0 1 0 2 0 0 0 100 6 0 0 7 84 4 8 1 0 0 0 554 0 0 0 100 7 0 0 0 140 27 68 0 2 0 0 300 0 0 0 100 March 4, 2026 at 01:44:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 1 0 0 0 0 1 0 99 1 0 0 3 215 102 12 0 1 0 0 1 0 0 0 100 2 0 0 14 28 8 54 1 0 0 0 1351 0 0 0 99 3 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 1 0 7 15 5 10 0 0 0 0 553 0 0 0 100 7 0 0 0 111 51 106 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25779 0 321 2694 102 1181 55 222 119 69 5148 10 9 0 81 1 3103 0 140 791 103 1086 35 202 95 72 6667 5 4 0 91 2 3079 0 41 629 14 1085 41 196 238 57 4552 4 4 0 93 3 6810 0 76 771 113 1017 36 214 153 52 4754 5 4 0 92 4 8966 0 71 636 3 869 33 169 185 49 4529 9 4 0 87 5 10919 0 18 501 4 831 25 154 94 80 2352 7 3 0 89 6 2075 0 12 530 7 968 30 187 119 66 3583 3 2 0 95 7 2999 0 209 535 34 866 15 136 93 51 3006 4 3 0 93 March 4, 2026 at 01:44:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 70 2167 104 163 0 17 86 0 17 0 2 0 98 1 24 0 2 284 103 121 0 20 98 0 10 0 1 0 99 2 9 0 14 116 2 163 1 15 42 0 1085 0 0 0 99 3 0 0 26 337 168 225 0 17 87 0 594 0 0 0 99 4 0 0 0 119 24 144 0 23 80 0 46 0 0 0 100 5 2 0 7 60 1 77 0 13 74 0 267 0 0 0 100 6 55 0 0 120 23 157 0 17 77 0 18 0 0 0 99 7 0 0 0 65 5 88 0 17 61 0 311 0 0 0 100 March 4, 2026 at 01:44:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2142 100 105 0 3 2 0 0 0 1 0 99 1 0 0 241 256 122 50 0 1 3 0 0 0 0 0 100 2 0 0 14 59 3 46 2 1 0 0 1344 0 0 0 100 3 0 0 3 253 103 16 0 1 0 0 300 0 0 0 100 4 0 0 0 47 3 6 0 1 0 0 295 0 0 0 100 5 0 0 7 46 2 6 1 1 0 0 264 0 0 0 100 6 0 0 0 55 7 14 0 0 0 0 10 0 0 0 100 7 0 0 0 110 33 68 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:44:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 238 2110 101 113 0 1 0 0 7 0 1 0 99 1 0 0 2 318 135 80 0 1 1 0 14 0 0 0 100 2 0 0 14 55 4 50 0 0 0 0 1350 0 0 0 100 3 0 0 5 247 104 6 1 0 0 0 301 0 0 0 100 4 0 0 0 82 21 44 0 1 0 0 294 0 0 0 100 5 0 0 7 50 7 8 0 1 0 0 259 0 0 0 100 6 0 0 0 51 6 12 0 0 0 0 9 0 0 0 100 7 0 0 0 50 2 14 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 28 2121 100 128 1 7 3 2 319 0 1 0 99 1 4 0 5 231 103 26 1 8 3 4 32 0 0 0 100 2 1 0 14 34 5 62 1 4 0 1 1374 0 0 0 99 3 7 0 6 227 103 30 0 7 5 4 53 0 0 0 100 4 17 0 11 123 52 127 0 6 4 2 320 0 0 0 100 5 25 0 7 33 2 47 1 6 1 11 300 0 0 0 100 6 19 0 0 38 7 38 1 3 2 3 51 0 0 0 100 7 24 0 7 36 2 43 0 6 1 8 357 0 1 0 99 March 4, 2026 at 01:44:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17778 0 51 2699 103 986 46 188 101 71 4835 9 6 0 85 1 3050 0 26 953 134 1116 43 231 102 51 4008 5 3 0 92 2 1860 0 40 577 14 962 57 196 115 41 3954 5 3 0 92 3 20417 0 91 789 103 1008 42 200 121 47 4970 9 7 0 84 4 7010 0 298 535 7 966 49 195 116 46 3870 6 4 0 90 5 5813 0 194 537 2 950 28 166 135 67 3501 3 3 0 93 6 5160 0 34 600 2 990 29 183 141 69 4887 7 4 0 89 7 2198 0 117 518 9 905 26 149 92 71 4694 3 3 0 94 March 4, 2026 at 01:44:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2151 101 96 0 15 77 0 0 0 1 0 99 1 0 0 2 356 151 194 1 13 80 0 296 0 0 0 99 2 2 0 14 153 2 178 0 10 61 0 268 0 0 0 100 3 0 0 5 302 157 185 0 18 77 0 281 0 1 0 99 4 0 0 0 46 1 75 0 13 68 0 0 0 0 0 100 5 0 0 7 61 3 95 2 11 82 0 266 0 0 0 100 6 0 0 0 60 1 109 0 21 97 0 9 0 0 0 100 7 44 0 0 59 8 115 1 11 61 0 1689 0 1 0 99 March 4, 2026 at 01:44:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 101 4 0 0 2 0 0 0 2 0 98 1 0 0 2 383 152 104 0 0 0 0 294 0 0 0 100 2 0 0 14 188 2 112 0 0 0 0 266 0 0 0 100 3 0 0 5 282 103 4 0 0 0 0 0 0 0 0 100 4 0 0 0 78 1 0 0 0 0 0 0 0 0 0 100 5 0 0 7 83 1 8 0 0 0 0 259 0 0 0 100 6 0 0 462 22 1 16 1 1 3 0 300 0 1 0 99 7 0 0 0 101 8 60 0 2 0 0 1392 0 1 0 99 March 4, 2026 at 01:44:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 60 0 2 0 0 7 0 1 0 99 1 0 0 3 274 131 72 0 2 0 0 334 0 0 0 100 2 0 0 14 74 2 69 0 1 0 0 271 0 0 0 100 3 0 0 3 214 103 5 0 1 0 0 0 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 7 17 7 6 0 0 0 0 261 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 7 0 0 0 82 34 109 1 2 1 0 1393 0 0 0 99 March 4, 2026 at 01:44:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 953 0 13 2642 100 1133 21 164 94 80 4585 3 3 0 93 1 1767 0 130 742 105 1005 19 177 97 70 3881 4 3 0 94 2 2442 0 185 448 3 761 21 147 90 66 3935 4 2 0 93 3 2451 0 249 702 116 957 28 158 85 68 2979 4 3 0 93 4 2312 0 24 503 2 795 27 143 114 47 2997 6 2 0 92 5 7141 0 21 423 12 647 12 117 134 60 3447 3 3 0 94 6 41111 0 44 532 3 851 21 140 153 70 4769 14 10 0 77 7 5617 0 161 460 10 733 19 120 117 53 4888 4 4 0 92 March 4, 2026 at 01:44:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 63 2115 101 99 0 6 7 0 1 0 2 0 98 1 73 0 14 265 111 51 0 6 1 0 322 0 0 0 100 2 0 0 0 27 2 6 0 0 1 0 10 0 0 0 100 3 4 0 21 230 103 13 0 5 1 0 12 0 0 0 100 4 0 0 0 28 3 4 0 2 1 0 10 0 0 0 100 5 0 0 7 89 33 68 2 1 1 0 270 0 0 0 100 6 0 0 0 66 21 46 0 1 1 0 314 0 0 0 100 7 7 0 21 36 4 54 2 4 5 0 1673 0 1 0 99 March 4, 2026 at 01:44:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2195 102 187 0 12 75 0 0 0 2 0 98 1 0 0 352 277 110 110 0 16 75 0 303 0 1 0 99 2 0 0 0 108 1 104 0 11 88 0 0 0 0 0 100 3 0 0 5 351 153 182 0 11 54 0 0 0 0 0 100 4 0 0 0 96 1 72 0 14 67 0 0 0 0 0 100 5 0 0 7 140 20 128 0 8 54 0 262 0 0 0 100 6 0 0 0 169 32 156 1 18 65 0 300 0 0 0 100 7 0 0 14 99 3 105 2 11 53 0 1648 0 1 0 99 March 4, 2026 at 01:44:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2104 100 113 0 1 0 0 0 0 1 0 99 1 0 0 7 251 112 22 0 0 0 0 304 0 0 0 100 2 0 0 0 27 1 2 0 0 0 0 0 0 0 0 100 3 0 0 7 228 102 2 0 0 0 0 0 0 0 0 100 4 0 0 0 28 2 2 0 0 0 0 1 0 0 0 100 5 0 0 7 132 52 108 0 0 0 0 261 0 0 0 100 6 0 0 0 29 2 4 0 0 0 0 301 0 0 0 100 7 0 0 14 33 3 40 0 1 0 0 1652 0 0 0 100 March 4, 2026 at 01:44:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6974 0 62 2436 100 536 12 91 76 57 1997 3 3 0 93 1 1630 0 134 518 113 553 3 109 92 61 2719 2 2 0 96 2 701 0 18 311 4 469 10 94 34 69 3673 2 2 0 96 3 318 0 80 477 104 476 11 105 42 35 2039 1 1 0 97 4 479 0 7 251 2 410 8 99 57 41 1352 1 1 0 98 5 2540 0 20 321 49 413 5 72 95 32 1909 1 1 0 97 6 16944 0 122 263 4 468 10 84 73 48 2902 5 4 0 91 7 3020 0 199 207 9 361 5 70 46 41 2962 1 2 0 97 March 4, 2026 at 01:44:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2957 0 72 2358 101 581 23 96 67 16 2292 4 4 0 92 1 4704 0 6 609 106 552 19 70 89 4 2640 6 3 0 92 2 907 0 176 333 45 529 18 65 40 17 1359 2 1 0 97 3 953 0 32 601 104 749 17 72 17 26 2593 3 2 0 95 4 548 0 8 291 2 511 14 74 41 11 1848 2 1 0 97 5 663 0 10 204 2 361 18 64 71 7 1502 2 1 0 98 6 17895 0 7 278 4 484 16 66 44 7 1916 6 5 0 89 7 2440 0 25 183 7 330 13 43 61 8 2615 3 2 0 95 March 4, 2026 at 01:44:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2169 100 118 0 0 1 0 0 0 1 0 99 1 0 0 464 223 104 10 0 0 1 0 294 0 0 0 99 2 0 0 0 180 51 103 0 1 0 0 0 0 0 0 100 3 0 0 5 283 103 4 0 0 0 0 0 0 0 0 100 4 0 0 0 80 1 2 0 0 0 0 0 0 0 0 100 5 44 0 7 91 7 16 0 1 0 0 271 0 0 0 100 6 0 0 0 80 1 2 0 0 0 0 1 0 0 0 100 7 4 0 14 87 4 40 2 0 1 0 2046 1 0 0 99 March 4, 2026 at 01:44:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 100 193 0 14 83 0 0 0 1 0 99 1 0 0 2 266 105 104 0 17 80 0 295 0 0 0 100 2 0 0 0 149 52 183 1 9 79 0 0 0 0 0 100 3 0 0 5 304 157 193 1 18 60 0 0 0 0 0 100 4 0 0 0 55 1 89 1 16 75 0 0 0 0 0 100 5 0 0 7 59 8 92 1 13 57 0 270 0 0 0 100 6 0 0 0 52 0 93 1 18 76 0 0 0 0 0 100 7 0 0 14 47 4 110 1 15 84 0 1950 0 1 0 99 March 4, 2026 at 01:44:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 96 0 2 0 0 0 0 1 0 99 1 0 0 2 233 104 22 0 0 0 0 294 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 5 210 103 4 0 0 0 0 0 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 7 20 7 16 0 0 2 0 268 0 0 0 100 6 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 7 0 0 14 17 4 40 4 0 0 0 1950 0 0 0 100 March 4, 2026 at 01:44:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 40759 0 276 2762 101 1195 49 229 134 59 6270 15 11 0 74 1 5929 0 24 899 106 1179 50 267 190 58 6875 7 4 0 89 2 8628 0 202 670 17 1028 45 200 124 87 4237 8 4 0 88 3 4001 0 77 869 117 1244 67 251 98 70 5160 5 3 0 92 4 825 0 20 571 21 1007 50 214 69 72 3870 5 2 0 93 5 1659 0 213 511 13 884 37 162 99 57 2584 4 2 0 94 6 1218 0 18 573 3 1023 40 204 87 53 3992 3 3 0 94 7 727 0 33 504 5 896 33 160 53 47 4145 3 3 0 94 March 4, 2026 at 01:44:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 2132 103 106 0 4 0 0 27 0 1 0 99 1 5 0 2 230 103 12 0 2 7 0 306 0 1 0 99 2 0 0 0 30 3 13 1 2 0 0 9 0 0 0 100 3 0 0 19 234 104 18 0 3 0 0 15 0 0 0 100 4 2 0 14 121 52 105 0 2 0 0 275 0 0 0 100 5 46 0 0 36 5 16 0 2 0 0 15 0 0 0 100 6 34 0 14 24 2 9 0 4 0 0 275 0 0 0 100 7 0 0 70 36 3 55 2 2 7 0 1722 0 2 0 98 March 4, 2026 at 01:44:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 101 110 0 3 1 0 0 0 1 0 99 1 0 0 469 226 103 18 0 1 3 0 294 0 1 0 99 2 0 0 0 85 3 4 0 0 1 0 1 0 0 0 100 3 0 0 7 291 103 10 0 0 1 0 0 0 0 0 100 4 0 0 14 181 53 105 0 1 0 0 267 0 0 0 100 5 0 0 0 96 9 16 0 0 1 0 11 0 0 0 100 6 0 0 7 83 2 4 0 1 1 0 259 0 0 0 100 7 0 0 42 86 4 38 1 0 4 0 1682 0 1 0 99 March 4, 2026 at 01:44:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 100 212 1 16 104 0 0 0 1 0 99 1 0 0 2 267 103 115 1 20 82 0 294 0 1 0 99 2 0 0 0 51 1 86 1 14 100 0 0 0 0 0 100 3 0 0 5 310 157 201 0 26 72 0 0 0 0 0 100 4 0 0 14 101 34 125 1 17 71 0 266 0 0 0 100 5 0 0 0 50 7 76 0 7 67 0 9 0 0 0 100 6 0 0 7 87 20 120 1 20 62 0 259 0 0 0 100 7 0 0 0 54 3 119 3 15 60 0 1686 0 1 0 99 March 4, 2026 at 01:44:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33397 0 49 2510 100 718 17 136 60 55 2204 9 8 0 82 1 4779 0 48 674 113 615 13 116 108 39 2538 7 3 0 90 2 5727 0 137 356 3 536 17 113 102 51 4089 3 4 0 93 3 8491 0 351 578 104 683 12 119 128 59 4687 3 4 0 93 4 4840 0 30 427 3 655 10 124 126 58 3545 4 2 0 93 5 799 0 10 369 10 617 7 117 76 78 2348 2 1 0 97 6 1246 0 198 399 33 677 6 117 60 59 2787 2 2 0 97 7 707 0 8 309 7 506 2 72 43 54 3032 1 1 0 98 March 4, 2026 at 01:44:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 631 0 70 2303 101 474 16 55 35 0 1445 2 3 0 95 1 442 0 9 425 104 385 18 58 30 1 1519 4 2 0 95 2 540 0 0 292 52 439 14 48 18 2 1461 2 1 0 97 3 642 0 33 403 106 351 9 44 27 4 1110 2 1 0 97 4 867 0 14 191 6 337 16 44 48 4 1628 3 1 0 96 5 539 0 0 177 7 308 9 33 17 2 717 1 1 0 98 6 139 0 7 170 3 290 14 45 7 0 1304 1 1 0 98 7 128 0 0 137 2 271 12 33 7 1 2294 1 1 0 98 March 4, 2026 at 01:44:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2169 100 116 0 0 1 0 0 0 1 0 99 1 0 0 464 223 102 8 0 1 1 0 0 0 1 0 99 2 0 0 0 184 53 109 0 2 0 0 295 0 0 0 100 3 0 0 5 282 103 4 0 0 0 0 0 0 0 0 100 4 0 0 14 97 11 20 0 0 0 0 576 0 0 0 100 5 0 0 0 83 2 4 0 0 0 0 2 0 0 0 100 6 0 0 7 78 1 2 0 0 0 0 262 0 0 0 100 7 0 0 0 83 2 34 2 0 1 0 1374 0 0 0 100 March 4, 2026 at 01:44:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 116 0 0 0 0 0 0 1 0 99 1 0 0 2 212 102 4 0 0 0 0 0 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 294 0 0 0 100 3 0 0 5 212 103 6 0 0 0 0 0 0 0 0 100 4 0 0 14 24 8 26 0 1 0 0 574 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 10 2 34 1 0 0 0 1376 0 0 0 100 March 4, 2026 at 01:44:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 100 194 0 15 67 0 0 0 1 0 99 1 0 0 3 263 104 103 0 16 71 0 0 0 0 0 100 2 0 0 0 145 51 172 0 15 88 0 294 0 0 0 100 3 0 0 4 313 158 214 0 20 77 0 0 0 0 0 100 4 0 0 14 71 9 116 2 22 85 0 575 0 0 0 100 5 0 0 0 46 2 80 0 18 72 0 2 0 0 0 100 6 0 0 7 47 1 78 1 15 62 0 259 0 0 0 100 7 0 0 0 34 2 83 1 8 35 0 1375 0 0 0 100 March 4, 2026 at 01:44:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2451 0 319 2701 102 1185 46 214 90 64 5137 4 4 0 92 1 1374 0 19 859 123 1144 30 212 105 53 4086 4 2 0 94 2 1284 0 20 523 12 843 34 151 83 34 3230 3 3 0 94 3 2046 0 96 797 122 954 37 170 111 34 4661 6 3 0 91 4 11393 0 329 469 9 882 21 170 176 71 5891 7 6 0 88 5 9918 0 32 579 2 790 29 127 136 46 2896 8 3 0 89 6 34601 0 20 588 2 1146 48 211 143 86 4787 12 8 0 80 7 763 0 5 462 5 860 24 144 85 59 4228 3 2 0 95 March 4, 2026 at 01:44:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2109 100 104 0 2 6 0 0 0 2 0 98 1 0 0 3 250 108 28 0 3 6 0 0 0 1 0 99 2 0 0 0 78 27 62 0 1 0 0 299 0 0 0 100 3 0 0 4 263 122 50 0 2 0 0 7 0 0 0 100 4 2 0 21 30 5 20 0 1 3 0 580 0 0 0 100 5 0 0 0 27 7 6 0 0 1 0 2 0 0 0 100 6 44 0 7 33 7 24 0 1 1 0 271 0 0 0 100 7 0 0 0 25 2 40 0 2 0 0 1393 0 0 0 100 March 4, 2026 at 01:44:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 100 114 0 0 1 0 0 0 1 0 99 1 0 0 464 218 102 4 0 0 1 0 0 0 0 0 100 2 0 0 0 84 2 8 0 1 0 0 294 0 0 0 100 3 0 0 5 296 110 18 0 0 0 0 0 0 0 0 100 4 0 0 14 129 26 52 0 1 0 0 566 0 0 0 100 5 0 0 0 119 20 44 0 2 0 0 0 0 0 0 100 6 0 0 7 92 7 16 0 0 0 0 268 0 0 0 100 7 0 0 0 88 2 46 2 2 0 0 1381 0 0 0 100 March 4, 2026 at 01:44:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 110 0 0 1 0 0 0 1 0 99 1 0 0 7 211 102 2 0 0 1 0 0 0 0 0 100 2 0 0 0 16 3 8 0 0 1 0 294 0 0 0 100 3 0 0 7 211 103 6 0 1 0 0 0 0 0 0 100 4 0 0 14 12 4 4 1 0 1 0 566 0 0 0 100 5 0 0 0 110 52 104 0 0 1 0 2 0 0 0 100 6 0 0 7 22 8 14 1 0 1 0 268 0 0 0 100 7 0 0 0 13 3 34 1 0 2 0 1381 0 0 0 100 March 4, 2026 at 01:44:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2697 0 57 2702 104 1123 37 178 187 38 4259 5 4 0 91 1 35507 0 207 763 104 958 36 188 155 56 5026 13 9 0 78 2 4091 0 118 536 6 914 38 169 217 54 4268 4 4 0 92 3 8832 0 387 823 164 1233 32 206 262 80 5098 5 5 0 90 4 5720 0 22 683 3 1065 21 195 181 73 4526 4 3 0 93 5 1980 0 23 667 32 1068 22 176 156 81 3352 6 2 0 92 6 3034 0 22 615 18 1103 19 188 178 56 3024 4 2 0 93 7 1667 0 24 479 8 834 13 137 154 47 3836 5 3 0 92 March 4, 2026 at 01:44:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 77 2112 101 64 0 1 5 0 267 0 2 0 98 1 44 0 3 283 126 74 0 5 6 0 15 0 1 0 99 2 19 0 0 140 5 129 0 4 0 0 305 0 0 0 100 3 0 0 18 226 104 8 0 0 0 0 15 0 0 0 100 4 5 0 14 29 5 12 0 1 0 0 586 0 0 0 100 5 9 0 0 25 2 10 0 2 0 0 14 0 0 0 100 6 0 0 7 24 1 8 0 3 0 0 11 0 0 0 100 7 0 0 0 29 2 42 1 0 0 0 1403 0 0 0 100 March 4, 2026 at 01:44:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2158 101 6 0 1 0 0 262 0 1 0 99 1 0 0 10 377 156 121 0 2 3 0 9 0 1 0 99 2 0 0 343 121 4 120 0 0 4 0 301 0 1 0 99 3 0 0 4 266 105 12 0 0 0 0 8 0 0 0 100 4 0 0 14 67 5 18 0 0 1 0 580 0 0 0 100 5 0 0 0 64 7 4 0 0 0 0 21 0 0 0 100 6 0 0 0 57 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 65 2 42 1 1 0 0 1378 0 0 0 99 March 4, 2026 at 01:44:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2123 101 6 1 1 0 0 259 0 1 0 99 1 0 0 24 346 156 122 0 0 0 0 9 0 0 0 99 2 0 0 119 124 4 120 0 0 2 0 304 0 0 0 100 3 0 0 3 238 104 18 0 1 1 0 18 0 0 0 100 4 0 0 14 30 3 4 2 0 0 0 566 0 0 0 100 5 0 0 0 29 2 4 0 0 0 0 2 0 0 0 100 6 0 0 0 25 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 30 2 36 1 1 0 0 1382 0 0 0 100 March 4, 2026 at 01:44:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 123 0 11 2285 102 266 10 52 28 32 1062 0 1 0 98 1 2266 0 204 462 155 361 5 50 25 29 780 2 1 0 97 2 1734 0 16 288 2 286 2 45 32 33 1186 1 1 0 98 3 641 0 16 340 104 233 4 60 38 27 1778 1 1 0 99 4 122 0 18 136 3 195 3 48 45 26 1391 1 1 0 99 5 5300 0 117 115 1 209 5 40 77 31 1382 1 2 0 97 6 2950 0 27 169 2 303 3 58 61 39 1559 2 2 0 96 7 210 0 27 148 3 231 2 43 29 25 1959 1 1 0 99 March 4, 2026 at 01:44:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 966 0 16 2693 102 1125 45 182 113 35 3882 4 3 0 93 1 1299 0 129 762 104 1030 42 191 189 27 3930 6 3 0 92 2 4925 0 5 568 2 982 31 147 166 30 3273 4 3 0 93 3 4025 0 109 878 165 1071 39 168 169 34 3554 4 4 0 92 4 34115 0 22 646 38 1121 40 190 187 27 4027 12 8 0 80 5 2682 0 194 429 4 752 21 129 147 31 3210 5 2 0 93 6 805 0 3 458 3 817 26 154 124 39 2588 3 2 0 96 7 1578 0 72 397 17 661 16 98 80 19 3825 5 3 0 92 March 4, 2026 at 01:44:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2178 101 112 0 0 0 0 262 0 1 0 99 1 0 0 3 285 102 4 0 0 0 0 294 0 0 0 100 2 0 0 462 18 1 10 0 2 2 0 0 0 0 0 100 3 0 0 4 284 103 4 0 0 0 0 0 0 0 0 100 4 3 0 14 182 53 107 0 1 0 0 568 0 0 0 100 5 0 0 0 88 2 14 0 1 0 0 1 0 0 0 100 6 44 0 0 93 7 14 0 0 0 0 9 0 0 0 100 7 0 0 42 79 2 36 1 0 2 0 1389 0 1 0 99 March 4, 2026 at 01:44:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 101 154 1 1 0 0 259 0 1 0 99 1 0 0 3 210 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 14 1 10 0 0 0 0 5 0 0 0 100 3 1 0 3 212 103 8 0 0 0 0 5 0 0 0 100 4 0 0 14 63 29 63 0 1 0 0 577 0 0 0 100 5 0 0 0 16 7 6 0 0 0 0 2 0 0 0 100 6 0 0 0 24 7 24 0 1 0 0 9 0 0 0 100 7 0 0 0 26 9 52 0 1 0 0 1382 0 0 0 100 March 4, 2026 at 01:45:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 101 212 0 0 0 0 259 0 1 0 99 1 0 0 2 211 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 3 0 0 5 210 103 4 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 4 1 0 0 0 567 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 19 7 14 0 0 0 0 9 0 0 0 100 7 0 0 0 11 2 34 2 0 0 0 1381 0 0 0 100 March 4, 2026 at 01:45:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5612 0 53 2736 102 1158 40 185 147 57 4728 6 4 0 90 1 4012 0 152 868 112 1124 61 219 116 69 4956 5 4 0 91 2 1707 0 24 531 5 925 27 161 142 61 4544 4 3 0 93 3 37143 0 248 772 119 1027 52 201 131 65 5250 12 10 0 78 4 3624 0 12 494 6 843 31 187 105 52 4087 5 3 0 93 5 4136 0 17 487 3 788 25 148 111 48 3128 6 2 0 92 6 987 0 7 508 8 883 21 170 118 61 3319 5 2 0 93 7 6499 0 314 402 4 787 20 127 120 55 4303 4 4 0 93 March 4, 2026 at 01:45:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2154 102 186 0 16 55 0 262 0 2 0 98 1 21 0 2 278 102 116 0 21 102 0 303 0 0 0 100 2 55 0 0 79 3 116 0 19 92 0 20 0 1 0 99 3 16 0 26 421 208 202 0 21 83 0 23 0 1 0 99 4 0 0 0 126 4 366 0 20 72 0 637 0 1 0 99 5 3 0 14 66 3 95 0 16 106 0 288 0 0 0 100 6 0 0 0 68 2 85 0 16 73 0 1 0 0 0 100 7 0 0 0 63 2 108 1 13 54 0 1400 0 0 0 99 March 4, 2026 at 01:45:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2174 101 114 1 0 2 0 262 0 2 0 98 1 0 0 9 286 103 8 0 2 0 0 298 0 0 0 100 2 0 0 463 35 7 26 0 0 2 0 9 0 1 0 99 3 0 0 4 382 152 106 0 0 0 0 0 0 0 0 100 4 1 0 0 87 5 10 0 1 0 0 305 0 0 0 100 5 0 0 14 83 3 8 1 0 0 0 269 0 0 0 100 6 0 0 0 82 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 85 3 38 1 0 0 0 1378 0 0 0 100 March 4, 2026 at 01:45:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 101 116 0 1 0 0 259 0 1 0 99 1 0 0 2 213 102 4 0 1 0 0 294 0 0 0 100 2 0 0 0 32 8 30 0 1 0 0 15 0 0 0 100 3 0 0 5 231 112 24 0 0 0 0 6 0 0 0 100 4 1 0 0 19 4 17 1 0 0 0 312 0 0 0 100 5 0 0 14 50 26 44 0 1 0 0 266 0 0 0 100 6 0 0 0 53 24 48 0 2 0 0 0 0 0 0 100 7 0 0 0 13 2 38 1 0 0 0 1377 0 0 0 100 March 4, 2026 at 01:45:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2657 0 31 2385 101 573 4 85 56 67 2847 1 3 0 96 1 2625 0 149 515 104 427 6 98 59 56 2757 2 2 0 96 2 29286 0 12 339 13 503 7 90 65 58 2023 8 5 0 87 3 1432 0 63 477 103 465 5 88 28 56 1996 3 2 0 95 4 336 0 27 244 6 393 7 75 42 39 1478 1 1 0 98 5 1772 0 138 321 45 489 10 72 26 53 2819 2 2 0 96 6 329 0 11 262 1 428 9 79 54 47 1447 1 1 0 98 7 7381 0 204 251 8 414 8 62 89 45 3696 2 4 0 95 March 4, 2026 at 01:45:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 721 0 7 2416 103 651 35 126 42 10 2382 3 2 0 95 1 387 0 7 538 103 595 32 112 22 7 2024 3 1 0 96 2 4766 0 7 270 2 419 17 87 30 10 1244 3 4 0 93 3 1853 0 226 472 104 508 19 94 57 9 2128 4 2 0 94 4 2678 0 72 305 3 525 19 104 73 22 2422 4 3 0 93 5 5842 0 35 414 44 525 16 66 57 14 1814 5 2 0 93 6 1462 0 3 310 3 568 23 103 58 20 2389 3 1 0 95 7 625 0 0 265 8 520 20 81 48 11 3122 2 1 0 97 March 4, 2026 at 01:45:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2218 101 184 1 14 71 0 262 0 1 0 99 1 0 0 3 328 102 84 0 15 81 0 294 0 1 0 99 2 0 0 462 54 1 84 0 13 69 0 0 0 1 0 99 3 0 0 4 390 160 113 0 15 95 0 0 0 1 0 99 4 0 0 42 183 2 228 0 21 85 0 300 0 1 0 99 5 2 0 14 148 13 120 0 23 53 0 268 0 0 0 100 6 0 0 0 198 41 161 0 14 47 0 0 0 0 0 100 7 44 0 0 133 10 118 1 16 38 0 1387 0 0 0 99 March 4, 2026 at 01:45:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 101 114 0 1 0 0 259 0 1 0 99 1 0 0 3 210 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 3 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 4 0 0 0 11 2 4 1 1 0 0 300 0 0 0 100 5 0 0 14 14 3 16 0 1 0 0 266 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 121 58 146 0 0 0 0 1387 0 0 0 99 March 4, 2026 at 01:45:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 101 128 0 1 0 0 259 0 1 0 99 1 0 0 2 249 121 42 0 1 0 0 294 0 0 0 100 2 0 0 0 15 1 16 0 0 0 0 13 0 0 0 100 3 0 0 5 214 103 8 1 0 0 0 8 0 0 0 100 4 0 0 0 17 4 12 0 0 0 0 307 0 0 0 100 5 0 0 14 21 12 10 0 1 0 0 268 0 0 0 100 6 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 73 32 94 2 0 1 0 1387 0 0 0 99 March 4, 2026 at 01:45:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36014 0 387 2671 102 1102 41 186 109 84 4196 12 9 0 78 1 1268 0 18 883 118 1137 28 186 94 51 3775 5 3 0 92 2 3099 0 126 549 31 841 15 122 40 51 4691 7 3 0 90 3 2073 0 182 701 104 961 32 177 120 66 3869 3 3 0 94 4 9272 0 21 500 5 875 24 162 171 47 4686 4 4 0 91 5 9465 0 55 556 7 717 21 136 163 71 3735 6 4 0 90 6 931 0 43 538 1 1012 24 155 106 82 3243 3 2 0 95 7 1478 0 10 442 8 787 30 126 97 56 5122 5 2 0 93 March 4, 2026 at 01:45:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 7 2128 103 122 1 3 1 0 276 0 1 0 99 1 0 0 7 310 141 92 0 2 1 0 302 0 0 0 100 2 8 0 0 53 13 32 0 1 7 0 9 0 1 0 99 3 44 0 21 234 107 22 0 3 0 0 22 0 0 0 100 4 2 0 0 28 3 4 0 0 2 0 309 0 0 0 100 5 24 0 14 30 5 10 0 0 1 0 279 0 0 0 100 6 19 0 70 21 2 8 0 2 7 0 9 0 2 0 98 7 0 0 7 32 3 46 0 3 1 0 1399 0 0 0 100 March 4, 2026 at 01:45:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2215 101 186 0 13 57 0 259 0 1 0 99 1 0 0 2 418 151 177 0 16 78 0 294 0 1 0 99 2 0 0 462 51 1 76 0 11 72 0 0 0 1 0 99 3 0 0 5 393 163 108 0 13 91 0 8 0 1 0 99 4 0 0 0 175 2 187 1 16 47 0 300 0 0 0 99 5 0 0 14 123 3 88 0 12 71 0 266 0 0 0 100 6 0 0 42 120 0 103 0 13 91 0 0 0 1 0 99 7 0 0 0 114 3 99 1 10 44 0 1377 0 0 0 99 March 4, 2026 at 01:45:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2103 101 108 0 1 0 0 259 0 1 0 99 1 0 0 2 313 151 112 0 1 0 0 294 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 5 222 109 16 0 0 0 0 9 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 301 0 0 0 100 5 0 0 14 12 4 8 0 0 0 0 268 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 21 3 45 1 2 0 0 1379 0 0 0 100 March 4, 2026 at 01:45:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6664 0 216 2664 101 1123 27 215 177 74 5550 6 6 0 88 1 36730 0 227 994 134 1185 77 229 431 49 6186 15 8 0 77 2 33630 0 23 621 6 1142 43 224 390 94 5099 13 11 0 76 3 4822 0 54 902 120 1158 49 230 130 65 3996 4 3 0 93 4 4377 0 128 599 5 1082 42 210 126 69 3503 4 3 0 93 5 890 0 24 533 16 910 39 179 134 73 2743 2 2 0 96 6 926 0 15 486 3 853 27 176 114 60 4140 3 2 0 95 7 1694 0 197 452 3 812 24 140 111 56 4081 2 3 0 95 March 4, 2026 at 01:45:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 7 2126 102 93 1 2 0 0 284 1 1 0 99 1 1 0 73 238 104 35 1 4 12 0 936 2 1 0 97 2 68 0 7 39 5 31 0 4 4 0 77 1 0 0 99 3 27 0 32 234 106 19 0 3 2 0 64 0 0 0 99 4 0 0 0 124 51 106 0 2 0 0 15 0 0 0 100 5 66 0 0 55 5 37 0 4 1 0 96 0 0 0 100 6 7 0 14 30 1 14 2 4 9 0 357 0 1 0 99 7 6 0 0 38 2 48 2 2 0 0 1117 2 0 0 98 March 4, 2026 at 01:45:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2177 101 110 0 0 0 0 262 0 1 0 99 1 0 0 45 282 103 6 2 0 2 0 600 0 1 0 99 2 0 0 0 98 8 22 0 1 0 0 303 0 0 0 100 3 0 0 466 221 102 16 0 2 2 0 0 0 0 0 100 4 0 0 0 178 51 101 0 1 0 0 0 0 0 0 100 5 0 0 0 84 3 6 0 0 0 0 0 0 0 0 100 6 0 0 14 79 2 4 0 0 0 0 267 0 0 0 100 7 0 0 0 89 1 40 1 0 0 0 1081 0 0 0 100 March 4, 2026 at 01:45:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2139 101 164 0 14 68 0 259 0 1 0 99 1 0 0 3 267 103 118 0 20 84 0 600 0 0 0 100 2 0 0 0 70 11 117 0 14 81 0 304 0 0 0 100 3 0 0 4 309 156 96 0 16 68 0 0 0 0 0 100 4 0 0 0 193 49 276 0 15 71 0 0 0 0 0 100 5 0 0 0 51 4 82 0 10 72 0 2 0 0 0 100 6 0 0 14 53 1 99 0 15 86 0 266 0 0 0 100 7 0 0 0 56 1 123 0 14 59 0 1080 0 0 0 99 March 4, 2026 at 01:45:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2103 101 106 0 0 0 0 259 0 1 0 99 1 0 0 2 213 103 4 0 0 0 0 601 0 0 0 100 2 0 0 0 122 58 118 0 0 0 0 303 0 0 0 100 3 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 4 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 12 3 8 0 0 0 0 0 0 0 0 100 6 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 16 1 40 1 0 1 0 1082 0 0 0 100 March 4, 2026 at 01:45:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4521 0 222 2675 101 1146 41 216 127 59 5445 4 5 0 90 1 3165 0 28 917 104 1151 41 220 131 38 4544 7 3 0 90 2 8156 0 190 691 15 1210 37 201 135 81 5419 5 4 0 90 3 8868 0 236 847 107 1125 51 230 132 65 4578 6 5 0 89 4 2688 0 10 640 13 1080 39 209 103 91 4493 7 3 0 90 5 968 0 18 583 30 970 28 166 75 76 3947 4 2 0 94 6 731 0 18 571 3 1018 29 206 85 51 4322 3 2 0 95 7 27497 0 121 441 4 776 34 134 69 46 3623 11 8 0 80 March 4, 2026 at 01:45:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2109 102 148 1 2 5 0 1351 0 2 0 98 1 0 0 2 232 103 12 2 2 5 0 600 0 1 0 99 2 0 0 0 19 1 4 0 0 0 0 294 0 0 0 100 3 0 0 5 221 102 4 0 1 0 0 0 0 0 0 100 4 0 0 7 20 2 4 0 1 0 0 0 0 0 0 100 5 0 0 0 40 10 22 0 0 0 0 0 0 0 0 100 6 2 0 14 108 43 99 0 3 0 0 266 0 0 0 100 7 44 0 0 28 6 12 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:45:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 49 2174 102 150 0 3 1 0 1342 0 2 0 98 1 0 0 465 220 103 6 0 0 2 0 600 0 1 0 99 2 0 0 0 82 2 4 0 0 1 0 294 0 0 0 100 3 0 0 4 282 103 4 0 0 1 0 1 0 0 0 99 4 0 0 0 85 3 4 0 0 1 0 0 0 0 0 100 5 0 0 0 86 4 8 0 1 1 0 0 0 0 0 100 6 0 0 14 180 51 104 0 1 1 0 266 0 0 0 100 7 0 0 0 93 8 14 0 0 1 0 11 0 0 0 100 March 4, 2026 at 01:45:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2142 103 212 1 14 72 0 1340 0 1 0 99 1 0 0 2 253 103 83 0 15 72 0 600 0 0 0 100 2 0 0 0 48 1 87 0 16 73 0 294 0 0 0 100 3 0 0 5 315 157 108 0 12 92 0 1 0 0 0 100 4 0 0 0 101 2 191 0 16 62 0 0 0 0 0 100 5 0 0 0 57 3 101 0 13 89 0 0 0 0 0 100 6 0 0 14 143 51 172 0 18 77 0 266 0 0 0 100 7 0 0 0 63 6 106 0 13 53 0 9 0 0 0 100 March 4, 2026 at 01:45:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1055 0 12 2695 102 1098 27 180 90 52 5323 4 3 0 93 1 2236 0 118 789 105 1075 43 187 122 54 5534 6 3 0 91 2 5524 0 18 497 2 838 21 144 137 48 3654 4 4 0 92 3 3542 0 197 741 109 1071 26 172 109 64 3887 4 3 0 93 4 37053 0 389 531 7 1027 34 184 109 70 3978 13 9 0 78 5 3712 0 30 453 12 751 16 131 117 70 4391 6 3 0 91 6 5626 0 42 625 30 987 26 175 120 62 3806 7 5 0 88 7 5150 0 10 561 9 848 16 109 117 43 4518 4 2 0 94 March 4, 2026 at 01:45:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2125 101 134 1 3 0 0 1110 0 1 0 99 1 0 0 2 233 104 12 1 1 5 0 609 0 1 0 99 2 0 0 0 26 2 8 0 1 0 0 309 0 0 0 100 3 53 0 89 353 157 154 0 2 5 0 32 0 1 0 99 4 0 0 0 30 3 16 0 4 0 0 20 0 0 0 100 5 19 0 7 43 12 22 0 3 0 0 275 0 0 0 100 6 28 0 21 25 2 11 0 4 0 0 283 0 0 0 100 7 0 0 0 25 0 12 0 2 0 0 10 0 0 0 100 March 4, 2026 at 01:45:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 101 144 1 0 0 0 1081 0 1 0 99 1 0 0 352 227 104 14 1 0 4 0 600 0 1 0 99 2 0 0 0 73 3 22 0 1 1 0 304 0 0 0 100 3 0 0 40 322 132 67 0 2 3 0 27 0 1 0 99 4 0 0 0 114 27 55 0 2 0 0 0 0 0 0 100 5 0 0 7 67 4 8 0 0 0 0 262 0 0 0 100 6 0 0 14 62 1 4 0 1 0 0 266 0 0 0 100 7 0 0 0 63 1 4 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:45:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 101 138 1 2 0 0 1082 0 1 0 99 1 0 0 2 245 104 18 0 2 0 0 599 0 0 0 100 2 0 0 0 26 1 6 0 1 1 0 294 0 0 0 100 3 0 0 117 228 108 27 0 1 0 0 10 0 0 0 100 4 0 0 0 125 52 103 0 1 0 0 0 0 0 0 100 5 0 0 7 30 4 10 0 0 0 0 259 0 0 0 100 6 0 0 14 25 2 4 1 0 0 0 267 0 0 0 100 7 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:45:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 389 0 29 2324 101 511 5 85 159 46 1964 1 2 0 98 1 494 0 14 413 104 366 8 88 135 33 3033 1 1 0 98 2 349 0 4 193 2 310 4 69 110 25 1033 1 1 0 99 3 1115 0 18 468 163 334 2 69 86 24 1282 2 1 0 97 4 945 0 14 244 14 402 7 73 103 29 723 2 1 0 96 5 219 0 12 257 42 345 5 61 100 21 743 0 1 0 99 6 3834 0 330 134 1 277 8 48 79 34 1305 1 2 0 96 7 6118 0 23 215 1 258 8 51 120 37 1346 2 2 0 96 March 4, 2026 at 01:45:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 436 0 88 2524 102 827 23 127 58 24 2627 3 3 0 94 1 818 0 8 615 106 720 22 117 64 23 4975 5 2 0 93 2 5559 0 5 440 2 783 22 102 91 28 3883 7 3 0 90 3 5346 0 88 711 106 799 18 107 111 31 3171 5 3 0 92 4 2060 0 297 334 4 675 21 123 64 44 2771 3 2 0 95 5 1164 0 11 302 5 484 10 80 59 42 2000 2 1 0 97 6 1079 0 32 329 12 624 10 109 66 37 2546 2 2 0 96 7 33891 0 9 373 37 559 16 82 76 31 2161 10 7 0 83 March 4, 2026 at 01:45:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2176 100 160 1 2 2 0 5 0 2 0 98 1 0 0 2 298 107 46 2 2 0 0 1381 0 0 0 99 2 0 0 0 81 1 4 1 0 0 0 300 0 0 0 100 3 1 0 467 228 104 24 0 0 2 0 309 0 1 0 99 4 0 0 0 90 3 14 0 1 0 0 0 0 0 0 100 5 0 0 7 93 9 12 0 1 0 0 269 0 0 0 100 6 46 0 14 97 7 22 0 0 0 0 276 0 0 0 100 7 0 0 0 129 25 52 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:45:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 1 0 99 1 0 0 2 314 153 136 1 0 0 0 1381 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 299 0 0 0 100 3 0 0 5 210 103 4 0 0 0 0 295 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 6 0 0 14 25 7 22 0 0 0 0 275 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:45:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 1 0 0 0 1 0 99 1 0 0 7 314 153 136 1 0 1 0 1382 0 0 0 99 2 0 0 0 11 2 4 0 0 1 0 300 0 0 0 100 3 0 0 7 209 102 4 0 1 0 0 294 0 0 0 100 4 0 0 0 15 4 6 0 1 1 0 0 0 0 0 100 5 0 0 7 17 4 14 1 1 1 0 259 0 0 0 100 6 0 0 14 29 8 22 0 0 1 0 275 0 0 0 100 7 0 0 0 10 2 2 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:45:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1743 0 24 2734 100 1218 32 216 163 54 3013 4 3 0 93 1 2815 0 42 938 126 1260 42 218 244 64 6692 6 4 0 90 2 8888 0 488 572 12 1013 25 164 269 76 4932 5 5 0 89 3 9475 0 108 949 158 1176 31 196 244 73 5563 8 5 0 87 4 37386 0 28 784 5 1170 32 183 551 56 4023 12 8 0 81 5 27365 0 13 566 5 983 32 171 428 62 3997 11 9 0 80 6 623 0 31 616 11 1141 36 211 246 54 4929 6 3 0 92 7 1651 0 192 418 2 726 14 139 169 44 2654 3 2 0 95 March 4, 2026 at 01:45:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2107 100 136 0 3 5 0 9 0 2 0 98 1 0 0 3 242 104 50 2 4 5 0 1408 0 1 0 99 2 21 0 7 23 1 8 0 1 0 0 309 0 0 0 100 3 2 0 18 294 138 82 0 2 0 0 308 0 0 0 100 4 14 0 14 30 5 14 0 2 0 0 290 0 0 0 100 5 2 0 0 34 3 14 0 3 0 0 5 0 0 0 100 6 0 0 7 26 3 10 1 1 0 0 267 0 0 0 100 7 60 0 0 37 7 20 0 1 0 0 15 0 0 0 100 March 4, 2026 at 01:45:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2171 101 53 0 1 2 0 21 0 2 0 98 1 0 0 464 225 104 42 1 0 3 0 1377 0 1 0 99 2 0 0 0 89 2 12 1 1 0 0 306 0 0 0 100 3 0 0 4 389 153 117 1 2 0 0 307 0 0 0 100 4 0 0 14 87 5 10 1 0 0 0 267 0 0 0 100 5 0 0 0 89 7 8 0 0 1 0 7 0 0 0 100 6 0 0 7 80 1 6 0 1 1 0 262 0 0 0 100 7 0 0 0 159 6 85 0 4 2 0 9 0 0 0 100 March 4, 2026 at 01:45:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 22 0 1 0 0 0 0 1 0 99 1 0 0 3 216 104 36 2 0 0 0 1378 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 301 0 0 0 100 3 0 0 4 268 132 62 0 0 0 0 294 0 0 0 100 4 0 0 14 49 23 46 0 1 0 0 266 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 7 7 1 2 1 0 0 0 259 0 0 0 100 7 0 0 0 121 7 118 0 1 0 0 11 0 0 0 100 March 4, 2026 at 01:45:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22841 0 16 2399 102 450 12 84 41 32 1654 8 6 0 86 1 2030 0 263 444 104 487 17 101 42 54 3649 2 2 0 96 2 499 0 12 265 2 429 6 92 62 34 1943 1 2 0 97 3 5376 0 250 463 102 457 8 93 103 49 3775 2 3 0 95 4 6733 0 47 374 45 442 10 86 99 48 3655 5 3 0 92 5 1046 0 6 242 3 389 3 79 64 62 1798 2 1 0 97 6 304 0 12 279 11 463 4 86 39 48 2133 1 1 0 98 7 529 0 9 351 8 491 6 73 33 43 1177 1 1 0 98 March 4, 2026 at 01:45:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5038 0 7 2434 101 721 29 124 111 17 1662 5 5 0 91 1 895 0 74 512 104 567 19 87 134 10 3124 2 3 0 95 2 938 0 3 266 2 433 12 65 100 6 1703 2 2 0 96 3 1464 0 222 554 159 561 23 91 120 12 2166 2 2 0 95 4 2517 0 23 305 6 533 9 93 103 11 1713 2 2 0 96 5 2771 0 2 240 2 412 10 76 112 8 1505 2 2 0 97 6 1174 0 7 316 43 507 5 81 118 15 1364 3 1 0 96 7 2883 0 12 319 4 444 17 64 111 14 1493 6 1 0 92 March 4, 2026 at 01:45:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 100 198 0 1 0 0 0 0 1 0 99 1 0 0 44 294 104 48 2 1 2 0 1380 0 1 0 99 2 0 0 462 14 1 4 0 0 2 0 300 0 0 0 99 3 0 0 5 284 103 6 0 1 0 0 295 0 0 0 100 4 2 0 14 93 6 18 1 1 0 0 269 0 0 0 100 5 0 0 0 82 2 6 0 1 0 0 0 0 0 0 100 6 0 0 7 79 1 4 0 0 0 0 262 0 0 0 100 7 44 0 0 101 11 20 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:45:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 214 0 1 0 0 0 0 1 0 99 1 0 0 3 219 104 38 1 0 1 0 1382 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 305 0 0 0 100 3 1 0 4 217 104 16 0 0 0 0 309 0 0 0 100 4 0 0 14 11 4 8 0 0 0 0 266 0 0 0 100 5 0 0 0 18 7 8 0 0 0 0 7 0 0 0 100 6 0 0 7 6 1 2 1 0 0 0 259 0 0 0 100 7 0 0 0 23 7 20 0 0 0 0 11 0 0 0 100 March 4, 2026 at 01:45:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 212 0 0 0 0 0 0 1 0 99 1 0 0 2 217 104 38 1 0 0 0 1380 0 0 0 99 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 5 208 102 2 0 0 0 0 294 0 0 0 100 4 0 0 14 13 4 10 0 1 0 0 266 0 0 0 100 5 0 0 0 15 2 14 0 2 0 0 0 0 0 0 100 6 0 0 7 6 1 2 0 0 0 0 259 0 0 0 100 7 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:45:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29395 0 46 2614 102 958 25 149 83 58 3980 13 10 0 77 1 1907 0 14 704 105 834 22 172 99 50 3628 5 2 0 92 2 3360 0 131 455 23 761 17 128 96 56 4413 4 3 0 93 3 4494 0 87 740 103 859 16 170 103 61 4290 6 3 0 91 4 6116 0 205 426 6 753 23 132 134 62 5312 4 3 0 93 5 7554 0 32 549 5 816 33 111 89 59 3150 5 3 0 92 6 2287 0 147 472 2 829 12 139 92 64 4533 3 3 0 94 7 1760 0 187 445 21 785 12 111 89 77 2478 2 2 0 96 March 4, 2026 at 01:45:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2148 101 136 1 17 61 0 1104 0 2 0 98 1 0 0 3 281 103 107 1 20 87 0 308 0 1 0 99 2 44 0 0 171 55 190 0 11 62 0 319 0 0 0 99 3 5 0 31 317 154 95 0 19 53 0 313 0 0 0 100 4 4 0 14 113 4 176 0 17 63 0 286 0 0 0 100 5 28 0 0 92 4 131 0 13 71 0 14 0 0 0 100 6 2 0 14 131 1 147 0 16 56 0 278 0 0 0 100 7 23 0 0 64 0 86 0 12 56 0 9 0 0 0 100 March 4, 2026 at 01:45:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2178 102 126 0 2 1 0 1079 0 2 0 98 1 0 0 465 239 103 24 0 2 1 0 307 0 1 0 99 2 0 0 0 192 56 115 1 2 0 0 309 0 0 0 100 3 1 0 4 283 102 4 0 1 0 0 295 0 0 0 100 4 1 0 14 86 5 10 0 1 0 0 268 0 0 0 100 5 1 0 0 85 2 8 0 0 0 0 1 0 0 0 100 6 1 0 7 93 2 18 1 2 0 0 261 0 0 0 100 7 1 0 7 87 1 16 0 3 0 0 3 0 0 0 100 March 4, 2026 at 01:45:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 154 1 2 0 0 1075 0 1 0 99 1 0 0 2 214 103 8 0 1 0 0 300 0 0 0 100 2 0 0 0 75 33 68 0 0 0 0 315 0 0 0 100 3 0 0 4 266 128 68 0 1 0 0 309 0 0 0 100 4 0 0 14 14 5 10 0 0 0 0 267 0 0 0 100 5 2 0 0 18 7 8 0 0 0 0 7 0 0 0 100 6 2 0 7 12 1 6 0 0 0 0 259 0 0 0 100 7 0 0 0 12 0 10 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:45:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29235 0 31 2799 102 1340 56 247 407 62 5655 12 11 0 77 1 4404 0 341 908 104 1294 35 258 102 83 4566 5 4 0 91 2 4713 0 195 622 10 1133 45 200 171 77 5157 6 4 0 90 3 5466 0 89 894 133 1249 27 225 122 56 4575 4 7 0 89 4 7664 0 45 662 6 1048 43 203 131 60 6931 7 4 0 89 5 1227 0 35 567 15 973 19 177 126 55 3203 4 3 0 94 6 2230 0 11 647 3 1050 28 189 92 57 4443 4 2 0 94 7 34696 0 180 504 4 775 35 120 370 38 3661 13 6 0 81 March 4, 2026 at 01:45:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2124 101 86 1 3 1 0 1103 0 1 0 99 1 7 0 9 283 120 69 1 4 4 0 13 2 1 0 97 2 6 0 7 31 2 14 0 4 0 0 345 2 0 0 98 3 63 0 32 228 103 12 0 3 0 0 338 0 0 0 100 4 17 0 21 39 7 17 3 3 11 0 842 0 1 0 99 5 16 0 70 87 4 74 0 2 9 0 18 0 1 0 99 6 8 0 0 29 2 8 0 3 0 0 12 0 0 0 100 7 44 0 0 95 34 78 0 1 0 0 9 0 0 0 100 March 4, 2026 at 01:45:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 101 216 1 15 78 0 1081 0 1 0 98 1 0 0 234 365 150 206 0 16 83 0 0 0 1 0 99 2 0 0 0 90 3 85 1 13 69 0 300 0 0 0 100 3 0 0 3 341 155 92 0 19 76 0 294 0 0 0 100 4 0 0 21 138 6 187 1 18 78 0 829 0 0 0 99 5 0 0 14 83 1 93 0 18 88 0 0 0 1 0 99 6 0 0 0 86 1 88 0 15 104 0 0 0 0 0 100 7 0 0 0 93 7 91 0 9 94 0 12 0 0 0 100 March 4, 2026 at 01:45:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 101 142 1 0 0 0 1081 0 1 0 99 1 0 0 227 311 150 104 0 0 1 0 0 0 1 0 99 2 0 0 0 43 2 4 0 0 0 0 300 0 0 0 100 3 0 0 4 242 102 2 0 0 0 0 294 0 0 0 100 4 0 0 21 47 6 10 0 0 0 0 825 0 0 0 100 5 0 0 14 41 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 43 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 52 6 14 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:45:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 142 0 1 0 0 1081 0 1 0 99 1 0 0 3 315 150 104 0 1 0 0 0 0 0 0 100 2 0 0 0 16 2 8 0 1 1 0 304 0 0 0 100 3 0 0 4 221 104 20 1 2 0 0 299 0 0 0 100 4 0 0 21 16 6 12 0 0 0 0 825 0 0 0 100 5 0 0 14 16 6 8 0 0 0 0 7 0 0 0 100 6 0 0 0 15 1 12 0 1 0 0 9 0 0 0 100 7 0 0 0 24 7 18 0 0 0 0 11 0 0 0 100 March 4, 2026 at 01:45:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34644 0 147 2648 103 1089 45 181 163 78 4769 12 11 0 77 1 6692 0 14 888 133 1053 27 193 131 78 4652 5 3 0 91 2 2107 0 19 513 6 842 25 148 112 58 4463 4 3 0 93 3 5207 0 283 700 104 1010 34 191 116 79 4017 4 3 0 93 4 3273 0 169 491 7 798 21 125 112 58 4520 7 3 0 90 5 1049 0 21 454 3 713 17 120 96 62 2440 2 2 0 96 6 2059 0 29 536 12 808 22 135 70 41 4763 4 2 0 94 7 1783 0 185 426 5 786 12 125 96 43 2793 4 2 0 94 March 4, 2026 at 01:45:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 100 100 0 0 1 0 0 0 1 0 99 1 0 0 7 321 150 104 0 1 1 0 0 0 0 0 100 2 0 0 70 28 4 46 3 0 7 0 1384 0 1 0 98 3 0 0 7 223 102 8 0 3 5 0 294 0 0 0 100 4 46 0 28 38 11 20 1 1 1 0 839 0 0 0 100 5 0 0 0 26 4 6 0 0 1 0 1 0 0 0 100 6 0 0 0 25 3 4 0 0 1 0 0 0 0 0 100 7 0 0 0 27 3 6 0 1 1 0 3 0 0 0 100 March 4, 2026 at 01:45:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2208 102 155 1 12 62 0 0 0 1 0 99 1 0 0 3 425 151 182 1 12 66 0 0 0 1 0 99 2 0 0 42 133 5 135 0 16 85 0 1381 0 1 0 99 3 0 0 466 326 158 115 1 19 87 0 294 0 1 0 99 4 0 0 21 207 11 230 0 23 58 0 834 0 1 0 99 5 0 0 0 124 3 88 0 15 68 0 0 0 0 0 100 6 0 0 0 127 2 90 1 16 77 0 0 0 0 0 100 7 0 0 0 111 2 67 0 9 51 0 0 0 0 0 100 March 4, 2026 at 01:45:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 96 0 2 0 0 0 0 1 0 99 1 0 0 2 310 150 104 0 0 0 0 0 0 0 0 100 2 0 0 0 20 3 44 1 0 0 0 1381 0 0 0 100 3 0 0 5 208 102 2 0 0 0 0 294 0 0 0 100 4 0 0 21 32 11 26 0 0 1 0 835 0 0 0 100 5 0 0 0 14 2 14 0 1 0 0 0 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 1 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:45:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5317 0 316 2610 101 1070 28 199 152 71 3648 4 5 0 91 1 24432 0 10 872 127 1001 24 175 325 46 4201 11 6 0 84 2 1508 0 16 554 5 979 25 176 92 64 6055 5 4 0 92 3 5848 0 258 738 103 1017 27 172 135 68 4107 4 4 0 92 4 9112 0 226 543 11 894 28 147 146 67 4961 7 4 0 89 5 1198 0 13 485 8 843 16 143 129 75 2768 3 2 0 96 6 3993 0 12 504 11 908 43 161 119 72 4739 6 3 0 91 7 31444 0 42 473 6 649 21 111 319 49 3140 15 8 0 77 March 4, 2026 at 01:45:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 70 2108 100 127 0 6 3 0 8 0 2 0 98 1 0 0 3 287 128 70 0 4 4 0 14 0 0 0 100 2 17 0 0 37 7 48 1 0 1 0 1408 0 0 0 99 3 11 0 18 225 102 12 0 2 0 0 324 0 0 0 100 4 34 0 28 24 4 11 1 2 0 0 838 0 0 0 100 5 44 0 0 35 6 21 0 3 0 0 33 0 0 0 100 6 0 0 0 27 2 10 2 2 1 0 10 0 0 0 100 7 0 0 0 56 2 39 0 3 0 0 10 0 0 0 100 March 4, 2026 at 01:45:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2157 100 117 0 1 3 0 0 0 1 0 99 1 0 0 353 318 150 108 0 1 3 0 0 0 1 0 99 2 0 0 0 68 3 36 2 0 1 0 1382 0 0 0 99 3 0 0 4 263 102 2 0 0 0 0 294 0 0 0 100 4 0 0 21 68 5 10 0 0 0 0 830 0 0 0 100 5 0 0 0 77 8 18 0 1 0 0 9 0 0 0 100 6 0 0 0 66 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 67 1 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:45:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2152 100 197 0 20 59 0 0 0 1 0 99 1 0 0 2 362 150 181 0 17 60 0 0 0 0 0 100 2 0 0 0 62 3 106 1 10 38 0 1381 0 0 0 99 3 0 0 5 322 159 84 0 14 93 0 299 0 0 0 100 4 0 0 21 135 5 227 0 22 81 0 836 0 0 0 99 5 0 0 0 90 8 127 0 16 75 0 9 0 0 0 100 6 0 0 0 73 1 103 0 17 92 0 0 0 0 0 100 7 0 0 0 61 2 78 0 15 54 0 2 0 0 0 100 March 4, 2026 at 01:45:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 562 0 28 2368 100 527 5 100 44 32 1363 1 2 0 97 1 1536 0 210 524 117 532 15 110 62 39 2344 3 2 0 95 2 2408 0 15 243 3 358 6 67 65 42 4146 2 2 0 97 3 6483 0 285 456 102 482 11 94 82 64 4721 3 3 0 94 4 441 0 44 333 32 528 6 100 62 55 2387 1 2 0 97 5 2569 0 25 303 13 488 6 82 83 56 1595 1 2 0 97 6 2820 0 31 339 2 447 9 90 62 49 1469 4 2 0 95 7 256 0 8 219 2 353 7 74 58 34 1108 1 1 0 98 March 4, 2026 at 01:45:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1028 0 74 2413 101 692 17 92 69 23 1465 2 3 0 95 1 396 0 3 488 103 467 21 85 30 12 1791 2 2 0 96 2 26996 0 7 222 3 371 18 53 34 10 3527 13 7 0 80 3 409 0 46 544 140 571 7 70 31 7 2157 2 1 0 97 4 717 0 21 265 4 454 20 68 36 12 2276 2 1 0 97 5 3848 0 186 232 11 426 17 65 50 21 1696 4 2 0 94 6 3368 0 9 256 4 426 13 70 81 10 1764 2 2 0 96 7 2867 0 13 269 3 326 18 53 37 19 1252 5 1 0 94 March 4, 2026 at 01:46:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2170 100 102 0 0 2 0 0 0 1 0 99 1 0 0 465 218 101 4 0 0 2 0 0 0 1 0 99 2 0 0 0 92 2 45 1 2 0 0 1080 0 0 0 99 3 0 0 4 381 152 104 0 0 0 0 594 0 0 0 100 4 2 0 21 84 4 6 1 0 0 0 828 0 0 0 100 5 44 0 0 91 7 14 0 0 0 0 9 0 0 0 100 6 0 0 0 83 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 81 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:46:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 12 0 1 1 0 0 0 1 0 99 1 0 0 2 212 101 4 0 0 1 0 0 0 0 0 100 2 0 0 0 116 3 142 1 1 1 0 1080 0 0 0 100 3 0 0 5 309 152 106 0 1 1 0 594 0 0 0 100 4 0 0 21 11 5 8 0 1 0 0 825 0 0 0 100 5 0 0 0 21 8 14 0 0 1 0 9 0 0 0 100 6 0 0 0 12 2 4 0 0 1 0 0 0 0 0 100 7 0 0 0 11 3 4 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:46:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 100 102 0 17 84 0 0 0 1 0 99 1 0 0 2 251 101 84 0 18 75 0 0 0 0 0 100 2 0 0 0 149 1 215 0 12 65 0 1081 0 0 0 99 3 0 0 5 404 203 197 0 18 71 0 595 0 0 0 100 4 0 0 21 100 5 188 1 13 70 0 825 0 0 0 100 5 0 0 0 62 7 106 0 13 70 0 9 0 0 0 100 6 0 0 0 51 1 88 0 15 58 0 0 0 0 0 100 7 0 0 0 46 4 65 0 14 55 0 0 0 0 0 100 March 4, 2026 at 01:46:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3754 0 27 2622 100 939 32 182 131 72 4568 5 4 0 91 1 29277 0 149 851 102 1103 43 201 153 63 5842 13 9 0 78 2 1133 0 20 545 21 899 19 157 96 54 4271 3 3 0 95 3 1815 0 204 663 105 857 22 162 75 53 3981 3 3 0 94 4 2832 0 195 471 16 806 23 154 102 49 3611 4 5 0 91 5 3521 0 19 380 9 580 13 110 106 56 2812 4 3 0 93 6 4245 0 22 440 4 771 28 131 104 66 3024 4 2 0 93 7 10450 0 221 456 22 658 15 110 137 50 3016 5 4 0 91 March 4, 2026 at 01:46:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 49 2117 101 106 0 5 2 0 10 0 2 0 98 1 3 0 45 246 103 35 0 6 5 0 279 0 1 0 99 2 0 0 0 90 33 104 1 4 5 0 1104 0 1 0 99 3 13 0 18 232 104 18 1 4 1 0 609 0 0 0 100 4 21 0 7 37 5 31 1 2 0 0 582 0 0 0 100 5 4 0 0 42 10 26 0 3 0 0 23 0 0 0 100 6 46 0 0 36 5 20 2 2 0 0 26 0 0 0 99 7 2 0 0 67 21 49 0 3 0 0 12 0 0 0 100 March 4, 2026 at 01:46:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2169 100 118 0 2 2 0 0 0 2 0 98 1 0 0 17 284 102 6 0 1 0 0 266 0 0 0 100 2 0 0 462 17 2 36 1 0 2 0 1078 0 1 0 99 3 0 0 3 284 104 6 1 0 0 0 594 0 0 0 100 4 0 0 7 84 3 6 0 1 0 0 562 0 0 0 100 5 0 0 0 83 1 10 0 1 0 0 0 0 0 0 100 6 0 0 0 93 7 16 0 0 0 0 9 0 0 0 100 7 0 0 0 181 52 104 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:46:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 0 0 0 0 0 1 0 99 1 0 0 17 209 102 4 0 0 0 0 266 0 0 0 100 2 0 0 0 7 1 32 0 0 0 0 1078 0 0 0 100 3 0 0 3 212 104 6 0 0 0 0 594 0 0 0 100 4 0 0 7 11 4 6 1 0 0 0 560 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 22 7 16 0 0 0 0 9 0 0 0 100 7 0 0 0 107 51 103 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:46:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27387 0 46 2493 103 713 15 124 192 54 3082 9 7 0 84 1 5508 0 252 627 109 634 9 133 194 64 3603 4 3 0 93 2 706 0 5 400 2 639 6 119 124 45 3162 1 1 0 97 3 2585 0 340 611 177 613 6 119 139 72 4473 3 2 0 94 4 962 0 25 429 8 754 11 130 129 92 1720 1 2 0 97 5 831 0 21 322 3 492 3 109 145 41 1272 1 2 0 98 6 6973 0 31 321 10 487 6 116 83 37 1914 3 5 0 92 7 6724 0 118 406 33 537 9 87 193 43 2588 3 3 0 94 March 4, 2026 at 01:46:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1432 0 70 2324 100 499 23 76 31 8 1860 3 3 0 94 1 839 0 16 600 150 658 34 91 54 7 1842 4 2 0 94 2 438 0 7 301 4 596 19 66 18 4 2475 2 1 0 97 3 536 0 33 438 105 414 15 71 33 4 2168 2 1 0 97 4 474 0 7 191 3 328 10 47 28 2 1209 2 1 0 97 5 283 0 0 173 1 308 9 39 56 1 1795 2 1 0 97 6 749 0 0 280 3 438 16 54 24 3 1675 3 1 0 96 7 646 0 0 252 1 521 18 37 38 5 1374 2 1 0 97 March 4, 2026 at 01:46:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2172 100 108 0 0 2 0 0 0 2 0 98 1 0 0 478 315 151 107 0 1 2 0 266 0 1 0 99 2 0 0 0 84 2 34 1 0 0 0 1078 0 0 0 100 3 0 0 5 295 104 20 0 1 0 0 599 0 0 0 100 4 0 0 7 80 2 4 0 0 0 0 262 0 0 0 100 5 0 0 0 96 10 16 0 0 0 0 15 0 0 0 100 6 44 0 0 100 9 24 1 0 0 0 317 0 0 0 100 7 0 0 0 84 2 8 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:46:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 122 0 2 0 0 0 0 1 0 99 1 0 0 17 308 151 104 0 0 0 0 266 0 0 0 100 2 0 0 0 8 1 32 1 0 0 0 1079 0 0 0 100 3 0 0 4 214 104 6 0 0 0 0 595 0 0 0 100 4 0 0 7 7 2 2 1 0 0 0 259 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 23 8 18 0 1 0 0 309 0 0 0 100 7 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:46:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 114 0 0 1 0 0 0 1 0 99 1 0 0 21 312 151 112 0 1 1 0 266 0 0 0 100 2 0 0 0 11 2 32 1 0 1 0 1077 0 0 0 100 3 0 0 7 213 104 8 0 1 0 0 593 0 0 0 100 4 0 0 7 10 3 2 0 0 1 0 259 0 0 0 100 5 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 6 0 0 0 24 8 16 0 0 1 0 308 0 0 0 100 7 0 0 0 13 3 4 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:46:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30914 0 143 2746 101 1095 34 185 150 65 4770 15 10 0 75 1 1814 0 209 860 111 1183 27 214 157 71 3992 4 3 0 93 2 2808 0 130 621 4 1135 16 167 208 64 6537 5 4 0 91 3 1117 0 81 879 167 1242 31 196 144 56 4045 5 3 0 92 4 833 0 37 551 3 930 24 179 163 37 3161 3 2 0 95 5 4894 0 16 432 3 743 29 133 217 37 3843 4 3 0 93 6 7284 0 199 597 39 918 18 169 235 62 3544 6 4 0 91 7 6770 0 13 497 9 838 21 137 161 79 2940 5 3 0 92 March 4, 2026 at 01:46:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2122 100 144 0 5 0 0 9 0 1 0 99 1 2 0 17 242 102 30 0 1 5 0 274 0 1 0 99 2 0 0 0 24 1 34 1 1 1 0 1095 0 0 0 100 3 0 0 17 225 104 10 1 2 0 0 612 0 0 0 100 4 19 0 77 24 6 16 0 2 4 0 272 0 1 0 99 5 0 0 7 26 1 10 0 3 0 0 4 0 0 0 100 6 10 0 0 31 3 14 1 0 0 0 320 0 0 0 100 7 44 0 0 101 37 84 0 1 0 0 13 0 0 0 100 March 4, 2026 at 01:46:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 101 216 0 1 0 0 21 0 1 0 99 1 0 0 479 220 102 6 0 0 3 0 266 0 1 0 99 2 0 0 0 86 2 42 1 2 2 0 1078 0 0 0 99 3 0 0 4 288 104 10 0 0 0 0 598 0 0 0 100 4 0 0 49 78 3 8 1 0 2 0 259 0 1 0 99 5 0 0 0 97 10 18 0 0 2 0 16 0 0 0 100 6 0 0 0 88 3 14 0 2 0 0 308 0 0 0 100 7 0 0 0 101 8 26 0 1 0 0 10 0 0 0 100 March 4, 2026 at 01:46:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 208 0 0 0 0 0 0 1 0 99 1 0 0 17 208 102 2 0 0 0 0 266 0 0 0 100 2 0 0 0 11 2 36 1 0 0 0 1080 0 0 0 100 3 0 0 3 212 104 6 0 0 0 0 594 0 0 0 100 4 0 0 7 9 3 4 0 0 0 0 259 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 7 0 0 0 23 8 20 0 1 0 0 12 0 0 0 100 March 4, 2026 at 01:46:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4703 0 142 2584 101 1026 34 177 136 76 4996 4 5 0 91 1 1944 0 22 787 106 1028 34 213 118 69 3869 5 3 0 92 2 2432 0 390 437 7 792 27 162 79 59 5334 4 3 0 93 3 2491 0 92 769 104 928 26 178 84 59 3738 3 2 0 95 4 2470 0 18 483 5 816 25 142 81 53 3045 6 2 0 92 5 29477 0 38 477 3 689 30 136 109 35 3353 12 8 0 79 6 8146 0 140 441 3 818 33 167 117 54 4101 4 4 0 91 7 5442 0 13 457 16 756 23 130 135 55 3450 4 3 0 93 March 4, 2026 at 01:46:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 7 2176 104 115 0 22 67 0 24 0 1 0 99 1 54 0 73 283 103 138 0 23 69 0 16 0 2 0 98 2 9 0 14 268 53 321 1 13 78 0 1364 0 1 0 99 3 0 0 18 355 183 257 1 17 68 0 612 0 0 0 99 4 0 0 7 75 3 100 0 18 78 0 268 0 0 0 100 5 3 0 0 69 1 99 0 12 58 0 9 0 0 0 100 6 24 0 0 86 2 130 1 19 91 0 310 0 0 0 100 7 0 0 0 68 2 96 0 18 71 0 11 0 0 0 100 March 4, 2026 at 01:46:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 101 66 0 1 0 0 0 0 1 0 99 1 0 0 17 258 107 18 0 1 2 0 9 0 0 0 99 2 0 0 245 115 31 138 2 1 3 0 1344 0 1 0 99 3 0 0 4 297 125 58 0 3 0 0 594 0 0 0 100 4 0 0 7 43 2 2 1 0 0 0 262 0 0 0 100 5 0 0 0 44 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 44 1 4 0 0 0 0 300 0 0 0 100 7 0 0 0 45 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:46:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 101 111 0 0 0 0 0 0 1 0 99 1 0 0 35 257 107 14 0 0 2 0 9 0 1 0 99 2 0 0 245 15 2 38 1 0 3 0 1345 0 1 0 99 3 0 0 7 270 112 26 0 0 0 0 599 0 0 0 100 4 0 0 7 78 18 36 0 1 0 0 259 0 0 0 100 5 0 0 0 112 34 68 0 1 1 0 14 0 0 0 100 6 0 0 0 53 1 18 0 1 0 0 307 0 0 0 100 7 0 0 0 53 2 12 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:46:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3159 0 142 2176 101 248 3 34 61 26 789 1 3 0 97 1 2224 0 22 316 109 188 4 31 57 28 697 1 1 0 98 2 2132 0 23 102 2 185 3 33 33 23 1957 0 1 0 98 3 425 0 13 303 105 135 1 24 25 23 902 0 0 0 99 4 42 0 17 88 2 155 1 35 27 24 587 0 0 0 100 5 133 0 3 171 51 188 2 19 7 17 1686 0 0 0 99 6 32 0 9 92 1 122 2 29 12 15 647 0 1 0 99 7 22 0 11 74 1 110 0 24 33 12 269 0 1 0 99 March 4, 2026 at 01:46:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1814 0 192 2561 103 927 23 150 85 44 3039 3 4 0 92 1 2140 0 187 748 107 991 26 168 77 37 4018 5 3 0 92 2 8242 0 216 427 4 772 22 108 117 56 5436 9 4 0 87 3 32418 0 111 874 137 955 44 158 133 32 4408 14 10 0 77 4 1975 0 16 469 5 862 11 135 76 73 5091 6 2 0 92 5 1051 0 2 430 8 715 26 113 52 40 2319 3 1 0 96 6 666 0 5 402 3 670 22 109 70 33 2479 3 1 0 96 7 495 0 2 321 6 463 9 67 53 18 1836 2 1 0 97 March 4, 2026 at 01:46:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2228 109 192 0 14 80 0 9 0 2 0 98 1 0 0 465 288 101 129 0 18 64 0 0 0 1 0 99 2 2 0 14 123 2 111 1 9 69 0 1347 0 1 0 99 3 0 0 4 480 211 303 0 19 68 0 0 0 1 0 99 4 0 0 7 133 5 102 1 18 56 0 856 0 0 0 99 5 0 0 0 121 2 84 0 11 63 0 0 0 0 0 100 6 0 0 0 129 1 100 0 12 66 0 300 0 0 0 100 7 0 0 0 115 0 76 0 14 67 0 0 0 0 0 100 March 4, 2026 at 01:46:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 108 126 0 0 1 0 9 0 1 0 99 1 0 0 3 216 102 14 0 1 1 0 2 0 0 0 100 2 0 0 14 9 2 36 1 0 0 0 1347 0 1 0 99 3 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 4 0 0 7 15 6 10 0 0 0 0 854 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 301 0 0 0 100 7 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 108 128 0 0 0 0 9 0 1 0 99 1 0 0 2 209 101 0 0 0 0 0 0 0 0 0 100 2 0 0 14 11 3 38 1 0 0 0 1349 0 1 0 99 3 0 0 5 309 151 106 0 0 0 0 5 0 0 0 100 4 0 0 7 15 5 10 1 0 0 0 661 0 0 0 100 5 0 0 0 24 10 18 0 1 2 0 209 0 0 0 100 6 0 0 0 14 2 12 0 0 0 0 308 0 0 0 100 7 0 0 0 11 0 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27864 0 138 2628 108 1020 27 189 89 63 3938 12 10 0 79 1 1834 0 19 860 121 1168 33 209 120 51 7086 4 4 0 92 2 4333 0 50 608 7 987 29 154 115 46 4807 6 4 0 90 3 3079 0 76 816 129 1003 37 173 165 31 4255 6 3 0 91 4 9497 0 300 527 7 971 28 145 159 65 4999 7 5 0 88 5 8289 0 206 550 3 856 27 147 126 74 3366 5 4 0 91 6 792 0 24 570 2 1125 22 187 76 82 3871 3 2 0 95 7 1205 0 6 543 0 952 24 122 117 70 3097 4 2 0 95 March 4, 2026 at 01:46:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 55 0 70 2121 106 118 0 6 6 0 18 0 2 0 98 1 18 0 3 335 152 117 0 3 1 0 25 0 0 0 100 2 3 0 14 29 3 40 1 2 1 0 1360 0 1 0 99 3 2 0 25 231 103 21 1 2 6 0 273 0 1 0 99 4 2 0 0 32 4 18 0 2 0 0 304 0 0 0 100 5 0 0 0 34 2 19 0 2 0 0 314 0 0 0 100 6 0 0 0 26 1 10 0 1 0 0 318 0 0 0 100 7 21 0 7 25 1 8 0 2 0 0 9 0 0 0 100 March 4, 2026 at 01:46:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2211 108 187 0 17 68 0 9 0 2 0 98 1 0 0 3 420 149 195 0 18 68 0 2 0 0 0 100 2 0 0 14 107 5 113 1 11 51 0 1347 0 1 0 99 3 0 0 361 311 162 195 0 10 60 0 267 0 1 0 99 4 0 0 0 112 3 102 0 23 79 0 305 0 0 0 100 5 0 0 0 112 3 102 0 15 77 0 301 0 0 0 100 6 0 0 0 107 1 93 0 15 87 0 300 0 0 0 100 7 0 0 0 96 0 74 0 17 59 0 0 0 0 0 100 March 4, 2026 at 01:46:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2121 108 127 0 1 0 0 9 0 1 0 99 1 0 0 2 225 101 0 0 0 0 0 0 0 0 0 100 2 0 0 14 87 33 98 1 1 0 0 1347 0 0 0 99 3 0 0 12 226 103 4 0 0 0 0 259 0 0 0 100 4 0 0 0 28 3 6 0 0 0 0 294 0 0 0 100 5 0 0 0 30 2 14 0 1 0 0 300 0 0 0 100 6 0 0 0 64 20 44 0 1 0 0 300 0 0 0 100 7 0 0 0 23 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1275 0 214 2374 110 529 9 93 50 51 1864 1 2 0 96 1 1325 0 139 482 103 522 7 105 47 58 1529 1 2 0 97 2 4787 0 27 256 3 460 11 79 115 48 3723 2 2 0 96 3 17877 0 60 505 105 360 14 82 75 32 2348 8 4 0 88 4 698 0 24 266 10 438 9 89 76 56 3035 2 2 0 97 5 1111 0 118 255 9 414 5 83 63 51 1673 1 1 0 98 6 1229 0 20 341 45 474 3 70 48 49 3493 2 2 0 96 7 242 0 10 247 1 369 2 62 20 42 1178 1 1 0 98 March 4, 2026 at 01:46:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 666 0 70 2405 102 656 13 94 56 7 1605 2 3 0 95 1 1321 0 10 540 103 558 20 93 58 5 2220 3 2 0 95 2 585 0 14 284 3 528 29 72 62 7 2984 2 2 0 96 3 17839 0 238 508 102 539 23 85 41 13 2581 6 6 0 87 4 5160 0 14 357 9 480 25 84 77 6 2355 6 2 0 93 5 1225 0 1 310 10 525 14 73 60 23 1998 3 1 0 95 6 1408 0 2 348 2 615 21 92 48 18 2804 5 2 0 93 7 311 0 0 353 20 665 19 74 28 11 1823 2 1 0 97 March 4, 2026 at 01:46:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 101 194 0 2 3 0 0 0 2 0 98 1 0 0 469 229 103 14 0 0 3 0 2 0 1 0 99 2 2 0 14 101 11 56 0 2 1 0 1344 0 1 0 99 3 1 0 14 282 103 6 0 1 0 0 262 0 0 0 100 4 0 0 0 87 4 4 0 0 1 0 294 0 0 0 100 5 0 0 0 84 3 4 0 0 1 0 300 0 0 0 100 6 0 0 0 86 2 6 0 0 1 0 300 0 0 0 100 7 44 0 0 96 7 22 0 1 2 0 9 0 0 0 100 March 4, 2026 at 01:46:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 101 187 0 11 65 0 0 0 1 0 99 1 0 0 3 249 102 85 0 17 86 0 0 0 0 0 100 2 0 0 14 106 33 165 1 7 66 0 1344 0 0 0 99 3 0 0 11 355 184 254 0 17 50 0 259 0 0 0 100 4 0 0 0 67 4 115 1 21 101 0 294 0 0 0 100 5 0 0 0 59 3 105 0 14 62 0 301 0 0 0 100 6 0 0 0 54 1 97 0 19 65 0 300 0 0 0 100 7 0 0 0 52 6 83 0 13 61 0 9 0 0 0 100 March 4, 2026 at 01:46:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 114 0 0 0 0 0 0 1 0 99 1 0 0 3 213 103 4 0 0 0 0 2 0 0 0 100 2 0 0 14 9 2 36 1 0 0 0 1343 0 0 0 100 3 0 0 11 225 111 20 0 0 0 0 260 0 0 0 100 4 0 0 0 97 46 93 0 2 0 0 295 0 0 0 100 5 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 301 0 0 0 100 7 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:46:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1761 0 21 2639 101 1052 27 190 91 66 3450 4 4 0 93 1 27630 0 63 864 103 1257 42 228 82 78 4539 11 9 0 80 2 1222 0 21 528 5 894 17 160 121 38 3782 3 3 0 95 3 5660 0 71 693 104 864 35 156 95 49 4874 7 3 0 90 4 6579 0 146 520 22 753 36 132 105 46 4586 6 3 0 90 5 4993 0 6 420 12 652 16 120 111 49 4693 4 2 0 94 6 6236 0 200 559 21 898 28 161 92 79 3597 7 3 0 90 7 2834 0 313 413 7 793 13 136 113 69 3472 4 3 0 94 March 4, 2026 at 01:46:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 101 88 0 4 1 0 9 0 1 0 99 1 28 0 87 223 104 14 0 1 6 0 279 0 1 0 99 2 0 0 0 30 2 45 1 2 7 0 1099 0 1 0 99 3 0 0 24 230 103 18 0 2 0 0 9 0 0 0 100 4 1 0 7 31 4 17 0 4 3 0 578 0 0 0 100 5 0 0 0 53 2 36 0 2 0 0 308 0 0 0 100 6 46 0 0 134 55 121 0 3 0 0 324 0 0 0 100 7 30 0 0 32 5 12 0 0 0 0 21 0 0 0 100 March 4, 2026 at 01:46:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 101 156 0 1 0 0 0 0 1 0 99 1 2 0 59 280 103 6 2 0 2 0 392 1 1 0 98 2 0 0 462 16 1 36 1 0 2 0 1078 0 1 0 99 3 0 0 3 284 102 6 0 1 0 0 0 0 0 0 100 4 0 0 7 86 5 10 0 1 0 0 554 0 0 0 100 5 0 0 0 83 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 121 21 42 0 0 0 0 309 0 0 0 100 7 0 0 0 114 18 38 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:46:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 101 269 0 12 52 0 0 0 1 0 99 1 0 0 16 266 104 113 0 16 102 0 268 0 0 0 100 2 0 0 0 46 1 117 0 16 63 0 1078 0 0 0 99 3 0 0 5 308 160 197 0 19 63 0 0 0 0 0 100 4 0 0 7 65 5 117 0 19 94 0 553 0 0 0 100 5 0 0 0 41 1 71 0 10 58 0 300 0 0 0 100 6 0 0 0 59 7 93 0 9 77 0 309 0 0 0 100 7 0 0 0 37 0 63 0 9 45 0 0 0 0 0 100 March 4, 2026 at 01:46:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1416 0 9 2636 102 1164 16 180 102 99 3026 2 3 0 95 1 1224 0 32 741 104 976 23 175 80 72 5009 3 2 0 95 2 2209 0 189 447 2 802 24 137 75 56 3858 3 2 0 94 3 26544 0 64 660 103 781 22 131 65 41 3526 10 8 0 82 4 1365 0 47 443 17 715 22 124 65 36 3457 4 3 0 94 5 3823 0 114 329 2 552 19 95 101 44 4440 3 3 0 94 6 7650 0 197 464 8 855 15 149 119 65 3909 4 4 0 92 7 10374 0 171 549 0 774 23 129 114 65 3255 6 4 0 91 March 4, 2026 at 01:46:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 273 0 0 2147 101 197 7 19 8 1 162 1 1 0 98 1 288 0 17 250 106 56 2 11 16 1 471 1 0 0 99 2 239 0 0 57 2 94 5 17 20 0 1431 2 1 0 97 3 326 0 46 249 104 55 5 14 4 0 491 0 0 0 99 4 51 0 7 38 5 24 0 4 0 0 390 1 0 0 99 5 195 0 7 49 8 40 4 14 4 0 446 1 0 0 99 6 511 0 0 82 24 64 0 7 15 1 200 0 0 0 99 7 150 0 70 67 13 73 7 9 14 2 440 2 1 0 96 March 4, 2026 at 01:46:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 101 212 0 0 0 0 0 0 1 0 99 1 0 0 17 285 103 4 0 0 0 0 266 0 0 0 100 2 0 0 462 16 1 36 0 0 3 0 1079 0 1 0 99 3 0 0 4 282 103 4 0 0 0 0 0 0 0 0 100 4 0 0 7 95 10 18 0 0 0 0 565 0 0 0 100 5 0 0 0 81 1 4 0 1 0 0 300 0 0 0 100 6 0 0 0 82 0 6 0 2 0 0 0 0 0 0 100 7 0 0 42 80 1 16 0 1 2 0 300 0 1 0 99 March 4, 2026 at 01:46:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 220 0 1 2 0 0 0 1 0 99 1 0 0 16 213 104 6 0 0 1 0 268 0 0 0 100 2 0 0 0 11 2 34 1 0 1 0 1078 0 0 0 100 3 0 0 5 210 103 4 0 0 1 0 0 0 0 0 100 4 0 0 7 26 11 20 0 0 0 0 561 0 0 0 100 5 0 0 0 9 2 2 0 0 1 0 300 0 0 0 100 6 0 0 0 9 1 2 0 0 1 0 0 0 0 0 100 7 0 0 0 11 2 4 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:46:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 101 297 0 12 64 0 0 0 1 0 99 1 0 0 16 262 103 107 0 17 78 0 266 0 0 0 100 2 0 0 0 40 1 94 1 11 43 0 1077 0 1 0 99 3 0 0 5 308 164 200 0 14 65 0 5 0 0 0 100 4 0 0 7 61 10 95 1 15 67 0 573 0 0 0 100 5 0 0 0 51 1 85 1 10 75 0 300 0 0 0 100 6 0 0 0 58 1 106 0 20 80 0 0 0 0 0 100 7 0 0 0 44 1 75 1 14 62 0 300 0 0 0 100 March 4, 2026 at 01:46:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5339 0 211 2732 102 1062 43 219 123 71 4145 6 4 0 90 1 2532 0 213 884 109 1269 47 243 102 81 4590 6 3 0 90 2 3706 0 126 661 2 1027 29 176 120 82 6034 5 4 0 91 3 28329 0 218 845 128 1161 38 204 116 75 4639 11 9 0 79 4 1513 0 20 626 21 1089 33 218 95 53 4697 5 3 0 93 5 5472 0 21 572 4 984 27 159 126 65 3532 6 4 0 91 6 6502 0 33 551 3 1031 30 180 140 51 5423 5 4 0 91 7 3637 0 14 431 3 721 15 145 113 43 3227 6 2 0 92 March 4, 2026 at 01:46:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 100 74 0 1 0 0 7 0 1 0 99 1 2 0 87 231 108 28 0 1 7 0 305 0 1 0 99 2 0 0 0 46 3 66 1 1 6 0 1083 0 1 0 99 3 0 0 4 262 109 44 0 2 0 0 0 0 0 0 100 4 0 0 7 109 47 97 1 2 0 0 555 0 0 0 100 5 44 0 0 39 12 16 0 0 0 0 309 0 0 0 100 6 0 0 0 20 0 4 0 0 0 0 0 0 0 0 100 7 0 0 7 26 2 14 0 1 0 0 306 0 0 0 100 March 4, 2026 at 01:46:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 100 114 0 1 0 0 0 0 1 0 99 1 0 0 58 281 104 8 0 0 2 0 266 0 1 0 99 2 0 0 462 19 2 38 1 0 3 0 1082 0 1 0 99 3 0 0 5 281 102 4 0 1 0 0 0 0 0 0 100 4 1 0 7 187 56 108 0 0 0 0 555 0 0 0 100 5 0 0 0 92 7 16 0 1 0 0 310 0 0 0 100 6 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 81 1 4 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:46:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 114 0 0 0 0 0 0 1 0 99 1 0 0 16 213 104 6 0 0 0 0 266 0 0 0 100 2 0 0 0 11 1 36 0 0 0 0 1080 0 0 0 99 3 0 0 5 215 103 14 0 1 0 0 0 0 0 0 100 4 0 0 7 113 55 109 1 1 0 0 555 0 0 0 100 5 0 0 0 19 7 14 0 0 0 0 309 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:46:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6334 0 26 2745 101 1206 33 201 247 73 4819 4 7 0 89 1 1042 0 41 824 104 1147 32 237 147 72 3808 4 3 0 94 2 3457 0 12 644 4 981 23 168 249 45 4373 4 3 0 92 3 28855 0 71 843 161 920 36 164 892 27 4942 14 8 0 79 4 5100 0 573 621 48 1130 21 198 354 63 3980 3 4 0 92 5 34825 0 48 574 7 890 29 160 677 55 4067 13 10 0 77 6 32026 0 14 600 5 989 34 164 1016 40 3445 13 6 0 81 7 4503 0 179 433 2 765 19 131 208 56 4642 5 3 0 92 March 4, 2026 at 01:46:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 101 102 0 3 0 0 13 0 1 0 99 1 12 0 28 250 105 30 0 2 0 0 276 0 0 0 100 2 0 0 0 33 2 42 1 1 7 0 1100 0 1 0 99 3 48 0 35 232 106 15 0 3 1 0 19 0 0 0 100 4 21 0 70 78 32 66 0 1 7 0 312 0 1 0 99 5 21 0 7 75 26 56 0 2 1 0 567 0 0 0 100 6 21 0 0 29 1 11 0 2 0 0 17 0 0 0 100 7 0 0 0 29 1 10 0 3 0 0 304 0 0 0 100 March 4, 2026 at 01:46:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 100 117 0 0 0 0 7 0 1 0 99 1 1 0 16 274 106 22 0 0 0 0 281 0 0 0 100 2 0 0 0 62 1 36 1 1 2 0 1087 0 0 0 100 3 0 0 348 224 108 18 0 0 4 0 9 0 1 0 99 4 0 0 14 68 5 14 0 1 3 0 296 0 1 0 99 5 0 0 7 72 10 10 2 1 0 0 562 0 0 0 100 6 0 0 0 155 48 101 0 2 0 0 0 0 0 0 100 7 0 0 0 64 1 12 0 0 0 0 305 0 0 0 100 March 4, 2026 at 01:46:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 100 124 0 1 0 0 0 0 1 0 99 1 0 0 16 232 104 6 0 0 0 0 266 0 0 0 100 2 0 0 0 28 1 34 1 0 1 0 1088 0 0 0 100 3 0 0 124 223 108 16 0 0 2 0 9 0 0 0 100 4 0 0 14 32 4 10 0 0 0 0 294 0 0 0 100 5 0 0 7 30 2 6 1 1 1 0 559 0 0 0 100 6 0 0 0 126 50 102 0 0 0 0 0 0 0 0 100 7 0 0 0 28 1 2 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:46:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4821 0 19 2238 100 319 3 49 83 29 1247 1 3 0 96 1 3643 0 48 419 104 210 4 35 51 31 1017 1 1 0 98 2 418 0 10 156 2 275 5 48 28 40 1648 0 1 0 99 3 318 0 16 357 109 230 3 37 27 30 2055 1 1 0 99 4 962 0 131 138 6 237 3 50 20 36 910 1 1 0 99 5 692 0 19 131 4 182 4 34 30 25 1617 2 1 0 97 6 1877 0 187 210 50 290 5 39 26 33 639 2 1 0 97 7 185 0 5 136 2 193 0 28 28 28 806 0 1 0 99 March 4, 2026 at 01:46:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7586 0 368 2566 103 884 25 153 160 45 3719 5 6 0 89 1 5107 0 38 831 106 1034 33 169 174 44 3927 5 3 0 92 2 1165 0 7 471 2 927 31 160 177 36 4854 5 3 0 93 3 997 0 79 837 176 1066 26 185 120 30 3152 5 2 0 93 4 697 0 9 553 40 958 24 175 157 34 2798 3 3 0 95 5 991 0 17 349 6 605 10 108 146 34 2832 2 2 0 96 6 26747 0 10 503 2 816 31 160 136 19 2989 10 8 0 82 7 465 0 7 395 16 641 10 103 115 27 2306 2 1 0 96 March 4, 2026 at 01:46:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2170 100 10 0 2 2 0 0 0 2 0 98 1 4 0 16 294 107 14 0 1 0 0 269 0 0 0 99 2 0 0 0 83 1 32 1 0 0 0 1086 0 0 0 99 3 0 0 5 293 106 14 0 2 0 0 0 0 0 0 100 4 0 0 462 69 27 57 0 2 2 0 297 0 1 0 99 5 0 0 7 133 24 58 0 1 0 0 262 0 0 0 100 6 0 0 0 183 1 106 0 1 0 0 1 0 0 0 100 7 44 0 0 92 7 14 1 0 0 0 608 0 0 0 100 March 4, 2026 at 01:46:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 18 0 0 0 0 28 0 1 0 99 1 0 0 16 320 155 121 0 1 0 0 281 0 0 0 100 2 0 0 0 11 3 36 0 0 0 0 1090 0 0 0 100 3 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 4 0 0 0 15 4 12 0 0 0 0 294 0 0 0 100 5 3 0 7 13 6 2 1 0 0 0 259 0 0 0 100 6 0 0 0 107 0 102 0 0 0 0 0 0 0 0 100 7 0 0 0 26 8 22 0 0 0 0 615 0 0 0 100 March 4, 2026 at 01:46:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 10 0 0 0 0 0 0 1 0 99 1 0 0 17 310 153 106 0 0 0 0 266 0 0 0 100 2 0 0 0 14 3 40 1 0 0 0 1096 0 0 0 100 3 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 4 0 0 0 15 5 10 0 0 0 0 296 0 0 0 100 5 0 0 7 10 1 8 0 0 0 0 277 0 0 0 100 6 0 0 0 112 0 114 0 2 0 0 0 0 0 0 100 7 0 0 0 22 8 16 1 0 0 0 608 0 0 0 100 March 4, 2026 at 01:46:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4246 0 123 2778 101 1244 59 261 124 74 4385 5 4 0 91 1 1915 0 30 940 127 1374 52 273 102 64 5487 5 3 0 92 2 2952 0 27 641 3 1038 40 183 93 56 4625 5 3 0 92 3 4661 0 265 826 110 1033 56 216 100 56 4438 7 4 0 89 4 8781 0 313 564 6 995 34 203 138 74 4902 8 5 0 87 5 5198 0 50 598 4 1014 38 188 144 72 5124 5 4 0 91 6 27613 0 24 631 3 1138 43 212 97 54 4245 11 8 0 80 7 1309 0 17 598 22 1005 37 169 82 65 4697 4 3 0 94 March 4, 2026 at 01:46:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 7 2158 100 92 0 15 75 0 13 0 1 0 99 1 21 0 16 326 107 219 2 17 60 0 1378 0 1 0 99 2 0 0 0 79 2 120 0 17 92 0 27 0 0 0 100 3 0 0 19 334 158 118 0 21 87 0 10 0 0 0 100 4 0 0 0 122 28 151 0 17 98 0 324 0 0 0 99 5 5 0 77 132 21 164 0 22 91 0 276 0 2 0 98 6 24 0 0 125 0 141 0 17 63 0 10 0 1 0 99 7 46 0 0 93 15 114 2 16 62 0 628 1 0 0 99 March 4, 2026 at 01:46:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 100 14 0 0 0 0 0 0 1 0 99 1 0 0 24 294 105 50 1 2 0 0 1356 0 1 0 99 2 0 0 0 78 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 281 102 2 0 0 0 0 0 0 0 0 100 4 0 0 0 87 4 8 0 0 0 0 294 0 0 0 100 5 0 0 49 112 19 38 1 0 2 0 262 0 1 0 99 6 0 0 462 115 0 104 0 0 2 0 0 0 1 0 99 7 0 0 0 159 40 83 0 2 0 0 608 0 0 0 100 March 4, 2026 at 01:46:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 16 0 0 0 0 7 0 1 0 99 1 0 0 16 265 126 92 0 2 1 0 1367 0 0 0 99 2 0 0 0 10 0 12 0 2 1 0 0 0 0 0 100 3 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 4 0 0 0 63 28 61 0 2 0 0 296 0 0 0 100 5 0 0 7 11 6 2 0 0 0 0 259 0 0 0 100 6 0 0 0 108 0 102 0 0 0 0 0 0 0 0 100 7 0 0 0 42 16 38 0 0 0 0 614 0 0 0 100 March 4, 2026 at 01:47:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1279 0 17 2386 102 473 4 102 83 53 1474 2 2 0 96 1 17525 0 27 490 106 518 12 102 242 57 3433 7 4 0 89 2 315 0 18 241 6 388 1 79 46 38 2838 1 1 0 98 3 26027 0 30 478 103 292 12 67 312 20 2086 9 5 0 86 4 6168 0 376 317 43 524 10 89 104 63 2601 2 6 0 92 5 3138 0 35 218 4 338 5 75 120 45 1857 2 2 0 97 6 2530 0 29 379 3 599 5 105 55 61 1904 2 2 0 96 7 2544 0 142 326 8 443 10 73 68 54 3403 4 2 0 94 March 4, 2026 at 01:47:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 959 0 35 2491 100 797 30 128 78 15 2447 4 3 0 93 1 9713 0 23 668 131 824 29 149 61 17 3649 5 5 0 90 2 512 0 0 342 15 510 20 97 53 7 1309 2 1 0 97 3 1245 0 40 536 106 592 27 119 44 13 2480 5 2 0 93 4 1284 0 0 301 9 514 17 83 63 15 1812 2 2 0 96 5 3274 0 186 251 4 460 17 59 66 7 2089 3 2 0 95 6 5552 0 14 374 3 547 24 97 95 13 2923 6 2 0 92 7 696 0 38 281 6 516 17 84 47 22 2167 2 2 0 96 March 4, 2026 at 01:47:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2225 106 194 0 11 87 0 9 0 2 0 98 1 2 0 479 311 104 222 1 18 69 0 1347 0 1 0 99 2 0 0 0 226 50 193 0 14 67 0 0 0 1 0 99 3 0 0 4 391 159 107 0 12 79 0 0 0 1 0 99 4 0 0 0 136 6 263 0 18 79 0 625 0 0 0 99 5 0 0 7 127 2 92 1 17 65 0 262 0 0 0 100 6 0 0 0 113 1 65 0 14 65 0 300 0 0 0 100 7 0 0 0 119 1 79 1 11 64 0 300 0 0 0 100 March 4, 2026 at 01:47:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 106 120 0 2 0 0 11 0 1 0 99 1 0 0 16 241 117 64 0 1 0 0 1351 0 0 0 99 2 0 0 0 91 39 85 0 1 0 0 0 0 0 0 100 3 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 4 0 0 0 19 7 12 0 0 0 0 299 0 0 0 100 5 0 0 7 9 2 6 0 0 0 0 260 0 0 0 100 6 0 0 0 15 3 12 0 0 0 0 304 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 106 119 0 0 0 0 17 0 1 0 99 1 0 0 16 323 155 150 1 0 0 0 1359 0 0 0 99 2 0 0 0 18 2 12 0 0 0 0 2 0 0 0 100 3 0 0 5 208 102 2 0 0 0 0 0 0 0 0 100 4 0 0 0 16 4 13 0 1 0 0 294 0 0 0 100 5 0 0 7 18 7 6 0 0 0 0 259 0 0 0 100 6 0 0 0 14 1 14 0 1 0 0 299 0 0 0 100 7 0 0 0 12 1 10 0 1 0 0 305 0 0 0 100 March 4, 2026 at 01:47:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2621 0 307 2809 105 1411 32 234 122 73 4692 5 4 0 91 1 1603 0 19 948 119 1317 50 214 118 75 6464 6 3 0 91 2 28013 0 25 768 7 1215 39 164 114 54 4892 15 8 0 77 3 1756 0 234 816 119 1178 32 175 73 60 4186 4 3 0 93 4 3090 0 195 543 8 957 30 170 125 52 4444 6 5 0 89 5 3915 0 13 499 4 836 21 148 128 59 3736 4 3 0 93 6 7438 0 27 548 5 1002 29 169 181 59 4823 4 4 0 91 7 8416 0 38 503 10 735 30 115 115 61 3510 5 3 0 92 March 4, 2026 at 01:47:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 101 110 0 1 1 0 10 0 1 0 99 1 3 0 3 232 103 44 0 2 8 0 1083 0 1 0 99 2 0 0 0 28 0 12 0 1 0 0 16 0 0 0 100 3 2 0 39 239 111 26 2 3 0 0 548 0 0 0 100 4 44 0 0 124 50 112 0 4 0 0 329 0 0 0 100 5 18 0 0 32 4 16 1 1 0 0 12 0 0 0 100 6 28 0 7 24 1 11 0 3 1 0 325 0 0 0 100 7 24 0 70 14 1 6 0 1 6 0 310 0 1 0 99 March 4, 2026 at 01:47:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2202 100 158 0 13 71 0 0 0 2 0 98 1 0 0 464 334 103 254 1 20 74 0 1078 0 1 0 99 2 0 0 0 130 1 97 0 15 63 0 0 0 0 0 100 3 1 0 26 399 166 112 1 20 101 0 524 0 1 0 99 4 0 0 0 249 57 234 0 19 93 0 303 0 1 0 99 5 0 0 0 122 4 78 0 15 58 0 0 0 0 0 100 6 0 0 0 142 2 120 0 18 81 0 302 0 0 0 99 7 0 0 0 121 1 80 0 9 71 0 300 0 1 0 99 March 4, 2026 at 01:47:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 102 0 0 0 0 0 0 1 0 99 1 0 0 7 216 104 36 1 0 0 0 1079 0 0 0 100 2 0 0 0 16 0 10 0 0 0 0 0 0 0 0 100 3 0 0 28 215 104 16 0 1 0 0 525 0 0 0 100 4 0 0 0 24 9 16 0 0 0 0 303 0 0 0 100 5 0 0 0 110 52 104 0 0 0 0 0 0 0 0 100 6 0 0 0 11 1 6 0 0 0 0 300 0 0 0 100 7 0 0 0 9 1 4 1 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10872 0 40 2573 101 761 14 139 117 51 3823 6 4 0 89 1 3856 0 28 746 105 849 20 167 100 80 4682 3 3 0 94 2 28610 0 320 405 2 699 26 124 88 67 3245 11 9 0 81 3 2652 0 376 651 117 863 14 158 77 80 3356 2 3 0 95 4 800 0 18 440 12 755 13 136 54 72 3714 3 2 0 95 5 467 0 6 422 44 658 16 119 64 45 2002 2 1 0 97 6 1085 0 13 354 3 571 17 109 98 49 3813 3 2 0 95 7 4669 0 14 335 2 515 16 101 84 35 2445 2 2 0 95 March 4, 2026 at 01:47:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 505 0 0 2309 101 494 20 78 39 4 1224 2 2 0 97 1 602 0 9 401 103 371 23 71 26 1 2414 2 1 0 97 2 311 0 70 171 3 303 20 61 24 2 1112 3 2 0 95 3 219 0 54 371 106 304 19 58 14 0 1427 4 1 0 95 4 268 0 0 153 4 266 8 41 8 0 1378 2 1 0 98 5 557 0 0 152 4 276 17 46 25 2 842 1 1 0 98 6 871 0 0 277 4 449 9 61 55 7 1334 1 1 0 98 7 647 0 0 122 2 190 6 35 28 0 1207 1 1 0 98 March 4, 2026 at 01:47:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 100 211 0 2 0 0 0 0 1 0 99 1 0 0 7 288 103 36 1 0 1 0 1081 0 0 0 99 2 0 0 42 98 7 24 1 1 3 0 9 0 1 0 99 3 0 0 490 217 104 8 0 0 3 0 527 0 1 0 99 4 0 0 0 88 4 4 0 0 1 0 294 0 0 0 100 5 0 0 0 86 3 4 0 0 1 0 0 0 0 0 100 6 0 0 0 89 3 10 0 1 2 0 302 0 0 0 100 7 0 0 0 83 2 4 0 1 1 0 300 0 0 0 100 March 4, 2026 at 01:47:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 100 279 0 13 60 0 0 0 1 0 99 1 0 0 3 313 105 228 0 19 50 0 1082 0 1 0 99 2 0 0 0 69 5 110 0 16 75 0 8 0 0 0 100 3 3 0 25 314 162 107 0 20 62 0 531 0 1 0 99 4 0 0 0 63 5 109 0 22 83 0 305 0 0 0 100 5 0 0 0 51 2 85 0 17 59 0 0 0 0 0 100 6 0 0 0 56 1 101 0 18 75 0 300 0 0 0 100 7 0 0 0 48 1 89 0 13 56 0 300 0 0 0 100 March 4, 2026 at 01:47:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 0 0 0 0 0 1 0 99 1 0 0 7 219 103 44 1 1 0 0 1080 0 0 0 100 2 0 0 0 26 6 22 0 1 0 0 9 0 0 0 100 3 0 0 28 210 104 6 0 0 0 0 524 0 0 0 100 4 0 0 0 17 6 8 0 0 0 0 295 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 112 51 108 0 1 0 0 303 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7624 0 152 2675 102 1062 41 200 187 74 4160 5 5 0 90 1 8947 0 135 805 107 1137 37 202 126 72 6935 8 4 0 88 2 2070 0 26 571 8 972 43 179 102 74 4413 4 3 0 93 3 30066 0 309 740 108 991 45 202 114 74 4852 11 9 0 80 4 3829 0 200 590 15 920 26 163 100 58 3285 5 3 0 93 5 935 0 20 541 27 879 23 157 85 58 2573 3 2 0 95 6 1934 0 26 564 12 873 23 169 68 57 3980 4 3 0 94 7 1280 0 19 422 4 715 17 122 103 43 2969 4 2 0 93 March 4, 2026 at 01:47:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2108 100 106 0 0 5 0 0 0 2 0 98 1 0 0 7 226 102 38 1 1 5 0 1080 0 1 0 99 2 44 0 0 41 7 24 0 0 0 0 10 0 0 0 100 3 2 0 35 222 104 8 1 1 0 0 527 0 0 0 100 4 0 0 0 22 3 6 0 1 0 0 294 0 0 0 100 5 0 0 1 123 52 106 0 0 0 0 0 0 0 0 100 6 0 0 0 26 3 10 0 0 0 0 302 0 0 0 100 7 0 0 0 19 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2170 100 60 0 3 2 0 0 0 2 0 98 1 0 0 465 218 102 34 1 0 2 0 1081 0 1 0 99 2 0 0 0 151 6 72 0 1 0 0 9 0 0 0 100 3 0 0 24 325 123 56 0 2 1 0 526 0 0 0 100 4 0 0 0 85 4 8 0 1 0 0 295 0 0 0 100 5 0 0 0 143 33 64 0 0 0 0 0 0 0 0 100 6 0 0 0 84 2 8 0 0 0 0 300 0 0 0 100 7 0 0 0 80 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 100 168 0 14 53 0 0 0 1 0 99 1 0 0 2 311 102 233 1 18 69 0 1080 0 1 0 99 2 0 0 0 74 6 117 0 20 72 0 9 0 0 0 100 3 3 0 26 329 170 117 0 15 64 0 526 0 0 0 99 4 0 0 0 148 46 192 0 17 67 0 295 0 0 0 100 5 0 0 0 42 2 71 0 9 64 0 0 0 0 0 100 6 0 0 0 55 4 91 0 18 61 0 302 0 0 0 100 7 0 0 0 52 1 92 0 13 66 0 300 0 0 0 100 March 4, 2026 at 01:47:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 62 0 34 2185 100 241 0 25 985 18 281 0 2 0 98 1 671 0 12 287 102 166 1 31 101 26 1483 0 1 0 99 2 23 0 4 103 7 132 4 19 33 15 266 0 0 0 99 3 2357 0 29 281 104 115 3 23 47 14 1141 1 1 0 98 4 61 0 9 147 35 190 0 25 31 13 609 0 0 0 99 5 123 0 18 85 5 114 1 23 276 22 1730 0 4 0 96 6 31 0 2 143 29 189 2 27 28 18 641 0 0 0 99 7 809 0 128 60 1 133 1 27 694 19 708 0 1 0 98 March 4, 2026 at 01:47:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 56 2109 100 60 0 0 5 0 8 0 2 0 98 1 0 0 2 224 102 38 1 0 5 0 743 0 1 0 99 2 0 0 0 71 0 58 0 1 0 0 0 0 0 0 100 3 0 0 26 220 104 6 0 0 0 0 523 0 0 0 100 4 0 0 0 21 2 6 0 0 0 0 294 0 0 0 100 5 0 0 7 29 9 8 0 2 1 0 0 0 0 0 100 6 0 0 0 158 68 151 0 1 0 0 334 0 0 0 100 7 0 0 0 42 8 36 1 2 1 0 307 0 0 0 100 March 4, 2026 at 01:47:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2170 100 12 0 2 2 0 0 0 1 0 99 1 0 0 457 262 121 86 1 2 2 0 743 0 1 0 99 2 0 0 0 184 0 108 0 0 0 0 0 0 0 0 100 3 0 0 26 279 104 6 0 0 0 0 525 0 0 0 100 4 0 0 0 79 2 4 0 1 0 0 294 0 0 0 100 5 0 0 0 81 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 125 23 52 0 2 0 0 320 0 0 0 100 7 0 0 0 132 28 56 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 4 0 0 1 0 0 0 1 0 99 1 0 0 2 310 151 132 1 0 1 0 744 0 0 0 100 2 0 0 0 115 1 108 0 0 1 0 0 0 0 0 100 3 0 0 26 209 104 6 0 0 1 0 523 0 0 0 100 4 0 0 0 13 4 4 0 0 1 0 294 0 0 0 100 5 0 0 0 13 3 6 0 0 1 0 0 0 0 0 100 6 0 0 0 58 25 54 0 1 0 0 323 0 0 0 100 7 0 0 0 9 2 2 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:47:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 100 68 0 14 64 0 0 0 1 0 99 1 0 0 2 301 104 211 0 17 54 0 742 0 0 0 99 2 0 0 0 144 0 165 0 10 38 0 0 0 0 0 100 3 0 0 26 305 158 91 1 14 45 0 525 0 0 0 100 4 0 0 0 114 33 148 0 15 58 0 294 0 0 0 100 5 0 0 0 78 19 109 0 12 53 0 0 0 0 0 100 6 0 0 0 96 22 131 1 13 54 0 320 0 0 0 100 7 0 0 0 45 1 82 0 12 59 0 300 0 0 0 100 March 4, 2026 at 01:47:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 82 0 1 0 0 2 0 1 0 99 1 0 0 3 212 102 32 1 0 1 0 743 0 0 0 100 2 0 0 0 15 0 10 0 1 1 0 0 0 0 0 100 3 0 0 25 252 111 50 0 1 1 0 523 0 0 0 100 4 0 0 0 63 29 59 0 2 0 0 295 0 0 0 100 5 0 0 0 14 5 6 0 0 0 0 0 0 0 0 100 6 0 0 0 94 41 92 0 1 0 0 329 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 304 0 0 0 100 March 4, 2026 at 01:47:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 33 1 3 1 0 8 0 1 0 99 1 0 0 3 212 102 32 1 0 0 0 743 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 1 0 0 0 100 3 0 0 25 209 104 6 0 0 0 0 525 0 0 0 100 4 0 0 0 14 4 8 1 0 0 0 295 0 0 0 100 5 0 0 0 17 8 10 0 1 0 0 10 0 0 0 100 6 0 0 0 123 55 118 1 0 0 0 327 0 0 0 100 7 0 0 0 130 20 128 0 2 0 0 301 0 0 0 100 March 4, 2026 at 01:47:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 1 0 99 1 0 0 3 210 102 32 0 0 0 0 744 0 0 0 100 2 0 0 0 19 2 16 0 0 0 0 10 0 0 0 100 3 0 0 24 211 104 8 0 0 0 0 524 0 0 0 100 4 0 0 0 13 3 10 0 1 0 0 294 0 0 0 100 5 0 0 0 11 2 8 0 0 0 0 18 0 0 0 100 6 0 0 0 21 6 14 0 0 0 0 304 0 0 0 100 7 0 0 0 143 68 139 1 2 0 0 318 0 0 0 100 March 4, 2026 at 01:47:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 0 0 0 0 0 1 0 99 1 0 0 3 212 102 32 1 0 0 0 742 0 0 0 100 2 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 3 0 0 25 209 104 6 1 0 0 0 523 0 0 0 100 4 0 0 0 14 4 8 0 1 0 0 295 0 0 0 100 5 0 0 0 12 2 10 0 1 0 0 0 0 0 0 100 6 0 0 0 98 44 94 1 1 0 0 300 0 0 0 100 7 0 0 0 64 29 58 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:47:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 106 0 0 3 0 0 0 1 0 99 1 0 0 2 213 102 34 1 0 0 0 743 0 0 0 100 2 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 3 1 0 26 211 105 8 0 0 0 0 529 0 0 0 100 4 0 0 0 12 3 6 0 1 0 0 305 0 0 0 100 5 0 0 0 12 2 10 0 0 2 0 0 0 0 0 100 6 0 0 0 115 53 113 0 1 2 0 302 0 0 0 100 7 0 0 0 50 22 46 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:47:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 102 0 0 0 0 0 0 1 0 99 1 0 0 3 212 102 32 1 0 1 0 743 0 0 0 100 2 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 3 0 0 25 210 104 6 0 0 0 0 525 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 78 33 78 0 1 0 0 300 0 0 0 100 7 0 0 0 86 40 82 0 1 0 0 320 0 0 0 100 March 4, 2026 at 01:47:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 110 0 0 0 0 7 0 1 0 99 1 0 0 3 297 144 120 1 1 0 0 766 0 0 0 100 2 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 3 0 0 25 209 104 6 0 0 0 0 523 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 5 0 0 0 24 9 20 0 0 0 0 14 0 0 0 100 6 0 0 0 18 3 16 0 0 0 0 307 0 0 0 100 7 0 0 0 72 29 70 1 1 0 0 320 0 0 0 100 March 4, 2026 at 01:47:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 1 0 99 1 0 0 3 275 134 96 0 0 0 0 744 0 0 0 100 2 0 0 0 48 17 44 0 1 0 0 0 0 0 0 100 3 0 0 25 209 104 6 1 0 0 0 524 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 8 1 0 0 0 300 0 0 0 100 7 0 0 0 48 21 44 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:47:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 1 1 0 0 0 1 0 99 1 0 0 7 215 102 38 1 1 1 0 742 0 0 0 100 2 0 0 0 112 50 104 0 0 1 0 0 0 0 0 100 3 0 0 28 210 104 6 0 0 1 0 525 0 0 0 100 4 0 0 0 13 4 6 0 1 0 0 294 0 0 0 100 5 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 6 0 0 0 18 4 10 0 0 1 0 302 0 0 0 100 7 0 0 0 52 22 44 0 1 1 0 320 0 0 0 100 March 4, 2026 at 01:47:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 112 0 0 2 0 0 0 1 0 99 1 0 0 2 261 124 90 1 1 1 0 743 0 0 0 100 2 0 0 0 59 27 54 0 1 1 0 0 0 0 0 100 3 0 0 26 209 104 6 0 0 0 0 523 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 12 2 10 0 0 1 0 0 0 0 0 100 6 0 0 0 14 2 12 0 0 1 0 300 0 0 0 100 7 0 0 0 50 22 46 0 0 1 0 320 0 0 0 100 March 4, 2026 at 01:47:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 1 0 99 1 0 0 3 310 151 132 1 0 0 0 743 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 25 209 104 6 0 0 0 0 525 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 295 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 6 0 0 0 16 4 12 0 0 0 0 303 0 0 0 100 7 0 0 0 48 21 44 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:47:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 119 0 0 0 0 28 0 1 0 99 1 0 0 3 217 104 36 0 0 0 0 743 0 0 0 100 2 0 0 0 104 49 101 0 2 0 0 1 0 0 0 100 3 0 0 25 213 104 12 1 1 1 0 524 0 0 0 100 4 0 0 0 13 4 8 0 0 0 0 295 0 0 0 100 5 0 0 0 24 10 18 1 0 1 0 14 0 0 0 100 6 0 0 0 17 2 12 1 0 0 0 305 0 0 0 100 7 0 0 0 52 21 48 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:47:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 1 0 99 1 0 0 2 212 102 32 1 0 0 0 743 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 3 0 0 26 211 104 8 0 1 2 0 523 0 0 0 100 4 0 0 0 14 3 16 0 1 0 0 294 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 10 0 0 0 0 302 0 0 0 100 7 0 0 0 48 21 42 1 0 0 0 320 0 0 0 100 March 4, 2026 at 01:47:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 114 0 0 0 0 0 0 1 0 99 1 0 0 2 212 102 32 1 0 0 0 743 0 0 0 100 2 0 0 0 105 50 101 0 1 0 0 0 0 0 0 100 3 3 0 26 212 104 6 2 0 1 0 663 1 0 0 99 4 0 0 0 12 4 6 0 0 0 0 295 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 7 0 0 0 45 20 40 0 0 0 0 319 0 0 0 100 March 4, 2026 at 01:47:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 3 211 102 32 0 0 0 0 744 0 0 0 100 2 0 0 0 105 50 101 0 1 0 0 0 0 0 0 100 3 0 0 25 209 104 6 0 0 0 0 523 0 0 0 100 4 0 0 0 12 3 6 0 0 1 0 294 0 0 0 100 5 0 0 0 18 3 20 0 1 0 0 1 0 0 0 100 6 0 0 0 16 3 12 0 0 0 0 302 0 0 0 100 7 0 0 0 51 22 46 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:47:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 119 150 0 1 0 0 20 0 1 0 99 1 0 0 3 212 102 32 1 0 0 0 742 0 0 0 100 2 0 0 0 67 31 60 0 0 0 0 0 0 0 0 100 3 0 0 25 247 123 46 1 1 0 0 525 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 2 8 0 1 1 0 0 0 0 0 100 6 0 0 0 16 2 16 1 1 0 0 300 0 0 0 100 7 0 0 0 9 2 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 120 158 0 1 0 0 27 0 1 0 99 1 0 0 2 212 102 32 1 0 2 0 743 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 26 224 111 20 0 0 0 0 524 0 0 0 100 4 0 0 0 58 26 52 1 1 0 0 294 0 0 0 100 5 0 0 0 61 28 56 0 1 0 0 13 0 0 0 100 6 0 0 0 18 3 14 0 0 0 0 307 0 0 0 100 7 0 0 0 11 1 6 1 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 120 152 0 0 0 0 20 0 1 0 99 1 0 0 7 212 102 32 1 0 0 0 743 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 28 210 104 6 0 0 0 0 524 0 0 0 100 4 0 0 0 11 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 110 52 104 0 0 0 0 0 0 0 0 100 6 0 0 0 15 2 12 0 1 0 0 300 0 0 0 100 7 0 0 0 11 1 8 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 120 160 0 1 2 0 20 0 1 0 99 1 0 0 2 211 102 32 0 0 1 0 743 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 26 209 104 6 0 0 1 0 524 0 0 0 100 4 0 0 0 12 4 4 0 0 1 0 294 0 0 0 100 5 0 0 0 111 53 106 0 0 1 0 1 0 0 0 100 6 0 0 0 16 4 12 0 1 0 0 302 0 0 0 100 7 0 0 0 11 2 4 0 0 2 0 300 0 0 0 100 March 4, 2026 at 01:47:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 120 150 0 0 0 0 20 0 1 0 99 1 0 0 7 212 102 32 1 0 1 0 743 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 28 213 105 8 1 0 0 0 528 0 0 0 100 4 0 0 0 12 3 8 0 2 0 0 305 0 0 0 100 5 0 0 0 74 33 68 0 0 0 0 0 0 0 0 100 6 0 0 0 53 21 48 1 1 0 0 300 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 119 152 0 0 1 0 20 0 1 0 99 1 0 0 3 215 102 40 1 1 0 0 742 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 25 209 104 6 0 0 0 0 524 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 295 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 116 54 113 0 1 0 0 303 0 0 0 100 7 0 0 0 9 1 2 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 120 148 0 2 0 0 27 0 1 0 99 1 0 0 3 223 102 42 0 2 1 0 744 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 0 0 25 213 104 12 1 1 0 0 524 0 0 0 100 4 0 0 0 13 4 8 0 0 0 0 295 0 0 0 100 5 0 0 0 22 9 16 0 0 0 0 13 0 0 0 100 6 0 0 0 78 33 74 0 0 0 0 305 0 0 0 100 7 0 0 0 49 20 46 0 2 0 0 300 0 0 0 100 March 4, 2026 at 01:47:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 120 150 0 0 0 0 20 0 1 0 99 1 0 0 3 211 102 32 1 0 1 0 744 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 24 209 104 6 0 0 0 0 525 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 6 0 0 0 15 3 10 0 0 0 0 302 0 0 0 100 7 0 0 0 107 51 103 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 120 156 0 0 0 0 20 0 1 0 99 1 0 0 2 211 102 32 0 0 0 0 742 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 26 221 109 18 1 1 0 0 523 0 0 0 100 4 0 0 0 62 27 58 0 2 0 0 295 0 0 0 100 5 0 0 0 48 21 44 0 1 0 0 0 0 0 0 100 6 0 0 0 13 2 8 1 0 0 0 300 0 0 0 100 7 0 0 0 11 3 8 0 2 2 0 300 0 0 0 100 March 4, 2026 at 01:47:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 120 150 0 0 0 0 20 0 1 0 99 1 0 0 7 212 102 32 1 0 0 0 744 0 0 0 100 2 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 3 0 0 28 210 104 6 0 0 0 0 525 0 0 0 100 4 0 0 0 13 3 6 0 0 0 0 294 0 0 0 100 5 0 0 0 116 52 116 0 1 0 0 0 0 0 0 100 6 0 0 0 16 3 10 0 0 0 0 302 0 0 0 100 7 0 0 0 12 2 6 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 120 152 0 1 0 0 20 0 1 0 99 1 0 0 7 212 102 32 1 0 0 0 742 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 28 210 104 6 0 0 0 0 523 0 0 0 100 4 0 0 0 11 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 110 52 104 0 0 0 0 0 0 0 0 100 6 0 0 0 14 2 8 0 0 0 0 300 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 120 155 0 0 0 0 25 0 1 0 99 1 0 0 3 213 102 32 1 0 0 0 742 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 25 209 104 6 0 0 0 0 525 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 5 0 0 0 31 14 20 0 0 1 0 13 0 0 0 100 6 0 0 0 114 51 115 0 3 0 0 307 0 0 0 100 7 0 0 0 14 1 10 0 1 2 0 300 0 0 0 100 March 4, 2026 at 01:47:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 120 158 0 1 0 0 20 0 1 0 99 1 0 0 3 211 102 32 0 0 0 0 744 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 25 210 104 6 1 0 0 0 524 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 109 1 1 0 0 300 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 120 152 0 1 0 0 20 0 1 0 99 1 0 0 2 212 102 32 1 0 1 0 743 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 26 209 104 6 0 0 1 0 523 0 0 0 100 4 0 0 0 12 4 4 0 0 1 0 294 0 0 0 100 5 0 0 0 11 3 4 0 0 1 0 0 0 0 0 100 6 0 0 0 114 53 110 0 0 1 0 302 0 0 0 100 7 0 0 0 9 2 2 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:47:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 122 160 0 0 1 0 20 0 1 0 99 1 0 0 2 216 103 40 0 1 1 0 743 0 0 0 100 2 0 0 0 7 1 2 0 1 0 0 0 0 0 0 100 3 0 0 26 212 105 10 0 1 1 0 525 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 294 0 0 0 100 5 0 0 0 13 3 10 0 1 0 0 0 0 0 0 100 6 0 0 0 115 52 113 0 2 0 0 299 0 0 0 100 7 0 0 0 13 3 8 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 120 150 0 0 0 0 20 0 1 0 99 1 0 0 3 213 102 34 1 1 1 0 742 0 0 0 100 2 0 0 0 7 0 4 0 1 1 0 0 0 0 0 100 3 0 0 24 209 104 6 0 0 0 0 523 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 295 0 0 0 100 5 0 0 0 11 3 8 0 1 0 0 1 0 0 0 100 6 0 0 0 78 35 72 0 0 0 0 303 0 0 0 100 7 0 0 0 46 20 42 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 121 160 0 0 0 0 48 0 1 0 99 1 0 0 3 212 102 32 1 0 1 0 744 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 25 210 104 6 1 0 0 0 525 0 0 0 100 4 0 0 0 13 4 8 0 0 0 0 295 0 0 0 100 5 0 0 0 25 10 18 0 0 1 0 15 0 0 0 100 6 0 0 0 32 9 28 1 1 0 0 305 0 0 0 100 7 0 0 0 97 44 94 0 2 0 0 300 0 0 0 100 March 4, 2026 at 01:47:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 120 150 0 0 0 0 20 0 1 0 99 1 0 0 3 210 102 32 0 0 0 0 742 0 0 0 100 2 0 0 0 13 2 10 0 0 0 0 10 0 0 0 100 3 0 0 24 212 104 16 0 1 0 0 524 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 2 8 0 0 0 0 18 0 0 0 100 6 0 0 0 14 3 10 0 0 0 0 302 0 0 0 100 7 0 0 0 107 51 103 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 120 154 0 0 0 0 20 0 1 0 99 1 0 0 3 211 102 32 1 0 0 0 744 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 24 211 104 8 0 0 0 0 524 0 0 0 100 4 0 0 0 15 4 12 0 1 0 0 295 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 7 0 0 0 107 51 103 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 120 150 0 0 0 0 20 0 1 0 99 1 0 0 2 211 102 32 1 0 0 0 742 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 25 211 105 8 0 0 0 0 525 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 10 0 0 0 0 302 0 0 0 100 7 0 0 0 111 52 107 1 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 120 152 0 0 0 0 20 0 1 0 99 1 0 0 3 210 102 32 0 0 1 0 743 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 24 210 104 6 1 0 0 0 523 0 0 0 100 4 0 0 0 15 3 10 0 0 0 0 294 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 6 0 0 0 14 2 8 1 0 0 0 300 0 0 0 100 7 0 0 0 107 51 105 0 2 1 0 300 0 0 0 100 March 4, 2026 at 01:47:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2149 120 210 0 1 0 0 25 0 1 0 99 1 0 0 3 212 102 32 1 0 0 0 743 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 25 209 104 6 0 0 0 0 524 0 0 0 100 4 0 0 0 13 3 8 0 0 0 0 294 0 0 0 100 5 0 0 0 25 10 20 0 1 1 0 12 0 0 0 100 6 0 0 0 18 3 14 0 0 0 0 307 0 0 0 100 7 0 0 0 58 25 54 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 120 250 0 0 0 0 20 0 1 0 99 1 0 0 3 213 102 32 2 0 1 0 744 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 25 209 104 6 0 0 0 0 524 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 120 251 0 1 0 0 20 0 1 0 99 1 0 0 2 211 102 32 0 0 1 0 742 0 0 0 100 2 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 3 0 0 26 209 104 6 0 0 1 0 524 0 0 0 100 4 0 0 0 12 4 4 0 0 1 0 294 0 0 0 100 5 0 0 0 13 3 6 0 0 1 0 0 0 0 0 100 6 0 0 0 18 4 18 0 1 1 0 302 0 0 0 100 7 0 0 0 11 2 2 1 0 1 0 300 0 0 0 100 March 4, 2026 at 01:48:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 120 250 0 0 0 0 20 0 1 0 99 1 0 0 3 212 102 32 1 0 0 0 743 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 25 209 104 6 1 0 0 0 525 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 15 3 12 0 0 0 0 1 0 0 0 100 6 0 0 0 15 2 10 1 0 1 0 300 0 0 0 100 7 0 0 0 14 2 14 0 1 1 0 300 0 0 0 100 March 4, 2026 at 01:48:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 120 250 0 0 0 0 20 0 1 0 99 1 0 0 3 213 103 34 0 0 0 0 746 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 25 209 104 6 0 0 0 0 523 0 0 0 100 4 0 0 0 16 6 10 0 0 0 0 299 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 1 0 0 0 100 6 0 0 0 17 4 14 0 0 0 0 304 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 120 214 0 4 1 0 24 0 1 0 99 1 0 0 3 219 102 38 1 2 0 0 742 0 0 0 100 2 0 0 0 9 1 8 0 1 0 0 1 0 0 0 100 3 0 0 25 209 104 6 0 0 0 0 525 0 0 0 100 4 0 0 0 15 4 11 0 1 0 0 295 0 0 0 100 5 1 0 0 22 11 12 0 0 0 0 13 0 0 0 100 6 0 0 0 16 2 12 0 0 0 0 305 0 0 0 100 7 0 0 0 58 23 54 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:48:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 120 210 1 0 0 0 20 0 1 0 99 1 0 0 2 227 109 46 1 1 0 0 744 0 0 0 100 2 0 0 0 34 13 30 0 2 1 0 1 0 0 0 100 3 0 0 26 214 104 16 0 1 0 0 523 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 18 5 16 0 1 0 0 304 0 0 0 100 7 0 0 0 8 1 2 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 120 154 0 0 0 0 20 0 1 0 99 1 0 0 3 211 102 32 0 0 0 0 742 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 25 210 104 6 1 0 0 0 525 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 295 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 15 3 10 1 0 0 0 301 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 120 0 0 0 0 5 0 1 0 99 1 0 0 3 240 116 62 1 1 0 0 758 0 0 0 100 2 0 0 0 105 50 101 0 1 0 0 0 0 0 0 100 3 0 0 25 211 104 8 0 1 0 0 523 0 0 0 100 4 0 0 0 14 3 12 0 1 1 0 294 0 0 0 100 5 0 0 0 13 2 10 0 0 0 0 0 0 0 0 100 6 0 0 0 16 3 12 0 0 0 0 302 0 0 0 100 7 0 0 0 12 2 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 110 0 0 0 0 0 0 1 0 99 1 0 0 3 252 122 72 1 0 0 0 763 0 0 0 100 2 0 0 0 105 50 101 0 1 0 0 0 0 0 0 100 3 0 0 25 210 104 6 0 0 0 0 525 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 294 0 0 0 100 5 0 0 0 12 2 10 0 1 0 0 0 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 116 0 0 0 0 8 0 1 0 99 1 0 0 2 251 122 72 0 0 0 0 764 0 0 0 100 2 0 0 0 67 31 62 0 1 0 0 0 0 0 0 100 3 0 0 26 209 104 6 0 0 0 0 523 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 5 0 0 0 22 10 12 0 0 1 0 15 0 0 0 100 6 0 0 0 60 24 58 0 1 0 0 309 0 0 0 100 7 0 0 0 11 1 6 1 1 0 0 300 0 0 0 100 March 4, 2026 at 01:48:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 1 0 99 1 0 0 3 252 122 72 1 0 0 0 762 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 25 210 104 6 1 0 0 0 525 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 13 3 8 0 0 1 0 1 0 0 0 100 6 0 0 0 116 52 115 1 2 1 0 300 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 116 0 1 2 0 0 0 1 0 99 1 0 0 7 251 122 72 0 0 2 0 763 0 0 0 100 2 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 3 0 0 28 211 104 6 1 0 1 0 523 0 0 0 100 4 0 0 0 13 4 4 0 0 1 0 294 0 0 0 100 5 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 6 0 0 0 72 31 66 0 1 0 0 302 0 0 0 100 7 0 0 0 55 24 50 0 1 1 0 300 0 0 0 100 March 4, 2026 at 01:48:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 1 0 0 0 0 1 0 99 1 0 0 3 251 122 72 1 0 0 0 763 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 24 209 104 6 0 0 0 0 524 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 15 4 10 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 7 0 0 0 110 52 106 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 1 0 0 0 1 0 99 1 0 0 3 254 122 80 1 1 1 0 763 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 24 209 104 6 0 0 0 0 525 0 0 0 100 4 0 0 0 13 4 6 1 0 0 0 295 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 16 4 12 0 0 0 0 303 0 0 0 100 7 0 0 0 107 51 103 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:48:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 118 0 0 0 0 28 0 1 0 99 1 0 0 3 254 123 76 0 0 0 0 786 0 0 0 100 2 0 0 0 10 1 8 0 1 0 0 1 0 0 0 100 3 0 0 24 209 104 6 1 0 0 0 523 0 0 0 100 4 0 0 0 13 4 8 0 0 0 0 295 0 0 0 100 5 0 0 0 25 10 18 0 0 0 0 15 0 0 0 100 6 0 0 0 18 2 12 1 0 0 0 305 0 0 0 100 7 0 0 0 110 51 107 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:48:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 150 0 1 0 0 0 0 1 0 99 1 0 0 3 251 122 72 1 0 1 0 762 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 24 209 104 6 0 0 0 0 525 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 15 3 10 0 0 0 0 302 0 0 0 100 7 0 0 0 69 32 64 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:48:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 176 0 0 0 0 0 0 1 0 99 1 0 0 2 288 140 112 1 1 0 0 764 0 0 0 100 2 0 0 0 7 0 2 0 0 1 0 0 0 0 0 100 3 0 0 26 212 104 14 0 1 0 0 523 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 295 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:48:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 1 0 0 0 0 1 0 99 1 0 0 3 302 148 126 0 1 0 0 763 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 24 258 126 62 0 1 0 0 525 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 294 0 0 0 100 5 0 0 0 13 2 10 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 10 0 0 0 0 302 0 0 0 100 7 0 0 0 12 2 6 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 1 0 99 1 0 0 3 244 118 62 1 0 0 0 758 0 0 0 100 2 0 0 0 14 4 10 0 1 0 0 5 0 0 0 100 3 0 0 25 223 111 20 1 0 0 0 523 0 0 0 100 4 0 0 0 95 45 89 0 2 0 0 294 0 0 0 100 5 0 0 0 12 3 8 0 1 0 0 1 0 0 0 100 6 0 0 0 13 2 8 1 0 0 0 300 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 299 0 0 0 100 March 4, 2026 at 01:48:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 88 1 2 0 0 7 0 1 0 99 1 0 0 7 212 102 32 0 0 0 0 742 0 0 0 100 2 0 0 0 46 20 40 0 0 0 0 20 0 0 0 100 3 0 0 28 212 104 8 0 0 0 0 524 0 0 0 100 4 0 0 0 15 4 12 0 1 2 0 294 0 0 0 100 5 0 0 0 151 58 146 0 2 0 0 15 0 0 0 100 6 0 0 0 19 3 16 0 1 0 0 307 0 0 0 100 7 0 0 0 12 1 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 110 0 0 0 0 0 0 1 0 99 1 0 0 7 212 102 32 1 0 0 0 744 0 0 0 100 2 0 0 0 46 20 40 0 0 0 0 20 0 0 0 100 3 0 0 28 210 104 6 0 0 0 0 524 0 0 0 100 4 0 0 0 11 2 6 0 1 0 0 294 0 0 0 100 5 0 0 0 96 43 92 0 1 0 0 0 0 0 0 100 6 0 0 0 34 12 30 0 1 0 0 300 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 112 0 0 0 0 0 0 1 0 99 1 0 0 2 212 102 32 1 0 1 0 743 0 0 0 100 2 0 0 0 47 21 40 0 0 1 0 20 0 0 0 100 3 0 0 26 209 104 6 0 0 1 0 525 0 0 0 100 4 0 0 0 10 3 2 0 0 1 0 294 0 0 0 100 5 0 0 0 13 4 6 0 0 1 0 0 0 0 0 100 6 0 0 0 114 53 110 0 0 1 0 303 0 0 0 100 7 0 0 0 9 2 2 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:48:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 1 0 99 1 0 0 2 212 102 32 1 0 1 0 743 0 0 0 100 2 0 0 0 46 20 40 0 0 0 0 20 0 0 0 100 3 0 0 26 210 104 6 1 0 0 0 523 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 294 0 0 0 100 5 0 0 0 17 4 14 0 0 1 0 1 0 0 0 100 6 0 0 0 119 52 119 1 2 0 0 300 0 0 0 100 7 0 0 0 11 2 6 1 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2236 100 375 0 1 1 0 12 0 1 0 99 1 0 0 3 212 102 37 0 3 0 0 760 0 0 0 100 2 0 0 0 29 12 24 0 0 0 0 18 0 0 0 100 3 1297 0 27 220 104 20 1 1 0 0 623 0 1 0 99 4 0 0 3 15 3 14 0 2 0 0 323 0 0 0 100 5 560 0 0 273 253 24 1 1 12 0 28 0 0 0 100 6 11 0 1 114 31 143 1 2 21 0 692 1 1 0 99 7 0 0 0 176 24 291 0 2 9 0 300 0 0 0 100 March 4, 2026 at 01:48:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 176 0 1 0 0 10 0 1 0 99 1 0 0 2 212 102 32 1 0 1 0 744 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 26 210 104 6 0 0 0 0 523 0 0 0 100 4 0 0 0 13 3 10 0 0 0 0 295 0 0 0 100 5 1281 0 0 43 24 26 1 0 0 0 41 0 0 0 100 6 1 0 0 33 7 30 0 3 0 0 319 0 0 0 100 7 0 0 0 58 25 54 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2251 100 405 0 0 4 0 2 0 1 0 99 1 0 0 2 308 149 130 1 1 0 0 744 0 0 0 100 2 0 0 0 12 2 10 0 1 0 0 10 0 0 0 100 3 0 0 26 208 103 6 0 0 0 0 525 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 5 0 0 0 272 259 16 0 1 18 0 29 0 0 0 100 6 0 0 0 51 5 76 1 1 8 0 535 0 1 0 99 7 0 0 0 147 1 282 0 1 15 0 300 0 0 0 100 March 4, 2026 at 01:48:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 100 146 0 0 0 0 4 0 1 0 99 1 0 0 2 291 142 112 0 0 0 0 744 0 0 0 100 2 0 0 0 26 9 22 0 1 1 0 0 0 0 0 100 3 0 0 26 214 103 16 1 1 1 0 524 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 295 0 0 0 100 5 1 0 0 80 67 18 1 1 0 0 34 0 0 0 100 6 0 0 0 31 7 32 0 1 0 0 329 0 0 0 100 7 0 0 0 21 1 30 0 0 1 0 300 0 0 0 100