March 4, 2026 at 01:39:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 770 0 94 4128 136 4519 59 235 1239 22 4349 9 8 0 83 1 965 0 153 1211 20 3292 21 330 1312 32 9254 9 6 0 85 2 824 0 50 799 21 2676 14 334 1248 25 6743 4 5 0 91 3 666 0 313 1096 429 3317 17 356 1255 23 7718 4 6 0 90 4 682 0 73 912 17 2307 13 302 1255 32 4524 3 7 0 90 5 687 0 90 3004 2175 3072 15 257 1326 16 6359 3 6 0 91 6 902 0 35 1071 13 2865 19 270 1257 37 5597 10 6 0 85 7 624 0 813 1665 12 4523 33 284 1285 23 3934 2 8 0 90 March 4, 2026 at 01:39:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4873 0 29 2453 103 844 14 208 836 69 3334 5 10 0 84 1 4751 0 21 398 4 802 20 215 681 45 2507 11 5 0 84 2 7406 0 50 446 3 1142 12 206 1127 70 2640 6 4 0 90 3 6440 0 44 843 377 667 17 168 597 50 1991 7 24 0 69 4 7615 0 79 393 49 747 24 191 1239 57 3239 11 12 0 76 5 4912 0 69 662 55 896 16 167 811 91 3989 6 35 0 59 6 4380 0 10 683 7 1582 17 238 1098 84 2825 9 5 0 86 7 7233 0 22 332 4 746 13 186 1049 48 2236 8 5 0 87 March 4, 2026 at 01:39:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2198 101 260 0 98 533 0 300 0 1 0 99 1 0 0 7 140 4 298 0 98 540 0 555 0 1 0 99 2 40 0 0 98 2 250 0 89 489 0 310 0 1 0 99 3 0 0 0 428 331 376 2 95 544 0 0 0 1 0 99 4 0 0 17 357 133 312 1 95 600 0 268 0 1 0 99 5 0 0 3 316 109 254 1 82 492 0 0 0 1 0 99 6 0 0 0 460 14 881 1 90 490 0 0 0 1 0 99 7 31 0 0 95 1 275 0 93 505 0 1060 0 1 0 98 March 4, 2026 at 01:39:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2208 101 282 1 94 650 0 303 0 2 0 98 1 0 0 7 473 5 973 1 95 624 1 559 0 1 0 99 2 0 0 0 121 3 302 2 102 694 1 300 0 1 0 99 3 0 0 0 451 344 295 0 100 712 0 5 0 1 0 99 4 0 0 17 318 106 301 1 108 688 1 276 0 1 0 99 5 0 0 3 364 130 326 1 94 604 0 0 0 1 0 99 6 0 0 0 226 9 404 1 103 677 1 0 0 1 0 99 7 27 0 0 148 19 350 0 92 619 1 1041 0 1 0 99 March 4, 2026 at 01:39:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 101 176 0 24 151 0 300 0 1 0 99 1 0 0 7 182 3 349 0 27 132 0 554 0 0 0 100 2 0 0 0 83 3 158 0 27 152 0 300 0 0 0 100 3 0 0 0 186 114 151 0 32 164 0 0 0 0 0 100 4 0 0 17 268 106 124 0 29 130 0 268 0 0 0 100 5 0 0 3 352 150 199 0 22 107 0 0 0 0 0 100 6 0 0 0 93 0 139 0 28 133 0 0 0 0 0 100 7 0 0 0 55 1 132 0 25 111 0 1037 0 0 0 99 March 4, 2026 at 01:39:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2194 101 272 1 53 292 4 300 0 2 0 98 1 0 0 7 250 3 497 1 55 311 9 552 0 1 0 99 2 0 0 0 148 3 264 0 55 356 2 300 0 1 0 99 3 0 0 0 245 148 197 3 46 318 4 0 0 2 0 98 4 0 0 17 306 105 207 1 51 295 7 266 0 2 0 98 5 0 0 3 384 150 274 1 40 269 6 0 0 2 0 98 6 0 0 0 108 1 218 1 47 344 4 1 0 2 0 98 7 0 0 0 101 2 226 2 39 336 2 1037 0 2 0 98 March 4, 2026 at 01:39:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2622 0 0 2461 107 878 145 123 165 11 2139 11 3 0 86 1 3323 0 7 416 8 756 134 132 194 6 2558 15 3 0 82 2 6487 0 8 355 10 831 118 125 267 9 3248 14 8 0 77 3 2182 0 1 284 3 420 54 68 180 11 1936 24 2 0 73 4 968 0 381 393 109 353 61 67 93 5 1814 25 2 0 73 5 3863 0 32 593 132 795 122 120 184 17 2076 17 3 0 80 6 1170 0 0 278 4 470 90 79 152 11 1679 21 2 0 77 7 3726 0 0 280 6 694 137 123 157 7 2753 12 3 0 85 March 4, 2026 at 01:39:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 1 2115 102 98 0 4 5 0 309 0 2 0 98 1 0 0 7 78 3 72 0 2 0 0 602 0 0 0 100 2 2 0 0 16 3 12 0 2 4 0 309 0 0 0 100 3 2 0 0 8 0 2 0 0 7 0 8 0 0 0 100 4 0 0 31 214 106 10 0 1 0 0 276 0 0 0 100 5 0 0 3 216 102 8 0 1 0 0 13 0 0 0 100 6 1 0 0 17 3 11 1 1 0 0 9 0 0 0 100 7 22 0 0 84 35 108 1 1 0 0 1151 0 0 0 99 March 4, 2026 at 01:39:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 108 0 0 0 0 300 0 0 0 100 1 0 0 7 122 3 123 0 1 0 0 564 0 0 0 100 2 0 0 0 14 3 8 0 0 0 0 301 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 4 0 0 17 219 108 16 0 1 0 0 279 0 0 0 100 5 0 0 3 216 106 6 0 1 0 0 3 0 0 0 100 6 0 0 0 13 0 14 0 2 0 0 1 0 0 0 100 7 7 0 0 27 9 52 1 0 0 0 1138 0 0 0 100 March 4, 2026 at 01:39:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 157 0 2 0 0 300 0 0 0 99 1 0 0 7 69 4 60 0 0 1 0 554 0 0 0 100 2 0 0 0 14 3 4 0 0 1 0 300 0 0 0 100 3 0 0 0 9 1 2 0 1 1 0 0 0 0 0 100 4 0 0 21 216 105 11 0 2 1 0 266 0 0 0 100 5 0 0 7 213 103 6 0 0 1 0 1 0 0 0 100 6 0 0 0 11 1 2 0 1 1 0 0 0 0 0 100 7 0 0 0 34 11 60 1 1 2 0 1157 0 0 0 100 March 4, 2026 at 01:39:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 16 2227 101 405 4 42 362 2 332 0 2 0 98 1 35 0 14 133 4 241 1 47 349 1 594 0 1 0 98 2 4 0 5 215 1 426 2 49 306 6 353 0 1 0 99 3 22 0 6 244 115 251 2 50 378 2 48 0 1 0 99 4 10 0 28 321 106 239 0 50 468 7 304 0 1 0 99 5 1 0 3 309 102 213 2 39 374 1 55 0 1 0 99 6 4 0 0 96 0 202 1 58 386 4 24 0 1 0 99 7 2 0 0 152 12 275 2 44 367 1 1176 0 1 0 99 March 4, 2026 at 01:39:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 104 0 14 2158 102 104 1 15 13 4 182 0 1 0 99 1 252 0 7 158 51 197 0 19 17 6 512 0 1 0 99 2 8 0 0 46 2 60 0 12 29 2 878 0 0 0 99 3 2711 0 0 43 2 74 1 17 41 7 551 1 1 0 99 4 2641 0 26 271 104 117 5 23 33 6 1081 3 1 0 96 5 717 0 20 272 105 118 3 14 26 3 359 0 1 0 98 6 291 0 0 72 4 131 2 22 17 7 329 0 0 0 99 7 63 0 0 150 4 212 1 13 14 8 1414 0 1 0 99 March 4, 2026 at 01:39:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 1 12 0 592 0 0 0 99 1 0 0 7 113 52 114 0 1 0 0 307 0 0 0 100 2 0 0 0 11 2 6 0 0 3 0 594 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 17 211 105 6 0 0 0 0 268 0 0 0 100 5 0 0 3 210 101 4 0 0 0 0 0 0 0 0 100 6 59 0 0 18 5 14 0 1 0 0 8 0 0 0 100 7 2 0 0 16 3 38 1 0 0 0 1041 0 0 0 100 March 4, 2026 at 01:39:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 101 116 0 0 0 0 300 0 1 0 99 1 0 0 126 115 54 114 0 1 1 0 267 0 0 0 100 2 0 0 0 27 2 6 0 0 2 0 595 0 0 0 100 3 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 4 0 0 17 228 104 8 0 0 0 0 274 0 0 0 100 5 0 0 3 232 106 2 0 0 0 0 0 0 0 0 100 6 0 0 0 45 8 28 0 1 0 0 23 0 0 0 100 7 0 0 0 32 3 40 1 0 0 0 1038 0 0 0 100 March 4, 2026 at 01:39:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 101 115 0 0 0 0 300 0 1 0 99 1 0 0 7 115 52 106 0 1 0 0 260 0 0 0 100 2 0 0 0 18 2 16 0 2 0 0 593 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 17 214 105 8 0 0 0 0 268 0 0 0 100 5 0 0 3 210 101 2 0 0 0 0 0 0 1 0 99 6 0 0 0 21 6 14 0 0 0 0 9 0 0 0 100 7 0 0 0 14 3 36 1 0 2 0 1037 0 0 0 100 March 4, 2026 at 01:39:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 204 0 0 2937 102 1623 34 287 273 0 6517 7 3 0 89 1 89 0 7 761 10 1405 32 306 285 0 8094 7 3 0 90 2 118 0 0 739 4 1239 26 230 249 1 5953 5 2 0 93 3 177 0 0 798 94 1270 44 281 258 0 7263 6 2 0 92 4 154 0 353 847 107 1269 33 262 251 0 5574 5 2 0 93 5 205 0 3 882 104 1167 15 202 213 2 4501 5 2 0 93 6 166 0 0 817 9 1478 38 271 212 0 6570 6 2 0 92 7 137 0 0 644 10 1180 20 175 209 0 5104 5 2 0 93 March 4, 2026 at 01:39:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 212 0 1 0 0 304 0 0 0 100 1 2 0 7 20 7 18 0 1 0 0 269 0 0 0 100 2 0 0 0 12 3 6 0 1 1 0 597 0 0 0 100 3 0 0 0 12 2 10 0 0 0 0 7 0 0 0 100 4 0 0 17 219 108 14 0 1 0 0 275 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 16 0 12 0 1 0 0 10 0 0 0 100 7 0 0 0 12 3 34 1 0 0 0 1042 0 0 0 100 March 4, 2026 at 01:39:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 2146 102 255 0 9 8 3 456 0 1 0 99 1 35 0 7 49 8 45 0 5 8 6 321 0 0 0 100 2 797 0 113 25 3 38 1 6 4 5 706 0 0 0 99 3 122 0 0 45 1 49 0 6 5 11 91 0 0 0 100 4 18 0 18 248 106 51 0 6 2 5 330 0 0 0 100 5 2537 0 3 251 101 64 4 8 8 14 1230 2 1 0 97 6 29 0 0 48 1 56 0 9 10 8 156 0 0 0 100 7 9 0 0 36 2 63 1 6 11 2 1150 0 0 0 100 March 4, 2026 at 01:39:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 212 0 0 0 0 300 0 0 0 100 1 0 0 7 18 6 16 0 0 0 0 269 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 595 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 4 0 0 17 215 105 12 0 1 0 0 275 0 0 0 100 5 0 0 3 219 107 12 0 1 0 0 0 0 0 0 100 6 0 0 0 27 3 28 0 0 0 0 26 0 0 0 100 7 0 0 0 14 2 40 1 1 0 0 1126 0 0 0 100 March 4, 2026 at 01:39:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 215 0 1 0 0 308 0 0 0 99 1 0 0 7 27 10 18 0 0 1 0 587 0 0 0 100 2 0 0 0 14 3 6 0 0 1 0 594 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 4 0 0 17 216 106 14 0 0 1 0 271 0 0 0 100 5 0 0 3 210 102 4 0 0 1 0 1 0 0 0 100 6 0 0 0 17 1 10 0 0 1 0 10 0 0 0 100 7 0 0 0 11 3 34 0 0 1 0 1124 0 0 0 100 March 4, 2026 at 01:40:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 212 0 0 0 0 300 0 0 0 100 1 0 0 7 11 3 8 0 0 3 0 260 0 0 0 100 2 0 0 0 12 3 8 0 0 1 0 595 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 4 0 0 17 221 109 16 1 0 2 0 273 0 0 0 100 5 0 0 3 211 101 6 0 0 0 0 0 0 0 0 100 6 0 0 0 23 0 26 0 1 0 0 10 0 0 0 100 7 0 0 0 10 2 34 1 0 0 0 1124 0 0 0 100 March 4, 2026 at 01:40:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 216 0 0 2178 105 213 11 25 5 1 1920 2 1 0 97 1 297 0 7 82 4 249 13 38 4 0 1949 1 1 0 98 2 11 0 0 81 3 226 3 27 3 1 1840 1 0 0 99 3 2 0 0 83 3 173 6 29 5 0 1749 1 0 0 98 4 81 0 101 373 153 244 14 30 5 0 1849 1 0 0 98 5 543 0 3 255 102 96 6 17 9 2 1567 2 1 0 97 6 76 0 0 78 0 248 9 40 3 0 1932 1 0 0 99 7 13 0 0 50 2 166 5 18 6 0 1668 1 0 0 98 March 4, 2026 at 01:40:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 110 0 0 0 0 300 0 0 0 100 1 0 0 7 16 2 12 0 1 0 0 260 0 0 0 100 2 0 0 0 21 8 16 0 0 0 0 602 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 17 309 154 106 0 0 0 0 268 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 15 3 38 1 0 1 0 1132 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 8 2125 102 142 0 5 13 0 316 0 1 0 99 1 0 0 21 34 4 38 0 6 5 0 287 0 0 0 100 2 0 0 0 37 9 37 0 5 7 0 629 0 0 0 100 3 0 0 0 19 2 13 0 1 2 1 74 0 0 0 100 4 9 0 17 324 155 128 0 6 14 0 289 0 0 0 100 5 0 0 3 223 108 10 0 3 11 0 0 0 0 0 100 6 0 0 0 32 4 59 3 3 0 1 1239 0 0 0 100 7 8 0 7 19 2 18 0 1 4 0 32 0 0 0 100 March 4, 2026 at 01:40:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 112 0 1 0 0 300 0 0 0 100 1 1 0 7 37 8 39 0 2 0 0 270 0 0 0 100 2 0 0 0 13 2 6 0 0 0 0 594 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 17 312 154 108 1 0 0 0 268 0 0 0 100 5 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 36 1 0 0 0 1044 0 0 0 100 7 0 0 0 14 3 8 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:40:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2177 102 213 0 16 135 0 300 0 1 0 99 1 0 0 119 84 10 135 1 22 191 0 270 0 1 0 99 2 0 0 0 72 3 94 2 17 145 0 595 0 0 0 100 3 0 0 0 121 60 74 0 13 95 0 0 0 0 0 100 4 0 0 17 368 153 203 0 16 161 0 266 0 0 0 100 5 1 0 3 279 102 114 1 12 149 0 1 0 0 0 100 6 0 0 0 85 2 154 2 25 167 0 1040 0 1 0 99 7 0 0 0 132 4 218 1 20 135 0 6 0 0 0 100 March 4, 2026 at 01:40:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 110 0 0 0 0 303 0 0 0 99 1 0 0 14 42 12 36 0 0 0 0 277 0 0 0 100 2 0 0 0 15 2 14 0 1 0 0 594 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 17 313 155 110 0 0 0 0 272 0 0 0 100 5 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 15 3 38 1 0 0 0 1043 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:40:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 80 0 0 2875 104 1444 36 217 43 0 6415 7 3 0 90 1 51 0 7 735 9 1287 42 261 46 0 7859 6 2 0 92 2 46 0 0 697 5 1191 37 201 51 0 6308 6 2 0 92 3 20 0 0 608 2 1107 46 231 37 0 7308 6 2 0 92 4 5 0 367 770 125 1070 19 201 31 0 5992 5 2 0 93 5 35 0 3 789 108 925 15 139 30 0 3975 4 2 0 94 6 73 0 0 581 6 1034 41 225 25 0 6511 5 2 0 93 7 49 0 0 539 7 924 18 137 39 0 4227 5 1 0 93 March 4, 2026 at 01:40:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 212 0 0 0 0 300 0 0 0 99 1 9 0 7 18 2 16 0 0 0 0 308 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 594 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 4 0 0 17 211 104 8 1 0 0 0 275 0 0 0 100 5 0 0 3 217 108 2 0 0 0 0 0 0 0 0 100 6 0 0 0 24 4 56 1 0 1 0 1077 0 0 0 100 7 0 0 0 20 6 16 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:40:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 208 0 0 1 0 300 0 0 0 100 1 1 0 7 20 3 12 0 0 1 0 260 0 0 0 100 2 0 0 0 20 5 12 1 1 1 0 597 0 0 0 100 3 0 0 0 16 3 8 0 0 1 0 1 0 0 0 100 4 0 0 21 214 103 14 0 1 1 0 266 0 0 0 100 5 0 0 7 213 103 8 0 1 0 0 3 0 0 0 100 6 0 0 0 16 3 38 0 1 1 0 1051 0 0 0 100 7 0 0 0 20 7 12 0 0 1 0 26 0 0 0 100 March 4, 2026 at 01:40:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2233 103 431 0 27 197 0 300 0 1 0 99 1 0 0 7 77 2 148 1 29 241 0 260 0 0 0 100 2 0 0 0 94 13 170 0 26 206 0 594 0 0 0 99 3 0 0 0 151 76 151 0 27 261 0 0 0 0 0 100 4 0 0 17 269 104 133 0 35 231 0 268 0 0 0 100 5 0 0 3 284 101 165 0 30 230 0 0 0 0 0 100 6 0 0 0 89 3 199 1 27 216 0 1053 0 1 0 99 7 1 0 0 73 6 129 0 22 165 0 6 0 0 0 100 March 4, 2026 at 01:40:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 116 0 0 0 0 305 0 0 0 100 1 0 0 7 20 3 20 0 0 0 0 274 0 0 0 100 2 0 0 0 115 55 110 0 0 0 0 600 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 17 208 103 4 0 1 0 0 269 0 0 0 100 5 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 36 1 0 0 0 1041 0 0 0 100 7 0 0 0 26 9 20 0 0 0 0 335 0 0 0 100 March 4, 2026 at 01:40:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 107 120 0 0 0 0 307 0 0 0 99 1 0 0 7 16 2 12 0 0 0 0 260 0 0 0 100 2 0 0 0 21 8 14 0 0 0 0 594 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 17 297 147 94 1 1 0 0 268 0 0 0 100 5 0 0 3 212 102 6 0 0 0 0 0 0 0 0 100 6 0 0 0 17 1 48 1 1 0 0 1063 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 817 0 112 2143 106 174 0 8 4 7 433 0 1 0 99 1 85 0 7 54 2 58 0 7 3 9 334 0 0 0 100 2 651 0 3 54 6 54 2 6 6 7 1561 1 0 0 98 3 1886 0 0 48 2 48 2 10 3 2 385 0 1 0 99 4 89 0 17 342 152 163 0 11 9 9 397 0 0 0 100 5 33 0 3 264 115 63 0 15 12 6 186 0 0 0 100 6 18 0 0 59 3 99 1 10 12 6 1152 0 0 0 100 7 6 0 0 45 1 43 0 7 2 2 92 0 0 0 100 March 4, 2026 at 01:40:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 108 0 0 0 0 300 0 0 0 100 1 0 0 7 10 2 4 0 0 0 0 260 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 595 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 17 307 153 104 0 0 0 0 268 0 0 0 100 5 0 0 3 225 106 18 0 0 0 0 5 0 0 0 100 6 0 0 0 12 1 38 1 1 0 0 1137 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 102 118 0 1 0 0 300 0 0 0 100 1 0 0 7 11 2 10 0 0 1 0 260 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 593 0 0 0 100 3 0 0 0 12 2 10 0 1 2 0 5 0 0 0 100 4 0 0 17 306 152 104 0 0 1 0 266 0 0 0 100 5 0 0 3 228 106 22 0 0 1 0 322 0 0 0 100 6 0 0 0 16 4 42 0 0 1 0 1136 0 0 0 100 7 0 0 0 12 2 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:40:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 120 0 1 0 0 304 0 0 0 99 1 0 0 7 13 2 14 0 1 0 0 260 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 594 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 17 311 154 108 1 0 0 0 272 0 0 0 100 5 0 0 3 210 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 38 1 0 0 0 1133 0 0 0 100 7 0 0 0 25 9 18 0 0 0 0 13 0 0 0 100 March 4, 2026 at 01:40:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 116 0 0 0 0 300 0 0 0 100 1 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 2 0 0 0 13 3 8 1 0 0 0 594 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 20 0 17 307 153 106 0 0 0 0 271 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 22 0 0 19 4 44 1 0 3 0 1140 0 0 0 100 7 0 0 0 15 5 10 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:40:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 118 0 0 0 0 300 0 0 0 100 1 0 0 7 12 2 10 0 0 0 0 265 0 0 0 100 2 0 0 0 19 3 20 0 1 0 0 596 0 0 0 100 3 0 0 0 13 4 8 0 0 0 0 1 0 0 0 100 4 0 0 17 310 153 110 0 0 0 0 275 0 0 0 100 5 0 0 3 214 107 2 0 0 0 0 0 0 0 0 100 6 0 0 0 22 4 52 1 0 0 0 1145 0 0 0 100 7 0 0 0 19 5 16 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:40:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 0 1 0 0 300 0 0 0 100 1 0 0 7 12 3 4 0 0 1 0 260 0 0 0 100 2 0 0 0 13 3 6 0 0 1 0 593 0 0 0 100 3 0 0 0 16 3 14 0 1 1 0 0 0 0 0 100 4 0 0 17 305 152 102 0 0 1 0 266 0 0 0 100 5 0 0 3 213 103 8 0 0 1 0 3 0 0 0 100 6 0 0 0 15 3 38 1 1 1 0 1125 0 0 0 100 7 0 0 0 20 7 12 0 0 1 0 321 0 0 0 100 March 4, 2026 at 01:40:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 116 0 0 0 0 300 0 0 0 100 1 0 0 7 11 2 10 0 0 0 0 260 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 594 0 0 0 100 3 0 0 0 12 2 10 0 0 3 0 18 0 0 0 100 4 0 0 17 309 153 106 1 0 1 0 268 0 0 0 100 5 0 0 3 225 108 22 0 0 2 0 17 0 0 0 100 6 0 0 0 14 2 40 1 0 0 0 1140 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 118 0 0 0 0 303 0 0 0 100 1 0 0 7 10 3 6 0 0 0 0 261 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 596 0 0 0 100 3 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 4 0 0 16 311 152 114 0 1 0 0 269 0 0 0 100 5 0 0 4 226 109 18 0 0 0 0 14 0 0 0 100 6 0 0 0 14 2 40 0 0 1 0 1130 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 0 0 300 0 0 0 100 1 0 0 7 9 2 6 0 0 0 0 263 0 0 0 100 2 0 0 0 15 4 10 1 0 0 0 597 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 17 309 153 106 0 1 0 0 268 0 0 0 100 5 0 0 3 221 105 20 0 1 0 0 5 0 0 0 100 6 0 0 0 13 2 38 1 0 1 0 1129 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2200 103 289 6 35 1 1 1615 2 1 0 98 1 163 0 7 160 36 282 2 42 2 0 1858 1 0 0 99 2 162 0 0 99 8 147 4 30 1 0 2570 2 1 0 97 3 237 0 0 90 2 178 2 34 12 2 1743 1 0 0 98 4 5 0 114 310 119 228 7 47 6 0 2110 1 0 0 99 5 256 0 4 299 111 131 7 12 6 4 1436 2 1 0 97 6 239 0 1 116 6 248 4 37 2 2 2739 2 1 0 98 7 56 0 0 90 2 214 9 32 1 0 1215 1 0 0 99 March 4, 2026 at 01:40:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 114 0 0 0 0 300 0 0 0 100 1 0 0 7 110 52 104 0 0 0 0 260 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 593 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 17 221 110 16 1 0 0 0 277 0 0 0 100 5 0 0 3 210 101 4 0 0 0 0 0 0 0 0 100 6 0 0 0 17 2 46 1 1 0 0 1132 0 0 0 100 7 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2213 103 293 1 23 126 0 300 0 1 0 99 1 0 0 7 154 52 204 1 19 151 0 260 0 0 0 100 2 0 0 0 51 3 86 1 12 104 0 595 0 0 0 100 3 0 0 0 123 60 122 1 24 147 0 0 0 0 0 100 4 0 0 17 266 109 109 1 25 143 0 275 0 0 0 100 5 0 0 3 274 103 119 0 21 116 0 0 0 0 0 100 6 0 0 0 71 3 151 2 24 154 0 1133 0 1 0 99 7 0 0 0 60 1 106 1 15 121 0 0 0 0 0 100 March 4, 2026 at 01:40:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 114 0 2 1 0 301 0 0 0 100 1 0 0 7 109 52 106 0 1 0 0 260 0 0 0 100 2 0 0 0 10 2 4 1 0 0 0 593 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 17 233 115 28 0 0 0 0 287 0 0 0 100 5 0 0 3 209 101 4 0 1 0 0 3 0 0 0 100 6 0 0 0 16 1 40 1 1 1 0 1134 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 102 128 0 6 17 1 384 0 0 0 99 1 0 0 7 131 53 141 0 7 8 0 301 0 0 0 100 2 2 0 0 20 3 20 1 5 13 0 619 0 0 0 100 3 0 0 7 18 2 14 0 3 3 0 7 0 0 0 100 4 0 0 17 231 109 33 0 0 5 1 371 0 0 0 100 5 0 0 3 232 107 24 0 3 5 0 22 0 0 0 100 6 0 0 9 32 3 57 1 4 6 0 1136 0 1 0 99 7 0 0 14 17 1 17 0 7 9 0 4 0 0 0 100 March 4, 2026 at 01:40:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 112 0 0 0 0 300 0 0 0 100 1 0 0 7 118 53 116 0 2 0 0 265 0 0 0 100 2 0 0 0 20 3 20 0 1 0 0 595 0 0 0 100 3 0 0 0 15 3 10 0 0 0 0 4 0 0 0 100 4 0 0 24 215 104 12 1 1 0 0 275 0 0 0 100 5 0 0 3 233 115 20 0 0 0 0 14 0 0 0 100 6 0 0 0 24 3 52 0 1 0 0 1058 0 0 0 100 7 0 0 0 13 1 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 104 112 0 0 1 0 302 0 1 0 99 1 10 0 7 134 52 112 0 0 1 0 260 0 0 0 100 2 0 0 0 28 3 4 0 0 1 0 594 0 0 0 100 3 0 0 0 28 3 4 0 0 1 0 0 0 0 0 100 4 0 0 21 226 103 4 0 0 1 0 266 0 0 0 100 5 0 0 7 241 108 20 1 2 0 0 10 0 0 0 100 6 0 0 0 30 3 34 1 0 1 0 1042 0 0 0 100 7 0 0 112 15 3 7 0 1 1 0 21 0 0 0 100 March 4, 2026 at 01:40:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 110 0 0 0 0 301 0 0 0 99 1 0 0 7 120 52 118 0 0 1 0 260 0 0 0 100 2 0 0 0 13 2 6 1 0 0 0 595 0 0 0 100 3 0 0 0 16 2 16 0 1 3 0 0 0 0 0 100 4 0 0 17 213 105 8 0 0 1 0 268 0 0 0 100 5 0 0 3 222 107 16 0 0 0 0 9 0 0 0 100 6 0 0 0 14 2 38 1 0 1 0 1041 0 0 0 100 7 0 0 7 9 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2843 108 1339 30 269 16 0 6034 6 3 0 91 1 7 0 7 798 35 1339 43 278 28 0 7647 6 2 0 92 2 24 0 0 738 5 1229 37 212 46 0 6079 6 2 0 92 3 9 0 0 737 4 1334 39 285 19 0 7266 6 2 0 91 4 20 0 367 848 109 1233 31 242 15 0 5694 6 2 0 92 5 5 0 3 800 120 986 31 165 18 0 4414 5 2 0 94 6 19 0 14 592 4 1096 29 239 52 0 8178 6 2 0 92 7 31 0 0 470 2 780 14 149 10 0 4708 4 1 0 95 March 4, 2026 at 01:40:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 110 0 0 0 0 300 0 0 0 100 1 0 0 7 17 6 12 1 0 0 0 265 0 0 0 100 2 0 0 0 18 2 14 0 1 0 0 603 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 2 0 0 0 100 5 0 0 3 306 150 102 0 0 0 0 0 0 0 0 100 6 0 0 14 15 4 40 2 0 0 0 1308 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 2 2140 102 134 0 6 4 3 356 0 1 0 99 1 2 0 7 54 9 42 0 5 3 2 320 0 0 0 100 2 9 0 0 49 4 46 0 5 2 2 697 0 0 0 100 3 2679 0 112 29 1 57 2 7 5 8 443 1 1 0 98 4 123 0 3 249 102 67 0 13 11 14 163 0 0 0 100 5 667 0 3 272 114 90 1 11 11 10 968 1 0 0 98 6 42 0 14 138 46 182 0 10 4 4 1422 0 0 0 99 7 20 0 0 50 2 60 0 9 5 7 93 0 0 0 100 March 4, 2026 at 01:40:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 0 2 0 0 300 0 0 0 99 1 0 0 7 18 6 12 0 0 0 0 265 0 0 0 100 2 0 0 0 13 3 8 1 0 0 0 604 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 2 0 0 0 100 5 0 0 3 210 101 4 0 1 0 0 0 0 0 0 100 6 0 0 14 35 13 62 1 1 0 0 1394 0 0 0 100 7 0 0 0 92 41 86 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:40:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 102 203 0 27 199 0 300 0 1 0 99 1 0 0 7 90 8 156 0 26 200 0 583 0 0 0 99 2 0 0 0 74 3 137 0 19 203 0 606 0 1 0 99 3 0 0 0 142 69 142 0 26 191 0 0 0 0 0 100 4 0 0 3 332 103 249 0 21 190 0 5 0 0 0 100 5 0 0 3 261 101 117 0 19 230 0 0 0 1 0 99 6 4 0 14 74 6 165 1 30 214 0 1395 0 1 0 99 7 0 0 0 159 50 215 0 20 190 0 0 0 0 0 100 March 4, 2026 at 01:40:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 114 0 0 0 0 300 0 0 0 100 1 0 0 7 11 3 4 0 0 0 0 260 0 0 0 100 2 0 0 0 26 10 20 0 0 0 0 604 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 10 0 0 0 100 4 0 0 2 209 103 2 0 0 0 0 2 0 0 0 100 5 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 16 4 42 2 1 0 0 1390 0 0 0 100 7 0 0 0 113 51 114 0 1 0 0 5 0 0 0 100 March 4, 2026 at 01:40:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 157 0 0 2260 102 484 20 66 7 0 2837 2 1 0 97 1 441 0 7 155 2 375 16 52 9 1 2629 2 1 0 97 2 0 0 0 139 8 327 11 53 3 0 2466 1 1 0 98 3 0 0 0 109 2 313 9 61 2 0 1867 2 0 0 98 4 0 0 73 349 122 331 10 53 7 0 2242 1 0 0 98 5 0 0 3 307 101 215 13 37 4 0 1741 1 1 0 98 6 295 0 14 72 5 147 13 28 3 1 2754 3 1 0 96 7 58 0 0 147 29 276 6 41 4 0 1726 2 0 0 98 March 4, 2026 at 01:40:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 64 0 2 0 0 300 0 0 0 100 1 0 0 7 69 2 64 0 1 0 0 265 0 0 0 100 2 0 0 0 19 5 14 1 0 0 0 597 0 0 0 100 3 0 0 0 13 4 6 0 0 0 0 1 0 0 0 100 4 0 0 3 326 159 124 1 0 0 0 17 0 0 0 100 5 0 0 3 216 108 2 0 0 2 0 0 0 0 0 100 6 0 0 14 22 5 50 0 0 1 0 1414 0 0 0 100 7 0 0 0 11 1 8 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:40:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 102 137 1 11 16 1 380 0 1 0 99 1 0 0 14 34 3 42 0 8 5 0 298 0 0 0 100 2 1 0 0 23 4 15 0 2 5 0 614 0 0 0 100 3 0 0 7 22 3 29 0 2 11 0 15 0 1 0 99 4 0 0 7 332 158 134 0 6 11 0 40 0 0 0 100 5 0 0 7 226 102 23 0 2 3 1 78 0 0 0 100 6 0 0 14 25 6 50 1 4 2 0 1412 0 0 0 99 7 0 0 0 18 1 9 0 4 10 0 0 0 0 0 100 March 4, 2026 at 01:40:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 102 184 0 20 101 0 301 0 1 0 99 1 0 0 7 89 2 141 0 23 99 0 260 0 0 0 100 2 0 0 7 70 5 131 0 22 141 0 597 0 0 0 100 3 0 0 0 128 66 114 0 18 130 0 0 0 0 0 100 4 0 0 3 429 153 340 0 23 124 0 2 0 0 0 100 5 0 0 3 253 101 87 0 19 80 0 0 0 0 0 100 6 0 0 14 71 9 152 3 22 120 0 1320 0 1 0 99 7 0 0 0 54 0 101 0 17 119 0 0 0 0 0 100 March 4, 2026 at 01:40:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2109 102 93 0 0 0 0 300 0 1 0 99 1 0 0 7 55 3 34 0 2 0 0 261 0 0 0 100 2 0 0 0 34 5 12 0 1 0 0 600 0 0 0 100 3 0 0 7 26 2 6 0 1 0 0 0 0 0 0 100 4 0 0 2 323 151 100 0 0 0 0 0 0 0 0 100 5 4 0 4 227 102 4 0 0 0 0 5 0 0 0 100 6 2 0 14 48 11 56 1 0 1 0 1332 0 0 0 99 7 0 0 0 24 0 2 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:40:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 82 0 2 0 0 300 0 0 0 100 1 0 0 7 47 2 40 0 2 0 0 260 0 0 0 100 2 0 0 0 17 4 10 1 0 0 0 595 0 0 0 100 3 0 0 0 17 2 18 0 2 0 0 0 0 0 0 100 4 0 0 3 310 152 106 0 2 0 0 5 0 0 0 100 5 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 6 1 0 14 30 11 52 1 0 0 0 1316 0 0 0 99 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2683 102 1073 20 184 19 0 4281 4 2 0 94 1 5 0 7 562 2 1008 43 203 12 0 5741 5 2 0 94 2 1 0 0 490 5 811 11 138 12 1 5082 5 1 0 94 3 3 0 0 485 2 904 33 196 15 0 5637 4 2 0 94 4 19 0 255 746 143 1002 19 182 25 1 4510 5 2 0 93 5 46 0 3 664 112 772 16 128 13 0 3837 3 1 0 95 6 1 0 14 485 13 919 18 172 13 0 5779 4 2 0 94 7 0 0 0 439 4 772 14 107 12 0 3276 4 1 0 95 March 4, 2026 at 01:40:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2306 101 368 14 62 3 0 1680 2 1 0 97 1 1 0 7 181 4 297 12 69 1 0 2069 1 0 0 98 2 8 0 0 197 5 340 9 52 5 0 2202 2 1 0 98 3 0 0 0 262 3 408 10 67 1 0 1715 1 1 0 98 4 0 0 115 347 104 265 4 53 8 0 2201 2 1 0 98 5 0 0 3 482 148 404 10 48 0 0 1175 2 1 0 98 6 0 0 14 200 8 393 6 67 3 0 2979 1 1 0 98 7 2 0 0 178 1 305 12 39 5 0 1066 1 0 0 98 March 4, 2026 at 01:40:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 108 0 0 2218 101 299 0 29 212 9 186 0 1 0 99 1 29 0 10 110 2 187 0 34 233 7 423 0 0 0 99 2 39 0 0 94 3 147 0 32 156 4 730 0 0 0 99 3 25 0 0 173 75 162 0 31 231 4 113 0 1 0 99 4 36 0 3 303 103 178 0 37 262 5 369 0 1 0 99 5 641 0 3 379 143 239 1 23 275 2 864 1 1 0 98 6 4 0 14 207 17 382 1 34 209 0 1379 0 1 0 99 7 2702 0 119 82 0 168 3 29 200 13 389 1 1 0 98 March 4, 2026 at 01:40:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 120 0 1 0 0 3 0 0 0 100 1 0 0 7 11 3 10 0 1 1 0 270 0 0 0 100 2 0 0 0 15 4 10 0 1 0 0 595 0 0 0 100 3 0 0 0 13 3 8 0 1 0 0 1 0 0 0 100 4 0 0 3 213 104 4 1 0 0 0 302 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 129 60 157 1 2 0 0 1405 0 0 0 99 7 0 0 0 14 2 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:40:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 0 0 0 0 0 0 100 1 0 0 7 10 3 6 0 0 0 0 261 0 0 0 100 2 0 0 0 15 4 10 0 0 0 0 594 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 303 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 40 16 64 1 1 0 0 1399 0 0 0 100 7 0 0 0 94 44 90 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:40:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 126 0 1 0 0 0 0 0 0 100 1 0 0 7 19 4 22 0 0 0 0 295 0 0 0 100 2 0 0 0 14 4 10 0 0 0 0 595 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 4 0 0 3 225 109 22 0 0 0 0 318 0 0 0 100 5 0 0 3 216 107 6 0 0 0 0 5 0 0 0 100 6 0 0 14 24 8 50 1 0 0 0 1719 0 0 0 100 7 0 0 0 113 51 111 0 1 0 0 23 0 0 0 100 March 4, 2026 at 01:40:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 99 0 0 2163 101 230 5 31 2 0 1381 1 1 0 98 1 3 0 7 62 4 136 4 17 13 0 1346 2 0 0 98 2 268 0 0 100 4 276 4 29 6 2 1922 1 0 0 99 3 0 0 0 67 9 184 2 29 1 0 1277 1 0 0 99 4 3 0 77 280 109 215 8 38 7 0 1887 1 0 0 98 5 378 0 7 262 102 131 11 26 4 0 1915 3 1 0 97 6 7 0 14 78 7 192 7 29 5 1 2753 1 1 0 98 7 261 0 0 125 43 171 3 22 4 2 1381 2 0 0 97 March 4, 2026 at 01:40:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 103 216 1 22 117 0 11 0 1 0 99 1 0 0 7 63 2 118 1 26 151 0 279 0 0 0 100 2 0 0 0 72 7 123 1 23 98 0 614 0 0 0 100 3 0 0 0 236 116 234 0 26 124 0 21 0 0 0 100 4 0 0 17 272 104 118 2 22 109 0 310 0 0 0 100 5 0 0 3 266 103 105 0 17 96 0 9 0 0 0 100 6 5 0 14 132 4 278 2 28 122 0 1401 0 1 0 99 7 0 0 0 61 0 111 0 23 116 0 1 0 0 0 100 March 4, 2026 at 01:40:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 109 132 0 0 0 0 14 0 0 0 100 1 0 0 7 13 4 10 0 0 0 0 265 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 595 0 0 0 100 3 0 0 0 112 51 112 0 1 0 0 0 0 0 0 100 4 0 0 2 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 4 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 18 5 44 1 0 1 0 1398 0 0 0 100 7 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2121 104 145 0 7 11 0 105 0 1 0 99 1 1 0 7 26 3 23 0 3 2 0 292 0 0 0 100 2 0 0 0 27 4 28 0 5 10 0 608 0 0 0 100 3 0 0 0 136 59 140 0 5 15 1 91 0 0 0 100 4 0 0 3 226 104 22 0 3 6 0 317 0 0 0 100 5 0 0 3 217 101 11 0 1 1 0 13 0 0 0 100 6 1 0 22 25 4 57 3 2 12 0 1321 0 1 0 99 7 0 0 0 16 0 10 0 0 5 0 0 0 0 0 100 March 4, 2026 at 01:40:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 119 0 0 0 0 0 0 0 0 100 1 0 0 14 18 4 18 0 1 0 0 273 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 593 0 0 0 100 3 0 0 0 120 57 114 0 0 0 0 9 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 307 0 0 0 100 5 0 0 3 214 106 2 0 0 1 0 0 0 0 0 100 6 0 0 14 17 4 44 1 1 0 0 1312 0 0 0 100 7 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2106 101 115 0 0 0 0 0 0 1 0 99 1 0 0 7 31 4 10 0 1 0 0 262 0 0 0 100 2 0 0 0 28 3 8 0 1 0 0 594 0 0 0 100 3 0 0 0 143 60 120 1 0 0 0 11 0 0 0 100 4 0 0 3 231 104 8 1 0 1 0 305 0 0 0 100 5 0 0 3 229 101 12 0 1 1 0 0 0 0 0 100 6 0 0 14 32 4 40 1 0 0 0 1308 0 0 0 100 7 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 101 114 0 0 0 0 0 0 1 0 99 1 0 0 7 16 4 14 0 0 1 0 262 0 0 0 100 2 0 0 0 12 3 6 0 0 0 0 594 0 0 0 100 3 0 0 0 120 57 114 0 0 0 0 9 0 0 0 100 4 0 0 3 211 103 4 0 0 3 0 300 0 0 0 100 5 0 0 3 212 101 6 0 0 0 0 0 0 0 0 100 6 0 0 14 25 6 56 1 1 1 0 1308 0 0 0 100 7 0 0 0 7 0 2 0 0 2 0 0 0 0 0 100 March 4, 2026 at 01:40:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2834 106 1427 35 253 32 0 5871 6 3 0 92 1 63 0 7 658 8 1185 36 263 17 0 7197 6 2 0 92 2 16 0 0 640 6 1095 22 184 32 0 5766 6 2 0 92 3 29 0 0 756 10 1355 42 253 39 0 7902 6 2 0 92 4 12 0 353 815 110 1112 26 228 30 0 5902 6 2 0 92 5 20 0 3 765 106 971 23 162 13 0 4205 5 2 0 93 6 28 0 14 594 8 1123 22 236 23 0 7362 4 2 0 94 7 20 0 0 433 5 697 5 121 29 0 3777 4 1 0 95 March 4, 2026 at 01:40:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 106 224 0 0 0 0 8 0 0 0 99 1 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 2 0 0 0 15 4 10 0 0 0 0 595 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 5 0 0 3 209 101 4 0 0 0 0 3 0 0 0 100 6 0 0 14 18 5 44 1 0 0 0 1308 0 0 0 100 7 0 0 0 10 0 10 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:40:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 107 240 0 1 0 0 9 0 0 0 99 1 0 0 7 25 8 26 0 0 0 0 279 0 0 0 100 2 0 0 0 14 4 10 0 0 0 0 594 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 4 0 0 3 214 104 8 1 0 0 0 309 0 0 0 100 5 0 0 3 214 107 2 0 0 0 0 0 0 0 0 100 6 0 0 14 17 4 48 0 0 1 0 1332 0 0 0 100 7 0 0 0 11 0 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 227 0 1 0 0 10 0 0 0 100 1 0 0 7 13 4 6 0 0 1 0 261 0 0 0 100 2 0 0 0 15 4 8 0 0 1 0 597 0 0 0 100 3 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 4 0 0 7 211 103 4 0 1 1 0 301 0 0 0 100 5 0 0 7 211 102 4 0 0 1 0 1 0 0 0 100 6 0 0 14 21 6 40 1 0 1 0 1317 0 0 0 100 7 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:41:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 105 349 0 24 222 0 322 0 1 0 99 1 0 0 7 79 5 148 0 30 214 0 266 0 0 0 100 2 0 0 0 125 3 238 0 25 167 0 594 0 0 0 100 3 0 0 0 140 71 138 0 29 225 0 5 0 0 0 99 4 0 0 3 268 104 134 0 31 252 0 302 0 0 0 99 5 0 0 3 277 101 143 0 25 214 0 6 0 1 0 99 6 0 0 14 82 5 178 2 32 208 0 1317 0 1 0 99 7 0 0 0 68 0 136 0 21 215 0 0 0 0 0 100 March 4, 2026 at 01:41:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 216 0 1 0 0 0 0 0 0 100 1 0 0 7 12 3 8 0 0 0 0 261 0 0 0 100 2 0 0 0 16 3 16 0 1 0 0 594 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 5 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 17 4 42 1 1 1 0 1317 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 216 0 0 0 0 2 0 0 0 100 1 0 0 7 22 8 20 0 0 0 0 270 0 0 0 100 2 0 0 0 13 3 8 0 1 0 0 594 0 0 0 100 3 1 0 0 12 3 8 0 1 0 0 12 0 0 0 100 4 0 0 3 213 104 6 1 0 0 0 302 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 15 4 44 0 0 0 0 1331 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 214 0 0 0 0 0 0 0 0 100 1 0 0 7 30 11 30 0 0 0 0 282 0 0 0 100 2 0 0 0 14 3 10 0 0 0 0 594 0 0 0 100 3 0 0 0 14 1 12 0 1 0 0 0 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 307 0 0 0 100 5 0 0 3 213 106 2 0 0 0 0 0 0 0 0 100 6 0 0 14 17 4 46 1 1 1 0 1322 0 0 0 100 7 0 0 0 9 0 6 0 1 0 0 10 0 0 0 100 March 4, 2026 at 01:41:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 2150 105 255 0 6 5 3 58 0 1 0 99 1 0 0 7 48 8 31 0 4 1 0 648 0 0 0 100 2 1882 0 0 40 3 33 2 5 5 4 887 0 1 0 99 3 577 0 0 46 1 48 1 8 15 4 671 1 0 0 98 4 928 0 117 240 104 86 1 8 9 19 719 0 1 0 99 5 124 0 3 255 101 79 0 12 9 12 229 0 0 0 100 6 29 0 16 52 4 90 2 9 5 9 1532 0 0 0 99 7 13 0 0 35 0 33 0 6 5 3 90 0 0 0 100 March 4, 2026 at 01:41:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 222 0 0 0 0 5 0 0 0 99 1 0 0 7 12 2 10 0 0 3 0 260 0 0 0 100 2 0 0 0 12 3 8 0 1 2 0 595 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 300 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 17 5 44 1 1 1 0 1392 0 0 0 100 7 0 0 0 7 0 4 0 0 1 0 10 0 0 0 100 March 4, 2026 at 01:41:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 106 222 0 0 0 0 7 0 0 0 100 1 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 593 0 0 0 100 3 20 0 0 9 2 4 0 0 0 0 5 0 0 0 100 4 0 0 2 214 104 6 1 0 1 0 302 0 0 0 100 5 0 0 4 214 101 14 0 1 0 0 0 0 0 0 100 6 23 0 14 16 5 42 1 0 0 0 1395 0 0 0 100 7 0 0 0 6 0 2 0 0 0 0 10 0 0 0 100 March 4, 2026 at 01:41:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 108 308 0 2 0 0 342 0 1 0 99 1 0 0 7 13 4 10 0 0 0 0 264 0 0 0 100 2 0 0 0 15 4 10 0 0 0 0 595 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 3 0 0 0 100 4 0 0 2 213 104 8 0 0 0 0 303 0 0 0 100 5 0 0 4 216 104 10 0 0 0 0 4 0 0 0 100 6 3 0 14 60 24 94 1 4 1 0 1394 0 0 0 99 7 0 0 0 50 21 48 0 2 0 0 4 0 0 0 100 March 4, 2026 at 01:41:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 108 128 0 0 0 0 326 0 0 0 99 1 0 0 7 26 8 28 0 0 0 0 281 0 0 0 100 2 0 0 0 18 4 17 0 0 0 0 600 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 4 0 0 2 213 104 8 0 0 0 0 309 0 0 0 100 5 0 0 4 214 107 2 0 0 0 0 0 0 0 0 100 6 0 0 14 16 4 44 2 0 0 0 1392 0 0 0 100 7 0 0 0 110 50 108 0 0 1 0 20 0 0 0 100 March 4, 2026 at 01:41:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 114 0 0 1 0 0 0 0 0 100 1 0 0 7 24 9 18 0 0 1 0 270 0 0 0 100 2 0 0 0 15 4 8 0 0 1 0 598 0 0 0 100 3 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 4 0 0 7 212 104 4 0 0 1 0 301 0 0 0 100 5 0 0 7 211 102 4 0 0 1 0 1 0 0 0 100 6 0 0 14 19 5 40 0 0 2 0 1388 0 0 0 100 7 0 0 0 114 51 115 0 2 0 0 31 0 0 0 100 March 4, 2026 at 01:41:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 122 0 1 0 0 0 0 0 0 100 1 0 0 7 21 7 18 0 0 2 0 265 0 0 0 100 2 0 0 0 12 3 8 0 0 1 0 593 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 3 215 105 8 1 0 0 0 302 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 15 4 42 1 0 0 0 1387 0 0 0 100 7 0 0 0 109 50 106 0 0 3 0 10 0 0 0 100 March 4, 2026 at 01:41:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 0 0 0 0 100 1 0 0 7 18 7 14 0 0 0 0 266 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 594 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 16 4 40 1 0 0 0 1387 0 0 0 100 7 0 0 0 106 50 104 0 1 0 0 10 0 0 0 100 March 4, 2026 at 01:41:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 0 2251 106 473 15 64 8 0 1988 2 1 0 97 1 194 0 7 134 6 261 13 41 14 2 1509 2 1 0 97 2 9 0 0 151 10 453 8 45 3 0 2560 2 0 0 98 3 34 0 0 113 2 249 6 45 10 0 1673 2 0 0 98 4 380 0 87 270 105 149 7 34 8 0 1997 2 1 0 97 5 217 0 3 284 102 149 10 35 7 0 1678 2 1 0 98 6 63 0 14 98 6 317 11 43 3 0 2944 1 1 0 98 7 80 0 0 190 50 424 9 41 2 0 1792 1 0 0 98 March 4, 2026 at 01:41:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 118 0 0 0 0 0 0 0 0 100 1 0 0 7 19 4 20 0 0 0 0 273 0 0 0 100 2 0 0 0 17 3 18 0 1 0 0 594 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 307 0 0 0 100 5 0 0 3 215 108 2 0 0 0 0 0 0 0 0 100 6 0 0 14 27 10 56 0 1 0 0 1413 0 0 0 100 7 0 0 0 110 50 106 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 0 0 0 0 100 1 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 594 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 3 0 0 0 100 4 0 0 3 212 104 4 1 0 0 0 302 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 33 12 58 1 0 1 0 1411 0 0 0 99 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 101 206 0 22 99 0 0 0 1 0 99 1 0 0 7 77 3 146 0 26 161 0 261 0 0 0 100 2 0 0 0 128 3 237 0 19 138 0 595 0 0 0 100 3 0 0 0 124 60 126 0 27 140 0 0 0 0 0 100 4 0 0 3 263 104 121 0 24 149 0 300 0 0 0 100 5 0 0 3 251 101 93 0 17 132 0 0 0 1 0 99 6 0 0 14 89 10 186 1 27 136 0 1408 0 1 0 99 7 0 0 0 149 50 186 0 19 115 0 0 0 0 0 100 March 4, 2026 at 01:41:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 102 64 0 4 1 2 97 0 1 0 99 1 0 0 14 96 4 103 0 13 6 0 294 0 0 0 100 2 0 0 0 20 3 18 0 6 6 0 594 0 0 0 100 3 0 0 0 21 3 21 0 2 4 1 78 0 0 0 100 4 0 0 3 225 105 24 0 4 12 0 308 0 0 0 100 5 0 0 11 216 101 11 0 3 8 0 0 0 1 0 99 6 0 0 28 40 12 83 3 7 13 0 1353 0 1 0 99 7 0 0 0 117 50 118 0 4 9 0 18 0 0 0 100 March 4, 2026 at 01:41:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 8 0 1 0 0 0 0 0 0 100 1 0 0 7 121 2 116 0 0 0 0 263 0 0 0 100 2 0 0 7 16 4 12 0 1 0 0 595 0 0 0 100 3 0 0 0 27 10 20 0 0 0 0 11 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 300 0 0 0 100 5 0 0 3 211 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 19 5 45 1 1 1 0 1310 0 0 0 100 7 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 101 10 0 0 1 0 0 0 0 0 100 1 0 0 7 140 4 126 0 0 0 0 275 0 0 0 100 2 0 0 0 32 4 12 0 0 0 0 595 0 0 0 100 3 0 0 0 38 7 16 1 1 0 0 9 0 0 0 100 4 0 0 3 232 104 10 1 1 0 0 309 0 0 0 100 5 0 0 3 235 107 12 0 1 0 0 0 0 0 0 100 6 0 0 14 37 6 50 0 0 1 0 1319 0 0 0 100 7 0 0 112 110 50 108 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 10 0 1 0 0 0 0 0 0 100 1 0 0 7 120 3 112 0 0 1 0 260 0 0 0 100 2 0 0 0 15 4 6 0 0 1 0 594 0 0 0 100 3 0 0 0 28 10 20 0 0 1 0 11 0 0 0 100 4 0 0 7 214 104 6 0 1 1 0 304 0 0 0 100 5 0 0 7 214 102 6 0 0 1 0 1 0 0 0 100 6 0 0 21 27 6 52 1 1 1 0 1309 0 0 0 99 7 0 0 0 107 50 100 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:41:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2913 102 1562 44 280 275 0 6876 6 3 0 90 1 7 0 7 926 4 1705 49 309 305 0 7932 7 3 0 90 2 1 0 0 746 5 1223 19 215 229 0 5893 5 2 0 92 3 17 0 0 838 95 1382 46 297 243 0 6921 6 3 0 91 4 41 0 353 822 106 1153 25 258 232 0 5709 5 2 0 93 5 0 0 3 783 103 994 16 187 232 0 4921 5 2 0 93 6 2 0 14 694 11 1273 31 238 237 0 6270 6 2 0 92 7 1 0 0 707 39 1245 15 168 266 0 4518 5 2 0 94 March 4, 2026 at 01:41:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 1 1 0 0 1043 0 1 0 99 1 0 0 7 10 3 6 0 0 0 0 261 0 0 0 100 2 0 0 0 19 2 12 0 0 0 0 595 0 0 0 100 3 1 0 0 19 7 14 0 0 0 0 8 0 0 0 100 4 0 0 3 214 104 10 0 1 0 0 320 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 15 3 12 0 0 0 0 266 0 0 0 100 7 0 0 0 110 50 110 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 154 1 1 1 0 1043 0 1 0 99 1 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 593 0 0 0 100 3 0 0 0 20 7 16 0 0 0 0 11 0 0 0 100 4 0 0 3 216 105 10 1 0 0 0 315 0 0 0 100 5 0 0 3 210 102 4 0 0 0 0 1 0 0 0 100 6 0 0 14 11 3 8 0 0 0 0 266 0 0 0 100 7 0 0 0 111 52 106 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:41:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 148 1 0 0 0 1044 0 1 0 99 1 0 0 7 16 4 18 0 0 0 0 275 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 595 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 5 0 0 0 100 4 1 0 2 215 104 10 0 0 0 0 317 0 0 0 100 5 0 0 4 214 107 2 0 0 0 0 0 0 0 0 100 6 0 0 14 13 3 12 0 1 0 0 271 0 0 0 100 7 0 0 0 111 51 108 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:41:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1921 0 0 2145 102 119 3 13 7 7 1465 0 1 0 98 1 36 0 7 130 5 147 0 19 6 4 433 0 0 0 100 2 1445 0 113 39 2 65 2 8 8 12 1627 2 1 0 98 3 106 0 0 60 6 78 1 12 8 11 519 0 0 0 100 4 33 0 3 256 105 62 0 12 7 5 413 0 0 0 100 5 13 0 6 231 101 19 0 6 5 3 61 0 0 0 100 6 6 0 14 38 3 34 1 9 4 5 316 0 0 0 100 7 0 0 0 128 52 112 0 2 2 0 21 0 0 0 100 March 4, 2026 at 01:41:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 46 1 1 1 0 1126 0 1 0 99 1 0 0 7 136 8 134 0 0 1 0 275 0 0 0 100 2 0 0 0 17 2 16 0 1 2 0 594 0 0 0 100 3 0 0 0 8 1 4 0 0 2 0 0 0 0 0 100 4 0 0 3 213 104 8 0 1 0 0 310 0 0 0 100 5 0 0 3 215 108 2 0 0 0 0 0 0 0 0 100 6 0 0 14 13 4 10 0 0 0 0 267 0 0 0 100 7 0 0 0 113 52 108 0 0 0 0 4 0 0 0 100 March 4, 2026 at 01:41:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 49 0 0 2154 102 188 1 29 2 0 2529 1 1 0 98 1 64 0 7 152 8 394 7 36 4 2 1996 1 1 0 98 2 4 0 0 58 3 86 5 19 6 0 1631 2 0 0 98 3 364 0 0 53 1 88 1 21 5 0 1348 2 0 0 97 4 282 0 101 246 106 72 6 13 15 3 1906 3 1 0 96 5 275 0 3 261 101 134 4 24 3 1 1503 1 0 0 98 6 40 0 14 69 3 154 6 28 2 0 1865 1 0 0 99 7 0 0 0 148 50 308 2 28 0 0 1499 1 0 0 99 March 4, 2026 at 01:41:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 140 1 0 0 0 1135 0 1 0 99 1 0 0 7 35 11 30 0 0 0 0 274 0 0 0 100 2 0 0 0 13 3 8 0 1 0 0 594 0 0 0 100 3 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 4 0 0 3 211 104 6 0 1 0 0 300 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 13 4 8 0 0 0 0 267 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2121 102 163 1 10 7 0 1206 0 1 0 99 1 0 0 7 51 10 62 0 9 9 0 311 0 0 0 100 2 0 0 7 64 24 63 0 5 9 0 613 0 0 0 100 3 0 0 0 21 2 16 1 2 4 0 8 0 0 0 100 4 0 0 3 228 105 38 0 6 13 1 385 0 0 0 100 5 0 0 3 222 109 11 0 2 10 0 6 0 0 0 100 6 0 0 14 34 5 39 1 1 5 1 318 0 0 0 100 7 0 0 8 78 29 84 0 5 11 0 15 0 1 0 99 March 4, 2026 at 01:41:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 115 0 2 1 0 1045 0 1 0 99 1 0 0 7 33 8 24 0 1 1 0 268 0 0 0 100 2 0 0 0 113 52 107 0 1 0 0 594 0 0 0 100 3 0 0 7 12 2 6 0 1 1 0 3 0 0 0 100 4 0 0 7 215 105 6 0 0 1 0 301 0 0 0 100 5 0 0 7 212 102 4 0 0 1 0 1 0 0 0 100 6 0 0 14 50 8 39 1 1 1 0 269 0 0 0 100 7 0 0 0 11 2 2 0 0 1 0 21 0 0 0 100 March 4, 2026 at 01:41:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2157 103 235 1 13 110 0 1044 0 1 0 99 1 0 0 7 155 10 242 0 20 126 0 271 0 0 0 100 2 0 0 0 168 52 201 0 17 149 0 594 0 0 0 100 3 0 0 0 138 64 105 0 19 89 0 0 0 0 0 100 4 0 0 3 295 105 142 1 26 123 0 302 0 0 0 100 5 0 0 3 271 101 108 0 20 124 0 0 0 0 0 100 6 0 0 14 70 3 97 0 18 119 0 266 0 0 0 100 7 0 0 0 67 0 91 0 20 105 0 0 0 0 0 100 March 4, 2026 at 01:41:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 102 144 1 0 0 0 1042 0 1 0 99 1 0 0 7 39 12 36 0 1 0 0 277 0 0 0 100 2 0 0 0 112 52 106 0 0 0 0 594 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 3 214 104 4 0 0 0 0 300 0 0 0 100 5 0 0 3 211 101 4 0 1 0 0 0 0 0 0 100 6 0 0 14 16 3 12 0 2 0 0 269 0 0 0 100 7 0 0 0 11 0 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 79 0 0 2844 103 1439 44 236 34 0 7190 8 3 0 90 1 54 0 0 703 11 1299 59 273 37 0 8054 8 2 0 90 2 29 0 0 709 38 1091 31 178 32 0 6684 6 2 0 92 3 16 0 0 638 1 1142 35 232 36 0 8239 6 2 0 92 4 4 0 353 832 104 1171 35 224 51 0 6277 6 2 0 92 5 38 0 3 801 104 967 21 163 25 0 4611 5 2 0 94 6 28 0 21 643 5 1143 30 203 27 0 6472 5 2 0 94 7 15 0 0 580 11 994 24 134 28 0 4812 5 1 0 94 March 4, 2026 at 01:41:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 102 152 1 2 0 0 1053 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 5 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 595 0 0 0 100 3 0 0 0 16 1 8 0 1 0 0 0 0 0 0 100 4 0 0 3 215 104 10 0 1 0 0 307 0 0 0 100 5 0 0 3 220 109 4 0 1 1 0 0 0 0 0 100 6 0 0 21 34 12 38 0 1 0 0 548 0 0 0 100 7 0 0 0 113 51 110 0 1 0 0 23 0 0 0 100 March 4, 2026 at 01:41:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 140 1 0 0 0 1054 0 1 0 99 1 0 0 0 14 1 12 0 1 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 594 0 0 0 100 3 0 0 0 17 4 10 0 1 0 0 8 0 0 0 100 4 0 0 3 222 104 14 2 1 0 0 305 0 0 0 100 5 0 0 3 210 102 6 0 1 0 0 0 0 0 0 100 6 0 0 21 28 11 24 0 0 0 0 536 0 0 0 100 7 0 0 0 105 50 102 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 103 249 1 31 243 0 1054 0 1 0 99 1 0 0 0 134 1 200 0 28 258 0 0 0 0 0 100 2 0 0 0 141 2 275 0 24 260 0 593 0 1 0 99 3 0 0 0 138 72 128 0 27 244 0 0 0 1 0 99 4 0 0 3 288 104 151 0 24 219 0 300 0 0 0 100 5 0 0 3 281 102 150 0 18 251 0 0 0 1 0 99 6 0 0 21 88 9 160 0 33 197 0 531 0 0 0 100 7 0 0 0 149 39 216 0 14 247 0 0 0 1 0 99 March 4, 2026 at 01:41:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2145 102 132 1 7 8 5 1090 0 1 0 99 1 9 0 0 134 1 125 0 8 4 0 68 0 0 0 100 2 8 0 0 41 2 37 0 5 4 2 674 0 0 0 100 3 3 0 0 36 3 24 0 5 3 2 79 0 0 0 100 4 2696 0 117 243 104 72 2 9 7 12 735 1 1 0 98 5 753 0 3 255 102 75 2 14 10 20 1016 1 1 0 98 6 52 0 23 121 35 138 1 13 6 10 982 0 0 0 99 7 17 0 0 48 0 59 0 11 5 4 140 0 0 0 100 March 4, 2026 at 01:41:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 124 1 4 0 0 1139 0 1 0 99 1 0 0 0 26 1 18 0 0 0 0 0 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 595 0 0 0 100 3 0 0 0 12 0 12 0 1 0 0 0 0 0 0 100 4 0 0 3 214 104 6 0 0 0 0 301 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 21 41 15 36 0 1 0 0 528 0 0 0 100 7 2 0 0 98 46 94 0 1 0 0 6 0 0 0 100 March 4, 2026 at 01:41:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2187 103 318 7 33 1 0 2279 1 1 0 98 1 362 0 0 130 21 255 5 43 1 4 1651 1 0 0 99 2 13 0 0 66 3 111 7 23 3 0 1783 2 0 0 98 3 66 0 0 72 1 192 6 33 2 0 1343 1 0 0 99 4 37 0 86 280 104 181 16 26 11 0 1695 2 0 0 97 5 353 0 6 293 106 165 6 34 5 0 1452 2 1 0 97 6 331 0 14 120 6 266 13 36 7 0 2446 3 1 0 96 7 136 0 7 128 35 240 6 19 3 2 1694 2 1 0 97 March 4, 2026 at 01:41:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 138 1 1 0 0 1132 0 1 0 99 1 0 0 0 110 51 102 0 0 1 0 0 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 594 0 0 0 100 3 0 0 0 13 1 6 0 1 1 0 0 0 0 0 100 4 0 0 7 220 104 18 0 1 1 0 304 0 0 0 100 5 0 0 7 213 103 4 0 0 1 0 1 0 0 0 100 6 1 0 14 36 11 30 0 0 1 0 277 0 0 0 100 7 0 0 7 13 4 4 0 0 1 0 260 0 0 0 100 March 4, 2026 at 01:41:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2160 102 242 0 26 126 0 1161 0 1 0 99 1 0 0 7 193 51 263 2 16 135 0 73 0 0 0 100 2 0 0 0 128 2 232 0 15 131 1 671 0 0 0 100 3 0 0 0 147 68 152 1 32 155 0 11 0 0 0 99 4 0 0 3 283 104 147 0 30 155 0 316 0 0 0 100 5 0 0 3 266 101 121 0 22 114 0 24 0 1 0 99 6 1 0 14 90 11 125 2 26 110 0 317 0 0 0 100 7 0 0 16 71 3 137 0 18 131 0 266 0 1 0 99 March 4, 2026 at 01:41:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 111 1 2 0 0 1045 0 1 0 99 1 0 0 0 153 52 144 0 2 0 0 1 0 0 0 100 2 0 0 7 12 2 8 0 1 0 0 595 0 0 0 100 3 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 4 0 0 3 215 103 8 0 0 0 0 303 0 0 0 100 5 0 0 3 211 102 2 0 0 0 0 0 0 0 0 100 6 0 0 14 33 12 28 0 1 0 0 294 0 0 0 100 7 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:41:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2110 102 147 1 0 0 0 1043 0 1 0 99 1 0 0 0 125 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 28 2 6 0 0 0 0 593 0 0 0 100 3 23 0 7 28 2 8 0 1 0 0 5 0 0 0 100 4 0 0 3 231 104 6 1 0 0 0 302 0 0 0 100 5 0 0 3 227 101 4 0 0 0 0 0 0 0 0 100 6 0 0 14 43 8 28 0 1 0 0 275 0 0 0 100 7 0 0 7 29 4 8 0 0 0 0 262 0 0 0 100 March 4, 2026 at 01:41:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 150 1 0 0 0 1040 0 1 0 99 1 0 0 0 110 51 106 0 0 0 0 5 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 594 0 0 0 100 3 0 0 0 12 1 6 0 0 0 0 0 0 0 0 100 4 0 0 3 215 103 10 0 1 0 0 307 0 0 0 100 5 0 0 3 216 106 2 0 0 0 0 0 0 0 0 100 6 0 0 14 40 13 40 0 2 0 0 296 0 0 0 100 7 0 0 7 22 4 24 0 2 0 0 266 0 0 0 100 March 4, 2026 at 01:41:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 0 2659 102 1120 36 176 38 0 5087 5 2 0 92 1 16 0 0 638 45 1093 33 212 24 0 5353 5 2 0 94 2 22 0 0 507 2 876 27 128 15 0 4723 3 1 0 95 3 54 0 0 458 4 888 33 200 46 0 5896 4 2 0 94 4 5 0 241 640 106 832 22 173 36 0 4552 5 2 0 94 5 0 0 3 699 102 862 23 116 17 1 3372 4 1 0 95 6 1 0 14 464 10 805 26 168 23 0 4845 4 1 0 95 7 5 0 7 387 5 643 11 94 39 0 3294 4 1 0 95 March 4, 2026 at 01:41:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2441 107 727 13 94 257 0 2610 2 2 0 96 1 1 0 0 268 2 491 12 106 233 0 2382 2 1 0 97 2 3 0 0 276 3 490 11 81 204 0 2135 2 1 0 97 3 0 0 0 333 88 417 7 97 253 0 1823 1 1 0 98 4 0 0 115 475 104 510 11 106 241 0 1768 1 1 0 97 5 1 0 3 428 102 380 4 71 181 0 1268 1 1 0 98 6 0 0 14 315 12 570 7 89 204 0 2409 2 1 0 98 7 2 0 7 367 43 617 5 60 186 0 1555 2 1 0 97 March 4, 2026 at 01:41:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2152 111 182 1 7 2 3 1109 0 1 0 99 1 3323 0 113 45 3 89 3 6 10 18 1258 2 1 0 97 2 103 0 0 65 3 82 0 10 11 17 709 0 0 0 100 3 36 0 2 60 2 75 0 13 11 12 226 0 0 0 100 4 60 0 3 255 103 71 0 12 7 8 167 0 0 0 100 5 15 0 3 243 102 43 0 8 9 6 51 0 0 0 100 6 5 0 14 41 5 37 1 6 2 3 648 0 0 0 100 7 0 0 7 129 53 114 0 4 2 0 264 0 0 0 100 March 4, 2026 at 01:41:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 105 96 1 3 0 0 1133 0 1 0 99 1 0 0 0 67 2 60 0 2 0 0 0 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 596 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 212 101 4 0 0 0 0 0 0 0 0 100 6 0 0 14 16 5 14 0 0 0 0 577 0 0 0 100 7 0 0 7 108 52 104 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:41:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 107 156 0 2 0 0 1134 0 1 0 99 1 0 0 0 13 2 10 0 0 0 0 5 0 0 0 100 2 0 0 0 17 3 18 0 1 0 0 595 0 0 0 100 3 0 0 0 9 1 4 0 1 0 0 1 0 0 0 100 4 0 0 3 216 103 10 0 1 0 0 9 0 0 0 100 5 0 0 3 214 106 2 0 0 0 0 0 0 0 0 100 6 0 0 14 22 6 24 1 1 1 0 582 0 0 0 100 7 0 0 7 113 53 110 0 0 1 0 261 0 0 0 100 March 4, 2026 at 01:41:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 109 166 1 3 1 0 1455 0 1 0 99 1 0 0 0 59 24 52 0 1 1 0 3 0 0 0 100 2 0 0 0 16 3 10 0 0 1 0 598 0 0 0 100 3 0 0 0 15 1 12 0 1 1 0 0 0 0 0 100 4 0 0 7 215 102 6 0 2 1 0 0 0 0 0 100 5 0 0 7 211 102 4 0 0 1 0 1 0 0 0 100 6 0 0 14 16 5 10 0 0 1 0 576 0 0 0 100 7 0 0 7 55 25 51 0 1 0 0 281 0 0 0 100 March 4, 2026 at 01:41:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 147 0 10 2152 107 175 6 13 1 0 2729 3 1 0 96 1 268 0 0 154 45 199 6 13 7 0 1382 3 1 0 96 2 120 0 0 87 10 139 4 23 6 0 1970 1 0 0 98 3 63 0 0 96 0 275 4 25 6 0 1507 2 0 0 98 4 252 0 73 252 103 133 3 20 5 0 1391 1 0 0 99 5 13 0 3 275 102 111 4 24 2 0 1153 1 0 0 99 6 0 0 14 59 4 126 6 22 0 0 1967 1 0 0 99 7 0 0 7 59 2 121 4 25 0 0 1549 1 0 0 99 March 4, 2026 at 01:41:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 146 1 2 0 0 1132 0 1 0 99 1 0 0 0 29 9 22 1 0 0 0 22 0 0 0 100 2 0 0 0 117 52 114 0 2 0 0 601 0 0 0 100 3 0 0 0 16 1 8 1 0 0 0 14 0 0 0 100 4 0 0 17 225 105 29 0 4 0 0 12 0 0 0 100 5 0 0 3 214 102 4 0 0 1 0 8 0 0 0 100 6 5 0 14 18 4 14 0 0 4 0 576 0 0 0 100 7 0 0 7 11 2 6 0 1 3 0 268 0 0 0 100 March 4, 2026 at 01:41:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 100 1 3 0 0 1136 0 1 0 99 1 0 0 0 57 2 50 0 2 0 0 0 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 595 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 223 108 16 0 0 0 0 10 0 0 0 100 5 0 0 3 213 101 12 0 1 0 0 0 0 0 0 100 6 0 0 14 18 4 14 1 1 0 0 568 0 0 0 100 7 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:41:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2117 102 152 1 7 11 0 1058 0 1 0 99 1 0 0 0 24 2 23 0 4 11 0 28 0 0 0 100 2 0 0 0 124 52 125 0 0 3 0 669 0 0 0 100 3 0 0 7 20 1 15 0 3 2 0 7 0 0 0 100 4 0 0 3 229 105 23 0 2 5 0 35 0 0 0 100 5 0 0 12 221 107 11 0 4 10 0 8 0 1 0 99 6 0 0 14 62 16 66 0 6 3 0 686 0 0 0 100 7 1 0 7 21 2 25 0 6 9 0 284 0 0 0 100 March 4, 2026 at 01:41:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 53 1 2 0 0 1041 0 1 0 99 1 0 0 0 101 2 92 0 2 0 0 0 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 595 0 0 0 100 3 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 4 0 0 10 212 103 6 0 1 0 0 2 0 0 0 100 5 0 0 3 211 101 4 0 1 0 0 0 0 0 0 100 6 0 0 14 39 9 38 2 1 0 0 574 0 0 0 100 7 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:41:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2193 103 206 0 22 133 0 1043 0 1 0 99 1 0 0 0 186 5 236 0 30 147 0 5 0 0 0 100 2 0 0 0 176 52 208 0 23 89 0 593 0 0 0 100 3 0 0 0 170 78 140 0 25 133 0 0 0 0 0 100 4 0 0 3 286 102 130 0 28 133 0 0 0 0 0 100 5 0 0 3 271 101 99 0 18 130 0 3 0 1 0 99 6 0 0 14 177 12 284 0 21 109 0 578 0 0 0 99 7 0 0 7 87 2 135 0 17 134 0 260 0 0 0 100 March 4, 2026 at 01:41:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 101 120 1 2 0 0 1042 0 1 0 99 1 0 0 0 33 4 24 0 0 0 0 1 0 0 0 100 2 0 0 0 112 52 106 0 0 0 0 595 0 0 0 100 3 0 0 0 10 1 4 0 0 0 0 1 0 0 0 100 4 0 0 2 213 103 6 0 0 0 0 2 0 0 0 100 5 0 0 4 209 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 32 9 28 1 0 0 0 574 0 0 0 100 7 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:41:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2898 103 1546 34 270 22 0 7659 7 3 0 90 1 47 0 0 789 9 1378 51 275 19 0 7539 7 2 0 91 2 28 0 0 682 10 1140 16 192 27 0 6311 6 2 0 92 3 7 0 0 768 36 1399 39 252 41 0 7901 7 2 0 91 4 4 0 368 755 108 1066 27 250 26 0 6127 5 2 0 93 5 20 0 2 824 104 1050 21 174 24 1 4500 4 2 0 94 6 48 0 14 665 13 1169 38 215 39 0 7033 6 2 0 92 7 36 0 7 492 9 820 12 136 17 0 4775 4 1 0 95 March 4, 2026 at 01:41:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 115 1 0 0 0 593 0 1 0 99 1 0 0 0 19 3 52 0 3 0 0 455 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 596 0 0 0 100 3 0 0 0 110 51 106 0 0 0 0 4 0 0 0 100 4 0 0 3 213 103 8 0 0 0 0 9 0 0 0 100 5 0 0 3 215 106 2 0 0 0 0 0 0 0 0 100 6 0 0 14 30 9 32 1 0 0 0 589 0 0 0 100 7 0 0 7 13 3 10 0 0 0 0 261 0 0 0 100 March 4, 2026 at 01:41:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 652 0 0 2145 100 169 1 10 7 11 964 1 1 0 98 1 12 0 0 49 5 76 0 11 8 4 1212 0 0 0 99 2 6 0 0 35 3 23 0 4 5 2 648 0 0 0 100 3 6 0 0 140 52 133 0 7 5 2 125 0 0 0 100 4 1893 0 7 244 102 40 2 10 3 3 357 0 1 0 99 5 822 0 120 233 102 59 1 10 11 14 166 0 1 0 99 6 149 0 14 71 10 97 1 11 11 15 781 0 0 0 100 7 20 0 10 45 3 44 0 7 14 9 321 0 0 0 100 March 4, 2026 at 01:42:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 100 231 0 26 166 0 3 0 1 0 99 1 0 0 0 84 5 182 1 27 213 0 1125 0 1 0 99 2 0 0 0 80 2 151 1 26 184 0 593 0 0 0 99 3 0 0 0 224 117 204 0 24 201 0 1 0 0 0 100 4 0 0 3 303 115 166 0 26 239 0 12 0 1 0 99 5 0 0 3 285 101 169 0 25 192 0 0 0 1 0 99 6 0 0 14 99 9 179 2 31 250 0 575 0 0 0 99 7 0 0 7 128 2 262 0 35 196 0 260 0 0 0 99 March 4, 2026 at 01:42:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 122 0 0 0 0 8 0 0 0 100 1 0 0 0 18 5 46 1 0 1 0 1139 0 0 0 100 2 0 0 0 11 2 6 0 1 0 0 595 0 0 0 100 3 0 0 0 17 2 18 0 1 0 0 4 0 0 0 100 4 0 0 3 307 151 102 0 0 0 0 0 0 0 0 100 5 0 0 3 209 101 4 0 1 0 0 10 0 0 0 100 6 0 0 14 24 8 20 0 0 0 0 891 0 0 0 100 7 0 0 7 9 2 6 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 105 122 0 0 0 0 6 0 0 0 100 1 0 0 0 14 4 38 1 0 0 0 1125 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 594 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 309 152 104 0 0 0 0 2 0 0 0 100 5 0 0 3 209 101 4 0 0 0 0 10 0 0 0 100 6 0 0 14 12 3 8 1 0 0 0 566 0 0 0 100 7 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2214 103 399 6 37 4 0 1396 2 1 0 97 1 275 0 17 80 4 186 12 25 7 0 2823 2 1 0 97 2 101 0 0 104 3 310 16 34 10 0 2073 2 0 0 98 3 0 0 0 96 1 232 8 44 7 0 1716 1 0 0 98 4 0 0 100 307 108 263 4 38 0 0 1519 1 0 0 98 5 21 0 4 425 157 382 6 33 1 0 1491 1 0 0 99 6 415 0 14 117 6 254 8 33 7 0 2768 3 1 0 96 7 206 0 7 78 3 134 5 21 3 0 1732 2 1 0 98 March 4, 2026 at 01:42:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 122 0 0 0 0 9 0 0 0 100 1 0 0 0 16 4 38 1 0 0 0 1132 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 594 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 213 103 6 0 0 0 0 2 0 0 0 100 5 0 0 3 311 150 112 0 1 1 0 0 0 0 0 100 6 0 0 14 11 3 8 1 0 0 0 566 0 0 0 100 7 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 107 265 0 21 119 0 50 0 1 0 99 1 2 0 0 106 8 203 0 31 139 0 1161 0 1 0 99 2 0 0 9 69 2 122 0 26 159 1 681 0 0 0 100 3 0 0 7 131 65 115 0 26 124 0 7 0 1 0 99 4 0 0 3 285 102 149 0 25 127 0 15 0 0 0 100 5 0 0 17 359 150 207 1 15 128 1 3 0 1 0 99 6 0 0 14 79 5 134 0 26 117 0 570 0 0 0 100 7 0 0 7 124 2 228 0 15 106 0 260 0 0 0 100 March 4, 2026 at 01:42:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 104 0 0 0 0 0 0 0 0 100 1 0 0 0 35 10 58 1 0 0 0 1053 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 595 0 0 0 100 3 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 4 0 0 10 212 103 6 0 1 0 0 2 0 0 0 100 5 0 0 3 311 150 107 0 2 0 0 0 0 0 0 100 6 0 0 14 18 3 18 1 1 0 0 566 0 0 0 100 7 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 101 106 0 0 0 0 0 0 0 0 100 1 0 0 0 49 9 56 2 0 0 0 1049 0 0 0 100 2 0 0 0 27 3 6 0 0 0 0 595 0 0 0 100 3 0 0 0 23 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 234 105 12 0 0 0 0 5 0 0 0 100 5 0 0 115 247 119 43 0 1 0 0 4 0 0 0 100 6 0 0 14 99 37 80 0 1 1 0 568 0 0 0 100 7 0 0 7 30 2 16 0 1 1 0 261 0 0 0 100 March 4, 2026 at 01:42:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 110 0 1 0 0 0 0 0 0 100 1 0 0 0 42 12 66 1 0 1 0 1061 0 0 0 100 2 0 0 0 15 3 11 0 1 0 0 594 0 0 0 100 3 0 0 0 12 2 4 0 0 0 0 1 0 0 0 100 4 1 0 3 216 104 10 0 0 0 0 8 0 0 0 100 5 0 0 10 217 107 4 0 0 0 0 0 0 0 0 100 6 0 0 14 38 14 36 1 0 0 0 581 0 0 0 100 7 0 0 7 96 43 94 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:42:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 2827 101 1362 36 239 42 0 5935 7 3 0 90 1 22 0 0 786 10 1389 44 266 23 0 7034 6 2 0 92 2 0 0 0 709 8 1172 43 211 26 0 6259 5 2 0 93 3 2 0 0 630 1 1246 40 268 27 0 8740 6 2 0 91 4 0 0 353 796 126 1114 28 220 28 0 5827 5 2 0 93 5 2 0 3 758 102 966 14 150 15 0 5427 5 2 0 93 6 55 0 14 658 7 1231 39 236 28 0 7180 7 2 0 91 7 27 0 7 611 25 1041 24 132 20 0 4402 4 1 0 94 March 4, 2026 at 01:42:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 109 192 0 23 202 0 14 0 1 0 99 1 0 0 0 151 5 226 1 40 208 0 22 0 0 0 99 2 0 0 0 83 6 154 0 24 233 0 597 0 0 0 100 3 0 0 0 167 82 193 1 31 212 0 1045 0 1 0 99 4 0 0 2 388 152 270 0 33 235 0 2 0 0 0 100 5 0 0 4 264 101 127 1 19 212 0 0 0 0 0 100 6 0 0 14 75 3 142 1 27 204 0 565 0 0 0 99 7 0 0 7 144 2 279 0 24 158 0 260 0 0 0 100 March 4, 2026 at 01:42:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 120 0 0 0 0 5 0 0 0 100 1 0 0 0 10 2 6 0 0 0 0 11 0 0 0 100 2 0 0 0 17 6 12 0 0 0 0 600 0 0 0 100 3 0 0 0 10 1 34 1 0 0 0 1042 0 0 0 100 4 0 0 3 307 151 102 0 0 0 0 0 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 13 3 10 0 1 0 0 567 0 0 0 100 7 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 116 1 0 0 0 5 0 0 0 100 1 0 0 0 10 1 6 0 1 0 0 10 0 0 0 100 2 0 0 0 20 5 20 0 1 0 0 595 0 0 0 100 3 0 0 0 10 1 36 1 1 0 0 1042 0 0 0 100 4 0 0 3 309 152 104 0 0 0 0 2 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 12 3 8 1 1 0 0 565 0 0 0 100 7 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 835 0 113 2146 108 190 0 10 5 17 496 0 1 0 99 1 93 0 0 116 33 141 0 12 7 9 141 0 0 0 100 2 31 0 2 55 7 75 0 9 9 12 710 0 0 0 100 3 1911 0 0 50 1 86 3 11 10 8 1482 0 1 0 99 4 16 0 3 273 119 70 0 7 10 4 89 0 0 0 100 5 13 0 3 247 107 34 0 9 7 5 98 0 0 0 100 6 8 0 14 52 7 52 1 7 5 3 646 0 0 0 100 7 639 0 7 45 2 42 2 6 3 4 1200 1 0 0 98 March 4, 2026 at 01:42:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 0 0 0 109 51 106 0 0 0 0 20 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 593 0 0 0 100 3 0 0 0 10 1 34 1 0 0 0 1125 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 30 11 24 1 0 0 0 575 0 0 0 100 7 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 2282 106 475 3 59 105 0 1442 1 1 0 98 1 463 0 4 146 19 311 2 41 145 1 1778 2 1 0 97 2 219 0 0 173 5 394 5 58 154 1 2352 1 1 0 98 3 61 0 0 195 68 257 8 48 82 0 2230 2 1 0 97 4 68 0 87 301 102 219 4 50 169 0 968 2 1 0 97 5 1 0 3 336 102 374 3 50 112 0 1467 1 1 0 98 6 46 0 14 158 18 403 6 65 154 0 1950 1 1 0 98 7 151 0 7 203 18 410 8 42 108 1 2054 2 1 0 97 March 4, 2026 at 01:42:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 208 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 25 10 20 0 0 0 0 603 0 0 0 100 3 0 0 0 11 1 36 1 0 0 0 1131 0 0 0 100 4 0 0 3 213 103 6 0 0 0 0 2 0 0 0 100 5 0 0 3 213 101 12 0 1 0 0 0 0 0 0 100 6 0 0 14 15 4 8 1 0 0 0 566 0 0 0 100 7 0 0 7 10 3 6 0 0 0 0 261 0 0 0 100 March 4, 2026 at 01:42:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 100 186 0 8 2 1 147 0 1 0 99 1 0 0 0 75 5 79 0 7 10 0 31 0 0 0 100 2 0 0 7 38 12 41 0 7 10 0 623 0 0 0 100 3 0 0 0 23 2 50 1 5 11 0 1149 0 0 0 100 4 0 0 3 219 103 10 0 3 4 0 17 0 0 0 100 5 0 0 3 218 101 13 0 6 14 0 7 0 0 0 100 6 0 0 22 27 5 26 0 4 5 0 569 0 1 0 99 7 0 0 7 19 2 19 1 5 2 0 289 0 0 0 100 March 4, 2026 at 01:42:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 197 0 3 0 0 0 0 1 0 99 1 0 0 0 56 13 50 0 0 0 0 25 0 0 0 100 2 0 0 0 19 5 14 0 0 0 0 594 0 0 0 100 3 0 0 7 13 2 38 1 1 1 0 1046 0 0 0 100 4 0 0 3 217 103 10 0 1 0 0 9 0 0 0 100 5 0 0 3 217 107 4 0 0 0 0 0 0 0 0 100 6 0 0 14 23 4 24 1 1 0 0 570 0 0 0 100 7 0 0 7 15 3 12 0 1 0 0 286 0 0 0 100 March 4, 2026 at 01:42:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2109 100 207 0 0 1 0 1 0 1 0 99 1 0 0 0 39 8 14 0 0 1 0 9 0 0 0 100 2 0 0 0 32 5 8 0 0 1 0 594 0 0 0 100 3 0 0 0 31 2 36 1 0 2 0 1042 0 0 0 100 4 0 0 7 233 102 12 0 3 0 0 0 0 0 0 100 5 0 0 7 229 103 4 0 0 1 0 1 0 0 0 100 6 0 0 14 43 9 18 0 0 1 0 575 0 0 0 100 7 0 0 7 32 3 14 0 1 1 0 260 0 0 0 100 March 4, 2026 at 01:42:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2148 100 257 0 9 42 0 0 0 1 0 99 1 0 0 0 76 10 123 0 12 80 0 14 0 0 0 100 2 0 0 0 75 16 108 0 12 58 0 597 0 0 0 100 3 0 0 0 111 59 116 0 17 61 0 1060 0 0 0 100 4 0 0 3 266 103 109 0 18 66 0 2 0 0 0 100 5 0 0 3 254 103 88 0 9 65 0 9 0 0 0 100 6 0 0 14 56 4 91 1 13 56 0 565 0 0 0 100 7 0 0 7 101 2 186 0 10 54 0 260 0 0 0 100 March 4, 2026 at 01:42:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2854 100 1384 36 243 18 0 6140 6 2 0 92 1 0 0 0 803 20 1490 45 288 40 0 7414 7 2 0 91 2 1 0 0 813 40 1310 38 189 33 0 6417 5 2 0 93 3 10 0 0 667 1 1302 49 260 21 0 8845 6 2 0 92 4 20 0 353 745 103 1071 28 227 27 0 6111 6 2 0 92 5 9 0 3 787 101 1025 23 169 34 0 4952 6 2 0 93 6 15 0 14 581 9 1043 29 215 30 0 7424 6 2 0 92 7 31 0 7 532 2 910 11 122 19 0 4296 5 1 0 93 March 4, 2026 at 01:42:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 110 0 0 1 0 10 0 0 0 100 1 0 0 0 114 52 114 0 1 2 0 0 0 0 0 100 2 0 0 0 19 3 14 0 1 0 0 594 0 0 0 100 3 0 0 0 10 2 32 1 0 0 0 1042 0 0 0 100 4 0 0 3 213 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 14 22 8 18 1 0 0 0 573 0 0 0 100 7 0 0 7 11 3 4 0 0 0 0 259 0 0 0 100 March 4, 2026 at 01:42:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 110 0 0 0 0 10 0 0 0 100 1 0 0 0 118 54 118 0 0 0 0 15 0 0 0 100 2 0 0 0 22 4 18 0 0 0 0 595 0 0 0 100 3 0 0 0 14 3 38 1 0 0 0 1047 0 0 0 100 4 0 0 3 211 102 6 0 1 0 0 7 0 0 0 100 5 0 0 3 214 107 2 0 0 0 0 0 0 0 0 100 6 0 0 14 26 9 24 0 1 0 0 579 0 0 0 100 7 0 0 7 12 2 10 0 0 2 0 260 0 0 0 100 March 4, 2026 at 01:42:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 0 0 0 10 0 0 0 100 1 0 0 0 111 52 107 0 1 0 0 0 0 0 0 100 2 0 0 0 24 3 26 0 1 0 0 594 0 0 0 100 3 0 0 0 7 1 32 0 0 0 0 1043 0 0 0 100 4 0 0 3 211 103 2 0 0 0 0 2 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 21 7 16 1 0 0 0 572 0 0 0 100 7 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1417 0 142 2219 102 273 2 43 216 7 969 2 2 0 97 1 88 0 0 256 53 340 0 44 228 14 83 0 1 0 99 2 23 0 0 137 4 245 0 40 253 11 656 0 1 0 99 3 65 0 2 228 100 270 1 54 230 4 1224 0 1 0 99 4 1887 0 3 321 103 211 2 48 265 7 421 0 1 0 98 5 22 0 3 307 101 194 0 39 231 8 67 0 1 0 99 6 39 0 14 132 10 243 0 49 238 11 1057 0 1 0 99 7 1 0 7 212 2 331 0 24 185 1 281 0 0 0 100 March 4, 2026 at 01:42:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 108 0 0 0 0 0 0 0 0 100 1 0 0 0 109 52 104 0 0 0 0 1 0 0 0 100 2 0 0 0 22 5 16 0 0 0 0 595 0 0 0 100 3 0 0 0 10 1 36 1 2 2 0 1138 0 0 0 100 4 0 0 3 217 107 10 0 0 0 0 7 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 14 12 3 8 1 0 0 0 565 0 0 0 100 7 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 348 0 0 2175 101 448 5 29 7 1 1857 2 1 0 98 1 7 0 0 114 32 163 2 26 2 0 1069 2 0 0 98 2 16 0 0 63 4 177 2 17 0 0 1947 1 0 0 99 3 0 0 0 69 2 252 8 25 5 0 2496 1 0 0 99 4 22 0 87 294 107 278 6 29 2 0 1618 1 0 0 98 5 285 0 3 242 101 63 6 8 1 3 1529 3 1 0 96 6 473 0 14 84 4 237 4 31 1 1 2349 1 1 0 98 7 0 0 7 58 2 137 7 17 3 0 1248 2 0 0 98 March 4, 2026 at 01:42:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 101 218 0 0 0 0 8 0 0 0 100 1 0 0 0 19 3 18 0 0 0 0 17 0 0 0 100 2 0 0 0 24 4 18 0 0 0 0 597 0 0 0 100 3 0 0 0 34 9 62 1 3 0 0 1153 0 0 0 100 4 0 0 17 217 103 13 0 3 5 0 38 0 0 0 100 5 0 0 3 232 111 28 0 3 6 1 31 0 0 0 100 6 18 0 14 16 3 14 1 0 2 0 584 0 0 0 100 7 0 0 7 19 3 12 0 2 0 0 261 0 0 0 100 March 4, 2026 at 01:42:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2113 101 203 0 4 3 0 12 0 1 0 99 1 0 0 8 19 2 23 0 5 16 0 0 0 1 0 99 2 0 0 7 44 12 52 0 9 10 1 692 0 0 0 100 3 0 0 0 31 3 60 0 3 6 0 1221 0 0 0 99 4 0 0 3 223 102 22 0 3 4 0 40 0 0 0 100 5 0 0 3 240 112 43 0 6 11 0 41 0 0 0 100 6 0 0 14 23 4 16 1 3 11 0 566 0 0 0 100 7 0 0 7 18 4 13 0 1 4 0 287 0 0 0 100 March 4, 2026 at 01:42:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 101 218 0 17 145 0 0 0 1 0 99 1 0 0 0 80 2 148 0 24 163 0 1 0 0 0 100 2 0 0 0 162 49 211 0 18 136 0 601 0 0 0 100 3 0 0 0 177 93 174 2 22 133 0 1045 0 1 0 99 4 0 0 9 284 104 149 0 26 189 0 2 0 0 0 100 5 0 0 4 280 103 143 0 22 165 0 0 0 0 0 100 6 0 0 14 84 3 157 1 24 148 0 566 0 0 0 100 7 0 0 7 122 2 233 0 13 120 0 260 0 0 0 100 March 4, 2026 at 01:42:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2105 101 115 0 1 0 0 0 0 1 0 99 1 0 0 0 28 2 4 0 0 0 0 1 0 0 0 100 2 0 0 0 43 11 22 0 0 0 0 605 0 0 0 100 3 0 0 0 128 51 134 1 0 2 0 1043 0 0 0 100 4 0 0 3 225 102 2 0 1 0 0 0 0 0 0 100 5 0 0 3 227 102 6 0 1 0 0 0 0 0 0 100 6 0 0 14 31 3 10 0 0 0 0 565 0 0 0 100 7 0 0 7 29 2 16 0 2 0 0 260 0 0 0 100 March 4, 2026 at 01:42:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 101 116 0 0 0 0 0 0 1 0 99 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 32 12 24 1 0 0 0 606 0 0 0 100 3 0 0 0 109 51 132 1 0 1 0 1042 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 2 0 0 0 100 5 0 0 3 211 102 4 0 0 0 0 0 0 0 0 100 6 0 0 14 13 3 8 1 0 0 0 567 0 0 0 100 7 0 0 7 10 2 6 0 1 0 0 263 0 0 0 100 March 4, 2026 at 01:42:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2642 101 1075 29 178 12 0 4173 6 2 0 92 1 3 0 0 516 8 934 15 186 31 0 4895 4 2 0 94 2 48 0 0 449 18 711 23 138 17 0 4272 4 1 0 94 3 9 0 0 587 46 1081 30 180 20 0 6080 5 2 0 94 4 2 0 241 593 102 738 18 177 14 0 4102 3 1 0 95 5 0 0 3 647 107 741 6 110 19 0 3032 3 1 0 96 6 4 0 21 442 4 818 15 172 19 0 5106 4 1 0 95 7 5 0 0 367 1 629 9 104 13 0 3443 3 1 0 96 March 4, 2026 at 01:42:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2359 102 524 15 84 9 0 1743 2 1 0 97 1 0 0 0 244 3 435 17 83 10 0 2276 2 1 0 97 2 0 0 0 207 3 350 18 60 7 0 2120 2 1 0 97 3 0 0 0 215 4 398 19 83 10 0 3215 2 1 0 97 4 0 0 129 415 109 401 9 81 4 0 1873 2 1 0 98 5 1 0 3 406 103 327 5 49 11 0 1238 2 1 0 98 6 0 0 21 197 10 325 8 67 2 0 2496 1 0 0 98 7 0 0 0 236 42 315 1 34 16 0 2046 2 0 0 98 March 4, 2026 at 01:42:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2219 102 300 0 31 228 5 156 0 1 0 99 1 656 0 0 130 1 216 1 49 222 4 964 1 1 0 98 2 62 0 0 189 8 338 0 38 201 5 346 0 1 0 99 3 778 0 119 188 82 247 1 44 259 6 1207 0 1 0 99 4 92 0 3 326 106 213 0 38 241 11 98 0 1 0 99 5 15 0 5 304 103 157 0 31 173 5 83 0 1 0 99 6 6 0 21 114 7 178 0 38 197 3 936 0 1 0 99 7 1910 0 0 194 44 269 2 31 200 5 661 0 1 0 99 March 4, 2026 at 01:42:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 106 0 0 0 0 0 0 0 0 100 1 0 0 0 13 0 6 0 0 0 0 0 0 0 0 100 2 0 0 0 117 53 116 0 1 0 0 295 0 0 0 100 3 0 0 0 10 2 34 1 0 1 0 1128 0 0 0 100 4 0 0 3 217 107 10 0 0 0 0 7 0 0 0 100 5 0 0 3 213 102 9 0 2 0 0 10 0 0 0 100 6 0 0 21 14 5 12 1 0 0 0 827 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 108 0 0 0 0 3 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 2 0 0 0 114 53 108 0 0 0 0 295 0 0 0 100 3 0 0 0 16 2 46 1 1 0 0 1128 0 0 0 100 4 0 0 3 216 106 10 0 0 0 0 7 0 0 0 100 5 0 0 3 217 102 10 0 0 0 0 0 0 0 0 100 6 0 0 21 22 8 20 0 1 0 0 831 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:42:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 108 0 0 0 0 0 0 0 0 100 1 0 0 0 17 3 16 1 0 1 0 16 0 0 0 100 2 0 0 0 113 53 110 0 0 0 0 298 0 0 0 100 3 0 0 0 11 3 36 0 0 0 0 1126 0 0 0 100 4 0 0 3 218 106 12 0 0 0 0 328 0 0 0 100 5 0 0 3 226 106 16 0 0 0 0 15 0 0 0 100 6 0 0 21 19 6 18 1 0 0 0 831 0 0 0 100 7 0 0 0 26 8 22 0 0 0 0 311 0 0 0 100 March 4, 2026 at 01:42:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 280 0 0 2206 101 397 10 42 4 1 2462 3 1 0 96 1 124 0 0 97 7 192 4 39 5 1 1470 2 0 0 98 2 310 0 0 159 45 248 7 24 9 1 1463 2 0 0 97 3 139 0 0 82 3 260 6 34 4 0 2572 2 1 0 98 4 0 0 77 281 103 248 12 41 4 0 1478 1 0 0 98 5 139 0 7 302 102 272 5 30 3 1 1660 1 1 0 98 6 65 0 21 91 7 177 0 25 5 2 2349 1 0 0 98 7 7 0 0 73 7 142 5 16 3 0 1429 2 0 0 98 March 4, 2026 at 01:42:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 104 273 0 22 195 0 11 0 1 0 99 1 0 0 0 169 40 247 0 37 166 0 0 0 0 0 100 2 0 0 0 170 2 324 0 26 140 0 299 0 0 0 100 3 0 0 0 173 91 191 1 27 172 1 1147 0 1 0 99 4 0 0 17 299 113 163 0 31 148 0 15 0 0 0 100 5 0 0 3 281 103 126 1 19 145 0 13 0 0 0 99 6 4 0 21 82 6 146 1 32 136 0 842 0 0 0 100 7 0 0 0 87 5 148 0 22 146 0 312 0 0 0 99 March 4, 2026 at 01:42:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 107 120 0 0 0 0 9 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 10 2 34 1 0 1 0 1134 0 0 0 100 4 0 0 3 306 151 100 0 0 0 0 0 0 0 0 100 5 0 0 3 216 101 10 0 0 0 0 0 0 0 0 100 6 0 0 21 18 6 14 0 0 0 0 847 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 104 139 0 6 6 1 153 0 1 0 99 1 0 0 0 18 2 13 0 2 10 0 15 0 0 0 100 2 0 0 0 37 11 35 0 3 10 0 319 0 0 0 100 3 0 0 7 21 2 52 1 5 7 0 1055 0 0 0 100 4 0 0 3 315 152 119 0 9 17 0 6 0 0 0 100 5 1 0 3 228 103 21 2 3 0 1 34 0 0 0 100 6 0 0 29 38 7 49 1 3 5 0 837 0 1 0 99 7 0 0 14 15 1 14 0 6 6 0 336 0 0 0 100 March 4, 2026 at 01:42:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 118 0 1 0 0 0 0 0 0 100 1 0 0 0 17 2 14 0 0 0 0 15 0 0 0 100 2 0 0 0 32 12 26 0 0 0 0 309 0 0 0 100 3 0 0 0 13 2 36 1 1 0 0 1042 0 0 0 100 4 0 0 10 310 151 108 0 1 0 0 10 0 0 0 100 5 0 0 3 216 108 2 0 0 1 0 0 0 0 0 100 6 0 0 21 22 6 18 1 0 0 0 831 0 0 0 100 7 0 0 0 19 1 21 0 2 1 0 300 0 0 0 100 March 4, 2026 at 01:42:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 101 112 0 0 0 0 0 0 0 0 100 1 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 39 8 18 0 0 0 0 304 0 0 0 100 3 0 0 0 26 2 34 1 0 2 0 1042 0 0 0 100 4 0 0 3 326 152 106 0 1 0 0 2 0 0 0 100 5 0 0 3 229 103 8 0 1 0 0 2 0 0 0 100 6 0 0 21 32 6 14 0 0 0 0 826 0 0 0 100 7 0 0 112 9 1 5 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 101 126 0 1 3 0 0 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 2 0 0 0 25 9 20 0 0 1 0 303 0 0 0 100 3 0 0 0 14 2 40 1 0 2 0 1042 0 0 0 100 4 0 0 3 306 151 100 0 0 0 0 0 0 0 0 100 5 0 0 3 212 102 6 0 1 0 0 1 0 0 0 100 6 0 0 21 17 6 14 0 1 0 0 826 0 0 0 100 7 0 0 7 13 1 8 0 0 3 0 300 0 0 0 100 March 4, 2026 at 01:42:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2843 105 1398 33 258 23 0 5332 6 3 0 91 1 5 0 0 801 6 1390 36 266 34 0 7689 7 2 0 91 2 8 0 0 667 8 1157 26 198 26 0 6286 5 2 0 93 3 2 0 0 730 10 1365 38 233 23 0 8048 6 2 0 92 4 6 0 353 801 110 1222 20 233 31 0 6642 6 2 0 92 5 6 0 3 768 107 897 26 146 34 0 4425 5 2 0 94 6 4 0 21 614 13 1111 28 215 42 0 7304 6 2 0 92 7 4 0 0 479 5 808 18 129 25 0 4887 4 1 0 94 March 4, 2026 at 01:42:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 108 0 0 0 0 0 0 0 0 100 1 0 0 0 116 1 110 0 0 0 0 1 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 295 0 0 0 100 3 0 0 0 21 7 46 1 0 1 0 1049 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 21 20 7 18 1 1 0 0 830 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 110 0 0 0 0 3 0 0 0 100 1 0 0 0 124 2 126 0 0 0 0 36 0 0 0 100 2 0 0 0 14 3 10 0 0 0 0 295 0 0 0 100 3 0 0 0 36 12 66 1 1 0 0 1061 0 0 0 99 4 0 0 3 211 103 6 0 0 0 0 9 0 0 0 100 5 0 0 3 216 107 2 0 0 0 0 0 0 0 0 100 6 0 0 21 18 6 18 0 0 0 0 830 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 106 0 0 1 0 0 0 0 0 100 1 0 0 0 116 1 112 0 1 0 0 10 0 0 0 100 2 0 0 0 13 3 6 0 0 1 0 294 0 0 0 100 3 0 0 0 24 8 46 1 0 1 0 1048 0 0 0 100 4 0 0 3 213 102 12 0 1 1 0 0 0 0 0 100 5 0 0 3 210 102 4 0 0 1 0 1 0 0 0 100 6 0 0 21 19 7 12 0 0 1 0 827 0 0 0 100 7 0 0 0 11 3 4 0 0 1 0 321 0 0 0 100 March 4, 2026 at 01:42:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 2293 101 353 0 36 220 3 83 0 1 0 99 1 810 0 113 300 46 400 0 38 221 10 145 0 1 0 99 2 109 0 0 117 3 193 0 31 209 8 394 0 1 0 99 3 39 0 2 208 85 239 2 31 245 8 1546 0 1 0 99 4 1885 0 3 295 106 152 2 40 194 6 369 0 1 0 98 5 31 0 3 305 102 174 0 36 182 8 141 0 0 0 99 6 20 0 21 111 6 195 1 42 253 6 962 0 1 0 99 7 649 0 0 99 1 161 3 24 173 5 1237 1 1 0 98 March 4, 2026 at 01:42:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 8 0 0 0 0 0 0 0 0 100 1 0 0 0 216 51 212 0 0 0 0 11 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 8 1 32 1 0 0 0 1126 0 0 0 100 4 0 0 3 225 110 18 0 0 0 0 8 0 0 0 100 5 0 0 3 213 101 12 0 1 0 0 0 0 0 0 100 6 0 0 21 19 6 16 1 1 0 0 825 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 271 0 0 2159 102 187 2 25 4 0 1599 2 1 0 97 1 160 0 0 183 50 223 5 26 2 0 1336 2 0 0 98 2 117 0 0 94 9 140 4 24 2 0 1713 2 0 0 98 3 51 0 0 67 2 160 7 25 12 0 2540 2 1 0 97 4 3 0 101 260 107 132 3 32 10 0 1339 1 0 0 99 5 41 0 3 253 101 80 0 21 3 0 1482 1 0 0 98 6 11 0 21 80 7 189 7 39 4 0 2211 2 0 0 98 7 0 0 0 52 2 99 6 22 0 0 1363 1 0 0 99 March 4, 2026 at 01:42:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 108 0 0 0 0 0 0 0 0 100 1 0 0 0 123 52 122 0 0 0 0 16 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 295 0 0 0 100 3 0 0 0 27 10 52 1 0 1 0 1146 0 0 0 100 4 1 0 3 214 103 8 0 1 0 0 10 0 0 0 100 5 0 0 3 217 108 2 0 0 0 0 0 0 0 0 100 6 0 0 21 18 6 18 0 1 0 0 832 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 102 129 0 4 11 2 89 0 1 0 99 1 0 0 0 127 52 132 0 9 16 0 22 0 0 0 100 2 0 0 0 26 4 21 0 3 1 1 390 0 0 0 100 3 0 0 0 30 6 57 1 4 5 1 1088 0 0 0 100 4 0 0 3 223 104 17 1 4 1 0 13 0 0 0 100 5 0 0 10 219 101 19 0 4 5 0 19 0 0 0 100 6 0 0 29 31 6 35 1 1 15 0 826 0 1 0 99 7 0 0 14 24 3 35 0 6 15 0 313 0 0 0 100 March 4, 2026 at 01:42:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 101 257 0 25 169 0 0 0 1 0 99 1 0 0 0 256 42 413 0 32 167 0 1 0 0 0 100 2 0 0 0 87 4 166 0 24 180 0 297 0 0 0 100 3 0 0 0 191 101 207 0 20 179 0 1041 0 1 0 99 4 0 0 3 291 104 166 0 34 139 0 0 0 0 0 100 5 0 0 3 267 101 110 0 21 130 0 1 0 1 0 99 6 0 0 28 76 6 136 1 24 179 0 825 0 0 0 100 7 0 0 0 82 8 139 0 16 167 0 310 0 0 0 99 March 4, 2026 at 01:42:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 101 108 0 1 0 0 0 0 0 0 100 1 0 0 0 29 0 8 0 0 0 0 0 0 0 0 100 2 0 0 0 29 4 8 0 0 0 0 299 0 0 0 100 3 0 0 0 124 51 132 1 0 1 0 1042 0 0 0 100 4 0 0 3 227 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 226 102 2 0 0 0 0 0 0 0 0 100 6 0 0 21 36 7 18 0 2 0 0 828 0 0 0 100 7 0 0 112 22 7 17 0 1 0 0 306 0 0 0 100 March 4, 2026 at 01:42:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 108 0 0 0 0 0 0 0 0 100 1 0 0 0 21 1 20 0 1 0 0 1 0 0 0 100 2 0 0 0 14 4 8 0 0 0 0 296 0 0 0 100 3 0 0 0 109 51 132 1 0 1 0 1042 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 3 0 0 0 100 5 0 0 3 210 101 4 0 0 0 0 3 0 0 0 100 6 0 0 21 19 7 16 0 0 0 0 826 0 0 0 100 7 0 0 7 35 13 28 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:42:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2884 102 1483 32 258 41 0 6477 6 3 0 91 1 0 0 0 839 25 1518 47 281 29 0 7510 7 2 0 91 2 2 0 0 693 9 1177 27 216 37 0 6676 5 2 0 93 3 14 0 0 740 21 1364 51 278 26 0 8839 6 2 0 91 4 7 0 381 803 108 1101 21 227 36 0 5568 6 2 0 92 5 27 0 3 795 109 990 14 163 18 0 4528 5 2 0 93 6 17 0 21 667 8 1227 40 226 40 0 7570 6 2 0 92 7 1 0 0 564 8 954 25 157 13 0 5064 5 1 0 94 March 4, 2026 at 01:42:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 108 0 0 1 0 0 0 0 0 100 1 0 0 0 108 50 104 0 0 1 0 20 0 0 0 100 2 0 0 0 22 3 14 0 0 1 0 294 0 0 0 100 3 0 0 0 24 9 46 0 0 1 0 1051 0 0 0 100 4 0 0 7 211 103 6 0 1 0 0 0 0 0 0 100 5 0 0 7 213 103 4 0 0 1 0 1 0 0 0 100 6 0 0 21 18 6 10 1 0 1 0 825 0 0 0 100 7 0 0 0 10 2 2 0 0 1 0 299 0 0 0 100 March 4, 2026 at 01:43:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2186 101 262 1 40 262 0 0 0 1 0 99 1 0 0 0 263 50 419 0 41 235 0 10 0 0 0 100 2 0 0 0 93 4 159 0 31 197 0 296 0 0 0 100 3 0 0 0 182 87 209 1 33 260 0 1047 0 1 0 99 4 0 0 3 285 104 156 0 38 233 0 2 0 0 0 100 5 0 0 3 282 101 156 0 31 189 0 0 0 1 0 99 6 0 0 21 84 5 155 0 30 217 0 827 0 1 0 99 7 0 0 0 100 2 170 0 30 205 0 300 0 0 0 100 March 4, 2026 at 01:43:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 94 0 2 0 0 0 0 0 0 100 1 0 0 0 108 51 104 0 0 0 0 11 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 294 0 0 0 100 3 0 0 0 18 5 42 1 0 1 0 1047 0 0 0 100 4 0 0 3 214 103 12 0 1 0 0 0 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 6 0 0 21 14 4 12 0 0 0 0 825 0 0 0 100 7 0 0 0 28 2 20 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 815 0 113 2120 101 164 1 7 6 15 131 0 1 0 99 1 99 0 0 86 20 95 2 6 7 15 102 0 0 0 100 2 46 0 3 119 37 121 1 10 3 7 448 0 0 0 100 3 1902 0 0 61 5 99 3 10 8 7 1584 0 1 0 99 4 14 0 3 248 107 39 0 7 7 2 412 0 0 0 100 5 653 0 3 240 101 36 0 6 11 5 930 1 0 0 98 6 14 0 21 46 5 44 1 6 5 1 885 0 0 0 100 7 15 0 0 36 2 34 0 9 7 2 377 0 0 0 100 March 4, 2026 at 01:43:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 118 0 1 0 0 0 0 0 0 100 1 0 0 0 15 2 16 0 0 0 0 33 0 0 0 100 2 0 0 0 110 52 106 0 0 0 0 294 0 0 0 100 3 0 0 0 8 1 32 1 0 1 0 1125 0 0 0 100 4 0 0 3 213 103 8 0 0 0 0 7 0 0 0 100 5 0 0 3 219 107 12 0 1 0 0 0 0 0 0 100 6 0 0 21 29 11 26 1 0 0 0 839 0 0 0 100 7 0 0 0 14 3 10 0 0 0 0 323 0 0 0 100 March 4, 2026 at 01:43:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2189 101 323 2 29 1 0 1623 1 1 0 98 1 4 0 0 95 0 203 11 34 4 0 1653 1 0 0 98 2 241 0 14 176 54 228 11 20 2 3 1761 2 1 0 97 3 106 0 0 88 1 278 13 33 2 1 2835 2 1 0 98 4 396 0 101 291 104 323 1 31 8 1 1833 2 1 0 98 5 224 0 3 274 103 184 8 21 4 0 1333 2 1 0 97 6 19 0 21 71 7 159 5 20 0 0 1995 2 0 0 97 7 71 0 0 74 5 172 6 20 8 0 1762 2 0 0 98 March 4, 2026 at 01:43:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2184 101 270 0 25 176 0 0 0 1 0 99 1 0 0 0 138 1 268 0 24 147 0 1 0 0 0 100 2 0 0 0 152 42 219 0 23 159 0 294 0 0 0 100 3 0 0 0 169 87 188 0 29 168 0 1131 0 1 0 99 4 0 0 3 278 108 137 1 22 144 0 8 0 0 0 100 5 0 0 3 253 102 94 0 15 135 0 0 0 0 0 100 6 0 0 21 63 4 113 0 26 152 0 826 0 0 0 100 7 0 0 0 74 2 137 0 17 162 0 300 0 0 0 100 March 4, 2026 at 01:43:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2116 101 139 0 7 10 2 147 0 1 0 99 1 1 0 0 20 1 19 1 2 0 0 34 0 0 0 100 2 0 0 9 17 2 21 0 2 10 0 301 0 1 0 99 3 1 0 0 123 53 155 2 6 9 1 1078 0 0 0 99 4 0 0 3 236 109 39 0 6 7 0 42 0 0 0 100 5 0 0 10 217 101 17 0 3 10 0 12 0 0 0 100 6 0 0 21 21 4 14 1 1 3 0 826 0 0 0 100 7 0 0 0 24 2 27 0 2 6 0 303 0 0 0 100 March 4, 2026 at 01:43:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 102 291 0 1 0 0 331 0 1 0 99 1 0 0 0 11 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 14 3 8 0 0 0 0 295 0 0 0 100 3 0 0 0 128 60 152 1 0 0 0 1054 0 0 0 100 4 0 0 3 216 104 8 0 1 0 0 6 0 0 0 100 5 0 0 3 217 104 10 0 0 0 0 4 0 0 0 100 6 0 0 28 17 5 18 1 3 0 0 829 0 0 0 100 7 0 0 0 13 2 8 0 1 0 0 301 0 0 0 100 March 4, 2026 at 01:43:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2107 101 119 0 0 0 0 0 0 1 0 99 1 0 0 0 30 2 12 0 0 0 0 13 0 0 0 100 2 0 0 0 30 3 11 0 1 0 0 295 0 0 0 100 3 0 0 0 141 59 148 2 0 0 0 1052 0 0 0 99 4 0 0 3 229 104 8 0 0 0 0 9 0 0 0 100 5 0 0 3 229 106 2 0 0 0 0 0 0 0 0 100 6 0 0 21 32 4 16 0 0 0 0 831 0 0 0 100 7 0 0 0 29 2 10 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:43:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 101 118 0 0 1 0 0 0 1 0 99 1 0 0 0 13 1 10 0 1 1 0 0 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 294 0 0 0 100 3 0 0 0 124 58 149 1 1 0 0 1057 0 0 0 100 4 0 0 3 210 103 2 0 0 1 0 0 0 0 0 100 5 0 0 3 211 102 4 0 0 1 0 1 0 0 0 100 6 0 0 21 17 5 10 0 0 1 0 829 0 0 0 100 7 0 0 0 14 4 6 0 0 1 0 321 0 0 0 100 March 4, 2026 at 01:43:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 14 2912 101 1548 52 285 225 0 7032 6 3 0 90 1 40 0 0 842 0 1594 57 349 163 0 7736 6 3 0 91 2 8 0 0 758 14 1323 43 257 208 0 6821 7 2 0 91 3 15 0 0 824 140 1334 50 297 159 0 8279 6 2 0 92 4 3 0 353 886 106 1283 29 286 207 0 6394 5 2 0 92 5 2 0 3 806 106 1057 32 203 169 0 4505 5 2 0 93 6 6 0 7 698 4 1310 36 284 207 0 6651 5 2 0 93 7 4 0 0 686 2 1241 31 193 180 0 4483 6 2 0 92 March 4, 2026 at 01:43:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 116 1 0 0 0 266 0 0 0 100 1 0 0 0 11 3 4 0 0 0 0 2 0 0 0 100 2 0 0 0 113 53 108 0 0 0 0 294 0 0 0 100 3 0 0 0 25 9 46 2 0 1 0 1050 0 0 0 100 4 0 0 3 211 103 6 0 1 0 0 20 0 0 0 100 5 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 7 14 3 10 0 0 0 0 559 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 147 0 14 2144 101 179 0 16 8 14 446 0 1 0 99 1 21 0 0 55 0 75 0 11 4 12 214 0 0 0 100 2 34 0 3 145 53 152 0 10 6 3 398 0 0 0 100 3 641 0 7 55 5 74 3 7 3 3 2286 1 1 0 98 4 7 0 3 241 106 26 0 4 2 2 47 0 0 0 100 5 1882 0 3 232 101 18 2 4 6 2 285 0 1 0 99 6 23 0 0 42 3 34 0 8 4 2 401 0 0 0 100 7 802 0 112 27 2 69 0 7 10 15 456 0 0 0 99 March 4, 2026 at 01:43:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 120 0 1 1 0 266 0 0 0 100 1 0 0 0 15 2 16 0 1 0 0 24 0 0 0 100 2 0 0 0 112 53 108 0 0 0 0 294 0 0 0 100 3 0 0 7 25 9 50 0 0 1 0 1395 0 0 0 99 4 0 0 3 222 105 24 0 1 0 0 21 0 0 0 100 5 0 0 3 216 109 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 1 6 0 0 0 0 305 0 0 0 100 7 0 0 0 15 2 12 1 0 0 0 303 0 0 0 100 March 4, 2026 at 01:43:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 118 0 1 0 0 271 0 0 0 100 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 113 53 108 0 0 0 0 294 0 0 0 100 3 0 0 7 29 11 52 1 0 0 0 1713 0 0 0 99 4 0 0 3 212 104 6 0 1 0 0 5 0 0 0 100 5 0 0 3 213 103 8 0 0 0 0 3 0 0 0 100 6 0 0 0 12 1 4 1 0 0 0 300 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2165 101 226 1 24 162 0 266 0 1 0 99 1 0 0 0 76 1 138 0 28 157 0 1 0 0 0 100 2 0 0 0 158 53 200 0 22 136 0 294 0 0 0 100 3 0 0 7 164 86 183 4 29 164 0 1386 0 1 0 99 4 0 0 3 352 103 294 0 36 139 0 0 0 0 0 100 5 0 0 3 281 106 146 0 26 181 0 7 0 1 0 99 6 0 0 0 86 1 168 0 30 203 0 320 0 0 0 99 7 0 0 0 71 2 130 0 19 122 0 300 0 0 0 100 March 4, 2026 at 01:43:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2142 102 120 9 14 3 0 1328 3 1 0 97 1 0 0 0 78 0 217 2 36 11 0 1780 1 0 0 99 2 238 0 0 117 34 178 5 21 0 3 1851 2 1 0 97 3 511 0 14 93 3 254 1 33 6 0 2905 2 1 0 98 4 90 0 73 287 123 135 3 24 5 0 1129 2 0 0 98 5 92 0 10 277 106 212 4 27 8 1 1642 1 1 0 98 6 146 0 0 113 1 230 7 27 1 0 2063 2 1 0 97 7 0 0 0 89 2 317 2 31 3 0 2070 1 0 0 99 March 4, 2026 at 01:43:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2113 102 18 0 3 0 0 276 0 0 0 100 1 0 0 0 14 2 9 0 4 0 0 11 0 0 0 100 2 3 0 0 18 4 12 0 1 0 0 312 0 0 0 100 3 0 0 0 24 3 44 1 1 0 0 1135 0 0 0 100 4 0 0 17 309 152 106 0 0 1 0 18 0 0 0 100 5 3 0 10 216 103 12 0 0 0 0 265 0 0 0 100 6 0 0 0 116 2 110 0 1 3 0 320 0 0 0 100 7 0 0 0 32 9 26 1 1 0 0 322 0 0 0 100 March 4, 2026 at 01:43:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2115 101 28 0 5 3 0 293 0 1 0 99 1 0 0 0 31 4 35 0 3 4 0 51 0 0 0 100 2 0 0 0 23 4 25 0 9 13 0 298 0 0 0 100 3 0 0 0 28 2 59 1 8 15 0 1142 0 0 0 100 4 0 0 10 320 153 122 0 4 3 0 27 0 0 0 100 5 0 0 10 225 109 10 0 1 3 0 266 0 0 0 100 6 0 0 0 123 1 128 1 2 0 3 461 0 0 0 100 7 0 0 8 42 9 56 1 6 13 0 326 0 1 0 99 March 4, 2026 at 01:43:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2117 102 115 1 3 0 0 266 0 1 0 99 1 0 0 0 33 12 22 0 0 1 0 12 0 0 0 100 2 0 0 0 16 4 8 0 1 1 0 297 0 0 0 100 3 0 0 0 20 2 40 1 0 2 0 1046 0 0 0 100 4 0 0 7 311 152 104 0 1 1 0 0 0 0 0 100 5 0 0 21 215 104 10 0 1 1 0 261 0 0 0 100 6 0 0 0 24 2 12 0 0 1 0 299 0 0 0 100 7 0 0 0 13 2 4 0 1 1 0 300 0 0 0 100 March 4, 2026 at 01:43:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2165 101 239 0 24 157 0 266 0 1 0 99 1 0 0 0 104 8 155 1 27 152 0 12 0 0 0 100 2 0 0 0 77 3 110 0 22 146 0 294 0 0 0 100 3 0 0 0 191 88 160 0 29 163 0 20 0 1 0 99 4 0 0 3 412 153 316 0 31 154 0 1044 0 1 0 99 5 0 0 10 294 104 128 0 23 114 0 269 0 1 0 99 6 0 0 0 138 1 234 0 28 141 0 300 0 0 0 100 7 0 0 0 86 1 134 0 21 135 0 300 0 0 0 100 March 4, 2026 at 01:43:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2104 101 112 0 0 1 0 266 0 1 0 99 1 0 0 0 34 11 32 0 1 1 0 15 0 0 0 100 2 0 0 0 14 3 8 0 0 0 0 294 0 0 0 100 3 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 4 0 0 3 311 153 136 1 0 0 0 1043 0 0 0 99 5 0 0 10 213 103 8 0 1 0 0 260 0 0 0 100 6 0 0 0 12 1 6 0 0 0 0 300 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 14 2551 101 867 18 144 20 0 3981 4 2 0 95 1 2 0 0 491 10 886 27 178 17 0 4894 4 1 0 95 2 0 0 0 460 3 786 22 140 10 0 3938 3 1 0 95 3 5 0 0 404 5 757 17 137 21 0 4644 4 1 0 94 4 1 0 213 655 142 827 10 144 18 0 5031 4 2 0 95 5 35 0 10 608 112 711 10 100 17 0 2825 3 1 0 96 6 2 0 0 403 4 764 18 150 18 0 4408 4 1 0 95 7 5 0 0 290 1 517 10 89 38 0 2957 3 1 0 96 March 4, 2026 at 01:43:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2354 102 554 9 88 17 0 2216 2 1 0 97 1 2 0 0 277 9 507 15 99 5 0 2805 2 1 0 97 2 12 0 0 194 3 317 7 59 18 0 2442 2 1 0 97 3 1 0 0 208 2 369 9 71 3 0 2596 2 1 0 98 4 0 0 129 400 105 416 12 80 10 1 3244 2 1 0 97 5 1 0 10 414 109 340 5 48 10 0 1746 2 1 0 97 6 1 0 0 220 3 404 13 80 25 0 2373 2 1 0 97 7 14 0 0 264 50 390 9 54 11 0 1689 2 1 0 98 March 4, 2026 at 01:43:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 805 0 126 2133 101 160 0 11 7 15 402 0 1 0 99 1 79 0 0 62 10 58 0 7 3 8 75 0 0 0 100 2 31 0 2 41 2 34 0 6 4 6 89 0 0 0 100 3 10 0 0 48 1 49 0 9 4 2 433 0 0 0 100 4 7 0 3 238 106 56 1 3 2 4 1097 0 0 0 100 5 2537 0 10 254 105 58 4 4 8 10 1476 2 1 0 97 6 66 0 0 64 1 74 0 15 17 9 458 0 0 0 100 7 25 0 0 146 51 152 0 7 13 8 409 0 0 0 100 March 4, 2026 at 01:43:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2185 102 269 0 32 215 0 266 0 1 0 99 1 0 0 0 91 1 181 0 32 272 0 0 0 0 0 100 2 0 0 0 76 6 136 0 25 179 0 5 0 0 0 100 3 0 0 0 180 81 188 0 25 247 0 304 0 1 0 99 4 0 0 3 274 104 169 1 22 216 1 1128 0 1 0 99 5 0 0 10 283 105 158 0 25 248 0 261 0 1 0 99 6 0 0 0 151 1 297 0 26 194 0 300 0 0 0 100 7 0 0 0 174 51 245 0 25 240 0 300 0 0 0 100 March 4, 2026 at 01:43:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 106 0 0 0 0 266 0 0 0 100 1 0 0 0 11 3 6 0 0 0 0 3 0 0 0 100 2 0 0 0 18 6 14 0 0 0 0 7 0 0 0 100 3 0 0 0 16 1 12 0 0 0 0 297 0 0 0 100 4 0 0 3 214 105 36 1 0 0 0 1126 0 0 0 100 5 0 0 10 213 104 8 0 0 0 0 260 0 0 0 100 6 0 0 0 10 1 4 1 0 0 0 300 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 106 1 0 0 0 266 0 0 0 100 1 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 2 0 0 0 21 5 20 0 1 0 0 319 0 0 0 100 3 0 0 0 17 1 14 0 1 0 0 299 0 0 0 100 4 0 0 3 213 104 36 1 1 0 0 1135 0 0 0 100 5 0 0 10 213 104 8 0 0 0 0 260 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 301 0 0 0 100 7 0 0 0 118 56 114 0 0 0 0 307 0 0 0 100 March 4, 2026 at 01:43:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 299 0 26 2206 101 312 10 42 10 0 1900 2 1 0 97 1 339 0 0 144 4 270 5 47 6 0 1757 1 0 0 98 2 1 0 0 80 3 213 6 32 8 0 1459 1 0 0 98 3 324 0 0 86 2 180 2 24 7 2 1420 2 0 0 97 4 79 0 87 261 104 159 11 25 3 1 2501 2 1 0 97 5 101 0 10 327 110 307 5 31 2 0 2394 2 1 0 97 6 0 0 0 79 1 150 3 32 6 0 1346 2 0 0 98 7 12 0 0 233 56 408 3 31 5 1 1699 1 0 0 98 March 4, 2026 at 01:43:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 14 2110 102 108 0 1 1 0 271 0 0 0 100 1 0 0 0 15 3 4 0 1 1 0 17 0 0 0 100 2 0 0 0 15 3 6 0 0 1 0 1 0 0 0 100 3 0 0 0 22 2 14 0 0 2 0 298 0 0 0 100 4 0 0 21 214 104 38 1 2 1 0 1151 0 0 0 100 5 0 0 14 231 111 22 0 0 1 0 273 0 0 0 100 6 0 0 0 25 5 14 0 0 1 0 314 0 0 0 100 7 19 0 0 113 52 106 0 1 1 0 338 0 0 0 100 March 4, 2026 at 01:43:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2166 101 222 0 19 108 0 266 0 1 0 99 1 0 0 0 85 2 168 0 33 194 0 2 0 0 0 100 2 0 0 0 73 2 141 0 30 139 0 0 0 0 0 100 3 0 0 0 160 77 148 0 23 153 0 294 0 0 0 99 4 0 0 3 266 105 135 0 23 129 0 1135 0 1 0 99 5 0 0 10 271 104 128 0 19 135 0 260 0 0 0 100 6 0 0 0 156 6 289 1 20 155 0 308 0 0 0 100 7 0 0 0 162 51 215 0 20 104 0 300 0 0 0 100 March 4, 2026 at 01:43:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 22 2113 101 123 1 4 11 0 266 0 1 0 99 1 0 0 14 20 3 34 0 6 11 0 24 0 0 0 100 2 0 0 0 41 10 47 0 9 10 1 93 0 0 0 100 3 0 0 0 31 2 31 0 2 0 2 385 0 0 0 100 4 0 0 3 225 105 49 1 3 7 0 1072 0 0 0 100 5 0 0 17 222 106 22 1 4 5 0 274 0 0 0 100 6 0 0 0 32 4 30 0 2 5 0 324 0 0 0 100 7 0 0 0 125 53 126 0 4 3 0 306 0 0 0 100 March 4, 2026 at 01:43:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 108 0 0 0 0 266 0 0 0 100 1 0 0 0 12 2 7 0 1 0 0 2 0 0 0 100 2 0 0 0 25 9 18 0 0 0 0 10 0 0 0 100 3 0 0 0 16 1 10 0 0 0 0 294 0 0 0 100 4 0 0 3 213 104 34 1 0 0 0 1042 0 0 0 100 5 0 0 10 216 104 10 0 1 0 0 260 0 0 0 100 6 0 0 7 10 1 6 0 1 0 0 300 0 0 0 100 7 0 0 0 108 51 102 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2126 101 118 0 1 0 0 266 0 0 0 100 1 0 0 112 17 3 17 0 0 0 0 14 0 0 0 100 2 0 0 0 37 7 16 0 0 0 0 8 0 0 0 100 3 0 0 0 31 1 10 0 0 0 0 294 0 0 0 100 4 0 0 2 230 104 38 1 0 1 0 1047 0 0 0 100 5 0 0 11 236 109 8 0 0 0 0 260 0 0 0 100 6 0 0 0 29 1 10 0 1 0 0 305 0 0 0 100 7 0 0 0 133 53 114 0 1 0 0 306 0 0 0 100 March 4, 2026 at 01:43:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 108 0 0 0 0 266 0 0 0 100 1 0 0 7 17 2 18 0 1 1 0 5 0 0 0 100 2 0 0 0 27 10 20 0 0 0 0 13 0 0 0 100 3 0 0 0 16 1 10 0 0 0 0 294 0 0 0 100 4 0 0 3 213 104 34 1 0 1 0 1041 0 0 0 100 5 0 0 10 216 105 10 0 0 0 0 261 0 0 0 100 6 0 0 0 13 1 4 1 0 0 0 300 0 0 0 100 7 0 0 0 110 52 104 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:43:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 14 2984 102 1578 43 276 287 1 6605 7 3 0 90 1 29 0 0 826 4 1473 41 298 336 0 7630 7 3 0 90 2 27 0 0 868 6 1570 35 240 222 0 5992 6 3 0 91 3 1 0 0 836 91 1371 63 290 211 0 8154 6 3 0 91 4 27 0 354 857 133 1275 31 282 306 0 6933 5 3 0 92 5 13 0 10 882 106 1102 26 184 238 1 4824 5 2 0 93 6 2 0 0 756 12 1406 26 273 247 0 6508 5 2 0 93 7 2 0 0 700 16 1207 24 177 230 0 4773 4 2 0 94 March 4, 2026 at 01:43:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 108 0 2 0 0 266 0 0 0 100 1 0 0 0 13 3 8 0 0 0 0 3 0 0 0 100 2 0 0 0 14 2 14 0 1 0 0 0 0 0 0 100 3 0 0 0 16 1 10 0 1 0 0 294 0 0 0 100 4 0 0 3 225 110 48 1 0 0 0 1051 0 0 0 100 5 0 0 10 213 104 8 0 0 0 0 260 0 0 0 100 6 0 0 0 27 10 20 0 0 0 0 302 0 0 0 100 7 0 0 0 90 42 86 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:43:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 14 2145 101 245 0 11 2 2 426 0 1 0 99 1 16 0 0 40 2 39 0 6 3 7 64 0 0 0 100 2 2687 0 112 34 3 56 2 4 9 6 438 1 1 0 98 3 119 0 0 61 1 80 0 12 24 13 428 0 0 0 100 4 29 0 5 259 110 100 1 11 20 12 1239 0 0 0 99 5 31 0 10 243 104 58 0 11 8 9 429 0 0 0 100 6 28 0 0 46 2 38 0 8 2 1 369 0 0 0 100 7 645 0 0 49 7 36 2 5 2 2 1203 1 0 0 98 March 4, 2026 at 01:43:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 210 0 0 0 0 266 0 0 0 100 1 0 0 0 18 5 16 0 0 0 0 15 0 0 0 100 2 0 0 0 14 3 10 0 0 0 0 1 0 0 0 100 3 0 0 0 17 2 12 0 0 0 0 295 0 0 0 100 4 1 0 3 222 108 46 1 0 1 0 1135 0 0 0 100 5 0 0 10 222 112 10 0 0 0 0 270 0 0 0 100 6 0 0 0 12 1 8 1 0 0 0 305 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 141 1 1 0 0 266 0 0 0 100 1 0 0 0 84 38 80 0 3 1 0 3 0 0 0 100 2 0 0 0 22 7 18 0 0 1 0 11 0 0 0 100 3 0 0 0 20 2 14 0 0 1 0 306 0 0 0 100 4 0 0 3 221 106 48 1 1 4 0 1450 0 0 0 99 5 0 0 10 217 105 14 0 1 1 0 274 0 0 0 100 6 0 0 0 12 2 2 0 0 1 0 300 0 0 0 100 7 0 0 0 9 2 2 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:43:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 110 0 0 1 0 269 0 0 0 100 1 0 0 0 123 54 120 0 0 0 0 6 0 0 0 100 2 0 0 0 18 6 14 0 1 0 0 5 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 293 0 0 0 100 4 0 0 3 215 104 38 1 0 0 0 1125 0 0 0 100 5 0 0 10 220 104 22 0 1 1 0 270 0 0 0 100 6 0 0 0 12 2 8 0 1 1 0 300 0 0 0 100 7 0 0 0 8 1 4 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:43:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 126 0 14 2173 102 213 9 33 6 0 2126 3 1 0 96 1 218 0 6 188 6 289 11 31 4 0 1863 2 1 0 97 2 309 0 0 78 6 126 4 24 6 2 1074 2 0 0 97 3 60 0 0 129 27 276 5 37 2 0 1927 1 0 0 99 4 69 0 101 320 129 326 6 45 2 0 2751 1 1 0 98 5 144 0 10 279 105 164 5 28 2 1 1659 2 0 0 98 6 147 0 0 68 1 168 5 27 1 2 1825 2 0 0 98 7 7 0 0 70 2 221 2 30 0 0 1814 1 0 0 98 March 4, 2026 at 01:43:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 6 1 0 0 0 266 0 0 0 100 1 0 0 0 115 1 110 0 0 0 0 2 0 0 0 100 2 0 0 0 15 3 8 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 311 153 134 1 0 1 0 1133 0 0 0 100 5 0 0 10 215 104 10 0 0 0 0 260 0 0 0 100 6 0 0 0 27 7 26 1 1 0 0 309 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2116 101 76 0 6 4 0 280 0 1 0 99 1 0 0 0 82 2 76 0 2 1 0 38 0 0 0 100 2 0 0 0 20 3 19 0 1 9 0 7 0 0 0 100 3 0 0 0 16 1 15 0 1 8 1 372 0 0 0 100 4 0 0 3 325 153 173 2 7 13 0 1140 0 0 0 99 5 0 0 17 227 109 15 0 2 4 0 278 0 0 0 100 6 1 0 0 43 9 44 0 2 8 0 354 0 0 0 100 7 0 0 9 28 2 34 0 8 13 0 306 0 1 0 99 March 4, 2026 at 01:43:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 109 0 0 0 0 266 0 1 0 99 1 0 0 0 17 1 10 0 0 0 0 2 0 0 0 100 2 0 0 0 12 3 6 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 310 153 134 0 0 0 0 1043 0 0 0 100 5 0 0 10 216 104 10 0 1 0 0 260 0 0 0 100 6 0 0 7 24 8 20 0 1 0 0 310 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2176 101 242 0 22 130 0 266 0 1 0 99 1 0 0 0 94 0 143 0 27 118 0 0 0 0 0 100 2 0 0 0 81 5 114 0 17 130 0 2 0 0 0 100 3 0 0 0 157 75 124 0 21 122 0 295 0 0 0 100 4 0 0 3 434 142 379 1 26 150 0 1041 0 1 0 99 5 0 0 10 305 115 142 0 20 126 0 260 0 0 0 100 6 0 0 0 104 8 151 0 27 128 0 306 0 0 0 100 7 0 0 0 73 1 107 0 22 134 0 299 0 0 0 100 March 4, 2026 at 01:43:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2108 105 122 1 1 2 0 269 0 1 0 99 1 0 0 0 29 2 34 0 6 1 0 5 0 0 0 100 2 0 0 0 19 4 16 0 3 1 0 0 0 0 0 100 3 0 0 0 13 2 10 0 3 2 0 294 0 0 0 100 4 0 0 3 219 106 42 1 2 2 0 1043 0 0 0 100 5 0 0 10 271 132 68 0 1 1 0 260 0 0 0 100 6 0 0 0 82 35 76 1 2 0 0 320 0 0 0 100 7 0 0 0 10 2 4 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:43:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 41 2807 105 1298 24 221 62 0 5569 6 3 0 91 1 3 0 0 669 3 1178 34 233 24 0 6929 6 2 0 92 2 0 0 0 647 9 1096 14 173 19 0 5104 6 2 0 92 3 15 0 0 652 9 1164 38 236 35 0 8245 6 2 0 92 4 1 0 339 834 128 1207 31 240 55 0 7011 6 2 0 92 5 18 0 10 771 105 996 14 145 31 0 4856 5 2 0 93 6 21 0 0 674 17 1186 26 211 15 0 6692 5 2 0 94 7 40 0 0 565 17 927 18 128 35 0 3876 5 1 0 94 March 4, 2026 at 01:43:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 112 0 0 0 0 266 0 0 0 99 1 0 0 7 12 1 10 0 2 0 0 7 0 0 0 100 2 0 0 0 24 2 24 0 1 0 0 1 0 0 0 100 3 0 0 0 14 4 8 0 0 0 0 295 0 0 0 100 4 0 0 3 313 153 138 1 0 1 0 1049 0 0 0 100 5 0 0 10 222 110 12 0 0 1 0 280 0 0 0 100 6 0 0 0 35 11 34 0 0 0 0 325 0 0 0 100 7 0 0 0 14 2 10 0 0 0 0 322 0 0 0 100 March 4, 2026 at 01:43:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2102 101 110 0 1 1 0 266 0 0 0 100 1 3 0 0 14 2 6 0 1 2 0 9 0 0 0 100 2 0 0 0 24 2 18 0 1 4 0 33 0 0 0 100 3 0 0 0 19 4 18 0 2 1 0 294 0 0 0 100 4 0 0 3 318 157 144 0 0 4 0 1041 0 0 0 100 5 0 0 10 216 105 12 0 0 1 0 271 0 0 0 100 6 0 0 0 19 6 12 0 0 1 0 306 0 0 0 100 7 0 0 0 12 3 6 0 0 2 0 321 0 0 0 100 March 4, 2026 at 01:43:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2194 101 277 2 29 237 0 266 0 1 0 99 1 0 0 0 88 1 179 0 32 265 0 2 0 0 0 100 2 0 0 0 86 1 149 1 22 234 0 0 0 0 0 100 3 0 0 0 169 82 173 0 31 274 0 312 0 1 0 99 4 0 0 3 400 153 331 1 40 270 0 1033 0 1 0 99 5 0 0 10 368 105 325 0 35 225 0 279 0 1 0 99 6 0 0 0 86 5 159 2 33 266 0 305 0 1 0 99 7 0 0 0 79 2 147 0 25 214 0 300 0 0 0 100 March 4, 2026 at 01:43:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 108 0 0 0 0 266 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 1 0 0 0 100 3 0 0 0 11 2 6 0 1 1 0 294 0 0 0 100 4 0 0 3 312 150 142 1 1 2 0 1047 0 0 0 100 5 0 0 10 228 111 24 0 1 0 0 260 0 0 0 100 6 0 0 0 30 9 24 0 1 0 0 630 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 305 0 0 0 100 March 4, 2026 at 01:43:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2102 101 106 0 0 0 0 266 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 2 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 4 0 0 3 213 104 36 0 0 0 0 1033 0 0 0 100 5 0 0 10 276 132 80 0 1 0 0 280 0 0 0 100 6 0 0 0 56 24 52 0 1 0 0 300 0 0 0 100 7 0 0 0 21 8 16 0 0 0 0 309 0 0 0 100 March 4, 2026 at 01:43:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 677 0 14 2142 101 153 2 8 12 10 1204 1 1 0 98 1 802 0 119 24 0 50 0 11 7 11 192 0 0 0 99 2 86 0 0 52 1 59 0 10 8 9 105 0 0 0 100 3 40 0 0 44 2 49 0 11 4 7 397 0 0 0 100 4 12 0 3 252 110 77 1 5 3 5 1191 0 0 0 99 5 1897 0 10 257 111 50 2 5 7 3 692 0 1 0 99 6 48 0 0 154 53 170 0 10 9 8 426 0 0 0 100 7 7 0 0 41 3 39 0 7 10 3 345 0 0 0 100 March 4, 2026 at 01:43:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 108 1 1 0 0 266 0 0 0 100 1 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 220 108 42 1 0 0 0 1121 0 0 0 100 5 0 0 10 218 105 14 0 0 0 0 270 0 0 0 100 6 0 0 0 32 10 28 1 1 0 0 300 0 0 0 100 7 0 0 0 90 42 86 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:43:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 106 0 0 0 0 266 0 0 0 100 1 0 0 0 8 0 6 0 1 3 0 0 0 0 0 100 2 0 0 0 16 1 12 0 1 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 228 111 52 1 0 2 0 1441 0 0 0 99 5 0 0 10 218 105 16 0 1 2 0 270 0 0 0 100 6 0 0 0 14 1 12 0 0 2 0 302 0 0 0 100 7 0 0 0 112 51 112 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:43:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 108 0 0 0 0 267 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 2 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 293 0 0 0 100 4 0 0 3 213 104 36 1 0 0 0 1119 0 0 0 100 5 0 0 10 218 106 14 0 0 0 0 271 0 0 0 100 6 0 0 0 34 12 28 1 0 0 0 317 0 0 0 100 7 0 0 0 108 51 104 0 1 0 0 303 0 0 0 100 March 4, 2026 at 01:43:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 14 2113 102 118 0 1 4 0 271 0 0 0 100 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 15 2 8 0 0 0 0 1 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 212 104 34 1 0 1 0 1112 0 0 0 100 5 0 0 10 219 105 17 0 1 0 0 280 0 0 0 100 6 20 0 0 25 9 20 0 0 1 0 314 0 0 0 100 7 0 0 0 109 51 104 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 112 1 0 1 0 266 0 0 0 100 1 0 0 0 15 1 18 0 1 1 0 7 0 0 0 100 2 0 0 0 10 2 8 0 1 0 0 1 0 0 0 100 3 0 0 0 12 3 8 0 1 0 0 297 0 0 0 100 4 0 0 3 218 106 42 1 0 1 0 1123 0 0 0 100 5 0 0 10 231 113 18 0 0 0 0 270 0 0 0 100 6 0 0 0 29 7 26 1 1 0 0 319 0 0 0 100 7 0 0 0 111 51 108 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 101 106 0 0 1 0 266 0 0 0 99 1 0 0 0 10 1 0 0 0 1 0 0 0 0 0 100 2 0 0 0 12 2 4 0 0 1 0 0 0 0 0 100 3 0 0 0 24 8 14 1 0 1 0 620 0 0 0 100 4 0 0 7 215 104 38 1 0 2 0 1113 0 0 0 100 5 0 0 14 226 105 24 0 1 0 0 272 0 0 0 100 6 0 0 0 13 3 4 0 0 1 0 300 0 0 0 100 7 0 0 0 108 51 102 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:44:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 108 0 0 0 0 266 0 0 0 100 1 0 0 0 12 1 10 0 0 2 0 2 0 0 0 100 2 0 0 0 13 1 14 0 1 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 227 111 50 1 0 0 0 1120 0 0 0 100 5 0 0 10 223 104 22 0 0 2 0 280 0 0 0 100 6 0 0 0 14 3 10 0 0 2 0 301 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 108 0 0 0 0 266 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 2 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 3 0 0 0 14 2 14 0 1 0 0 294 0 0 0 100 4 0 0 3 230 112 50 1 0 0 0 1124 0 0 0 99 5 0 0 10 223 104 18 0 1 0 0 263 0 0 0 100 6 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 303 0 0 0 100 March 4, 2026 at 01:44:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 112 1 1 0 0 266 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 223 110 46 1 0 0 0 1120 0 0 0 100 5 0 0 10 219 104 14 0 0 0 0 280 0 0 0 100 6 0 0 0 12 2 6 1 1 0 0 300 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 217 0 14 2170 102 183 5 29 4 0 1819 2 1 0 97 1 111 0 0 81 1 134 1 21 3 1 1115 1 0 0 98 2 124 0 0 94 2 197 9 33 5 0 1519 1 0 0 98 3 88 0 0 71 4 166 12 30 3 0 2015 3 1 0 97 4 214 0 87 262 112 140 2 21 10 0 2264 2 1 0 97 5 0 0 10 316 121 217 2 32 3 0 1663 1 0 0 99 6 13 0 0 125 26 214 8 34 1 0 1985 1 0 0 98 7 106 0 0 142 24 245 4 26 4 0 1704 2 0 0 98 March 4, 2026 at 01:44:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 114 0 1 0 0 266 0 0 0 100 1 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 214 104 34 1 0 0 0 1124 0 0 0 100 5 0 0 10 228 111 20 0 0 0 0 265 0 0 0 100 6 0 0 0 35 12 32 0 1 0 0 300 0 0 0 100 7 0 0 0 90 42 86 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:44:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2204 101 337 0 44 223 0 266 0 1 0 99 1 0 0 0 118 0 241 0 37 223 0 0 0 0 0 100 2 0 0 0 106 1 205 0 43 178 0 0 0 0 0 100 3 0 0 0 239 150 176 0 38 174 0 294 0 0 0 100 4 0 0 2 296 106 175 1 31 184 0 260 0 1 0 99 5 0 0 11 305 110 212 0 32 159 0 1130 0 1 0 99 6 0 0 0 107 3 207 0 35 231 0 300 0 0 0 100 7 0 0 0 329 45 570 0 29 210 0 300 0 0 0 100 March 4, 2026 at 01:44:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 216 1 0 0 0 270 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 210 103 4 0 1 0 0 3 0 0 0 100 5 0 0 10 240 116 64 1 0 0 0 1400 0 0 0 99 6 0 0 0 16 3 10 1 0 0 0 300 0 0 0 100 7 0 0 0 12 1 12 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:44:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2121 101 227 1 9 9 1 341 0 1 0 99 1 0 0 7 20 1 21 0 5 4 1 81 0 1 0 99 2 0 0 0 36 2 33 0 4 16 0 4 0 0 0 100 3 0 0 19 15 1 12 0 2 5 0 295 0 0 0 100 4 0 0 3 233 108 33 0 5 12 0 48 0 0 0 100 5 0 0 24 241 112 73 3 7 12 0 1336 0 1 0 99 6 0 0 0 37 6 35 0 5 0 0 349 0 0 0 100 7 0 0 0 26 3 19 0 2 2 0 330 0 0 0 100 March 4, 2026 at 01:44:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 101 216 0 0 0 0 266 0 0 0 100 1 0 0 0 11 1 6 0 0 0 0 7 0 0 0 100 2 0 0 0 13 2 9 0 0 0 0 1 0 0 0 100 3 0 0 0 12 2 6 0 0 0 0 295 0 0 0 100 4 0 0 10 212 103 8 0 1 0 0 7 0 0 0 100 5 0 0 10 224 111 43 0 2 1 0 1294 0 0 0 100 6 0 0 0 44 15 42 0 1 0 0 327 0 0 0 100 7 0 0 0 13 1 10 0 1 0 0 303 0 0 0 100 March 4, 2026 at 01:44:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2122 101 214 0 0 1 0 266 0 1 0 99 1 0 0 0 34 2 12 0 1 1 0 0 0 0 0 100 2 0 0 0 28 2 2 0 0 1 0 0 0 0 0 100 3 0 0 0 27 2 2 0 0 1 0 294 0 0 0 100 4 0 0 7 229 103 6 0 2 0 0 0 0 0 0 100 5 0 0 133 222 106 47 1 1 2 0 1295 0 0 0 99 6 0 0 0 46 10 18 0 0 1 0 306 0 0 0 100 7 0 0 0 33 5 8 0 0 1 0 326 0 0 0 100 March 4, 2026 at 01:44:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2110 101 182 1 4 0 0 267 0 1 0 99 1 0 0 0 47 2 42 0 4 0 0 2 0 0 0 100 2 0 0 0 18 1 21 0 4 3 0 0 0 0 0 100 3 0 0 0 10 1 4 0 0 0 0 294 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 10 224 106 44 1 0 1 0 1296 0 0 0 100 6 0 0 0 29 8 22 1 2 0 0 308 0 0 0 100 7 0 0 0 9 1 4 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:44:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2786 102 1330 33 231 36 0 6199 6 3 0 91 1 15 0 0 715 8 1284 38 279 27 0 7136 6 2 0 92 2 2 0 0 665 4 1097 20 208 27 0 5715 6 2 0 93 3 0 0 7 653 2 1224 34 260 24 0 7533 5 2 0 93 4 0 0 339 756 104 1056 31 227 27 0 5190 5 2 0 93 5 0 0 3 824 115 1118 22 153 17 0 5478 5 2 0 94 6 0 0 0 617 11 1076 39 229 28 0 6302 6 2 0 92 7 17 0 0 551 6 958 21 143 18 0 4732 5 2 0 94 March 4, 2026 at 01:44:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 114 0 0 0 0 266 0 0 0 100 1 0 0 0 11 3 4 0 0 0 0 2 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 15 3 16 0 1 0 0 554 0 0 0 100 4 0 0 3 221 109 14 0 0 0 0 8 0 0 0 100 5 0 0 3 269 131 94 1 0 0 0 1034 0 0 0 100 6 0 0 0 56 24 52 0 1 0 0 301 0 0 0 100 7 0 0 0 11 1 8 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:44:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 104 122 1 0 1 0 272 0 0 0 100 1 0 0 0 9 1 6 0 0 0 0 5 0 0 0 100 2 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 3 0 0 7 13 3 8 0 0 0 0 554 0 0 0 100 4 0 0 2 233 111 32 0 1 0 0 18 0 0 0 100 5 0 0 4 220 110 38 0 0 0 0 1034 0 0 0 100 6 0 0 0 120 54 121 0 1 0 0 317 0 0 0 100 7 0 0 0 14 1 12 0 0 0 0 310 0 0 0 100 March 4, 2026 at 01:44:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 114 1 1 0 0 266 0 0 0 100 1 0 0 0 11 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 10 3 6 0 0 0 0 554 0 0 0 100 4 0 0 3 217 107 10 0 0 0 0 14 0 0 0 100 5 0 0 3 215 104 38 1 0 0 0 1035 0 0 0 100 6 0 0 0 29 11 20 1 0 0 0 300 0 0 0 100 7 0 0 0 94 42 92 0 1 0 0 320 0 0 0 100 March 4, 2026 at 01:44:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1439 0 126 2205 104 283 1 35 277 9 1265 2 2 0 97 1 1968 0 0 174 2 276 2 64 277 13 555 0 1 0 98 2 37 0 2 205 0 381 0 48 246 6 173 0 0 0 99 3 34 0 0 221 85 249 0 47 305 10 468 0 1 0 99 4 15 0 3 344 109 247 1 56 262 8 237 0 1 0 99 5 49 0 3 329 105 253 1 42 243 4 1218 0 1 0 99 6 0 0 7 103 3 176 0 41 228 0 586 0 0 0 100 7 0 0 0 187 51 237 0 29 182 0 325 0 0 0 100 March 4, 2026 at 01:44:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 103 26 0 1 0 0 270 0 0 0 100 1 0 0 0 101 1 94 0 0 0 0 2 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 297 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 3 232 111 56 1 0 2 0 1129 0 0 0 99 6 0 0 7 21 5 22 0 1 0 0 561 0 0 0 100 7 0 0 0 113 52 110 0 0 0 0 314 0 0 0 100 March 4, 2026 at 01:44:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 254 0 14 2222 101 379 6 44 4 0 1987 1 1 0 98 1 228 0 0 82 0 134 11 29 4 0 1524 2 1 0 97 2 37 0 0 57 2 121 9 21 4 0 952 3 0 0 97 3 79 0 0 79 1 170 5 39 3 0 1901 1 0 0 99 4 224 0 73 296 103 282 11 42 5 0 2436 3 1 0 96 5 32 0 3 308 111 257 10 41 3 0 2813 1 1 0 98 6 113 0 7 107 5 262 5 41 8 0 1907 1 0 0 98 7 139 0 0 224 51 369 7 22 3 0 1844 1 0 0 98 March 4, 2026 at 01:44:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 14 2109 101 116 1 0 1 0 282 0 0 0 100 1 0 0 0 20 5 12 0 0 0 0 12 0 0 0 100 2 0 0 0 17 2 13 0 1 0 0 7 0 0 0 100 3 0 0 0 26 8 22 0 0 0 0 315 0 0 0 100 4 0 0 17 218 104 14 1 3 0 0 16 0 0 0 100 5 0 0 3 223 109 40 1 1 1 0 1138 0 1 0 99 6 0 0 7 30 6 30 1 3 1 0 578 0 0 0 100 7 0 0 0 119 51 122 0 2 2 0 316 0 0 0 100 March 4, 2026 at 01:44:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2120 101 137 2 5 8 0 310 0 0 0 99 1 0 0 7 20 2 18 0 7 9 0 11 0 1 0 99 2 1 0 0 24 2 25 0 4 14 1 86 0 0 0 100 3 0 0 0 37 10 30 0 3 4 1 331 0 0 0 100 4 0 0 7 224 103 22 1 4 6 0 29 0 0 0 100 5 0 0 7 226 105 48 1 3 5 0 1095 0 1 0 99 6 0 0 7 28 5 30 2 3 8 0 577 0 0 0 100 7 0 0 23 120 51 119 0 2 7 0 312 0 0 0 100 March 4, 2026 at 01:44:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2174 101 253 0 21 188 0 266 0 1 0 99 1 0 0 0 79 1 151 0 33 203 0 2 0 0 0 100 2 0 0 7 155 8 280 0 29 121 0 6 0 0 0 100 3 0 0 0 154 72 165 0 32 172 0 312 0 0 0 99 4 0 0 3 275 103 141 0 32 155 0 0 0 0 0 100 5 0 0 3 283 105 171 1 17 142 0 1043 0 1 0 99 6 0 0 7 71 5 128 0 26 168 0 562 0 0 0 100 7 0 0 0 155 51 204 0 18 130 0 300 0 0 0 100 March 4, 2026 at 01:44:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2122 101 116 0 0 0 0 266 0 0 0 100 1 0 0 0 32 3 16 0 1 0 0 6 0 0 0 100 2 0 0 0 43 10 22 0 0 0 0 12 0 0 0 100 3 0 0 0 24 1 4 0 1 0 0 294 0 0 0 100 4 0 0 3 225 103 2 0 0 0 0 0 0 0 0 100 5 0 0 3 230 104 38 0 0 0 0 1033 0 0 0 100 6 0 0 7 32 4 12 0 1 0 0 560 0 0 0 100 7 0 0 112 109 51 105 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 114 1 0 0 0 269 0 0 0 100 1 0 0 0 10 1 4 0 1 1 0 2 0 0 0 100 2 0 0 0 33 10 32 0 1 0 0 14 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 3 217 104 38 2 0 0 0 1033 0 0 0 100 6 0 0 7 16 4 10 1 0 0 0 559 0 0 0 100 7 0 0 7 109 51 104 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2640 102 1076 24 191 16 0 5158 5 2 0 93 1 18 0 0 573 2 1022 30 193 23 0 5290 5 2 0 94 2 1 0 0 524 12 845 18 136 33 0 4142 4 1 0 95 3 31 0 0 514 2 974 34 184 27 0 6513 5 2 0 93 4 4 0 255 634 105 838 26 165 22 0 3843 4 2 0 94 5 6 0 3 641 109 797 14 122 28 0 4662 4 2 0 94 6 18 0 7 472 8 862 19 139 33 0 5427 5 2 0 93 7 20 0 0 492 44 814 23 106 20 0 3580 3 1 0 96 March 4, 2026 at 01:44:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2294 102 386 6 54 7 0 1661 2 1 0 98 1 0 0 0 186 3 352 18 78 4 0 2218 2 1 0 98 2 0 0 0 216 2 365 16 53 4 0 1841 2 1 0 98 3 14 0 0 185 2 279 7 66 4 0 2123 1 0 0 98 4 13 0 101 430 150 351 7 65 5 0 1779 1 1 0 98 5 4 0 3 358 105 255 4 36 13 0 2296 1 1 0 98 6 0 0 7 152 7 236 8 46 3 0 1900 1 0 0 98 7 0 0 0 182 6 313 8 36 2 0 1462 1 0 0 98 March 4, 2026 at 01:44:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2189 101 276 1 30 262 0 286 0 1 0 99 1 0 0 0 87 1 178 1 32 260 0 300 0 0 0 99 2 0 0 0 83 2 161 0 27 189 0 0 0 0 0 100 3 0 0 0 169 88 336 0 37 199 0 294 0 0 0 100 4 0 0 3 377 145 263 1 33 265 0 8 0 1 0 99 5 0 0 3 316 115 226 2 23 219 0 1033 0 1 0 99 6 0 0 7 89 4 179 0 35 267 0 260 0 0 0 100 7 0 0 0 83 5 165 1 38 213 0 314 0 0 0 99 March 4, 2026 at 01:44:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 114 1 0 0 0 276 0 0 0 100 1 0 0 0 10 2 4 1 0 0 0 302 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 269 131 94 1 0 1 0 1033 0 0 0 100 6 0 0 7 57 25 54 0 1 0 0 260 0 0 0 100 7 0 0 0 17 6 12 0 0 0 0 306 0 0 0 100 March 4, 2026 at 01:44:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 116 0 1 0 0 266 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 2 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 5 0 0 0 100 5 0 0 3 217 104 42 0 1 0 0 1036 0 0 0 100 6 0 0 7 38 14 36 0 1 0 0 261 0 0 0 100 7 0 0 0 99 46 96 0 1 0 0 307 0 0 0 100 March 4, 2026 at 01:44:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 120 0 0 0 0 281 0 0 0 100 1 0 0 0 13 3 10 0 0 0 0 307 0 0 0 100 2 0 0 0 28 10 24 0 0 0 0 14 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 298 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 8 0 0 0 100 5 0 0 3 222 109 38 1 0 0 0 1033 0 0 0 100 6 0 0 7 26 6 26 1 0 0 0 276 0 0 0 100 7 0 0 0 120 53 122 0 1 0 0 619 0 0 0 100 March 4, 2026 at 01:44:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 94 0 0 1 0 281 0 0 0 100 1 0 0 0 31 2 22 0 2 1 0 300 0 0 0 100 2 0 0 0 20 7 12 0 0 1 0 11 0 0 0 100 3 0 0 0 10 2 2 0 0 1 0 294 0 0 0 100 4 0 0 7 212 104 6 0 1 0 0 5 0 0 0 100 5 0 0 7 218 105 9 1 0 1 0 486 0 0 0 100 6 0 0 7 17 5 10 0 0 1 0 261 0 0 0 100 7 0 0 0 111 52 106 0 0 1 0 323 0 0 0 100 March 4, 2026 at 01:44:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 101 24 1 2 0 0 286 0 0 0 100 1 0 0 0 112 2 106 0 1 0 0 302 0 0 0 100 2 0 0 0 11 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 10 1 10 0 1 3 0 294 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 215 104 41 0 0 2 0 547 0 0 0 100 6 0 0 7 15 4 12 0 0 1 0 260 0 0 0 100 7 0 0 0 121 57 116 0 0 0 0 309 0 0 0 100 March 4, 2026 at 01:44:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 14 2142 101 140 0 12 7 2 449 0 1 0 99 1 46 0 0 71 3 74 0 11 7 4 94 0 0 0 100 2 16 0 0 48 0 45 1 7 2 8 340 0 0 0 100 3 5 0 0 32 1 22 0 6 1 2 347 0 0 0 100 4 4 0 3 235 104 18 0 5 2 0 37 0 0 0 100 5 2706 0 116 241 104 93 3 4 2 16 1446 1 1 0 98 6 732 0 7 55 4 73 2 11 20 13 1254 1 0 0 98 7 27 0 2 153 55 161 0 9 7 8 453 0 0 0 100 March 4, 2026 at 01:44:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 112 0 0 0 0 271 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 28 6 24 0 0 0 0 309 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 1 0 0 0 100 5 0 0 3 217 106 40 0 0 1 0 1122 0 0 0 100 6 0 0 7 14 4 10 0 0 0 0 260 0 0 0 100 7 0 0 0 112 53 108 0 0 0 0 621 0 0 0 100 March 4, 2026 at 01:44:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 114 0 0 0 0 286 0 0 0 100 1 0 0 0 13 1 10 0 2 0 0 5 0 0 0 100 2 0 0 0 38 10 42 0 3 0 0 314 0 0 0 100 3 0 0 0 9 1 4 1 0 0 0 297 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 8 0 0 0 100 5 0 0 3 222 111 38 1 0 1 0 1115 0 0 0 100 6 0 0 7 24 7 22 0 0 0 0 274 0 0 0 100 7 0 0 0 112 52 108 0 0 1 0 323 0 0 0 100 March 4, 2026 at 01:44:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 110 1 0 0 0 276 0 0 0 100 1 0 0 0 14 1 6 0 0 0 0 2 0 0 0 100 2 0 0 0 23 6 19 0 2 0 0 305 0 0 0 100 3 0 0 0 12 1 12 0 1 0 0 294 0 0 0 100 4 20 0 3 214 105 10 0 0 0 0 9 0 0 0 100 5 22 0 3 216 104 40 1 1 1 0 1122 0 0 0 100 6 0 0 7 14 4 10 0 0 0 0 260 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 303 0 0 0 100 March 4, 2026 at 01:44:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 110 0 1 0 0 276 0 0 0 100 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 25 6 18 1 0 0 0 305 0 0 0 100 3 0 0 0 11 1 10 0 1 1 0 294 0 0 0 100 4 0 0 3 208 102 2 0 0 1 0 0 0 0 0 100 5 0 0 3 220 106 44 1 0 3 0 1113 0 1 0 99 6 0 0 7 15 4 12 0 0 2 0 260 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 112 0 0 0 0 281 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 2 0 0 0 23 4 18 1 0 0 0 620 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 4 0 0 3 212 102 10 0 1 0 0 0 0 0 0 100 5 0 0 3 215 104 38 1 0 0 0 1111 0 0 0 99 6 0 0 7 14 4 10 0 0 0 0 260 0 0 0 100 7 0 0 0 117 55 112 1 0 0 0 306 0 0 0 100 March 4, 2026 at 01:44:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 106 0 0 0 0 266 0 0 0 100 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 20 3 14 0 0 0 0 302 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 221 104 50 1 1 1 0 1116 0 1 0 99 6 0 0 7 18 6 14 0 1 0 0 262 0 0 0 100 7 0 0 0 118 56 114 0 0 0 0 308 0 0 0 100 March 4, 2026 at 01:44:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 114 1 0 0 0 286 0 0 0 100 1 0 0 0 9 1 6 0 0 0 0 7 0 0 0 100 2 0 0 0 20 2 16 0 0 0 0 301 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 4 0 0 3 210 102 6 0 1 0 0 10 0 0 0 100 5 0 0 3 220 110 38 0 0 1 0 1111 0 0 0 99 6 0 0 7 23 6 24 0 0 0 0 274 0 0 0 100 7 0 0 0 128 59 126 0 0 0 0 313 0 0 0 100 March 4, 2026 at 01:44:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 308 0 14 2149 101 207 8 21 3 0 1903 2 1 0 97 1 265 0 0 76 7 207 10 30 3 0 1477 3 1 0 96 2 377 0 0 83 3 184 6 25 12 2 1996 1 0 0 98 3 0 0 0 63 3 180 3 26 3 0 1705 1 0 0 99 4 3 0 87 263 102 214 9 35 6 0 1705 1 0 0 98 5 79 0 3 256 105 218 5 22 1 0 2383 2 1 0 97 6 0 0 7 89 5 234 6 29 2 0 1639 1 0 0 98 7 3 0 0 150 48 186 5 16 1 0 1337 2 0 0 98 March 4, 2026 at 01:44:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2191 101 264 0 24 146 0 280 0 1 0 99 1 0 0 0 183 53 252 0 26 191 0 18 0 0 0 100 2 0 0 0 70 2 118 0 21 140 0 305 0 0 0 100 3 13 0 0 167 89 141 1 28 127 0 317 0 0 0 99 4 0 0 17 280 104 145 0 26 133 0 8 0 0 0 100 5 0 0 3 274 105 156 1 22 129 0 1137 0 1 0 99 6 1 0 7 98 8 178 0 25 160 0 304 0 0 0 100 7 0 0 0 149 1 287 0 21 105 0 316 0 0 0 100 March 4, 2026 at 01:44:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2104 101 108 1 0 0 0 296 0 0 0 99 1 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 2 0 0 0 17 1 12 0 0 0 0 300 0 0 0 100 3 0 0 0 21 8 16 0 0 0 0 302 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 215 104 38 1 0 0 0 1124 0 0 0 100 6 0 0 7 18 5 14 0 0 0 0 261 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 110 0 0 0 0 266 0 0 0 100 1 0 0 0 112 51 112 0 1 0 0 2 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 300 0 0 0 100 3 0 0 0 26 10 22 0 0 0 0 305 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 216 104 40 1 0 1 0 1126 0 0 0 100 6 0 0 7 14 4 10 0 0 0 0 260 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 108 0 0 0 0 266 0 0 0 100 1 0 0 0 110 50 108 0 1 0 0 8 0 0 0 100 2 0 0 0 22 1 22 1 1 0 0 300 0 0 0 100 3 0 0 0 28 11 22 0 0 0 0 305 0 0 0 100 4 0 0 3 216 105 12 0 0 0 0 12 0 0 0 100 5 0 0 3 221 109 36 0 0 0 0 1124 0 0 0 100 6 0 0 7 24 6 26 0 2 0 0 276 0 0 0 100 7 0 0 0 12 1 8 0 0 0 0 303 0 0 0 100 March 4, 2026 at 01:44:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2116 101 122 0 4 1 0 307 0 1 0 99 1 0 0 0 131 58 130 1 4 4 0 34 0 0 0 100 2 0 0 0 32 2 35 0 7 7 1 368 0 0 0 100 3 0 0 0 26 5 29 0 9 13 0 323 0 0 0 100 4 0 0 12 217 102 11 1 2 4 0 7 0 1 0 99 5 0 0 12 221 103 47 1 5 12 1 1150 0 0 0 100 6 0 0 7 25 5 21 0 1 4 1 328 0 0 0 100 7 0 0 0 18 1 18 0 5 13 0 312 0 0 0 100 March 4, 2026 at 01:44:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 101 113 1 0 1 0 266 0 1 0 99 1 0 0 0 30 11 22 0 0 0 0 7 0 0 0 100 2 0 0 0 20 1 14 0 0 0 0 300 0 0 0 100 3 0 0 0 113 49 116 0 2 3 0 294 0 0 0 100 4 0 0 3 209 102 2 0 0 1 0 0 0 0 0 100 5 0 0 3 218 104 40 1 0 1 0 1038 0 0 0 100 6 0 0 14 20 6 18 0 1 1 0 261 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 299 0 0 0 100 March 4, 2026 at 01:44:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2105 103 113 0 0 0 0 266 0 1 0 99 1 0 0 0 42 10 20 0 1 0 0 16 0 0 0 100 2 0 0 0 38 3 18 0 1 0 0 301 0 0 0 100 3 0 0 0 129 53 110 0 2 0 0 294 0 0 0 100 4 0 0 3 230 103 12 0 1 1 0 0 0 0 0 100 5 0 0 3 231 104 38 1 0 2 0 1036 0 0 0 100 6 0 0 7 36 6 14 0 0 0 0 260 0 0 0 100 7 0 0 0 26 2 6 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:44:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2104 101 110 0 0 1 0 266 0 1 0 99 1 0 0 0 26 9 18 1 0 0 0 11 0 0 0 100 2 0 0 0 21 3 14 1 0 0 0 302 0 0 0 100 3 0 0 0 110 52 104 0 0 0 0 294 0 0 0 100 4 0 0 3 209 102 2 0 1 0 0 3 0 0 0 100 5 0 0 3 214 103 36 1 0 0 0 1034 0 0 0 100 6 0 0 7 19 6 14 0 0 0 0 261 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 14 2821 102 1277 33 217 41 0 5603 7 3 0 91 1 18 0 0 660 6 1185 39 248 23 0 6968 6 2 0 92 2 1 0 0 715 40 1149 30 196 43 0 5020 5 2 0 93 3 0 0 0 602 8 1112 41 250 34 1 8209 6 2 0 92 4 9 0 339 783 108 1124 24 236 49 0 6038 5 2 0 93 5 0 0 3 767 112 982 13 146 21 0 5334 5 2 0 93 6 5 0 7 663 16 1146 40 222 32 0 6518 6 2 0 92 7 1 0 0 511 2 900 15 131 22 0 4745 5 1 0 94 March 4, 2026 at 01:44:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 106 1 0 1 0 266 0 0 0 100 1 0 0 0 11 1 2 0 0 1 0 10 0 0 0 100 2 0 0 0 66 26 58 0 0 1 0 300 0 0 0 100 3 0 0 0 12 3 4 0 0 1 0 294 0 0 0 100 4 0 0 7 208 102 2 0 1 0 0 0 0 0 0 100 5 0 0 7 220 104 40 3 0 1 0 1035 0 0 0 100 6 0 0 7 31 10 28 0 1 1 0 266 0 0 0 100 7 0 0 0 63 28 56 0 1 1 0 321 0 0 0 100 March 4, 2026 at 01:44:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2222 101 352 0 40 289 0 266 0 1 0 99 1 0 0 0 266 2 530 0 46 227 0 12 0 1 0 99 2 0 0 0 131 3 244 0 48 263 0 305 0 1 0 99 3 0 0 0 293 157 284 0 48 287 0 312 0 1 0 99 4 0 0 3 326 102 244 0 42 328 0 0 0 1 0 99 5 0 0 3 295 104 213 1 33 265 0 1045 0 1 0 99 6 0 0 7 127 10 222 0 32 244 0 266 0 1 0 99 7 0 0 0 200 51 304 0 26 257 0 300 0 1 0 99 March 4, 2026 at 01:44:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 108 0 0 0 0 266 0 0 0 100 1 0 0 0 8 1 4 0 0 0 0 11 0 0 0 100 2 0 0 0 16 1 10 1 0 0 0 300 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 213 103 36 1 0 0 0 1035 0 0 0 100 6 0 0 7 28 9 24 0 1 0 0 265 0 0 0 100 7 0 0 0 112 51 112 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:44:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 105 130 0 1 0 0 274 0 0 0 100 1 0 0 0 8 1 4 0 0 0 0 5 0 0 0 100 2 0 0 0 27 6 22 0 0 0 0 306 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 213 103 36 1 0 0 0 1034 0 0 0 100 6 0 0 7 21 7 18 0 0 0 0 579 0 0 0 100 7 0 0 0 112 51 110 0 0 0 0 306 0 0 0 100 March 4, 2026 at 01:44:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2124 110 126 1 0 0 0 279 0 0 0 99 1 0 0 0 12 0 14 0 0 0 0 32 0 0 0 100 2 0 0 0 16 1 12 0 0 0 0 300 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 2 211 103 6 0 0 0 0 9 0 0 0 100 5 0 0 4 220 109 38 0 1 1 0 1036 0 0 0 100 6 0 0 7 25 8 24 0 2 0 0 271 0 0 0 100 7 0 0 0 110 51 104 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 14 2140 103 133 0 6 5 2 329 0 1 0 99 1 13 0 0 39 1 37 0 6 14 1 125 0 0 0 100 2 5 0 0 42 3 35 1 4 10 1 388 0 0 0 100 3 1890 0 0 41 2 38 2 8 5 4 673 0 1 0 99 4 1455 0 116 221 102 44 2 7 13 11 985 2 1 0 98 5 135 0 3 252 103 86 2 7 13 6 1173 0 0 0 99 6 27 0 10 61 10 66 0 8 4 6 394 0 0 0 100 7 14 0 0 136 51 129 0 7 7 1 395 0 0 0 100 March 4, 2026 at 01:44:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 106 0 0 0 0 266 0 0 0 100 1 0 0 0 10 1 6 0 1 1 0 0 0 0 0 100 2 0 0 0 23 1 22 1 1 0 0 300 0 0 0 100 3 0 0 0 12 2 10 0 0 0 0 294 0 0 0 100 4 0 0 3 208 102 2 0 0 2 0 0 0 0 0 100 5 0 0 3 213 103 36 1 0 0 0 1120 0 1 0 99 6 0 0 7 26 9 23 0 1 2 0 265 0 0 0 100 7 0 0 0 110 52 104 1 0 0 0 301 0 0 0 100 March 4, 2026 at 01:44:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 108 0 0 0 0 267 0 0 0 100 1 0 0 0 8 1 4 0 0 0 0 12 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 300 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 219 105 44 1 0 1 0 1122 0 0 0 99 6 0 0 7 22 7 18 1 0 0 0 583 0 0 0 100 7 0 0 0 109 51 106 0 0 0 0 305 0 0 0 100 March 4, 2026 at 01:44:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2102 101 106 1 0 0 0 266 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 2 0 0 0 19 2 14 0 0 0 0 301 0 0 0 100 3 0 0 0 14 2 14 0 1 0 0 294 0 0 0 100 4 0 0 3 209 102 4 0 2 0 0 13 0 0 0 100 5 0 0 3 225 108 48 2 0 2 0 1129 0 1 0 99 6 0 0 7 20 7 16 0 0 0 0 262 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 108 0 0 0 0 266 0 0 0 100 1 1 0 0 18 4 18 0 0 0 0 22 0 0 0 100 2 0 0 0 18 2 14 0 0 0 0 301 0 0 0 100 3 0 0 0 13 3 8 0 0 0 0 295 0 0 0 100 4 0 0 3 215 102 16 0 1 0 0 17 0 0 0 100 5 0 0 3 238 117 54 1 0 1 0 1129 0 1 0 99 6 1 0 7 21 6 20 0 0 0 0 273 0 0 0 100 7 0 0 0 110 51 106 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 108 0 1 0 0 266 0 0 0 100 1 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 2 0 0 0 20 2 12 1 0 1 0 300 0 0 0 100 3 0 0 0 11 3 4 0 0 1 0 294 0 0 0 100 4 0 0 3 208 102 2 0 0 1 0 10 0 0 0 100 5 0 0 3 222 108 46 0 0 1 0 1118 0 0 0 99 6 0 0 7 19 6 10 0 0 1 0 260 0 0 0 100 7 0 0 0 107 51 102 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:45:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 106 0 0 0 0 266 0 0 0 100 1 0 0 0 10 2 6 0 0 2 0 2 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 301 0 0 0 100 3 0 0 0 12 2 10 0 0 2 0 294 0 0 0 100 4 0 0 3 211 102 6 0 1 3 0 10 0 0 0 100 5 0 0 3 227 107 54 1 1 0 0 1435 0 1 0 99 6 0 0 7 24 8 22 0 0 2 0 264 0 0 0 100 7 0 0 0 110 51 108 0 1 0 0 305 0 0 0 100 March 4, 2026 at 01:45:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 110 1 0 0 0 266 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 20 3 16 0 0 0 0 304 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 10 0 0 0 100 5 0 0 3 215 103 38 1 0 1 0 1112 0 0 0 100 6 0 0 7 31 9 32 0 1 1 0 265 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 303 0 0 0 100 March 4, 2026 at 01:45:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 108 0 0 0 0 266 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 2 0 0 0 17 1 12 0 0 0 0 300 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 13 0 0 0 100 5 0 0 3 213 103 36 1 0 0 0 1112 0 0 0 100 6 0 0 7 29 11 26 0 0 0 0 270 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 110 0 0 0 0 266 0 0 0 100 1 0 0 0 12 2 12 0 0 0 0 13 0 0 0 100 2 0 0 0 17 1 12 1 0 0 0 300 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 212 103 8 0 0 0 0 16 0 0 0 100 5 0 0 3 221 111 36 0 0 1 0 1112 0 0 0 100 6 0 0 7 35 12 34 0 1 1 0 276 0 0 0 100 7 0 0 0 117 51 122 0 3 0 0 303 0 0 0 100 March 4, 2026 at 01:45:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 14 2195 101 392 8 42 6 0 1646 2 1 0 98 1 3 0 0 90 2 243 5 31 1 0 1057 1 0 0 98 2 214 0 0 112 5 279 4 33 7 0 1842 1 0 0 98 3 0 0 0 111 3 274 8 36 9 0 1878 1 0 0 99 4 177 0 87 299 107 351 1 29 4 0 1104 2 0 0 97 5 150 0 3 364 145 389 2 26 6 0 2496 1 1 0 98 6 221 0 7 115 9 261 5 36 4 0 2360 3 1 0 96 7 312 0 21 77 7 83 7 15 7 0 1745 3 1 0 97 March 4, 2026 at 01:45:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2176 101 245 1 22 178 0 266 0 1 0 99 1 0 0 0 94 8 174 0 34 211 0 10 0 0 0 99 2 0 0 0 87 1 160 0 27 169 0 300 0 0 0 100 3 0 0 0 189 97 182 0 36 210 0 294 0 0 0 99 4 0 0 3 336 102 270 0 37 146 0 0 0 0 0 100 5 0 0 3 356 143 245 1 21 142 0 1125 0 1 0 99 6 0 0 7 155 14 278 0 33 202 0 260 0 0 0 100 7 0 0 0 74 2 131 0 24 163 0 301 0 0 0 100 March 4, 2026 at 01:45:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 102 112 0 1 0 0 267 0 0 0 99 1 0 0 0 27 8 26 1 1 0 0 12 0 0 0 100 2 0 0 0 17 1 12 0 0 0 0 300 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 212 103 36 0 0 0 0 1124 0 0 0 100 6 0 0 7 33 14 26 0 0 0 0 260 0 0 0 100 7 0 0 0 90 42 86 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:45:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 270 0 0 0 0 598 0 1 0 99 1 0 0 0 26 9 20 0 1 0 0 14 0 0 0 100 2 0 0 0 23 2 22 1 1 0 0 301 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 211 103 6 0 1 0 0 6 0 0 0 100 5 0 0 3 219 106 42 1 0 1 0 1128 0 0 0 100 6 0 0 7 21 7 20 0 1 0 0 264 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:45:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2115 101 130 0 9 9 0 427 0 1 0 99 1 0 0 0 42 8 50 0 6 18 0 55 0 0 0 100 2 3 0 0 34 3 32 0 4 7 0 324 0 0 0 100 3 0 0 8 20 3 22 1 6 13 0 295 0 1 0 99 4 2 0 3 219 102 15 0 1 1 0 14 0 0 0 100 5 0 0 10 225 108 41 1 3 8 0 1124 0 0 0 100 6 0 0 7 23 5 22 0 1 10 0 265 0 0 0 100 7 0 0 0 130 55 129 1 3 0 0 346 0 0 0 100 March 4, 2026 at 01:45:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 113 1 1 1 0 269 0 1 0 99 1 0 0 0 18 5 6 0 0 1 0 3 0 0 0 100 2 0 0 0 25 3 16 0 0 1 0 301 0 0 0 100 3 0 0 0 18 3 14 0 1 1 0 294 0 0 0 100 4 0 0 7 209 102 2 0 1 0 0 0 0 0 0 100 5 0 0 7 219 104 40 1 0 2 0 1037 0 0 0 100 6 0 0 14 21 6 12 0 1 1 0 260 0 0 0 100 7 0 0 0 128 60 122 0 0 1 0 335 0 0 0 100 March 4, 2026 at 01:45:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2110 101 111 0 0 0 0 267 0 1 0 99 1 0 0 0 27 2 6 0 0 1 0 2 0 0 0 100 2 0 0 0 39 5 18 0 0 0 0 305 0 0 0 100 3 0 0 0 30 2 12 0 0 3 0 294 0 0 0 100 4 0 0 3 230 102 14 0 1 2 0 0 0 0 0 100 5 0 0 3 229 103 36 1 0 0 0 1034 0 0 0 100 6 0 0 7 35 5 16 0 1 2 0 260 0 0 0 100 7 0 0 0 137 57 118 0 1 0 0 309 0 0 0 100 March 4, 2026 at 01:45:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2104 101 110 0 0 0 0 266 0 1 0 99 1 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 2 0 0 0 17 1 10 1 0 0 0 300 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 213 103 36 0 0 0 0 1035 0 0 0 100 6 0 0 7 19 5 14 0 0 0 0 260 0 0 0 100 7 0 0 0 120 57 114 0 0 0 0 309 0 0 0 100 March 4, 2026 at 01:45:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2834 104 1405 29 237 22 0 6674 7 3 0 91 1 1 0 0 733 7 1312 22 262 16 0 7084 6 2 0 92 2 0 0 0 691 7 1185 23 196 18 0 5803 6 2 0 92 3 5 0 0 633 10 1162 30 232 17 0 8166 6 2 0 92 4 18 0 353 705 106 992 19 237 12 0 6180 5 2 0 93 5 0 0 3 877 129 1157 18 168 20 0 5730 5 2 0 93 6 28 0 7 595 8 1088 35 229 18 0 5498 6 2 0 92 7 14 0 0 555 25 949 15 136 10 0 4711 5 2 0 93 March 4, 2026 at 01:45:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 110 1 0 0 0 276 0 0 0 100 1 0 0 0 11 2 8 0 0 0 0 7 0 0 0 100 2 0 0 0 16 1 12 0 0 0 0 300 0 0 0 100 3 0 0 0 19 7 14 0 0 0 0 300 0 0 0 100 4 0 0 3 209 102 4 0 0 0 0 8 0 0 0 100 5 0 0 3 320 157 138 1 0 0 0 1034 0 0 0 100 6 0 0 7 24 4 30 0 2 0 0 273 0 0 0 100 7 0 0 0 14 3 10 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:45:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1338 0 14 2142 101 131 2 6 4 3 451 0 1 0 99 1 1991 0 114 31 2 54 2 8 3 12 1077 2 1 0 97 2 110 0 0 60 1 82 0 9 8 14 495 0 0 0 100 3 67 0 2 63 10 71 0 10 12 8 464 0 0 0 100 4 21 0 3 250 102 63 0 11 7 8 190 0 0 0 100 5 23 0 3 260 111 94 0 12 10 9 1112 0 0 0 99 6 9 0 7 40 5 32 0 5 4 3 312 0 0 0 100 7 0 0 0 115 45 98 0 3 2 0 351 0 0 0 100 March 4, 2026 at 01:45:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2185 102 240 1 38 236 0 276 0 1 0 99 1 0 0 0 106 1 193 0 44 221 0 0 0 1 0 99 2 0 0 0 86 1 158 2 32 250 0 300 0 0 0 100 3 0 0 0 180 88 187 1 34 238 0 299 0 1 0 99 4 0 0 3 293 102 181 0 36 273 0 0 0 1 0 99 5 0 0 3 287 103 200 2 34 188 0 1120 0 1 0 99 6 0 0 7 98 5 191 0 47 224 0 260 0 1 0 99 7 0 0 0 278 54 453 1 43 210 0 301 0 0 0 100 March 4, 2026 at 01:45:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 101 27 0 3 1 0 284 0 0 0 100 1 0 0 0 111 2 106 0 1 0 0 3 0 0 0 100 2 0 0 0 18 1 12 0 0 0 0 300 0 0 0 100 3 0 0 0 20 7 14 0 0 0 0 621 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 213 103 36 1 0 0 0 1118 0 1 0 99 6 0 0 7 16 5 12 0 0 0 0 261 0 0 0 100 7 0 0 0 111 52 106 0 1 1 0 301 0 0 0 100 March 4, 2026 at 01:45:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2117 107 22 1 0 0 0 276 0 0 0 99 1 0 0 0 109 1 106 0 1 0 0 14 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 301 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 213 103 36 1 0 1 0 1116 0 0 0 99 6 0 0 7 18 6 14 0 0 0 0 262 0 0 0 100 7 0 0 0 111 53 106 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:45:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 14 2180 105 199 9 21 3 0 1499 2 1 0 98 1 209 0 0 189 34 332 4 33 5 0 1661 1 0 0 99 2 1 0 0 62 3 120 2 18 3 0 1346 2 0 0 98 3 269 0 0 74 8 109 9 12 1 0 2063 3 1 0 96 4 255 0 101 253 103 210 2 29 2 0 1386 1 0 0 99 5 289 0 3 286 110 246 3 26 3 1 2822 2 1 0 97 6 7 0 7 85 8 158 10 25 9 0 1336 2 0 0 98 7 0 0 0 92 20 195 5 23 1 0 1684 1 0 0 99 March 4, 2026 at 01:45:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 110 0 1 0 0 266 0 0 0 100 1 0 0 0 112 51 106 0 0 1 0 3 0 0 0 100 2 0 0 0 44 11 40 1 1 1 0 314 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 294 0 0 0 100 4 0 0 3 208 102 2 0 1 1 0 3 0 0 0 100 5 0 0 3 217 105 38 1 0 1 0 1124 0 0 0 99 6 0 0 7 17 5 8 0 0 1 0 260 0 0 0 100 7 0 0 0 16 5 10 0 0 1 0 304 0 0 0 100 March 4, 2026 at 01:45:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 23 2189 102 267 0 29 177 0 266 0 2 0 98 1 0 0 0 108 11 174 1 22 170 0 35 0 0 0 99 2 0 0 14 114 7 191 1 25 150 1 379 0 1 0 99 3 0 0 0 177 92 157 0 33 167 0 330 0 0 0 100 4 1 0 3 296 103 165 1 33 151 0 33 0 0 0 100 5 0 0 3 297 104 217 1 38 173 0 1147 0 1 0 99 6 0 0 14 120 23 190 0 31 153 0 267 0 0 0 100 7 0 0 0 204 23 349 0 29 127 0 395 0 0 0 100 March 4, 2026 at 01:45:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 101 108 1 0 0 0 266 0 0 0 100 1 0 0 0 60 25 52 0 1 0 0 1 0 0 0 100 2 0 0 0 20 1 15 0 1 0 0 300 0 0 0 100 3 0 0 0 27 8 26 0 1 0 0 304 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 214 103 36 1 0 1 0 1037 0 0 0 100 6 0 0 7 19 4 14 0 0 0 0 260 0 0 0 100 7 0 0 7 64 29 58 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:45:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2122 101 108 0 1 0 0 266 0 0 0 100 1 0 0 0 128 52 111 0 3 0 0 5 0 0 0 100 2 0 0 112 15 1 9 0 0 0 0 300 0 0 0 100 3 0 0 0 50 12 28 1 1 0 0 311 0 0 0 100 4 0 0 3 229 102 10 0 1 0 0 0 0 0 0 100 5 0 0 3 229 103 36 1 0 1 0 1033 0 0 0 100 6 0 0 7 32 5 10 0 0 0 0 261 0 0 0 100 7 0 0 0 27 2 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 108 0 0 0 0 266 0 0 0 100 1 8 0 0 119 51 114 0 0 0 0 8 0 0 0 100 2 0 0 7 14 1 10 1 2 0 0 300 0 0 0 100 3 0 0 0 25 9 20 0 0 0 0 308 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 7 0 0 0 100 5 0 0 3 219 108 36 1 0 1 0 1034 0 0 0 100 6 0 0 7 23 6 22 0 1 0 0 274 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2847 101 1375 35 226 41 0 6718 7 3 0 91 1 15 0 0 771 30 1356 50 281 34 0 6965 6 2 0 92 2 12 0 0 693 6 1199 32 213 55 0 5947 6 2 0 92 3 28 0 0 654 9 1190 30 247 18 0 8236 5 2 0 93 4 19 0 367 813 115 1154 34 229 45 0 6237 5 2 0 93 5 17 0 3 855 103 1119 18 151 14 0 5348 5 2 0 93 6 11 0 0 620 4 1092 24 215 60 0 6045 6 2 0 92 7 3 0 7 577 3 1020 18 147 18 0 5005 5 2 0 93 March 4, 2026 at 01:45:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2207 107 270 3 32 239 0 272 0 1 0 99 1 0 0 0 126 1 217 0 42 288 0 10 0 0 0 100 2 0 0 0 96 2 171 1 27 212 0 300 0 0 0 100 3 0 0 0 182 105 157 1 28 222 0 294 0 1 0 99 4 0 0 3 393 152 289 0 44 274 0 0 0 1 0 99 5 0 0 3 304 104 230 1 28 271 0 1034 0 1 0 99 6 0 0 0 110 2 217 0 43 221 0 1 0 1 0 99 7 0 0 7 188 6 361 0 37 199 0 561 0 0 0 100 March 4, 2026 at 01:45:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 152 0 14 2158 105 134 0 16 17 14 429 0 1 0 99 1 16 0 3 101 1 110 1 14 14 5 144 0 0 0 100 2 24 0 0 55 1 65 0 14 9 5 468 0 0 0 100 3 653 0 0 36 1 31 0 8 8 3 1205 1 0 0 98 4 25 0 3 293 132 86 0 7 5 6 48 0 0 0 100 5 3 0 3 234 103 48 1 7 4 0 1113 0 0 0 100 6 0 0 0 80 25 67 0 5 1 0 75 0 0 0 100 7 2689 0 120 32 5 53 3 3 9 13 948 1 1 0 98 March 4, 2026 at 01:45:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2117 106 20 0 2 0 0 275 0 0 0 99 1 0 0 0 107 0 102 0 0 0 0 10 0 0 0 100 2 0 0 0 18 2 12 1 0 0 0 301 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 215 104 38 1 1 0 0 1123 0 0 0 100 6 0 0 0 33 12 26 0 0 0 0 2 0 0 0 100 7 0 0 7 100 45 102 0 2 0 0 560 0 0 0 100 March 4, 2026 at 01:45:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2125 110 38 1 2 0 0 600 0 0 0 99 1 0 0 0 107 1 108 0 0 0 0 33 0 0 0 100 2 0 0 0 18 2 14 0 0 0 0 301 0 0 0 100 3 0 0 0 11 2 8 0 0 0 0 297 0 0 0 100 4 0 0 3 211 102 6 0 0 0 0 7 0 0 0 100 5 0 0 3 222 111 36 0 0 0 0 1118 0 0 0 100 6 1 0 0 27 6 30 0 0 0 0 23 0 0 0 100 7 0 0 7 122 54 122 0 0 0 0 560 0 0 0 100 March 4, 2026 at 01:45:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 102 106 1 0 1 0 266 0 0 0 100 1 0 0 0 8 1 2 0 0 1 0 10 0 0 0 100 2 0 0 0 17 2 10 0 0 1 0 300 0 0 0 100 3 0 0 0 17 6 10 0 0 1 0 299 0 0 0 100 4 0 0 3 209 102 2 0 0 1 0 0 0 0 0 100 5 0 0 3 216 105 38 1 0 1 0 1118 0 0 0 100 6 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 7 0 0 7 114 55 111 0 1 0 0 581 0 0 0 100 March 4, 2026 at 01:45:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 21 2309 103 481 4 58 149 0 2235 1 1 0 98 1 258 0 0 205 2 386 6 67 157 0 1570 2 1 0 97 2 0 0 0 226 20 404 7 62 131 0 1899 1 1 0 98 3 360 0 0 268 99 327 6 58 157 0 2150 2 1 0 97 4 177 0 87 373 103 378 2 70 184 0 1502 1 1 0 98 5 2 0 3 327 104 275 3 38 140 0 1676 2 1 0 97 6 126 0 0 191 3 566 4 67 148 0 1672 1 1 0 98 7 70 0 0 285 33 623 6 55 110 0 1916 3 1 0 96 March 4, 2026 at 01:45:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2115 106 20 0 4 0 0 542 0 0 0 99 1 0 0 0 116 1 114 0 2 0 0 2 0 0 0 100 2 0 0 0 74 30 66 1 0 0 0 302 0 0 0 100 3 0 0 0 57 22 52 0 3 12 0 317 0 0 0 100 4 0 0 17 211 102 6 0 1 0 0 2 0 0 0 100 5 0 0 3 217 103 36 1 0 2 0 1138 0 0 0 100 6 0 0 0 30 5 31 0 4 0 0 20 0 0 0 100 7 0 0 0 13 2 10 0 2 5 0 316 0 0 0 100 March 4, 2026 at 01:45:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2125 103 35 0 9 13 0 613 0 0 0 100 1 1 0 0 122 1 121 0 2 4 0 43 0 0 0 100 2 0 0 0 20 2 18 0 2 3 1 400 0 0 0 100 3 0 0 8 115 51 109 0 3 7 0 293 0 1 0 99 4 0 0 17 221 102 22 0 4 10 0 9 0 0 0 100 5 0 0 10 215 103 45 0 3 12 0 1122 0 0 0 100 6 0 0 0 53 12 57 2 3 11 0 37 0 0 0 100 7 2 0 0 20 2 15 1 4 3 0 323 0 0 0 100 March 4, 2026 at 01:45:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2112 104 48 1 1 0 0 525 0 0 0 99 1 0 0 0 91 8 82 0 0 0 0 14 0 0 0 100 2 0 0 0 18 2 18 0 1 0 0 300 0 0 0 100 3 0 0 0 109 51 104 0 1 0 0 295 0 0 0 100 4 0 0 10 214 102 8 0 1 0 0 3 0 0 0 100 5 0 0 3 227 110 40 1 2 2 0 1043 0 0 0 100 6 1 0 7 31 3 30 0 2 0 0 16 0 0 0 100 7 0 0 0 17 3 12 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:45:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2124 103 108 0 0 0 0 526 0 0 0 100 1 0 0 0 41 9 18 0 0 0 0 13 0 0 0 100 2 0 0 0 27 2 6 0 1 0 0 300 0 0 0 100 3 0 0 0 128 51 112 0 1 0 0 294 0 0 0 100 4 0 0 115 213 103 5 0 1 0 0 0 0 0 0 100 5 0 0 3 231 105 34 1 0 0 0 1034 0 0 0 100 6 0 0 0 34 1 14 0 1 0 0 0 0 0 0 100 7 0 0 0 30 3 10 0 2 0 0 300 0 0 0 100 March 4, 2026 at 01:45:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2160 103 187 0 10 73 0 527 0 1 0 99 1 0 0 0 65 7 102 0 12 77 0 13 0 0 0 100 2 0 0 0 39 2 63 1 8 65 0 300 0 0 0 100 3 0 0 0 183 98 164 0 13 56 0 297 0 0 0 100 4 0 0 10 263 102 110 0 18 67 0 0 0 0 0 100 5 0 0 3 253 103 114 1 16 55 0 1033 0 0 0 99 6 0 0 0 60 2 107 0 16 85 0 0 0 0 0 100 7 0 0 0 105 3 176 0 12 58 0 301 0 0 0 100 March 4, 2026 at 01:45:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 21 2694 103 1145 23 189 20 0 5379 6 2 0 92 1 0 0 0 637 13 1129 29 245 20 0 5568 5 2 0 93 2 27 0 0 535 4 924 25 153 9 0 5103 5 2 0 94 3 1 0 0 602 43 1059 40 213 38 0 6729 5 2 0 93 4 21 0 269 671 104 896 24 192 19 0 4305 4 2 0 95 5 1 0 3 703 106 861 11 127 14 0 4421 4 1 0 95 6 2 0 0 520 3 958 21 161 13 0 4578 4 2 0 95 7 0 0 0 446 2 745 14 103 50 0 3250 4 1 0 95 March 4, 2026 at 01:45:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2274 104 367 7 46 1 0 2054 1 1 0 98 1 0 0 0 166 8 292 7 58 9 0 1518 1 0 0 98 2 0 0 0 185 3 291 6 32 1 0 768 2 0 0 98 3 0 0 0 134 3 206 3 49 3 0 1779 1 0 0 99 4 0 0 87 415 150 319 3 47 4 0 1252 1 0 0 98 5 0 0 3 343 104 244 5 25 7 0 1889 1 1 0 99 6 0 0 0 102 4 173 5 45 3 0 1464 1 0 0 98 7 0 0 0 135 2 207 2 20 5 0 1147 2 0 0 98 March 4, 2026 at 01:45:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2108 103 110 0 0 0 0 526 0 0 0 100 1 0 0 0 19 7 14 0 0 0 0 12 0 0 0 100 2 0 0 0 11 2 8 0 0 0 0 11 0 0 0 100 3 0 0 0 11 2 8 0 0 0 0 300 0 0 0 100 4 0 0 3 307 151 102 0 0 0 0 0 0 0 0 100 5 0 0 3 219 108 38 1 0 0 0 1041 0 0 0 100 6 0 0 0 24 6 24 0 0 0 0 315 0 0 0 100 7 0 0 0 20 2 16 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2108 103 110 0 0 1 0 526 0 0 0 99 1 0 0 0 18 6 10 0 0 1 0 6 0 0 0 100 2 0 0 0 11 2 4 0 0 1 0 10 0 0 0 100 3 0 0 0 12 2 2 0 0 1 0 294 0 0 0 100 4 0 0 7 308 151 103 0 1 0 0 0 0 0 0 100 5 0 0 7 217 104 38 1 0 3 0 1036 0 0 0 100 6 0 0 0 22 4 18 1 1 1 0 300 0 0 0 100 7 0 0 0 20 3 12 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:45:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 823 0 133 2211 103 325 0 26 254 14 607 0 1 0 98 1 97 0 0 208 9 372 0 44 234 8 196 0 1 0 99 2 1923 0 3 121 1 206 2 45 260 8 417 0 1 0 98 3 665 0 0 196 78 217 2 42 238 10 1228 1 1 0 98 4 19 0 3 404 141 306 0 42 269 3 161 0 1 0 99 5 22 0 3 337 114 242 1 46 238 2 1122 0 1 0 99 6 6 0 0 114 3 185 0 37 212 3 391 0 1 0 99 7 7 0 0 112 3 172 0 29 181 2 320 0 0 0 99 March 4, 2026 at 01:45:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2115 107 120 1 0 0 0 566 0 0 0 99 1 0 0 0 14 4 8 0 0 0 0 320 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 310 152 134 1 0 1 0 1120 0 0 0 100 6 0 0 0 18 3 16 0 0 0 0 305 0 0 0 100 7 0 0 0 17 2 12 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2192 111 264 8 26 0 0 1798 2 1 0 98 1 182 0 0 49 1 69 10 11 3 2 987 4 0 0 96 2 305 0 0 54 1 73 8 10 11 0 1688 3 1 0 96 3 390 0 0 96 2 218 8 39 5 0 1933 1 0 0 98 4 35 0 73 289 102 258 6 33 1 0 1631 1 0 0 99 5 0 0 3 339 144 289 5 26 0 0 2378 1 1 0 99 6 0 0 0 107 4 257 6 29 1 0 1560 1 0 0 98 7 0 0 0 122 9 263 3 26 2 0 1710 1 0 0 99 March 4, 2026 at 01:45:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 21 2112 104 116 1 1 3 0 541 0 0 0 99 1 0 0 0 12 1 6 0 1 0 0 20 0 0 0 100 2 0 0 0 17 2 12 0 1 0 0 7 0 0 0 100 3 0 0 0 28 5 32 0 3 0 0 316 0 0 0 100 4 0 0 17 213 103 6 0 2 4 0 16 0 0 0 100 5 0 0 3 227 111 40 1 0 0 0 1131 0 0 0 100 6 0 0 0 35 9 32 2 1 0 0 323 0 0 0 100 7 0 0 0 124 52 120 0 0 5 0 312 0 0 0 100 March 4, 2026 at 01:45:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2105 103 108 0 0 0 0 525 0 0 0 99 1 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 21 7 12 0 0 0 0 299 0 0 0 100 4 0 0 3 210 102 4 0 1 0 0 1 0 0 0 100 5 0 0 3 211 103 34 0 0 1 0 1123 0 0 0 100 6 0 0 0 14 3 10 0 0 0 0 300 0 0 0 100 7 0 0 0 117 52 112 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2192 103 270 0 32 166 0 542 0 1 0 99 1 0 0 0 89 2 156 1 26 143 0 29 0 0 0 100 2 0 0 0 86 2 166 0 29 166 1 150 0 0 0 100 3 0 0 7 186 90 357 1 40 152 0 325 0 0 0 100 4 0 0 3 345 122 229 1 36 165 0 45 0 1 0 99 5 0 0 12 292 103 192 1 28 162 0 1039 0 1 0 99 6 0 0 0 101 3 182 0 31 172 0 313 0 0 0 100 7 0 0 0 171 43 224 1 19 122 0 306 0 0 0 100 March 4, 2026 at 01:45:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2112 105 115 0 0 0 0 527 0 1 0 99 1 0 0 0 15 4 8 0 0 0 0 5 0 0 0 100 2 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 3 0 0 0 14 3 8 0 1 0 0 295 0 0 0 100 4 0 0 10 325 158 122 0 2 0 0 6 0 0 0 100 5 0 0 3 220 104 46 1 1 1 0 1034 0 0 0 100 6 0 0 0 19 5 14 0 1 0 0 301 0 0 0 100 7 0 0 0 21 3 16 0 1 1 0 300 0 0 0 100 March 4, 2026 at 01:45:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 133 2110 104 121 1 1 0 0 542 0 1 0 99 1 0 0 0 26 2 4 0 0 0 0 5 0 0 0 100 2 1 0 0 27 1 8 0 0 0 0 5 0 0 0 100 3 0 0 0 24 1 4 0 0 0 0 301 0 0 0 100 4 1 0 3 342 159 124 0 0 0 0 15 0 0 0 100 5 1 0 3 230 103 38 1 1 0 0 1034 0 0 0 100 6 1 0 0 34 4 14 1 1 0 0 302 0 0 0 100 7 5 0 0 36 3 16 0 1 0 0 306 0 0 0 100 March 4, 2026 at 01:45:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2110 103 112 0 0 0 0 527 0 1 0 99 1 0 0 0 10 2 4 0 0 0 0 3 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 3 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 4 0 0 3 320 157 114 0 0 0 0 6 0 0 0 100 5 0 0 3 223 108 40 2 0 0 0 1040 0 0 0 100 6 0 0 0 28 5 32 0 1 0 0 313 0 0 0 100 7 0 0 0 21 2 16 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 21 2848 104 1332 37 241 24 0 6580 6 3 0 91 1 9 0 0 760 4 1301 47 276 30 0 7103 6 2 0 92 2 1 0 0 727 15 1196 26 215 22 0 5225 6 2 0 92 3 7 0 0 692 24 1260 49 246 16 1 8130 7 2 0 91 4 28 0 353 849 113 1201 28 258 32 0 6695 6 2 0 92 5 1 0 3 849 109 1133 28 186 34 0 5830 6 2 0 92 6 8 0 0 649 6 1197 17 225 24 0 7649 7 2 0 91 7 5 0 0 544 5 892 16 133 32 0 4801 4 2 0 94 March 4, 2026 at 01:45:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2191 105 187 1 45 274 0 527 0 1 0 99 1 0 0 0 193 1 286 0 36 273 0 2 0 0 0 100 2 0 0 0 80 1 160 0 25 208 0 0 0 0 0 100 3 0 0 0 245 123 405 0 36 225 0 325 0 0 0 99 4 0 0 3 288 104 171 0 36 233 0 1 0 1 0 99 5 0 0 3 304 111 207 2 25 213 0 1052 0 1 0 99 6 0 0 0 121 15 224 0 38 292 0 301 0 1 0 99 7 0 0 0 86 2 165 0 29 222 0 300 0 0 0 100 March 4, 2026 at 01:45:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 660 0 21 2152 106 70 3 9 2 8 1505 1 1 0 98 1 2713 0 113 133 1 172 2 15 7 16 463 1 1 0 98 2 98 0 0 44 1 60 0 11 12 12 127 0 0 0 100 3 23 0 2 58 5 71 0 10 10 7 444 0 0 0 100 4 23 0 3 241 102 41 0 8 4 3 79 0 0 0 100 5 19 0 3 248 105 44 1 10 3 4 891 0 0 0 100 6 9 0 0 60 11 82 1 11 3 2 657 0 0 0 100 7 12 0 0 125 43 111 0 6 2 4 340 0 0 0 100 March 4, 2026 at 01:45:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2109 104 18 0 1 0 0 529 0 0 0 100 1 0 0 0 114 1 116 0 2 0 0 12 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 20 7 16 0 0 0 0 304 0 0 0 100 4 0 0 3 210 102 4 0 1 0 0 1 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 18 3 42 1 1 0 0 1415 0 0 0 100 7 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2111 104 16 0 0 0 0 538 0 0 0 100 1 0 0 0 110 1 105 0 1 0 0 0 0 0 0 100 2 0 0 0 8 1 6 0 1 0 0 0 0 0 0 100 3 0 0 0 17 4 12 1 0 0 0 623 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 219 108 6 0 0 0 0 7 0 0 0 100 6 0 0 0 33 6 62 0 0 1 0 1436 0 0 0 100 7 0 0 0 112 52 108 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2110 105 12 0 0 0 0 527 0 0 0 100 1 0 0 0 121 2 114 1 0 0 0 12 0 0 0 100 2 0 0 0 15 1 18 0 3 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 23 7 48 1 0 0 0 1422 0 0 0 99 7 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 71 0 21 2242 107 363 4 58 148 0 1977 2 1 0 97 1 230 0 0 151 1 280 10 51 159 0 1681 2 1 0 97 2 318 0 0 131 3 222 4 38 143 1 943 2 1 0 98 3 70 0 0 304 89 531 2 64 162 0 1807 2 1 0 98 4 3 0 87 340 109 307 5 61 166 0 1340 1 1 0 98 5 18 0 3 328 102 233 6 42 131 0 1405 1 1 0 99 6 121 0 0 146 5 353 7 51 125 0 2978 1 1 0 97 7 224 0 2 211 53 352 5 50 134 0 1823 2 1 0 97 March 4, 2026 at 01:45:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2110 104 94 0 1 0 0 527 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 3 0 0 0 25 1 18 0 0 0 0 294 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 17 3 40 1 0 1 0 1423 0 0 0 99 7 0 0 0 121 58 116 0 0 0 0 309 0 0 0 100 March 4, 2026 at 01:45:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2124 105 126 0 0 1 0 546 0 1 0 99 1 0 0 0 20 2 22 0 2 1 3 85 0 0 0 100 2 0 0 0 27 1 27 0 4 11 0 28 0 0 0 100 3 0 0 9 18 1 18 0 5 7 0 301 0 1 0 99 4 0 0 17 225 103 27 0 4 3 0 18 0 0 0 100 5 0 0 3 232 109 30 0 8 12 0 15 0 0 0 100 6 0 0 7 25 3 54 1 6 11 0 1433 0 0 0 99 7 0 0 0 127 56 128 0 4 9 1 396 0 0 0 100 March 4, 2026 at 01:45:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2114 104 118 0 1 0 0 527 0 0 0 100 1 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 21 2 16 0 0 0 0 1 0 0 0 100 3 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 4 0 0 3 216 103 9 0 1 0 0 1 0 0 0 100 5 0 0 3 234 113 26 1 1 0 0 15 0 0 0 100 6 0 0 0 23 4 50 0 0 0 0 1349 0 0 0 99 7 0 0 7 114 52 110 0 2 2 0 300 0 0 0 100 March 4, 2026 at 01:45:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2124 104 112 1 1 1 0 525 0 1 0 99 1 0 0 0 26 2 2 0 0 1 0 0 0 0 0 100 2 0 0 0 34 2 10 0 0 1 0 0 0 0 0 100 3 0 0 0 28 2 2 0 0 1 0 294 0 0 0 100 4 0 0 119 216 104 11 0 1 0 0 5 0 0 0 100 5 0 0 7 243 110 18 0 0 1 0 8 0 0 0 100 6 0 0 0 32 3 36 2 0 2 0 1333 0 0 0 99 7 0 0 0 128 52 106 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:46:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2110 104 112 0 0 2 0 525 0 0 0 99 1 0 0 0 13 3 8 0 0 0 0 2 0 0 0 100 2 0 0 0 17 1 12 0 0 1 0 0 0 0 0 100 3 0 0 0 11 1 8 0 1 0 0 297 0 0 0 100 4 0 0 10 213 103 6 0 0 0 0 1 0 0 0 100 5 0 0 3 229 110 20 0 0 0 0 14 0 0 0 100 6 0 0 0 20 2 50 1 1 2 0 1333 0 0 0 99 7 0 0 0 111 52 106 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:46:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 21 2884 106 1476 33 255 35 0 7532 6 3 0 91 1 14 0 0 749 4 1382 51 291 32 0 7948 7 2 0 91 2 28 0 0 661 2 1123 20 200 23 0 5814 6 2 0 92 3 2 0 0 674 23 1258 36 269 38 0 8478 6 2 0 92 4 8 0 367 860 107 1244 30 251 40 0 6141 6 2 0 92 5 0 0 3 792 109 1005 10 170 48 0 5086 5 2 0 93 6 9 0 0 685 7 1223 32 247 51 0 7134 5 2 0 93 7 0 0 2 615 23 1053 18 150 36 0 4532 5 1 0 94 March 4, 2026 at 01:46:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2124 111 160 1 1 0 0 1581 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 2 0 0 0 17 1 14 0 0 0 0 20 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 293 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 1 0 0 0 100 5 0 0 3 212 103 6 0 0 0 0 4 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 7 0 0 0 11 3 6 0 0 0 0 304 0 0 0 100 March 4, 2026 at 01:46:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2129 111 96 2 2 1 0 1565 0 1 0 99 1 0 0 0 76 1 74 0 4 0 0 0 0 0 0 100 2 0 0 0 18 1 14 0 0 0 0 10 0 0 0 100 3 0 0 0 109 51 106 0 0 0 0 299 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 225 112 10 0 0 0 0 9 0 0 0 100 6 0 0 0 23 4 24 1 0 0 0 319 0 0 0 100 7 0 0 0 17 3 14 0 0 0 0 323 0 0 0 100 March 4, 2026 at 01:46:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2119 110 57 2 3 0 0 1564 0 1 0 99 1 0 0 0 111 1 104 0 0 0 0 2 0 0 0 100 2 0 0 0 20 1 20 0 1 0 0 11 0 0 0 100 3 0 0 0 109 51 102 0 0 0 0 294 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 213 104 6 0 0 0 0 3 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:46:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2195 110 198 1 30 234 0 1883 0 1 0 99 1 0 0 0 183 1 271 0 42 257 0 5 0 1 0 99 2 0 0 0 89 1 172 0 27 262 0 10 0 0 0 100 3 0 0 0 269 131 289 0 35 272 0 301 0 1 0 99 4 0 0 3 355 102 313 0 35 220 0 0 0 0 0 100 5 0 0 3 282 104 156 0 22 231 0 5 0 0 0 100 6 0 0 0 86 1 172 0 34 194 0 300 0 0 0 99 7 0 0 0 72 3 141 0 31 208 0 300 0 0 0 99 March 4, 2026 at 01:46:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2111 105 48 0 0 0 0 1559 0 1 0 99 1 0 0 0 109 1 106 0 1 0 0 2 0 0 0 100 2 0 0 0 12 2 8 0 1 0 0 10 0 0 0 100 3 0 0 0 120 55 122 0 1 0 0 299 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 211 103 4 0 0 0 0 1 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 301 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:46:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2110 105 50 2 0 0 0 1561 0 1 0 99 1 0 0 0 122 6 116 0 1 0 0 9 0 0 0 100 2 0 0 0 12 2 10 0 0 0 0 34 0 0 0 100 3 0 0 0 118 55 116 0 3 0 0 309 0 0 0 100 4 0 0 3 220 104 18 0 1 0 0 4 0 0 0 100 5 0 0 3 218 106 10 1 0 0 0 9 0 0 0 100 6 0 0 0 15 3 8 1 0 0 0 302 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:46:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2111 105 50 1 0 0 0 1559 0 1 0 99 1 0 0 0 117 5 112 0 0 0 0 7 0 0 0 100 2 0 0 0 18 3 15 0 0 0 0 11 0 0 0 100 3 0 0 0 111 52 108 0 0 0 0 300 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 218 107 6 0 0 0 0 7 0 0 0 100 6 0 0 0 19 3 20 0 0 0 0 316 0 0 0 100 7 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:46:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 16 2158 106 97 2 10 24 5 1490 0 1 0 99 1 661 0 7 140 7 148 2 15 8 8 1551 1 1 0 98 2 42 0 0 76 3 79 0 10 6 4 143 0 0 0 100 3 4 0 0 68 18 52 0 7 6 1 358 0 0 0 100 4 29 0 7 301 135 93 0 7 5 3 78 0 0 0 100 5 4 0 7 242 105 32 0 6 3 0 40 0 0 0 100 6 2680 0 113 31 2 53 2 9 6 12 689 1 1 0 98 7 116 0 0 58 4 81 0 11 20 14 528 0 0 0 100 March 4, 2026 at 01:46:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2127 111 62 0 0 3 0 1393 0 1 0 99 1 0 0 7 115 3 112 0 1 3 0 264 0 0 0 100 2 0 0 0 12 2 8 0 0 0 0 10 0 0 0 100 3 0 0 0 9 1 8 0 1 0 0 294 0 0 0 100 4 0 0 3 307 151 102 0 0 0 0 0 0 0 0 100 5 0 0 3 213 103 6 0 1 0 0 1 0 0 0 100 6 0 0 0 18 2 18 0 1 2 0 300 0 0 0 100 7 0 0 0 10 2 6 0 0 3 0 300 0 0 0 100 March 4, 2026 at 01:46:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 108 52 3 1 0 0 1388 0 1 0 99 1 0 0 7 114 2 112 0 3 0 0 260 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 11 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 294 0 0 0 100 4 20 0 3 308 151 104 0 1 1 0 5 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 15 2 8 1 1 0 0 301 0 0 0 100 7 20 0 0 11 3 8 0 0 1 0 305 0 0 0 100 March 4, 2026 at 01:46:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2120 109 120 1 2 0 0 1388 0 1 0 99 1 0 0 7 120 35 114 0 2 0 0 262 0 0 0 100 2 0 0 0 12 2 8 0 0 0 0 10 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 297 0 0 0 100 4 0 0 3 245 120 38 0 0 0 0 1 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 8 0 0 0 0 299 0 0 0 100 7 0 0 0 14 2 14 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:46:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2123 108 162 1 1 0 0 1704 0 1 0 99 1 0 0 7 120 53 118 0 0 0 0 263 0 0 0 100 2 0 0 0 14 2 14 0 0 0 0 20 0 0 0 100 3 0 0 0 9 1 6 0 0 0 0 299 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 222 110 12 0 0 0 0 11 0 0 0 100 6 0 0 0 18 3 18 0 1 0 0 314 0 0 0 100 7 0 0 0 14 2 10 0 0 2 0 300 0 0 0 100 March 4, 2026 at 01:46:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 103 107 1 0 0 0 1112 0 1 0 99 1 0 0 7 87 37 114 0 2 0 0 537 0 0 0 100 2 0 0 0 50 21 48 0 1 0 0 20 0 0 0 100 3 0 0 0 10 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 300 0 0 0 100 7 0 0 0 9 2 6 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:46:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 110 1 0 1 0 266 0 0 0 100 1 0 0 7 42 10 70 1 1 2 0 1383 0 0 0 99 2 0 0 0 70 30 68 0 2 0 0 13 0 0 0 100 3 0 0 0 52 22 50 0 1 0 0 294 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 16 3 10 1 0 1 0 301 0 0 0 100 7 0 0 0 12 3 10 0 1 3 0 301 0 0 0 100 March 4, 2026 at 01:46:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 106 0 0 0 0 266 0 0 0 100 1 0 0 7 32 10 58 0 1 0 0 1381 0 0 0 100 2 0 0 0 17 2 18 0 2 0 0 10 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 294 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:46:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 74 0 14 2159 103 288 2 37 3 0 1676 1 1 0 98 1 17 0 7 72 8 267 2 23 2 0 2963 1 1 0 98 2 317 0 0 83 1 149 1 17 12 2 1593 1 0 0 98 3 73 0 0 168 57 238 3 20 2 0 1228 2 0 0 97 4 227 0 101 269 104 267 5 34 7 0 1522 1 0 0 98 5 93 0 3 266 106 194 9 28 0 1 1497 1 0 0 98 6 214 0 0 52 3 91 9 18 2 2 2025 3 1 0 96 7 0 0 0 47 3 146 5 23 6 0 1316 2 0 0 98 March 4, 2026 at 01:46:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 110 0 0 0 0 266 0 0 0 100 1 0 0 7 15 5 40 1 0 0 0 1387 0 0 0 100 2 0 0 0 20 2 18 0 1 0 0 1 0 0 0 100 3 0 0 0 116 52 118 0 1 0 0 300 0 0 0 100 4 0 0 3 221 108 14 0 0 0 0 9 0 0 0 100 5 0 0 3 221 111 8 0 0 0 0 8 0 0 0 100 6 0 0 0 19 3 18 0 0 0 0 315 0 0 0 100 7 0 0 0 14 2 10 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:46:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 106 1 0 1 0 266 0 0 0 100 1 0 0 7 16 5 38 1 0 1 0 1384 0 0 0 100 2 0 0 0 20 2 12 0 0 1 0 0 0 0 0 100 3 0 0 0 112 51 104 0 0 1 0 294 0 0 0 100 4 0 0 7 227 108 26 0 2 0 0 7 0 0 0 100 5 0 0 7 212 103 4 0 0 1 0 1 0 0 0 100 6 0 0 0 13 2 4 1 0 1 0 300 0 0 0 100 7 0 0 0 13 3 4 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:46:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2159 103 223 0 23 136 0 267 0 1 0 99 1 0 0 7 73 5 166 1 24 156 0 1386 0 1 0 99 2 0 0 0 80 1 145 0 21 136 0 3 0 0 0 100 3 0 0 0 248 127 239 0 20 134 0 311 0 0 0 99 4 0 0 3 373 112 317 0 24 165 0 15 0 0 0 100 5 0 0 3 275 103 132 0 18 117 0 9 0 0 0 100 6 0 0 0 84 2 157 0 24 157 0 300 0 0 0 100 7 0 0 0 64 2 115 0 14 124 0 300 0 0 0 100 March 4, 2026 at 01:46:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 102 116 0 3 5 0 271 0 0 0 100 1 0 0 15 24 4 50 1 2 5 0 1384 0 1 0 99 2 0 0 0 40 6 39 0 3 2 0 47 0 0 0 100 3 0 0 0 116 51 112 0 4 8 1 313 0 0 0 100 4 0 0 3 239 107 52 1 7 17 3 167 0 0 0 100 5 0 0 3 225 102 26 0 4 6 0 21 0 0 0 100 6 0 0 21 22 2 25 0 2 3 0 317 0 0 0 100 7 0 0 0 17 2 15 0 2 6 0 306 0 0 0 100 March 4, 2026 at 01:46:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 106 0 0 0 0 266 0 0 0 100 1 0 0 7 16 5 40 1 0 0 0 1300 0 0 0 100 2 0 0 0 37 9 30 0 0 0 0 15 0 0 0 100 3 0 0 0 108 51 102 0 0 0 0 294 0 0 0 100 4 0 0 3 215 104 6 0 0 0 0 1 0 0 0 100 5 0 0 3 212 102 4 0 0 0 0 0 0 0 0 100 6 0 0 0 20 1 21 0 3 0 0 300 0 0 0 100 7 0 0 7 17 5 14 0 1 0 0 307 0 0 0 100 March 4, 2026 at 01:46:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2124 102 112 1 1 0 0 266 0 0 0 100 1 0 0 7 28 4 40 0 1 0 0 1294 0 0 0 100 2 0 0 0 42 6 22 0 0 0 0 6 0 0 0 100 3 0 0 0 126 51 106 1 0 0 0 299 0 0 0 100 4 0 0 3 227 103 4 0 0 0 0 0 0 0 0 100 5 0 0 3 236 111 6 0 0 0 0 7 0 0 0 100 6 0 0 112 24 4 23 1 0 0 0 317 0 0 0 100 7 0 0 0 36 4 16 0 0 0 0 305 0 0 0 100 March 4, 2026 at 01:46:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 106 0 0 0 0 266 0 0 0 100 1 0 0 7 16 5 40 1 0 0 0 1298 0 0 0 100 2 0 0 0 28 7 22 0 0 0 0 10 0 0 0 100 3 0 0 0 110 51 102 0 0 0 0 294 0 0 0 100 4 0 0 3 212 103 4 0 0 0 0 0 0 0 0 100 5 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 7 14 1 10 0 0 0 0 300 0 0 0 100 7 0 0 0 15 2 14 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:46:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 14 2898 105 1501 45 290 302 0 6272 7 3 0 90 1 17 0 7 837 8 1564 50 360 252 0 8298 7 3 0 90 2 0 0 0 715 11 1250 23 240 226 0 5384 5 2 0 92 3 1 0 0 890 118 1459 59 273 250 0 7785 6 3 0 91 4 0 0 353 823 108 1262 37 293 247 0 6440 6 2 0 92 5 5 0 3 852 104 1184 35 241 227 0 4253 5 2 0 93 6 3 0 0 674 5 1288 33 267 221 0 6923 5 2 0 93 7 4 0 0 561 8 954 23 175 242 1 4623 4 2 0 94 March 4, 2026 at 01:46:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 16 0 1 0 0 266 0 0 0 100 1 0 0 7 20 7 42 1 0 0 0 1299 0 0 0 100 2 0 0 0 12 1 4 0 2 0 0 0 0 0 0 100 3 0 0 0 108 51 104 0 0 0 0 304 0 0 0 100 4 0 0 3 219 108 8 0 0 0 0 5 0 0 0 100 5 0 0 3 213 104 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 0 1 0 0 300 0 0 0 100 7 0 0 0 110 2 106 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:46:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 649 0 14 2137 102 87 2 6 7 4 1167 1 1 0 98 1 855 0 121 73 5 123 1 10 5 5 1368 0 1 0 99 2 1960 0 0 48 0 53 2 5 7 8 428 0 1 0 99 3 34 0 2 142 51 147 0 14 12 4 517 0 0 0 100 4 38 0 3 259 109 66 0 9 9 8 90 0 0 0 100 5 17 0 3 253 103 64 1 8 4 7 138 0 0 0 100 6 4 0 0 49 4 45 0 7 2 4 391 0 0 0 100 7 1 0 0 56 2 48 0 5 2 1 332 0 0 0 100 March 4, 2026 at 01:46:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 18 0 0 0 0 266 0 0 0 100 1 0 0 7 115 4 140 1 0 1 0 1383 0 0 0 100 2 0 0 0 15 1 16 0 1 0 0 1 0 0 0 100 3 0 0 0 112 52 112 0 0 0 0 313 0 0 0 100 4 0 0 3 219 108 10 0 0 0 0 6 0 0 0 100 5 0 0 3 220 110 8 0 0 0 0 7 0 0 0 100 6 0 0 0 19 3 18 2 0 0 0 315 0 0 0 100 7 0 0 0 16 3 15 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:46:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 16 0 0 1 0 266 0 0 0 100 1 0 0 7 114 4 136 1 0 1 0 1378 0 0 0 100 2 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 3 0 0 0 112 51 106 0 0 1 0 305 0 0 0 100 4 0 0 7 221 108 14 0 0 1 0 324 0 0 0 100 5 0 0 7 216 104 12 0 1 0 0 6 0 0 0 100 6 0 0 0 11 2 2 0 0 1 0 300 0 0 0 100 7 0 0 0 18 5 10 0 0 1 0 321 0 0 0 100 March 4, 2026 at 01:46:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2173 103 141 0 22 152 0 267 0 1 0 99 1 0 0 7 197 5 302 1 26 138 0 1381 0 1 0 99 2 0 0 0 70 0 146 0 20 141 0 0 0 0 0 100 3 0 0 0 283 149 442 0 30 162 0 306 0 0 0 99 4 0 0 3 288 103 163 0 26 169 0 13 0 0 0 100 5 0 0 3 283 104 159 0 22 140 0 0 0 0 0 100 6 0 0 0 79 1 154 0 29 166 0 300 0 0 0 100 7 0 0 0 87 3 158 0 22 149 0 300 0 0 0 100 March 4, 2026 at 01:46:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 110 0 14 2214 102 344 17 44 5 0 1823 1 1 0 98 1 22 0 0 178 4 319 6 42 2 0 2930 2 1 0 98 2 0 0 0 91 3 168 5 32 1 0 1700 1 0 0 98 3 43 0 0 244 56 380 12 47 3 0 2103 1 1 0 98 4 232 0 104 253 104 91 9 19 14 1 1425 4 1 0 96 5 160 0 3 265 103 91 6 21 5 1 1383 2 1 0 97 6 254 0 0 134 3 279 5 43 11 1 2357 2 1 0 98 7 15 0 7 161 4 297 18 36 5 0 2161 2 0 0 98 March 4, 2026 at 01:46:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 102 78 0 4 0 0 283 0 0 0 99 1 0 0 0 21 2 45 1 2 2 1 1142 0 0 0 100 2 0 0 0 10 1 4 0 1 0 0 1 0 0 0 100 3 0 0 0 118 54 114 0 0 0 0 304 0 0 0 100 4 0 0 17 211 102 8 0 2 0 0 9 0 0 0 100 5 0 0 3 229 109 22 1 1 0 0 16 0 0 0 100 6 1 0 0 13 1 6 1 1 0 0 318 0 0 0 100 7 0 0 7 59 5 54 0 1 1 0 586 0 0 0 100 March 4, 2026 at 01:46:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 102 123 0 3 1 0 277 0 0 0 99 1 0 0 0 27 1 66 0 8 21 0 1143 0 0 0 100 2 0 0 7 18 1 13 0 3 4 0 9 0 0 0 100 3 0 0 0 121 51 131 0 6 15 1 454 0 0 0 100 4 0 0 13 220 102 15 0 4 10 0 6 0 1 0 99 5 0 0 3 249 116 47 1 8 14 0 24 0 0 0 100 6 0 0 14 25 3 27 0 5 0 0 355 0 0 0 99 7 0 0 7 27 4 27 0 4 4 0 572 0 0 0 100 March 4, 2026 at 01:46:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 108 0 0 0 0 266 0 0 0 100 1 0 0 0 19 2 40 1 0 0 0 1036 0 0 0 100 2 0 0 0 12 2 4 0 0 0 0 0 0 0 0 100 3 0 0 7 118 56 115 0 2 0 0 299 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 2 0 0 0 100 5 0 0 3 216 104 6 0 0 0 0 0 0 0 0 100 6 0 0 0 19 1 15 0 2 0 0 300 0 0 0 100 7 0 0 7 15 4 10 0 0 0 0 560 0 0 0 100 March 4, 2026 at 01:46:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2185 103 233 1 29 186 0 266 0 1 0 99 1 0 0 0 120 2 221 1 28 198 0 1040 0 1 0 99 2 0 0 0 88 1 134 0 24 157 0 0 0 0 0 100 3 0 0 0 266 129 395 1 34 145 0 303 0 0 0 99 4 0 0 3 315 113 177 0 32 188 0 0 0 0 0 100 5 0 0 3 299 105 156 0 30 158 0 0 0 0 0 100 6 0 0 112 96 4 175 1 27 175 0 306 0 0 0 99 7 0 0 7 92 5 138 0 28 147 0 561 0 0 0 99 March 4, 2026 at 01:46:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 103 110 0 0 0 0 267 0 0 0 100 1 0 0 0 17 1 40 1 0 0 0 1033 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 3 0 0 0 100 3 0 0 0 25 9 18 0 0 0 0 304 0 0 0 100 4 0 0 3 308 152 102 0 0 0 0 2 0 0 0 100 5 0 0 3 212 103 4 0 0 0 0 0 0 0 0 100 6 0 0 7 14 1 8 1 0 0 0 300 0 0 0 100 7 0 0 7 19 4 20 0 1 0 0 560 0 0 0 100 March 4, 2026 at 01:46:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2682 102 1122 19 184 19 0 4618 5 2 0 93 1 0 0 0 527 1 997 36 206 46 0 6856 5 2 0 93 2 4 0 0 526 1 886 24 152 19 0 4395 4 1 0 94 3 1 0 0 520 5 931 31 197 24 0 6808 5 2 0 93 4 13 0 255 737 149 922 24 196 20 0 5091 4 2 0 94 5 2 0 3 722 110 839 14 141 15 0 3956 3 1 0 95 6 13 0 0 476 4 873 27 173 31 0 5162 5 1 0 94 7 4 0 7 383 4 639 13 103 11 0 3255 4 1 0 95 March 4, 2026 at 01:46:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 15 2320 103 472 21 68 12 0 1842 2 1 0 97 1 33 0 0 239 7 433 20 77 14 0 3193 2 1 0 97 2 0 0 0 229 3 366 12 66 7 0 1847 2 1 0 98 3 19 0 0 203 3 339 7 63 3 0 2237 2 1 0 98 4 0 0 115 359 104 288 6 65 4 0 1592 1 1 0 98 5 1 0 3 389 112 279 9 38 4 0 1133 1 0 0 98 6 0 0 0 152 4 247 6 59 5 0 1770 2 0 0 98 7 0 0 7 267 51 387 7 36 20 0 2315 1 1 0 98 March 4, 2026 at 01:46:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 110 1 0 1 0 266 0 0 0 100 1 0 0 0 36 8 62 2 1 2 0 1041 0 0 0 100 2 0 0 0 10 2 4 0 1 1 0 0 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 294 0 0 0 100 4 0 0 3 207 102 0 0 0 1 0 0 0 0 0 100 5 0 0 3 213 104 4 0 0 1 0 1 0 0 0 100 6 0 0 0 19 5 10 0 0 1 0 313 0 0 0 100 7 0 0 7 113 54 111 0 1 0 0 559 0 0 0 100 March 4, 2026 at 01:46:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2200 103 298 0 42 270 0 270 0 1 0 99 1 0 0 0 131 10 260 1 36 241 0 1045 0 1 0 99 2 0 0 0 90 2 173 0 36 236 0 0 0 0 0 100 3 0 0 0 181 89 364 0 40 234 0 294 0 0 0 100 4 0 0 3 293 103 184 0 41 239 0 2 0 1 0 99 5 0 0 3 291 102 189 0 35 263 0 0 0 1 0 99 6 0 0 0 107 3 205 1 39 261 0 313 0 0 0 100 7 0 0 7 180 54 250 0 32 184 0 561 0 1 0 99 March 4, 2026 at 01:46:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2103 102 108 1 0 0 0 305 0 0 0 99 1 0 0 0 30 8 52 0 0 0 0 1044 0 0 0 100 2 0 0 0 14 3 12 0 1 0 0 4 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 4 0 0 2 208 102 0 0 0 0 0 0 0 0 0 100 5 1 0 4 211 103 4 0 0 0 0 1 0 0 0 100 6 0 0 0 16 3 12 0 0 0 0 315 0 0 0 100 7 0 0 7 113 54 110 0 0 0 0 559 0 0 0 100 March 4, 2026 at 01:46:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 110 0 0 0 0 266 0 0 0 100 1 0 0 0 15 4 38 1 0 1 0 1357 0 0 0 100 2 0 0 0 18 2 12 0 0 0 0 0 0 0 0 100 3 0 0 0 13 1 14 0 2 0 0 293 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 7 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 309 0 0 0 100 7 0 0 7 123 58 122 0 0 0 0 568 0 0 0 100 March 4, 2026 at 01:46:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 14 2147 102 238 0 10 5 5 382 0 1 0 99 1 832 0 119 32 3 96 1 11 6 11 1196 0 1 0 99 2 143 0 0 64 1 93 0 18 15 15 256 0 0 0 100 3 20 0 2 45 2 43 0 9 8 6 452 0 0 0 100 4 16 0 3 243 102 51 0 10 9 8 63 0 0 0 100 5 641 0 3 244 107 23 2 4 6 3 902 1 0 0 98 6 0 0 0 46 4 33 0 3 1 0 368 0 0 0 100 7 1880 0 7 70 19 56 2 3 4 3 861 0 1 0 99 March 4, 2026 at 01:46:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 102 208 0 0 0 0 266 0 0 0 100 1 0 0 0 10 1 32 1 0 0 0 1120 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 2 0 0 0 100 5 0 0 3 219 107 12 0 0 0 0 6 0 0 0 100 6 0 0 0 11 1 6 1 0 0 0 310 0 0 0 100 7 0 0 7 13 4 10 0 0 0 0 560 0 0 0 100 March 4, 2026 at 01:46:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 103 214 1 0 0 0 269 0 0 0 99 1 0 0 0 9 1 34 1 1 0 0 1116 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 3 0 0 0 12 2 10 0 0 0 0 294 0 0 0 100 4 0 0 3 209 102 2 0 1 0 0 0 0 0 0 100 5 0 0 3 228 108 26 1 1 0 0 10 0 0 0 100 6 0 0 0 12 1 8 0 0 1 0 310 0 0 0 100 7 0 0 7 16 5 14 0 0 2 0 562 0 0 0 100 March 4, 2026 at 01:46:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 103 212 0 1 0 0 266 0 0 0 100 1 0 0 0 11 2 36 1 1 0 0 1118 0 0 0 100 2 0 0 0 20 2 16 0 0 0 0 3 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 4 0 0 3 215 105 10 0 0 1 0 8 0 0 0 100 5 0 0 3 220 106 12 0 0 0 0 319 0 0 0 100 6 0 0 0 16 2 16 0 2 0 0 300 0 0 0 100 7 0 0 7 27 10 24 0 0 1 0 567 0 0 0 100 March 4, 2026 at 01:46:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 212 0 1 0 0 277 0 0 0 100 1 0 0 0 7 1 32 0 0 1 0 1116 0 0 0 100 2 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 1 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 10 0 0 0 0 312 0 0 0 100 7 0 0 7 23 9 20 0 0 0 0 571 0 0 0 100 March 4, 2026 at 01:46:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 214 0 0 0 0 266 0 0 0 100 1 0 0 0 11 1 36 2 0 0 0 1118 0 0 0 100 2 2 0 0 20 3 16 0 0 0 0 6 0 0 0 100 3 22 0 0 16 4 12 1 0 0 0 309 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 2 0 0 0 100 5 0 0 3 217 109 4 0 0 0 0 1 0 0 0 100 6 0 0 0 24 4 24 1 0 0 0 326 0 0 0 100 7 0 0 7 35 10 38 1 1 0 0 589 0 0 0 100 March 4, 2026 at 01:46:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 102 220 1 1 1 0 269 0 0 0 100 1 0 0 0 13 2 32 1 0 1 0 1111 0 0 0 100 2 0 0 0 18 2 10 0 0 1 0 0 0 0 0 100 3 0 0 0 12 3 4 0 0 1 0 294 0 0 0 100 4 0 0 7 208 102 0 0 0 1 0 0 0 0 0 100 5 0 0 7 212 103 6 0 1 0 0 1 0 0 0 100 6 0 0 0 17 4 10 0 0 1 0 314 0 0 0 100 7 0 0 7 28 10 22 0 0 1 0 586 0 0 0 100 March 4, 2026 at 01:46:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 104 216 0 0 0 0 270 0 0 0 99 1 0 0 0 9 1 34 1 0 0 0 1113 0 0 0 100 2 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 3 0 0 0 14 2 14 0 0 0 0 312 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 7 0 0 0 100 5 0 0 3 225 108 22 0 0 0 0 18 0 0 0 100 6 0 0 0 10 1 6 0 0 2 0 300 0 0 0 100 7 0 0 7 21 7 18 0 0 1 0 879 0 0 0 100 March 4, 2026 at 01:46:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 210 0 0 0 0 266 0 0 0 100 1 0 0 0 14 1 44 0 1 0 0 1111 0 0 0 100 2 0 0 0 18 2 14 0 0 0 0 4 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 224 109 18 0 0 0 0 11 0 0 0 100 6 0 0 0 12 1 8 0 0 0 0 310 0 0 0 100 7 0 0 7 13 4 10 0 0 0 0 560 0 0 0 100 March 4, 2026 at 01:46:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 208 0 0 0 0 266 0 0 0 100 1 0 0 0 10 1 34 1 1 0 0 1112 0 0 0 100 2 0 0 0 21 1 20 0 1 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 2 0 0 0 100 5 0 0 3 219 107 12 0 0 0 0 6 0 0 0 100 6 0 0 0 13 2 8 1 0 0 0 311 0 0 0 100 7 0 0 7 13 4 10 0 0 0 0 559 0 0 0 100 March 4, 2026 at 01:46:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 120 0 14 2170 102 357 12 27 2 0 1357 1 1 0 98 1 297 0 0 43 1 77 6 12 3 2 2567 3 1 0 96 2 7 0 0 53 1 133 3 15 2 0 795 2 0 0 98 3 211 0 0 62 2 112 3 25 3 1 1821 1 0 0 98 4 0 0 87 230 102 73 4 14 0 0 731 2 0 0 98 5 58 0 3 271 115 182 9 20 2 0 1397 1 0 0 99 6 420 0 0 62 3 128 6 19 4 1 2116 2 1 0 97 7 21 0 7 61 4 120 7 20 3 0 1749 1 0 0 99 March 4, 2026 at 01:46:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2106 102 212 0 0 4 0 279 0 0 0 99 1 0 0 0 24 5 44 1 1 1 0 1151 0 0 0 100 2 0 0 0 32 4 28 0 1 3 0 27 0 0 0 100 3 0 0 0 27 6 28 0 1 1 0 310 0 0 0 100 4 0 0 17 219 105 12 0 1 0 0 23 0 0 0 100 5 0 0 3 216 103 4 0 1 1 0 13 0 0 0 100 6 0 0 0 12 1 6 0 0 1 0 310 0 0 0 100 7 0 0 7 16 4 12 0 1 0 0 571 0 0 0 100 March 4, 2026 at 01:46:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2158 104 291 0 24 135 0 270 0 1 0 99 1 0 0 0 77 1 177 1 34 149 0 1124 0 1 0 99 2 0 0 0 79 1 153 0 28 181 0 0 0 0 0 100 3 0 0 0 165 84 298 1 38 149 0 308 0 0 0 100 4 0 0 3 284 102 157 0 37 169 0 0 0 0 0 100 5 0 0 3 285 113 132 0 19 111 0 0 0 0 0 100 6 0 0 0 77 2 142 0 25 147 0 301 0 0 0 100 7 0 0 7 63 4 104 0 21 79 0 559 0 0 0 99 March 4, 2026 at 01:46:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 108 0 0 0 0 266 0 0 0 100 1 0 0 0 8 1 32 1 0 0 0 1123 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 3 0 0 0 28 11 22 0 0 0 0 305 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 3 0 0 0 100 5 0 0 3 264 129 60 0 0 0 0 3 0 0 0 100 6 0 0 0 55 23 50 1 1 0 0 301 0 0 0 100 7 0 0 7 13 4 10 0 0 0 0 560 0 0 0 100 March 4, 2026 at 01:46:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 102 108 1 0 0 0 266 0 0 0 99 1 0 0 0 7 1 32 0 0 0 0 1124 0 0 0 100 2 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 3 0 0 0 11 3 4 0 0 0 0 294 0 0 0 100 4 0 0 3 224 109 18 0 2 1 0 9 0 0 0 100 5 0 0 3 214 102 12 0 1 1 0 0 0 0 0 100 6 0 0 0 110 52 105 0 1 0 0 301 0 0 0 100 7 0 0 7 14 4 10 0 0 0 0 560 0 0 0 100 March 4, 2026 at 01:46:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2121 102 125 2 9 9 0 295 0 1 0 99 1 0 0 0 25 1 66 2 9 14 1 1205 0 0 0 100 2 0 0 0 25 2 30 0 8 13 0 2 0 0 0 100 3 0 0 7 19 3 14 0 1 5 0 302 0 0 0 100 4 0 0 3 257 114 44 1 1 3 0 44 0 0 0 100 5 0 0 3 229 109 17 0 3 1 0 17 0 0 0 100 6 0 0 10 51 12 63 0 7 8 0 326 0 1 0 99 7 0 0 7 117 47 117 0 6 7 0 579 0 0 0 100 March 4, 2026 at 01:46:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 111 0 0 1 0 266 0 1 0 99 1 0 0 0 14 2 32 1 0 2 0 1034 0 0 0 100 2 0 0 0 18 2 10 0 0 1 0 0 0 0 0 100 3 0 0 0 14 3 6 0 0 1 0 294 0 0 0 100 4 0 0 10 220 108 14 0 1 1 0 9 0 0 0 100 5 0 0 3 212 103 4 0 0 1 0 1 0 0 0 100 6 0 0 0 11 2 2 0 0 1 0 300 0 0 0 100 7 0 0 7 116 55 113 0 1 0 0 562 0 0 0 100 March 4, 2026 at 01:47:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2111 103 115 0 0 0 0 267 0 1 0 99 1 0 0 0 26 1 34 1 0 2 0 1034 0 0 0 100 2 0 0 0 32 1 12 0 0 3 0 0 0 0 0 100 3 0 0 0 29 3 10 0 1 0 0 297 0 0 0 100 4 0 0 3 247 111 28 0 1 1 0 13 0 0 0 100 5 0 0 3 226 102 4 0 1 0 0 0 0 0 0 100 6 0 0 0 31 2 10 1 0 1 0 301 0 0 0 100 7 0 0 7 138 56 124 0 1 0 0 564 0 0 0 100 March 4, 2026 at 01:47:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2107 102 120 1 1 1 0 265 0 1 0 99 1 0 0 0 10 1 34 0 0 1 0 1034 0 0 0 100 2 0 0 0 20 2 14 0 0 0 0 1 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 223 109 14 1 0 0 0 7 0 0 0 100 5 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 6 0 1 0 0 300 0 0 0 100 7 0 0 7 116 54 112 0 0 1 0 560 0 0 0 100 March 4, 2026 at 01:47:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 14 2819 103 1364 35 246 26 0 6495 6 3 0 91 1 0 0 0 699 4 1271 42 256 61 0 8893 7 3 0 90 2 8 0 0 634 2 1050 29 205 11 0 5777 5 2 0 93 3 14 0 0 742 4 1413 36 265 34 0 8529 6 2 0 91 4 30 0 354 842 107 1227 27 226 38 0 5595 7 2 0 91 5 0 0 2 814 117 1024 22 165 23 0 4450 5 2 0 94 6 2 0 0 713 23 1289 21 212 19 0 6761 5 2 0 93 7 34 0 7 495 14 835 15 126 20 0 4970 4 1 0 95 March 4, 2026 at 01:47:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 103 118 0 0 0 0 277 0 0 0 100 1 0 0 0 28 7 60 1 1 1 0 1050 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 19 1 16 1 0 0 0 304 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 3 218 109 2 0 0 1 0 0 0 0 0 100 6 0 0 0 122 55 123 0 1 0 0 317 0 0 0 100 7 0 0 7 18 4 16 0 0 0 0 559 0 0 0 100 March 4, 2026 at 01:47:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 14 2150 102 167 1 13 12 10 402 0 1 0 99 1 13 0 0 56 6 78 2 7 13 3 1219 0 0 0 99 2 659 0 0 43 1 48 0 11 3 6 937 1 0 0 98 3 18 0 0 137 45 136 0 9 4 5 398 0 0 0 100 4 798 0 116 228 103 49 1 9 5 11 112 0 0 0 99 5 123 0 3 247 102 56 0 10 2 9 140 0 0 0 100 6 21 0 3 54 10 53 1 8 2 5 398 0 0 0 100 7 1897 0 7 44 4 43 2 8 9 3 904 0 1 0 99 March 4, 2026 at 01:47:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2181 103 237 1 20 237 0 277 0 1 0 99 1 0 0 0 108 8 232 0 37 269 0 1128 0 1 0 99 2 0 0 0 87 1 176 0 37 229 0 3 0 0 0 99 3 0 0 0 276 133 293 0 39 262 0 294 0 1 0 99 4 0 0 3 289 102 177 0 41 218 0 0 0 0 0 100 5 0 0 3 282 102 152 0 29 202 0 0 0 0 0 100 6 0 0 0 184 2 345 0 36 215 0 300 0 0 0 100 7 0 0 7 79 4 155 1 24 253 0 560 0 0 0 100 March 4, 2026 at 01:47:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 105 112 0 3 0 0 282 0 0 0 99 1 0 0 0 17 5 42 1 0 0 0 1444 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 124 51 126 0 2 0 0 302 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 2 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 22 1 12 0 0 0 0 300 0 0 0 100 7 0 0 7 15 5 12 0 0 0 0 559 0 0 0 100 March 4, 2026 at 01:47:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2116 107 282 1 1 0 0 602 0 1 0 99 1 0 0 0 10 1 36 1 1 0 0 1129 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 117 51 110 0 0 0 0 294 0 0 0 100 4 0 0 3 217 104 16 0 1 0 0 4 0 0 0 100 5 0 0 3 215 105 8 0 0 0 0 4 0 0 0 100 6 0 0 0 17 4 16 0 1 0 0 307 0 0 0 100 7 0 0 7 16 5 14 0 0 0 0 562 0 0 0 100 March 4, 2026 at 01:47:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 70 0 14 2203 105 378 5 28 3 0 1697 1 1 0 98 1 96 0 0 86 2 257 9 33 6 0 2666 1 1 0 98 2 91 0 0 93 4 217 6 27 11 0 2147 2 1 0 97 3 85 0 0 180 52 240 3 21 4 0 1637 2 0 0 98 4 359 0 87 262 106 238 5 22 4 0 1716 2 1 0 97 5 41 0 17 277 107 178 9 20 8 0 1193 3 0 0 97 6 100 0 0 73 3 219 2 29 7 2 1933 2 0 0 98 7 125 0 7 74 5 257 4 25 3 2 2044 1 0 0 99 March 4, 2026 at 01:47:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 102 114 1 0 1 0 266 0 0 0 100 1 0 0 0 12 2 32 1 0 3 0 1123 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 3 0 0 0 107 51 103 0 1 0 0 294 0 0 0 100 4 0 0 3 225 110 16 0 1 1 0 7 0 0 0 100 5 0 0 3 218 103 14 0 1 1 0 1 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 300 0 0 0 100 7 0 0 7 19 7 14 0 0 1 0 581 0 0 0 100 March 4, 2026 at 01:47:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 22 2176 103 256 0 18 124 0 266 0 1 0 99 1 0 0 14 82 1 179 2 30 170 0 1053 0 1 0 99 2 0 0 0 88 6 149 2 31 140 0 19 0 0 0 99 3 12 0 0 200 99 187 0 30 164 0 323 0 0 0 99 4 0 0 3 367 140 246 0 33 158 0 34 0 0 0 99 5 0 0 3 288 102 157 0 23 192 0 89 0 0 0 100 6 1 0 7 171 2 323 1 41 156 0 384 0 0 0 100 7 0 0 7 97 5 170 1 24 158 0 567 0 0 0 100 March 4, 2026 at 01:47:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 116 0 0 0 0 266 0 0 0 100 1 0 0 0 12 1 37 0 2 0 0 1032 0 0 0 100 2 0 0 0 23 6 14 1 1 0 0 5 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 295 0 0 0 100 4 0 0 3 308 151 100 0 0 0 0 0 0 0 0 100 5 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 6 0 0 0 0 300 0 0 0 100 7 0 0 14 16 5 14 0 1 0 0 559 0 0 0 100 March 4, 2026 at 01:47:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2121 102 116 0 1 0 0 266 0 1 0 99 1 0 0 112 10 1 35 1 0 1 0 1033 0 0 0 100 2 0 0 0 36 7 14 0 0 0 0 10 0 0 0 100 3 0 0 0 27 3 6 0 0 0 0 299 0 0 0 100 4 0 0 3 323 152 102 0 0 0 0 2 0 0 0 100 5 0 0 3 225 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 30 2 8 1 1 1 0 301 0 0 0 100 7 0 0 7 38 5 24 0 1 1 0 561 0 0 0 100 March 4, 2026 at 01:47:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2117 103 132 1 1 0 0 267 0 0 0 100 1 0 0 7 12 1 38 1 0 0 0 1038 0 0 0 100 2 0 0 0 31 11 28 0 0 0 0 16 0 0 0 100 3 0 0 0 12 1 8 0 0 0 0 304 0 0 0 100 4 0 0 3 306 151 100 0 0 0 0 0 0 0 0 100 5 0 0 3 217 108 4 0 0 2 0 3 0 0 0 100 6 0 0 0 19 3 18 0 1 0 0 315 0 0 0 100 7 0 0 7 22 5 20 0 0 0 0 560 0 0 0 100 March 4, 2026 at 01:47:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 14 2833 102 1393 34 244 23 0 6571 6 3 0 91 1 16 0 0 709 2 1273 34 278 29 0 8301 7 2 0 91 2 6 0 0 735 6 1266 28 203 36 0 5874 6 2 0 92 3 50 0 0 635 10 1124 37 261 33 0 7260 6 2 0 92 4 2 0 353 832 121 1182 32 225 31 0 5859 5 2 0 93 5 4 0 3 800 102 1055 22 165 18 0 4682 5 2 0 93 6 20 0 0 556 4 1000 30 223 47 0 6804 5 2 0 93 7 18 0 7 597 5 1098 11 133 28 0 4951 5 2 0 94 March 4, 2026 at 01:47:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2196 103 382 0 30 229 0 267 0 1 0 99 1 0 0 0 197 1 406 1 42 228 0 1034 0 1 0 99 2 0 0 0 92 1 181 0 30 247 0 0 0 0 0 100 3 0 0 0 202 101 210 0 42 266 0 299 0 1 0 99 4 0 0 3 293 102 197 0 40 207 0 0 0 0 0 100 5 0 0 3 283 102 171 0 32 226 0 10 0 0 0 100 6 0 0 0 93 1 185 0 40 214 0 300 0 0 0 100 7 0 0 7 99 6 189 0 28 236 0 561 0 1 0 99 March 4, 2026 at 01:47:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 14 2142 102 184 0 10 10 7 351 0 1 0 99 1 651 0 0 61 1 91 3 8 4 8 2066 1 1 0 98 2 22 0 0 108 33 112 0 8 4 3 108 0 0 0 100 3 23 0 0 52 6 57 0 11 3 4 443 0 0 0 100 4 810 0 117 229 103 56 0 5 8 9 185 0 0 0 99 5 97 0 3 257 107 61 0 7 9 9 147 0 0 0 100 6 1928 0 3 54 2 66 3 12 10 8 662 0 1 0 99 7 9 0 7 42 5 41 0 9 8 1 595 0 0 0 100 March 4, 2026 at 01:47:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 112 1 1 0 0 277 0 0 0 100 1 0 0 0 16 1 40 1 0 0 0 1117 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 19 7 14 0 0 0 0 300 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 1 0 0 0 100 5 0 0 3 208 101 2 0 0 0 0 10 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 301 0 0 0 100 7 2 0 7 17 6 14 0 0 0 0 565 0 0 0 100 March 4, 2026 at 01:47:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 112 0 1 0 0 269 0 0 0 100 1 0 0 0 18 1 42 2 1 2 0 1121 0 0 0 100 2 0 0 0 114 52 110 0 1 0 0 1 0 0 0 100 3 0 0 0 33 9 34 0 1 0 0 630 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 2 0 0 0 100 5 0 0 3 226 111 14 0 0 0 0 9 0 0 0 100 6 0 0 0 20 3 22 0 0 1 0 321 0 0 0 100 7 0 0 7 20 5 18 0 1 0 0 560 0 0 0 100 March 4, 2026 at 01:47:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 102 108 0 0 1 0 266 0 0 0 99 1 0 0 0 14 3 34 1 0 2 0 1116 0 0 0 100 2 0 0 0 107 51 103 0 1 0 0 0 0 0 0 100 3 0 0 0 13 3 6 0 0 1 0 294 0 0 0 100 4 0 0 3 212 102 10 0 1 1 0 0 0 0 0 100 5 0 0 3 219 107 10 0 0 1 0 6 0 0 0 100 6 0 0 0 11 2 4 0 1 1 0 310 0 0 0 100 7 0 0 7 23 5 18 0 0 1 0 560 0 0 0 100 March 4, 2026 at 01:47:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 14 2212 102 326 3 38 135 0 1379 2 1 0 97 1 73 0 0 181 2 508 2 58 100 0 2433 1 1 0 98 2 0 0 0 219 51 379 1 47 133 0 1462 1 0 0 99 3 0 0 0 187 70 263 3 47 150 1 1301 2 1 0 97 4 301 0 87 319 103 364 1 61 162 2 1640 1 1 0 98 5 256 0 3 307 107 197 10 41 121 0 2097 3 1 0 96 6 346 0 0 175 1 414 5 64 129 0 2181 2 1 0 97 7 5 0 7 146 8 331 5 53 144 0 1718 1 1 0 98 March 4, 2026 at 01:47:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 108 1 0 0 0 266 0 0 0 100 1 0 0 0 12 2 36 1 0 2 0 1121 0 0 0 100 2 0 0 0 111 52 106 0 0 0 0 1 0 0 0 100 3 0 0 0 29 11 22 0 0 0 0 306 0 0 0 100 4 0 0 3 210 102 4 0 1 0 0 0 0 0 0 100 5 0 0 3 215 101 12 0 1 0 0 0 0 0 0 100 6 0 0 0 14 2 8 1 0 0 0 301 0 0 0 100 7 0 0 7 21 4 16 0 0 0 0 559 0 0 0 100 March 4, 2026 at 01:47:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2118 102 126 0 4 1 0 307 0 0 0 99 1 0 0 0 29 6 63 1 9 11 0 1052 0 0 0 99 2 0 0 0 117 51 125 0 8 10 1 74 0 0 0 100 3 0 0 0 32 7 25 1 2 3 0 321 0 0 0 100 4 0 0 3 218 104 9 0 2 2 0 6 0 0 0 100 5 0 0 3 220 101 15 0 3 6 0 28 0 0 0 100 6 0 0 14 27 2 28 0 3 6 0 315 0 0 0 100 7 0 0 15 29 3 35 0 6 12 1 635 0 1 0 99 March 4, 2026 at 01:47:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 103 114 0 0 0 0 267 0 0 0 100 1 0 0 7 40 13 64 1 1 0 0 1058 0 0 0 99 2 0 0 0 112 51 106 0 1 0 0 3 0 0 0 100 3 0 0 0 13 2 10 0 0 0 0 304 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 3 213 106 0 0 0 0 0 0 0 0 0 100 6 0 0 0 20 3 17 0 2 0 0 313 0 0 0 100 7 0 0 7 23 3 22 0 1 0 0 560 0 0 0 100 March 4, 2026 at 01:47:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2127 105 114 0 0 0 0 269 0 0 0 100 1 0 0 0 40 7 46 1 1 1 0 1042 0 0 0 100 2 0 0 0 124 51 104 0 1 0 0 0 0 0 0 100 3 0 0 0 25 2 4 0 0 0 0 294 0 0 0 100 4 0 0 3 227 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 225 102 0 0 0 0 0 0 0 0 0 100 6 0 0 112 13 1 9 0 0 0 0 300 0 0 0 100 7 0 0 7 42 3 26 0 1 0 0 559 0 0 0 100 March 4, 2026 at 01:47:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2178 105 207 2 19 87 0 269 0 1 0 99 1 0 0 0 172 10 314 2 28 97 0 1044 0 1 0 99 2 0 0 0 158 52 193 1 14 87 0 1 0 0 0 100 3 0 0 0 133 74 108 0 18 101 0 294 0 0 0 100 4 0 0 3 278 103 142 0 21 102 0 0 0 0 0 100 5 0 0 3 249 101 81 0 17 91 0 0 0 0 0 100 6 0 0 7 80 2 140 1 19 88 0 301 0 0 0 100 7 0 0 7 65 3 104 0 14 62 0 561 0 0 0 100 March 4, 2026 at 01:47:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 14 2861 106 1370 45 240 39 0 5862 7 3 0 90 1 35 0 7 831 9 1439 34 263 49 0 8109 7 3 0 91 2 4 0 0 814 38 1392 40 213 32 0 5924 6 2 0 92 3 13 0 0 633 5 1174 35 230 21 0 8182 5 2 0 93 4 8 0 353 772 106 1082 24 225 22 0 6049 6 2 0 92 5 6 0 3 792 116 972 20 138 51 0 4830 5 2 0 93 6 65 0 0 608 3 1105 27 205 15 0 6268 4 2 0 94 7 19 0 0 550 5 960 27 141 23 0 4567 5 1 0 94 March 4, 2026 at 01:47:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 16 0 2 0 0 276 0 0 0 100 1 0 0 7 126 4 154 1 1 0 0 1294 0 0 0 100 2 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 3 0 0 0 21 8 16 0 0 0 0 298 0 0 0 100 4 0 0 3 213 105 4 0 0 0 0 1 0 0 0 100 5 0 0 3 305 150 100 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 4 0 0 0 0 301 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 14 2138 102 77 1 6 4 0 292 0 1 0 99 1 54 0 7 108 3 138 1 9 3 6 1503 0 0 0 99 2 13 0 3 50 4 53 2 8 4 5 65 0 0 0 100 3 1888 0 0 105 29 109 2 12 4 5 708 0 1 0 99 4 1511 0 116 239 108 74 2 9 9 18 995 2 1 0 97 5 83 0 3 311 136 127 0 15 12 11 183 0 0 0 100 6 13 0 0 54 3 65 0 10 6 6 424 0 0 0 100 7 5 0 0 44 2 45 0 7 3 2 400 0 0 0 100 March 4, 2026 at 01:47:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 108 1 0 1 0 266 0 0 0 100 1 0 0 7 22 4 44 1 0 2 0 1376 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 0 70 32 64 0 0 1 0 294 0 0 0 100 4 0 0 7 265 130 56 0 1 1 0 6 0 0 0 100 5 0 0 7 211 102 6 0 1 0 0 11 0 0 0 100 6 0 0 0 12 2 2 1 0 1 0 300 0 0 0 100 7 0 0 0 13 3 6 0 0 1 0 321 0 0 0 100 March 4, 2026 at 01:47:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2187 102 256 1 38 215 0 266 0 1 0 99 1 0 0 7 102 3 222 1 41 229 0 1380 0 1 0 99 2 0 0 0 85 0 167 0 29 269 0 0 0 0 0 100 3 0 0 0 169 81 186 0 34 236 0 294 0 1 0 99 4 0 0 3 494 159 464 0 43 216 0 326 0 0 0 99 5 0 0 3 286 101 171 0 31 240 0 11 0 0 0 100 6 0 0 0 94 2 185 0 42 246 0 300 0 0 0 99 7 0 0 0 80 1 165 0 33 221 0 300 0 0 0 99 March 4, 2026 at 01:47:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 110 0 0 0 0 266 0 0 0 100 1 0 0 7 20 3 48 0 1 0 0 1377 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 15 4 10 0 0 0 0 294 0 0 0 100 4 0 0 3 312 152 112 0 1 0 0 0 0 0 0 100 5 0 0 3 218 106 10 1 0 0 0 6 0 0 0 100 6 0 0 0 12 1 6 0 1 0 0 310 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 83 0 14 2164 104 284 7 31 2 0 1814 1 1 0 98 1 415 0 7 64 3 199 15 24 7 3 2660 1 1 0 98 2 338 0 0 55 1 118 7 26 2 0 1593 1 0 0 99 3 11 0 0 62 4 160 7 27 5 0 1576 1 0 0 98 4 0 0 73 331 133 287 4 28 1 0 1317 1 0 0 99 5 0 0 3 275 106 216 7 23 5 0 1274 1 0 0 99 6 296 0 0 60 2 104 9 19 3 1 2651 4 1 0 96 7 5 0 0 42 4 44 5 12 4 0 969 3 0 0 97 March 4, 2026 at 01:47:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 106 225 1 1 2 0 296 0 0 0 99 1 0 0 7 44 10 74 1 0 0 0 1407 0 0 0 99 2 13 0 0 13 2 6 0 0 0 0 9 0 0 0 100 3 0 0 0 21 4 20 0 2 2 0 314 0 0 0 100 4 0 0 17 215 103 10 1 1 1 0 12 0 0 0 100 5 0 0 3 222 106 12 0 2 1 0 1 0 0 0 100 6 1 0 0 25 4 24 1 3 0 0 320 0 0 0 100 7 0 0 0 16 2 12 0 2 0 0 333 0 0 0 100 March 4, 2026 at 01:47:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4288 0 36 2266 102 431 22 37 93 13 1275 6 2 0 92 1 1999 0 8 203 9 337 31 44 139 9 2653 4 2 0 94 2 348 0 13 228 10 410 69 39 80 6 1374 4 1 0 94 3 4315 0 23 178 5 358 51 48 153 20 1745 5 2 0 92 4 2157 0 101 333 104 275 62 36 106 13 1275 4 1 0 95 5 1616 0 3 321 106 164 17 35 107 9 1474 5 1 0 94 6 1727 0 9 99 1 152 3 29 109 13 1447 3 1 0 96 7 1538 0 12 133 1 238 37 32 111 11 956 4 1 0 95 March 4, 2026 at 01:47:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 57 0 14 2251 106 250 3 33 116 0 966 3 1 0 95 1 105 0 7 197 8 292 2 41 116 0 2144 3 1 0 96 2 4 0 0 196 4 299 9 37 144 0 705 2 1 0 98 3 1 0 7 217 78 224 10 38 147 0 683 10 1 0 89 4 0 0 128 500 147 499 5 48 157 0 764 3 1 0 96 5 18 0 4 333 103 206 3 40 149 0 399 6 1 0 93 6 7 0 0 139 2 225 4 44 148 0 646 4 1 0 95 7 0 0 0 145 2 230 2 31 131 0 1045 4 1 0 96 March 4, 2026 at 01:47:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 16 2122 108 56 0 3 0 0 275 0 1 0 99 1 3 0 7 59 4 84 1 1 0 0 1684 0 0 0 100 2 0 0 0 41 0 32 0 0 0 0 0 0 0 0 100 3 0 0 0 16 4 10 0 1 0 0 294 0 0 0 100 4 0 0 10 312 154 110 0 3 0 0 3 0 0 0 100 5 0 0 3 208 101 2 0 1 0 0 0 0 0 0 100 6 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 4 0 0 0 0 299 0 0 0 100 March 4, 2026 at 01:47:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 108 42 1 2 0 0 275 0 1 0 99 1 0 0 7 130 5 158 2 1 0 0 1680 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 14 4 8 0 1 0 0 294 0 0 0 100 4 0 0 10 295 145 88 0 1 0 0 1 0 0 0 100 5 0 0 3 210 103 0 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2123 110 98 0 2 0 0 276 0 1 0 99 1 0 0 7 158 23 184 0 1 1 0 1686 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 18 4 14 0 1 0 0 303 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 212 106 0 0 0 0 0 0 0 0 0 100 6 0 0 0 11 0 10 0 0 1 0 10 0 0 0 100 7 0 0 0 12 2 8 0 1 1 0 301 0 0 0 100 March 4, 2026 at 01:47:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 108 0 24 2181 109 181 4 28 33 14 496 0 2 0 98 1 52 0 25 194 37 278 4 29 29 15 1580 0 1 0 99 2 534 0 31 92 19 127 7 25 34 4 247 1 1 0 97 3 1092 0 14 76 4 108 3 18 2426 2 570 0 1 0 98 4 88 0 20 267 103 109 1 28 95 16 230 0 1 0 99 5 23 0 21 236 102 54 0 13 2514 7 65 0 1 0 99 6 19 0 2 42 1 44 1 11 346 9 62 0 1 0 99 7 3 0 3 47 2 72 1 17 21 5 373 0 0 0 100 March 4, 2026 at 01:47:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2132 106 52 1 4 1 2 276 0 1 0 99 1 35 0 56 124 4 160 1 6 9 5 1357 0 1 0 98 2 135 0 0 111 44 105 0 5 6 1 27 0 0 0 100 3 294 0 1 34 3 34 1 7 15 4 389 0 0 0 100 4 2 0 3 233 104 29 2 1 11 2 14 0 0 0 100 5 2 0 10 225 101 19 0 5 3 1 11 0 0 0 100 6 6 0 0 24 1 27 0 4 6 1 27 0 0 0 100 7 5 0 0 23 1 12 0 2 6 2 306 0 0 0 100 March 4, 2026 at 01:47:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2162 103 133 1 3 0 0 310 0 1 0 99 1 0 0 49 96 4 68 1 1 2 0 1310 0 1 0 99 2 0 0 0 64 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 73 3 12 0 0 0 0 294 0 0 0 100 4 0 0 346 221 103 8 0 1 2 0 0 0 0 0 100 5 0 0 3 265 101 2 0 0 0 0 0 0 0 0 100 6 0 0 7 67 1 6 0 2 0 0 1 0 0 0 100 7 0 0 0 117 1 54 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 103 212 0 1 0 0 266 0 0 0 100 1 0 0 7 13 4 38 1 0 1 0 1311 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 15 3 10 0 1 0 0 294 0 0 0 100 4 0 0 3 223 104 20 0 2 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 1 0 0 299 0 0 0 100 March 4, 2026 at 01:47:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 102 218 1 0 0 0 266 0 0 0 100 1 0 0 7 16 4 44 1 1 0 0 1314 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 15 3 12 0 0 0 0 301 0 0 0 100 4 0 0 3 213 104 4 0 0 0 0 0 0 0 0 100 5 0 0 3 219 106 10 0 1 0 0 0 0 0 0 100 6 0 0 0 16 2 14 0 0 0 0 16 0 0 0 100 7 0 0 0 10 1 8 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 132 0 0 0 0 266 0 0 0 100 1 1 0 7 26 5 52 0 0 4 0 1366 0 0 0 100 2 2 0 0 15 0 18 0 1 23 0 74 0 0 0 100 3 847 0 0 37 11 36 0 4 59 0 1011 0 1 0 99 4 501 0 4 218 104 24 0 3 20 0 146 0 0 0 100 5 322 0 4 218 108 4 0 2 9 0 100 0 0 0 100 6 0 0 0 107 47 104 0 1 0 0 22 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2128 102 153 0 9 61 0 266 0 1 0 99 1 0 0 7 51 5 108 2 10 63 0 1301 0 0 0 99 2 0 0 0 43 2 66 0 11 76 0 1 0 0 0 100 3 0 0 0 116 56 108 0 12 56 0 294 0 0 0 100 4 0 0 3 303 103 195 0 14 86 0 0 0 0 0 100 5 0 0 3 257 101 98 0 14 75 0 0 0 0 0 100 6 0 0 0 199 71 243 0 17 62 0 20 0 0 0 100 7 0 0 0 37 1 64 0 7 76 0 300 0 0 0 100 March 4, 2026 at 01:47:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 104 122 0 1 1 0 266 0 0 0 100 1 0 0 7 17 6 42 1 0 1 0 1302 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 3 0 0 0 15 4 10 0 1 0 0 294 0 0 0 100 4 0 0 3 214 105 8 0 1 1 0 2 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 68 30 60 0 0 0 0 20 0 0 0 100 7 0 0 0 97 43 98 0 2 0 0 300 0 0 0 100 March 4, 2026 at 01:47:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 120 1 1 0 0 277 0 0 0 100 1 0 0 7 14 5 40 0 0 0 0 1302 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 13 3 8 0 0 0 0 294 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 1 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 49 21 44 0 1 0 0 21 0 0 0 100 7 0 0 0 109 52 104 0 0 0 0 305 0 0 0 100 March 4, 2026 at 01:47:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 102 194 0 2 0 0 266 0 0 0 100 1 0 0 7 15 5 40 1 0 1 0 1303 0 0 0 100 2 0 0 0 14 3 12 0 0 0 0 8 0 0 0 100 3 0 0 0 23 5 26 0 2 0 0 311 0 0 0 100 4 0 0 3 213 104 8 0 0 0 0 10 0 0 0 100 5 0 0 3 217 109 0 0 0 0 0 0 0 0 0 100 6 0 0 0 45 19 38 0 1 0 0 18 0 0 0 100 7 0 0 0 49 20 44 0 1 1 0 300 0 0 0 100 March 4, 2026 at 01:47:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 185 0 4 1 0 266 0 0 0 100 1 0 0 7 18 6 40 2 0 2 0 1302 0 0 0 100 2 0 0 0 15 1 8 0 1 0 0 4 0 0 0 100 3 0 0 0 59 25 52 0 0 1 0 321 0 0 0 100 4 0 0 3 210 103 4 0 0 1 0 2 0 0 0 100 5 0 0 3 259 127 48 0 2 1 0 1 0 0 0 100 6 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 11 3 4 0 0 1 0 321 0 0 0 100 March 4, 2026 at 01:47:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 215 0 0 0 0 266 0 0 0 100 1 0 0 7 15 5 40 0 0 0 0 1301 0 0 0 100 2 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 54 23 52 0 0 0 0 332 0 0 0 100 4 0 0 3 214 104 10 0 0 2 0 2 0 0 0 100 5 0 0 3 212 102 8 0 0 0 0 9 0 0 0 100 6 0 0 0 10 1 4 0 0 1 0 0 0 0 0 100 7 0 0 0 8 1 4 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:47:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 154 1 0 0 0 266 0 0 0 100 1 0 0 7 80 36 106 1 1 0 0 1302 0 0 0 100 2 0 0 0 12 1 12 0 1 0 0 1 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 116 0 0 0 0 266 0 0 0 100 1 0 0 7 117 55 142 1 0 0 0 1303 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 56 23 56 0 1 0 0 314 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 120 0 0 0 0 266 0 0 0 100 1 0 0 7 85 40 108 1 0 0 0 1302 0 0 0 100 2 0 0 0 46 16 46 0 1 0 0 10 0 0 0 100 3 0 0 0 59 26 54 0 0 0 0 323 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 5 0 0 0 100 5 0 0 3 213 107 0 0 0 1 0 0 0 0 0 100 6 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 11 1 8 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 116 0 0 0 0 266 0 1 0 99 1 0 0 7 15 5 40 1 0 1 0 1301 0 0 0 100 2 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 55 23 48 0 0 0 0 314 0 0 0 100 4 0 0 3 216 104 14 0 1 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 299 0 0 0 100 March 4, 2026 at 01:47:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 76 1 1 0 0 266 0 1 0 99 1 0 0 7 53 5 80 0 2 0 0 1302 0 0 0 100 2 0 0 0 106 50 102 0 1 0 0 0 0 0 0 100 3 0 0 0 52 23 48 0 0 4 0 314 0 0 0 100 4 0 0 3 214 103 10 0 1 4 0 0 0 0 0 100 5 0 0 3 213 101 12 0 1 2 0 0 0 0 0 100 6 0 0 0 10 1 6 0 0 1 0 0 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 30 0 2 0 0 266 0 1 0 99 1 0 0 7 92 4 114 1 1 1 0 1303 0 0 0 100 2 0 0 0 123 51 116 0 1 0 0 0 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 102 72 0 1 0 0 266 0 1 0 99 1 0 0 7 57 4 86 0 2 0 0 1301 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 1 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 1 0 0 0 100 5 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 14 1 12 0 1 0 0 1 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 14 0 0 0 0 266 0 1 0 99 1 0 0 7 123 4 148 2 1 0 0 1304 0 0 0 100 2 0 0 0 115 54 112 0 0 0 0 7 0 0 0 100 3 0 0 0 54 24 50 0 0 0 0 316 0 0 0 100 4 0 0 3 213 104 8 0 0 0 0 10 0 0 0 100 5 0 0 3 215 109 0 0 0 0 0 0 0 0 0 100 6 0 0 0 13 0 12 0 1 0 0 10 0 0 0 100 7 0 0 0 16 1 18 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 10 1 0 1 0 266 0 1 0 99 1 0 0 7 124 5 146 1 0 1 0 1301 0 0 0 100 2 0 0 0 110 51 102 0 0 1 0 0 0 0 0 100 3 0 0 0 54 24 46 0 0 1 0 314 0 0 0 100 4 0 0 7 210 103 2 0 0 1 0 0 0 0 0 100 5 0 0 7 210 102 4 0 1 0 0 1 0 0 0 100 6 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 10 2 2 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:48:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 102 20 0 1 0 0 266 0 1 0 99 1 0 0 7 122 4 148 0 0 0 0 1302 0 0 0 100 2 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 213 104 8 0 0 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 34 0 1 0 0 266 0 0 0 100 1 0 0 7 124 4 148 1 0 2 0 1302 0 0 0 100 2 0 0 0 97 46 92 0 1 0 0 1 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 11 1 6 0 1 0 0 1 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 112 0 1 0 0 266 0 0 0 100 1 0 0 7 122 4 146 2 0 0 0 1302 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:48:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 96 1 1 0 0 266 0 0 0 100 1 0 0 7 141 35 168 0 2 0 0 1307 0 0 0 100 2 0 0 0 15 1 16 0 2 0 0 0 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 5 0 0 0 100 5 0 0 3 212 106 0 0 0 1 0 0 0 0 0 100 6 0 0 0 14 2 12 0 1 0 0 12 0 0 0 100 7 0 0 0 10 1 8 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 110 0 0 0 0 266 0 0 0 100 1 0 0 7 121 54 146 1 0 0 0 1302 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 56 23 56 0 1 0 0 314 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 102 110 0 0 0 0 265 0 0 0 99 1 0 0 7 123 54 148 1 0 0 0 1303 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 112 0 1 0 0 266 0 0 0 100 1 0 0 7 121 54 144 1 0 0 0 1302 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 53 23 48 0 1 0 0 314 0 0 0 100 4 0 0 3 217 104 16 0 1 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 116 1 0 0 0 266 0 0 0 100 1 0 0 7 87 41 110 1 0 1 0 1302 0 0 0 100 2 0 0 0 36 14 32 0 1 0 0 0 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 216 105 10 0 0 1 0 4 0 0 0 100 5 0 0 3 217 103 16 0 1 0 0 4 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:48:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 118 0 0 0 0 266 0 0 0 100 1 0 0 7 14 4 42 0 0 0 0 1306 0 0 0 100 2 0 0 0 112 52 109 0 0 0 0 1 0 0 0 100 3 0 0 0 53 24 48 0 0 0 0 315 0 0 0 100 4 0 0 3 213 104 8 0 0 0 0 7 0 0 0 100 5 0 0 3 215 107 0 0 0 0 0 0 0 0 0 100 6 0 0 0 15 2 14 0 0 0 0 15 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 116 0 0 1 0 266 0 0 0 100 1 0 0 7 17 5 38 1 0 1 0 1302 0 0 0 100 2 0 0 0 107 51 103 0 1 0 0 0 0 0 0 100 3 0 0 0 53 24 46 0 0 1 0 314 0 0 0 100 4 0 0 3 209 103 2 0 0 1 0 0 0 0 0 100 5 0 0 3 211 102 4 0 1 1 0 1 0 0 0 100 6 0 0 0 19 4 14 0 1 1 0 2 0 0 0 100 7 0 0 0 11 3 4 0 0 1 0 321 0 0 0 100 March 4, 2026 at 01:48:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 116 0 0 0 0 266 0 0 0 100 1 0 0 7 14 4 38 2 0 0 0 1303 0 0 0 100 2 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 213 104 8 0 0 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 14 2 10 0 0 0 0 1 0 0 0 100 7 0 0 0 12 1 12 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:48:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 115 1 0 0 0 266 0 0 0 100 1 0 0 7 15 4 40 1 0 0 0 1301 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 1 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:48:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 102 127 0 1 0 0 266 0 0 0 100 1 0 0 7 16 4 40 1 1 0 0 1302 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:48:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 122 0 0 0 0 266 0 0 0 99 1 0 0 7 22 4 54 2 1 2 0 1314 0 0 0 100 2 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 212 103 6 1 0 0 0 8 0 0 0 100 5 0 0 3 213 107 0 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 10 0 1 0 0 7 0 0 0 100 7 0 0 0 11 1 8 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 116 0 0 0 0 266 0 0 0 100 1 0 0 7 13 4 38 1 0 0 0 1303 0 0 0 100 2 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 76 1 1 0 0 266 0 1 0 99 1 0 0 7 55 4 82 1 2 0 0 1302 0 0 0 100 2 0 0 0 112 51 112 0 1 0 0 0 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 314 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 10 0 2 0 0 266 0 1 0 99 1 0 0 7 122 4 145 1 1 0 0 1302 0 0 0 100 2 0 0 0 96 45 90 0 0 0 0 0 0 0 0 100 3 0 0 0 64 29 60 0 1 0 0 314 0 0 0 100 4 0 0 3 216 104 14 0 1 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 108 0 1 0 0 266 0 0 0 100 1 0 0 7 20 4 46 0 2 0 0 1301 0 0 0 99 2 0 0 0 12 1 8 0 1 0 0 0 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 314 0 0 0 100 4 0 0 3 254 125 48 0 1 0 0 1 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 102 108 0 0 0 0 266 0 0 0 100 1 0 0 7 30 7 60 2 1 0 0 1318 0 0 0 99 2 0 0 0 15 2 10 0 0 0 0 1 0 0 0 100 3 0 0 0 54 24 48 0 0 0 0 315 0 0 0 100 4 0 0 3 253 123 50 0 1 0 0 9 0 0 0 100 5 0 0 3 278 138 64 0 1 0 0 0 0 0 0 100 6 0 0 0 14 0 16 0 1 0 0 5 0 0 0 100 7 0 0 0 13 2 8 1 0 0 0 323 0 0 0 100 March 4, 2026 at 01:48:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 106 1 0 1 0 266 0 0 0 100 1 0 0 7 25 5 51 0 3 1 0 1302 0 0 0 99 2 0 0 0 11 1 0 0 0 1 0 0 0 0 0 100 3 0 0 0 54 24 44 0 0 1 0 314 0 0 0 100 4 0 0 7 212 104 4 0 0 1 0 0 0 0 0 100 5 0 0 7 226 110 20 0 1 0 0 1 0 0 0 100 6 0 0 0 13 1 2 0 0 1 0 0 0 0 0 100 7 0 0 0 97 43 96 0 2 1 0 300 0 0 0 100 March 4, 2026 at 01:48:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 106 0 0 0 0 266 0 0 0 99 1 0 0 7 25 5 50 1 0 0 0 1302 0 0 0 99 2 0 0 0 8 0 4 0 2 0 0 0 0 0 0 100 3 0 0 0 51 22 48 0 0 0 0 332 0 0 0 100 4 0 0 3 215 105 10 0 0 0 0 2 0 0 0 100 5 0 0 3 211 102 6 0 0 0 0 9 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 170 0 1 0 0 266 0 0 0 100 1 0 0 7 26 5 54 1 2 0 0 1303 0 0 0 100 2 0 0 0 18 1 12 0 1 0 0 1 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 314 0 0 0 100 4 0 0 3 211 104 6 0 1 0 0 0 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 46 20 40 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 206 0 0 0 0 266 0 0 0 100 1 0 0 7 20 6 46 1 0 1 0 1302 0 0 0 100 2 0 0 0 16 0 16 0 2 0 0 0 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 314 0 0 0 100 4 0 0 3 216 105 8 0 1 0 0 2 0 0 0 100 5 0 0 3 208 101 2 0 1 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 208 1 0 0 0 266 0 0 0 100 1 0 0 7 25 7 56 1 0 0 0 1318 0 0 0 100 2 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 314 0 0 0 100 4 0 0 3 219 103 14 0 1 0 0 7 0 0 0 100 5 0 0 3 217 108 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 5 0 0 0 100 7 0 0 0 10 1 8 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:48:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 206 0 0 0 0 266 0 0 0 100 1 0 0 7 15 5 42 0 0 1 0 1302 0 0 0 100 2 0 0 0 11 0 6 0 1 0 0 0 0 0 0 100 3 0 0 0 54 22 54 0 1 0 0 314 0 0 0 100 4 0 0 3 220 104 12 0 0 0 0 2 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 206 0 0 0 0 266 0 0 0 100 1 0 0 7 16 5 42 1 0 0 0 1303 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 51 22 46 0 0 0 0 314 0 0 0 100 4 0 0 3 224 103 24 0 1 0 0 0 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 206 0 0 0 0 266 0 0 0 100 1 0 0 7 19 6 44 2 0 1 0 1303 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 314 0 0 0 100 4 0 0 3 217 104 8 0 0 0 0 2 0 0 0 100 5 0 0 3 211 102 5 0 1 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2101 102 212 1 1 0 0 265 0 0 0 99 1 0 0 7 17 5 46 0 2 0 0 1301 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 314 0 0 0 100 4 0 0 3 214 104 6 0 0 0 0 1 0 0 0 100 5 0 0 3 218 102 14 0 1 1 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 219 0 1 1 0 266 0 0 0 100 1 0 0 7 25 7 56 1 0 0 0 1317 0 0 0 100 2 0 0 0 12 1 8 0 0 0 0 1 0 0 0 100 3 0 0 0 51 23 46 0 0 0 0 315 0 0 0 100 4 0 0 3 213 104 8 0 0 0 0 9 0 0 0 100 5 0 0 3 222 108 12 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 6 0 0 0 0 5 0 0 0 100 7 0 0 0 11 1 8 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 214 0 0 1 0 266 0 0 0 100 1 0 0 7 19 6 42 1 0 1 0 1302 0 0 0 100 2 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 3 0 0 0 52 23 44 0 0 1 0 314 0 0 0 100 4 0 0 7 210 103 2 0 0 1 0 0 0 0 0 100 5 0 0 7 212 103 6 0 1 0 0 1 0 0 0 100 6 0 0 0 11 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 12 3 4 0 0 1 0 321 0 0 0 100 March 4, 2026 at 01:48:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 214 0 0 0 0 266 0 0 0 100 1 0 0 7 18 6 44 1 0 0 0 1303 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 314 0 0 0 100 4 0 0 3 213 104 8 0 0 0 0 2 0 0 0 100 5 0 0 3 211 102 4 0 1 0 0 0 0 0 0 100 6 0 0 0 15 1 16 0 1 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 214 1 0 0 0 266 0 0 0 100 1 0 0 7 19 5 44 1 0 1 0 1302 0 0 0 100 2 0 0 0 11 1 8 0 1 0 0 1 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 314 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 12 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:48:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 216 0 0 0 0 266 0 0 0 100 1 0 0 7 16 5 42 1 0 0 0 1301 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 314 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2113 102 226 0 1 0 0 266 0 0 0 100 1 0 0 7 23 7 54 0 0 0 0 1315 0 0 0 100 2 0 0 0 8 0 6 0 1 0 0 0 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 314 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 7 0 0 0 100 5 0 0 3 214 107 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 5 0 0 0 100 7 0 0 0 12 1 8 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:48:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 102 202 0 0 0 0 266 0 0 0 99 1 0 0 7 32 12 58 2 1 1 0 1304 0 0 0 100 2 0 0 0 12 0 12 0 1 0 0 0 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 314 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 114 1 0 0 0 266 0 0 0 100 1 0 0 7 74 33 100 1 0 2 0 1302 0 0 0 99 2 0 0 0 53 21 46 0 1 0 0 0 0 0 0 100 3 0 0 0 49 22 42 0 0 0 0 313 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 5 0 0 3 209 102 4 0 1 0 0 0 0 0 0 100 6 0 0 0 11 1 8 0 2 0 0 1 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 114 0 0 0 0 266 0 0 0 100 1 0 0 7 16 5 44 0 1 1 0 1302 0 0 0 99 2 0 0 0 44 19 38 0 0 0 0 0 0 0 0 100 3 0 0 0 72 33 68 0 1 0 0 294 0 0 0 100 4 0 0 3 216 104 14 0 1 1 0 2 0 0 0 100 5 0 0 3 210 102 2 0 1 0 0 0 0 0 0 100 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:48:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 114 0 0 0 0 266 0 0 0 100 1 0 0 7 18 6 42 1 0 1 0 1301 0 0 0 99 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 110 52 106 0 1 0 0 294 0 0 0 100 4 0 0 3 213 104 6 0 1 0 0 1 0 0 0 100 5 0 0 3 215 101 12 0 1 0 0 0 0 0 0 100 6 0 0 0 29 11 24 0 1 0 0 11 0 0 0 100 7 0 0 0 24 9 20 0 1 0 0 308 0 0 0 100 March 4, 2026 at 01:48:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 118 0 0 0 0 266 0 0 0 100 1 0 0 7 26 7 58 1 0 0 0 1320 0 0 0 99 2 0 0 0 10 1 6 0 1 0 0 1 0 0 0 100 3 0 0 0 113 54 108 0 0 0 0 295 0 0 0 100 4 0 0 3 213 104 8 0 0 0 0 9 0 0 0 100 5 0 0 3 223 111 5 0 0 1 0 0 0 0 0 100 6 0 0 0 9 0 6 0 0 0 0 5 0 0 0 100 7 0 0 0 51 21 48 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:48:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 114 1 0 1 0 266 0 0 0 100 1 0 0 7 19 6 42 1 0 1 0 1301 0 1 0 99 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 0 112 53 106 0 0 1 0 294 0 0 0 100 4 0 0 7 210 103 4 0 1 0 0 0 0 0 0 100 5 0 0 7 214 102 6 0 0 1 0 1 0 0 0 100 6 0 0 0 16 1 10 0 1 1 0 0 0 0 0 100 7 0 0 0 50 22 42 0 0 1 0 320 0 0 0 100 March 4, 2026 at 01:48:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 114 0 0 0 0 266 0 0 0 100 1 0 0 7 16 5 42 1 0 0 0 1302 0 0 0 99 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 4 0 0 3 213 104 8 0 0 0 0 2 0 0 0 100 5 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 8 0 0 0 0 0 0 0 0 100 7 0 0 0 52 21 52 0 1 0 0 320 0 0 0 100 March 4, 2026 at 01:48:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 102 114 1 0 0 0 310 0 0 0 99 1 0 0 7 18 5 44 1 0 0 0 1303 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 47 21 42 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:48:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 128 0 2 1 0 266 0 0 0 100 1 0 0 7 21 6 46 2 0 0 0 1303 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 209 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 49 21 44 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:48:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 102 118 0 0 0 0 266 0 0 0 100 1 0 0 7 30 7 64 2 1 0 0 1314 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 7 0 0 0 100 5 0 0 3 212 106 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 6 0 1 0 0 5 0 0 0 100 7 0 0 0 50 21 46 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:48:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 102 114 0 0 0 0 266 0 0 0 100 1 0 0 7 15 5 42 0 0 0 0 1302 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 47 21 42 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:48:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 102 114 1 0 0 0 266 0 0 0 100 1 0 0 7 18 5 44 1 0 0 0 1303 0 0 0 100 2 0 0 0 12 0 12 0 1 0 0 0 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 0 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 47 21 42 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:48:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2103 104 118 0 0 0 0 265 0 0 0 99 1 0 0 7 20 6 44 2 0 1 0 1302 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 3 0 0 0 119 54 118 0 1 1 0 294 0 0 0 100 4 0 0 3 213 105 6 0 0 0 0 2 0 0 0 100 5 0 0 3 209 102 3 0 1 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 49 22 44 0 0 1 0 320 0 0 0 100 March 4, 2026 at 01:48:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 116 0 0 0 0 266 0 0 0 100 1 0 0 7 17 6 44 0 0 0 0 1302 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 1 0 0 0 100 5 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 47 21 42 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:48:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 102 118 0 0 0 0 266 0 0 0 100 1 0 0 7 25 7 56 1 0 0 0 1318 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 52 23 46 0 0 0 0 295 0 0 0 100 4 0 0 3 276 135 72 0 1 0 0 9 0 0 0 100 5 0 0 3 220 109 10 0 1 1 0 0 0 0 0 100 6 0 0 0 9 0 6 0 0 0 0 5 0 0 0 100 7 0 0 0 51 21 48 0 0 0 0 320 0 0 0 100 March 4, 2026 at 01:48:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 102 118 1 0 1 0 266 0 1 0 99 1 4 0 7 30 6 60 1 1 1 0 1331 0 0 0 100 2 0 0 0 19 2 18 1 2 1 0 110 0 0 0 100 3 0 0 0 14 4 6 0 0 1 0 294 0 0 0 100 4 10 0 7 324 152 128 1 1 2 0 124 0 0 0 99 5 0 0 7 263 149 10 0 3 0 0 2 0 0 0 100 6 1292 0 3 26 1 24 1 1 1 0 109 0 0 0 100 7 5 0 0 35 11 36 0 3 1 0 393 0 0 0 100 March 4, 2026 at 01:48:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2147 103 164 1 5 43 0 266 0 1 0 99 1 0 0 7 59 5 123 1 7 43 0 1303 0 0 0 100 2 0 0 0 37 0 66 0 10 36 0 0 0 0 0 100 3 0 0 0 118 67 92 0 6 52 0 312 0 0 0 100 4 0 0 3 421 155 322 0 11 45 0 28 0 0 0 100 5 0 0 3 347 186 106 0 12 32 0 13 0 0 0 100 6 77 0 0 61 1 105 1 9 40 0 35 0 0 0 100 7 0 0 0 72 1 104 0 9 32 0 300 0 0 0 100