March 4, 2026 at 01:39:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 580 0 72 3836 126 4909 55 278 1211 14 4594 4 8 0 89 1 906 0 31 913 15 2748 16 289 1224 24 5337 5 7 0 88 2 936 0 280 695 12 2754 16 222 1180 11 6948 5 5 0 90 3 885 0 457 1127 448 2825 18 373 1223 26 5936 2 7 0 91 4 939 0 68 1355 16 2917 15 279 1241 16 9165 3 6 0 90 5 773 0 60 2654 2040 2627 24 270 1325 9 6989 15 7 0 78 6 574 0 31 897 13 3336 15 406 1288 23 6919 4 5 0 92 7 689 0 30 1685 13 4752 36 253 1151 15 4064 6 6 0 88 March 4, 2026 at 01:39:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3772 0 70 2394 109 603 30 146 578 50 2591 4 31 0 64 1 8182 0 6 421 17 820 39 182 1475 63 3204 8 9 0 83 2 7021 0 28 434 6 979 37 162 1839 80 1992 12 5 0 83 3 9966 0 84 672 297 945 41 175 2267 61 3088 14 10 0 76 4 6335 0 58 528 45 818 40 189 2114 62 2148 9 12 0 79 5 3276 0 23 350 22 693 36 187 1779 59 2307 6 3 0 90 6 2649 0 30 394 9 831 22 200 2042 81 1671 6 3 0 91 7 6475 0 15 337 4 797 27 172 2705 62 2390 4 4 0 92 March 4, 2026 at 01:39:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 103 98 3 5 10 0 0 0 7 0 93 1 0 0 0 56 18 44 3 5 12 0 0 0 6 0 94 2 0 0 0 108 30 155 0 22 141 0 18 0 1 0 99 3 0 0 10 252 132 14 3 2 15 0 275 0 6 0 94 4 0 0 17 226 105 47 0 15 138 0 566 0 1 0 99 5 40 0 0 20 3 10 3 2 16 0 310 0 6 0 94 6 0 0 0 34 2 25 5 4 23 0 258 0 6 0 94 7 31 0 0 23 1 48 4 4 18 0 1060 0 6 0 94 March 4, 2026 at 01:39:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2211 111 287 8 84 541 0 0 0 13 0 87 1 0 0 0 107 2 233 7 81 571 0 128 0 13 0 87 2 26 0 0 188 32 389 1 94 626 0 1640 0 2 0 98 3 0 0 10 659 438 485 9 82 448 0 259 0 13 0 87 4 0 0 17 547 114 717 2 93 558 0 438 0 2 0 98 5 0 0 0 107 3 220 9 76 553 0 0 0 12 0 88 6 0 0 0 101 1 217 8 78 520 0 0 0 13 0 87 7 0 0 0 111 2 209 9 69 434 0 0 0 12 0 88 March 4, 2026 at 01:39:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2199 101 276 2 90 562 0 0 0 2 0 98 1 0 0 14 149 6 292 2 82 622 1 266 0 1 0 99 2 0 0 0 199 42 352 0 87 557 1 1636 0 2 0 98 3 0 0 10 634 437 907 0 85 560 0 259 0 1 0 98 4 0 0 3 318 106 264 0 101 636 0 301 0 2 0 98 5 0 0 0 97 2 241 1 72 640 1 0 0 1 0 99 6 0 0 0 96 0 249 2 97 632 1 0 0 1 0 99 7 0 0 0 122 3 274 0 97 559 1 0 0 1 0 99 March 4, 2026 at 01:39:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2236 107 431 0 109 616 0 0 0 2 0 98 1 0 0 14 171 12 358 0 104 618 0 268 0 1 0 98 2 0 0 0 200 34 414 1 100 644 0 1639 0 2 0 98 3 0 0 10 649 400 700 0 97 668 0 260 0 2 0 98 4 0 0 3 488 108 610 0 108 694 0 307 0 2 0 98 5 0 0 0 159 11 362 0 108 655 0 13 0 2 0 98 6 0 0 0 146 0 361 0 105 668 0 0 0 1 0 99 7 0 0 0 143 0 347 0 101 578 0 0 0 1 0 99 March 4, 2026 at 01:39:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2733 0 4 2296 108 505 3 69 149 38 1385 2 2 0 96 1 614 0 18 172 3 323 3 64 86 29 1137 1 1 0 98 2 4482 0 11 203 17 388 2 54 105 38 2974 4 4 0 92 3 1069 0 14 397 109 412 4 58 95 36 1175 1 1 0 98 4 834 0 39 390 109 365 6 53 108 22 1139 2 1 0 97 5 1388 0 8 138 12 266 3 38 46 26 554 2 2 0 96 6 366 0 11 172 22 286 0 41 73 18 745 2 1 0 98 7 2599 0 2 118 0 249 2 45 99 24 851 1 1 0 98 March 4, 2026 at 01:39:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 0 2169 118 202 0 19 53 0 15 0 1 0 99 1 0 0 14 144 35 184 0 19 54 0 283 0 0 0 100 2 0 0 0 65 5 125 1 11 42 0 1725 0 0 0 99 3 0 0 17 323 166 92 0 15 46 0 315 0 0 0 100 4 0 0 17 303 105 183 0 18 30 0 302 0 0 0 100 5 2 0 0 52 2 83 0 15 36 0 5 0 0 0 100 6 0 0 0 56 0 100 0 19 56 0 8 0 0 0 100 7 0 0 0 62 2 93 0 13 44 0 7 0 0 0 100 March 4, 2026 at 01:39:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 117 130 0 4 1 0 9 0 1 0 99 1 0 0 14 38 6 41 0 9 0 0 266 0 0 0 100 2 8 0 0 97 40 125 2 3 3 0 1716 0 0 0 99 3 0 0 10 227 109 24 0 3 1 0 260 0 0 0 100 4 0 0 3 226 106 30 0 3 1 0 301 0 0 0 100 5 0 0 0 9 1 6 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 8 0 1 0 0 0 0 0 0 100 7 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:39:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 111 120 0 9 0 0 8 0 1 0 99 1 0 0 14 38 13 34 0 7 0 0 266 0 0 0 100 2 1 0 0 77 33 100 1 1 1 0 1730 0 0 0 99 3 0 0 10 230 109 22 0 3 0 0 261 0 0 0 100 4 0 0 3 219 105 18 0 1 2 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:39:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 16 2160 134 154 0 16 13 3 37 0 1 0 99 1 8 0 14 108 19 116 0 16 13 4 303 0 0 0 100 2 281 0 0 39 8 64 2 6 15 0 1830 0 0 0 99 3 25 0 10 224 104 28 0 7 1 2 290 0 0 0 100 4 9 0 12 236 107 54 1 9 0 3 371 0 0 0 100 5 8 0 0 38 14 35 2 8 8 1 46 0 0 0 100 6 8 0 7 34 3 41 0 9 5 3 50 0 1 0 99 7 22 0 4 28 2 31 0 9 1 3 64 0 0 0 100 March 4, 2026 at 01:39:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2135 130 110 0 3 0 0 0 0 1 0 99 1 0 0 21 72 1 66 0 1 0 0 266 0 0 0 100 2 0 0 0 65 26 90 0 1 0 0 1692 0 0 0 99 3 0 0 10 216 104 6 1 0 0 0 259 0 0 0 100 4 0 0 3 219 105 10 0 0 0 0 300 0 0 0 100 5 0 0 0 13 1 12 0 1 0 0 0 0 0 0 100 6 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 8 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:39:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2127 117 88 0 12 4 0 0 0 1 0 99 1 0 0 14 75 6 68 0 11 3 0 266 0 0 0 100 2 0 0 0 76 30 98 1 6 3 0 1668 0 0 0 100 3 0 0 10 229 107 24 0 4 0 0 259 0 0 0 100 4 0 0 3 215 105 8 0 0 0 0 300 0 0 0 100 5 0 0 0 10 1 4 0 0 1 0 0 0 0 0 100 6 0 0 0 14 1 16 0 1 0 0 1 0 0 0 100 7 0 0 0 11 1 6 0 0 2 0 0 0 0 0 100 March 4, 2026 at 01:39:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2131 126 113 0 6 1 0 0 0 1 0 99 1 0 0 14 89 19 82 0 6 1 0 266 0 0 0 100 2 0 0 0 41 13 59 1 3 1 0 1671 0 0 0 99 3 0 0 14 223 105 14 0 1 0 0 260 0 0 0 100 4 0 0 7 216 105 7 0 0 2 0 300 0 0 0 100 5 0 0 0 13 3 4 0 0 1 0 1 0 0 0 100 6 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 10 1 0 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:39:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 110 0 2 0 0 0 0 1 0 99 1 0 0 14 108 48 104 0 1 0 0 266 0 0 0 100 2 0 0 0 14 3 38 1 0 1 0 1667 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 214 105 9 0 0 2 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 11 0 10 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:39:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 239 0 0 2456 103 642 14 73 16 0 1252 5 2 0 93 1 347 0 14 397 22 591 20 83 83 2 1688 6 1 0 93 2 4678 0 9 331 24 513 20 56 52 6 3176 8 2 0 90 3 854 0 4 528 111 512 17 72 81 9 1698 6 1 0 92 4 301 0 297 430 107 431 8 54 27 10 1846 3 1 0 96 5 141 0 0 277 15 413 10 40 71 4 1070 6 1 0 93 6 286 0 7 293 1 507 12 55 48 6 1619 9 1 0 90 7 221 0 0 241 0 395 7 39 76 2 856 2 1 0 97 March 4, 2026 at 01:40:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 114 0 1 0 0 1 0 0 0 99 1 0 0 14 15 2 12 0 2 0 0 268 0 0 0 100 2 0 0 0 114 51 138 1 2 4 0 1739 0 0 0 99 3 2 0 3 212 102 4 0 0 1 0 8 0 0 0 100 4 0 0 17 224 107 22 1 1 0 0 319 0 1 0 99 5 0 0 0 12 2 6 0 0 4 0 9 0 0 0 100 6 0 0 7 18 4 14 0 1 0 0 272 0 0 0 100 7 51 0 0 20 5 14 0 0 0 0 31 0 0 0 100 March 4, 2026 at 01:40:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 106 177 0 18 44 0 0 0 1 0 99 1 0 0 14 120 31 162 0 19 59 0 266 0 0 0 100 2 1 0 0 96 18 167 1 15 54 0 1724 0 0 0 99 3 0 0 2 305 158 85 0 15 61 0 2 0 0 0 100 4 0 0 4 300 105 182 0 16 57 0 300 0 0 0 100 5 0 0 0 47 2 80 0 13 58 0 1 0 0 0 100 6 0 0 7 62 2 112 0 17 49 0 260 0 0 0 100 7 0 0 0 53 7 82 0 13 49 0 9 0 0 0 100 March 4, 2026 at 01:40:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 34 0 7 2 0 0 0 1 0 99 1 0 0 14 111 13 105 0 14 1 0 266 0 0 0 100 2 0 0 0 96 35 122 1 9 4 0 1724 0 0 0 100 3 0 0 3 228 109 24 0 2 3 0 0 0 0 0 100 4 0 0 3 231 105 37 0 3 4 0 300 0 0 0 100 5 0 0 0 10 1 8 0 1 4 0 0 0 0 0 100 6 0 0 7 11 2 10 0 0 1 0 259 0 0 0 100 7 0 0 0 23 7 20 0 0 1 0 9 0 0 0 100 March 4, 2026 at 01:40:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 9 2126 101 63 0 16 1 9 68 0 1 0 99 1 9 0 29 60 7 63 3 13 11 1 309 0 0 0 99 2 282 0 3 40 8 68 3 8 27 1 1821 0 1 0 99 3 6 0 9 309 116 110 0 12 1 5 43 0 0 0 100 4 19 0 7 283 131 86 0 7 1 4 353 0 0 0 100 5 4 0 0 19 5 13 1 2 4 0 11 0 0 0 100 6 10 0 7 18 2 22 0 6 2 3 292 0 0 0 100 7 21 0 3 32 8 40 1 8 2 4 54 0 0 0 100 March 4, 2026 at 01:40:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 78 0 3 0 0 0 0 1 0 99 1 0 0 14 100 31 99 1 5 0 0 267 0 0 0 100 2 0 0 0 53 20 74 1 2 2 0 1670 0 0 0 99 3 0 0 10 226 103 18 0 4 0 0 1 0 0 0 100 4 0 0 3 224 105 24 1 1 1 0 308 0 0 0 100 5 0 0 0 15 7 4 0 0 0 0 1 0 0 0 100 6 0 0 7 18 4 14 0 1 0 0 275 0 0 0 100 7 0 0 0 15 2 10 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:40:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 12 0 1 0 0 0 0 0 0 100 1 0 0 21 110 35 107 0 1 0 0 266 0 0 0 100 2 0 0 0 116 19 138 1 1 0 0 1669 0 0 0 99 3 0 0 3 214 103 6 0 0 0 0 1 0 0 0 100 4 0 0 3 220 106 14 0 2 0 0 302 0 0 0 100 5 0 0 0 13 1 12 0 1 0 0 0 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 12 0 0 0 0 0 0 0 0 100 1 0 0 21 60 10 58 0 9 0 0 266 0 0 0 100 2 0 0 0 56 15 74 1 6 1 0 1668 0 0 0 100 3 0 0 3 277 106 70 0 3 0 0 0 0 0 0 100 4 0 0 3 269 131 64 0 1 2 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 7 14 4 10 0 0 1 0 260 0 0 0 100 7 0 0 0 10 0 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:40:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 10 0 0 1 0 0 0 0 0 100 1 0 0 14 10 2 4 0 0 1 0 266 0 0 0 100 2 0 0 0 17 4 38 1 0 1 0 1667 0 0 0 100 3 0 0 7 310 102 104 0 1 0 0 0 0 0 0 100 4 0 0 7 315 155 108 0 0 1 0 300 0 0 0 100 5 0 0 0 13 2 6 0 1 1 0 2 0 0 0 100 6 0 0 7 15 3 12 0 1 1 0 259 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:40:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2961 0 8 2253 101 291 8 31 12 9 571 3 1 0 96 1 365 0 15 96 1 143 10 21 24 6 995 6 1 0 94 2 2434 0 1 136 4 247 8 18 41 6 2397 1 1 0 97 3 679 0 3 414 104 277 6 24 21 2 848 6 1 0 94 4 149 0 115 407 149 310 3 34 11 8 676 1 0 0 99 5 364 0 0 104 6 168 7 24 19 5 584 3 0 0 96 6 85 0 7 110 6 183 2 28 17 5 1008 1 0 0 99 7 38 0 0 70 0 96 1 19 5 2 218 0 0 0 99 March 4, 2026 at 01:40:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 52 0 0 3166 114 1853 36 156 36 0 4685 20 4 0 76 1 200 0 14 935 2 1491 37 142 56 1 5474 33 3 0 64 2 52 0 0 925 20 1461 23 106 41 1 5337 13 3 0 84 3 86 0 3 1189 108 1555 52 132 91 0 5508 32 3 0 65 4 46 0 1262 915 108 1360 26 123 32 0 3435 14 3 0 83 5 83 0 0 555 10 637 24 69 45 0 3616 23 2 0 75 6 19 0 7 998 9 1619 21 117 47 0 3370 6 2 0 92 7 79 0 0 667 5 968 10 68 62 0 2722 7 2 0 92 March 4, 2026 at 01:40:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 14 3048 104 1565 32 135 49 1 4548 20 4 0 76 1 5 0 14 871 16 1238 28 108 53 1 5173 33 3 0 64 2 15 0 2 895 10 1418 20 110 55 0 5482 17 3 0 80 3 2 0 3 1271 113 1759 38 158 47 0 4398 14 3 0 83 4 7 0 1246 915 116 1352 34 144 43 0 4057 24 3 0 73 5 9 0 0 681 4 944 14 77 40 0 3823 19 2 0 79 6 14 0 5 868 11 1345 22 115 38 0 3607 12 2 0 86 7 31 0 0 855 2 1364 13 86 35 0 3028 8 2 0 91 March 4, 2026 at 01:40:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3016 105 1533 26 153 60 0 3912 15 3 0 82 1 4 0 0 1059 6 1702 38 151 74 0 4386 23 3 0 74 2 0 0 14 951 12 1486 33 126 100 0 5438 16 3 0 81 3 4 0 3 1344 169 1798 38 155 96 0 3910 15 3 0 82 4 4 0 1245 768 114 1022 30 108 94 0 4518 29 3 0 68 5 1 0 0 915 2 1468 14 91 87 0 3232 8 2 0 90 6 4 0 4 940 14 1480 29 144 128 0 4610 21 2 0 76 7 3 0 0 712 5 1029 23 91 115 0 3183 17 2 0 81 March 4, 2026 at 01:40:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 3007 105 1465 38 128 56 0 5239 42 4 0 54 1 4 0 0 862 8 1310 34 140 87 0 5285 28 3 0 69 2 1 0 0 1062 20 1649 21 164 73 0 4307 7 3 0 90 3 4 0 2 1298 148 1750 51 159 101 1 4223 15 3 0 82 4 3 0 1234 860 110 1291 18 147 37 0 3820 9 3 0 88 5 0 0 0 858 10 1290 19 102 58 0 2792 12 2 0 86 6 6 0 0 931 8 1499 25 142 95 0 3834 14 2 0 84 7 7 0 5 655 2 931 30 74 84 0 3323 18 2 0 80 March 4, 2026 at 01:40:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 3087 108 1641 47 160 40 0 3891 15 4 0 82 1 4 0 0 1070 19 1734 42 172 20 0 4850 9 3 0 88 2 18 0 0 730 6 1005 25 104 20 0 3810 15 2 0 83 3 7 0 13 932 114 1043 47 106 35 1 3956 42 2 0 56 4 3 0 1231 809 114 1095 29 129 44 1 3082 23 3 0 75 5 2 0 0 753 7 1052 22 85 40 0 2867 19 2 0 79 6 0 0 0 868 7 1333 35 106 38 1 3329 18 2 0 80 7 0 0 3 715 8 1024 18 77 25 0 2560 4 1 0 94 March 4, 2026 at 01:40:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 9 2796 103 964 39 126 50 0 4814 34 3 0 62 1 0 0 0 1177 9 1948 44 172 43 0 5637 15 3 0 82 2 2 0 0 921 9 1352 28 118 53 0 4370 14 2 0 84 3 3 0 3 1300 111 1764 27 151 32 0 3286 6 2 0 92 4 1 0 1345 854 110 1227 22 118 36 0 3931 22 3 0 76 5 1 0 0 814 14 1200 16 89 45 0 2827 7 2 0 91 6 4 0 0 678 14 922 36 93 85 0 4251 35 2 0 63 7 1 0 5 981 16 1543 21 78 41 0 3999 10 2 0 88 March 4, 2026 at 01:40:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2836 111 1108 27 89 43 0 4867 37 3 0 60 1 2 0 0 1090 6 1777 36 170 52 0 4814 18 3 0 79 2 1 0 0 809 3 1275 28 106 47 0 6252 24 3 0 73 3 0 0 2 1212 111 1584 33 161 45 0 3651 7 2 0 91 4 2 0 1274 864 104 1265 25 118 39 0 3808 15 3 0 82 5 1 0 0 795 8 1143 15 71 54 0 3319 19 2 0 79 6 1 0 0 904 18 1412 17 104 45 0 3355 10 2 0 88 7 2 0 5 820 8 1253 20 59 48 0 3874 15 2 0 83 March 4, 2026 at 01:40:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 3026 114 1412 35 151 82 0 4262 27 4 0 69 1 4 0 0 1141 7 1899 34 165 60 0 4454 22 3 0 75 2 7 0 0 915 15 1385 36 128 98 0 5058 22 3 0 75 3 8 0 2 1304 157 1771 42 136 138 0 5510 21 3 0 76 4 1 0 1285 881 105 1294 26 154 113 1 3651 21 3 0 76 5 9 0 0 808 8 1140 21 116 71 1 2841 8 2 0 90 6 32 0 11 912 13 1410 25 137 111 0 3893 17 2 0 81 7 1 0 4 763 7 1133 14 91 115 0 3183 8 2 0 90 March 4, 2026 at 01:40:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3181 114 1833 31 134 31 0 3820 9 4 0 87 1 1 0 0 675 9 848 32 98 39 0 4074 31 2 0 66 2 1 0 0 859 7 1257 28 88 61 0 4386 20 2 0 78 3 0 0 3 1244 115 1706 42 133 51 0 4616 17 3 0 80 4 2 0 1233 860 115 1291 19 124 48 0 3485 8 3 0 89 5 4 0 0 660 6 872 31 50 58 0 4441 42 2 0 56 6 2 0 14 898 17 1491 24 104 36 0 4686 10 2 0 88 7 2 0 6 823 7 1275 18 84 31 0 3090 5 2 0 93 March 4, 2026 at 01:40:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3048 104 1486 35 160 32 0 3815 23 4 0 74 1 4 0 0 902 6 1291 31 141 33 0 3346 20 2 0 78 2 7 0 0 918 7 1375 19 97 35 0 3505 14 2 0 83 3 22 0 2 1110 111 1387 46 129 49 0 4445 26 3 0 71 4 1 0 1345 771 110 1081 35 111 36 0 3327 20 3 0 77 5 2 0 0 762 12 1048 22 107 38 0 2859 17 2 0 81 6 0 0 13 924 18 1457 35 120 42 0 4345 17 2 0 80 7 3 0 4 710 11 979 12 75 38 0 3109 8 2 0 91 March 4, 2026 at 01:40:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3040 109 1492 33 133 29 0 4083 20 3 0 76 1 2 0 14 1034 17 1649 46 138 33 0 4950 19 3 0 78 2 5 0 0 743 5 1064 35 95 47 0 4552 27 2 0 70 3 2 0 2 1091 104 1399 36 113 65 0 4360 30 3 0 67 4 1 0 1192 898 120 1314 29 126 37 0 5453 17 3 0 80 5 2 0 0 840 14 1300 20 104 37 0 2578 7 2 0 91 6 4 0 0 910 8 1465 30 115 46 1 3734 17 2 0 81 7 2 0 7 646 3 909 22 76 25 0 3033 7 2 0 92 March 4, 2026 at 01:40:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3245 102 1963 29 157 40 0 4119 16 4 0 81 1 0 0 0 930 8 1384 47 141 45 0 4624 35 3 0 62 2 0 0 0 868 11 1283 35 113 46 0 4080 13 2 0 85 3 2 0 16 1204 118 1538 53 147 58 0 4464 25 3 0 72 4 0 0 1287 791 119 1116 26 143 17 1 4989 12 3 0 85 5 3 0 0 634 4 811 29 69 41 0 3069 23 2 0 75 6 5 0 0 813 2 1245 24 112 41 0 3340 11 2 0 87 7 0 0 5 742 8 1067 17 86 45 0 3140 9 2 0 89 March 4, 2026 at 01:40:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3056 105 1586 27 147 95 0 4041 23 4 0 74 1 3 0 0 956 12 1477 38 173 68 0 4375 23 3 0 74 2 2 0 0 774 8 1070 31 119 89 0 3693 31 2 0 67 3 1 0 17 1254 155 1719 50 184 99 0 4337 13 3 0 84 4 0 0 1233 1008 112 1579 30 144 90 0 4770 15 4 0 82 5 0 0 0 858 15 1294 21 125 40 2 3423 9 2 0 89 6 0 0 0 763 11 1095 32 133 97 0 4514 21 2 0 77 7 2 0 5 827 9 1286 22 92 66 0 3072 12 2 0 86 March 4, 2026 at 01:40:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 23 3226 103 1943 37 132 37 0 4273 20 4 0 76 1 0 0 0 810 4 1116 62 120 84 0 5290 58 3 0 39 2 0 0 0 1156 10 1850 26 124 34 0 3744 11 3 0 86 3 5 0 17 1085 111 1335 33 125 39 0 4421 14 2 0 83 4 0 0 1290 834 110 1218 35 132 74 0 5147 8 3 0 88 5 1 0 0 542 4 626 12 62 28 0 2594 11 2 0 87 6 0 0 0 980 16 1535 32 118 45 0 3695 8 2 0 90 7 13 0 6 829 11 1224 15 77 41 1 3745 13 2 0 85 March 4, 2026 at 01:40:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2943 113 1311 39 132 31 0 3681 30 3 0 67 1 1 0 7 967 8 1472 57 161 30 0 4100 32 3 0 65 2 0 0 0 823 10 1205 39 114 40 0 3068 21 2 0 77 3 2 0 17 1194 107 1587 52 133 55 0 4074 21 3 0 76 4 1 0 1220 773 109 1064 21 113 40 0 4385 13 3 0 84 5 0 0 0 666 14 903 17 87 37 0 2602 10 2 0 88 6 0 0 0 893 15 1378 31 124 24 0 3453 11 2 0 86 7 0 0 0 712 8 998 19 80 51 1 2645 6 2 0 93 March 4, 2026 at 01:40:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3081 103 1581 40 165 32 0 4363 16 4 0 81 1 0 0 7 948 13 1412 35 172 34 0 3675 9 2 0 89 2 1 0 0 760 8 1016 28 113 37 0 3679 21 2 0 77 3 2 0 17 1160 110 1541 45 139 35 0 4588 23 3 0 75 4 0 0 1318 985 114 1502 29 156 55 0 4996 11 3 0 86 5 1 0 0 720 9 943 39 65 52 0 4265 47 2 0 51 6 1 0 0 928 15 1436 31 126 39 0 3807 15 2 0 83 7 0 0 0 864 11 1285 27 111 35 0 3311 7 2 0 91 March 4, 2026 at 01:40:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2847 113 1073 25 110 38 0 4260 22 3 0 75 1 4 0 0 1002 5 1559 61 172 45 0 4679 29 3 0 68 2 3 0 0 774 6 1068 45 109 50 0 4532 52 3 0 45 3 4 0 17 1398 115 1980 46 175 41 0 4141 7 3 0 90 4 1 0 1313 947 111 1439 26 123 31 0 4788 14 3 0 83 5 1 0 0 860 19 1223 19 86 26 0 2585 8 2 0 90 6 0 0 0 798 6 1148 28 105 39 0 2762 5 2 0 92 7 0 0 0 684 5 981 20 59 39 0 3623 10 2 0 88 March 4, 2026 at 01:40:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3165 114 1771 39 156 37 0 3947 15 4 0 82 1 2 0 0 1020 2 1605 49 163 96 0 5124 22 3 0 75 2 1 0 0 850 8 1289 23 107 104 0 4334 28 3 0 69 3 0 0 4 1261 149 1649 49 148 118 0 5171 35 3 0 62 4 0 0 1268 894 117 1352 37 136 77 0 5838 20 4 0 76 5 0 0 0 862 6 1323 16 116 110 0 2916 9 2 0 89 6 1 0 0 882 9 1363 23 127 98 0 3075 12 2 0 85 7 0 0 0 699 12 981 16 88 69 0 3159 6 2 0 92 March 4, 2026 at 01:40:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3035 119 1504 33 123 28 0 4279 22 3 0 74 1 1 0 0 971 5 1511 37 122 34 0 4792 21 3 0 76 2 0 0 0 896 8 1358 12 109 57 1 3355 8 2 0 90 3 0 0 7 1004 111 1155 43 127 78 0 4242 32 3 0 65 4 0 0 1330 743 110 1007 23 91 39 0 5492 26 3 0 71 5 0 0 0 845 7 1278 16 89 20 0 2903 11 2 0 87 6 1 0 0 959 10 1504 31 121 70 0 3717 13 2 0 84 7 0 0 0 829 7 1244 14 74 44 0 3489 12 2 0 86 March 4, 2026 at 01:40:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3088 113 1638 52 176 35 0 3505 15 4 0 81 1 4 0 0 819 5 1191 49 130 27 0 4114 41 3 0 56 2 1 0 0 814 5 1171 38 104 31 0 3735 29 2 0 69 3 2 0 3 1148 117 1450 50 156 39 0 3898 24 3 0 73 4 3 0 1298 877 115 1278 33 135 43 0 5286 19 3 0 77 5 0 0 0 731 9 956 11 88 23 0 2452 5 2 0 94 6 0 0 0 759 13 1069 17 126 29 0 2533 6 2 0 92 7 0 0 0 732 8 1035 18 78 23 0 2883 6 2 0 92 March 4, 2026 at 01:40:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 16 3137 106 1768 21 141 37 0 4552 18 4 0 78 1 3 0 0 1047 12 1672 33 131 75 0 4884 21 3 0 76 2 3 0 0 842 10 1207 24 84 58 0 4498 32 2 0 66 3 2 0 3 1042 114 1304 46 128 41 0 4371 24 3 0 73 4 0 0 1257 899 120 1371 24 131 29 0 4907 10 3 0 87 5 3 0 0 826 15 1226 10 66 38 0 3589 9 2 0 89 6 0 0 0 704 0 971 34 84 39 1 3960 22 2 0 76 7 3 0 0 730 5 1088 16 58 21 0 2751 11 2 0 88 March 4, 2026 at 01:40:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 3162 111 1850 37 168 35 0 4113 11 4 0 85 1 1 0 0 1039 5 1645 50 166 48 0 4132 26 3 0 71 2 0 0 0 753 2 1052 25 80 44 0 4890 31 2 0 66 3 3 0 3 1328 123 1871 51 169 54 0 4066 16 3 0 82 4 7 0 1242 814 110 1198 34 118 49 0 5655 24 3 0 72 5 0 0 0 721 6 1011 18 72 51 0 3865 19 2 0 79 6 5 0 0 768 3 1115 34 115 38 0 3658 14 2 0 84 7 0 0 0 731 17 1054 13 76 46 0 2725 6 2 0 93 March 4, 2026 at 01:40:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3189 105 1916 57 186 67 0 4214 12 4 0 84 1 2 0 0 941 9 1467 37 160 111 0 4327 26 3 0 71 2 5 0 0 801 8 1169 25 142 93 0 3508 12 2 0 86 3 18 0 3 1247 169 1587 41 161 122 0 5195 26 3 0 72 4 1 0 1269 1096 120 1734 28 154 89 1 4432 10 3 0 87 5 1 0 0 834 2 1287 26 119 104 0 4569 18 2 0 79 6 0 0 0 918 5 1480 29 122 116 0 4898 27 2 0 70 7 6 0 0 653 13 864 15 84 92 0 2913 16 2 0 82 March 4, 2026 at 01:40:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3063 114 1570 18 142 18 0 3790 14 4 0 82 1 1 0 0 958 4 1596 32 139 55 0 4665 21 3 0 76 2 0 0 0 853 7 1227 22 94 70 1 4481 27 3 0 70 3 3 0 3 1114 104 1416 39 149 39 0 3957 18 2 0 80 4 2 0 1299 985 115 1510 13 94 25 0 4456 13 3 0 84 5 14 0 0 858 11 1304 12 88 36 1 4149 7 2 0 91 6 7 0 0 954 11 1513 25 123 48 0 3636 11 2 0 87 7 2 0 0 562 1 690 29 57 52 0 4276 36 2 0 62 March 4, 2026 at 01:40:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3182 105 1836 29 155 17 0 4623 7 4 0 90 1 1 0 0 871 14 1317 37 140 26 0 3449 17 2 0 81 2 0 0 0 825 5 1151 28 114 35 0 3406 12 2 0 85 3 1 0 4 1054 107 1279 38 116 50 1 3713 38 3 0 60 4 3 0 1301 781 114 1082 31 112 24 0 4109 17 3 0 80 5 4 0 5 737 12 994 16 56 24 0 2875 21 2 0 77 6 14 0 0 818 16 1190 32 101 26 0 2915 29 2 0 69 7 1 0 0 699 12 981 19 78 52 0 2440 6 2 0 92 March 4, 2026 at 01:40:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2897 111 1271 30 127 37 0 5386 25 4 0 71 1 0 0 0 917 8 1431 40 135 42 0 4413 16 3 0 81 2 3 0 0 982 16 1489 22 119 35 0 3183 6 2 0 92 3 3 0 2 1110 107 1435 41 135 75 0 3724 13 3 0 85 4 10 0 1231 852 111 1208 42 109 36 0 4813 27 3 0 70 5 5 0 19 667 12 899 24 73 45 0 3713 23 2 0 75 6 6 0 0 1000 7 1616 38 125 31 1 3965 18 2 0 79 7 1 0 0 874 11 1335 29 83 46 0 3792 19 2 0 79 March 4, 2026 at 01:40:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 20 3139 103 1766 28 120 42 0 5329 18 4 0 78 1 5 0 0 1137 5 1849 40 135 53 1 4551 22 3 0 75 2 1 0 0 1048 9 1681 20 125 55 0 3355 8 2 0 90 3 0 0 3 1125 104 1444 33 116 51 0 4427 15 3 0 82 4 0 0 1294 814 125 1095 28 116 32 0 3877 16 3 0 81 5 0 0 19 766 10 1093 12 90 31 0 3231 6 2 0 92 6 4 0 0 924 11 1463 21 88 40 0 4210 14 2 0 83 7 2 0 0 536 5 604 35 54 43 0 4633 47 2 0 51 March 4, 2026 at 01:40:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3072 110 1593 36 161 81 0 4391 23 4 0 73 1 3 0 0 1178 7 1920 26 183 108 0 3396 6 3 0 91 2 2 0 0 873 7 1290 36 99 80 0 4729 36 3 0 61 3 2 0 3 1196 166 1477 40 134 68 0 4658 24 3 0 73 4 5 0 1259 793 118 1119 18 128 91 0 4108 13 3 0 84 5 1 0 13 823 16 1260 28 92 79 0 5289 22 2 0 75 6 0 0 2 888 4 1385 21 140 67 0 2915 6 2 0 92 7 3 0 0 697 4 971 20 87 95 1 3001 15 2 0 83 March 4, 2026 at 01:40:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3096 106 1596 34 164 28 0 3582 26 3 0 71 1 0 0 0 1277 16 2049 40 172 32 0 3750 14 3 0 83 2 4 0 0 903 6 1339 19 115 23 1 3209 8 2 0 90 3 3 0 3 854 118 829 31 98 23 0 3207 27 2 0 71 4 0 0 1315 775 114 1085 25 104 30 0 3523 16 3 0 82 5 0 0 13 785 11 1193 13 93 37 0 3678 5 2 0 93 6 1 0 4 862 8 1392 37 118 46 0 5175 22 2 0 76 7 2 0 0 723 4 1039 20 73 64 0 4203 29 2 0 69 March 4, 2026 at 01:40:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2945 108 1348 38 157 44 1 3677 26 3 0 71 1 1 0 0 881 11 1316 61 154 38 1 3952 45 3 0 53 2 1 0 0 928 16 1379 32 121 23 0 3233 15 2 0 82 3 10 0 2 1077 111 1298 35 110 25 0 3625 15 2 0 82 4 0 0 1260 857 112 1242 22 114 41 0 4445 12 3 0 85 5 0 0 14 726 8 990 21 90 40 1 3287 6 2 0 93 6 2 0 6 801 10 1221 26 89 25 0 3317 11 2 0 87 7 2 0 0 689 9 956 16 63 17 0 2683 14 2 0 84 March 4, 2026 at 01:40:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2898 105 1236 29 148 34 0 4569 27 4 0 69 1 1 0 0 1023 5 1624 52 146 49 0 4533 29 3 0 68 2 1 0 0 1003 8 1596 26 96 48 0 4098 19 3 0 79 3 1 0 2 1102 108 1471 34 138 50 1 4473 16 3 0 81 4 2 0 1217 831 113 1160 31 104 39 0 4799 28 3 0 69 5 2 0 13 862 20 1299 17 102 44 0 3217 6 2 0 92 6 1 0 5 874 20 1393 24 136 43 0 4346 6 2 0 92 7 6 0 0 641 2 906 13 66 48 0 3219 16 2 0 83 March 4, 2026 at 01:40:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2975 107 1414 22 152 41 0 3678 12 3 0 84 1 33 0 0 933 8 1443 46 133 53 0 4793 23 3 0 74 2 0 0 0 849 6 1267 28 105 38 0 3480 12 2 0 86 3 16 0 2 1221 108 1639 37 131 46 1 4584 15 3 0 82 4 7 0 1246 785 114 1059 38 87 37 0 4715 43 3 0 54 5 3 0 14 826 8 1225 20 91 51 0 4184 19 2 0 79 6 8 0 5 1018 13 1678 29 110 41 0 4486 16 2 0 81 7 4 0 0 662 9 965 17 75 28 1 3578 6 2 0 92 March 4, 2026 at 01:40:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 16 2862 106 1175 35 153 76 0 3106 18 3 0 79 1 32 0 0 1015 21 1565 47 174 75 0 3909 21 3 0 76 2 2 0 0 888 5 1310 47 148 92 0 3609 28 3 0 70 3 28 0 2 1333 173 1780 51 167 80 2 3882 11 3 0 86 4 2 0 1298 823 105 1155 51 131 99 0 3424 40 3 0 57 5 0 0 0 811 10 1181 23 102 71 0 3445 8 2 0 90 6 3 0 13 845 6 1269 33 134 81 0 3351 8 2 0 90 7 37 0 0 742 7 1112 20 83 76 0 3514 12 2 0 86 March 4, 2026 at 01:40:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3087 110 1592 34 126 54 0 4840 32 4 0 65 1 11 0 14 1095 8 1824 43 179 46 0 4875 17 3 0 80 2 1 0 0 827 8 1203 19 102 58 0 3723 15 2 0 83 3 0 0 10 1235 120 1618 41 155 51 0 4103 11 3 0 87 4 0 0 1285 913 108 1348 18 108 40 0 3385 10 3 0 87 5 9 0 0 609 6 777 21 66 47 1 3925 26 2 0 72 6 0 0 0 957 10 1502 26 120 46 0 3661 13 2 0 84 7 0 0 0 763 11 1171 24 85 51 1 5051 23 2 0 75 March 4, 2026 at 01:40:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3022 110 1541 24 144 31 0 4445 10 4 0 87 1 1 0 14 1082 12 1693 36 129 30 0 4155 19 3 0 78 2 0 0 0 780 6 1095 27 111 59 0 3204 14 2 0 84 3 11 0 10 1073 117 1289 23 118 43 0 3840 10 3 0 87 4 0 0 1301 938 116 1427 27 109 34 0 3528 15 3 0 82 5 2 0 0 810 12 1162 27 94 25 0 3276 22 2 0 76 6 0 0 0 732 4 1025 35 97 34 0 3068 27 2 0 71 7 0 0 0 607 9 737 24 59 53 0 3169 31 2 0 67 March 4, 2026 at 01:40:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2873 112 1158 32 133 37 0 4806 29 4 0 67 1 4 0 0 1071 8 1655 40 144 55 0 4592 22 3 0 75 2 2 0 0 932 4 1420 26 94 60 0 3940 16 3 0 82 3 12 0 21 1141 107 1476 27 118 43 0 4294 14 3 0 83 4 1 0 1330 802 107 1168 41 103 42 0 4069 27 3 0 70 5 4 0 0 783 12 1091 19 81 51 0 3926 13 2 0 85 6 3 0 0 836 11 1226 29 97 43 1 3313 14 2 0 84 7 4 0 0 863 21 1268 24 79 24 0 2825 10 2 0 89 March 4, 2026 at 01:40:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2905 106 1278 33 118 17 0 4788 30 4 0 66 1 2 0 0 886 9 1343 36 160 33 0 3573 12 2 0 85 2 4 0 0 983 6 1500 32 114 30 0 3674 20 3 0 78 3 4 0 21 1214 117 1551 52 157 26 1 3779 12 3 0 86 4 0 0 1355 804 119 1045 18 129 42 0 3042 17 3 0 80 5 0 0 0 715 8 906 35 75 30 0 3392 39 2 0 59 6 2 0 0 812 9 1189 26 123 41 0 2901 6 2 0 92 7 13 0 0 711 2 996 16 61 33 0 3008 9 2 0 89 March 4, 2026 at 01:40:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 23 2985 109 1424 31 164 102 0 4225 20 4 0 76 1 10 0 0 1080 16 1715 41 148 51 0 4289 24 3 0 73 2 0 0 0 1112 9 1816 23 137 83 0 3560 11 3 0 87 3 2 0 24 1223 162 1556 39 151 109 0 4697 16 3 0 81 4 0 0 1258 852 106 1214 25 129 87 0 4150 29 3 0 68 5 0 0 0 743 5 1073 21 101 64 1 4627 12 2 0 85 6 3 0 0 807 3 1222 24 114 86 0 3284 11 2 0 87 7 0 0 0 737 7 1089 16 92 86 0 3499 21 2 0 77 March 4, 2026 at 01:40:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3168 108 1788 25 146 31 1 3789 10 4 0 86 1 0 0 0 796 2 1173 57 124 49 0 5257 41 3 0 56 2 0 0 0 884 10 1292 23 115 27 0 3978 6 3 0 92 3 0 0 27 1306 119 1828 41 139 53 0 5084 13 3 0 84 4 2 0 1248 983 105 1545 31 126 35 0 3739 12 3 0 85 5 0 0 0 617 6 814 16 76 31 0 3519 14 2 0 85 6 0 0 0 791 10 1169 40 97 49 0 4607 38 2 0 60 7 0 0 0 805 15 1173 20 76 58 0 3110 14 2 0 85 March 4, 2026 at 01:40:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2833 107 1150 38 124 32 0 3489 23 3 0 74 1 0 0 0 736 4 1062 38 124 54 0 3664 30 2 0 68 2 2 0 0 754 12 1121 17 88 25 0 3945 15 2 0 83 3 0 0 10 1099 120 1343 29 114 38 0 3837 18 2 0 80 4 0 0 1151 901 111 1378 25 110 21 0 3024 11 3 0 86 5 1 0 0 787 19 1144 24 73 54 0 3416 17 2 0 81 6 0 0 9 797 6 1253 35 104 29 0 3280 16 2 0 82 7 0 0 0 692 2 1072 20 71 59 0 3458 16 2 0 82 March 4, 2026 at 01:40:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3044 104 1605 36 157 37 0 4047 15 4 0 81 1 2 0 0 680 6 919 52 101 35 0 3637 62 2 0 35 2 4 0 0 955 23 1467 31 114 32 0 4987 18 3 0 79 3 3 0 9 1160 108 1463 34 138 30 0 3682 8 2 0 89 4 0 0 1273 916 115 1357 20 127 33 0 3272 6 3 0 91 5 0 0 0 555 13 665 14 72 20 0 2838 9 2 0 89 6 6 0 11 861 7 1359 16 113 32 1 3138 6 2 0 92 7 0 0 0 698 7 1012 22 71 39 0 3085 22 2 0 76 March 4, 2026 at 01:40:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3087 103 1631 39 133 31 1 4085 23 4 0 73 1 6 0 0 1113 11 1771 40 153 38 0 3585 8 3 0 89 2 0 0 0 739 8 983 29 101 40 0 3288 22 2 0 76 3 0 0 22 1233 113 1667 38 150 52 1 4199 7 3 0 90 4 0 0 1369 867 108 1329 25 110 29 0 4394 12 3 0 84 5 0 0 0 774 5 1101 10 73 30 0 3291 11 2 0 87 6 0 0 0 706 8 941 33 92 63 1 5285 41 2 0 57 7 0 0 0 724 18 999 15 70 61 0 3629 18 2 0 80 March 4, 2026 at 01:40:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 3151 114 1799 43 181 90 1 4370 15 4 0 82 1 1 0 0 1180 12 1930 53 200 116 0 4760 18 3 0 79 2 25 0 0 891 5 1357 39 138 98 1 3650 21 3 0 76 3 0 0 23 1232 172 1493 52 164 85 1 5397 30 3 0 67 4 0 0 1288 1082 108 1698 19 161 84 0 5055 11 4 0 85 5 0 0 0 764 3 1102 13 82 90 0 3394 13 2 0 85 6 0 0 0 735 10 1042 28 121 92 0 4974 35 2 0 62 7 0 0 0 937 7 1489 12 93 58 0 3349 7 2 0 91 March 4, 2026 at 01:40:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2913 109 1228 46 129 64 0 5251 36 4 0 61 1 0 0 0 1140 15 1805 31 178 63 0 4208 21 3 0 76 2 0 0 0 886 7 1347 39 132 43 0 3570 13 3 0 85 3 0 0 23 1225 158 1592 53 140 117 0 5134 26 3 0 71 4 1 0 1345 896 106 1290 30 136 56 0 3501 7 3 0 90 5 0 0 0 897 5 1368 24 121 49 0 3033 9 2 0 89 6 23 0 0 915 5 1404 41 112 46 0 5072 25 3 0 73 7 10 0 0 741 13 1032 18 99 75 0 3133 10 2 0 88 March 4, 2026 at 01:40:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 3060 107 1509 40 147 35 0 4720 16 4 0 80 1 0 0 0 895 14 1317 27 133 24 0 3094 12 2 0 86 2 14 0 0 907 10 1370 31 100 47 0 3513 21 3 0 76 3 0 0 17 1143 120 1454 37 133 46 0 3648 9 2 0 89 4 0 0 1248 934 105 1439 27 114 34 0 3568 15 3 0 82 5 0 0 0 637 9 814 20 61 21 0 3131 30 2 0 68 6 0 0 0 863 19 1342 31 115 36 0 4334 12 2 0 86 7 13 0 0 736 6 1033 30 65 42 0 3410 32 2 0 66 March 4, 2026 at 01:40:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2938 107 1281 39 119 32 0 4920 30 4 0 67 1 0 0 0 1153 20 1872 42 143 39 0 4926 20 3 0 77 2 1 0 0 1066 6 1697 28 136 46 0 3701 8 3 0 89 3 1 0 17 1123 112 1368 42 129 65 0 5658 30 3 0 67 4 0 0 1344 841 110 1194 28 122 28 0 3738 19 3 0 78 5 0 0 0 856 14 1257 15 93 49 1 3049 7 2 0 90 6 26 0 0 908 4 1448 33 128 38 1 4790 9 3 0 88 7 0 0 0 726 8 1023 26 81 38 0 3819 24 2 0 74 March 4, 2026 at 01:40:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3014 115 1447 25 151 42 1 3737 14 4 0 83 1 0 0 7 954 11 1475 39 145 62 0 5044 28 3 0 69 2 1 0 0 877 19 1268 12 117 41 0 3047 8 2 0 90 3 3 0 16 1119 106 1425 40 98 99 1 5112 27 3 0 70 4 10 0 1340 778 105 1115 22 93 31 0 3867 24 3 0 73 5 0 0 0 874 6 1340 20 99 34 0 3458 9 2 0 89 6 1 0 0 862 5 1356 36 102 37 0 5418 27 2 0 71 7 9 0 0 717 3 1037 15 76 28 0 2942 8 2 0 91 March 4, 2026 at 01:40:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 0 3023 105 1461 42 152 119 1 4462 29 4 0 67 1 1 0 6 988 5 1567 40 147 81 0 5196 25 3 0 72 2 0 0 0 814 8 1145 43 124 119 0 5052 44 3 0 53 3 0 0 16 1412 165 2004 55 206 129 0 4641 14 3 0 82 4 2 0 1287 909 112 1329 24 154 105 0 4148 10 3 0 87 5 1 0 0 784 6 1108 22 91 51 0 3357 12 2 0 86 6 0 0 0 1033 20 1680 21 156 106 0 4063 5 2 0 92 7 0 0 0 818 2 1277 12 96 86 0 2652 5 2 0 93 March 4, 2026 at 01:40:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3035 102 1550 42 172 44 1 4254 18 4 0 79 1 1 0 7 1057 16 1625 31 150 42 0 4154 14 3 0 83 2 0 0 0 779 18 1104 25 86 36 0 3864 25 2 0 72 3 1 0 17 1121 116 1408 41 123 48 0 4416 26 2 0 72 4 3 0 1273 892 115 1271 28 117 38 0 3886 18 3 0 79 5 0 0 0 766 7 1123 25 82 42 0 3246 15 2 0 83 6 2 0 0 813 3 1276 23 100 28 0 3997 11 2 0 87 7 0 0 0 617 1 866 24 79 38 0 2979 16 1 0 83 March 4, 2026 at 01:40:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 51 0 0 2881 114 1340 24 146 46 0 3154 8 3 0 89 1 78 0 7 688 10 1028 42 108 18 1 3033 26 2 0 72 2 0 0 0 657 5 927 29 82 29 0 2734 18 2 0 80 3 22 0 17 1009 115 1305 28 131 32 0 4347 10 2 0 88 4 59 0 925 754 120 968 17 99 31 0 2806 14 2 0 84 5 53 0 0 599 15 870 15 61 18 0 2408 17 2 0 82 6 132 0 0 609 5 909 22 72 25 0 2874 14 2 0 84 7 88 0 0 596 2 915 17 62 45 0 2356 13 2 0 85 March 4, 2026 at 01:40:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 108 114 0 6 0 0 13 0 1 0 99 1 0 0 7 112 43 102 1 6 4 0 273 0 0 0 100 2 0 0 0 21 4 21 0 3 1 0 18 0 0 0 100 3 0 0 17 226 108 50 0 1 1 0 1711 0 0 0 99 4 0 0 17 217 104 18 0 2 0 0 318 0 0 0 100 5 0 0 0 27 10 16 0 2 0 0 20 1 0 0 99 6 0 0 0 30 6 32 0 2 0 0 311 0 0 0 100 7 0 0 0 13 0 8 0 2 4 0 13 0 0 0 100 March 4, 2026 at 01:41:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 105 115 0 4 0 0 0 0 1 0 99 1 0 0 7 82 35 78 0 4 0 0 261 0 0 0 100 2 0 0 0 32 12 24 0 1 0 0 0 0 0 0 100 3 0 0 17 217 106 40 2 0 0 0 1699 0 0 0 99 4 0 0 3 218 107 10 1 0 0 0 302 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 19 6 12 0 0 0 0 302 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:41:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 111 176 0 23 54 0 0 0 1 0 99 1 0 0 7 134 33 172 0 29 51 0 259 0 0 0 100 2 0 0 0 58 9 84 0 14 41 0 2 0 0 0 100 3 0 0 17 300 149 115 1 11 66 0 1701 0 1 0 99 4 0 0 3 283 106 146 0 7 38 0 300 0 0 0 100 5 0 0 0 42 2 70 0 13 50 0 0 0 0 0 100 6 0 0 0 58 7 91 0 13 51 0 303 0 0 0 100 7 0 0 0 43 0 69 0 8 32 0 0 0 0 0 100 March 4, 2026 at 01:41:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2121 100 141 1 8 1 3 26 0 1 0 99 1 15 0 12 23 2 17 1 4 13 3 286 0 0 0 100 2 281 0 2 120 51 121 0 5 19 2 123 0 0 0 100 3 9 0 21 225 105 65 2 9 2 7 1733 0 1 0 99 4 22 0 8 231 105 33 2 6 2 5 364 0 0 0 100 5 16 0 6 34 6 33 0 7 5 4 29 0 0 0 100 6 9 0 8 40 10 38 0 3 2 1 344 0 1 0 99 7 14 0 0 16 0 14 1 2 0 1 25 0 0 0 100 March 4, 2026 at 01:41:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 113 0 9 0 0 0 0 1 0 99 1 0 0 7 49 20 42 0 3 0 0 259 0 0 0 100 2 0 0 0 56 21 46 0 5 0 0 0 0 0 0 100 3 0 0 17 236 114 62 1 2 0 0 1649 0 1 0 99 4 0 0 3 218 105 8 0 0 0 0 301 0 0 0 100 5 0 0 7 12 2 8 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 1 0 294 0 0 0 100 7 0 0 0 10 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2122 115 109 0 8 0 0 0 0 1 0 99 1 0 0 7 114 36 113 0 10 0 0 259 0 0 0 100 2 0 0 0 15 3 12 0 1 0 0 8 0 0 0 100 3 0 0 17 231 107 56 2 2 0 0 1648 0 1 0 99 4 0 0 3 221 105 16 1 0 1 0 310 0 0 0 100 5 0 0 0 20 8 8 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 1 1 0 294 0 0 0 100 7 0 0 0 13 1 8 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:41:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 121 118 0 13 0 0 0 0 1 0 99 1 0 0 7 63 18 50 0 8 0 0 259 0 0 0 100 2 0 0 0 41 10 38 0 8 0 0 0 0 0 0 100 3 0 0 17 237 109 58 0 3 0 0 1641 0 1 0 99 4 0 0 3 214 105 6 0 0 0 0 300 0 0 0 100 5 0 0 0 13 2 8 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 7 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 112 117 0 6 2 0 0 0 0 0 100 1 0 0 7 79 34 74 1 2 2 0 259 0 0 0 100 2 0 0 0 16 1 10 0 2 2 0 0 0 0 0 100 3 0 0 17 243 111 66 2 3 3 0 1638 0 1 0 99 4 0 0 3 218 107 12 0 1 0 0 302 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 8 0 2 0 0 294 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 189 0 84 2257 108 305 7 47 19 4 932 6 1 0 93 1 123 0 7 165 12 226 12 48 19 1 1643 7 1 0 92 2 3097 0 1 219 31 236 9 36 44 8 1346 7 1 0 92 3 703 0 22 422 108 353 10 53 39 10 2937 7 1 0 92 4 1887 0 183 372 106 260 9 40 27 5 1301 6 1 0 93 5 256 0 0 178 7 314 4 37 10 8 910 2 0 0 98 6 445 0 0 154 3 259 7 44 26 4 1186 3 0 0 96 7 146 0 0 121 1 197 4 30 20 3 1300 2 0 0 97 March 4, 2026 at 01:41:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 290 0 0 2371 109 433 10 73 31 2 1608 13 2 0 85 1 306 0 7 287 9 404 23 74 47 1 2249 34 1 0 65 2 393 0 0 280 4 369 23 63 60 2 2030 24 1 0 75 3 249 0 2 478 110 409 26 74 41 1 3759 34 1 0 65 4 232 0 396 412 112 336 27 74 26 0 2303 40 1 0 59 5 153 0 0 271 14 353 19 57 34 0 1648 20 1 0 80 6 131 0 0 278 12 380 18 77 38 0 1734 22 1 0 77 7 309 0 0 253 4 307 18 44 44 0 2197 18 1 0 81 March 4, 2026 at 01:41:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2331 112 404 19 73 35 1 1450 17 1 0 82 1 10 0 7 263 10 357 28 59 17 0 2105 37 1 0 63 2 10 0 0 209 5 235 15 44 22 0 1322 27 1 0 73 3 56 0 2 429 112 336 19 56 30 0 3179 25 1 0 74 4 9 0 284 410 114 318 23 55 40 0 1688 36 1 0 63 5 5 0 14 216 19 265 15 49 19 0 1783 19 1 0 81 6 7 0 0 239 3 332 28 52 3 0 1526 33 1 0 66 7 6 0 0 221 5 319 11 40 4 0 1463 11 1 0 88 March 4, 2026 at 01:41:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 28 2375 105 443 15 90 12 0 2373 21 2 0 78 1 158 0 6 391 10 541 23 104 18 0 2727 27 1 0 72 2 128 0 0 284 5 398 17 76 16 0 2191 21 1 0 78 3 41 0 16 557 113 493 25 104 23 0 4162 28 1 0 71 4 34 0 433 501 120 515 16 84 16 0 1871 16 1 0 82 5 2 0 0 276 10 361 16 66 21 0 2120 12 1 0 87 6 145 0 0 290 10 385 25 85 50 0 3044 35 1 0 64 7 136 0 0 225 4 249 26 48 27 0 2291 42 1 0 58 March 4, 2026 at 01:41:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2341 114 384 31 81 40 0 1917 28 1 0 70 1 43 0 0 284 12 423 20 94 92 1 1358 24 1 0 76 2 0 0 7 262 11 352 18 70 74 1 1618 20 1 0 79 3 3 0 2 490 162 348 23 64 35 0 2549 20 1 0 79 4 51 0 228 425 117 355 15 77 54 0 1470 27 1 0 72 5 48 0 0 221 8 308 17 66 82 0 1771 27 1 0 72 6 7 0 0 238 5 359 32 80 89 0 1580 29 1 0 71 7 2 0 0 177 5 213 19 43 48 0 1045 29 0 0 71 March 4, 2026 at 01:41:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 14 2419 114 480 18 91 20 0 2362 19 2 0 79 1 59 0 0 394 10 595 28 94 36 0 3572 29 1 0 70 2 72 0 7 339 10 430 26 74 17 0 2329 22 1 0 77 3 2 0 3 552 114 469 25 84 46 0 2770 32 1 0 67 4 91 0 519 477 109 474 26 92 39 0 2997 26 1 0 72 5 180 0 0 323 6 379 18 72 36 0 2467 28 1 0 71 6 126 0 0 376 7 530 21 97 19 0 3768 28 1 0 71 7 32 0 0 282 4 374 13 68 47 0 1885 17 1 0 83 March 4, 2026 at 01:41:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 14 2317 116 369 8 63 8 0 1490 5 1 0 93 1 12 0 0 239 9 307 27 45 23 0 2048 35 1 0 64 2 12 0 7 225 7 313 16 42 55 0 3010 20 1 0 79 3 3 0 3 436 111 442 30 53 19 0 2284 42 1 0 58 4 8 0 329 434 114 377 17 69 5 0 1711 25 1 0 74 5 6 0 0 242 5 327 9 46 17 0 1156 13 1 0 87 6 8 0 0 225 10 253 34 39 50 2 2179 48 1 0 51 7 5 0 0 208 7 277 8 36 5 0 1112 11 0 0 89 March 4, 2026 at 01:41:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 54 0 14 2377 109 390 24 75 22 0 2572 27 2 0 72 1 6 0 0 364 10 522 28 95 23 0 2895 32 1 0 67 2 100 0 7 345 18 472 13 82 55 0 3739 15 1 0 84 3 46 0 2 538 119 434 34 82 13 0 2693 34 1 0 66 4 108 0 494 456 108 429 28 81 17 0 2450 27 1 0 72 5 81 0 0 281 13 337 10 68 12 1 1776 20 1 0 79 6 25 0 0 381 10 553 23 92 33 1 3115 27 1 0 72 7 107 0 0 311 5 428 23 65 8 0 2070 20 1 0 79 March 4, 2026 at 01:41:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 93 0 35 2337 114 360 20 74 37 1 2639 29 2 0 69 1 8 0 0 333 8 480 30 81 22 0 3111 27 1 0 72 2 1 0 7 293 13 367 10 64 31 0 2076 13 1 0 86 3 4 0 3 488 115 379 22 81 10 0 2181 31 1 0 68 4 8 0 367 454 114 372 22 62 15 0 1746 27 1 0 72 5 5 0 0 228 6 305 9 58 12 0 1416 13 1 0 87 6 90 0 0 276 4 388 26 72 17 0 2001 40 1 0 59 7 54 0 0 254 6 338 19 62 35 0 2210 22 1 0 78 March 4, 2026 at 01:41:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 0 2402 105 461 28 83 69 0 2554 41 2 0 57 1 34 0 0 364 10 519 28 104 81 0 2142 31 1 0 68 2 1 0 7 331 3 464 17 94 67 0 3635 20 1 0 79 3 1 0 3 588 156 496 29 98 88 0 2109 36 1 0 63 4 36 0 437 446 115 430 22 90 74 0 2184 19 1 0 80 5 0 0 14 303 13 394 21 70 46 2 1897 19 1 0 80 6 0 0 0 334 14 502 20 92 67 0 1960 20 1 0 79 7 15 0 0 258 7 345 17 62 64 0 2162 16 1 0 83 March 4, 2026 at 01:41:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2367 108 432 20 75 15 1 2206 13 2 0 86 1 8 0 0 370 9 494 25 69 30 0 2497 31 1 0 68 2 2 0 7 310 22 362 27 55 34 1 2392 34 1 0 65 3 89 0 3 538 108 487 24 78 18 1 2100 26 1 0 73 4 2 0 423 436 109 428 27 79 29 0 3603 35 1 0 64 5 0 0 14 261 19 317 15 49 25 1 1900 17 1 0 82 6 2 0 0 298 11 412 25 68 11 0 2222 26 1 0 73 7 41 0 0 220 8 266 7 46 30 1 1766 16 1 0 83 March 4, 2026 at 01:41:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 66 0 0 2352 117 360 17 68 28 0 1618 22 1 0 77 1 39 0 0 305 8 425 25 81 50 0 2083 20 1 0 80 2 2 0 7 244 5 318 18 58 18 1 1927 30 1 0 69 3 5 0 4 468 110 333 28 82 49 0 2304 40 1 0 60 4 1 0 394 409 108 364 25 66 25 0 2943 24 1 0 75 5 30 0 0 220 2 237 22 47 49 0 1741 38 1 0 61 6 10 0 14 276 19 353 15 71 23 0 2550 17 1 0 82 7 31 0 0 252 7 330 11 51 39 0 1755 10 1 0 89 March 4, 2026 at 01:41:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2425 108 555 20 106 24 2 2071 11 2 0 87 1 3 0 0 405 11 605 38 103 32 0 2729 24 1 0 75 2 2 0 7 321 12 399 28 87 60 2 2905 35 1 0 64 3 1 0 4 552 110 488 31 98 34 0 3147 35 1 0 64 4 0 0 408 480 114 492 25 94 28 1 3876 28 1 0 70 5 0 0 0 282 17 362 19 69 24 1 2185 28 1 0 72 6 0 0 14 305 9 440 18 77 87 1 3062 24 1 0 75 7 3 0 0 292 6 387 22 74 24 0 1939 17 1 0 82 March 4, 2026 at 01:41:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 73 0 0 2346 107 387 23 73 25 0 2100 23 1 0 76 1 6 0 6 293 16 375 18 76 13 0 1965 23 1 0 76 2 7 0 0 270 5 380 16 58 17 0 1344 21 1 0 79 3 0 0 4 453 111 293 30 64 34 1 2203 39 1 0 60 4 22 0 324 388 113 287 23 63 19 0 2849 24 1 0 75 5 29 0 0 201 10 215 18 46 6 0 1698 29 1 0 71 6 3 0 14 245 17 324 23 59 23 0 2461 31 1 0 68 7 0 0 0 206 7 249 15 43 17 0 1171 15 0 0 85 March 4, 2026 at 01:41:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2485 117 590 22 114 53 0 3122 17 2 0 81 1 7 0 0 451 18 627 35 135 65 0 2832 35 1 0 64 2 3 0 7 380 10 517 17 113 75 1 2540 21 1 0 78 3 5 0 3 682 157 680 27 126 96 0 2466 23 1 0 76 4 23 0 560 477 106 512 30 116 80 0 3701 24 2 0 74 5 2 0 0 304 4 370 23 78 46 0 2245 17 1 0 82 6 0 0 10 373 7 549 21 128 69 0 3093 29 1 0 70 7 0 0 0 303 4 361 25 77 61 0 2135 36 1 0 63 March 4, 2026 at 01:41:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 18 2393 116 462 18 103 21 0 2588 7 2 0 91 1 70 0 0 343 8 420 35 78 38 1 2468 36 1 0 62 2 6 0 6 305 11 400 15 72 33 0 2523 13 1 0 86 3 5 0 3 506 110 394 28 75 12 0 2470 31 1 0 68 4 1 0 406 448 113 359 32 83 23 0 2366 50 1 0 49 5 1 0 0 286 9 353 18 59 61 1 2329 18 1 0 81 6 4 0 14 325 10 486 18 92 23 0 3575 23 1 0 76 7 4 0 0 284 7 395 14 60 4 0 1499 18 1 0 81 March 4, 2026 at 01:41:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2342 113 361 18 73 29 3 2580 21 2 0 78 1 3 0 0 301 11 388 19 83 21 0 1815 22 1 0 77 2 2 0 0 250 5 328 23 55 75 3 2324 31 1 0 68 3 2 0 4 477 107 384 25 80 24 0 2709 28 1 0 71 4 1 0 366 424 108 368 17 74 29 0 1997 31 1 0 68 5 0 0 0 222 8 267 19 54 21 2 1681 28 1 0 71 6 71 0 14 311 16 472 23 72 58 0 3298 24 1 0 75 7 5 0 7 216 8 264 9 50 8 0 1797 18 1 0 82 March 4, 2026 at 01:41:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2448 113 532 28 103 46 1 3281 24 2 0 74 1 4 0 0 388 6 555 34 97 7 0 2559 40 1 0 59 2 3 0 0 347 7 455 27 89 35 0 2699 28 1 0 71 3 1 0 10 572 112 509 28 95 15 0 3431 28 1 0 71 4 2 0 479 458 111 406 25 99 36 0 2332 33 1 0 66 5 0 0 0 350 18 424 18 87 30 0 2111 14 1 0 86 6 2 0 14 309 13 421 20 96 31 1 2712 23 1 0 77 7 3 0 0 284 12 384 14 68 20 0 3237 17 1 0 82 March 4, 2026 at 01:41:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 2409 107 497 16 82 27 1 3038 19 2 0 79 1 29 0 0 353 7 472 29 92 40 2 2284 31 1 0 68 2 1 0 0 326 8 407 24 78 53 1 2414 28 1 0 71 3 2 0 10 563 117 535 18 95 28 0 2966 24 1 0 75 4 2 0 475 496 116 496 17 93 7 0 2113 18 1 0 81 5 18 0 0 291 5 378 18 65 25 0 2168 22 1 0 77 6 1 0 12 305 8 432 23 76 31 2 2642 34 1 0 66 7 4 0 0 245 7 326 19 56 38 0 3340 23 1 0 76 March 4, 2026 at 01:41:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39 0 0 2352 113 373 28 82 56 2 2387 29 1 0 70 1 0 0 0 307 6 438 28 105 72 0 2106 34 1 0 65 2 0 0 0 279 5 352 28 82 109 0 1827 36 1 0 63 3 0 0 3 562 169 489 26 108 62 0 2255 24 1 0 76 4 35 0 332 503 116 492 16 101 58 1 2147 15 1 0 84 5 0 0 0 258 10 358 11 64 70 2 1564 12 1 0 88 6 3 0 0 276 8 387 29 76 100 2 1766 36 1 0 63 7 4 0 14 260 6 414 19 67 42 0 2809 19 1 0 80 March 4, 2026 at 01:41:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 83 0 0 2385 110 471 25 100 16 1 4324 22 2 0 76 1 0 0 0 375 14 507 19 97 31 0 2676 26 1 0 73 2 30 0 0 332 14 441 21 81 55 0 2465 17 1 0 82 3 0 0 7 571 115 505 38 107 23 0 3166 38 1 0 61 4 2 0 490 488 115 495 24 85 6 0 2461 31 1 0 68 5 34 0 0 339 7 435 18 79 26 2 2074 24 1 0 75 6 29 0 0 350 12 481 25 95 39 0 2830 31 1 0 68 7 43 0 14 290 7 371 13 60 13 0 1851 17 1 0 83 March 4, 2026 at 01:41:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2417 116 512 28 102 14 0 3319 18 2 0 80 1 2 0 14 354 6 501 26 94 27 0 3715 38 1 0 61 2 0 0 0 343 9 467 13 73 47 0 1985 17 1 0 82 3 5 0 4 517 107 424 23 80 20 1 3139 32 1 0 67 4 2 0 485 508 114 533 23 102 6 0 2519 33 1 0 66 5 60 0 0 331 5 424 15 75 31 0 2286 15 1 0 84 6 4 0 0 335 13 471 21 89 47 0 2801 25 1 0 74 7 2 0 0 335 9 457 21 63 22 0 2195 23 1 0 77 March 4, 2026 at 01:41:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 20 2429 119 504 24 90 10 0 3548 27 2 0 71 1 0 0 13 368 9 443 35 91 30 0 3528 32 1 0 67 2 1 0 0 326 11 395 15 66 53 1 1943 23 1 0 77 3 0 0 3 571 110 511 24 98 32 1 3081 25 1 0 74 4 0 0 518 433 107 419 15 83 5 0 1826 20 1 0 79 5 0 0 7 321 15 407 18 74 29 0 2051 21 1 0 78 6 0 0 0 334 8 438 30 86 47 0 2626 34 1 0 65 7 0 0 0 309 8 405 13 74 45 0 2434 20 1 0 80 March 4, 2026 at 01:41:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 76 0 0 2373 110 424 23 76 31 0 1754 35 1 0 64 1 1 0 14 315 12 452 32 76 48 0 4540 35 1 0 64 2 0 0 0 312 8 416 14 69 28 0 1993 13 1 0 86 3 0 0 3 536 110 473 25 81 10 0 2709 27 1 0 72 4 0 0 409 423 113 374 21 84 48 0 2404 34 1 0 65 5 2 0 7 251 16 314 11 56 50 1 2188 22 1 0 78 6 2 0 0 294 7 428 15 86 23 0 2063 20 1 0 79 7 21 0 0 244 7 315 15 48 5 0 2151 13 1 0 86 March 4, 2026 at 01:41:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2405 112 498 29 103 74 0 2035 28 2 0 71 1 0 0 0 365 15 535 27 106 71 0 4186 34 1 0 65 2 0 0 14 311 5 425 14 77 77 0 2177 22 1 0 78 3 0 0 3 605 160 496 34 96 59 0 2789 31 1 0 68 4 0 0 423 478 114 477 21 96 66 0 2091 27 1 0 72 5 0 0 7 307 10 416 21 81 66 0 2151 16 1 0 83 6 0 0 0 332 4 489 24 97 70 0 2220 25 1 0 74 7 0 0 0 275 3 392 21 78 75 0 1955 20 1 0 79 March 4, 2026 at 01:41:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2415 108 460 24 86 4 0 2349 25 2 0 74 1 0 0 0 349 12 489 26 93 57 0 3990 32 1 0 67 2 0 0 14 337 9 441 21 75 21 2 2524 18 1 0 81 3 0 0 2 545 107 467 30 95 15 0 2595 42 1 0 57 4 0 0 529 510 116 534 26 113 7 0 3085 29 1 0 70 5 0 0 0 363 16 454 15 95 46 0 2060 10 1 0 89 6 0 0 0 342 7 483 18 82 29 0 3240 26 1 0 73 7 0 0 0 279 7 315 17 61 37 2 2182 17 1 0 82 March 4, 2026 at 01:41:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2448 107 528 19 103 27 0 2373 16 2 0 83 1 0 0 0 370 11 441 36 87 37 0 3351 39 1 0 60 2 0 0 14 375 8 490 20 78 10 0 2558 23 1 0 76 3 1 0 3 572 110 533 28 107 28 0 3684 22 1 0 76 4 35 0 595 489 118 475 25 91 23 1 2939 31 1 0 68 5 0 0 0 332 10 416 16 74 44 0 2288 21 1 0 78 6 0 0 0 335 6 440 19 84 21 0 3419 27 1 0 72 7 0 0 0 274 5 345 19 69 26 0 2353 20 1 0 79 March 4, 2026 at 01:41:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 15 2421 109 478 17 103 59 0 2298 18 2 0 80 1 0 0 0 426 5 611 29 117 50 1 2769 28 1 0 71 2 1 0 14 364 10 462 22 76 22 0 2939 22 1 0 77 3 20 0 3 572 112 507 32 91 25 0 4238 39 1 0 60 4 65 0 562 455 109 405 37 86 57 0 3240 44 1 0 54 5 48 0 7 334 17 404 17 69 39 1 2887 23 1 0 76 6 0 0 0 399 21 570 25 101 25 0 2601 16 1 0 83 7 32 0 0 284 7 340 16 68 21 0 2205 15 1 0 84 March 4, 2026 at 01:41:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2450 117 498 14 102 30 0 2647 16 2 0 82 1 1 0 0 427 9 598 23 117 22 1 3126 18 1 0 81 2 0 0 14 381 9 505 21 95 11 0 2792 15 1 0 84 3 0 0 3 566 107 462 30 93 22 0 2954 48 1 0 51 4 33 0 601 476 108 507 24 103 19 1 4162 42 2 0 57 5 0 0 0 339 5 427 22 82 17 0 2395 20 1 0 80 6 0 0 7 354 9 480 26 93 13 1 3401 27 1 0 72 7 0 0 0 342 13 462 18 80 23 0 2601 16 1 0 83 March 4, 2026 at 01:41:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2464 104 568 38 122 71 1 2693 37 2 0 61 1 1 0 0 467 11 673 32 133 72 0 3138 16 1 0 83 2 0 0 13 412 9 574 23 89 86 1 3122 20 1 0 79 3 1 0 4 720 172 708 28 130 90 0 2867 28 1 0 71 4 0 0 601 542 115 595 26 139 62 1 2784 30 2 0 69 5 0 0 0 408 12 582 27 106 80 1 3827 24 1 0 75 6 0 0 0 434 8 636 38 120 91 1 3515 34 1 0 65 7 1 0 7 368 9 513 16 114 83 0 3373 15 1 0 84 March 4, 2026 at 01:41:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2448 119 522 19 117 40 1 2299 23 2 0 75 1 0 0 0 377 8 491 19 104 44 0 2724 26 1 0 73 2 0 0 0 338 10 421 27 93 17 0 2571 23 1 0 76 3 0 0 3 597 104 564 36 110 26 0 3114 35 1 0 64 4 0 0 619 485 112 506 21 114 36 0 3222 25 1 0 74 5 0 0 0 360 8 485 15 86 41 1 3806 26 1 0 73 6 0 0 7 403 14 537 15 117 15 0 3195 21 1 0 78 7 0 0 0 307 13 376 17 80 17 0 2773 22 1 0 78 March 4, 2026 at 01:41:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 39 2448 108 557 24 110 21 0 2516 21 2 0 78 1 0 0 0 401 9 570 31 112 50 0 2847 28 1 0 71 2 0 0 0 362 8 430 32 83 10 1 2628 39 1 0 60 3 0 0 3 602 109 555 27 100 27 0 3080 30 1 0 69 4 0 0 585 494 117 496 18 110 20 0 3504 28 1 0 71 5 0 0 0 327 7 440 17 81 30 0 3456 18 1 0 81 6 0 0 0 374 16 489 21 95 21 0 2965 21 1 0 78 7 0 0 0 293 6 372 17 69 26 0 2496 16 1 0 83 March 4, 2026 at 01:41:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2518 108 669 26 132 34 0 2744 23 2 0 75 1 0 0 0 469 12 663 38 129 30 0 3550 32 1 0 67 2 0 0 0 435 12 579 35 106 47 0 2763 29 1 0 70 3 0 0 3 641 107 641 31 141 31 0 3796 40 1 0 59 4 0 0 667 515 111 565 27 121 24 0 3843 24 1 0 74 5 0 0 0 377 10 522 14 85 23 0 3697 18 1 0 81 6 0 0 0 407 14 535 24 123 56 0 3971 24 1 0 75 7 0 0 0 365 9 503 10 84 20 0 2656 8 1 0 91 March 4, 2026 at 01:41:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2501 108 672 25 98 12 1 2429 15 2 0 83 1 0 0 0 398 5 519 34 112 29 0 3690 45 1 0 54 2 0 0 0 383 7 511 15 85 21 0 2680 22 1 0 77 3 0 0 11 602 109 544 29 115 57 0 3560 39 1 0 59 4 0 0 647 481 124 477 15 103 13 0 3021 26 1 0 73 5 0 0 0 392 15 511 14 86 26 0 1988 13 1 0 86 6 0 0 0 361 10 507 24 110 28 0 4120 27 1 0 72 7 0 0 0 357 7 470 15 77 46 0 3148 15 1 0 84 March 4, 2026 at 01:41:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2533 110 660 29 131 55 0 3025 25 2 0 73 1 0 0 0 510 12 743 28 153 76 0 3946 32 1 0 67 2 1 0 0 486 9 662 20 145 83 0 3169 21 1 0 78 3 3 0 10 759 155 790 39 147 76 0 3693 35 1 0 64 4 1 0 703 600 116 753 30 163 70 0 3700 19 2 0 79 5 3 0 0 470 3 680 25 118 101 1 3576 22 1 0 77 6 1 0 0 463 9 684 29 155 70 0 4906 29 1 0 70 7 0 0 0 406 9 548 16 113 53 0 2949 18 1 0 81 March 4, 2026 at 01:41:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2548 107 653 27 125 30 0 3304 24 2 0 74 1 3 0 0 491 10 680 28 135 41 0 4067 36 2 0 62 2 1 0 0 475 12 600 21 117 28 0 3810 25 1 0 74 3 1 0 10 680 112 643 28 122 33 0 4573 35 1 0 63 4 5 0 811 593 112 715 30 146 41 0 4149 26 2 0 72 5 0 0 0 456 11 599 20 112 34 0 3376 19 1 0 80 6 5 0 13 510 12 757 30 139 51 1 5340 27 2 0 72 7 3 0 0 494 7 686 14 104 20 0 2810 11 1 0 88 March 4, 2026 at 01:41:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 3 2591 110 765 26 142 22 0 3219 20 2 0 78 1 2 0 0 528 12 734 37 157 47 0 4093 32 2 0 66 2 0 0 0 491 7 667 26 115 24 1 3840 27 1 0 71 3 8 0 10 750 112 822 38 156 58 0 4327 28 2 0 70 4 1 0 783 572 110 672 28 160 31 0 4550 30 2 0 68 5 0 0 0 434 8 587 19 121 39 0 3630 23 1 0 76 6 2 0 13 524 8 846 29 137 24 0 4897 24 1 0 75 7 3 0 0 435 13 594 20 102 69 0 3180 18 1 0 81 March 4, 2026 at 01:41:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2645 105 798 29 161 42 0 4816 36 2 0 62 1 3 0 0 637 18 879 31 184 46 0 4583 29 2 0 69 2 3 0 0 547 8 709 35 129 61 0 4200 27 2 0 71 3 5 0 10 802 117 857 28 177 30 0 5366 26 2 0 72 4 6 0 984 676 114 882 24 164 45 1 4496 20 2 0 78 5 1 0 0 549 17 744 19 135 50 0 3683 16 1 0 83 6 2 0 14 582 12 860 37 172 36 1 5658 27 2 0 71 7 0 0 0 519 6 682 25 105 21 0 3349 18 1 0 81 March 4, 2026 at 01:41:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2708 103 958 28 174 46 0 4204 23 3 0 74 1 16 0 0 714 10 1063 36 205 39 0 4974 24 2 0 74 2 119 0 0 572 5 784 24 159 67 0 4631 20 2 0 79 3 20 0 10 874 110 982 27 193 60 0 5542 26 2 0 72 4 3 0 1024 725 117 1002 26 191 45 0 5290 18 2 0 80 5 13 0 0 655 13 926 23 154 35 0 4667 20 2 0 79 6 27 0 0 685 12 1084 29 189 48 1 5872 22 2 0 76 7 66 0 9 569 8 811 26 148 73 0 4265 18 1 0 80 March 4, 2026 at 01:41:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 100 71 0 12 58 0 15 0 1 0 99 1 0 0 0 104 0 200 0 12 45 0 16 0 0 0 100 2 0 0 0 60 0 94 0 15 52 0 8 0 0 0 100 3 0 0 10 425 163 214 1 18 48 0 569 0 0 0 100 4 0 0 17 370 155 221 0 14 60 0 577 0 0 0 100 5 0 0 0 48 2 68 0 14 52 0 40 0 0 0 100 6 0 0 0 63 5 128 1 18 50 0 1140 0 0 0 99 7 1 0 14 58 6 83 0 12 32 0 270 0 0 0 100 March 4, 2026 at 01:41:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 100 16 0 2 3 0 8 0 1 0 99 1 0 0 0 16 1 16 0 1 3 0 5 0 0 0 100 2 0 0 0 20 1 14 0 1 3 0 3 0 0 0 100 3 0 0 14 324 112 118 1 0 3 0 575 0 0 0 100 4 0 0 7 313 148 108 0 4 4 0 302 0 0 0 100 5 0 0 0 25 8 20 0 2 2 0 297 0 0 0 100 6 0 0 0 30 9 54 1 1 2 0 1165 0 0 0 100 7 0 0 14 21 5 20 0 1 1 0 268 0 0 0 100 March 4, 2026 at 01:41:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 134 102 0 8 0 0 0 0 1 0 99 1 0 0 0 77 5 72 0 7 0 0 0 0 0 0 100 2 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 3 0 0 10 226 111 20 0 0 0 0 567 0 0 0 100 4 0 0 3 212 103 4 1 0 1 0 300 0 0 0 100 5 0 0 0 38 13 29 0 2 1 0 294 0 0 0 100 6 0 0 0 11 2 36 1 1 0 0 1134 0 0 0 100 7 0 0 14 11 3 8 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:41:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 14 2155 124 123 0 19 2 2 36 0 1 0 99 1 15 0 4 122 23 127 0 19 4 8 43 0 0 0 100 2 288 0 5 40 3 33 0 7 14 0 121 0 0 0 100 3 13 0 20 242 110 50 1 4 2 9 615 0 0 0 100 4 9 0 11 230 105 30 2 4 2 2 320 0 0 0 100 5 0 0 10 26 10 21 3 6 1 2 315 0 0 0 100 6 26 0 5 33 6 70 1 5 3 4 1189 0 0 0 99 7 14 0 22 43 4 50 0 9 3 5 321 0 1 0 99 March 4, 2026 at 01:41:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 131 108 0 19 0 0 0 0 1 0 99 1 0 0 0 89 11 75 0 14 0 0 0 0 0 0 100 2 0 0 0 43 8 38 0 7 0 0 0 0 0 0 100 3 0 0 10 216 105 8 1 0 0 0 559 0 0 0 100 4 0 0 3 214 104 6 0 0 1 0 301 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 295 0 0 0 100 6 0 0 0 15 3 38 1 1 0 0 1078 0 0 0 100 7 0 0 21 16 5 14 0 1 0 0 268 0 0 0 100 March 4, 2026 at 01:41:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 109 99 0 8 2 0 0 0 1 0 99 1 0 0 0 98 38 91 0 7 0 0 0 0 0 0 100 2 0 0 0 37 3 28 0 6 0 0 0 0 0 0 100 3 0 0 10 216 105 10 0 0 2 0 559 0 0 0 100 4 0 0 3 214 103 8 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 18 5 42 1 0 0 0 1075 0 0 0 100 7 0 0 14 17 4 14 0 2 2 0 267 0 0 0 100 March 4, 2026 at 01:41:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 118 93 0 14 0 0 0 0 1 0 99 1 0 0 0 71 14 58 0 12 0 0 0 0 0 0 100 2 0 0 0 59 20 50 0 3 0 0 0 0 0 0 100 3 0 0 10 247 108 46 0 6 2 0 559 0 0 0 100 4 0 0 3 216 104 5 1 1 0 0 299 0 0 0 100 5 0 0 0 12 4 5 0 1 1 0 294 0 0 0 100 6 0 0 0 15 4 38 1 0 2 0 1075 0 0 0 100 7 0 0 14 12 3 8 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:41:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 114 100 0 15 0 0 0 0 1 0 99 1 0 0 0 99 34 88 0 11 0 0 1 0 0 0 100 2 0 0 0 38 3 26 0 2 0 0 0 0 0 0 100 3 0 0 10 216 105 10 0 0 0 0 559 0 0 0 100 4 0 0 3 214 103 13 0 1 0 0 301 0 0 0 100 5 0 0 0 7 1 2 0 0 1 0 294 0 0 0 100 6 0 0 0 12 3 36 1 0 0 0 1074 0 0 0 100 7 0 0 14 13 4 10 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:41:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 242 0 0 2190 108 232 4 34 15 2 1059 5 1 0 94 1 45 0 0 148 24 186 5 40 8 2 784 2 1 0 97 2 4666 0 9 139 17 203 6 26 35 4 1052 4 1 0 94 3 730 0 11 316 107 202 7 35 15 8 1414 3 1 0 96 4 426 0 87 273 103 152 2 28 20 6 871 1 0 0 98 5 333 0 0 131 10 203 4 23 11 10 719 2 0 0 98 6 187 0 0 102 6 171 3 25 24 6 1702 2 0 0 97 7 173 0 14 87 5 126 4 22 12 3 760 3 0 0 97 March 4, 2026 at 01:41:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 74 0 0 2551 107 723 37 153 16 0 3543 18 2 0 80 1 152 0 0 511 17 763 49 150 24 1 4010 24 2 0 75 2 144 0 0 455 5 654 32 138 17 0 3797 15 1 0 83 3 120 0 10 725 117 826 39 170 17 1 4170 17 1 0 82 4 182 0 690 573 105 711 30 173 20 1 3771 14 2 0 85 5 44 0 0 417 5 583 27 112 24 0 3206 11 1 0 88 6 7 0 0 428 10 615 36 140 21 0 4547 17 1 0 82 7 50 0 14 391 7 526 21 95 17 1 3541 18 1 0 82 March 4, 2026 at 01:41:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 112 179 1 17 47 0 317 0 1 0 99 1 0 0 0 193 43 267 0 21 44 0 8 0 0 0 100 2 0 0 0 52 0 85 0 9 36 0 6 0 0 0 100 3 0 0 10 333 161 109 1 12 45 0 275 0 0 0 100 4 0 0 17 278 109 124 1 20 56 0 323 0 0 0 99 5 0 0 0 43 1 65 0 13 51 0 294 0 0 0 100 6 0 0 0 67 4 137 1 17 68 0 1144 0 0 0 99 7 0 0 14 44 1 72 1 11 45 0 267 0 0 0 100 March 4, 2026 at 01:41:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 111 113 0 11 3 0 300 0 1 0 99 1 0 0 0 91 32 82 0 11 4 0 0 0 0 0 100 2 0 0 0 50 13 42 0 11 1 0 2 0 0 0 100 3 0 0 10 227 113 18 0 1 4 0 260 0 0 0 100 4 0 0 3 215 104 12 0 1 2 0 300 0 0 0 100 5 0 0 0 21 7 16 0 2 2 0 303 0 0 0 100 6 0 0 0 34 4 66 1 2 2 0 1132 0 0 0 100 7 0 0 14 12 2 10 0 1 2 0 266 0 0 0 100 March 4, 2026 at 01:41:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 114 110 1 4 0 0 300 0 1 0 99 1 0 0 0 63 17 54 0 3 0 0 0 0 0 0 100 2 0 0 0 53 23 48 0 1 0 0 0 0 0 0 100 3 0 0 10 214 104 8 0 1 0 0 260 0 0 0 100 4 0 0 3 214 103 12 0 1 1 0 300 0 0 0 100 5 0 0 0 21 8 16 0 0 0 0 304 0 0 0 100 6 0 0 0 19 2 42 0 1 0 0 1131 0 0 0 100 7 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:41:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2128 110 129 1 18 2 0 321 0 1 0 99 1 16 0 2 30 1 39 1 6 8 7 43 0 0 0 100 2 290 0 7 97 29 90 0 12 6 3 117 0 1 0 99 3 7 0 13 247 110 47 0 12 0 4 299 0 0 0 100 4 5 0 7 266 116 77 2 8 3 3 382 0 0 0 100 5 3 0 5 46 14 40 0 3 1 4 350 0 0 0 100 6 1 0 0 30 2 51 1 1 6 0 1150 0 0 0 100 7 23 0 20 21 1 25 0 5 2 6 300 0 0 0 100 March 4, 2026 at 01:42:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 15 0 1 0 0 300 0 1 0 99 1 0 0 7 13 2 8 0 2 0 0 0 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 10 317 109 109 0 3 0 0 259 0 0 0 100 4 0 0 3 306 149 96 1 1 0 0 301 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 295 0 0 0 100 6 0 0 0 19 2 42 1 0 0 0 1080 0 0 0 100 7 0 0 14 12 3 8 1 0 0 0 268 0 0 0 100 March 4, 2026 at 01:42:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2133 125 100 0 15 1 0 300 0 1 0 99 1 0 0 0 54 12 42 0 8 1 0 0 0 0 0 100 2 0 0 0 38 4 32 0 6 2 0 0 0 0 0 100 3 0 0 10 237 105 26 1 0 0 0 259 0 0 0 100 4 0 0 3 232 113 26 0 1 1 0 302 0 0 0 100 5 0 0 0 27 4 18 1 3 1 0 294 0 0 0 100 6 0 0 0 25 2 56 1 2 2 0 1074 0 0 0 100 7 0 0 14 11 2 6 0 0 1 0 266 0 0 0 100 March 4, 2026 at 01:42:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 113 117 1 11 0 0 300 0 1 0 99 1 0 0 0 81 32 68 0 5 0 0 0 0 0 0 100 2 0 0 0 36 9 26 0 5 0 0 0 0 0 0 100 3 0 0 10 213 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 2 0 0 1 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 1 0 294 0 0 0 100 6 0 0 0 20 2 44 0 0 1 0 1074 0 0 0 100 7 0 0 14 13 1 14 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:42:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 105 70 0 5 0 0 300 0 1 0 99 1 0 0 0 97 43 91 0 5 0 0 1 0 0 0 100 2 0 0 0 61 7 54 0 4 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 211 104 4 0 0 1 0 302 0 0 0 100 5 0 0 0 7 1 2 0 0 2 0 294 0 0 0 100 6 0 0 0 18 2 42 1 0 1 0 1073 0 0 0 100 7 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:42:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 173 0 1 2398 105 538 12 65 37 10 1379 9 2 0 89 1 706 0 8 395 32 562 6 62 54 15 1333 5 3 0 91 2 437 0 3 275 7 371 7 51 77 10 1118 8 1 0 91 3 662 0 10 521 108 462 6 53 68 11 1387 7 1 0 92 4 66 0 520 382 107 316 6 50 21 5 927 6 1 0 93 5 1563 0 1 270 18 315 3 47 42 10 1672 2 4 0 93 6 97 0 0 239 2 351 5 48 43 9 1992 7 1 0 92 7 387 0 14 201 3 264 7 35 33 17 1135 4 1 0 94 March 4, 2026 at 01:42:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 133 0 0 2711 114 818 13 110 32 1 1667 20 3 0 78 1 73 0 14 683 12 867 24 108 50 0 2332 17 2 0 80 2 89 0 16 556 5 633 13 71 21 0 1524 18 2 0 81 3 95 0 10 808 113 765 26 107 61 0 2229 19 2 0 79 4 66 0 1412 608 114 720 18 111 38 1 1843 13 2 0 84 5 75 0 0 523 8 578 12 61 45 1 2110 14 1 0 85 6 125 0 0 575 9 706 18 102 44 0 2855 17 2 0 81 7 53 0 0 550 18 598 11 69 44 1 1373 9 1 0 90 March 4, 2026 at 01:42:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 112 0 0 2709 110 797 12 115 59 0 1800 22 3 0 76 1 100 0 14 759 17 998 14 110 91 1 2357 20 2 0 78 2 73 0 0 627 8 771 15 87 62 0 1489 14 2 0 85 3 113 0 9 944 155 948 25 100 102 0 2029 15 2 0 83 4 81 0 1412 592 120 680 22 98 61 0 1526 20 2 0 78 5 27 0 0 564 22 641 15 76 102 0 2070 8 1 0 91 6 90 0 0 583 8 726 20 95 64 1 2895 19 2 0 79 7 64 0 0 605 12 713 14 81 123 0 1636 11 1 0 87 March 4, 2026 at 01:42:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 0 2684 113 754 18 107 33 0 1739 15 3 0 82 1 23 0 14 658 20 833 21 135 39 0 2410 18 2 0 80 2 5 0 0 555 13 618 12 93 36 0 1513 13 2 0 85 3 38 0 12 824 116 780 19 104 54 0 2277 18 2 0 80 4 20 0 1418 644 116 811 14 126 29 0 1867 12 2 0 86 5 28 0 0 539 10 591 19 61 36 0 1804 16 2 0 82 6 31 0 0 608 15 765 15 82 30 0 3017 22 2 0 76 7 25 0 0 548 10 606 16 72 55 0 1774 15 1 0 84 March 4, 2026 at 01:42:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2695 111 772 20 98 48 0 1790 16 3 0 81 1 2 0 14 649 17 797 22 98 25 0 2033 19 2 0 79 2 2 0 0 555 14 592 11 70 45 0 2083 16 2 0 82 3 4 0 9 823 117 725 19 98 48 0 2030 17 2 0 81 4 5 0 1412 600 118 705 14 88 58 0 1809 15 2 0 82 5 0 0 0 564 8 663 10 67 41 0 1447 12 1 0 87 6 1 0 0 566 13 679 15 79 48 0 2913 18 2 0 80 7 1 0 0 561 23 618 12 54 33 1 1664 14 1 0 85 March 4, 2026 at 01:42:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 0 2668 112 733 25 97 44 0 2045 25 3 0 72 1 27 0 14 702 20 908 27 109 41 0 2165 20 2 0 77 2 23 0 0 604 17 695 15 84 27 0 2217 16 2 0 82 3 33 0 10 843 118 821 22 99 32 0 3110 20 2 0 78 4 7 0 1412 591 120 668 18 106 43 0 1751 12 2 0 85 5 2 0 0 508 22 502 18 77 57 0 1420 11 1 0 87 6 21 0 0 649 17 785 19 98 41 0 2057 18 2 0 81 7 1 0 0 539 11 598 9 66 46 0 1480 8 1 0 90 March 4, 2026 at 01:42:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2661 120 693 19 101 17 0 1642 20 2 0 77 1 5 0 14 693 14 860 24 103 40 0 2781 19 2 0 79 2 1 0 0 582 24 605 13 71 18 0 2017 14 2 0 84 3 1 0 9 827 126 721 21 95 47 0 2900 16 2 0 83 4 2 0 1415 578 118 663 15 82 25 0 1610 14 2 0 84 5 1 0 0 514 15 536 14 61 40 0 1458 11 1 0 88 6 2 0 0 681 18 884 20 93 12 0 1954 19 2 0 80 7 3 0 0 555 17 620 9 54 49 0 1364 15 1 0 84 March 4, 2026 at 01:42:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2703 120 823 15 112 96 0 1702 21 3 0 77 1 7 0 14 677 21 836 26 115 72 0 2446 20 2 0 77 2 1 0 0 626 22 734 22 81 73 0 1880 16 2 0 82 3 0 0 2 873 161 861 15 110 107 0 3174 15 2 0 83 4 5 0 1413 724 122 957 14 122 81 0 1776 15 2 0 83 5 2 0 0 597 9 727 6 82 91 0 1646 9 1 0 90 6 2 0 1 619 12 746 20 106 90 0 1663 17 1 0 82 7 0 0 3 547 21 608 10 70 66 0 1689 14 1 0 85 March 4, 2026 at 01:42:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2651 118 658 21 85 24 1 1597 16 3 0 82 1 9 0 14 646 24 750 25 115 38 0 2349 22 2 0 76 2 3 0 0 538 20 564 15 67 25 0 1495 15 1 0 84 3 5 0 3 895 121 879 16 104 33 0 3713 20 2 0 78 4 4 0 1412 625 120 758 18 102 40 0 1776 16 2 0 82 5 3 0 0 536 14 583 12 62 33 1 1650 13 1 0 85 6 4 0 0 630 22 747 19 84 30 0 1688 19 1 0 80 7 3 0 4 529 18 577 13 64 44 0 1835 9 1 0 90 March 4, 2026 at 01:42:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2699 117 737 15 87 77 0 1681 15 3 0 83 1 1 0 13 598 22 689 17 84 50 0 1977 15 2 0 84 2 2 0 0 605 24 689 17 60 30 0 1874 17 2 0 82 3 2 0 2 854 128 752 22 74 39 0 2295 23 2 0 75 4 1 0 1414 582 127 677 18 70 55 0 2879 15 2 0 82 5 1 0 0 604 20 671 15 68 38 0 1497 17 1 0 81 6 9 0 6 565 18 619 10 61 36 0 1762 14 1 0 84 7 0 0 0 524 17 521 9 39 32 0 1331 11 1 0 88 March 4, 2026 at 01:42:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2672 116 730 16 95 54 0 1794 18 3 0 79 1 3 0 13 645 21 780 21 110 17 0 2097 25 2 0 74 2 1 0 0 634 31 717 12 73 42 1 1867 15 2 0 83 3 3 0 2 817 127 680 19 91 59 0 2417 13 2 0 85 4 1 0 1415 613 123 747 13 102 26 0 2931 15 3 0 83 5 1 0 0 549 26 547 5 71 20 0 1261 9 1 0 90 6 1 0 0 666 22 817 20 87 64 1 1826 16 1 0 83 7 3 0 2 571 13 659 15 61 85 0 1875 16 1 0 83 March 4, 2026 at 01:42:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 2723 118 814 21 108 32 0 1645 19 3 0 79 1 4 0 14 640 24 729 34 101 16 0 2079 23 2 0 76 2 2 0 0 632 22 701 15 80 50 0 2011 12 2 0 86 3 12 0 3 840 120 746 26 84 47 0 2556 24 2 0 74 4 7 0 1409 627 125 778 19 88 38 0 3148 13 3 0 84 5 9 0 0 574 28 603 19 71 26 0 1553 15 1 0 84 6 12 0 5 653 19 815 22 103 56 0 2101 14 1 0 84 7 4 0 0 534 14 580 10 68 43 0 1434 10 1 0 89 March 4, 2026 at 01:42:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2730 121 780 19 100 88 0 1614 16 3 0 81 1 2 0 14 680 22 826 21 117 74 0 2124 19 2 0 79 2 1 0 0 657 24 784 19 84 94 0 1513 14 2 0 84 3 1 0 3 929 176 819 24 115 100 0 2721 22 2 0 77 4 3 0 1413 669 119 860 23 115 87 0 3033 13 3 0 84 5 3 0 0 576 20 635 16 71 67 0 1361 14 1 0 85 6 1 0 5 677 20 847 22 101 105 0 1986 16 2 0 82 7 1 0 0 586 13 677 14 80 135 0 1545 13 1 0 86 March 4, 2026 at 01:42:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2511 118 529 14 69 29 0 1208 10 2 0 88 1 7 0 14 436 20 490 12 67 21 0 2349 17 1 0 82 2 0 0 0 426 28 448 12 53 24 0 1139 13 1 0 86 3 2 0 3 743 130 692 12 89 27 0 2291 11 1 0 88 4 0 0 993 545 120 599 14 71 29 0 2550 10 2 0 88 5 1 0 0 396 11 415 11 49 23 0 1080 10 1 0 89 6 1 0 6 427 13 506 9 61 23 0 1317 11 1 0 88 7 3 0 0 369 10 386 4 38 23 0 902 8 1 0 92 March 4, 2026 at 01:42:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 124 0 0 0 0 11 0 1 0 99 1 0 0 14 8 2 6 0 0 0 0 270 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 3 245 119 36 0 1 1 0 885 0 0 0 100 4 0 0 3 220 103 43 1 2 1 0 1272 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 10 2 6 0 1 1 0 264 0 0 0 100 7 0 0 0 10 1 6 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:42:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2136 118 104 0 8 0 0 15 0 1 0 99 1 0 0 14 27 10 24 0 1 0 0 276 0 0 0 100 2 0 0 0 42 16 34 0 3 0 0 0 0 0 0 100 3 0 0 3 274 112 71 1 7 0 0 606 0 0 0 100 4 0 0 3 277 130 102 0 2 3 0 1546 0 0 0 99 5 0 0 0 10 5 0 0 0 0 0 0 0 0 0 100 6 0 0 7 14 2 16 0 1 0 0 272 0 0 0 100 7 0 0 0 14 1 12 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:42:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 109 111 0 6 0 0 4 0 0 0 100 1 0 0 14 29 8 27 1 5 0 0 281 0 0 0 100 2 0 0 0 81 37 78 0 1 1 0 3 0 0 0 100 3 0 0 3 222 104 14 1 3 0 0 606 0 0 0 100 4 0 0 3 230 105 58 2 1 2 0 1543 0 0 0 99 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 7 68 26 62 1 4 0 0 286 0 0 0 100 7 0 0 0 13 2 10 0 2 0 0 6 0 0 0 100 March 4, 2026 at 01:42:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 101 159 0 13 38 0 2 0 1 0 99 1 0 0 14 91 2 168 0 11 51 0 270 0 0 0 100 2 0 0 0 161 59 190 0 13 41 0 11 0 0 0 100 3 0 0 3 295 151 70 0 8 28 0 602 0 0 0 100 4 0 0 3 255 105 114 1 13 55 0 1542 0 1 0 99 5 0 0 0 37 0 61 0 5 52 0 0 0 0 0 100 6 0 0 7 67 16 100 0 13 34 0 276 0 0 0 100 7 0 0 0 49 2 87 0 11 58 0 4 0 0 0 100 March 4, 2026 at 01:42:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1094 0 16 2241 110 307 8 38 29 26 609 4 1 0 95 1 183 0 18 129 6 227 4 34 5 14 671 0 0 0 99 2 201 0 21 162 18 258 7 24 16 16 397 4 0 0 95 3 233 0 16 339 110 199 2 34 12 13 1319 1 1 0 98 4 65 0 32 323 105 237 12 38 14 9 1990 4 1 0 94 5 411 0 17 108 24 125 6 27 22 9 437 4 0 0 96 6 618 0 20 114 11 184 7 41 24 13 779 1 1 0 98 7 4936 0 14 151 25 217 3 28 33 17 770 2 1 0 96 March 4, 2026 at 01:42:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 101 124 0 2 0 0 19 0 1 0 99 1 0 0 14 114 52 108 1 1 0 0 277 0 0 0 100 2 0 0 0 17 2 10 0 2 0 0 2 0 0 0 100 3 0 0 10 226 105 16 1 1 0 0 604 0 0 0 100 4 0 0 17 222 106 47 1 1 0 0 1447 0 1 0 99 5 0 0 0 11 0 4 0 1 6 0 8 0 0 0 100 6 41 0 7 32 7 32 0 1 0 0 276 0 0 0 100 7 3 0 0 22 4 13 0 1 0 0 19 0 0 0 100 March 4, 2026 at 01:42:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 118 0 1 0 0 0 0 0 0 100 1 0 0 14 116 55 114 1 0 0 0 274 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 4 0 0 0 100 3 0 0 3 222 104 14 1 2 1 0 605 0 0 0 100 4 4 0 10 216 104 41 1 1 2 0 1430 0 1 0 99 5 0 0 0 15 7 2 0 0 1 0 1 0 0 0 100 6 0 0 7 24 7 22 1 1 0 0 325 0 0 0 100 7 0 0 0 16 2 12 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:42:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 112 0 0 0 0 0 0 1 0 99 1 0 0 14 113 53 106 1 0 0 0 289 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 3 220 105 14 0 0 0 0 620 0 0 0 100 4 0 0 10 217 104 38 3 0 1 0 1428 0 1 0 99 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 27 9 24 0 1 1 0 278 0 0 0 100 7 0 0 0 14 1 12 0 1 2 0 0 0 0 0 100 March 4, 2026 at 01:42:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1279 0 15 2231 101 346 9 45 94 6 682 8 2 0 91 1 210 0 16 222 48 337 5 57 86 7 684 2 0 0 97 2 157 0 0 110 4 174 3 43 84 7 388 2 0 0 98 3 145 0 29 407 159 302 2 52 89 14 1317 1 1 0 99 4 69 0 29 358 106 282 5 43 74 2 1714 1 2 0 98 5 311 0 2 182 33 279 3 41 57 13 258 1 0 0 99 6 331 0 9 137 10 240 6 43 98 3 615 1 1 0 98 7 5639 0 19 114 3 184 11 31 103 9 954 6 2 0 93 March 4, 2026 at 01:42:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 115 110 0 15 7 0 5 0 1 0 99 1 0 0 14 104 30 92 0 12 5 0 274 0 0 0 100 2 0 0 7 46 8 44 0 7 7 0 8 0 0 0 100 3 41 0 7 276 127 60 1 7 5 0 617 0 0 0 100 4 0 0 21 233 106 58 1 4 4 0 1435 0 0 0 99 5 0 0 0 38 3 48 0 2 3 0 15 0 0 0 100 6 3 0 7 26 5 22 0 1 3 0 273 0 0 0 100 7 0 0 0 23 1 18 0 5 2 0 8 0 0 0 100 March 4, 2026 at 01:42:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 106 102 0 3 0 0 0 0 1 0 99 1 0 0 14 117 44 115 1 6 0 0 266 0 0 0 100 2 0 0 0 31 5 22 0 3 0 0 0 0 0 0 100 3 0 0 3 229 110 20 1 1 0 0 610 0 0 0 100 4 0 0 3 217 105 36 1 0 1 0 1428 0 0 0 100 5 0 0 0 7 0 2 0 1 0 0 1 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 263 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2129 122 119 0 3 0 0 0 0 1 0 99 1 0 0 14 112 31 106 1 2 0 0 271 0 0 0 100 2 0 0 0 23 3 28 0 2 0 0 16 0 0 0 100 3 0 0 3 231 111 24 0 1 0 0 611 0 0 0 100 4 0 0 3 215 104 38 1 0 0 0 1429 0 0 0 100 5 0 0 0 19 8 6 0 0 0 0 6 0 0 0 100 6 0 0 7 10 2 4 1 0 0 0 260 0 0 0 100 7 0 0 0 11 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2164 0 18 2153 109 191 5 15 41 9 481 1 1 0 97 1 126 0 14 104 22 157 3 24 19 12 491 0 0 0 100 2 39 0 10 106 24 122 1 14 11 2 205 0 1 0 99 3 22 0 10 268 112 108 0 16 10 13 870 0 0 0 100 4 10 0 5 248 105 97 1 13 12 6 1488 0 0 0 99 5 35 0 4 36 7 51 1 8 3 8 73 0 0 0 100 6 11 0 8 30 3 45 2 11 8 4 318 0 0 0 100 7 18 0 4 27 1 40 0 9 16 4 91 0 0 0 100 March 4, 2026 at 01:42:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3388 0 147 2340 121 477 9 64 83 36 1091 3 3 0 94 1 3867 0 23 273 4 492 6 86 209 51 2357 2 3 0 95 2 4652 0 9 249 7 448 3 84 97 50 1351 1 2 0 97 3 214 0 16 502 169 441 5 85 81 39 1746 1 1 0 99 4 24612 0 23 436 105 426 16 68 86 30 2311 8 23 0 68 5 238 0 4 288 41 424 2 69 71 27 533 0 1 0 99 6 312 0 14 262 14 431 6 79 71 19 778 0 1 0 99 7 2388 0 26 169 2 275 6 47 84 22 462 2 1 0 97 March 4, 2026 at 01:42:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 100 16 0 2 0 0 1 0 1 0 99 1 0 0 245 118 5 118 1 1 4 0 560 0 1 0 99 2 0 0 0 45 2 10 0 2 1 0 0 0 0 0 100 3 0 0 3 264 114 18 0 0 1 0 605 0 0 0 100 4 0 0 3 254 103 52 1 2 1 0 1044 0 0 0 100 5 0 0 0 144 50 110 0 2 1 0 0 0 0 0 100 6 0 0 7 53 2 26 0 2 1 0 263 0 0 0 100 7 62 0 0 55 4 20 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:42:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2107 103 108 0 4 0 0 1 0 1 0 99 1 0 0 14 23 4 14 0 0 0 0 560 0 0 0 100 2 0 0 0 12 2 4 0 0 0 0 0 0 0 0 100 3 0 0 3 225 107 15 1 0 0 0 609 0 0 0 100 4 0 0 3 213 103 32 1 0 0 0 1044 0 0 0 100 5 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 6 0 0 7 42 15 32 1 3 0 0 260 0 0 0 100 7 0 0 0 89 39 82 0 2 0 0 8 0 0 0 100 March 4, 2026 at 01:42:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 116 115 0 4 0 0 0 0 0 0 100 1 0 0 14 68 31 68 0 1 0 0 568 0 0 0 100 2 0 0 0 17 3 14 0 1 0 0 11 0 0 0 100 3 0 0 3 215 104 7 0 0 1 0 600 0 0 0 100 4 0 0 3 215 103 40 1 1 0 0 1052 0 0 0 100 5 0 0 0 18 6 14 0 1 0 0 1 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 71 15 64 0 1 0 0 30 0 0 0 100 March 4, 2026 at 01:42:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 104 110 0 6 0 0 0 0 0 0 100 1 0 0 14 33 12 24 0 2 0 0 559 0 0 0 100 2 0 0 0 93 40 88 0 5 0 0 0 0 0 0 100 3 0 0 3 222 107 15 1 0 0 0 607 0 0 0 100 4 0 0 3 209 103 32 0 0 0 0 1044 0 0 0 100 5 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 6 0 0 7 14 2 14 0 1 0 0 260 0 0 0 100 7 0 0 0 20 6 14 1 1 0 0 6 0 0 0 100 March 4, 2026 at 01:42:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2121 109 94 0 10 0 0 5 0 0 0 100 1 0 0 14 43 15 43 1 4 0 0 562 0 0 0 100 2 0 0 0 49 21 42 0 2 0 0 1 0 0 0 100 3 0 0 3 278 118 70 0 7 1 0 603 0 0 0 100 4 0 0 3 215 105 38 1 0 1 0 1045 0 0 0 100 5 0 0 0 8 0 6 0 0 4 0 3 0 0 0 100 6 0 0 7 12 2 12 0 0 0 0 267 0 0 0 100 7 0 0 0 22 6 18 0 1 0 0 12 0 0 0 100 March 4, 2026 at 01:42:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 104 111 0 2 1 0 0 0 0 0 100 1 0 0 14 112 52 108 0 2 0 0 559 0 0 0 100 2 0 0 0 11 3 4 0 0 1 0 0 0 0 0 100 3 4 0 3 224 107 18 1 1 1 0 610 0 0 0 100 4 4 0 3 212 104 34 1 0 1 0 1044 0 0 0 100 5 0 0 0 8 1 2 0 0 1 0 0 0 0 0 100 6 0 0 7 12 3 6 0 0 2 0 260 0 0 0 100 7 0 0 0 23 6 20 0 1 2 0 8 0 0 0 100 March 4, 2026 at 01:42:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 120 0 1 0 0 0 0 0 0 100 1 0 0 14 112 54 108 0 0 0 0 561 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 3 219 105 12 0 1 0 0 601 0 0 0 100 4 0 0 3 210 103 32 1 0 1 0 1037 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 7 10 2 6 0 1 0 0 260 0 0 0 100 7 0 0 0 19 5 14 0 0 0 0 9 0 0 0 100 March 4, 2026 at 01:42:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 114 0 0 0 0 0 0 0 0 100 1 0 0 14 113 54 112 0 0 0 0 564 0 0 0 100 2 0 0 0 17 4 16 0 0 0 0 13 0 0 0 100 3 0 0 3 221 106 12 2 0 0 0 606 0 0 0 100 4 0 0 3 213 103 38 1 0 0 0 1045 0 0 0 100 5 0 0 0 11 5 2 0 0 0 0 0 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 23 6 18 1 0 0 0 6 0 0 0 100 March 4, 2026 at 01:42:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 110 100 0 13 0 0 1 0 0 0 100 1 0 0 14 33 11 32 1 3 0 0 561 0 0 0 100 2 0 0 0 25 8 19 0 4 0 0 1 0 0 0 100 3 0 0 3 287 130 79 0 9 0 0 601 0 0 0 100 4 0 0 3 231 108 50 1 3 0 0 1039 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 7 10 3 6 0 0 0 0 261 0 0 0 100 7 0 0 0 17 5 12 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:42:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 242 0 0 2281 104 345 6 39 46 6 558 4 1 0 95 1 1005 0 127 228 31 379 2 44 48 7 1386 1 1 0 98 2 343 0 0 165 4 285 5 33 45 14 434 4 1 0 95 3 189 0 4 458 169 314 2 46 50 6 1270 1 1 0 98 4 1908 0 17 359 105 288 3 36 61 1 1824 1 1 0 98 5 934 0 0 169 33 232 2 30 68 10 484 2 1 0 97 6 225 0 7 248 15 432 2 44 68 9 778 1 1 0 99 7 104 0 0 204 11 288 5 29 53 2 353 4 0 0 96 March 4, 2026 at 01:42:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 109 113 0 9 4 0 0 0 1 0 99 1 2 0 14 109 40 110 0 8 4 0 584 0 0 0 100 2 0 0 0 31 6 26 0 3 1 0 4 0 0 0 100 3 27 0 3 253 121 33 1 1 5 0 626 0 0 0 100 4 15 0 17 221 104 51 2 2 3 0 1148 0 0 0 100 5 0 0 0 16 0 18 0 1 3 0 3 0 0 0 100 6 4 0 7 24 2 28 2 3 4 0 277 0 0 0 100 7 8 0 0 29 1 25 0 3 2 0 11 0 0 0 100 March 4, 2026 at 01:42:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 112 0 0 0 0 1 0 1 0 99 1 0 0 14 111 54 108 0 0 0 0 561 0 0 0 100 2 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 3 0 0 3 237 112 34 1 1 0 0 609 0 0 0 100 4 0 0 3 210 103 32 1 0 0 0 1133 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 14 116 54 118 1 0 0 0 573 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 3 0 0 3 229 110 22 0 1 0 0 609 0 0 0 100 4 0 0 3 222 105 52 1 1 0 0 1140 0 0 0 100 5 0 0 0 16 7 4 0 0 0 0 1 0 0 0 100 6 1 0 7 10 2 8 0 1 0 0 268 0 0 0 100 7 0 0 0 12 1 8 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:42:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 907 0 129 2425 115 692 4 136 104 91 3424 1 2 0 97 1 122 0 45 375 30 681 8 164 81 95 3411 1 2 0 97 2 9627 0 243 322 4 663 14 137 171 115 4152 4 4 0 92 3 308 0 42 544 112 638 5 141 1164 98 3339 1 2 0 97 4 754 0 25 567 103 747 8 158 172 119 4025 1 2 0 97 5 117 0 39 326 28 566 1 114 736 86 2628 1 2 0 98 6 63 0 13 341 3 609 2 138 73 75 2198 1 1 0 98 7 99 0 33 224 2 362 3 77 1343 59 3525 1 2 0 97 March 4, 2026 at 01:42:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2131 104 127 0 7 4 1 23 0 0 0 99 1 7 0 98 53 17 59 0 4 14 2 587 0 1 0 99 2 10 0 0 31 2 24 0 2 14 1 12 0 0 0 100 3 7 0 3 240 104 29 0 4 5 4 615 0 0 0 100 4 6 0 3 231 104 45 0 2 5 2 777 0 0 0 100 5 6 0 7 40 2 41 0 3 8 6 270 0 0 0 100 6 4 0 8 30 3 20 0 2 3 1 11 0 0 0 100 7 33 0 7 105 34 99 0 5 9 3 26 0 0 0 100 March 4, 2026 at 01:42:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2213 103 66 0 3 1 0 0 0 1 0 99 1 0 0 28 170 27 58 0 2 5 0 560 0 1 0 99 2 0 0 714 21 5 11 0 2 3 0 0 0 1 0 99 3 0 0 7 372 108 61 1 3 0 0 604 0 0 0 100 4 0 0 7 357 123 74 1 1 1 0 763 0 0 0 99 5 0 0 7 120 3 8 1 0 1 0 259 0 0 0 100 6 0 0 0 120 1 12 0 1 1 0 0 0 0 0 100 7 0 0 7 114 1 2 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:42:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 10 0 1 0 0 0 0 0 0 100 1 0 0 14 15 4 10 1 1 1 0 560 0 0 0 100 2 0 0 14 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 3 318 104 109 0 0 0 0 599 0 0 0 100 4 0 0 3 312 153 132 1 0 0 0 763 0 0 0 100 5 0 0 7 11 2 6 0 0 0 0 259 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 0 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:42:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 93 1 5 0 0 1 0 0 0 100 1 0 0 14 11 4 8 0 0 0 0 560 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 3 249 108 40 1 0 0 0 609 0 0 0 100 4 0 0 3 233 113 58 1 1 0 0 774 0 0 0 100 5 0 0 7 99 48 94 0 4 0 0 268 0 0 0 100 6 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 15 0 16 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:42:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4259 0 146 2510 106 662 11 125 638 100 10252 3 6 0 91 1 2858 0 419 523 8 478 2 92 632 76 2717 1 3 0 96 2 1031 0 21 393 4 468 5 91 369 76 2898 1 2 0 97 3 8486 0 434 582 106 459 8 85 553 79 10693 4 5 0 90 4 8058 0 16 593 108 516 3 111 392 87 8451 3 3 0 93 5 3288 0 371 569 34 517 1 81 151 73 2413 1 3 0 96 6 9420 0 475 479 6 448 11 89 1028 73 12329 5 5 0 89 7 5611 0 129 475 0 460 5 71 704 95 7593 4 3 0 93 March 4, 2026 at 01:42:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2169 112 214 1 53 296 6 0 0 3 0 97 1 0 0 14 107 15 183 2 57 429 6 560 0 2 0 98 2 0 0 7 93 15 155 2 42 277 4 0 0 2 0 98 3 0 0 3 336 157 149 1 50 338 7 601 0 2 0 98 4 0 0 3 314 107 219 0 41 327 8 2 0 2 0 98 5 0 0 7 78 4 178 3 44 320 6 1418 0 2 0 98 6 0 0 0 89 7 147 2 40 319 5 0 0 2 0 98 7 0 0 0 56 0 102 0 29 302 3 0 0 2 0 98 March 4, 2026 at 01:42:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 34 2380 101 522 0 88 1191 0 0 0 3 0 97 1 0 0 463 218 3 455 2 112 1433 0 287 0 2 0 98 2 0 0 61 254 3 413 11 91 1341 0 0 0 3 0 97 3 0 0 8 786 354 533 0 111 1481 0 598 0 2 0 98 4 0 0 4 681 107 824 0 102 1114 0 0 0 2 0 98 5 0 0 14 274 5 459 1 91 1324 0 1686 0 2 0 98 6 0 0 6 274 1 440 0 89 1231 0 0 0 2 0 98 7 0 0 2 257 0 406 0 76 1231 0 0 0 2 0 98 March 4, 2026 at 01:42:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 111 116 0 4 0 0 1 0 1 0 99 1 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 2 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 3 0 0 3 306 146 100 1 3 1 0 603 0 0 0 100 4 0 0 3 226 103 17 0 2 0 0 2 0 0 0 100 5 0 0 7 16 4 40 3 0 3 0 1691 0 0 0 100 6 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 150 205 0 1 0 0 0 0 1 0 99 1 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 2 0 0 0 100 3 0 0 3 231 107 25 0 0 0 0 607 0 0 0 100 4 0 0 3 210 102 6 0 0 0 0 8 0 0 0 100 5 0 0 7 30 13 52 1 0 1 0 1702 0 0 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 14 2 10 0 0 0 0 22 0 0 0 100 March 4, 2026 at 01:42:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1219 0 8 2270 115 383 1 48 22 23 652 2 1 0 97 1 1125 0 28 177 17 315 4 50 22 35 997 2 1 0 98 2 1296 0 8 144 4 273 3 35 64 24 717 2 1 0 97 3 6586 0 16 378 107 332 6 47 103 29 2973 3 3 0 94 4 2415 0 5 339 104 293 3 45 52 38 851 2 1 0 97 5 4810 0 23 120 11 252 3 36 42 37 2457 2 1 0 96 6 340 0 6 151 18 283 0 41 38 36 515 0 0 0 99 7 154 0 8 133 3 253 0 28 28 31 411 0 0 0 99 March 4, 2026 at 01:42:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 443 0 0 2876 101 1506 26 186 733 2 4126 8 5 0 87 1 462 0 24 538 3 893 33 152 654 0 4328 17 5 0 78 2 260 0 0 685 32 1103 15 127 420 0 2306 7 3 0 90 3 205 0 18 986 159 1327 25 185 553 2 3916 6 5 0 90 4 331 0 542 686 106 907 29 146 752 1 3784 6 4 0 89 5 316 0 7 514 9 815 16 102 600 1 4724 7 4 0 89 6 202 0 0 402 2 597 12 94 593 0 2838 14 4 0 82 7 301 0 0 467 5 750 10 80 465 1 1947 6 3 0 91 March 4, 2026 at 01:42:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2278 103 428 0 94 1179 1 0 0 2 0 98 1 0 0 14 171 3 363 0 86 1197 1 266 0 2 0 98 2 52 0 0 293 48 535 2 98 1236 0 9 0 2 0 98 3 0 0 3 570 288 417 4 97 1275 0 600 0 2 0 98 4 0 0 3 528 108 666 1 106 1187 0 43 0 2 0 98 5 0 0 7 218 5 477 3 109 1259 0 1634 0 2 0 98 6 0 0 0 186 2 393 2 98 1208 0 3 0 2 0 98 7 0 0 0 165 1 363 1 79 1175 0 0 0 2 0 98 March 4, 2026 at 01:42:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 100 110 0 0 0 0 0 0 1 0 99 1 0 0 14 23 2 4 0 0 0 0 266 0 0 0 100 2 0 0 0 139 59 118 0 0 0 0 14 0 0 0 100 3 0 0 115 220 106 13 0 1 0 0 600 0 0 0 100 4 0 0 3 229 103 4 0 0 0 0 294 0 0 0 100 5 0 0 7 29 3 38 1 0 1 0 1386 0 0 0 100 6 0 0 4 25 0 8 4 1 0 0 0 0 0 0 100 7 0 0 0 23 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:42:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 135 178 0 2 0 0 0 0 1 0 99 1 0 0 14 13 2 14 0 0 0 0 278 0 0 0 100 2 0 0 0 57 23 50 0 2 0 0 10 0 0 0 100 3 0 0 10 219 106 12 0 0 0 0 599 0 0 0 100 4 0 0 3 213 103 6 0 0 0 0 294 0 0 0 100 5 0 0 7 20 8 36 1 0 0 0 1385 0 0 0 100 6 0 0 0 18 3 14 0 0 0 0 9 0 0 0 100 7 0 0 1 16 0 16 0 3 0 0 8 0 0 0 100 March 4, 2026 at 01:43:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2532 121 723 15 61 5 0 2479 4 3 0 93 1 17 0 14 595 27 923 14 59 4 0 2026 4 2 0 94 2 33 0 0 342 8 491 11 23 21 0 1838 9 1 0 90 3 36 0 3 548 113 488 12 38 0 0 2241 17 1 0 82 4 24 0 502 521 104 597 8 40 2 0 2088 10 2 0 88 5 40 0 5 282 4 407 5 22 7 0 3326 7 2 0 92 6 9 0 0 384 1 621 8 41 6 0 1189 2 1 0 97 7 1 0 0 211 3 246 2 17 2 0 751 2 1 0 98 March 4, 2026 at 01:43:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 135 244 0 35 406 0 0 0 2 0 98 1 0 0 14 131 24 174 0 24 554 0 275 0 1 0 98 2 0 0 0 43 1 88 0 26 430 0 1 0 1 0 99 3 0 0 3 293 148 162 2 32 406 0 599 0 1 0 99 4 0 0 3 261 103 126 1 33 530 0 294 0 1 0 99 5 0 0 7 58 3 155 1 35 489 0 1387 0 1 0 99 6 0 0 0 48 2 90 0 22 383 0 2 0 2 0 98 7 0 0 0 47 0 91 0 22 365 0 0 0 1 0 99 March 4, 2026 at 01:43:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2266 110 440 0 78 753 0 2 0 2 0 98 1 0 0 15 167 2 357 12 96 906 0 266 0 2 0 98 2 0 0 0 164 7 359 0 82 920 0 9 0 1 0 99 3 0 0 3 637 326 583 0 89 792 0 600 0 2 0 98 4 0 0 3 368 103 357 0 91 791 0 294 0 1 0 99 5 0 0 7 227 3 489 1 60 694 0 1389 0 2 0 98 6 0 0 0 160 0 362 0 89 836 0 0 0 1 0 99 7 0 0 0 156 0 348 0 72 784 0 0 0 1 0 99 March 4, 2026 at 01:43:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 106 0 0 0 0 2 0 1 0 99 1 0 0 14 15 2 12 0 0 0 0 266 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 9 0 0 0 100 3 0 0 3 317 156 112 0 1 0 0 599 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 294 0 0 0 100 5 0 0 7 12 3 36 2 0 1 0 1387 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 104 120 0 2 0 0 11 0 1 0 99 1 0 0 14 22 4 22 1 0 1 0 281 0 0 0 100 2 0 0 1 29 9 30 0 1 0 0 87 0 0 0 100 3 0 0 3 318 156 110 0 1 1 0 600 0 0 0 100 4 0 0 3 214 103 10 0 0 1 0 300 0 0 0 100 5 0 0 7 26 12 50 0 0 1 0 1398 0 0 0 100 6 0 0 0 8 0 6 0 0 0 0 5 0 0 0 100 7 0 0 0 15 1 14 1 0 0 0 8 0 0 0 100 March 4, 2026 at 01:43:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 3 0 0 0 0 1 0 99 1 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 3 259 122 52 2 1 2 0 601 0 0 0 100 4 0 0 3 281 137 76 1 1 2 0 294 0 0 0 100 5 0 0 7 23 9 48 1 0 2 0 1397 0 0 0 99 6 0 0 0 17 1 11 0 2 0 0 2 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 137 181 0 2 0 0 5 0 1 0 99 1 0 0 14 15 4 12 0 0 0 0 267 0 0 0 100 2 0 0 0 12 2 10 0 1 0 0 1 0 0 0 100 3 0 0 3 218 106 13 0 0 1 0 601 0 0 0 100 4 0 0 3 247 118 42 0 2 1 0 294 0 0 0 100 5 0 0 7 21 8 44 1 0 0 0 1395 0 0 0 99 6 0 0 0 13 3 10 0 1 0 0 4 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 204 0 0 1 0 1 0 1 0 99 1 0 0 14 10 3 4 0 0 1 0 266 0 0 0 100 2 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 3 0 0 7 221 106 14 0 0 0 0 600 0 0 0 100 4 0 0 7 225 103 22 0 1 1 0 294 0 0 0 100 5 0 0 7 15 4 36 2 0 2 0 1389 0 0 0 100 6 0 0 0 21 7 14 0 0 1 0 10 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:43:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 117 142 0 1 0 0 11 0 1 0 99 1 0 0 14 8 2 4 1 0 0 0 266 0 0 0 100 2 0 0 0 9 1 6 0 0 0 0 75 0 0 0 100 3 0 0 3 219 106 12 0 1 1 0 600 0 0 0 100 4 0 0 3 287 137 84 0 1 0 0 300 0 0 0 100 5 0 0 7 16 3 46 1 1 0 0 1388 0 0 0 100 6 0 0 0 26 8 22 0 0 0 0 13 0 0 0 100 7 0 0 0 16 3 12 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:43:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 135 178 0 2 0 0 0 0 0 0 100 1 0 0 14 18 5 20 0 0 0 0 283 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 3 219 106 10 2 0 0 0 600 0 0 0 100 4 0 0 3 247 118 40 0 2 0 0 294 0 0 0 100 5 0 0 7 18 8 36 1 0 0 0 1388 0 0 0 100 6 0 0 0 10 1 8 0 0 0 0 7 0 0 0 100 7 0 0 0 25 6 22 1 0 0 0 16 0 0 0 100 March 4, 2026 at 01:43:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 870 0 0 2162 123 173 2 12 7 6 6555 2 1 0 96 1 1908 0 16 66 12 69 2 8 7 10 675 0 1 0 99 2 42 0 0 83 21 92 0 11 12 3 200 0 0 0 100 3 38 0 3 255 107 60 0 12 10 6 711 0 0 0 100 4 28 0 3 249 103 44 0 10 11 5 352 0 0 0 100 5 7 0 7 57 3 78 1 7 3 3 1533 0 0 0 99 6 48 0 0 41 1 36 0 6 12 1 54 0 0 0 100 7 858 0 113 38 6 64 0 6 5 14 156 0 0 0 99 March 4, 2026 at 01:43:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 136 180 0 2 0 0 1 0 0 0 100 1 0 0 14 10 3 8 0 0 0 0 266 0 0 0 100 2 0 0 0 45 16 42 0 2 2 0 0 0 0 0 100 3 0 0 3 218 106 12 0 0 2 0 599 0 0 0 100 4 0 0 3 212 103 6 0 0 3 0 294 0 0 0 100 5 0 0 7 11 3 38 0 1 1 0 1467 0 0 0 100 6 0 0 0 10 1 6 0 1 0 0 2 0 0 0 100 7 0 0 0 26 7 26 0 2 0 0 10 0 0 0 100 March 4, 2026 at 01:43:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 61 0 0 3182 141 2383 15 75 46 0 7047 6 4 0 90 1 11 0 14 1142 4 2440 18 83 36 0 5896 5 3 0 92 2 106 0 0 1008 2 2137 17 46 62 0 6042 8 3 0 89 3 118 0 3 1074 108 1785 10 65 20 0 5068 4 3 0 93 4 531 0 3 958 105 1505 6 50 13 0 2396 2 2 0 96 5 629 0 7 887 4 2284 8 37 46 0 11461 4 2 0 93 6 30 0 0 620 9 1259 2 55 33 0 4139 3 2 0 95 7 65 0 0 279 9 572 5 25 22 0 2842 2 1 0 97 March 4, 2026 at 01:43:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 6562 110 9491 62 361 114 0 23730 22 15 0 63 1 29 0 0 5183 16 10901 103 401 110 0 24184 21 14 0 65 2 17 0 0 4314 12 8923 43 237 135 0 20180 17 12 0 72 3 18 0 26 4525 121 9211 74 347 99 0 22966 19 13 0 68 4 11 0 3 3063 114 6024 31 255 95 0 13619 12 8 0 80 5 13 0 7 1529 5 3167 19 125 82 0 10320 10 5 0 85 6 11 0 0 2973 15 6319 46 235 106 0 14187 12 8 0 80 7 10 0 0 1714 11 3582 31 126 99 0 9325 10 6 0 85 March 4, 2026 at 01:43:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 6740 112 10064 47 279 146 0 25984 25 16 0 59 1 20 0 0 4441 18 9123 39 324 95 0 19398 17 11 0 72 2 21 0 0 3798 15 7772 38 193 113 0 18505 18 11 0 72 3 16 0 3 4709 114 9520 36 269 60 0 22726 16 12 0 72 4 14 0 3 2718 117 5305 31 214 129 0 14578 13 9 0 78 5 10 0 21 2048 24 4308 20 120 63 0 10711 9 6 0 85 6 20 0 2 3448 8 7480 39 194 107 0 16167 13 9 0 78 7 11 0 0 2064 10 4346 23 102 55 0 9550 10 6 0 85 March 4, 2026 at 01:43:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 6526 108 9409 58 296 96 0 19203 19 13 0 68 1 14 0 0 4156 7 8729 48 322 124 0 18060 17 11 0 72 2 20 0 0 3137 15 6304 35 219 111 0 16040 15 9 0 76 3 16 0 3 4398 112 9009 35 253 105 0 20868 18 12 0 71 4 13 0 3 2722 112 5172 25 211 87 0 13566 12 8 0 81 5 17 0 7 1980 25 4431 24 126 93 0 12782 11 7 0 82 6 22 0 14 2703 12 5744 33 206 91 0 16254 12 8 0 79 7 4 0 0 1839 13 3799 23 123 72 0 9053 8 5 0 87 March 4, 2026 at 01:43:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 101 164 0 27 394 0 0 0 2 0 98 1 0 0 0 51 3 94 1 28 328 0 2 0 1 0 99 2 1 0 0 74 2 131 1 20 516 0 301 0 1 0 99 3 0 0 3 298 146 100 2 23 428 0 307 0 1 0 98 4 0 0 3 297 105 188 1 39 416 0 0 0 1 0 99 5 0 0 7 111 35 150 1 25 389 0 260 0 1 0 99 6 0 0 14 89 24 163 3 22 268 0 1776 0 2 0 98 7 0 0 0 53 1 96 1 26 478 0 0 0 1 0 99 March 4, 2026 at 01:43:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2192 100 266 0 37 329 0 3 0 1 0 99 1 0 0 0 118 3 214 1 43 384 0 9 0 1 0 99 2 0 0 0 81 3 156 1 41 363 0 302 0 1 0 99 3 0 0 6 427 224 245 2 43 369 0 317 0 1 0 99 4 0 0 3 316 105 233 1 46 491 0 287 0 1 0 99 5 0 0 7 96 5 181 1 29 444 0 260 0 1 0 99 6 0 0 14 286 54 502 2 49 380 0 1483 0 1 0 99 7 0 0 0 76 2 148 1 28 428 0 2 0 1 0 99 March 4, 2026 at 01:43:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2573 100 892 29 111 39 0 2203 5 2 0 93 1 3 0 0 465 12 774 22 82 11 0 2410 8 1 0 90 2 0 0 0 378 2 554 19 74 23 0 2138 3 1 0 96 3 0 0 3 651 104 794 28 93 92 1 3134 6 2 0 93 4 10 0 353 518 105 564 15 71 37 0 2456 7 1 0 91 5 35 0 7 415 5 653 18 70 9 0 2034 3 1 0 96 6 10 0 14 374 18 627 16 64 12 1 4179 10 1 0 88 7 2 0 0 402 26 608 13 50 91 0 1903 5 1 0 94 March 4, 2026 at 01:43:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 2344 105 468 7 51 13 0 1341 2 2 0 96 1 3 0 0 241 1 400 10 61 40 1 1331 2 1 0 98 2 6 0 0 240 4 381 9 34 24 0 1706 4 1 0 95 3 16 0 3 316 103 139 7 21 14 0 1668 8 1 0 91 4 0 0 208 371 105 289 4 35 15 0 940 3 1 0 96 5 1 0 7 231 13 352 8 38 42 0 1582 2 1 0 97 6 4 0 21 292 39 449 4 35 34 0 2089 1 1 0 98 7 40 0 14 177 13 252 4 22 27 0 1164 2 1 0 96 March 4, 2026 at 01:43:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 124 0 0 0 0 8 0 0 0 99 1 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 3 211 102 2 0 0 1 0 300 0 0 0 100 4 0 0 3 212 103 4 0 1 0 0 0 0 0 0 100 5 0 0 7 13 3 8 0 0 1 0 555 0 0 0 100 6 0 0 14 23 4 52 2 1 0 0 1400 0 0 0 99 7 0 0 7 115 52 111 0 2 0 0 1 0 0 0 100 March 4, 2026 at 01:43:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2198 105 242 0 25 387 0 8 0 2 0 98 1 0 0 0 53 3 64 1 13 404 0 2 0 2 0 98 2 0 0 0 64 2 97 0 24 480 0 301 0 1 0 99 3 0 0 3 294 141 71 2 19 318 0 300 0 2 0 98 4 0 0 3 254 104 61 1 20 316 0 0 0 2 0 98 5 0 0 7 54 3 80 2 30 393 0 553 0 2 0 98 6 0 0 14 60 4 110 2 23 507 0 1399 0 2 0 98 7 0 0 112 188 53 213 1 14 327 0 2 0 2 0 98 March 4, 2026 at 01:43:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2307 103 529 2 113 1331 0 5 0 2 0 97 1 0 0 0 197 4 448 2 116 1548 0 3 0 2 0 98 2 0 0 0 176 1 378 1 89 1269 0 0 0 2 0 98 3 0 0 3 635 322 563 1 128 1413 0 603 0 2 0 97 4 0 0 3 523 103 680 0 119 1290 0 0 0 2 0 98 5 0 0 7 193 3 406 4 95 1299 0 555 0 2 0 98 6 0 0 14 221 12 502 2 115 1446 0 1416 0 3 0 97 7 0 0 7 274 51 503 2 96 1114 0 0 0 2 0 98 March 4, 2026 at 01:43:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2597 107 890 17 81 3 0 2039 4 2 0 94 1 6 0 0 493 6 766 17 61 12 0 2977 8 2 0 90 2 0 0 0 250 0 284 10 17 20 0 2357 15 1 0 84 3 0 0 2 709 106 848 13 48 6 0 2203 3 1 0 96 4 8 0 507 444 104 433 16 34 7 0 1712 11 1 0 87 5 0 0 7 341 6 509 4 26 1 0 1826 3 1 0 96 6 0 0 14 303 38 385 15 27 16 0 2800 9 1 0 90 7 0 0 0 336 13 475 7 22 4 0 1790 3 1 0 96 March 4, 2026 at 01:43:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 143 202 0 2 1 0 14 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 16 3 14 0 0 0 0 14 0 0 0 100 3 0 0 3 215 103 9 0 0 2 0 605 0 0 0 100 4 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 5 0 0 7 18 10 8 0 0 2 0 555 0 0 0 100 6 0 0 14 48 19 74 2 1 0 0 1398 0 0 0 100 7 0 0 0 18 3 16 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:43:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 821 0 112 2191 158 268 0 5 2 11 112 0 1 0 99 1 850 0 0 46 3 51 2 8 3 10 6539 2 1 0 97 2 1958 0 3 45 1 44 2 7 5 7 427 0 1 0 99 3 29 0 3 262 104 74 2 15 5 7 813 0 0 0 100 4 13 0 3 237 103 31 0 8 6 5 113 0 0 0 100 5 10 0 7 41 3 47 1 8 4 6 632 0 0 0 100 6 12 0 14 54 5 84 1 5 5 7 1554 0 0 0 99 7 5 0 0 35 2 25 0 7 2 1 42 0 0 0 100 March 4, 2026 at 01:43:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2190 146 273 0 22 365 0 7 0 2 0 98 1 0 0 0 69 13 110 1 28 337 0 2 0 1 0 99 2 0 0 0 72 2 147 0 25 291 0 1 0 1 0 99 3 0 0 3 280 144 69 2 16 278 0 594 0 2 0 98 4 0 0 3 239 102 76 0 22 357 0 0 0 1 0 99 5 0 0 7 57 4 111 1 19 328 0 556 0 1 0 99 6 0 0 14 53 4 143 1 31 334 0 1481 0 1 0 99 7 0 0 0 45 1 90 0 23 352 0 0 0 2 0 98 March 4, 2026 at 01:43:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 92 0 0 4381 105 4973 48 219 915 0 15040 16 10 0 74 1 48 0 0 2720 6 5642 51 283 903 0 12412 10 8 0 81 2 78 0 0 1982 13 4065 47 205 954 0 9529 8 7 0 86 3 196 0 7 3223 252 6298 44 232 833 0 17614 10 8 0 82 4 24 0 7 1470 129 2536 15 183 920 0 7027 6 5 0 89 5 81 0 7 1237 13 2532 10 117 901 0 5378 4 4 0 91 6 10 0 0 1587 13 3296 20 169 819 0 8091 6 5 0 89 7 497 0 14 1204 6 2506 11 120 907 0 7016 6 5 0 89 March 4, 2026 at 01:43:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 40 0 14 6559 111 9737 54 337 163 0 27891 25 16 0 59 1 14 0 0 4923 23 10205 90 403 91 0 23407 19 12 0 68 2 13 0 0 4180 9 8675 47 257 112 0 20471 19 12 0 70 3 23 0 3 4117 114 8284 55 311 82 0 18180 15 10 0 75 4 13 0 3 2913 112 5462 43 240 102 0 13083 11 8 0 81 5 9 0 7 1774 12 3644 17 123 59 0 9430 8 5 0 86 6 8 0 1 3234 19 6800 43 240 74 0 14042 13 8 0 79 7 19 0 0 2577 13 5375 29 150 84 0 14785 13 8 0 79 March 4, 2026 at 01:43:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6761 108 10001 49 343 150 0 23902 22 15 0 63 1 7 0 0 5219 22 11033 56 370 132 0 23999 20 13 0 67 2 5 0 0 3747 14 7875 44 258 80 0 19977 17 11 0 72 3 5 0 3 3789 114 7466 46 289 73 0 17204 13 9 0 78 4 25 0 3 3092 111 6145 34 246 89 0 16230 15 9 0 76 5 9 0 7 1955 17 4064 22 125 96 0 10569 9 6 0 85 6 9 0 14 2764 10 5890 16 199 75 0 15254 13 8 0 78 7 6 0 0 2645 11 5847 25 135 72 0 14765 14 8 0 78 March 4, 2026 at 01:43:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 4671 106 5659 42 207 46 0 14530 14 9 0 77 1 7 0 0 2325 7 4906 41 209 58 0 12972 11 7 0 82 2 3 0 0 2186 7 4344 32 143 47 0 9757 8 5 0 87 3 4 0 3 2429 113 4702 28 157 39 0 11631 10 6 0 84 4 0 0 3 1623 140 2770 16 136 46 0 6059 6 4 0 91 5 4 0 7 1634 4 3388 17 74 34 0 7097 6 4 0 90 6 3 0 14 1681 6 3584 25 125 38 0 9457 7 5 0 88 7 6 0 0 904 6 1906 7 62 18 0 5724 5 3 0 92 March 4, 2026 at 01:43:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 102 172 0 18 264 0 0 0 2 0 98 1 0 0 0 41 3 71 1 17 285 0 6 0 1 0 99 2 0 0 0 80 2 208 1 33 329 0 1220 0 1 0 99 3 0 0 3 295 146 88 0 18 269 0 310 0 1 0 99 4 0 0 3 347 153 184 1 26 314 0 302 0 1 0 99 5 0 0 7 47 3 94 2 21 267 0 535 0 1 0 99 6 0 0 14 45 2 82 0 27 306 0 289 0 1 0 99 7 0 0 0 43 0 83 0 23 320 0 0 0 1 0 99 March 4, 2026 at 01:43:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 21 2793 101 1211 21 175 574 3 4189 14 4 0 82 1 38 0 0 897 5 1599 43 249 589 1 4069 6 4 0 90 2 4 0 0 647 2 1118 25 160 669 0 4317 13 3 0 84 3 0 0 3 1107 243 1369 48 239 624 0 4377 11 4 0 86 4 0 0 534 935 130 1325 27 204 604 1 3125 5 3 0 92 5 0 0 14 684 12 1098 14 144 568 1 3220 9 3 0 88 6 34 0 14 649 5 1081 27 163 713 2 4268 11 3 0 86 7 0 0 0 596 1 992 12 118 544 2 2021 4 2 0 94 March 4, 2026 at 01:43:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 85 0 4 0 0 0 0 1 0 99 1 0 0 7 31 2 25 0 4 0 0 2 0 0 0 100 2 0 0 0 11 2 34 1 0 0 0 1136 0 0 0 100 3 0 0 3 318 154 108 1 1 0 0 301 0 0 0 100 4 0 0 3 212 103 2 0 0 0 0 300 0 0 0 100 5 0 0 7 24 2 16 0 0 0 0 260 0 0 0 100 6 1 0 14 24 9 20 0 1 0 0 569 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2119 112 161 1 5 0 0 883 0 1 0 99 1 0 0 0 30 2 10 0 1 0 0 5 0 0 0 100 2 0 0 0 42 2 19 1 4 0 0 259 0 0 0 100 3 0 0 3 318 145 100 0 1 0 0 315 0 0 0 100 4 0 0 3 228 103 4 1 0 0 0 300 0 0 0 100 5 0 0 7 35 9 6 0 0 0 0 261 0 0 0 100 6 0 0 14 40 9 20 0 1 1 0 568 0 0 0 100 7 0 0 0 37 3 22 0 1 2 0 23 0 0 0 100 March 4, 2026 at 01:43:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2157 144 230 1 1 0 0 1135 0 1 0 99 1 0 0 0 29 11 24 0 1 0 0 2 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 3 225 104 16 0 0 1 0 301 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 300 0 0 0 100 5 0 0 7 10 2 4 1 0 0 0 260 0 0 0 100 6 0 0 14 23 9 18 0 0 0 0 570 0 0 0 100 7 0 0 0 11 0 6 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:43:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2295 105 421 19 46 303 0 1969 6 3 0 91 1 0 0 0 277 37 396 14 67 332 0 1143 3 2 0 95 2 0 0 0 153 3 216 12 34 363 0 463 2 2 0 96 3 0 0 3 472 141 415 9 52 359 0 900 1 2 0 97 4 0 0 199 329 118 193 5 38 404 0 629 1 2 0 97 5 0 0 7 183 4 329 29 52 323 0 760 2 1 0 97 6 1 0 14 168 11 263 14 46 335 0 1305 5 2 0 93 7 0 0 0 124 1 222 30 42 345 0 482 2 1 0 97 March 4, 2026 at 01:43:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2671 105 1160 45 189 1344 0 2722 6 4 0 90 1 1 0 0 519 4 936 34 188 1370 0 1204 5 3 0 92 2 2 0 0 410 6 708 26 148 1374 0 1067 5 2 0 93 3 0 0 7 969 387 1046 31 186 1522 0 1471 6 3 0 91 4 0 0 357 529 105 687 22 168 1510 0 584 4 3 0 94 5 0 0 7 415 5 764 30 153 1543 0 1725 4 3 0 94 6 0 0 14 475 6 905 32 180 1472 0 1233 5 3 0 93 7 0 0 0 341 3 617 24 120 1332 1 1385 4 3 0 93 March 4, 2026 at 01:43:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 117 166 0 4 0 0 1142 0 1 0 99 1 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 11 1 4 0 1 0 0 0 0 0 0 100 3 0 0 3 311 144 107 0 5 0 0 301 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 7 13 4 8 1 0 0 0 560 0 0 0 100 6 0 0 14 11 4 8 0 0 0 0 268 0 0 0 100 7 0 0 0 12 1 6 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:43:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 157 237 1 1 0 0 1147 0 1 0 99 1 0 0 0 25 0 22 0 2 0 0 5 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 3 227 105 22 0 1 1 0 314 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 2 0 0 0 100 5 0 0 7 19 9 8 0 0 0 0 560 0 0 0 100 6 0 0 14 11 3 8 0 0 0 0 267 0 0 0 100 7 0 0 0 13 1 10 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:43:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 122 132 1 2 0 0 1142 0 1 0 99 1 0 0 0 94 16 85 0 2 3 0 13 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 3 254 123 48 0 1 0 0 300 0 0 0 100 4 0 0 3 214 103 12 0 1 0 0 0 0 0 0 100 5 0 0 7 13 4 8 1 0 0 0 560 0 0 0 100 6 0 0 14 13 5 10 1 0 0 0 273 0 0 0 100 7 0 0 0 12 1 7 1 1 0 0 253 0 0 0 100 March 4, 2026 at 01:43:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 106 222 2 26 354 0 1218 0 2 0 98 1 0 0 0 55 5 109 0 27 401 0 306 0 1 0 99 2 0 0 0 43 1 85 0 19 349 0 6 0 1 0 99 3 0 0 3 387 189 198 1 25 287 0 300 0 1 0 99 4 0 0 3 257 105 100 0 25 370 0 2 0 1 0 99 5 0 0 7 55 4 115 0 30 365 0 561 0 1 0 99 6 0 0 14 76 2 164 1 30 311 0 272 0 1 0 99 7 0 0 0 42 0 84 0 20 248 0 0 0 1 0 99 March 4, 2026 at 01:43:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 809 0 0 2277 114 475 3 62 814 9 7651 2 3 0 95 1 51 0 0 270 17 510 0 87 851 6 366 0 2 0 98 2 8 0 0 200 21 362 1 63 824 5 62 0 2 0 98 3 21 0 3 515 252 347 1 82 807 4 379 0 2 0 98 4 804 0 116 339 103 302 1 67 793 9 119 0 2 0 98 5 104 0 7 165 4 325 2 69 758 16 700 0 1 0 98 6 19 0 16 223 9 448 2 84 787 3 436 0 2 0 98 7 1897 0 0 159 0 320 4 73 823 8 371 0 2 0 97 March 4, 2026 at 01:43:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 120 1 2 0 0 1220 0 1 0 99 1 0 0 0 35 1 26 1 0 0 0 294 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 3 213 103 6 0 0 1 0 301 0 0 0 100 4 0 0 3 213 105 6 0 0 0 0 2 0 0 0 100 5 0 0 7 14 4 10 0 0 0 0 560 0 0 0 100 6 0 0 14 23 8 24 0 1 0 0 275 0 0 0 100 7 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 149 3 1 0 0 1220 0 1 0 99 1 0 0 0 11 1 8 0 1 1 0 299 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 3 214 104 8 0 0 1 0 304 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 0 0 0 0 100 5 0 0 7 21 11 10 1 0 0 0 561 0 0 0 100 6 0 0 14 23 8 20 1 0 0 0 275 0 0 0 100 7 0 0 0 21 2 26 0 2 0 0 10 0 0 0 100 March 4, 2026 at 01:43:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 4936 105 6039 46 225 82 0 18264 14 10 0 75 1 71 0 0 3407 5 7206 43 244 94 0 17786 16 10 0 74 2 58 0 0 2856 19 5908 43 177 106 0 15444 13 8 0 78 3 158 0 3 3437 106 7338 54 195 54 0 19721 13 8 0 79 4 440 0 3 2407 116 4678 27 183 73 0 12768 10 6 0 84 5 92 0 0 1680 12 3517 19 104 90 0 11433 12 6 0 82 6 5 0 21 2123 21 4389 37 179 59 0 11031 9 6 0 86 7 84 0 0 1740 5 3570 17 87 44 0 7865 6 5 0 89 March 4, 2026 at 01:43:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 7021 112 10402 80 389 421 0 25801 22 16 0 62 1 21 0 14 4569 12 9791 68 458 341 0 25337 21 14 0 65 2 29 0 0 3635 5 7556 34 295 370 0 19684 18 12 0 70 3 8 0 3 4420 166 8825 60 350 381 0 19904 16 11 0 72 4 7 0 3 3035 116 5949 45 289 398 0 13258 12 8 0 80 5 9 0 0 2644 10 5689 31 166 306 0 12332 12 8 0 80 6 4 0 0 3078 14 6561 44 276 365 0 15732 13 9 0 78 7 6 0 7 1848 12 3855 17 135 275 0 10307 8 6 0 85 March 4, 2026 at 01:43:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 6456 109 9263 86 418 370 0 27132 25 16 0 59 1 10 0 21 4864 12 10214 120 469 425 0 25256 20 14 0 66 2 7 0 0 3837 11 7833 55 308 473 0 17570 16 10 0 74 3 5 0 7 4791 217 9556 61 389 406 0 20693 16 11 0 73 4 9 0 7 2722 116 5189 29 318 396 0 12644 12 8 0 80 5 3 0 0 2291 7 4904 34 204 386 0 11862 11 7 0 82 6 5 0 0 3294 14 7103 44 300 447 0 17238 15 10 0 75 7 3 0 0 2514 19 5214 26 176 348 0 10609 10 6 0 84 March 4, 2026 at 01:43:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 3329 105 2719 18 89 49 0 8004 7 5 0 89 1 5 0 21 1429 8 2922 15 119 33 0 5410 5 3 0 92 2 2 0 0 1149 7 2418 12 68 20 0 5004 5 3 0 92 3 0 0 3 1321 129 2273 12 98 40 0 6471 5 3 0 92 4 4 0 3 895 109 1492 4 78 36 0 4723 4 3 0 93 5 1 0 0 836 20 1815 5 54 36 0 5075 5 3 0 92 6 1 0 0 778 6 1684 9 61 30 0 4742 4 2 0 94 7 0 0 0 535 7 1111 6 40 38 0 2785 2 2 0 96 March 4, 2026 at 01:43:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 0 2535 111 732 48 101 77 0 5519 24 3 0 73 1 0 0 14 803 9 1427 60 204 69 0 4591 8 3 0 89 2 6 0 14 707 21 1147 33 161 50 2 3736 11 2 0 87 3 4 0 17 922 121 1184 44 148 38 0 4870 11 2 0 87 4 10 0 532 772 104 885 17 125 56 1 3030 5 2 0 92 5 5 0 9 583 9 832 31 104 74 0 2796 6 2 0 91 6 45 0 0 607 6 961 29 127 57 1 3358 5 2 0 93 7 0 0 0 519 2 816 11 74 18 0 1882 3 1 0 96 March 4, 2026 at 01:43:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 159 165 1 4 0 0 1149 0 1 0 99 1 0 0 7 25 3 28 0 2 0 0 270 0 0 0 100 2 0 0 7 111 0 103 0 4 2 0 3 0 0 0 100 3 0 0 17 220 105 10 1 0 2 0 576 0 0 0 100 4 0 0 3 212 103 4 0 0 0 0 294 0 0 0 100 5 0 0 0 13 3 6 0 0 1 0 3 0 0 0 100 6 0 0 0 11 2 4 1 0 0 0 301 0 0 0 100 7 0 0 0 12 2 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2203 122 314 1 31 365 0 1142 0 2 0 98 1 0 0 7 91 21 110 1 24 441 0 265 0 2 0 98 2 0 0 0 93 20 97 1 18 272 0 0 0 2 0 98 3 0 0 17 285 138 54 2 22 209 0 566 0 2 0 98 4 0 0 115 247 104 91 0 29 386 0 296 0 1 0 99 5 0 0 0 55 2 69 1 18 400 0 0 0 2 0 98 6 0 0 0 52 1 72 1 20 344 0 300 0 2 0 98 7 0 0 0 52 1 62 1 15 352 0 0 0 2 0 98 March 4, 2026 at 01:43:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2329 120 618 3 114 1683 0 1141 0 4 0 96 1 0 0 7 281 5 595 3 140 1579 0 260 0 3 0 97 2 0 0 7 232 1 520 4 128 1582 0 1 0 3 0 97 3 0 0 17 695 378 498 3 139 1616 0 604 0 4 0 96 4 0 0 3 543 113 696 1 136 1625 0 294 0 3 0 97 5 0 0 7 210 3 452 4 112 1500 0 0 0 3 0 97 6 0 0 0 290 2 632 5 127 1571 0 261 0 3 0 97 7 0 0 0 261 28 513 3 114 1633 0 0 0 3 0 97 March 4, 2026 at 01:43:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2431 125 536 23 37 49 0 4132 19 2 0 78 1 0 0 7 494 5 800 17 40 31 0 3167 13 2 0 86 2 0 0 0 416 5 620 19 52 12 0 1818 6 1 0 93 3 0 0 17 736 129 844 15 45 9 0 2696 8 1 0 91 4 0 0 504 417 111 369 4 36 9 0 1303 2 1 0 97 5 0 0 0 166 4 158 2 15 0 0 527 1 0 0 98 6 0 0 0 447 0 758 5 32 6 0 1899 3 1 0 96 7 0 0 0 302 1 437 5 17 2 0 2029 4 1 0 95 March 4, 2026 at 01:43:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 101 152 2 6 1 0 1299 0 1 0 99 1 0 0 7 31 7 28 1 0 0 0 289 0 0 0 100 2 0 0 0 16 1 16 1 3 0 0 42 0 0 0 100 3 0 0 17 270 124 63 1 3 0 0 649 0 0 0 100 4 0 0 17 253 119 45 2 3 0 0 607 0 0 0 100 5 0 0 0 61 24 58 0 7 0 0 48 0 0 0 100 6 0 0 0 26 5 31 0 2 0 0 31 0 0 0 100 7 0 0 0 24 4 20 0 2 0 0 34 0 0 0 100 March 4, 2026 at 01:43:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 2169 126 230 1 13 6 4 1293 0 1 0 99 1 793 0 122 31 5 57 0 10 5 9 444 0 0 0 99 2 880 0 0 54 3 63 2 8 6 17 6549 2 1 0 97 3 1955 0 19 310 128 119 3 14 8 11 997 0 1 0 99 4 40 0 3 264 107 74 0 15 10 7 714 0 0 0 100 5 23 0 0 49 4 60 0 10 7 7 162 0 0 0 100 6 7 0 0 53 7 53 0 10 6 2 91 0 0 0 100 7 7 0 0 39 1 33 0 7 3 3 37 0 0 0 100 March 4, 2026 at 01:43:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 126 254 2 26 317 0 1207 0 2 0 98 1 0 0 7 60 15 90 0 20 339 0 262 0 1 0 99 2 0 0 0 32 1 50 0 7 208 0 1 0 1 0 99 3 0 0 17 299 153 86 0 15 258 1 565 0 1 0 99 4 0 0 3 242 105 74 0 11 266 1 594 0 1 0 99 5 0 0 0 72 4 137 0 21 260 0 2 0 1 0 99 6 0 0 0 42 6 78 0 27 264 0 8 0 1 0 99 7 0 0 0 32 1 62 0 16 346 0 1 0 1 0 99 March 4, 2026 at 01:43:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2234 101 364 1 61 844 0 1207 0 2 0 98 1 0 0 7 148 9 313 0 83 884 0 260 0 2 0 98 2 0 0 0 127 1 269 1 66 924 0 0 0 2 0 98 3 0 0 17 544 288 330 1 78 861 0 567 0 2 0 98 4 0 0 3 403 136 368 0 75 945 0 597 0 2 0 98 5 0 0 0 204 3 426 0 56 930 0 0 0 2 0 98 6 0 0 0 185 1 343 0 81 986 0 0 0 2 0 98 7 0 0 0 225 9 455 1 57 755 0 7 0 1 0 98 March 4, 2026 at 01:43:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 67 0 0 6787 107 10682 86 388 109 0 30806 24 15 0 61 1 36 0 0 4788 15 9880 60 388 106 0 23673 19 12 0 69 2 39 0 0 3794 15 7925 42 231 130 0 18533 16 10 0 73 3 93 0 17 4299 116 8952 75 305 101 0 22935 21 11 0 67 4 120 0 3 2847 111 5378 39 248 89 0 15873 13 8 0 79 5 6 0 0 2122 9 4595 37 164 86 0 14184 12 7 0 80 6 467 0 0 2808 17 5918 47 266 133 0 16158 13 8 0 79 7 10 0 7 1941 14 4112 27 147 96 0 9648 8 5 0 88 March 4, 2026 at 01:43:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 6448 104 9822 61 322 137 0 25158 24 15 0 61 1 10 0 0 4615 13 9700 36 362 120 0 23823 19 12 0 69 2 5 0 0 4378 13 9090 28 258 115 0 19025 17 11 0 72 3 11 0 3 3928 123 7858 45 315 99 0 19465 16 10 0 74 4 8 0 4 3030 119 5844 41 258 114 0 15936 14 8 0 78 5 6 0 0 2005 17 4210 22 146 101 0 12282 12 6 0 82 6 4 0 13 3506 12 7440 23 216 97 0 17085 14 9 0 76 7 6 0 7 2079 9 4468 19 139 88 0 11077 10 6 0 83 March 4, 2026 at 01:44:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6538 110 9580 54 362 162 0 26939 25 16 0 59 1 8 0 0 4635 13 9826 72 419 95 0 24009 19 12 0 68 2 12 0 7 3568 12 7214 36 251 96 0 17131 15 10 0 75 3 7 0 3 4453 120 9266 43 304 89 0 23253 20 12 0 68 4 11 0 3 3004 113 5770 40 258 125 0 14182 14 8 0 78 5 13 0 0 2273 11 4690 20 126 85 0 9786 9 6 0 86 6 9 0 0 3079 10 6618 38 213 91 0 16808 15 9 0 75 7 6 0 14 2342 11 5006 24 125 55 0 10111 8 6 0 86 March 4, 2026 at 01:44:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3455 108 2643 41 395 2150 0 3303 5 9 0 86 1 7 0 21 940 16 1746 29 317 2329 1 4261 15 8 0 78 2 61 0 7 867 3 1554 26 283 2151 0 3300 11 7 0 82 3 0 0 12 1607 506 2058 40 345 2486 0 5264 7 10 0 84 4 4 0 577 994 110 1598 27 310 2256 0 2253 9 8 0 84 5 1 0 0 857 5 1563 19 254 2127 0 2454 6 7 0 87 6 0 0 0 1040 14 1901 42 337 2224 0 3258 7 7 0 87 7 6 0 14 692 17 1221 31 225 2375 0 3524 12 7 0 81 March 4, 2026 at 01:44:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 100 102 0 4 5 0 0 0 1 0 99 1 0 0 0 104 42 133 1 5 3 0 1125 0 0 0 100 2 0 0 14 42 14 46 1 3 8 0 260 0 0 0 100 3 0 0 3 229 112 37 0 3 10 0 600 0 0 0 100 4 0 0 3 234 109 31 0 2 5 0 6 0 0 0 100 5 0 0 0 12 0 10 0 1 6 0 10 0 0 0 100 6 0 0 0 28 1 25 0 4 5 0 37 0 0 0 100 7 0 0 14 12 2 7 0 0 0 0 517 0 0 0 100 March 4, 2026 at 01:44:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 100 108 0 0 0 0 0 0 1 0 99 1 0 0 112 11 1 37 0 0 1 0 1127 0 0 0 99 2 0 0 7 131 54 110 0 1 0 0 260 0 0 0 100 3 0 0 3 238 106 16 1 2 1 0 603 0 0 0 100 4 1 0 3 241 110 20 0 0 0 0 13 0 0 0 100 5 0 0 0 23 0 4 0 1 1 0 13 0 0 0 100 6 0 0 0 29 3 10 0 1 0 0 307 0 0 0 100 7 0 0 14 28 1 10 1 1 0 0 273 0 0 0 100 March 4, 2026 at 01:44:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 135 178 0 3 0 0 0 0 1 0 99 1 0 0 7 18 3 46 1 1 0 0 1137 0 0 0 100 2 0 0 7 50 19 46 0 2 0 0 267 0 0 0 100 3 0 0 3 220 104 13 1 0 2 0 604 0 0 0 100 4 0 0 3 221 108 14 0 0 0 0 5 0 0 0 100 5 0 0 0 15 7 4 0 0 0 0 11 0 0 0 100 6 0 0 0 16 2 8 0 1 1 0 294 0 0 0 100 7 0 0 14 20 3 22 0 1 1 0 268 0 0 0 100 March 4, 2026 at 01:44:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 2479 123 588 9 44 2 0 1339 8 2 0 90 1 67 0 6 415 3 679 11 56 18 0 4132 13 2 0 85 2 24 0 0 379 7 533 4 31 2 0 1854 3 1 0 95 3 41 0 3 531 108 461 11 28 11 0 3278 18 2 0 80 4 49 0 518 579 112 718 13 41 11 0 1876 10 2 0 88 5 34 0 0 305 23 391 6 21 1 0 606 1 1 0 98 6 86 0 0 514 3 880 13 56 7 0 2656 4 2 0 95 7 56 0 14 227 2 293 2 14 1 0 870 1 0 0 98 March 4, 2026 at 01:44:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2356 101 636 3 150 1653 0 0 0 4 0 96 1 0 0 7 277 10 649 2 175 1701 0 1386 0 3 0 97 2 0 0 0 254 3 561 2 168 1472 0 0 0 3 0 97 3 0 0 3 806 429 622 2 157 1726 0 601 0 4 0 96 4 0 0 3 461 105 585 3 153 1754 0 0 0 3 0 97 5 0 0 0 363 30 692 0 156 1527 0 11 0 3 0 97 6 0 0 0 574 7 1190 1 140 1577 0 294 0 3 0 97 7 0 0 14 282 15 603 1 141 1538 0 266 0 2 0 98 March 4, 2026 at 01:44:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 112 0 0 1 0 1 0 0 0 100 1 0 0 7 14 4 36 1 0 2 0 1385 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 3 0 0 7 225 107 20 0 1 0 0 605 0 0 0 100 4 0 0 7 215 105 8 0 1 1 0 2 0 0 0 100 5 0 0 0 20 7 12 0 0 1 0 9 0 0 0 100 6 0 0 0 12 2 4 0 0 1 0 294 0 0 0 100 7 0 0 14 109 52 102 1 0 1 0 266 0 0 0 100 March 4, 2026 at 01:44:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 1 0 0 0 0 0 0 100 1 0 0 7 11 3 36 1 0 0 0 1384 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 3 219 104 12 1 0 0 0 601 0 0 0 100 4 0 0 3 213 104 6 0 0 1 0 0 0 0 0 100 5 0 0 0 23 6 24 0 1 0 0 9 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 7 0 0 14 107 51 102 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:44:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1021 0 112 2668 101 1243 19 68 53 15 4468 3 3 0 94 1 928 0 7 838 8 1734 19 89 32 16 11450 5 3 0 92 2 132 0 2 766 3 1544 16 62 31 9 5309 8 2 0 90 3 352 0 3 1013 109 1679 23 67 35 4 4723 4 2 0 94 4 1989 0 3 648 105 913 14 47 38 4 3958 3 2 0 94 5 43 0 0 323 18 598 10 35 27 3 1712 2 1 0 97 6 8 0 0 594 2 1133 1 42 15 3 2366 1 1 0 98 7 314 0 14 742 42 2039 9 29 37 6 11016 4 2 0 94 March 4, 2026 at 01:44:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 6285 107 8884 87 361 144 0 26198 24 15 0 61 1 6 0 0 4735 13 10024 96 432 138 0 23607 20 13 0 67 2 13 0 0 4054 23 8223 70 280 123 0 20067 18 11 0 71 3 19 0 3 4538 117 9230 81 364 99 0 20726 18 12 0 71 4 4 0 10 2973 114 5575 43 249 122 0 13087 13 8 0 79 5 4 0 0 1839 13 3749 21 143 130 0 10091 9 6 0 86 6 27 0 0 2819 10 5925 50 236 118 0 14839 13 8 0 78 7 5 0 14 2436 8 5111 28 127 63 0 12227 10 7 0 83 March 4, 2026 at 01:44:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 5774 107 7849 77 396 599 0 19903 19 14 0 67 1 22 0 0 3901 12 8145 86 411 568 0 19592 16 12 0 73 2 4 0 0 3181 24 6584 48 274 621 0 15486 14 10 0 76 3 6 0 3 3828 254 7240 77 359 532 0 14662 12 9 0 79 4 73 0 10 2513 118 4928 78 301 612 0 12503 12 8 0 80 5 35 0 0 1649 9 3429 35 192 652 0 6832 7 5 0 88 6 21 0 0 2422 9 5394 103 288 618 0 13249 12 8 0 80 7 4 0 14 1837 9 3855 25 166 611 0 11644 10 7 0 83 March 4, 2026 at 01:44:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 102 0 1 0 0 294 0 0 0 100 1 0 0 0 10 1 32 1 0 1 0 1210 0 0 0 100 2 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 229 106 22 0 1 0 0 301 0 0 0 100 4 0 0 10 218 106 10 1 1 0 0 559 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 14 21 8 18 0 1 0 0 275 0 0 0 100 March 4, 2026 at 01:44:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 1 0 0 294 0 0 0 99 1 0 0 0 15 2 44 1 1 0 0 1211 0 0 0 100 2 0 0 0 83 38 80 0 0 1 0 6 0 0 0 100 3 0 0 3 236 108 28 1 3 0 0 316 0 0 0 100 4 0 0 10 237 117 30 0 1 0 0 561 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 9 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 7 0 0 14 21 8 18 0 1 0 0 272 0 0 0 100 March 4, 2026 at 01:44:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 106 0 0 0 0 294 0 1 0 99 1 0 0 0 14 3 38 0 0 2 0 1214 0 0 0 100 2 1 0 0 19 2 24 0 1 0 0 15 0 0 0 100 3 1 0 2 231 105 26 1 1 0 0 310 0 0 0 100 4 0 0 12 320 155 121 1 4 0 0 566 0 0 0 100 5 0 0 0 14 6 2 0 0 0 0 1 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 14 26 9 24 0 1 0 0 296 0 0 0 100 March 4, 2026 at 01:44:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 106 0 0 0 0 294 0 1 0 99 1 0 0 0 10 2 34 1 0 0 0 1208 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 227 105 20 0 0 0 0 300 0 0 0 100 4 0 0 10 314 156 108 0 0 0 0 561 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 7 0 0 0 100 7 0 0 14 23 8 20 1 1 0 0 275 0 0 0 100 March 4, 2026 at 01:44:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 102 226 0 19 207 0 297 0 1 0 99 1 0 0 0 79 3 172 1 24 188 0 1209 0 1 0 99 2 0 0 0 64 0 124 0 19 191 0 0 0 1 0 99 3 0 0 3 379 187 325 0 30 162 0 304 0 0 0 99 4 0 0 10 340 136 204 1 28 204 0 559 0 1 0 99 5 0 0 0 103 21 159 0 18 175 0 1 0 1 0 99 6 0 0 0 66 1 132 0 23 217 0 1 0 1 0 99 7 0 0 14 72 8 131 0 22 194 0 275 0 0 0 100 March 4, 2026 at 01:44:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 4 1 0 294 0 1 0 99 1 0 0 0 12 3 34 1 0 1 0 1208 0 0 0 100 2 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 3 0 0 3 227 105 18 1 1 1 0 301 0 0 0 100 4 0 0 10 219 106 18 0 1 1 0 561 0 0 0 100 5 0 0 0 107 51 100 0 0 1 0 0 0 0 0 100 6 0 0 0 18 2 11 0 4 0 0 2 0 0 0 100 7 0 0 14 23 9 14 0 0 1 0 275 0 0 0 100 March 4, 2026 at 01:44:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 0 0 0 0 294 0 1 0 99 1 0 0 0 8 1 32 1 0 0 0 1207 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 218 105 12 0 1 0 0 300 0 0 0 100 4 0 0 10 214 106 8 0 0 0 0 559 0 0 0 100 5 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 14 19 7 16 0 0 0 0 275 0 0 0 100 March 4, 2026 at 01:44:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 118 0 0 0 0 294 0 1 0 99 1 0 0 0 9 1 32 1 0 0 0 1207 0 0 0 100 2 0 0 0 15 3 14 0 0 0 0 14 0 0 0 100 3 0 0 3 220 105 16 0 0 0 0 307 0 0 0 100 4 0 0 10 219 106 16 0 1 0 0 566 0 0 0 100 5 0 0 0 116 56 108 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 1 0 0 2 0 0 0 100 7 0 0 14 23 7 20 1 0 1 0 275 0 0 0 100 March 4, 2026 at 01:44:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 0 0 294 0 1 0 99 1 0 0 0 7 1 1 0 0 0 0 165 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 3 220 106 14 0 0 0 0 301 0 0 0 100 4 0 0 10 217 106 8 1 0 0 0 560 0 0 0 100 5 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 6 0 0 0 110 50 110 0 1 0 0 0 0 0 0 100 7 0 0 14 19 7 16 0 0 0 0 275 0 0 0 100 March 4, 2026 at 01:44:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 2828 130 1671 17 55 69 0 7190 8 4 0 88 1 65 0 0 985 3 1974 11 68 22 0 5809 4 3 0 94 2 24 0 0 945 4 2606 6 52 28 0 11219 4 2 0 94 3 36 0 3 647 109 889 10 47 9 0 2553 2 2 0 96 4 4 0 10 561 107 739 4 37 37 0 3017 2 1 0 97 5 1 0 0 454 1 959 7 23 17 0 2017 1 1 0 97 6 487 0 0 437 19 868 4 35 37 0 1613 2 1 0 97 7 38 0 14 424 10 928 3 33 15 0 3015 2 2 0 96 March 4, 2026 at 01:44:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 6226 106 8885 69 359 171 0 23957 22 14 0 63 1 47 0 0 4709 12 10251 78 421 126 0 25110 22 14 0 64 2 12 0 0 3331 9 6700 56 258 109 0 17793 15 9 0 75 3 9 0 3 4461 120 8925 65 313 107 0 19141 16 11 0 73 4 6 0 10 2835 118 5360 50 232 146 0 14291 14 8 0 78 5 7 0 0 2166 13 4473 32 134 77 0 12247 12 7 0 81 6 2 0 0 3525 13 7542 37 237 118 0 16442 14 10 0 76 7 13 0 14 2448 8 5007 30 140 122 0 12315 9 6 0 84 March 4, 2026 at 01:44:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 14 6843 112 10237 59 334 157 0 25141 24 15 0 60 1 8 0 0 4831 13 10182 64 394 85 0 23844 21 13 0 66 2 6 0 0 3601 13 7442 67 272 87 0 18767 17 10 0 73 3 8 0 3 4055 117 7980 51 290 71 0 18472 16 10 0 74 4 6 0 10 2796 115 5269 45 270 139 0 14092 12 8 0 80 5 6 0 0 1891 9 3959 23 144 73 0 11465 9 6 0 85 6 5 0 0 3122 10 6707 26 216 127 0 17485 15 10 0 75 7 5 0 0 2577 15 5546 22 131 76 0 12396 10 7 0 83 March 4, 2026 at 01:44:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 14 5759 110 7936 72 358 172 0 20481 19 12 0 68 1 7 0 0 3763 14 7705 42 319 89 0 17132 16 10 0 75 2 10 0 0 3043 10 6056 31 217 88 0 15097 14 8 0 77 3 7 0 3 3940 113 8050 45 293 70 0 18972 16 10 0 74 4 6 0 10 2387 115 4487 29 225 129 0 14081 11 7 0 81 5 1 0 0 2275 26 4938 20 135 82 0 13301 11 7 0 81 6 2 0 0 2780 12 5858 29 206 97 0 13607 11 7 0 82 7 10 0 0 1973 16 4203 25 119 36 0 9800 9 6 0 86 March 4, 2026 at 01:44:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2123 109 126 1 1 0 0 279 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 223 106 18 1 0 0 0 323 0 0 0 100 4 0 0 10 223 106 50 1 1 1 0 1470 0 1 0 99 5 0 0 0 42 17 34 0 0 0 0 293 0 0 0 100 6 0 0 0 85 37 82 1 1 0 0 309 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:44:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2283 109 475 3 87 1084 0 279 0 3 0 97 1 0 0 0 192 3 397 2 103 922 0 12 0 2 0 98 2 0 0 0 189 8 385 3 87 896 0 3 0 2 0 98 3 0 0 3 654 355 428 3 94 1008 0 303 0 3 0 97 4 0 0 10 386 106 414 3 96 993 0 1470 0 3 0 97 5 0 0 0 386 3 790 2 83 912 0 295 0 2 0 98 6 0 0 0 230 24 422 4 88 839 0 316 0 2 0 98 7 0 0 0 153 2 336 2 77 969 0 3 0 2 0 98 March 4, 2026 at 01:44:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 112 1 0 1 0 266 0 1 0 99 1 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 7 312 153 104 0 0 1 0 301 0 0 0 100 4 0 0 14 217 106 42 1 1 0 0 1471 0 0 0 99 5 0 0 0 14 4 6 0 0 1 0 294 0 0 0 100 6 0 0 0 24 8 16 0 0 1 0 310 0 0 0 100 7 0 0 0 15 4 6 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:44:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 112 0 0 0 0 266 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 307 151 102 0 0 0 0 300 0 0 0 100 4 0 0 10 215 106 40 0 0 1 0 1469 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 6 0 0 0 23 7 18 0 0 0 0 309 0 0 0 100 7 0 0 0 16 2 16 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:44:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 101 124 0 1 0 0 266 0 1 0 99 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 5 0 0 0 100 3 0 0 3 317 153 116 1 0 0 0 315 0 0 0 100 4 0 0 10 219 106 46 1 0 0 0 1478 0 0 0 99 5 0 0 0 19 9 6 0 0 0 0 294 0 0 0 100 6 0 0 0 23 7 16 2 0 0 0 309 0 0 0 100 7 0 0 0 18 3 14 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:44:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 112 0 0 0 0 266 0 0 0 100 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 3 0 0 3 311 153 104 0 0 0 0 301 0 0 0 100 4 0 0 10 217 106 40 1 0 0 0 1470 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 6 0 0 1 25 8 20 0 0 0 0 310 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:44:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 616 0 14 2234 108 359 116 18 41 4 862 18 2 0 81 1 1644 0 4 101 0 210 74 29 77 9 674 18 1 0 81 2 2217 0 0 103 1 215 80 20 36 9 658 17 1 0 82 3 5967 0 4 366 143 408 90 13 85 2 1657 16 3 0 81 4 1357 0 107 291 106 196 69 28 96 10 2060 18 1 0 81 5 866 0 0 97 7 150 57 19 39 4 660 18 1 0 81 6 2625 0 0 112 8 162 76 14 87 8 1211 17 1 0 81 7 2415 0 0 97 3 146 68 15 97 1 831 17 1 0 81 March 4, 2026 at 01:44:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 375 0 14 2562 116 580 328 44 47 2 3059 97 3 0 0 1 1109 0 0 680 32 929 494 41 68 1 2181 97 3 0 0 2 1993 0 325 541 1 922 496 39 77 2 2457 97 3 0 0 3 1001 0 3 781 103 854 453 37 37 1 2758 97 3 0 0 4 634 0 745 681 108 822 424 38 38 2 4048 97 3 0 0 5 2930 0 0 697 5 1130 588 35 72 6 3009 96 4 0 0 6 1953 0 0 530 2 710 393 48 67 1 3312 97 3 0 0 7 3425 0 0 675 11 1173 599 45 65 3 2477 96 4 0 0 March 4, 2026 at 01:44:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2481 118 526 287 48 37 0 2333 97 3 0 0 1 0 0 14 640 10 1131 581 60 44 0 2822 97 3 0 0 2 0 0 0 487 18 702 382 37 38 0 2493 98 2 0 0 3 0 0 2 611 105 509 291 39 46 0 2548 98 2 0 0 4 0 0 822 567 116 849 435 46 27 0 3793 97 3 0 0 5 0 0 0 485 3 723 387 45 55 0 2722 98 2 0 0 6 0 0 0 546 3 870 457 34 38 0 2728 98 2 0 0 7 0 0 0 528 4 800 436 35 54 0 2323 98 2 0 0 March 4, 2026 at 01:44:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 2209 100 163 89 15 5 0 569 33 1 0 65 1 2 0 14 147 5 231 120 14 11 0 1034 34 1 0 66 2 0 0 0 169 34 167 59 8 4 0 409 33 0 0 66 3 0 0 2 313 106 111 66 11 6 0 777 34 0 0 65 4 3 0 207 346 123 252 98 11 10 0 2204 32 1 0 67 5 270 0 0 214 12 264 91 19 6 0 1005 32 1 0 67 6 3 0 0 153 3 197 108 11 8 0 1107 35 1 0 65 7 3 0 0 125 5 179 75 20 13 0 639 34 1 0 66 March 4, 2026 at 01:44:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 1 0 0 0 0 1 0 99 1 2 0 14 11 3 4 1 0 0 0 281 0 0 0 100 2 0 0 0 109 50 102 0 1 0 0 0 0 0 0 100 3 0 0 3 216 102 14 0 2 0 0 300 0 0 0 100 4 0 0 10 228 112 50 1 0 0 0 1491 0 0 0 99 5 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 6 0 0 0 17 2 12 0 0 0 0 300 0 0 0 100 7 0 0 0 15 3 10 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:44:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 104 0 0 1 0 3 0 0 0 100 1 0 0 14 10 2 10 0 0 1 0 272 0 0 0 100 2 0 0 0 91 40 88 0 2 3 0 0 0 0 0 100 3 0 0 3 237 113 32 0 2 1 0 303 0 0 0 100 4 0 0 10 236 115 62 1 0 1 0 1508 0 0 0 99 5 0 0 0 12 3 8 0 0 0 0 295 0 0 0 100 6 0 0 0 20 4 14 0 1 0 0 305 0 0 0 100 7 0 0 0 16 2 14 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:44:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 100 0 0 1 0 0 0 0 0 100 1 0 0 14 8 2 2 0 0 1 0 266 0 0 0 100 2 0 0 0 16 1 8 0 0 1 0 0 0 0 0 100 3 0 0 7 317 153 108 1 0 1 0 301 0 0 0 100 4 0 0 14 233 112 62 1 2 1 0 1491 0 0 0 99 5 0 0 0 13 3 6 0 0 1 0 294 0 0 0 100 6 0 0 0 13 3 4 1 0 1 0 300 0 0 0 100 7 0 0 0 19 4 10 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:44:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2776 102 1115 27 121 54 0 5165 24 4 0 72 1 0 0 0 992 8 1683 47 171 49 0 4104 9 3 0 88 2 3 0 18 663 6 1031 23 92 56 0 4070 17 3 0 80 3 1 0 16 994 133 1259 29 123 57 0 4075 9 3 0 88 4 6 0 795 664 112 840 18 94 61 1 6004 21 3 0 76 5 0 0 0 689 5 1076 9 92 82 0 2688 4 2 0 94 6 29 0 0 698 4 1132 25 110 60 1 4886 13 3 0 84 7 42 0 16 636 9 960 22 61 54 0 5266 21 3 0 76 March 4, 2026 at 01:44:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2293 102 342 3 26 8 0 1439 7 1 0 92 1 0 0 7 358 1 590 8 29 4 0 1317 2 1 0 97 2 0 0 14 128 1 169 10 9 8 0 1746 10 1 0 90 3 24 0 3 493 110 477 10 27 7 1 2042 3 1 0 96 4 4 0 262 428 153 341 2 20 1 0 1677 1 1 0 98 5 0 0 0 119 6 136 0 8 0 0 321 1 0 0 99 6 0 0 0 125 2 150 0 5 0 0 1007 2 0 0 98 7 0 0 0 117 5 120 3 6 3 0 632 3 0 0 96 March 4, 2026 at 01:44:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 0 2160 101 158 0 11 8 5 187 0 1 0 99 1 13 0 0 63 1 50 1 9 6 2 148 0 0 0 100 2 9 0 14 51 1 19 0 4 8 3 290 0 0 0 100 3 5 0 115 244 105 39 0 6 6 3 651 0 0 0 100 4 3 0 10 269 113 66 1 5 3 1 1443 0 0 0 99 5 2677 0 112 136 47 140 2 5 8 12 397 1 1 0 98 6 165 0 0 69 0 77 0 12 13 14 157 0 0 0 100 7 777 0 2 75 7 66 2 11 20 10 6895 2 1 0 97 March 4, 2026 at 01:44:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2354 101 637 2 138 2039 0 0 0 5 0 95 1 0 0 0 580 8 1222 2 167 1905 0 0 0 5 0 95 2 0 0 14 365 16 753 3 144 2039 0 267 0 4 0 96 3 0 0 10 889 462 692 4 159 1956 0 601 0 5 0 95 4 0 0 10 481 107 671 2 161 2095 0 1477 0 5 0 95 5 0 0 0 315 29 647 2 145 1914 0 0 0 4 0 96 6 0 0 0 247 2 571 1 145 2200 0 0 0 5 0 95 7 0 0 0 265 8 575 2 129 1875 0 304 0 5 0 95 March 4, 2026 at 01:44:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 0 1 0 0 0 0 0 0 100 1 0 0 0 8 0 6 0 0 3 0 0 0 0 0 100 2 0 0 14 108 51 108 0 0 2 0 266 0 0 0 100 3 0 0 3 217 106 8 0 1 0 0 599 0 0 0 100 4 0 0 10 216 106 40 1 0 2 0 1471 0 0 0 99 5 0 0 0 9 1 6 0 1 0 0 0 0 0 0 100 6 0 0 0 6 0 2 0 1 2 0 0 0 0 0 100 7 0 0 0 27 8 20 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:44:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 291 0 7 5633 102 7460 63 271 103 0 21050 20 12 0 68 1 195 0 0 3712 13 7883 75 323 83 0 20130 17 10 0 73 2 33 0 0 3083 19 6227 49 215 95 0 15375 13 8 0 78 3 31 0 17 3176 111 6256 63 234 78 0 16908 14 8 0 78 4 120 0 3 2477 121 4806 36 197 60 0 13218 10 7 0 83 5 16 0 0 1482 10 3218 17 91 42 0 7349 7 5 0 88 6 28 0 5 2639 6 5903 32 193 83 0 18838 12 8 0 80 7 1 0 0 1787 11 3748 27 110 63 0 9534 11 5 0 84 March 4, 2026 at 01:44:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 6413 109 9073 59 406 138 0 25104 23 15 0 62 1 15 0 0 4729 20 10001 84 452 121 0 23238 20 13 0 68 2 5 0 7 3972 9 8162 32 280 118 0 16758 15 10 0 75 3 12 0 3 4131 113 8438 54 342 104 0 20761 18 11 0 71 4 9 0 17 2950 119 5791 31 266 112 0 16828 14 9 0 77 5 6 0 0 2140 14 4593 27 158 100 0 13183 12 8 0 80 6 3 0 0 3168 12 6726 39 245 125 0 15527 14 9 0 78 7 3 0 0 2126 19 4400 22 149 72 0 11612 11 6 0 83 March 4, 2026 at 01:44:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2920 103 1919 6 74 43 0 4931 4 4 0 92 1 12 0 0 898 7 1728 7 80 10 0 4098 4 2 0 94 2 10 0 7 884 12 1848 6 50 18 0 3801 3 2 0 95 3 2 0 3 1022 111 1785 9 70 13 0 4128 4 2 0 94 4 3 0 17 866 131 1360 7 51 41 0 5652 3 2 0 94 5 1 0 0 363 20 698 7 29 14 0 1578 2 1 0 97 6 0 0 0 700 2 1523 12 44 23 0 3371 3 2 0 95 7 3 0 0 341 3 738 3 30 12 0 2872 3 2 0 96 March 4, 2026 at 01:44:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2232 100 295 2 65 586 0 0 0 2 0 98 1 0 0 0 149 2 303 2 74 705 0 1 0 2 0 98 2 0 0 7 302 10 555 0 66 702 0 266 0 1 0 98 3 0 0 3 530 287 367 1 85 767 0 0 0 2 0 98 4 0 0 17 403 108 438 2 72 656 0 2375 0 2 0 98 5 0 0 0 186 32 309 1 58 652 0 1 0 2 0 98 6 0 0 0 177 20 325 2 74 664 0 1 0 2 0 98 7 0 0 0 125 1 257 2 56 656 0 0 0 2 0 98 March 4, 2026 at 01:44:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 2 1 0 0 0 1 0 99 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 0 0 7 31 12 23 0 1 1 0 270 0 0 0 100 3 0 0 7 219 102 16 0 1 0 0 0 0 0 0 100 4 0 0 21 217 107 40 2 0 2 0 2375 0 0 0 99 5 0 0 0 39 11 30 0 2 1 0 0 0 0 0 100 6 0 0 0 90 42 82 0 1 1 0 2 0 0 0 100 7 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:44:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 100 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 7 25 10 20 0 0 0 0 269 0 0 0 100 3 0 0 3 212 102 6 0 1 0 0 0 0 0 0 100 4 0 0 17 216 107 40 1 0 1 0 2375 0 0 0 99 5 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 6 0 0 0 13 0 8 0 2 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:44:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 5 0 0 0 100 2 0 0 7 31 10 30 1 1 0 0 281 0 0 0 100 3 0 0 3 217 103 12 0 1 0 0 7 0 0 0 100 4 0 0 17 225 108 54 2 1 0 0 2378 0 0 0 99 5 0 0 0 115 57 106 0 0 0 0 5 0 0 0 100 6 0 0 0 18 2 12 1 0 0 0 7 0 0 0 100 7 0 0 0 12 1 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:44:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 100 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 7 26 10 22 0 0 0 0 267 0 0 0 100 3 0 0 3 215 104 8 0 0 0 0 1 0 0 0 100 4 0 0 17 221 108 44 2 0 1 0 2368 0 0 0 99 5 0 0 0 113 50 112 0 1 0 0 0 0 0 0 100 6 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:44:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 100 0 0 0 0 0 0 1 0 99 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 7 29 11 26 0 0 1 0 271 0 0 0 100 3 0 0 3 214 103 8 0 0 0 0 0 0 0 0 100 4 0 0 17 216 107 40 2 0 0 0 2369 0 0 0 99 5 0 0 0 109 51 106 0 0 0 0 0 0 0 0 100 6 0 0 0 20 1 18 0 1 3 0 2 0 0 0 100 7 0 0 0 10 1 6 0 1 2 0 0 0 0 0 100 March 4, 2026 at 01:44:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 106 0 1 2 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 7 25 9 22 0 0 0 0 271 0 0 0 100 3 0 0 3 215 104 8 0 0 0 0 0 0 0 0 100 4 0 0 17 225 111 49 1 0 1 0 2348 0 0 0 99 5 0 0 0 111 51 107 0 1 0 0 32 0 0 0 100 6 0 0 0 19 1 18 0 2 1 0 0 0 0 0 100 7 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:44:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 101 0 0 0 0 0 0 1 0 99 1 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 2 0 0 7 26 10 22 0 0 0 0 270 0 0 0 100 3 0 0 3 215 103 8 0 0 0 0 0 0 0 0 100 4 0 0 17 215 106 38 2 0 1 0 2073 0 0 0 99 5 0 0 0 91 41 87 0 2 0 0 294 0 0 0 100 6 0 0 0 35 11 28 0 1 0 0 2 0 0 0 100 7 0 0 0 14 1 14 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:44:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 102 0 0 0 0 0 0 1 0 99 1 0 0 0 48 21 44 0 1 0 0 0 0 0 0 100 2 0 0 7 37 13 38 0 0 0 0 286 0 0 0 100 3 0 0 3 215 103 10 0 0 0 0 7 0 0 0 100 4 0 0 17 216 106 40 2 0 0 0 2077 0 0 0 99 5 0 0 0 25 7 18 0 0 2 0 300 0 0 0 100 6 0 0 0 65 30 58 0 0 0 0 0 0 0 0 100 7 0 0 0 16 3 12 0 0 0 0 22 0 0 0 100 March 4, 2026 at 01:44:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 5385 105 7160 55 268 121 0 20007 23 12 0 65 1 3 0 0 3651 20 7473 63 301 86 1 18335 15 10 0 75 2 3 0 7 2670 14 5390 37 213 48 0 13632 13 7 0 80 3 5 0 3 3977 114 8410 67 264 74 0 22540 16 10 0 74 4 2 0 3 2373 119 4567 33 201 87 0 13933 12 7 0 81 5 0 0 14 1886 5 3972 19 120 100 0 11760 9 6 0 85 6 0 0 3 2949 6 6397 32 175 64 0 16256 10 7 0 83 7 1 0 0 1442 9 2984 12 105 63 0 8167 6 4 0 90 March 4, 2026 at 01:44:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 6608 105 9680 83 472 554 0 24283 22 15 0 63 1 5 0 0 4535 9 9538 78 527 607 0 23159 21 14 0 65 2 10 0 0 3505 15 7147 64 361 544 0 16827 16 10 0 74 3 7 0 3 4403 246 9055 73 480 537 0 20398 17 12 0 71 4 3 0 10 3026 123 5922 66 358 570 0 16752 14 10 0 76 5 6 0 14 2423 9 5391 119 254 518 0 13811 12 8 0 79 6 74 0 0 3760 11 7995 57 361 567 0 17978 15 10 0 75 7 6 0 0 2293 17 4798 29 216 500 0 10275 9 6 0 85 March 4, 2026 at 01:44:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 6101 107 8875 68 379 161 0 24347 24 15 0 62 1 3 0 7 5304 15 11084 69 403 113 0 22244 17 12 0 70 2 10 0 0 3958 7 8246 55 286 122 0 20259 18 11 0 71 3 6 0 3 4332 114 8856 57 326 102 0 21083 18 12 0 70 4 6 0 3 2966 124 5716 36 239 128 0 16486 15 9 0 77 5 8 0 0 2166 14 4460 18 134 85 0 12018 11 6 0 83 6 1 0 14 2824 15 6053 35 240 124 0 16244 13 8 0 78 7 3 0 0 2299 7 4868 22 125 86 0 11764 10 6 0 84 March 4, 2026 at 01:44:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2920 101 1822 7 82 24 0 3758 4 3 0 93 1 4 0 7 879 5 1814 3 70 24 0 5520 5 3 0 92 2 2 0 0 789 3 1677 4 43 14 0 3208 3 2 0 95 3 0 0 3 946 104 1656 7 70 32 0 3619 3 2 0 95 4 1 0 3 764 110 1163 4 49 21 0 3513 3 2 0 96 5 0 0 0 403 23 808 6 30 19 0 1852 2 1 0 97 6 1 0 14 538 29 1132 5 43 17 0 4212 2 2 0 96 7 0 0 0 180 3 368 5 15 22 0 1772 1 1 0 98 March 4, 2026 at 01:44:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 1 3 0 0 8 0 1 0 99 1 0 0 7 26 3 23 0 3 0 0 269 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 216 105 10 0 0 0 0 600 0 0 0 100 5 0 0 0 22 7 16 0 3 0 0 0 0 0 0 100 6 0 0 14 126 59 154 2 1 0 0 1489 0 0 0 99 7 0 0 0 17 3 14 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:45:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 105 126 0 0 2 0 15 0 1 0 99 1 0 0 7 10 2 8 0 1 0 0 265 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 1 0 3 210 102 4 0 0 0 0 4 0 0 0 100 4 0 0 3 216 106 10 0 1 0 0 601 0 0 0 100 5 0 0 0 12 1 10 0 0 0 0 8 0 0 0 100 6 0 0 14 115 55 141 0 1 2 0 1484 0 0 0 99 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:45:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2320 115 525 1 79 668 0 8 0 2 0 97 1 0 0 7 147 4 303 3 72 698 0 262 0 2 0 98 2 0 0 0 172 3 307 1 66 625 0 2 0 1 0 99 3 0 0 3 503 264 300 1 73 689 0 0 0 2 0 98 4 0 0 3 378 126 332 3 80 733 0 603 0 2 0 98 5 0 0 0 125 1 276 2 61 737 0 0 0 2 0 98 6 0 0 14 242 11 528 2 78 687 0 1475 0 2 0 98 7 0 0 0 148 14 278 2 71 642 0 294 0 2 0 98 March 4, 2026 at 01:45:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2135 119 138 0 0 0 0 10 0 1 0 99 1 0 0 7 50 20 47 0 3 0 0 260 0 0 0 100 2 0 0 0 50 22 46 0 1 0 0 0 0 0 0 100 3 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 218 105 8 1 1 1 0 600 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 14 12 3 38 1 1 0 0 1476 0 0 0 100 7 0 0 0 14 1 14 0 1 1 0 294 0 0 0 100 March 4, 2026 at 01:45:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 101 0 2 0 0 8 0 1 0 99 1 0 0 7 55 14 49 0 2 0 0 263 0 0 0 100 2 0 0 0 91 43 86 0 1 0 0 1 0 0 0 100 3 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 213 105 5 0 0 0 0 598 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 14 10 3 36 2 0 0 0 1476 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:45:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 108 128 2 0 0 0 22 0 1 0 99 1 0 0 7 115 52 120 0 1 0 0 267 0 0 0 100 2 0 0 0 19 3 14 0 1 0 0 1 0 0 0 100 3 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 214 105 9 0 0 1 0 602 0 0 0 100 5 0 0 0 17 7 6 0 0 0 0 1 0 0 0 100 6 0 0 14 12 3 40 1 0 1 0 1481 0 0 0 100 7 0 0 0 16 2 12 0 2 1 0 295 0 0 0 100 March 4, 2026 at 01:45:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 6 2517 111 784 386 46 29 0 1524 78 3 0 19 1 0 0 7 479 14 931 430 46 34 0 2187 78 2 0 19 2 24 0 0 453 9 715 374 43 26 0 1245 79 2 0 19 3 8 0 10 622 103 731 344 49 41 0 1710 79 2 0 19 4 13 0 559 421 106 382 202 46 16 0 1591 79 2 0 19 5 2 0 0 347 5 508 263 52 13 0 1257 80 1 0 19 6 1578 0 13 378 6 648 324 45 24 0 2926 79 3 0 19 7 279 0 0 548 23 934 478 46 35 0 2114 79 2 0 19 March 4, 2026 at 01:45:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 291 0 0 2539 116 733 407 34 41 0 1383 97 3 0 0 1 4 0 7 465 5 738 402 34 16 0 1805 98 2 0 0 2 329 0 0 478 4 759 417 40 36 1 1478 98 2 0 0 3 0 0 3 620 103 611 343 35 16 0 1285 98 2 0 0 4 2 0 591 528 115 534 304 37 33 0 1702 98 2 0 0 5 109 0 0 574 7 944 502 45 22 0 1638 98 2 0 0 6 4 0 14 417 9 627 338 32 21 0 2839 98 2 0 0 7 0 0 0 507 18 921 479 41 28 0 1984 98 2 0 0 March 4, 2026 at 01:45:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2402 116 481 282 37 13 0 1021 98 2 0 0 1 0 0 7 506 8 887 469 35 24 0 1928 98 2 0 0 2 2 0 0 317 21 356 221 34 24 0 851 99 1 0 0 3 0 0 7 563 109 535 299 39 20 0 1370 98 2 0 0 4 3 0 497 508 110 513 291 28 19 0 1571 98 2 0 0 5 0 0 0 518 7 849 459 35 33 0 1389 98 2 0 0 6 0 0 21 372 6 651 344 31 45 0 2716 98 2 0 0 7 0 0 0 435 6 712 385 27 16 0 1622 98 2 0 0 March 4, 2026 at 01:45:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 121 1 2 2 0 52 2 0 0 98 1 0 0 7 20 3 18 1 4 1 0 330 3 0 0 97 2 2 0 0 126 51 134 4 5 5 0 51 2 0 0 98 3 0 0 3 228 106 20 2 2 0 0 81 2 0 0 98 4 0 0 17 222 104 24 4 1 0 0 617 2 0 0 98 5 22 0 0 18 2 10 4 2 1 0 83 4 0 0 96 6 2 0 14 22 4 57 1 2 0 0 1538 2 0 0 98 7 0 0 0 13 1 7 1 1 0 0 365 2 0 0 98 March 4, 2026 at 01:45:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 144 163 1 4 0 0 14 0 0 0 99 1 0 0 7 53 2 48 0 2 0 0 262 0 0 0 100 2 0 0 0 47 18 42 0 4 0 0 5 0 0 0 100 3 0 0 3 210 101 2 0 1 0 0 1 0 0 0 100 4 0 0 3 213 104 6 1 0 0 0 599 0 0 0 100 5 0 0 0 17 8 8 0 2 0 0 9 0 0 0 100 6 0 0 14 13 4 40 1 0 0 0 1491 0 0 0 100 7 0 0 0 14 1 10 0 1 1 0 294 0 0 0 100 March 4, 2026 at 01:45:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 153 210 0 0 0 0 22 0 1 0 99 1 0 0 7 14 2 14 1 0 0 0 276 0 0 0 100 2 0 0 0 21 2 18 0 1 0 0 4 0 0 0 100 3 0 0 3 215 102 14 0 2 1 0 4 0 0 0 100 4 0 0 3 221 108 14 1 0 3 0 609 0 0 0 100 5 0 0 0 11 1 8 0 1 0 0 2 0 0 0 100 6 0 0 14 14 4 38 1 0 0 0 1488 0 0 0 100 7 0 0 0 21 5 20 0 1 1 0 314 0 0 0 100 March 4, 2026 at 01:45:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 150 206 0 1 1 0 0 0 1 0 99 1 0 0 7 9 2 6 0 0 0 0 260 0 0 0 100 2 0 0 0 20 3 12 0 0 0 0 2 0 0 0 100 3 0 0 3 209 101 2 0 1 0 0 0 0 0 0 100 4 0 0 3 217 104 16 0 1 3 0 599 0 0 0 100 5 0 0 0 14 3 10 0 0 0 0 1 0 0 0 100 6 0 0 14 16 4 42 3 0 3 0 1488 0 0 0 100 7 0 0 0 25 8 22 0 1 0 0 301 0 0 0 100 March 4, 2026 at 01:45:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2755 106 1122 32 143 102 0 2641 8 3 0 89 1 0 0 7 334 2 457 26 65 80 0 3908 24 2 0 74 2 16 0 0 719 8 1113 27 112 68 0 2972 5 2 0 93 3 0 0 3 768 103 934 37 102 89 1 3189 7 2 0 90 4 23 0 538 720 134 910 27 88 76 0 3865 10 2 0 88 5 0 0 0 450 14 607 9 54 35 0 1602 4 1 0 95 6 2 0 38 562 3 1026 35 107 72 1 4054 5 2 0 93 7 0 0 0 442 4 694 17 55 87 0 3077 7 2 0 91 March 4, 2026 at 01:45:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 100 0 2 0 0 0 0 1 0 99 1 0 0 7 15 4 8 0 0 0 0 261 0 0 0 100 2 0 0 0 21 5 12 0 0 0 0 3 0 0 0 100 3 0 0 3 253 122 48 0 2 0 0 4 0 0 0 100 4 0 0 3 258 120 210 1 0 0 0 931 0 0 0 100 5 0 0 7 58 22 56 0 3 0 0 9 0 0 0 100 6 0 0 14 13 3 40 1 2 1 0 1398 0 0 0 99 7 0 0 0 10 1 4 0 0 0 0 294 0 0 0 100 March 4, 2026 at 01:45:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 100 105 0 1 0 0 0 0 1 0 99 1 0 0 7 33 5 10 1 0 0 0 264 0 0 0 100 2 0 0 0 32 3 12 0 1 0 0 6 0 0 0 100 3 0 0 3 325 150 106 0 0 0 0 6 0 0 0 100 4 0 0 3 245 105 22 1 0 0 0 603 0 0 0 100 5 0 0 0 56 16 30 0 1 2 0 27 0 0 0 100 6 0 0 133 22 6 49 0 1 0 0 1401 0 0 0 99 7 0 0 0 40 3 24 0 3 1 0 316 0 0 0 100 March 4, 2026 at 01:45:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 108 0 1 0 0 6 0 1 0 99 1 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 2 0 0 0 17 3 14 0 0 0 0 9 0 0 0 100 3 0 0 3 310 150 104 0 1 1 0 3 0 0 0 100 4 4 0 3 228 107 18 0 1 2 0 608 0 0 0 100 5 0 0 0 25 9 20 0 0 0 0 14 0 0 0 100 6 0 0 21 14 2 38 2 1 0 0 1396 0 1 0 99 7 0 0 0 16 2 11 1 2 0 0 300 0 0 0 100 March 4, 2026 at 01:45:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2809 101 1347 48 231 1624 0 3016 9 6 0 85 1 0 0 0 816 19 1477 45 277 1884 0 2080 7 5 0 88 2 0 0 0 647 9 1125 42 216 1843 0 1825 8 4 0 88 3 0 0 8 1243 487 1429 42 244 1826 0 2537 10 6 0 84 4 0 0 533 740 107 1125 39 235 1727 0 1879 9 4 0 87 5 0 0 0 563 10 1017 31 200 1822 0 1458 6 5 0 90 6 1 0 14 692 7 1364 41 262 2053 0 3061 4 5 0 91 7 0 0 0 483 5 855 31 188 1699 0 2164 6 5 0 89 March 4, 2026 at 01:45:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 1 0 0 0 0 1 0 99 1 0 0 0 128 58 124 0 1 1 0 9 0 0 0 100 2 0 0 0 15 4 8 0 0 1 0 2 0 0 0 100 3 0 0 10 212 104 4 0 0 1 0 260 0 0 0 100 4 0 0 3 213 104 6 1 0 2 0 600 0 0 0 100 5 0 0 0 13 3 2 0 0 1 0 0 0 0 0 100 6 0 0 14 10 3 34 1 0 2 0 1394 0 0 0 99 7 0 0 0 12 2 4 0 1 3 0 294 0 0 0 100 March 4, 2026 at 01:45:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 2132 101 132 0 10 2 2 52 0 1 0 99 1 4 0 0 144 56 128 0 3 4 1 40 0 0 0 100 2 5 0 0 37 5 26 0 4 4 2 59 0 0 0 100 3 2709 0 123 235 103 78 2 5 7 19 718 1 1 0 98 4 839 0 3 250 104 66 3 15 13 13 7213 2 1 0 97 5 73 0 1 45 1 58 0 13 11 12 159 0 0 0 100 6 16 0 14 45 2 84 1 11 11 7 1497 0 0 0 100 7 16 0 0 43 1 40 0 7 9 3 353 0 0 0 100 March 4, 2026 at 01:45:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 102 0 2 0 0 0 0 1 0 99 1 0 0 0 123 58 118 0 1 0 0 8 0 0 0 100 2 0 0 0 37 5 37 0 2 0 0 9 0 0 0 100 3 0 0 10 211 103 6 0 0 0 0 261 0 0 0 100 4 0 0 3 214 104 8 0 0 0 0 599 0 0 0 100 5 0 0 0 19 9 10 0 0 0 0 7 0 0 0 100 6 0 0 14 13 2 42 2 2 1 0 1490 0 0 0 100 7 0 0 0 17 1 14 0 1 0 0 302 0 0 0 100 March 4, 2026 at 01:45:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 165 0 0 2825 102 1641 18 66 29 0 4066 4 3 0 93 1 7 0 0 1292 50 3253 18 67 16 0 12333 5 3 0 92 2 15 0 0 495 7 969 6 47 14 0 3027 3 1 0 96 3 38 0 10 945 106 1711 13 56 24 0 4872 4 2 0 94 4 10 0 3 560 108 679 10 41 21 0 4286 5 2 0 93 5 209 0 0 442 1 917 8 20 16 0 2285 2 1 0 96 6 17 0 14 549 3 1169 9 36 17 0 4469 3 2 0 95 7 5 0 0 308 2 618 3 14 19 0 2663 1 1 0 98 March 4, 2026 at 01:45:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 6761 108 10150 170 607 1417 0 25589 24 18 0 58 1 12 0 0 4515 9 9352 117 646 1517 0 21554 18 15 0 67 2 9 0 0 3654 8 7816 121 503 1427 1 18957 17 13 0 70 3 7 0 3 4286 420 8191 109 571 1498 1 17091 15 13 0 72 4 13 0 10 3056 112 5900 79 466 1520 1 12794 12 10 0 78 5 13 0 0 2576 15 5443 86 367 1449 1 13017 13 9 0 78 6 14 0 14 3295 19 7104 78 465 1525 0 16762 14 12 0 74 7 27 0 0 2803 16 6006 98 360 1412 0 13530 12 10 0 78 March 4, 2026 at 01:45:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 5675 105 7585 46 329 119 0 19433 20 12 0 68 1 10 0 0 4032 20 8597 72 368 117 0 22045 18 12 0 71 2 9 0 0 3283 10 6694 31 230 94 0 16543 14 9 0 77 3 5 0 3 3372 118 6721 49 286 86 0 15346 13 8 0 79 4 4 0 10 2315 111 4400 23 194 61 0 10777 10 6 0 84 5 3 0 0 1472 6 2925 21 113 91 0 6607 6 4 0 90 6 4 0 0 2187 8 4757 36 204 78 0 13585 12 7 0 81 7 12 0 14 2394 19 5120 16 117 93 0 12784 10 7 0 83 March 4, 2026 at 01:45:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 0 0 0 0 0 0 0 100 1 0 0 0 114 53 136 1 0 0 0 1215 0 0 0 100 2 0 0 0 12 2 8 0 0 0 0 3 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 4 0 0 10 214 105 8 0 1 0 0 260 0 0 0 100 5 0 0 0 15 2 14 1 1 0 0 300 0 0 0 100 6 0 0 0 9 1 4 0 0 2 0 300 0 0 0 100 7 0 0 14 23 8 20 1 0 1 0 566 0 0 0 100 March 4, 2026 at 01:45:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 135 180 0 3 1 0 0 0 1 0 99 1 0 0 0 45 17 68 1 2 0 0 1215 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 4 0 0 10 213 105 8 0 0 0 0 260 0 0 0 100 5 0 0 0 19 9 10 0 0 0 0 306 0 0 0 100 6 0 0 0 19 3 18 0 1 0 0 314 0 0 0 100 7 0 0 14 30 8 28 0 1 0 0 576 0 0 0 100 March 4, 2026 at 01:45:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 207 1 1 0 0 19 0 1 0 99 1 0 0 0 21 3 44 1 0 0 0 1238 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 4 0 0 10 212 105 6 0 0 0 0 260 0 0 0 100 5 0 0 0 13 2 6 0 0 0 0 300 0 0 0 100 6 0 0 0 18 1 16 1 1 0 0 300 0 0 0 100 7 0 0 14 27 9 26 0 1 0 0 578 0 0 0 100 March 4, 2026 at 01:45:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2325 150 575 0 61 584 0 0 0 2 0 98 1 0 0 0 246 2 517 2 68 546 0 1215 0 2 0 98 2 20 0 0 135 4 281 1 53 511 0 13 0 2 0 98 3 0 0 3 493 265 269 1 60 563 0 0 0 2 0 98 4 0 0 3 343 107 287 1 68 549 0 2 0 1 0 99 5 0 0 7 116 2 246 1 52 531 0 557 0 1 0 99 6 0 0 0 128 1 281 1 59 573 0 300 0 1 0 98 7 0 0 14 144 9 290 0 65 508 0 570 0 1 0 99 March 4, 2026 at 01:45:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 115 134 0 1 1 0 0 0 1 0 99 1 0 0 0 87 38 110 1 2 1 0 1209 0 0 0 100 2 0 0 0 11 2 4 0 0 1 0 2 0 0 0 100 3 0 0 7 212 103 4 0 0 1 0 0 0 0 0 100 4 0 0 7 210 103 2 0 0 1 0 0 0 0 0 100 5 0 0 7 16 5 8 1 0 1 0 560 0 0 0 100 6 0 0 0 12 2 4 0 0 1 0 300 0 0 0 100 7 0 0 14 25 9 18 1 0 1 0 566 0 0 0 100 March 4, 2026 at 01:45:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 135 186 0 3 0 0 6 0 1 0 99 1 0 0 0 45 17 68 1 2 1 0 1210 0 0 0 100 2 0 0 0 15 4 12 0 0 0 0 9 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 5 0 0 7 12 4 8 0 0 0 0 560 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 301 0 0 0 100 7 0 0 14 27 8 24 1 0 0 0 573 0 0 0 100 March 4, 2026 at 01:45:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 115 140 0 1 1 0 0 0 0 0 100 1 0 0 0 89 37 118 1 2 1 0 1210 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 2 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 5 0 0 7 20 10 12 0 0 0 0 566 0 0 0 100 6 0 0 0 19 3 18 1 0 0 0 314 0 0 0 100 7 0 0 14 29 8 30 0 0 0 0 576 0 0 0 100 March 4, 2026 at 01:45:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 109 52 134 0 1 1 0 1211 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 3 213 104 6 0 0 0 0 1 0 0 0 100 4 0 0 3 213 105 6 0 0 0 0 2 0 0 0 100 5 0 0 7 14 4 8 0 0 0 0 559 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 7 0 0 14 21 7 18 0 1 0 0 568 0 0 0 100 March 4, 2026 at 01:45:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 114 0 1 2 0 0 0 1 0 99 1 0 0 0 114 51 138 1 1 2 0 1209 0 0 0 100 2 0 0 0 13 1 14 0 1 0 0 2 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 5 0 0 7 15 5 10 1 0 0 0 562 0 0 0 100 6 0 0 0 13 1 10 0 0 2 0 300 0 0 0 100 7 0 0 14 28 11 26 1 1 1 0 567 0 0 0 100 March 4, 2026 at 01:45:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 2635 100 1164 19 61 32 0 4517 3 3 0 94 1 0 0 0 1136 17 3098 23 78 25 0 13978 5 3 0 92 2 0 0 0 587 30 1115 9 59 11 0 2603 3 2 0 96 3 2 0 3 855 108 1333 11 60 33 0 3163 2 2 0 96 4 0 0 3 638 104 899 11 44 19 0 4204 7 2 0 92 5 0 0 7 440 5 878 6 32 35 0 3579 2 1 0 96 6 2 0 0 554 3 1131 10 43 12 0 2695 2 2 0 96 7 0 0 14 407 9 866 9 26 23 0 2591 2 1 0 97 March 4, 2026 at 01:45:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6395 112 9312 92 407 136 0 24896 25 16 0 60 1 6 0 14 4641 11 10045 102 404 180 0 24659 20 13 0 67 2 7 0 7 4031 12 8085 71 265 108 0 16927 13 10 0 77 3 6 0 3 4316 118 8567 81 311 128 0 21193 18 11 0 71 4 5 0 3 2872 115 5351 49 246 69 0 14317 13 8 0 78 5 5 0 0 2081 11 4434 28 164 100 0 11833 11 7 0 82 6 12 0 0 3409 9 7245 49 269 93 0 17231 15 9 0 76 7 3 0 0 2059 10 4284 24 126 97 0 11525 10 6 0 84 March 4, 2026 at 01:45:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 6574 108 9702 55 345 128 0 26679 25 16 0 59 1 6 0 14 4850 13 10375 70 403 164 0 24489 21 13 0 66 2 8 0 0 4021 14 8431 33 250 139 0 21115 19 12 0 69 3 6 0 3 4568 108 9400 53 313 112 0 22203 18 12 0 71 4 6 0 10 3041 112 5831 39 243 96 0 14611 13 8 0 79 5 2 0 0 2387 28 4975 15 153 134 0 12195 11 7 0 83 6 5 0 0 2525 10 5320 25 209 131 0 13767 12 8 0 81 7 5 0 0 1736 25 3548 17 105 95 0 7401 6 4 0 89 March 4, 2026 at 01:45:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 5590 106 7580 46 296 126 0 22550 21 13 0 66 1 5 0 14 4012 7 8618 42 292 105 0 17456 16 10 0 74 2 9 0 0 3109 6 6335 34 215 129 0 13059 13 8 0 80 3 5 0 3 3622 124 7162 38 254 91 0 15628 13 8 0 79 4 3 0 3 2756 112 5267 27 218 122 0 13321 11 8 0 82 5 8 0 0 1704 14 3711 13 109 101 0 11735 10 6 0 84 6 4 0 7 2731 15 5774 20 176 115 0 15063 13 8 0 79 7 2 0 0 1630 19 3342 13 93 77 0 9811 8 5 0 88 March 4, 2026 at 01:45:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2499 101 881 2 100 872 0 294 0 3 0 97 1 0 0 14 171 1 368 2 101 1084 0 266 0 3 0 97 2 0 0 0 203 1 376 4 74 1042 0 1 0 2 0 98 3 0 0 3 612 349 357 3 89 955 0 0 0 3 0 97 4 0 0 3 376 107 377 5 104 951 0 7 0 2 0 98 5 0 0 0 184 3 415 3 97 995 0 1510 0 3 0 97 6 0 0 7 172 4 369 3 80 1074 0 260 0 3 0 97 7 0 0 0 282 53 469 4 86 954 0 301 0 2 0 97 March 4, 2026 at 01:45:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 1 0 294 0 1 0 99 1 0 0 14 16 4 16 0 0 1 0 286 0 0 0 100 2 0 0 0 26 3 24 0 0 1 0 21 0 0 0 100 3 0 0 3 217 103 16 0 2 2 0 5 0 0 0 100 4 0 0 3 228 111 20 0 0 1 0 28 0 0 0 100 5 0 0 0 15 4 38 1 1 2 0 1511 0 0 0 99 6 0 0 7 19 5 16 0 2 0 0 261 0 0 0 100 7 0 0 0 114 52 108 1 1 3 0 307 0 0 0 100 March 4, 2026 at 01:45:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 1 0 0 294 0 1 0 99 1 0 0 14 19 7 16 1 0 0 0 275 0 0 0 100 2 0 0 0 15 0 8 0 0 0 0 0 0 0 0 100 3 0 0 3 211 102 4 0 1 0 0 0 0 0 0 100 4 0 0 3 214 103 12 0 1 0 0 0 0 0 0 100 5 0 0 0 11 3 4 0 0 0 0 300 0 0 0 100 6 0 0 7 16 4 42 1 2 0 0 1470 0 0 0 100 7 0 0 0 109 51 104 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:45:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 136 178 0 1 0 0 294 0 1 0 99 1 0 0 14 20 7 20 1 0 0 0 277 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 4 0 0 3 218 105 16 0 0 0 0 13 0 0 0 100 5 0 0 0 15 7 4 1 0 0 0 300 0 0 0 100 6 0 0 7 17 5 42 1 0 1 0 1470 0 0 0 100 7 2 0 0 57 19 54 0 1 0 0 310 0 0 0 100 March 4, 2026 at 01:45:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 151 204 0 0 0 0 294 0 1 0 99 1 0 0 14 20 7 16 0 0 0 0 276 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 1 0 0 0 100 4 0 0 3 215 105 8 0 1 0 0 2 0 0 0 100 5 0 0 0 14 2 14 0 1 0 0 300 0 0 0 100 6 0 0 7 17 5 42 1 0 0 0 1470 0 0 0 100 7 0 0 0 18 1 12 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 151 206 0 0 0 0 294 0 1 0 99 1 0 0 14 19 7 18 0 0 2 0 275 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 2 0 0 0 100 4 0 0 3 214 105 8 0 0 1 0 1 0 0 0 100 5 0 0 0 14 3 10 0 0 1 0 301 0 0 0 100 6 0 0 7 26 5 58 1 2 1 0 1470 0 0 0 100 7 0 0 0 19 1 14 1 1 0 0 300 0 0 0 100 March 4, 2026 at 01:45:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2224 142 269 61 7 6 0 687 18 1 0 81 1 4 0 14 87 8 108 51 10 4 0 569 19 1 0 81 2 6 0 0 151 4 295 134 18 4 0 617 18 1 0 81 3 0 0 3 312 108 166 77 13 4 0 294 18 0 0 81 4 1 0 115 278 104 302 111 16 3 0 730 18 1 0 81 5 1844 0 0 82 2 91 54 12 5 0 747 18 1 0 81 6 31 0 7 168 5 323 132 19 9 0 2156 18 1 0 81 7 257 0 0 82 2 112 56 14 6 0 793 18 0 0 81 March 4, 2026 at 01:45:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2531 102 769 413 37 22 0 1669 97 3 0 0 1 2 0 14 327 7 384 240 43 42 0 1623 98 2 0 0 2 0 0 0 428 5 606 345 39 28 0 1407 98 2 0 0 3 0 0 3 758 113 941 497 42 39 0 1740 98 2 0 0 4 0 0 535 604 114 718 404 31 26 0 1381 98 2 0 0 5 2 0 0 408 5 641 348 41 30 0 1771 98 2 0 0 6 0 0 14 529 8 917 471 31 39 0 3430 97 3 0 0 7 1 0 0 382 32 457 267 49 33 0 1707 98 2 0 0 March 4, 2026 at 01:45:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 2495 103 734 398 39 33 0 2058 97 3 0 0 1 3 0 14 342 4 481 258 40 25 0 2979 98 2 0 0 2 0 0 0 402 15 531 306 27 25 0 1202 98 2 0 0 3 0 0 3 771 138 885 476 32 33 0 1558 98 2 0 0 4 3 0 561 589 106 711 391 32 36 0 1654 98 2 0 0 5 0 0 0 409 9 560 313 37 23 0 1573 98 2 0 0 6 0 0 4 373 5 587 316 34 22 0 1565 98 2 0 0 7 0 0 0 428 4 657 366 35 16 0 1634 99 1 0 0 March 4, 2026 at 01:45:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 2505 104 769 409 26 14 0 2044 94 3 0 3 1 0 0 14 312 4 475 253 32 17 0 2733 92 2 0 6 2 109 0 0 306 1 424 248 36 15 0 936 93 1 0 6 3 2 0 3 656 145 646 355 32 25 0 1229 95 2 0 4 4 112 0 395 532 107 597 336 33 24 0 1290 94 2 0 4 5 0 0 0 342 5 499 277 37 26 0 1532 95 1 0 4 6 0 0 0 317 5 461 261 35 18 0 1242 93 1 0 6 7 0 0 2 444 7 738 406 32 23 0 1970 94 1 0 5 March 4, 2026 at 01:45:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 102 113 0 1 0 0 300 0 1 0 99 1 3 0 14 22 3 52 2 2 2 0 1493 0 1 0 99 2 0 0 0 29 9 24 0 0 0 0 26 0 0 0 100 3 0 0 3 217 103 12 0 1 0 0 11 0 0 0 100 4 4 0 17 216 105 9 0 2 1 0 22 0 0 0 100 5 0 0 0 21 1 16 0 2 1 0 308 0 0 0 100 6 0 0 0 119 52 116 0 2 0 0 1 0 0 0 100 7 0 0 7 23 5 20 0 0 6 0 570 0 0 0 100 March 4, 2026 at 01:45:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 102 0 3 1 0 294 0 1 0 99 1 0 0 14 15 3 40 0 0 2 0 1492 0 0 0 99 2 0 0 0 20 3 20 0 1 1 0 10 0 0 0 100 3 0 0 7 234 109 23 0 3 1 0 19 0 0 0 100 4 0 0 7 214 103 10 0 1 3 0 10 0 0 0 100 5 0 0 0 19 3 10 1 1 1 0 302 0 0 0 100 6 0 0 0 114 53 108 0 1 0 0 0 0 0 0 100 7 0 0 7 17 5 10 0 0 1 0 563 0 0 0 100 March 4, 2026 at 01:45:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 136 178 0 2 0 0 294 0 1 0 99 1 0 0 14 9 2 36 1 0 1 0 1488 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 10 0 0 0 100 3 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 46 17 40 0 1 0 0 0 0 0 0 100 7 0 0 7 14 4 10 0 1 0 0 560 0 0 0 100 March 4, 2026 at 01:45:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2207 150 304 2 14 6 1 534 0 1 0 99 1 23 0 14 63 3 137 4 11 2 0 1733 1 0 0 99 2 0 0 0 29 6 15 3 1 4 0 361 3 0 0 97 3 0 0 3 273 103 123 7 17 28 0 264 0 0 0 99 4 0 0 31 261 106 95 3 12 0 0 471 0 0 0 99 5 0 0 0 63 7 88 3 9 1 0 519 0 0 0 99 6 0 0 0 33 2 20 0 1 0 0 8 0 0 0 100 7 0 0 7 59 4 82 2 3 8 0 553 1 0 0 99 March 4, 2026 at 01:45:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2450 102 608 22 72 45 1 3768 20 2 0 78 1 2 0 14 685 7 1195 31 150 144 0 3715 5 2 0 92 2 0 0 9 542 3 917 19 99 55 0 2514 6 2 0 91 3 0 0 3 645 105 681 23 83 43 0 3055 13 2 0 85 4 31 0 491 595 142 614 10 84 39 1 2649 6 2 0 92 5 0 0 0 502 3 817 13 69 96 0 2461 7 2 0 92 6 0 0 8 488 7 783 21 85 56 1 3675 5 2 0 93 7 0 0 14 402 5 633 12 52 44 0 1650 3 1 0 96 March 4, 2026 at 01:45:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2351 101 647 1 138 1785 0 294 0 4 0 96 1 0 0 14 269 2 616 0 142 1968 0 266 0 4 0 96 2 0 0 0 498 0 1048 1 138 1543 0 0 0 3 0 97 3 0 0 3 823 476 553 1 151 1862 0 3 0 4 0 96 4 0 0 3 526 129 656 2 150 1900 0 309 0 4 0 96 5 0 0 0 292 20 596 2 135 1770 0 300 0 3 0 97 6 0 0 0 273 3 632 2 153 1744 0 1129 0 4 0 96 7 0 0 7 380 16 798 1 144 1722 0 260 0 4 0 96 March 4, 2026 at 01:45:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 122 154 0 2 1 0 294 0 1 0 99 1 0 0 14 28 2 12 0 2 2 0 269 0 0 0 100 2 0 0 0 26 1 8 0 0 0 0 7 0 0 0 100 3 0 0 3 230 105 6 0 0 1 0 5 0 0 0 100 4 0 0 3 259 114 36 0 2 1 0 322 0 0 0 100 5 0 0 1 38 4 24 1 2 2 0 305 0 0 0 100 6 0 0 112 19 4 45 1 1 1 0 1129 0 0 0 99 7 0 0 7 94 34 74 0 1 3 0 263 0 0 0 100 March 4, 2026 at 01:45:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 201 0 0 0 0 287 0 1 0 99 1 1 0 14 10 2 8 0 1 0 0 268 0 0 0 100 2 3 0 0 11 1 6 0 2 0 0 6 0 0 0 100 3 3 0 3 214 103 8 0 1 0 0 15 0 0 0 100 4 1 0 3 228 105 19 1 3 1 0 309 0 0 0 100 5 1 0 0 26 7 21 0 3 1 0 341 0 0 0 100 6 0 0 7 21 4 50 1 2 0 0 1131 0 0 0 99 7 1 0 7 15 3 10 1 0 0 0 261 0 0 0 100 March 4, 2026 at 01:45:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2248 116 149 12 9 46 0 3133 32 2 0 66 1 0 0 14 647 6 1174 28 119 10 0 2870 8 2 0 90 2 0 0 0 427 6 573 16 63 11 0 2297 4 2 0 94 3 1 0 3 839 106 1151 30 98 10 0 3114 5 2 0 93 4 0 0 503 321 105 127 2 16 30 0 1173 2 1 0 97 5 0 0 0 188 14 183 3 12 3 0 1112 1 0 0 99 6 0 0 0 495 9 853 18 66 6 0 2782 3 1 0 96 7 1 0 6 274 23 333 3 22 2 0 1215 2 1 0 97 March 4, 2026 at 01:45:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 137 180 0 1 0 0 19 0 1 0 99 1 0 0 14 26 10 50 0 0 0 0 1401 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 211 103 2 0 0 0 0 2 0 0 0 100 4 0 0 3 217 106 10 0 0 2 0 304 0 0 0 100 5 0 0 0 14 4 8 1 0 0 0 593 0 0 0 100 6 0 0 0 12 2 8 0 0 1 0 1 0 0 0 100 7 0 0 7 56 18 58 0 2 0 0 269 0 0 0 100 March 4, 2026 at 01:45:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2304 119 507 4 108 1211 0 0 0 4 0 96 1 0 0 14 400 15 853 3 122 1159 0 1406 0 3 0 97 2 0 0 0 181 2 400 3 92 1354 0 1 0 3 0 97 3 0 0 3 667 362 447 2 105 1404 0 0 0 4 0 96 4 0 0 3 465 105 553 2 110 1091 0 305 0 3 0 97 5 0 0 0 190 5 408 4 91 1153 0 595 0 3 0 97 6 0 0 0 224 12 484 3 120 1200 0 0 0 2 0 98 7 0 0 7 225 16 436 3 102 1159 0 261 0 3 0 97 March 4, 2026 at 01:45:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 105 0 1 0 0 0 0 1 0 99 1 0 0 14 26 10 50 1 0 1 0 1404 0 0 0 99 2 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 3 0 0 3 209 102 2 0 0 1 0 2 0 0 0 100 4 0 0 3 212 103 4 1 0 1 0 300 0 0 0 100 5 0 0 0 25 6 18 0 0 1 0 595 0 0 0 100 6 0 0 0 11 3 4 0 0 1 0 0 0 0 0 100 7 0 0 7 111 53 104 0 0 1 0 260 0 0 0 100 March 4, 2026 at 01:45:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 120 148 0 1 1 0 1 0 1 0 99 1 0 0 14 29 10 62 2 1 1 0 1404 0 0 0 99 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 208 101 2 0 1 0 0 1 0 0 0 100 4 0 0 3 216 105 10 0 0 0 0 311 0 0 0 100 5 0 0 0 29 8 22 0 1 1 0 603 0 0 0 100 6 0 0 0 15 2 14 0 0 0 0 81 0 0 0 100 7 0 0 7 70 32 64 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:45:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 150 206 0 0 0 0 0 0 0 0 100 1 0 0 14 13 3 40 1 0 0 0 1396 0 0 0 100 2 0 0 0 12 0 14 0 1 0 0 5 0 0 0 100 3 0 0 3 209 102 2 0 0 0 0 2 0 0 0 100 4 0 0 3 216 104 12 0 1 0 0 308 0 0 0 100 5 0 0 0 49 19 40 1 1 1 0 617 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 0 0 7 15 2 14 0 1 1 0 260 0 0 0 100 March 4, 2026 at 01:46:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 1 2161 119 180 1 11 10 4 114 0 1 0 99 1 7 0 14 104 34 131 0 7 5 3 1560 0 1 0 99 2 8 0 0 34 0 22 0 6 6 2 56 0 0 0 100 3 81 0 3 238 102 37 0 6 3 7 76 0 0 0 100 4 766 0 3 245 107 41 3 8 8 3 6808 2 1 0 97 5 2713 0 113 60 10 86 3 8 6 13 1048 1 1 0 98 6 85 0 0 54 2 81 1 12 11 15 149 0 0 0 100 7 17 0 7 44 2 53 0 10 16 6 394 0 0 0 100 March 4, 2026 at 01:46:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 105 0 1 3 0 0 0 1 0 99 1 0 0 14 111 53 138 2 0 0 0 1478 0 1 0 99 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 3 214 102 12 0 1 0 0 2 0 0 0 100 4 0 0 3 213 104 5 1 0 0 0 302 0 0 0 100 5 0 0 0 38 11 34 1 1 1 0 604 0 0 0 100 6 0 0 0 10 2 6 0 0 1 0 0 0 0 0 100 7 0 0 7 13 2 12 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:46:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 74 0 0 3109 100 2094 27 110 26 0 4678 4 3 0 92 1 51 0 14 1601 21 3964 21 114 25 0 16133 7 5 0 88 2 149 0 0 811 7 1602 7 63 45 0 5131 4 3 0 93 3 66 0 3 1174 104 2089 20 98 26 0 5141 4 3 0 93 4 3 0 3 1120 104 1925 17 60 35 0 6370 8 3 0 89 5 226 0 0 699 33 1412 6 34 43 0 5389 4 3 0 93 6 22 0 0 876 4 1876 16 68 45 0 5053 4 3 0 93 7 11 0 7 559 3 1116 13 43 12 0 2400 2 1 0 97 March 4, 2026 at 01:46:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 6408 105 9391 65 391 128 0 24273 22 14 0 63 1 14 0 7 4844 13 10570 86 408 114 0 28668 23 15 0 62 2 14 0 0 4162 5 8612 53 290 84 0 19324 18 11 0 71 3 12 0 17 4022 113 8224 94 371 114 0 21579 18 11 0 71 4 6 0 3 3051 120 5879 35 261 105 0 14102 13 8 0 80 5 13 0 0 1862 20 3709 32 139 60 0 8797 8 5 0 88 6 3 0 0 3280 18 6850 42 230 71 0 14187 13 8 0 79 7 4 0 0 2136 10 4512 17 118 117 0 11634 10 6 0 84 March 4, 2026 at 01:46:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 5479 104 7355 57 285 77 0 18937 17 11 0 72 1 3 0 7 3792 17 8069 47 310 60 0 18019 14 10 0 76 2 28687 0 0 2676 8 5405 37 194 543 0 15728 20 12 0 68 3 30394 0 3 3122 114 6295 57 254 505 0 15056 21 12 0 67 4 3 0 17 1903 128 3318 19 162 71 0 9177 8 5 0 87 5 24 0 0 1556 22 3272 26 105 65 0 9075 8 5 0 86 6 3 0 0 2225 14 4742 25 168 70 0 10130 10 6 0 84 7 6 0 0 1550 13 3247 14 91 42 0 9168 8 5 0 88 March 4, 2026 at 01:46:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 110 0 2 0 0 0 0 1 0 99 1 0 0 7 23 4 20 0 0 0 0 260 0 0 0 100 2 0 0 0 11 1 32 1 0 1 0 1210 0 0 0 100 3 0 0 3 211 102 2 0 0 0 0 2 0 0 0 100 4 0 0 17 325 160 120 1 0 0 0 577 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 18 4 12 1 1 0 0 594 0 0 0 100 March 4, 2026 at 01:46:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2229 100 320 2 59 691 0 0 0 2 0 98 1 0 0 0 199 13 338 1 66 779 0 0 0 2 0 98 2 0 0 0 124 2 298 3 62 701 0 1211 0 2 0 98 3 0 0 3 549 309 695 1 81 691 0 0 0 2 0 98 4 0 0 17 419 143 375 3 78 782 0 575 0 2 0 98 5 0 0 7 135 5 273 1 58 587 0 260 0 2 0 98 6 0 0 0 151 0 315 1 67 705 0 0 0 2 0 98 7 0 0 0 121 4 256 1 59 595 0 594 0 1 0 99 March 4, 2026 at 01:46:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 102 0 1 1 0 0 0 0 0 100 1 0 0 0 121 53 118 0 1 1 0 0 0 0 0 100 2 0 0 0 11 2 32 1 0 2 0 1210 0 0 0 100 3 0 0 7 218 102 12 0 2 0 0 2 0 0 0 100 4 0 0 21 224 110 19 0 0 1 0 575 0 0 0 100 5 0 0 7 15 5 8 0 0 1 0 260 0 0 0 100 6 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 15 4 6 0 0 1 0 595 0 0 0 100 March 4, 2026 at 01:46:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 101 0 0 0 0 0 0 0 0 100 1 0 0 0 49 17 44 0 2 0 0 0 0 0 0 100 2 0 0 0 17 2 46 1 1 1 0 1215 0 0 0 100 3 0 0 3 282 136 76 0 2 0 0 11 0 0 0 100 4 0 0 17 225 111 20 0 1 0 0 575 0 0 0 100 5 0 0 7 12 4 8 0 1 0 0 260 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:46:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 1 0 0 0 0 0 100 1 0 0 0 22 2 20 0 0 0 0 5 0 0 0 100 2 0 0 0 7 1 32 0 0 1 0 1210 0 0 0 100 3 0 0 3 309 152 102 0 0 0 0 2 0 0 0 100 4 0 0 17 233 113 32 1 0 0 0 589 0 0 0 100 5 0 0 7 17 8 8 0 1 0 0 260 0 0 0 100 6 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 7 0 0 0 17 3 12 1 0 0 0 593 0 0 0 100 March 4, 2026 at 01:46:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 102 0 0 0 0 1 0 0 0 100 1 0 0 0 19 3 12 0 0 0 0 23 0 0 0 100 2 0 0 0 10 1 34 1 1 1 0 1211 0 0 0 100 3 0 0 3 316 151 117 0 3 1 0 0 0 0 0 100 4 0 0 17 227 113 23 1 1 0 0 577 0 0 0 99 5 0 0 7 14 4 8 0 0 0 0 261 0 0 0 100 6 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 595 0 0 0 100 March 4, 2026 at 01:46:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 104 0 1 3 0 0 0 0 0 100 1 0 0 0 15 3 14 0 1 0 0 0 0 0 0 100 2 0 0 0 9 1 34 1 0 0 0 1209 0 0 0 100 3 0 0 3 253 117 48 0 0 0 0 2 0 0 0 100 4 0 0 17 298 147 92 1 1 0 0 575 0 0 0 100 5 0 0 7 11 3 8 0 1 0 0 260 0 0 0 100 6 0 0 0 6 0 2 0 0 2 0 0 0 0 0 100 7 0 0 0 16 3 12 0 0 1 0 594 0 0 0 100 March 4, 2026 at 01:46:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 100 0 0 0 0 0 0 1 0 99 1 0 0 0 12 2 8 0 1 0 0 0 0 0 0 100 2 0 0 0 8 1 32 1 0 0 0 1210 0 0 0 100 3 0 0 3 216 101 8 0 1 0 0 0 0 0 0 100 4 0 0 17 325 161 120 0 1 0 0 576 0 0 0 100 5 0 0 7 13 4 8 1 0 0 0 260 0 0 0 100 6 0 0 0 9 1 2 1 0 0 0 1 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 593 0 0 0 100 March 4, 2026 at 01:46:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2107 102 108 0 1 0 0 5 0 1 0 99 1 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 34 1 0 1 0 1211 0 0 0 100 3 0 0 3 225 103 22 0 1 0 0 4 0 0 0 100 4 0 0 17 331 163 126 1 0 0 0 581 0 0 0 100 5 0 0 7 12 4 8 0 0 0 0 260 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 4 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 594 0 0 0 100 March 4, 2026 at 01:46:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3436 105 2992 18 94 42 0 7262 5 4 0 91 1 5 0 0 1252 7 2612 21 86 47 0 7287 8 3 0 89 2 1 0 0 871 1 1750 11 60 39 0 7133 6 3 0 91 3 4 0 3 1194 105 2143 16 64 51 0 6881 6 4 0 91 4 2 0 17 1051 152 1668 8 65 31 0 4057 3 2 0 94 5 33 0 7 570 10 1126 11 46 17 0 3261 3 2 0 96 6 4 0 0 1120 3 2723 13 66 19 0 10685 5 3 0 93 7 3 0 0 461 9 1043 9 37 28 0 3613 3 2 0 95 March 4, 2026 at 01:46:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 6628 104 9741 78 390 93 0 23754 23 15 0 63 1 15 0 0 4732 12 9896 74 413 114 0 23618 21 13 0 66 2 9 0 0 3897 9 7788 52 271 91 0 18417 15 10 0 76 3 9 0 3 4218 125 8542 74 320 112 0 22151 18 12 0 70 4 5 0 3 2990 118 5912 31 282 90 0 14751 13 8 0 78 5 8 0 14 1851 11 3953 29 159 108 0 11754 11 6 0 82 6 18 0 7 3180 7 6775 55 249 99 0 16178 14 9 0 78 7 3 0 0 2503 14 5481 23 142 66 0 12951 11 7 0 82 March 4, 2026 at 01:46:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6926 111 10313 109 526 644 0 23558 22 16 0 62 1 2 0 0 4860 21 10249 84 534 702 0 24416 20 14 0 65 2 12 0 0 3734 14 7707 61 387 663 0 19093 17 12 0 71 3 4 0 10 3841 309 7556 91 453 655 0 17963 15 11 0 74 4 5 0 3 3430 108 6778 60 401 780 0 15890 15 10 0 74 5 4 0 14 2083 10 4477 39 270 742 0 11973 10 8 0 82 6 3 0 2 3431 12 7433 60 395 650 0 15751 14 10 0 76 7 8 0 0 2539 16 5379 42 250 636 0 13497 12 8 0 80 March 4, 2026 at 01:46:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 5258 104 7032 50 267 89 0 17605 17 11 0 72 1 7 0 7 3413 10 7084 54 288 70 0 17153 14 9 0 77 2 3 0 0 2657 12 5522 30 182 69 0 14719 13 8 0 79 3 5 0 3 3130 116 6114 45 235 69 0 14864 12 8 0 80 4 4 0 3 2467 116 4789 21 188 73 0 11763 10 6 0 83 5 3 0 14 1670 14 3507 13 106 48 0 9294 8 5 0 87 6 1 0 0 2339 7 4944 34 167 83 0 11859 10 6 0 84 7 5 0 0 1784 24 3717 11 90 56 0 8581 7 5 0 88 March 4, 2026 at 01:46:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 114 0 0 0 0 294 0 1 0 99 1 0 0 7 14 5 10 0 0 0 0 561 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 219 107 12 0 0 0 0 9 0 0 0 100 4 0 0 3 278 136 100 2 1 1 0 1508 0 0 0 99 5 0 0 14 5 1 2 1 0 0 0 266 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 45 19 38 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 126 0 1 0 0 294 0 1 0 99 1 0 0 7 23 7 22 1 0 0 0 577 0 0 0 100 2 0 0 0 6 0 2 0 1 0 0 3 0 0 0 100 3 0 0 3 222 107 16 0 0 0 0 14 0 0 0 100 4 0 0 3 322 156 155 1 1 0 0 1534 0 1 0 99 5 0 0 14 15 8 8 0 1 0 0 272 0 0 0 100 6 0 0 0 12 2 10 0 0 0 0 7 0 0 0 100 7 0 0 0 14 1 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:46:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 109 126 0 2 0 0 294 0 1 0 99 1 0 0 7 32 11 29 0 1 1 0 560 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 4 1 0 3 251 121 72 1 2 1 0 1510 0 0 0 99 5 0 0 14 23 9 18 0 1 0 0 267 0 0 0 100 6 0 0 0 51 22 48 0 1 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:46:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2212 101 282 3 54 575 0 1215 0 2 0 98 1 0 0 0 143 11 287 2 73 565 0 320 0 2 0 98 2 0 0 0 178 0 337 0 54 491 0 175 0 1 0 99 3 0 0 3 476 251 574 0 74 480 0 0 0 1 0 99 4 0 0 3 339 104 284 2 65 507 0 672 0 2 0 98 5 0 0 14 115 3 246 1 54 542 0 268 0 2 0 98 6 0 0 0 155 25 264 1 51 499 0 0 0 2 0 98 7 0 0 0 165 28 285 1 55 468 0 0 0 1 0 99 March 4, 2026 at 01:46:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2144 138 172 0 3 0 0 554 0 1 0 99 1 0 0 0 26 9 20 1 1 0 0 309 0 0 0 100 2 0 0 0 23 1 44 1 0 0 0 1210 0 0 0 100 3 0 0 3 212 101 10 0 1 0 0 0 0 0 0 100 4 0 0 3 217 106 10 1 0 0 0 305 0 0 0 100 5 0 0 14 5 1 2 1 0 0 0 266 0 0 0 100 6 0 0 0 11 2 8 0 0 0 0 4 0 0 0 100 7 0 0 0 46 17 40 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:46:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2159 153 210 0 0 0 0 554 0 1 0 99 1 0 0 0 24 9 18 0 0 0 0 309 0 0 0 100 2 0 0 0 13 3 38 0 0 0 0 1215 0 0 0 100 3 0 0 3 210 101 4 0 2 0 0 11 0 0 0 100 4 0 0 3 214 103 12 0 1 0 0 300 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 268 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 1 0 0 0 100 7 0 0 0 19 2 14 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1031 0 7 2259 142 353 113 9 19 0 1286 27 2 0 72 1 3 0 0 146 10 191 86 13 11 0 817 27 0 0 72 2 1021 0 0 203 2 365 154 18 24 0 2240 27 2 0 72 3 0 0 3 322 104 145 73 14 5 0 363 27 0 0 72 4 2 0 157 338 111 242 115 14 4 0 1031 27 1 0 72 5 330 0 14 148 15 198 107 14 26 0 690 27 1 0 72 6 1 0 0 102 3 172 53 22 17 0 591 27 1 0 72 7 10 0 35 185 6 382 150 27 11 0 1026 27 1 0 72 March 4, 2026 at 01:46:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2547 105 859 436 50 25 0 2313 97 3 0 0 1 0 0 0 385 3 494 282 54 49 0 1976 98 2 0 0 2 3 0 0 397 2 578 316 29 28 0 2613 98 2 0 0 3 1 0 10 685 104 781 426 40 26 0 1537 98 2 0 0 4 0 0 563 597 110 754 410 41 31 0 1947 98 2 0 0 5 5 0 14 507 47 701 382 30 48 0 1525 99 1 0 0 6 22 0 0 424 3 624 354 30 25 0 1453 98 2 0 0 7 0 0 0 440 7 617 347 39 17 0 1752 98 2 0 0 March 4, 2026 at 01:46:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2419 104 498 295 29 34 0 1917 98 2 0 0 1 115 0 0 397 7 559 297 42 26 0 1899 98 2 0 0 2 0 0 0 336 13 509 270 38 24 0 2320 98 2 0 0 3 3 0 3 610 104 715 378 43 33 0 1798 98 2 0 0 4 0 0 437 546 106 641 356 42 46 0 1856 98 2 0 0 5 37 0 14 487 25 769 420 32 46 0 1568 98 2 0 0 6 2 0 0 447 19 684 380 24 32 0 1499 98 2 0 0 7 108 0 0 388 8 586 333 24 28 0 1171 99 1 0 0 March 4, 2026 at 01:46:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2453 104 580 317 32 40 0 1996 98 2 0 0 1 0 0 0 443 5 686 376 38 27 0 2073 98 2 0 0 2 0 0 0 356 16 486 270 33 24 0 2432 98 2 0 0 3 0 0 7 653 117 721 393 29 27 0 1462 98 2 0 0 4 3 0 483 512 107 585 322 35 23 0 1692 98 2 0 0 5 0 0 0 487 11 902 489 34 54 0 1453 98 2 0 0 6 0 0 14 393 6 495 306 44 40 0 1747 98 2 0 0 7 2 0 0 342 17 437 264 33 33 0 1183 99 1 0 0 March 4, 2026 at 01:46:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 7 2134 103 83 23 6 1 0 704 18 1 0 82 1 0 0 0 60 4 57 24 4 5 0 436 18 0 0 82 2 0 0 0 86 6 105 16 6 1 0 1335 15 0 0 85 3 0 0 3 338 143 126 18 7 2 0 65 18 0 0 82 4 0 0 59 238 104 48 19 6 5 0 459 14 0 0 86 5 0 0 0 51 1 62 25 6 2 0 131 14 0 0 85 6 0 0 14 49 2 57 16 4 1 0 386 17 0 0 83 7 0 0 0 58 10 45 26 1 0 0 34 17 0 0 83 March 4, 2026 at 01:46:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 109 0 0 1 0 554 0 1 0 99 1 0 0 0 23 4 21 1 0 0 0 320 0 0 0 100 2 0 0 0 8 1 34 0 0 1 0 1222 0 0 0 100 3 0 0 3 320 157 116 0 0 0 0 13 0 0 0 100 4 0 0 3 220 105 20 0 1 0 0 318 0 0 0 100 5 0 0 0 15 6 4 0 1 0 0 5 0 0 0 100 6 3 0 14 21 1 22 0 0 0 0 279 0 0 0 100 7 0 0 0 20 2 22 0 2 1 0 3 0 0 0 100 March 4, 2026 at 01:46:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 106 0 0 0 0 554 0 1 0 99 1 0 0 0 31 10 24 0 0 0 0 309 0 0 0 100 2 0 0 0 8 1 32 1 0 0 0 1222 0 0 0 100 3 0 0 3 305 150 100 0 0 0 0 0 0 0 0 100 4 0 0 3 214 105 6 1 0 0 0 302 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 14 18 3 14 1 0 0 0 267 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2118 103 122 1 1 3 0 553 0 1 0 99 1 0 0 0 29 10 24 0 0 0 0 306 0 0 0 100 2 0 0 0 9 1 34 1 0 2 0 1222 0 0 0 100 3 0 0 3 308 151 102 0 0 0 0 0 0 0 0 100 4 0 0 3 213 105 6 0 0 0 0 303 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 6 0 0 14 16 1 14 0 0 0 0 267 0 0 0 100 7 0 0 0 14 2 10 0 2 1 0 0 0 0 0 100 March 4, 2026 at 01:46:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3538 0 24 2237 107 378 103 56 25 9 1007 71 2 0 27 1 2586 0 0 221 32 290 113 44 28 6 1440 73 1 0 26 2 2253 0 7 126 2 220 69 40 9 10 1669 71 1 0 28 3 5154 0 29 378 114 286 81 35 43 13 1670 75 3 0 22 4 2916 0 4 356 109 203 88 30 45 12 1647 73 1 0 26 5 3553 0 2 145 6 200 79 31 22 8 634 72 1 0 27 6 3854 0 14 157 5 245 86 37 15 15 818 71 1 0 28 7 1812 0 2 165 4 211 92 28 16 11 256 73 1 0 27 March 4, 2026 at 01:46:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 827 0 7 2266 108 285 171 14 11 0 1699 98 2 0 0 1 2302 0 0 246 6 328 196 16 11 0 1181 98 2 0 0 2 1255 0 0 319 13 501 274 28 14 0 2097 98 2 0 0 3 821 0 3 442 102 326 200 20 15 0 1558 98 2 0 0 4 1768 0 318 542 106 691 379 28 8 0 1524 98 2 0 0 5 2919 0 0 251 2 312 196 16 15 0 674 98 2 0 0 6 2273 0 14 336 33 460 265 26 17 0 861 98 2 0 0 7 2132 0 7 343 5 520 276 27 18 0 1094 98 2 0 0 March 4, 2026 at 01:46:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2315 126 354 211 22 7 0 1144 98 2 0 0 1 572 0 14 298 10 396 234 22 14 0 1376 99 1 0 0 2 1568 0 0 247 9 301 180 18 3 0 1734 99 1 0 0 3 2154 0 3 458 104 356 216 21 9 0 979 98 2 0 0 4 388 0 363 416 112 321 188 20 7 0 1177 99 1 0 0 5 0 0 0 223 7 218 155 17 5 0 935 99 1 0 0 6 1222 0 14 379 11 569 331 14 11 0 1190 99 1 0 0 7 1027 0 0 287 6 298 190 18 12 0 667 99 1 0 0 March 4, 2026 at 01:46:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 259 0 0 2280 104 258 174 16 13 0 927 98 2 0 0 1 259 0 7 302 11 402 237 29 13 0 1453 99 1 0 0 2 263 0 0 361 30 520 287 28 7 0 1984 99 1 0 0 3 515 0 3 436 110 307 189 19 5 0 804 99 1 0 0 4 54 0 311 411 114 262 173 13 8 0 907 99 1 0 0 5 541 0 0 253 2 291 192 17 7 0 644 99 1 0 0 6 4 0 14 260 3 318 203 18 11 0 846 99 1 0 0 7 64 0 7 232 2 283 183 12 9 0 701 99 1 0 0 March 4, 2026 at 01:46:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2385 103 539 290 56 412 0 678 96 4 0 0 1 5 0 0 414 13 636 351 47 384 0 1098 97 3 0 0 2 0 0 7 362 12 578 289 50 363 0 2195 98 2 0 0 3 0 0 3 824 336 602 330 45 444 0 716 97 3 0 0 4 1 0 349 542 111 558 307 52 403 0 1131 98 2 0 0 5 1 0 0 383 21 544 287 69 333 0 990 97 3 0 0 6 0 0 14 491 11 817 423 80 270 1 1082 98 2 0 0 7 0 0 0 326 5 485 255 61 490 0 648 97 3 0 0 March 4, 2026 at 01:46:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2393 104 543 289 66 457 1 966 97 3 0 0 1 1 0 0 533 14 898 452 73 499 1 1194 98 2 0 0 2 1 0 7 627 35 1113 552 82 464 0 2176 97 3 0 0 3 0 0 3 929 456 620 329 74 491 0 803 97 3 0 0 4 0 0 339 697 117 997 506 75 473 0 1251 97 3 0 0 5 1 0 7 397 3 636 339 76 386 0 832 98 2 0 0 6 0 0 14 384 3 630 333 63 464 0 980 98 2 0 0 7 0 0 0 403 2 630 331 71 475 3 781 98 2 0 0 March 4, 2026 at 01:46:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2425 104 621 325 67 520 0 721 97 3 0 0 1 3 0 0 423 5 701 363 71 573 0 1045 98 2 0 0 2 0 0 7 426 12 723 348 87 558 0 2485 97 3 0 0 3 0 0 3 1002 466 736 373 73 508 1 759 97 3 0 0 4 0 0 353 789 132 1061 542 66 552 0 1194 98 2 0 0 5 3 0 0 598 8 1061 538 73 505 1 686 98 2 0 0 6 1 0 0 425 2 734 376 93 557 0 937 98 2 0 0 7 0 0 14 437 9 729 381 91 543 1 1271 98 2 0 0 March 4, 2026 at 01:46:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 3100 107 1787 216 329 503 1 4994 56 5 0 39 1 39 0 0 1013 11 1796 188 312 532 2 3646 43 4 0 53 2 1 0 0 865 6 1421 201 222 491 1 5060 48 4 0 48 3 7 0 3 1444 461 1606 179 308 487 1 4459 54 4 0 42 4 1 0 738 928 119 1372 192 285 588 0 3861 49 4 0 48 5 3 0 0 803 12 1268 176 210 499 0 3908 49 3 0 48 6 33 0 0 860 11 1456 167 264 457 1 3969 54 4 0 42 7 0 0 0 822 12 1379 229 223 441 0 3850 47 3 0 50 March 4, 2026 at 01:46:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2124 102 141 1 11 12 0 554 0 1 0 99 1 2 0 0 37 4 35 1 3 5 2 246 0 0 0 99 2 1 0 8 26 3 48 1 2 6 0 1423 1 3 0 97 3 6 0 3 329 151 140 2 8 12 0 651 1 0 0 99 4 21 0 38 252 112 58 0 5 9 1 359 0 0 0 99 5 0 0 0 26 3 24 0 7 12 0 33 0 0 0 100 6 5 0 0 29 1 30 0 10 6 0 54 0 0 0 100 7 0 0 0 34 2 35 0 13 12 0 333 0 0 0 100 March 4, 2026 at 01:46:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2173 103 266 3 62 470 0 266 0 4 0 96 1 0 0 7 95 1 201 1 71 465 0 0 0 2 0 98 2 0 0 0 74 2 200 2 51 414 0 1128 0 3 0 97 3 0 0 3 543 342 216 2 54 387 0 600 0 3 0 97 4 0 0 10 297 112 197 1 52 353 0 270 0 3 0 97 5 0 0 0 76 0 165 1 48 492 0 0 0 3 0 97 6 0 0 0 79 0 179 1 59 448 0 0 0 3 0 97 7 0 0 0 364 32 698 0 67 407 0 294 0 2 0 98 March 4, 2026 at 01:46:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2245 102 362 0 113 655 0 266 0 2 0 98 1 0 0 0 535 3 1086 0 115 513 0 17 0 2 0 98 2 0 0 0 164 2 374 2 109 622 0 1067 0 2 0 98 3 0 0 3 746 467 421 1 119 663 0 662 0 2 0 98 4 0 0 10 395 113 402 1 113 613 0 270 0 2 0 98 5 0 0 0 186 14 375 0 108 560 0 0 0 1 0 99 6 0 0 0 229 37 420 0 102 609 0 2 0 2 0 98 7 0 0 0 257 2 442 0 100 606 0 252 0 2 0 98 March 4, 2026 at 01:46:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2274 101 412 2 123 2831 0 266 0 3 0 97 1 0 0 0 482 4 1013 0 125 3016 0 296 0 2 0 98 2 0 0 0 184 3 413 1 121 3295 0 1 0 2 0 98 3 0 0 3 779 489 461 2 127 2392 0 1731 0 3 0 97 4 0 0 10 415 113 454 1 122 2825 0 268 0 3 0 97 5 0 0 0 287 50 515 0 121 2653 0 0 0 2 0 98 6 0 0 0 273 2 585 0 131 2362 0 2 0 2 0 98 7 0 0 0 269 0 495 0 108 2289 0 0 0 2 0 98 March 4, 2026 at 01:46:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2278 102 476 1 129 1908 0 372 0 3 0 97 1 0 0 0 642 17 1300 3 136 1791 0 349 0 2 0 98 2 1 0 0 200 4 451 3 131 2561 0 832 0 3 0 96 3 27 0 3 846 514 531 2 139 1942 0 1783 0 3 0 97 4 8 0 10 449 111 523 4 150 3139 0 1143 0 3 0 96 5 0 0 0 217 7 464 1 140 1876 0 40 0 2 0 98 6 4 0 0 304 35 581 2 151 2004 0 56 0 2 0 98 7 2 0 0 260 1 516 1 124 1966 0 23 0 2 0 98 March 4, 2026 at 01:46:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2268 104 373 5 82 1317 0 283 0 2 0 98 1 0 0 0 222 25 406 1 92 717 0 295 0 1 0 99 2 0 0 0 198 3 372 1 80 1146 0 0 0 1 0 99 3 0 0 3 706 414 405 4 81 1049 0 1735 0 2 0 98 4 0 0 10 379 107 362 3 88 801 0 263 0 1 0 98 5 0 0 0 179 1 367 0 78 1135 0 0 0 1 0 99 6 0 0 0 448 0 920 0 86 876 0 0 0 1 0 99 7 0 0 0 148 1 309 3 80 805 0 1 0 1 0 99 March 4, 2026 at 01:46:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 101 120 1 2 0 0 266 0 1 0 99 1 0 0 0 119 53 111 1 1 3 0 298 0 0 0 100 2 0 0 0 15 4 10 0 0 0 0 1 0 0 0 100 3 0 0 3 230 110 53 2 1 1 0 1740 0 0 0 99 4 0 0 10 215 105 10 0 1 0 0 260 0 0 0 100 5 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 6 0 0 0 19 5 12 0 1 0 0 4 0 0 0 100 7 0 0 0 10 0 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:46:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2123 116 138 0 2 2 0 266 0 1 0 99 1 0 0 0 93 38 91 0 4 1 0 294 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 3 0 0 7 228 110 48 2 0 1 0 1735 0 0 0 99 4 0 0 14 214 105 12 0 1 0 0 262 0 0 0 100 5 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 6 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 11 1 2 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:46:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 14 2106 101 106 0 1 0 0 284 0 1 0 99 1 0 0 0 59 21 57 0 0 0 0 306 0 0 0 100 2 0 0 0 82 38 78 0 1 0 0 1 0 0 0 100 3 0 0 3 219 106 42 0 1 1 0 1760 0 0 0 99 4 0 0 10 214 105 10 0 1 0 0 261 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 3 0 0 25 8 26 0 1 0 0 18 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2118 111 120 0 3 0 0 274 0 1 0 99 1 0 0 0 32 9 28 0 0 0 0 308 0 0 0 100 2 0 0 0 97 42 97 0 3 0 0 0 0 0 0 100 3 4 0 3 220 104 46 2 0 1 0 1742 0 0 0 99 4 0 0 10 234 106 31 0 2 0 0 269 0 0 0 100 5 0 0 0 17 8 4 0 1 1 0 3 0 0 0 100 6 0 0 0 17 4 12 1 0 0 0 20 0 0 0 100 7 0 0 0 13 0 10 0 2 0 0 3 0 0 0 100 March 4, 2026 at 01:46:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 14 2137 131 164 1 1 0 0 271 0 1 0 99 1 0 0 0 66 30 62 0 1 0 0 308 0 0 0 100 2 0 0 0 19 2 14 0 0 1 0 0 0 0 0 100 3 0 0 3 224 106 50 2 1 1 0 1722 0 0 0 99 4 0 0 10 214 105 8 1 0 0 0 260 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 6 1 0 0 11 2 4 0 0 0 0 10 0 0 0 100 7 2 0 0 17 3 10 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:46:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 108 0 0 0 0 266 0 1 0 99 1 0 0 0 126 60 122 0 0 1 0 305 0 0 0 100 2 0 0 0 20 3 16 0 0 0 0 0 0 0 0 100 3 0 0 3 215 104 37 1 0 4 0 1719 0 0 0 99 4 0 0 10 216 106 12 0 0 3 0 262 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:46:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 102 110 0 1 2 0 266 0 1 0 99 1 0 0 0 61 26 56 0 2 2 0 305 0 0 0 100 2 0 0 0 65 28 58 0 1 1 0 0 0 0 0 100 3 0 0 3 239 115 63 1 1 0 0 1719 0 0 0 99 4 0 0 10 220 106 20 0 1 0 0 260 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 6 0 1 0 0 1 0 0 0 100 7 0 0 0 11 1 6 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:46:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 101 104 0 0 0 0 266 0 1 0 99 1 0 0 0 27 9 20 0 0 1 0 301 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 6 0 0 0 100 3 0 0 3 297 143 120 2 2 1 0 1729 0 0 0 99 4 0 0 10 240 116 36 0 2 0 0 262 0 0 0 100 5 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2111 102 112 1 0 0 0 275 0 1 0 99 1 0 0 0 21 7 14 1 0 1 0 327 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 3 232 107 57 2 1 2 0 1727 0 0 0 99 4 0 0 10 327 161 126 0 0 0 0 271 0 0 0 100 5 0 0 0 13 7 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 12 0 0 0 0 14 0 0 0 100 7 0 0 0 13 0 10 0 0 2 0 3 0 0 0 100 March 4, 2026 at 01:46:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 108 0 0 0 0 284 0 1 0 99 1 0 0 0 12 3 6 0 0 0 0 317 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 3 221 104 44 0 0 1 0 1721 0 0 0 100 4 0 0 10 282 139 78 1 0 0 0 270 0 0 0 100 5 0 0 0 50 21 46 0 2 0 0 0 0 0 0 100 6 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 7 0 0 0 15 2 12 0 0 0 0 10 0 0 0 100 March 4, 2026 at 01:46:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 101 108 0 0 0 0 266 0 1 0 99 1 0 0 0 15 5 10 0 0 0 0 297 0 0 0 100 2 0 0 0 14 4 10 0 0 0 0 1 0 0 0 100 3 0 0 3 288 138 112 1 1 0 0 1716 0 0 0 99 4 0 0 10 227 112 22 0 0 0 0 267 0 0 0 100 5 0 0 0 43 16 38 0 1 0 0 0 0 0 0 100 6 0 0 0 11 1 6 0 0 0 0 1 0 0 0 100 7 0 0 0 16 0 16 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:46:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2121 116 136 0 2 0 0 266 0 1 0 99 1 0 0 0 52 23 46 0 1 2 0 294 0 0 0 100 2 0 0 0 11 3 4 0 0 1 0 0 0 0 0 100 3 0 0 3 249 119 70 2 2 2 0 1718 0 0 0 99 4 0 0 10 228 112 22 1 0 1 0 268 0 0 0 100 5 0 0 0 14 2 4 0 0 1 0 0 0 0 0 100 6 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:46:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 6257 111 8857 102 379 120 0 25495 23 15 0 62 1 1 0 14 4433 14 9243 101 424 108 0 21701 18 12 0 70 2 0 0 0 3295 10 6582 54 257 102 0 18597 16 10 0 74 3 5 0 3 4512 110 9371 90 332 154 0 22821 21 11 0 68 4 8 0 10 2927 124 5691 51 259 90 0 15701 13 8 0 79 5 12 0 0 1997 9 4511 21 142 75 0 16091 12 6 0 82 6 0 0 0 3138 18 6710 38 237 120 0 14869 13 9 0 78 7 126 0 0 2193 12 4586 29 122 100 0 10482 9 6 0 85 March 4, 2026 at 01:46:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 6437 106 9355 48 373 103 0 25015 24 15 0 61 1 2 0 0 5017 21 10709 55 393 90 0 24874 22 14 0 65 2 3 0 0 4004 12 8355 36 272 143 0 19524 18 11 0 71 3 3 0 3 4231 118 8671 61 320 102 0 20221 17 11 0 72 4 1 0 3 2922 120 5507 36 265 98 0 14554 11 8 0 81 5 2 0 0 1944 17 3903 30 164 80 0 9218 8 5 0 86 6 7 0 21 2673 6 5853 31 216 101 0 13610 11 8 0 81 7 0 0 0 2372 18 5105 16 136 100 0 15088 13 8 0 79 March 4, 2026 at 01:47:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 6527 111 9497 84 417 130 0 24138 23 15 0 62 1 13 0 14 4765 22 10023 65 410 106 0 24972 20 13 0 66 2 5 0 0 3721 14 7724 49 290 119 0 19527 17 11 0 72 3 13 0 3 4340 119 8817 61 316 92 0 20237 17 11 0 72 4 1 0 3 3380 118 6637 30 242 115 0 14561 14 9 0 77 5 2 0 7 1819 9 3707 19 134 107 0 10090 9 6 0 85 6 10 0 0 2918 10 6357 39 220 89 0 16948 14 9 0 76 7 4 0 0 1955 10 4015 23 144 88 0 10606 8 6 0 86 March 4, 2026 at 01:47:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2307 101 594 1 73 406 0 1083 1 3 0 96 1 9 0 14 236 3 512 5 71 441 0 1044 1 2 0 97 2 0 0 0 322 11 656 1 68 454 0 817 1 2 0 97 3 0 0 3 834 340 886 3 79 346 0 2104 1 3 0 96 4 2 0 3 705 136 1016 2 77 400 0 1350 1 2 0 97 5 0 0 7 201 6 414 4 74 425 0 749 1 2 0 97 6 1 0 0 212 3 495 2 60 421 0 1942 1 2 0 97 7 0 0 0 190 2 404 1 71 431 0 149 0 2 0 98 March 4, 2026 at 01:47:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2239 100 436 1 109 544 0 0 0 2 0 98 1 0 0 14 152 2 348 5 117 562 0 266 0 2 0 98 2 0 0 0 168 13 366 2 103 517 0 6 0 2 0 98 3 0 0 3 706 464 342 3 108 518 0 594 0 2 0 98 4 0 0 3 743 114 1112 2 124 509 0 300 0 2 0 98 5 0 0 7 192 26 402 1 121 607 0 265 0 2 0 98 6 0 0 0 189 16 428 2 121 532 0 1125 0 2 0 98 7 0 0 0 143 0 348 2 102 529 0 0 0 2 0 98 March 4, 2026 at 01:47:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2196 100 283 0 54 294 0 0 0 1 0 99 1 0 0 14 118 3 245 0 55 358 0 266 0 1 0 99 2 0 0 0 158 25 280 1 40 340 0 13 0 1 0 99 3 0 0 3 535 319 237 1 56 377 0 597 0 1 0 99 4 0 0 3 527 105 656 0 63 304 0 300 0 1 0 99 5 0 0 7 129 12 258 0 60 365 0 262 0 1 0 99 6 0 0 0 141 13 295 2 61 333 0 1125 0 1 0 99 7 0 0 0 158 16 277 0 46 283 0 0 0 1 0 99 March 4, 2026 at 01:47:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 0 1 0 0 4 0 1 0 99 1 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 2 0 0 0 22 6 20 0 0 0 0 25 0 0 0 100 3 0 0 3 218 104 16 0 0 0 0 609 0 0 0 100 4 0 0 3 231 111 28 0 1 0 0 309 0 0 0 100 5 0 0 7 32 12 30 0 2 1 0 271 0 0 0 100 6 0 0 0 19 2 44 1 0 0 0 1126 0 0 0 99 7 0 0 0 110 50 104 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:47:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 1 0 99 1 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 3 211 103 4 0 0 1 0 594 0 0 0 100 4 0 0 3 226 111 18 1 0 1 0 309 0 0 0 100 5 0 0 7 18 4 12 0 0 0 0 262 0 0 0 100 6 0 0 0 21 1 52 0 1 0 0 1124 0 0 0 99 7 0 0 0 109 51 104 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:47:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 100 108 0 1 0 0 0 0 1 0 99 1 0 0 14 8 2 6 1 0 0 0 266 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 3 214 103 8 0 0 3 0 594 0 0 0 100 4 0 0 3 226 111 20 0 0 2 0 309 0 0 0 100 5 0 0 7 18 5 14 1 0 0 0 262 0 0 0 100 6 0 0 0 20 3 44 1 0 0 0 1124 0 1 0 99 7 0 0 0 112 50 106 0 3 0 0 0 0 0 0 100 March 4, 2026 at 01:47:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 114 142 0 4 1 0 0 0 1 0 99 1 0 0 14 10 3 4 0 0 1 0 266 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 3 0 0 7 213 103 8 0 1 0 0 595 0 0 0 100 4 0 0 7 228 112 20 0 0 1 0 307 0 0 0 100 5 0 0 7 23 8 16 0 0 1 0 266 0 0 0 100 6 0 0 0 57 23 80 1 2 1 0 1124 0 0 0 100 7 0 0 0 47 16 34 0 3 1 0 0 0 0 0 100 March 4, 2026 at 01:47:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 100 81 90 7 1 0 242 97 1 0 2 1 6 0 14 167 3 202 121 18 10 0 723 97 1 0 2 2 35 0 0 202 24 378 175 16 2 0 813 97 1 0 2 3 1326 0 3 353 107 142 109 10 0 0 972 97 1 0 2 4 34 0 227 395 109 229 153 13 12 0 611 97 1 0 2 5 2 0 14 207 15 269 146 8 3 0 759 97 1 0 2 6 10 0 0 235 18 237 143 17 3 0 345 97 0 0 2 7 3 0 0 169 2 171 110 15 5 0 1397 97 1 0 2 March 4, 2026 at 01:47:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 102 115 111 5 4 0 166 99 1 0 0 1 0 0 14 157 7 125 117 6 2 0 465 100 0 0 0 2 0 0 0 123 3 110 103 9 5 0 270 100 0 0 0 3 0 0 3 309 103 63 85 10 1 0 705 100 0 0 0 4 0 0 87 334 106 162 117 16 3 0 622 99 1 0 0 5 0 0 7 204 27 177 134 14 9 0 429 100 0 0 0 6 0 0 0 194 35 172 136 19 4 0 201 100 0 0 0 7 0 0 0 151 1 181 129 9 4 0 1397 99 1 0 0 March 4, 2026 at 01:47:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2157 100 121 88 14 2 0 1322 99 1 0 0 1 0 0 14 162 7 141 122 8 4 0 453 100 0 0 0 2 0 0 0 188 32 196 137 10 2 0 210 100 0 0 0 3 0 0 3 326 105 125 105 5 1 0 843 100 0 0 0 4 0 0 115 325 105 93 99 9 3 0 453 100 0 0 0 5 0 0 7 148 6 133 114 8 1 0 482 100 0 0 0 6 0 0 0 177 20 124 118 4 2 0 123 100 0 0 0 7 0 0 0 188 3 197 149 10 3 0 311 100 0 0 0 March 4, 2026 at 01:47:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2188 102 235 145 14 5 0 1309 99 1 0 0 1 1 0 14 138 3 87 91 19 7 0 440 100 0 0 0 2 0 0 0 181 32 150 122 14 5 0 236 100 0 0 0 3 0 0 3 361 108 176 139 7 5 0 978 100 0 0 0 4 0 0 129 329 119 110 105 9 5 0 474 100 0 0 0 5 3 0 7 115 7 64 84 5 4 0 342 100 0 0 0 6 0 0 0 137 4 112 102 7 6 0 168 100 0 0 0 7 0 0 0 144 1 132 116 8 2 0 236 100 0 0 0 March 4, 2026 at 01:47:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2165 103 111 93 13 0 0 1246 99 1 0 0 1 0 0 14 171 5 173 129 14 3 0 538 100 0 0 0 2 0 0 0 149 4 142 122 10 2 0 285 100 0 0 0 3 0 0 3 334 105 118 112 6 3 0 803 100 0 0 0 4 0 0 129 362 112 138 116 11 1 0 425 100 0 0 0 5 0 0 7 197 24 165 131 14 1 0 480 100 0 0 0 6 0 0 0 174 15 144 128 9 4 0 217 100 0 0 0 7 0 0 0 138 12 101 100 15 2 0 178 100 0 0 0 March 4, 2026 at 01:47:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 101 100 82 10 0 0 1245 99 1 0 0 1 0 0 14 166 2 122 113 7 5 0 401 100 0 0 0 2 0 0 0 125 5 95 87 10 1 0 138 100 0 0 0 3 0 0 24 346 105 178 138 9 0 0 840 100 0 0 0 4 0 0 87 382 106 209 155 9 2 0 596 100 0 0 0 5 0 0 7 136 4 109 105 9 3 0 399 100 0 0 0 6 0 0 0 144 11 127 113 10 0 0 235 100 0 0 0 7 0 0 0 201 45 332 125 15 2 0 604 99 1 0 0 March 4, 2026 at 01:47:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 113 147 127 12 4 0 185 99 1 0 0 1 0 0 14 141 8 165 109 14 2 0 1623 99 1 0 0 2 0 0 0 182 4 227 161 12 3 0 370 100 0 0 0 3 0 0 3 346 109 151 127 8 6 0 872 100 0 0 0 4 1 0 101 379 115 188 138 13 2 0 563 100 0 0 0 5 0 0 7 182 32 125 112 12 3 0 421 100 0 0 0 6 2 0 0 161 8 139 116 12 3 0 194 100 0 0 0 7 1 0 0 166 8 166 132 16 1 0 294 100 0 0 0 March 4, 2026 at 01:47:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2182 133 128 113 15 3 0 197 99 1 0 0 1 0 0 14 147 4 169 114 14 3 0 1664 99 1 0 0 2 0 0 0 132 2 104 96 14 2 0 144 100 0 0 0 3 0 0 2 323 104 90 97 5 2 0 753 100 0 0 0 4 0 0 116 354 106 152 126 6 4 0 538 100 0 0 0 5 0 0 14 165 2 164 136 4 4 0 553 100 0 0 0 6 0 0 0 194 21 196 143 11 3 0 248 100 0 0 0 7 2 0 0 172 4 199 144 19 6 0 365 100 0 0 0 March 4, 2026 at 01:47:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 116 108 99 11 1 0 80 99 1 0 0 1 0 0 14 219 33 224 148 9 2 0 1584 99 1 0 0 2 0 0 0 184 9 188 147 7 0 0 245 100 0 0 0 3 0 0 3 338 104 128 117 10 2 0 842 100 0 0 0 4 0 0 101 338 107 153 120 14 0 0 554 100 0 0 0 5 0 0 7 105 3 65 82 7 0 0 417 100 0 0 0 6 0 0 0 130 5 96 95 16 1 0 207 100 0 0 0 7 0 0 0 134 2 138 111 11 4 0 242 100 0 0 0 March 4, 2026 at 01:47:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2184 102 159 128 18 3 0 305 99 1 0 0 1 0 0 14 173 17 184 121 15 3 0 1644 99 1 0 0 2 0 0 0 176 17 153 122 11 7 0 170 100 0 0 0 3 0 0 3 306 103 60 81 5 2 0 684 100 0 0 0 4 0 0 101 345 107 179 137 9 6 0 567 100 0 0 0 5 0 0 7 117 4 78 90 9 2 0 438 100 0 0 0 6 0 0 0 168 10 145 119 10 6 0 185 100 0 0 0 7 0 0 0 168 17 190 137 15 4 0 345 100 0 0 0 March 4, 2026 at 01:47:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2166 107 107 103 5 2 0 165 99 1 0 0 1 0 0 14 180 16 200 135 10 6 0 1672 99 1 0 0 2 0 0 0 141 6 122 110 11 1 0 213 100 0 0 0 3 0 0 3 340 105 114 98 14 3 0 780 100 0 0 0 4 0 0 73 325 106 156 121 16 1 0 603 100 0 0 0 5 2 0 7 131 2 104 100 12 3 0 395 100 0 0 0 6 1 0 0 117 2 82 95 7 3 0 128 100 0 0 0 7 0 0 0 210 32 222 156 7 8 0 271 100 0 0 0 March 4, 2026 at 01:47:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 132 204 146 15 4 0 177 99 1 0 0 1 0 0 14 198 10 242 156 6 8 0 1708 99 1 0 0 2 0 0 0 167 18 139 121 10 4 0 214 100 0 0 0 3 0 0 3 322 103 74 93 4 6 0 733 100 0 0 0 4 0 0 115 361 106 206 150 11 2 0 640 100 0 0 0 5 0 0 7 160 10 186 137 11 1 0 640 100 0 0 0 6 0 0 0 149 2 141 124 10 1 0 263 100 0 0 0 7 0 0 0 139 2 106 103 14 4 0 219 100 0 0 0 March 4, 2026 at 01:47:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 101 191 136 14 7 0 379 99 1 0 0 1 0 0 14 160 6 219 140 17 3 0 1639 99 1 0 0 2 0 0 0 173 24 127 109 22 6 0 189 100 0 0 0 3 0 0 3 317 106 58 82 10 2 0 702 100 0 0 0 4 0 0 115 313 106 77 88 8 2 0 387 100 0 0 0 5 0 0 7 149 6 97 96 6 2 0 382 100 0 0 0 6 0 0 0 167 24 151 123 10 9 0 208 99 1 0 0 7 0 0 0 206 2 235 159 13 5 0 331 100 0 0 0 March 4, 2026 at 01:47:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2189 104 170 131 9 6 0 276 99 1 0 0 1 0 0 14 163 6 210 138 12 4 0 1645 99 1 0 0 2 0 0 0 146 0 139 116 10 2 0 257 100 0 0 0 3 0 0 3 311 103 78 88 10 3 0 752 100 0 0 0 4 0 0 73 282 105 29 68 4 2 0 381 100 0 0 0 5 0 0 7 117 3 67 84 4 1 0 358 100 0 0 0 6 0 0 0 243 53 217 153 10 2 0 157 99 1 0 0 7 0 0 0 203 3 212 162 6 6 0 392 100 0 0 0 March 4, 2026 at 01:47:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 101 51 74 7 0 0 108 99 1 0 0 1 0 0 14 139 5 142 109 7 6 0 1561 99 1 0 0 2 0 0 0 188 2 166 129 11 0 0 178 100 0 0 0 3 0 0 3 350 105 144 120 9 4 0 878 100 0 0 0 4 0 0 115 313 107 140 108 14 3 0 566 100 0 0 0 5 0 0 7 164 4 195 142 18 7 0 526 100 0 0 0 6 0 0 0 176 19 128 113 11 3 0 154 100 0 0 0 7 0 0 0 216 35 195 140 10 2 0 219 100 0 0 0 March 4, 2026 at 01:47:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 102 119 109 14 3 0 238 99 1 0 0 1 0 0 14 126 3 108 90 9 0 0 1531 99 1 0 0 2 2 0 0 165 7 131 119 6 3 0 256 100 0 0 0 3 0 0 3 340 103 100 102 10 3 0 769 100 0 0 0 4 0 0 115 359 113 173 137 10 10 0 590 99 1 0 0 5 0 0 7 206 34 199 138 13 2 0 465 100 0 0 0 6 3 0 0 160 4 166 127 12 1 0 307 99 1 0 0 7 0 0 0 180 18 153 125 17 0 0 194 100 0 0 0 March 4, 2026 at 01:47:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 102 131 100 15 0 0 283 99 1 0 0 1 0 0 14 180 20 229 146 13 0 0 1743 99 1 0 0 2 3 0 0 193 21 208 150 15 2 0 276 100 0 0 0 3 0 0 3 342 104 138 117 7 5 0 812 100 0 0 0 4 0 0 101 318 105 88 96 9 4 0 447 100 0 0 0 5 0 0 14 190 24 162 125 6 2 0 446 100 0 0 0 6 0 0 0 137 5 109 100 11 1 0 183 100 0 0 0 7 0 0 0 185 5 166 132 11 5 0 337 100 0 0 0 March 4, 2026 at 01:47:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 102 169 137 10 1 0 215 99 1 0 0 1 0 0 14 150 5 187 134 6 1 0 1623 99 1 0 0 2 0 0 0 219 51 209 147 12 3 0 196 100 0 0 0 3 0 0 3 303 103 102 96 13 2 0 825 100 0 0 0 4 65 0 59 328 105 123 108 13 2 0 505 100 0 0 0 5 0 0 7 114 4 77 87 11 0 0 379 100 0 0 0 6 0 0 0 125 4 75 86 9 3 0 65 100 0 0 0 7 0 0 0 106 4 61 79 7 1 0 111 100 0 0 0 March 4, 2026 at 01:47:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2128 114 66 34 9 0 0 16 52 1 0 48 1 0 0 14 101 3 117 48 7 1 0 1519 49 0 0 51 2 2 0 0 107 22 81 42 7 0 0 127 43 0 0 57 3 0 0 3 279 108 51 49 5 2 0 674 63 0 0 37 4 0 0 3 270 108 45 40 5 1 0 383 55 0 0 45 5 0 0 0 64 4 33 39 6 0 0 51 62 0 0 38 6 4 0 0 92 13 66 42 8 1 0 106 57 0 0 42 7 0 0 7 44 2 20 29 5 0 0 305 44 0 0 56 March 4, 2026 at 01:47:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 150 198 0 3 1 0 8 0 1 0 99 1 2 0 14 18 4 39 1 2 5 0 1407 0 0 0 100 2 0 0 0 18 3 8 0 0 1 0 8 0 0 0 100 3 4 0 7 216 103 8 0 1 2 0 603 0 0 0 100 4 0 0 21 222 108 16 0 0 2 0 310 0 0 0 100 5 0 0 0 22 5 15 0 1 1 0 10 0 0 0 100 6 0 0 0 25 1 16 0 3 1 0 3 0 0 0 100 7 0 0 7 26 5 15 0 3 1 0 263 0 0 0 100 March 4, 2026 at 01:47:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2150 115 162 0 6 11 5 49 0 1 0 99 1 829 0 126 86 26 162 0 10 7 18 1652 0 1 0 99 2 826 0 0 79 13 99 2 10 10 14 6585 2 1 0 97 3 26 0 4 253 103 64 1 9 7 9 737 0 0 0 100 4 50 0 3 271 114 73 0 9 3 2 452 0 0 0 100 5 7 0 0 36 2 27 0 5 4 2 58 0 0 0 100 6 25 0 0 42 2 34 0 7 5 4 53 0 0 0 100 7 1888 0 7 40 3 39 2 6 6 6 621 0 1 0 99 March 4, 2026 at 01:47:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 135 98 0 1 0 0 3 0 1 0 99 1 0 0 14 11 3 38 1 0 1 0 1481 0 0 0 99 2 0 0 0 50 17 48 0 1 0 0 14 0 0 0 100 3 0 0 3 213 103 8 0 0 0 0 601 0 0 0 100 4 0 0 3 232 112 26 1 1 1 0 314 0 0 0 100 5 0 0 0 25 9 22 0 1 1 0 10 0 0 0 100 6 0 0 0 13 1 12 0 0 0 0 7 0 0 0 100 7 0 0 7 99 3 97 1 3 0 0 262 0 0 0 100 March 4, 2026 at 01:47:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2756 132 1145 12 126 33 0 2966 5 3 0 92 1 33 0 14 577 5 1008 26 88 44 0 5080 12 2 0 86 2 0 0 0 621 2 1042 20 88 62 0 2444 5 2 0 94 3 23 0 3 755 104 967 29 103 59 0 3984 12 2 0 86 4 0 0 522 554 112 672 25 78 38 2 3736 17 2 0 81 5 0 0 0 488 10 741 10 67 38 0 2158 6 1 0 92 6 0 0 0 566 5 937 23 118 89 1 3414 6 2 0 92 7 0 0 7 487 4 694 13 42 43 0 2203 5 1 0 93 March 4, 2026 at 01:47:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2206 102 268 5 77 504 0 23 0 3 0 97 1 0 0 22 113 6 262 7 76 515 0 1400 0 4 0 96 2 0 0 7 118 7 249 4 73 473 0 48 1 2 0 97 3 0 0 3 547 327 250 4 76 521 0 616 0 3 0 97 4 0 0 17 374 123 296 5 69 477 1 408 0 2 0 97 5 0 0 0 178 32 296 8 84 453 0 42 0 2 0 98 6 1 0 0 121 4 247 3 67 502 0 100 0 2 0 97 7 0 0 7 336 4 667 3 81 463 0 315 0 2 0 98 March 4, 2026 at 01:47:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2375 100 661 0 109 756 0 11 0 3 0 97 1 0 0 14 146 3 387 3 124 874 0 1386 0 3 0 97 2 0 0 0 208 5 398 2 103 716 0 8 0 2 0 98 3 1 0 10 708 468 348 2 101 797 0 599 0 3 0 97 4 0 0 3 356 107 365 1 124 767 0 300 0 2 0 98 5 0 0 0 241 49 457 1 103 895 0 0 0 3 0 97 6 0 0 0 276 3 623 2 122 898 0 1 0 2 0 98 7 0 0 7 250 2 555 2 108 741 0 249 0 2 0 98 March 4, 2026 at 01:47:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2283 102 497 0 92 728 0 260 0 2 0 98 1 0 0 0 515 3 1075 1 108 725 0 1120 0 2 0 98 2 0 0 14 211 8 428 2 112 824 0 274 0 2 0 98 3 0 0 3 727 410 437 2 120 764 0 594 0 2 0 98 4 0 0 3 448 133 449 1 103 707 0 300 0 2 0 98 5 0 0 0 236 24 441 1 110 684 1 3 0 2 0 98 6 0 0 0 193 3 391 0 108 684 1 1 0 2 0 98 7 0 0 0 171 1 340 0 87 648 0 2 0 2 0 98 March 4, 2026 at 01:47:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 103 122 1 2 0 0 261 0 1 0 99 1 0 0 0 13 3 36 1 0 1 0 1141 0 0 0 100 2 0 0 14 52 21 52 1 1 1 0 286 0 0 0 100 3 0 0 3 215 103 8 1 0 1 0 601 0 0 0 100 4 0 0 3 216 105 10 0 0 1 0 302 0 0 0 100 5 0 0 0 106 47 91 0 1 0 0 8 0 0 0 100 6 0 0 0 15 2 10 0 0 0 0 1 0 0 0 100 7 0 0 0 15 1 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:47:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2117 102 126 0 2 0 0 296 0 1 0 99 1 0 0 0 20 2 58 0 4 11 0 1967 0 0 0 99 2 0 0 14 121 56 120 0 2 1 0 315 0 0 0 100 3 0 0 3 228 109 28 0 4 0 0 642 0 0 0 100 4 0 0 3 218 104 18 0 3 0 0 398 0 0 0 100 5 0 0 0 25 3 26 0 1 2 0 49 0 0 0 100 6 0 0 0 19 2 22 0 2 5 0 833 0 0 0 100 7 0 0 0 17 2 20 0 1 1 0 68 0 0 0 100 March 4, 2026 at 01:47:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 102 116 0 0 0 0 260 0 1 0 99 1 0 0 0 12 3 38 1 0 1 0 1120 0 0 0 100 2 0 0 14 112 52 108 0 0 0 0 267 0 0 0 100 3 0 0 3 229 110 23 1 1 0 0 605 0 0 0 100 4 0 0 3 212 104 6 0 0 3 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 14 2 10 0 0 0 0 1 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:47:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 114 0 1 0 0 260 0 1 0 99 1 0 0 0 14 3 36 1 1 1 0 1119 0 0 0 100 2 0 0 14 112 52 112 0 1 1 0 266 0 0 0 100 3 0 0 3 227 111 20 0 0 1 0 604 0 0 0 100 4 0 0 3 212 104 4 1 0 1 0 300 0 0 0 100 5 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 6 0 0 0 14 2 8 0 0 1 0 0 0 0 0 100 7 0 0 0 12 3 4 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:47:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 112 0 0 0 0 260 0 1 0 99 1 0 0 0 10 2 34 1 0 0 0 1120 0 0 0 100 2 0 0 14 110 52 106 1 1 1 0 271 0 0 0 100 3 0 0 3 235 111 34 0 2 0 0 614 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 14 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 102 96 1 2 0 0 264 0 1 0 99 1 0 0 0 49 8 71 2 3 1 0 1134 0 0 0 100 2 0 0 14 117 53 122 0 1 0 0 287 0 0 0 100 3 0 0 3 221 105 18 1 1 0 0 640 0 0 0 100 4 0 0 3 216 104 15 0 1 0 0 312 0 0 0 100 5 0 0 0 16 6 6 0 0 0 0 5 0 0 0 100 6 0 0 0 12 1 8 0 0 0 0 0 0 0 0 100 7 0 0 0 14 2 10 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:47:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 102 118 0 0 0 0 266 0 1 0 99 1 0 0 0 26 9 50 3 0 0 0 1156 0 0 0 99 2 0 0 14 107 51 106 0 0 0 0 270 0 0 0 100 3 0 0 3 214 103 8 0 1 0 0 597 0 0 0 100 4 3 0 3 218 105 16 0 1 0 0 304 0 0 0 100 5 0 0 0 10 2 6 0 1 0 0 6 0 0 0 100 6 0 0 0 13 1 10 0 0 1 0 3 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2124 112 126 0 4 0 0 260 0 1 0 99 1 0 0 0 28 11 54 0 0 0 0 1123 0 0 0 99 2 0 0 14 87 41 84 0 1 0 0 266 0 0 0 100 3 0 0 3 218 106 12 0 0 1 0 597 0 0 0 100 4 0 0 3 215 104 9 1 1 0 0 300 0 0 0 100 5 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 6 0 0 0 12 1 8 0 0 0 0 0 0 0 0 100 7 0 0 0 22 2 15 0 2 0 0 2 0 0 0 100 March 4, 2026 at 01:47:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2137 132 164 0 1 0 0 260 0 1 0 99 1 0 0 0 64 28 88 2 1 0 0 1123 0 0 0 99 2 0 0 14 13 1 10 1 0 0 0 265 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 594 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 14 2 10 0 0 0 0 1 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 102 80 0 3 0 0 260 0 1 0 99 1 0 0 0 56 25 78 1 0 1 0 1124 0 0 0 99 2 0 0 14 80 35 76 0 1 0 0 268 0 0 0 100 3 0 0 3 219 107 12 0 0 0 0 599 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 301 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 18 2 20 0 1 0 0 1 0 0 0 100 7 0 0 0 40 2 33 0 2 0 0 2 0 0 0 100 March 4, 2026 at 01:47:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 116 1 0 0 0 261 0 1 0 99 1 0 0 0 24 9 48 1 0 1 0 1123 0 0 0 100 2 0 0 14 114 53 116 0 0 0 0 281 0 0 0 100 3 0 0 3 217 104 12 0 0 2 0 602 0 0 0 100 4 0 0 3 214 105 8 0 0 2 0 301 0 0 0 100 5 0 0 0 18 8 6 0 0 0 0 5 0 0 0 100 6 0 0 0 16 2 12 0 0 0 0 1 0 0 0 100 7 0 0 0 16 1 16 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:47:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 102 118 0 0 0 0 267 0 1 0 99 1 0 0 0 26 9 50 2 0 1 0 1126 0 0 0 99 2 0 0 14 73 34 70 0 0 0 0 290 0 0 0 100 3 0 0 3 254 123 48 1 1 0 0 601 0 0 0 100 4 0 0 3 213 104 4 1 0 0 0 300 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 13 1 10 0 0 1 0 3 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:47:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 117 144 0 3 0 0 260 0 1 0 99 1 0 0 0 71 29 102 1 2 0 0 1123 0 0 0 99 2 0 0 14 9 2 6 1 0 0 0 267 0 0 0 100 3 0 0 3 251 119 40 1 1 0 0 595 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 14 2 10 0 0 0 0 1 0 0 0 100 7 0 0 0 11 1 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:47:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 114 0 0 1 0 260 0 1 0 99 1 0 0 0 129 60 150 1 0 2 0 1125 0 0 0 99 2 0 0 14 12 2 10 0 1 2 0 266 0 0 0 100 3 0 0 7 214 104 6 0 0 1 0 599 0 0 0 100 4 0 0 7 212 104 6 0 1 0 0 300 0 0 0 100 5 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 6 0 0 0 15 2 8 0 0 1 0 0 0 0 0 100 7 0 0 0 13 3 4 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:47:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 102 112 0 0 0 0 260 0 1 0 99 1 0 0 0 121 57 144 2 0 0 0 1120 0 0 0 99 2 0 0 14 7 2 4 0 0 0 0 267 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 594 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 8 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 6131 108 8582 93 357 163 0 25535 26 14 0 59 1 90 0 0 5038 15 10956 92 394 143 0 29387 22 13 0 65 2 16 0 14 3908 20 8396 57 276 78 0 23754 18 11 0 71 3 82 0 3 4474 119 8994 98 337 104 0 21325 16 11 0 74 4 52 0 3 3401 114 6643 38 249 118 0 15121 14 9 0 77 5 236 0 0 1922 18 3851 21 131 83 0 8758 8 5 0 87 6 143 0 7 2678 14 5545 42 200 83 0 12762 11 7 0 82 7 9 0 0 1908 6 4061 23 121 80 0 11859 10 6 0 83 March 4, 2026 at 01:47:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 6647 110 9671 62 350 133 0 24611 24 15 0 61 1 11 0 0 4787 18 10056 59 356 110 0 22102 20 13 0 67 2 7 0 0 3492 12 7385 24 228 125 0 17581 15 10 0 75 3 6 0 17 4651 113 9263 86 332 69 0 20481 16 11 0 73 4 7 0 3 2757 114 5266 28 240 119 0 16493 15 9 0 76 5 7 0 0 2259 12 4906 29 136 85 0 13742 12 8 0 80 6 9 0 7 3124 22 6760 39 235 134 0 18250 15 9 0 76 7 6 0 0 1924 15 3865 16 124 51 0 8594 8 5 0 88 March 4, 2026 at 01:47:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 6767 108 9957 79 458 510 0 22136 20 15 0 65 1 25 0 0 4612 13 9682 101 479 463 0 23040 21 14 0 65 2 13 0 0 3744 14 7678 82 402 561 0 20182 17 12 0 71 3 6 0 17 4960 344 9821 74 434 517 0 20823 17 13 0 71 4 7 0 3 3135 119 6239 76 370 553 0 16652 14 10 0 76 5 7 0 0 2255 6 4780 38 222 501 0 13119 11 8 0 80 6 6 0 7 2988 14 6312 59 332 496 0 15404 13 9 0 77 7 20 0 0 2105 6 4546 34 211 429 0 10505 10 7 0 83 March 4, 2026 at 01:47:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2460 103 868 0 109 552 0 507 0 3 0 97 1 0 0 0 313 4 708 0 97 660 0 1088 1 2 0 97 2 0 0 0 286 22 618 3 86 562 0 672 1 2 0 97 3 0 0 17 797 492 1115 1 101 576 0 689 0 2 0 98 4 0 0 3 434 110 502 3 120 567 0 283 0 2 0 98 5 0 0 0 225 18 455 4 90 635 0 1463 0 2 0 98 6 0 0 0 223 5 488 1 99 632 0 333 0 2 0 98 7 1 0 7 202 5 451 1 95 505 0 789 1 2 0 98 March 4, 2026 at 01:47:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 100 178 0 12 37 0 0 0 1 0 99 1 0 0 0 58 2 101 1 15 43 0 300 0 0 0 100 2 0 0 0 55 9 79 0 5 29 0 12 0 0 0 100 3 0 0 17 328 185 241 0 11 42 0 602 0 0 0 100 4 0 0 3 266 105 118 0 16 45 0 5 0 0 0 100 5 0 0 0 47 2 105 1 11 29 0 1387 0 0 0 99 6 0 0 0 85 17 118 0 10 44 0 1 0 0 0 100 7 0 0 7 117 38 148 0 15 39 0 260 0 0 0 100 March 4, 2026 at 01:47:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 138 194 1 2 0 0 18 0 1 0 99 1 0 0 0 12 3 6 0 0 0 0 321 0 0 0 100 2 0 0 0 26 10 22 0 0 0 0 12 0 0 0 100 3 0 0 17 216 104 10 3 0 0 0 867 0 0 0 100 4 0 0 3 214 105 8 0 0 0 0 2 0 0 0 100 5 0 0 0 15 6 36 1 0 0 0 1128 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 7 0 0 7 51 18 48 0 2 0 0 260 0 0 0 100 March 4, 2026 at 01:47:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 115 136 0 3 0 0 18 0 1 0 99 1 0 0 0 10 2 6 0 0 0 0 303 0 0 0 100 2 0 0 0 29 11 24 0 0 0 0 19 0 0 0 100 3 0 0 17 223 105 17 0 3 0 0 865 0 0 0 100 4 0 0 3 216 104 14 0 1 0 0 4 0 0 0 100 5 0 0 0 9 1 32 0 0 0 0 1124 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 7 0 0 7 91 39 90 0 1 0 0 269 0 0 0 100 March 4, 2026 at 01:47:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2234 108 370 1 60 321 0 1 0 2 0 98 1 0 0 0 321 6 635 0 69 387 0 307 0 1 0 99 2 0 0 0 148 5 288 2 63 366 0 3 0 1 0 99 3 0 0 17 620 377 472 1 74 378 0 860 0 2 0 98 4 0 0 3 344 103 302 1 63 354 0 0 0 1 0 99 5 0 0 0 117 1 290 2 61 354 0 1125 0 1 0 99 6 0 0 0 139 2 291 1 62 433 0 1 0 1 0 99 7 0 0 7 179 33 293 1 46 298 0 260 0 1 0 99 March 4, 2026 at 01:47:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 110 128 0 4 0 0 0 0 1 0 99 1 0 0 0 45 19 37 1 1 2 0 299 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 3 0 0 17 278 135 69 0 2 2 0 863 0 0 0 100 4 0 0 3 213 105 6 0 0 1 0 2 0 0 0 100 5 0 0 0 10 2 32 1 0 1 0 1123 0 0 0 100 6 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 7 0 0 7 14 4 8 0 0 1 0 260 0 0 0 100 March 4, 2026 at 01:47:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 125 60 120 0 0 1 0 313 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 17 212 104 6 1 0 0 0 858 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 1 0 0 0 100 5 0 0 0 8 1 32 1 0 1 0 1124 0 0 0 100 6 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 7 0 0 7 18 3 20 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:47:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1581 0 0 2190 103 136 118 7 1 1 343 97 2 0 2 1 21 0 0 255 21 332 187 27 7 0 946 98 1 0 2 2 4 0 7 209 5 285 169 21 7 1 524 98 0 0 2 3 7 0 17 409 126 157 130 14 3 0 1275 98 1 0 1 4 20 0 171 369 120 183 134 15 6 0 710 98 1 0 2 5 19 0 0 161 6 143 95 15 2 0 1334 98 1 0 2 6 1 0 0 208 5 261 164 17 12 0 408 97 1 0 2 7 0 0 7 185 6 211 143 19 7 0 637 98 0 0 2 March 4, 2026 at 01:48:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 103 132 118 11 5 0 187 99 1 0 0 1 0 0 0 154 3 147 124 9 3 0 544 100 0 0 0 2 4 0 0 122 4 107 104 8 1 0 204 100 0 0 0 3 0 0 17 338 105 90 98 7 1 0 1032 100 0 0 0 4 1 0 73 329 120 97 97 5 2 0 113 100 0 0 0 5 0 0 0 146 3 156 116 6 7 0 1341 99 1 0 0 6 0 0 0 151 3 147 125 8 1 0 287 100 0 0 0 7 1 0 7 204 39 194 139 13 5 0 490 98 2 0 0 March 4, 2026 at 01:48:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2185 106 149 121 12 1 0 300 99 1 0 0 1 0 0 0 187 5 211 148 18 7 0 557 100 0 0 0 2 0 0 0 160 6 174 132 17 10 0 267 100 0 0 0 3 0 0 17 344 105 138 116 13 7 0 1202 99 1 0 0 4 0 0 101 387 136 157 120 15 2 0 156 100 0 0 0 5 0 0 0 143 5 127 99 8 1 0 1302 99 1 0 0 6 0 0 0 129 2 103 104 7 6 0 230 100 0 0 0 7 0 0 7 132 14 93 92 8 2 0 379 99 1 0 0 March 4, 2026 at 01:48:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 110 83 93 7 1 0 89 99 1 0 0 1 0 0 0 171 5 185 133 10 1 0 580 100 0 0 0 2 1 0 0 153 6 183 142 14 2 0 484 99 1 0 0 3 0 0 17 359 105 169 135 12 2 0 1113 100 0 0 0 4 2 0 115 333 105 88 94 12 4 0 206 100 0 0 0 5 0 0 0 151 17 123 101 10 0 0 1272 99 1 0 0 6 0 0 0 175 10 184 142 10 0 0 213 100 0 0 0 7 0 0 7 147 21 96 94 10 5 0 392 99 1 0 0 March 4, 2026 at 01:48:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2191 109 193 146 13 4 0 309 99 1 0 0 1 0 0 0 153 10 125 113 8 2 0 452 100 0 0 0 2 0 0 7 128 4 90 95 9 5 0 125 100 0 0 0 3 0 0 17 373 107 159 129 7 1 0 1099 100 0 0 0 4 0 0 83 356 113 145 116 15 1 0 308 99 1 0 0 5 1 0 0 159 18 166 117 12 5 0 1323 99 1 0 0 6 0 0 0 138 8 135 109 17 4 0 208 100 0 0 0 7 0 0 5 129 9 101 100 14 6 0 441 99 1 0 0 March 4, 2026 at 01:48:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2222 104 251 176 10 3 0 405 99 1 0 0 1 0 0 0 147 8 152 127 11 1 0 645 100 0 0 0 2 0 0 0 185 8 169 135 9 7 0 254 100 0 0 0 3 0 0 17 401 133 171 134 10 3 0 1050 100 0 0 0 4 0 0 101 304 105 63 83 6 3 0 103 100 0 0 0 5 0 0 0 181 7 220 146 9 2 0 1384 99 1 0 0 6 0 0 0 125 3 85 96 5 4 0 205 100 0 0 0 7 0 0 7 158 20 141 113 6 0 0 445 99 1 0 0 March 4, 2026 at 01:48:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 108 98 97 8 5 0 172 99 1 0 0 1 0 0 0 110 3 140 108 15 4 0 754 99 1 0 0 2 0 0 0 138 4 95 98 10 3 0 164 100 0 0 0 3 0 0 17 374 119 166 122 10 4 0 1029 100 0 0 0 4 0 0 87 326 108 95 97 7 5 0 129 100 0 0 0 5 0 0 0 123 2 116 94 6 5 0 1279 99 1 0 0 6 0 0 0 205 36 201 139 9 3 0 232 100 0 0 0 7 0 0 7 146 4 161 125 13 6 0 514 99 1 0 0 March 4, 2026 at 01:48:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 100 68 81 12 2 0 177 99 1 0 0 1 3 0 0 116 3 80 96 5 10 0 478 100 0 0 0 2 0 0 0 190 22 206 147 11 6 0 226 100 0 0 0 3 0 0 17 387 108 170 121 13 12 0 1174 99 1 0 0 4 0 0 115 327 108 112 101 13 3 0 313 99 1 0 0 5 0 0 0 186 15 216 141 18 5 0 1368 99 1 0 0 6 0 0 0 187 19 178 133 12 11 0 245 100 0 0 0 7 0 0 7 145 4 131 120 10 10 0 525 99 1 0 0 March 4, 2026 at 01:48:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 100 136 116 10 2 0 154 99 1 0 0 1 0 0 0 118 2 80 91 10 6 0 469 100 0 0 0 2 0 0 0 123 2 86 90 7 5 0 163 100 0 0 0 3 0 0 21 317 104 64 85 4 3 0 949 100 0 0 0 4 0 0 91 335 113 138 117 10 2 0 314 99 1 0 0 5 0 0 0 250 48 319 181 17 9 0 1542 99 1 0 0 6 0 0 0 158 5 148 123 14 3 0 244 100 0 0 0 7 0 0 7 120 6 109 103 14 5 0 453 99 1 0 0 March 4, 2026 at 01:48:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 103 128 109 12 5 0 269 99 1 0 0 1 0 0 0 175 25 133 112 13 5 0 443 100 0 0 0 2 1 0 0 160 13 134 110 14 9 0 211 100 0 0 0 3 0 0 17 337 105 124 110 12 3 0 1068 100 0 0 0 4 0 0 115 311 105 100 101 7 4 0 157 100 0 0 0 5 0 0 7 221 17 261 165 4 8 0 1437 99 1 0 0 6 0 0 0 145 2 146 121 11 3 0 315 100 0 0 0 7 0 0 7 133 6 120 109 10 1 0 545 100 0 0 0 March 4, 2026 at 01:48:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2199 103 261 168 10 4 0 363 99 1 0 0 1 1 0 0 154 10 148 117 15 16 0 623 99 1 0 0 2 0 0 0 185 23 187 140 10 3 0 251 100 0 0 0 3 0 0 17 379 114 177 143 13 2 0 1141 99 1 0 0 4 0 0 101 322 121 105 94 18 4 0 199 100 0 0 0 5 0 0 0 109 7 91 78 12 10 0 1259 99 1 0 0 6 0 0 0 101 2 59 80 9 2 0 109 100 0 0 0 7 0 0 7 136 3 163 127 10 6 0 519 100 0 0 0 March 4, 2026 at 01:48:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 103 190 147 7 4 0 308 99 1 0 0 1 0 0 0 208 27 188 146 11 5 0 554 100 0 0 0 2 0 0 0 137 15 99 97 11 7 0 210 100 0 0 0 3 0 0 17 318 105 81 94 6 3 0 1076 100 0 0 0 4 0 0 101 322 121 99 94 8 4 0 165 100 0 0 0 5 0 0 0 153 2 178 126 12 7 0 1326 99 1 0 0 6 0 0 0 144 1 143 115 13 2 0 260 100 0 0 0 7 0 0 7 150 8 159 132 9 2 0 486 100 0 0 0 March 4, 2026 at 01:48:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 101 147 117 11 3 0 293 99 1 0 0 1 0 0 0 153 5 155 124 10 1 0 517 100 0 0 0 2 0 0 0 204 9 205 153 9 4 0 297 100 0 0 0 3 0 0 17 314 104 71 91 6 8 0 1051 100 0 0 0 4 1 0 115 325 115 92 99 7 1 0 186 100 0 0 0 5 0 0 0 181 35 163 117 6 6 0 1227 99 1 0 0 6 0 0 0 157 6 149 119 11 0 0 261 100 0 0 0 7 0 0 7 140 4 139 115 15 1 0 481 100 0 0 0 March 4, 2026 at 01:48:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 101 223 160 12 1 0 450 99 1 0 0 1 0 0 0 184 4 216 150 14 6 0 695 100 0 0 0 2 0 0 0 132 2 107 97 10 2 0 150 100 0 0 0 3 0 0 3 314 105 82 87 15 2 0 804 100 0 0 0 4 0 0 87 306 105 88 94 10 3 0 150 100 0 0 0 5 0 0 0 200 33 202 134 6 8 0 1302 99 1 0 0 6 0 0 14 147 9 120 112 7 1 0 455 100 0 0 0 7 0 0 7 154 14 127 111 7 4 0 493 100 0 0 0 March 4, 2026 at 01:48:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2183 101 192 136 11 2 0 239 99 1 0 0 1 0 0 0 203 31 230 160 13 3 0 628 100 0 0 0 2 0 0 0 160 9 142 118 8 0 0 300 100 0 0 0 3 0 0 3 317 107 81 91 7 3 0 760 100 0 0 0 4 0 0 101 329 108 154 120 12 3 0 327 99 1 0 0 5 0 0 7 118 1 129 92 15 2 0 1342 99 1 0 0 6 0 0 14 145 3 133 116 14 3 0 488 100 0 0 0 7 0 0 7 160 19 133 117 13 5 0 424 100 0 0 0 March 4, 2026 at 01:48:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2170 103 144 119 10 1 0 198 99 1 0 0 1 0 0 0 157 8 151 131 6 0 0 532 100 0 0 0 2 0 0 0 146 3 137 119 10 1 0 310 100 0 0 0 3 0 0 3 405 153 169 134 7 4 0 729 100 0 0 0 4 0 0 85 320 108 116 106 7 2 0 236 100 0 0 0 5 0 0 0 144 11 126 95 9 5 0 1298 99 1 0 0 6 0 0 14 131 5 130 113 10 7 0 540 100 0 0 0 7 0 0 6 151 6 155 128 11 5 0 512 100 0 0 0 March 4, 2026 at 01:48:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 100 65 82 10 2 0 150 99 1 0 0 1 0 0 0 131 3 130 114 13 2 0 485 100 0 0 0 2 0 0 0 134 6 159 122 11 2 0 425 100 0 0 0 3 3 0 3 379 114 201 143 10 2 0 650 100 0 0 0 4 0 0 87 366 106 160 130 7 3 0 542 100 0 0 0 5 0 0 0 157 2 177 122 12 5 0 1378 99 1 0 0 6 0 0 14 158 9 150 119 16 3 0 540 100 0 0 0 7 0 0 7 173 37 134 115 15 3 0 406 100 0 0 0 March 4, 2026 at 01:48:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 100 136 114 17 2 0 183 99 1 0 0 1 0 0 0 135 6 123 110 9 9 0 492 100 0 0 0 2 0 0 0 190 37 146 119 10 8 0 137 100 0 0 0 3 0 0 3 326 104 98 100 5 1 0 489 100 0 0 0 4 0 0 73 307 104 73 88 6 0 0 435 100 0 0 0 5 0 0 0 114 2 122 98 4 4 0 1264 99 1 0 0 6 65 0 14 150 5 132 106 9 0 0 510 100 0 0 0 7 0 0 7 181 20 199 137 22 3 0 555 100 0 0 0 March 4, 2026 at 01:48:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 105 89 53 7 1 0 63 59 1 0 40 1 2 0 14 69 3 36 45 5 1 0 617 58 0 0 42 2 0 0 0 93 18 61 48 6 0 0 119 55 0 0 45 3 0 0 3 259 102 20 39 4 1 0 352 61 0 0 39 4 0 0 3 251 104 19 35 2 1 0 360 58 0 0 42 5 0 0 0 73 8 65 37 5 2 0 1228 55 0 0 44 6 0 0 14 154 31 134 50 13 1 0 419 52 0 0 47 7 0 0 0 64 7 37 37 4 1 0 38 55 0 0 45 March 4, 2026 at 01:48:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 106 1 0 0 0 7 0 1 0 99 1 0 0 7 15 4 11 0 0 2 0 565 0 0 0 100 2 0 0 0 20 3 14 0 1 4 0 9 0 0 0 100 3 0 0 3 210 102 4 0 1 0 0 295 0 0 0 100 4 0 0 3 214 104 9 0 2 0 0 302 0 0 0 100 5 2 0 0 12 2 36 1 0 0 0 1138 0 0 0 100 6 3 0 14 123 57 124 1 1 0 0 303 0 0 0 100 7 4 0 0 16 3 13 1 1 1 0 26 0 0 0 100 March 4, 2026 at 01:48:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 1 0 99 1 0 0 7 31 9 33 0 1 0 0 582 0 0 0 100 2 0 0 0 21 1 20 0 1 0 0 12 0 0 0 100 3 0 0 3 232 112 28 0 1 0 0 298 0 0 0 100 4 0 0 3 217 104 12 1 1 0 0 308 0 0 0 100 5 0 0 0 22 8 38 1 1 1 0 1133 0 0 0 100 6 0 0 14 110 53 106 0 0 0 0 279 0 0 0 100 7 0 0 0 13 1 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:48:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 100 0 0 0 0 0 0 1 0 99 1 0 0 7 17 3 14 0 1 0 0 566 0 0 0 100 2 0 0 0 28 5 30 0 1 0 0 7 0 0 0 100 3 0 0 3 307 151 102 0 0 0 0 294 0 0 0 100 4 0 0 3 214 104 8 0 1 1 0 303 0 0 0 100 5 0 0 0 11 1 34 1 0 0 0 1130 0 0 0 100 6 0 0 14 14 5 10 0 0 0 0 273 0 0 0 100 7 0 0 0 24 7 22 0 1 0 0 12 0 0 0 100 March 4, 2026 at 01:48:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2667 101 1030 14 134 38 1 3340 8 3 0 89 1 30 0 10 683 6 1174 40 145 97 0 3830 6 2 0 92 2 2 0 0 402 7 552 15 65 40 0 2807 12 2 0 87 3 0 0 3 851 138 974 36 99 35 0 2790 7 2 0 91 4 0 0 534 509 106 552 13 65 38 0 3105 14 2 0 84 5 0 0 0 500 10 828 9 63 65 1 3441 4 2 0 94 6 25 0 14 466 4 755 23 81 36 0 2963 11 2 0 87 7 0 0 0 530 11 876 10 51 27 0 2284 7 2 0 92 March 4, 2026 at 01:48:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 40 2114 100 120 0 7 9 1 83 0 1 0 99 1 0 0 7 32 4 28 3 7 4 0 587 0 0 0 100 2 6 0 14 65 22 65 1 9 11 0 28 0 0 0 100 3 0 0 3 235 103 32 2 14 14 0 336 0 0 0 100 4 12 0 3 278 121 65 2 5 2 0 336 0 0 0 100 5 3 0 0 52 16 79 1 4 5 0 1147 0 0 0 100 6 0 0 14 37 9 32 3 2 6 0 300 1 0 0 99 7 0 0 9 33 2 16 0 5 7 0 43 0 1 0 99 March 4, 2026 at 01:48:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 2175 135 212 0 11 6 4 77 0 1 0 99 1 24 0 24 53 4 52 0 7 5 6 652 0 0 0 100 2 6 0 0 74 17 64 0 10 3 2 55 0 0 0 100 3 764 0 3 242 102 34 3 7 6 6 6810 2 1 0 97 4 42 0 3 252 107 40 1 7 1 3 396 0 0 0 100 5 2675 0 113 37 2 90 3 9 6 9 1549 1 1 0 98 6 124 0 14 73 9 90 1 14 10 14 443 0 0 0 100 7 24 0 0 51 1 59 0 11 16 6 139 0 0 0 100 March 4, 2026 at 01:48:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 141 189 0 1 0 0 1 0 1 0 99 1 0 0 7 51 13 34 0 1 1 0 569 0 0 0 100 2 0 0 112 22 3 21 0 1 0 0 13 0 0 0 100 3 0 0 3 236 107 14 0 1 0 0 303 0 0 0 100 4 0 0 3 237 106 16 0 0 0 0 312 0 0 0 100 5 0 0 0 29 6 32 1 0 3 0 1123 0 0 0 100 6 0 0 14 29 5 8 0 0 0 0 267 0 0 0 100 7 0 0 0 29 1 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 122 152 0 2 0 0 18 0 1 0 99 1 0 0 7 59 23 50 1 3 1 0 580 0 0 0 100 2 0 0 7 30 11 26 0 1 0 0 0 0 0 0 100 3 0 0 3 221 107 12 0 0 2 0 299 0 0 0 100 4 0 0 3 214 104 6 0 0 0 0 300 0 0 0 100 5 0 0 0 12 2 36 0 0 1 0 1125 0 0 0 100 6 0 0 14 15 3 16 0 1 0 0 266 0 0 0 100 7 0 0 0 15 2 12 0 1 0 0 9 0 0 0 100 March 4, 2026 at 01:48:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2389 100 625 0 56 392 0 836 0 2 0 98 1 0 0 7 104 5 221 2 69 484 0 654 0 2 0 97 2 0 0 0 127 22 232 2 59 454 0 117 0 2 0 98 3 0 0 3 511 323 200 2 56 470 0 1151 0 3 0 97 4 0 0 3 303 114 213 0 62 504 0 340 0 2 0 97 5 0 0 0 79 1 203 3 45 510 0 1135 0 3 0 97 6 0 0 14 100 4 203 3 60 409 0 312 0 3 0 97 7 0 0 0 209 33 321 1 63 467 0 35 0 2 0 98 March 4, 2026 at 01:48:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2431 128 819 0 132 808 0 0 0 3 0 97 1 0 0 7 213 12 481 1 125 850 1 1664 0 2 0 98 2 0 0 0 168 2 399 0 110 728 0 0 0 2 0 98 3 0 0 3 731 474 380 0 116 744 1 296 0 2 0 98 4 0 0 3 377 110 403 2 134 772 0 310 0 2 0 98 5 0 0 0 176 3 409 1 120 741 1 19 0 2 0 98 6 0 0 14 387 4 857 0 123 855 0 266 0 2 0 98 7 0 0 0 188 16 422 0 118 778 1 0 0 2 0 98 March 4, 2026 at 01:48:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2260 101 387 1 90 811 1 0 0 2 0 98 1 0 0 0 182 13 396 3 99 724 0 1414 0 2 0 98 2 0 0 0 221 32 425 1 88 724 0 0 0 1 0 99 3 0 0 3 672 410 364 2 97 795 0 294 0 2 0 98 4 1 0 3 411 113 395 3 103 727 0 317 0 2 0 98 5 0 0 0 162 0 364 2 93 725 0 0 0 2 0 98 6 0 0 14 387 3 813 2 91 752 0 39 0 2 0 98 7 0 0 7 253 1 487 2 91 707 0 485 0 2 0 98 March 4, 2026 at 01:48:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 6 0 1 1 0 0 0 1 0 99 1 0 0 0 60 21 88 1 2 0 0 1423 0 0 0 100 2 1 0 1 25 5 24 0 2 0 0 14 0 0 0 100 3 0 0 3 273 132 67 0 2 1 0 296 0 0 0 100 4 0 0 3 233 112 28 0 0 0 0 315 0 0 0 100 5 0 0 0 11 6 0 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 6 0 1 0 0 1 0 0 0 100 7 0 0 21 116 4 116 0 0 0 0 527 0 0 0 100 March 4, 2026 at 01:48:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 90 0 2 0 0 0 0 0 0 100 1 0 0 0 16 3 43 1 0 1 0 1442 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 24 0 0 0 100 3 0 0 3 245 116 38 0 1 0 0 294 0 0 0 100 4 0 0 3 303 147 102 0 2 0 0 331 0 0 0 100 5 0 0 0 9 0 8 0 1 0 0 9 0 0 0 100 6 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 7 0 0 21 30 4 26 1 0 0 0 528 0 0 0 100 March 4, 2026 at 01:48:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 108 0 1 0 0 0 0 1 0 99 1 0 0 0 25 7 51 1 1 4 0 1425 0 0 0 99 2 0 0 0 14 1 16 0 1 1 0 0 0 0 0 100 3 0 0 3 222 104 16 0 0 3 0 296 0 0 0 100 4 0 0 3 219 106 12 1 1 2 0 311 0 0 0 100 5 0 0 0 105 49 102 0 1 0 0 0 0 0 0 100 6 0 0 0 12 2 8 0 1 0 0 8 0 0 0 100 7 19 0 21 20 5 20 1 0 1 0 538 0 0 0 100 March 4, 2026 at 01:48:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 104 0 0 0 0 0 0 1 0 99 1 0 0 0 25 9 49 2 0 1 0 1430 0 0 0 99 2 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 3 0 0 3 248 117 44 0 2 0 0 294 0 0 0 100 4 0 0 3 220 107 12 1 0 0 0 306 0 0 0 100 5 0 0 0 39 15 34 0 2 0 0 0 0 0 0 100 6 0 0 0 50 21 46 0 1 0 0 0 0 0 0 100 7 0 0 21 14 4 12 1 0 0 0 525 0 0 0 100 March 4, 2026 at 01:48:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 102 0 1 0 0 0 0 0 0 100 1 0 0 0 23 8 46 2 0 1 0 1424 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 296 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 300 0 0 0 100 5 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 109 51 104 0 1 0 0 0 0 0 0 100 7 0 0 21 13 4 12 0 0 0 0 527 0 0 0 100 March 4, 2026 at 01:48:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 0 0 0 1 0 1 0 99 1 0 0 0 25 9 52 0 0 0 0 1450 0 0 0 100 2 0 0 0 18 3 18 0 1 1 0 15 0 0 0 100 3 0 0 3 212 102 4 0 0 0 0 294 0 0 0 100 4 0 0 3 229 108 30 0 1 0 0 311 0 0 0 100 5 0 0 0 18 5 8 0 0 0 0 0 0 0 0 100 6 0 0 0 111 53 106 0 0 0 0 1 0 0 0 100 7 0 0 21 16 4 16 1 0 0 0 526 0 0 0 100 March 4, 2026 at 01:48:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 98 0 2 0 0 0 0 1 0 99 1 0 0 0 30 11 52 1 0 0 0 1423 0 0 0 99 2 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 3 0 0 3 217 103 7 1 2 0 0 296 0 0 0 100 4 0 0 3 218 105 10 1 0 0 0 301 0 0 0 100 5 0 0 0 19 0 18 0 1 0 0 0 0 0 0 100 6 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 7 0 0 21 13 4 10 0 0 0 0 526 0 0 0 100 March 4, 2026 at 01:48:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 106 0 0 0 0 0 0 1 0 99 1 0 0 0 12 2 9 0 0 2 0 149 0 0 0 100 2 0 0 0 11 2 7 0 1 2 0 21 0 0 0 100 3 0 0 3 214 103 8 0 0 1 0 294 0 0 0 100 4 0 0 3 229 110 26 0 0 2 0 316 0 0 0 100 5 0 0 0 17 0 14 0 1 0 0 3 0 0 0 100 6 0 0 0 112 53 108 0 0 0 0 4 0 0 0 100 7 0 0 21 17 5 16 0 0 0 0 536 0 0 0 100 March 4, 2026 at 01:48:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 105 0 1 0 0 0 0 1 0 99 1 0 0 0 11 2 4 0 0 2 0 450 0 0 0 100 2 0 0 0 12 3 35 1 1 1 0 1096 0 0 0 100 3 0 0 3 211 103 4 0 0 4 0 296 0 0 0 100 4 0 0 3 231 113 24 0 0 1 0 313 0 0 0 100 5 0 0 0 17 1 10 0 0 1 0 0 0 0 0 100 6 0 0 0 116 53 114 0 1 1 0 0 0 0 0 100 7 0 0 21 14 5 10 0 0 1 0 527 0 0 0 100 March 4, 2026 at 01:48:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 0 8 1 3 1 0 0 0 308 0 0 0 100 2 0 0 0 12 2 36 1 0 0 0 1115 0 0 0 100 3 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 4 0 0 3 229 112 22 0 0 0 0 315 0 0 0 100 5 0 0 0 33 10 28 0 1 0 0 0 0 0 0 100 6 0 0 0 91 42 86 0 1 0 0 0 0 0 0 100 7 0 0 21 18 4 22 1 1 0 0 526 0 0 0 100 March 4, 2026 at 01:48:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 104 0 0 0 0 0 0 1 0 99 1 0 0 0 9 1 6 0 0 0 0 305 0 0 0 100 2 0 0 0 19 4 46 1 0 0 0 1128 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 296 0 0 0 100 4 0 0 3 234 112 28 2 0 0 0 315 0 0 0 100 5 0 0 0 110 55 100 0 0 0 0 0 0 0 0 100 6 0 0 0 19 3 14 0 1 0 0 1 0 0 0 100 7 0 0 21 17 4 16 1 2 1 0 525 0 0 0 100 March 4, 2026 at 01:48:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 14 6290 106 9115 80 355 109 0 21790 21 14 0 65 1 13 0 0 4366 7 9245 73 364 65 0 22570 19 12 0 69 2 19 0 2 3772 8 7924 59 238 60 0 21320 19 12 0 70 3 11 0 3 4087 112 8035 69 298 71 0 16488 14 9 0 77 4 16 0 3 2854 113 5514 35 225 73 0 16142 17 9 0 74 5 46 0 0 1844 20 4046 23 135 64 0 10874 10 6 0 84 6 176 0 0 3231 16 7159 40 229 46 0 22504 13 9 0 78 7 242 0 7 2096 23 4425 27 124 79 0 12212 11 6 0 83 March 4, 2026 at 01:48:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 14 6578 107 9778 109 467 400 0 24499 24 16 0 60 1 22 0 0 5165 8 11214 105 523 437 0 26602 23 16 0 61 2 18 0 0 3701 9 7535 70 385 453 0 19167 15 11 0 73 3 8 0 3 4253 338 7985 83 421 400 0 17659 16 11 0 73 4 34 0 3 2984 119 5727 71 386 453 0 14145 12 9 0 79 5 27 0 0 1749 17 3791 121 244 429 0 10531 9 6 0 85 6 12 0 7 3242 16 7045 58 351 512 0 15661 14 10 0 76 7 0 0 0 2537 16 5564 30 222 438 0 12170 11 8 0 81 March 4, 2026 at 01:48:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 6497 107 9421 75 394 310 0 22909 22 15 0 63 1 28 0 0 4615 13 9738 59 406 284 0 22608 20 13 0 67 2 1 0 0 3651 11 7655 44 300 306 0 18361 16 10 0 74 3 4 0 3 4511 250 8903 48 348 222 0 21387 18 12 0 70 4 6 0 3 3077 121 5996 39 326 306 0 15876 14 9 0 77 5 5 0 14 2028 15 4380 21 206 312 0 11521 10 7 0 83 6 8 0 0 3164 18 6682 44 319 324 0 15204 14 9 0 78 7 3 0 7 2488 16 5197 29 203 246 0 12314 10 7 0 82 March 4, 2026 at 01:48:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2551 149 1046 2 47 10 0 2486 2 2 0 96 1 0 0 0 314 5 618 6 32 6 0 2220 2 1 0 97 2 0 0 0 313 4 574 2 17 1 0 1602 1 1 0 98 3 1 0 3 665 104 1043 2 25 20 0 3230 2 2 0 97 4 3 0 3 500 107 635 1 28 4 0 1743 2 1 0 97 5 1 0 14 371 9 786 2 17 5 0 2025 2 1 0 98 6 0 0 0 394 6 798 1 26 1 0 1664 2 1 0 97 7 0 0 7 236 7 458 3 22 19 0 1609 1 1 0 98 March 4, 2026 at 01:48:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 117 147 1 1 0 0 2 0 1 0 99 1 0 0 0 82 37 80 0 1 0 0 8 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 3 0 0 3 213 102 34 1 0 2 0 1124 0 0 0 100 4 1 0 3 219 105 16 0 1 1 0 306 0 0 0 100 5 0 0 14 32 15 28 0 1 0 0 573 0 0 0 100 6 0 0 0 9 2 6 0 1 0 0 1 0 0 0 100 7 0 0 7 17 3 15 0 2 1 0 269 0 0 0 100 March 4, 2026 at 01:48:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 98 0 2 0 0 0 0 1 0 99 1 0 0 0 73 33 64 0 0 0 0 1 0 0 0 100 2 0 0 0 9 2 4 0 0 1 0 303 0 0 0 100 3 0 0 3 230 103 51 1 1 0 0 1129 0 0 0 100 4 0 0 3 213 104 6 0 0 1 0 295 0 0 0 100 5 1 0 14 27 11 24 1 0 1 0 598 0 0 0 100 6 0 0 0 44 19 40 0 1 0 0 0 0 0 0 100 7 0 0 7 12 3 8 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:48:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2342 108 625 1 62 345 0 3 0 2 0 98 1 0 0 0 220 24 416 1 63 333 0 1 0 2 0 98 2 0 0 0 92 3 209 1 51 424 0 315 0 1 0 99 3 0 0 3 520 329 249 2 59 399 0 1125 0 2 0 98 4 0 0 3 318 113 248 1 70 387 0 312 0 2 0 98 5 0 0 14 103 5 219 1 56 342 0 581 0 2 0 98 6 0 0 0 135 21 262 0 60 381 0 4 0 2 0 98 7 0 0 7 88 3 198 1 63 359 0 260 0 1 0 99 March 4, 2026 at 01:48:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2278 136 437 1 59 367 0 0 0 2 0 98 1 0 0 0 214 10 378 0 70 334 0 0 0 1 0 99 2 0 0 0 130 9 248 1 65 316 0 300 0 1 0 99 3 0 0 7 567 354 268 1 68 333 0 1125 0 2 0 98 4 0 0 7 331 111 265 0 60 389 0 304 0 1 0 99 5 0 0 14 100 4 224 1 57 366 0 566 0 1 0 99 6 0 0 0 287 2 591 1 67 383 0 0 0 1 0 99 7 0 0 7 140 4 292 1 62 355 0 260 0 1 0 99 March 4, 2026 at 01:48:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 116 140 0 0 0 0 0 0 0 0 100 1 0 0 0 76 35 72 0 1 0 0 0 0 0 0 100 2 0 0 0 9 2 6 0 1 0 0 300 0 0 0 100 3 0 0 3 212 102 34 1 0 0 0 1124 0 0 0 100 4 0 0 3 222 109 16 0 0 2 0 303 0 0 0 100 5 0 0 14 13 5 10 0 0 0 0 571 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 12 3 6 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:48:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 136 196 1 4 0 0 8 0 1 0 99 1 0 0 0 41 15 36 0 2 0 0 4 0 0 0 100 2 0 0 0 9 2 3 0 0 1 0 297 0 0 0 100 3 0 0 3 216 104 38 1 1 1 0 1127 0 0 0 100 4 0 0 3 225 109 20 1 0 1 0 303 0 0 0 100 5 0 0 14 17 8 8 1 1 0 0 571 0 0 0 100 6 0 0 0 10 2 6 0 2 0 0 2 0 0 0 100 7 0 0 7 26 7 23 0 1 0 0 269 0 0 0 100 March 4, 2026 at 01:48:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2246 107 316 162 30 10 0 676 96 2 0 2 1 29 0 0 174 2 197 137 20 11 0 462 97 1 0 2 2 4 0 0 138 4 115 94 18 7 0 596 97 0 0 2 3 1583 0 3 424 119 269 163 15 13 0 654 97 1 0 2 4 14 0 129 365 111 220 122 23 9 0 1847 97 1 0 2 5 3 0 14 213 37 244 158 13 12 0 1004 97 1 0 2 6 1 0 0 146 3 164 108 21 6 0 382 97 0 0 2 7 9 0 7 201 6 324 192 14 16 0 1016 97 1 0 2 March 4, 2026 at 01:48:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2207 117 213 157 12 13 0 398 99 1 0 0 1 0 0 0 125 6 134 115 7 5 0 209 100 0 0 0 2 1 0 0 115 16 71 85 11 1 0 473 100 0 0 0 3 0 0 3 333 104 136 113 7 17 0 243 100 0 0 0 4 0 0 59 300 105 103 91 10 7 0 1555 99 1 0 0 5 0 0 14 220 19 232 155 8 14 0 732 100 0 0 0 6 0 0 0 137 1 131 111 12 15 0 164 100 0 0 0 7 1 0 7 157 8 175 134 10 11 0 562 100 0 0 0 March 4, 2026 at 01:48:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 108 150 120 13 10 0 283 99 1 0 0 1 2 0 0 112 2 117 99 13 11 0 297 100 0 0 0 2 0 0 0 113 5 94 93 10 3 0 495 100 0 0 0 3 0 0 3 342 106 139 120 7 6 0 219 100 0 0 0 4 0 0 87 392 122 252 164 11 17 0 1720 99 1 0 0 5 0 0 14 193 6 252 164 12 13 0 819 100 0 0 0 6 0 0 0 267 30 287 186 9 13 0 311 100 0 0 0 7 0 0 7 156 6 154 130 9 6 0 592 100 0 0 0 March 4, 2026 at 01:48:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2217 118 234 162 13 5 0 275 99 1 0 0 1 1 0 0 122 3 108 99 16 11 0 293 100 0 0 0 2 0 0 0 133 14 88 92 14 4 0 475 100 0 0 0 3 2 0 3 362 126 117 107 13 5 0 97 100 0 0 0 4 0 0 87 342 107 177 125 7 9 0 1715 99 1 0 0 5 0 0 14 206 6 273 181 13 18 0 795 100 0 0 0 6 2 0 0 115 2 102 91 14 7 0 238 100 0 0 0 7 0 0 7 161 4 147 124 17 8 0 526 100 0 0 0 March 4, 2026 at 01:48:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2182 107 138 115 11 3 0 157 99 1 0 0 1 0 0 0 162 4 163 131 11 7 0 338 100 0 0 0 2 0 0 0 108 3 75 86 11 5 0 485 100 0 0 0 3 1 0 3 382 118 164 123 12 5 0 260 100 0 0 0 4 0 0 101 391 141 187 125 8 5 0 1562 99 1 0 0 5 0 0 14 131 7 123 107 2 6 0 720 100 0 0 0 6 0 0 0 146 4 146 121 11 14 0 318 100 0 0 0 7 0 0 7 151 6 179 130 14 8 0 549 100 0 0 0 March 4, 2026 at 01:48:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 103 164 128 10 1 0 320 99 1 0 0 1 1 0 0 131 2 101 101 8 12 0 206 100 0 0 0 2 0 0 0 173 4 188 146 8 8 0 577 100 0 0 0 3 0 0 2 364 104 172 136 5 8 0 274 100 0 0 0 4 0 0 74 382 111 296 173 5 16 0 1847 99 1 0 0 5 0 0 21 183 18 172 135 10 11 0 723 100 0 0 0 6 2 0 0 186 34 190 140 11 13 0 252 100 0 0 0 7 0 0 7 187 12 215 151 7 9 0 624 100 0 0 0 March 4, 2026 at 01:48:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 103 115 106 15 7 0 208 99 1 0 0 1 0 0 0 199 5 214 148 19 9 0 272 100 0 0 0 2 0 0 0 197 12 244 165 13 8 0 609 100 0 0 0 3 0 0 3 412 131 184 141 11 6 0 247 100 0 0 0 4 0 0 87 310 105 118 97 4 4 0 1586 99 1 0 0 5 0 0 14 166 7 201 145 10 10 0 802 100 0 0 0 6 0 0 0 173 18 200 142 8 13 0 288 100 0 0 0 7 0 0 7 166 6 155 129 6 9 0 539 100 0 0 0 March 4, 2026 at 01:48:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 135 128 108 4 1 0 177 99 1 0 0 1 3 0 0 153 2 120 108 4 7 0 174 100 0 0 0 2 0 0 0 172 5 186 141 11 9 0 664 100 0 0 0 3 3 0 3 327 107 107 96 16 10 0 238 100 0 0 0 4 0 0 73 328 106 164 119 17 10 0 637 99 1 0 0 5 0 0 14 171 15 221 140 16 18 0 1839 99 1 0 0 6 0 0 0 154 8 178 135 10 10 0 347 100 0 0 0 7 0 0 7 156 6 140 114 8 6 0 386 100 0 0 0 March 4, 2026 at 01:48:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2186 122 178 135 9 9 0 533 99 1 0 0 1 0 0 0 161 0 143 116 15 7 0 277 100 0 0 0 2 0 0 0 135 5 146 118 14 14 0 604 100 0 0 0 3 0 0 3 381 133 150 124 10 5 0 259 100 0 0 0 4 0 0 101 311 104 127 106 12 10 0 577 100 0 0 0 5 0 0 14 189 4 251 155 8 7 0 1913 99 1 0 0 6 0 0 0 119 2 125 108 12 11 0 179 100 0 0 0 7 0 0 0 177 4 186 141 8 6 0 278 100 0 0 0 March 4, 2026 at 01:48:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2197 108 200 137 13 7 0 462 99 1 0 0 1 0 0 0 170 4 166 131 17 11 0 359 100 0 0 0 2 0 0 0 132 6 108 99 11 2 0 440 100 0 0 0 3 0 0 3 462 153 310 194 18 7 0 365 99 1 0 0 4 0 0 115 313 104 91 96 13 6 0 520 100 0 0 0 5 0 0 14 160 8 195 134 10 12 0 1940 99 1 0 0 6 0 0 0 145 4 144 124 8 2 0 280 100 0 0 0 7 0 0 0 133 3 110 101 11 5 0 263 100 0 0 0 March 4, 2026 at 01:49:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2191 117 233 164 10 2 0 528 99 1 0 0 1 1 0 0 141 12 111 106 10 4 0 204 100 0 0 0 2 0 0 0 156 5 169 128 7 6 0 534 100 0 0 0 3 0 0 3 339 118 88 96 11 6 0 233 100 0 0 0 4 0 0 72 300 104 60 81 5 5 0 401 100 0 0 0 5 0 0 14 142 8 219 138 8 13 0 1919 99 1 0 0 6 0 0 0 154 3 177 141 9 7 0 339 100 0 0 0 7 0 0 0 179 16 220 150 12 8 0 318 100 0 0 0 March 4, 2026 at 01:49:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2166 106 186 144 5 6 0 439 99 1 0 0 1 0 0 0 155 19 165 129 11 7 0 349 100 0 0 0 2 0 0 0 143 8 145 123 13 9 0 541 100 0 0 0 3 0 0 3 347 104 136 117 9 8 0 336 100 0 0 0 4 0 0 87 334 105 170 131 11 6 0 604 100 0 0 0 5 0 0 14 208 39 249 155 9 5 0 1889 99 1 0 0 6 0 0 0 95 1 63 77 9 12 0 128 100 0 0 0 7 0 0 0 107 2 71 82 5 4 0 158 100 0 0 0 March 4, 2026 at 01:49:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2180 107 147 123 9 7 0 419 99 1 0 0 1 0 0 0 165 4 171 136 14 8 0 263 100 0 0 0 2 0 0 0 175 35 137 117 9 6 0 532 100 0 0 0 3 0 0 3 342 102 124 113 9 3 0 255 100 0 0 0 4 0 0 115 360 105 223 158 7 6 0 762 99 1 0 0 5 0 0 14 184 10 264 152 10 9 0 1940 99 1 0 0 6 0 0 0 165 16 148 130 10 9 0 192 100 0 0 0 7 0 0 0 128 3 101 85 19 2 0 265 100 0 0 0 March 4, 2026 at 01:49:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2172 106 121 109 12 8 0 446 99 1 0 0 1 0 0 0 148 2 204 135 22 14 0 403 99 1 0 0 2 0 0 0 187 23 212 147 21 7 0 574 100 0 0 0 3 0 0 3 330 101 100 98 15 10 0 218 100 0 0 0 4 0 0 59 395 138 187 141 12 8 0 473 100 0 0 0 5 0 0 14 176 8 326 195 8 29 0 2071 99 1 0 0 6 0 0 0 124 2 89 103 10 3 0 189 100 0 0 0 7 0 0 0 133 3 97 97 7 8 0 213 100 0 0 0 March 4, 2026 at 01:49:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2175 107 106 105 7 1 0 439 99 1 0 0 1 0 0 0 151 2 141 122 10 9 0 172 99 1 0 0 2 0 0 0 185 16 221 155 12 8 0 615 100 0 0 0 3 0 0 3 415 122 261 174 15 8 0 348 100 0 0 0 4 0 0 101 417 124 232 164 17 11 0 640 99 1 0 0 5 0 0 14 178 11 249 156 16 23 0 1955 99 1 0 0 6 0 0 0 120 2 62 89 9 4 0 157 100 0 0 0 7 0 0 0 151 5 129 116 10 11 0 211 100 0 0 0 March 4, 2026 at 01:49:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2149 105 68 84 8 3 0 381 99 1 0 0 1 0 0 0 104 1 53 78 5 2 0 130 100 0 0 0 2 0 0 0 190 11 195 143 12 11 0 578 100 0 0 0 3 0 0 3 395 124 200 149 12 6 0 302 100 0 0 0 4 0 0 73 388 123 251 161 14 8 0 635 99 1 0 0 5 0 0 14 207 13 292 175 9 10 0 1921 99 1 0 0 6 0 0 0 102 1 60 79 16 3 0 251 100 0 0 0 7 0 0 0 109 0 73 86 13 7 0 160 100 0 0 0 March 4, 2026 at 01:49:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2166 105 77 88 7 2 0 465 99 1 0 0 1 0 0 0 168 5 168 131 10 11 0 275 99 1 0 0 2 0 0 0 197 17 184 141 12 14 0 613 100 0 0 0 3 0 0 2 406 123 202 148 11 10 0 273 100 0 0 0 4 0 0 102 344 106 132 116 7 4 0 505 100 0 0 0 5 0 0 14 252 25 390 215 13 17 0 1988 99 1 0 0 6 0 0 0 161 3 192 138 14 6 0 303 100 0 0 0 7 2 0 0 127 4 93 97 12 7 0 305 100 0 0 0 March 4, 2026 at 01:49:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2150 105 77 88 11 2 0 332 99 1 0 0 1 0 0 0 117 2 97 93 12 6 0 217 99 1 0 0 2 0 0 0 137 7 155 111 15 3 0 622 100 0 0 0 3 0 0 2 364 123 156 118 17 8 0 219 100 0 0 0 4 0 0 60 351 116 153 120 16 7 0 516 100 0 0 0 5 0 0 14 213 7 227 157 9 17 0 732 100 0 0 0 6 0 0 0 117 6 124 96 13 7 0 1291 99 1 0 0 7 0 0 0 122 16 84 88 10 5 0 114 100 0 0 0 March 4, 2026 at 01:49:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 105 67 36 4 0 0 382 54 1 0 45 1 0 0 0 48 1 20 38 4 0 0 87 61 0 0 39 2 0 0 0 72 3 52 45 4 0 0 356 55 0 0 45 3 0 0 3 333 134 122 34 10 0 0 116 50 0 0 50 4 0 0 3 288 119 59 51 5 0 0 409 59 0 0 41 5 0 0 14 90 3 57 50 4 0 0 613 53 0 0 47 6 0 0 0 64 3 74 45 5 0 0 1161 59 0 0 41 7 1 0 0 44 1 7 33 0 0 0 56 57 0 0 43 March 4, 2026 at 01:49:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 7 2121 107 132 3 2 1 0 285 0 1 0 99 1 0 0 0 22 5 22 0 3 0 0 16 0 0 0 100 2 0 0 0 15 2 13 0 2 0 0 303 0 0 0 100 3 0 0 4 297 141 93 0 2 2 0 15 0 0 0 100 4 0 0 2 218 104 13 1 1 0 0 304 0 0 0 100 5 2 0 14 44 20 38 1 2 1 0 594 0 0 0 100 6 0 0 0 16 3 44 1 2 0 0 1142 0 0 0 100 7 0 0 0 13 0 8 1 1 0 0 1 0 0 0 100 March 4, 2026 at 01:49:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 105 118 0 0 0 0 260 0 1 0 99 1 0 0 0 27 10 24 0 0 0 0 36 0 0 0 100 2 0 0 0 13 2 8 1 2 0 0 301 0 0 0 100 3 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 294 0 0 0 100 5 0 0 14 72 33 66 0 0 0 0 565 0 0 0 100 6 0 0 0 53 21 76 1 2 4 0 1131 0 0 0 100 7 0 0 0 16 2 20 1 2 0 0 2 0 0 0 100 March 4, 2026 at 01:49:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 105 128 0 1 0 0 260 0 1 0 99 1 0 0 0 30 11 24 0 0 0 0 16 0 0 0 100 2 0 0 0 16 3 12 0 1 0 0 305 0 0 0 100 3 0 0 3 214 102 10 0 0 0 0 5 0 0 0 100 4 0 0 3 209 103 2 0 0 1 0 294 0 0 0 100 5 0 0 14 11 3 6 1 0 0 0 566 0 0 0 100 6 0 0 0 110 52 134 1 0 1 0 1130 0 0 0 100 7 0 0 0 11 1 6 0 2 0 0 1 0 0 0 100 March 4, 2026 at 01:49:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2691 109 1058 26 136 78 2 3554 6 3 0 90 1 0 0 0 428 8 643 24 72 43 0 3054 16 2 0 82 2 55 0 0 622 3 996 29 80 37 1 3316 6 2 0 92 3 6 0 17 676 102 784 27 81 71 0 3625 15 2 0 83 4 0 0 534 718 106 1022 21 89 86 0 3192 9 2 0 89 5 3 0 0 443 6 638 10 49 36 0 2669 9 2 0 90 6 0 0 0 641 44 1063 28 103 30 0 3691 6 2 0 92 7 0 0 0 467 6 727 7 50 50 1 2124 4 1 0 94 March 4, 2026 at 01:49:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2121 106 87 1 5 6 0 304 0 1 0 99 1 3 0 0 115 40 129 0 10 10 0 41 0 0 0 100 2 17 0 0 98 16 88 3 4 6 0 321 0 0 0 100 3 1 0 17 236 108 47 3 9 19 0 314 2 0 0 98 4 0 0 12 228 104 26 2 3 8 0 307 0 3 0 97 5 0 0 13 26 2 29 2 5 7 1 462 0 0 0 100 6 0 0 0 23 2 24 3 5 5 0 879 0 0 0 100 7 0 0 0 30 4 221 1 10 13 0 562 0 0 0 100 March 4, 2026 at 01:49:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2117 107 122 1 0 0 0 265 0 1 0 99 1 0 0 0 22 2 16 0 0 1 0 21 0 0 0 100 2 0 0 0 120 53 117 1 1 2 0 298 0 0 0 100 3 1 0 17 225 109 18 0 1 0 0 276 0 0 0 100 4 0 0 3 217 106 10 0 0 2 0 299 0 0 0 100 5 0 0 0 20 7 10 0 1 0 0 307 0 0 0 100 6 0 0 7 14 2 12 1 2 0 0 7 0 0 0 100 7 0 0 0 21 3 48 0 1 0 0 1048 0 0 0 100 March 4, 2026 at 01:49:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2113 104 115 0 1 0 0 260 0 1 0 99 1 0 0 0 35 2 14 0 0 0 0 1 0 0 0 100 2 0 0 0 127 52 106 0 1 1 0 301 0 0 0 100 3 0 0 17 235 108 14 0 0 0 0 273 0 0 0 100 4 0 0 3 226 103 2 1 0 1 0 294 0 0 0 100 5 0 0 0 28 1 6 1 0 0 0 300 0 0 0 100 6 0 0 0 25 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 35 5 42 1 0 0 0 1041 0 0 0 100 March 4, 2026 at 01:49:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1887 0 14 2206 104 288 2 64 531 4 644 0 4 0 96 1 15 0 0 163 7 277 0 75 477 6 105 0 2 0 98 2 17 0 0 156 23 259 1 68 448 3 434 0 2 0 97 3 18 0 3 538 331 228 1 79 560 3 72 0 3 0 97 4 802 0 130 287 103 224 0 66 491 7 703 0 3 0 97 5 137 0 0 111 1 240 0 63 546 12 405 0 3 0 97 6 16 0 3 387 27 717 0 69 424 5 82 0 2 0 98 7 763 0 0 108 2 222 5 68 389 4 7656 2 4 0 94 March 4, 2026 at 01:49:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2279 108 473 2 140 726 0 1099 0 4 0 96 1 0 0 0 251 30 499 3 129 755 0 77 0 2 0 98 2 0 0 0 213 6 463 1 135 770 0 373 0 2 0 98 3 0 0 3 777 477 463 2 152 780 0 857 0 3 0 96 4 1 0 17 401 110 467 3 137 791 1 566 0 2 0 97 5 0 0 0 235 22 498 2 135 710 1 317 0 2 0 98 6 0 0 0 591 3 1242 2 148 734 0 148 0 2 0 98 7 0 0 0 188 5 466 5 137 827 0 1177 0 3 0 97 March 4, 2026 at 01:49:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2262 105 477 2 100 666 0 261 0 3 0 97 1 0 0 0 189 6 402 1 105 779 0 5 0 2 0 98 2 0 0 0 166 2 368 3 94 708 0 303 0 2 0 98 3 0 0 3 683 421 534 2 97 865 0 0 0 2 0 98 4 0 0 17 603 103 842 3 102 781 0 293 0 2 0 98 5 0 0 0 267 51 482 2 105 1001 0 300 0 2 0 98 6 0 0 0 177 2 403 1 102 821 0 257 0 2 0 98 7 0 0 0 158 2 394 5 92 867 0 1122 0 2 0 98 March 4, 2026 at 01:49:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2116 106 124 0 0 0 0 262 0 1 0 99 1 0 0 0 22 8 18 0 0 0 0 7 0 0 0 100 2 0 0 0 9 2 4 0 0 2 0 299 0 0 0 100 3 0 0 3 209 102 2 0 0 0 0 2 0 0 0 100 4 0 0 17 210 104 6 0 0 2 0 559 0 0 0 100 5 0 0 0 121 56 110 1 0 0 0 307 0 0 0 100 6 0 0 0 16 2 18 0 1 0 0 6 0 0 0 100 7 0 0 0 20 3 50 2 0 0 0 1133 0 0 0 100 March 4, 2026 at 01:49:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 104 120 0 1 0 0 260 0 1 0 99 1 0 0 0 26 10 22 0 0 0 0 9 0 0 0 100 2 0 0 0 9 2 3 0 0 1 0 297 0 0 0 100 3 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 4 0 0 17 209 104 4 0 0 0 0 561 0 0 0 100 5 0 0 0 111 51 104 0 0 0 0 300 0 0 0 100 6 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 15 1 44 1 1 0 0 1119 0 0 0 100 March 4, 2026 at 01:49:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2126 119 142 0 2 0 0 260 0 1 0 99 1 0 0 0 47 18 44 0 2 0 0 25 0 0 0 100 2 0 0 0 34 12 34 0 2 2 0 312 0 0 0 100 3 0 0 3 213 103 8 0 1 0 0 26 0 0 0 100 4 0 0 17 213 104 10 1 1 3 0 561 0 0 0 100 5 0 0 0 45 16 40 0 2 0 0 300 0 0 0 100 6 0 0 0 14 2 12 0 0 3 0 7 0 0 0 100 7 0 0 0 12 1 38 1 1 1 0 1125 0 0 0 100 March 4, 2026 at 01:49:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2119 105 132 0 2 1 0 268 0 1 0 99 1 19 0 0 21 7 16 0 0 0 0 19 0 0 0 100 2 0 0 0 111 52 106 1 1 0 0 299 0 0 0 100 3 0 0 3 208 101 2 0 0 1 0 3 0 0 0 100 4 0 0 17 209 104 4 1 0 0 0 559 0 0 0 100 5 0 0 0 13 1 4 0 0 0 0 300 0 0 0 100 6 0 0 0 10 1 9 0 1 0 0 7 0 0 0 100 7 0 0 0 25 6 52 1 0 0 0 1128 0 0 0 99 March 4, 2026 at 01:49:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 104 122 1 1 0 0 260 0 1 0 99 1 0 0 0 17 3 18 0 1 0 0 5 0 0 0 100 2 0 0 0 113 54 108 0 0 0 0 304 0 0 0 100 3 0 0 3 209 102 2 0 0 0 0 2 0 0 0 100 4 0 0 17 209 104 4 0 0 1 0 561 0 0 0 100 5 0 0 0 10 1 4 1 1 0 0 300 0 0 0 100 6 0 0 0 9 1 2 0 1 0 0 0 0 0 0 100 7 0 0 0 21 7 46 0 0 0 0 1121 0 0 0 100 March 4, 2026 at 01:49:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 106 128 1 1 0 0 268 0 1 0 99 1 0 0 0 10 2 6 0 0 0 0 1 0 0 0 100 2 0 0 0 111 53 107 0 0 0 0 303 0 0 0 100 3 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 4 0 0 17 212 105 8 0 0 0 0 561 0 0 0 100 5 0 0 0 16 6 6 0 0 0 0 307 0 0 0 100 6 0 0 0 11 1 8 0 0 0 0 6 0 0 0 100 7 0 0 0 29 8 56 1 0 1 0 1127 0 0 0 100 March 4, 2026 at 01:49:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2148 140 193 0 3 0 0 278 0 1 0 99 1 0 0 0 16 4 12 0 0 0 0 6 0 0 0 100 2 0 0 0 48 17 48 0 3 0 0 300 0 0 0 100 3 0 0 3 209 102 2 0 0 0 0 2 0 0 0 100 4 0 0 17 209 104 4 0 0 0 0 560 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 6 0 0 0 9 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 25 7 50 2 0 0 0 1129 0 0 0 100 March 4, 2026 at 01:49:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2163 156 214 0 0 0 0 261 0 1 0 99 1 0 0 0 10 1 8 0 1 0 0 0 0 0 0 100 2 0 0 0 24 3 18 1 0 0 0 300 0 0 0 100 3 0 0 3 215 102 14 0 1 0 0 0 0 0 0 100 4 0 0 17 212 104 10 1 0 2 0 559 0 0 0 100 5 0 0 0 10 1 6 0 1 1 0 300 0 0 0 100 6 0 0 0 8 1 4 0 0 1 0 1 0 0 0 100 7 0 0 0 22 7 46 1 0 1 0 1122 0 0 0 100 March 4, 2026 at 01:49:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2162 154 216 0 1 0 0 263 0 1 0 99 1 0 0 0 20 5 18 0 0 1 0 18 0 0 0 100 2 0 0 0 19 3 11 0 0 1 0 299 0 0 0 100 3 0 0 3 210 102 4 0 0 1 0 5 0 0 0 100 4 0 0 17 209 104 4 0 0 1 0 560 0 0 0 100 5 0 0 0 10 2 2 1 0 1 0 300 0 0 0 100 6 0 0 0 19 5 16 0 0 1 0 10 0 0 0 100 7 0 0 0 16 4 38 0 0 1 0 1139 0 0 0 100 March 4, 2026 at 01:49:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2160 154 212 0 0 0 0 260 0 1 0 99 1 0 0 0 12 3 8 0 0 0 0 1 0 0 0 100 2 0 0 0 17 2 13 0 0 0 0 301 0 0 0 100 3 0 0 3 209 101 2 0 1 0 0 0 0 0 0 100 4 0 0 17 214 104 14 0 1 0 0 560 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 6 0 0 0 17 6 12 0 0 0 0 6 0 0 0 100 7 0 0 0 10 1 34 1 0 1 0 1115 0 0 0 100 March 4, 2026 at 01:49:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2148 136 190 1 0 0 0 277 0 1 0 99 1 0 0 0 55 24 52 0 1 0 0 5 0 0 0 100 2 0 0 0 17 2 11 0 0 2 0 296 0 0 0 100 3 0 0 3 209 102 2 0 0 0 0 2 0 0 0 100 4 0 0 17 212 104 8 0 1 1 0 560 0 0 0 100 5 1 0 0 23 8 16 0 1 0 0 307 0 0 0 100 6 0 0 0 19 6 16 0 0 0 0 12 0 0 0 100 7 0 0 0 13 1 38 1 0 0 0 1114 0 0 0 100 March 4, 2026 at 01:49:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 104 112 0 0 0 0 260 0 1 0 99 1 0 0 0 112 53 108 0 0 0 0 1 0 0 0 100 2 0 0 0 18 2 12 1 0 2 0 299 0 0 0 100 3 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 4 0 0 17 209 104 4 1 0 2 0 560 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 6 0 0 0 19 6 12 0 0 0 0 6 0 0 0 100 7 0 0 0 10 1 34 1 0 1 0 1115 0 0 0 100 March 4, 2026 at 01:49:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 96 0 0 6391 115 8923 95 459 290 0 23631 21 14 0 65 1 223 0 7 4467 13 9389 96 483 281 0 22381 19 13 0 68 2 96 0 0 3688 9 7775 82 354 297 0 19845 18 12 0 70 3 20 0 3 3886 244 7404 75 404 253 1 16919 14 10 0 76 4 50 0 3 2940 112 5922 47 314 286 0 14318 14 9 0 78 5 146 0 14 2627 12 6061 43 204 269 0 20265 12 7 0 81 6 6 0 0 3040 11 6443 64 308 318 0 15342 16 8 0 76 7 13 0 0 2300 9 5047 42 211 267 0 13590 11 7 0 82 March 4, 2026 at 01:49:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 6738 108 9892 64 380 151 0 23584 23 15 0 62 1 16 0 0 4584 12 9378 70 434 97 0 21696 18 12 0 70 2 11 0 0 3561 14 7230 46 270 77 0 16299 15 9 0 75 3 7 0 3 4383 114 8841 46 318 129 0 22238 17 11 0 71 4 5 0 3 2805 117 5452 31 258 134 0 15406 15 9 0 77 5 8 0 7 2436 18 5261 31 152 74 0 13736 12 8 0 80 6 9 0 14 3115 17 6821 38 239 79 0 17299 15 9 0 76 7 3 0 0 2077 9 4489 27 150 69 0 12813 10 7 0 83 March 4, 2026 at 01:49:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 6550 113 9260 52 390 121 0 23404 22 15 0 63 1 10 0 0 4554 8 9622 62 396 115 0 22181 20 12 0 67 2 19 0 0 4005 12 8419 55 297 106 0 18379 16 10 0 74 3 12 0 2 4438 110 9049 71 355 94 0 21207 17 11 0 72 4 8 0 4 3105 116 6130 43 280 99 0 16415 16 10 0 75 5 6 0 7 1970 11 4418 16 130 83 0 13892 12 8 0 81 6 7 0 14 3100 13 6648 39 240 113 0 16220 13 9 0 78 7 4 0 0 1792 15 3779 14 114 70 0 10854 9 6 0 86 March 4, 2026 at 01:49:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2220 109 290 5 12 2 0 700 1 1 0 98 1 0 0 0 113 4 211 1 7 3 0 745 1 0 0 99 2 0 0 0 154 2 335 1 3 6 0 542 0 0 0 99 3 0 0 3 302 103 195 3 6 4 0 526 0 0 0 99 4 0 0 3 340 104 293 0 6 2 0 458 0 0 0 99 5 0 0 7 73 11 109 1 4 1 0 387 0 0 0 100 6 1 0 14 70 3 142 1 6 7 0 759 0 0 0 99 7 0 0 0 217 53 347 1 8 5 0 2299 0 1 0 99 March 4, 2026 at 01:49:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 142 196 0 2 1 0 300 0 1 0 99 1 0 0 0 13 3 8 0 1 0 0 1 0 0 0 100 2 0 0 0 11 3 6 0 1 0 0 5 0 0 0 100 3 0 0 3 213 103 6 0 1 0 0 2 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 7 11 3 6 1 0 0 0 260 0 0 0 100 6 0 0 14 7 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 55 18 78 2 1 3 0 1726 0 0 0 99 March 4, 2026 at 01:49:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2209 127 260 2 57 366 0 403 0 3 0 97 1 0 0 0 86 2 191 1 55 400 0 0 0 2 0 98 2 0 0 0 144 2 259 1 49 352 1 2 0 2 0 98 3 0 0 3 500 320 173 2 58 328 0 3 0 2 0 98 4 0 0 3 279 103 181 2 57 370 0 0 0 2 0 98 5 0 0 7 99 15 190 2 61 358 0 161 0 1 0 99 6 0 0 14 135 23 250 1 54 339 0 267 0 2 0 98 7 0 0 0 306 3 658 1 57 385 0 1726 0 2 0 98 March 4, 2026 at 01:49:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2540 122 949 0 104 548 0 567 0 3 0 97 1 0 0 0 186 25 383 0 111 622 0 0 0 2 0 98 2 0 0 0 249 14 436 0 101 668 0 8 0 2 0 98 3 0 0 3 703 459 345 0 116 575 0 2 0 2 0 98 4 0 0 3 346 102 344 0 99 546 0 0 0 2 0 98 5 0 0 0 144 2 345 0 106 626 0 7 0 2 0 98 6 0 0 14 141 4 336 1 102 621 0 271 0 2 0 98 7 0 0 0 243 7 548 3 102 594 0 1725 0 2 0 98 March 4, 2026 at 01:49:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2188 110 253 0 33 175 0 564 0 1 0 99 1 0 0 0 200 2 405 0 37 229 0 0 0 1 0 99 2 0 0 0 188 51 277 1 31 239 0 0 0 1 0 99 3 0 0 3 400 229 169 2 35 267 0 1095 0 1 0 99 4 0 0 3 274 102 155 0 35 266 0 0 0 1 0 99 5 0 0 0 66 1 144 0 33 174 0 0 0 0 0 100 6 0 0 14 67 1 140 0 32 215 0 266 0 0 0 99 7 0 0 0 69 3 124 2 27 190 0 629 0 1 0 99 March 4, 2026 at 01:49:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2142 125 160 4 2 0 0 575 0 1 0 99 1 0 0 0 52 22 48 0 1 0 0 0 0 0 0 100 2 0 0 0 46 18 40 0 2 0 0 2 0 0 0 100 3 0 0 3 216 104 38 1 1 0 0 1126 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 14 6 6 0 0 0 0 5 0 0 0 100 6 0 0 14 9 2 8 1 0 0 0 272 0 0 0 100 7 0 0 0 16 2 12 1 0 0 0 600 0 0 0 100 March 4, 2026 at 01:49:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2119 109 120 0 1 0 0 559 0 1 0 99 1 0 0 0 113 53 106 0 0 0 0 1 0 0 0 100 2 0 0 0 23 4 18 0 0 0 0 4 0 0 0 100 3 0 0 3 220 103 48 1 1 1 0 1125 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 7 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 12 2 8 0 0 0 0 601 0 0 0 100 March 4, 2026 at 01:49:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 14 2197 112 160 110 25 5 0 1019 96 1 0 3 1 0 0 0 149 7 205 98 25 2 0 341 97 0 0 3 2 0 0 0 186 7 299 178 12 6 0 758 96 1 0 3 3 13 0 3 404 118 275 160 14 11 0 1578 96 1 0 3 4 1579 0 157 344 106 302 132 11 4 1 626 96 1 0 3 5 517 0 7 263 5 375 225 23 17 0 810 96 1 0 3 6 25 0 14 184 26 163 119 14 5 0 637 97 0 0 3 7 5 0 0 173 6 185 119 16 5 0 982 96 0 0 3 March 4, 2026 at 01:49:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2170 120 139 116 13 3 0 808 99 1 0 0 1 0 0 0 119 2 133 117 8 7 0 298 100 0 0 0 2 0 0 0 103 1 79 90 6 3 0 252 100 0 0 0 3 0 0 3 329 104 157 115 6 0 0 1438 99 1 0 0 4 0 0 45 335 105 127 118 5 2 0 151 100 0 0 0 5 0 0 0 175 2 165 133 7 8 0 188 100 0 0 0 6 0 0 14 195 32 160 131 8 3 0 523 100 0 0 0 7 0 0 0 127 8 97 104 5 2 0 758 100 0 0 0 March 4, 2026 at 01:49:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2180 118 109 107 6 6 0 718 99 1 0 0 1 1 0 0 164 7 203 146 11 5 0 482 99 1 0 0 2 0 0 0 151 16 123 110 10 1 0 292 100 0 0 0 3 0 0 3 401 125 193 131 10 5 0 1335 99 1 0 0 4 0 0 101 306 104 93 93 7 1 0 149 100 0 0 0 5 0 0 0 158 3 187 142 12 4 0 328 100 0 0 0 6 2 0 14 128 3 145 115 18 5 0 628 100 0 0 0 7 0 0 0 167 2 135 112 14 0 0 781 100 0 0 0 March 4, 2026 at 01:49:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2198 117 145 124 9 0 0 757 99 1 0 0 1 0 0 0 142 4 104 99 7 5 0 209 100 0 0 0 2 0 0 0 132 5 110 105 6 3 0 250 100 0 0 0 3 0 0 4 376 119 191 120 8 4 0 1442 99 1 0 0 4 0 0 86 326 105 108 100 10 3 0 225 100 0 0 0 5 0 0 0 150 9 108 109 6 9 0 221 100 0 0 0 6 0 0 14 141 15 176 128 13 5 0 635 100 0 0 0 7 0 0 0 206 15 213 155 13 3 0 850 100 0 0 0 March 4, 2026 at 01:49:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2175 119 140 113 15 4 0 813 99 1 0 0 1 0 0 0 143 3 104 102 6 5 0 192 100 0 0 0 2 0 0 0 135 4 126 114 10 2 0 236 100 0 0 0 3 0 0 3 334 104 123 96 3 6 0 1311 99 1 0 0 4 2 0 101 393 138 179 133 12 1 0 218 100 0 0 0 5 0 0 0 148 2 144 119 7 2 0 270 100 0 0 0 6 0 0 14 115 4 104 98 10 1 0 549 100 0 0 0 7 0 0 0 141 6 135 114 8 8 0 863 100 0 0 0 March 4, 2026 at 01:49:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2193 108 199 135 11 3 0 930 99 1 0 0 1 0 0 0 136 3 129 114 12 3 0 286 100 0 0 0 2 0 0 0 126 3 96 100 11 2 0 269 100 0 0 0 3 0 0 3 363 104 186 126 11 4 0 1382 99 1 0 0 4 0 0 73 346 108 139 121 9 2 0 243 100 0 0 0 5 0 0 0 185 35 135 119 11 7 0 188 100 0 0 0 6 0 0 14 128 9 98 100 9 3 0 378 100 0 0 0 7 0 0 0 147 11 142 123 9 1 0 839 99 1 0 0 March 4, 2026 at 01:49:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2163 106 101 102 8 5 0 727 99 1 0 0 1 0 0 0 167 7 213 152 10 6 0 428 99 1 0 0 2 0 0 0 205 13 223 157 10 4 0 314 100 0 0 0 3 0 0 3 345 105 174 118 11 3 0 1410 99 1 0 0 4 0 0 87 320 108 112 101 18 2 0 287 100 0 0 0 5 0 0 0 185 32 163 128 15 3 0 259 100 0 0 0 6 0 0 14 122 2 95 102 6 5 0 512 100 0 0 0 7 0 0 0 167 9 167 135 8 4 0 865 99 1 0 0 March 4, 2026 at 01:49:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2174 105 105 99 12 1 0 761 99 1 0 0 1 0 0 0 180 9 177 136 11 2 0 265 100 0 0 0 2 0 0 0 176 16 193 141 11 3 0 272 100 0 0 0 3 0 0 3 389 122 201 134 7 6 0 1347 99 1 0 0 4 0 0 122 323 103 87 95 12 4 0 231 100 0 0 0 5 3 0 0 185 17 167 128 13 0 0 345 100 0 0 0 6 3 0 14 97 1 59 77 10 3 0 496 100 0 0 0 7 3 0 0 126 4 88 94 6 3 0 809 99 1 0 0 March 4, 2026 at 01:49:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2173 105 126 113 9 2 0 864 99 1 0 0 1 0 0 0 131 2 88 98 7 3 0 243 100 0 0 0 2 0 0 0 153 3 142 121 11 4 0 244 100 0 0 0 3 0 0 3 377 120 199 129 12 7 0 1499 99 1 0 0 4 0 0 129 398 137 184 137 15 3 0 224 100 0 0 0 5 0 0 0 180 10 210 158 8 5 0 482 99 1 0 0 6 0 0 0 220 4 263 180 11 4 0 338 100 0 0 0 7 0 0 14 173 7 188 143 10 6 0 1147 99 1 0 0 March 4, 2026 at 01:49:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2202 106 185 139 15 3 0 824 99 1 0 0 1 0 0 0 188 7 189 146 17 6 0 377 100 0 0 0 2 0 0 0 117 3 105 92 22 2 0 328 100 0 0 0 3 0 0 3 352 113 124 110 17 0 0 135 100 0 0 0 4 0 0 73 377 132 144 124 12 4 0 203 100 0 0 0 5 0 0 0 134 11 132 100 13 4 0 1331 99 1 0 0 6 0 0 0 137 4 133 114 10 2 0 279 100 0 0 0 7 0 0 14 117 3 85 96 8 7 0 1026 99 1 0 0 March 4, 2026 at 01:49:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2158 120 87 77 11 1 0 713 99 1 0 0 1 0 0 0 166 22 151 122 11 3 0 232 100 0 0 0 2 0 0 0 152 5 154 126 8 4 0 218 100 0 0 0 3 0 0 3 350 103 148 124 8 1 0 318 100 0 0 0 4 0 0 72 307 105 72 84 12 0 0 225 100 0 0 0 5 0 0 0 182 18 187 145 13 5 0 223 100 0 0 0 6 0 0 0 119 2 96 96 11 5 0 310 100 0 0 0 7 0 0 14 147 6 153 109 20 2 0 2270 99 1 0 0 March 4, 2026 at 01:49:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 106 140 118 10 4 0 632 99 1 0 0 1 0 0 7 197 23 228 156 14 3 0 682 100 0 0 0 2 0 0 0 127 2 118 90 17 6 0 1360 99 1 0 0 3 0 0 3 367 107 158 126 10 3 0 272 100 0 0 0 4 0 0 87 319 105 84 93 7 3 0 175 100 0 0 0 5 0 0 0 148 3 139 120 8 2 0 239 100 0 0 0 6 0 0 0 150 11 144 119 12 2 0 161 100 0 0 0 7 0 0 14 193 38 137 121 5 1 0 1023 99 1 0 0 March 4, 2026 at 01:49:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 101 85 92 10 0 0 484 99 1 0 0 1 0 0 0 190 17 200 146 10 3 0 240 100 0 0 0 2 0 0 7 168 25 204 134 7 4 0 1731 99 1 0 0 3 0 0 4 302 103 72 82 6 2 0 151 100 0 0 0 4 0 0 72 361 105 151 121 13 1 0 246 100 0 0 0 5 0 0 0 148 4 131 117 8 8 0 220 100 0 0 0 6 0 0 0 125 2 124 112 7 4 0 286 100 0 0 0 7 0 0 14 149 21 146 118 12 3 0 1196 100 0 0 0 March 4, 2026 at 01:49:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 105 154 117 12 2 0 609 99 1 0 0 1 0 0 0 167 5 180 138 13 3 0 435 100 0 0 0 2 0 0 7 163 20 148 109 11 5 0 1631 99 1 0 0 3 0 0 2 339 109 135 109 11 3 0 297 100 0 0 0 4 0 0 109 401 131 194 145 10 0 0 263 100 0 0 0 5 0 0 0 163 7 128 110 9 0 0 258 100 0 0 0 6 0 0 0 152 6 146 121 13 2 0 249 100 0 0 0 7 0 0 14 172 4 169 137 8 4 0 1119 100 0 0 0 March 4, 2026 at 01:49:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 101 64 83 6 3 0 474 99 1 0 0 1 0 0 0 180 6 175 140 9 3 0 300 100 0 0 0 2 0 0 7 128 4 127 101 7 7 0 1608 99 1 0 0 3 0 0 4 355 106 183 143 7 10 0 286 100 0 0 0 4 0 0 86 392 122 182 134 10 4 0 372 99 1 0 0 5 0 0 0 125 2 79 91 15 3 0 242 100 0 0 0 6 0 0 0 195 15 224 158 14 7 0 331 100 0 0 0 7 0 0 14 199 27 181 139 12 8 0 1179 100 0 0 0 March 4, 2026 at 01:49:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 104 140 113 14 6 0 373 99 1 0 0 1 0 0 0 156 6 169 134 10 5 0 283 100 0 0 0 2 0 0 7 167 10 159 131 9 2 0 825 100 0 0 0 3 0 0 3 389 132 197 141 14 6 0 417 100 0 0 0 4 0 0 87 312 104 81 89 8 1 0 138 100 0 0 0 5 0 0 0 146 2 91 93 8 3 0 104 100 0 0 0 6 0 0 0 174 4 228 151 10 8 0 1450 99 1 0 0 7 0 0 14 175 20 144 121 9 3 0 1065 100 0 0 0 March 4, 2026 at 01:49:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2207 116 193 136 8 3 0 1422 99 1 0 0 1 3 0 0 199 25 211 154 9 5 0 311 100 0 0 0 2 0 0 6 178 7 144 121 12 1 0 536 100 0 0 0 3 0 0 3 381 122 215 153 8 1 0 709 100 0 0 0 4 3 0 114 285 104 48 72 14 3 0 266 100 0 0 0 5 0 0 0 148 2 117 105 9 1 0 217 100 0 0 0 6 0 0 0 165 4 164 126 12 1 0 247 100 0 0 0 7 0 0 14 183 7 154 127 11 5 0 1163 100 0 0 0 March 4, 2026 at 01:49:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 107 94 87 9 0 0 149 99 1 0 0 1 0 0 0 157 13 194 133 12 2 0 1306 99 1 0 0 2 0 0 7 144 17 126 105 7 0 0 490 100 0 0 0 3 0 0 3 319 105 64 82 14 2 0 459 100 0 0 0 4 0 0 73 293 102 54 77 8 1 0 162 100 0 0 0 5 0 0 0 117 1 69 85 9 4 0 170 100 0 0 0 6 0 0 0 119 2 95 99 8 4 0 148 100 0 0 0 7 0 0 14 210 25 193 150 10 1 0 1073 100 0 0 0 March 4, 2026 at 01:49:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 100 107 52 9 0 0 95 63 1 0 36 1 0 0 0 101 21 82 55 10 0 0 112 52 0 0 48 2 0 0 7 90 11 109 55 11 1 0 1517 51 0 0 49 3 0 0 3 275 104 48 45 8 0 0 440 58 0 0 41 4 0 0 17 254 103 28 38 4 2 0 24 52 0 0 48 5 0 0 0 53 8 14 32 1 0 0 74 52 0 0 48 6 0 0 0 95 8 97 62 5 0 0 182 59 0 0 40 7 0 0 14 121 27 107 30 8 0 0 969 47 0 0 53 March 4, 2026 at 01:50:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 110 122 0 1 0 0 0 0 0 0 100 1 0 0 0 16 4 10 0 0 0 0 6 0 0 0 100 2 0 0 7 26 7 54 1 1 1 0 1403 0 0 0 100 3 0 0 3 216 103 9 0 2 0 0 292 0 0 0 100 4 1 0 17 218 103 12 0 4 2 0 20 0 0 0 100 5 1 0 0 15 2 8 0 1 4 0 9 0 0 0 100 6 4 0 0 10 0 5 0 2 4 0 45 0 0 0 100 7 2 0 14 103 45 101 0 3 2 0 871 0 0 0 100 March 4, 2026 at 01:50:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 151 204 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 7 27 9 52 2 1 1 0 1398 0 0 0 99 3 0 0 3 215 102 14 0 2 0 0 3 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 14 1 10 0 0 0 0 2 0 0 0 100 6 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 7 0 0 14 28 7 26 0 0 1 0 872 0 0 0 100 March 4, 2026 at 01:50:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 150 200 0 0 0 0 0 0 1 0 99 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 7 32 13 58 0 0 0 0 1410 0 0 0 99 3 0 0 3 211 102 4 0 1 0 0 0 0 0 0 100 4 0 0 3 213 102 12 0 1 0 0 3 0 0 0 100 5 0 0 0 10 0 6 0 0 0 0 3 0 0 0 100 6 0 0 0 9 2 4 0 0 2 0 294 0 0 0 100 7 0 0 14 23 4 20 2 0 1 0 866 0 0 0 100 March 4, 2026 at 01:50:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1909 0 0 2756 107 1151 41 140 65 8 3685 7 4 0 89 1 49 0 0 600 4 978 30 110 51 13 3543 13 2 0 85 2 65 0 7 637 20 1023 21 98 81 8 4483 8 2 0 89 3 52 0 3 607 105 628 20 66 59 4 3339 20 2 0 78 4 9 0 493 817 131 1094 24 103 88 2 2518 5 2 0 93 5 1556 0 113 458 5 712 13 67 46 13 8407 6 2 0 92 6 71 0 0 558 7 932 20 92 59 9 3254 7 2 0 91 7 14 0 16 367 9 487 8 42 41 3 2608 5 1 0 94 March 4, 2026 at 01:50:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 8 2123 102 67 8 9 7 1 633 14 1 0 84 1 0 0 0 139 54 144 4 13 4 0 738 0 0 0 99 2 7 0 21 36 4 65 8 10 5 0 2051 12 1 0 88 3 16 0 3 238 104 33 1 8 4 0 57 0 0 0 100 4 2 0 17 231 105 29 0 7 12 0 25 0 0 0 100 5 0 0 0 104 8 99 0 7 5 1 176 0 0 0 100 6 0 0 0 40 4 43 1 5 13 0 307 0 0 0 100 7 3 0 21 40 3 49 8 6 12 0 908 12 0 0 88 March 4, 2026 at 01:50:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 100 108 0 2 0 0 0 0 1 0 99 1 0 0 0 129 61 122 0 0 0 0 902 0 0 0 100 2 0 0 7 16 4 41 1 1 1 0 1381 0 0 0 100 3 0 0 3 210 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 212 104 4 0 0 0 0 1 0 0 0 100 5 0 0 0 14 1 8 0 1 0 0 2 0 0 0 100 6 0 0 0 18 1 14 0 2 0 0 0 0 0 0 100 7 0 0 14 13 2 10 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:50:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 101 280 1 55 454 0 0 0 3 0 97 1 0 0 0 163 36 248 2 59 514 0 902 0 1 0 98 2 0 0 119 89 6 218 1 54 443 0 1384 0 3 0 97 3 0 0 3 511 321 167 0 59 477 0 0 0 2 0 98 4 0 0 3 299 103 199 1 69 431 0 0 0 2 0 98 5 0 0 0 146 25 246 1 57 487 0 0 0 2 0 98 6 0 0 0 94 1 185 1 56 487 1 1 0 2 0 98 7 0 0 14 309 2 610 1 55 477 0 266 0 1 0 99 March 4, 2026 at 01:50:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2619 135 1158 1 126 883 0 0 0 2 0 98 1 0 0 0 248 11 498 1 137 905 0 901 0 2 0 98 2 0 0 14 168 6 419 3 118 794 0 1382 0 2 0 98 3 0 0 3 753 482 419 0 131 800 0 1 0 2 0 98 4 0 0 3 372 103 406 0 118 835 0 0 0 2 0 98 5 0 0 0 203 18 418 0 119 841 0 2 0 2 0 98 6 0 0 0 177 2 428 0 116 890 0 1 0 2 0 98 7 0 0 14 222 3 508 0 107 801 0 266 0 2 0 98 March 4, 2026 at 01:50:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2295 104 474 2 92 586 0 848 0 2 0 98 1 0 0 0 200 28 373 4 95 696 0 1514 0 1 0 98 2 3 0 7 168 12 364 2 70 549 0 1411 0 1 0 98 3 0 0 3 694 395 409 0 100 606 0 95 0 1 0 98 4 0 0 3 514 104 656 1 97 610 0 21 0 1 0 99 5 0 0 0 182 2 397 1 75 679 0 108 0 1 0 99 6 0 0 0 275 4 548 1 96 645 0 291 0 2 0 98 7 0 0 14 215 22 426 1 80 568 0 305 0 2 0 98 March 4, 2026 at 01:50:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 106 0 0 0 0 5 0 0 0 100 1 0 0 0 21 7 14 0 0 0 0 896 0 0 0 100 2 0 0 7 12 3 36 2 0 1 0 1380 0 0 0 100 3 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 4 0 0 3 212 103 7 0 0 0 0 0 0 0 0 100 5 0 0 0 26 7 18 0 0 0 0 9 0 0 0 100 6 0 0 0 27 8 28 0 0 0 0 26 0 0 0 100 7 0 0 14 113 52 112 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:50:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 102 0 0 0 0 0 0 0 0 100 1 1 0 0 23 6 21 1 1 0 0 883 0 0 0 100 2 0 0 7 12 3 37 1 1 1 0 1397 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 5 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 85 37 80 0 1 0 0 1 0 0 0 100 6 0 0 0 20 6 14 0 1 0 0 9 0 0 0 100 7 0 0 14 44 17 42 1 2 0 0 266 0 0 0 100 March 4, 2026 at 01:50:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 0 0 0 0 1 0 99 1 0 0 0 16 4 10 1 1 0 0 600 0 0 0 100 2 0 0 7 15 4 42 1 1 3 0 1676 0 0 0 100 3 0 0 3 213 101 10 0 1 1 0 0 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 114 52 112 0 0 0 0 2 0 0 0 100 6 0 0 0 21 6 16 0 0 1 0 6 0 0 0 100 7 0 0 14 20 3 18 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:50:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 0 0 4 0 1 0 99 1 0 0 0 19 5 15 0 0 2 0 601 0 0 0 100 2 0 0 7 13 4 38 1 0 1 0 1672 0 0 0 99 3 0 0 3 215 103 12 0 1 0 0 13 0 0 0 100 4 0 0 3 210 103 4 0 1 0 0 24 0 0 0 100 5 0 0 0 92 41 87 0 2 0 0 0 0 0 0 100 6 0 0 0 45 17 42 0 1 0 0 24 0 0 0 100 7 0 0 14 15 2 10 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:50:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 1 0 9 0 1 0 99 1 0 0 0 16 4 15 0 0 1 0 613 0 0 0 100 2 0 0 7 18 6 44 1 1 1 0 1679 0 0 0 100 3 0 0 3 213 103 6 0 0 0 0 3 0 0 0 100 4 0 0 3 214 103 12 0 1 0 0 0 0 0 0 100 5 0 0 0 19 2 14 0 0 0 0 2 0 0 0 100 6 0 0 0 125 58 124 0 1 0 0 15 0 0 0 100 7 0 0 14 11 2 8 0 1 0 0 269 0 0 0 100 March 4, 2026 at 01:50:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 108 0 0 0 0 5 0 0 0 100 1 1 0 0 18 6 12 1 0 0 0 626 0 0 0 100 2 0 0 7 15 5 40 1 0 1 0 1672 0 0 0 100 3 0 0 3 214 104 8 0 0 0 0 7 0 0 0 100 4 0 0 3 216 105 10 0 0 1 0 4 0 0 0 100 5 20 0 0 34 8 30 1 1 0 0 12 0 0 0 100 6 0 0 0 70 28 68 0 0 0 0 24 0 0 0 100 7 0 0 14 77 32 78 1 2 0 0 266 0 0 0 100 March 4, 2026 at 01:50:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 1 0 0 0 0 0 0 100 1 0 0 0 14 4 8 1 0 0 0 599 0 0 0 100 2 0 0 7 13 4 38 1 0 0 0 1666 0 0 0 99 3 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 1 0 0 0 100 5 0 0 0 15 2 8 0 0 0 0 2 0 0 0 100 6 0 0 0 17 5 12 0 0 0 0 9 0 0 0 100 7 0 0 14 110 52 108 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:50:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 1 0 0 0 0 1 0 99 1 0 0 0 13 4 7 0 0 1 0 597 0 0 0 100 2 0 0 7 15 5 42 0 0 2 0 1672 0 0 0 100 3 0 0 3 216 105 10 0 0 3 0 5 0 0 0 100 4 0 0 3 212 103 6 0 1 0 0 1 0 0 0 100 5 0 0 0 16 1 14 0 2 2 0 0 0 0 0 100 6 0 0 0 27 7 30 0 2 1 0 10 0 0 0 100 7 0 0 14 110 52 106 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:50:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 1 0 0 0 0 1 0 99 1 0 0 0 15 5 9 0 0 1 0 603 0 0 0 100 2 0 0 7 15 5 38 1 0 2 0 1669 0 0 0 100 3 0 0 3 209 102 2 0 0 1 0 1 0 0 0 100 4 0 0 3 209 103 2 0 0 1 0 0 0 0 0 100 5 0 0 0 13 2 6 0 0 1 0 2 0 0 0 100 6 0 0 0 24 8 16 0 0 1 0 6 0 0 0 100 7 0 0 14 116 53 116 0 1 1 0 267 0 0 0 100 March 4, 2026 at 01:50:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 82 0 2 0 0 7 0 1 0 99 1 0 0 0 61 26 56 1 1 0 0 606 0 0 0 100 2 0 0 7 42 4 64 2 1 0 0 1669 0 0 0 100 3 0 0 3 219 103 12 0 3 0 0 8 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 6 0 0 0 67 30 62 0 1 0 0 12 0 0 0 100 7 0 0 14 25 9 22 1 0 0 0 269 0 0 0 100 March 4, 2026 at 01:50:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 126 0 1 0 0 5 0 1 0 99 1 0 0 0 114 54 107 1 0 1 0 596 0 0 0 100 2 0 0 7 13 4 38 1 0 1 0 1669 0 0 0 100 3 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 19 7 10 0 0 0 0 9 0 0 0 100 6 0 0 0 29 10 28 0 0 0 0 23 0 0 0 100 7 0 0 14 17 2 16 0 0 2 0 266 0 0 0 100 March 4, 2026 at 01:50:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 1 0 99 1 0 0 0 118 54 119 0 1 0 0 604 0 0 0 100 2 0 0 7 14 4 38 2 0 1 0 1671 0 0 0 100 3 0 0 3 211 103 4 0 0 0 0 5 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 1 0 0 0 100 6 0 0 0 17 6 14 0 1 0 0 8 0 0 0 100 7 0 0 14 10 2 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:50:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 30 0 1 0 0 0 0 0 0 100 1 0 0 0 113 54 108 0 0 0 0 600 0 0 0 100 2 0 0 7 13 4 38 1 0 1 0 1666 0 0 0 99 3 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 94 1 93 0 2 0 0 2 0 0 0 100 6 0 0 0 20 7 14 1 0 0 0 6 0 0 0 100 7 0 0 14 12 3 8 0 0 0 0 267 0 0 0 100 March 4, 2026 at 01:50:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 119 0 0 5435 106 7023 78 329 105 0 19184 18 12 0 70 1 21 0 0 4251 23 8783 107 381 75 0 20077 18 11 0 71 2 126 0 0 2946 9 6018 46 246 95 0 15297 14 9 0 77 3 11 0 10 3814 108 7717 77 284 103 0 20253 16 10 0 73 4 94 0 3 2302 107 4303 43 202 82 0 12658 10 7 0 83 5 8 0 0 1902 9 3824 23 126 49 0 7732 7 5 0 89 6 285 0 0 3219 9 7524 37 192 98 0 21972 14 9 0 78 7 7 0 14 1262 18 2728 23 92 73 0 9804 11 5 0 84 March 4, 2026 at 01:50:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 6318 107 8919 62 359 147 0 24737 23 15 0 62 1 7 0 7 4404 13 9252 63 377 84 0 21351 18 12 0 70 2 6 0 0 3510 8 7294 48 247 98 0 18427 16 10 0 74 3 9 0 3 4697 115 9684 65 315 78 0 22861 19 12 0 69 4 3 0 5 3428 122 6684 38 289 126 0 14585 13 8 0 78 5 10 0 0 2246 13 4689 21 157 82 0 12778 12 7 0 81 6 5 0 0 3017 18 6438 34 244 87 0 16703 14 9 0 77 7 1 0 14 1935 16 4121 17 124 65 0 10644 10 6 0 84 March 4, 2026 at 01:50:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 6476 105 9356 71 357 106 0 24862 24 15 0 61 1 14 0 7 4564 9 9668 67 385 99 0 25865 21 13 0 66 2 21 0 0 4126 5 8859 46 277 110 0 19682 18 11 0 71 3 13 0 3 4318 114 8790 56 339 82 0 21581 19 11 0 70 4 6 0 3 3094 124 5983 35 249 90 0 14599 13 8 0 78 5 2 0 0 1970 18 4174 28 140 114 0 10986 10 6 0 84 6 11 0 0 2965 11 6375 29 199 77 0 14812 12 8 0 79 7 4 0 14 1937 21 4022 16 110 52 0 9248 8 5 0 87 March 4, 2026 at 01:50:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2941 101 1821 11 85 18 0 3787 4 3 0 94 1 4 0 7 923 16 1855 8 78 21 0 5789 3 3 0 94 2 1 0 0 524 2 1115 6 38 10 0 3230 3 2 0 95 3 0 0 3 1043 103 1770 5 55 25 0 3721 3 2 0 95 4 1 0 3 656 108 928 5 39 21 0 2863 2 2 0 96 5 3 0 0 421 4 824 5 30 8 0 1878 2 1 0 97 6 0 0 0 670 3 1497 4 41 23 0 3908 4 2 0 94 7 1 0 14 552 52 1050 3 34 23 0 3204 3 2 0 96 March 4, 2026 at 01:50:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2186 101 261 3 73 449 0 0 0 3 0 97 1 0 0 7 119 12 235 4 74 441 0 1301 0 2 0 98 2 0 0 0 87 1 216 1 76 430 0 1 0 2 0 98 3 0 0 3 522 322 388 2 76 384 0 0 0 2 0 98 4 0 0 3 285 104 188 4 69 438 0 300 0 2 0 98 5 0 0 0 281 12 539 2 67 408 0 294 0 1 0 99 6 0 0 0 128 22 247 1 78 419 0 1 0 1 0 99 7 0 0 14 129 20 275 4 64 395 0 662 0 2 0 98 March 4, 2026 at 01:50:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2208 100 353 1 73 522 0 0 0 2 0 98 1 0 0 7 152 12 314 3 89 439 0 568 0 1 0 99 2 0 0 0 125 2 296 1 82 534 0 0 0 1 0 99 3 0 0 7 661 444 279 0 82 487 0 0 0 2 0 98 4 0 0 7 314 104 273 1 83 504 0 298 0 2 0 98 5 0 0 0 479 3 1000 0 84 513 0 296 0 2 0 98 6 0 0 0 219 53 371 2 90 511 0 1 0 2 0 98 7 0 0 14 116 3 310 3 84 472 0 1393 0 2 0 98 March 4, 2026 at 01:50:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2201 100 291 2 54 299 0 3 0 1 0 99 1 0 0 7 156 7 294 1 64 366 0 568 0 1 0 99 2 0 0 0 112 4 230 2 55 322 0 14 0 1 0 99 3 0 0 3 570 338 295 1 66 430 0 18 0 1 0 99 4 0 0 3 469 104 544 1 62 344 0 302 0 1 0 99 5 0 0 0 132 1 273 2 67 321 0 297 0 1 0 99 6 0 0 0 204 10 415 1 61 398 0 0 0 1 0 99 7 0 0 14 188 44 346 1 63 276 0 1390 0 1 0 99 March 4, 2026 at 01:50:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 0 0 0 0 0 0 100 1 0 0 7 51 20 44 0 1 0 0 561 0 0 0 100 2 0 0 0 18 5 14 0 1 0 0 0 0 0 0 100 3 0 0 3 256 124 52 0 1 0 0 14 0 0 0 100 4 0 0 3 222 104 26 0 1 0 0 312 0 0 0 100 5 0 0 0 18 9 6 0 1 1 0 296 0 0 0 100 6 0 0 0 14 3 10 0 1 0 0 7 0 0 0 100 7 0 0 14 48 17 76 1 2 0 0 1391 0 0 0 100 March 4, 2026 at 01:50:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 100 0 0 0 0 0 0 1 0 99 1 0 0 7 18 6 14 0 0 0 0 564 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 3 319 157 114 0 0 0 0 9 0 0 0 100 4 0 0 3 212 104 4 1 0 0 0 300 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 6 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 7 0 0 14 20 2 46 2 0 0 0 1389 0 0 0 100 March 4, 2026 at 01:50:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 100 0 0 0 0 0 0 1 0 99 1 0 0 7 71 31 66 1 2 0 0 560 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 3 268 131 60 0 0 0 0 6 0 0 0 100 4 0 0 3 220 106 14 0 1 1 0 301 0 0 0 100 5 0 0 0 19 3 22 0 1 4 0 296 0 0 0 100 6 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 7 0 0 14 22 3 48 1 1 2 0 1392 0 0 0 100 March 4, 2026 at 01:50:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2195 100 159 119 9 5 0 501 83 1 0 15 1 1 0 7 186 15 226 128 20 13 0 989 84 1 0 16 2 19 0 0 148 5 167 102 15 11 0 295 84 0 0 16 3 1211 0 3 382 107 341 205 13 11 1 970 83 1 0 15 4 3 0 157 372 113 199 136 16 4 0 597 83 1 0 16 5 4 0 0 192 22 276 146 23 12 0 871 84 1 0 16 6 21 0 0 210 11 232 158 10 4 0 633 84 1 0 16 7 142 0 14 168 5 215 122 20 15 1 1977 83 1 0 16 March 4, 2026 at 01:50:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 112 91 97 10 7 0 283 99 1 0 0 1 0 0 7 115 4 77 87 7 7 0 719 100 0 0 0 2 0 0 0 161 20 145 121 5 4 0 160 100 0 0 0 3 0 0 3 334 109 119 112 5 2 0 188 100 0 0 0 4 0 0 31 300 105 56 76 11 5 0 525 99 1 0 0 5 0 0 0 147 9 160 126 12 4 0 498 100 0 0 0 6 0 0 0 176 23 178 136 9 6 0 283 100 0 0 0 7 0 0 14 140 5 172 120 6 3 0 1541 99 1 0 0 March 4, 2026 at 01:50:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2191 119 173 122 11 4 0 1335 99 1 0 0 1 0 0 7 133 5 92 98 13 5 0 802 100 0 0 0 2 0 0 0 174 5 166 135 12 2 0 201 100 0 0 0 3 0 0 3 347 108 128 109 10 8 0 254 100 0 0 0 4 2 0 101 319 107 108 103 9 5 0 553 99 1 0 0 5 0 0 0 163 33 118 102 13 2 0 483 100 0 0 0 6 0 0 0 170 2 184 140 9 6 0 351 100 0 0 0 7 0 0 14 167 5 214 153 11 13 0 635 99 1 0 0 March 4, 2026 at 01:50:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2194 111 176 122 17 7 0 1510 98 2 0 0 1 0 0 7 143 14 122 109 14 1 0 754 100 0 0 0 2 0 0 0 122 5 91 98 7 3 0 226 100 0 0 0 3 0 0 3 333 103 145 116 12 4 0 341 100 0 0 0 4 0 0 87 380 120 203 145 12 4 0 624 99 1 0 0 5 0 0 0 166 6 157 123 15 10 0 590 100 0 0 0 6 0 0 0 157 13 110 103 14 5 0 240 100 0 0 0 7 0 0 14 179 3 183 141 15 5 0 539 100 0 0 0 March 4, 2026 at 01:50:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 103 162 111 13 6 0 1317 99 1 0 0 1 0 0 0 135 3 105 104 8 4 0 527 100 0 0 0 2 0 0 7 113 2 93 96 11 5 0 520 100 0 0 0 3 0 0 3 348 104 135 122 7 6 0 364 100 0 0 0 4 0 0 84 380 124 156 127 10 3 0 514 99 1 0 0 5 0 0 0 223 28 196 143 10 4 0 564 100 0 0 0 6 0 0 7 180 12 202 136 25 9 0 389 100 0 0 0 7 0 0 14 149 4 166 129 20 7 0 637 100 0 0 0 March 4, 2026 at 01:50:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2175 123 133 102 9 3 0 1331 99 1 0 0 1 0 0 0 128 5 94 99 7 6 0 552 100 0 0 0 2 0 0 0 126 4 111 95 15 8 0 311 100 0 0 0 3 0 0 8 315 103 94 92 16 7 0 504 100 0 0 0 4 0 0 98 326 104 133 110 17 8 0 535 100 0 0 0 5 0 0 0 217 9 240 160 11 13 0 590 100 0 0 0 6 0 0 0 214 22 199 149 5 3 0 284 100 0 0 0 7 0 0 14 188 20 182 142 5 6 0 533 100 0 0 0 March 4, 2026 at 01:50:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 120 176 121 11 9 0 1420 99 1 0 0 1 0 0 0 180 36 150 114 19 6 0 535 100 0 0 0 2 0 0 0 105 0 61 79 12 8 0 135 100 0 0 0 3 0 0 10 343 105 155 119 14 9 0 524 100 0 0 0 4 0 0 73 320 104 105 103 9 9 0 509 100 0 0 0 5 0 0 0 205 8 247 170 12 5 0 665 100 0 0 0 6 0 0 0 179 3 193 149 7 4 0 330 100 0 0 0 7 0 0 14 122 5 87 98 7 9 0 549 100 0 0 0 March 4, 2026 at 01:50:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 102 153 110 5 2 0 1390 99 1 0 0 1 3 0 0 139 8 117 107 9 8 0 521 100 0 0 0 2 3 0 0 156 10 157 114 18 11 0 318 100 0 0 0 3 0 0 10 346 107 130 116 15 11 0 442 100 0 0 0 4 1 0 115 317 107 86 94 9 5 0 524 100 0 0 0 5 3 0 1 142 9 96 101 6 21 0 514 100 0 0 0 6 0 0 0 236 15 274 183 9 12 0 398 99 1 0 0 7 0 0 14 176 25 134 115 12 12 0 548 100 0 0 0 March 4, 2026 at 01:50:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 104 141 108 7 7 0 1433 98 2 0 0 1 0 0 0 129 9 94 94 11 4 0 572 100 0 0 0 2 0 0 0 187 2 214 139 15 8 0 484 99 1 0 0 3 0 0 10 333 105 120 104 17 6 0 526 100 0 0 0 4 0 0 101 316 103 93 92 14 2 0 487 100 0 0 0 5 0 0 0 200 11 219 157 18 8 0 584 100 0 0 0 6 0 0 0 174 27 136 119 7 11 0 226 100 0 0 0 7 0 0 14 196 14 222 158 9 4 0 498 100 0 0 0 March 4, 2026 at 01:50:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2199 104 179 140 8 3 0 302 99 1 0 0 1 0 0 0 133 13 135 106 12 3 0 1602 99 1 0 0 2 0 0 0 179 3 204 154 8 11 0 395 100 0 0 0 3 0 0 10 331 105 145 109 15 8 0 584 100 0 0 0 4 0 0 59 343 105 149 122 16 5 0 568 100 0 0 0 5 0 0 0 132 3 92 95 15 2 0 528 100 0 0 0 6 0 0 0 186 35 152 123 9 2 0 214 100 0 0 0 7 0 0 14 145 8 143 117 15 10 0 472 100 0 0 0 March 4, 2026 at 01:50:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2213 137 199 139 15 1 0 216 99 1 0 0 1 0 0 0 181 16 241 151 14 14 0 1842 99 1 0 0 2 0 0 0 177 5 189 146 13 6 0 283 100 0 0 0 3 0 0 10 373 111 185 135 10 4 0 620 100 0 0 0 4 0 0 87 311 104 69 83 14 0 0 550 100 0 0 0 5 0 0 0 128 3 60 81 11 4 0 521 100 0 0 0 6 0 0 0 119 3 99 101 11 11 0 237 100 0 0 0 7 0 0 14 156 4 167 118 21 8 0 610 100 0 0 0 March 4, 2026 at 01:50:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 121 128 112 18 7 0 267 99 1 0 0 1 0 0 0 144 5 163 115 18 3 0 1748 99 1 0 0 2 0 0 0 208 37 217 153 20 6 0 277 100 0 0 0 3 0 0 10 376 107 188 130 24 21 0 697 99 1 0 0 4 0 0 73 317 105 86 93 14 5 0 481 100 0 0 0 5 0 0 0 129 2 94 95 13 5 0 503 100 0 0 0 6 0 0 0 155 2 198 143 18 5 0 273 100 0 0 0 7 0 0 14 154 5 171 129 17 26 0 592 100 0 0 0 March 4, 2026 at 01:50:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2206 106 204 157 11 9 0 277 99 1 0 0 1 0 0 0 147 3 161 120 9 7 0 1743 99 1 0 0 2 0 0 0 164 12 163 131 6 8 0 319 100 0 0 0 3 0 0 10 347 105 147 115 8 16 0 646 99 1 0 0 4 0 0 115 329 115 114 105 18 4 0 564 100 0 0 0 5 0 0 0 124 10 67 85 8 6 0 425 100 0 0 0 6 0 0 0 199 34 180 137 10 3 0 196 100 0 0 0 7 0 0 14 168 6 207 151 9 16 0 548 100 0 0 0 March 4, 2026 at 01:50:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2202 117 198 141 16 7 0 264 99 1 0 0 1 0 0 0 166 8 219 142 14 9 0 1715 99 1 0 0 2 0 0 7 115 1 55 76 14 6 0 185 100 0 0 0 3 0 0 10 347 106 153 121 17 11 0 578 100 0 0 0 4 0 0 101 332 106 125 103 15 5 0 676 99 1 0 0 5 0 0 0 109 1 77 85 16 5 0 451 100 0 0 0 6 0 0 0 168 16 120 110 12 5 0 157 100 0 0 0 7 1 0 14 172 22 169 133 13 11 0 525 100 0 0 0 March 4, 2026 at 01:50:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 104 139 116 16 12 0 287 99 1 0 0 1 0 0 0 153 19 155 113 9 15 0 1714 99 1 0 0 2 0 0 0 180 28 166 126 13 4 0 152 100 0 0 0 3 0 0 10 394 112 230 165 10 5 0 548 100 0 0 0 4 0 0 73 370 106 202 156 8 7 0 588 100 0 0 0 5 0 0 0 168 7 160 127 13 26 0 660 100 0 0 0 6 0 0 0 112 1 89 86 16 8 0 370 100 0 0 0 7 0 0 14 139 4 126 110 12 6 0 475 100 0 0 0 March 4, 2026 at 01:50:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 104 134 101 18 9 0 377 99 1 0 0 1 0 0 0 124 5 125 99 22 7 0 1586 99 1 0 0 2 0 0 0 147 4 156 127 16 7 0 263 100 0 0 0 3 0 0 14 381 107 161 127 12 15 0 451 100 0 0 0 4 0 0 91 327 106 119 108 9 4 0 540 100 0 0 0 5 0 0 0 236 39 232 160 13 8 0 635 99 1 0 0 6 0 0 0 150 14 104 96 15 4 0 281 100 0 0 0 7 0 0 14 135 4 148 118 15 21 0 471 100 0 0 0 March 4, 2026 at 01:50:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 105 120 114 4 12 0 226 99 1 0 0 1 2 0 0 179 12 259 157 13 5 0 1876 99 1 0 0 2 0 0 0 127 9 119 109 10 2 0 190 100 0 0 0 3 0 0 10 402 107 187 144 6 2 0 603 100 0 0 0 4 0 0 73 336 125 136 109 13 13 0 667 99 1 0 0 5 0 0 0 115 2 56 83 6 2 0 444 100 0 0 0 6 0 0 0 160 16 111 103 6 2 0 134 100 0 0 0 7 0 0 14 160 4 193 142 5 5 0 584 100 0 0 0 March 4, 2026 at 01:50:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2187 102 174 133 13 4 0 244 99 1 0 0 1 0 0 0 185 37 173 123 6 10 0 1597 99 1 0 0 2 0 0 0 108 2 85 95 6 1 0 227 100 0 0 0 3 0 0 10 347 107 130 120 4 3 0 498 100 0 0 0 4 0 0 59 354 114 188 134 15 4 0 704 99 1 0 0 5 0 0 0 148 13 160 126 13 7 0 595 100 0 0 0 6 0 0 0 107 0 68 88 7 4 0 126 99 1 0 0 7 0 0 14 140 7 123 108 9 8 0 492 100 0 0 0 March 4, 2026 at 01:50:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 105 32 51 6 1 0 43 74 1 0 26 1 1 0 0 114 18 115 74 7 1 0 1547 74 1 0 26 2 0 0 0 127 18 106 37 14 0 0 196 66 0 0 34 3 0 0 10 280 105 47 52 6 0 0 343 71 0 0 29 4 0 0 31 332 121 91 81 5 0 0 350 77 0 0 22 5 0 0 0 65 2 31 48 5 2 0 395 72 0 0 28 6 0 0 0 63 0 38 47 12 0 0 118 71 0 0 29 7 0 0 14 104 7 92 52 13 1 0 393 65 0 0 35 March 4, 2026 at 01:50:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 111 54 0 4 0 0 1 0 1 0 99 1 2 0 0 20 3 42 3 1 1 0 1442 0 0 0 100 2 0 0 0 41 14 34 1 2 1 0 11 0 0 0 100 3 0 0 10 261 123 58 1 3 0 0 275 0 0 0 100 4 4 0 17 235 114 34 0 5 4 0 320 0 0 0 100 5 0 0 0 12 1 8 0 0 1 0 299 0 0 0 100 6 0 0 0 11 0 8 0 1 0 0 1 0 0 0 100 7 1 0 14 106 7 101 0 4 1 0 277 0 0 0 100 March 4, 2026 at 01:50:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 0 2192 154 227 0 8 5 3 88 0 1 0 99 1 11 0 0 52 8 90 0 9 7 5 1623 0 0 0 99 2 1878 0 0 38 1 30 2 3 5 3 312 0 1 0 99 3 21 0 10 278 112 95 1 12 7 7 408 0 0 0 100 4 16 0 3 258 104 59 0 11 10 5 442 0 0 0 100 5 1553 0 113 34 3 61 2 9 8 16 6871 2 1 0 96 6 101 0 0 50 2 64 1 6 6 18 72 0 0 0 100 7 63 0 16 59 3 68 0 8 6 7 395 0 0 0 100 March 4, 2026 at 01:50:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 117 142 0 1 0 0 3 0 1 0 99 1 0 0 0 13 3 36 1 0 0 0 1513 0 0 0 100 2 0 0 0 10 1 8 0 0 0 0 14 0 0 0 100 3 0 0 10 230 111 28 0 1 0 0 280 0 0 0 100 4 0 0 3 285 137 82 0 1 2 0 307 0 0 0 100 5 0 0 0 15 1 16 0 3 2 0 297 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 14 13 3 10 0 2 0 0 268 0 0 0 100 March 4, 2026 at 01:50:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 42 0 24 2173 105 256 4 30 31 17 215 0 1 0 99 1 18 0 19 57 4 127 1 27 1084 11 1663 0 3 0 97 2 35 0 2 61 2 107 5 31 33 5 99 0 1 0 99 3 46 0 10 265 111 84 2 12 1513 4 350 0 1 0 99 4 88 0 29 352 153 193 5 25 181 7 636 0 1 0 99 5 1887 0 13 65 14 101 3 10 1861 12 659 2 1 0 97 6 63 0 11 75 4 149 4 28 55 9 256 0 0 0 100 7 18 0 35 50 2 82 3 14 1778 5 359 0 1 0 99 March 4, 2026 at 01:50:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2169 138 201 0 4 1 1 29 0 1 0 99 1 17 0 0 34 5 57 2 3 4 4 1127 0 0 0 100 2 8 0 8 25 0 21 0 3 8 5 14 0 1 0 99 3 5 0 10 231 103 32 0 5 7 3 311 0 0 0 100 4 3 0 3 259 118 43 0 3 5 1 305 0 0 0 100 5 9 0 0 30 2 33 0 3 10 4 324 0 0 0 100 6 26 0 10 67 20 63 4 2 1 2 56 0 1 0 99 7 6 0 70 27 5 27 0 2 8 1 287 0 1 0 99 March 4, 2026 at 01:50:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2234 153 208 0 0 0 0 1 0 1 0 99 1 0 0 0 84 3 36 0 0 0 0 1050 0 0 0 99 2 0 0 455 21 2 8 0 0 2 0 1 0 0 0 100 3 0 0 17 289 104 12 0 1 0 0 259 0 0 0 100 4 0 0 3 293 104 14 0 0 0 0 300 0 0 0 100 5 0 0 0 82 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 124 21 48 0 1 0 0 21 0 0 0 100 7 0 0 63 84 2 20 0 1 2 0 266 0 1 0 99 March 4, 2026 at 01:50:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 152 206 0 0 1 0 0 0 1 0 99 1 0 0 0 14 4 36 1 0 1 0 1045 0 0 0 100 2 0 0 0 8 1 2 0 0 1 0 0 0 0 0 100 3 0 0 10 213 103 8 0 0 1 0 259 0 0 0 100 4 0 0 3 218 103 12 0 1 1 0 300 0 0 0 100 5 0 0 0 9 2 2 0 0 1 0 294 0 0 0 100 6 0 0 0 47 21 42 0 1 0 0 20 0 0 0 100 7 0 0 14 14 4 8 0 0 1 0 268 0 0 0 100 March 4, 2026 at 01:50:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 117 148 0 2 0 0 0 0 1 0 99 1 0 0 0 12 3 36 1 0 0 0 1047 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 216 103 5 1 0 1 0 300 0 0 0 100 5 0 0 0 78 36 74 0 1 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 13 2 10 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:50:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 129 0 1 0 0 11 0 1 0 99 1 0 0 0 20 3 50 2 2 0 0 1053 0 0 0 100 2 0 0 0 12 0 14 0 0 0 0 15 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 211 103 7 0 0 1 0 300 0 0 0 100 5 0 0 0 76 38 60 1 0 2 0 294 0 0 0 100 6 0 0 0 89 41 86 0 1 0 0 24 0 0 0 100 7 0 0 14 16 3 12 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:51:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 114 0 0 0 0 0 0 1 0 99 1 0 0 0 12 3 38 0 1 1 0 1046 0 0 0 100 2 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 3 0 0 10 212 103 6 1 0 0 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 2 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 2 0 294 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 16 4 40 1 1 0 0 1047 0 0 0 100 2 0 0 0 11 0 12 0 1 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 212 104 6 0 0 1 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 1 0 294 0 0 0 100 6 0 0 0 148 70 144 0 0 0 0 20 0 0 0 100 7 0 0 14 12 3 8 0 1 0 0 268 0 0 0 100 March 4, 2026 at 01:51:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 14 4 38 1 0 1 0 1044 0 0 0 100 2 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 3 0 0 10 219 104 18 0 1 0 0 259 0 0 0 100 4 0 0 3 210 103 2 1 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 1 0 294 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 14 9 2 6 1 0 0 0 265 0 0 0 100 March 4, 2026 at 01:51:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 14 4 38 1 0 0 0 1047 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 147 71 142 0 0 0 0 21 0 0 0 100 7 0 0 14 11 3 8 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:51:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2108 101 124 1 0 0 0 9 0 1 0 99 1 0 0 0 16 4 42 1 0 0 0 1053 0 0 0 100 2 0 0 0 16 3 14 0 0 0 0 10 0 0 0 100 3 0 0 10 214 104 8 0 0 0 0 259 0 0 0 100 4 0 0 3 219 104 19 0 1 0 0 301 0 0 0 100 5 0 0 0 13 7 2 0 0 1 0 294 0 0 0 100 6 0 0 0 147 71 142 0 0 0 0 21 0 0 0 100 7 0 0 14 12 2 10 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:51:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 13 4 38 0 0 0 0 1045 0 0 0 100 2 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 211 103 4 0 1 0 0 300 0 0 0 100 5 0 0 0 14 3 12 0 1 0 0 294 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 14 11 3 8 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:51:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 14 4 38 1 0 1 0 1047 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 3 0 0 10 214 104 8 0 0 0 0 259 0 0 0 100 4 0 0 3 213 104 5 1 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 149 71 146 0 0 0 0 21 0 0 0 100 7 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 115 0 1 1 0 0 0 1 0 99 1 0 0 0 16 5 38 2 0 1 0 1046 0 0 0 100 2 0 0 0 8 1 2 0 0 1 0 0 0 0 0 100 3 0 0 10 213 103 6 1 0 1 0 259 0 0 0 100 4 0 0 3 209 103 3 0 0 1 0 300 0 0 0 100 5 0 0 0 12 2 4 1 0 1 0 294 0 0 0 100 6 0 0 0 151 71 152 0 2 0 0 20 0 0 0 100 7 0 0 14 12 4 6 0 0 1 0 268 0 0 0 100 March 4, 2026 at 01:51:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 0 0 1 0 1 0 1 0 99 1 0 0 0 13 4 38 0 0 0 0 1046 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 147 70 142 0 1 0 0 20 0 0 0 100 7 0 0 14 14 2 16 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:51:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 126 0 0 0 0 7 0 0 0 100 1 0 0 0 16 4 42 2 0 0 0 1052 0 0 0 100 2 0 0 0 10 0 10 0 0 0 0 10 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 5 0 0 0 13 7 2 0 0 0 0 294 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 14 15 3 14 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:51:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 124 0 1 1 0 0 0 1 0 99 1 0 0 0 14 4 38 1 0 0 0 1047 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 2 1 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 111 53 106 0 0 0 0 20 0 0 0 100 7 0 0 14 44 18 42 1 1 2 0 266 0 0 0 100 March 4, 2026 at 01:51:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 116 0 0 0 0 0 0 0 0 100 1 0 0 0 19 4 48 1 1 0 0 1045 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 4 0 0 3 253 124 48 0 1 2 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 1 0 294 0 0 0 100 6 0 0 0 48 20 44 0 0 0 0 20 0 0 0 100 7 0 0 14 71 33 66 0 1 0 0 268 0 0 0 100 March 4, 2026 at 01:51:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 116 0 0 0 0 0 0 1 0 99 1 0 0 0 14 4 38 1 0 1 0 1046 0 0 0 100 2 0 0 0 12 2 6 0 0 0 0 1 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 307 152 102 0 0 1 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 2 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 136 180 0 2 0 0 0 0 1 0 99 1 0 0 0 15 4 40 0 0 0 0 1045 0 0 0 100 2 0 0 0 13 1 14 0 1 0 0 0 0 0 0 100 3 0 0 10 215 105 12 0 1 0 0 263 0 0 0 100 4 0 0 3 244 118 36 0 1 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 47 21 42 0 0 0 0 21 0 0 0 100 7 0 0 14 14 4 172 0 0 0 0 599 0 0 0 100 March 4, 2026 at 01:51:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 116 148 0 2 0 0 5 0 1 0 99 1 0 0 0 18 5 44 1 0 0 0 1073 0 0 0 100 2 0 0 0 18 3 18 0 0 0 0 15 0 0 0 100 3 0 0 10 216 103 18 0 1 0 0 260 0 0 0 100 4 0 0 3 289 140 84 1 1 0 0 305 0 0 0 100 5 0 0 0 14 6 2 0 0 0 0 294 0 0 0 100 6 0 0 0 48 21 44 0 0 0 0 22 0 0 0 100 7 0 0 14 13 2 8 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 136 180 0 2 0 0 0 0 1 0 99 1 0 0 0 16 4 38 2 0 0 0 1046 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 10 211 103 6 1 0 0 0 259 0 0 0 100 4 0 0 3 244 118 36 0 2 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 11 3 8 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:51:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 141 190 0 1 0 0 0 0 1 0 99 1 0 0 0 35 14 60 1 1 0 0 1046 0 0 0 100 2 0 0 0 16 5 10 0 0 0 0 4 0 0 0 100 3 0 0 10 214 103 10 0 1 0 0 259 0 0 0 100 4 0 0 3 221 104 18 0 1 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 7 0 0 14 10 2 8 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:51:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 1 0 0 0 1 0 99 1 0 0 0 115 55 140 0 1 0 0 1046 0 0 0 100 2 0 0 0 8 1 2 0 0 1 0 0 0 0 0 100 3 0 0 10 210 103 6 0 0 1 0 259 0 0 0 100 4 0 0 3 211 103 4 0 0 1 0 300 0 0 0 100 5 0 0 0 14 2 12 0 1 1 0 293 0 0 0 100 6 0 0 0 47 21 40 0 0 1 0 20 0 0 0 100 7 0 0 14 12 4 6 0 0 1 0 268 0 0 0 100 March 4, 2026 at 01:51:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 115 0 0 0 0 0 0 0 0 100 1 0 0 0 115 54 138 1 0 0 0 1046 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 2 1 0 1 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 45 20 42 0 1 0 0 20 0 0 0 100 7 0 0 14 9 2 4 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2109 101 126 2 0 0 0 9 0 0 0 100 1 0 0 0 117 54 142 2 0 0 0 1054 0 0 0 100 2 0 0 0 15 2 14 0 0 0 0 10 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 5 0 0 0 15 7 4 0 0 2 0 294 0 0 0 100 6 0 0 0 50 20 50 0 1 1 0 20 0 0 0 100 7 0 0 14 15 3 14 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:51:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 0 0 0 0 0 0 0 100 1 0 0 0 113 54 138 0 0 1 0 1046 0 0 0 100 2 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 47 20 42 0 0 0 0 20 0 0 0 100 7 0 0 14 14 2 16 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:51:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 116 0 0 0 0 1 0 0 0 100 1 0 0 0 79 36 100 1 0 0 0 1046 0 0 0 100 2 0 0 0 43 18 40 0 1 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 47 20 44 0 0 0 0 20 0 0 0 100 7 0 0 14 11 3 8 0 1 0 0 268 0 0 0 100 March 4, 2026 at 01:51:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 124 0 1 0 0 0 0 1 0 99 1 0 0 0 13 4 38 0 0 0 0 1046 0 0 0 100 2 0 0 0 108 50 104 0 0 0 0 0 0 0 0 100 3 0 0 10 211 103 6 1 0 0 0 259 0 0 0 100 4 0 0 3 210 103 2 1 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 46 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 11 2 8 1 1 0 0 266 0 0 0 100 March 4, 2026 at 01:51:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 118 0 0 0 0 0 0 1 0 99 1 0 0 0 19 4 48 2 1 1 0 1046 0 0 0 100 2 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 3 0 0 10 211 103 6 0 0 0 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 47 21 42 0 0 0 0 21 0 0 0 100 7 0 0 14 11 3 8 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:51:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 113 144 0 2 0 0 7 0 1 0 99 1 0 0 0 16 4 42 1 0 0 0 1054 0 0 0 100 2 0 0 0 93 41 92 0 1 0 0 12 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 301 0 0 0 100 5 0 0 0 13 7 2 0 0 0 0 294 0 0 0 100 6 0 0 0 48 21 42 0 0 0 0 21 0 0 0 100 7 0 0 14 12 2 10 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 141 194 1 1 0 0 18 0 1 0 99 1 0 0 0 39 15 64 1 1 0 0 1069 0 0 0 100 2 0 0 0 15 0 14 0 1 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 8 1 2 1 0 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 15 4 14 0 0 0 0 277 0 0 0 100 March 4, 2026 at 01:51:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 114 54 138 1 0 0 0 1046 0 0 0 100 2 0 0 0 10 1 6 0 0 0 0 1 0 0 0 100 3 0 0 10 218 103 18 0 1 0 0 259 0 0 0 100 4 0 0 3 213 104 6 1 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 47 20 44 0 0 0 0 20 0 0 0 100 7 0 0 14 11 3 8 1 0 0 0 267 0 0 0 100 March 4, 2026 at 01:51:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 1 0 0 0 1 0 99 1 0 0 0 116 55 140 1 1 0 0 1045 0 0 0 100 2 0 0 0 8 1 2 0 0 1 0 0 0 0 0 100 3 0 0 10 212 103 6 1 0 1 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 1 0 300 0 0 0 100 5 0 0 0 9 2 2 0 0 1 0 294 0 0 0 100 6 0 0 0 47 21 40 0 0 1 0 20 0 0 0 100 7 0 0 14 12 4 6 0 0 1 0 268 0 0 0 100 March 4, 2026 at 01:51:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 80 37 102 1 0 0 0 1046 0 0 0 100 2 0 0 0 41 17 38 0 1 0 0 0 0 0 0 100 3 0 0 10 212 103 8 0 0 1 0 259 0 0 0 100 4 0 0 3 214 103 12 0 1 1 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 122 0 0 0 0 5 0 1 0 99 1 0 0 0 15 4 42 0 0 0 0 1054 0 0 0 100 2 0 0 0 116 53 116 0 0 0 0 14 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 212 103 6 0 1 0 0 300 0 0 0 100 5 0 0 0 18 8 10 0 1 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 14 3 12 0 0 1 0 268 0 0 0 100 March 4, 2026 at 01:51:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 136 180 0 2 0 0 0 0 1 0 99 1 0 0 0 14 4 38 1 0 0 0 1046 0 0 0 100 2 0 0 0 43 15 38 0 2 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 2 1 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 207 0 1 0 0 0 0 1 0 99 1 0 0 0 16 4 38 2 0 0 0 1046 0 0 0 100 2 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 3 0 0 10 211 103 6 0 0 0 0 259 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 52 20 54 0 1 0 0 20 0 0 0 100 7 0 0 14 11 3 8 0 1 0 0 268 0 0 0 100 March 4, 2026 at 01:51:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 116 142 0 0 0 0 0 0 1 0 99 1 0 0 0 84 39 110 0 1 0 0 1045 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 9 211 103 6 1 0 0 0 259 0 0 0 100 4 0 0 4 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 48 20 42 1 0 0 0 20 0 0 0 100 7 0 0 14 13 2 16 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:51:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 104 0 2 0 0 0 0 1 0 99 1 0 0 0 114 54 138 1 0 0 0 1047 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 3 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 47 21 42 0 0 0 0 21 0 0 0 100 7 0 0 14 22 3 17 0 1 0 0 268 0 0 0 100 March 4, 2026 at 01:51:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 132 0 1 0 0 5 0 0 0 100 1 0 0 0 118 55 144 1 0 2 0 1074 0 0 0 100 2 0 0 0 17 3 18 0 0 0 0 16 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 213 104 6 1 0 0 0 301 0 0 0 100 5 0 0 0 14 6 2 0 0 0 0 294 0 0 0 100 6 0 0 0 47 21 42 0 0 0 0 21 0 0 0 100 7 0 0 14 14 2 12 1 1 0 0 266 0 0 0 100 March 4, 2026 at 01:51:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 116 0 0 0 0 0 0 0 0 100 1 0 0 0 87 38 114 1 1 0 0 1046 0 0 0 100 2 0 0 0 41 16 38 0 1 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 11 3 8 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:51:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 0 0 0 0 0 0 0 100 1 0 0 0 14 4 38 1 0 0 0 1046 0 0 0 100 2 0 0 0 108 51 104 0 0 0 0 1 0 0 0 100 3 0 0 10 214 104 8 0 0 0 0 259 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 15 4 10 0 0 0 0 3 0 0 0 100 7 0 0 14 44 19 42 0 1 0 0 284 0 0 0 100 March 4, 2026 at 01:51:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 1 0 0 0 1 0 99 1 0 0 0 18 5 40 1 0 1 0 1046 0 0 0 100 2 0 0 0 115 52 116 0 2 0 0 1 0 0 0 100 3 0 0 10 211 103 6 0 0 1 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 1 0 300 0 0 0 100 5 0 0 0 9 2 2 0 0 1 0 294 0 0 0 100 6 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 7 0 0 14 52 24 46 0 0 1 0 288 0 0 0 100 March 4, 2026 at 01:51:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 136 180 0 2 0 0 0 0 0 0 100 1 0 0 0 13 4 38 0 0 0 0 1046 0 0 0 100 2 0 0 0 43 15 38 0 2 0 0 0 0 0 0 100 3 0 0 10 217 104 16 0 1 0 0 259 0 0 0 100 4 0 0 3 210 103 2 1 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 14 49 22 46 1 0 0 0 286 0 0 0 100 March 4, 2026 at 01:51:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 151 213 0 0 0 0 5 0 1 0 99 1 0 0 0 18 4 42 2 0 0 0 1053 0 0 0 100 2 0 0 0 25 2 26 0 0 1 0 15 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 5 0 0 0 14 6 2 0 0 0 0 294 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 14 54 23 52 0 0 0 0 287 0 0 0 100 March 4, 2026 at 01:51:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 151 206 0 0 0 0 0 0 1 0 99 1 0 0 0 14 4 38 1 0 0 0 1046 0 0 0 100 2 0 0 0 14 0 10 0 0 0 0 0 0 0 0 100 3 0 0 10 213 103 8 1 0 0 0 259 0 0 0 100 4 0 0 3 214 103 12 0 1 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 22 8 18 0 1 0 0 9 0 0 0 100 7 0 0 14 33 14 28 0 0 0 0 277 0 0 0 100 March 4, 2026 at 01:51:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2159 151 206 0 0 0 0 0 0 1 0 99 1 0 0 0 13 4 38 0 0 0 0 1045 0 0 0 100 2 0 0 0 17 1 12 0 0 0 0 1 0 0 0 100 3 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 4 0 0 3 214 104 8 0 0 0 0 300 0 0 0 100 5 0 0 0 12 1 12 0 1 0 0 294 0 0 0 100 6 0 0 0 47 20 44 0 0 0 0 20 0 0 0 100 7 0 0 14 11 3 8 0 1 0 0 268 0 0 0 100 March 4, 2026 at 01:51:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 206 0 0 0 0 0 0 1 0 99 1 0 0 0 14 4 38 1 0 0 0 1047 0 0 0 100 2 0 0 0 14 0 10 0 0 0 0 0 0 0 0 100 3 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 2 1 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 151 206 0 0 0 0 0 0 1 0 99 1 0 0 0 17 5 40 2 0 1 0 1047 0 0 0 100 2 0 0 0 14 0 10 0 0 0 0 0 0 0 0 100 3 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 52 21 52 0 1 0 0 21 0 0 0 100 7 0 0 14 11 3 8 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:51:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 214 0 0 0 0 5 0 1 0 99 1 1 0 0 15 4 42 0 0 0 0 1052 0 0 0 100 2 0 0 0 24 3 24 0 0 0 0 14 0 0 0 100 3 0 0 10 211 103 6 1 0 0 0 259 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 301 0 0 0 100 5 0 0 0 12 6 2 0 0 0 0 294 0 0 0 100 6 0 0 0 49 21 44 0 0 1 0 21 0 0 0 100 7 0 0 14 17 2 20 0 1 1 0 266 0 0 0 100 March 4, 2026 at 01:51:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 208 0 0 0 0 0 0 1 0 99 1 0 0 0 14 4 38 1 0 0 0 1046 0 0 0 100 2 0 0 0 16 1 12 0 0 0 0 1 0 0 0 100 3 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 1 0 14 12 3 8 1 0 0 0 290 0 0 0 100 March 4, 2026 at 01:51:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 216 0 1 0 0 0 0 1 0 99 1 0 0 0 14 4 38 1 0 1 0 1047 0 0 0 100 2 0 0 0 16 1 12 0 0 0 0 1 0 0 0 100 3 0 0 10 212 103 8 0 0 0 0 259 0 0 0 100 4 0 0 3 213 104 6 1 0 2 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 1 0 294 0 0 0 100 6 0 0 0 45 19 42 0 0 0 0 19 0 0 0 100 7 0 0 14 13 3 10 0 0 0 0 267 0 0 0 100 March 4, 2026 at 01:51:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 151 211 0 2 0 0 0 0 1 0 99 1 0 0 0 22 5 48 2 1 1 0 1046 0 0 0 100 2 0 0 0 18 1 10 0 0 1 0 0 0 0 0 100 3 0 0 10 210 103 6 0 0 1 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 2 0 300 0 0 0 100 5 0 0 0 9 2 2 0 0 2 0 294 0 0 0 100 6 0 0 0 47 21 40 0 0 1 0 20 0 0 0 100 7 0 0 14 12 4 6 0 0 1 0 268 0 0 0 100 March 4, 2026 at 01:51:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 116 142 0 0 0 0 0 0 1 0 99 1 0 0 0 56 25 80 0 1 0 0 1046 0 0 0 100 2 0 0 0 35 14 32 0 1 0 0 0 0 0 0 100 3 0 0 10 210 103 6 0 0 0 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 136 180 0 4 0 0 5 0 1 0 99 1 0 0 0 18 4 44 1 0 0 0 1053 0 0 0 100 2 0 0 0 54 17 58 0 3 0 0 13 0 0 0 100 3 0 0 10 213 104 6 1 0 0 0 259 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 5 0 0 0 12 6 2 0 0 0 0 294 0 0 0 100 6 0 0 0 54 20 48 0 1 0 0 20 0 0 0 100 7 0 0 14 14 3 12 1 0 1 0 268 0 0 0 100 March 4, 2026 at 01:51:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 151 207 0 0 0 0 0 0 1 0 99 1 0 0 0 14 4 38 0 0 1 0 1046 0 0 0 100 2 0 0 0 16 0 12 0 0 0 0 0 0 0 0 100 3 0 0 10 217 104 16 0 1 1 0 259 0 0 0 100 4 0 0 3 210 103 2 1 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 186 0 2 0 0 0 0 1 0 99 1 0 0 0 15 4 38 2 0 0 0 1046 0 0 0 100 2 0 0 0 14 0 10 0 0 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 48 20 44 1 0 0 0 20 0 0 0 100 7 0 0 14 32 3 27 0 2 0 0 268 0 0 0 100 March 4, 2026 at 01:51:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 142 192 0 1 0 0 0 0 1 0 99 1 0 0 0 37 15 62 1 1 0 0 1046 0 0 0 100 2 0 0 0 14 1 8 0 0 1 0 0 0 0 0 100 3 0 0 10 217 105 12 0 1 1 0 259 0 0 0 100 4 0 0 3 216 104 14 0 2 0 0 300 0 0 0 100 5 0 0 0 9 2 4 0 1 1 0 294 0 0 0 100 6 0 0 0 50 22 46 0 1 0 0 20 0 0 0 100 7 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 113 54 138 0 0 0 0 1046 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 300 0 0 0 100 5 0 0 0 14 1 14 0 1 0 0 294 0 0 0 100 6 0 0 0 47 21 42 0 0 0 0 21 0 0 0 100 7 0 0 14 11 3 8 1 0 0 0 268 0 0 0 100 March 4, 2026 at 01:51:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 120 0 0 0 0 5 0 1 0 99 1 0 0 0 118 55 144 1 0 1 0 1074 0 0 0 100 2 0 0 0 17 3 18 0 0 0 0 16 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 213 104 6 1 0 0 0 301 0 0 0 100 5 0 0 0 14 6 2 0 0 0 0 294 0 0 0 100 6 0 0 0 47 21 42 0 0 0 0 21 0 0 0 100 7 0 0 14 12 2 10 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:51:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 120 0 0 0 0 18 0 0 0 99 1 0 0 0 89 41 110 2 0 0 0 1046 0 0 0 100 2 0 0 0 35 13 32 0 1 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 50 20 50 0 1 0 0 20 0 0 0 100 7 0 0 14 15 4 14 0 0 0 0 277 0 0 0 100 March 4, 2026 at 01:51:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 13 4 38 0 0 0 0 1046 0 0 0 100 2 0 0 0 108 51 104 0 0 0 0 1 0 0 0 100 3 0 0 10 212 103 8 0 0 0 0 259 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 0 49 20 46 0 0 0 0 20 0 0 0 100 7 0 0 14 16 3 18 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:51:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 116 0 1 0 0 0 0 1 0 99 1 0 0 0 17 5 38 2 0 2 0 1046 0 0 0 100 2 0 0 0 110 52 104 0 0 1 0 1 0 0 0 100 3 0 0 10 210 103 6 0 0 1 0 259 0 0 0 100 4 0 0 3 209 103 2 0 0 1 0 300 0 0 0 100 5 0 0 0 9 2 2 0 0 1 0 294 0 0 0 100 6 0 0 0 47 21 40 0 0 1 0 20 0 0 0 100 7 0 0 14 13 4 6 1 0 1 0 268 0 0 0 100 March 4, 2026 at 01:51:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 0 0 1 0 99 1 0 0 0 18 4 48 0 1 1 0 1046 0 0 0 100 2 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 2 1 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 14 11 2 8 0 1 0 0 266 0 0 0 100 March 4, 2026 at 01:51:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1294 0 1 2126 101 150 1 0 0 0 145 0 1 0 99 1 3 0 0 28 4 62 3 3 2 0 1170 1 0 0 99 2 19 0 0 129 52 144 0 1 0 0 44 0 0 0 100 3 1 0 10 217 104 18 0 2 0 0 342 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 300 0 0 0 100 5 0 0 0 83 72 4 0 0 0 0 294 0 0 0 100 6 0 0 0 43 18 40 0 1 0 0 34 0 0 0 100 7 11 0 15 32 3 46 0 1 0 0 314 0 0 0 100 March 4, 2026 at 01:52:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2671 101 1247 0 0 8 0 0 0 1 0 99 1 0 0 0 139 6 284 2 1 36 0 1921 1 1 0 98 2 0 0 0 112 50 108 0 2 0 0 2 0 0 0 100 3 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 5 0 0 0 1090 1082 4 0 0 86 0 294 0 1 0 99 6 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 7 2564 0 14 568 2 1109 2 1 49 0 311 0 2 0 98 March 4, 2026 at 01:52:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2828 101 1547 0 10 36 0 0 0 1 0 99 1 0 0 0 181 4 360 3 9 75 0 1984 1 1 0 98 2 0 0 0 144 50 173 0 6 42 0 0 0 0 0 100 3 0 0 10 322 166 104 0 10 51 0 259 0 0 0 100 4 0 0 3 310 104 206 0 15 60 0 300 0 0 0 100 5 0 0 0 1238 1187 91 0 14 154 0 294 0 1 0 99 6 0 0 0 57 0 95 0 17 42 0 0 0 0 0 100 7 0 0 14 724 3 1426 1 8 69 0 268 0 1 0 99 March 4, 2026 at 01:52:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 111 134 0 2 0 0 0 0 1 0 99 1 0 0 0 23 7 46 1 0 1 0 1059 0 0 0 100 2 0 0 0 89 40 86 0 1 0 0 2 0 0 0 100 3 0 0 10 222 104 20 0 1 0 0 290 0 0 0 100 4 0 0 3 216 103 14 1 1 0 0 300 0 0 0 100 5 0 0 0 23 15 4 0 0 0 0 294 0 0 0 100 6 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 7 0 0 14 11 2 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:52:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2197 151 288 0 0 1 0 0 0 1 0 99 1 0 0 0 31 4 66 2 0 2 0 1124 0 0 0 99 2 0 0 0 16 0 14 0 0 1 0 2 0 0 0 100 3 0 0 10 219 106 12 0 0 0 0 270 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 5 0 0 0 130 122 4 0 1 7 0 294 0 0 0 100 6 0 0 0 8 1 4 0 1 0 0 1 0 0 0 100 7 0 0 14 52 3 88 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:52:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2230 152 355 2 2 0 0 6 0 1 0 99 1 0 0 0 21 6 44 0 0 1 0 1057 0 0 0 100 2 0 0 0 22 1 24 0 0 0 0 11 0 0 0 100 3 0 0 10 219 104 16 0 1 0 0 280 0 0 0 100 4 0 0 3 219 104 17 0 1 1 0 312 0 0 0 100 5 0 0 0 220 189 57 4 3 18 0 382 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 7 0 0 14 83 2 154 0 0 3 0 266 0 0 0 100 March 4, 2026 at 01:52:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 112 213 0 0 0 0 0 0 0 0 100 1 0 0 0 14 4 38 1 0 1 0 1048 0 0 0 100 2 0 0 0 16 0 14 0 0 0 0 2 0 0 0 100 3 0 0 10 289 142 86 0 1 0 0 259 0 0 0 100 4 0 0 3 225 103 30 0 0 0 0 371 0 0 0 100 5 0 0 0 153 138 12 0 1 6 0 305 0 0 0 100 6 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 7 0 0 14 57 3 98 1 0 2 0 268 0 0 0 100 March 4, 2026 at 01:52:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 108 0 0 0 0 0 0 0 0 100 1 0 0 0 14 4 38 1 0 1 0 1047 0 0 0 100 2 0 0 0 20 1 18 0 0 0 0 3 0 0 0 100 3 0 0 10 315 154 110 0 0 2 0 259 0 0 0 100 4 0 0 3 223 107 16 1 0 1 0 312 0 0 0 100 5 0 0 0 25 13 18 0 1 2 0 319 0 0 0 100 6 0 0 0 10 0 8 0 1 0 0 0 0 0 0 100 7 0 0 14 12 3 10 0 0 1 0 267 0 0 0 100 March 4, 2026 at 01:52:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 101 204 0 0 2 0 0 0 0 0 100 1 0 0 0 17 5 38 2 0 1 0 1047 0 0 0 100 2 0 0 0 18 1 14 0 0 1 0 2 0 0 0 100 3 0 0 10 312 154 106 0 0 1 0 259 0 0 0 100 4 0 0 3 226 103 32 0 0 1 0 386 0 0 0 100 5 0 0 0 170 158 14 0 1 4 0 312 0 0 0 100 6 0 0 0 12 1 6 0 3 1 0 1 0 0 0 100 7 0 0 14 66 4 112 0 1 1 0 268 0 0 0 100 March 4, 2026 at 01:52:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 101 166 0 2 1 0 0 0 0 0 100 1 1 0 0 26 4 54 2 1 0 0 1092 0 0 0 100 2 0 0 0 13 0 10 0 0 0 0 4 0 0 0 100 3 0 0 10 312 154 106 0 0 0 0 259 0 0 0 100 4 0 0 3 221 105 18 0 0 0 0 328 0 0 0 100 5 0 0 0 98 86 8 0 1 0 0 294 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 14 32 2 48 0 0 1 0 266 0 0 0 100