March 4, 2026 at 01:39:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 720 0 41 4352 136 4490 59 271 1280 36 3220 11 7 0 82 1 847 0 62 974 20 3449 18 372 1259 40 7589 4 6 0 90 2 932 0 131 757 20 2437 13 338 1216 34 4559 3 5 0 93 3 579 0 47 1206 430 2690 14 324 1208 50 5378 2 8 0 90 4 1000 0 76 1091 26 4206 13 360 1262 48 11220 3 6 0 91 5 670 0 413 3104 2421 2035 18 229 1289 17 5542 6 7 0 87 6 607 0 909 1081 16 3452 23 297 1296 47 7949 9 9 0 82 7 907 0 53 2258 21 5238 34 266 1190 36 4561 5 7 0 88 March 4, 2026 at 01:39:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1624 0 4 2439 102 693 34 117 1219 43 1600 5 3 0 91 1 5341 0 60 464 45 771 45 165 1020 63 3030 19 9 0 72 2 8773 0 7 355 31 608 27 119 1371 55 3112 4 5 0 91 3 5879 0 42 701 169 711 28 118 359 70 2965 4 32 0 64 4 7515 0 71 582 50 975 34 157 1419 70 3116 19 12 0 69 5 4126 0 53 316 25 676 21 150 1231 60 1945 3 4 0 93 6 8233 0 37 359 2 907 31 137 1157 59 2045 3 9 0 88 7 4892 0 28 269 0 652 25 144 1101 51 1449 3 3 0 94 March 4, 2026 at 01:39:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2126 101 130 7 3 28 0 1062 0 12 0 88 1 0 0 14 235 107 17 7 4 22 0 260 0 11 0 89 2 0 0 0 121 48 140 3 13 51 0 302 0 4 0 96 3 0 0 0 74 44 19 6 8 114 0 0 0 11 0 89 4 40 0 21 237 106 19 7 3 23 0 576 0 12 0 88 5 0 0 0 29 2 8 8 3 12 0 262 0 11 0 89 6 0 0 0 86 6 161 2 28 63 0 37 0 2 0 98 7 0 0 0 35 1 37 4 16 124 0 0 0 9 0 91 March 4, 2026 at 01:39:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2252 102 348 5 77 691 0 0 0 9 0 91 1 0 0 10 301 105 231 4 75 642 0 259 0 9 0 91 2 26 0 0 422 49 758 1 98 564 0 1599 0 2 0 98 3 0 0 0 428 332 476 3 85 763 0 0 0 5 0 95 4 0 0 17 311 105 229 4 74 631 0 267 0 8 0 92 5 0 0 3 93 0 236 9 72 642 0 0 0 9 0 91 6 0 0 0 117 7 273 2 90 658 0 340 0 4 0 96 7 0 0 0 100 1 228 3 86 582 0 0 0 8 0 92 March 4, 2026 at 01:39:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2255 100 460 0 106 538 0 0 0 2 0 98 1 0 0 10 399 115 442 0 132 588 0 259 0 1 0 99 2 0 0 0 255 43 485 1 130 531 0 1399 0 1 0 99 3 0 0 0 538 380 1142 0 138 493 0 0 0 1 0 99 4 0 0 17 384 103 470 1 158 658 0 509 0 1 0 99 5 0 0 0 160 2 386 0 115 613 0 0 0 1 0 99 6 0 0 0 173 4 425 0 131 664 0 294 0 1 0 99 7 0 0 0 164 0 397 0 129 547 0 0 0 1 0 99 March 4, 2026 at 01:39:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2271 100 475 0 108 426 0 0 0 1 0 99 1 0 0 3 489 153 537 0 123 483 0 0 0 1 0 99 2 0 0 0 180 2 404 1 105 506 0 600 0 1 0 99 3 0 0 1 520 351 1087 1 128 454 0 8 0 1 0 99 4 0 0 17 420 106 499 0 138 494 0 1322 0 2 0 98 5 0 0 7 189 7 423 0 106 499 0 260 0 1 0 99 6 0 0 0 202 4 459 0 122 480 0 294 0 1 0 99 7 0 0 0 173 1 387 0 109 414 0 2 0 1 0 99 March 4, 2026 at 01:39:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 291 0 9 2282 100 412 4 62 65 23 553 0 1 0 98 1 329 0 13 395 121 326 2 51 72 26 519 0 1 0 99 2 341 0 14 119 3 216 4 34 69 12 935 0 1 0 99 3 1134 0 10 139 3 262 4 38 70 14 732 2 1 0 97 4 6414 0 55 436 128 442 8 48 182 28 3001 4 9 0 86 5 2887 0 8 195 14 381 8 56 126 39 1705 2 2 0 96 6 408 0 2 187 4 408 2 67 87 38 1743 1 1 0 98 7 2268 0 4 142 3 299 5 46 92 22 863 2 1 0 97 March 4, 2026 at 01:39:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 0 2169 105 205 0 13 46 0 16 0 1 0 99 1 3 0 3 273 104 106 2 24 64 0 21 0 0 0 100 2 11 0 0 51 2 78 0 17 49 0 609 0 0 0 100 3 2 0 7 103 62 186 0 13 39 0 10 0 0 0 100 4 0 0 31 349 151 208 1 15 47 0 1394 0 1 0 99 5 5 0 7 69 9 103 0 12 44 0 319 0 0 0 100 6 3 0 0 76 5 128 0 20 55 0 302 0 0 0 100 7 0 0 0 51 1 79 0 23 42 0 1 0 0 0 100 March 4, 2026 at 01:39:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 105 122 0 1 1 0 8 0 0 0 99 1 0 0 3 211 102 4 0 0 0 0 1 0 1 0 99 2 0 0 0 15 4 10 0 0 0 0 603 0 0 0 100 3 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 4 9 0 17 220 105 46 0 1 0 0 1401 0 0 0 100 5 0 0 7 108 52 104 0 0 0 0 260 0 0 0 100 6 0 0 0 15 4 10 0 0 0 0 294 0 0 0 100 7 0 0 0 13 1 8 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:40:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 120 0 1 0 0 9 0 0 0 100 1 0 0 3 212 101 10 0 1 0 0 0 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 599 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 17 216 105 38 1 0 0 0 1398 0 0 0 100 5 0 0 7 108 52 104 0 0 0 0 260 0 0 0 100 6 0 0 0 14 4 10 0 0 0 0 294 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 2 2121 101 135 0 10 12 1 29 0 1 0 99 1 16 0 3 219 101 18 0 8 4 3 26 0 0 0 100 2 10 0 11 42 5 59 0 14 4 10 681 0 1 0 99 3 28 0 16 25 1 26 0 4 12 1 43 0 0 0 100 4 282 0 25 230 105 69 2 3 24 0 1517 0 1 0 99 5 18 0 10 147 64 149 2 8 5 3 336 0 0 0 100 6 13 0 0 37 6 45 0 7 3 4 334 0 0 0 100 7 17 0 4 25 3 42 1 8 6 8 49 0 0 0 100 March 4, 2026 at 01:40:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 3 212 101 6 0 1 0 0 18 0 0 0 100 2 0 0 0 26 5 26 1 2 0 0 609 0 0 0 100 3 0 0 0 11 1 5 0 1 0 0 0 0 0 0 100 4 0 0 17 216 105 38 1 0 0 0 1345 0 0 0 100 5 0 0 14 111 53 108 0 1 1 0 260 0 0 0 100 6 0 0 0 16 4 12 0 0 0 0 294 0 0 0 100 7 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 112 0 1 1 0 0 0 0 0 100 1 0 0 7 212 102 4 0 0 3 0 1 0 0 0 100 2 0 0 0 21 5 12 0 0 1 0 602 0 0 0 100 3 0 0 7 16 1 15 0 2 3 0 0 0 0 0 100 4 0 0 21 215 105 36 1 0 1 0 1340 0 0 0 100 5 0 0 7 114 53 106 0 1 2 0 259 0 0 0 100 6 0 0 0 22 6 16 0 1 1 0 294 0 0 0 100 7 0 0 0 19 1 12 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:40:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 0 0 0 0 0 0 0 100 1 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 14 3 8 0 0 0 0 601 0 0 0 100 3 0 0 7 9 0 4 0 0 0 0 0 0 0 0 100 4 0 0 17 213 105 36 1 0 0 0 1342 0 0 0 100 5 0 0 7 111 53 106 0 0 1 0 260 0 0 0 100 6 0 0 0 15 4 10 0 0 0 0 294 0 0 0 100 7 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 0 0 4 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 15 4 10 0 0 0 0 601 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 16 216 105 46 0 1 0 0 1340 0 0 0 100 5 0 0 7 109 52 104 1 0 0 0 259 0 0 0 100 6 0 0 0 14 4 10 0 0 0 0 294 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 313 0 1 2409 100 660 15 59 28 4 1408 2 1 0 96 1 75 0 3 528 101 578 15 68 44 4 1399 2 1 0 97 2 191 0 0 275 3 499 9 42 28 1 1736 2 1 0 98 3 69 0 0 245 0 455 19 57 76 1 1675 2 1 0 97 4 2559 0 116 507 106 620 15 49 77 6 2667 2 2 0 96 5 724 0 8 342 50 519 6 31 43 8 1616 2 1 0 97 6 174 0 0 238 19 406 7 43 44 5 1568 2 1 0 97 7 2858 0 22 207 0 367 6 32 53 6 1402 3 1 0 96 March 4, 2026 at 01:40:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 102 114 0 2 0 0 7 0 0 0 100 1 51 0 3 221 106 12 0 1 0 0 13 0 0 0 100 2 0 0 0 17 4 10 0 0 0 0 603 0 0 0 100 3 0 0 0 12 2 4 0 0 2 0 9 0 0 0 100 4 0 0 17 215 104 40 1 1 0 0 1141 0 0 0 100 5 0 0 7 13 3 8 0 0 0 0 268 0 0 0 100 6 1 0 0 125 56 120 0 1 0 0 303 0 0 0 100 7 0 0 14 16 3 11 0 3 4 0 276 0 0 0 100 March 4, 2026 at 01:40:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 101 193 0 12 50 0 0 0 1 0 99 1 0 0 3 260 106 96 0 13 56 0 8 0 0 0 100 2 0 0 0 42 3 64 0 11 34 0 599 0 0 0 100 3 0 0 0 90 54 168 0 14 51 0 0 0 0 0 100 4 0 0 3 255 104 128 1 23 53 0 1131 0 0 0 100 5 0 0 7 49 2 87 0 11 47 0 263 0 0 0 100 6 0 0 0 170 55 223 0 20 60 0 294 0 0 0 100 7 0 0 14 41 1 72 0 14 48 0 266 0 0 0 100 March 4, 2026 at 01:40:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 4 221 108 14 0 0 0 0 10 0 0 0 100 2 0 0 0 16 4 10 0 0 0 0 601 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 2 212 104 34 1 0 0 0 1131 0 0 0 100 5 0 0 7 9 2 4 1 0 0 0 260 0 0 0 100 6 0 0 0 116 53 112 1 1 0 0 294 0 0 0 100 7 0 0 14 18 3 20 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:40:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 18 2125 102 140 1 10 7 5 41 0 1 0 99 1 14 0 20 236 108 32 0 6 3 4 55 0 0 0 99 2 10 0 2 24 3 20 0 4 3 1 620 0 0 0 100 3 1 0 0 23 2 21 2 4 3 0 28 0 0 0 100 4 295 0 2 224 104 50 2 7 19 0 1236 0 0 0 99 5 14 0 9 25 5 42 0 9 0 11 297 0 0 0 100 6 2 0 2 123 53 125 0 6 4 3 330 0 0 0 100 7 12 0 17 27 2 28 0 6 1 5 328 0 0 0 100 March 4, 2026 at 01:40:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 122 0 1 0 0 0 0 0 0 100 1 0 0 10 210 101 5 0 1 0 0 0 0 0 0 100 2 0 0 0 19 5 12 0 0 0 0 602 0 0 0 100 3 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 219 104 44 0 1 0 0 1092 0 0 0 100 5 0 0 7 17 9 6 0 1 0 0 265 0 0 0 100 6 0 0 0 121 55 116 0 0 0 0 301 0 0 0 100 7 0 0 14 20 3 18 0 0 0 0 268 0 0 0 100 March 4, 2026 at 01:40:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 1 0 0 0 0 0 100 1 0 0 11 217 101 17 0 2 1 0 0 0 0 0 100 2 0 0 0 20 5 14 0 1 0 0 603 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 2 213 104 34 1 0 0 0 1074 0 0 0 100 5 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 6 0 0 0 113 53 108 0 0 0 0 294 0 0 0 100 7 0 0 14 12 2 8 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:40:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 110 0 0 3 0 0 0 0 0 100 1 0 0 14 215 102 10 0 1 2 0 1 0 0 0 100 2 0 0 0 19 5 10 0 0 1 0 601 0 0 0 100 3 0 0 0 12 2 4 0 0 2 0 0 0 0 0 100 4 0 0 7 214 104 34 1 0 1 0 1075 0 0 0 100 5 0 0 7 14 3 6 1 0 2 0 259 0 0 0 100 6 0 0 0 118 54 112 1 1 1 0 294 0 0 0 100 7 0 0 14 18 3 10 0 0 1 0 266 0 0 0 100 March 4, 2026 at 01:40:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 109 0 1 0 0 0 0 0 0 100 1 0 0 4 211 101 4 0 0 0 0 0 0 0 0 100 2 0 0 0 18 3 18 0 1 0 0 599 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 2 212 104 34 1 0 0 0 1074 0 0 0 100 5 0 0 7 10 2 6 0 0 0 0 259 0 0 0 100 6 0 0 0 112 53 108 0 0 0 0 295 0 0 0 100 7 0 0 14 11 2 6 0 0 0 0 266 0 0 0 100 March 4, 2026 at 01:40:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 279 0 0 2904 101 1705 63 198 149 7 7209 13 4 0 83 1 425 0 4 847 104 1230 56 150 142 2 6125 14 3 0 83 2 156 0 0 869 6 1729 62 195 196 1 6556 11 3 0 86 3 546 0 0 1002 0 2141 61 218 136 8 6855 12 3 0 85 4 4781 0 361 1053 107 1855 54 193 103 6 7954 14 4 0 82 5 904 0 8 750 8 1451 50 161 179 9 7141 13 3 0 84 6 211 0 2 764 43 1484 66 177 151 6 6431 12 3 0 85 7 126 0 14 849 5 1711 43 162 98 8 6645 11 3 0 86 March 4, 2026 at 01:40:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 5058 107 6027 129 627 434 0 23393 45 12 0 43 1 31 0 2 2933 110 5548 145 589 437 0 21613 46 10 0 44 2 31 0 0 2628 8 5240 92 556 392 0 20894 40 9 0 51 3 9 0 0 2820 12 5795 125 546 398 0 21294 41 10 0 49 4 66 0 1363 2636 112 5263 142 503 391 0 20983 43 10 0 47 5 7 0 7 2705 18 5366 117 517 443 0 22920 40 10 0 51 6 38 0 0 2445 9 5001 111 468 421 0 21506 44 9 0 47 7 30 0 14 2358 5 4815 109 453 362 0 21951 42 9 0 49 March 4, 2026 at 01:40:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 4951 109 5890 96 598 257 0 19327 42 10 0 48 1 39 0 2 2638 108 4896 95 529 692 0 21922 47 10 0 43 2 19 0 0 2683 6 5457 118 564 369 0 21778 44 10 0 46 3 27 0 0 2816 10 5798 123 581 536 1 20451 40 9 0 51 4 23 0 1362 2616 115 5228 108 554 366 1 22763 40 10 0 50 5 8 0 72 2408 11 4850 92 453 568 0 20619 40 9 0 50 6 5 0 0 2546 11 5153 80 488 435 0 21894 41 9 0 50 7 9 0 14 2337 10 4702 94 425 639 0 23595 45 9 0 45 March 4, 2026 at 01:40:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 4935 106 5803 115 601 364 0 20767 45 11 0 44 1 14 0 2 3362 115 6338 164 656 410 0 22532 40 11 0 49 2 109 0 0 2866 13 5816 132 611 402 0 22613 41 10 0 49 3 10 0 0 2761 58 5513 139 581 465 0 20261 39 10 0 51 4 87 0 1414 2561 111 5129 109 522 379 0 21743 43 10 0 47 5 56 0 7 2557 8 5065 107 501 423 0 22592 41 10 0 49 6 13 0 0 2563 9 5281 108 530 401 0 21035 39 9 0 52 7 72 0 14 2086 5 4181 93 378 437 0 20145 49 8 0 43 March 4, 2026 at 01:40:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 5076 107 6210 112 620 396 0 20954 40 11 0 49 1 2 0 3 2634 118 4903 113 517 554 0 22395 49 10 0 41 2 10 0 0 2581 8 5234 112 556 346 0 21108 42 10 0 49 3 4 0 0 2861 5 5985 108 566 361 0 21411 41 10 0 49 4 7 0 1332 2467 116 4964 95 491 484 0 19600 44 10 0 47 5 8 0 0 2246 8 4489 81 410 522 0 17509 44 8 0 48 6 7 0 0 2741 8 5752 109 472 327 0 18629 41 9 0 51 7 2 0 21 2299 14 4565 82 432 483 0 20174 38 9 0 53 March 4, 2026 at 01:40:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 4845 114 5545 73 596 238 0 19561 40 11 0 49 1 8 0 3 2496 110 4498 80 494 312 0 17490 44 9 0 47 2 4 0 0 2604 11 5174 80 489 438 0 17651 41 9 0 50 3 6 0 0 2143 9 4155 98 410 303 0 17607 48 9 0 44 4 2 0 1334 2422 114 4692 59 429 224 0 17828 41 9 0 51 5 8 0 10 2219 7 4381 79 417 358 0 17685 38 8 0 53 6 7 0 0 1959 9 3895 75 389 446 0 17602 45 8 0 47 7 10 0 21 2462 11 4845 79 439 354 0 17614 36 8 0 56 March 4, 2026 at 01:40:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 4940 107 5734 102 582 322 0 19315 41 10 0 49 1 4 0 17 3261 114 6214 112 599 421 0 23048 43 11 0 46 2 6 0 0 3051 15 6094 106 510 356 0 22525 42 10 0 48 3 9 0 7 2623 9 5156 115 536 427 0 23238 40 10 0 50 4 9 0 1361 2257 110 4407 82 419 460 0 21031 45 10 0 46 5 4 0 0 2384 16 4667 72 388 434 0 20098 43 9 0 48 6 1 0 0 2785 6 5564 124 539 397 0 22333 40 10 0 50 7 7 0 0 2499 14 4947 79 392 341 0 20799 40 9 0 51 March 4, 2026 at 01:40:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 4838 111 5612 112 577 457 0 20493 41 11 0 48 1 7 0 3 2821 105 5268 92 553 360 0 23693 45 10 0 45 2 3 0 0 2799 7 5674 101 550 526 0 24259 42 10 0 48 3 9 0 14 2693 11 5572 108 563 289 0 20164 44 9 0 48 4 6 0 1335 2218 111 4300 86 445 627 0 20220 42 10 0 48 5 2 0 0 2516 12 5102 88 459 327 0 19644 39 9 0 52 6 2 0 0 2574 14 5254 86 492 538 0 20528 37 9 0 54 7 8 0 0 2253 6 4504 88 390 285 0 18319 41 8 0 51 March 4, 2026 at 01:40:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 4527 105 4827 81 528 355 0 18760 45 10 0 45 1 5 0 3 3003 113 5613 97 561 409 0 21971 43 10 0 47 2 2 0 0 2462 10 4985 94 495 356 0 21022 41 9 0 49 3 6 0 14 2676 56 5284 115 504 440 0 21020 42 10 0 48 4 4 0 1313 2457 109 4799 83 481 372 0 18736 44 9 0 47 5 2 0 0 2779 11 5697 80 490 441 0 19552 39 9 0 52 6 4 0 0 2721 17 5455 67 466 326 0 18205 39 9 0 53 7 1 0 0 2473 20 4811 60 396 483 0 19189 38 9 0 53 March 4, 2026 at 01:40:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 81 0 0 3610 106 3079 88 312 551 0 12358 26 7 0 67 1 54 0 9 1909 130 3406 67 331 221 1 14061 25 6 0 69 2 58 0 0 1501 3 3022 98 285 206 0 15229 28 6 0 66 3 153 0 14 1837 4 3793 70 337 215 1 14111 22 6 0 72 4 3 0 787 1485 109 2738 77 281 453 0 12048 25 6 0 69 5 103 0 0 1436 6 2890 68 275 184 1 10150 24 5 0 71 6 7 0 0 1548 5 3178 59 265 175 0 11226 24 5 0 71 7 19 0 0 1444 9 2889 52 245 201 0 12569 23 5 0 72 March 4, 2026 at 01:40:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 110 0 1 0 0 295 0 0 0 100 1 0 0 10 338 159 134 1 2 0 0 279 0 0 0 100 2 0 0 0 18 3 42 1 0 1 0 1442 0 0 0 100 3 0 0 14 12 2 8 0 1 6 0 282 0 0 0 100 4 0 0 17 217 103 13 0 2 0 0 17 1 0 0 99 5 0 0 0 14 2 10 0 1 10 0 316 0 0 0 100 6 0 0 0 12 1 6 0 2 2 0 18 0 0 0 100 7 0 0 0 19 3 14 0 2 0 0 10 0 0 0 100 March 4, 2026 at 01:40:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 103 124 1 2 1 0 294 0 0 0 100 1 0 0 10 333 160 126 0 0 0 0 271 0 0 0 100 2 0 0 0 10 2 34 1 0 0 0 1434 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 23 9 18 0 0 0 0 317 0 0 0 100 6 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 7 0 0 0 19 1 16 0 1 2 0 5 0 0 0 100 March 4, 2026 at 01:40:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 103 110 0 0 0 0 294 0 0 0 100 1 0 0 11 335 159 134 0 1 0 0 269 0 0 0 100 2 0 0 0 9 2 34 0 0 0 0 1434 0 0 0 100 3 0 0 14 10 3 6 1 0 0 0 267 0 0 0 100 4 0 0 2 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 14 4 10 0 0 0 0 302 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 15 3 10 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:40:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 6 2222 103 321 1 18 57 2 325 0 1 0 99 1 8 0 29 353 137 200 3 23 76 4 310 0 1 0 99 2 33 0 21 54 3 113 2 18 43 4 1462 0 1 0 99 3 12 0 23 153 79 145 0 27 74 4 320 0 0 0 99 4 286 0 6 261 102 89 6 21 54 2 109 0 0 0 100 5 6 0 1 80 5 135 1 24 50 7 364 0 0 0 100 6 2 0 0 60 0 103 1 16 67 1 21 0 0 0 100 7 19 0 2 69 2 110 2 14 54 3 25 0 0 0 100 March 4, 2026 at 01:40:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 110 0 0 0 0 294 0 0 0 100 1 0 0 11 224 103 16 1 1 0 0 259 0 0 0 100 2 0 0 0 21 2 49 1 4 1 0 1380 0 0 0 100 3 0 0 21 109 52 106 0 1 0 0 266 0 0 0 100 4 0 0 2 213 103 4 0 0 0 0 1 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 15 2 8 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:40:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 116 1 1 0 0 294 0 0 0 100 1 0 0 11 213 103 4 0 0 0 0 259 0 0 0 100 2 0 0 7 14 2 39 1 0 0 0 1374 0 0 0 100 3 0 0 14 118 53 118 0 2 1 0 266 0 0 0 100 4 0 0 2 209 102 2 0 1 0 0 0 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 13 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:40:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 118 0 0 0 0 294 0 0 0 100 1 0 0 10 211 103 4 0 0 0 0 259 0 0 0 100 2 0 0 7 16 2 46 0 1 1 0 1386 0 0 0 100 3 0 0 14 110 52 106 0 1 0 0 271 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 1 0 0 0 100 5 0 0 0 26 10 16 0 0 0 0 308 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 5 0 0 0 100 7 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 116 0 0 0 0 294 0 0 0 100 1 0 0 10 213 103 8 0 0 0 0 277 0 0 0 100 2 0 0 0 14 3 40 1 0 1 0 1382 0 0 0 100 3 0 0 14 110 52 106 1 1 1 0 266 0 0 0 100 4 0 0 3 217 103 16 0 2 0 0 1 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2796 0 8 2805 104 1315 59 252 117 11 6158 12 4 0 85 1 895 0 15 919 104 1245 41 245 118 7 6899 10 3 0 87 2 477 0 0 678 4 1156 33 199 160 8 6392 7 2 0 90 3 580 0 0 785 100 1244 39 234 157 3 6739 11 3 0 87 4 2550 0 512 776 108 1189 34 254 155 4 5835 8 3 0 89 5 723 0 0 632 9 1095 23 181 164 10 4853 6 2 0 92 6 473 0 0 645 7 1177 26 227 150 4 6970 8 2 0 90 7 617 0 14 527 3 923 19 174 126 3 4884 9 2 0 90 March 4, 2026 at 01:40:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 234 0 0 3708 114 2730 58 511 140 0 13936 22 7 0 71 1 485 0 10 1821 113 2875 75 567 286 0 16864 29 7 0 65 2 323 0 0 1541 4 2511 69 431 272 0 15522 26 6 0 68 3 513 0 0 1562 3 2745 85 523 241 0 17061 23 6 0 71 4 316 0 1417 1515 111 2591 63 519 113 0 13929 21 6 0 73 5 186 0 0 1271 5 2038 43 366 302 0 13798 20 5 0 75 6 284 0 0 1370 14 2350 60 469 287 0 14782 20 5 0 75 7 270 0 14 1199 9 2004 41 344 218 0 12357 16 4 0 79 March 4, 2026 at 01:40:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 164 0 87 3757 106 2878 79 566 222 0 15990 25 7 0 68 1 87 0 3 1956 108 3100 92 601 237 0 17130 26 6 0 68 2 195 0 7 1627 5 2643 71 466 286 0 14961 26 5 0 68 3 183 0 0 1641 15 2865 82 567 188 0 17761 23 6 0 72 4 207 0 1416 1538 127 2519 57 553 221 0 15531 21 6 0 73 5 12 0 0 1341 6 2171 37 396 180 0 14995 19 5 0 77 6 92 0 0 1484 6 2615 56 526 260 0 16639 22 5 0 73 7 120 0 14 1239 10 2033 32 355 192 0 14139 18 4 0 78 March 4, 2026 at 01:40:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 14 3895 109 3065 68 601 220 0 16680 26 7 0 67 1 75 0 3 1998 110 3199 89 641 264 0 17951 26 6 0 68 2 1 0 7 1567 11 2593 41 485 263 0 16113 22 5 0 73 3 3 0 0 1768 11 3155 101 656 164 0 19028 26 6 0 68 4 6 0 1418 1634 115 2776 47 565 214 0 15723 23 6 0 71 5 6 0 0 1442 19 2395 38 435 248 0 14846 21 5 0 74 6 150 0 0 1579 6 2875 71 552 298 0 17899 24 5 0 71 7 4 0 0 1246 10 2101 23 373 107 0 13834 16 4 0 80 March 4, 2026 at 01:40:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 4011 116 3348 82 661 223 0 16149 24 7 0 69 1 0 0 4 2085 105 3350 101 714 345 0 19539 25 6 0 69 2 0 0 14 1729 6 2961 39 561 322 0 17204 23 6 0 71 3 32 0 7 1844 15 3295 91 696 372 0 19621 28 6 0 66 4 2 0 1416 1620 113 2824 57 648 212 0 17966 24 6 0 70 5 0 0 0 1502 6 2595 49 460 333 0 15176 20 5 0 75 6 3 0 0 1594 18 2904 66 598 337 0 19253 22 5 0 72 7 0 0 0 1254 14 2084 50 401 374 0 14295 20 4 0 76 March 4, 2026 at 01:40:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 3 4355 108 3959 83 866 255 0 18469 27 8 0 65 1 5 0 3 2516 113 4048 97 856 430 0 23327 27 8 0 65 2 3 0 134 2001 13 3418 54 660 316 0 18966 22 6 0 72 3 4 0 0 2219 69 3974 107 816 409 0 24739 28 7 0 65 4 7 0 1429 2068 112 3690 75 804 223 0 18764 24 7 0 69 5 5 0 0 1765 9 3060 57 583 376 0 18840 21 6 0 74 6 6 0 0 1956 7 3634 96 799 342 0 21195 25 6 0 69 7 5 0 0 1612 13 2815 60 521 367 0 16829 20 5 0 75 March 4, 2026 at 01:40:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 107 0 0 2697 101 1179 34 204 90 0 4709 6 2 0 92 1 76 0 3 824 102 1221 25 248 137 0 5940 6 2 0 92 2 26 0 14 549 8 1010 23 176 62 0 5146 6 2 0 93 3 12 0 0 565 4 1058 23 205 107 0 6084 6 2 0 93 4 1 0 332 692 109 985 15 187 73 0 5620 5 2 0 93 5 3 0 0 448 5 820 15 135 132 0 5934 5 2 0 93 6 12 0 0 606 43 1078 16 187 43 0 5328 5 2 0 93 7 28 0 0 456 6 797 5 135 39 1 4195 5 1 0 94 March 4, 2026 at 01:40:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 100 0 0 0 0 0 0 0 0 100 1 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 2 0 0 14 18 7 14 1 0 0 0 275 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 10 212 105 6 0 0 0 0 560 0 0 0 100 5 0 0 0 18 5 42 1 0 1 0 1134 0 0 0 100 6 0 0 0 109 51 104 0 1 0 0 294 0 0 0 100 7 0 0 0 15 0 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:40:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 110 0 1 0 0 0 0 0 0 100 1 0 0 3 214 103 6 0 0 0 0 22 0 0 0 100 2 0 0 14 21 8 20 0 0 0 0 281 0 0 0 100 3 0 0 0 11 2 6 0 1 0 0 300 0 0 0 100 4 0 0 10 230 108 32 1 1 0 0 573 0 0 0 100 5 0 0 0 32 13 50 1 1 0 0 1140 0 0 0 100 6 0 0 0 110 51 104 1 0 0 0 294 0 0 0 100 7 0 0 0 19 1 16 0 1 1 0 2 0 0 0 100 March 4, 2026 at 01:40:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 1 0 0 0 0 0 0 100 1 0 0 3 214 103 8 0 0 0 0 4 0 0 0 100 2 0 0 14 17 7 14 0 0 0 0 272 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 10 218 106 12 0 1 0 0 562 0 0 0 100 5 0 0 0 22 5 56 0 1 0 0 1133 0 0 0 100 6 0 0 0 110 51 106 0 0 0 0 297 0 0 0 100 7 0 0 0 11 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 8 2158 100 180 2 17 45 7 39 0 1 0 99 1 1 0 3 366 140 213 1 15 63 3 30 0 0 0 100 2 11 0 25 74 6 121 0 16 49 5 306 0 0 0 100 3 9 0 5 111 57 186 0 20 39 0 355 0 0 0 100 4 280 0 14 286 107 118 1 23 73 1 671 0 0 0 99 5 25 0 0 86 9 138 2 19 47 4 1155 0 0 0 99 6 8 0 28 86 13 134 1 17 49 5 331 0 0 0 99 7 10 0 9 46 3 58 0 12 28 3 41 0 0 0 100 March 4, 2026 at 01:40:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 0 0 100 1 0 0 3 312 151 104 0 1 0 0 0 0 0 0 100 2 0 0 14 8 1 2 1 0 0 0 265 0 0 0 100 3 0 0 0 12 2 4 0 0 0 0 300 0 0 0 100 4 0 0 10 213 105 6 0 0 0 0 559 0 0 0 100 5 0 0 0 20 5 44 1 0 0 0 1078 0 0 0 100 6 0 0 0 19 1 19 0 2 0 0 294 0 0 0 100 7 0 0 7 10 0 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:40:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 1 0 0 0 0 0 0 100 1 0 0 3 310 151 102 0 0 0 0 0 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 4 0 0 10 214 105 6 1 0 0 0 559 0 0 0 100 5 0 0 0 18 5 42 1 0 0 0 1075 0 0 0 100 6 0 0 7 14 1 9 1 0 2 0 294 0 0 0 100 7 0 0 0 18 1 16 0 1 1 0 2 0 0 0 100 March 4, 2026 at 01:40:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 230 111 20 0 0 0 0 0 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 4 0 0 10 222 107 16 0 0 0 0 565 0 0 0 100 5 0 0 0 27 11 48 0 1 1 0 1090 0 1 0 99 6 0 0 7 94 41 92 0 3 0 0 297 0 0 0 100 7 0 0 0 12 0 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:40:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 122 0 1 2 0 1 0 0 0 100 1 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 267 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 4 0 0 10 214 106 8 0 0 0 0 561 0 0 0 100 5 0 0 0 17 5 42 1 0 0 0 1075 0 0 0 99 6 0 0 0 111 52 106 0 0 0 0 294 0 0 0 100 7 0 0 0 11 1 4 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:40:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2816 0 8 2577 101 966 45 191 142 17 3975 6 3 0 91 1 411 0 4 736 132 979 45 198 96 11 4560 5 2 0 93 2 313 0 14 481 1 899 29 153 88 6 4035 4 2 0 94 3 210 0 0 576 62 1059 35 188 84 6 4491 4 2 0 94 4 2433 0 207 592 107 829 41 186 159 6 5039 5 2 0 93 5 694 0 0 415 9 767 17 137 91 7 4879 4 2 0 94 6 405 0 0 468 18 891 36 187 95 5 4619 4 2 0 95 7 136 0 0 365 2 728 20 125 54 1 3586 4 1 0 95 March 4, 2026 at 01:40:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 49 0 4 319 156 114 0 1 0 0 9 0 0 0 100 2 0 0 14 7 1 2 0 0 0 0 266 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 4 0 0 9 221 107 12 1 0 0 0 566 0 0 0 100 5 0 0 0 17 4 40 1 0 0 0 1136 0 0 0 99 6 0 0 0 12 2 6 1 0 0 0 294 0 0 0 100 7 0 0 0 13 2 6 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:40:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 0 0 3 323 157 116 0 0 0 0 9 0 0 0 100 2 0 0 14 10 1 12 0 1 1 0 266 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 10 212 105 6 0 0 0 0 559 0 0 0 100 5 0 0 0 15 4 40 1 0 0 0 1131 0 0 0 99 6 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 114 0 1 0 0 3 0 0 0 100 1 0 0 3 321 157 114 0 0 0 0 9 0 0 0 100 2 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 3 0 0 0 14 2 14 0 1 1 0 300 0 0 0 100 4 0 0 10 228 110 28 0 0 0 0 578 0 0 0 100 5 0 0 0 23 12 42 0 0 2 0 1132 0 0 0 99 6 0 0 0 13 2 10 0 1 0 0 300 0 0 0 100 7 0 0 0 18 2 16 0 2 0 0 8 0 0 0 100 March 4, 2026 at 01:40:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 21 2114 100 134 1 6 4 3 46 0 1 0 99 1 3 0 9 263 117 61 0 4 2 3 65 0 0 0 100 2 12 0 16 20 1 32 2 8 0 8 310 0 0 0 100 3 11 0 2 100 41 108 2 8 3 4 340 0 0 0 100 4 284 0 17 236 107 31 1 6 11 0 677 0 1 0 99 5 5 0 0 38 7 59 1 7 3 3 1169 0 0 0 99 6 6 0 0 22 2 23 0 5 6 3 328 0 0 0 100 7 19 0 6 20 1 20 1 5 1 2 21 0 0 0 100 March 4, 2026 at 01:40:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 115 0 0 1 0 0 0 1 0 99 1 0 0 14 215 102 8 0 1 2 0 0 0 0 0 100 2 0 0 14 14 3 6 0 0 2 0 267 0 0 0 100 3 0 0 0 116 53 110 0 1 3 0 300 0 0 0 100 4 0 0 14 224 105 18 1 1 1 0 559 0 0 0 100 5 0 0 0 19 5 40 1 0 2 0 1079 0 0 0 100 6 0 0 0 19 3 12 1 1 1 0 294 0 0 0 100 7 0 0 0 15 2 4 0 0 3 0 2 0 0 0 100 March 4, 2026 at 01:40:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 100 111 0 0 0 0 0 0 0 0 100 1 0 0 3 213 101 4 0 0 0 0 0 0 0 0 100 2 0 0 14 7 1 4 0 1 0 0 266 0 0 0 100 3 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 4 0 0 10 217 105 10 0 1 0 0 559 0 0 0 100 5 0 0 0 23 4 52 1 2 0 0 1074 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 294 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:40:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 3 210 101 2 0 0 0 0 0 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 4 0 0 10 213 105 6 0 0 0 0 559 0 0 0 100 5 0 0 0 16 4 40 1 0 0 0 1075 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 294 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:40:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 215 104 6 0 0 0 0 2 0 0 0 100 2 0 0 14 8 1 6 1 1 0 0 274 0 0 0 100 3 0 0 0 114 52 110 0 1 0 0 306 0 0 0 100 4 0 0 10 218 105 18 0 0 0 0 570 0 0 0 100 5 0 0 0 23 10 42 1 0 0 0 1074 0 0 0 100 6 0 0 0 16 2 16 0 1 0 0 294 0 0 0 100 7 0 0 0 11 0 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:40:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 396 0 0 3461 111 2541 42 277 219 15 5636 15 5 0 80 1 285 0 3 1514 104 2320 38 241 137 7 5386 15 4 0 81 2 276 0 0 1147 4 1966 22 185 138 4 4516 11 3 0 85 3 178 0 14 1215 36 2073 33 189 222 4 5269 13 4 0 83 4 2525 0 753 1065 112 1619 20 170 222 15 4690 10 9 0 81 5 848 0 8 909 20 1518 12 116 186 21 4941 9 3 0 88 6 497 0 2 1014 6 1814 25 166 137 24 4575 11 4 0 85 7 254 0 45 878 3 1537 18 111 256 19 4412 9 3 0 88 March 4, 2026 at 01:40:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 89 0 0 4512 115 4262 82 463 238 0 9309 25 8 0 67 1 86 0 3 2621 121 4229 90 459 250 0 9174 25 7 0 68 2 56 0 0 2073 11 3509 53 317 310 0 8035 24 6 0 70 3 37 0 14 2378 81 4125 84 376 361 0 9203 28 6 0 66 4 66 0 1417 1956 114 3369 61 334 313 0 8071 21 6 0 72 5 24 0 0 1652 13 2789 32 234 266 0 8320 16 5 0 79 6 79 0 7 2068 10 3671 50 306 294 0 9031 23 6 0 71 7 20 0 0 1615 14 2770 31 238 322 0 7020 17 4 0 78 March 4, 2026 at 01:40:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 4448 117 4104 88 431 293 0 9436 27 8 0 65 1 29 0 3 2617 120 4224 81 452 263 0 8955 28 7 0 65 2 17 0 0 2095 13 3483 67 343 307 0 8254 21 6 0 73 3 18 0 0 2231 21 3896 81 373 291 0 9048 24 6 0 70 4 30 0 1424 1837 117 3065 52 304 265 0 8047 20 6 0 74 5 17 0 0 1688 27 2813 31 228 247 0 8671 17 5 0 78 6 26 0 14 2060 23 3623 62 290 314 0 8939 24 6 0 70 7 33 0 0 1693 23 2850 37 176 257 0 6885 18 4 0 77 March 4, 2026 at 01:41:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 286 0 1 2828 110 1279 42 166 104 9 2941 9 3 0 88 1 2607 0 19 1091 147 1497 37 165 59 12 3316 9 3 0 88 2 217 0 11 681 8 1124 27 123 55 18 2485 6 2 0 93 3 284 0 13 707 14 1221 21 124 99 12 2911 6 2 0 92 4 2601 0 444 764 115 1057 25 119 164 11 3244 8 3 0 89 5 1208 0 17 534 41 850 11 93 100 16 3860 5 2 0 93 6 229 0 22 676 10 1166 20 126 82 16 3653 7 2 0 91 7 305 0 23 459 5 806 18 81 78 19 2080 6 1 0 93 March 4, 2026 at 01:41:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 106 0 0 0 0 0 0 0 0 100 1 0 0 3 313 152 104 0 1 0 0 21 0 0 0 100 2 42 0 0 28 6 22 0 0 0 0 8 0 0 0 100 3 0 0 7 9 1 4 0 1 0 0 0 0 0 0 100 4 0 0 10 217 105 16 1 0 0 0 318 0 0 0 100 5 0 0 0 28 11 44 1 1 0 0 1438 0 0 0 100 6 0 0 14 23 7 18 1 0 0 0 869 0 0 0 100 7 0 0 0 15 0 14 0 3 0 0 8 0 0 0 100 March 4, 2026 at 01:41:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 100 104 0 0 0 0 0 0 0 0 100 1 0 0 3 313 151 108 0 1 0 0 18 0 0 0 100 2 0 0 0 35 7 36 0 1 0 0 17 0 0 0 100 3 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 4 0 0 10 214 105 8 0 1 0 0 261 0 0 0 100 5 4 0 0 19 4 40 2 0 0 0 1433 0 0 0 100 6 0 0 14 12 4 8 0 0 0 0 859 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 100 202 0 14 51 0 0 0 1 0 99 1 0 0 7 285 114 122 0 10 54 0 0 0 0 0 100 2 0 0 0 148 45 180 0 12 62 0 9 0 0 0 100 3 0 0 0 126 64 230 0 20 78 0 0 0 0 0 100 4 0 0 23 268 104 113 0 18 69 0 260 0 0 0 100 5 0 0 7 74 5 124 1 14 40 0 1431 0 0 0 99 6 0 0 14 60 6 94 0 13 51 0 862 0 0 0 100 7 0 0 0 36 1 49 0 10 45 0 0 0 0 0 100 March 4, 2026 at 01:41:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 758 0 16 2189 101 242 7 38 14 7 471 1 1 0 98 1 74 0 6 316 102 163 2 27 9 7 395 1 0 0 99 2 132 0 0 209 56 278 3 22 7 8 312 0 0 0 99 3 106 0 3 102 1 186 10 34 43 11 566 0 1 0 99 4 5056 0 81 278 105 123 4 29 78 9 1195 2 2 0 96 5 1317 0 8 144 42 179 3 22 49 16 1990 1 1 0 98 6 357 0 16 96 6 170 5 24 13 9 1401 0 0 0 99 7 229 0 0 50 0 72 2 13 6 4 270 1 0 0 99 March 4, 2026 at 01:41:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 109 0 1 0 0 0 0 0 0 100 1 0 0 3 211 101 2 0 0 0 0 0 0 0 0 100 2 0 0 0 114 51 106 0 0 0 0 0 0 0 0 100 3 0 0 0 10 1 4 0 1 2 0 0 0 0 0 100 4 0 0 10 219 104 16 1 1 1 0 263 0 0 0 100 5 42 0 7 25 9 50 1 1 0 0 1445 0 0 0 100 6 0 0 14 15 5 10 1 0 0 0 863 0 0 0 100 7 0 0 0 13 1 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 101 119 0 0 0 0 1 0 1 0 99 1 0 0 3 213 102 0 0 0 0 0 0 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 10 1 6 0 0 0 0 8 0 0 0 100 4 0 0 10 217 104 16 0 0 1 0 270 0 0 0 100 5 0 0 0 38 15 60 1 2 0 0 1440 0 0 0 99 6 0 0 14 21 6 18 0 1 0 0 867 0 0 0 100 7 0 0 0 12 0 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 101 114 0 0 0 0 1 0 0 0 100 1 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 1 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 4 0 0 10 211 104 4 0 0 0 0 260 0 0 0 100 5 0 0 0 27 9 50 1 0 0 0 1439 0 0 0 100 6 0 0 14 16 6 12 0 0 0 0 862 0 0 0 100 7 0 0 0 10 0 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3924 0 10 2379 100 543 10 83 200 38 1513 1 2 0 96 1 2389 0 22 534 118 558 11 90 112 43 1207 2 2 0 96 2 3094 0 17 311 27 509 4 75 102 39 1244 2 2 0 96 3 26599 0 36 317 64 435 17 72 118 46 1654 11 25 0 64 4 1408 0 21 473 110 503 6 90 111 43 1438 1 1 0 98 5 156 0 15 252 45 412 7 62 131 44 2022 0 2 0 98 6 1008 0 31 311 5 599 6 85 104 47 1865 2 2 0 96 7 3486 0 118 201 3 446 4 77 133 54 1222 1 2 0 96 March 4, 2026 at 01:41:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 110 0 0 0 0 0 0 0 0 100 1 65 0 3 227 108 12 0 0 0 0 11 0 0 0 100 2 0 0 0 12 1 2 0 0 0 0 0 0 0 0 100 3 0 0 28 14 1 4 0 0 2 0 0 0 0 0 100 4 0 0 17 228 108 16 1 2 3 0 261 0 0 0 100 5 0 0 0 18 4 38 0 0 0 0 1351 0 0 0 100 6 0 0 14 24 5 14 1 0 0 0 863 0 0 0 100 7 0 0 0 118 50 116 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 100 110 0 0 0 0 0 0 0 0 100 1 0 0 3 240 108 14 0 0 0 0 17 0 0 0 100 2 0 0 0 26 1 2 0 0 0 0 0 0 0 0 100 3 0 0 14 24 0 3 0 1 2 0 0 0 0 0 100 4 0 0 129 220 105 12 0 0 2 0 263 0 0 0 100 5 0 0 0 34 4 40 1 1 0 0 1342 0 0 0 100 6 0 0 14 30 4 8 0 0 0 0 859 0 0 0 100 7 0 0 0 129 50 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 100 124 0 1 0 0 0 0 0 0 100 1 0 0 3 231 105 8 0 0 0 0 8 0 0 0 100 2 0 0 0 23 1 2 0 0 0 0 0 0 0 0 100 3 0 0 112 8 0 5 0 0 0 0 1 0 0 0 100 4 0 0 10 240 108 18 0 0 0 0 268 0 0 0 100 5 0 0 0 40 11 44 1 1 1 0 1350 0 0 0 100 6 0 0 14 32 5 18 0 1 0 0 872 0 0 0 100 7 0 0 0 130 50 112 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:41:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2134 100 141 0 9 6 2 87 0 0 0 99 1 5 0 3 251 107 38 0 5 3 1 50 0 0 0 100 2 2678 0 115 25 1 46 2 2 3 15 396 0 1 0 99 3 112 0 7 52 0 84 0 11 16 14 191 0 0 0 100 4 50 0 10 258 106 81 0 13 11 7 394 0 0 0 100 5 659 0 0 51 4 88 3 10 9 7 1569 1 1 0 98 6 14 0 14 46 5 46 1 7 4 3 967 0 0 0 100 7 14 0 0 132 50 116 0 4 2 1 43 0 0 0 100 March 4, 2026 at 01:41:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 114 0 0 2 0 0 0 0 0 100 1 3 0 3 223 108 19 0 1 3 0 15 0 0 0 100 2 0 0 0 14 3 8 1 0 1 0 4 0 0 0 100 3 5 0 0 10 1 6 0 0 1 0 7 0 0 0 100 4 0 0 10 219 106 14 1 1 3 0 265 0 0 0 100 5 0 0 0 18 5 40 1 0 1 0 1429 0 0 0 100 6 0 0 14 16 6 10 1 0 1 0 862 0 0 0 100 7 0 0 0 113 51 112 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:41:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 3 223 107 16 0 1 1 0 9 0 0 0 100 2 0 0 0 13 1 12 0 1 1 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 20 0 10 214 106 8 0 0 0 0 265 0 0 0 100 5 20 0 0 15 4 42 1 1 2 0 1429 0 0 0 100 6 0 0 14 11 4 8 0 0 0 0 860 0 0 0 100 7 0 0 0 108 50 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 3 217 106 10 0 0 0 0 8 0 0 0 100 2 0 0 0 9 1 4 0 0 1 0 0 0 0 0 100 3 0 0 0 10 0 10 0 1 1 0 0 0 0 0 100 4 0 0 10 212 105 6 0 0 0 0 260 0 0 0 100 5 0 0 0 14 4 38 1 0 0 0 1421 0 0 0 100 6 0 0 14 13 5 10 0 0 0 0 862 0 0 0 100 7 0 0 0 108 50 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 217 106 10 0 0 0 0 5 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 10 219 105 14 0 0 0 0 265 0 0 0 100 5 0 0 0 23 10 42 0 0 2 0 1428 0 0 0 100 6 0 0 14 21 6 22 1 0 0 0 875 0 0 0 100 7 0 0 0 111 50 108 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 3 219 107 12 0 0 0 0 9 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 9 1 4 0 0 1 0 1 0 0 0 100 4 0 0 10 217 105 16 1 1 1 0 260 0 0 0 100 5 0 0 0 16 5 40 1 0 0 0 1422 0 0 0 100 6 0 0 14 14 5 10 1 0 0 0 862 0 0 0 100 7 0 0 0 108 50 104 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 161 0 0 2212 101 314 6 24 11 1 552 1 1 0 99 1 270 0 3 318 109 216 7 26 5 0 599 1 1 0 98 2 231 0 0 74 1 133 2 10 10 2 266 0 0 0 99 3 177 0 0 83 2 148 2 20 4 0 511 1 0 0 99 4 32 0 24 290 106 150 0 16 8 0 584 0 0 0 99 5 24 0 0 114 38 168 1 13 5 0 1624 0 0 0 99 6 389 0 14 95 8 169 0 12 11 1 1472 1 1 0 98 7 88 0 0 129 46 142 0 4 5 2 91 0 0 0 99 March 4, 2026 at 01:41:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 90 0 3 0 0 0 0 0 0 100 1 8 0 3 216 103 4 0 0 1 0 11 0 0 0 100 2 34 0 0 17 3 16 0 3 2 0 25 0 0 0 100 3 0 0 0 13 2 8 0 2 0 0 13 0 0 0 100 4 1 0 24 250 109 206 0 4 1 0 601 0 0 0 100 5 0 0 0 26 7 50 1 0 2 0 1443 0 0 0 100 6 5 0 14 120 56 114 0 1 0 0 902 0 0 0 100 7 10 0 0 17 1 10 0 1 0 0 19 0 0 0 100 March 4, 2026 at 01:41:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 1 0 0 0 0 0 0 100 1 0 0 3 208 101 2 0 0 0 0 1 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 4 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 1 0 0 0 100 4 0 0 10 220 105 14 0 0 0 0 261 0 0 0 100 5 0 0 0 25 8 50 0 0 1 0 1439 0 0 0 99 6 0 0 14 117 54 118 1 1 1 0 861 0 0 0 100 7 0 0 0 9 0 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 210 102 4 0 1 0 0 24 0 0 0 100 2 0 0 0 8 1 4 0 1 0 0 5 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 10 224 108 18 1 0 0 0 268 0 0 0 100 5 0 0 0 39 16 62 1 0 0 0 1461 0 0 0 99 6 0 0 14 116 55 112 1 1 0 0 862 0 0 0 100 7 0 0 0 16 0 18 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 145 0 28 2330 100 489 3 102 50 54 2221 1 2 0 98 1 52 0 7 397 101 327 3 78 68 58 2726 1 1 0 98 2 5767 0 245 209 1 462 4 97 70 84 2821 2 3 0 96 3 198 0 22 234 1 431 0 90 81 82 2955 1 1 0 98 4 72 0 15 446 106 506 2 106 56 66 2719 1 1 0 98 5 107 0 1 223 16 411 2 85 54 64 3949 1 1 0 98 6 33 0 25 319 52 535 2 103 27 54 2841 1 1 0 99 7 77 0 16 201 3 374 1 97 30 64 1779 1 1 0 99 March 4, 2026 at 01:41:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 90 2241 100 343 2 61 143 24 537 0 2 0 97 1 67 0 5 362 103 267 2 58 104 15 407 0 1 0 99 2 4221 0 8 151 3 241 2 54 133 31 1141 2 2 0 96 3 848 0 118 214 70 270 2 56 106 31 628 0 1 0 98 4 93 0 19 490 155 411 1 50 935 19 739 0 1 0 99 5 188 0 17 149 10 275 1 34 1387 28 1965 0 1 0 98 6 28 0 35 224 6 412 1 59 91 20 1436 0 1 0 99 7 17 0 11 131 1 229 0 38 1267 16 379 0 1 0 99 March 4, 2026 at 01:41:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 49 2215 102 122 0 4 4 2 31 0 2 0 98 1 7 0 696 244 101 44 2 6 2 1 32 0 1 0 99 2 5 0 0 122 1 14 0 3 8 1 9 0 0 0 100 3 5 0 0 120 1 12 0 1 4 1 8 0 0 0 100 4 3 0 9 425 156 121 0 2 2 1 271 0 0 0 100 5 25 0 0 126 3 52 1 3 3 4 1083 0 0 0 99 6 8 0 14 125 4 24 1 2 3 3 872 0 0 0 100 7 5 0 0 121 0 18 0 2 1 4 9 0 0 0 100 March 4, 2026 at 01:41:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 101 108 0 2 0 0 0 0 1 0 99 1 0 0 4 216 101 4 0 0 0 0 0 0 0 0 100 2 0 0 0 12 1 6 0 1 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 9 315 155 106 1 0 0 0 259 0 0 0 100 5 0 0 0 14 3 36 1 0 0 0 1063 0 0 0 100 6 0 0 14 16 5 10 1 0 0 0 861 0 0 0 100 7 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 209 101 2 0 1 0 0 0 0 0 0 100 2 0 0 0 14 1 14 0 1 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 10 320 157 116 0 0 0 0 266 0 0 0 100 5 0 0 0 24 9 48 0 2 1 0 1078 0 0 0 100 6 0 0 14 12 4 10 0 1 0 0 866 0 0 0 100 7 0 0 0 12 0 10 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:41:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 0 0 0 0 0 0 0 100 1 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 3 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 4 0 0 10 312 155 106 0 0 0 0 259 0 0 0 100 5 0 0 0 12 3 36 1 0 0 0 1063 0 0 0 100 6 0 0 14 13 5 10 0 0 0 0 861 0 0 0 100 7 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5039 0 482 2716 131 936 13 190 1253 91 6974 2 8 0 90 1 7650 0 378 818 101 804 13 206 1883 107 14915 5 10 0 85 2 3262 0 138 534 2 793 15 161 1151 119 1193 1 5 0 94 3 652 0 32 578 88 721 4 176 1422 87 3102 1 5 0 94 4 8351 0 28 862 110 808 9 187 1976 72 8445 4 7 0 89 5 4668 0 22 511 11 821 9 161 1159 80 2950 1 5 0 94 6 9100 0 490 574 11 923 14 173 1914 95 12653 5 9 0 87 7 4825 0 361 559 7 697 6 154 1508 72 7567 3 7 0 90 March 4, 2026 at 01:41:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2181 100 147 0 35 465 0 0 0 1 0 99 1 0 0 3 435 145 367 0 46 509 0 0 0 1 0 99 2 0 0 42 94 1 179 0 30 570 0 0 0 1 0 99 3 0 0 0 192 91 199 0 45 581 0 0 0 1 0 99 4 0 0 17 351 107 287 1 52 496 0 261 0 1 0 99 5 0 0 0 97 2 202 1 45 510 0 1137 0 1 0 99 6 0 0 14 206 11 283 1 37 456 0 1161 0 1 0 99 7 0 0 0 96 0 183 0 33 372 0 0 0 1 0 99 March 4, 2026 at 01:41:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 100 2 0 1 0 0 0 0 1 0 99 1 0 0 451 314 151 102 0 0 1 0 0 0 0 0 100 2 0 0 28 84 1 16 0 0 1 0 0 0 1 0 99 3 0 0 0 75 1 2 0 0 0 0 0 0 0 0 100 4 0 0 10 286 106 12 0 0 0 0 259 0 0 0 100 5 0 0 0 84 2 48 0 2 0 0 1137 0 0 0 100 6 0 0 14 179 4 108 0 0 0 0 1160 0 0 0 100 7 0 0 0 76 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 77 1 3 0 0 0 0 0 0 100 1 0 0 3 308 151 100 0 0 0 0 0 0 0 0 100 2 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 10 217 107 12 0 0 0 0 260 0 0 0 100 5 0 0 0 19 8 40 1 0 0 0 1146 0 0 0 100 6 0 0 14 47 6 44 0 0 0 0 1169 0 0 0 100 7 0 0 0 14 0 15 0 2 0 0 10 0 0 0 100 March 4, 2026 at 01:41:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 3 309 151 104 0 0 0 0 18 0 0 0 100 2 0 0 0 21 2 18 0 0 0 0 9 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 10 216 107 10 0 0 0 0 260 0 0 0 100 5 0 0 0 15 3 38 1 0 1 0 1139 0 0 0 100 6 0 0 14 17 4 18 1 1 0 0 1160 0 0 0 100 7 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:41:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 705 0 13 2502 100 809 10 146 1453 39 3568 7 6 0 87 1 4349 0 36 851 137 1274 12 178 1448 25 3765 8 6 0 85 2 875 0 8 772 14 1571 8 202 1286 14 3817 4 4 0 91 3 1626 0 14 431 93 650 12 126 1480 24 4161 8 6 0 86 4 609 0 174 669 106 1032 9 173 1465 25 3711 5 5 0 90 5 11193 0 7 417 14 818 9 119 1547 43 6419 11 8 0 81 6 826 0 23 693 9 1530 13 218 1439 44 5964 4 5 0 91 7 321 0 5 535 3 1121 2 161 1576 35 3219 4 4 0 91 March 4, 2026 at 01:41:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2161 100 177 0 31 333 0 0 0 1 0 99 1 0 0 3 279 101 147 0 30 364 0 0 0 0 0 100 2 0 0 0 181 51 247 0 20 400 1 0 0 0 0 100 3 0 0 0 163 85 149 0 30 371 0 0 0 1 0 99 4 0 0 17 411 106 360 0 42 309 0 263 0 1 0 99 5 53 0 0 79 7 136 0 25 299 0 9 0 0 0 100 6 0 0 14 77 5 179 0 28 298 0 2295 0 1 0 99 7 0 0 0 63 0 120 0 26 305 0 0 0 0 0 100 March 4, 2026 at 01:41:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 100 110 1 1 0 0 0 0 0 0 100 1 0 0 3 223 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 125 51 104 0 1 0 0 0 0 0 0 100 3 0 0 0 23 1 2 0 0 0 0 0 0 0 0 100 4 0 0 122 218 106 13 0 1 0 0 260 0 0 0 100 5 0 0 0 37 7 16 0 1 0 0 9 0 0 0 100 6 0 0 14 36 8 46 1 0 0 0 2291 0 0 0 99 7 0 0 0 26 0 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:41:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 213 101 10 0 1 0 0 0 0 0 0 100 2 0 0 0 110 51 104 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 17 219 106 14 0 0 0 0 260 0 0 0 100 5 0 0 0 29 12 18 0 0 0 0 17 0 0 0 100 6 0 0 14 23 6 52 2 0 0 0 2299 0 0 0 99 7 0 0 0 18 2 16 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:41:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 0 2378 101 627 5 19 12 0 1364 3 1 0 96 1 52 0 3 488 102 542 6 34 18 0 1591 2 1 0 97 2 4 0 0 413 30 748 6 17 4 0 867 2 1 0 97 3 8 0 0 314 2 609 7 31 26 0 1940 3 1 0 96 4 34 0 136 336 126 197 5 8 26 0 2031 3 1 0 96 5 15 0 0 315 7 594 2 10 18 0 1377 3 1 0 96 6 28 0 14 73 7 111 5 8 28 0 5351 5 2 0 92 7 14 0 0 138 0 233 4 9 11 0 1456 2 1 0 97 March 4, 2026 at 01:41:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2203 101 333 0 58 1229 1 0 0 2 0 98 1 0 0 4 305 102 238 0 66 1094 0 0 0 2 0 98 2 0 0 0 106 1 239 0 69 958 0 0 0 2 0 98 3 0 0 0 209 104 238 0 59 1088 0 9 0 2 0 98 4 0 0 9 415 156 342 0 54 1353 0 260 0 2 0 98 5 0 0 0 91 2 190 0 54 974 0 0 0 2 0 98 6 0 0 14 209 5 483 1 76 1020 0 2289 0 2 0 98 7 0 0 0 113 1 269 0 74 1107 0 0 0 2 0 98 March 4, 2026 at 01:41:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 79 0 0 2184 101 226 0 19 51 3 102 0 1 0 99 1 1592 0 118 323 103 244 2 17 54 10 6590 2 2 0 96 2 1996 0 0 89 1 138 2 15 49 16 434 0 1 0 99 3 31 0 2 159 67 158 0 22 72 13 170 0 0 0 100 4 13 0 9 333 130 176 0 18 53 7 395 0 0 0 100 5 12 0 0 124 29 144 0 15 41 6 68 0 0 0 100 6 11 0 14 79 6 136 1 15 53 2 2364 0 1 0 99 7 5 0 0 71 0 111 0 18 53 2 12 0 0 0 100 March 4, 2026 at 01:41:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 110 0 0 0 0 0 0 0 0 100 1 0 0 4 209 102 2 0 0 0 0 1 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 4 0 0 9 314 156 108 0 0 0 0 260 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 13 4 38 2 0 0 0 2075 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:41:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 144 0 0 3968 105 4331 42 144 47 0 14254 9 7 0 85 1 353 0 3 1694 105 3144 27 149 91 0 9891 6 5 0 89 2 114 0 0 1111 3 2136 24 86 45 0 6096 9 3 0 88 3 163 0 0 1256 9 2629 21 104 31 0 6329 5 4 0 92 4 321 0 10 1429 139 2508 15 97 39 0 5971 6 4 0 90 5 537 0 0 962 18 2024 16 64 109 0 6353 5 4 0 91 6 5 0 0 1012 8 2101 16 67 25 0 6187 4 3 0 93 7 5 0 14 727 11 1483 7 47 16 0 3907 3 2 0 94 March 4, 2026 at 01:41:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 0 6313 108 8794 70 335 145 0 21598 21 15 0 64 1 21 0 3 5035 114 10055 64 373 105 0 22059 19 14 0 67 2 19 0 0 3644 8 7424 39 228 119 0 19580 18 12 0 71 3 23 0 0 4403 17 9095 63 300 86 0 19393 16 11 0 73 4 17 0 3 3060 116 5960 39 241 116 0 15821 14 10 0 76 5 14 0 0 2083 12 4231 24 132 54 0 9251 9 6 0 86 6 37 0 7 2752 15 5998 45 230 106 0 17534 14 10 0 76 7 8 0 14 2488 13 5161 21 113 75 0 11901 10 7 0 84 March 4, 2026 at 01:41:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 0 6701 109 10225 105 481 658 0 28577 26 19 0 55 1 48 0 7 5216 108 10465 79 502 657 0 23793 20 15 0 65 2 20 0 0 3794 13 7780 56 327 568 0 17764 17 12 0 71 3 58 0 0 4404 114 8842 52 416 608 0 19284 15 12 0 73 4 15 0 33 2872 121 5390 42 339 602 0 12444 12 9 0 79 5 7 0 0 1939 14 4026 39 219 577 0 8885 8 7 0 85 6 9 0 0 3001 19 6291 53 300 764 0 13485 12 9 0 78 7 8 0 21 2139 15 4641 41 230 593 0 12447 11 8 0 82 March 4, 2026 at 01:41:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 5689 107 7692 51 289 130 0 21927 20 14 0 66 1 20 0 4 3830 112 7306 47 290 91 0 17265 16 11 0 73 2 12 0 0 3170 9 6286 41 192 136 0 13900 12 8 0 80 3 22 0 0 3221 32 6700 48 243 96 0 15170 13 9 0 78 4 12 0 2 2105 120 3899 26 174 92 0 10278 10 6 0 84 5 8 0 0 1838 8 3881 20 126 72 0 10895 9 6 0 84 6 8 0 0 2927 10 6067 29 178 98 0 12175 10 8 0 82 7 4 0 101 2144 14 4489 16 101 53 0 10143 8 6 0 87 March 4, 2026 at 01:41:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 96 0 3 0 0 300 0 0 0 100 1 0 0 4 210 102 0 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 4 0 1 0 0 2 0 0 0 100 3 0 0 0 116 51 110 0 1 0 0 0 0 0 0 100 4 0 0 2 229 113 22 0 0 0 0 301 0 0 0 100 5 0 0 0 26 1 18 0 0 0 0 1 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 23 0 0 0 100 7 0 0 21 21 6 48 3 0 0 0 2044 0 0 0 99 March 4, 2026 at 01:41:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 114 0 2 0 0 312 0 0 0 100 1 0 0 3 212 102 8 0 0 0 0 15 0 0 0 100 2 0 0 0 11 0 6 0 0 1 0 3 0 0 0 100 3 0 0 0 110 51 104 0 0 2 0 3 0 0 0 100 4 0 0 3 234 113 26 3 1 0 0 307 0 0 0 100 5 0 0 0 22 7 16 0 0 0 0 15 0 0 0 100 6 0 0 0 12 0 12 0 1 0 0 14 0 0 0 100 7 0 0 21 24 6 56 1 1 1 0 2050 0 0 0 99 March 4, 2026 at 01:41:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 9 2448 102 768 48 153 70 1 3383 5 3 0 92 1 3 0 18 641 109 899 55 172 57 0 3055 4 2 0 94 2 81 0 0 313 2 624 43 136 52 1 3449 5 2 0 93 3 56 0 0 276 33 424 34 66 178 5 3399 7 2 0 91 4 5 0 142 548 108 751 54 142 67 0 3963 6 2 0 92 5 2 0 21 316 1 605 48 109 52 1 3305 5 2 0 93 6 7 0 0 436 15 819 63 142 30 0 3208 4 2 0 94 7 7 0 7 225 6 446 30 83 133 2 5149 5 2 0 92 March 4, 2026 at 01:41:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2215 106 328 2 53 1148 0 304 0 3 0 97 1 0 0 4 421 106 469 0 91 1056 1 6 0 2 0 98 2 0 0 0 111 1 268 1 80 1366 0 0 0 2 0 98 3 0 0 0 187 94 215 2 55 1169 0 0 0 3 0 97 4 0 0 2 320 106 242 1 72 1099 1 294 0 2 0 98 5 2 0 14 99 3 202 1 45 1109 0 266 0 3 0 97 6 0 0 7 191 45 311 1 61 1145 0 0 0 3 0 97 7 0 0 7 108 7 253 2 51 955 0 1696 0 3 0 97 March 4, 2026 at 01:41:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2243 130 368 0 40 601 0 299 0 1 0 99 1 0 0 115 426 110 445 0 51 621 0 9 0 1 0 99 2 0 0 0 116 1 194 0 38 593 0 2 0 1 0 99 3 0 0 0 243 116 236 1 51 584 0 0 0 1 0 99 4 0 0 3 339 107 244 1 59 699 0 297 0 1 0 99 5 0 0 14 116 3 199 1 41 532 0 267 0 1 0 99 6 0 0 0 121 0 214 0 44 714 0 0 0 1 0 99 7 0 0 7 157 27 260 1 38 462 0 1694 0 1 0 98 March 4, 2026 at 01:41:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2160 151 210 0 0 0 0 300 0 0 0 100 1 0 0 11 221 107 14 0 1 0 0 10 0 0 0 100 2 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 3 0 0 0 11 1 8 1 1 1 0 0 0 0 0 100 4 0 0 2 214 105 6 0 0 0 0 294 0 0 0 100 5 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 7 0 0 7 19 5 44 1 0 0 0 1693 0 0 0 99 March 4, 2026 at 01:41:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2427 139 703 8 30 15 0 2453 4 2 0 94 1 0 0 3 595 125 700 17 37 29 0 1868 2 1 0 97 2 0 0 0 360 1 704 6 38 13 0 1371 2 1 0 97 3 2 0 0 170 2 243 2 15 139 0 1340 3 1 0 96 4 0 0 129 491 106 623 4 26 26 0 2115 3 1 0 96 5 0 0 14 174 10 268 5 11 24 0 1987 3 1 0 96 6 1 0 0 277 1 535 7 20 13 0 1963 3 1 0 96 7 0 0 7 69 5 97 7 5 111 0 4296 6 2 0 92 March 4, 2026 at 01:41:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 22 0 1 0 0 309 0 0 0 99 1 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 2 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 3 0 0 0 108 1 102 0 0 0 0 0 0 0 0 100 4 0 0 3 218 106 8 0 0 0 0 295 0 0 0 100 5 1 0 14 11 3 6 0 0 0 0 275 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 7 0 0 7 18 5 44 1 0 0 0 1693 0 0 0 99 March 4, 2026 at 01:41:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2209 108 243 0 60 942 0 307 0 2 0 97 1 0 0 7 395 146 314 0 57 1172 0 0 0 2 0 98 2 0 0 0 110 4 228 1 48 1016 0 4 0 2 0 98 3 0 0 0 307 99 339 1 68 1097 1 1 0 2 0 98 4 0 0 7 416 110 456 1 77 955 0 294 0 2 0 98 5 0 0 14 103 5 225 1 58 981 0 268 0 2 0 98 6 0 0 0 103 3 234 0 62 1069 1 5 0 2 0 98 7 0 0 7 115 7 264 2 60 974 0 1691 0 2 0 98 March 4, 2026 at 01:41:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 107 171 0 10 68 0 309 0 0 0 99 1 0 0 4 252 101 92 0 12 90 0 0 0 0 0 100 2 0 0 0 58 0 105 0 12 87 0 0 0 0 0 100 3 0 0 0 116 69 77 0 9 61 0 0 0 0 0 100 4 0 0 2 327 107 225 1 16 91 0 294 0 0 0 100 5 0 0 14 142 50 184 0 13 105 0 266 0 0 0 100 6 0 0 0 52 0 95 0 16 63 0 289 0 0 0 100 7 0 0 7 62 5 137 2 11 74 0 1405 0 0 0 99 March 4, 2026 at 01:41:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 597 0 0 2733 108 1310 20 84 48 12 3969 3 3 0 94 1 80 0 5 863 103 1340 11 74 32 11 3261 3 2 0 95 2 820 0 0 480 3 915 13 51 30 7 10088 5 3 0 93 3 81 0 0 616 1 1263 11 65 25 6 2621 3 2 0 96 4 31 0 3 784 106 1169 10 59 57 4 3661 3 2 0 96 5 169 0 14 869 46 2222 7 30 18 1 9868 2 2 0 96 6 101 0 0 414 4 812 13 35 21 2 4168 6 2 0 92 7 2787 0 120 298 7 622 5 29 17 8 3665 2 2 0 95 March 4, 2026 at 01:41:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 50 0 0 6247 105 8792 70 388 135 0 26357 24 16 0 60 1 29 0 2 4598 115 9174 79 377 123 0 24482 22 14 0 64 2 16 0 0 4259 13 8761 60 262 127 0 19086 17 12 0 72 3 29 0 0 3974 12 8016 67 328 128 0 17376 15 10 0 76 4 2 0 4 3098 125 5879 31 260 105 0 12012 11 7 0 82 5 10 0 21 2128 23 4412 26 147 104 0 12225 10 7 0 83 6 20 0 0 3202 7 6752 35 228 89 0 15705 13 9 0 78 7 18 0 0 2464 11 5260 28 149 109 0 12942 10 8 0 82 March 4, 2026 at 01:41:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 6344 105 9216 65 387 205 0 25543 25 16 0 58 1 14 0 2 5010 120 9995 66 417 124 0 22919 20 14 0 67 2 80 0 0 3753 12 7579 51 272 73 1 18671 16 11 0 73 3 4 0 7 4702 24 9599 71 341 100 0 19611 16 11 0 73 4 6 0 5 2852 114 5366 35 254 159 0 14470 13 9 0 78 5 4 0 14 2197 14 4515 18 147 65 0 11872 11 7 0 82 6 5 0 0 2845 17 6157 32 220 84 0 14915 13 9 0 78 7 6 0 0 1991 7 4135 20 128 53 0 11626 9 6 0 85 March 4, 2026 at 01:41:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6290 110 9043 62 439 963 1 23464 23 16 0 60 1 10 0 2 4798 110 9592 82 505 916 0 22251 20 14 0 66 2 10 0 0 3564 7 7260 42 315 801 1 18948 16 13 0 71 3 5 0 7 3971 120 8046 69 395 954 1 17849 14 12 0 74 4 3 0 4 2721 125 5073 35 302 951 1 12231 11 9 0 80 5 3 0 14 2136 19 4458 22 194 929 0 10669 10 8 0 82 6 3 0 0 2924 12 6107 35 294 860 1 13120 11 10 0 79 7 1 0 0 2041 7 4309 24 181 774 1 10327 8 8 0 84 March 4, 2026 at 01:41:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 103 131 0 4 12 0 300 0 0 0 100 1 0 0 4 233 102 36 0 4 19 0 0 0 0 0 100 2 0 0 0 53 6 82 0 3 12 0 9 0 0 0 100 3 0 0 7 154 74 148 0 6 14 0 560 0 0 0 100 4 0 0 2 238 108 49 0 4 17 0 298 0 0 0 100 5 0 0 14 13 2 12 0 2 5 0 265 0 0 0 100 6 0 0 0 14 1 16 0 4 15 0 0 0 0 0 100 7 0 0 0 20 1 57 0 3 12 0 1219 0 0 0 100 March 4, 2026 at 01:42:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 50 0 7 2232 103 279 12 38 121 1 3122 6 2 0 92 1 4 0 14 637 121 817 85 174 44 0 3099 5 2 0 93 2 16 0 0 196 7 357 30 72 79 2 4431 6 2 0 92 3 2 0 7 422 26 811 65 154 86 0 3642 4 2 0 94 4 1 0 143 527 106 730 59 158 59 3 3548 5 2 0 93 5 1 0 14 467 4 925 74 167 35 0 3276 6 1 0 92 6 10 0 14 376 4 762 60 150 60 0 3160 4 2 0 94 7 39 0 0 229 3 468 34 76 127 2 4558 6 2 0 92 March 4, 2026 at 01:42:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 114 0 5 0 0 304 0 0 0 99 1 0 0 3 220 103 6 0 2 0 0 21 0 0 0 100 2 0 0 7 11 1 4 0 1 0 0 0 0 0 0 100 3 0 0 7 12 3 8 1 0 0 0 560 0 0 0 100 4 0 0 3 225 106 16 1 0 0 0 302 0 0 0 100 5 2 0 14 25 9 18 0 2 0 0 274 0 0 0 100 6 0 0 0 125 53 121 0 1 0 0 14 0 0 0 100 7 0 0 0 19 2 42 1 0 0 0 1137 0 0 0 100 March 4, 2026 at 01:42:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 110 120 0 0 0 0 307 0 0 0 99 1 0 0 3 225 101 4 0 0 0 0 18 0 0 0 100 2 0 0 0 29 1 10 0 0 0 0 9 0 0 0 100 3 0 0 7 30 3 10 0 1 0 0 559 0 0 0 100 4 0 0 3 231 105 8 0 1 0 0 295 0 0 0 100 5 0 0 14 33 2 14 0 0 0 0 266 0 0 0 100 6 0 0 112 115 51 115 0 2 0 0 0 0 0 0 100 7 0 0 0 31 3 38 1 0 0 0 1138 0 0 0 100 March 4, 2026 at 01:42:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2207 105 329 1 67 1322 0 300 0 3 0 97 1 0 0 3 294 104 201 1 55 1394 0 3 0 3 0 97 2 0 0 0 96 2 203 0 54 1335 0 1 0 3 0 97 3 0 0 7 189 93 216 0 59 1279 0 562 0 3 0 97 4 0 0 3 409 108 440 0 82 1141 1 269 0 2 0 98 5 0 0 14 129 7 291 0 72 1351 0 268 0 2 0 98 6 0 0 7 192 48 310 0 60 1372 0 2 0 3 0 97 7 0 0 0 102 2 257 1 59 1399 0 1176 0 3 0 97 March 4, 2026 at 01:42:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2478 148 732 8 56 341 0 1700 3 2 0 95 1 4 0 3 669 103 947 10 66 436 0 1928 2 1 0 96 2 1 0 0 433 2 853 2 51 377 0 1424 2 1 0 96 3 0 0 7 355 82 526 1 40 471 0 2146 3 2 0 96 4 0 0 115 288 103 165 5 36 475 1 2991 6 2 0 92 5 1 0 14 389 4 664 3 42 412 0 1425 2 1 0 97 6 2 0 0 430 7 879 6 53 370 0 2383 3 2 0 95 7 0 0 0 184 5 346 9 35 429 0 3456 4 2 0 94 March 4, 2026 at 01:42:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 103 135 2 6 0 0 327 0 0 0 99 1 0 0 3 224 102 12 0 1 0 0 219 0 0 0 100 2 1 0 0 17 1 16 0 1 0 0 24 0 0 0 100 3 1 0 7 121 53 119 1 1 0 0 590 0 0 0 100 4 18 0 31 225 108 27 2 2 1 0 29 0 0 0 100 5 0 0 14 23 3 20 0 2 0 0 278 0 0 0 100 6 1 0 0 18 2 11 2 2 0 0 34 3 0 0 97 7 2 0 0 28 4 44 4 2 1 0 1447 0 0 0 99 March 4, 2026 at 01:42:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1889 0 0 2145 103 151 2 5 6 3 647 0 1 0 98 1 41 0 3 255 101 72 0 14 8 9 175 0 0 0 100 2 13 0 0 40 0 33 0 7 8 5 67 0 0 0 100 3 9 0 7 91 27 88 0 9 3 5 664 0 0 0 100 4 1592 0 116 247 109 63 2 5 5 12 6576 2 1 0 96 5 118 0 14 52 8 58 0 6 4 10 346 0 0 0 100 6 28 0 2 96 29 103 0 10 8 6 129 0 0 0 100 7 31 0 0 49 4 74 0 5 6 3 1547 0 0 0 100 March 4, 2026 at 01:42:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 114 0 0 0 0 300 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 12 4 8 0 0 0 0 560 0 0 0 100 4 0 0 3 225 110 18 0 0 0 0 11 0 0 0 100 5 0 0 14 10 2 8 0 0 0 0 266 0 0 0 100 6 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 36 1 1 0 0 1515 0 0 0 100 March 4, 2026 at 01:42:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2227 103 383 0 58 1188 0 300 0 2 0 98 1 0 0 3 318 102 244 1 66 1024 0 0 0 2 0 98 2 0 0 0 210 1 456 1 64 1102 0 0 0 2 0 98 3 0 0 7 203 99 258 0 67 1110 0 561 0 2 0 98 4 0 0 3 321 109 255 1 79 1047 0 5 0 2 0 98 5 0 0 14 98 2 216 1 54 998 0 266 0 2 0 98 6 0 0 0 195 50 329 0 69 1064 0 0 0 2 0 98 7 0 0 0 101 2 257 1 53 1220 0 1510 0 2 0 97 March 4, 2026 at 01:42:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 158 0 0 6189 113 8849 81 387 209 0 26091 23 16 0 62 1 153 0 3 4763 109 9473 92 428 191 0 26244 20 14 0 66 2 89 0 0 3886 9 7861 73 293 169 0 19659 20 12 0 68 3 63 0 0 4479 66 9163 88 373 164 0 21346 18 12 0 71 4 468 0 3 2564 115 4799 51 267 173 0 14001 14 9 0 77 5 41 0 14 2126 18 4509 30 172 153 0 13328 10 7 0 82 6 6 0 7 2508 9 5188 41 222 156 0 12490 10 7 0 83 7 16 0 0 1876 14 3793 17 137 89 0 7891 7 5 0 88 March 4, 2026 at 01:42:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 6692 108 9821 74 396 177 0 25076 24 16 0 60 1 8 0 4 5028 114 9987 51 398 130 0 23394 20 14 0 66 2 9 0 0 3686 8 7510 49 282 128 0 18502 18 11 0 72 3 6 0 0 3970 17 8092 60 352 124 0 17850 15 10 0 74 4 4 0 2 2831 113 5344 20 255 131 0 13706 12 8 0 80 5 13 0 0 1923 24 3936 24 150 65 0 11563 11 7 0 83 6 8 0 14 3123 11 6664 42 253 132 0 16565 13 10 0 77 7 3 0 7 2252 6 4830 25 126 117 0 13047 10 7 0 82 March 4, 2026 at 01:42:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 6367 108 8919 61 383 152 0 23385 22 15 0 63 1 3 0 3 5009 112 9898 61 393 98 0 23117 19 13 0 68 2 9 0 0 3504 17 7053 40 248 141 0 18833 17 11 0 72 3 6 0 0 4248 11 8747 43 313 133 0 19609 17 11 0 72 4 11 0 3 2895 117 5527 43 268 169 0 15113 13 9 0 78 5 7 0 0 1876 23 3937 21 133 76 0 11660 11 7 0 82 6 8 0 14 3219 12 6839 39 252 118 0 17179 14 10 0 76 7 3 0 7 2530 11 5289 28 148 111 0 10565 10 6 0 84 March 4, 2026 at 01:42:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2651 102 1307 7 44 33 0 3551 3 3 0 94 1 1 0 3 941 109 1578 6 52 22 0 6018 4 3 0 94 2 1 0 0 558 3 1058 7 37 5 0 2235 2 1 0 97 3 2 0 0 506 5 999 5 40 9 0 2104 2 1 0 97 4 0 0 3 582 152 629 1 34 16 0 926 1 1 0 98 5 1 0 0 147 5 272 9 21 21 0 1047 1 1 0 98 6 0 0 14 505 2 1020 3 27 3 0 2212 2 1 0 97 7 1 0 7 392 3 805 3 18 5 0 2675 2 1 0 97 March 4, 2026 at 01:42:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2688 102 1249 110 278 2147 0 3771 7 6 0 87 1 0 0 7 888 110 1379 119 304 2258 0 4864 5 6 0 88 2 0 0 10 643 10 1269 110 243 2166 0 2971 5 6 0 89 3 8 0 0 740 244 1254 58 212 1892 1 3465 6 6 0 88 4 30 0 175 879 111 1489 129 316 2108 1 3779 6 6 0 89 5 0 0 7 481 4 990 60 215 2078 0 3320 5 6 0 89 6 9 0 28 621 5 1283 91 282 2178 1 3944 5 6 0 89 7 50 0 7 327 4 607 48 133 1767 3 3818 8 6 0 86 March 4, 2026 at 01:42:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 110 0 1 0 0 7 0 0 0 99 1 0 0 3 234 104 58 1 2 2 0 1430 0 0 0 100 2 0 0 0 25 9 20 0 0 0 0 15 0 0 0 100 3 0 0 0 107 50 102 0 1 0 0 3 0 0 0 100 4 0 0 12 212 103 4 0 1 0 0 0 0 0 0 100 5 0 0 0 15 2 12 0 0 0 0 305 0 0 0 100 6 0 0 21 13 3 11 1 2 0 0 566 0 0 0 100 7 0 0 7 20 2 8 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2105 100 105 0 2 0 0 0 0 1 0 99 1 0 0 3 242 104 48 1 0 2 0 1427 0 0 0 100 2 0 0 0 44 9 30 0 1 0 0 14 0 0 0 100 3 0 0 0 123 51 102 0 0 0 0 2 0 0 0 100 4 0 0 3 225 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 26 2 6 0 0 0 0 300 0 0 0 100 6 0 0 14 31 3 8 0 1 0 0 566 0 0 0 100 7 0 0 7 27 2 8 0 2 0 0 260 0 0 0 100 March 4, 2026 at 01:42:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 100 108 0 0 0 0 0 0 1 0 99 1 0 0 3 232 106 56 1 0 0 0 1439 0 0 0 100 2 0 0 0 22 7 18 0 0 0 0 11 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 3 215 103 8 0 0 0 0 5 0 0 0 100 5 0 0 0 16 7 6 0 0 0 0 300 0 0 0 100 6 0 0 14 10 3 6 0 0 0 0 566 0 0 0 100 7 0 0 7 14 2 10 0 1 0 0 260 0 0 0 100 March 4, 2026 at 01:42:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2255 101 252 9 22 102 0 1960 4 2 0 94 1 0 0 3 683 119 927 12 42 18 0 3388 3 1 0 96 2 0 0 0 425 30 749 13 28 23 0 1541 2 1 0 97 3 0 0 0 237 16 395 9 28 27 0 2186 4 1 0 95 4 2 0 129 233 104 34 4 5 92 0 3222 6 2 0 93 5 0 0 0 277 5 499 3 23 25 0 2195 2 1 0 97 6 2 0 14 344 5 658 9 39 17 0 2064 5 1 0 94 7 0 0 7 226 3 322 2 17 12 0 1229 2 0 0 98 March 4, 2026 at 01:42:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2276 102 453 3 86 1574 0 0 0 3 0 97 1 0 0 3 400 105 465 4 99 1706 0 1427 0 3 0 97 2 0 0 0 241 50 429 1 88 1628 0 0 0 3 0 97 3 0 0 0 323 160 611 0 91 1446 0 9 0 2 0 97 4 0 0 3 374 103 370 2 95 1758 0 0 0 3 0 97 5 0 0 0 156 4 332 2 81 1453 0 303 0 3 0 97 6 0 0 14 161 3 349 3 94 1587 0 567 0 3 0 97 7 0 0 7 172 2 365 1 74 1338 0 261 0 3 0 97 March 4, 2026 at 01:42:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 1 0 0 0 0 0 0 100 1 0 0 3 219 104 40 0 0 0 0 1427 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 24 9 18 1 0 0 0 13 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 14 4 10 0 0 0 0 305 0 0 0 100 6 0 0 14 11 4 8 0 0 0 0 568 0 0 0 100 7 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 109 0 3 0 0 0 0 0 0 100 1 0 0 3 236 113 60 2 2 0 0 1428 0 0 0 100 2 0 0 0 92 41 84 0 2 0 0 4 0 0 0 100 3 0 0 0 18 6 14 0 0 0 0 7 0 0 0 100 4 0 0 3 211 103 4 0 1 0 0 0 0 0 0 100 5 0 0 0 15 2 16 0 1 0 0 300 0 0 0 100 6 0 0 14 10 3 6 0 0 0 0 565 0 0 0 100 7 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:42:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 212 0 0 5197 122 6407 58 261 115 17 19120 17 12 0 71 1 120 0 6 3307 117 6438 68 307 86 9 19743 14 10 0 75 2 514 0 0 2234 16 4283 38 205 79 10 10442 10 6 0 84 3 19 0 14 3349 10 6843 49 252 73 4 13238 11 8 0 81 4 53 0 3 2125 113 3847 27 188 74 4 9496 10 6 0 84 5 35 0 0 2045 15 4743 18 108 77 3 16765 10 6 0 84 6 2689 0 0 2447 8 5207 55 222 128 1 21071 16 9 0 75 7 843 0 119 1815 13 3863 18 120 63 15 10435 8 6 0 86 March 4, 2026 at 01:42:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 6639 103 9643 70 383 136 0 25890 23 16 0 60 1 11 0 2 4592 113 9101 90 427 101 0 24217 21 13 0 66 2 5 0 0 4135 11 8552 67 283 98 0 20787 18 12 0 70 3 10 0 0 4387 17 9006 64 355 104 0 21276 17 12 0 71 4 9 0 4 2763 116 5098 45 266 100 0 12750 12 8 0 80 5 6 0 14 2264 21 4514 23 152 94 0 9785 9 6 0 85 6 9 0 0 3004 13 6244 40 247 71 0 15227 14 9 0 78 7 9 0 7 2162 8 4559 22 148 82 0 11971 10 7 0 83 March 4, 2026 at 01:42:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 6884 106 10037 106 552 709 0 22287 22 16 0 63 1 15 0 14 4819 112 9592 98 573 652 0 23466 19 15 0 66 2 21 0 0 3594 10 7407 66 385 535 0 19565 16 12 0 72 3 10 0 0 4364 141 8938 81 468 609 0 19413 17 12 0 71 4 7 0 7 2766 114 5346 53 360 778 0 12934 12 9 0 79 5 11 0 14 2057 10 4239 50 232 660 0 12524 12 8 0 79 6 9 0 0 2955 10 6428 47 358 728 0 17137 15 11 0 74 7 10 0 0 2661 24 5492 54 244 608 0 12669 11 8 0 80 March 4, 2026 at 01:42:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 3280 102 2449 20 94 29 0 6154 6 4 0 90 1 3 0 10 1496 106 2581 18 117 30 0 6052 5 3 0 92 2 14 0 0 899 4 1839 19 74 13 0 5523 4 3 0 93 3 6 0 0 1283 4 2704 14 87 35 0 6624 6 4 0 91 4 3 0 3 940 105 1475 6 65 23 0 3335 4 2 0 94 5 9 0 14 623 4 1254 13 54 37 0 3298 3 2 0 95 6 8 0 0 949 43 1939 16 76 12 0 5852 5 3 0 92 7 3 0 0 455 16 869 4 43 10 0 2206 2 1 0 97 March 4, 2026 at 01:42:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 102 0 0 0 0 0 0 0 0 100 1 0 0 11 216 104 8 1 0 0 0 553 0 0 0 100 2 0 0 0 10 1 32 1 0 0 0 1220 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 4 0 0 2 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 267 0 0 0 100 6 0 0 0 109 51 104 0 1 0 0 0 0 0 0 100 7 0 0 0 33 9 28 0 0 0 0 608 0 0 0 100 March 4, 2026 at 01:42:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 110 0 4 1 0 0 0 0 0 100 1 0 0 10 219 104 18 1 1 0 0 555 0 0 0 100 2 1 0 0 9 1 36 0 0 0 0 1227 0 0 0 100 3 0 0 0 15 3 10 0 0 0 0 7 0 0 0 100 4 0 0 3 215 103 14 0 0 0 0 11 0 0 0 100 5 0 0 14 13 9 2 0 0 1 0 266 0 0 0 100 6 0 0 0 23 6 14 0 2 0 0 0 0 0 0 100 7 0 0 0 128 54 126 0 1 0 0 610 0 0 0 100 March 4, 2026 at 01:42:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 1 0 0 0 0 0 0 100 1 0 0 10 215 104 10 0 0 0 0 553 0 0 0 100 2 6 0 0 15 2 44 1 1 1 0 1221 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 3 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 14 11 3 8 0 0 0 0 270 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 133 60 126 1 1 0 0 611 0 0 0 100 March 4, 2026 at 01:42:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2206 114 291 1 63 360 0 0 0 1 0 99 1 0 0 10 359 121 239 1 50 389 0 554 0 1 0 99 2 0 0 0 121 8 247 2 40 390 0 1215 0 1 0 99 3 0 0 0 221 118 201 1 39 381 0 0 0 1 0 99 4 0 0 3 407 104 407 1 39 345 0 0 0 1 0 99 5 0 0 14 89 2 184 2 43 352 0 266 0 1 0 99 6 0 0 0 101 1 201 2 49 363 0 0 0 1 0 99 7 0 0 0 122 16 209 1 38 364 0 610 0 1 0 99 March 4, 2026 at 01:42:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 125 112 0 10 0 0 0 0 0 0 100 1 0 0 11 263 111 54 1 7 0 0 555 0 0 0 100 2 0 0 0 50 12 70 1 4 0 0 1217 0 0 0 100 3 0 0 0 33 11 34 0 2 0 0 4 0 0 0 100 4 0 0 2 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 27 10 22 0 0 0 0 608 0 0 0 100 March 4, 2026 at 01:42:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 104 85 0 10 0 0 0 0 0 0 100 1 0 0 10 247 117 36 1 3 0 0 553 0 0 0 100 2 0 0 0 19 5 42 1 3 0 0 1216 0 0 0 100 3 0 0 0 72 19 65 0 5 0 0 0 0 0 0 100 4 0 0 3 239 115 36 0 2 0 0 1 0 0 0 100 5 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 6 0 0 0 10 2 4 1 0 0 0 23 0 0 0 100 7 0 0 0 27 10 22 0 0 0 0 610 0 0 0 100 March 4, 2026 at 01:42:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 127 114 0 8 0 0 0 0 0 0 100 1 0 0 10 288 114 82 0 9 0 0 555 0 0 0 100 2 0 0 0 11 1 36 1 0 0 0 1224 0 0 0 100 3 0 0 0 39 15 32 0 0 0 0 7 0 0 0 100 4 0 0 3 221 106 20 0 0 0 0 14 0 0 0 100 5 0 0 14 15 8 6 0 1 0 0 267 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 30 10 26 0 0 0 0 608 0 0 0 100 March 4, 2026 at 01:42:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 119 102 0 5 0 0 0 0 0 0 100 1 0 0 10 260 105 54 0 3 0 0 571 0 0 0 100 2 0 0 0 73 29 97 1 5 1 0 1224 0 0 0 100 3 0 0 0 14 4 10 0 1 0 0 0 0 0 0 100 4 0 0 3 215 104 8 0 0 0 0 1 0 0 0 100 5 0 0 14 11 1 12 1 1 0 0 265 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 27 10 22 0 0 0 0 611 0 0 0 100 March 4, 2026 at 01:42:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 106 108 0 9 0 0 0 0 0 0 100 1 0 0 10 246 111 38 1 5 3 0 555 0 0 0 100 2 0 0 0 66 29 90 1 1 3 0 1216 0 0 0 100 3 0 0 0 45 16 36 0 2 1 0 4 0 0 0 100 4 0 0 3 214 104 8 0 0 1 0 1 0 0 0 100 5 0 0 14 13 4 8 0 0 1 0 268 0 0 0 100 6 0 0 0 18 2 18 0 1 6 0 0 0 0 0 100 7 0 0 0 29 11 20 1 0 1 0 606 0 0 0 100 March 4, 2026 at 01:42:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 5402 105 6885 91 309 86 0 15340 15 10 0 75 1 58 0 3 3351 112 6403 78 297 94 0 18360 19 10 0 71 2 14 0 7 2605 24 5200 40 199 101 0 16517 13 8 0 79 3 366 0 0 2759 6 5665 49 232 80 0 14490 11 8 0 81 4 145 0 3 2003 119 3706 30 199 104 0 10593 9 6 0 85 5 11 0 14 1746 9 3689 22 123 79 0 9029 9 6 0 86 6 27 0 0 2141 17 4456 29 192 100 0 10836 10 6 0 84 7 145 0 0 1960 12 4749 22 114 55 0 16883 8 5 0 86 March 4, 2026 at 01:42:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 6666 104 9809 67 383 183 0 25081 23 16 0 61 1 26 0 4 4763 113 9572 85 428 119 0 23726 20 14 0 67 2 10 0 0 4052 11 8275 45 269 107 0 19244 18 12 0 71 3 5 0 0 4602 9 9733 62 350 133 0 21438 17 12 0 71 4 7 0 2 2965 118 5678 41 258 129 0 16157 14 9 0 77 5 7 0 14 2108 16 4404 16 158 100 0 12669 11 7 0 81 6 8 0 0 3086 11 6448 46 243 114 0 14579 12 8 0 80 7 3 0 7 1476 11 3107 14 119 60 0 9992 8 5 0 86 March 4, 2026 at 01:42:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 7 6744 112 9676 70 412 216 0 24404 23 15 0 61 1 10 0 4 5016 110 10038 55 420 141 0 25486 21 14 0 65 2 7 0 0 3550 9 7255 35 259 142 0 17968 17 11 0 72 3 12 0 0 4030 18 8511 56 368 120 0 20102 16 11 0 73 4 7 0 2 3147 114 6153 22 282 143 0 15574 14 10 0 76 5 2 0 14 2107 20 4277 28 190 91 0 11694 10 7 0 83 6 3 0 0 2992 9 6240 39 259 151 0 15041 13 9 0 78 7 7 0 0 2280 19 4654 35 158 101 0 11146 10 7 0 83 March 4, 2026 at 01:42:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 7 3310 117 2567 27 128 46 0 7961 7 5 0 88 1 7 0 3 1737 110 3189 32 142 36 0 8446 6 4 0 89 2 2 0 0 1231 8 2507 14 78 17 0 5617 5 3 0 92 3 2 0 0 1317 6 2702 17 102 33 0 5514 4 3 0 93 4 0 0 3 980 110 1620 15 74 34 0 3937 3 2 0 95 5 1 0 14 375 25 658 5 42 26 0 2233 1 1 0 98 6 7 0 0 793 3 1705 11 70 31 0 5337 5 3 0 92 7 3 0 0 716 5 1543 7 57 25 0 4359 4 2 0 94 March 4, 2026 at 01:42:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2400 109 677 0 70 766 0 260 0 2 0 98 1 0 0 3 399 108 411 3 74 986 0 1220 0 2 0 98 2 0 0 0 240 45 395 2 65 832 0 7 0 1 0 98 3 0 0 0 356 170 375 1 82 927 0 0 0 2 0 98 4 0 0 3 344 103 306 0 66 875 0 294 0 2 0 98 5 0 0 14 145 2 298 2 63 871 0 567 0 2 0 98 6 0 0 0 129 1 285 1 63 1000 0 0 0 2 0 98 7 0 0 0 119 2 226 1 41 786 0 300 0 2 0 98 March 4, 2026 at 01:42:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 102 114 0 0 0 0 263 0 0 0 100 1 0 0 3 214 103 38 1 1 1 0 1223 0 0 0 100 2 0 0 0 77 34 72 0 1 2 0 19 0 0 0 100 3 0 0 0 73 28 76 0 3 0 0 11 0 0 0 100 4 0 0 3 215 104 8 0 1 0 0 300 0 0 0 100 5 0 0 14 11 3 8 0 0 0 0 567 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 3 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 111 110 0 9 0 0 260 0 0 0 100 1 0 0 3 240 109 62 1 4 0 0 1221 0 0 0 100 2 0 0 0 70 32 66 0 1 0 0 9 0 0 0 100 3 0 0 0 22 6 14 0 2 0 0 0 0 0 0 100 4 0 0 3 223 107 14 0 3 0 0 294 0 0 0 100 5 0 0 14 11 3 8 0 0 0 0 565 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2131 119 126 3 7 0 0 271 0 0 0 100 1 0 0 3 250 111 72 1 4 0 0 1227 0 0 0 100 2 0 0 0 89 34 82 0 3 0 0 30 0 0 0 100 3 0 0 0 15 2 12 0 1 0 0 9 0 0 0 100 4 0 0 3 218 104 16 1 1 0 0 295 0 0 0 100 5 0 0 14 19 10 10 0 0 1 0 568 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 15 2 12 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 103 114 0 0 0 0 261 0 0 0 100 1 0 0 3 212 103 36 0 0 0 0 1220 0 0 0 100 2 0 0 0 118 56 112 1 0 0 0 6 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 295 0 0 0 100 5 0 0 14 17 3 18 1 1 0 0 565 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 102 114 0 1 1 0 260 0 0 0 99 1 0 0 7 219 103 44 1 2 2 0 1219 0 0 0 100 2 0 0 0 125 59 118 0 0 1 0 7 0 0 0 100 3 0 0 0 19 5 12 0 0 2 0 4 0 0 0 100 4 0 0 7 215 104 8 0 1 4 0 295 0 0 0 100 5 0 0 14 15 4 10 0 0 1 0 567 0 0 0 100 6 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 7 0 0 0 13 3 4 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:42:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4048 0 7 2917 107 1602 736 88 209 5 5268 66 7 0 27 1 2612 0 3 1028 104 1559 735 98 102 6 6479 67 6 0 27 2 5681 0 0 825 25 1568 716 94 168 11 4836 67 6 0 27 3 4071 0 5 653 7 1125 550 89 163 8 4411 68 5 0 27 4 3353 0 885 983 111 1794 846 120 169 17 5874 67 6 0 27 5 1701 0 14 767 10 1370 667 97 165 6 5419 68 5 0 27 6 6867 0 0 775 15 1573 724 107 198 12 5286 67 7 0 27 7 3588 0 0 763 5 1460 715 91 196 5 5383 68 5 0 27 March 4, 2026 at 01:42:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 258 0 7 2280 126 378 147 26 9 0 1437 16 2 0 82 1 259 0 3 398 113 312 104 21 12 0 2668 16 2 0 83 2 6 0 0 173 16 235 99 22 5 0 1000 16 1 0 83 3 6 0 0 202 3 365 170 27 3 0 846 15 1 0 84 4 13 0 129 330 104 271 122 23 11 0 1374 15 1 0 83 5 9 0 14 139 3 269 118 27 16 0 1399 15 1 0 84 6 518 0 0 170 7 320 140 25 7 0 972 15 1 0 84 7 0 0 0 137 3 224 106 19 3 0 1066 16 1 0 84 March 4, 2026 at 01:42:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2157 146 120 1 7 0 0 273 0 0 0 100 1 0 0 4 311 110 132 1 6 0 0 1242 0 0 0 99 2 0 0 0 15 1 8 0 3 0 0 0 0 0 0 100 3 0 0 0 31 7 28 0 2 0 0 13 0 0 0 100 4 0 0 2 210 103 4 0 0 0 0 294 0 0 0 100 5 3 0 14 15 8 6 1 0 0 0 583 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 14 2 10 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:42:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 114 110 0 9 0 0 260 0 0 0 100 1 0 0 3 260 116 77 1 5 0 0 1238 0 1 0 99 2 0 0 0 70 25 64 0 4 0 0 0 0 0 0 100 3 0 0 0 32 8 26 1 0 0 0 11 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 294 0 0 0 100 5 0 0 14 12 4 8 0 0 0 0 566 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 8 0 2 0 0 300 0 0 0 100 March 4, 2026 at 01:42:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2139 129 107 0 4 0 0 260 0 0 0 100 1 0 0 4 290 117 122 0 4 2 0 1238 0 1 0 99 2 0 0 0 41 10 34 0 2 0 0 0 0 0 0 100 3 0 0 0 31 7 26 0 0 1 0 6 0 0 0 100 4 0 0 2 210 103 4 0 0 1 0 294 0 0 0 100 5 0 0 14 10 3 8 0 0 0 0 567 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 6 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:42:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 41 0 7 2322 114 380 26 47 39 0 3971 12 2 0 86 1 0 0 17 620 109 802 34 75 14 0 2644 3 2 0 95 2 1 0 0 255 19 387 14 39 60 0 2084 5 1 0 94 3 2 0 0 214 13 337 13 32 196 1 1823 4 1 0 94 4 4 0 136 504 105 584 24 57 12 0 1631 3 1 0 96 5 26 0 14 423 21 711 36 66 18 0 2204 3 1 0 96 6 6 0 0 185 2 295 18 28 44 0 3440 9 2 0 89 7 4 0 9 52 2 30 6 3 226 0 4463 10 3 0 87 March 4, 2026 at 01:42:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 104 92 0 2 0 0 261 0 0 0 100 1 0 0 3 221 104 43 1 1 0 0 1147 0 1 0 99 2 0 0 0 22 2 18 0 2 0 0 0 0 0 0 100 3 0 0 0 123 53 118 0 1 0 0 6 0 0 0 100 4 0 0 3 212 103 4 0 1 0 0 294 0 0 0 100 5 0 0 14 31 4 22 1 2 0 0 566 0 0 0 100 6 0 0 7 9 1 6 0 2 0 0 0 0 0 0 100 7 0 0 0 14 2 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2142 114 109 1 10 0 0 272 0 0 0 99 1 0 0 115 236 109 60 1 2 0 0 1155 0 1 0 99 2 0 0 0 52 12 30 0 2 0 0 0 0 0 0 100 3 0 0 14 103 29 88 0 8 0 0 285 0 0 0 100 4 0 0 3 256 108 32 0 2 0 0 295 0 0 0 100 5 0 0 0 33 8 4 0 0 0 0 301 0 0 0 100 6 0 0 0 25 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 31 2 12 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:42:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2113 106 102 0 7 0 0 260 0 0 0 100 1 0 0 3 230 108 52 1 5 0 0 1145 0 0 0 99 2 0 0 0 45 16 36 0 2 0 0 0 0 0 0 100 3 0 0 14 86 34 80 0 2 0 0 284 0 0 0 100 4 0 0 3 213 104 4 0 0 0 0 295 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 12 2 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:42:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2393 104 581 15 115 1766 0 3101 5 5 0 90 1 0 0 3 676 113 992 14 151 1791 0 2995 6 4 0 90 2 25 0 0 391 4 785 16 132 1656 0 2101 4 4 0 92 3 3 0 14 753 202 1153 25 170 1866 0 2336 2 4 0 93 4 0 0 143 756 106 1156 19 174 1758 1 2162 4 4 0 92 5 2 0 0 419 7 838 14 108 1853 0 2211 3 4 0 92 6 0 0 0 557 4 1045 18 151 1812 0 1443 2 4 0 94 7 0 0 0 462 45 863 3 129 1792 1 1605 2 4 0 95 March 4, 2026 at 01:42:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2120 107 86 0 2 0 0 265 0 0 0 100 1 0 0 3 218 104 38 1 0 0 0 1147 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 14 19 2 16 1 0 0 0 267 0 0 0 100 4 0 0 3 211 103 4 0 1 2 0 294 0 0 0 100 5 0 0 0 21 7 16 0 1 0 0 306 0 0 0 100 6 0 0 0 40 7 38 0 4 1 0 0 0 0 0 100 7 0 0 0 111 46 106 0 3 0 0 300 0 0 0 100 March 4, 2026 at 01:42:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 795 0 120 2127 105 118 0 7 1 9 364 0 1 0 99 1 1988 0 3 287 103 134 2 15 10 10 1654 0 1 0 98 2 783 0 3 48 0 64 2 10 10 15 6607 2 1 0 97 3 61 0 14 66 4 84 0 10 11 9 471 0 0 0 100 4 17 0 3 246 103 56 0 10 4 7 386 0 0 0 100 5 26 0 0 54 8 54 0 9 4 3 405 0 0 0 100 6 12 0 0 35 1 32 0 4 2 8 25 0 0 0 100 7 0 0 0 130 52 114 0 3 3 1 304 0 0 0 100 March 4, 2026 at 01:42:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 105 117 2 0 0 0 265 0 0 0 100 1 0 0 3 216 103 38 1 0 1 0 1230 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 14 19 2 18 0 0 0 0 273 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 294 0 0 0 100 5 0 0 0 30 15 20 0 1 1 0 314 0 0 0 100 6 0 0 0 10 1 6 0 1 0 0 1 0 0 0 100 7 0 0 0 120 52 122 0 1 1 0 300 0 0 0 100 March 4, 2026 at 01:42:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 4440 107 4891 44 248 121 0 14075 14 9 0 76 1 93 0 3 2846 115 5494 77 265 68 0 15198 11 8 0 80 2 19 0 0 2138 7 4275 32 160 57 0 9967 10 6 0 84 3 29 0 0 2452 7 5007 39 203 63 0 11810 9 6 0 85 4 244 0 24 2061 111 4387 30 177 124 0 18753 11 7 0 82 5 6 0 0 984 9 2034 17 69 61 0 7876 9 4 0 87 6 54 0 0 1729 14 3509 18 137 53 0 8337 6 4 0 89 7 219 0 0 1377 26 2730 13 74 39 0 5517 5 3 0 92 March 4, 2026 at 01:42:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 22 6638 112 9468 106 544 1484 0 23086 23 18 0 59 1 17 0 3 4777 118 9536 93 568 1472 1 24222 21 16 0 63 2 3 0 0 3469 12 7073 88 438 1405 0 17077 16 12 0 72 3 10 0 7 3934 176 8068 102 470 1541 1 17688 15 13 0 72 4 52 0 17 2930 114 5836 121 416 1491 0 14864 13 11 0 76 5 5 0 0 2760 12 5759 31 272 1381 1 13569 12 11 0 77 6 9 0 0 3011 13 6545 104 397 1544 0 16161 13 11 0 75 7 4 0 0 2292 9 4839 47 242 1422 0 10047 10 9 0 81 March 4, 2026 at 01:42:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 6506 105 9112 45 372 113 0 19942 20 14 0 66 1 6 0 11 4348 117 8674 55 399 126 0 21690 19 13 0 69 2 8 0 0 3489 9 7294 29 246 149 0 19790 19 12 0 69 3 4 0 0 4255 17 8828 54 345 133 0 20308 17 11 0 72 4 8 0 2 3243 118 6383 32 257 79 0 16969 16 10 0 74 5 7 0 14 1897 13 3925 20 153 97 0 12294 12 7 0 81 6 10 0 0 2848 16 5878 28 257 155 0 15134 13 9 0 79 7 2 0 0 2151 9 4472 18 142 76 0 10948 9 6 0 85 March 4, 2026 at 01:43:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 3964 104 4178 24 159 60 0 11004 10 7 0 83 1 10 0 11 2164 110 4002 34 174 40 0 8904 8 5 0 87 2 4 0 0 1471 5 2891 26 124 40 0 7927 7 4 0 89 3 3 0 0 1833 20 3773 25 131 73 0 9428 8 5 0 87 4 12 0 2 1236 105 2066 14 105 52 0 5255 5 3 0 92 5 1 0 14 809 14 1562 13 56 37 0 4982 4 3 0 93 6 7 0 0 1425 21 2922 16 98 38 0 6013 5 4 0 91 7 4 0 0 899 5 1905 19 68 60 0 5994 5 3 0 92 March 4, 2026 at 01:43:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 111 106 0 6 0 0 0 0 0 0 100 1 0 0 10 235 110 28 1 5 0 0 556 0 0 0 100 2 0 0 0 65 28 58 0 1 0 0 21 0 0 0 100 3 0 0 0 14 1 8 0 0 0 0 307 0 0 0 100 4 0 0 3 214 104 8 0 1 0 0 1 0 0 0 100 5 0 0 14 44 20 36 1 1 2 0 591 0 0 0 100 6 0 0 0 36 9 30 0 3 0 0 5 0 0 0 100 7 0 0 0 22 2 48 1 1 0 0 1226 0 0 0 100 March 4, 2026 at 01:43:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 105 104 0 4 0 0 1 0 0 0 100 1 0 0 10 216 104 12 1 0 0 0 571 0 0 0 100 2 0 0 0 43 14 38 0 3 0 0 9 0 0 0 100 3 0 0 0 78 35 74 0 1 0 0 300 0 0 0 100 4 0 0 3 215 104 8 0 0 0 0 1 0 0 0 100 5 0 0 14 26 9 28 0 1 0 0 572 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 21 2 42 1 0 0 0 1225 0 0 0 100 March 4, 2026 at 01:43:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2234 113 341 1 63 762 0 4 0 2 0 98 1 0 0 10 352 112 265 1 56 743 0 557 0 2 0 98 2 0 0 0 169 30 293 1 53 682 1 1 0 1 0 99 3 0 0 0 241 121 487 0 56 688 0 303 0 1 0 99 4 0 0 3 322 105 250 2 51 809 0 2 0 2 0 98 5 1 0 14 115 12 209 0 42 659 0 577 0 2 0 98 6 0 0 0 119 3 257 1 51 786 0 5 0 2 0 98 7 0 0 0 107 4 243 1 47 655 0 1224 0 2 0 98 March 4, 2026 at 01:43:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 0 0 100 1 0 0 10 215 105 10 0 0 0 0 554 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 14 22 9 18 1 0 0 0 575 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 20 2 44 1 0 0 0 1218 0 0 0 100 March 4, 2026 at 01:43:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 0 0 100 1 0 0 10 215 105 10 1 0 0 0 557 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 14 22 9 18 1 0 0 0 575 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 24 2 54 0 1 0 0 1219 0 0 0 100 March 4, 2026 at 01:43:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 100 112 0 1 0 0 0 0 0 0 100 1 0 0 10 214 104 8 1 0 0 0 553 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 11 1 8 0 0 0 0 307 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 0 0 0 0 100 5 0 0 14 41 16 38 0 1 1 0 590 0 0 0 100 6 0 0 0 11 1 6 0 0 0 0 5 0 0 0 100 7 0 0 0 19 2 44 1 2 1 0 1219 0 0 0 100 March 4, 2026 at 01:43:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 101 0 5 0 0 0 0 0 0 100 1 0 0 10 224 108 17 0 2 0 0 556 0 0 0 100 2 0 0 0 101 46 94 0 2 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 14 35 12 32 0 0 0 0 579 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 14 3 38 1 1 0 0 1221 0 0 0 100 March 4, 2026 at 01:43:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 104 0 0 1 0 0 0 0 0 100 1 0 0 10 220 104 22 0 1 2 0 555 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 0 0 0 0 100 5 0 0 14 30 9 26 1 0 0 0 575 0 0 0 100 6 0 0 0 10 1 8 0 1 1 0 0 0 0 0 100 7 0 0 0 15 3 40 1 0 2 0 1218 0 0 0 100 March 4, 2026 at 01:43:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 100 0 0 0 0 0 0 0 0 100 1 0 0 10 218 105 12 1 1 0 0 555 0 0 0 100 2 0 0 0 112 51 112 0 1 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 1 0 0 0 100 5 0 0 14 32 10 28 0 0 0 0 573 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 36 1 0 0 0 1219 0 0 0 100 March 4, 2026 at 01:43:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43 0 0 4572 105 5173 60 218 77 0 13715 13 9 0 78 1 14 0 3 3587 117 7486 50 262 72 0 21865 14 9 0 78 2 12 0 0 2438 29 4901 40 177 53 0 10511 9 6 0 85 3 34 0 0 1985 7 4080 31 190 66 0 11178 10 6 0 84 4 1 0 3 1682 107 2949 26 155 71 0 9015 7 5 0 88 5 2 0 14 1031 8 2221 20 103 86 0 8088 7 4 0 89 6 0 0 7 1712 10 3531 23 136 30 0 7663 7 5 0 88 7 2 0 0 1216 7 2517 21 89 40 0 10366 10 5 0 85 March 4, 2026 at 01:43:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 0 6641 107 9669 57 378 123 0 26442 25 17 0 58 1 16 0 3 5028 112 9988 64 435 130 0 25493 20 14 0 66 2 4 0 0 3812 12 7715 43 267 83 0 16112 15 10 0 75 3 7 0 0 4406 17 9351 55 386 99 0 22331 19 12 0 69 4 9 0 3 2835 116 5421 38 272 87 0 13762 13 8 0 78 5 2 0 14 2090 22 4240 26 143 102 0 11565 11 7 0 82 6 5 0 7 2616 13 5706 32 241 69 0 16774 14 9 0 77 7 4 0 0 1969 13 4062 25 137 82 0 9049 8 5 0 87 March 4, 2026 at 01:43:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 6899 116 10107 71 435 101 0 23664 23 16 0 62 1 9 0 4 4530 118 9027 54 462 117 0 23513 20 14 0 67 2 10 0 0 3402 6 6982 51 309 131 0 19700 18 11 0 71 3 3 0 0 4261 12 8914 63 391 81 0 20736 17 12 0 72 4 4 0 2 3168 116 6058 26 274 105 0 14740 14 9 0 77 5 7 0 14 2344 10 4981 20 167 118 0 15284 14 9 0 78 6 8 0 7 2592 11 5377 42 258 92 0 13409 12 8 0 80 7 2 0 0 2050 18 4179 18 139 61 0 9597 7 6 0 87 March 4, 2026 at 01:43:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 4007 103 4103 56 291 833 0 10899 11 9 0 80 1 6 0 3 2511 109 4704 76 347 850 0 11399 9 8 0 84 2 3 0 0 1853 7 3689 64 221 888 0 8547 8 6 0 85 3 3 0 0 1828 126 3635 49 260 869 0 8108 7 6 0 87 4 1 0 3 1629 141 2894 36 222 909 0 5952 5 6 0 89 5 0 0 14 1019 9 2209 27 151 802 0 6113 6 5 0 89 6 8 0 7 1496 7 3206 35 234 897 0 7299 6 5 0 88 7 0 0 0 1101 6 2298 20 154 863 0 5881 5 5 0 91 March 4, 2026 at 01:43:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 68 0 3 0 0 0 0 0 0 100 1 0 0 3 254 104 74 1 0 1 0 1222 0 0 0 100 2 0 0 0 15 3 8 1 0 0 0 294 0 0 0 100 3 0 0 0 19 6 14 0 1 0 0 6 0 0 0 100 4 0 0 3 248 121 38 0 0 0 0 0 0 0 0 100 5 0 0 14 75 32 74 0 3 0 0 266 0 0 0 100 6 0 0 7 10 2 6 0 1 0 0 260 0 0 0 100 7 0 0 0 20 4 18 0 1 0 0 601 0 0 0 100 March 4, 2026 at 01:43:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 112 0 4 2 0 3 0 0 0 100 1 0 0 3 218 104 44 1 0 1 0 1236 0 0 0 100 2 0 0 0 28 10 28 0 0 0 0 312 0 0 0 100 3 0 0 0 14 3 8 0 0 0 0 17 0 0 0 100 4 0 0 3 212 102 8 0 1 0 0 3 0 0 0 100 5 0 0 14 50 17 44 1 4 0 0 269 0 0 0 100 6 0 0 7 79 37 76 0 1 0 0 284 0 0 0 100 7 0 0 0 18 4 14 0 1 1 0 602 0 0 0 100 March 4, 2026 at 01:43:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 110 0 4 0 0 5 0 0 0 100 1 0 0 3 214 103 38 1 1 0 0 1220 0 0 0 100 2 0 0 0 23 9 18 0 0 0 0 303 0 0 0 100 3 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 14 22 8 10 0 0 1 0 266 0 0 0 100 6 1 0 7 54 20 52 0 3 0 0 274 0 0 0 100 7 0 0 0 86 36 86 0 2 0 0 607 0 0 0 100 March 4, 2026 at 01:43:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 118 81 0 16 0 0 0 0 0 0 100 1 0 0 3 287 119 114 2 12 2 0 1222 0 0 0 100 2 0 0 0 31 12 24 0 1 0 0 303 0 0 0 100 3 0 0 0 17 3 10 0 2 0 0 0 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 16 2 12 0 1 0 0 267 0 0 0 100 6 0 0 7 9 2 4 1 0 0 0 260 0 0 0 100 7 0 0 0 58 16 50 0 7 0 0 602 0 0 0 100 March 4, 2026 at 01:43:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 108 223 0 18 150 0 0 0 1 0 99 1 0 0 3 300 106 192 1 31 173 0 1221 0 1 0 99 2 0 0 0 159 49 217 2 29 119 0 303 0 0 0 100 3 0 0 0 157 72 155 1 29 164 0 0 0 1 0 99 4 0 0 3 273 103 130 0 22 179 0 0 0 0 0 100 5 0 0 14 64 1 131 0 31 164 0 266 0 0 0 100 6 0 0 7 128 2 244 0 26 153 0 260 0 0 0 100 7 0 0 0 61 4 103 0 21 149 0 600 0 0 0 100 March 4, 2026 at 01:43:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 100 0 0 0 0 0 0 0 0 100 1 0 0 3 216 105 40 0 0 0 0 1223 0 0 0 100 2 0 0 0 126 60 124 0 1 0 0 304 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 214 104 168 0 0 0 0 332 0 0 0 100 5 0 0 14 16 2 12 1 0 0 0 267 0 0 0 100 6 0 0 7 12 4 8 0 0 0 0 263 0 0 0 100 7 0 0 0 15 4 10 0 0 0 0 600 0 0 0 100 March 4, 2026 at 01:43:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2285 0 0 2665 115 1228 548 83 63 0 2961 54 5 0 41 1 26 0 3 876 114 1402 606 103 65 0 4500 55 4 0 41 2 4 0 0 657 25 1148 536 81 60 0 2914 55 3 0 41 3 4 0 0 615 11 1211 518 95 56 0 2689 56 3 0 42 4 22 0 647 783 105 1404 645 79 79 0 3272 55 4 0 41 5 2 0 14 603 4 1139 528 80 54 0 3048 55 3 0 41 6 9 0 7 665 5 1361 637 84 66 0 4019 54 4 0 41 7 20 0 0 840 12 1737 826 79 83 0 3312 55 3 0 41 March 4, 2026 at 01:43:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2456 103 670 301 45 17 0 1400 28 2 0 69 1 0 0 3 524 108 561 245 45 19 0 2441 28 2 0 70 2 3 0 0 383 43 615 254 39 30 0 1352 29 2 0 70 3 29 0 0 369 1 878 354 58 35 0 2676 26 2 0 71 4 1 0 311 451 104 531 249 42 21 0 1241 29 2 0 70 5 1 0 14 361 13 665 317 38 24 0 1647 27 2 0 71 6 44 0 7 311 11 564 278 40 23 0 1583 28 2 0 70 7 1 0 0 391 10 881 389 51 45 0 1958 28 2 0 70 March 4, 2026 at 01:43:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 104 0 0 0 0 0 0 0 0 100 1 0 0 3 213 103 36 1 0 0 0 1231 0 0 0 100 2 0 0 0 122 58 116 1 0 0 0 302 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 4 0 0 3 213 103 6 0 0 0 0 1 0 0 0 100 5 2 0 14 15 2 12 0 0 0 0 267 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 114 0 1 1 0 1 0 0 0 100 1 0 0 3 219 105 44 1 0 4 0 1235 0 0 0 100 2 0 0 0 127 61 122 0 1 0 0 301 0 0 0 100 3 0 0 0 12 3 6 0 0 3 0 300 0 0 0 100 4 0 0 3 217 103 8 0 1 1 0 1 0 0 0 100 5 0 0 14 24 3 24 1 1 3 0 267 0 0 0 100 6 0 0 7 13 3 10 0 0 2 0 260 0 0 0 100 7 0 0 0 10 2 2 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:43:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 0 0 0 0 100 1 0 0 4 214 104 38 0 0 1 0 1234 0 0 0 100 2 0 0 0 51 23 42 0 0 0 0 297 0 0 0 100 3 0 0 0 76 35 72 0 1 0 0 300 0 0 0 100 4 0 0 2 214 104 8 0 1 0 0 3 0 0 0 100 5 0 0 14 15 1 12 0 0 0 0 266 0 0 0 100 6 0 0 7 13 2 14 0 1 0 0 259 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 21 2484 112 818 36 76 22 1 1923 3 2 0 95 1 0 0 4 590 111 718 28 68 15 0 2496 3 1 0 96 2 53 0 0 54 5 28 7 8 147 0 3260 6 2 0 93 3 3 0 0 67 10 40 5 4 638 0 3341 6 2 0 93 4 0 0 123 558 107 701 24 51 21 0 1450 3 2 0 96 5 4 0 14 333 3 616 23 55 8 0 1749 3 1 0 96 6 0 0 7 274 15 498 17 52 120 0 1751 4 1 0 95 7 0 0 0 107 19 105 7 13 559 0 2647 7 1 0 91 March 4, 2026 at 01:43:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 115 126 1 5 0 0 22 0 1 0 99 1 0 0 11 239 107 62 1 4 1 0 1146 0 0 0 100 2 0 0 0 74 31 68 1 1 0 0 299 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 4 0 0 2 213 102 7 0 1 0 0 0 0 0 0 100 5 0 0 14 19 6 10 0 0 1 0 266 0 0 0 100 6 0 0 7 11 2 6 0 0 1 0 260 0 0 0 100 7 0 0 0 52 14 48 0 3 1 0 300 0 0 0 100 March 4, 2026 at 01:43:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2138 117 139 0 6 0 0 8 0 1 0 99 1 0 0 4 247 108 52 1 3 0 0 1141 0 1 0 99 2 0 0 0 115 42 92 0 5 0 0 294 0 0 0 100 3 0 0 0 23 1 2 0 0 0 0 300 0 0 0 100 4 0 0 2 225 102 2 0 0 0 0 0 0 0 0 100 5 0 0 14 32 2 12 1 0 0 0 267 0 0 0 100 6 0 0 7 32 5 10 0 0 0 0 266 0 0 0 100 7 0 0 0 29 2 8 0 2 0 0 301 0 0 0 100 March 4, 2026 at 01:43:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2260 110 392 1 91 1535 0 7 0 4 0 96 1 0 0 3 368 103 371 3 98 1702 0 1139 0 4 0 96 2 0 0 0 156 8 328 1 61 1862 0 294 0 3 0 97 3 0 0 0 354 177 402 1 84 1825 0 300 0 3 0 97 4 0 0 3 506 106 638 1 117 1512 0 0 0 2 0 98 5 0 0 14 150 1 347 1 79 1749 0 266 0 3 0 97 6 0 0 7 167 6 349 2 88 1757 0 260 0 3 0 97 7 0 0 0 152 1 357 0 96 1549 0 300 0 2 0 98 March 4, 2026 at 01:43:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2410 108 645 8 19 26 0 1732 3 2 0 96 1 0 0 3 336 105 243 4 14 38 0 3749 4 2 0 94 2 0 0 0 423 5 809 3 23 12 0 1762 2 1 0 97 3 0 0 0 248 22 401 6 23 24 0 2560 4 1 0 95 4 1 0 129 327 118 194 7 14 35 0 2728 5 2 0 93 5 0 0 14 229 16 364 2 19 9 0 1271 2 1 0 97 6 0 0 7 391 8 727 8 30 20 0 1891 5 1 0 94 7 0 0 0 291 2 576 3 15 29 0 2288 2 1 0 97 March 4, 2026 at 01:43:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 105 80 0 8 0 0 0 0 0 0 100 1 0 0 3 239 114 64 0 4 0 0 1139 0 0 0 99 2 0 0 0 19 3 18 1 1 0 0 294 0 0 0 100 3 4 0 0 13 3 6 0 0 0 0 305 0 0 0 100 4 0 0 3 210 102 2 0 1 0 0 0 0 0 0 100 5 0 0 14 100 42 96 0 1 0 0 278 0 0 0 100 6 0 0 7 39 2 32 0 0 0 0 260 0 0 0 100 7 0 0 0 15 3 8 0 0 0 0 303 0 0 0 100 March 4, 2026 at 01:43:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2701 0 112 2157 122 172 3 9 7 9 460 1 1 0 98 1 130 0 3 304 109 149 1 18 20 14 1410 0 1 0 99 2 789 0 3 105 30 115 2 9 12 11 6890 2 1 0 97 3 17 0 0 40 1 44 0 10 5 5 446 0 0 0 100 4 37 0 3 240 102 37 0 7 4 5 99 0 0 0 100 5 4 0 14 60 12 45 1 5 2 2 325 0 0 0 100 6 6 0 7 35 3 20 0 3 1 0 304 0 0 0 100 7 0 0 0 39 4 26 2 3 2 0 329 0 0 0 100 March 4, 2026 at 01:43:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 106 0 0 0 0 0 0 0 0 100 1 0 0 3 215 103 40 1 0 0 0 1240 0 0 0 99 2 0 0 0 117 54 114 0 1 0 0 303 0 0 0 100 3 0 0 0 12 1 12 0 1 0 0 300 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 1 0 0 0 100 5 0 0 14 30 9 26 0 0 0 0 274 0 0 0 100 6 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:43:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 53 0 0 4070 107 4129 40 262 1301 0 10058 10 9 0 81 1 85 0 7 2582 113 4851 59 282 1348 0 11936 10 9 0 81 2 5 0 0 1780 27 3501 35 216 1121 0 10342 12 7 0 81 3 4 0 0 2365 162 4589 36 255 1177 0 10538 8 8 0 83 4 93 0 7 1879 106 3731 26 228 1380 0 10226 7 7 0 86 5 8 0 14 1368 12 3338 15 159 989 0 12038 7 6 0 87 6 9 0 7 1754 7 3738 29 194 1001 0 8589 7 7 0 86 7 268 0 0 1136 15 2261 6 137 1167 0 4837 4 4 0 92 March 4, 2026 at 01:43:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 6456 106 9109 101 473 125 0 21643 21 14 0 65 1 9 0 4 4836 118 9554 110 483 89 0 22514 19 13 0 68 2 10 0 0 3569 14 7087 54 313 88 0 18076 16 11 0 73 3 6 0 0 4109 16 8620 81 368 97 0 20413 18 12 0 69 4 1 0 2 2990 116 5759 44 285 110 0 14604 13 9 0 78 5 7 0 32 2197 4 4450 25 164 59 0 11570 10 6 0 84 6 4 0 7 3049 12 6559 46 272 118 0 18093 16 10 0 74 7 4 0 0 2077 9 4301 21 175 76 0 11677 11 7 0 82 March 4, 2026 at 01:43:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 6445 112 9261 71 433 144 0 26220 26 17 0 58 1 9 0 4 5024 112 10179 87 499 129 0 24393 21 14 0 65 2 9 0 0 3624 12 7197 54 339 132 0 16598 16 10 0 74 3 5 0 0 4479 20 9313 80 424 62 0 20236 16 11 0 72 4 2 0 2 3036 115 5703 37 328 70 0 12424 12 8 0 81 5 4 0 14 1717 14 3578 19 155 119 0 10212 9 6 0 85 6 5 0 7 3002 14 6635 38 268 108 0 20711 17 11 0 72 7 2 0 0 1948 10 4020 24 152 48 0 9783 8 6 0 86 March 4, 2026 at 01:43:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 4526 107 5034 40 242 42 0 10929 10 7 0 82 1 11 0 4 2525 105 5034 43 256 67 0 15383 13 8 0 79 2 3 0 0 1941 10 3931 40 176 52 0 10442 9 6 0 85 3 2 0 0 2086 11 4153 53 217 52 0 10425 8 6 0 86 4 2 0 2 1801 108 3256 28 162 30 0 7171 7 4 0 89 5 0 0 14 941 14 1894 13 79 54 0 4999 4 3 0 93 6 5 0 7 1436 40 2896 33 171 63 0 8065 6 4 0 90 7 3 0 0 1320 10 2694 14 92 42 0 5381 5 3 0 92 March 4, 2026 at 01:43:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 0 0 100 1 0 0 3 212 102 34 1 1 0 0 1228 0 0 0 100 2 0 0 0 20 3 16 0 0 0 0 300 0 0 0 100 3 0 0 0 16 5 10 0 0 0 0 8 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 14 13 3 8 0 1 0 0 269 0 0 0 100 6 0 0 7 117 55 114 2 2 0 0 855 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:43:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2249 102 312 1 62 944 0 0 0 2 0 98 1 0 0 3 420 105 455 3 85 1103 0 1228 0 2 0 98 2 0 0 0 332 6 661 0 89 833 0 300 0 2 0 98 3 0 0 0 378 185 378 2 86 874 0 10 0 2 0 98 4 0 0 3 427 135 393 0 85 1034 0 0 0 2 0 98 5 0 0 14 137 2 299 1 60 879 1 266 0 2 0 98 6 0 0 7 167 11 356 1 91 851 1 853 0 2 0 98 7 0 0 0 122 0 258 1 62 910 1 0 0 2 0 98 March 4, 2026 at 01:43:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 8 0 1 0 0 4 0 0 0 100 1 0 0 3 320 102 146 1 1 1 0 1222 0 0 0 100 2 0 0 0 22 4 18 0 0 0 0 301 0 0 0 100 3 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 4 2 0 3 313 155 108 0 1 0 0 6 0 0 0 100 5 0 0 14 12 4 10 0 0 0 0 272 0 0 0 100 6 19 0 7 18 6 14 0 0 0 0 859 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 105 34 0 5 0 0 0 0 0 0 100 1 0 0 3 279 102 98 1 0 0 0 1224 0 0 0 100 2 0 0 0 15 3 10 0 1 0 0 300 0 0 0 100 3 0 0 0 34 14 30 0 1 0 0 6 0 0 0 100 4 0 0 3 297 140 86 0 2 0 0 0 0 0 0 100 5 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 22 5 18 0 2 0 0 854 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 122 92 0 8 0 0 0 0 0 0 100 1 0 0 3 232 106 52 1 3 0 0 1223 0 0 0 100 2 0 0 0 49 16 54 0 2 0 0 333 0 0 0 100 3 0 0 0 86 19 80 1 3 0 0 15 0 0 0 100 4 0 0 3 228 106 20 0 3 0 0 5 0 0 0 100 5 0 0 14 14 8 8 0 1 0 0 267 0 0 0 100 6 0 0 7 26 6 20 2 0 0 0 856 0 0 0 100 7 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 126 99 0 8 0 0 0 0 0 0 100 1 0 0 3 255 108 77 0 7 0 0 1223 0 0 0 100 2 0 0 0 78 21 72 0 3 0 0 300 0 0 0 100 3 0 0 0 21 5 22 0 1 0 0 8 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 1 0 0 0 100 5 0 0 14 10 3 6 1 0 0 0 267 0 0 0 100 6 0 0 7 23 5 18 0 0 0 0 854 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2133 123 91 0 12 3 0 6 0 0 0 100 1 0 0 3 298 117 122 1 9 3 0 1224 0 0 0 100 2 0 0 0 43 15 36 0 4 1 0 300 0 0 0 100 3 0 0 0 28 9 20 1 3 0 0 9 0 0 0 100 4 0 0 3 212 103 6 0 0 1 0 0 0 0 0 100 5 0 0 14 13 5 8 0 0 1 0 269 0 0 0 100 6 0 0 7 34 10 28 0 0 2 0 860 0 0 0 100 7 0 0 0 11 1 6 0 1 3 0 0 0 0 0 100 March 4, 2026 at 01:43:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 84 0 5 0 0 0 0 0 0 100 1 0 0 3 231 102 50 1 0 1 0 1223 0 0 0 100 2 0 0 0 78 31 72 0 3 0 0 302 0 0 0 100 3 0 0 0 64 28 60 0 2 0 0 7 0 0 0 100 4 0 0 3 214 103 12 0 1 0 0 0 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 6 0 0 7 22 5 18 0 0 0 0 854 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 114 102 0 6 0 0 0 0 0 0 100 1 0 0 3 245 107 64 1 4 0 0 1223 0 0 0 100 2 0 0 0 49 20 46 0 2 0 0 300 0 0 0 100 3 0 0 0 48 19 40 0 2 0 0 9 0 0 0 100 4 0 0 3 211 103 4 0 1 0 0 0 0 0 0 100 5 0 0 14 15 3 16 0 1 0 0 268 0 0 0 100 6 0 0 7 23 5 20 2 1 0 0 853 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 4641 104 6136 33 163 59 0 19688 13 8 0 79 1 3 0 3 2390 104 4427 53 197 58 0 12441 9 6 0 85 2 0 0 0 1503 40 2990 28 131 39 0 8546 8 5 0 87 3 20 0 0 2051 7 4073 41 142 50 0 9227 8 5 0 87 4 0 0 3 1472 112 2484 21 118 35 0 5378 5 3 0 92 5 20 0 0 804 11 1692 8 58 49 0 5991 5 3 0 92 6 1 0 14 1551 8 3392 33 104 62 0 11115 12 6 0 82 7 1 0 7 976 9 2000 11 64 68 0 6609 6 3 0 91 March 4, 2026 at 01:43:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 0 6625 105 9359 47 369 134 0 24980 24 16 0 60 1 6 0 3 4869 112 9807 51 409 130 0 24312 20 13 0 67 2 10 0 0 3808 15 7715 31 285 81 0 15692 14 10 0 76 3 31 0 0 3670 13 7686 39 287 108 0 18061 14 10 0 76 4 5 0 3 2910 121 5724 35 242 102 0 15292 14 9 0 76 5 6 0 17 1882 20 3881 22 128 65 0 9856 9 6 0 85 6 6 0 21 3191 13 6803 29 236 86 0 18311 15 10 0 74 7 3 0 0 2336 9 5077 25 137 123 0 15017 13 8 0 78 March 4, 2026 at 01:43:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 6404 111 9071 94 468 576 0 23942 24 16 0 60 1 16 0 4 4670 113 9648 70 466 660 0 25771 22 16 0 62 2 7 0 0 3964 15 8042 61 369 575 0 16570 16 11 0 74 3 5 0 0 4445 115 9135 67 428 673 0 21184 18 13 0 69 4 4 0 2 3084 116 5854 55 354 579 0 14373 13 10 0 78 5 2 0 0 2217 8 4709 32 210 619 0 11141 10 8 0 82 6 12 0 21 3142 18 6758 40 324 509 0 15754 13 10 0 77 7 2 0 0 1944 6 4068 35 208 624 0 10888 10 7 0 83 March 4, 2026 at 01:43:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 4594 108 5346 28 203 74 0 12254 12 8 0 80 1 2 0 3 2762 112 5344 43 228 45 0 13554 11 8 0 81 2 5 0 0 2235 20 4450 29 159 52 0 9115 8 6 0 87 3 2 0 0 2127 12 4532 29 163 49 0 12244 10 7 0 83 4 1 0 3 2024 111 3683 24 153 36 0 9161 8 5 0 87 5 3 0 0 1091 18 2219 11 77 41 0 6146 6 4 0 90 6 4 0 21 1740 10 3642 24 146 38 0 10862 9 6 0 85 7 3 0 0 1131 9 2415 13 83 22 0 6906 6 4 0 90 March 4, 2026 at 01:43:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 300 0 0 0 100 2 0 0 0 111 52 106 0 0 0 0 0 0 0 0 100 3 0 0 0 14 2 38 1 1 0 0 1220 0 0 0 100 4 0 0 3 216 104 14 0 1 0 0 294 0 0 0 100 5 0 0 0 19 6 12 0 0 0 0 9 0 0 0 100 6 0 0 21 14 5 12 1 0 0 0 827 0 0 0 100 7 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:43:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 114 0 0 1 0 3 0 0 0 100 1 0 0 3 211 103 4 0 0 0 0 301 0 0 0 100 2 2 0 0 127 58 126 0 1 1 0 19 0 0 0 100 3 0 0 0 15 2 42 1 0 0 0 1228 0 0 0 100 4 0 0 3 233 109 30 0 0 0 0 314 0 0 0 100 5 0 0 0 26 10 20 0 1 0 0 23 0 0 0 100 6 0 0 21 17 6 18 0 0 0 0 829 0 0 0 100 7 0 0 0 13 0 12 0 0 0 0 8 0 0 0 100 March 4, 2026 at 01:43:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 108 0 3 0 0 0 0 0 0 100 1 0 0 3 209 102 4 0 1 0 0 300 0 0 0 100 2 0 0 0 29 8 22 0 2 0 0 1 0 0 0 100 3 0 0 0 97 44 122 1 1 0 0 1219 0 0 0 100 4 0 0 3 228 112 20 0 0 0 0 305 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 6 0 0 21 13 5 12 0 0 0 0 839 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2211 109 277 1 41 500 0 0 0 2 0 98 1 0 0 7 311 108 201 1 42 536 0 301 0 1 0 99 2 0 0 0 94 3 174 1 36 464 0 0 0 1 0 99 3 0 0 0 209 109 222 2 53 421 0 1221 0 1 0 99 4 0 0 7 315 112 214 2 50 442 0 305 0 1 0 99 5 0 0 0 99 2 200 1 41 494 0 1 0 1 0 99 6 0 0 21 140 8 254 1 55 545 0 827 0 1 0 99 7 0 0 0 273 32 464 0 41 452 0 0 0 1 0 99 March 4, 2026 at 01:43:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 118 108 0 9 0 0 0 0 0 0 100 1 0 0 4 263 110 52 0 9 0 0 300 0 0 0 100 2 0 0 0 65 28 60 0 2 0 0 1 0 0 0 100 3 0 0 0 12 2 36 1 1 0 0 1221 0 0 0 100 4 0 0 2 221 109 14 0 0 0 0 304 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 21 16 5 14 1 0 0 0 826 0 0 0 100 7 0 0 0 12 0 12 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:43:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 1 0 0 0 0 0 0 100 1 0 0 4 211 102 4 0 0 0 0 300 0 0 0 100 2 0 0 0 113 53 108 0 0 0 0 0 0 0 0 100 3 0 0 0 13 2 38 1 0 1 0 1219 0 0 0 100 4 0 0 2 223 110 16 0 0 0 0 305 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 21 15 6 14 0 0 0 0 828 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:43:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2606 107 1017 441 56 46 0 2590 46 3 0 51 1 21 0 3 815 110 1260 568 82 84 0 3429 46 3 0 51 2 0 0 7 711 31 1465 656 69 68 0 3073 46 3 0 51 3 30 0 0 598 17 1385 585 49 51 0 2997 46 3 0 51 4 0 0 451 659 110 1084 488 49 42 0 2920 46 3 0 50 5 12 0 0 521 9 977 471 59 81 1 2485 47 3 0 51 6 1088 0 14 593 9 1151 549 61 76 1 3466 46 3 0 51 7 25 0 0 518 3 1013 476 53 48 0 4093 46 4 0 51 March 4, 2026 at 01:43:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2580 109 1011 476 51 26 0 2225 37 3 0 60 1 1 0 4 639 114 774 355 51 50 0 2427 37 2 0 61 2 1 0 7 472 7 907 435 46 71 0 1949 38 2 0 60 3 262 0 0 390 10 654 315 48 44 0 1715 37 2 0 61 4 5 0 310 581 109 803 386 59 30 0 2025 38 2 0 60 5 5 0 0 487 2 911 441 45 54 0 2151 36 2 0 62 6 0 0 14 486 9 932 422 51 38 0 2649 37 2 0 61 7 1 0 0 535 16 1186 535 66 55 0 3974 36 3 0 61 March 4, 2026 at 01:43:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 118 115 0 6 4 0 0 0 0 0 100 1 0 0 4 259 108 56 0 9 4 0 300 0 0 0 100 2 0 0 7 77 34 76 0 5 1 0 260 0 0 0 100 3 0 0 7 13 2 12 0 4 2 0 0 0 0 0 100 4 0 0 2 219 105 16 1 5 3 0 294 0 0 0 100 5 0 0 0 15 1 12 0 3 1 0 0 0 0 0 100 6 2 0 14 28 11 24 1 0 1 0 574 0 0 0 100 7 0 0 0 19 3 42 0 1 0 0 1231 0 0 0 100 March 4, 2026 at 01:43:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 116 121 0 6 1 0 0 0 0 0 100 1 0 0 4 239 104 30 0 4 0 0 300 0 0 0 100 2 0 0 7 98 38 94 0 5 1 0 260 0 0 0 100 3 0 0 0 11 1 6 0 2 1 0 0 0 0 0 100 4 0 0 9 217 106 12 0 2 1 0 297 0 0 0 100 5 0 0 0 11 1 4 0 0 0 0 1 0 0 0 100 6 0 0 14 22 9 18 0 0 0 0 576 0 0 0 100 7 0 0 0 14 2 36 1 1 0 0 1233 0 0 0 100 March 4, 2026 at 01:44:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 146 112 0 4 0 0 0 0 0 0 100 1 0 0 4 311 106 102 0 4 0 0 300 0 0 0 100 2 0 0 7 15 4 10 0 1 0 0 260 0 0 0 100 3 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 4 0 0 2 215 105 8 0 1 0 0 295 0 0 0 100 5 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 6 0 0 14 23 10 20 0 0 0 0 595 0 0 0 100 7 0 0 0 10 1 34 1 0 0 0 1233 0 0 0 100 March 4, 2026 at 01:44:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2263 122 273 13 23 87 1 2719 6 2 0 92 1 0 0 11 557 106 553 23 43 46 0 2298 4 1 0 95 2 21 0 7 158 6 251 17 27 168 0 2494 5 1 0 94 3 32 0 0 272 2 499 28 40 35 0 2418 7 1 0 92 4 1 0 124 449 135 399 13 34 61 0 2170 4 1 0 94 5 0 0 14 396 12 711 29 49 14 0 1252 3 1 0 96 6 2 0 14 149 8 227 9 21 173 0 3093 5 2 0 93 7 0 0 0 381 4 748 15 42 16 0 2596 3 2 0 95 March 4, 2026 at 01:44:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 125 108 0 7 1 0 0 0 0 0 100 1 0 0 10 275 108 66 0 4 0 0 318 0 0 0 100 2 0 0 7 17 5 14 0 0 0 0 269 0 0 0 100 3 0 0 0 11 1 6 0 2 1 0 0 0 0 0 100 4 3 0 3 248 118 42 0 1 1 0 314 0 0 0 100 5 0 0 0 14 1 10 0 1 1 0 34 0 0 0 100 6 0 0 14 54 16 48 1 3 1 0 567 0 0 0 100 7 0 0 0 11 1 34 1 0 1 0 1133 0 0 0 100 March 4, 2026 at 01:44:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2445 106 769 0 94 1581 0 0 0 3 0 97 1 0 0 3 426 109 437 1 116 1773 0 301 0 3 0 96 2 0 0 7 250 38 423 2 88 1649 0 260 0 3 0 97 3 0 0 0 351 171 380 1 101 1790 0 0 0 3 0 97 4 0 0 3 433 115 454 2 117 1677 0 308 0 3 0 97 5 0 0 112 170 2 381 3 102 1877 0 1 0 4 0 96 6 0 0 14 202 6 380 1 96 1789 0 567 0 3 0 97 7 0 0 0 177 7 345 3 68 1561 0 1130 0 3 0 97 March 4, 2026 at 01:44:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 210 102 2 0 0 0 0 300 0 0 0 100 2 0 0 7 113 54 108 0 0 0 0 260 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 3 226 111 18 0 0 0 0 304 0 0 0 100 5 0 0 7 13 1 8 0 0 0 0 0 0 0 0 100 6 0 0 14 10 3 6 0 0 0 0 565 0 0 0 100 7 0 0 0 11 1 34 1 0 0 0 1129 0 0 0 100 March 4, 2026 at 01:44:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2429 104 718 3 32 22 0 2064 2 1 0 96 1 0 0 3 456 106 438 7 23 25 0 1863 3 1 0 96 2 0 0 7 386 20 685 9 29 24 0 1861 3 1 0 96 3 0 0 0 192 11 312 3 24 31 0 1963 6 1 0 93 4 0 0 143 527 114 637 10 28 28 0 2617 3 1 0 95 5 0 0 0 247 3 454 2 18 37 0 2482 4 1 0 95 6 1 0 14 261 25 438 14 26 32 0 2676 4 1 0 95 7 0 0 0 149 2 283 3 10 19 0 2678 3 1 0 96 March 4, 2026 at 01:44:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 112 109 0 8 0 0 3 0 1 0 99 1 0 0 3 271 121 59 0 7 0 0 309 0 0 0 100 2 0 0 7 44 17 40 0 1 0 0 265 0 0 0 100 3 0 0 0 11 1 6 0 0 0 0 7 0 0 0 100 4 0 0 3 220 106 18 0 0 0 0 308 0 0 0 100 5 0 0 0 13 6 2 0 0 0 0 0 0 0 0 100 6 0 0 14 48 17 42 1 2 0 0 566 0 0 0 100 7 0 0 0 18 1 48 1 1 0 0 1130 0 0 0 100 March 4, 2026 at 01:44:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 140 118 0 5 0 0 5 0 1 0 99 1 0 0 3 296 110 88 0 3 0 0 309 0 0 0 100 2 0 0 7 41 15 34 0 3 0 0 261 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 3 215 106 8 0 0 0 0 297 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 14 10 3 6 0 0 0 0 567 0 0 0 100 7 0 0 0 10 1 34 1 1 1 0 1131 0 0 0 100 March 4, 2026 at 01:44:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2263 107 437 1 77 1237 0 1 0 3 0 97 1 0 0 3 385 108 357 1 77 1214 0 305 0 2 0 97 2 0 0 7 133 4 282 1 62 1172 0 260 0 2 0 98 3 0 0 0 291 154 293 1 65 1229 1 0 0 2 0 98 4 0 0 3 349 105 305 1 62 1106 1 295 0 2 0 98 5 0 0 0 125 0 269 1 56 1063 0 0 0 2 0 98 6 0 0 14 374 47 710 0 81 1048 0 565 0 2 0 98 7 0 0 0 149 1 366 0 73 1166 0 1129 0 2 0 98 March 4, 2026 at 01:44:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 100 0 0 3625 113 3061 41 163 57 4 8395 8 6 0 87 1 1903 0 4 1693 110 3070 31 155 52 8 9441 8 5 0 87 2 47 0 7 1274 7 2578 13 121 46 9 6918 7 4 0 89 3 153 0 0 1588 5 3233 28 129 56 4 8937 7 5 0 88 4 1564 0 116 1412 109 2589 16 104 68 17 13277 8 5 0 86 5 111 0 0 1014 5 2002 9 64 29 11 5325 7 3 0 90 6 351 0 2 1603 13 3841 23 116 42 10 14172 6 4 0 90 7 37 0 14 766 23 1558 15 72 43 4 5695 4 3 0 93 March 4, 2026 at 01:44:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 6620 109 9587 84 389 192 0 23988 23 15 0 62 1 10 0 3 5079 110 9933 77 422 95 0 23286 20 14 0 66 2 11 0 7 3348 17 6730 51 276 148 0 17822 16 10 0 74 3 25 0 0 4171 12 8813 60 327 126 0 22098 18 12 0 70 4 8 0 3 3157 111 5957 42 284 155 0 14807 13 9 0 79 5 19 0 7 2754 18 5558 19 144 81 0 10365 9 7 0 84 6 11 0 0 3071 12 6708 39 240 125 0 19271 17 11 0 72 7 4 0 14 1631 9 3379 23 147 96 0 10998 8 5 0 86 March 4, 2026 at 01:44:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 6371 109 8997 68 384 120 0 24450 24 15 0 61 1 5 0 3 4857 125 9647 53 382 139 0 23096 20 13 0 67 2 8 0 0 3805 11 7785 35 264 93 0 19287 17 11 0 72 3 5 0 0 4091 8 8574 52 322 120 0 19715 16 11 0 73 4 3 0 3 3196 115 6043 45 249 101 0 13391 13 9 0 79 5 5 0 0 2052 15 4151 19 160 107 0 10748 9 6 0 84 6 8 0 0 3134 11 6659 39 233 106 0 17880 16 10 0 74 7 5 0 21 2274 11 4707 15 120 87 0 13049 11 7 0 82 March 4, 2026 at 01:44:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 4825 108 5703 43 239 70 0 13926 14 9 0 77 1 9 0 3 2747 117 5205 34 229 76 0 13262 11 8 0 81 2 9 0 0 2335 20 4810 34 167 47 0 10594 10 7 0 83 3 12 0 0 2608 16 5332 30 197 69 0 11736 9 6 0 85 4 2 0 3 2159 113 3973 24 186 72 0 8841 8 5 0 87 5 4 0 7 1410 10 2970 24 107 67 0 9766 9 5 0 86 6 1 0 0 1613 8 3355 31 152 71 0 10485 9 6 0 85 7 8 0 14 1598 9 3405 19 95 85 0 9427 6 4 0 89 March 4, 2026 at 01:44:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2241 101 367 1 76 1036 0 0 0 2 0 98 1 0 0 7 536 102 672 1 89 959 0 300 0 2 0 98 2 0 0 0 147 7 289 1 64 968 0 0 0 2 0 98 3 0 0 0 414 211 437 1 69 996 0 7 0 2 0 98 4 0 0 7 360 103 326 2 83 966 0 0 0 2 0 98 5 0 0 7 151 7 293 1 65 840 0 562 0 2 0 98 6 0 0 0 142 3 292 1 73 946 0 1 0 2 0 98 7 0 0 14 136 6 313 2 54 919 0 1779 0 2 0 98 March 4, 2026 at 01:44:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 112 115 0 9 0 0 0 0 0 0 100 1 0 0 3 252 110 42 0 8 0 0 300 0 0 0 100 2 0 0 0 49 21 44 0 1 0 0 0 0 0 0 100 3 0 0 0 43 16 36 0 2 0 0 5 0 0 0 100 4 0 0 3 214 103 12 0 1 0 0 0 0 0 0 100 5 0 0 7 12 4 8 0 0 0 0 559 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 14 12 3 38 1 1 0 0 1776 0 0 0 100 March 4, 2026 at 01:44:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 130 118 0 8 0 0 4 0 0 0 100 1 0 0 3 234 108 26 0 3 0 0 300 0 0 0 100 2 0 0 0 85 17 78 0 5 0 0 0 0 0 0 100 3 0 0 0 17 6 10 0 0 0 0 7 0 0 0 100 4 1 0 3 216 105 10 0 1 0 0 7 0 0 0 100 5 19 0 7 21 5 22 0 1 0 0 566 0 0 0 100 6 0 0 0 9 1 4 1 0 0 0 3 0 0 0 100 7 0 0 14 14 4 40 1 0 0 0 1775 0 0 0 100 March 4, 2026 at 01:44:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 116 0 2 0 0 0 0 0 0 100 1 0 0 3 212 102 6 0 1 0 0 300 0 0 0 100 2 0 0 0 11 1 2 1 0 0 0 4 0 0 0 100 3 0 0 0 106 50 102 0 1 0 0 0 0 0 0 100 4 0 0 3 222 108 18 0 0 0 0 12 0 0 0 100 5 0 0 7 18 10 8 0 0 0 0 559 0 0 0 100 6 0 0 0 16 3 16 0 0 0 0 14 0 0 0 100 7 0 0 14 17 3 44 1 1 0 0 1772 0 0 0 100 March 4, 2026 at 01:44:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 112 0 1 0 0 2 0 0 0 100 1 0 0 3 212 102 6 0 0 0 0 300 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 4 0 0 3 224 110 16 0 0 0 0 7 0 0 0 100 5 0 0 7 15 5 10 1 1 0 0 561 0 0 0 100 6 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 7 0 0 14 16 4 40 2 2 0 0 1769 0 0 0 100 March 4, 2026 at 01:44:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 110 0 0 0 0 0 0 0 0 100 1 0 0 4 215 102 12 0 0 2 0 300 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 4 0 0 2 222 109 16 0 0 2 0 9 0 0 0 100 5 0 0 7 13 4 10 0 0 1 0 559 0 0 0 100 6 0 0 0 12 2 8 0 0 1 0 0 0 0 0 100 7 0 0 14 18 3 50 1 1 0 0 1771 0 0 0 100 March 4, 2026 at 01:44:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 106 112 0 5 0 0 8 0 0 0 100 1 0 0 3 258 122 49 0 2 0 0 300 0 0 0 100 2 0 0 0 34 14 28 0 1 0 0 0 0 0 0 100 3 0 0 0 40 13 34 0 4 0 0 9 0 0 0 100 4 0 0 3 226 111 18 0 1 0 0 6 0 0 0 100 5 0 0 7 14 5 10 0 0 0 0 562 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 15 0 0 0 100 7 0 0 14 14 4 40 1 0 1 0 1774 0 0 0 100 March 4, 2026 at 01:44:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 122 0 4 0 0 1 0 0 0 100 1 0 0 3 214 102 8 0 1 0 0 301 0 0 0 100 2 0 0 0 45 17 38 0 3 0 0 4 0 0 0 100 3 0 0 0 71 32 66 0 1 0 0 1 0 0 0 100 4 0 0 3 218 107 10 1 0 0 0 4 0 0 0 100 5 0 0 7 12 4 8 0 0 0 0 559 0 0 0 100 6 0 0 0 12 3 8 0 1 0 0 1 0 0 0 100 7 0 0 14 17 4 42 2 1 1 0 1772 0 0 0 100 March 4, 2026 at 01:44:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 117 0 1 0 0 2 0 0 0 100 1 0 0 3 219 102 18 0 1 0 0 300 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 22 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 4 0 0 3 226 110 22 0 0 0 0 14 0 0 0 100 5 0 0 7 20 9 10 1 0 0 0 561 0 0 0 100 6 0 0 0 115 53 114 0 0 0 0 13 0 0 0 100 7 0 0 14 21 4 46 3 0 0 0 1777 0 0 0 100 March 4, 2026 at 01:44:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3913 106 4462 45 141 90 0 16659 11 7 0 82 1 4 0 3 2051 106 3903 44 161 69 0 10683 8 5 0 87 2 0 0 0 1551 5 3080 33 111 73 0 9138 10 4 0 86 3 20 0 0 1437 5 3018 33 126 59 0 7728 7 4 0 89 4 0 0 3 1023 112 1609 18 107 52 0 4704 5 3 0 93 5 2 0 7 720 10 1408 8 64 15 0 3640 3 2 0 95 6 21 0 0 1078 16 2172 17 100 54 1 5119 5 3 0 93 7 1 0 14 957 23 1969 9 68 48 0 6887 5 3 0 92 March 4, 2026 at 01:44:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 6415 108 9031 79 422 374 0 25702 25 17 0 58 1 1 0 17 4728 116 9325 85 456 360 0 22458 18 13 0 70 2 4 0 0 3871 9 7929 67 339 373 0 16845 15 11 0 74 3 2 0 0 3959 74 8171 64 345 281 0 20513 17 12 0 72 4 9 0 3 2908 113 5607 58 304 342 0 14044 13 9 0 78 5 29 0 7 2493 16 5453 34 180 354 0 14936 14 9 0 77 6 1 0 0 3352 10 7000 37 272 328 0 14131 12 9 0 79 7 8 0 0 2059 16 4312 33 168 168 0 12597 11 7 0 83 March 4, 2026 at 01:44:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 6218 110 8944 52 388 161 0 26253 26 16 0 58 1 4 0 3 5081 116 10228 67 480 161 0 23868 20 13 0 67 2 21 0 0 3660 7 7494 43 296 124 0 18554 17 11 0 72 3 11 0 14 4187 20 8695 49 358 88 0 19150 16 11 0 73 4 5 0 3 2869 120 5350 38 263 117 0 12793 12 8 0 80 5 4 0 7 1926 11 3942 31 157 120 0 10787 9 6 0 85 6 6 0 0 2989 13 6317 36 257 119 0 16413 14 9 0 77 7 7 0 0 2129 8 4495 22 145 110 0 12061 11 7 0 82 March 4, 2026 at 01:44:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 4837 108 5730 48 254 96 0 14146 15 10 0 76 1 5 0 3 3440 113 6540 55 278 113 0 15924 12 9 0 79 2 5 0 0 2251 8 4597 40 172 88 0 12663 11 7 0 82 3 3 0 14 2657 15 5504 40 217 53 0 13190 11 7 0 81 4 4 0 3 1937 118 3582 28 186 61 0 9835 9 6 0 86 5 2 0 7 1522 27 3179 19 107 79 0 9128 8 5 0 87 6 2 0 0 2278 8 4786 40 171 64 0 11114 10 7 0 83 7 4 0 0 1499 3 3034 13 80 29 0 7424 6 4 0 90 March 4, 2026 at 01:44:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 106 0 1 1 0 0 0 0 0 100 1 0 0 3 219 104 15 0 2 0 0 269 0 0 0 100 2 0 0 0 12 0 12 0 1 0 0 0 0 0 0 100 3 0 0 14 19 8 16 0 0 0 0 571 0 0 0 100 4 0 0 3 216 103 13 0 1 0 0 301 0 0 0 100 5 0 0 7 119 60 108 0 0 0 0 559 0 0 0 100 6 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 23 2 20 0 2 0 0 8 0 0 0 100 March 4, 2026 at 01:44:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2114 103 112 0 1 1 0 10 0 0 0 100 1 0 0 3 218 104 43 1 2 0 0 973 0 0 0 100 2 0 0 0 12 1 8 0 1 0 0 4 0 0 0 100 3 0 0 14 126 57 128 0 3 0 0 575 0 0 0 100 4 0 0 3 216 105 8 0 1 0 0 301 0 0 0 100 5 0 0 7 17 4 12 0 1 0 0 262 0 0 0 100 6 0 0 0 19 4 18 0 3 0 0 307 0 0 0 100 7 0 0 0 15 0 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:44:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2224 104 256 1 59 848 0 0 0 2 0 98 1 0 0 3 416 108 400 0 67 818 0 1211 0 2 0 98 2 0 0 0 123 0 260 1 49 731 0 0 0 2 0 98 3 0 0 14 287 148 306 1 59 893 0 567 0 2 0 98 4 0 0 3 553 143 652 0 86 880 0 299 0 2 0 98 5 0 0 7 145 4 302 0 69 869 0 260 0 2 0 98 6 0 0 0 130 3 270 1 58 838 0 300 0 2 0 98 7 0 0 0 120 0 239 1 46 610 0 0 0 2 0 98 March 4, 2026 at 01:44:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 4 0 1 0 0 0 0 0 0 100 1 0 0 3 318 106 140 1 0 1 0 1214 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 14 12 3 8 1 0 0 0 565 0 0 0 100 4 0 0 3 327 159 124 1 1 0 0 300 0 0 0 100 5 0 0 7 12 3 8 1 0 0 0 261 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 7 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:44:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 108 84 0 11 0 0 0 0 0 0 100 1 0 0 3 253 119 71 1 4 1 0 1211 0 0 0 100 2 0 0 0 33 12 26 0 1 0 0 0 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 566 0 0 0 100 4 0 0 3 225 110 16 0 1 0 0 303 0 0 0 100 5 0 0 7 15 2 16 0 1 0 0 260 0 0 0 100 6 0 0 0 43 8 36 0 5 0 0 300 0 0 0 100 7 0 0 0 43 10 37 0 7 0 0 1 0 0 0 100 March 4, 2026 at 01:44:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 114 0 4 0 0 0 0 0 0 100 1 1 0 3 223 107 52 1 0 2 0 1227 0 0 0 100 2 0 0 0 39 16 32 0 2 0 0 1 0 0 0 100 3 0 0 14 78 37 76 0 1 0 0 566 0 0 0 100 4 0 0 3 222 108 18 0 0 0 0 305 0 0 0 100 5 0 0 7 16 9 6 0 0 0 0 260 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 300 0 0 0 100 7 0 0 0 17 1 16 0 1 0 0 8 0 0 0 100 March 4, 2026 at 01:44:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 516 0 0 2583 108 989 447 55 38 0 2572 36 3 0 61 1 1863 0 52 724 122 980 432 51 64 1 3801 36 4 0 61 2 2 0 0 523 5 1041 485 58 40 0 2497 36 3 0 61 3 15 0 0 584 23 1035 482 45 64 0 2944 36 3 0 61 4 15 0 522 615 114 946 415 46 29 0 2642 36 3 0 61 5 5 0 21 474 6 820 398 44 59 0 3025 36 2 0 61 6 3 0 0 525 6 960 432 48 35 0 2495 36 2 0 61 7 13 0 0 594 4 1165 545 41 55 0 2735 36 3 0 61 March 4, 2026 at 01:44:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2636 117 1114 508 86 40 0 2898 47 4 0 49 1 0 0 3 854 117 1301 598 83 34 0 3324 47 3 0 50 2 0 0 0 578 26 1014 482 91 67 0 2916 47 3 0 50 3 0 0 0 546 6 1066 488 72 45 0 4178 47 3 0 50 4 0 0 409 677 108 1036 504 70 48 0 2766 47 3 0 50 5 0 0 21 577 10 1142 552 68 36 0 3466 48 3 0 49 6 3 0 0 498 7 918 433 80 61 0 3078 47 3 0 50 7 0 0 0 583 5 1142 549 77 49 0 2840 47 3 0 50 March 4, 2026 at 01:44:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 116 106 0 3 0 0 6 0 0 0 100 1 0 0 4 224 106 22 0 0 0 0 16 0 0 0 100 2 5 0 0 38 2 35 0 2 1 0 24 0 0 0 100 3 0 0 0 93 37 126 1 2 1 0 1543 0 0 0 100 4 0 0 2 214 104 8 0 1 0 0 301 0 0 0 100 5 2 0 21 12 5 10 0 0 0 0 527 0 0 0 100 6 1 0 0 15 2 12 0 0 3 0 308 0 0 0 100 7 0 0 0 8 0 4 0 1 0 0 9 0 0 0 100 March 4, 2026 at 01:44:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 112 0 1 0 0 0 0 0 0 100 1 0 0 3 221 108 14 0 0 0 0 11 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 119 53 144 0 0 0 0 1521 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 294 0 0 0 100 5 0 0 21 12 5 10 0 0 0 0 525 0 0 0 100 6 0 0 0 14 2 10 0 0 0 0 300 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:44:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 116 2 2 0 0 9 0 0 0 100 1 0 0 4 232 109 28 0 1 0 0 15 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 120 53 142 1 0 1 0 1523 0 0 0 100 4 0 0 2 211 103 6 0 0 0 0 297 0 0 0 100 5 0 0 21 19 11 12 0 1 2 0 532 0 0 0 100 6 0 0 0 15 2 12 0 1 0 0 301 0 0 0 100 7 0 0 0 12 0 10 0 1 0 0 1 0 0 0 100 March 4, 2026 at 01:44:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6461 0 18 2331 109 653 136 169 81 21 2054 18 4 0 78 1 2134 0 12 421 109 357 25 97 41 15 2545 16 1 0 83 2 2285 0 7 165 2 299 27 79 30 18 2600 16 3 0 82 3 6617 0 0 257 8 803 178 183 120 22 3991 15 3 0 81 4 7413 0 24 412 116 437 95 134 87 13 1917 20 2 0 78 5 8624 0 28 231 12 704 161 181 101 13 3415 18 4 0 78 6 5445 0 7 310 22 765 162 164 98 16 3021 15 3 0 82 7 2863 0 0 178 4 294 26 83 46 11 2019 19 1 0 80 March 4, 2026 at 01:44:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9625 0 0 3002 107 2254 535 661 892 6 6405 48 10 0 41 1 5619 0 3 1121 111 1861 379 485 1006 1 4758 40 9 0 51 2 3780 0 0 613 10 1121 302 304 666 2 4425 60 6 0 34 3 9937 0 0 889 120 1868 453 570 1274 3 6238 62 12 0 27 4 10321 0 542 1009 106 2124 586 590 1275 2 6835 60 12 0 28 5 5259 0 0 706 12 1495 372 442 1178 2 6251 59 9 0 32 6 7940 0 14 857 9 1983 396 571 1169 2 6637 36 10 0 54 7 6499 0 7 770 4 1826 440 474 674 2 6640 56 8 0 35 March 4, 2026 at 01:44:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2648 117 1233 155 311 3046 3 3929 9 6 0 85 1 34 0 9 921 116 1516 172 380 2952 0 3218 9 5 0 86 2 40 0 0 593 2 1256 158 327 2066 7 3589 9 5 0 86 3 14 0 0 790 316 1346 114 284 2031 0 3823 10 5 0 86 4 5 0 186 729 105 1290 127 337 3072 3 3265 7 5 0 87 5 4 0 7 564 5 1309 130 327 2918 2 4785 8 6 0 86 6 3 0 36 570 20 1300 150 327 2731 4 4048 10 7 0 83 7 23 0 7 556 9 1259 163 322 1980 1 4529 8 4 0 88 March 4, 2026 at 01:44:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 109 108 0 8 0 0 0 0 0 0 100 1 0 0 3 255 114 42 0 4 1 0 9 0 0 0 100 2 0 0 0 21 4 12 0 4 0 0 1 0 0 0 100 3 0 0 0 76 33 68 0 1 0 0 0 0 0 0 100 4 0 0 3 209 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 20 4 40 1 0 0 0 1133 0 0 0 100 6 0 0 28 13 2 12 0 2 0 0 266 0 0 0 100 7 0 0 7 22 6 16 0 1 0 0 1155 0 0 0 100 March 4, 2026 at 01:44:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 240 109 16 0 0 0 0 10 0 0 0 100 2 0 0 0 29 4 8 0 0 0 0 24 0 0 0 100 3 0 0 0 131 53 112 0 0 1 0 9 0 0 0 100 4 0 0 3 228 102 10 0 1 1 0 0 0 0 0 100 5 1 0 0 37 9 42 1 0 0 0 1138 0 0 0 100 6 0 0 126 18 2 21 0 1 0 0 276 0 0 0 100 7 0 0 7 42 6 22 2 1 0 0 1155 0 0 0 100 March 4, 2026 at 01:44:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 119 106 0 6 0 0 0 0 0 0 100 1 0 0 3 223 108 16 0 0 0 0 8 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 3 0 0 0 100 3 0 0 0 26 6 18 0 3 0 0 1 0 0 0 100 4 0 0 3 266 113 56 0 3 0 0 0 0 0 0 100 5 0 0 0 51 19 80 1 2 2 0 1130 0 0 0 100 6 0 0 21 14 2 12 0 0 0 0 266 0 0 0 100 7 0 0 7 20 5 12 0 0 0 0 1155 0 0 0 100 March 4, 2026 at 01:44:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2157 124 155 1 17 270 0 132 0 2 0 98 1 9 0 7 241 107 59 0 21 259 0 874 0 2 0 98 2 0 0 0 35 4 52 1 16 269 0 60 0 2 0 98 3 4 0 0 43 19 38 1 12 196 0 20 0 1 0 98 4 0 0 7 244 102 102 0 21 277 0 18 0 1 0 99 5 0 0 0 88 23 145 1 23 302 0 1162 0 1 0 99 6 28 0 14 92 18 106 6 16 207 0 338 0 2 0 98 7 1 0 7 38 6 56 2 13 233 0 2006 0 1 0 98 March 4, 2026 at 01:44:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2337 106 523 1 133 1593 0 873 0 3 0 97 1 0 0 4 579 102 810 0 141 1519 0 0 0 2 0 98 2 0 0 0 330 4 634 0 128 1561 1 1 0 2 0 98 3 0 0 0 455 221 548 0 139 1669 0 0 0 2 0 98 4 0 0 2 481 102 637 0 152 1570 0 0 0 2 0 98 5 0 0 0 309 52 593 1 126 1457 1 266 0 2 0 98 6 0 0 14 218 2 505 0 128 1673 0 266 0 2 0 98 7 0 0 7 202 5 453 0 118 1356 0 1153 0 2 0 98 March 4, 2026 at 01:44:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 107 52 1 0 0 0 1140 0 1 0 99 1 0 0 4 211 102 4 0 0 0 0 0 0 0 0 100 2 0 0 0 111 2 106 0 0 0 0 5 0 0 0 100 3 0 0 0 12 1 12 0 1 0 0 2 0 0 0 100 4 0 0 2 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 111 53 106 0 0 0 0 0 0 0 0 100 6 0 0 14 14 4 12 0 1 0 0 290 0 0 0 100 7 0 0 7 20 5 14 2 0 0 0 1155 0 0 0 100 March 4, 2026 at 01:44:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 107 54 0 0 0 0 1135 0 1 0 99 1 0 0 4 209 102 2 0 0 0 0 0 0 0 0 100 2 0 0 0 105 0 100 0 0 0 0 0 0 0 0 100 3 0 0 0 9 0 4 0 0 0 0 5 0 0 0 100 4 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 118 58 110 0 0 0 0 7 0 0 0 100 6 0 0 14 19 4 20 0 0 0 0 279 0 0 0 100 7 0 0 7 21 5 18 0 1 0 0 1153 0 0 0 100 March 4, 2026 at 01:44:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2124 109 58 3 0 0 0 1160 0 1 0 99 1 1 0 4 212 103 6 0 1 0 0 2 0 0 0 100 2 0 0 0 116 3 114 0 0 0 0 9 0 0 0 100 3 3 0 0 12 1 12 0 0 0 0 11 0 0 0 100 4 0 0 2 212 102 10 0 1 0 0 0 0 0 0 100 5 0 0 0 111 53 106 0 0 0 0 0 0 0 0 100 6 0 0 14 12 2 10 1 0 0 0 290 0 0 0 100 7 0 0 7 18 5 14 0 1 0 0 1154 0 0 0 100 March 4, 2026 at 01:44:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 108 118 1 1 0 0 1144 0 1 0 99 1 0 0 3 215 102 12 0 1 2 0 7 0 0 0 100 2 0 0 0 54 3 46 0 0 0 0 5 0 0 0 100 3 0 0 0 7 0 4 0 1 3 0 3 0 0 0 100 4 0 0 3 212 102 8 0 0 2 0 0 0 0 0 100 5 0 0 0 119 54 120 0 2 1 0 1 0 0 0 100 6 0 0 14 10 2 8 0 0 0 0 266 0 0 0 100 7 0 0 7 20 5 18 0 1 0 0 1158 0 0 0 100 March 4, 2026 at 01:44:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 148 1 2 0 0 1137 0 1 0 99 1 0 0 3 217 102 9 0 2 0 0 0 0 0 0 100 2 19 0 0 7 1 2 0 0 0 0 5 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 1 0 3 213 105 6 0 0 0 0 11 0 0 0 100 5 1 0 0 114 54 110 0 1 0 0 6 0 0 0 100 6 0 0 14 12 3 8 0 0 0 0 267 0 0 0 100 7 0 0 7 25 7 18 3 0 0 0 1159 0 0 0 100 March 4, 2026 at 01:44:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 152 2 0 0 0 1128 0 1 0 99 1 0 0 3 213 102 6 0 1 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 113 53 108 0 1 0 0 0 0 0 0 100 6 0 0 14 13 2 16 0 1 0 0 266 0 0 0 100 7 0 0 7 20 6 16 0 0 0 0 1155 0 0 0 100 March 4, 2026 at 01:44:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 107 156 1 0 0 0 1129 0 1 0 99 1 0 0 3 212 102 6 0 0 0 0 1 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 11 1 6 0 0 0 0 7 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 119 59 110 0 0 0 0 7 0 0 0 100 6 0 0 14 18 3 20 1 0 0 0 280 0 0 0 100 7 0 0 7 37 10 40 0 1 0 0 1160 0 0 0 100 March 4, 2026 at 01:44:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 107 153 0 1 0 0 1124 0 1 0 99 1 0 0 4 211 102 2 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 4 0 0 2 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 111 53 106 0 0 0 0 0 0 0 0 100 6 0 0 14 8 2 6 0 0 0 0 283 0 0 0 100 7 0 0 7 18 5 14 0 0 0 0 1155 0 0 0 100 March 4, 2026 at 01:44:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 105 132 1 4 0 0 1126 0 1 0 99 1 0 0 3 246 103 38 1 3 3 0 3 0 0 0 100 2 0 0 0 13 2 8 0 0 2 0 3 0 0 0 100 3 0 0 0 12 2 6 1 0 2 0 3 0 0 0 100 4 0 0 3 212 102 8 0 0 3 0 0 0 0 0 100 5 0 0 0 129 61 124 0 1 1 0 11 0 0 0 100 6 0 0 14 12 4 8 0 0 1 0 267 0 0 0 100 7 0 0 7 30 9 22 2 0 1 0 1163 0 0 0 100 March 4, 2026 at 01:44:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 142 1 0 0 0 1118 0 1 0 99 1 0 0 3 214 102 12 0 1 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 123 59 118 0 0 0 0 9 0 0 0 100 6 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 7 0 0 7 18 5 14 0 0 0 0 1153 0 0 0 100 March 4, 2026 at 01:44:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 140 1 0 0 0 1119 0 1 0 99 1 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 123 59 118 0 0 0 0 10 0 0 0 100 6 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 7 0 0 7 22 7 18 0 0 0 0 1157 0 0 0 100 March 4, 2026 at 01:44:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 142 1 0 0 0 1119 0 1 0 99 1 0 0 4 213 102 6 0 1 0 0 0 0 0 0 100 2 0 0 0 10 0 10 0 1 0 0 0 0 0 0 100 3 0 0 0 9 0 4 0 0 0 0 5 0 0 0 100 4 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 130 64 122 0 0 0 0 13 0 0 0 100 6 0 0 14 16 4 18 0 0 0 0 280 0 0 0 100 7 0 0 7 21 5 18 0 0 0 0 1154 0 0 0 100 March 4, 2026 at 01:44:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 7 5257 105 6777 56 309 142 0 19343 16 12 0 72 1 144 0 2 3465 109 6555 51 347 103 0 15520 14 9 0 77 2 18 0 0 3772 8 8150 42 210 62 0 23758 15 10 0 75 3 6 0 0 2840 9 5939 47 242 98 0 15672 16 8 0 76 4 10 0 4 2278 109 4251 30 194 106 0 11293 11 6 0 82 5 2 0 14 1833 26 3785 22 131 66 0 11050 10 6 0 84 6 21 0 0 1958 10 4174 34 184 80 0 10739 10 6 0 84 7 2 0 0 1511 15 3148 17 102 86 0 8335 8 5 0 88 March 4, 2026 at 01:44:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 6241 112 8888 67 385 297 0 26000 23 16 0 61 1 31 0 13 4588 114 9072 63 406 314 0 22331 18 13 0 68 2 10 0 0 3645 12 7474 47 264 258 0 17254 16 11 0 73 3 12 0 0 3938 36 8002 64 334 272 0 19069 15 11 0 74 4 5 0 3 2850 119 5424 32 280 308 0 13414 13 8 0 79 5 8 0 14 2113 17 4540 33 215 312 0 13953 13 8 0 79 6 26 0 0 3611 16 7614 61 324 294 0 17830 16 11 0 73 7 17 0 0 2678 16 5461 31 166 303 0 11540 10 7 0 83 March 4, 2026 at 01:44:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 6622 112 9668 118 540 496 0 26441 25 17 0 58 1 10 0 10 5114 110 10476 106 575 574 0 23951 20 15 0 65 2 9 0 0 3841 18 7791 87 409 494 0 19436 17 12 0 72 3 22 0 0 4453 121 9018 98 446 636 0 20558 17 12 0 71 4 2 0 3 2587 115 4922 59 356 527 0 13917 12 8 0 79 5 10 0 14 2134 14 4372 46 256 500 0 9876 10 6 0 84 6 7 0 0 2826 12 6027 59 337 533 0 14462 14 9 0 77 7 6 0 0 2203 16 4562 32 224 411 0 10219 9 7 0 84 March 4, 2026 at 01:45:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3394 103 2695 21 119 17 0 5898 6 4 0 90 1 3 0 11 1438 107 2754 25 101 42 0 8613 7 5 0 88 2 2 0 0 1064 11 2240 14 78 41 0 5201 5 3 0 92 3 1 0 0 1211 4 2391 12 88 23 0 6117 4 3 0 93 4 0 0 2 954 111 1518 9 74 16 0 4207 4 2 0 94 5 0 0 14 795 4 1564 4 36 24 0 3390 2 2 0 96 6 2 0 0 731 1 1558 12 49 39 0 4378 4 3 0 93 7 12 0 0 608 41 1200 4 35 30 0 3469 3 2 0 95 March 4, 2026 at 01:45:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 107 1 1 0 0 1 0 0 0 100 1 0 0 10 212 104 6 1 0 0 0 559 0 0 0 100 2 0 0 0 30 11 24 1 1 0 0 34 0 0 0 100 3 0 0 0 23 3 50 0 1 1 0 1433 0 0 0 100 4 0 0 4 215 104 10 1 1 0 0 297 0 0 0 100 5 2 0 14 20 9 16 0 2 1 0 278 0 0 0 100 6 1 0 0 10 0 8 0 1 0 1 8 0 0 0 100 7 0 0 0 122 55 120 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:45:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 0 0 100 1 0 0 11 216 104 12 0 1 0 0 579 0 0 0 100 2 0 0 0 31 10 28 0 0 0 0 21 0 0 0 100 3 0 0 0 21 3 46 1 1 0 0 1430 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 14 15 5 10 0 0 0 0 266 0 0 0 100 6 0 0 0 11 0 12 0 1 0 0 0 0 0 0 100 7 0 0 0 111 52 106 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:45:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2137 104 158 1 13 152 0 7 0 1 0 99 1 0 0 10 230 104 48 1 11 168 0 563 0 1 0 99 2 0 0 0 37 5 60 1 14 172 0 17 0 1 0 99 3 0 0 0 78 30 108 2 17 155 0 1439 0 1 0 99 4 0 0 3 242 105 78 0 26 199 0 294 0 0 0 100 5 0 0 14 58 6 116 0 22 164 0 267 0 0 0 100 6 0 0 0 28 1 57 0 22 173 0 0 0 1 0 99 7 0 0 0 140 52 167 1 15 197 0 7 0 1 0 99 March 4, 2026 at 01:45:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2187 100 258 0 27 301 0 0 0 1 0 99 1 0 0 10 275 105 136 0 32 290 0 597 0 0 0 99 2 0 0 0 83 0 150 0 22 238 0 0 0 0 0 100 3 0 0 0 180 100 179 1 25 285 0 1436 0 1 0 99 4 0 0 3 285 103 167 1 29 262 0 241 0 0 0 100 5 0 0 14 272 53 436 2 25 313 0 266 0 1 0 99 6 0 0 0 86 0 182 0 36 247 0 0 0 0 0 100 7 0 0 0 77 2 141 0 23 268 0 0 0 0 0 100 March 4, 2026 at 01:45:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 110 0 1 0 0 0 0 0 0 100 1 0 0 10 214 105 8 1 0 0 0 854 0 0 0 100 2 0 0 0 14 3 8 0 0 0 0 3 0 0 0 100 3 0 0 0 33 9 56 2 0 0 0 1432 0 0 0 99 4 0 0 3 309 153 102 0 0 0 0 0 0 0 0 100 5 0 0 14 11 3 8 0 0 0 0 266 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 8 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:45:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 0 0 0 0 100 1 0 0 10 221 105 20 0 2 0 0 853 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 35 9 60 1 0 0 0 1433 0 0 0 99 4 0 0 3 313 153 106 0 0 0 0 3 0 0 0 100 5 0 0 14 29 13 24 0 1 1 0 282 0 0 0 100 6 0 0 0 8 0 6 0 0 0 0 7 0 0 0 100 7 0 0 0 15 2 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:45:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2505 104 713 43 113 10 0 2815 17 3 0 80 1 7 0 3 596 109 614 38 112 9 0 3595 24 2 0 74 2 4 0 0 351 10 538 34 97 6 0 2779 18 2 0 80 3 17 0 0 395 12 634 60 105 10 0 3848 23 2 0 75 4 11 0 360 583 129 629 46 110 15 0 3359 18 2 0 80 5 12 0 14 427 6 730 42 94 12 0 3391 13 2 0 85 6 1323 0 0 333 9 530 22 92 7 1 3365 15 2 0 83 7 20 0 0 304 3 465 36 72 10 0 2138 15 1 0 83 March 4, 2026 at 01:45:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2539 105 657 25 107 15 0 2797 30 3 0 67 1 3 0 4 697 113 745 36 153 27 0 4090 33 3 0 64 2 3 0 0 497 7 704 22 122 23 0 3026 22 2 0 76 3 0 0 0 513 13 797 39 140 18 0 5062 24 3 0 74 4 0 0 499 644 113 776 31 142 12 0 3918 20 2 0 77 5 0 0 14 432 9 663 16 114 21 0 3270 13 2 0 85 6 0 0 0 453 15 700 26 118 20 0 3796 18 2 0 80 7 0 0 0 430 8 635 14 81 15 0 3318 16 2 0 83 March 4, 2026 at 01:45:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2539 106 719 26 120 15 0 2602 22 3 0 75 1 0 0 10 647 111 640 29 131 14 0 3820 26 2 0 72 2 0 0 0 475 12 757 27 107 21 0 3429 20 2 0 78 3 0 0 0 376 8 586 29 104 16 0 3976 28 2 0 69 4 0 0 367 601 112 713 30 127 17 0 3740 26 2 0 72 5 0 0 14 422 8 624 24 95 13 0 3380 17 2 0 81 6 1 0 0 435 11 660 32 116 19 0 3482 19 2 0 78 7 3 0 0 407 11 660 18 92 9 0 3652 14 2 0 84 March 4, 2026 at 01:45:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 104 100 1 6 0 0 91 2 0 0 97 1 0 0 11 273 112 62 1 5 1 0 888 2 0 0 98 2 0 0 0 18 1 12 1 1 0 0 15 2 0 0 98 3 2 0 0 17 1 44 2 1 1 0 1187 2 1 0 98 4 2 0 16 311 153 106 1 0 0 0 2 0 0 0 100 5 5 0 14 18 3 20 0 3 5 0 298 0 0 0 100 6 0 0 0 13 1 9 1 1 0 0 23 1 0 0 99 7 4 0 0 19 3 10 1 1 0 0 330 2 0 0 98 March 4, 2026 at 01:45:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 0 0 0 0 0 0 0 100 1 0 0 11 239 111 36 0 1 0 0 862 0 0 0 100 2 0 0 0 16 4 12 0 1 0 0 5 0 0 0 100 3 0 0 0 15 2 40 1 0 0 0 1138 0 0 0 99 4 0 0 2 311 153 104 0 0 0 0 0 0 0 0 100 5 0 0 14 25 10 20 0 1 0 0 280 0 0 0 100 6 0 0 0 9 1 6 0 0 0 0 7 0 0 0 100 7 0 0 0 14 2 10 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:45:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 102 0 0 0 0 0 0 0 0 100 1 0 0 10 227 106 20 1 0 0 0 854 0 0 0 100 2 0 0 0 31 9 30 0 1 0 0 11 0 0 0 100 3 0 0 0 11 2 36 1 0 1 0 1132 0 0 0 99 4 0 0 3 309 153 102 0 0 0 0 0 0 0 0 100 5 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 6 0 2 0 0 303 0 0 0 100 March 4, 2026 at 01:45:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 108 123 0 1 1 0 12 0 0 0 99 1 0 0 14 236 109 26 1 1 2 0 862 0 0 0 100 2 0 0 0 20 4 12 0 0 4 0 16 0 0 0 100 3 0 0 0 15 3 38 1 0 1 0 1133 0 0 0 100 4 0 0 7 315 153 112 0 1 0 0 0 0 0 0 100 5 0 0 14 19 5 14 1 0 1 0 270 0 0 0 100 6 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 15 2 10 0 0 3 0 308 0 0 0 100 March 4, 2026 at 01:45:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2435 104 639 23 59 5 1 1407 5 2 0 94 1 50 0 10 270 106 51 6 10 83 0 4018 6 2 0 92 2 2 0 49 384 2 728 38 75 23 0 1511 3 1 0 96 3 0 0 0 435 49 734 26 64 11 0 2538 4 1 0 95 4 3 0 135 264 109 50 7 9 84 0 3136 6 4 0 90 5 2 0 14 366 3 641 21 56 11 0 1616 3 1 0 96 6 0 0 0 384 3 603 31 54 26 0 1853 3 1 0 95 7 0 0 0 133 2 206 7 20 55 0 3093 5 2 0 93 March 4, 2026 at 01:45:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2136 100 67 0 12 4 0 63 0 1 0 99 1 759 0 10 256 107 40 1 6 4 3 7363 2 1 0 97 2 792 0 113 32 2 55 3 6 4 13 122 0 0 0 99 3 1974 0 7 96 21 156 4 12 8 17 1473 1 1 0 98 4 81 0 6 336 140 157 0 18 11 11 191 0 0 0 100 5 25 0 14 50 2 64 0 13 7 8 401 0 0 0 100 6 27 0 0 50 1 54 0 9 4 7 119 0 0 0 100 7 5 0 0 96 1 84 0 4 2 3 341 0 0 0 100 March 4, 2026 at 01:45:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2106 100 107 0 0 0 0 0 0 1 0 99 1 0 0 10 244 107 20 1 0 0 0 854 0 0 0 100 2 0 0 0 27 2 6 0 0 0 0 2 0 0 0 100 3 0 0 0 43 7 52 1 1 0 0 1138 0 0 0 100 4 0 0 3 327 153 106 0 1 0 0 0 0 0 0 100 5 0 0 14 39 10 16 0 1 1 0 279 0 0 0 100 6 0 0 0 26 1 6 0 0 0 0 5 0 0 0 100 7 0 0 0 29 1 10 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 10 228 107 20 1 0 0 0 854 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 24 8 48 1 0 0 0 1130 0 0 0 100 4 0 0 3 312 153 104 0 0 0 0 0 0 0 0 100 5 0 0 14 16 2 16 1 1 0 0 266 0 0 0 100 6 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 10 1 2 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 101 147 0 13 257 1 51 0 2 0 98 1 0 0 10 252 107 78 2 20 271 0 1679 0 2 0 98 2 0 0 0 51 11 61 1 9 203 0 96 0 1 0 98 3 0 0 0 60 22 153 2 24 248 0 1292 0 1 0 99 4 0 0 3 329 152 148 1 17 278 0 60 0 2 0 98 5 0 0 14 35 5 48 1 8 226 0 287 0 1 0 98 6 0 0 0 38 2 77 0 20 243 0 42 0 1 0 99 7 0 0 0 28 1 46 1 11 281 0 1122 0 1 0 98 March 4, 2026 at 01:45:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2337 100 600 1 135 1526 0 0 0 3 0 97 1 0 0 11 567 158 631 3 119 1682 0 966 0 2 0 98 2 0 0 0 301 7 638 0 107 1655 0 12 0 2 0 98 3 0 0 0 480 229 877 3 138 1539 0 578 0 3 0 97 4 0 0 2 430 105 690 1 141 1536 0 332 0 2 0 98 5 0 0 14 222 2 484 1 115 1395 0 266 0 2 0 98 6 0 0 0 228 3 542 2 124 1534 0 434 0 2 0 98 7 0 0 0 218 1 454 2 89 1255 0 300 0 2 0 98 March 4, 2026 at 01:45:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 0 0 0 0 0 0 100 1 0 0 11 321 157 116 0 0 0 0 562 0 0 0 100 2 0 0 0 21 8 16 0 0 0 0 14 0 0 0 100 3 0 0 0 9 0 6 0 0 0 0 1 0 0 0 100 4 0 0 2 213 105 6 0 0 0 0 4 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 14 3 38 1 0 2 0 1415 0 0 0 100 7 0 0 0 14 1 14 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:45:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 122 0 1 0 0 0 0 0 0 100 1 0 0 11 316 156 110 1 0 0 0 560 0 0 0 100 2 0 0 0 21 8 16 0 0 0 0 28 0 0 0 100 3 0 0 0 14 1 10 0 0 0 0 7 0 0 0 100 4 0 0 2 210 103 4 0 0 0 0 0 0 0 0 100 5 0 0 14 25 12 18 1 0 0 0 279 0 0 0 100 6 0 0 0 15 3 40 1 0 1 0 1420 0 0 0 100 7 0 0 0 16 2 12 0 2 0 0 301 0 0 0 100 March 4, 2026 at 01:45:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 116 0 0 0 0 6 0 0 0 99 1 0 0 10 317 156 112 0 1 0 0 561 0 0 0 100 2 0 0 0 25 9 22 0 0 0 0 29 0 0 0 100 3 0 0 0 11 1 8 0 0 0 0 25 0 0 0 100 4 0 0 3 213 103 10 0 0 1 0 11 0 0 0 100 5 0 0 14 9 3 6 0 0 0 0 267 0 0 0 100 6 0 0 0 12 3 36 1 0 1 0 1415 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 103 122 0 1 2 0 7 0 0 0 100 1 0 0 10 324 156 126 0 1 1 0 567 0 0 0 100 2 0 0 0 24 8 18 0 0 1 0 13 0 0 0 100 3 0 0 0 14 2 10 0 1 4 0 5 0 0 0 100 4 0 0 3 214 103 10 0 1 1 0 0 0 0 0 100 5 0 0 14 11 4 6 0 0 1 0 267 0 0 0 100 6 0 0 0 17 5 40 1 0 1 0 1415 0 0 0 100 7 0 0 0 12 2 6 0 0 3 0 303 0 0 0 100 March 4, 2026 at 01:45:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2107 101 112 0 0 0 0 5 0 0 0 100 1 0 0 10 318 156 112 0 1 0 0 560 0 0 0 100 2 0 0 0 29 9 28 1 1 0 0 16 0 0 0 100 3 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 12 3 36 1 0 0 0 1411 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 0 0 10 319 156 112 1 0 0 0 561 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 10 0 0 0 100 3 0 0 0 10 1 6 0 0 0 0 2 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 4 1 0 0 0 266 0 0 0 100 6 0 0 0 12 3 36 1 0 0 0 1410 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:45:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 113 0 1 0 0 0 0 0 0 100 1 0 0 10 319 157 114 0 1 0 0 561 0 0 0 100 2 0 0 0 21 7 14 0 1 0 0 9 0 0 0 100 3 0 0 0 10 0 6 0 0 0 0 1 0 0 0 100 4 0 0 3 217 103 17 0 1 0 0 0 0 0 0 100 5 0 0 14 22 11 12 0 0 1 0 273 0 0 0 100 6 0 0 0 17 3 46 1 1 0 0 1422 0 0 0 100 7 0 0 0 14 1 10 0 1 0 0 305 0 0 0 100 March 4, 2026 at 01:45:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 108 0 0 0 0 0 0 0 0 100 1 0 0 10 320 158 114 0 0 0 0 563 0 0 0 100 2 0 0 0 9 2 2 0 0 0 0 1 0 0 0 100 3 0 0 0 10 1 6 0 0 0 0 2 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 14 12 2 14 0 1 0 0 265 0 0 0 100 6 0 0 0 13 3 36 2 0 1 0 1410 0 0 0 100 7 0 0 0 19 5 16 0 2 0 0 306 0 0 0 100 March 4, 2026 at 01:45:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 116 0 0 2 0 8 0 0 0 100 1 0 0 10 322 158 118 0 0 0 0 575 0 0 0 100 2 0 0 0 6 0 2 0 1 0 0 3 0 0 0 100 3 0 0 0 10 0 8 0 0 2 0 3 0 0 0 100 4 0 0 3 212 103 8 0 0 0 0 0 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 17 5 42 1 0 0 0 1412 0 0 0 100 7 0 0 0 27 8 24 1 0 0 0 314 0 0 0 100 March 4, 2026 at 01:45:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 10 321 157 114 1 0 0 0 560 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 10 1 6 0 0 0 0 2 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 1 0 0 0 100 5 0 0 14 10 2 6 1 0 0 0 266 0 0 0 100 6 0 0 0 17 3 46 1 1 0 0 1410 0 0 0 100 7 0 0 0 21 7 16 0 0 0 0 309 0 0 0 100 March 4, 2026 at 01:45:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 0 0 100 1 0 0 10 322 159 116 0 0 0 0 565 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 19 5 42 2 1 0 0 1434 0 0 0 100 7 0 0 0 28 8 28 0 1 0 0 307 0 0 0 100 March 4, 2026 at 01:45:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 0 0 100 1 0 0 10 316 156 110 0 0 0 0 561 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 14 1 14 0 1 0 0 13 0 0 0 100 4 0 0 3 211 103 6 0 1 0 0 5 0 0 0 100 5 0 0 14 16 7 10 0 1 0 0 271 0 0 0 100 6 0 0 0 15 4 40 1 0 0 0 1412 0 0 0 100 7 0 0 0 27 8 22 0 0 0 0 310 0 0 0 100 March 4, 2026 at 01:45:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 240 0 0 5891 106 8581 75 316 133 0 28121 20 13 0 66 1 59 0 3 3769 128 7335 67 340 116 0 18423 15 10 0 75 2 169 0 0 2913 4 5820 53 221 86 0 13434 12 8 0 80 3 19 0 0 3137 10 6472 60 243 77 0 15530 16 8 0 76 4 38 0 3 2391 115 4418 28 196 112 0 11284 11 7 0 82 5 136 0 14 1695 13 3512 13 112 118 0 8510 8 5 0 87 6 26 0 7 2259 10 4731 32 182 77 0 15728 12 8 0 80 7 8 0 0 1811 8 3771 20 114 47 0 8733 8 5 0 86 March 4, 2026 at 01:45:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 6495 108 9301 72 382 293 0 24912 25 16 0 59 1 21 0 7 4653 117 9228 60 400 376 0 23569 21 14 0 65 2 23 0 0 3760 10 7734 47 302 276 0 18596 16 12 0 72 3 10 0 0 4297 46 8974 58 369 262 0 20591 18 12 0 70 4 36 0 7 2828 114 5535 27 275 293 0 15128 14 10 0 76 5 4 0 0 2364 14 4966 36 208 334 0 10991 11 7 0 82 6 42 0 21 3008 14 6378 41 255 284 0 16764 13 10 0 77 7 2 0 0 2075 14 4164 31 149 201 0 9700 7 6 0 87 March 4, 2026 at 01:45:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 6471 111 9186 90 444 501 0 23231 21 15 0 64 1 4 0 3 4596 121 9071 85 478 547 0 24001 21 14 0 65 2 1 0 0 3941 13 7896 59 304 512 0 17130 16 11 0 73 3 5 0 7 4054 98 8176 73 369 525 0 18837 16 11 0 73 4 2 0 3 3210 116 6296 50 336 489 0 15815 14 10 0 76 5 2 0 0 2417 16 5032 31 230 554 1 13422 14 9 0 78 6 1 0 14 3051 17 6373 50 312 500 0 14985 13 9 0 79 7 1 0 0 2304 8 4834 35 193 566 0 11809 10 7 0 82 March 4, 2026 at 01:45:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3364 103 2732 25 106 22 0 6321 6 4 0 90 1 0 0 4 1581 110 2900 31 116 38 0 7174 6 4 0 90 2 0 0 0 1210 40 2295 22 88 26 0 5533 4 3 0 93 3 0 0 7 947 7 1935 22 84 28 0 4924 4 3 0 93 4 0 0 2 909 104 1348 8 60 18 0 3591 3 2 0 95 5 0 0 0 427 5 760 2 34 27 0 1829 1 1 0 98 6 0 0 14 802 7 1768 14 67 60 0 5475 5 3 0 92 7 0 0 0 412 6 839 6 38 19 0 3033 2 1 0 96 March 4, 2026 at 01:45:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 108 0 0 0 0 300 0 0 0 100 1 0 0 3 233 113 26 0 1 0 0 311 0 0 0 100 2 0 0 0 111 52 134 1 0 0 0 1125 0 0 0 100 3 0 0 7 18 4 16 0 0 0 0 264 0 0 0 100 4 0 0 3 220 103 22 0 1 0 0 7 0 0 0 100 5 0 0 0 21 7 10 1 0 0 0 299 0 0 0 100 6 0 0 14 11 2 10 1 1 0 0 275 0 0 0 100 7 0 0 0 15 0 12 0 3 0 0 1 0 0 0 100 March 4, 2026 at 01:45:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 102 0 0 0 0 299 0 0 0 99 1 0 0 4 226 110 20 0 0 0 0 310 0 0 0 100 2 0 0 0 110 52 134 1 0 0 0 1125 0 0 0 100 3 0 0 7 14 3 10 1 0 0 0 262 0 0 0 100 4 0 0 2 210 103 4 0 0 0 0 3 0 0 0 100 5 0 0 0 11 2 6 0 1 0 0 294 0 0 0 100 6 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 7 0 0 0 15 0 10 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:45:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 102 147 1 11 175 0 306 0 1 0 99 1 0 0 3 257 116 71 1 15 185 0 319 0 1 0 99 2 0 0 0 134 52 188 2 17 185 0 1131 0 1 0 99 3 0 0 7 52 22 51 1 14 187 0 262 0 1 0 99 4 0 0 3 255 104 118 0 25 188 0 1 0 0 0 100 5 0 0 0 33 2 57 1 17 207 0 294 0 1 0 99 6 0 0 14 31 4 56 0 13 190 0 268 0 1 0 99 7 0 0 0 38 0 63 0 11 194 0 3 0 0 0 100 March 4, 2026 at 01:45:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 101 193 0 21 247 0 300 0 1 0 99 1 0 0 4 266 103 120 0 27 302 0 300 0 0 0 100 2 0 0 0 79 3 178 1 16 236 0 1126 0 1 0 99 3 0 0 7 148 76 139 0 24 285 0 262 0 1 0 99 4 0 0 2 455 160 396 0 34 203 0 10 0 1 0 99 5 0 0 0 73 2 144 1 31 232 0 294 0 0 0 100 6 0 0 14 83 2 151 0 29 235 0 266 0 0 0 100 7 1 0 0 74 2 132 0 20 279 0 2 0 0 0 100 March 4, 2026 at 01:45:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 102 0 0 0 0 300 0 0 0 100 1 0 0 3 217 106 10 0 0 0 0 303 0 0 0 100 2 0 0 0 9 2 34 0 0 1 0 1126 0 0 0 100 3 0 0 7 11 2 8 0 0 0 0 260 0 0 0 100 4 0 0 3 321 159 114 0 0 0 0 9 0 0 0 100 5 0 0 0 12 2 6 1 0 0 0 294 0 0 0 100 6 0 0 14 8 2 4 1 0 0 0 266 0 0 0 100 7 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:45:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 108 0 0 0 0 300 0 0 0 100 1 0 0 3 211 103 4 0 0 0 0 300 0 0 0 100 2 0 0 0 14 4 38 1 0 1 0 1146 0 0 0 100 3 0 0 7 14 3 10 1 0 0 0 262 0 0 0 100 4 0 0 3 324 159 120 0 0 0 0 13 0 0 0 100 5 0 0 0 20 7 10 0 0 0 0 298 0 0 0 100 6 0 0 14 17 4 18 1 0 0 0 280 0 0 0 100 7 0 0 0 25 1 26 0 1 1 0 1 0 0 0 100 March 4, 2026 at 01:45:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1322 0 0 2506 109 709 28 105 20 1 2667 17 3 0 80 1 6 0 3 634 106 724 77 119 9 1 4003 17 2 0 80 2 2 0 0 372 7 650 76 102 28 0 3748 22 2 0 75 3 8 0 7 357 12 531 26 107 12 0 3065 27 2 0 71 4 20 0 381 551 121 632 37 123 15 0 2995 21 2 0 77 5 23 0 0 324 9 480 14 87 6 0 3270 18 2 0 81 6 265 0 14 383 16 587 22 105 22 0 3860 14 2 0 85 7 0 0 0 408 3 621 17 81 12 0 2714 12 1 0 86 March 4, 2026 at 01:45:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2523 112 611 30 106 19 0 2888 28 3 0 69 1 0 0 7 679 120 648 38 142 23 0 3723 30 2 0 68 2 0 0 0 502 13 788 28 116 19 0 4427 23 3 0 75 3 0 0 0 437 14 633 40 127 35 0 3559 31 2 0 67 4 0 0 413 666 112 855 29 141 19 0 4364 16 3 0 81 5 3 0 0 437 5 649 15 111 17 0 3368 15 2 0 83 6 0 0 14 476 13 748 31 135 24 0 4306 18 2 0 80 7 3 0 0 462 12 706 23 101 19 0 3318 16 2 0 82 March 4, 2026 at 01:45:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2520 111 634 33 93 11 0 2570 31 3 0 66 1 0 0 3 606 114 534 30 116 14 0 3389 35 2 0 63 2 0 0 7 500 16 772 38 129 21 0 5002 25 2 0 73 3 0 0 0 454 9 685 23 127 25 0 3877 19 2 0 79 4 1 0 437 593 110 701 29 137 15 0 3829 15 2 0 83 5 0 0 0 446 11 699 21 102 15 0 3066 15 2 0 83 6 3 0 14 430 3 682 27 113 19 0 3780 19 2 0 79 7 1 0 0 422 3 615 22 75 14 0 2807 14 2 0 84 March 4, 2026 at 01:45:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 103 68 1 5 0 0 67 0 0 0 99 1 4 0 4 214 102 6 0 1 1 0 309 0 0 0 100 2 0 0 7 22 6 46 2 0 0 0 1694 0 0 0 100 3 0 0 0 29 4 36 1 3 0 0 103 2 0 0 97 4 0 0 3 217 104 16 0 1 3 0 313 0 0 0 100 5 0 0 0 20 2 16 1 0 0 0 13 3 0 0 96 6 2 0 14 29 7 32 1 2 1 0 310 2 0 0 98 7 0 0 0 172 50 168 0 2 3 0 16 0 0 0 100 March 4, 2026 at 01:45:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 103 114 0 1 0 0 6 0 0 0 100 1 0 0 4 209 102 2 0 0 0 0 300 0 0 0 100 2 0 0 7 17 6 42 1 0 1 0 1689 0 0 0 100 3 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 4 0 0 2 214 104 10 0 0 0 0 301 0 0 0 100 5 0 0 0 18 7 6 0 1 1 0 5 0 0 0 100 6 0 0 14 28 9 30 0 0 0 0 289 0 0 0 100 7 0 0 0 122 52 120 0 2 0 0 0 0 0 0 100 March 4, 2026 at 01:45:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 102 0 0 0 0 0 0 0 0 100 1 0 0 4 209 102 2 0 0 0 0 300 0 0 0 100 2 0 0 7 17 6 42 1 0 0 0 1691 0 0 0 100 3 0 0 0 12 1 8 0 0 0 0 2 0 0 0 100 4 0 0 2 218 104 18 0 1 0 0 297 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 14 24 10 20 0 0 0 0 277 0 0 0 100 7 0 0 0 119 52 114 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:45:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 108 1 0 3 0 6 0 0 0 100 1 0 0 4 210 102 4 0 0 0 0 300 0 0 0 100 2 0 0 7 20 6 48 1 0 1 0 1694 0 0 0 100 3 0 0 0 12 0 12 0 0 1 0 8 0 0 0 100 4 0 0 2 218 105 12 1 1 0 0 298 0 0 0 100 5 0 0 0 13 0 14 0 2 0 0 8 0 0 0 100 6 0 0 14 27 10 24 1 0 0 0 279 0 0 0 100 7 0 0 0 120 52 116 0 2 1 0 0 0 0 0 100 March 4, 2026 at 01:45:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 14 2156 100 57 16 10 241 0 3034 6 3 0 91 1 3 0 4 495 103 588 27 67 117 1 3435 5 2 0 93 2 1 0 7 290 47 493 19 48 125 0 4243 5 2 0 94 3 0 0 0 521 3 926 51 84 27 1 2590 5 1 0 93 4 0 0 128 372 109 320 16 28 198 0 3272 5 2 0 93 5 0 0 7 378 1 722 19 64 53 0 2290 3 1 0 96 6 40 0 22 307 5 579 15 47 92 0 2726 4 3 0 93 7 0 0 0 351 9 661 30 63 43 0 2360 4 1 0 95 March 4, 2026 at 01:45:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 3 0 0 0 0 0 0 0 0 100 1 0 0 3 211 102 2 0 0 0 0 300 0 0 0 100 2 0 0 7 49 22 72 0 0 0 0 1601 0 0 0 100 3 0 0 0 180 35 176 0 1 0 0 0 0 0 0 100 4 0 0 3 222 108 14 0 1 0 0 299 0 0 0 100 5 0 0 7 18 3 12 0 0 0 0 3 0 0 0 100 6 0 0 14 19 1 20 0 1 0 0 266 0 0 0 100 7 0 0 0 16 4 10 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:45:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2105 100 67 0 2 0 0 0 0 1 0 99 1 0 0 4 228 102 4 0 1 0 0 300 0 0 0 100 2 0 0 7 36 7 44 1 0 2 0 1602 0 0 0 100 3 0 0 0 169 51 146 0 0 0 0 2 0 0 0 100 4 0 0 2 242 109 20 1 0 0 0 307 0 0 0 100 5 0 0 0 40 9 12 0 1 0 0 7 0 0 0 100 6 0 0 14 42 4 28 0 1 0 0 281 0 0 0 100 7 0 0 0 38 4 22 0 1 3 0 1 0 0 0 100 March 4, 2026 at 01:45:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 100 104 0 0 0 0 0 0 0 0 100 1 0 0 3 210 102 2 0 0 0 0 300 0 0 0 100 2 0 0 7 20 7 44 1 0 1 0 1602 0 0 0 100 3 0 0 0 111 51 106 0 1 0 0 1 0 0 0 100 4 0 0 3 214 104 4 1 0 0 0 295 0 0 0 100 5 0 0 0 19 5 14 0 1 0 0 7 0 0 0 100 6 1 0 14 15 1 10 1 0 0 0 286 0 0 0 100 7 0 0 0 14 3 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:45:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 101 162 2 22 278 0 846 0 2 0 98 1 0 0 3 227 102 45 1 17 301 0 340 0 1 0 98 2 0 0 7 53 12 105 3 14 187 0 1653 0 2 0 98 3 0 0 0 151 68 148 1 13 199 0 148 0 2 0 98 4 0 0 3 229 104 34 2 9 209 0 1158 0 2 0 98 5 0 0 0 55 6 105 0 19 253 0 38 0 1 0 99 6 0 0 14 34 4 57 0 16 298 0 290 0 1 0 99 7 0 0 0 36 4 56 1 12 223 0 27 0 1 0 99 March 4, 2026 at 01:45:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1566 0 112 2319 100 583 3 121 1671 13 6641 2 4 0 94 1 101 0 4 556 144 649 1 144 1591 16 210 0 2 0 97 2 32 0 8 261 14 541 2 123 1472 11 1817 0 2 0 97 3 67 0 0 447 194 915 0 139 1432 7 155 0 2 0 98 4 9 0 2 434 104 482 1 136 1559 2 643 0 2 0 98 5 25 0 0 210 0 444 0 93 1444 4 46 0 2 0 98 6 0 0 14 235 6 498 0 135 1565 0 331 0 2 0 98 7 1883 0 0 205 3 422 2 98 1384 3 298 0 2 0 97 March 4, 2026 at 01:45:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 0 0 100 1 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 2 0 0 7 26 11 52 0 0 0 0 1693 0 0 0 99 3 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 4 1 0 3 213 105 6 0 0 0 0 598 0 0 0 100 5 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 6 0 0 14 19 4 16 0 0 0 0 272 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:45:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 1 0 0 0 0 0 100 1 0 0 3 309 151 102 0 0 0 0 0 0 0 0 100 2 0 0 7 30 10 60 1 1 0 0 1687 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 215 104 10 0 0 0 0 602 0 0 0 100 5 0 0 0 18 5 8 0 0 0 0 5 0 0 0 100 6 0 0 14 23 3 24 1 0 0 0 280 0 0 0 100 7 0 0 0 17 3 14 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:45:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 106 0 0 0 0 6 0 0 0 100 1 0 0 3 308 151 102 0 0 0 0 24 0 0 0 100 2 0 0 7 35 12 60 3 0 0 0 1702 0 0 0 99 3 0 0 0 13 1 14 0 1 0 0 2 0 0 0 100 4 0 0 3 211 104 4 1 0 0 0 594 0 0 0 100 5 0 0 0 11 0 8 0 0 0 0 4 0 0 0 100 6 0 0 14 17 3 14 0 0 0 0 271 0 0 0 100 7 0 0 0 17 3 16 0 2 0 0 11 0 0 0 100 March 4, 2026 at 01:45:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 110 0 0 1 0 7 0 0 0 100 1 0 0 3 313 153 108 0 1 3 0 4 0 0 0 100 2 0 0 7 33 12 62 1 0 0 0 1695 0 0 0 99 3 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 4 0 0 3 215 105 10 0 1 1 0 597 0 0 0 100 5 0 0 0 15 2 10 0 0 0 0 5 0 0 0 100 6 0 0 14 21 4 20 0 2 2 0 268 0 0 0 100 7 0 0 0 19 5 16 0 1 1 0 0 0 0 0 100 March 4, 2026 at 01:45:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 102 0 0 0 0 7 0 0 0 100 1 1 0 4 308 151 104 0 0 0 0 2 0 0 0 100 2 2 0 7 37 15 64 0 1 0 0 1693 0 0 0 99 3 1 0 0 11 1 8 0 1 1 0 3 0 0 0 100 4 1 0 2 219 105 18 0 2 1 0 596 0 0 0 100 5 1 0 0 12 0 8 0 1 0 0 1 0 0 0 100 6 3 0 14 22 5 20 0 0 0 0 279 0 0 0 100 7 21 0 0 16 4 12 0 1 0 0 16 0 0 0 100 March 4, 2026 at 01:46:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 100 0 0 0 0 0 0 0 0 100 1 0 0 3 309 151 102 0 1 0 0 0 0 0 0 100 2 0 0 7 27 11 52 1 0 0 0 1684 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 214 104 6 1 1 0 0 593 0 0 0 100 5 0 0 0 14 0 14 0 1 0 0 0 0 0 0 100 6 0 0 14 14 1 10 1 0 0 0 266 0 0 0 100 7 0 0 0 15 4 10 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:46:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 0 0 0 0 0 0 100 1 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 2 0 0 7 32 13 56 2 0 0 0 1708 0 0 0 99 3 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 4 0 0 3 214 104 10 0 0 0 0 602 0 0 0 100 5 0 0 0 19 6 8 0 0 1 0 5 0 0 0 100 6 0 0 14 26 5 28 0 0 0 0 282 0 0 0 100 7 0 0 0 19 4 16 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:46:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 0 0 100 1 0 0 3 309 151 104 0 0 0 0 18 0 0 0 100 2 0 0 7 29 12 54 1 0 0 0 1680 0 0 0 99 3 0 0 0 12 2 10 0 0 0 0 10 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 594 0 0 0 100 5 0 0 0 11 0 6 0 0 0 0 0 0 0 0 100 6 0 0 14 20 2 22 0 1 0 0 267 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 108 0 0 5 0 7 0 0 0 100 1 0 0 7 310 151 104 0 0 6 0 3 0 0 0 100 2 0 0 7 42 14 68 2 0 1 0 1690 0 0 0 99 3 0 0 0 12 2 6 0 0 1 0 3 0 0 0 100 4 0 0 7 215 105 10 0 1 0 0 598 0 0 0 100 5 0 0 0 15 1 10 0 0 1 0 7 0 0 0 100 6 0 0 14 31 8 26 0 0 2 0 273 0 0 0 100 7 0 0 0 23 5 20 0 1 2 0 0 0 0 0 100 March 4, 2026 at 01:46:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 4 311 152 104 0 0 0 0 1 0 0 0 100 2 0 0 7 25 10 50 1 0 1 0 1684 0 0 0 99 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 2 212 104 4 1 0 0 0 594 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 6 0 0 14 14 1 10 1 0 0 0 266 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 110 0 1 0 0 0 0 0 0 100 1 1 0 3 311 153 104 0 0 0 0 5 0 0 0 100 2 0 0 7 27 11 52 1 0 1 0 1684 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 599 0 0 0 100 5 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 6 0 0 14 17 3 14 0 0 0 0 271 0 0 0 100 7 0 0 0 16 3 12 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 104 0 0 0 0 0 0 0 0 100 1 0 0 3 314 151 110 0 1 0 0 0 0 0 0 100 2 0 0 7 27 11 52 1 0 0 0 1681 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 216 104 10 0 0 0 0 602 0 0 0 100 5 0 0 0 19 6 8 0 0 0 0 5 0 0 0 100 6 0 0 14 23 4 24 0 0 0 0 280 0 0 0 100 7 0 0 0 16 3 12 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:46:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 6008 107 9062 52 320 78 0 27563 21 13 0 66 1 17 0 4 3984 117 7872 65 362 85 0 21135 21 11 0 68 2 293 0 7 3224 22 6436 53 267 73 0 17133 14 9 0 76 3 42 0 0 3510 9 7353 53 290 79 0 18722 14 10 0 76 4 105 0 2 2054 117 3634 25 220 49 0 8962 8 5 0 86 5 2 0 0 1439 6 3107 13 136 64 0 8793 9 5 0 86 6 27 0 14 2156 12 4567 38 197 54 0 12123 10 7 0 83 7 11 0 0 1577 9 3229 18 111 56 0 7333 6 4 0 89 March 4, 2026 at 01:46:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 6361 110 9248 68 394 353 0 27241 26 18 0 56 1 4 0 5 5115 111 10342 75 459 278 0 23274 20 14 0 66 2 10 0 0 3822 19 7628 54 288 266 0 18877 16 11 0 73 3 9 0 14 4090 30 8709 71 390 311 0 22200 18 13 0 70 4 2 0 9 3137 112 5967 35 285 315 0 13917 12 9 0 79 5 3 0 0 1883 14 3850 22 161 261 0 10029 9 7 0 84 6 3 0 0 2936 10 6150 45 242 240 0 13377 11 8 0 81 7 4 0 0 2049 11 4341 34 153 283 0 12075 11 7 0 81 March 4, 2026 at 01:46:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 6446 103 9110 98 508 487 1 24670 23 16 0 61 1 9 0 17 5098 112 10237 81 546 559 0 23182 20 14 0 66 2 4 0 0 3764 9 7762 56 370 494 0 17300 16 11 0 73 3 2 0 0 4230 135 8728 73 430 513 0 20778 18 13 0 69 4 9 0 3 3178 130 6220 51 378 527 0 15427 14 10 0 76 5 3 0 0 1942 11 4068 26 243 523 1 10127 10 7 0 84 6 4 0 6 2931 13 6288 72 369 515 0 16653 14 10 0 76 7 5 0 1 1981 9 4242 29 225 509 0 11028 10 7 0 84 March 4, 2026 at 01:46:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 3107 109 2095 19 103 20 0 5044 5 4 0 91 1 3 0 17 1157 105 2002 17 94 26 0 5256 4 3 0 93 2 0 0 0 956 3 2039 10 68 30 0 4952 4 3 0 93 3 0 0 0 1066 3 2279 13 84 17 0 5296 4 3 0 93 4 2 0 3 1001 110 1676 10 62 27 0 4989 4 3 0 94 5 3 0 0 608 47 1119 7 46 24 0 4091 3 2 0 95 6 2 0 0 531 4 1095 9 53 10 0 2685 2 2 0 96 7 1 0 7 485 6 982 3 31 27 0 2424 2 1 0 97 March 4, 2026 at 01:46:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 122 2 1 0 0 15 0 0 0 99 1 0 0 17 208 102 4 0 1 0 0 271 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 13 2 10 0 1 0 0 303 0 0 0 100 4 0 0 3 213 104 38 0 0 1 0 1127 0 0 0 100 5 0 0 0 126 58 116 0 0 0 0 598 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 7 0 0 7 30 7 34 0 1 0 0 267 0 0 0 100 March 4, 2026 at 01:46:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 107 126 0 1 0 0 10 0 0 0 99 1 0 0 18 207 102 2 0 0 0 0 266 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 4 0 0 0 100 3 0 0 0 12 2 8 0 1 0 0 301 0 0 0 100 4 0 0 2 213 104 36 2 1 0 0 1125 0 0 0 100 5 0 0 0 120 52 114 1 0 0 0 595 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 0 0 7 19 5 14 0 1 0 0 263 0 0 0 100 March 4, 2026 at 01:46:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 108 180 1 19 132 0 14 0 1 0 99 1 0 0 21 227 103 43 2 15 144 0 273 0 1 0 99 2 0 0 0 28 2 40 0 12 111 0 0 0 0 0 100 3 0 0 0 55 23 61 1 18 145 0 305 0 1 0 99 4 0 0 7 233 105 76 2 14 150 0 1127 0 1 0 99 5 0 0 0 136 53 150 1 16 139 0 564 0 1 0 99 6 0 0 0 38 4 56 2 15 121 0 43 0 0 0 100 7 0 0 7 59 6 102 1 13 155 0 265 0 0 0 100 March 4, 2026 at 01:46:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2172 108 227 0 28 317 0 8 0 1 0 99 1 0 0 17 279 102 161 0 38 366 0 266 0 0 0 100 2 0 0 0 72 1 141 0 28 312 0 0 0 0 0 100 3 0 0 0 146 78 139 0 33 294 0 300 0 0 0 100 4 0 0 3 277 104 177 2 28 372 0 1124 0 1 0 99 5 0 0 0 165 48 229 1 23 244 0 300 0 0 0 100 6 0 0 0 82 4 164 0 28 298 0 299 0 0 0 100 7 0 0 7 180 4 322 0 31 258 0 272 0 0 0 100 March 4, 2026 at 01:46:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 107 124 0 1 0 0 7 0 0 0 99 1 0 0 19 211 102 6 0 2 0 0 266 0 0 0 100 2 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 3 0 0 0 15 2 10 0 0 0 0 302 0 0 0 100 4 0 0 2 211 104 34 0 0 0 0 1126 0 0 0 100 5 0 0 0 109 51 102 0 0 0 0 300 0 0 0 100 6 0 0 0 13 4 8 0 0 0 0 317 0 0 0 100 7 0 0 7 16 5 12 0 0 0 0 265 0 0 0 100 March 4, 2026 at 01:46:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 108 132 1 1 0 0 21 0 0 0 100 1 0 0 18 209 102 6 0 0 0 0 273 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 14 1 10 0 0 0 0 305 0 0 0 100 4 0 0 2 213 104 36 1 0 1 0 1125 0 0 0 100 5 0 0 0 119 56 108 0 2 0 0 300 0 0 0 100 6 0 0 0 12 3 6 1 0 0 0 294 0 0 0 100 7 0 0 7 15 3 12 0 0 0 0 260 0 0 0 100 March 4, 2026 at 01:46:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2501 107 738 29 119 21 0 2749 19 3 0 78 1 7 0 17 546 108 566 39 115 27 0 3112 30 2 0 68 2 1589 0 0 469 16 796 65 116 46 1 3509 10 3 0 87 3 260 0 0 421 18 742 39 126 30 0 3886 22 2 0 76 4 6 0 255 519 111 683 78 118 14 1 3992 21 2 0 76 5 282 0 0 350 19 522 18 74 20 0 2790 14 2 0 84 6 0 0 0 325 5 553 30 107 33 0 3762 19 2 0 79 7 1 0 7 365 6 638 22 108 25 0 3477 13 2 0 85 March 4, 2026 at 01:46:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2561 104 734 39 117 29 0 3084 30 3 0 68 1 0 0 18 627 114 694 35 144 27 0 3937 34 3 0 63 2 0 0 0 553 13 923 65 146 28 0 3736 16 2 0 82 3 0 0 0 433 9 684 21 128 16 0 3972 25 2 0 73 4 3 0 254 632 114 738 28 136 29 0 4236 19 2 0 78 5 3 0 0 491 8 808 25 125 27 0 4499 9 2 0 88 6 0 0 0 388 11 636 28 123 30 0 3740 24 2 0 74 7 3 0 7 388 14 646 27 100 22 0 3160 18 2 0 80 March 4, 2026 at 01:46:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2546 107 739 34 130 36 0 3202 22 3 0 75 1 0 0 19 659 111 740 31 135 28 0 3491 22 2 0 76 2 0 0 0 538 15 946 73 129 50 0 4065 12 2 0 86 3 0 0 0 402 9 658 34 125 62 0 4011 23 2 0 75 4 0 0 198 554 109 646 39 127 22 0 3313 32 2 0 66 5 1 0 0 400 8 628 31 103 23 0 3233 22 2 0 76 6 3 0 0 440 12 783 32 127 31 0 4116 25 2 0 73 7 0 0 7 441 19 705 23 98 48 0 4111 16 2 0 82 March 4, 2026 at 01:46:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 105 102 0 3 1 0 97 1 0 0 99 1 2 0 18 220 104 19 1 4 0 0 285 2 0 0 98 2 1 0 0 16 2 16 1 2 3 0 28 2 0 0 98 3 0 0 0 30 3 34 1 4 0 0 630 4 0 0 96 4 0 0 2 313 153 110 0 3 0 0 12 0 0 0 100 5 0 0 0 22 3 19 0 1 1 0 69 0 0 0 100 6 4 0 2 44 2 66 1 2 5 0 1140 0 0 0 100 7 0 0 7 21 6 16 1 1 1 0 559 0 0 0 100 March 4, 2026 at 01:46:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 109 134 1 1 0 0 20 0 0 0 99 1 0 0 18 219 107 16 0 0 0 0 278 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 22 0 0 0 100 3 0 0 0 24 3 22 0 0 0 0 608 0 0 0 100 4 0 0 2 311 153 106 0 0 0 0 1 0 0 0 100 5 0 0 0 12 5 0 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 1130 0 0 0 100 7 0 0 7 24 5 24 1 1 0 0 554 0 0 0 100 March 4, 2026 at 01:46:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 109 122 0 0 0 0 11 0 0 0 99 1 0 0 18 211 103 6 1 0 0 0 269 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 20 3 16 0 0 0 0 600 0 0 0 100 4 0 0 2 309 153 102 0 0 0 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 32 1 0 0 0 1131 0 0 0 100 7 0 0 7 16 5 12 0 0 0 0 556 0 0 0 100 March 4, 2026 at 01:46:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 54 0 0 2160 109 159 0 8 12 3 64 0 1 0 99 1 0 0 21 251 106 39 0 6 2 0 326 0 0 0 100 2 3437 0 114 33 3 60 4 2 7 15 6858 2 2 0 96 3 120 0 0 129 30 155 1 14 14 14 851 0 0 0 100 4 22 0 8 302 127 118 0 15 11 8 193 0 0 0 100 5 14 0 0 46 2 45 0 7 5 4 125 0 0 0 100 6 13 0 0 41 3 64 1 8 9 3 1253 0 0 0 100 7 5 0 7 44 6 35 0 6 4 3 575 0 0 0 100 March 4, 2026 at 01:46:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 16 2319 103 494 17 56 64 0 2887 5 2 0 93 1 40 0 26 436 104 419 17 43 153 1 3715 6 2 0 92 2 2 0 0 390 19 729 28 69 42 0 2515 4 1 0 94 3 1 0 14 478 35 894 24 69 39 0 2850 6 2 0 92 4 0 0 142 519 104 648 23 56 39 1 3102 4 2 0 94 5 0 0 0 136 1 236 12 23 170 0 2728 6 2 0 93 6 2 0 0 358 2 744 30 71 50 2 3925 5 2 0 94 7 36 0 7 331 5 608 32 63 57 1 3521 5 2 0 94 March 4, 2026 at 01:46:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 0 0 0 0 0 0 0 100 1 0 0 25 210 103 6 0 1 0 0 266 0 0 0 100 2 0 0 0 24 8 16 0 0 0 0 9 0 0 0 100 3 0 0 0 35 13 29 0 1 0 0 302 0 0 0 100 4 0 0 2 299 143 92 0 1 0 0 300 0 0 0 100 5 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 6 0 0 0 11 1 32 1 0 0 0 1121 0 0 0 100 7 0 0 7 16 4 8 1 0 0 0 555 0 0 0 100 March 4, 2026 at 01:46:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 102 115 1 1 0 0 5 0 0 0 100 1 0 0 18 234 105 14 1 1 0 0 275 0 0 0 100 2 0 0 0 39 8 18 0 1 0 0 10 0 0 0 100 3 0 0 112 21 1 21 0 2 0 0 304 0 0 0 100 4 0 0 2 341 154 119 0 1 0 0 300 0 0 0 100 5 0 0 0 27 6 0 0 0 0 0 0 0 0 0 100 6 0 0 0 25 1 32 1 0 0 0 1122 0 0 0 100 7 0 0 7 35 4 19 0 1 0 0 563 0 0 0 100 March 4, 2026 at 01:46:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 0 0 0 0 0 0 100 1 0 0 17 214 105 8 0 0 0 0 268 0 0 0 100 2 0 0 0 22 8 16 0 0 0 0 9 0 0 0 100 3 0 0 7 14 2 10 0 0 0 0 302 0 0 0 100 4 0 0 3 325 154 122 0 1 0 0 300 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 32 0 0 0 0 1120 0 0 0 100 7 0 0 7 17 5 12 0 1 0 0 555 0 0 0 100 March 4, 2026 at 01:46:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 105 173 1 14 218 0 117 0 2 0 98 1 0 0 17 245 106 93 1 20 271 0 1116 0 1 0 99 2 0 0 0 35 6 54 0 9 294 0 64 0 1 0 98 3 0 0 0 39 18 39 2 10 281 0 1139 0 2 0 98 4 0 0 3 266 116 83 3 15 261 0 333 0 1 0 98 5 0 0 0 33 1 61 0 18 227 0 16 0 1 0 99 6 0 0 0 110 41 159 2 8 325 0 1202 0 2 0 98 7 0 0 7 30 5 37 2 7 187 0 589 0 1 0 98 March 4, 2026 at 01:46:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2313 106 563 0 109 1593 0 8 0 2 0 97 1 0 0 17 456 103 564 2 130 1406 0 267 0 2 0 98 2 0 0 0 210 3 464 1 118 1553 0 1 0 2 0 98 3 0 0 0 441 220 501 2 120 1683 0 302 0 3 0 97 4 0 0 3 457 104 559 4 133 1518 0 300 0 2 0 98 5 0 0 0 368 4 779 1 109 1417 0 1 0 2 0 98 6 0 0 0 246 11 576 2 137 1644 1 1125 0 2 0 98 7 0 0 7 289 42 521 2 90 1283 0 565 0 2 0 98 March 4, 2026 at 01:46:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 104 0 0 0 0 1 0 0 0 100 1 0 0 17 232 113 26 1 0 0 0 281 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 4 0 0 3 219 104 12 0 0 0 0 300 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 13 1 42 1 1 0 0 1121 0 0 0 100 7 0 0 7 114 54 110 0 0 0 0 553 0 0 0 100 March 4, 2026 at 01:46:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 114 1 2 0 0 13 0 0 0 100 1 0 0 17 229 110 24 0 0 0 0 283 0 0 0 100 2 0 0 0 12 3 8 0 1 0 0 2 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 302 0 0 0 100 4 0 0 3 220 104 14 0 0 0 0 300 0 0 0 100 5 0 0 0 10 5 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 32 1 0 1 0 1121 0 0 0 100 7 0 0 7 124 57 122 0 1 0 0 560 0 0 0 100 March 4, 2026 at 01:46:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 112 0 0 0 0 9 0 0 0 100 1 0 0 17 220 107 16 1 0 0 0 292 0 0 0 100 2 0 0 0 11 2 8 0 1 0 0 16 0 0 0 100 3 0 0 0 16 3 14 0 0 0 0 310 0 0 0 100 4 0 0 3 220 104 14 0 0 0 0 301 0 0 0 100 5 0 0 0 24 7 22 0 0 0 0 13 0 0 0 100 6 0 0 0 11 1 36 1 1 0 0 1145 0 0 0 100 7 0 0 7 122 55 122 1 1 0 0 554 0 0 0 100 March 4, 2026 at 01:46:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 120 0 1 2 0 0 0 0 0 100 1 0 0 21 213 103 10 0 1 2 0 266 0 0 0 100 2 0 0 0 16 4 8 0 0 1 0 9 0 0 0 100 3 0 0 0 16 3 10 0 0 1 0 305 0 0 0 100 4 0 0 7 223 104 20 0 1 0 0 308 0 0 0 100 5 0 0 0 27 9 23 0 1 2 0 18 0 0 0 100 6 0 0 0 13 3 36 0 0 4 0 1123 0 0 0 100 7 0 0 7 119 55 112 1 1 1 0 555 0 0 0 100 March 4, 2026 at 01:46:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2106 101 106 0 0 0 0 5 0 0 0 100 1 0 0 17 214 105 8 1 0 0 0 269 0 0 0 100 2 1 0 0 11 3 6 0 0 0 0 5 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 4 0 0 3 219 104 12 0 0 0 0 300 0 0 0 100 5 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 6 0 0 0 8 1 32 1 0 0 0 1115 0 0 0 100 7 0 0 7 114 54 110 0 0 0 0 554 0 0 0 100 March 4, 2026 at 01:46:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 2 0 0 0 0 0 0 100 1 0 0 17 216 104 18 0 1 0 0 267 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 302 0 0 0 100 4 0 0 3 214 104 6 0 1 0 0 300 0 0 0 100 5 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 6 0 0 0 8 1 32 1 0 0 0 1116 0 0 0 100 7 0 0 7 114 54 110 0 0 0 0 554 0 0 0 100 March 4, 2026 at 01:46:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 123 1 0 0 0 8 0 0 0 100 1 0 0 17 217 105 14 0 0 0 0 278 0 0 0 100 2 0 0 0 18 2 18 0 1 0 0 5 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 4 0 0 3 214 104 8 0 0 0 0 300 0 0 0 100 5 0 0 0 25 12 12 0 0 0 0 6 0 0 0 100 6 0 0 0 8 1 32 1 0 0 0 1117 0 0 0 100 7 0 0 7 120 54 119 1 1 0 0 562 0 0 0 100 March 4, 2026 at 01:46:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 18 212 104 6 0 0 0 0 267 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 302 0 0 0 100 4 0 0 2 213 104 6 0 1 0 0 300 0 0 0 100 5 0 0 0 17 6 12 0 0 0 0 10 0 0 0 100 6 0 0 0 8 1 32 1 0 0 0 1116 0 0 0 100 7 0 0 7 114 54 110 1 1 0 0 554 0 0 0 100 March 4, 2026 at 01:46:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 1 0 0 0 0 0 100 1 0 0 17 217 105 14 1 0 2 0 268 0 0 0 100 2 0 0 0 14 2 12 0 0 0 0 8 0 0 0 100 3 0 0 0 16 1 18 0 1 0 0 303 0 0 0 100 4 0 0 3 219 106 12 0 0 0 0 310 0 0 0 100 5 0 0 0 22 7 20 0 0 0 0 14 0 0 0 100 6 0 0 0 10 1 36 1 1 5 0 1118 0 0 0 100 7 0 0 7 115 54 112 0 0 3 0 553 0 0 0 100 March 4, 2026 at 01:46:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 112 0 0 0 0 1 0 0 0 100 1 0 0 18 215 106 10 0 0 0 0 270 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 3 0 0 0 12 2 8 0 0 0 0 302 0 0 0 100 4 0 0 2 218 104 16 0 1 0 0 300 0 0 0 100 5 0 0 0 17 6 12 0 0 0 0 6 0 0 0 100 6 0 0 0 8 1 32 1 0 0 0 1116 0 0 0 100 7 0 0 7 114 54 110 0 0 0 0 555 0 0 0 100 March 4, 2026 at 01:46:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 0 0 0 0 0 0 100 1 0 0 17 215 105 10 0 1 0 0 271 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 300 0 0 0 100 5 0 0 0 19 7 14 0 0 0 0 7 0 0 0 100 6 0 0 0 8 1 32 1 0 1 0 1117 0 0 0 100 7 0 0 7 117 55 112 1 0 0 0 554 0 0 0 100 March 4, 2026 at 01:46:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 2 0 0 0 0 0 100 1 0 0 17 211 103 8 0 0 0 0 273 0 0 0 100 2 0 0 0 17 4 12 0 0 0 0 27 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 302 0 0 0 100 4 0 0 3 216 104 10 0 0 0 0 300 0 0 0 100 5 0 0 0 31 13 24 0 2 0 0 9 0 0 0 100 6 0 0 0 8 1 32 1 0 0 0 1115 0 0 0 100 7 0 0 7 126 57 128 3 0 0 0 569 0 0 0 100 March 4, 2026 at 01:46:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43 0 0 5188 106 6449 70 344 112 0 17143 17 11 0 72 1 239 0 4 3521 109 7073 58 315 111 0 17349 15 10 0 74 2 106 0 14 2700 5 5616 46 207 111 0 16981 15 10 0 75 3 14 0 7 3515 12 7251 67 288 53 0 15781 13 9 0 79 4 93 0 2 3197 113 6234 35 208 103 0 20073 13 8 0 79 5 22 0 0 1792 15 3653 13 106 67 0 8249 8 5 0 87 6 148 0 0 2405 5 5041 24 196 94 0 12346 10 7 0 83 7 9 0 0 1181 27 2375 19 110 37 0 9641 11 5 0 85 March 4, 2026 at 01:46:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 6659 110 9578 64 399 236 0 23798 22 16 0 63 1 11 0 7 4719 115 9451 70 412 240 0 22712 19 13 0 68 2 14 0 0 3514 15 7208 50 311 199 1 16728 16 11 0 74 3 14 0 14 4250 37 8840 48 326 214 0 21364 18 13 0 69 4 8 0 14 3055 118 5923 42 294 214 0 14102 13 9 0 78 5 3 0 0 2038 14 4416 21 155 220 0 12513 12 8 0 80 6 3 0 0 3269 10 6906 43 293 265 0 17515 15 10 0 75 7 8 0 0 1868 19 3913 22 173 228 0 11910 10 7 0 83 March 4, 2026 at 01:46:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 6491 106 9299 94 510 553 0 25423 24 16 0 60 1 19 0 7 5275 120 10533 116 560 612 0 25266 21 15 0 64 2 9 0 0 4063 12 8177 60 390 540 0 18073 17 11 0 72 3 6 0 0 3383 111 6979 65 386 532 0 17274 15 11 0 74 4 29 0 9 2972 127 5575 55 353 596 0 13106 12 8 0 80 5 3 0 0 1943 5 4012 31 234 592 0 10840 10 7 0 83 6 5 0 14 3346 14 7269 51 362 568 0 15707 14 10 0 76 7 14 0 0 2354 13 5075 35 256 575 0 14387 13 8 0 78 March 4, 2026 at 01:46:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 3349 103 2670 27 108 23 0 5527 5 4 0 91 1 1 0 17 1406 109 2489 22 111 39 0 7109 5 4 0 91 2 5 0 0 994 43 1902 13 70 38 0 4559 4 3 0 93 3 0 0 0 993 5 2036 22 95 22 0 5782 5 3 0 92 4 1 0 10 954 108 1561 8 69 14 0 5102 4 3 0 93 5 2 0 0 651 2 1323 1 46 38 0 3469 3 2 0 95 6 2 0 0 720 8 1527 14 54 36 0 4250 4 2 0 94 7 2 0 0 531 6 1084 7 36 21 0 2635 2 2 0 96 March 4, 2026 at 01:46:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 113 2 2 0 0 0 0 1 0 99 1 0 0 18 216 105 44 1 1 1 0 1401 0 0 0 100 2 0 0 0 117 52 112 0 1 0 0 9 0 0 0 100 3 0 0 0 12 3 8 0 1 0 0 596 0 0 0 100 4 0 0 9 211 104 6 0 0 0 0 260 0 0 0 100 5 0 0 0 17 8 2 0 1 1 0 0 0 0 0 100 6 0 0 0 19 7 14 0 0 0 0 9 0 0 0 100 7 0 0 0 21 4 20 0 0 0 0 307 0 0 0 100 March 4, 2026 at 01:46:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 1 0 99 1 0 0 18 216 106 40 1 0 0 0 1391 0 0 0 100 2 0 0 0 23 9 16 0 0 0 0 1 0 0 0 100 3 0 0 0 99 45 96 0 1 0 0 597 0 0 0 100 4 0 0 9 216 105 14 0 1 0 0 262 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 24 9 18 0 0 0 0 15 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:46:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2136 100 176 1 18 161 0 8 0 1 0 99 1 0 0 18 243 108 95 1 17 157 0 1399 0 1 0 99 2 0 0 0 36 4 59 1 11 152 0 5 0 1 0 99 3 0 0 0 153 73 162 1 17 159 0 594 0 0 0 100 4 0 0 9 259 105 113 0 27 178 0 264 0 0 0 100 5 0 0 0 35 0 70 1 15 190 0 0 0 1 0 99 6 0 0 0 50 9 84 0 17 138 0 11 0 1 0 99 7 0 0 0 35 2 61 1 10 182 0 303 0 0 0 99 March 4, 2026 at 01:46:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2193 101 262 0 43 334 0 0 0 1 0 99 1 0 0 17 399 151 331 2 51 292 0 1391 0 1 0 99 2 0 0 0 96 1 193 0 41 278 0 1 0 0 0 100 3 0 0 0 214 110 218 1 46 344 0 594 0 1 0 99 4 0 0 10 411 108 414 1 46 348 0 262 0 1 0 99 5 0 0 0 91 1 178 0 31 337 0 1 0 0 0 100 6 0 0 0 139 7 224 0 31 352 0 9 0 1 0 99 7 0 0 0 83 3 160 0 25 308 0 301 0 0 0 100 March 4, 2026 at 01:46:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 1 0 99 1 0 0 18 314 155 138 1 0 0 0 1391 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 5 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 594 0 0 0 100 4 0 0 9 210 104 4 0 0 0 0 260 0 0 0 100 5 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 6 0 0 0 25 7 24 1 1 0 0 9 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:46:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 0 0 0 0 0 1 0 99 1 0 0 17 322 158 150 1 0 0 0 1402 0 0 0 99 2 0 0 0 12 2 8 0 0 0 0 7 0 0 0 100 3 0 0 0 15 3 10 0 0 0 0 599 0 0 0 100 4 0 0 10 213 105 8 0 0 0 0 262 0 0 0 100 5 0 0 0 13 6 2 0 0 1 0 0 0 0 0 100 6 0 0 0 19 6 14 0 0 0 0 5 0 0 0 100 7 0 0 0 22 3 24 0 2 0 0 301 0 0 0 100 March 4, 2026 at 01:46:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2516 108 676 33 90 30 0 3223 23 3 0 74 1 5 0 20 634 137 686 32 131 31 0 4543 21 3 0 76 2 139 0 0 357 9 558 49 97 22 0 2445 25 2 0 73 3 1015 0 0 422 14 710 53 139 20 0 4194 19 2 0 79 4 11 0 297 504 106 630 32 121 22 0 3309 17 2 0 81 5 429 0 7 338 2 576 31 85 20 0 3508 17 2 0 82 6 19 0 0 508 7 907 63 120 22 0 3362 11 2 0 87 7 20 0 0 302 6 509 37 88 23 0 2790 16 2 0 82 March 4, 2026 at 01:46:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2526 107 719 30 124 43 0 3261 24 3 0 73 1 0 0 18 636 114 693 39 133 39 0 3656 35 2 0 63 2 0 0 0 387 8 614 25 111 29 0 4383 27 2 0 71 3 4 0 0 477 15 791 34 140 25 0 4095 25 2 0 72 4 0 0 185 603 114 698 23 135 20 0 3950 23 2 0 75 5 1 0 7 410 12 705 33 114 25 0 4305 15 2 0 84 6 3 0 0 617 9 1125 67 138 49 0 4206 16 2 0 82 7 0 0 0 399 12 629 21 84 29 0 3144 11 2 0 88 March 4, 2026 at 01:46:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2506 103 678 33 116 22 0 3092 29 3 0 68 1 0 0 4 649 107 743 31 141 41 0 3847 28 2 0 70 2 0 0 14 404 6 615 34 113 27 0 3372 26 2 0 72 3 0 0 0 392 12 626 27 125 18 0 3640 27 2 0 71 4 0 0 198 694 118 854 34 163 27 0 4939 16 2 0 82 5 0 0 7 467 17 756 31 117 37 0 4113 19 2 0 79 6 0 0 0 570 4 1071 54 149 39 0 4347 11 2 0 86 7 0 0 0 387 9 639 22 101 27 0 3399 17 2 0 81 March 4, 2026 at 01:46:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 29 2 2 0 0 19 4 0 0 95 1 0 0 4 222 102 18 2 4 0 0 81 3 0 0 96 2 2 0 14 201 48 206 0 5 0 0 338 0 0 0 100 3 0 0 0 14 2 10 0 2 0 0 29 0 0 0 100 4 1 0 2 219 106 44 0 1 1 0 1148 0 0 0 99 5 4 0 7 37 12 33 3 2 2 0 877 2 0 0 98 6 0 0 0 13 1 8 2 1 4 0 16 0 0 0 100 7 0 0 0 18 2 16 0 1 0 0 310 2 0 0 98 March 4, 2026 at 01:46:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 106 0 0 1 0 0 0 0 0 100 1 0 0 4 216 103 10 0 1 0 0 0 0 0 0 100 2 0 0 14 123 53 122 1 2 0 0 272 0 0 0 100 3 0 0 0 15 2 16 0 1 0 0 17 0 0 0 100 4 0 0 2 214 104 38 1 1 1 0 1133 0 0 0 100 5 0 0 7 35 15 22 1 0 0 0 863 0 0 0 100 6 0 0 0 6 0 2 0 1 0 0 5 0 0 0 100 7 0 0 0 18 2 14 0 3 0 0 300 0 0 0 100 March 4, 2026 at 01:46:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 104 0 0 0 0 1 0 0 0 100 1 0 0 3 214 104 8 0 0 0 0 1 0 0 0 100 2 0 0 14 111 51 108 0 1 0 0 269 0 0 0 100 3 0 0 0 14 2 14 0 1 0 0 3 0 0 0 100 4 0 0 3 214 105 36 1 0 0 0 1133 0 0 0 100 5 0 0 7 33 12 28 1 1 0 0 867 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 20 2 14 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:46:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 775 0 0 2152 101 148 2 9 12 6 6536 2 1 0 96 1 9 0 4 251 105 50 0 12 5 3 32 0 0 0 100 2 5 0 14 134 51 129 0 5 5 2 325 0 0 0 100 3 4 0 0 35 3 24 2 4 3 2 74 0 0 0 100 4 2678 0 116 236 106 87 3 4 6 11 1607 1 1 0 98 5 155 0 7 83 13 105 0 11 15 16 1017 0 0 0 99 6 33 0 1 46 1 55 0 8 12 6 185 0 0 0 100 7 9 0 0 63 4 72 0 7 8 5 428 0 0 0 100 March 4, 2026 at 01:46:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 14 2438 102 677 28 79 41 3 3494 8 2 0 89 1 1 0 4 505 104 540 32 57 50 0 2712 7 2 0 91 2 5 0 14 379 10 682 24 60 42 1 3853 8 2 0 90 3 21 0 14 162 1 290 8 27 72 1 2768 5 2 0 93 4 0 0 142 588 106 837 26 63 37 0 3639 4 2 0 94 5 17 0 7 379 9 603 16 51 51 0 3636 5 1 0 94 6 0 0 0 280 45 428 19 38 51 1 2817 5 2 0 93 7 4 0 8 289 2 548 23 48 65 0 3783 9 2 0 89 March 4, 2026 at 01:47:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 95 0 2 0 0 0 0 1 0 99 1 0 0 3 216 103 6 0 0 0 0 0 0 0 0 100 2 0 0 14 9 1 4 1 0 0 0 266 0 0 0 100 3 0 0 0 10 1 4 0 1 0 0 1 0 0 0 100 4 0 0 3 218 104 36 1 1 1 0 1121 0 0 0 100 5 0 0 14 34 4 26 1 1 0 0 854 0 0 0 100 6 0 0 0 125 57 124 0 1 0 0 29 0 0 0 100 7 0 0 0 20 2 14 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:47:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2109 102 109 0 0 1 0 0 0 1 0 99 1 0 0 3 234 103 14 0 1 0 0 9 0 0 0 100 2 0 0 14 27 3 8 0 0 0 0 288 0 0 0 100 3 0 0 0 26 2 6 0 0 0 0 4 0 0 0 100 4 0 0 3 234 105 42 0 0 1 0 1127 0 0 0 100 5 0 0 7 37 9 12 1 1 0 0 854 0 0 0 100 6 0 0 0 137 56 118 1 1 0 0 16 0 0 0 100 7 0 0 0 42 4 22 0 0 0 0 306 0 0 0 100 March 4, 2026 at 01:47:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 102 116 0 1 0 0 0 0 1 0 99 1 0 0 4 215 103 10 0 0 0 0 18 0 0 0 100 2 0 0 14 8 1 4 0 0 0 0 266 0 0 0 100 3 0 0 0 14 3 10 0 0 0 0 11 0 0 0 100 4 0 0 2 213 104 34 1 0 0 0 1122 0 0 0 100 5 0 0 7 15 4 10 0 0 0 0 853 0 0 0 100 6 0 0 0 110 51 104 0 1 0 0 1 0 0 0 100 7 0 0 0 26 4 20 0 1 0 0 304 0 0 0 100 March 4, 2026 at 01:47:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 103 146 1 6 262 0 43 0 2 0 98 1 0 0 7 263 108 117 0 18 226 0 140 0 1 0 99 2 0 0 14 21 2 27 1 7 197 0 280 0 1 0 98 3 0 0 0 47 18 44 1 11 187 0 62 0 1 0 98 4 0 0 7 232 106 72 3 10 212 1 1977 0 2 0 98 5 0 0 7 34 6 44 1 13 272 0 897 0 2 0 98 6 0 0 0 57 16 69 0 15 255 0 55 0 1 0 99 7 0 0 0 123 42 148 0 18 265 0 1123 0 1 0 99 March 4, 2026 at 01:47:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2315 103 531 2 116 1513 0 1 0 2 0 98 1 0 0 4 480 111 590 0 126 1580 0 11 0 2 0 98 2 0 0 14 193 1 445 1 107 1584 0 266 0 2 0 98 3 0 0 0 485 244 522 0 116 1480 0 0 0 2 0 98 4 0 0 2 603 105 828 1 138 1522 0 1121 0 2 0 97 5 0 0 7 206 13 441 2 105 1387 0 854 0 2 0 98 6 0 0 0 225 0 520 0 120 1643 0 0 0 2 0 98 7 0 0 0 213 1 469 1 99 1397 0 300 0 2 0 98 March 4, 2026 at 01:47:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 108 0 0 0 0 2 0 0 0 100 1 0 0 3 225 108 18 1 0 0 0 5 0 0 0 100 2 0 0 14 10 1 12 0 1 0 0 266 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 3 214 105 36 1 0 0 0 1123 0 0 0 100 5 0 0 7 16 6 10 1 0 0 0 855 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 17 1 12 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 110 0 0 0 0 3 0 0 0 100 1 0 0 4 232 110 32 0 0 0 0 21 0 0 0 100 2 0 0 14 7 1 4 0 0 1 0 266 0 0 0 100 3 0 0 0 112 50 112 0 1 0 0 0 0 0 0 100 4 0 0 2 217 104 40 1 0 1 0 1126 0 0 0 100 5 0 0 7 23 9 12 0 0 0 0 853 0 0 0 100 6 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 7 0 0 0 20 1 16 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 104 116 0 0 0 0 16 0 0 0 100 1 0 0 4 233 112 28 0 0 0 0 29 0 0 0 99 2 0 0 14 7 1 6 0 0 0 0 270 0 0 0 100 3 0 0 0 113 51 110 0 1 0 0 7 0 0 0 100 4 0 0 2 214 105 36 1 0 0 0 1123 0 0 0 100 5 0 0 7 14 4 10 0 0 0 0 855 0 0 0 100 6 0 0 0 6 0 2 0 0 0 0 24 0 0 0 100 7 0 0 0 17 1 12 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 103 114 0 1 0 0 4 0 0 0 100 1 0 0 3 230 110 26 0 1 4 0 10 0 0 0 100 2 0 0 14 13 3 10 1 0 3 0 271 0 0 0 100 3 0 0 0 113 50 112 0 0 1 0 7 0 0 0 100 4 0 0 3 220 104 48 1 1 2 0 1123 0 0 0 100 5 0 0 7 17 5 12 1 0 0 0 854 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 17 1 12 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 108 0 0 0 0 5 0 0 0 100 1 0 0 3 223 108 16 1 0 0 0 6 0 0 0 100 2 0 0 14 8 2 4 1 0 0 0 267 0 0 0 100 3 1 0 0 109 51 104 0 0 0 0 5 0 0 0 100 4 0 0 3 216 105 38 1 0 1 0 1118 0 0 0 100 5 19 0 7 23 6 24 1 1 0 0 860 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 17 1 12 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 104 0 0 0 0 0 0 0 0 100 1 0 0 3 224 109 18 0 0 0 0 9 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 3 212 104 34 1 0 0 0 1116 0 0 0 100 5 0 0 7 14 4 10 0 0 0 0 854 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 17 1 12 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 110 0 0 0 0 2 0 0 0 100 1 1 0 3 231 110 30 0 0 0 0 20 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 267 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 3 219 105 42 1 0 0 0 1124 0 0 0 100 5 0 0 7 24 10 14 0 0 0 0 854 0 0 0 100 6 0 0 0 12 0 14 0 1 0 0 7 0 0 0 100 7 0 0 0 22 2 18 0 0 0 0 301 0 0 0 100 March 4, 2026 at 01:47:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 106 0 0 0 0 1 0 0 0 100 1 0 0 3 226 110 20 0 0 0 0 10 0 0 0 100 2 0 0 14 6 1 2 1 0 0 0 266 0 0 0 100 3 0 0 0 111 52 106 0 0 0 0 2 0 0 0 100 4 0 0 3 211 104 34 0 0 0 0 1116 0 0 0 100 5 0 0 7 16 4 10 1 0 0 0 854 0 0 0 100 6 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 22 1 22 0 1 0 0 300 0 0 0 100 March 4, 2026 at 01:47:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 104 114 0 0 2 0 5 0 0 0 100 1 0 0 7 231 111 28 0 1 1 0 15 0 0 0 100 2 0 0 14 14 3 12 0 0 2 0 273 0 0 0 100 3 0 0 0 92 39 86 0 0 1 0 5 0 0 0 100 4 0 0 7 244 118 69 1 2 5 0 1121 0 0 0 99 5 0 0 7 18 5 10 1 0 1 0 854 0 0 0 100 6 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 19 2 10 0 0 1 0 300 0 0 0 100 March 4, 2026 at 01:47:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 114 0 1 0 0 0 0 0 0 100 1 0 0 3 225 108 18 1 0 0 0 5 0 0 0 100 2 0 0 14 7 1 4 0 1 0 0 266 0 0 0 100 3 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 275 135 94 1 0 1 0 1118 0 0 0 100 5 0 0 7 53 23 50 0 1 0 0 855 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 5 0 0 0 100 7 0 0 0 20 1 16 0 1 0 0 311 0 0 0 100 March 4, 2026 at 01:47:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 112 0 0 0 0 4 0 0 0 100 1 0 0 3 230 109 32 0 1 0 0 10 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 214 105 36 1 0 0 0 1117 0 0 0 100 5 0 0 7 114 54 110 0 0 0 0 853 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 17 1 12 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 108 0 0 0 0 1 0 0 0 100 1 0 0 3 230 110 28 0 0 0 0 18 0 0 0 100 2 0 0 14 6 1 2 1 0 0 0 266 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 3 217 104 40 1 0 1 0 1121 0 0 0 100 5 0 0 7 120 59 110 1 0 0 0 854 0 0 0 100 6 0 0 0 7 0 4 0 0 0 0 7 0 0 0 100 7 0 0 0 20 1 16 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 229 0 0 5284 107 7143 52 259 82 0 22994 18 12 0 71 1 48 0 3 3439 110 6735 49 277 92 0 16571 14 9 0 77 2 5 0 0 2490 8 5023 26 176 94 0 13711 15 7 0 78 3 35 0 14 3254 6 6986 46 227 56 0 17467 12 8 0 79 4 72 0 3 2098 111 3920 33 205 75 0 10412 9 6 0 85 5 32 0 0 1181 27 2511 21 113 73 0 8435 7 4 0 89 6 225 0 7 2200 14 4563 29 167 99 0 11851 10 7 0 83 7 6 0 0 1352 10 2853 12 91 69 0 6432 6 4 0 90 March 4, 2026 at 01:47:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 0 6338 106 9134 77 444 299 0 25375 23 16 0 60 1 15 0 10 5074 110 10041 77 469 271 0 23523 20 14 0 66 2 15 0 0 3638 10 7426 46 302 188 1 18478 17 12 0 71 3 8 0 14 3909 32 8121 42 348 304 0 20201 17 12 0 71 4 24 0 3 2848 123 5332 44 303 242 1 13858 13 9 0 78 5 11 0 0 1982 9 4176 27 174 205 0 11007 10 7 0 83 6 3 0 0 3067 14 6331 43 256 188 1 13855 10 9 0 81 7 10 0 0 2430 13 5152 30 173 239 0 13529 13 8 0 79 March 4, 2026 at 01:47:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 6545 108 9421 66 453 571 0 27341 24 17 0 58 1 14 0 3 4857 119 9669 80 506 571 0 23440 20 14 0 66 2 8 0 0 3407 13 6826 44 348 553 0 16977 16 11 0 73 3 3 0 28 3831 118 7829 66 429 541 0 18657 16 11 0 72 4 3 0 3 2948 115 5718 46 322 532 0 13889 13 9 0 78 5 4 0 0 2334 12 5009 37 225 480 0 10540 10 7 0 83 6 2 0 0 3247 11 6914 39 292 527 0 15589 13 10 0 77 7 3 0 0 2231 10 4761 37 215 492 0 11775 10 7 0 82 March 4, 2026 at 01:47:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 3583 105 3172 30 140 51 0 7762 8 5 0 87 1 1 0 5 1848 113 3282 30 159 36 0 7864 6 4 0 90 2 0 0 0 1336 4 2661 11 89 43 0 7111 6 4 0 90 3 1 0 21 1543 6 3295 22 121 55 0 9076 7 5 0 88 4 2 0 3 1456 138 2477 17 99 35 0 4786 5 3 0 92 5 2 0 0 578 4 1161 7 50 22 0 3392 4 2 0 94 6 2 0 0 1109 10 2367 9 81 31 0 6972 5 4 0 91 7 3 0 0 710 4 1521 10 53 37 0 4373 4 2 0 94 March 4, 2026 at 01:47:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 114 0 0 0 0 6 0 0 0 99 1 0 0 3 320 154 118 0 0 0 0 16 0 0 0 100 2 0 0 0 20 3 16 0 0 0 0 22 0 0 0 100 3 0 0 21 15 5 12 1 1 0 0 821 0 0 0 100 4 0 0 3 218 105 15 0 1 0 0 10 0 0 0 100 5 0 0 0 19 7 4 0 1 0 0 0 0 0 0 100 6 0 0 0 19 3 50 1 1 1 0 1432 0 0 0 100 7 0 0 0 17 3 14 0 0 0 0 303 0 0 0 100 March 4, 2026 at 01:47:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 107 114 0 0 0 0 9 0 0 0 99 1 0 0 4 310 152 104 0 1 0 0 3 0 0 0 100 2 0 0 0 16 1 12 0 0 0 0 0 0 0 0 100 3 0 0 21 19 7 16 1 0 0 0 822 0 0 0 100 4 0 0 2 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 36 1 0 1 0 1425 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 March 4, 2026 at 01:47:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 107 191 2 23 152 0 10 0 1 0 99 1 0 0 7 338 153 157 1 21 110 0 4 0 1 0 99 2 0 0 0 67 2 119 0 23 154 0 7 0 0 0 100 3 0 0 21 68 27 76 0 18 138 0 826 0 1 0 99 4 0 0 7 241 106 61 0 16 154 0 3 0 1 0 99 5 0 0 0 38 1 74 0 20 172 0 4 0 0 0 100 6 0 0 0 44 4 101 2 18 161 0 1425 0 1 0 99 7 0 0 0 41 4 69 1 20 144 0 302 0 1 0 99 March 4, 2026 at 01:47:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2203 106 224 2 39 343 0 9 0 1 0 99 1 0 0 3 404 102 404 1 51 361 0 7 0 1 0 99 2 0 0 0 261 51 356 2 35 378 0 0 0 1 0 99 3 0 0 21 221 113 224 1 44 333 0 819 0 1 0 99 4 0 0 3 317 106 228 1 44 383 0 4 0 1 0 99 5 0 0 0 84 1 165 0 39 282 0 300 0 0 0 100 6 0 0 0 104 2 233 2 40 369 0 1124 0 1 0 99 7 0 0 0 81 1 165 2 27 377 0 294 0 1 0 99 March 4, 2026 at 01:47:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 106 112 0 0 0 0 6 0 0 0 100 1 0 0 3 248 121 42 0 1 0 0 301 0 0 0 100 2 0 0 0 83 34 77 0 2 0 0 0 0 0 0 100 3 0 0 21 15 5 12 1 1 0 0 819 0 0 0 100 4 0 0 3 213 105 8 0 1 0 0 5 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 6 0 0 0 10 2 34 1 0 0 0 1124 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:47:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 112 0 0 0 0 5 0 0 0 100 1 0 0 4 321 155 120 0 0 0 0 316 0 0 0 100 2 0 0 0 15 1 16 0 1 0 0 0 0 0 0 100 3 0 0 21 21 5 20 0 1 0 0 821 0 0 0 100 4 0 0 2 214 103 8 0 0 0 0 5 0 0 0 100 5 0 0 0 14 6 2 0 0 0 0 300 0 0 0 100 6 0 0 0 12 2 38 1 0 0 0 1133 0 0 0 100 7 0 0 0 10 0 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:47:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2566 112 909 85 110 48 0 2941 13 3 0 84 1 1318 0 4 622 130 596 62 101 23 1 3205 19 3 0 79 2 0 0 0 321 5 605 60 78 14 0 3245 22 2 0 76 3 29 0 21 368 11 611 39 114 31 0 3795 22 2 0 76 4 25 0 338 511 110 640 32 116 22 1 3418 16 2 0 82 5 4 0 0 307 3 571 15 86 19 0 2711 12 1 0 86 6 5 0 0 338 3 580 27 98 18 0 4088 17 2 0 82 7 0 0 0 323 11 538 31 83 21 0 2270 15 1 0 84 March 4, 2026 at 01:47:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2691 109 1135 99 144 67 0 3943 19 3 0 78 1 0 0 11 686 113 833 38 149 34 0 4350 30 3 0 67 2 0 0 0 404 12 624 41 113 32 0 3677 32 2 0 66 3 0 0 14 455 18 746 48 149 33 0 4826 33 2 0 65 4 3 0 129 672 116 812 24 140 36 0 4417 17 3 0 80 5 0 0 0 421 7 696 18 113 38 0 3497 14 2 0 84 6 0 0 0 446 8 791 28 137 38 0 3956 17 2 0 81 7 3 0 0 401 9 692 21 94 41 0 4073 15 2 0 83 March 4, 2026 at 01:47:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2710 111 1160 91 160 53 0 5192 16 3 0 81 1 0 0 10 738 113 887 44 154 40 0 4377 22 3 0 75 2 0 0 0 461 11 712 21 114 35 0 3572 23 2 0 75 3 0 0 14 453 10 732 27 130 40 0 4817 28 3 0 70 4 0 0 213 607 117 690 31 118 27 0 4027 27 2 0 70 5 0 0 0 435 14 659 29 106 35 0 3216 19 2 0 79 6 0 0 0 413 10 680 28 120 24 0 3761 26 2 0 72 7 3 0 0 371 7 617 22 89 30 0 3097 18 2 0 81 March 4, 2026 at 01:47:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 102 137 1 7 0 0 1349 1 1 0 99 1 0 0 11 243 105 38 3 3 0 0 341 4 0 0 96 2 0 0 0 19 1 22 1 5 0 0 411 2 0 0 98 3 7 0 14 35 4 52 3 4 4 0 959 3 0 0 97 4 0 0 2 230 104 27 2 5 0 0 55 3 0 0 97 5 0 0 0 16 1 16 0 1 1 0 21 0 0 0 100 6 0 0 0 62 12 65 2 4 2 0 156 2 0 0 98 7 2 0 0 115 44 128 0 6 6 0 85 2 0 0 98 March 4, 2026 at 01:47:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 136 1 0 0 0 1130 0 1 0 99 1 1 0 11 223 107 22 0 0 0 0 276 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 3 0 0 14 15 4 12 1 1 0 0 860 0 0 0 100 4 0 0 2 220 103 16 0 0 0 0 5 0 0 0 100 5 0 0 0 13 6 0 0 0 0 0 0 0 0 0 100 6 0 0 0 18 5 14 0 0 0 0 15 0 0 0 100 7 0 0 0 119 53 114 0 3 0 0 3 0 0 0 100 March 4, 2026 at 01:47:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 144 1 1 0 0 1131 0 1 0 99 1 0 0 11 217 105 12 1 0 0 0 279 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 23 7 22 1 0 0 0 870 0 0 0 100 4 0 0 2 218 103 12 0 0 0 0 3 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 22 8 18 0 0 0 0 12 0 0 0 100 7 0 0 0 113 51 108 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:47:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 146 0 1 1 0 1131 0 1 0 99 1 0 0 10 233 109 34 1 1 2 0 273 0 0 0 100 2 0 0 0 10 2 4 0 0 1 0 301 0 0 0 100 3 0 0 14 26 6 25 0 1 1 0 865 0 0 0 100 4 0 0 3 216 104 8 0 0 4 0 1 0 0 0 100 5 0 0 0 11 2 6 0 0 2 0 3 0 0 0 100 6 0 0 0 30 11 24 1 0 1 0 13 0 0 0 100 7 0 0 0 115 53 108 0 1 2 0 5 0 0 0 100 March 4, 2026 at 01:47:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 19 2170 102 229 3 27 29 11 932 0 3 0 96 1 43 0 31 289 105 129 2 31 106 11 380 0 1 0 99 2 24 0 16 39 1 73 1 24 2002 8 391 0 1 0 99 3 35 0 18 177 61 215 2 20 27 13 1128 0 1 0 99 4 1911 0 3 258 104 86 4 18 2008 7 380 1 1 0 97 5 73 0 4 69 10 117 3 23 35 11 238 0 0 0 100 6 62 0 25 54 4 91 0 19 2091 9 105 0 1 0 99 7 33 0 19 76 9 128 1 21 43 14 215 0 0 0 100 March 4, 2026 at 01:47:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2125 102 152 1 0 2 1 770 0 1 0 99 1 9 0 60 224 104 27 0 5 6 2 291 0 1 0 99 2 20 0 1 29 1 30 1 4 12 5 317 0 1 0 99 3 31 0 14 168 72 167 1 3 8 7 621 0 0 0 100 4 3 0 2 221 103 11 0 3 2 1 308 0 0 0 100 5 2 0 0 20 1 11 0 1 2 1 9 0 0 0 100 6 3 0 0 23 0 20 0 4 2 2 15 0 0 0 100 7 9 0 8 32 5 25 0 2 4 1 16 0 0 0 100 March 4, 2026 at 01:47:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2167 102 150 0 3 1 0 755 0 1 0 99 1 0 0 53 268 104 10 0 1 2 0 259 0 1 0 99 2 0 0 343 17 1 6 0 1 2 0 300 0 0 0 99 3 0 0 14 213 72 158 1 1 0 0 580 0 0 0 100 4 0 0 2 268 104 6 0 0 0 0 300 0 0 0 100 5 0 0 0 77 9 10 0 0 0 0 7 0 0 0 100 6 0 0 0 66 0 10 0 1 0 0 11 0 0 0 100 7 0 0 0 73 1 14 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 144 1 0 0 0 747 0 1 0 99 1 0 0 11 214 104 8 1 1 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 151 72 148 0 0 0 0 580 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 13 2 8 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:47:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 146 1 0 0 0 747 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 152 72 150 0 0 0 0 580 0 0 0 100 4 0 0 2 216 104 14 0 1 0 0 301 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 144 0 0 0 0 749 0 1 0 99 1 0 0 11 214 104 8 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 151 72 149 1 0 0 0 561 0 0 0 100 4 0 0 2 215 104 9 0 1 0 0 327 0 0 0 100 5 0 0 0 21 5 20 0 2 0 0 5 0 0 0 100 6 0 0 0 8 0 4 0 0 0 0 5 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:47:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 142 1 0 0 0 747 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 146 70 144 0 0 0 0 285 0 0 0 100 4 0 0 2 214 105 6 1 0 0 0 595 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2111 102 150 1 0 0 0 755 0 1 0 99 1 0 0 11 213 104 6 1 0 0 0 259 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 322 0 0 0 100 3 0 0 14 148 71 146 0 0 0 0 286 0 0 0 100 4 0 0 2 214 105 8 0 0 0 0 593 0 0 0 100 5 0 0 0 19 7 12 0 0 1 0 12 0 0 0 100 6 0 0 0 18 2 18 0 1 1 0 7 0 0 0 100 7 0 0 0 19 3 16 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:47:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 1 0 0 0 747 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 112 53 110 0 0 0 0 268 0 0 0 100 4 0 0 2 250 123 44 0 1 0 0 613 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 16 1 16 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:47:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 140 0 3 0 0 747 0 1 0 99 1 0 0 10 222 104 14 0 2 1 0 259 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 300 0 0 0 100 3 0 0 14 90 40 84 0 0 1 0 266 0 0 0 100 4 0 0 3 280 138 74 0 1 1 0 615 0 0 0 100 5 0 0 0 12 3 6 0 0 1 0 0 0 0 0 100 6 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 14 3 6 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:47:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 156 1 2 1 0 758 0 1 0 99 1 0 0 10 214 104 8 0 0 0 0 259 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 3 0 0 14 9 1 6 1 0 0 0 266 0 0 0 100 4 0 0 3 342 169 132 1 0 0 0 308 0 0 0 100 5 0 0 0 19 6 16 0 2 0 0 306 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 15 2 10 0 0 0 0 5 0 0 0 100 March 4, 2026 at 01:47:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 144 1 0 0 0 747 0 1 0 99 1 0 0 11 218 104 16 1 1 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 311 154 104 0 0 0 0 294 0 0 0 100 5 0 0 0 53 23 48 0 0 0 0 321 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 23 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:47:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 148 0 0 0 0 754 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 312 154 106 0 0 0 0 294 0 0 0 100 5 0 0 0 64 29 58 0 0 0 0 334 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 5 0 0 0 100 7 0 0 0 14 1 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 1 0 0 0 746 0 1 0 99 1 0 0 11 214 104 8 0 1 0 0 259 0 0 0 100 2 0 0 0 12 1 12 0 1 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 311 154 104 0 0 0 0 294 0 0 0 100 5 0 0 0 49 22 44 0 0 0 0 320 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 8 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:47:48 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 146 1 0 0 0 748 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 3 0 0 14 14 1 16 1 1 0 0 266 0 0 0 100 4 0 0 2 312 154 104 1 0 0 0 294 0 0 0 100 5 0 0 0 52 23 48 0 0 0 0 320 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:49 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 142 1 0 0 0 748 0 1 0 99 1 0 0 11 213 104 6 1 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 10 2 8 0 0 0 0 267 0 0 0 100 4 0 0 2 311 154 104 0 0 0 0 294 0 0 0 100 5 0 0 0 53 24 48 0 0 0 0 322 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:47:50 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 136 0 2 0 0 746 0 1 0 99 1 0 0 11 220 104 12 0 1 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 10 1 8 0 0 0 0 266 0 0 0 100 4 0 0 2 290 141 86 0 1 0 0 294 0 0 0 100 5 0 0 0 76 35 72 0 1 0 0 320 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:51 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 148 1 0 0 0 754 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 214 104 8 0 1 1 0 294 0 0 0 100 5 0 0 0 169 79 168 0 1 0 0 332 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 5 0 0 0 100 7 0 0 0 18 3 14 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:47:52 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 2 0 0 0 747 0 1 0 99 1 0 0 11 214 104 8 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 11 2 8 1 0 0 0 290 0 0 0 100 4 0 0 2 213 104 4 1 0 0 0 294 0 0 0 100 5 0 0 0 149 72 144 0 0 0 0 320 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:53 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 146 0 0 1 0 747 0 1 0 99 1 0 0 14 214 104 8 1 1 0 0 259 0 0 0 100 2 0 0 0 10 2 2 0 0 1 0 300 0 0 0 100 3 0 0 14 15 2 8 0 0 1 0 266 0 0 0 100 4 0 0 7 214 105 6 0 0 1 0 294 0 0 0 100 5 0 0 0 159 75 153 0 1 1 0 321 0 0 0 100 6 0 0 0 13 1 10 0 1 1 0 0 0 0 0 100 7 0 0 0 15 3 6 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:47:54 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 1 0 0 0 747 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 1 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 150 72 144 0 0 0 0 320 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 16 1 16 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:47:55 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 0 0 0 0 747 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 9 1 6 1 0 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 149 72 144 0 0 0 0 320 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:47:56 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 158 1 1 0 0 753 0 1 0 99 1 0 0 11 214 104 8 0 1 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 213 104 6 1 0 0 0 294 0 0 0 100 5 0 0 0 164 79 158 0 0 1 0 332 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 5 0 0 0 100 7 0 0 0 16 1 12 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:57 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 142 1 2 0 0 748 0 1 0 99 1 0 0 10 222 104 18 1 2 1 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 127 61 122 0 0 0 0 309 0 0 0 100 6 0 0 0 26 10 22 0 1 0 0 11 0 0 0 100 7 0 0 0 13 2 8 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:47:58 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 148 1 0 1 0 747 0 1 0 99 1 0 0 11 216 106 10 0 0 1 0 259 0 0 0 100 2 0 0 0 9 2 4 0 1 0 0 300 0 0 0 100 3 0 0 14 11 2 10 0 1 0 0 266 0 0 0 100 4 0 0 2 213 105 6 0 0 0 0 294 0 0 0 100 5 0 0 0 116 55 112 0 0 1 0 301 0 0 0 100 6 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:47:59 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 144 0 1 0 0 758 0 1 0 99 1 0 0 11 214 104 8 0 0 0 0 259 0 0 0 100 2 0 0 0 14 1 14 0 1 0 0 300 0 0 0 100 3 0 0 14 11 2 8 1 0 0 0 267 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 295 0 0 0 100 5 0 0 0 113 53 108 0 0 0 0 301 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 15 3 10 0 0 0 0 7 0 0 0 100 March 4, 2026 at 01:48:00 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 1 0 0 0 747 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 299 0 0 0 100 3 0 0 14 13 1 16 0 1 0 0 266 0 0 0 100 4 0 0 2 212 104 4 1 0 0 0 294 0 0 0 100 5 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:01 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 150 0 0 1 0 754 0 1 0 99 1 0 0 11 213 104 6 1 0 0 0 259 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 322 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 212 104 6 0 0 0 0 294 0 0 0 100 5 0 0 0 123 60 116 0 0 0 0 313 0 0 0 100 6 0 0 0 49 20 44 0 0 0 0 25 0 0 0 100 7 0 0 0 19 3 16 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:48:02 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 1 0 0 0 747 0 1 0 99 1 0 0 11 214 104 10 0 0 0 0 277 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 16 3 16 0 0 0 0 276 0 0 0 100 4 0 0 2 216 104 14 0 1 0 0 294 0 0 0 100 5 0 0 0 113 53 108 0 0 0 0 301 0 0 0 100 6 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:03 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 148 1 1 0 0 746 0 1 0 99 1 0 0 10 214 104 8 0 1 1 0 259 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 300 0 0 0 100 3 0 0 14 13 2 8 1 0 1 0 266 0 0 0 100 4 0 0 3 215 105 8 0 0 1 0 295 0 0 0 100 5 0 0 0 97 42 96 0 1 2 0 300 0 0 0 100 6 0 0 0 72 33 66 0 1 1 0 20 0 0 0 100 7 0 0 0 14 3 6 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:48:04 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 138 0 2 0 0 748 0 1 0 99 1 0 0 11 218 104 10 0 1 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 212 104 4 1 0 0 0 294 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:05 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 1 0 0 0 747 0 1 0 99 1 0 0 11 213 104 6 1 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 6 0 0 0 150 70 150 0 1 0 0 20 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:48:06 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 150 1 0 0 0 752 0 1 0 99 1 0 0 11 210 103 6 0 0 0 0 259 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 212 104 6 0 0 0 0 294 0 0 0 100 5 0 0 0 26 12 18 0 0 0 0 314 0 0 0 100 6 0 0 0 151 70 146 0 0 0 0 25 0 0 0 100 7 0 0 0 20 1 22 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:48:07 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 142 1 0 0 0 746 0 1 0 99 1 0 0 11 212 103 8 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 9 1 6 1 0 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 4 4 0 0 0 0 300 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 13 2 8 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:48:08 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 102 156 1 1 0 0 748 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 212 104 4 1 0 0 0 294 0 0 0 100 5 0 0 0 14 3 10 0 0 0 0 300 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 13 1 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:09 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 144 0 0 0 0 747 0 1 0 99 1 0 0 11 218 104 16 1 1 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 10 2 8 0 0 0 0 267 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:48:10 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 1 0 0 0 747 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 299 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:11 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 146 1 2 0 0 753 0 1 0 99 1 0 0 11 220 104 12 0 2 0 0 259 0 0 0 100 2 0 0 0 14 2 16 0 1 0 0 301 0 0 0 100 3 0 0 14 9 1 6 1 0 0 0 266 0 0 0 100 4 0 0 2 212 104 6 0 0 0 0 294 0 0 0 100 5 0 0 0 22 10 16 0 0 0 0 314 0 0 0 100 6 0 0 0 149 70 144 0 0 0 0 25 0 0 0 100 7 0 0 0 19 3 16 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:48:12 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 142 0 0 0 0 748 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 258 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 3 0 0 14 15 2 18 0 1 0 0 267 0 0 0 100 4 0 0 2 212 104 4 1 0 0 0 294 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:13 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 146 1 0 1 0 747 0 1 0 99 1 0 0 14 214 104 6 1 0 1 0 259 0 0 0 100 2 0 0 0 10 2 2 0 0 1 0 300 0 0 0 100 3 0 0 14 13 2 8 0 0 1 0 266 0 0 0 100 4 0 0 7 214 105 6 0 0 1 0 295 0 0 0 100 5 0 0 0 19 4 12 0 0 1 0 300 0 0 0 100 6 0 0 0 148 71 142 0 1 0 0 20 0 0 0 100 7 0 0 0 15 3 6 0 0 1 0 2 0 0 0 100 March 4, 2026 at 01:48:14 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 1 0 0 0 747 0 1 0 99 1 0 0 11 214 104 8 0 0 0 0 259 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 3 0 0 14 10 1 8 0 0 0 0 266 0 0 0 100 4 0 0 2 216 104 14 0 1 0 0 294 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 1 0 0 0 100 March 4, 2026 at 01:48:15 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 0 0 0 0 747 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 9 1 6 1 0 0 0 266 0 0 0 100 4 0 0 2 213 104 6 0 0 0 0 294 0 0 0 100 5 0 0 0 14 2 14 0 1 0 0 300 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:48:16 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 150 1 0 0 0 752 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 213 104 6 1 0 0 0 294 0 0 0 100 5 0 0 0 22 10 14 0 0 1 0 313 0 0 0 100 6 0 0 0 149 70 144 0 0 0 0 25 0 0 0 100 7 0 0 0 15 1 12 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:17 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 1 0 0 0 747 0 1 0 99 1 0 0 11 213 104 6 1 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 6 0 0 0 151 70 150 0 1 0 0 20 0 0 0 100 7 0 0 0 13 2 8 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:48:18 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 142 1 2 0 0 747 0 1 0 99 1 0 0 11 220 104 12 0 2 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 14 4 10 0 0 0 0 301 0 0 0 100 6 0 0 0 147 70 142 0 0 0 0 20 0 0 0 100 7 0 0 0 16 1 16 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:48:19 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 142 0 0 0 0 748 0 1 0 99 1 0 0 11 214 105 8 0 0 0 0 261 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 11 2 8 1 0 0 0 267 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 301 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:48:20 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 150 1 1 0 0 746 0 1 0 99 1 0 0 11 213 104 8 0 0 0 0 260 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 12 3 10 0 0 0 0 270 0 0 0 100 4 0 0 2 212 104 4 1 0 0 0 294 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 301 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 13 1 8 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:21 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 150 0 0 0 0 752 0 1 0 99 1 0 0 11 218 104 16 1 1 0 0 259 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 322 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 214 104 9 0 0 0 0 294 0 0 0 100 5 0 0 0 29 12 22 0 1 0 0 316 0 0 0 100 6 0 0 0 149 70 144 0 0 0 0 25 0 0 0 100 7 0 0 0 18 3 12 0 0 0 0 3 0 0 0 100 March 4, 2026 at 01:48:22 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 142 1 0 0 0 748 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 10 2 8 0 0 0 0 267 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:23 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 148 1 1 0 0 746 0 1 0 99 1 0 0 11 216 104 10 0 1 1 0 259 0 0 0 100 2 0 0 0 14 2 12 0 1 1 0 300 0 0 0 100 3 0 0 14 13 2 8 1 0 1 0 266 0 0 0 100 4 0 0 3 213 105 6 0 0 1 0 295 0 0 0 100 5 0 0 0 17 4 10 0 0 1 0 300 0 0 0 100 6 0 0 0 147 71 140 0 0 1 0 20 0 0 0 100 7 0 0 0 14 3 6 0 1 1 0 2 0 0 0 100 March 4, 2026 at 01:48:24 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 142 1 0 0 0 747 0 1 0 99 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 3 0 0 14 13 1 16 0 1 0 0 266 0 0 0 100 4 0 0 2 212 104 4 1 0 0 0 294 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:25 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 98 1 2 1 0 535 0 1 0 99 1 0 0 11 231 104 22 1 1 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 6 0 0 0 145 70 171 0 2 0 0 232 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:48:26 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2107 101 116 0 0 0 0 7 0 0 0 100 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 10 1 8 0 0 0 0 266 0 0 0 100 4 0 0 2 217 104 16 0 1 0 0 294 0 0 0 100 5 0 0 0 22 9 12 0 0 0 0 310 0 0 0 100 6 1 0 0 154 71 182 2 0 0 0 778 0 0 0 100 7 0 0 0 14 1 10 0 0 0 0 0 0 0 0 100 March 4, 2026 at 01:48:27 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 0 0 0 0 0 0 0 100 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 9 1 6 1 0 0 0 266 0 0 0 100 4 0 0 2 213 104 6 0 0 1 0 294 0 0 0 100 5 0 0 0 15 2 16 0 1 0 0 300 0 0 0 100 6 0 0 0 149 71 172 2 0 1 0 767 0 0 0 100 7 0 0 0 13 2 8 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:48:28 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 114 0 0 0 0 0 0 0 0 100 1 0 0 11 214 104 8 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 212 104 4 1 0 0 0 294 0 0 0 100 5 0 0 0 12 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 141 68 164 0 0 1 0 764 0 0 0 100 7 0 0 0 18 4 14 0 1 0 0 4 0 0 0 100 March 4, 2026 at 01:48:29 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 110 0 0 0 0 0 0 0 0 100 1 0 0 11 213 104 6 1 0 0 0 259 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 3 0 0 14 10 2 8 0 0 0 0 267 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 301 0 0 0 100 6 0 0 0 113 51 142 1 1 1 0 746 0 0 0 100 7 0 0 0 53 22 48 0 0 0 0 22 0 0 0 100 March 4, 2026 at 01:48:30 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 110 0 0 0 0 0 0 0 0 100 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 299 0 0 0 100 6 0 0 0 115 53 138 2 0 0 0 771 0 0 0 100 7 0 0 0 56 21 56 0 1 1 0 20 0 0 0 100 March 4, 2026 at 01:48:31 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 116 0 0 0 0 8 0 0 0 100 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 3 0 0 14 9 1 6 1 0 0 0 265 0 0 0 100 4 0 0 2 212 104 6 0 0 0 0 295 0 0 0 100 5 1 0 0 17 7 12 0 0 1 0 310 0 0 0 100 6 0 0 0 115 53 140 0 0 1 0 755 0 0 0 100 7 0 0 0 58 23 54 0 0 0 0 23 0 0 0 100 March 4, 2026 at 01:48:32 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 120 0 1 0 0 0 0 0 0 100 1 0 0 11 214 104 10 0 0 0 0 277 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 14 3 14 0 0 0 0 276 0 0 0 100 4 0 0 2 212 104 4 1 0 0 0 294 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 94 44 116 1 0 1 0 746 0 0 0 100 7 0 0 0 68 28 64 0 1 0 0 20 0 0 0 100 March 4, 2026 at 01:48:33 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2136 126 170 0 2 0 0 0 0 0 0 100 1 0 0 10 220 104 18 1 2 1 0 259 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 300 0 0 0 100 3 0 0 14 12 2 8 0 0 1 0 266 0 0 0 100 4 0 0 3 213 105 6 0 0 1 0 295 0 0 0 100 5 0 0 0 16 4 10 0 0 1 0 300 0 0 0 100 6 0 0 0 9 2 32 0 0 2 0 747 0 0 0 100 7 0 0 0 102 47 94 0 0 1 0 22 0 0 0 100 March 4, 2026 at 01:48:34 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 0 0 100 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 6 0 0 0 8 1 32 1 0 1 0 747 0 0 0 100 7 0 0 0 51 21 46 0 0 0 0 20 0 0 0 100 March 4, 2026 at 01:48:35 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 210 0 0 0 0 0 0 0 0 100 1 0 0 11 214 104 8 0 0 0 0 259 0 0 0 100 2 0 0 0 12 1 12 0 1 0 0 300 0 0 0 100 3 0 0 14 9 1 6 1 0 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 8 1 32 1 0 0 0 748 0 0 0 100 7 0 0 0 54 22 48 0 0 0 0 22 0 0 0 100 March 4, 2026 at 01:48:36 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2191 166 246 0 3 0 0 23 0 0 0 100 1 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 3 0 0 14 13 1 16 0 1 0 0 266 0 0 0 100 4 0 0 3 213 104 6 1 0 0 0 294 0 0 0 100 5 0 0 0 29 13 20 0 0 0 0 314 0 0 0 100 6 0 0 0 11 1 36 0 0 0 0 751 0 0 0 100 7 0 0 0 29 6 24 0 2 0 0 4 0 0 0 100 March 4, 2026 at 01:48:37 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2199 171 250 0 1 0 0 20 0 0 0 100 1 0 0 11 213 104 6 1 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 8 1 32 1 0 1 0 747 0 0 0 100 7 0 0 0 13 2 8 0 1 0 0 2 0 0 0 100 March 4, 2026 at 01:48:38 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2199 171 254 0 0 0 0 20 0 0 0 100 1 0 0 11 212 104 6 0 0 0 0 259 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 10 1 8 0 0 0 0 266 0 0 0 100 4 0 0 2 216 104 14 0 1 0 0 294 0 0 0 100 5 0 0 0 12 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 8 1 32 1 0 0 0 748 0 0 0 100 7 0 0 0 11 1 6 0 1 0 0 0 0 0 0 100 March 4, 2026 at 01:48:39 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 156 232 0 0 0 0 11 0 0 0 100 1 0 0 11 215 104 13 0 3 0 0 277 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 17 2 16 1 1 0 0 278 0 0 0 100 4 4 0 2 222 104 20 0 0 0 0 322 0 0 0 100 5 33 0 0 94 66 44 2 1 0 0 441 0 0 0 99 6 1295 0 2 18 1 51 1 2 0 0 938 0 1 0 99 7 0 0 0 25 2 30 0 3 0 0 45 0 0 0 100 March 4, 2026 at 01:48:40 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 3129 115 2164 1 4 21 0 5 0 1 0 99 1 0 0 11 343 104 241 2 3 59 0 1111 1 1 0 98 2 0 0 0 27 1 36 1 1 10 0 426 0 0 0 100 3 0 0 14 88 37 88 0 2 13 0 355 0 0 0 100 4 2563 0 2 218 104 12 1 0 0 0 321 0 1 0 99 5 0 0 0 1488 1410 168 8 3 155 0 912 0 2 0 98 6 0 0 0 10 1 34 1 1 1 0 749 0 0 0 100 7 0 0 0 1009 1 1998 0 0 97 0 0 0 2 0 98 March 4, 2026 at 01:48:41 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 101 237 0 0 3 0 0 0 0 0 100 1 0 0 11 231 109 26 1 0 0 0 278 0 0 0 100 2 0 0 0 12 3 8 0 0 0 0 322 0 0 0 100 3 0 0 14 113 51 116 0 1 0 0 277 0 0 0 100 4 0 0 2 237 105 48 0 1 5 0 422 0 0 0 100 5 0 0 0 190 167 18 0 0 14 0 300 0 0 0 100 6 0 0 2 9 1 34 1 1 0 0 748 0 0 0 100 7 0 0 0 82 3 140 0 0 3 0 3 0 0 0 100 March 4, 2026 at 01:48:42 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 101 182 0 0 1 0 0 0 0 0 100 1 0 0 11 229 104 36 0 0 0 0 336 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 3 0 0 14 111 52 110 0 0 0 0 269 0 0 0 100 4 0 0 2 218 106 10 0 0 0 0 305 0 0 0 100 5 0 0 0 154 136 14 0 0 8 0 300 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 748 0 0 0 100 7 0 0 0 57 1 98 0 1 6 0 0 0 0 0 100 March 4, 2026 at 01:48:43 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2198 101 288 0 6 29 0 0 0 0 0 100 1 0 0 10 263 107 97 0 6 14 0 271 0 0 0 100 2 0 0 0 20 2 24 0 5 13 0 300 0 0 0 100 3 0 0 14 156 74 154 1 6 22 0 268 0 0 0 100 4 0 0 3 239 105 54 0 7 26 0 316 0 0 0 100 5 0 0 0 204 173 39 0 7 18 0 300 0 0 0 100 6 0 0 0 50 2 110 0 8 36 0 838 0 0 0 100 7 0 0 0 101 3 170 0 5 24 0 2 0 0 0 100 March 4, 2026 at 01:48:44 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2175 101 233 0 5 19 0 0 0 0 0 100 1 0 0 11 244 104 69 0 8 13 0 340 0 0 0 100 2 0 0 0 20 1 22 0 3 10 0 300 0 0 0 100 3 0 0 14 154 76 147 0 6 17 0 268 0 0 0 100 4 0 0 2 222 104 24 1 5 22 0 294 0 0 0 100 5 0 0 0 154 132 30 0 5 16 0 300 0 0 0 100 6 0 0 0 52 3 114 1 8 16 0 759 0 0 0 100 7 0 0 0 86 1 138 0 5 19 0 0 0 0 0 100 March 4, 2026 at 01:48:45 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 0 0 0 0 0 0 100 1 0 0 11 225 106 26 1 2 0 0 270 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 299 0 0 0 100 3 0 0 14 109 51 108 0 0 0 0 268 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 27 16 8 0 0 0 0 299 0 0 0 100 6 0 0 0 16 1 46 0 1 1 0 774 0 0 0 100 7 0 0 0 19 2 14 0 0 0 0 2 0 0 0 100 March 4, 2026 at 01:48:46 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 101 182 0 0 1 0 0 0 0 0 100 1 0 0 11 225 106 22 0 0 0 0 279 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 3 0 0 14 111 51 112 0 0 0 0 274 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 137 125 8 0 1 3 0 300 0 0 0 100 6 0 0 0 31 4 66 1 1 3 0 820 0 0 0 100 7 0 0 0 58 1 92 0 0 1 0 0 0 0 0 100 March 4, 2026 at 01:48:47 AM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 101 134 0 0 2 0 0 0 0 0 100 1 2 0 11 224 104 24 0 0 0 0 298 0 0 0 100 2 0 0 0 13 1 14 0 1 1 0 300 0 0 0 100 3 0 0 14 112 51 110 1 0 0 0 270 0 0 0 100 4 0 0 2 211 104 4 0 0 0 0 294 0 0 0 100 5 0 0 0 88 75 10 0 1 1 0 300 0 0 0 100 6 0 0 0 22 4 48 1 0 0 0 777 0 0 0 100 7 0 0 0 36 2 45 0 1 1 0 2 0 0 0 100