Max level shown: TRCE DEBG INFO WARN ERRO FATA

1			Repacked header meta.bridge_hdr:
2			+--------+---------+---------------------------------+
3			| Byte # | Bits | Field name |
4			+--------+---------+---------------------------------+
5			| 0 | [0 : 0] | *PAD* |
6			| 0 | [1 : 5] | meta.bridge_hdr.reserved |
7			| 0 | [6 : 6] | meta.bridge_hdr.nat_egress_hit |
8			| 0 | [7 : 7] | meta.bridge_hdr.is_mcast_routed |
9			+--------+---------+---------------------------------+
10			| 1 | [0 : 6] | *PAD* |
11			| 1 | [7 : 7] | meta.bridge_hdr.ingress_port |
12			+--------+---------+---------------------------------+
13			| 2 | [0 : 7] | meta.bridge_hdr.ingress_port |
14			+--------+---------+---------------------------------+
15
16
17			Repacked header bridge_hdr_0:
18			+--------+---------+------------------------------+
19			| Byte # | Bits | Field name |
20			+--------+---------+------------------------------+
21			| 0 | [0 : 0] | *PAD* |
22			| 0 | [1 : 5] | bridge_hdr_0.reserved |
23			| 0 | [6 : 6] | bridge_hdr_0.nat_egress_hit |
24			| 0 | [7 : 7] | bridge_hdr_0.is_mcast_routed |
25			+--------+---------+------------------------------+
26			| 1 | [0 : 6] | *PAD* |
27			| 1 | [7 : 7] | bridge_hdr_0.ingress_port |
28			+--------+---------+------------------------------+
29			| 2 | [0 : 7] | bridge_hdr_0.ingress_port |
30			+--------+---------+------------------------------+
31
32