Max level shown:
1 PHV ALLOCATION SUCCESSFUL
2 PHV Allocation
3 +-----------+-------+-----------------+-------------------------------------------------------------+
4 |Container |Gress |Container Slice |Field Slice |
5 +-----------+-------+-----------------+-------------------------------------------------------------+
6 |B0 |I | |ingress::$tmp8 |
7 | | | | |
8 |MB0 |I |[0] |ingress::hdr.inner_ipv4.ttl[0] |
9 | | |[7:1] |ingress::hdr.inner_ipv4.ttl[7:1] |
10 | | |[0] |ingress::hdr.inner_ipv6.hop_limit[0] |
11 | | |[7:1] |ingress::hdr.inner_ipv6.hop_limit[7:1] |
12 | | | | |
13 |... | | | |
14 | | | | |
15 |B1 |I |[0] |ingress::hdr.udp.checksum.$deparse_original_csum |
16 | | |[1] |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |
17 | | |[2] |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |
18 | | |[3] |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |
19 | | |[4] |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |
20 | | |[5] |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |
21 | | |[6] |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |
22 | | |[7] |ingress::filter_hasReturned |
23 | | | | |
24 |MB1 |I |[3:0] |ingress::ig_intr_md_for_dprsr.mirror_type |
25 | | | | |
26 |... | | | |
27 | | | | |
28 |B2 |I |[0] |ingress::hdr.ipv4.ttl[0] |
29 | | |[7:1] |ingress::hdr.ipv4.ttl[7:1] |
30 | | |[0] |ingress::hdr.ipv6.hop_limit[0] |
31 | | |[7:1] |ingress::hdr.ipv6.hop_limit[7:1] |
32 | | | | |
33 |MB2 |I |[2:0] |ingress::ig_intr_md_for_dprsr.drop_ctl |
34 | | | | |
35 |... | | | |
36 | | | | |
37 |B3 |I |[0] |ingress::meta.bridge_hdr.is_mcast_routed |
38 | | |[1] |ingress::meta.bridge_hdr.nat_egress_hit |
39 | | |[6:2] |ingress::meta.bridge_hdr.reserved |
40 | | |[7] |ingress::meta.bridge_hdr.__pad_0 |
41 | | |[7] |ingress::meta.nat_egress_hit |
42 | | |[1] |ingress::meta.is_switch_address |
43 | | | | |
44 |MB3 |I | |ingress::hdr.ethernet.src_mac[7:0] |
45 | | | | |
46 |... | | | |
47 | | | | |
48 |B4 |E |[0] |egress::hdr.geneve_opts.oxg_mss_tag.$valid |
49 | | |[1] |egress::hdr.geneve_opts.oxg_mss.$valid |
50 | | |[2] |egress::hdr.ipv6.$valid |
51 | | |[3] |egress::hdr.tcp.$valid |
52 | | |[4] |egress::hdr.inner_ipv4.hdr_checksum.$deparse_original_csum |
53 | | |[5] |egress::hdr.inner_ipv4.hdr_checksum.$deparse_updated_csum_0 |
54 | | |[6] |egress::eg_intr_md_for_dprsr.mirror_io_select |
55 | | |[7] |egress::is_link_local_ipv6_mcast_0 |
56 | | | | |
57 |B5 |I |[0] |ingress::meta.route_ttl_is_1[0] |
58 | | |[7:1] |ingress::meta.route_ttl_is_1[7:1] |
59 | | | |ingress::meta.nat_geneve_vni[23:16] |
60 | | | | |
61 |B6 |E | |egress::hdr.inner_ipv4.ttl |
62 | | | |egress::hdr.inner_ipv6.hop_limit |
63 | | | | |
64 |B7 |E |[0] |egress::meta.bridge_hdr.is_mcast_routed |
65 | | |[1] |egress::meta.bridge_hdr.nat_egress_hit |
66 | | | | |
67 |B8 |I |[5:0] |ingress::hdr.geneve_opts.oxg_mcast.reserved[29:24] |
68 | | |[7:6] |ingress::hdr.geneve_opts.oxg_mcast.mcast_tag |
69 | | | | |
70 |B9 |E | |egress::meta.drop_reason |
71 | | | | |
72 |B10 |I |[3:0] |ingress::hdr.vlan.vlan_id[11:8] |
73 | | |[4] |ingress::hdr.vlan.dei |
74 | | |[7:5] |ingress::hdr.vlan.pcp |
75 | | | | |
76 |B11 |I | |ingress::hdr.geneve.vni[23:16] |
77 | | | | |
78 |MB4 |I | |ingress::hdr.inner_ipv4.protocol |
79 | | | |ingress::hdr.inner_ipv6.next_hdr |
80 | | | | |
81 |... | | | |
82 | | | | |
83 |MB5 |I | |ingress::hdr.ipv4.protocol |
84 | | | |ingress::hdr.ipv6.next_hdr |
85 | | | | |
86 |... | | | |
87 | | | | |
88 |MB6 |I | |ingress::hdr.vlan.vlan_id[7:0] |
89 | | | | |
90 |... | | | |
91 | | | | |
92 |MB7 |I | |ingress::hdr.geneve.reserved2 |
93 | | | | |
94 |... | | | |
95 | | | | |
96 |B12 |I | |ingress::meta.drop_reason |
97 | | | | |
98 |B13 |E | |egress::meta.port_number |
99 | | | | |
100 |... | | | |
101 | | | | |
102 |MB8 |E | |egress::hdr.geneve.reserved2 |
103 | | | | |
104 |... | | | |
105 | | | | |
106 |MB9 |E | |egress::hdr.inner_ipv4.src_addr[31:24] |
107 | | | |egress::hdr.inner_ipv6.dst_addr[55:48] |
108 | | | | |
109 |... | | | |
110 | | | | |
111 |MB10 |E | |egress::hdr.inner_ipv6.dst_addr[63:56] |
112 | | | | |
113 |... | | | |
114 | | | | |
115 |MB11 |E | |egress::hdr.inner_eth.src_mac[7:0] |
116 | | | | |
117 |... | | | |
118 | | | | |
119 |H0 |I | |ingress::meta.icmp_csum |
120 | | | | |
121 |MH0 |I | |ingress::hdr.inner_ipv4.total_len |
122 | | | |ingress::hdr.inner_ipv6.payload_len |
123 | | | | |
124 |DH0 |I |[12:0] |ingress::ig_intr_md_for_tm.level1_mcast_hash ARA |
125 | | | | |
126 |H1 |I | |ingress::meta.body_checksum |
127 | | | | |
128 |MH1 |I | |ingress::hdr.ipv4.total_len |
129 | | | | |
130 |... | | | |
131 | | | | |
132 |H2 |I | |ingress::meta.l4_length |
133 | | | | |
134 |MH2 |I | |ingress::hdr.inner_udp.hdr_length |
135 | | | |ingress::hdr.inner_icmp.data[15:0] |
136 | | | |ingress::hdr.icmp.data[15:0] |
137 | | | |ingress::hdr.inner_tcp.window |
138 | | | |ingress::hdr.tcp.window |
139 | | | | |
140 |... | | | |
141 | | | | |
142 |H3 |I | |ingress::hdr.ipv6.payload_len |
143 | | | | |
144 |MH3 |I | |ingress::ig_intr_md_for_tm.mcast_grp_a |
145 | | | | |
146 |... | | | |
147 | | | | |
148 |H4 |I |[0] |ingress::meta.ipv4_checksum_err |
149 | | |[8:1] |ingress::meta.pkt_type[7:0] |
150 | | |[9] |ingress::meta.dropped |
151 | | |[10] |ingress::meta.is_mcast |
152 | | |[11] |ingress::meta.is_link_local_mcastv6 |
153 | | |[12] |ingress::meta.resolve_nexthop |
154 | | |[13] |ingress::meta.nexthop_is_v6 |
155 | | | | |
156 |H5 |E |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |
157 | | |[1] |egress::eg_intr_md.egress_port.$valid |
158 | | |[2] |egress::eg_intr_md_for_dprsr.drop_ctl.$valid |
159 | | |[3] |egress::hdr.ethernet.$valid |
160 | | |[4] |egress::hdr.vlan.$valid |
161 | | |[5] |egress::hdr.ipv4.$valid |
162 | | |[6] |egress::hdr.udp.$valid |
163 | | |[7] |egress::hdr.geneve.$valid |
164 | | |[8] |egress::hdr.inner_eth.$valid |
165 | | |[9] |egress::hdr.inner_ipv4.$valid |
166 | | |[10] |egress::hdr.inner_tcp.$valid |
167 | | |[11] |egress::hdr.inner_udp.$valid |
168 | | |[12] |egress::hdr.inner_ipv6.$valid |
169 | | |[13] |egress::hdr.geneve_opts.oxg_ext_tag.$valid |
170 | | |[14] |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |
171 | | |[15] |egress::hdr.geneve_opts.oxg_mcast.$valid |
172 | | | | |
173 |H6 |E |[11:0] |egress::hdr.vlan.vlan_id |
174 | | |[12] |egress::hdr.vlan.dei |
175 | | |[15:13] |egress::hdr.vlan.pcp |
176 | | | | |
177 |H7 |E |[11:0] |egress::meta.vlan_id |
178 | | |[12] |egress::mcast_mac_rewrite_hit |
179 | | | | |
180 |H8 |I | |ingress::hdr.udp.hdr_length |
181 | | | | |
182 |H9 |I |[12:0] |ingress::ig_intr_md_for_tm.level1_mcast_hash |
183 | | |[12:0] |ingress::ig_intr_md_for_tm.level1_mcast_hash ARA |
184 | | | |ingress::meta.nexthop[127:112] ARA |
185 | | |[14:13] |ingress::meta.pkt_type[9:8] |
186 | | | | |
187 |H10 |I |[12:0] |ingress::ig_intr_md_for_tm.level2_mcast_hash |
188 | | | | |
189 |H11 |I | |ingress::hdr.sidecar.sc_payload[127:112] |
190 | | | | |
191 |MH4 |I |[7:0] |ingress::l3_router_fwd.slot[7:0] |
192 | | |[15:8] |ingress::l3_router_fwd.slot[15:8] |
193 | | | | |
194 |DH4 |I | |ingress::hdr.ethernet.src_mac[47:32] ARA |
195 | | | | |
196 |MH5 |I |[8:0] |ingress::ig_intr_md.ingress_port |
197 | | | | |
198 |DH5 |I | |ingress::hdr.geneve.vni[15:0] ARA |
199 | | | | |
200 |MH6 |I |[8:0] |ingress::ig_intr_md_for_tm.ucast_egress_port |
201 | | | | |
202 |... | | | |
203 | | | | |
204 |MH7 |I | |ingress::ig_intr_md_for_tm.mcast_grp_b |
205 | | | | |
206 |... | | | |
207 | | | | |
208 |H12 |I |[7:0] |ingress::l3_router_fwd.idx[7:0] |
209 | | |[15:8] |ingress::l3_router_fwd.idx[15:8] |
210 | | | | |
211 |H13 |I |[8:0] |ingress::hdr.sidecar.sc_egress[8:0] |
212 | | |[15:9] |ingress::hdr.sidecar.sc_egress[15:9] |
213 | | | | |
214 |H14 |I |[8:0] |ingress::hdr.sidecar.sc_ingress[8:0] |
215 | | |[15:9] |ingress::hdr.sidecar.sc_ingress[15:9] |
216 | | | | |
217 |H15 |I |[7:0] |ingress::hdr.inner_tcp.flags |
218 | | |[11:8] |ingress::hdr.inner_tcp.res |
219 | | |[15:12] |ingress::hdr.inner_tcp.data_offset |
220 | | |[7:0] |ingress::hdr.tcp.flags |
221 | | |[11:8] |ingress::hdr.tcp.res |
222 | | |[15:12] |ingress::hdr.tcp.data_offset |
223 | | | |ingress::hdr.inner_udp.src_port |
224 | | |[7:0] |ingress::hdr.inner_icmp.code |
225 | | |[15:8] |ingress::hdr.inner_icmp.type |
226 | | |[7:0] |ingress::hdr.icmp.code |
227 | | |[15:8] |ingress::hdr.icmp.type |
228 | | | | |
229 |H16 |I | |ingress::hdr.udp.src_port |
230 | | | | |
231 |H17 |I | |ingress::hdr.geneve.vni[15:0] |
232 | | | |ingress::hdr.geneve.vni[15:0] ARA |
233 | | |[7:0] |ingress::l3_router_fwd.slots ARA |
234 | | | | |
235 |H18 |I |[7:0] |ingress::hdr.inner_ipv4.diffserv |
236 | | |[11:8] |ingress::hdr.inner_ipv4.ihl |
237 | | |[15:12] |ingress::hdr.inner_ipv4.version |
238 | | | | |
239 |H19 |I |[7:0] |ingress::hdr.ipv4.diffserv |
240 | | |[11:8] |ingress::hdr.ipv4.ihl |
241 | | |[15:12] |ingress::hdr.ipv4.version |
242 | | | | |
243 |H20 |I | |ingress::meta.nat_geneve_vni[15:0] ARA |
244 | | | |ingress::hdr.ethernet.src_mac[47:32] |
245 | | | |ingress::hdr.ethernet.src_mac[47:32] ARA |
246 | | | | |
247 |H21 |I |[7:0] |ingress::meta.orig_src_mac[39:32] |
248 | | |[15:8] |ingress::meta.orig_src_mac[47:40] |
249 | | | | |
250 |H22 |I |[7:0] |ingress::hdr.ethernet.dst_mac[39:32] |
251 | | |[15:8] |ingress::hdr.ethernet.dst_mac[47:40] |
252 | | | | |
253 |H23 |I |[8:0] |ingress::meta.bridge_hdr.ingress_port |
254 | | |[15:9] |ingress::meta.bridge_hdr.__pad_1 |
255 | | |[9] |ingress::meta.allow_source_mcast |
256 | | |[10] |ingress::meta.service_routed |
257 | | |[11] |ingress::meta.nat_ingress_hit |
258 | | |[12] |ingress::meta.uplink_ingress |
259 | | |[13] |ingress::meta.encap_needed |
260 | | |[14] |ingress::meta.icmp_recalc |
261 | | | | |
262 |MH8 |E |[8:0] |egress::eg_intr_md.egress_port |
263 | | | | |
264 |DH8 |I | |ingress::hdr.inner_ipv4.hdr_checksum ARA |
265 | | | | |
266 |MH9 |E |[2:0] |egress::eg_intr_md_for_dprsr.drop_ctl |
267 | | | | |
268 |DH9 |I | |ingress::hdr.inner_eth.dst_mac[47:32] ARA |
269 | | | | |
270 |MH10 |E | |egress::hdr.vlan.ether_type |
271 | | | | |
272 |... | | | |
273 | | | | |
274 |MH11 |E | |egress::hdr.geneve.vni[15:0] |
275 | | | | |
276 |... | | | |
277 | | | | |
278 |H24 |E |[8:0] |egress::meta.bridge_hdr.ingress_port |
279 | | | | |
280 |H25 |E | |egress::hdr.inner_ipv6.dst_addr[47:32] |
281 | | | |egress::hdr.inner_ipv4.hdr_checksum |
282 | | | | |
283 |H26 |I | |ingress::meta.nat_inner_mac[47:32] |
284 | | | | |
285 |H27 |E | |egress::hdr.ethernet.ether_type |
286 | | | | |
287 |H28 |I | |ingress::hdr.inner_ipv4.hdr_checksum |
288 | | | |ingress::hdr.inner_ipv4.hdr_checksum ARA |
289 | | | |ingress::meta.nexthop[111:96] ARA |
290 | | | | |
291 |H29 |I | |ingress::hdr.ipv4.hdr_checksum |
292 | | | | |
293 |H30 |I |[7:0] |ingress::hdr.sidecar.sc_pad |
294 | | |[15:8] |ingress::hdr.sidecar.sc_code |
295 | | | | |
296 |H31 |I | |ingress::hdr.inner_eth.dst_mac[47:32] |
297 | | | |ingress::hdr.inner_eth.dst_mac[47:32] ARA |
298 | | |[0] |ingress::l3_router_fwd.is_hit ARA |
299 | | | | |
300 |H32 |I | |ingress::hdr.sidecar.sc_payload[111:96] |
301 | | | | |
302 |H33 |I | |ingress::meta.nat_ingress_csum |
303 | | | | |
304 |H34 |E | |egress::eg_intr_md.egress_rid |
305 | | | | |
306 |... | | | |
307 | | | | |
308 |MH12 |I | |ingress::ig_intr_md_for_tm.level1_exclusion_id |
309 | | | | |
310 |DH12 |E | |egress::hdr.inner_eth.ether_type ARA |
311 | | | | |
312 |MH13 |I | |ingress::ig_intr_md_for_tm.rid |
313 | | | | |
314 |... | | | |
315 | | | | |
316 |MH14 |I |[8:0] |ingress::ig_intr_md_for_tm.level2_exclusion_id |
317 | | | | |
318 |... | | | |
319 | | | | |
320 |MH15 |I | |ingress::hdr.inner_eth.src_mac[15:0] |
321 | | | | |
322 |... | | | |
323 | | | | |
324 |H36 |E | |egress::hdr.ethernet.src_mac[47:32] |
325 | | | | |
326 |H37 |E | |egress::hdr.ethernet.dst_mac[47:32] |
327 | | | | |
328 |H38 |E | |egress::hdr.inner_eth.ether_type |
329 | | | |egress::hdr.inner_eth.ether_type ARA |
330 | | |[0] |egress::meta.ipv4_checksum_recalc ARA |
331 | | | | |
332 |H39 |I | |ingress::meta.l4_src_port |
333 | | | | |
334 |... | | | |
335 | | | | |
336 |MH16 |I | |ingress::hdr.vlan.ether_type |
337 | | | | |
338 |... | | | |
339 | | | | |
340 |MH17 |I | |ingress::hdr.sidecar.sc_ether_type |
341 | | | | |
342 |... | | | |
343 | | | | |
344 |MH18 |I | |ingress::hdr.ethernet.ether_type |
345 | | | | |
346 |... | | | |
347 | | | | |
348 |MH19 |I | |ingress::hdr.inner_eth.ether_type |
349 | | | | |
350 |... | | | |
351 | | | | |
352 |H48 |E | |egress::meta.decap_ports_0[15:0] |
353 | | | | |
354 |H49 |E | |egress::meta.decap_ports_1[15:0] |
355 | | | | |
356 |H50 |E | |egress::meta.decap_ports_2[15:0] |
357 | | | | |
358 |H51 |E | |egress::meta.decap_ports_3[15:0] |
359 | | | | |
360 |H52 |E | |egress::meta.decap_ports_4[15:0] |
361 | | | | |
362 |H53 |E | |egress::meta.decap_ports_5[15:0] |
363 | | | | |
364 |H54 |E | |egress::meta.decap_ports_6[15:0] |
365 | | | | |
366 |H55 |E | |egress::meta.decap_ports_7[15:0] |
367 | | | | |
368 |H56 |E | |egress::meta.bitmap_result[15:0] |
369 | | | | |
370 |... | | | |
371 | | | | |
372 |MH20 |I | |ingress::hdr.inner_icmp.data[31:16] |
373 | | | |ingress::hdr.icmp.data[31:16] |
374 | | | |ingress::hdr.inner_udp.dst_port |
375 | | | |ingress::hdr.inner_tcp.urgent_ptr |
376 | | | |ingress::hdr.tcp.urgent_ptr |
377 | | | | |
378 |... | | | |
379 | | | | |
380 |MH21 |I | |ingress::hdr.udp.dst_port |
381 | | | | |
382 |... | | | |
383 | | | | |
384 |MH22 |I | |ingress::hdr.inner_tcp.checksum |
385 | | | |ingress::hdr.tcp.checksum |
386 | | | |ingress::hdr.inner_udp.checksum |
387 | | | |ingress::hdr.inner_icmp.hdr_checksum |
388 | | | |ingress::hdr.icmp.hdr_checksum |
389 | | | | |
390 |... | | | |
391 | | | | |
392 |MH23 |I | |ingress::hdr.udp.checksum |
393 | | | | |
394 |... | | | |
395 | | | | |
396 |H60 |I | |ingress::meta.l4_dst_port |
397 | | | | |
398 |H61 |E | |egress::meta.decap_ports_0[31:16] |
399 | | | | |
400 |H62 |E | |egress::meta.decap_ports_1[31:16] |
401 | | | | |
402 |H63 |E | |egress::meta.decap_ports_2[31:16] |
403 | | | | |
404 |H64 |E | |egress::meta.decap_ports_3[31:16] |
405 | | | | |
406 |H65 |E | |egress::meta.decap_ports_4[31:16] |
407 | | | | |
408 |H66 |E | |egress::meta.decap_ports_5[31:16] |
409 | | | | |
410 |H67 |E | |egress::meta.decap_ports_6[31:16] |
411 | | | | |
412 |H68 |E | |egress::meta.decap_ports_7[31:16] |
413 | | | | |
414 |H69 |E | |egress::meta.bitmap_result[31:16] |
415 | | | | |
416 |... | | | |
417 | | | | |
418 |W0 |I |[0] |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |
419 | | |[1] |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |
420 | | |[2] |ingress::ig_intr_md_for_tm.mcast_grp_a.$valid |
421 | | |[3] |ingress::ig_intr_md_for_tm.mcast_grp_b.$valid |
422 | | |[4] |ingress::ig_intr_md_for_tm.rid.$valid |
423 | | |[5] |ingress::ig_intr_md_for_tm.level1_exclusion_id.$valid |
424 | | |[6] |ingress::ig_intr_md_for_tm.level2_exclusion_id.$valid |
425 | | |[7] |ingress::ig_intr_md_for_tm.level1_mcast_hash.$valid |
426 | | |[8] |ingress::ig_intr_md_for_tm.level2_mcast_hash.$valid |
427 | | |[9] |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |
428 | | |[10] |ingress::meta.bridge_hdr.$valid |
429 | | |[11] |ingress::hdr.ethernet.$valid |
430 | | |[12] |ingress::hdr.sidecar.$valid |
431 | | |[13] |ingress::hdr.vlan.$valid |
432 | | |[14] |ingress::hdr.ipv4.$valid |
433 | | |[15] |ingress::hdr.icmp.$valid |
434 | | |[16] |ingress::hdr.tcp.$valid |
435 | | |[17] |ingress::hdr.udp.$valid |
436 | | |[18] |ingress::hdr.geneve.$valid |
437 | | |[19] |ingress::hdr.inner_eth.$valid |
438 | | |[20] |ingress::hdr.inner_ipv4.$valid |
439 | | |[21] |ingress::hdr.inner_tcp.$valid |
440 | | |[22] |ingress::hdr.inner_udp.$valid |
441 | | |[23] |ingress::hdr.inner_icmp.$valid |
442 | | |[24] |ingress::hdr.inner_ipv6.$valid |
443 | | |[25] |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |
444 | | |[26] |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |
445 | | |[27] |ingress::hdr.geneve_opts.oxg_mcast.$valid |
446 | | |[28] |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |
447 | | |[29] |ingress::hdr.geneve_opts.oxg_mss.$valid |
448 | | |[30] |ingress::hdr.ipv6.$valid |
449 | | |[31] |ingress::hdr.arp.$valid |
450 | | | | |
451 |MW0 |E |[31:30] |egress::mcast_tag_0 |
452 | | | | |
453 |... | | | |
454 | | | | |
455 |W1 |I |[4:0] |ingress::hdr.geneve_opts.oxg_ext_tag.opt_len |
456 | | |[7:5] |ingress::hdr.geneve_opts.oxg_ext_tag.reserved |
457 | | |[14:8] |ingress::hdr.geneve_opts.oxg_ext_tag.type |
458 | | |[15] |ingress::hdr.geneve_opts.oxg_ext_tag.crit |
459 | | |[31:16] |ingress::hdr.geneve_opts.oxg_ext_tag.class |
460 | | | | |
461 |MW1 |E |[22:0] |egress::hdr.ipv6.dst_addr[22:0] |
462 | | |[31:23] |egress::hdr.ipv6.dst_addr[31:23] |
463 | | |[22:0] |egress::hdr.ipv4.dst_addr[22:0] |
464 | | |[31:23] |egress::hdr.ipv4.dst_addr[31:23] |
465 | | | | |
466 |... | | | |
467 | | | | |
468 |W2 |E |[4:0] |egress::hdr.geneve_opts.oxg_ext_tag.opt_len |
469 | | |[7:5] |egress::hdr.geneve_opts.oxg_ext_tag.reserved |
470 | | |[14:8] |egress::hdr.geneve_opts.oxg_ext_tag.type |
471 | | |[15] |egress::hdr.geneve_opts.oxg_ext_tag.crit |
472 | | |[31:16] |egress::hdr.geneve_opts.oxg_ext_tag.class |
473 | | |[29:0] |egress::hdr.geneve_opts.oxg_mcast.reserved |
474 | | |[31:30] |egress::hdr.geneve_opts.oxg_mcast.mcast_tag |
475 | | | |egress::hdr.geneve_opts.oxg_mss.mss |
476 | | | | |
477 |MW2 |E |[22:0] |egress::hdr.inner_ipv6.dst_addr[22:0] |
478 | | |[31:23] |egress::hdr.inner_ipv6.dst_addr[31:23] |
479 | | |[22:0] |egress::hdr.inner_ipv4.dst_addr[22:0] |
480 | | |[31:23] |egress::hdr.inner_ipv4.dst_addr[31:23] |
481 | | | | |
482 |... | | | |
483 | | | | |
484 |W3 |E |[22:0] |egress::hdr.ethernet.dst_mac[22:0] |
485 | | |[31:23] |egress::hdr.ethernet.dst_mac[31:23] |
486 | | | | |
487 |MW3 |E |[15:0] |egress::hdr.ipv6.dst_addr[111:96] |
488 | | |[31:16] |egress::hdr.ipv6.dst_addr[127:112] |
489 | | | | |
490 |... | | | |
491 | | | | |
492 |W4 |I |[15:0] |ingress::hdr.inner_tcp.dst_port |
493 | | |[31:16] |ingress::hdr.inner_tcp.src_port |
494 | | |[15:0] |ingress::hdr.tcp.dst_port |
495 | | |[31:16] |ingress::hdr.tcp.src_port |
496 | | | | |
497 |W5 |I | |ingress::hdr.inner_tcp.ack_no |
498 | | | |ingress::hdr.tcp.ack_no |
499 | | | | |
500 |W6 |I | |ingress::hdr.inner_tcp.seq_no |
501 | | | |ingress::hdr.tcp.seq_no |
502 | | | | |
503 |W7 |I |[15:0] |ingress::hdr.geneve.protocol |
504 | | |[21:16] |ingress::hdr.geneve.reserved |
505 | | |[22] |ingress::hdr.geneve.crit |
506 | | |[23] |ingress::hdr.geneve.ctrl |
507 | | |[29:24] |ingress::hdr.geneve.opt_len |
508 | | |[31:30] |ingress::hdr.geneve.version |
509 | | | | |
510 |W8 |E |[15:0] |egress::hdr.tcp.window |
511 | | |[23:16] |egress::hdr.tcp.flags |
512 | | |[27:24] |egress::hdr.tcp.res |
513 | | |[31:28] |egress::hdr.tcp.data_offset |
514 | | | | |
515 |W9 |E |[15:0] |egress::hdr.tcp.urgent_ptr |
516 | | |[31:16] |egress::hdr.tcp.checksum |
517 | | | | |
518 |W10 |E |[15:0] |egress::hdr.tcp.dst_port |
519 | | |[31:16] |egress::hdr.tcp.src_port |
520 | | | | |
521 |W11 |E | |egress::hdr.ethernet.src_mac[31:0] |
522 | | | | |
523 |MW4 |I |[7:0] |ingress::hdr.inner_ipv4.dst_addr[7:0] |
524 | | |[15:8] |ingress::hdr.inner_ipv4.dst_addr[15:8] |
525 | | |[22:16] |ingress::hdr.inner_ipv4.dst_addr[22:16] |
526 | | |[27:23] |ingress::hdr.inner_ipv4.dst_addr[27:23] |
527 | | |[31:28] |ingress::hdr.inner_ipv4.dst_addr[31:28] |
528 | | |[7:0] |ingress::hdr.inner_ipv6.dst_addr[7:0] |
529 | | |[15:8] |ingress::hdr.inner_ipv6.dst_addr[15:8] |
530 | | |[22:16] |ingress::hdr.inner_ipv6.dst_addr[22:16] |
531 | | |[23] |ingress::hdr.inner_ipv6.dst_addr[23] |
532 | | |[31:24] |ingress::hdr.inner_ipv6.dst_addr[31:24] |
533 | | | | |
534 |DW4 |I | |ingress::hdr.inner_eth.src_mac[47:16] ARA |
535 | | | | |
536 |MW5 |I |[7:0] |ingress::hdr.inner_ipv6.src_addr[7:0] |
537 | | |[15:8] |ingress::hdr.inner_ipv6.src_addr[15:8] |
538 | | |[22:16] |ingress::hdr.inner_ipv6.src_addr[22:16] |
539 | | |[23] |ingress::hdr.inner_ipv6.src_addr[23] |
540 | | |[31:24] |ingress::hdr.inner_ipv6.src_addr[31:24] |
541 | | |[7:0] |ingress::hdr.inner_ipv4.src_addr[7:0] |
542 | | |[15:8] |ingress::hdr.inner_ipv4.src_addr[15:8] |
543 | | |[22:16] |ingress::hdr.inner_ipv4.src_addr[22:16] |
544 | | |[27:23] |ingress::hdr.inner_ipv4.src_addr[27:23] |
545 | | |[31:28] |ingress::hdr.inner_ipv4.src_addr[31:28] |
546 | | | | |
547 |DW5 |I | |ingress::hdr.inner_eth.dst_mac[31:0] ARA |
548 | | | | |
549 |MW6 |I |[7:0] |ingress::hdr.ipv4.dst_addr[7:0] |
550 | | |[15:8] |ingress::hdr.ipv4.dst_addr[15:8] |
551 | | |[22:16] |ingress::hdr.ipv4.dst_addr[22:16] |
552 | | |[27:23] |ingress::hdr.ipv4.dst_addr[27:23] |
553 | | |[31:28] |ingress::hdr.ipv4.dst_addr[31:28] |
554 | | |[7:0] |ingress::hdr.ipv6.dst_addr[7:0] |
555 | | |[15:8] |ingress::hdr.ipv6.dst_addr[15:8] |
556 | | |[22:16] |ingress::hdr.ipv6.dst_addr[22:16] |
557 | | |[23] |ingress::hdr.ipv6.dst_addr[23] |
558 | | |[31:24] |ingress::hdr.ipv6.dst_addr[31:24] |
559 | | | | |
560 |... | | | |
561 | | | | |
562 |MW7 |I |[7:0] |ingress::hdr.ethernet.dst_mac[7:0] |
563 | | |[15:8] |ingress::hdr.ethernet.dst_mac[15:8] |
564 | | |[22:16] |ingress::hdr.ethernet.dst_mac[22:16] |
565 | | |[23] |ingress::hdr.ethernet.dst_mac[23] |
566 | | |[31:24] |ingress::hdr.ethernet.dst_mac[31:24] |
567 | | | | |
568 |... | | | |
569 | | | | |
570 |W12 |I |[7:0] |ingress::meta.orig_src_mac[7:0] |
571 | | |[15:8] |ingress::meta.orig_src_mac[15:8] |
572 | | |[22:16] |ingress::meta.orig_src_mac[22:16] |
573 | | |[23] |ingress::meta.orig_src_mac[23] |
574 | | |[31:24] |ingress::meta.orig_src_mac[31:24] |
575 | | |[7:0] |$tmp13 |
576 | | | | |
577 |W13 |I |[7:0] |ingress::meta.orig_src_ipv4[7:0] |
578 | | |[15:8] |ingress::meta.orig_src_ipv4[15:8] |
579 | | |[22:16] |ingress::meta.orig_src_ipv4[22:16] |
580 | | |[27:23] |ingress::meta.orig_src_ipv4[27:23] |
581 | | |[31:28] |ingress::meta.orig_src_ipv4[31:28] |
582 | | |[7:0] |$tmp14 |
583 | | | | |
584 |W14 |I |[7:0] |ingress::meta.nat_ingress_tgt[7:0] |
585 | | |[15:8] |ingress::meta.nat_ingress_tgt[15:8] |
586 | | |[22:16] |ingress::meta.nat_ingress_tgt[22:16] |
587 | | |[23] |ingress::meta.nat_ingress_tgt[23] |
588 | | |[31:24] |ingress::meta.nat_ingress_tgt[31:24] |
589 | | | | |
590 |W15 |I |[7:0] |ingress::hdr.ipv6.src_addr[7:0] |
591 | | |[15:8] |ingress::hdr.ipv6.src_addr[15:8] |
592 | | |[22:16] |ingress::hdr.ipv6.src_addr[22:16] |
593 | | |[23] |ingress::hdr.ipv6.src_addr[23] |
594 | | |[31:24] |ingress::hdr.ipv6.src_addr[31:24] |
595 | | |[7:0] |ingress::hdr.ipv4.src_addr[7:0] |
596 | | |[15:8] |ingress::hdr.ipv4.src_addr[15:8] |
597 | | |[22:16] |ingress::hdr.ipv4.src_addr[22:16] |
598 | | |[27:23] |ingress::hdr.ipv4.src_addr[27:23] |
599 | | |[31:28] |ingress::hdr.ipv4.src_addr[31:28] |
600 | | | | |
601 |W16 |I | |ingress::hdr.inner_eth.src_mac[47:16] |
602 | | | |ingress::hdr.inner_eth.src_mac[47:16] ARA |
603 | | | |ingress::meta.nexthop[31:0] ARA |
604 | | | | |
605 |W17 |I | |ingress::hdr.inner_eth.dst_mac[31:0] |
606 | | | |ingress::hdr.inner_eth.dst_mac[31:0] ARA |
607 | | | |ingress::meta.nexthop[63:32] ARA |
608 | | | | |
609 |W18 |I | |ingress::meta.nat_inner_mac[31:0] |
610 | | |[7:0] |ingress::l3_router_fwd.ecmp_hash |
611 | | | | |
612 |W19 |I | |ingress::hdr.sidecar.sc_payload[31:0] |
613 | | | | |
614 |W20 |I | |ingress::hdr.sidecar.sc_payload[63:32] |
615 | | | | |
616 |... | | | |
617 | | | | |
618 |W22 |E | |egress::hdr.inner_ipv6.dst_addr[95:64] |
619 | | | | |
620 |W23 |E | |egress::hdr.inner_ipv6.dst_addr[127:96] |
621 | | | | |
622 |MW8 |I |[15:0] |ingress::hdr.inner_ipv6.dst_addr[111:96] |
623 | | |[23:16] |ingress::hdr.inner_ipv6.dst_addr[119:112] |
624 | | |[31:24] |ingress::hdr.inner_ipv6.dst_addr[127:120] |
625 | | | | |
626 |... | | | |
627 | | | | |
628 |MW9 |I |[15:0] |ingress::hdr.inner_ipv6.src_addr[111:96] |
629 | | |[23:16] |ingress::hdr.inner_ipv6.src_addr[119:112] |
630 | | |[31:24] |ingress::hdr.inner_ipv6.src_addr[127:120] |
631 | | | | |
632 |... | | | |
633 | | | | |
634 |MW10 |I |[15:0] |ingress::hdr.ipv6.dst_addr[111:96] |
635 | | |[23:16] |ingress::hdr.ipv6.dst_addr[119:112] |
636 | | |[31:24] |ingress::hdr.ipv6.dst_addr[127:120] |
637 | | | | |
638 |... | | | |
639 | | | | |
640 |MW11 |I |[15:0] |ingress::hdr.ipv6.src_addr[111:96] |
641 | | |[23:16] |ingress::hdr.ipv6.src_addr[119:112] |
642 | | |[31:24] |ingress::hdr.ipv6.src_addr[127:120] |
643 | | | | |
644 |... | | | |
645 | | | | |
646 |W24 |I |[15:0] |ingress::meta.nat_ingress_tgt[111:96] |
647 | | |[23:16] |ingress::meta.nat_ingress_tgt[119:112] |
648 | | |[31:24] |ingress::meta.nat_ingress_tgt[127:120] |
649 | | | | |
650 |W25 |E | |egress::hdr.ipv6.dst_addr[63:32] |
651 | | | | |
652 |W26 |E | |egress::hdr.ipv6.dst_addr[95:64] |
653 | | | | |
654 |W27 |E | |egress::hdr.tcp.ack_no |
655 | | | | |
656 |W28 |E | |egress::hdr.tcp.seq_no |
657 | | | | |
658 |W29 |I | |ingress::meta.orig_dst_ipv4 |
659 | | | | |
660 |... | | | |
661 | | | | |
662 |MW12 |I | |ingress::hdr.inner_ipv6.dst_addr[63:32] |
663 | | | | |
664 |DW12 |I | |ingress::hdr.ipv6.src_addr[95:64] ARA |
665 | | | | |
666 |MW13 |I | |ingress::hdr.inner_ipv6.src_addr[63:32] |
667 | | | | |
668 |... | | | |
669 | | | | |
670 |MW14 |I | |ingress::hdr.ipv6.src_addr[63:32] |
671 | | | | |
672 |... | | | |
673 | | | | |
674 |MW15 |I | |ingress::hdr.inner_ipv6.dst_addr[95:64] |
675 | | | | |
676 |... | | | |
677 | | | | |
678 |W36 |I | |ingress::hdr.ipv6.dst_addr[63:32] |
679 | | |[12:0] |ingress::hdr.ipv4.frag_offset |
680 | | |[15:13] |ingress::hdr.ipv4.flags |
681 | | |[31:16] |ingress::hdr.ipv4.identification |
682 | | | | |
683 |W37 |I | |ingress::hdr.inner_ipv6.src_addr[95:64] |
684 | | |[12:0] |ingress::hdr.inner_ipv4.frag_offset |
685 | | |[15:13] |ingress::hdr.inner_ipv4.flags |
686 | | |[31:16] |ingress::hdr.inner_ipv4.identification |
687 | | | | |
688 |W38 |I | |ingress::meta.nat_ingress_tgt[63:32] |
689 | | | | |
690 |W39 |I | |ingress::hdr.ipv6.dst_addr[95:64] |
691 | | | | |
692 |W40 |I | |ingress::hdr.ipv6.src_addr[95:64] |
693 | | | |ingress::hdr.ipv6.src_addr[95:64] ARA |
694 | | | |ingress::meta.nexthop[95:64] ARA |
695 | | | | |
696 |W41 |I |[19:0] |ingress::hdr.inner_ipv6.flow_label |
697 | | |[27:20] |ingress::hdr.inner_ipv6.traffic_class |
698 | | |[31:28] |ingress::hdr.inner_ipv6.version |
699 | | | | |
700 |W42 |I | |ingress::meta.nat_ingress_tgt[95:64] |
701 | | | | |
702 |W43 |I |[19:0] |ingress::hdr.ipv6.flow_label |
703 | | |[27:20] |ingress::hdr.ipv6.traffic_class |
704 | | |[31:28] |ingress::hdr.ipv6.version |
705 | | | | |
706 |W44 |I | |ingress::hdr.sidecar.sc_payload[95:64] |
707 | | | | |
708 |... | | | |
709 | | | | |
710 +-----------+-------+-----------------+-------------------------------------------------------------+
711 
712 
713 POV Allocation (ingress):
714 +-----------+-----------------+--------------------------------------------------------+
715 |Container |Container Slice |Field Slice |
716 +-----------+-----------------+--------------------------------------------------------+
717 |B1 |[0] |ingress::hdr.udp.checksum.$deparse_original_csum |
718 | |[1] |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |
719 | |[2] |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |
720 | |[3] |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |
721 | |[4] |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |
722 | |[5] |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |
723 | |[6] |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |
724 +-----------+-----------------+--------------------------------------------------------+
725 |W0 |[0] |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |
726 | |[1] |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |
727 | |[2] |ingress::ig_intr_md_for_tm.mcast_grp_a.$valid |
728 | |[3] |ingress::ig_intr_md_for_tm.mcast_grp_b.$valid |
729 | |[4] |ingress::ig_intr_md_for_tm.rid.$valid |
730 | |[5] |ingress::ig_intr_md_for_tm.level1_exclusion_id.$valid |
731 | |[6] |ingress::ig_intr_md_for_tm.level2_exclusion_id.$valid |
732 | |[7] |ingress::ig_intr_md_for_tm.level1_mcast_hash.$valid |
733 | |[8] |ingress::ig_intr_md_for_tm.level2_mcast_hash.$valid |
734 | |[9] |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |
735 | |[10] |ingress::meta.bridge_hdr.$valid |
736 | |[11] |ingress::hdr.ethernet.$valid |
737 | |[12] |ingress::hdr.sidecar.$valid |
738 | |[13] |ingress::hdr.vlan.$valid |
739 | |[14] |ingress::hdr.ipv4.$valid |
740 | |[15] |ingress::hdr.icmp.$valid |
741 | |[16] |ingress::hdr.tcp.$valid |
742 | |[17] |ingress::hdr.udp.$valid |
743 | |[18] |ingress::hdr.geneve.$valid |
744 | |[19] |ingress::hdr.inner_eth.$valid |
745 | |[20] |ingress::hdr.inner_ipv4.$valid |
746 | |[21] |ingress::hdr.inner_tcp.$valid |
747 | |[22] |ingress::hdr.inner_udp.$valid |
748 | |[23] |ingress::hdr.inner_icmp.$valid |
749 | |[24] |ingress::hdr.inner_ipv6.$valid |
750 | |[25] |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |
751 | |[26] |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |
752 | |[27] |ingress::hdr.geneve_opts.oxg_mcast.$valid |
753 | |[28] |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |
754 | |[29] |ingress::hdr.geneve_opts.oxg_mss.$valid |
755 | |[30] |ingress::hdr.ipv6.$valid |
756 | |[31] |ingress::hdr.arp.$valid |
757 +-----------+-----------------+--------------------------------------------------------+
758 | |Total Bits Used |39 / 128 ( 30.5 %) |
759 | |Pack Density |39 / 40 ( 97.5 %) |
760 +-----------+-----------------+--------------------------------------------------------+
761 
762 POV Allocation (egress):
763 +-----------+-----------------+-------------------------------------------------------------+
764 |Container |Container Slice |Field Slice |
765 +-----------+-----------------+-------------------------------------------------------------+
766 |B4 |[0] |egress::hdr.geneve_opts.oxg_mss_tag.$valid |
767 | |[1] |egress::hdr.geneve_opts.oxg_mss.$valid |
768 | |[2] |egress::hdr.ipv6.$valid |
769 | |[3] |egress::hdr.tcp.$valid |
770 | |[4] |egress::hdr.inner_ipv4.hdr_checksum.$deparse_original_csum |
771 | |[5] |egress::hdr.inner_ipv4.hdr_checksum.$deparse_updated_csum_0 |
772 +-----------+-----------------+-------------------------------------------------------------+
773 |H5 |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |
774 | |[1] |egress::eg_intr_md.egress_port.$valid |
775 | |[2] |egress::eg_intr_md_for_dprsr.drop_ctl.$valid |
776 | |[3] |egress::hdr.ethernet.$valid |
777 | |[4] |egress::hdr.vlan.$valid |
778 | |[5] |egress::hdr.ipv4.$valid |
779 | |[6] |egress::hdr.udp.$valid |
780 | |[7] |egress::hdr.geneve.$valid |
781 | |[8] |egress::hdr.inner_eth.$valid |
782 | |[9] |egress::hdr.inner_ipv4.$valid |
783 | |[10] |egress::hdr.inner_tcp.$valid |
784 | |[11] |egress::hdr.inner_udp.$valid |
785 | |[12] |egress::hdr.inner_ipv6.$valid |
786 | |[13] |egress::hdr.geneve_opts.oxg_ext_tag.$valid |
787 | |[14] |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |
788 | |[15] |egress::hdr.geneve_opts.oxg_mcast.$valid |
789 +-----------+-----------------+-------------------------------------------------------------+
790 | |Total Bits Used |22 / 128 ( 17.2 %) |
791 | |Pack Density |22 / 24 ( 91.7 %) |
792 +-----------+-----------------+-------------------------------------------------------------+
793 
794 +-------------------------------------------------------------+------------+-----------+----------------+-----------------+
795 |Field Slice |Live Range |Container |Container Type |Container Slice |
796 +-------------------------------------------------------------+------------+-----------+----------------+-----------------+
797 |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |[-1r, 17w] |W0 |W |[0] |
798 |ingress::ig_intr_md.ingress_port |[-1r, 17w] |MH5 |MH |[8:0] |
799 |ingress::meta.dropped |[-1r, 17w] |H4 |H |[9] |
800 |ingress::meta.ipv4_checksum_err |[-1r, 17w] |H4 |H |[0] |
801 |ingress::meta.is_switch_address |[-1r, 17w] |B3 |B |[1] |
802 |ingress::meta.is_mcast |[-1r, 17w] |H4 |H |[10] |
803 |ingress::meta.allow_source_mcast |[-1r, 17w] |H23 |H |[9] |
804 |ingress::meta.is_link_local_mcastv6 |[-1r, 17w] |H4 |H |[11] |
805 |ingress::meta.service_routed |[-1r, 17w] |H23 |H |[10] |
806 |ingress::meta.nat_egress_hit |[-1r, 17w] |B3 |B |[7] |
807 |ingress::meta.nat_ingress_hit |[-1r, 17w] |H23 |H |[11] |
808 |ingress::meta.uplink_ingress |[-1r, 17w] |H23 |H |[12] |
809 |ingress::meta.encap_needed |[-1r, 17w] |H23 |H |[13] |
810 |ingress::meta.resolve_nexthop |[-1r, 17w] |H4 |H |[12] |
811 |ingress::meta.route_ttl_is_1[0] |[-1r, 17w] |B5 |B |[0] |
812 |ingress::meta.route_ttl_is_1[7:1] |[-1r, 17w] |B5 |B |[7:1] |
813 |ingress::meta.nexthop_is_v6 |[-1r, 17w] |H4 |H |[13] |
814 |ingress::meta.nexthop[127:112] |[8w, 15r] |H9 |H | |
815 |ingress::meta.nexthop[111:96] |[9w, 15r] |H28 |H | |
816 |ingress::meta.nexthop[31:0] |[6w, 15r] |W16 |W | |
817 |ingress::meta.nexthop[63:32] |[6w, 15r] |W17 |W | |
818 |ingress::meta.nexthop[95:64] |[10w, 15r] |W40 |W | |
819 |ingress::meta.pkt_type[7:0] |[-1r, 17w] |H4 |H |[8:1] |
820 |ingress::meta.pkt_type[9:8] |[-1r, 17w] |H9 |H |[14:13] |
821 |ingress::meta.drop_reason |[-1r, 17w] |B12 |B | |
822 |ingress::meta.l4_src_port |[-1r, 17w] |H39 |H | |
823 |ingress::meta.l4_dst_port |[-1r, 17w] |H60 |H | |
824 |ingress::meta.nat_ingress_tgt[7:0] |[-1r, 17w] |W14 |W |[7:0] |
825 |ingress::meta.nat_ingress_tgt[15:8] |[-1r, 17w] |W14 |W |[15:8] |
826 |ingress::meta.nat_ingress_tgt[22:16] |[-1r, 17w] |W14 |W |[22:16] |
827 |ingress::meta.nat_ingress_tgt[23] |[-1r, 17w] |W14 |W |[23] |
828 |ingress::meta.nat_ingress_tgt[31:24] |[-1r, 17w] |W14 |W |[31:24] |
829 |ingress::meta.nat_ingress_tgt[111:96] |[-1r, 17w] |W24 |W |[15:0] |
830 |ingress::meta.nat_ingress_tgt[119:112] |[-1r, 17w] |W24 |W |[23:16] |
831 |ingress::meta.nat_ingress_tgt[127:120] |[-1r, 17w] |W24 |W |[31:24] |
832 |ingress::meta.nat_ingress_tgt[63:32] |[-1r, 17w] |W38 |W | |
833 |ingress::meta.nat_ingress_tgt[95:64] |[-1r, 17w] |W42 |W | |
834 |ingress::meta.nat_inner_mac[47:32] |[-1r, 17w] |H26 |H | |
835 |ingress::meta.nat_inner_mac[31:0] |[-1r, 17w] |W18 |W | |
836 |ingress::meta.nat_geneve_vni[23:16] |[-1r, 17w] |B5 |B | |
837 |ingress::meta.nat_geneve_vni[15:0] |[0w, 5r] |H20 |H | |
838 |ingress::meta.icmp_recalc |[-1r, 17w] |H23 |H |[14] |
839 |ingress::meta.icmp_csum |[-1r, 17w] |H0 |H | |
840 |ingress::meta.body_checksum |[-1r, 17w] |H1 |H | |
841 |ingress::meta.l4_length |[-1r, 17w] |H2 |H | |
842 |ingress::meta.orig_src_mac[39:32] |[-1r, 17w] |H21 |H |[7:0] |
843 |ingress::meta.orig_src_mac[47:40] |[-1r, 17w] |H21 |H |[15:8] |
844 |ingress::meta.orig_src_mac[7:0] |[-1r, 17w] |W12 |W |[7:0] |
845 |ingress::meta.orig_src_mac[15:8] |[-1r, 17w] |W12 |W |[15:8] |
846 |ingress::meta.orig_src_mac[22:16] |[-1r, 17w] |W12 |W |[22:16] |
847 |ingress::meta.orig_src_mac[23] |[-1r, 17w] |W12 |W |[23] |
848 |ingress::meta.orig_src_mac[31:24] |[-1r, 17w] |W12 |W |[31:24] |
849 |ingress::meta.orig_src_ipv4[7:0] |[-1r, 17w] |W13 |W |[7:0] |
850 |ingress::meta.orig_src_ipv4[15:8] |[-1r, 17w] |W13 |W |[15:8] |
851 |ingress::meta.orig_src_ipv4[22:16] |[-1r, 17w] |W13 |W |[22:16] |
852 |ingress::meta.orig_src_ipv4[27:23] |[-1r, 17w] |W13 |W |[27:23] |
853 |ingress::meta.orig_src_ipv4[31:28] |[-1r, 17w] |W13 |W |[31:28] |
854 |ingress::meta.orig_dst_ipv4 |[-1r, 17w] |W29 |W | |
855 |ingress::meta.bridge_hdr.__pad_0 |[-1r, 17w] |B3 |B |[7] |
856 |ingress::meta.bridge_hdr.reserved |[-1r, 17w] |B3 |B |[6:2] |
857 |ingress::meta.bridge_hdr.nat_egress_hit |[-1r, 17w] |B3 |B |[1] |
858 |ingress::meta.bridge_hdr.is_mcast_routed |[-1r, 17w] |B3 |B |[0] |
859 |ingress::meta.bridge_hdr.__pad_1 |[-1r, 17w] |H23 |H |[15:9] |
860 |ingress::meta.bridge_hdr.ingress_port |[-1r, 17w] |H23 |H |[8:0] |
861 |ingress::meta.nat_ingress_csum |[-1r, 17w] |H33 |H | |
862 |ingress::hdr.ethernet.dst_mac[7:0] |[-1r, 17w] |MW7 |MW |[7:0] |
863 |ingress::hdr.ethernet.dst_mac[15:8] |[-1r, 17w] |MW7 |MW |[15:8] |
864 |ingress::hdr.ethernet.dst_mac[22:16] |[-1r, 17w] |MW7 |MW |[22:16] |
865 |ingress::hdr.ethernet.dst_mac[23] |[-1r, 17w] |MW7 |MW |[23] |
866 |ingress::hdr.ethernet.dst_mac[31:24] |[-1r, 17w] |MW7 |MW |[31:24] |
867 |ingress::hdr.ethernet.dst_mac[39:32] |[-1r, 17w] |H22 |H |[7:0] |
868 |ingress::hdr.ethernet.dst_mac[47:40] |[-1r, 17w] |H22 |H |[15:8] |
869 |ingress::hdr.ethernet.src_mac[47:32] |[0w, 5r] |DH4 |DH | |
870 |ingress::hdr.ethernet.src_mac[7:0] |[-1r, 17w] |MB3 |MB | |
871 |ingress::hdr.ethernet.src_mac[47:32] |[-1w, 0r] |H20 |H | |
872 |ingress::hdr.ethernet.src_mac[47:32] |[5w, 17r] |H20 |H | |
873 |ingress::hdr.ethernet.ether_type |[-1r, 17w] |MH18 |MH | |
874 |ingress::hdr.sidecar.sc_code |[-1r, 17w] |H30 |H |[15:8] |
875 |ingress::hdr.sidecar.sc_pad |[-1r, 17w] |H30 |H |[7:0] |
876 |ingress::hdr.sidecar.sc_ingress[8:0] |[-1r, 17w] |H14 |H |[8:0] |
877 |ingress::hdr.sidecar.sc_ingress[15:9] |[-1r, 17w] |H14 |H |[15:9] |
878 |ingress::hdr.sidecar.sc_egress[8:0] |[-1r, 17w] |H13 |H |[8:0] |
879 |ingress::hdr.sidecar.sc_egress[15:9] |[-1r, 17w] |H13 |H |[15:9] |
880 |ingress::hdr.sidecar.sc_ether_type |[-1r, 17w] |MH17 |MH | |
881 |ingress::hdr.sidecar.sc_payload[127:112] |[-1r, 17w] |H11 |H | |
882 |ingress::hdr.sidecar.sc_payload[111:96] |[-1r, 17w] |H32 |H | |
883 |ingress::hdr.sidecar.sc_payload[31:0] |[-1r, 17w] |W19 |W | |
884 |ingress::hdr.sidecar.sc_payload[63:32] |[-1r, 17w] |W20 |W | |
885 |ingress::hdr.sidecar.sc_payload[95:64] |[-1r, 17w] |W44 |W | |
886 |ingress::hdr.vlan.pcp |[-1r, 17w] |B10 |B |[7:5] |
887 |ingress::hdr.vlan.dei |[-1r, 17w] |B10 |B |[4] |
888 |ingress::hdr.vlan.vlan_id[7:0] |[-1r, 17w] |MB6 |MB | |
889 |ingress::hdr.vlan.vlan_id[11:8] |[-1r, 17w] |B10 |B |[3:0] |
890 |ingress::hdr.vlan.ether_type |[-1r, 17w] |MH16 |MH | |
891 |ingress::hdr.ipv4.version |[-1r, 17w] |H19 |H |[15:12] |
892 |ingress::hdr.ipv4.ihl |[-1r, 17w] |H19 |H |[11:8] |
893 |ingress::hdr.ipv4.diffserv |[-1r, 17w] |H19 |H |[7:0] |
894 |ingress::hdr.ipv4.total_len |[-1r, 17w] |MH1 |MH | |
895 |ingress::hdr.ipv4.identification |[-1r, 17w] |W36 |W |[31:16] |
896 |ingress::hdr.ipv4.flags |[-1r, 17w] |W36 |W |[15:13] |
897 |ingress::hdr.ipv4.frag_offset |[-1r, 17w] |W36 |W |[12:0] |
898 |ingress::hdr.ipv4.ttl[0] |[-1r, 17w] |B2 |B |[0] |
899 |ingress::hdr.ipv4.ttl[7:1] |[-1r, 17w] |B2 |B |[7:1] |
900 |ingress::hdr.ipv4.protocol |[-1r, 17w] |MB5 |MB | |
901 |ingress::hdr.ipv4.hdr_checksum |[-1r, 17w] |H29 |H | |
902 |ingress::hdr.ipv4.src_addr[7:0] |[-1r, 17w] |W15 |W |[7:0] |
903 |ingress::hdr.ipv4.src_addr[15:8] |[-1r, 17w] |W15 |W |[15:8] |
904 |ingress::hdr.ipv4.src_addr[22:16] |[-1r, 17w] |W15 |W |[22:16] |
905 |ingress::hdr.ipv4.src_addr[27:23] |[-1r, 17w] |W15 |W |[27:23] |
906 |ingress::hdr.ipv4.src_addr[31:28] |[-1r, 17w] |W15 |W |[31:28] |
907 |ingress::hdr.ipv4.dst_addr[7:0] |[-1r, 17w] |MW6 |MW |[7:0] |
908 |ingress::hdr.ipv4.dst_addr[15:8] |[-1r, 17w] |MW6 |MW |[15:8] |
909 |ingress::hdr.ipv4.dst_addr[22:16] |[-1r, 17w] |MW6 |MW |[22:16] |
910 |ingress::hdr.ipv4.dst_addr[27:23] |[-1r, 17w] |MW6 |MW |[27:23] |
911 |ingress::hdr.ipv4.dst_addr[31:28] |[-1r, 17w] |MW6 |MW |[31:28] |
912 |ingress::hdr.icmp.type |[-1r, 17w] |H15 |H |[15:8] |
913 |ingress::hdr.icmp.code |[-1r, 17w] |H15 |H |[7:0] |
914 |ingress::hdr.icmp.hdr_checksum |[-1r, 17w] |MH22 |MH | |
915 |ingress::hdr.icmp.data[15:0] |[-1r, 17w] |MH2 |MH | |
916 |ingress::hdr.icmp.data[31:16] |[-1r, 17w] |MH20 |MH | |
917 |ingress::hdr.tcp.src_port |[-1r, 17w] |W4 |W |[31:16] |
918 |ingress::hdr.tcp.dst_port |[-1r, 17w] |W4 |W |[15:0] |
919 |ingress::hdr.tcp.seq_no |[-1r, 17w] |W6 |W | |
920 |ingress::hdr.tcp.ack_no |[-1r, 17w] |W5 |W | |
921 |ingress::hdr.tcp.data_offset |[-1r, 17w] |H15 |H |[15:12] |
922 |ingress::hdr.tcp.res |[-1r, 17w] |H15 |H |[11:8] |
923 |ingress::hdr.tcp.flags |[-1r, 17w] |H15 |H |[7:0] |
924 |ingress::hdr.tcp.window |[-1r, 17w] |MH2 |MH | |
925 |ingress::hdr.tcp.checksum |[-1r, 17w] |MH22 |MH | |
926 |ingress::hdr.tcp.urgent_ptr |[-1r, 17w] |MH20 |MH | |
927 |ingress::hdr.udp.src_port |[-1r, 17w] |H16 |H | |
928 |ingress::hdr.udp.dst_port |[-1r, 17w] |MH21 |MH | |
929 |ingress::hdr.udp.hdr_length |[-1r, 17w] |H8 |H | |
930 |ingress::hdr.udp.checksum |[-1r, 17w] |MH23 |MH | |
931 |ingress::hdr.geneve.version |[-1r, 17w] |W7 |W |[31:30] |
932 |ingress::hdr.geneve.opt_len |[-1r, 17w] |W7 |W |[29:24] |
933 |ingress::hdr.geneve.ctrl |[-1r, 17w] |W7 |W |[23] |
934 |ingress::hdr.geneve.crit |[-1r, 17w] |W7 |W |[22] |
935 |ingress::hdr.geneve.reserved |[-1r, 17w] |W7 |W |[21:16] |
936 |ingress::hdr.geneve.protocol |[-1r, 17w] |W7 |W |[15:0] |
937 |ingress::hdr.geneve.vni[15:0] |[6w, 12r] |DH5 |DH | |
938 |ingress::hdr.geneve.vni[23:16] |[-1r, 17w] |B11 |B | |
939 |ingress::hdr.geneve.vni[15:0] |[-1w, 6r] |H17 |H | |
940 |ingress::hdr.geneve.vni[15:0] |[12w, 17r] |H17 |H | |
941 |ingress::hdr.geneve.reserved2 |[-1r, 17w] |MB7 |MB | |
942 |ingress::hdr.inner_eth.dst_mac[47:32] |[6w, 11r] |DH9 |DH | |
943 |ingress::hdr.inner_eth.dst_mac[31:0] |[6w, 15r] |DW5 |DW | |
944 |ingress::hdr.inner_eth.dst_mac[47:32] |[-1w, 6r] |H31 |H | |
945 |ingress::hdr.inner_eth.dst_mac[47:32] |[11w, 17r] |H31 |H | |
946 |ingress::hdr.inner_eth.dst_mac[31:0] |[-1w, 6r] |W17 |W | |
947 |ingress::hdr.inner_eth.dst_mac[31:0] |[15w, 17r] |W17 |W | |
948 |ingress::hdr.inner_eth.src_mac[47:16] |[6w, 15r] |DW4 |DW | |
949 |ingress::hdr.inner_eth.src_mac[15:0] |[-1r, 17w] |MH15 |MH | |
950 |ingress::hdr.inner_eth.src_mac[47:16] |[-1w, 6r] |W16 |W | |
951 |ingress::hdr.inner_eth.src_mac[47:16] |[15w, 17r] |W16 |W | |
952 |ingress::hdr.inner_eth.ether_type |[-1r, 17w] |MH19 |MH | |
953 |ingress::hdr.inner_ipv4.version |[-1r, 17w] |H18 |H |[15:12] |
954 |ingress::hdr.inner_ipv4.ihl |[-1r, 17w] |H18 |H |[11:8] |
955 |ingress::hdr.inner_ipv4.diffserv |[-1r, 17w] |H18 |H |[7:0] |
956 |ingress::hdr.inner_ipv4.total_len |[-1r, 17w] |MH0 |MH | |
957 |ingress::hdr.inner_ipv4.identification |[-1r, 17w] |W37 |W |[31:16] |
958 |ingress::hdr.inner_ipv4.flags |[-1r, 17w] |W37 |W |[15:13] |
959 |ingress::hdr.inner_ipv4.frag_offset |[-1r, 17w] |W37 |W |[12:0] |
960 |ingress::hdr.inner_ipv4.ttl[0] |[-1r, 17w] |MB0 |MB |[0] |
961 |ingress::hdr.inner_ipv4.ttl[7:1] |[-1r, 17w] |MB0 |MB |[7:1] |
962 |ingress::hdr.inner_ipv4.protocol |[-1r, 17w] |MB4 |MB | |
963 |ingress::hdr.inner_ipv4.hdr_checksum |[9w, 15r] |DH8 |DH | |
964 |ingress::hdr.inner_ipv4.hdr_checksum |[-1w, 9r] |H28 |H | |
965 |ingress::hdr.inner_ipv4.hdr_checksum |[15w, 17r] |H28 |H | |
966 |ingress::hdr.inner_ipv4.src_addr[7:0] |[-1r, 17w] |MW5 |MW |[7:0] |
967 |ingress::hdr.inner_ipv4.src_addr[15:8] |[-1r, 17w] |MW5 |MW |[15:8] |
968 |ingress::hdr.inner_ipv4.src_addr[22:16] |[-1r, 17w] |MW5 |MW |[22:16] |
969 |ingress::hdr.inner_ipv4.src_addr[27:23] |[-1r, 17w] |MW5 |MW |[27:23] |
970 |ingress::hdr.inner_ipv4.src_addr[31:28] |[-1r, 17w] |MW5 |MW |[31:28] |
971 |ingress::hdr.inner_ipv4.dst_addr[7:0] |[-1r, 17w] |MW4 |MW |[7:0] |
972 |ingress::hdr.inner_ipv4.dst_addr[15:8] |[-1r, 17w] |MW4 |MW |[15:8] |
973 |ingress::hdr.inner_ipv4.dst_addr[22:16] |[-1r, 17w] |MW4 |MW |[22:16] |
974 |ingress::hdr.inner_ipv4.dst_addr[27:23] |[-1r, 17w] |MW4 |MW |[27:23] |
975 |ingress::hdr.inner_ipv4.dst_addr[31:28] |[-1r, 17w] |MW4 |MW |[31:28] |
976 |ingress::hdr.inner_tcp.src_port |[-1r, 17w] |W4 |W |[31:16] |
977 |ingress::hdr.inner_tcp.dst_port |[-1r, 17w] |W4 |W |[15:0] |
978 |ingress::hdr.inner_tcp.seq_no |[-1r, 17w] |W6 |W | |
979 |ingress::hdr.inner_tcp.ack_no |[-1r, 17w] |W5 |W | |
980 |ingress::hdr.inner_tcp.data_offset |[-1r, 17w] |H15 |H |[15:12] |
981 |ingress::hdr.inner_tcp.res |[-1r, 17w] |H15 |H |[11:8] |
982 |ingress::hdr.inner_tcp.flags |[-1r, 17w] |H15 |H |[7:0] |
983 |ingress::hdr.inner_tcp.window |[-1r, 17w] |MH2 |MH | |
984 |ingress::hdr.inner_tcp.checksum |[-1r, 17w] |MH22 |MH | |
985 |ingress::hdr.inner_tcp.urgent_ptr |[-1r, 17w] |MH20 |MH | |
986 |ingress::hdr.inner_udp.src_port |[-1r, 17w] |H15 |H | |
987 |ingress::hdr.inner_udp.dst_port |[-1r, 17w] |MH20 |MH | |
988 |ingress::hdr.inner_udp.hdr_length |[-1r, 17w] |MH2 |MH | |
989 |ingress::hdr.inner_udp.checksum |[-1r, 17w] |MH22 |MH | |
990 |ingress::hdr.inner_icmp.type |[-1r, 17w] |H15 |H |[15:8] |
991 |ingress::hdr.inner_icmp.code |[-1r, 17w] |H15 |H |[7:0] |
992 |ingress::hdr.inner_icmp.hdr_checksum |[-1r, 17w] |MH22 |MH | |
993 |ingress::hdr.inner_icmp.data[15:0] |[-1r, 17w] |MH2 |MH | |
994 |ingress::hdr.inner_icmp.data[31:16] |[-1r, 17w] |MH20 |MH | |
995 |ingress::hdr.inner_ipv6.version |[-1r, 17w] |W41 |W |[31:28] |
996 |ingress::hdr.inner_ipv6.traffic_class |[-1r, 17w] |W41 |W |[27:20] |
997 |ingress::hdr.inner_ipv6.flow_label |[-1r, 17w] |W41 |W |[19:0] |
998 |ingress::hdr.inner_ipv6.payload_len |[-1r, 17w] |MH0 |MH | |
999 |ingress::hdr.inner_ipv6.next_hdr |[-1r, 17w] |MB4 |MB | |
1000 |ingress::hdr.inner_ipv6.hop_limit[0] |[-1r, 17w] |MB0 |MB |[0] |
1001 |ingress::hdr.inner_ipv6.hop_limit[7:1] |[-1r, 17w] |MB0 |MB |[7:1] |
1002 |ingress::hdr.inner_ipv6.src_addr[7:0] |[-1r, 17w] |MW5 |MW |[7:0] |
1003 |ingress::hdr.inner_ipv6.src_addr[15:8] |[-1r, 17w] |MW5 |MW |[15:8] |
1004 |ingress::hdr.inner_ipv6.src_addr[22:16] |[-1r, 17w] |MW5 |MW |[22:16] |
1005 |ingress::hdr.inner_ipv6.src_addr[23] |[-1r, 17w] |MW5 |MW |[23] |
1006 |ingress::hdr.inner_ipv6.src_addr[31:24] |[-1r, 17w] |MW5 |MW |[31:24] |
1007 |ingress::hdr.inner_ipv6.src_addr[111:96] |[-1r, 17w] |MW9 |MW |[15:0] |
1008 |ingress::hdr.inner_ipv6.src_addr[119:112] |[-1r, 17w] |MW9 |MW |[23:16] |
1009 |ingress::hdr.inner_ipv6.src_addr[127:120] |[-1r, 17w] |MW9 |MW |[31:24] |
1010 |ingress::hdr.inner_ipv6.src_addr[63:32] |[-1r, 17w] |MW13 |MW | |
1011 |ingress::hdr.inner_ipv6.src_addr[95:64] |[-1r, 17w] |W37 |W | |
1012 |ingress::hdr.inner_ipv6.dst_addr[7:0] |[-1r, 17w] |MW4 |MW |[7:0] |
1013 |ingress::hdr.inner_ipv6.dst_addr[15:8] |[-1r, 17w] |MW4 |MW |[15:8] |
1014 |ingress::hdr.inner_ipv6.dst_addr[22:16] |[-1r, 17w] |MW4 |MW |[22:16] |
1015 |ingress::hdr.inner_ipv6.dst_addr[23] |[-1r, 17w] |MW4 |MW |[23] |
1016 |ingress::hdr.inner_ipv6.dst_addr[31:24] |[-1r, 17w] |MW4 |MW |[31:24] |
1017 |ingress::hdr.inner_ipv6.dst_addr[111:96] |[-1r, 17w] |MW8 |MW |[15:0] |
1018 |ingress::hdr.inner_ipv6.dst_addr[119:112] |[-1r, 17w] |MW8 |MW |[23:16] |
1019 |ingress::hdr.inner_ipv6.dst_addr[127:120] |[-1r, 17w] |MW8 |MW |[31:24] |
1020 |ingress::hdr.inner_ipv6.dst_addr[63:32] |[-1r, 17w] |MW12 |MW | |
1021 |ingress::hdr.inner_ipv6.dst_addr[95:64] |[-1r, 17w] |MW15 |MW | |
1022 |ingress::hdr.geneve_opts.oxg_ext_tag.class |[-1r, 17w] |W1 |W |[31:16] |
1023 |ingress::hdr.geneve_opts.oxg_ext_tag.crit |[-1r, 17w] |W1 |W |[15] |
1024 |ingress::hdr.geneve_opts.oxg_ext_tag.type |[-1r, 17w] |W1 |W |[14:8] |
1025 |ingress::hdr.geneve_opts.oxg_ext_tag.reserved |[-1r, 17w] |W1 |W |[7:5] |
1026 |ingress::hdr.geneve_opts.oxg_ext_tag.opt_len |[-1r, 17w] |W1 |W |[4:0] |
1027 |ingress::hdr.geneve_opts.oxg_mcast.mcast_tag |[-1r, 17w] |B8 |B |[7:6] |
1028 |ingress::hdr.geneve_opts.oxg_mcast.reserved[29:24] |[-1r, 17w] |B8 |B |[5:0] |
1029 |ingress::hdr.ipv6.version |[-1r, 17w] |W43 |W |[31:28] |
1030 |ingress::hdr.ipv6.traffic_class |[-1r, 17w] |W43 |W |[27:20] |
1031 |ingress::hdr.ipv6.flow_label |[-1r, 17w] |W43 |W |[19:0] |
1032 |ingress::hdr.ipv6.payload_len |[-1r, 17w] |H3 |H | |
1033 |ingress::hdr.ipv6.next_hdr |[-1r, 17w] |MB5 |MB | |
1034 |ingress::hdr.ipv6.hop_limit[0] |[-1r, 17w] |B2 |B |[0] |
1035 |ingress::hdr.ipv6.hop_limit[7:1] |[-1r, 17w] |B2 |B |[7:1] |
1036 |ingress::hdr.ipv6.src_addr[95:64] |[10w, 15r] |DW12 |DW | |
1037 |ingress::hdr.ipv6.src_addr[111:96] |[-1r, 17w] |MW11 |MW |[15:0] |
1038 |ingress::hdr.ipv6.src_addr[119:112] |[-1r, 17w] |MW11 |MW |[23:16] |
1039 |ingress::hdr.ipv6.src_addr[127:120] |[-1r, 17w] |MW11 |MW |[31:24] |
1040 |ingress::hdr.ipv6.src_addr[63:32] |[-1r, 17w] |MW14 |MW | |
1041 |ingress::hdr.ipv6.src_addr[7:0] |[-1r, 17w] |W15 |W |[7:0] |
1042 |ingress::hdr.ipv6.src_addr[15:8] |[-1r, 17w] |W15 |W |[15:8] |
1043 |ingress::hdr.ipv6.src_addr[22:16] |[-1r, 17w] |W15 |W |[22:16] |
1044 |ingress::hdr.ipv6.src_addr[23] |[-1r, 17w] |W15 |W |[23] |
1045 |ingress::hdr.ipv6.src_addr[31:24] |[-1r, 17w] |W15 |W |[31:24] |
1046 |ingress::hdr.ipv6.src_addr[95:64] |[-1w, 10r] |W40 |W | |
1047 |ingress::hdr.ipv6.src_addr[95:64] |[15w, 17r] |W40 |W | |
1048 |ingress::hdr.ipv6.dst_addr[7:0] |[-1r, 17w] |MW6 |MW |[7:0] |
1049 |ingress::hdr.ipv6.dst_addr[15:8] |[-1r, 17w] |MW6 |MW |[15:8] |
1050 |ingress::hdr.ipv6.dst_addr[22:16] |[-1r, 17w] |MW6 |MW |[22:16] |
1051 |ingress::hdr.ipv6.dst_addr[23] |[-1r, 17w] |MW6 |MW |[23] |
1052 |ingress::hdr.ipv6.dst_addr[31:24] |[-1r, 17w] |MW6 |MW |[31:24] |
1053 |ingress::hdr.ipv6.dst_addr[111:96] |[-1r, 17w] |MW10 |MW |[15:0] |
1054 |ingress::hdr.ipv6.dst_addr[119:112] |[-1r, 17w] |MW10 |MW |[23:16] |
1055 |ingress::hdr.ipv6.dst_addr[127:120] |[-1r, 17w] |MW10 |MW |[31:24] |
1056 |ingress::hdr.ipv6.dst_addr[63:32] |[-1r, 17w] |W36 |W | |
1057 |ingress::hdr.ipv6.dst_addr[95:64] |[-1r, 17w] |W39 |W | |
1058 |ingress::filter_hasReturned |[-1r, 17w] |B1 |B |[7] |
1059 |ingress::ig_intr_md_for_tm.ucast_egress_port |[-1r, 17w] |MH6 |MH |[8:0] |
1060 |ingress::ig_intr_md_for_tm.mcast_grp_a |[-1r, 17w] |MH3 |MH | |
1061 |ingress::ig_intr_md_for_tm.mcast_grp_b |[-1r, 17w] |MH7 |MH | |
1062 |ingress::ig_intr_md_for_tm.level1_mcast_hash |[8w, 15r] |DH0 |DH |[12:0] |
1063 |ingress::ig_intr_md_for_tm.level1_mcast_hash |[7w, 8r] |H9 |H |[12:0] |
1064 |ingress::ig_intr_md_for_tm.level1_mcast_hash |[15w, 17r] |H9 |H |[12:0] |
1065 |ingress::ig_intr_md_for_tm.level2_mcast_hash |[-1r, 17w] |H10 |H |[12:0] |
1066 |ingress::ig_intr_md_for_tm.level1_exclusion_id |[-1r, 17w] |MH12 |MH | |
1067 |ingress::ig_intr_md_for_tm.level2_exclusion_id |[-1r, 17w] |MH14 |MH |[8:0] |
1068 |ingress::ig_intr_md_for_tm.rid |[-1r, 17w] |MH13 |MH | |
1069 |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |[-1r, 17w] |W0 |W |[1] |
1070 |ingress::ig_intr_md_for_tm.mcast_grp_a.$valid |[-1r, 17w] |W0 |W |[2] |
1071 |ingress::ig_intr_md_for_tm.mcast_grp_b.$valid |[-1r, 17w] |W0 |W |[3] |
1072 |ingress::ig_intr_md_for_tm.rid.$valid |[-1r, 17w] |W0 |W |[4] |
1073 |ingress::ig_intr_md_for_tm.level1_exclusion_id.$valid |[-1r, 17w] |W0 |W |[5] |
1074 |ingress::ig_intr_md_for_tm.level2_exclusion_id.$valid |[-1r, 17w] |W0 |W |[6] |
1075 |ingress::ig_intr_md_for_tm.level1_mcast_hash.$valid |[-1r, 17w] |W0 |W |[7] |
1076 |ingress::ig_intr_md_for_tm.level2_mcast_hash.$valid |[-1r, 17w] |W0 |W |[8] |
1077 |$tmp13 |[-1r, 17w] |W12 |W |[7:0] |
1078 |ingress::l3_router_fwd.is_hit |[6w, 11r] |H31 |H |[0] |
1079 |ingress::l3_router_fwd.ecmp_hash |[-1r, 17w] |W18 |W |[7:0] |
1080 |ingress::l3_router_fwd.idx[7:0] |[-1r, 17w] |H12 |H |[7:0] |
1081 |ingress::l3_router_fwd.idx[15:8] |[-1r, 17w] |H12 |H |[15:8] |
1082 |ingress::l3_router_fwd.slots |[6w, 12r] |H17 |H |[7:0] |
1083 |ingress::l3_router_fwd.slot[7:0] |[-1r, 17w] |MH4 |MH |[7:0] |
1084 |ingress::l3_router_fwd.slot[15:8] |[-1r, 17w] |MH4 |MH |[15:8] |
1085 |$tmp14 |[-1r, 17w] |W13 |W |[7:0] |
1086 |ingress::ig_intr_md_for_dprsr.drop_ctl |[-1r, 17w] |MB2 |MB |[2:0] |
1087 |ingress::ig_intr_md_for_dprsr.mirror_type |[-1r, 17w] |MB1 |MB |[3:0] |
1088 |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |[-1r, 17w] |W0 |W |[9] |
1089 |ingress::hdr.udp.checksum.$deparse_original_csum |[-1r, 17w] |B1 |B |[0] |
1090 |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |[-1r, 17w] |B1 |B |[1] |
1091 |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |[-1r, 17w] |B1 |B |[2] |
1092 |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |[-1r, 17w] |B1 |B |[3] |
1093 |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |[-1r, 17w] |B1 |B |[4] |
1094 |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |[-1r, 17w] |B1 |B |[5] |
1095 |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |[-1r, 17w] |B1 |B |[6] |
1096 |ingress::$tmp8 |[-1r, 17w] |B0 |B | |
1097 |egress::eg_intr_md_for_dprsr.drop_ctl |[-1r, 17w] |MH9 |MH |[2:0] |
1098 |egress::eg_intr_md_for_dprsr.mirror_io_select |[-1r, 17w] |B4 |B |[6] |
1099 |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |[-1r, 17w] |H5 |H |[0] |
1100 |egress::eg_intr_md.egress_port |[-1r, 17w] |MH8 |MH |[8:0] |
1101 |egress::eg_intr_md.egress_rid |[-1r, 17w] |H34 |H | |
1102 |egress::eg_intr_md.egress_port.$valid |[-1r, 17w] |H5 |H |[1] |
1103 |egress::meta.bridge_hdr.nat_egress_hit |[-1r, 17w] |B7 |B |[1] |
1104 |egress::meta.bridge_hdr.is_mcast_routed |[-1r, 17w] |B7 |B |[0] |
1105 |egress::meta.bridge_hdr.ingress_port |[-1r, 17w] |H24 |H |[8:0] |
1106 |egress::hdr.ethernet.dst_mac[47:32] |[-1r, 17w] |H37 |H | |
1107 |egress::hdr.ethernet.dst_mac[22:0] |[-1r, 17w] |W3 |W |[22:0] |
1108 |egress::hdr.ethernet.dst_mac[31:23] |[-1r, 17w] |W3 |W |[31:23] |
1109 |egress::hdr.ethernet.src_mac[47:32] |[-1r, 17w] |H36 |H | |
1110 |egress::hdr.ethernet.src_mac[31:0] |[-1r, 17w] |W11 |W | |
1111 |egress::hdr.ethernet.ether_type |[-1r, 17w] |H27 |H | |
1112 |egress::hdr.vlan.pcp |[-1r, 17w] |H6 |H |[15:13] |
1113 |egress::hdr.vlan.dei |[-1r, 17w] |H6 |H |[12] |
1114 |egress::hdr.vlan.vlan_id |[-1r, 17w] |H6 |H |[11:0] |
1115 |egress::hdr.vlan.ether_type |[-1r, 17w] |MH10 |MH | |
1116 |egress::hdr.ipv4.dst_addr[22:0] |[-1r, 17w] |MW1 |MW |[22:0] |
1117 |egress::hdr.ipv4.dst_addr[31:23] |[-1r, 17w] |MW1 |MW |[31:23] |
1118 |egress::hdr.geneve.vni[15:0] |[-1r, 17w] |MH11 |MH | |
1119 |egress::hdr.geneve.reserved2 |[-1r, 17w] |MB8 |MB | |
1120 |egress::hdr.inner_eth.src_mac[7:0] |[-1r, 17w] |MB11 |MB | |
1121 |egress::hdr.inner_eth.ether_type |[0w, 3r] |DH12 |DH | |
1122 |egress::hdr.inner_eth.ether_type |[-1w, 0r] |H38 |H | |
1123 |egress::hdr.inner_eth.ether_type |[3w, 17r] |H38 |H | |
1124 |egress::hdr.inner_ipv4.ttl |[-1r, 17w] |B6 |B | |
1125 |egress::hdr.inner_ipv4.hdr_checksum |[-1r, 17w] |H25 |H | |
1126 |egress::hdr.inner_ipv4.src_addr[31:24] |[-1r, 17w] |MB9 |MB | |
1127 |egress::hdr.inner_ipv4.dst_addr[22:0] |[-1r, 17w] |MW2 |MW |[22:0] |
1128 |egress::hdr.inner_ipv4.dst_addr[31:23] |[-1r, 17w] |MW2 |MW |[31:23] |
1129 |egress::hdr.inner_ipv6.hop_limit |[-1r, 17w] |B6 |B | |
1130 |egress::hdr.inner_ipv6.dst_addr[55:48] |[-1r, 17w] |MB9 |MB | |
1131 |egress::hdr.inner_ipv6.dst_addr[63:56] |[-1r, 17w] |MB10 |MB | |
1132 |egress::hdr.inner_ipv6.dst_addr[22:0] |[-1r, 17w] |MW2 |MW |[22:0] |
1133 |egress::hdr.inner_ipv6.dst_addr[31:23] |[-1r, 17w] |MW2 |MW |[31:23] |
1134 |egress::hdr.inner_ipv6.dst_addr[47:32] |[-1r, 17w] |H25 |H | |
1135 |egress::hdr.inner_ipv6.dst_addr[95:64] |[-1r, 17w] |W22 |W | |
1136 |egress::hdr.inner_ipv6.dst_addr[127:96] |[-1r, 17w] |W23 |W | |
1137 |egress::hdr.geneve_opts.oxg_ext_tag.class |[-1r, 17w] |W2 |W |[31:16] |
1138 |egress::hdr.geneve_opts.oxg_ext_tag.crit |[-1r, 17w] |W2 |W |[15] |
1139 |egress::hdr.geneve_opts.oxg_ext_tag.type |[-1r, 17w] |W2 |W |[14:8] |
1140 |egress::hdr.geneve_opts.oxg_ext_tag.reserved |[-1r, 17w] |W2 |W |[7:5] |
1141 |egress::hdr.geneve_opts.oxg_ext_tag.opt_len |[-1r, 17w] |W2 |W |[4:0] |
1142 |egress::hdr.geneve_opts.oxg_mcast.mcast_tag |[-1r, 17w] |W2 |W |[31:30] |
1143 |egress::hdr.geneve_opts.oxg_mcast.reserved |[-1r, 17w] |W2 |W |[29:0] |
1144 |egress::hdr.geneve_opts.oxg_mss.mss |[-1r, 17w] |W2 |W | |
1145 |egress::hdr.ipv6.dst_addr[22:0] |[-1r, 17w] |MW1 |MW |[22:0] |
1146 |egress::hdr.ipv6.dst_addr[31:23] |[-1r, 17w] |MW1 |MW |[31:23] |
1147 |egress::hdr.ipv6.dst_addr[111:96] |[-1r, 17w] |MW3 |MW |[15:0] |
1148 |egress::hdr.ipv6.dst_addr[127:112] |[-1r, 17w] |MW3 |MW |[31:16] |
1149 |egress::hdr.ipv6.dst_addr[63:32] |[-1r, 17w] |W25 |W | |
1150 |egress::hdr.ipv6.dst_addr[95:64] |[-1r, 17w] |W26 |W | |
1151 |egress::is_link_local_ipv6_mcast_0 |[-1r, 17w] |B4 |B |[7] |
1152 |egress::mcast_tag_0 |[-1r, 17w] |MW0 |MW |[31:30] |
1153 |egress::eg_intr_md_for_dprsr.drop_ctl.$valid |[-1r, 17w] |H5 |H |[2] |
1154 |egress::meta.drop_reason |[-1r, 17w] |B9 |B | |
1155 |egress::meta.decap_ports_0[15:0] |[-1r, 17w] |H48 |H | |
1156 |egress::meta.decap_ports_0[31:16] |[-1r, 17w] |H61 |H | |
1157 |egress::meta.decap_ports_1[15:0] |[-1r, 17w] |H49 |H | |
1158 |egress::meta.decap_ports_1[31:16] |[-1r, 17w] |H62 |H | |
1159 |egress::meta.decap_ports_2[15:0] |[-1r, 17w] |H50 |H | |
1160 |egress::meta.decap_ports_2[31:16] |[-1r, 17w] |H63 |H | |
1161 |egress::meta.decap_ports_3[15:0] |[-1r, 17w] |H51 |H | |
1162 |egress::meta.decap_ports_3[31:16] |[-1r, 17w] |H64 |H | |
1163 |egress::meta.decap_ports_4[15:0] |[-1r, 17w] |H52 |H | |
1164 |egress::meta.decap_ports_4[31:16] |[-1r, 17w] |H65 |H | |
1165 |egress::meta.decap_ports_5[15:0] |[-1r, 17w] |H53 |H | |
1166 |egress::meta.decap_ports_5[31:16] |[-1r, 17w] |H66 |H | |
1167 |egress::meta.decap_ports_6[15:0] |[-1r, 17w] |H54 |H | |
1168 |egress::meta.decap_ports_6[31:16] |[-1r, 17w] |H67 |H | |
1169 |egress::meta.decap_ports_7[15:0] |[-1r, 17w] |H55 |H | |
1170 |egress::meta.decap_ports_7[31:16] |[-1r, 17w] |H68 |H | |
1171 |egress::meta.bitmap_result[15:0] |[-1r, 17w] |H56 |H | |
1172 |egress::meta.bitmap_result[31:16] |[-1r, 17w] |H69 |H | |
1173 |egress::meta.ipv4_checksum_recalc |[0w, 3r] |H38 |H |[0] |
1174 |egress::meta.vlan_id |[-1r, 17w] |H7 |H |[11:0] |
1175 |egress::meta.port_number |[-1r, 17w] |B13 |B | |
1176 |egress::hdr.tcp.src_port |[-1r, 17w] |W10 |W |[31:16] |
1177 |egress::hdr.tcp.dst_port |[-1r, 17w] |W10 |W |[15:0] |
1178 |egress::hdr.tcp.seq_no |[-1r, 17w] |W28 |W | |
1179 |egress::hdr.tcp.ack_no |[-1r, 17w] |W27 |W | |
1180 |egress::hdr.tcp.data_offset |[-1r, 17w] |W8 |W |[31:28] |
1181 |egress::hdr.tcp.res |[-1r, 17w] |W8 |W |[27:24] |
1182 |egress::hdr.tcp.flags |[-1r, 17w] |W8 |W |[23:16] |
1183 |egress::hdr.tcp.window |[-1r, 17w] |W8 |W |[15:0] |
1184 |egress::hdr.tcp.checksum |[-1r, 17w] |W9 |W |[31:16] |
1185 |egress::hdr.tcp.urgent_ptr |[-1r, 17w] |W9 |W |[15:0] |
1186 |egress::mcast_mac_rewrite_hit |[-1r, 17w] |H7 |H |[12] |
1187 |egress::hdr.inner_ipv4.hdr_checksum.$deparse_original_csum |[-1r, 17w] |B4 |B |[4] |
1188 |egress::hdr.inner_ipv4.hdr_checksum.$deparse_updated_csum_0 |[-1r, 17w] |B4 |B |[5] |
1189 |ingress::meta.bridge_hdr.$valid |[-1r, 17w] |W0 |W |[10] |
1190 |ingress::hdr.ethernet.$valid |[-1r, 17w] |W0 |W |[11] |
1191 |ingress::hdr.sidecar.$valid |[-1r, 17w] |W0 |W |[12] |
1192 |ingress::hdr.vlan.$valid |[-1r, 17w] |W0 |W |[13] |
1193 |ingress::hdr.ipv4.$valid |[-1r, 17w] |W0 |W |[14] |
1194 |ingress::hdr.icmp.$valid |[-1r, 17w] |W0 |W |[15] |
1195 |ingress::hdr.tcp.$valid |[-1r, 17w] |W0 |W |[16] |
1196 |ingress::hdr.udp.$valid |[-1r, 17w] |W0 |W |[17] |
1197 |ingress::hdr.geneve.$valid |[-1r, 17w] |W0 |W |[18] |
1198 |ingress::hdr.inner_eth.$valid |[-1r, 17w] |W0 |W |[19] |
1199 |ingress::hdr.inner_ipv4.$valid |[-1r, 17w] |W0 |W |[20] |
1200 |ingress::hdr.inner_tcp.$valid |[-1r, 17w] |W0 |W |[21] |
1201 |ingress::hdr.inner_udp.$valid |[-1r, 17w] |W0 |W |[22] |
1202 |ingress::hdr.inner_icmp.$valid |[-1r, 17w] |W0 |W |[23] |
1203 |ingress::hdr.inner_ipv6.$valid |[-1r, 17w] |W0 |W |[24] |
1204 |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |[-1r, 17w] |W0 |W |[25] |
1205 |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |[-1r, 17w] |W0 |W |[26] |
1206 |ingress::hdr.geneve_opts.oxg_mcast.$valid |[-1r, 17w] |W0 |W |[27] |
1207 |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |[-1r, 17w] |W0 |W |[28] |
1208 |ingress::hdr.geneve_opts.oxg_mss.$valid |[-1r, 17w] |W0 |W |[29] |
1209 |ingress::hdr.ipv6.$valid |[-1r, 17w] |W0 |W |[30] |
1210 |ingress::hdr.arp.$valid |[-1r, 17w] |W0 |W |[31] |
1211 |egress::hdr.ethernet.$valid |[-1r, 17w] |H5 |H |[3] |
1212 |egress::hdr.vlan.$valid |[-1r, 17w] |H5 |H |[4] |
1213 |egress::hdr.ipv4.$valid |[-1r, 17w] |H5 |H |[5] |
1214 |egress::hdr.udp.$valid |[-1r, 17w] |H5 |H |[6] |
1215 |egress::hdr.geneve.$valid |[-1r, 17w] |H5 |H |[7] |
1216 |egress::hdr.inner_eth.$valid |[-1r, 17w] |H5 |H |[8] |
1217 |egress::hdr.inner_ipv4.$valid |[-1r, 17w] |H5 |H |[9] |
1218 |egress::hdr.inner_tcp.$valid |[-1r, 17w] |H5 |H |[10] |
1219 |egress::hdr.inner_udp.$valid |[-1r, 17w] |H5 |H |[11] |
1220 |egress::hdr.inner_ipv6.$valid |[-1r, 17w] |H5 |H |[12] |
1221 |egress::hdr.geneve_opts.oxg_ext_tag.$valid |[-1r, 17w] |H5 |H |[13] |
1222 |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |[-1r, 17w] |H5 |H |[14] |
1223 |egress::hdr.geneve_opts.oxg_mcast.$valid |[-1r, 17w] |H5 |H |[15] |
1224 |egress::hdr.geneve_opts.oxg_mss_tag.$valid |[-1r, 17w] |B4 |B |[0] |
1225 |egress::hdr.geneve_opts.oxg_mss.$valid |[-1r, 17w] |B4 |B |[1] |
1226 |egress::hdr.ipv6.$valid |[-1r, 17w] |B4 |B |[2] |
1227 |egress::hdr.tcp.$valid |[-1r, 17w] |B4 |B |[3] |
1228 +-------------------------------------------------------------+------------+-----------+----------------+-----------------+
1229 
1230 
1231 
1232 
1233 
1234 PHV Allocation State
1235 
1236 MAU Groups:
1237 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1238 | Container Set | Containers Used | Bits Used | Bits Used on Ingress | Bits Used on Egress | Bits Allocated | Bits Allocated on Ingress | Bits Allocated on Egress | Available Bits |
1239 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1240 | B0-11 | 12 ( 100 %) | 90 ( 93.8 %) | 64 ( 66.7 %) | 26 ( 27.1 %) | 116 ( 121 %) | 82 ( 85.4 %) | 34 ( 35.4 %) | 96 |
1241 | MB0-3 | 4 ( 100 %) | 23 ( 71.9 %) | 23 ( 71.9 %) | 0 ( 0 %) | 31 ( 96.9 %) | 31 ( 96.9 %) | 0 ( 0 %) | 32 |
1242 | DB0-3 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
1243 | | | | | | | | | |
1244 | Usage for Group 1 | 16 ( 80 %) | 113 ( 70.6 %) | 87 ( 54.4 %) | 26 ( 16.2 %) | 147 ( 91.9 %) | 113 ( 70.6 %) | 34 ( 21.2 %) | 160 |
1245 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1246 | B12-23 | 2 ( 16.7 %) | 16 ( 16.7 %) | 8 ( 8.33 %) | 8 ( 8.33 %) | 16 ( 16.7 %) | 8 ( 8.33 %) | 8 ( 8.33 %) | 96 |
1247 | MB4-7 | 4 ( 100 %) | 32 ( 100 %) | 32 ( 100 %) | 0 ( 0 %) | 48 ( 150 %) | 48 ( 150 %) | 0 ( 0 %) | 32 |
1248 | DB4-7 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
1249 | | | | | | | | | |
1250 | Usage for Group 2 | 6 ( 30 %) | 48 ( 30 %) | 40 ( 25 %) | 8 ( 5 %) | 64 ( 40 %) | 56 ( 35 %) | 8 ( 5 %) | 160 |
1251 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1252 | B24-35 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 96 |
1253 | MB8-11 | 4 ( 100 %) | 32 ( 100 %) | 0 ( 0 %) | 32 ( 100 %) | 40 ( 125 %) | 0 ( 0 %) | 40 ( 125 %) | 32 |
1254 | DB8-11 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
1255 | | | | | | | | | |
1256 | Usage for Group 3 | 4 ( 20 %) | 32 ( 20 %) | 0 ( 0 %) | 32 ( 20 %) | 40 ( 25 %) | 0 ( 0 %) | 40 ( 25 %) | 160 |
1257 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1258 | B36-47 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 96 |
1259 | MB12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
1260 | DB12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
1261 | | | | | | | | | |
1262 | Usage for Group 4 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 160 |
1263 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1264 | H0-11 | 12 ( 100 %) | 184 ( 95.8 %) | 139 ( 72.4 %) | 45 ( 23.4 %) | 212 ( 110 %) | 167 ( 87 %) | 45 ( 23.4 %) | 192 |
1265 | MH0-3 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 144 ( 225 %) | 144 ( 225 %) | 0 ( 0 %) | 64 |
1266 | DH0-3 | 1 ( 25 %) | 13 ( 20.3 %) | 13 ( 20.3 %) | 0 ( 0 %) | 13 ( 20.3 %) | 13 ( 20.3 %) | 0 ( 0 %) | 64 |
1267 | | | | | | | | | |
1268 | Usage for Group 5 | 17 ( 85 %) | 261 ( 81.6 %) | 216 ( 67.5 %) | 45 ( 14.1 %) | 369 ( 115 %) | 324 ( 101 %) | 45 ( 14.1 %) | 320 |
1269 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1270 | H12-23 | 12 ( 100 %) | 192 ( 100 %) | 192 ( 100 %) | 0 ( 0 %) | 318 ( 166 %) | 318 ( 166 %) | 0 ( 0 %) | 192 |
1271 | MH4-7 | 4 ( 100 %) | 50 ( 78.1 %) | 50 ( 78.1 %) | 0 ( 0 %) | 50 ( 78.1 %) | 50 ( 78.1 %) | 0 ( 0 %) | 64 |
1272 | DH4-7 | 2 ( 50 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 64 |
1273 | | | | | | | | | |
1274 | Usage for Group 6 | 18 ( 90 %) | 274 ( 85.6 %) | 274 ( 85.6 %) | 0 ( 0 %) | 400 ( 125 %) | 400 ( 125 %) | 0 ( 0 %) | 320 |
1275 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1276 | H24-35 | 11 ( 91.7 %) | 169 ( 88 %) | 112 ( 58.3 %) | 57 ( 29.7 %) | 234 ( 122 %) | 161 ( 83.9 %) | 73 ( 38 %) | 192 |
1277 | MH8-11 | 4 ( 100 %) | 44 ( 68.8 %) | 0 ( 0 %) | 44 ( 68.8 %) | 44 ( 68.8 %) | 0 ( 0 %) | 44 ( 68.8 %) | 64 |
1278 | DH8-11 | 2 ( 50 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 64 |
1279 | | | | | | | | | |
1280 | Usage for Group 7 | 17 ( 85 %) | 245 ( 76.6 %) | 144 ( 45 %) | 101 ( 31.6 %) | 310 ( 96.9 %) | 193 ( 60.3 %) | 117 ( 36.6 %) | 320 |
1281 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1282 | H36-47 | 4 ( 33.3 %) | 64 ( 33.3 %) | 16 ( 8.33 %) | 48 ( 25 %) | 81 ( 42.2 %) | 16 ( 8.33 %) | 65 ( 33.9 %) | 192 |
1283 | MH12-15 | 4 ( 100 %) | 57 ( 89.1 %) | 57 ( 89.1 %) | 0 ( 0 %) | 57 ( 89.1 %) | 57 ( 89.1 %) | 0 ( 0 %) | 64 |
1284 | DH12-15 | 1 ( 25 %) | 16 ( 25 %) | 0 ( 0 %) | 16 ( 25 %) | 16 ( 25 %) | 0 ( 0 %) | 16 ( 25 %) | 64 |
1285 | | | | | | | | | |
1286 | Usage for Group 8 | 9 ( 45 %) | 137 ( 42.8 %) | 73 ( 22.8 %) | 64 ( 20 %) | 154 ( 48.1 %) | 73 ( 22.8 %) | 81 ( 25.3 %) | 320 |
1287 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1288 | H48-59 | 9 ( 75 %) | 144 ( 75 %) | 0 ( 0 %) | 144 ( 75 %) | 144 ( 75 %) | 0 ( 0 %) | 144 ( 75 %) | 192 |
1289 | MH16-19 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 |
1290 | DH16-19 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
1291 | | | | | | | | | |
1292 | Usage for Group 9 | 13 ( 65 %) | 208 ( 65 %) | 64 ( 20 %) | 144 ( 45 %) | 208 ( 65 %) | 64 ( 20 %) | 144 ( 45 %) | 320 |
1293 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1294 | H60-71 | 10 ( 83.3 %) | 160 ( 83.3 %) | 16 ( 8.33 %) | 144 ( 75 %) | 160 ( 83.3 %) | 16 ( 8.33 %) | 144 ( 75 %) | 192 |
1295 | MH20-23 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 192 ( 300 %) | 192 ( 300 %) | 0 ( 0 %) | 64 |
1296 | DH20-23 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
1297 | | | | | | | | | |
1298 | Usage for Group 10 | 14 ( 70 %) | 224 ( 70 %) | 80 ( 25 %) | 144 ( 45 %) | 352 ( 110 %) | 208 ( 65 %) | 144 ( 45 %) | 320 |
1299 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1300 | W0-11 | 12 ( 100 %) | 384 ( 100 %) | 192 ( 50 %) | 192 ( 50 %) | 544 ( 142 %) | 288 ( 75 %) | 256 ( 66.7 %) | 384 |
1301 | MW0-3 | 4 ( 100 %) | 98 ( 76.6 %) | 0 ( 0 %) | 98 ( 76.6 %) | 162 ( 127 %) | 0 ( 0 %) | 162 ( 127 %) | 128 |
1302 | DW0-3 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 |
1303 | | | | | | | | | |
1304 | Usage for Group 11 | 16 ( 80 %) | 482 ( 75.3 %) | 192 ( 30 %) | 290 ( 45.3 %) | 706 ( 110 %) | 288 ( 45 %) | 418 ( 65.3 %) | 640 |
1305 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1306 | W12-23 | 11 ( 91.7 %) | 352 ( 91.7 %) | 288 ( 75 %) | 64 ( 16.7 %) | 536 ( 140 %) | 472 ( 123 %) | 64 ( 16.7 %) | 384 |
1307 | MW4-7 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 224 ( 175 %) | 224 ( 175 %) | 0 ( 0 %) | 128 |
1308 | DW4-7 | 2 ( 50 %) | 64 ( 50 %) | 64 ( 50 %) | 0 ( 0 %) | 64 ( 50 %) | 64 ( 50 %) | 0 ( 0 %) | 128 |
1309 | | | | | | | | | |
1310 | Usage for Group 12 | 17 ( 85 %) | 544 ( 85 %) | 480 ( 75 %) | 64 ( 10 %) | 824 ( 129 %) | 760 ( 119 %) | 64 ( 10 %) | 640 |
1311 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1312 | W24-35 | 6 ( 50 %) | 192 ( 50 %) | 64 ( 16.7 %) | 128 ( 33.3 %) | 192 ( 50 %) | 64 ( 16.7 %) | 128 ( 33.3 %) | 384 |
1313 | MW8-11 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 |
1314 | DW8-11 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 |
1315 | | | | | | | | | |
1316 | Usage for Group 13 | 10 ( 50 %) | 320 ( 50 %) | 192 ( 30 %) | 128 ( 20 %) | 320 ( 50 %) | 192 ( 30 %) | 128 ( 20 %) | 640 |
1317 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1318 | W36-47 | 9 ( 75 %) | 288 ( 75 %) | 288 ( 75 %) | 0 ( 0 %) | 416 ( 108 %) | 416 ( 108 %) | 0 ( 0 %) | 384 |
1319 | MW12-15 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 |
1320 | DW12-15 | 1 ( 25 %) | 32 ( 25 %) | 32 ( 25 %) | 0 ( 0 %) | 32 ( 25 %) | 32 ( 25 %) | 0 ( 0 %) | 128 |
1321 | | | | | | | | | |
1322 | Usage for Group 14 | 14 ( 70 %) | 448 ( 70 %) | 448 ( 70 %) | 0 ( 0 %) | 576 ( 90 %) | 576 ( 90 %) | 0 ( 0 %) | 640 |
1323 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1324 | Usage for 8b | 26 ( 32.5 %) | 193 ( 30.2 %) | 127 ( 19.8 %) | 66 ( 10.3 %) | 251 ( 39.2 %) | 169 ( 26.4 %) | 82 ( 12.8 %) | 640 |
1325 | Usage for 16b | 88 ( 73.3 %) | 1349 ( 70.3 %) | 851 ( 44.3 %) | 498 ( 25.9 %) | 1793 ( 93.4 %) | 1262 ( 65.7 %) | 531 ( 27.7 %) | 1920 |
1326 | Usage for 32b | 57 ( 71.2 %) | 1794 ( 70.1 %) | 1312 ( 51.2 %) | 482 ( 18.8 %) | 2426 ( 94.8 %) | 1816 ( 70.9 %) | 610 ( 23.8 %) | 2560 |
1327 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1328 | Usage for dark | 9 ( 16.1 %) | 189 ( 18.5 %) | 173 ( 16.9 %) | 16 ( 1.56 %) | 189 ( 18.5 %) | 173 ( 16.9 %) | 16 ( 1.56 %) | 1024 |
1329 | Usage for mocha | 52 ( 92.9 %) | 912 ( 89.1 %) | 738 ( 72.1 %) | 174 ( 17 %) | 1312 ( 128 %) | 1066 ( 104 %) | 246 ( 24 %) | 1024 |
1330 | Usage for normal | 110 ( 65.5 %) | 2235 ( 72.8 %) | 1379 ( 44.9 %) | 856 ( 27.9 %) | 2969 ( 96.6 %) | 2008 ( 65.4 %) | 961 ( 31.3 %) | 3072 |
1331 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1332 | Overall PHV Usage | 171 ( 61.1 %) | 3336 ( 65.2 %) | 2290 ( 44.7 %) | 1046 ( 20.4 %) | 4470 ( 87.3 %) | 3247 ( 63.4 %) | 1223 ( 23.9 %) | 5120 |
1333 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1334 
1335 
1336 
1337