March 10, 2026 at 10:41:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 819 0 40 2274 125 6491 39 382 1396 9 8757 2 6 0 92 1 777 0 64 225 15 2608 20 227 1275 8 5438 20 4 0 76 2 800 0 148 208 12 3832 11 256 1360 11 9205 3 4 0 93 3 877 0 71 562 438 2998 12 232 1373 12 6149 2 4 0 94 4 686 0 201 2359 2263 1829 9 189 1301 6 3557 2 5 0 93 5 737 0 60 177 17 3800 10 252 1272 8 7926 2 4 0 94 6 783 0 288 170 14 2257 12 278 1280 4 6256 6 5 0 89 7 1105 0 34 175 12 4921 14 273 1405 7 4954 3 5 0 92 March 10, 2026 at 10:41:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7631 0 118 2254 163 960 7 178 3322 81 2767 3 7 0 90 1 2583 0 62 166 47 654 21 90 2593 25 2148 14 7 0 79 2 6639 0 17 266 1 821 10 95 2074 72 3041 5 30 0 65 3 1457 0 40 408 313 699 8 131 2949 68 1713 5 2 0 93 4 5980 0 9 69 10 1109 8 119 3845 59 2449 5 5 0 91 5 5578 0 31 63 3 1265 15 178 3669 96 2919 7 6 0 88 6 5420 0 8 309 35 889 12 156 1687 88 2394 4 23 0 73 7 7330 0 47 269 1 721 15 130 1605 58 2932 7 29 0 64 March 10, 2026 at 10:41:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2311 204 110 0 0 1 0 553 0 0 0 100 1 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 47 0 0 16 2 10 0 0 0 0 310 0 0 0 100 4 31 0 0 15 4 42 0 2 0 0 1016 0 0 0 100 5 0 0 1 9 1 7 0 1 1 0 306 0 0 0 100 6 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2346 205 306 9 67 631 0 554 0 15 0 85 1 0 0 21 256 103 211 9 75 675 0 266 0 15 0 85 2 0 0 0 52 3 216 9 66 653 0 2 0 14 0 86 3 0 0 0 371 324 221 9 69 619 0 300 0 15 0 85 4 23 0 0 147 50 1075 3 107 778 0 1000 0 2 0 98 5 0 0 0 47 2 222 10 83 651 0 300 0 15 0 85 6 0 0 0 52 6 215 8 70 689 0 0 0 15 0 85 7 0 0 0 41 3 303 3 102 711 0 0 0 1 0 99 March 10, 2026 at 10:41:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 11 2347 203 1045 4 80 597 0 552 0 1 0 99 1 0 0 17 269 112 299 1 90 625 1 267 0 1 0 99 2 0 0 0 53 1 259 4 77 614 0 0 0 1 0 99 3 0 0 0 393 344 258 3 76 591 0 300 0 1 0 99 4 0 0 0 157 46 398 3 85 586 0 1000 0 1 0 99 5 0 0 0 53 2 287 4 87 649 1 300 0 1 0 99 6 0 0 0 44 3 273 4 83 592 1 0 0 1 0 99 7 0 0 0 57 1 266 4 72 642 0 0 0 1 0 99 March 10, 2026 at 10:41:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2348 203 1041 1 76 512 0 562 0 1 0 99 1 0 0 18 340 154 444 1 89 514 0 274 0 1 0 99 2 0 0 0 39 1 335 3 80 556 0 16 0 1 0 99 3 0 0 0 370 320 311 0 78 523 0 300 0 1 0 99 4 0 0 0 74 12 373 0 89 493 0 999 0 1 0 99 5 0 0 0 44 2 400 1 95 567 0 300 0 1 0 99 6 0 0 0 44 0 293 0 79 542 0 0 0 1 0 99 7 0 0 0 42 0 316 1 81 562 0 0 0 1 0 99 March 10, 2026 at 10:41:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 203 110 0 0 0 0 553 0 0 0 100 1 0 0 18 306 152 120 0 1 1 0 266 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 299 0 0 0 100 4 0 0 0 21 4 48 0 0 0 0 999 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 203 108 0 0 0 0 553 0 0 0 100 1 0 0 18 308 152 104 0 1 3 0 266 0 0 0 100 2 0 0 0 7 1 22 0 1 0 0 2 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 22 4 48 1 0 1 0 998 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:41:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2312 203 116 0 0 2 0 553 0 0 0 100 1 0 0 18 306 152 104 0 0 1 0 266 0 0 0 100 2 0 0 0 13 0 10 0 2 0 0 0 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 18 5 44 1 0 0 0 1000 0 0 0 100 5 0 0 0 13 3 10 0 0 1 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 4 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:41:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2312 205 114 0 0 0 0 553 0 0 0 100 1 0 0 18 308 153 120 0 8 0 0 267 0 0 0 100 2 0 0 0 17 1 12 0 0 2 0 2 0 0 0 100 3 0 0 0 8 2 24 0 1 0 0 300 0 0 0 100 4 0 0 0 16 5 42 1 0 0 0 999 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 203 110 0 2 1 0 560 0 1 0 99 1 0 0 18 318 155 120 0 2 0 0 280 0 0 0 100 2 0 0 0 13 0 18 0 0 0 0 8 0 0 0 100 3 0 0 0 10 2 4 0 1 1 0 300 0 0 0 100 4 2 0 0 18 9 60 0 1 2 0 1014 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 9 0 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2309 203 108 0 0 0 0 553 0 0 0 100 1 0 0 17 306 152 102 0 0 0 0 266 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 2 0 0 0 100 3 0 0 0 10 3 4 0 0 0 0 321 0 0 0 100 4 0 0 0 14 4 40 1 0 0 0 1010 0 0 0 100 5 0 0 0 15 4 10 0 0 0 0 301 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 203 108 0 0 0 0 553 0 0 0 100 1 0 0 18 306 152 102 0 0 0 0 266 0 0 0 100 2 0 0 0 17 1 16 0 0 0 0 9 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 16 4 42 1 0 2 0 1011 0 0 0 100 5 0 0 0 15 4 16 0 1 2 0 319 0 0 0 100 6 0 0 0 7 1 20 0 1 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2314 204 118 0 0 1 0 554 0 0 0 100 1 0 0 18 306 152 104 0 0 3 0 266 0 0 0 100 2 0 0 0 19 3 12 0 0 1 0 3 0 0 0 100 3 0 0 0 10 3 2 0 0 1 0 300 0 0 0 100 4 0 0 0 18 6 44 1 0 1 0 1012 0 0 0 100 5 0 0 0 15 4 12 0 1 3 0 300 0 0 0 100 6 0 0 0 9 1 2 0 0 1 0 0 0 0 0 100 7 0 0 0 10 1 24 0 1 3 0 0 0 0 0 100 March 10, 2026 at 10:41:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 203 108 0 0 1 0 553 0 0 0 100 1 0 0 18 306 152 102 0 0 0 0 266 0 0 0 100 2 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 13 4 40 0 0 0 0 1013 0 0 0 100 5 0 0 0 13 3 8 0 0 1 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 203 134 0 1 0 0 561 0 0 0 100 1 0 0 18 306 152 112 0 0 0 0 277 0 0 0 100 2 0 0 0 19 3 22 0 0 0 0 12 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 22 10 40 1 0 0 0 1010 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 0 8 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:41:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 203 112 0 0 1 0 553 0 0 0 100 1 0 0 18 306 152 122 0 1 0 0 266 0 0 0 100 2 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 14 4 40 1 0 0 0 1011 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 203 108 0 0 0 0 553 0 0 0 100 1 0 0 18 308 153 104 0 0 0 0 267 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 2 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 13 4 40 0 0 0 0 1012 0 1 0 99 5 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:41:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2312 203 112 0 0 1 0 553 0 0 0 100 1 0 0 18 308 152 104 0 0 1 0 266 0 0 0 100 2 0 0 0 15 0 12 0 1 0 0 0 0 0 0 100 3 0 0 0 8 2 20 0 1 0 0 299 0 0 0 100 4 0 0 0 16 5 40 1 0 1 0 1011 0 0 0 100 5 0 0 0 13 3 12 0 1 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 203 108 0 0 0 0 553 0 0 0 100 1 0 0 18 306 152 102 0 0 0 0 266 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 2 0 0 0 100 3 0 0 0 12 3 6 0 1 1 0 300 0 0 0 100 4 0 0 0 16 5 62 1 1 1 0 1011 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 203 114 0 0 0 0 561 0 0 0 100 1 0 0 18 314 155 116 0 0 0 0 277 0 0 0 100 2 0 0 0 13 0 18 0 0 0 0 13 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 21 9 40 1 0 1 0 1011 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 9 0 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 829 0 10 2325 203 270 4 30 52 9 992 1 1 0 98 1 1166 0 74 262 123 261 12 35 107 4 1006 2 1 0 97 2 394 0 0 83 30 334 5 41 144 4 899 3 1 0 97 3 3393 0 7 37 3 184 11 20 185 12 1149 2 5 0 93 4 826 0 1 31 4 256 6 27 98 10 1640 4 1 0 95 5 1632 0 0 28 5 192 3 26 144 13 754 2 2 0 97 6 448 0 0 28 1 208 11 23 81 4 607 1 0 0 98 7 541 0 0 24 3 153 2 19 106 8 438 1 0 0 99 March 10, 2026 at 10:41:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 14 2320 208 122 0 1 0 0 610 0 0 0 99 1 0 0 18 206 102 2 0 0 0 0 266 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 16 2 10 0 0 0 0 300 0 0 0 100 4 0 0 0 16 4 40 1 0 0 0 1093 0 0 0 100 5 0 0 0 15 4 10 0 0 0 0 301 0 0 0 100 6 0 0 0 11 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:41:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2330 210 304 0 4 68 0 564 0 0 0 99 1 0 0 21 207 102 71 0 5 79 0 266 0 0 0 100 2 0 0 0 115 52 195 0 5 70 0 2 0 0 0 100 3 0 0 0 73 56 117 0 9 72 0 300 0 0 0 100 4 7 0 0 19 5 97 1 6 74 0 1092 0 1 0 99 5 0 0 0 19 5 114 0 3 88 0 300 0 0 0 100 6 0 0 0 9 1 72 0 4 66 0 0 0 0 0 100 7 0 0 0 14 1 76 0 4 79 0 0 0 0 0 100 March 10, 2026 at 10:41:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2321 209 122 0 0 2 0 563 0 0 0 100 1 0 0 17 206 102 22 0 1 2 0 266 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 16 2 10 0 0 0 0 300 0 0 0 100 4 0 0 0 13 4 40 0 0 0 0 1089 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1375 0 33 2438 209 1354 43 195 186 54 4454 3 2 0 95 1 1900 0 209 288 104 1089 26 177 151 55 3767 2 2 0 96 2 2387 0 211 148 28 1226 35 166 144 44 4289 4 3 0 94 3 1826 0 7 146 19 1034 22 135 137 51 3968 4 2 0 94 4 7813 0 185 96 9 932 30 122 235 36 5059 3 3 0 94 5 7031 0 34 175 11 833 19 105 171 62 5274 3 3 0 94 6 2045 0 5 94 1 841 22 115 94 56 2741 3 1 0 96 7 28041 0 24 176 1 846 37 91 124 47 2922 12 22 0 66 March 10, 2026 at 10:41:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 10 2320 203 13 0 3 0 0 556 0 0 0 100 1 27 0 87 212 103 6 1 0 7 0 304 0 0 0 100 2 29 0 0 118 1 110 0 2 6 0 38 0 0 0 100 3 1 0 0 27 2 18 0 0 0 0 331 0 0 0 100 4 12 0 0 27 4 46 1 1 0 0 1130 0 0 0 100 5 0 0 0 126 53 114 0 2 1 0 315 0 0 0 100 6 0 0 7 19 1 6 0 2 0 0 21 0 0 0 100 7 45 0 0 34 7 24 0 1 0 0 18 0 0 0 100 March 10, 2026 at 10:41:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2345 203 28 0 2 0 0 602 0 0 0 100 1 0 0 24 241 102 4 0 1 3 0 266 0 0 0 100 2 0 0 231 92 1 88 0 0 4 0 2 0 0 0 100 3 0 0 0 50 2 28 0 1 0 0 300 0 0 0 100 4 12 0 0 48 4 40 1 0 1 0 1094 0 0 0 100 5 0 0 0 147 53 108 0 0 0 0 300 0 0 0 100 6 0 0 0 41 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 53 6 16 0 2 0 0 9 0 0 0 100 March 10, 2026 at 10:41:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2331 203 235 0 10 57 0 553 0 0 0 99 1 0 0 32 226 102 136 0 5 63 0 266 0 0 0 100 2 0 0 119 7 0 93 0 5 62 0 0 0 0 0 100 3 0 0 0 88 53 82 0 4 78 0 300 0 0 0 100 4 0 0 0 34 5 153 0 10 71 0 1091 0 0 0 100 5 0 0 0 133 53 197 0 8 80 0 300 0 0 0 100 6 0 0 0 24 0 88 0 3 62 0 0 0 0 0 100 7 0 0 0 39 6 108 0 4 72 0 9 0 0 0 100 March 10, 2026 at 10:41:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1622 0 38 2424 203 230 4 19 33 19 1913 1 2 0 97 1 257 0 53 255 102 169 3 41 33 30 708 0 1 0 99 2 1058 0 189 44 1 150 6 19 41 29 899 1 1 0 99 3 233 0 8 66 4 164 1 28 28 27 1251 0 1 0 99 4 4299 0 5 66 5 181 2 25 101 24 2142 1 1 0 98 5 2123 0 3 161 53 233 1 33 59 29 897 0 1 0 99 6 798 0 127 36 0 145 2 29 24 30 385 0 0 0 99 7 116 0 9 67 8 159 2 25 19 23 409 0 0 0 100 March 10, 2026 at 10:41:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3015 0 23 2454 205 1179 33 134 100 35 3654 4 2 0 94 1 1524 0 155 353 141 1100 34 125 106 38 4333 4 2 0 94 2 2043 0 0 87 2 884 20 110 89 40 3165 3 1 0 96 3 33942 0 10 105 7 845 24 104 52 36 3485 10 6 0 84 4 3633 0 118 85 10 785 22 82 109 34 4191 2 2 0 96 5 4481 0 203 92 13 838 18 92 77 40 3396 6 2 0 92 6 2924 0 17 82 2 876 19 75 97 45 4154 3 2 0 96 7 1619 0 1 85 3 836 16 85 86 47 3549 3 1 0 96 March 10, 2026 at 10:41:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2381 202 108 0 0 0 0 307 0 1 0 99 1 30 0 59 286 108 18 0 2 2 0 585 0 1 0 99 2 0 0 462 15 1 8 0 0 2 0 2 0 0 0 100 3 0 0 0 192 54 116 0 1 0 0 322 0 0 0 100 4 0 0 0 85 4 40 0 0 0 0 1101 0 0 0 100 5 0 0 0 92 4 12 0 0 0 0 301 0 0 0 100 6 0 0 3 81 1 4 0 1 1 0 1 0 0 0 100 7 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 11 2305 202 52 0 0 0 0 261 0 0 0 100 1 0 0 17 221 109 16 0 0 0 0 568 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 2 0 0 0 100 3 0 0 0 116 52 110 0 0 0 0 300 0 0 0 100 4 0 0 0 14 4 42 1 0 0 0 1092 0 0 0 100 5 0 0 0 15 4 10 0 0 0 0 301 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 61 0 58 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:41:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 12 2313 203 102 0 8 73 0 261 0 0 0 100 1 0 0 16 226 110 203 0 14 69 0 570 0 0 0 100 2 0 0 0 9 2 93 0 10 71 0 2 0 0 0 100 3 0 0 0 173 107 196 0 8 63 0 301 0 0 0 100 4 0 0 0 16 5 117 1 5 86 0 1091 0 0 0 100 5 0 0 0 15 4 98 0 8 72 0 300 0 0 0 100 6 0 0 0 9 1 90 0 3 67 0 0 0 0 0 100 7 0 0 0 111 1 215 0 10 74 0 0 0 0 0 100 March 10, 2026 at 10:41:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3527 0 38 2500 203 1074 32 179 146 78 5892 4 2 0 94 1 1793 0 211 388 109 1071 19 180 103 70 4359 4 2 0 94 2 34809 0 129 115 1 1057 21 143 100 59 4979 11 7 0 82 3 2772 0 208 162 19 1071 30 161 106 72 3953 3 3 0 94 4 1140 0 23 114 3 1021 25 121 99 56 3982 3 2 0 95 5 10446 0 257 122 8 864 28 107 235 57 4269 3 3 0 93 6 5370 0 21 133 10 874 15 108 157 71 3630 3 2 0 95 7 3634 0 32 244 20 815 17 103 107 69 2831 4 1 0 95 March 10, 2026 at 10:41:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39 0 11 2333 209 136 0 0 0 0 292 0 0 0 100 1 26 0 31 222 103 23 1 2 2 0 615 0 0 0 100 2 6 0 7 21 2 15 0 3 8 0 18 0 0 0 100 3 11 0 0 27 4 14 0 2 2 0 321 0 0 0 100 4 1 0 0 35 10 46 1 1 1 0 1137 0 0 0 100 5 0 0 0 26 4 12 1 2 0 0 313 0 0 0 100 6 3 0 0 22 1 6 0 1 0 0 5 0 0 0 100 7 1 0 70 112 50 117 0 4 6 0 8 0 1 0 99 March 10, 2026 at 10:41:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2391 208 126 0 0 0 0 272 0 1 0 99 1 0 0 17 280 103 4 0 0 0 0 561 0 0 0 100 2 0 0 462 13 0 4 0 0 2 0 0 0 0 0 100 3 0 0 0 82 2 6 0 1 0 0 300 0 0 0 100 4 2 0 0 84 3 58 1 1 1 0 1097 0 0 0 100 5 0 0 0 85 4 8 0 0 1 0 300 0 0 0 100 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 42 175 50 104 0 1 2 0 0 0 1 0 99 March 10, 2026 at 10:41:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2319 208 126 0 0 0 0 269 0 0 0 100 1 0 0 17 210 104 6 0 0 0 0 561 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 13 3 40 0 0 1 0 1098 0 0 0 100 5 0 0 0 13 4 28 0 1 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 107 50 102 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:41:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5470 0 344 2483 214 1273 38 165 251 76 6649 6 3 0 91 1 1874 0 70 341 104 1470 29 196 236 72 3607 2 2 0 96 2 717 0 18 125 2 1069 25 146 204 57 3156 2 1 0 96 3 2131 0 191 210 112 1050 19 117 220 48 3520 2 2 0 96 4 5897 0 10 126 4 1151 20 122 266 60 5236 4 3 0 93 5 43516 0 51 202 4 879 27 103 296 53 5272 13 10 0 77 6 3168 0 141 94 0 988 20 125 223 81 2931 4 2 0 95 7 611 0 14 207 49 1051 22 106 192 78 2163 1 1 0 98 March 10, 2026 at 10:41:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 10 2370 252 209 0 5 3 0 271 0 0 0 100 1 34 0 31 246 105 34 1 2 0 0 617 0 0 0 100 2 0 0 0 22 2 14 0 1 6 0 12 0 0 0 100 3 21 0 0 27 3 9 1 3 0 0 309 0 0 0 100 4 5 0 7 24 3 44 1 2 0 0 1118 0 0 0 99 5 1 0 0 28 4 34 0 2 4 0 313 0 0 0 100 6 0 0 70 14 2 6 0 0 6 0 12 0 0 0 100 7 27 0 0 30 4 20 0 2 0 0 25 0 0 0 100 March 10, 2026 at 10:41:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 11 2431 252 214 0 1 0 0 263 0 1 0 99 1 0 0 17 295 106 26 0 0 0 0 581 0 0 0 100 2 0 0 462 11 0 4 0 0 2 0 0 0 0 0 100 3 0 0 0 82 2 6 0 0 0 0 305 0 0 0 100 4 0 0 0 95 8 44 1 1 1 0 1098 0 0 0 99 5 0 0 0 85 3 10 0 2 1 0 300 0 0 0 100 6 0 0 42 75 1 24 0 1 2 0 0 0 1 0 99 7 0 0 0 93 6 18 0 0 0 0 9 0 0 0 100 March 10, 2026 at 10:41:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 11 2357 252 214 0 0 0 0 260 0 0 0 100 1 0 0 17 211 104 6 0 0 0 0 562 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 12 3 38 1 0 0 0 1092 0 0 0 100 5 0 0 0 13 4 8 0 0 0 0 301 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 7 0 0 0 17 5 12 0 0 0 0 8 0 0 0 100 March 10, 2026 at 10:41:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 24 2367 252 230 0 3 2 3 293 0 1 0 99 1 7 0 21 217 104 25 1 6 0 4 595 0 0 0 100 2 11 0 0 11 1 22 0 5 4 3 37 0 0 0 100 3 14 0 2 14 2 23 0 5 7 1 343 0 0 0 100 4 11 0 0 17 3 65 0 9 2 10 1137 0 0 0 100 5 7 0 12 21 4 28 0 4 6 0 350 0 1 0 99 6 15 0 12 13 1 29 0 7 9 4 41 0 0 0 100 7 12 0 4 27 8 66 1 6 1 5 46 0 0 0 100 March 10, 2026 at 10:41:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4657 0 372 2460 204 1006 20 140 194 57 3107 4 3 0 94 1 3069 0 205 328 107 1112 30 167 183 105 4272 3 2 0 95 2 1377 0 16 145 3 971 18 134 199 77 3601 3 1 0 95 3 1504 0 9 257 60 919 21 119 171 76 3255 2 2 0 96 4 3225 0 17 139 7 833 27 113 205 45 4632 4 3 0 94 5 6739 0 20 121 5 804 16 115 206 49 3264 2 2 0 95 6 40798 0 31 193 4 640 20 79 205 58 5078 12 8 0 81 7 1633 0 198 194 46 1143 12 106 180 63 3073 2 1 0 97 March 10, 2026 at 10:41:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39 0 24 2320 208 54 0 3 0 0 315 0 0 0 99 1 2 0 18 212 102 6 0 1 1 0 574 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 44 2 34 0 0 0 0 300 0 0 0 100 4 0 0 0 16 3 38 1 0 0 0 1099 0 0 0 100 5 0 0 0 15 3 6 0 0 0 0 300 0 0 0 100 6 0 0 0 50 1 44 0 1 0 0 0 0 0 0 100 7 0 0 0 111 50 106 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:41:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 53 2385 208 85 0 1 3 0 269 0 1 0 99 1 0 0 17 289 105 39 0 2 1 0 575 0 0 0 100 2 0 0 462 13 1 8 0 0 2 0 2 0 0 0 100 3 1 0 0 82 2 10 0 0 5 0 311 0 0 0 100 4 0 0 0 100 16 44 0 0 1 0 1100 0 0 0 100 5 0 0 0 83 3 6 0 0 6 0 300 0 0 0 100 6 0 0 0 129 0 48 0 0 0 0 0 0 0 0 100 7 0 0 0 183 51 110 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2317 207 128 0 1 0 0 268 0 0 0 100 1 0 0 17 214 103 8 0 0 1 0 559 0 0 0 100 2 0 0 0 7 0 24 0 2 0 0 0 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 16 5 43 1 0 0 0 1091 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 109 51 104 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1225 0 47 2427 208 1344 16 155 107 84 3455 2 2 0 96 1 2948 0 76 470 114 1004 30 137 125 60 3315 4 1 0 95 2 2184 0 195 104 1 960 20 101 128 61 3584 2 2 0 96 3 37197 0 35 131 4 941 37 125 128 79 5797 14 7 0 79 4 1647 0 11 120 5 911 19 116 147 70 3676 2 2 0 96 5 9801 0 134 138 22 899 19 86 175 59 5930 4 4 0 93 6 7106 0 308 85 0 874 21 106 173 68 4241 6 3 0 92 7 1501 0 16 156 22 940 13 87 82 77 3765 3 2 0 96 March 10, 2026 at 10:41:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 80 2319 203 222 0 6 99 0 262 0 1 0 99 1 3 0 39 218 103 190 0 4 85 0 573 0 0 0 100 2 0 0 0 24 2 89 0 3 63 0 12 0 0 0 100 3 17 0 0 83 57 182 1 5 118 0 333 0 0 0 100 4 44 0 0 37 8 132 1 9 85 0 1125 0 0 0 99 5 0 0 0 126 53 191 0 5 68 0 319 0 0 0 100 6 1 0 0 22 1 71 0 4 61 0 16 0 0 0 100 7 20 0 0 27 1 79 1 3 57 0 11 0 0 0 100 March 10, 2026 at 10:41:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 52 2373 202 116 0 0 2 0 263 0 1 0 99 1 0 0 17 282 103 6 0 0 0 0 559 0 0 0 100 2 0 0 0 81 1 6 0 2 0 0 2 0 0 0 100 3 0 0 462 16 2 8 0 0 2 0 300 0 0 0 100 4 0 0 0 96 9 70 1 1 1 0 1098 0 0 0 100 5 0 0 0 185 54 108 0 0 0 0 301 0 0 0 100 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 81 1 4 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2307 202 118 0 0 0 0 260 0 0 0 100 1 0 0 17 210 104 14 0 0 0 0 574 0 0 0 100 2 0 0 0 5 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 16 5 12 0 0 0 0 308 0 0 0 100 4 0 0 0 30 16 54 0 0 1 0 1107 0 0 0 100 5 0 0 0 111 53 106 0 0 0 0 300 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4204 0 36 2518 212 1407 47 224 139 84 5131 5 2 0 92 1 1383 0 108 346 107 1348 41 230 126 81 6119 3 2 0 95 2 4112 0 31 191 1 1082 41 158 97 72 3613 4 2 0 94 3 1667 0 37 144 4 1197 51 183 117 65 4682 3 2 0 95 4 34793 0 192 125 10 1049 34 142 109 55 4633 10 8 0 82 5 7726 0 135 182 39 1103 22 156 186 70 4588 4 3 0 93 6 5599 0 188 129 4 1053 34 140 161 72 4029 3 2 0 95 7 4181 0 129 107 3 992 29 125 138 69 5702 3 2 0 95 March 10, 2026 at 10:41:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2325 203 8 0 1 0 0 284 0 0 0 100 1 23 0 32 319 153 110 0 1 7 0 576 0 0 0 100 2 23 0 0 24 3 16 0 2 2 0 22 1 0 0 99 3 6 0 70 115 2 111 0 3 7 0 338 0 0 0 99 4 4 0 7 26 3 49 2 3 6 0 1113 0 0 0 99 5 28 0 0 37 8 28 1 2 1 0 319 0 0 0 100 6 49 0 0 28 1 34 0 3 0 0 21 0 0 0 100 7 31 0 0 27 2 12 1 0 3 0 30 2 0 0 98 March 10, 2026 at 10:41:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2383 203 159 0 7 63 0 263 0 1 0 99 1 0 0 18 382 153 293 0 10 56 0 560 0 0 0 100 2 0 0 0 85 2 103 0 9 73 0 2 0 0 0 100 3 0 0 42 170 64 149 0 8 88 0 300 0 1 0 99 4 0 0 462 23 4 125 1 7 62 0 1098 0 1 0 99 5 0 0 0 97 10 105 0 8 66 0 310 0 0 0 100 6 0 0 0 88 1 99 0 5 74 0 0 0 0 0 100 7 0 0 0 86 2 89 0 4 63 0 0 0 0 0 100 March 10, 2026 at 10:41:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 202 106 0 0 0 0 260 0 0 0 100 1 0 0 18 312 154 108 0 1 0 0 561 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 12 3 38 1 0 0 0 1098 0 0 0 100 5 0 0 0 21 8 16 0 0 0 0 305 0 0 0 100 6 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 24 0 1 1 0 0 0 0 0 100 March 10, 2026 at 10:41:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2308 202 132 0 1 0 0 260 0 0 0 100 1 0 0 18 314 155 116 0 0 1 0 573 0 0 0 100 2 0 0 0 7 1 4 0 0 0 0 2 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 305 0 0 0 100 4 0 0 0 16 8 42 0 0 0 0 1102 0 0 0 100 5 0 0 0 23 9 18 0 0 0 0 309 0 0 0 100 6 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 7 0 0 0 13 1 12 0 0 2 0 0 0 0 0 100 March 10, 2026 at 10:41:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1933 0 25 2427 203 1308 34 205 130 91 4846 4 2 0 94 1 1457 0 83 329 108 1277 26 149 119 71 4198 2 2 0 96 2 34043 0 22 145 3 1200 31 145 97 59 4331 10 7 0 83 3 4425 0 310 165 11 1047 22 115 123 62 3985 4 2 0 94 4 1323 0 35 137 7 970 21 109 83 74 4984 3 2 0 94 5 1529 0 13 121 7 828 18 85 160 55 3632 3 2 0 95 6 10153 0 309 101 4 775 16 96 165 67 4161 5 4 0 92 7 8385 0 43 237 32 992 16 108 195 87 4611 4 2 0 94 March 10, 2026 at 10:41:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2365 249 208 0 1 1 0 263 0 0 0 100 1 2 0 17 221 103 8 0 2 0 0 559 0 0 0 100 2 26 0 0 32 7 32 0 1 0 0 11 0 0 0 100 3 0 0 0 19 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 25 3 40 1 0 6 0 1106 0 0 0 99 5 0 0 7 25 4 10 0 0 1 0 301 0 0 0 100 6 0 0 0 24 0 8 0 0 0 0 0 0 0 0 100 7 0 0 70 16 3 8 0 1 6 0 0 0 0 0 100 March 10, 2026 at 10:41:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 11 2434 252 294 0 8 59 0 260 0 1 0 99 1 0 0 17 283 103 187 0 9 80 0 561 0 0 0 100 2 0 0 0 91 6 103 0 8 78 0 9 0 0 0 100 3 0 0 0 137 58 122 0 5 69 0 301 0 0 0 100 4 0 0 462 18 3 135 1 7 78 0 1097 0 1 0 99 5 0 0 0 87 3 106 0 5 63 0 300 0 0 0 100 6 0 0 0 88 1 105 0 11 69 0 0 0 0 0 100 7 0 0 42 78 1 93 0 5 95 0 0 0 1 0 99 March 10, 2026 at 10:41:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 11 2357 252 206 0 0 0 0 260 0 0 0 100 1 0 0 17 211 103 6 0 0 1 0 560 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 11 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 11 3 38 0 0 1 0 1098 0 0 0 100 5 0 0 0 13 4 8 0 0 0 0 301 0 0 0 100 6 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35149 0 146 2440 224 1247 61 199 120 66 4053 12 8 0 81 1 2103 0 82 412 116 1076 49 185 127 58 5650 3 2 0 96 2 1338 0 12 144 8 1037 40 169 125 64 2982 2 1 0 97 3 1934 0 35 131 4 839 39 143 93 50 4368 4 2 0 94 4 2471 0 368 144 26 1045 42 136 105 64 4993 3 2 0 95 5 1249 0 7 112 4 889 26 135 107 58 4783 3 2 0 95 6 10040 0 136 113 0 834 37 129 214 68 3860 3 3 0 94 7 8725 0 45 207 1 897 23 119 164 63 4726 7 3 0 90 March 10, 2026 at 10:42:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 73 2310 201 111 0 2 6 0 8 0 1 0 99 1 6 0 39 225 105 12 0 0 4 0 853 0 0 0 100 2 28 0 0 32 6 16 0 2 1 0 28 0 0 0 100 3 36 0 0 25 3 9 0 1 0 0 317 0 0 0 100 4 0 0 0 49 13 68 1 2 6 0 1131 0 1 0 99 5 15 0 0 112 46 125 0 3 0 0 313 0 0 0 100 6 0 0 0 32 2 14 0 0 0 0 14 0 0 0 100 7 0 0 7 23 1 8 0 1 0 0 20 0 0 0 100 March 10, 2026 at 10:42:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 39 2352 200 106 0 1 3 0 0 0 1 0 99 1 1 0 24 269 105 10 0 1 0 0 824 0 0 0 100 2 0 0 0 72 6 12 0 0 0 0 9 0 0 0 100 3 0 0 0 63 2 2 0 0 0 0 300 0 0 0 100 4 0 0 350 23 6 50 1 0 3 0 1101 0 1 0 99 5 0 0 0 168 54 108 0 0 0 0 301 0 0 0 100 6 0 0 0 68 0 8 0 0 0 0 0 0 0 0 100 7 0 0 0 66 1 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2329 201 206 0 9 62 0 1 0 1 0 99 1 0 0 24 230 105 206 0 7 66 0 820 0 0 0 100 2 0 0 0 35 7 119 0 6 78 0 10 0 0 0 100 3 0 0 0 83 59 88 0 4 78 0 300 0 0 0 100 4 0 0 112 13 4 137 0 7 74 0 1098 0 1 0 99 5 0 0 0 38 7 100 0 6 81 0 300 0 0 0 100 6 0 0 0 125 48 221 0 5 66 0 0 0 0 0 100 7 0 0 0 32 2 98 0 4 55 0 0 0 0 0 100 March 10, 2026 at 10:42:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1112 0 29 2423 202 707 9 101 80 82 1902 1 2 0 97 1 1172 0 256 288 106 596 7 99 66 82 3136 1 1 0 98 2 2632 0 24 187 8 509 10 78 58 60 3170 3 1 0 96 3 33429 0 15 116 3 479 19 78 59 50 2595 9 6 0 85 4 985 0 35 123 13 412 8 62 69 42 3372 2 2 0 96 5 1220 0 186 96 3 428 4 58 60 44 2171 2 1 0 97 6 10215 0 249 160 38 451 12 52 151 58 4186 3 3 0 94 7 7223 0 42 171 3 442 6 67 147 58 2181 3 2 0 95 March 10, 2026 at 10:42:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 719 0 3 2341 202 672 37 110 43 5 2027 3 1 0 96 1 578 0 123 236 106 587 33 99 78 7 2735 2 1 0 97 2 712 0 7 43 2 615 39 97 46 6 2114 2 1 0 98 3 685 0 0 53 3 530 32 76 36 11 1981 1 1 0 98 4 629 0 0 152 64 663 21 72 68 10 2738 1 1 0 98 5 912 0 0 41 3 533 14 66 59 7 1906 1 1 0 98 6 418 0 0 38 1 478 19 55 25 2 1663 3 0 0 96 7 698 0 0 139 1 508 15 56 30 2 1310 1 0 0 99 March 10, 2026 at 10:42:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2377 201 28 0 2 0 0 0 0 0 0 100 1 0 0 66 282 105 12 0 0 4 0 823 0 1 0 99 2 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 80 2 4 0 1 0 0 300 0 0 0 100 4 26 0 462 134 62 154 1 0 2 0 1099 0 1 0 99 5 0 0 0 83 3 6 0 0 1 0 300 0 0 0 100 6 0 0 0 85 0 8 0 0 0 0 0 0 0 0 100 7 0 0 0 181 0 104 0 0 2 0 0 0 0 0 100 March 10, 2026 at 10:42:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2307 201 78 0 1 0 0 0 0 0 0 100 1 2 0 24 213 105 32 0 2 1 0 820 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 123 59 150 0 0 1 0 1099 0 0 0 100 5 0 0 0 13 4 8 0 0 0 0 300 0 0 0 100 6 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 7 0 0 0 35 0 28 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:42:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2310 200 224 0 5 86 0 0 0 0 0 100 1 0 0 25 216 106 202 0 11 71 0 820 0 0 0 100 2 0 0 0 8 0 81 0 10 57 0 0 0 0 0 100 3 0 0 0 67 59 89 0 10 75 0 300 0 0 0 100 4 0 0 0 44 19 161 1 2 61 0 1096 0 0 0 99 5 0 0 0 89 42 181 0 7 60 0 300 0 0 0 100 6 0 0 0 11 0 100 0 4 63 0 0 0 0 0 100 7 0 0 0 10 1 87 0 5 73 0 0 0 0 0 100 March 10, 2026 at 10:42:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6223 0 35 2492 210 1233 27 175 175 90 4406 4 3 0 93 1 34155 0 119 400 142 1161 35 156 121 72 4315 10 7 0 83 2 3008 0 26 184 2 877 23 125 118 65 3085 3 2 0 95 3 2799 0 218 102 4 971 15 104 111 60 3021 3 2 0 95 4 1780 0 177 118 8 990 22 96 88 69 5888 3 2 0 96 5 822 0 11 127 12 842 15 82 78 55 5203 4 2 0 95 6 6832 0 127 98 2 939 17 105 210 55 4439 5 3 0 91 7 7906 0 128 104 2 914 20 113 185 78 3996 3 2 0 95 March 10, 2026 at 10:42:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 73 2306 200 114 0 1 6 0 0 0 1 0 99 1 2 0 25 328 157 118 0 1 0 0 829 0 0 0 100 2 0 0 0 20 0 4 0 0 1 0 0 0 0 0 100 3 0 0 0 23 2 24 0 1 0 0 300 0 0 0 100 4 26 0 7 45 16 72 1 1 7 0 1125 0 0 0 99 5 0 0 0 24 3 10 0 0 0 0 307 0 0 0 100 6 0 0 0 18 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 24 1 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 45 2371 200 110 0 0 2 0 0 0 1 0 99 1 0 0 25 387 156 112 0 0 0 0 821 0 0 0 100 2 0 0 0 81 2 4 0 0 0 0 25 0 0 0 100 3 0 0 0 82 3 4 0 0 0 0 321 0 0 0 100 4 0 0 462 31 9 56 0 0 2 0 1098 0 1 0 99 5 0 0 0 85 4 10 0 1 0 0 301 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2305 200 108 0 0 0 0 0 0 0 0 100 1 0 0 25 315 156 112 0 0 0 0 819 0 0 0 100 2 0 0 0 9 1 8 0 1 0 0 9 0 0 0 100 3 0 0 0 10 2 4 0 0 1 0 300 0 0 0 100 4 0 0 0 22 8 68 1 1 0 0 1096 0 0 0 100 5 0 0 0 13 4 12 0 0 0 0 319 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6013 0 29 2439 201 1201 35 166 246 88 5244 5 3 0 92 1 2406 0 88 397 109 1226 20 173 265 83 4590 3 2 0 95 2 35253 0 198 166 25 1112 29 160 166 76 5706 11 8 0 80 3 2543 0 27 318 77 995 28 127 153 65 3508 3 2 0 96 4 1807 0 13 145 13 931 20 107 205 57 4096 4 2 0 94 5 1195 0 30 138 19 928 15 104 160 40 2720 2 2 0 97 6 2229 0 188 105 2 824 13 106 208 38 2479 2 2 0 96 7 11936 0 326 116 2 905 34 118 270 72 4074 4 4 0 92 March 10, 2026 at 10:42:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 3 2322 201 116 0 0 0 0 28 0 0 0 100 1 28 0 39 224 105 14 1 2 1 0 831 0 0 0 100 2 6 0 0 24 2 6 0 1 0 0 17 0 0 0 100 3 0 0 70 14 2 7 1 2 7 0 313 0 1 0 99 4 0 0 0 30 5 47 1 1 6 0 1114 0 0 0 99 5 40 0 0 138 59 128 0 1 1 0 320 0 0 0 100 6 6 0 7 21 1 7 1 4 0 0 12 0 0 0 100 7 2 0 0 24 1 6 0 1 2 0 11 0 0 0 100 March 10, 2026 at 10:42:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 39 2354 200 88 0 3 3 0 0 0 1 0 99 1 0 0 24 295 105 40 0 4 1 0 828 0 0 0 100 2 0 0 0 62 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 67 3 4 0 0 0 0 302 0 0 0 100 4 0 0 350 27 10 60 0 0 3 0 1107 0 0 0 99 5 0 0 0 180 59 124 0 0 0 0 316 0 0 0 100 6 0 0 0 62 0 20 0 1 0 0 0 0 0 0 100 7 0 0 0 64 0 8 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:42:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2320 200 106 0 0 1 0 0 0 0 0 100 1 0 0 24 236 105 16 0 0 0 0 819 0 0 0 100 2 0 0 0 25 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 24 2 2 0 0 0 0 299 0 0 0 100 4 0 0 112 12 3 42 1 0 1 0 1090 0 0 0 100 5 0 0 0 137 58 116 0 0 0 0 308 0 0 0 100 6 0 0 0 23 0 22 0 0 0 0 0 0 0 0 100 7 0 0 0 23 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2776 0 37 2389 204 538 7 88 126 55 2322 1 2 0 97 1 1178 0 171 299 106 427 4 78 64 50 3335 1 1 0 98 2 1433 0 189 70 2 436 5 66 67 57 2822 1 1 0 98 3 559 0 22 88 4 431 3 68 44 62 1718 1 1 0 98 4 763 0 25 85 3 339 6 50 46 42 2591 2 1 0 97 5 2642 0 35 244 52 430 5 50 69 43 1665 2 1 0 97 6 361 0 15 107 12 398 10 59 81 48 1333 1 1 0 98 7 40348 0 138 85 1 392 10 48 143 46 2578 10 8 0 83 March 10, 2026 at 10:42:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4918 0 23 2427 203 622 24 97 122 11 2333 5 2 0 93 1 713 0 52 266 106 819 21 93 122 17 2986 2 1 0 97 2 1098 0 0 149 2 651 15 86 117 21 1472 1 1 0 98 3 857 0 0 124 73 600 13 86 126 15 1745 1 1 0 98 4 1022 0 71 53 4 628 11 63 139 11 2921 1 2 0 97 5 1718 0 176 57 5 738 20 79 113 20 2050 2 1 0 96 6 664 0 0 57 4 542 16 80 117 20 1401 2 1 0 97 7 2242 0 2 140 46 476 7 55 113 11 1437 1 1 0 98 March 10, 2026 at 10:42:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 3 2388 207 22 0 0 0 0 10 0 1 0 99 1 2 0 24 291 105 38 0 2 2 0 823 0 0 0 100 2 0 0 0 177 0 100 0 0 0 0 0 0 0 0 100 3 0 0 0 84 4 6 0 0 0 0 302 0 0 0 100 4 0 0 42 80 3 40 1 0 2 0 1093 0 1 0 99 5 0 0 462 19 4 10 0 0 2 0 301 0 0 0 100 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 179 50 102 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2319 205 50 1 2 0 0 17 0 0 0 100 1 0 0 24 221 106 22 0 0 0 0 827 0 0 0 100 2 0 0 0 85 0 80 0 0 0 0 0 0 0 0 100 3 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 4 0 0 0 24 13 48 1 0 1 0 1100 0 0 0 100 5 0 0 0 12 3 10 1 0 0 0 307 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 109 50 108 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2314 206 116 0 0 0 0 9 0 0 0 100 1 0 0 24 221 105 18 0 0 0 0 819 0 0 0 100 2 0 0 0 5 0 22 0 1 0 0 0 0 0 0 100 3 0 0 0 12 4 6 0 0 0 0 302 0 0 0 100 4 0 0 0 12 3 38 1 0 0 0 1092 0 0 0 100 5 0 0 0 13 4 8 0 0 0 0 301 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6616 0 137 2433 210 1206 29 155 177 88 4067 3 3 0 94 1 1108 0 105 326 106 931 20 138 90 96 3857 3 2 0 96 2 4341 0 24 195 10 1013 15 93 131 66 5492 5 2 0 93 3 981 0 21 174 35 1054 20 114 59 71 3850 2 1 0 97 4 34274 0 9 124 4 886 21 104 90 47 3586 11 7 0 82 5 2447 0 306 91 6 1049 14 93 122 63 5094 4 2 0 94 6 3492 0 212 160 1 796 16 92 100 78 2352 5 2 0 94 7 9983 0 25 137 7 883 17 91 235 66 5348 3 3 0 94 March 10, 2026 at 10:42:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2321 200 234 0 10 93 0 0 0 0 0 100 1 2 0 24 229 106 146 0 9 108 0 823 0 0 0 100 2 0 0 7 23 2 267 0 13 98 0 0 0 0 0 100 3 0 0 70 232 170 277 0 10 99 0 302 0 1 0 99 4 26 0 0 36 9 148 0 9 99 0 9 0 0 0 100 5 0 0 0 29 5 304 1 10 99 0 1401 0 1 0 99 6 0 0 0 25 2 210 0 5 120 0 0 0 0 0 100 7 0 0 0 26 1 161 0 8 107 0 0 0 0 0 100 March 10, 2026 at 10:42:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2376 200 110 0 0 0 0 0 0 0 0 100 1 0 0 24 283 105 8 0 0 0 0 821 0 0 0 100 2 0 0 0 81 0 4 0 1 0 0 0 0 0 0 100 3 0 0 42 92 9 18 0 2 2 0 300 0 1 0 99 4 0 0 0 182 52 110 1 2 2 0 9 0 0 0 100 5 0 0 462 20 4 40 1 0 2 0 1392 0 0 0 99 6 0 0 0 77 0 24 0 1 0 0 0 0 0 0 100 7 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2308 202 132 1 0 3 0 18 0 0 0 100 1 0 0 24 214 105 14 0 0 0 0 827 0 0 0 100 2 0 0 0 5 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 12 4 6 0 0 0 0 302 0 0 0 100 4 0 0 0 128 63 118 0 0 0 0 9 0 0 0 100 5 0 0 0 14 4 42 1 0 0 0 1399 0 0 0 100 6 0 0 0 7 0 24 0 0 0 0 0 0 0 0 100 7 0 0 0 9 0 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6539 0 23 2490 202 908 23 113 186 65 4899 3 3 0 94 1 1741 0 85 317 104 706 12 117 144 75 4226 3 1 0 96 2 35477 0 327 85 2 738 20 113 99 67 4026 10 8 0 83 3 1287 0 122 104 3 721 12 88 89 64 2371 2 1 0 97 4 2066 0 195 161 34 734 20 103 115 53 3332 3 2 0 95 5 1206 0 15 119 5 716 15 91 104 60 3783 2 2 0 97 6 3899 0 46 187 9 704 20 92 144 55 3215 5 2 0 93 7 11438 0 22 136 16 683 11 77 248 66 3496 4 3 0 93 March 10, 2026 at 10:42:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 3 2346 227 86 1 4 0 0 11 0 0 0 100 1 16 0 32 227 103 16 0 2 1 0 576 0 0 0 100 2 0 0 7 25 3 6 0 0 0 0 269 0 0 0 100 3 27 0 0 110 8 102 0 3 0 0 320 0 0 0 100 4 0 0 7 25 3 15 0 4 0 0 23 0 0 0 100 5 0 0 0 30 4 43 2 2 0 0 1406 0 0 0 100 6 2 0 70 14 1 12 0 2 7 0 8 0 0 0 100 7 15 0 0 72 25 84 0 3 6 0 20 0 0 0 100 March 10, 2026 at 10:42:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2413 250 199 0 7 59 0 0 0 1 0 99 1 0 0 17 270 103 101 0 6 46 0 561 0 0 0 100 2 0 0 7 61 2 169 0 9 51 0 263 0 0 0 100 3 0 0 0 223 59 211 0 6 56 0 308 0 0 0 100 4 0 0 0 66 3 103 0 7 64 0 0 0 0 0 100 5 0 0 0 67 4 122 1 6 66 0 1389 0 0 0 100 6 0 0 28 56 0 89 0 4 56 0 0 0 1 0 99 7 0 0 343 16 1 96 0 6 64 0 0 0 0 0 100 March 10, 2026 at 10:42:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2373 251 106 0 0 0 0 1 0 0 0 100 1 0 0 17 234 103 12 0 0 0 0 559 0 0 0 100 2 0 0 7 25 2 4 0 0 0 0 260 0 0 0 100 3 0 0 0 137 8 114 0 0 0 0 310 0 0 0 100 4 0 0 0 28 3 8 0 0 0 0 0 0 0 0 100 5 0 0 0 32 5 40 0 0 0 0 1390 0 0 0 100 6 0 0 0 24 0 2 0 0 0 0 0 0 0 0 100 7 0 0 119 7 0 4 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:42:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5116 0 139 2433 247 715 3 83 109 53 2672 2 3 0 96 1 37026 0 259 299 106 601 15 90 103 56 3575 10 8 0 82 2 1375 0 146 73 4 469 5 73 71 86 3204 1 1 0 98 3 460 0 13 186 18 560 5 67 51 49 1661 1 1 0 99 4 281 0 9 102 9 386 11 61 54 47 1105 1 0 0 99 5 354 0 20 98 6 371 9 48 31 53 4214 1 1 0 98 6 189 0 34 86 2 353 5 58 41 19 1250 1 1 0 98 7 4897 0 21 154 2 304 6 48 100 43 1999 2 1 0 96 March 10, 2026 at 10:42:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3784 0 182 2334 201 671 18 88 87 13 2443 2 2 0 96 1 3917 0 48 323 105 669 18 81 92 14 2501 2 2 0 96 2 991 0 77 65 3 593 21 73 82 24 2287 1 1 0 97 3 557 0 1 82 8 549 13 56 56 16 1711 1 1 0 98 4 733 0 0 53 3 512 16 65 56 15 1798 3 1 0 96 5 466 0 4 159 51 620 16 49 21 12 2545 1 1 0 98 6 2084 0 18 51 3 438 11 53 41 11 1658 4 1 0 96 7 1154 0 0 57 2 378 12 42 53 7 1990 2 1 0 97 March 10, 2026 at 10:42:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2378 200 104 0 0 0 0 0 0 1 0 99 1 2 0 17 278 102 2 0 0 0 0 266 0 0 0 100 2 0 0 49 88 3 18 0 0 3 0 557 0 1 0 99 3 0 0 0 80 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 81 2 6 0 0 0 0 0 0 0 0 100 5 0 0 0 119 21 70 0 0 0 0 1392 0 0 0 100 6 26 0 0 163 41 86 0 1 0 0 9 0 0 0 100 7 0 0 462 13 0 6 0 1 2 0 0 0 0 0 100 March 10, 2026 at 10:42:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 195 0 8 66 0 0 0 0 0 100 1 0 0 21 212 104 85 0 9 61 0 267 0 0 0 100 2 0 0 7 23 4 194 0 7 64 0 553 0 0 0 100 3 0 0 0 65 56 122 0 11 75 0 302 0 0 0 100 4 0 0 0 13 3 86 0 5 78 0 0 0 0 0 100 5 0 0 0 19 6 121 1 2 55 0 1389 0 0 0 100 6 0 0 0 118 56 184 0 7 72 0 8 0 0 0 100 7 0 0 0 13 1 102 0 4 77 0 0 0 0 0 100 March 10, 2026 at 10:42:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2305 200 104 0 0 0 0 0 0 0 0 100 1 0 0 18 206 102 2 0 0 0 0 266 0 0 0 100 2 0 0 7 18 3 14 0 0 1 0 555 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 26 0 1 0 0 0 0 0 0 100 5 0 0 0 16 5 40 1 0 0 0 1391 0 0 0 100 6 0 0 0 117 56 112 0 0 0 0 9 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1526 0 41 2467 236 1347 33 216 256 60 4274 3 3 0 95 1 10636 0 386 363 106 1067 43 182 222 65 7071 8 4 0 88 2 34785 0 403 102 6 1273 21 202 463 94 5424 11 9 0 79 3 4075 0 8 154 4 1160 30 172 156 86 5321 4 2 0 94 4 1937 0 15 145 8 1099 30 155 179 80 4384 5 2 0 93 5 33612 0 7 246 7 947 36 130 567 38 3901 10 5 0 85 6 1252 0 7 134 13 980 26 125 101 66 5175 2 1 0 96 7 2119 0 43 182 5 1004 16 124 93 42 2966 4 2 0 94 March 10, 2026 at 10:42:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 73 2314 206 16 0 1 3 0 0 0 1 0 99 1 2 0 25 306 146 102 0 2 4 0 268 0 0 0 100 2 0 0 7 23 3 8 0 1 0 0 557 0 0 0 100 3 0 0 0 21 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 30 2 16 0 0 0 0 0 0 0 0 100 5 26 0 0 132 8 136 0 1 1 0 308 0 0 0 100 6 0 0 0 22 2 34 0 0 1 0 1103 0 0 0 100 7 0 0 0 20 1 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 45 2371 200 76 0 1 2 0 0 0 1 0 99 1 0 0 480 316 152 110 0 1 2 0 266 0 0 0 100 2 0 0 7 82 3 8 0 1 0 0 554 0 0 0 100 3 0 0 0 82 3 4 0 0 0 0 302 0 0 0 100 4 0 0 0 89 2 14 0 0 0 0 0 0 0 0 100 5 0 0 0 126 8 47 0 0 2 0 309 0 0 0 100 6 0 0 0 82 2 54 1 1 1 0 1096 0 0 0 100 7 0 0 0 79 0 2 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:42:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2309 200 211 0 4 99 0 0 0 0 0 100 1 0 0 18 308 152 196 0 7 81 0 266 0 0 0 100 2 0 0 7 12 3 235 0 13 69 0 554 0 0 0 100 3 0 0 0 80 74 111 0 12 76 0 300 0 0 0 100 4 0 0 0 19 2 136 0 8 66 0 0 0 0 0 100 5 0 0 0 25 10 126 0 7 77 0 310 0 0 0 100 6 0 0 0 11 2 145 1 5 89 0 1097 0 0 0 100 7 0 0 0 8 0 123 0 2 74 0 0 0 0 0 100 March 10, 2026 at 10:42:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2577 0 204 2423 202 1211 35 189 141 65 4823 4 3 0 94 1 27281 0 120 374 129 1041 48 152 104 60 6482 12 8 0 80 2 11011 0 259 152 3 921 32 143 190 60 5093 6 4 0 91 3 6576 0 208 137 6 989 21 157 215 99 5142 5 3 0 92 4 3906 0 22 137 5 867 32 135 127 74 3670 2 2 0 96 5 1082 0 12 175 32 931 18 114 129 68 2938 2 1 0 97 6 672 0 7 142 2 915 12 121 68 71 3889 2 2 0 97 7 3058 0 20 180 0 797 20 100 111 52 2727 4 1 0 95 March 10, 2026 at 10:42:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2319 201 37 0 4 3 0 17 0 0 0 100 1 3 0 101 219 106 25 0 3 5 0 296 0 0 0 99 2 23 0 0 22 1 12 0 1 7 0 303 0 0 0 100 3 14 0 7 24 4 14 0 2 2 0 329 0 0 0 100 4 27 0 7 44 12 34 0 1 0 0 275 0 0 0 100 5 0 0 0 124 53 112 0 1 2 0 324 0 0 0 100 6 3 0 0 124 3 138 0 0 0 0 1106 0 0 0 100 7 13 0 0 28 2 18 0 4 1 0 21 0 0 0 100 March 10, 2026 at 10:42:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2340 200 74 0 1 0 0 0 0 0 0 100 1 0 0 38 244 103 6 0 1 4 0 266 0 0 0 100 2 0 0 231 12 1 10 0 0 6 0 294 0 0 0 100 3 0 0 0 46 2 4 0 0 0 0 300 0 0 0 100 4 0 0 7 66 9 30 0 1 0 0 272 0 0 0 100 5 0 0 0 147 52 105 0 0 1 0 301 0 0 0 100 6 0 0 0 80 3 66 1 0 0 0 1090 0 0 0 100 7 0 0 0 50 3 8 1 0 0 0 3 0 0 0 100 March 10, 2026 at 10:42:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2343 200 106 0 0 0 0 0 0 0 0 100 1 0 0 39 243 103 24 0 1 3 0 266 0 0 0 100 2 0 0 231 12 2 10 0 0 2 0 303 0 0 0 100 3 0 0 0 44 2 2 0 0 0 0 300 0 0 0 100 4 0 0 7 66 9 28 0 0 0 0 269 0 0 0 100 5 0 0 0 149 54 111 0 0 1 0 319 0 0 0 100 6 0 0 0 46 2 34 1 0 0 0 1092 0 0 0 100 7 0 0 0 45 1 4 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1386 0 195 2380 200 680 14 83 149 57 4053 1 2 0 97 1 358 0 57 295 105 527 7 68 98 43 1905 1 1 0 99 2 631 0 35 94 3 638 7 88 121 48 1814 1 1 0 98 3 1048 0 141 126 63 458 4 68 170 37 1401 1 1 0 98 4 4656 0 32 113 11 504 10 73 211 51 2443 1 2 0 96 5 12774 0 11 192 49 532 7 56 155 45 1815 4 2 0 93 6 3547 0 119 79 4 570 4 55 152 52 3170 2 2 0 96 7 1932 0 29 142 6 481 7 68 139 49 2214 3 1 0 97 March 10, 2026 at 10:42:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3198 0 6 2348 201 599 17 66 103 9 2178 3 2 0 95 1 3688 0 57 332 105 545 28 77 61 32 1902 5 1 0 94 2 856 0 2 148 45 566 15 66 53 18 1877 1 1 0 98 3 891 0 70 48 5 482 11 55 52 26 1585 1 1 0 98 4 611 0 7 65 4 437 15 60 54 10 1427 1 1 0 98 5 16857 0 14 52 3 334 12 34 46 10 1491 5 5 0 90 6 803 0 0 59 2 330 14 31 26 8 2919 2 1 0 97 7 3293 0 179 48 7 322 6 35 90 16 1584 1 1 0 98 March 10, 2026 at 10:42:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2380 200 118 2 0 0 0 10 0 1 0 99 1 2 0 18 292 106 14 0 0 0 0 279 0 0 0 100 2 0 0 0 183 51 109 0 1 1 0 294 0 0 0 100 3 0 0 42 78 3 24 0 1 2 0 300 0 1 0 99 4 0 0 469 38 17 18 0 0 2 0 263 0 0 0 100 5 26 0 0 91 6 18 0 0 0 0 16 0 0 0 100 6 0 0 0 83 3 38 0 1 0 0 1390 0 0 0 100 7 0 0 0 87 2 14 0 0 0 0 2 0 0 0 100 March 10, 2026 at 10:42:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2304 200 108 1 0 0 0 6 0 0 0 100 1 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 2 0 0 0 109 51 104 0 0 0 0 294 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 4 0 0 7 27 10 38 0 1 0 0 260 0 0 0 100 5 0 0 0 19 7 14 0 0 0 0 9 0 0 0 100 6 0 0 0 12 3 36 1 0 0 0 1391 0 0 0 100 7 0 0 0 11 1 6 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:42:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2309 202 106 0 0 0 0 1 0 0 0 100 1 0 0 18 208 103 4 0 0 0 0 266 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 294 0 0 0 100 3 0 0 0 8 2 4 0 0 0 0 300 0 0 0 100 4 0 0 7 18 3 16 0 0 0 0 260 0 0 0 100 5 0 0 0 17 6 12 0 0 0 0 8 0 0 0 100 6 0 0 0 12 3 36 1 0 1 0 1389 0 0 0 100 7 0 0 0 11 2 4 0 0 0 0 2 0 0 0 100 March 10, 2026 at 10:42:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32851 0 41 2519 202 1276 49 208 247 91 7019 12 10 0 78 1 3405 0 109 373 104 1209 31 198 195 64 3677 3 2 0 95 2 2521 0 197 142 15 1291 28 135 194 88 5817 4 2 0 94 3 627 0 5 193 75 1055 22 146 148 57 3224 2 1 0 97 4 1862 0 15 132 5 985 24 121 205 53 3845 3 2 0 95 5 2720 0 33 111 7 980 16 119 157 52 2577 3 2 0 95 6 1261 0 190 143 15 973 15 119 193 64 3831 4 2 0 95 7 11163 0 246 155 27 832 16 116 264 68 3584 3 4 0 93 March 10, 2026 at 10:42:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2317 200 106 0 1 3 0 13 0 0 0 100 1 25 0 101 210 102 6 0 2 3 0 275 0 0 0 99 2 0 0 0 24 1 6 0 1 0 0 310 0 0 0 100 3 27 0 0 33 8 23 0 3 4 0 323 0 0 0 100 4 24 0 7 31 3 25 0 1 4 0 292 0 0 0 100 5 3 0 0 26 2 12 0 3 1 0 8 0 0 0 100 6 1 0 0 26 3 45 1 4 1 0 1401 0 0 0 100 7 2 0 7 125 52 130 0 3 0 0 12 0 0 0 100 March 10, 2026 at 10:42:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2378 202 106 0 3 0 0 7 0 1 0 99 1 0 0 59 286 103 24 0 2 2 0 277 0 1 0 99 2 0 0 0 81 1 4 0 0 0 0 294 0 0 0 100 3 0 0 0 94 9 16 0 0 0 0 309 0 0 0 100 4 0 0 469 30 9 18 0 0 2 0 260 0 0 0 100 5 0 0 0 79 1 6 0 0 0 0 8 0 0 0 100 6 0 0 0 85 3 36 2 0 1 0 1390 0 0 0 100 7 0 0 0 183 51 110 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2307 200 122 0 1 0 0 0 0 0 0 100 1 0 0 18 208 103 4 0 0 0 0 267 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 3 0 0 0 22 9 16 0 0 0 0 329 0 0 0 100 4 0 0 7 19 4 17 0 1 0 0 260 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 15 4 38 1 0 1 0 1391 0 0 0 100 7 0 0 0 117 53 112 0 1 0 0 3 0 0 0 100 March 10, 2026 at 10:42:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8668 0 39 2502 202 1233 29 166 195 99 7061 6 3 0 91 1 2117 0 193 326 103 1205 35 180 112 91 4566 4 4 0 92 2 35076 0 143 124 2 1104 25 160 121 80 4465 13 8 0 80 3 3281 0 41 231 27 998 22 130 115 56 3560 3 1 0 95 4 1328 0 25 131 3 929 21 109 108 57 3522 2 2 0 96 5 1050 0 26 112 2 894 25 128 116 52 2735 2 1 0 97 6 792 0 19 116 4 641 16 86 103 43 3951 2 1 0 97 7 11026 0 366 140 33 762 15 90 228 65 4499 3 4 0 93 March 10, 2026 at 10:42:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2326 202 196 0 9 83 0 25 0 0 0 100 1 8 0 42 223 104 104 1 11 63 0 279 0 0 0 100 2 19 0 0 29 4 182 0 15 56 0 315 0 0 0 100 3 13 0 0 91 65 97 0 9 70 0 315 0 0 0 100 4 21 0 7 123 51 203 1 9 75 0 268 0 0 0 100 5 28 0 70 33 6 123 1 10 83 0 15 0 1 0 99 6 0 0 0 29 4 117 0 5 84 0 1398 0 1 0 99 7 0 0 0 32 4 110 0 6 79 0 23 0 0 0 100 March 10, 2026 at 10:42:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2307 200 102 0 0 0 0 0 0 0 0 100 1 0 0 18 212 102 6 0 1 1 0 266 0 0 0 100 2 0 0 0 9 1 24 0 2 1 0 294 0 0 0 100 3 0 0 0 12 3 4 0 0 0 0 300 0 0 0 100 4 0 0 7 114 53 110 0 1 0 0 263 0 0 0 100 5 0 0 0 31 7 24 0 0 4 0 9 0 0 0 100 6 0 0 14 14 4 39 1 0 6 0 1388 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:42:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2376 200 114 0 0 0 0 5 0 1 0 99 1 0 0 17 281 104 16 0 0 0 0 281 0 0 0 100 2 0 0 0 79 1 6 0 1 1 0 294 0 0 0 100 3 0 0 0 80 3 24 0 1 0 0 300 0 0 0 100 4 0 0 7 189 60 110 0 0 1 0 260 0 0 0 100 5 0 0 42 91 6 26 0 0 2 0 15 0 1 0 99 6 0 0 448 16 2 37 1 0 2 0 1387 0 1 0 99 7 0 0 0 83 2 14 0 0 0 0 2 0 0 0 100 March 10, 2026 at 10:42:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2386 0 41 2378 200 507 5 84 79 58 1857 1 2 0 97 1 1756 0 230 264 102 373 8 47 72 44 2000 2 1 0 97 2 234 0 20 77 2 429 5 60 58 48 1974 1 1 0 98 3 656 0 9 84 4 387 9 50 49 38 1306 1 1 0 99 4 316 0 13 175 52 411 3 43 33 30 2768 1 1 0 99 5 2774 0 12 165 10 324 5 44 57 30 1236 3 1 0 96 6 481 0 2 84 3 371 5 50 53 33 2640 1 1 0 98 7 7763 0 244 53 1 284 10 41 114 39 2044 2 3 0 95 March 10, 2026 at 10:42:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3635 0 85 2423 202 815 30 99 90 20 3043 3 2 0 95 1 2380 0 47 275 105 848 30 110 82 40 4239 6 1 0 93 2 1185 0 2 83 2 756 20 86 61 33 3167 3 1 0 96 3 720 0 7 78 3 786 19 85 66 33 2792 2 1 0 98 4 953 0 9 60 4 778 13 65 65 22 2555 3 1 0 96 5 33924 0 7 65 3 642 20 75 65 31 2249 9 6 0 84 6 887 0 14 106 21 667 24 63 45 16 3107 2 1 0 97 7 3471 0 181 104 33 566 12 65 71 31 2019 2 2 0 97 March 10, 2026 at 10:42:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 45 2384 205 115 0 6 69 0 8 0 1 0 99 1 3 0 17 281 103 99 0 9 64 0 268 0 0 0 100 2 0 0 0 180 1 289 0 9 47 0 294 0 0 0 100 3 0 0 0 147 65 86 0 8 76 0 300 0 0 0 100 4 0 0 7 88 4 104 0 7 74 0 263 0 0 0 100 5 0 0 0 79 0 123 0 8 70 0 0 0 0 0 100 6 0 0 462 22 4 140 2 10 72 0 1391 0 1 0 99 7 0 0 0 183 51 188 0 10 69 0 0 0 0 0 100 March 10, 2026 at 10:42:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2314 206 22 0 0 0 0 9 0 0 0 100 1 0 0 17 210 103 4 1 0 0 0 267 0 0 0 100 2 0 0 0 107 1 102 0 0 1 0 294 0 0 0 100 3 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 10 0 0 0 0 260 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 0 14 4 38 1 0 0 0 1389 0 0 0 100 7 0 0 0 111 52 106 0 0 0 0 2 0 0 0 100 March 10, 2026 at 10:43:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2322 206 94 0 1 0 0 15 0 0 0 100 1 0 0 18 212 105 16 0 0 0 0 281 0 0 0 100 2 0 0 0 47 1 42 0 0 0 0 294 0 0 0 100 3 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 4 0 0 7 21 10 12 0 0 1 0 260 0 0 0 100 5 0 0 0 7 0 6 0 0 0 0 7 0 0 0 100 6 0 0 0 14 4 58 1 1 0 0 1389 0 0 0 100 7 0 0 0 113 52 110 0 0 0 0 1 0 0 0 100 March 10, 2026 at 10:43:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7841 0 133 2449 239 1054 30 154 192 76 3734 3 3 0 94 1 8597 0 69 382 103 903 21 135 226 83 3988 6 2 0 91 2 37492 0 349 156 2 744 23 112 116 68 3908 14 8 0 78 3 1365 0 15 134 3 1056 16 116 120 77 3173 2 2 0 97 4 1622 0 33 167 4 842 21 117 99 62 3386 3 2 0 96 5 1110 0 194 95 2 777 10 93 92 61 4664 2 2 0 97 6 1360 0 45 131 7 810 22 94 87 67 3877 2 2 0 97 7 3809 0 5 149 18 663 16 76 118 52 4679 3 2 0 94 March 10, 2026 at 10:43:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2366 250 110 0 2 0 0 8 0 0 0 100 1 1 0 18 221 102 6 0 2 0 0 14 0 0 0 100 2 4 0 14 21 2 13 1 1 0 0 573 0 0 0 100 3 0 0 0 25 3 8 0 1 3 0 310 0 0 0 100 4 25 0 7 137 5 127 0 0 1 0 291 0 0 0 100 5 30 0 7 28 4 24 1 3 2 0 25 0 0 0 100 6 26 0 70 17 3 40 2 1 6 0 1408 0 1 0 99 7 0 0 0 26 2 12 0 2 6 0 13 0 0 0 100 March 10, 2026 at 10:43:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2435 251 204 0 10 58 0 1 0 1 0 99 1 0 0 7 282 102 107 0 8 54 0 1 0 0 0 100 2 0 0 14 82 3 202 0 11 54 0 559 0 0 0 100 3 0 0 0 155 69 81 1 7 67 0 300 0 0 0 100 4 0 0 7 194 4 204 0 9 69 0 263 0 0 0 100 5 0 0 0 94 7 90 0 7 43 0 9 0 0 0 100 6 0 0 42 87 5 136 2 9 69 0 1390 0 1 0 99 7 0 0 462 25 4 85 0 6 49 0 2 0 0 0 100 March 10, 2026 at 10:43:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2355 250 100 0 0 0 0 0 0 0 0 100 1 0 0 4 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 14 7 2 4 0 0 1 0 561 0 0 0 100 3 0 0 0 12 3 6 0 0 0 0 300 0 0 0 100 4 0 0 7 118 3 116 0 0 0 0 260 0 0 0 100 5 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 6 0 0 0 14 3 38 1 0 1 0 1390 0 0 0 100 7 0 0 0 11 2 26 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:43:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10466 0 56 2519 235 1353 46 257 229 81 6000 6 5 0 90 1 40483 0 90 405 102 1111 56 197 170 67 6110 12 9 0 79 2 1379 0 28 146 16 1103 33 177 97 57 4211 3 2 0 96 3 1507 0 11 131 6 948 33 156 108 63 3830 2 2 0 96 4 2620 0 211 175 9 1080 17 130 113 54 3641 3 2 0 96 5 3685 0 425 96 8 939 34 140 114 82 4707 4 2 0 94 6 1962 0 23 145 3 1032 27 144 104 82 6297 5 2 0 93 7 1633 0 16 131 3 972 19 145 162 53 3301 2 2 0 96 March 10, 2026 at 10:43:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 3 2319 201 128 1 6 2 0 22 0 0 0 100 1 29 0 17 233 107 24 0 2 5 0 26 0 0 0 100 2 10 0 14 22 2 12 0 2 3 0 577 0 0 0 100 3 8 0 0 126 53 109 1 2 1 0 312 0 0 0 100 4 0 0 77 19 4 14 0 3 5 0 261 0 1 0 99 5 0 0 0 20 1 2 0 0 0 0 22 0 0 0 100 6 0 0 0 34 3 47 0 1 0 0 1425 0 0 0 100 7 19 0 7 32 5 22 1 1 5 0 20 0 0 0 100 March 10, 2026 at 10:43:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2380 202 110 0 1 2 0 1 0 0 0 100 1 0 0 4 290 107 32 0 1 0 0 9 0 0 0 100 2 0 0 14 79 2 4 0 0 1 0 560 0 0 0 100 3 0 0 0 182 52 104 0 0 0 0 300 0 0 0 100 4 0 0 49 80 3 12 0 0 2 0 263 0 1 0 99 5 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 96 5 47 1 0 2 0 1391 0 0 0 100 7 0 0 462 21 3 10 0 0 2 0 2 0 0 0 100 March 10, 2026 at 10:43:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2309 201 178 0 4 59 0 0 0 0 0 100 1 0 0 3 219 106 112 0 10 62 0 8 0 0 0 100 2 0 0 14 10 2 195 0 12 38 0 560 0 0 0 100 3 0 0 0 83 71 105 0 9 70 0 300 0 0 0 100 4 0 0 7 15 5 117 0 12 59 0 260 0 0 0 100 5 0 0 0 7 1 100 0 10 55 0 0 0 0 0 100 6 0 0 0 112 49 233 1 10 77 0 1390 0 0 0 100 7 0 0 0 11 2 91 0 7 68 0 0 0 0 0 100 March 10, 2026 at 10:43:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2412 0 21 2332 204 214 6 18 54 24 2095 1 1 0 98 1 45 0 5 249 110 124 2 22 7 14 294 0 0 0 100 2 23 0 17 40 3 108 0 18 13 12 801 0 0 0 100 3 45 0 10 36 3 96 1 16 15 18 532 0 0 0 100 4 22 0 9 36 3 114 0 19 18 19 482 0 0 0 100 5 788 0 126 24 2 120 1 17 10 23 352 0 1 0 99 6 80 0 19 76 24 199 2 24 13 19 1688 0 0 0 99 7 31 0 2 101 33 183 0 19 15 20 299 0 0 0 100 March 10, 2026 at 10:43:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7357 0 128 2414 211 1011 34 158 159 41 4098 5 3 0 91 1 9344 0 100 450 106 1220 47 172 171 49 3952 5 3 0 93 2 2732 0 202 104 5 1141 33 150 111 62 4334 3 2 0 95 3 34690 0 14 201 40 1103 27 107 82 51 5977 12 8 0 80 4 1186 0 12 178 7 1009 20 120 94 43 3514 2 1 0 97 5 2619 0 196 91 2 784 19 87 106 41 3480 3 2 0 95 6 974 0 77 108 5 957 18 111 79 55 4535 3 2 0 95 7 829 0 11 110 5 878 24 100 134 41 3714 2 1 0 97 March 10, 2026 at 10:43:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2378 200 8 0 0 0 0 0 0 0 0 100 1 0 0 3 286 103 8 0 1 0 0 1 0 0 0 100 2 2 0 14 79 2 6 0 1 2 0 560 0 0 0 100 3 0 0 0 182 52 104 0 1 0 0 21 0 0 0 100 4 0 0 7 184 3 110 0 0 0 0 562 0 0 0 100 5 0 0 0 83 2 4 0 0 0 0 1 0 0 0 100 6 26 0 42 94 10 52 1 1 2 0 1406 0 1 0 99 7 0 0 462 21 4 8 0 0 2 0 2 0 0 0 100 March 10, 2026 at 10:43:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2304 200 8 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 2 0 0 14 9 3 10 0 0 0 0 569 0 0 0 100 3 0 0 0 110 51 104 0 0 0 0 0 0 0 0 100 4 0 0 7 112 3 130 0 1 0 0 561 0 0 0 100 5 0 0 0 9 2 8 0 0 0 0 19 0 0 0 100 6 0 0 0 23 8 47 1 0 1 0 1406 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:43:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2309 200 164 0 7 97 0 0 0 0 0 100 1 0 0 4 212 103 84 0 5 77 0 1 0 0 0 100 2 0 0 14 13 4 202 0 9 67 0 560 0 0 0 100 3 0 0 0 168 110 237 0 5 81 0 0 0 0 0 100 4 0 0 7 45 4 123 0 5 68 0 560 0 0 0 100 5 0 0 0 9 2 139 0 8 80 0 0 0 0 0 100 6 0 0 0 27 11 135 1 4 82 0 1405 0 0 0 99 7 0 0 0 18 4 94 0 4 67 0 2 0 0 0 100 March 10, 2026 at 10:43:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11048 0 30 2417 200 1085 34 181 218 66 5373 6 4 0 90 1 8883 0 361 374 102 1147 35 174 206 96 4011 4 3 0 93 2 35778 0 396 111 3 1096 36 177 135 83 6096 13 8 0 79 3 1173 0 24 186 20 989 32 146 120 66 3132 2 1 0 97 4 2238 0 25 127 7 972 22 126 156 64 5284 5 2 0 93 5 600 0 7 135 11 784 22 104 97 45 2411 2 1 0 97 6 3141 0 36 269 27 892 19 110 101 50 4188 4 1 0 94 7 768 0 6 123 2 684 27 86 102 38 4382 2 2 0 96 March 10, 2026 at 10:43:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 3 2323 203 85 0 2 1 0 25 0 0 0 100 1 0 0 17 225 105 16 0 0 1 0 32 0 0 0 100 2 25 0 70 14 1 14 0 2 7 0 307 0 0 0 99 3 23 0 21 66 3 52 0 2 1 0 280 0 0 0 100 4 1 0 7 32 9 14 0 1 2 0 580 0 0 0 100 5 11 0 0 24 2 14 0 2 6 0 22 0 0 0 100 6 4 0 0 70 24 103 2 4 0 0 1408 0 0 0 100 7 35 0 0 92 34 90 0 3 7 0 16 0 0 0 100 March 10, 2026 at 10:43:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2361 200 108 0 0 0 0 0 0 0 0 100 1 0 0 3 263 102 2 0 0 0 0 0 0 0 0 100 2 0 0 35 63 1 8 0 0 3 0 294 0 1 0 99 3 0 0 14 65 2 6 0 1 0 0 266 0 0 0 100 4 0 0 7 67 3 14 0 1 0 0 562 0 0 0 100 5 0 0 0 62 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 70 4 39 0 0 2 0 1396 0 0 0 100 7 0 0 350 128 58 144 0 1 3 0 9 0 0 0 100 March 10, 2026 at 10:43:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2318 200 108 0 0 0 0 0 0 0 0 100 1 0 0 3 224 102 2 0 0 0 0 0 0 0 0 100 2 0 0 0 25 1 4 0 0 0 0 294 0 0 0 100 3 0 0 14 24 2 4 0 0 0 0 266 0 0 0 100 4 0 0 7 28 3 10 0 0 0 0 560 0 0 0 100 5 0 0 0 23 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 28 3 37 1 0 0 0 1398 0 0 0 100 7 0 0 112 125 59 122 0 1 0 0 11 0 0 0 100 March 10, 2026 at 10:43:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3941 0 28 2422 200 1217 31 168 207 53 4362 3 3 0 94 1 42699 0 638 258 102 1147 35 143 222 84 4839 11 10 0 79 2 6245 0 51 119 2 1286 19 139 215 96 5988 4 3 0 93 3 702 0 31 200 54 1073 23 133 150 80 4397 2 2 0 96 4 809 0 16 112 3 1141 18 131 181 70 3942 2 1 0 97 5 1702 0 21 176 2 904 24 110 142 43 2833 2 1 0 97 6 2815 0 26 170 4 788 20 92 145 51 3882 3 1 0 96 7 939 0 14 250 59 1069 16 97 119 49 3082 2 1 0 96 March 10, 2026 at 10:43:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 321 0 4 2329 202 226 6 24 20 0 449 1 1 0 99 1 193 0 31 232 103 135 10 24 16 2 412 0 0 0 99 2 693 0 70 19 1 143 8 23 59 5 524 1 1 0 99 3 291 0 14 25 3 74 4 15 22 1 693 1 0 0 99 4 606 0 14 51 4 109 9 22 42 5 881 0 0 0 99 5 748 0 0 37 7 138 3 21 48 3 617 2 0 0 98 6 632 0 0 34 4 96 4 10 43 1 1901 2 0 0 97 7 367 0 0 135 54 216 6 20 28 5 732 1 0 0 99 March 10, 2026 at 10:43:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2374 200 116 0 0 0 0 5 0 0 0 99 1 0 0 3 288 106 20 0 0 0 0 21 0 0 0 100 2 0 0 42 73 0 4 0 1 2 0 0 0 0 0 100 3 0 0 14 80 2 4 0 1 0 0 266 0 0 0 100 4 0 0 7 93 8 12 0 0 0 0 562 0 0 0 100 5 0 0 0 91 7 18 0 0 0 0 16 0 0 0 100 6 0 0 0 83 3 36 0 0 0 0 1396 0 0 0 100 7 0 0 462 121 53 114 0 0 2 0 308 0 0 0 100 March 10, 2026 at 10:43:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2302 200 108 0 0 0 0 0 0 0 0 100 1 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 20 0 1 1 0 0 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 4 0 0 7 12 3 10 0 0 0 0 560 0 0 0 100 5 0 0 0 19 7 14 0 0 0 0 9 0 0 0 100 6 0 0 0 14 4 38 1 0 0 0 1397 0 0 0 100 7 0 0 0 115 54 110 0 0 0 0 296 0 0 0 100 March 10, 2026 at 10:43:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2305 200 108 0 0 0 0 0 0 0 0 100 1 0 0 4 208 102 2 0 0 0 0 0 0 0 0 100 2 0 0 0 7 0 2 0 0 1 0 0 0 0 0 100 3 0 0 14 8 2 24 0 1 0 0 266 0 0 0 100 4 0 0 7 12 3 10 0 1 0 0 560 0 0 0 100 5 0 0 0 23 9 18 0 0 0 0 12 0 0 0 100 6 0 0 0 12 3 36 1 0 1 0 1396 0 0 0 100 7 0 0 0 113 53 108 0 0 1 0 308 0 0 0 100 March 10, 2026 at 10:43:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1544 0 144 2422 204 1187 37 193 157 56 3054 2 3 0 95 1 834 0 77 410 145 1004 23 183 188 51 3432 2 2 0 96 2 10954 0 304 108 3 974 16 137 248 75 4022 3 4 0 93 3 38491 0 31 193 61 1030 31 161 286 77 4472 10 8 0 82 4 4275 0 237 183 6 911 23 146 198 87 3862 6 2 0 92 5 1621 0 30 129 6 1040 23 134 166 80 3498 5 2 0 93 6 1149 0 12 129 6 958 31 137 173 54 5159 2 1 0 97 7 4546 0 41 200 11 824 16 92 206 34 5013 5 2 0 93 March 10, 2026 at 10:43:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2317 200 108 0 0 0 0 0 0 0 0 100 1 0 0 73 222 107 12 0 0 6 0 2 0 0 0 100 2 0 0 0 110 47 96 0 1 0 0 0 0 0 0 100 3 2 0 14 21 2 6 0 0 0 0 268 0 0 0 100 4 26 0 7 35 8 40 0 1 0 0 571 0 0 0 100 5 0 0 7 19 1 4 0 1 0 0 0 0 0 0 100 6 0 0 0 24 3 36 0 0 1 0 1391 0 0 0 100 7 0 0 0 24 3 10 0 0 6 0 301 0 0 0 100 March 10, 2026 at 10:43:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2374 200 118 0 0 0 0 5 0 1 0 99 1 0 0 45 280 104 14 0 1 2 0 13 0 1 0 99 2 0 0 0 177 50 102 0 0 0 0 0 0 0 0 100 3 0 0 14 80 2 4 0 0 0 0 266 0 0 0 100 4 0 0 7 103 14 24 0 0 1 0 569 0 0 0 100 5 0 0 0 81 1 30 0 2 0 0 5 0 0 0 100 6 0 0 0 84 3 38 1 1 0 0 1387 0 0 0 100 7 0 0 462 23 4 20 0 0 2 0 301 0 0 0 100 March 10, 2026 at 10:43:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2304 200 108 0 0 0 0 0 0 0 0 100 1 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 4 0 0 7 22 8 20 0 0 0 0 568 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 36 1 0 1 0 1390 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 301 0 0 0 100 March 10, 2026 at 10:43:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4240 0 150 2442 200 1156 31 164 120 53 4584 7 3 0 90 1 1596 0 68 344 102 1148 40 177 152 67 3284 2 2 0 96 2 11850 0 192 211 37 1115 38 160 221 71 5238 7 4 0 90 3 38940 0 205 109 5 950 35 128 144 73 4806 11 8 0 81 4 2047 0 151 133 18 1075 28 122 89 93 5758 2 2 0 96 5 1369 0 10 119 4 850 18 115 94 76 3466 3 2 0 96 6 1764 0 25 174 4 917 25 118 109 53 4962 2 2 0 96 7 1189 0 4 114 5 887 24 103 120 49 3237 3 1 0 96 March 10, 2026 at 10:43:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2325 201 283 0 6 72 0 20 0 0 0 100 1 27 0 87 228 107 103 0 9 89 0 18 0 1 0 99 2 0 0 0 121 50 212 0 6 79 0 11 0 0 0 100 3 0 0 0 80 59 126 0 8 81 0 17 0 0 0 100 4 17 0 21 33 7 122 0 11 87 0 847 0 0 0 100 5 0 0 0 26 2 94 0 9 65 0 4 0 0 0 100 6 6 0 0 30 3 121 0 9 79 0 1412 0 0 0 100 7 13 0 7 27 3 118 0 13 65 0 321 0 0 0 100 March 10, 2026 at 10:43:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2359 200 94 0 3 0 0 0 0 0 0 100 1 0 0 38 279 107 22 0 0 3 0 10 0 1 0 99 2 0 0 0 170 50 110 0 1 0 0 0 0 0 0 100 3 0 0 0 63 2 2 0 0 0 0 0 0 0 0 100 4 0 0 21 67 4 12 0 1 0 0 828 0 0 0 100 5 0 0 0 64 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 67 3 36 1 0 0 0 1389 0 0 0 100 7 0 0 350 22 4 18 0 0 3 0 304 0 0 0 100 March 10, 2026 at 10:43:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2323 201 134 0 1 0 0 10 0 0 0 100 1 0 0 4 250 110 36 0 0 0 0 25 0 0 0 100 2 0 0 0 127 51 110 0 1 0 0 6 0 0 0 100 3 0 0 0 24 2 2 0 0 0 0 0 0 0 0 100 4 0 0 21 33 9 12 0 0 0 0 827 0 0 0 100 5 0 0 0 23 1 8 0 0 0 0 6 0 0 0 100 6 0 0 0 28 3 36 1 0 0 0 1391 0 0 0 100 7 0 0 112 17 3 18 0 0 1 0 300 0 0 0 100 March 10, 2026 at 10:43:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 620 0 25 2394 202 614 11 76 63 45 1449 1 1 0 98 1 1138 0 168 291 107 549 10 65 58 52 2541 1 2 0 98 2 33508 0 47 179 45 481 10 64 67 43 4427 10 6 0 84 3 2658 0 17 100 8 463 10 62 97 42 1662 1 1 0 98 4 5429 0 322 63 5 412 7 52 115 60 2992 1 2 0 97 5 4812 0 33 149 3 313 8 53 85 45 1933 3 1 0 95 6 408 0 6 91 4 430 6 54 64 74 2642 1 1 0 99 7 242 0 9 96 5 383 6 46 40 46 1784 1 0 0 99 March 10, 2026 at 10:43:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1065 0 3 2349 201 543 9 63 63 18 1228 2 1 0 96 1 3714 0 63 325 104 448 12 41 80 16 1133 3 1 0 96 2 1356 0 78 39 1 326 5 38 52 11 1375 1 3 0 96 3 1318 0 178 43 6 399 9 32 60 16 1363 3 1 0 96 4 2837 0 26 158 52 504 7 44 47 24 2853 2 1 0 96 5 2938 0 2 49 2 253 9 33 74 10 1523 1 1 0 98 6 534 0 0 52 3 353 6 24 60 16 2551 2 1 0 98 7 728 0 0 58 3 410 13 38 60 16 1444 1 1 0 99 March 10, 2026 at 10:43:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2383 200 272 0 9 63 0 0 0 1 0 99 1 26 0 7 307 108 105 0 2 69 0 10 0 0 0 100 2 0 0 42 80 1 108 0 6 78 0 0 0 1 0 99 3 0 0 0 138 54 88 0 7 55 0 1 0 0 0 100 4 2 0 21 188 55 197 0 8 58 0 828 0 0 0 100 5 0 0 0 82 2 103 0 5 63 0 0 0 0 0 100 6 0 0 0 89 5 130 1 7 61 0 1391 0 0 0 100 7 0 0 462 29 6 99 0 5 58 0 305 0 0 0 100 March 10, 2026 at 10:43:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2303 200 100 0 0 0 0 0 0 0 0 100 1 0 0 4 226 107 20 0 0 0 0 9 0 0 0 100 2 0 0 0 9 0 4 0 0 1 0 0 0 0 0 100 3 0 0 0 10 3 26 0 1 0 0 1 0 0 0 100 4 0 0 21 112 54 112 0 0 0 0 827 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 36 1 0 2 0 1390 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 300 0 0 0 100 March 10, 2026 at 10:43:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2306 200 112 1 0 0 0 18 0 0 0 100 1 0 0 3 229 108 26 0 0 0 0 15 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 0 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 21 117 59 112 0 0 0 0 825 0 0 0 100 5 0 0 0 7 1 6 0 0 0 0 8 0 0 0 100 6 0 0 0 12 3 36 1 0 0 0 1390 0 0 0 100 7 0 0 0 17 4 14 0 0 0 0 301 0 0 0 100 March 10, 2026 at 10:43:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35341 0 26 2430 202 935 27 148 112 69 4912 13 8 0 78 1 2727 0 374 292 108 968 21 144 116 72 3725 2 2 0 95 2 1886 0 34 198 2 769 16 100 66 36 2636 2 2 0 96 3 2550 0 49 180 4 666 13 87 103 54 3985 3 2 0 95 4 11992 0 327 109 13 900 25 99 233 75 6501 4 4 0 91 5 6418 0 11 188 4 880 11 120 201 76 3543 4 2 0 94 6 1237 0 6 190 43 962 19 121 105 84 3899 2 1 0 97 7 1213 0 19 117 6 841 14 108 133 67 2587 2 1 0 97 March 10, 2026 at 10:43:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2317 200 44 0 3 0 0 0 0 0 0 100 1 0 0 3 225 102 4 0 0 0 0 0 0 0 0 100 2 0 0 0 16 0 0 0 0 0 0 0 0 0 0 100 3 0 0 70 28 2 18 0 0 6 0 0 0 0 0 100 4 2 0 28 72 4 66 0 2 1 0 830 0 0 0 100 5 0 0 0 20 1 22 0 1 0 0 0 0 0 0 100 6 0 0 0 125 53 136 1 0 1 0 1395 0 0 0 100 7 26 0 0 40 10 26 0 1 6 0 311 0 0 0 100 March 10, 2026 at 10:43:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2381 200 287 0 12 60 0 0 0 1 0 99 1 0 0 4 278 101 95 0 7 58 0 0 0 0 0 100 2 0 0 0 79 0 75 0 5 59 0 0 0 0 0 100 3 0 0 42 130 56 74 0 7 67 0 0 0 1 0 99 4 2 0 21 91 5 106 0 9 60 0 828 0 0 0 100 5 0 0 0 79 1 101 0 10 53 0 0 0 0 0 100 6 0 0 0 184 53 223 1 7 66 0 1396 0 0 0 100 7 0 0 462 32 9 101 0 5 58 0 309 0 0 0 100 March 10, 2026 at 10:43:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2302 200 110 0 1 0 0 0 0 0 0 100 1 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 21 12 4 12 0 1 0 0 827 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 6 0 0 0 111 53 156 0 1 1 0 1397 0 0 0 100 7 0 0 0 25 9 18 0 0 0 0 310 0 0 0 100 March 10, 2026 at 10:43:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3474 0 28 2501 213 1303 39 190 157 79 3764 5 2 0 93 1 2003 0 59 348 116 1167 40 177 118 66 6815 3 2 0 95 2 1664 0 186 136 2 1227 27 163 102 59 3240 4 2 0 94 3 1947 0 219 100 2 1040 32 126 114 74 3684 2 2 0 96 4 39249 0 169 186 9 1039 41 141 171 64 5300 13 8 0 79 5 3085 0 38 116 3 856 21 115 146 57 3958 3 2 0 95 6 8032 0 122 186 30 1045 19 118 170 72 6141 4 3 0 93 7 3876 0 21 144 9 1010 24 125 132 75 3948 5 2 0 93 March 10, 2026 at 10:43:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2321 202 12 0 1 0 0 16 0 0 0 100 1 0 0 18 317 151 106 0 2 1 0 13 0 0 0 100 2 40 0 0 34 8 22 0 1 0 0 48 0 0 0 100 3 27 0 70 15 3 11 0 3 7 0 15 0 1 0 99 4 3 0 14 22 2 12 0 2 1 0 580 0 0 0 100 5 0 0 7 29 5 17 0 2 4 0 276 0 0 0 100 6 12 0 7 125 4 146 0 4 0 0 1420 0 0 0 100 7 0 0 0 27 2 13 1 1 6 0 320 0 0 0 100 March 10, 2026 at 10:43:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2340 201 32 0 1 0 0 0 0 0 0 100 1 0 0 4 342 151 102 0 0 0 0 0 0 0 0 100 2 0 0 0 55 8 20 0 0 0 0 18 0 0 0 100 3 0 0 7 43 2 4 0 0 4 0 0 0 0 0 100 4 0 0 14 43 2 6 0 0 0 0 566 0 0 0 100 5 0 0 7 46 4 14 0 0 0 0 282 0 0 0 100 6 0 0 0 148 3 138 1 0 1 0 1390 0 0 0 100 7 0 0 231 12 1 12 0 2 5 0 300 0 0 0 100 March 10, 2026 at 10:43:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2350 202 284 0 13 71 0 0 0 0 0 100 1 0 0 7 349 152 214 0 5 81 0 1 0 0 0 100 2 0 0 0 61 8 104 0 4 72 0 9 0 0 0 100 3 0 0 35 101 56 91 0 6 77 0 0 0 0 0 100 4 0 0 14 50 3 97 0 6 74 0 567 0 0 0 100 5 0 0 7 51 4 92 0 9 66 0 260 0 0 0 100 6 0 0 0 57 4 119 1 6 70 0 1389 0 0 0 99 7 0 0 231 25 4 113 0 9 73 0 302 0 0 0 100 March 10, 2026 at 10:43:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2363 0 35 2393 204 616 5 97 77 57 1926 1 1 0 98 1 18156 0 52 422 142 523 8 67 80 51 1415 6 3 0 92 2 596 0 18 108 12 467 5 68 101 47 2788 1 1 0 98 3 1223 0 117 69 4 427 4 55 53 45 1227 1 1 0 99 4 213 0 30 90 6 408 6 71 42 50 2085 1 1 0 98 5 1059 0 199 72 6 380 6 49 78 42 1645 1 1 0 98 6 3297 0 6 91 4 400 10 56 90 57 5440 2 2 0 96 7 4973 0 144 71 1 401 9 58 96 63 2088 1 3 0 96 March 10, 2026 at 10:43:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2891 0 5 2370 203 798 32 90 74 22 2914 2 2 0 96 1 18428 0 59 259 102 775 27 96 44 18 2666 6 5 0 89 2 943 0 2 109 10 810 22 90 72 18 2134 2 1 0 98 3 3332 0 12 209 27 771 24 83 83 19 1985 4 1 0 95 4 1076 0 85 91 23 582 10 57 63 16 2563 1 1 0 97 5 374 0 7 57 4 576 14 51 33 15 1916 2 1 0 98 6 1393 0 0 64 4 490 11 40 79 12 3700 2 1 0 96 7 3487 0 180 50 3 498 16 52 106 13 1984 3 1 0 95 March 10, 2026 at 10:43:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2380 203 6 0 0 0 0 0 0 0 0 100 1 0 0 465 215 101 4 0 0 2 0 0 0 0 0 100 2 0 0 0 81 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 188 12 110 0 6 1 0 0 0 0 0 100 4 2 0 56 163 34 114 0 7 2 0 565 0 1 0 99 5 26 0 7 108 16 36 0 1 0 0 272 0 0 0 100 6 0 0 0 82 2 34 1 0 1 0 1396 0 0 0 100 7 0 0 0 82 1 5 1 0 0 0 300 0 0 0 100 March 10, 2026 at 10:43:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2306 202 4 0 0 0 0 0 0 0 0 100 1 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 114 3 108 0 3 0 0 0 0 0 0 100 4 0 0 14 9 2 6 0 1 0 0 566 0 0 0 100 5 0 0 7 80 36 76 0 2 0 0 269 0 0 0 100 6 0 0 0 52 23 78 1 1 1 0 1396 0 0 0 100 7 0 0 0 13 3 8 0 1 1 0 302 0 0 0 100 March 10, 2026 at 10:43:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2312 203 179 0 9 57 0 1 0 0 0 100 1 0 0 3 207 101 99 0 5 79 0 0 0 0 0 100 2 0 0 0 9 1 100 0 5 98 0 0 0 0 0 100 3 0 0 0 148 66 162 0 9 70 0 0 0 0 0 100 4 0 0 14 37 14 121 0 9 71 0 567 0 0 0 100 5 0 0 7 22 9 129 0 6 70 0 270 0 0 0 100 6 0 0 0 110 32 238 1 7 87 0 1396 0 0 0 100 7 0 0 0 14 3 90 0 5 83 0 300 0 0 0 100 March 10, 2026 at 10:43:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7523 0 42 2427 203 1178 26 164 164 70 6307 5 3 0 92 1 3923 0 82 388 104 1065 34 157 145 60 5308 4 2 0 93 2 1712 0 27 140 2 996 31 139 118 59 3552 4 2 0 95 3 2572 0 26 191 3 959 28 127 130 56 3094 3 1 0 96 4 3549 0 37 158 15 972 30 117 117 70 3583 3 1 0 95 5 3050 0 200 141 14 1018 23 130 115 76 4038 3 2 0 95 6 35300 0 308 128 3 896 33 102 96 58 4916 10 8 0 82 7 5447 0 137 180 38 1026 20 114 161 83 4559 3 3 0 94 March 10, 2026 at 10:43:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 74 2312 203 124 0 0 6 0 34 0 1 0 99 1 40 0 17 232 107 42 0 1 9 0 32 0 0 0 100 2 3 0 7 23 2 15 0 3 5 0 15 0 0 0 100 3 0 0 0 30 3 13 0 3 0 0 18 0 0 0 100 4 4 0 14 29 9 12 0 2 4 0 577 0 0 0 100 5 12 0 7 22 2 16 0 2 2 0 288 0 0 0 100 6 20 0 1 24 3 41 1 2 2 0 1392 0 0 0 100 7 3 0 0 126 52 119 0 3 0 0 307 0 0 0 100 March 10, 2026 at 10:43:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 46 2383 213 104 0 6 2 0 0 0 1 0 99 1 0 0 465 273 121 64 0 4 2 0 8 0 0 0 100 2 0 0 0 97 8 22 0 2 0 0 0 0 0 0 100 3 0 0 0 88 2 12 0 1 0 0 21 0 0 0 100 4 0 0 14 83 3 8 0 0 0 0 567 0 0 0 100 5 0 0 7 82 3 8 0 0 0 0 261 0 0 0 100 6 0 0 0 88 4 40 1 0 2 0 1381 0 0 0 100 7 0 0 0 119 18 61 0 4 0 0 297 0 0 0 100 March 10, 2026 at 10:43:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2305 201 124 0 2 0 0 0 0 0 0 100 1 0 0 3 223 109 16 0 0 0 0 11 0 0 0 100 2 0 0 0 85 39 78 0 0 0 0 0 0 0 0 100 3 0 0 0 36 12 32 0 1 0 0 0 0 0 0 100 4 0 0 14 11 3 8 0 0 0 0 565 0 0 0 100 5 0 0 7 10 3 8 0 0 0 0 261 0 0 0 100 6 0 0 0 12 3 36 1 0 0 0 1380 0 0 0 100 7 0 0 0 14 2 8 1 0 1 0 300 0 0 0 100 March 10, 2026 at 10:43:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 42589 0 18 2443 203 1370 46 199 277 81 5269 12 10 0 79 1 7731 0 81 399 110 1229 36 164 257 65 4301 4 3 0 93 2 2377 0 134 110 3 1272 29 160 204 79 5383 4 2 0 94 3 2804 0 214 235 79 1126 25 151 185 83 4194 6 3 0 92 4 1101 0 140 127 15 953 20 119 154 80 3339 2 1 0 96 5 914 0 40 147 8 929 15 119 178 50 3369 2 2 0 96 6 3943 0 197 193 20 967 15 110 159 48 3943 3 2 0 95 7 1565 0 9 121 5 983 16 103 192 70 4508 2 2 0 96 March 10, 2026 at 10:43:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2317 201 108 0 1 2 0 4 0 0 0 100 1 0 0 17 223 103 30 0 2 13 0 11 0 0 0 100 2 1 0 0 24 2 6 0 1 2 0 17 0 0 0 100 3 19 0 70 26 3 19 0 1 6 0 6 0 0 0 100 4 21 0 21 23 3 16 0 2 2 0 577 0 0 0 100 5 22 0 7 21 2 10 0 2 2 0 268 0 0 0 100 6 27 0 0 115 48 130 1 2 3 0 1416 0 0 0 99 7 0 0 0 46 12 30 0 2 0 0 317 0 0 0 100 March 10, 2026 at 10:43:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2310 200 110 0 0 0 0 3 0 0 0 100 1 0 0 17 217 104 18 0 0 4 0 18 0 0 0 100 2 0 0 0 11 1 24 0 1 0 0 0 0 0 0 100 3 0 0 14 20 2 12 0 0 4 0 1 0 0 0 100 4 0 0 14 22 8 10 0 1 1 0 566 0 0 0 100 5 0 0 7 12 2 12 0 1 0 0 270 0 0 0 100 6 0 0 0 30 9 52 1 0 1 0 1397 0 0 0 100 7 0 0 0 119 53 112 0 1 0 0 302 0 0 0 100 March 10, 2026 at 10:43:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2382 209 105 0 5 0 0 0 0 0 0 100 1 0 0 480 268 130 65 0 5 1 0 1 0 0 0 100 2 0 0 0 79 1 8 0 2 0 0 0 0 0 0 100 3 0 0 0 84 1 12 0 1 1 0 0 0 0 0 100 4 0 0 14 79 3 8 0 0 0 0 567 0 0 0 100 5 0 0 7 76 2 6 0 0 0 0 260 0 0 0 100 6 0 0 0 91 9 48 0 0 0 0 1394 0 0 0 100 7 0 0 0 113 15 39 0 1 2 0 300 0 0 0 100 March 10, 2026 at 10:43:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3399 0 146 2421 213 385 5 53 79 31 1539 3 2 0 95 1 6942 0 38 340 122 491 13 76 125 45 2170 2 2 0 96 2 3082 0 193 70 7 431 5 69 66 60 1914 1 1 0 98 3 302 0 26 84 11 420 5 58 55 45 1381 1 1 0 99 4 421 0 22 64 5 309 5 40 60 31 3398 1 1 0 99 5 214 0 18 56 2 356 8 59 52 40 1380 0 0 0 99 6 1079 0 6 89 11 356 9 44 56 27 2732 2 1 0 97 7 145 0 25 72 5 310 3 46 40 22 1407 1 2 0 98 March 10, 2026 at 10:43:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33513 0 83 2381 201 873 44 166 52 30 3587 10 8 0 82 1 1289 0 48 363 103 924 38 152 145 31 2583 2 1 0 97 2 4220 0 292 55 3 756 36 115 181 29 2721 2 2 0 96 3 5079 0 17 145 57 780 28 108 215 43 2272 5 2 0 93 4 247 0 22 105 15 816 23 96 116 36 2539 3 1 0 96 5 1292 0 11 86 3 812 25 96 150 37 3415 2 1 0 97 6 1474 0 8 92 2 722 18 80 179 30 3462 2 1 0 96 7 924 0 3 154 43 614 14 81 137 25 1938 1 1 0 98 March 10, 2026 at 10:43:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 45 2416 244 107 0 3 2 0 300 0 1 0 99 1 0 0 466 294 102 88 0 3 2 0 0 0 0 0 100 2 0 0 0 81 2 4 0 0 0 0 0 0 0 0 100 3 26 0 0 90 6 10 0 0 0 0 8 0 0 0 100 4 2 0 14 89 2 14 0 0 0 0 567 0 0 0 100 5 0 0 7 82 3 8 0 0 0 0 263 0 0 0 100 6 0 0 0 86 3 38 1 0 0 0 1091 0 0 0 100 7 0 0 0 103 9 24 0 3 2 0 296 0 0 0 100 March 10, 2026 at 10:44:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2332 225 106 0 1 0 0 303 0 0 0 100 1 0 0 4 260 103 62 0 0 0 0 17 0 0 0 100 2 0 0 0 41 17 40 0 2 0 0 1 0 0 0 100 3 0 0 0 42 18 38 0 1 1 0 9 0 0 0 100 4 0 0 14 22 7 16 0 1 0 0 567 0 0 0 100 5 0 0 7 10 3 32 0 1 0 0 267 0 0 0 100 6 0 0 0 9 2 38 0 0 0 0 1092 0 0 0 100 7 0 0 0 13 2 10 0 0 0 0 294 0 0 0 100 March 10, 2026 at 10:44:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2305 201 106 0 1 1 0 300 0 0 0 100 1 0 0 4 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 118 57 112 0 0 0 0 10 0 0 0 100 4 1 0 14 17 2 14 0 0 0 0 620 0 0 0 100 5 1 0 7 14 4 30 0 0 0 0 261 0 0 0 100 6 0 0 0 12 3 36 1 0 0 0 1091 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 295 0 0 0 100 March 10, 2026 at 10:44:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2027 0 136 2420 216 1191 34 179 106 54 4254 4 3 0 93 1 1883 0 254 330 105 1134 31 165 144 59 4019 3 2 0 95 2 13288 0 138 199 11 1076 31 130 229 78 5753 6 4 0 90 3 6017 0 14 195 28 1032 28 135 220 84 6470 5 3 0 93 4 33911 0 35 136 4 927 25 128 107 69 3859 10 7 0 83 5 1372 0 14 125 5 781 11 99 76 66 3612 3 2 0 96 6 1880 0 16 176 2 1152 13 107 96 62 4095 2 2 0 96 7 3247 0 223 94 3 691 15 104 101 42 2916 3 1 0 96 March 10, 2026 at 10:44:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2321 201 122 0 13 73 0 315 0 0 0 99 1 16 0 91 214 102 211 1 10 55 0 14 0 1 0 99 2 2 0 0 51 9 120 0 13 103 0 20 0 0 0 100 3 20 0 0 112 67 121 0 5 79 0 10 0 0 0 100 4 4 0 14 99 17 179 0 11 70 0 582 0 0 0 100 5 0 0 7 81 27 156 0 8 93 0 264 0 0 0 100 6 25 0 0 28 3 134 1 13 74 0 1107 0 0 0 100 7 41 0 0 45 10 142 1 7 74 0 322 0 0 0 100 March 10, 2026 at 10:44:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2380 201 108 0 3 3 0 300 0 1 0 99 1 0 0 45 275 101 4 0 2 2 0 0 0 0 0 100 2 0 0 462 13 1 4 0 0 2 0 0 0 0 0 100 3 0 0 0 78 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 111 3 34 0 0 0 0 566 0 0 0 100 5 0 0 7 180 52 106 0 0 0 0 263 0 0 0 100 6 0 0 0 84 3 36 1 0 1 0 1100 0 0 0 100 7 0 0 0 97 8 20 0 0 1 0 303 0 0 0 100 March 10, 2026 at 10:44:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2306 201 112 0 0 1 0 300 0 0 0 100 1 0 0 3 212 104 14 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 18 10 8 0 1 0 0 566 0 0 0 100 5 0 0 7 108 52 110 0 0 0 0 267 0 0 0 100 6 0 0 0 13 3 42 0 0 0 0 1104 0 0 0 100 7 0 0 0 27 9 24 0 0 0 0 305 0 0 0 100 March 10, 2026 at 10:44:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4724 0 48 2558 203 1245 47 188 128 56 5737 6 3 0 91 1 2958 0 361 292 101 1205 44 189 96 61 4438 6 3 0 92 2 3824 0 125 120 5 1199 43 180 130 74 6056 4 3 0 94 3 42510 0 204 122 2 1112 46 176 189 74 5438 12 9 0 79 4 5659 0 24 140 13 1198 30 171 177 72 4464 2 2 0 95 5 1195 0 21 175 38 1151 24 147 123 81 3230 2 2 0 97 6 1693 0 26 126 4 976 25 123 108 52 5729 3 2 0 94 7 541 0 8 148 11 979 27 126 74 46 3550 2 1 0 97 March 10, 2026 at 10:44:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 73 2311 201 105 0 3 5 0 311 0 1 0 99 1 11 0 18 241 102 24 0 4 2 0 26 0 0 0 100 2 26 0 7 31 6 46 0 3 5 0 36 0 0 0 100 3 15 0 0 27 4 14 0 0 1 0 16 0 0 0 100 4 30 0 14 125 53 110 1 0 0 0 578 0 0 0 100 5 0 0 7 23 3 8 0 1 0 0 271 0 0 0 100 6 0 0 0 27 4 40 1 1 4 0 1123 0 0 0 100 7 0 0 0 26 3 12 0 1 1 0 319 0 0 0 100 March 10, 2026 at 10:44:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 45 2375 201 206 0 9 81 0 300 0 1 0 99 1 0 0 3 278 101 181 0 10 51 0 0 0 0 0 100 2 0 0 462 29 7 109 0 5 89 0 9 0 0 0 100 3 0 0 0 136 59 81 0 8 52 0 0 0 0 0 100 4 0 0 14 185 54 181 0 4 77 0 566 0 0 0 100 5 0 0 7 83 2 102 0 6 102 0 263 0 0 0 100 6 0 0 0 85 3 120 1 6 75 0 1098 0 0 0 100 7 0 0 0 86 2 104 0 7 71 0 294 0 0 0 100 March 10, 2026 at 10:44:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2306 203 120 0 2 2 0 300 0 0 0 100 1 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 2 0 0 0 23 8 18 0 0 1 0 9 0 0 0 100 3 0 0 0 8 2 24 0 1 1 0 0 0 0 0 100 4 0 0 14 115 56 110 0 0 2 0 567 0 0 0 100 5 0 0 7 8 2 8 0 1 1 0 260 0 0 0 100 6 0 0 0 16 5 42 1 0 2 0 1101 0 0 0 100 7 0 0 0 15 4 13 1 1 1 0 296 0 0 0 100 March 10, 2026 at 10:44:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 40 0 10 2330 202 174 0 11 5 8 435 0 1 0 99 1 105 0 22 226 101 48 1 10 4 4 883 0 0 0 100 2 23 0 2 48 10 69 2 8 11 7 202 0 0 0 100 3 3006 0 121 15 1 76 2 10 37 12 611 1 1 0 98 4 57 0 17 137 58 202 0 17 10 18 823 0 0 0 100 5 68 0 9 29 2 86 0 21 9 17 465 0 0 0 100 6 23 0 0 41 4 120 0 14 8 10 1306 0 0 0 100 7 26 0 0 33 2 63 0 13 6 15 425 0 0 0 100 March 10, 2026 at 10:44:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3019 0 482 2378 204 1267 43 207 95 71 5965 4 3 0 94 1 1561 0 146 310 104 1249 38 210 113 73 4775 4 2 0 94 2 36444 0 34 163 3 1017 31 162 113 52 4549 12 8 0 80 3 903 0 8 139 13 1040 33 175 98 55 3504 2 2 0 96 4 7509 0 50 178 41 1081 21 145 186 47 4888 3 4 0 93 5 7157 0 26 178 3 874 32 129 146 54 3883 4 2 0 94 6 892 0 2 130 6 947 30 127 84 49 4066 2 1 0 96 7 2328 0 11 143 4 863 32 119 84 49 3546 5 1 0 94 March 10, 2026 at 10:44:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2414 237 109 0 6 0 0 300 0 0 0 100 1 0 0 45 363 111 94 0 5 2 0 1 0 1 0 99 2 26 0 462 29 8 22 0 0 2 0 18 0 0 0 100 3 0 0 0 78 1 0 0 0 0 0 0 0 0 0 100 4 2 0 14 103 9 26 0 2 1 0 568 0 0 0 100 5 0 0 7 80 2 32 0 2 0 0 281 0 0 0 100 6 0 0 0 84 3 36 1 0 1 0 1094 0 0 0 100 7 0 0 0 83 2 6 0 0 1 0 293 0 0 0 100 March 10, 2026 at 10:44:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2312 204 219 0 10 74 0 300 0 0 0 99 1 0 0 7 229 107 204 0 11 57 0 2 0 0 0 100 2 0 0 0 88 41 163 0 7 81 0 9 0 0 0 100 3 0 0 0 87 69 121 0 7 92 0 0 0 0 0 100 4 0 0 14 15 4 103 0 6 75 0 566 0 0 0 100 5 0 0 7 13 3 93 0 11 70 0 260 0 0 0 100 6 0 0 0 14 3 122 1 2 68 0 1093 0 0 0 100 7 0 0 0 17 4 124 0 6 77 0 296 0 0 0 100 March 10, 2026 at 10:44:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2309 202 106 0 0 1 0 300 0 0 0 100 1 0 0 3 214 101 8 0 0 0 0 0 0 0 0 100 2 0 0 0 17 6 12 0 0 0 0 8 0 0 0 100 3 0 0 0 106 51 100 0 0 0 0 0 0 0 0 100 4 0 0 14 11 3 8 0 0 0 0 567 0 0 0 100 5 0 0 7 8 2 6 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 34 0 0 2 0 1092 0 0 0 100 7 0 0 0 11 2 6 0 0 1 0 294 0 0 0 100 March 10, 2026 at 10:44:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1910 0 196 2405 203 1148 34 178 144 58 3456 4 3 0 93 1 2320 0 276 315 103 1162 39 159 129 82 5337 4 2 0 93 2 1160 0 8 147 11 1039 31 164 103 73 2814 2 1 0 96 3 684 0 10 158 21 888 21 124 115 56 3439 2 2 0 96 4 43933 0 252 152 13 988 37 118 226 68 5116 11 10 0 79 5 8262 0 53 207 7 905 32 131 185 65 4712 5 2 0 93 6 1399 0 4 122 2 888 27 120 114 82 3986 2 1 0 97 7 3747 0 18 238 22 858 31 105 83 77 5578 4 1 0 94 March 10, 2026 at 10:44:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 3 2341 222 109 0 9 4 0 318 0 0 0 100 1 26 0 88 280 117 102 1 6 6 0 15 0 1 0 99 2 0 0 0 22 2 16 1 3 6 0 18 0 0 0 100 3 28 0 0 29 6 16 0 3 0 0 14 0 0 0 100 4 0 0 0 30 1 13 0 1 0 0 316 0 0 0 100 5 18 0 21 31 7 20 0 0 1 0 535 0 0 0 100 6 13 0 7 26 3 41 1 4 2 0 1108 0 0 0 100 7 3 0 0 59 16 43 1 5 4 0 306 0 0 0 100 March 10, 2026 at 10:44:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2379 202 106 0 0 0 0 300 0 0 0 100 1 0 0 45 282 101 10 0 1 2 0 0 0 1 0 99 2 0 0 462 89 39 80 0 0 2 0 0 0 0 0 100 3 0 0 0 112 18 36 0 1 0 0 9 0 0 0 100 4 0 0 0 81 1 4 0 1 0 0 300 0 0 0 100 5 0 0 21 82 4 10 0 0 0 0 529 0 0 0 100 6 0 0 0 85 3 38 0 0 0 0 1094 0 0 0 100 7 0 0 0 85 3 10 0 2 0 0 296 0 0 0 100 March 10, 2026 at 10:44:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2309 202 190 0 4 73 0 300 0 0 0 99 1 0 0 3 217 101 197 0 6 48 0 0 0 0 0 100 2 0 0 1 10 1 92 0 7 67 0 0 0 0 0 100 3 0 0 0 176 115 194 0 6 77 0 8 0 0 0 100 4 0 0 0 11 2 95 0 8 96 0 300 0 0 0 100 5 0 0 21 10 4 116 0 3 75 0 526 0 0 0 100 6 0 0 0 12 2 115 1 5 68 0 1093 0 0 0 100 7 0 0 0 12 2 96 0 3 52 0 294 0 0 0 100 March 10, 2026 at 10:44:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36886 0 151 2423 203 1024 32 159 128 65 4385 11 8 0 81 1 2881 0 73 380 102 1008 22 145 121 54 3013 3 1 0 96 2 1670 0 17 123 1 882 22 135 102 65 3347 2 2 0 96 3 1219 0 8 203 46 925 18 99 124 43 4470 3 2 0 95 4 11362 0 501 74 1 900 12 97 218 78 4676 4 4 0 92 5 6368 0 48 175 5 876 21 115 195 87 5090 4 2 0 93 6 1404 0 7 130 16 878 13 109 117 77 4296 2 1 0 97 7 1491 0 32 127 4 702 16 99 101 63 2790 2 1 0 97 March 10, 2026 at 10:44:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 50 0 10 2314 202 122 0 6 1 0 334 0 0 0 99 1 0 0 17 229 103 16 0 2 0 0 20 0 0 0 100 2 1 0 0 26 3 14 0 3 7 0 6 0 0 0 100 3 30 0 0 33 6 21 0 2 2 0 24 0 0 0 100 4 0 0 0 29 7 7 1 1 0 0 315 0 0 0 100 5 31 0 91 17 5 22 1 2 6 0 547 0 1 0 99 6 22 0 0 131 55 158 1 1 0 0 1165 2 0 0 98 7 11 0 0 28 2 20 0 1 1 0 317 0 0 0 100 March 10, 2026 at 10:44:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2382 202 108 0 0 0 0 300 0 1 0 99 1 0 0 4 286 101 10 0 1 0 0 0 0 0 0 100 2 0 0 462 13 1 4 0 0 2 0 0 0 0 0 100 3 0 0 0 90 7 12 0 0 0 0 9 0 0 0 100 4 0 0 0 83 1 6 0 1 0 0 300 0 0 0 100 5 0 0 63 80 5 34 0 1 2 0 529 0 1 0 99 6 0 0 0 184 53 136 1 0 1 0 1095 0 0 0 100 7 0 0 0 87 4 10 0 0 1 0 296 0 0 0 100 March 10, 2026 at 10:44:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2308 202 112 0 1 0 0 300 0 0 0 100 1 0 0 4 208 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 16 6 10 0 0 0 0 8 0 0 0 100 4 0 0 0 11 2 6 0 0 0 0 301 0 0 0 100 5 0 0 21 12 4 12 0 0 0 0 527 0 0 0 100 6 0 0 0 109 52 154 0 1 0 0 1094 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 294 0 0 0 100 March 10, 2026 at 10:44:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2314 202 187 0 6 79 0 300 0 0 0 100 1 0 0 3 209 102 189 0 8 59 0 1 0 0 0 100 2 0 0 0 12 2 103 0 6 60 0 0 0 0 0 100 3 0 0 0 77 65 99 0 6 65 0 6 0 0 0 100 4 0 0 0 14 3 85 0 7 64 0 300 0 0 0 100 5 0 0 21 12 5 85 0 2 41 0 525 0 0 0 100 6 0 0 0 78 35 188 1 7 56 0 1093 0 0 0 100 7 0 0 0 52 22 140 0 7 71 0 296 0 0 0 100 March 10, 2026 at 10:44:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36632 0 33 2526 204 1195 55 229 90 58 5934 14 9 0 77 1 3393 0 288 338 106 1170 58 212 174 86 6267 5 2 0 93 2 1042 0 32 127 2 1065 40 173 104 55 3192 2 2 0 95 3 2170 0 18 145 4 986 26 156 141 64 3969 3 2 0 95 4 10268 0 236 99 2 945 29 136 195 66 4878 4 3 0 93 5 7031 0 54 258 35 1079 24 157 173 66 5517 4 3 0 93 6 1225 0 8 122 4 1033 20 132 135 77 4285 2 1 0 97 7 1415 0 184 131 19 938 20 121 100 64 3224 2 1 0 97 March 10, 2026 at 10:44:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 73 2303 202 136 0 2 5 0 299 0 1 0 99 1 0 0 3 231 102 16 0 1 0 0 6 0 0 0 100 2 0 0 7 19 1 10 0 1 5 0 0 0 0 0 100 3 0 0 0 19 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 28 9 4 0 1 0 0 300 0 0 0 100 5 2 0 21 121 54 114 0 0 0 0 536 0 0 0 100 6 26 0 0 37 9 60 1 0 0 0 1117 0 0 0 100 7 0 0 0 32 4 20 0 0 1 0 296 0 0 0 100 March 10, 2026 at 10:44:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 46 2375 202 108 0 0 3 0 300 0 1 0 99 1 0 0 3 287 101 8 0 0 0 0 0 0 0 0 100 2 0 0 462 17 2 10 0 0 2 0 23 0 0 0 100 3 0 0 0 78 1 2 0 1 0 0 0 0 0 0 100 4 0 0 0 81 1 4 0 0 0 0 300 0 0 0 100 5 0 0 21 182 54 110 0 0 0 0 525 0 0 0 100 6 0 0 0 92 7 44 1 0 0 0 1102 0 0 0 100 7 0 0 0 85 3 8 0 0 2 0 293 0 0 0 100 March 10, 2026 at 10:44:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2324 217 109 0 7 2 0 300 0 0 0 100 1 0 0 3 268 116 82 0 5 0 0 0 0 0 0 100 2 0 0 0 19 7 16 0 1 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 5 0 0 21 42 18 40 0 1 0 0 526 0 0 0 100 6 0 0 0 18 6 44 1 0 0 0 1102 0 0 0 100 7 0 0 0 15 4 8 0 0 0 0 296 0 0 0 100 March 10, 2026 at 10:44:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4610 0 150 2542 205 1252 39 210 177 55 4948 4 3 0 93 1 1434 0 59 332 103 1351 39 217 171 66 4205 4 2 0 95 2 2964 0 192 182 30 1251 43 163 159 60 4230 4 2 0 94 3 548 0 24 178 63 1042 22 144 124 73 4127 2 2 0 96 4 6287 0 133 132 9 1099 32 134 236 66 4505 6 3 0 91 5 8182 0 221 110 7 1047 27 125 293 71 5783 3 4 0 93 6 38457 0 24 133 9 1089 34 129 237 70 5164 12 8 0 80 7 910 0 15 133 8 1076 29 135 154 73 3990 2 2 0 96 March 10, 2026 at 10:44:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 73 2313 202 121 0 3 6 0 312 0 1 0 99 1 6 0 18 219 102 6 1 2 0 0 5 0 0 0 100 2 11 0 0 120 50 109 0 2 7 0 27 0 0 0 100 3 0 0 0 25 3 6 0 1 0 0 15 0 0 0 100 4 6 0 7 21 1 12 0 2 0 0 307 0 0 0 100 5 4 0 21 27 5 12 0 0 0 0 545 0 0 0 100 6 65 0 0 37 8 53 2 0 2 0 1115 0 0 0 100 7 1 0 0 28 4 18 0 1 0 0 325 0 0 0 100 March 10, 2026 at 10:44:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 38 2364 204 280 0 2 4 0 633 0 1 0 99 1 0 0 4 268 101 12 0 1 0 0 8 0 0 0 100 2 0 0 350 59 21 56 0 2 4 0 7 0 0 0 100 3 0 0 0 102 21 64 0 2 0 0 0 0 0 0 100 4 0 0 0 95 18 30 0 1 0 0 300 0 0 0 100 5 0 0 28 67 5 20 0 1 0 0 536 0 0 0 100 6 0 0 0 78 8 54 1 1 2 0 1112 0 0 0 100 7 0 0 0 73 4 20 0 1 0 0 300 0 0 0 100 March 10, 2026 at 10:44:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2323 202 116 0 1 0 0 300 0 0 0 100 1 0 0 3 222 101 0 0 0 0 0 0 0 0 0 100 2 0 0 112 5 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 28 3 6 0 1 0 0 21 0 0 0 100 4 0 0 0 125 51 122 0 1 0 0 300 0 0 0 100 5 0 0 21 30 5 14 0 0 0 0 527 0 0 0 100 6 0 0 0 26 2 36 1 1 1 0 1090 0 0 0 100 7 0 0 0 43 10 22 0 1 0 0 306 0 0 0 100 March 10, 2026 at 10:44:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1324 0 35 2419 203 652 11 95 70 67 3275 3 2 0 96 1 1060 0 210 297 102 487 7 85 57 59 1845 1 1 0 98 2 35092 0 37 180 3 474 17 84 50 45 1979 10 8 0 83 3 358 0 31 112 10 448 7 71 65 50 2348 1 1 0 98 4 1255 0 116 159 40 462 10 73 98 51 1640 1 1 0 98 5 9506 0 214 103 6 448 6 74 160 64 3365 2 3 0 95 6 7264 0 56 161 3 405 3 64 132 46 3255 3 2 0 96 7 1338 0 133 120 11 596 4 86 87 100 3492 1 1 0 98 March 10, 2026 at 10:44:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 862 0 4 2343 202 646 20 82 153 6 1700 2 1 0 97 1 983 0 31 245 106 518 10 75 82 4 1899 3 1 0 97 2 1544 0 0 34 3 495 7 55 117 11 1406 2 1 0 98 3 197 0 70 95 66 392 10 36 123 9 1107 1 1 0 98 4 627 0 0 36 3 463 6 45 112 3 1394 3 1 0 97 5 1103 0 21 130 9 596 11 51 148 7 1688 1 1 0 98 6 731 0 0 111 38 687 15 49 108 3 2311 1 1 0 98 7 473 0 7 58 13 457 10 49 73 2 1536 1 1 0 98 March 10, 2026 at 10:44:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2377 201 6 0 1 0 0 0 0 0 0 100 1 0 0 3 284 102 6 0 0 1 0 300 0 0 0 100 2 0 0 0 81 0 6 0 2 0 0 0 0 0 0 100 3 26 0 42 152 21 82 0 10 3 0 9 0 1 0 99 4 0 0 462 37 12 30 0 2 3 0 300 0 0 0 100 5 0 0 21 94 4 40 0 1 1 0 529 0 0 0 100 6 0 0 0 114 12 64 1 3 0 0 1096 0 0 0 100 7 0 0 0 153 17 78 0 8 0 0 294 0 0 0 100 March 10, 2026 at 10:44:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2305 201 82 0 1 0 0 1 0 0 0 100 1 0 0 3 217 105 18 0 1 0 0 315 0 0 0 100 2 0 0 0 13 0 10 0 0 0 0 0 0 0 0 100 3 0 0 0 18 7 12 0 0 0 0 8 0 0 0 100 4 0 0 0 42 13 30 0 2 0 0 300 0 0 0 100 5 0 0 21 10 4 14 0 0 0 0 532 0 0 0 100 6 0 0 0 10 1 36 1 0 0 0 1101 0 0 0 100 7 0 0 0 117 47 116 0 1 0 0 296 0 0 0 100 March 10, 2026 at 10:44:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2330 226 104 0 6 0 0 0 0 0 0 100 1 0 0 3 268 111 64 0 3 0 0 300 0 0 0 100 2 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 3 0 0 0 18 7 12 0 0 0 0 8 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 5 0 0 21 12 4 12 0 0 1 0 527 0 0 0 100 6 0 0 0 8 1 50 1 1 0 0 1098 0 0 0 100 7 0 0 0 55 19 48 0 3 0 0 294 0 0 0 100 March 10, 2026 at 10:44:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1076 0 42 2433 202 1257 34 190 101 83 6250 5 2 0 93 1 27456 0 73 379 115 1082 46 179 461 73 5395 10 8 0 82 2 35202 0 487 146 1 917 34 135 556 47 4114 11 6 0 84 3 3899 0 45 234 26 1033 33 131 141 58 3456 4 2 0 94 4 2274 0 188 147 22 896 17 115 142 62 4410 4 2 0 94 5 9956 0 50 140 5 960 28 123 229 65 5082 4 5 0 91 6 7964 0 39 179 2 923 24 110 276 61 4166 4 3 0 93 7 1336 0 9 140 6 1072 28 128 124 60 3618 4 1 0 95 March 10, 2026 at 10:44:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 74 2312 201 186 0 6 61 0 0 0 1 0 99 1 0 0 10 219 102 89 0 7 77 0 300 0 0 0 100 2 26 0 0 34 7 100 0 11 70 0 9 0 0 0 100 3 0 0 0 79 54 100 0 5 76 0 0 0 0 0 100 4 0 0 0 120 51 195 0 10 92 0 300 0 0 0 100 5 2 0 21 25 5 101 0 7 60 0 529 0 0 0 100 6 0 0 0 21 1 204 1 10 64 0 1090 0 0 0 100 7 0 0 0 27 3 104 0 10 80 0 294 0 0 0 100 March 10, 2026 at 10:44:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 46 2371 201 110 0 0 2 0 0 0 1 0 99 1 0 0 3 283 102 24 0 1 0 0 300 0 0 0 100 2 0 0 0 89 6 14 0 1 0 0 9 0 0 0 100 3 0 0 0 88 2 10 0 0 0 0 0 0 0 0 100 4 0 0 462 113 51 104 0 0 2 0 300 0 0 0 100 5 0 0 21 82 4 10 0 0 0 0 527 0 0 0 100 6 0 0 0 82 2 34 1 0 0 0 1091 0 0 0 100 7 0 0 0 87 4 10 0 0 0 0 296 0 0 0 100 March 10, 2026 at 10:44:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2305 201 116 0 0 0 0 3 0 0 0 100 1 0 0 3 215 104 16 0 1 0 0 314 0 0 0 100 2 0 0 0 19 6 37 0 2 0 0 9 0 0 0 100 3 0 0 0 18 2 12 0 0 0 0 0 0 0 0 100 4 0 0 0 115 59 102 0 0 0 0 300 0 0 0 100 5 0 0 21 10 4 14 0 0 0 0 532 0 0 0 100 6 0 0 0 8 1 38 1 0 1 0 1093 0 0 0 100 7 0 0 0 15 3 16 0 0 1 0 293 0 0 0 100 March 10, 2026 at 10:44:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2368 0 12 2429 208 1102 30 175 162 62 4403 5 2 0 93 1 1877 0 51 338 108 1009 30 155 95 74 5479 5 2 0 93 2 35950 0 45 220 16 999 40 132 128 56 5395 11 7 0 81 3 1838 0 129 125 7 957 18 137 100 81 3023 2 2 0 96 4 2978 0 221 138 25 986 14 110 136 68 4011 3 2 0 95 5 10194 0 326 91 5 904 16 100 193 79 4246 3 6 0 91 6 6427 0 36 182 4 772 15 99 142 81 4840 3 2 0 95 7 1479 0 12 127 5 905 19 108 137 79 2730 1 1 0 97 March 10, 2026 at 10:44:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 4 2327 203 13 0 3 2 0 18 0 0 0 100 1 10 0 17 220 102 8 0 2 1 0 320 0 0 0 100 2 0 0 0 133 25 123 0 7 1 0 13 0 0 0 100 3 27 0 7 124 31 136 0 8 0 0 25 0 0 0 100 4 0 0 70 14 2 12 0 1 7 0 305 0 1 0 99 5 0 0 7 27 4 17 0 0 8 0 288 0 0 0 100 6 11 0 14 26 4 45 0 2 1 0 1366 0 0 0 100 7 23 0 0 28 3 10 0 0 0 0 303 0 0 0 100 March 10, 2026 at 10:44:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2365 202 228 0 8 89 0 1 0 1 0 99 1 0 0 35 261 103 200 0 15 106 0 301 0 1 0 99 2 0 0 0 94 15 171 0 10 92 0 0 0 0 0 100 3 0 0 0 291 157 258 0 9 121 0 9 0 0 0 100 4 0 0 0 71 3 161 0 11 97 0 300 0 0 0 100 5 0 0 350 19 4 154 0 13 79 0 263 0 1 0 99 6 0 0 14 68 4 355 1 15 59 0 1357 0 0 0 99 7 0 0 0 73 5 148 0 9 96 0 296 0 0 0 100 March 10, 2026 at 10:44:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2322 201 106 0 0 0 0 0 0 0 0 100 1 0 0 3 228 102 4 0 0 0 0 300 0 0 0 100 2 0 0 0 22 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 133 56 110 0 0 0 0 8 0 0 0 100 4 0 0 0 34 2 12 0 0 0 0 300 0 0 0 100 5 0 0 126 10 3 10 0 0 1 0 260 0 0 0 100 6 0 0 14 25 2 34 1 0 1 0 1355 0 0 0 100 7 0 0 0 30 3 8 0 0 1 0 294 0 0 0 100 March 10, 2026 at 10:44:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 577 0 29 2409 203 604 12 81 80 56 3531 1 2 0 97 1 474 0 68 290 103 460 5 70 37 55 1555 1 1 0 98 2 470 0 11 82 0 377 6 51 53 36 3094 1 1 0 98 3 217 0 14 190 53 452 5 52 46 45 1138 1 1 0 98 4 794 0 42 101 8 404 3 63 69 51 2237 2 2 0 97 5 34596 0 309 65 6 461 13 74 112 64 2527 8 6 0 86 6 7723 0 161 147 9 512 6 75 125 68 3541 3 2 0 95 7 540 0 13 101 5 508 9 68 94 68 1777 0 0 0 99 March 10, 2026 at 10:44:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3588 0 5 2411 202 617 14 58 84 10 2225 4 2 0 95 1 653 0 31 257 103 655 20 80 54 21 2016 3 1 0 96 2 1418 0 176 119 44 648 9 46 67 13 1721 1 1 0 98 3 918 0 0 55 2 476 12 51 40 25 2029 2 1 0 97 4 2876 0 85 55 3 479 9 45 68 19 2105 2 1 0 96 5 5331 0 22 55 3 415 10 48 60 17 1397 2 3 0 95 6 594 0 14 82 6 456 13 37 61 7 2537 1 1 0 98 7 2959 0 2 64 5 432 14 42 81 13 1944 2 1 0 97 March 10, 2026 at 10:44:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2376 201 106 0 0 0 0 0 0 0 0 100 1 0 0 3 281 102 2 0 0 0 0 300 0 0 0 100 2 26 0 0 189 56 112 0 0 0 0 9 0 0 0 100 3 0 0 0 78 1 0 0 0 0 0 0 0 0 0 100 4 0 0 42 85 2 14 0 0 2 0 300 0 1 0 99 5 2 0 469 18 3 12 0 1 2 0 265 0 0 0 100 6 2 0 14 80 2 36 1 1 0 0 1356 0 0 0 100 7 0 0 0 87 4 10 0 1 0 0 295 0 0 0 100 March 10, 2026 at 10:44:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2311 201 206 0 7 73 0 0 0 0 0 100 1 0 0 3 209 102 103 0 4 64 0 300 0 0 0 100 2 0 0 0 117 56 193 0 10 61 0 9 0 0 0 100 3 0 0 0 70 62 99 0 7 81 0 0 0 0 0 100 4 0 0 0 20 2 91 0 6 58 0 300 0 0 0 100 5 0 0 7 10 3 102 0 7 66 0 260 0 0 0 100 6 0 0 14 10 2 220 1 5 60 0 1357 0 0 0 100 7 0 0 0 13 3 97 0 6 70 0 294 0 0 0 100 March 10, 2026 at 10:44:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2305 201 108 0 0 1 0 0 0 0 0 100 1 0 0 3 209 102 22 0 1 1 0 300 0 0 0 100 2 0 0 0 115 55 110 0 0 0 0 9 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 17 2 12 0 0 0 0 300 0 0 0 100 5 0 0 7 10 3 8 0 0 0 0 260 0 0 0 100 6 0 0 14 10 3 36 1 0 1 0 1356 0 0 0 100 7 0 0 0 15 4 10 0 0 0 0 296 0 0 0 100 March 10, 2026 at 10:44:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8289 0 134 2427 202 1178 34 178 216 75 6730 4 4 0 92 1 8127 0 290 305 103 1048 35 170 199 91 5639 6 3 0 91 2 3043 0 132 137 17 1049 31 161 128 76 3514 5 2 0 94 3 1413 0 6 142 5 943 31 148 98 70 3189 2 1 0 97 4 2586 0 201 182 10 951 26 115 98 59 2914 2 2 0 95 5 34076 0 21 138 5 804 21 97 110 55 3410 9 7 0 84 6 1134 0 45 191 15 893 21 99 88 59 4397 2 2 0 96 7 4302 0 13 235 31 794 14 101 139 56 4106 4 2 0 94 March 10, 2026 at 10:44:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 3 2332 211 101 0 4 0 0 9 0 0 0 100 1 0 0 73 236 111 27 0 3 6 0 300 0 1 0 99 2 0 0 0 80 31 86 0 3 1 0 0 0 0 0 100 3 0 0 0 19 2 2 0 0 0 0 21 0 0 0 100 4 0 0 0 20 2 4 0 0 0 0 300 0 0 0 100 5 0 0 7 31 4 22 0 0 5 0 264 0 0 0 100 6 2 0 14 35 3 48 1 0 0 0 1354 0 0 0 100 7 0 0 7 44 10 29 0 2 0 0 296 0 0 0 100 March 10, 2026 at 10:44:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2389 207 120 0 1 0 0 9 0 0 0 99 1 0 0 45 276 102 4 0 0 2 0 300 0 1 0 99 2 0 0 0 181 51 104 0 0 0 0 0 0 0 0 100 3 0 0 0 78 1 18 0 1 0 0 0 0 0 0 100 4 0 0 0 81 2 4 0 0 0 0 300 0 0 0 100 5 1 0 469 24 3 18 0 0 2 0 260 0 0 0 100 6 0 0 14 82 3 36 1 0 2 0 1354 0 0 0 100 7 0 0 0 85 2 8 0 0 2 0 294 0 0 0 100 March 10, 2026 at 10:44:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2320 206 202 0 7 78 0 8 0 0 0 100 1 0 0 7 216 105 87 0 2 75 0 302 0 0 0 100 2 0 0 0 112 52 206 0 13 90 0 0 0 0 0 100 3 0 0 0 69 61 92 0 6 64 0 0 0 0 0 100 4 0 0 0 12 3 90 0 4 53 0 300 0 0 0 100 5 0 0 7 21 4 125 0 10 75 0 260 0 0 0 100 6 0 0 14 13 3 220 1 13 55 0 1353 0 0 0 100 7 0 0 0 15 4 93 0 4 83 0 296 0 0 0 100 March 10, 2026 at 10:44:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43470 0 61 2449 208 1002 51 157 219 66 7050 13 11 0 76 1 7887 0 80 409 108 978 28 148 202 70 5700 4 2 0 93 2 1139 0 19 200 24 1160 32 169 112 81 3059 2 2 0 96 3 2115 0 134 129 12 1027 27 138 131 66 3386 4 3 0 94 4 3472 0 19 202 14 918 16 126 111 61 3239 3 1 0 96 5 1972 0 124 103 3 899 9 107 107 55 3720 2 1 0 97 6 2908 0 389 82 4 741 15 86 114 60 3230 5 2 0 94 7 334 0 18 110 3 667 8 87 77 60 4392 2 1 0 97 March 10, 2026 at 10:44:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 73 2318 206 134 0 3 4 0 24 0 1 0 99 1 1 0 24 220 102 12 0 2 3 0 307 0 0 0 100 2 0 0 0 22 2 8 0 0 3 0 10 0 0 0 100 3 14 0 0 27 4 11 0 2 1 0 24 0 0 0 100 4 1 0 0 109 47 89 0 2 2 0 308 0 0 0 100 5 8 0 7 53 14 44 0 3 6 0 274 0 0 0 100 6 4 0 14 26 4 38 0 1 2 0 300 0 0 0 100 7 12 0 0 33 5 53 1 3 4 0 1413 0 0 0 100 March 10, 2026 at 10:44:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2351 207 126 0 0 3 0 9 0 1 0 99 1 0 0 4 244 102 4 0 0 0 0 300 0 0 0 100 2 0 0 0 41 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 40 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 43 2 4 0 0 0 0 300 0 0 0 100 5 0 0 238 109 52 108 0 0 4 0 263 0 0 0 100 6 0 0 14 39 1 4 0 0 0 0 266 0 0 0 100 7 0 0 0 50 4 40 1 0 1 0 1384 0 0 0 100 March 10, 2026 at 10:44:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 38 2348 206 112 0 2 2 0 8 0 1 0 99 1 0 0 3 258 102 14 0 2 0 0 300 0 0 0 100 2 0 0 0 45 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 44 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 47 2 4 0 0 0 0 300 0 0 0 100 5 0 0 238 63 27 54 0 0 2 0 260 0 0 0 100 6 0 0 14 95 26 60 0 2 0 0 266 0 0 0 100 7 0 0 0 55 5 60 0 1 0 0 1386 0 0 0 100 March 10, 2026 at 10:44:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8767 0 199 2402 210 671 13 93 215 55 3799 3 3 0 94 1 3568 0 153 286 103 594 8 90 165 73 2083 1 1 0 98 2 19429 0 28 93 2 588 16 74 134 63 1427 5 4 0 91 3 879 0 151 137 63 496 9 67 109 56 3204 1 1 0 98 4 806 0 24 77 4 438 7 73 134 57 2081 2 1 0 97 5 213 0 14 87 3 482 4 71 103 45 1368 0 0 0 99 6 424 0 19 179 52 642 6 62 109 40 2063 1 1 0 98 7 1454 0 24 153 5 389 5 50 133 28 2614 1 1 0 98 March 10, 2026 at 10:44:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3482 0 6 2420 201 679 15 92 83 12 2058 2 2 0 96 1 3964 0 36 266 103 566 22 76 119 21 2571 4 2 0 94 2 15481 0 8 57 3 485 20 59 67 11 2282 6 5 0 89 3 251 0 70 115 34 559 14 63 32 12 1695 1 1 0 98 4 2359 0 19 66 11 486 7 40 52 12 1681 3 1 0 97 5 139 0 7 69 2 511 18 62 40 14 2021 1 1 0 98 6 1371 0 190 50 9 433 16 42 49 16 1516 1 1 0 98 7 556 0 0 73 7 603 9 41 49 28 3131 1 1 0 98 March 10, 2026 at 10:45:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2377 202 118 0 2 1 0 0 0 1 0 99 1 0 0 3 286 102 34 0 2 0 0 308 0 0 0 100 2 0 0 0 85 2 6 0 0 0 0 1 0 0 0 100 3 0 0 42 74 1 2 0 0 1 0 0 0 0 0 100 4 0 0 0 186 56 105 0 1 0 0 300 0 0 0 100 5 0 0 469 14 2 12 0 1 0 0 269 0 0 0 100 6 28 0 14 91 8 24 0 0 0 0 290 0 0 0 100 7 0 0 0 88 3 42 1 0 1 0 1385 0 0 0 100 March 10, 2026 at 10:45:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2309 202 116 0 1 0 0 0 0 0 0 100 1 0 0 3 214 102 4 0 1 1 0 300 0 0 0 100 2 0 0 0 7 1 24 0 1 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 85 40 80 0 0 0 0 300 0 0 0 100 5 0 0 7 32 14 30 0 1 0 0 261 0 0 0 100 6 1 0 14 19 8 20 0 0 0 0 350 0 0 0 99 7 0 0 0 16 4 38 1 0 1 0 1386 0 0 0 100 March 10, 2026 at 10:45:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2305 202 114 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 300 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 5 0 0 7 108 52 104 0 0 0 0 260 0 0 0 100 6 0 0 14 23 10 22 0 0 0 0 278 0 0 0 100 7 0 0 0 13 3 38 0 0 1 0 1383 0 0 0 100 March 10, 2026 at 10:45:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4241 0 33 2439 205 1263 27 176 247 95 5959 4 4 0 92 1 3645 0 93 408 108 1108 31 172 242 55 3870 2 2 0 95 2 43240 0 161 189 5 1202 20 126 282 60 4595 12 9 0 79 3 4346 0 29 280 141 1079 13 143 256 75 3245 2 2 0 96 4 1324 0 11 130 8 1179 22 142 195 70 5829 4 2 0 93 5 1397 0 157 165 35 1061 12 118 196 52 2720 2 2 0 97 6 2754 0 202 157 14 1191 22 119 183 65 3291 3 2 0 95 7 2453 0 188 115 6 1077 16 112 204 61 4201 4 2 0 95 March 10, 2026 at 10:45:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2317 201 112 0 0 0 0 0 0 0 0 100 1 0 0 73 213 103 6 0 0 4 0 300 0 0 0 99 2 0 0 0 20 1 4 0 0 1 0 0 0 0 0 100 3 0 0 0 19 1 2 0 1 0 0 0 0 0 0 100 4 0 0 0 22 2 20 0 1 0 0 300 0 0 0 100 5 0 0 7 38 11 26 0 0 5 0 263 0 0 0 100 6 2 0 14 98 42 88 0 1 0 0 266 0 0 0 100 7 26 0 7 36 9 52 1 1 1 0 1393 0 0 0 100 March 10, 2026 at 10:45:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2381 201 118 0 1 0 0 0 0 1 0 99 1 0 0 46 278 103 18 1 1 2 0 317 0 1 0 99 2 0 0 0 79 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 78 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 89 8 4 0 0 0 0 300 0 0 0 100 5 1 0 469 14 2 10 0 0 2 0 268 0 0 0 100 6 0 0 14 183 53 114 0 0 0 0 276 0 0 0 100 7 0 0 0 104 10 56 1 1 1 0 1396 0 0 0 100 March 10, 2026 at 10:45:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2305 201 80 0 0 0 0 0 0 0 0 100 1 0 0 3 213 104 6 0 0 0 0 301 0 0 0 100 2 0 0 0 37 1 34 0 2 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 11 2 6 0 0 1 0 300 0 0 0 100 5 0 0 7 8 2 24 0 1 0 0 260 0 0 0 100 6 0 0 14 105 51 104 0 0 0 0 266 0 0 0 100 7 0 0 0 23 8 48 1 0 0 0 1391 0 0 0 100 March 10, 2026 at 10:45:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2609 0 133 2426 205 1110 32 183 103 66 3889 3 2 0 95 1 2005 0 361 300 110 1008 28 161 132 56 4474 3 2 0 95 2 43024 0 205 166 2 1158 41 172 207 86 4958 11 10 0 79 3 10681 0 45 245 2 961 37 142 201 65 3579 6 3 0 91 4 2256 0 32 134 4 1100 34 132 108 99 7843 5 2 0 93 5 1239 0 21 113 3 1011 27 144 103 72 3599 4 1 0 95 6 773 0 21 201 31 1086 21 122 81 49 3535 3 1 0 96 7 521 0 14 152 22 766 20 101 78 38 4394 2 2 0 96 March 10, 2026 at 10:45:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 3 2330 207 233 0 9 91 0 10 0 0 0 100 1 41 0 25 335 154 228 0 10 76 0 326 0 0 0 100 2 0 0 0 23 1 78 0 9 59 0 9 0 0 0 100 3 0 0 0 82 60 96 0 7 87 0 19 0 0 0 100 4 0 0 70 15 2 113 0 6 73 0 317 0 1 0 99 5 2 0 7 26 3 112 0 9 83 0 268 0 0 0 100 6 17 0 14 22 2 78 0 6 58 0 293 0 0 0 100 7 0 0 0 29 3 227 1 5 57 0 1403 0 0 0 100 March 10, 2026 at 10:45:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2362 217 122 0 6 3 0 0 0 0 0 100 1 0 0 4 364 148 125 0 8 1 0 309 0 0 0 100 2 0 0 0 47 1 10 0 5 2 0 0 0 0 0 100 3 0 0 0 46 2 10 0 4 3 0 0 0 0 0 100 4 0 0 28 47 3 12 0 2 7 0 300 0 0 0 99 5 0 0 245 14 3 16 0 2 8 0 263 0 0 0 100 6 0 0 14 49 3 12 0 1 3 0 267 0 0 0 100 7 0 0 0 55 5 66 0 3 3 0 1386 0 0 0 100 March 10, 2026 at 10:45:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2340 204 82 0 6 1 0 0 0 0 0 100 1 0 0 3 291 121 56 0 4 0 0 316 0 0 0 100 2 0 0 0 119 24 86 0 5 1 0 1 0 0 0 100 3 0 0 0 87 16 52 0 4 1 0 0 0 0 0 100 4 0 0 0 49 7 8 0 1 1 0 300 0 0 0 100 5 2 0 238 9 2 12 1 1 1 0 268 0 0 0 100 6 0 0 14 38 1 12 0 0 0 0 281 0 0 0 100 7 0 0 0 53 3 46 1 2 2 0 1384 0 0 0 100 March 10, 2026 at 10:45:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1979 0 41 2434 202 465 13 91 59 48 1876 3 2 0 95 1 7871 0 54 307 111 414 9 70 93 43 2954 2 2 0 96 2 8054 0 254 156 32 588 6 78 137 62 2698 2 3 0 95 3 2469 0 14 136 4 516 3 73 71 76 1979 1 1 0 98 4 761 0 21 112 15 458 3 67 52 41 2297 2 1 0 98 5 1423 0 13 136 9 417 2 55 54 48 2459 1 1 0 98 6 450 0 46 88 3 445 5 61 51 47 1406 1 1 0 98 7 1280 0 191 74 4 426 7 54 62 53 4279 1 1 0 98 March 10, 2026 at 10:45:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 866 0 4 2352 203 664 11 61 57 17 2304 2 1 0 97 1 26452 0 109 289 103 619 28 73 66 5 2446 8 6 0 85 2 1017 0 0 83 13 647 12 51 62 7 2551 4 1 0 95 3 3716 0 178 48 3 602 10 49 94 11 2134 3 2 0 95 4 5634 0 14 195 14 559 19 38 82 10 2317 4 2 0 94 5 856 0 7 136 30 593 6 38 49 35 1732 2 1 0 98 6 736 0 14 51 3 489 8 42 64 19 1924 1 1 0 98 7 182 0 43 52 3 472 9 38 24 11 2584 1 1 0 98 March 10, 2026 at 10:45:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2386 201 176 0 8 62 0 0 0 1 0 99 1 26 0 49 288 107 97 0 7 76 0 9 0 1 0 99 2 0 0 0 95 3 96 0 4 72 0 300 0 0 0 100 3 0 0 0 152 67 142 0 8 86 0 0 0 0 0 100 4 0 0 0 188 54 186 0 7 75 0 301 0 0 0 100 5 0 0 469 50 3 121 0 6 57 0 263 0 0 0 100 6 2 0 14 85 3 88 0 9 49 0 266 0 0 0 100 7 0 0 0 93 5 243 1 4 62 0 1374 0 0 0 100 March 10, 2026 at 10:45:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2306 201 108 0 0 0 0 0 0 0 0 100 1 0 0 11 220 108 16 0 1 0 0 10 0 0 0 100 2 0 0 0 20 3 14 0 0 0 0 300 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 4 0 0 0 108 51 102 0 0 0 0 300 0 0 0 100 5 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 6 0 0 14 10 3 8 0 0 0 0 266 0 0 0 100 7 0 0 0 15 3 38 1 0 0 0 1372 0 0 0 100 March 10, 2026 at 10:45:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2310 201 110 0 0 0 0 0 0 0 0 100 1 0 0 4 223 108 28 0 0 0 0 28 0 0 0 100 2 0 0 7 17 2 16 0 1 0 0 300 0 0 0 100 3 0 0 0 11 2 4 0 1 0 0 0 0 0 0 100 4 0 0 0 115 56 122 0 1 0 0 300 0 0 0 100 5 0 0 7 9 2 8 0 0 0 0 267 0 0 0 100 6 0 0 14 10 2 10 0 0 0 0 271 0 0 0 100 7 0 0 0 19 4 44 1 0 1 0 1374 0 0 0 100 March 10, 2026 at 10:45:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2997 0 28 2526 202 1190 29 148 145 68 3691 4 3 0 93 1 3510 0 98 398 106 944 29 126 102 55 3536 5 2 0 93 2 2447 0 15 124 4 757 15 96 133 50 5205 4 2 0 94 3 10568 0 204 107 3 886 22 108 228 72 4037 3 3 0 93 4 38689 0 44 175 18 915 21 105 168 60 4139 12 9 0 80 5 2218 0 332 81 3 866 21 122 93 70 3026 2 2 0 97 6 1453 0 136 140 24 933 12 101 95 78 3163 2 1 0 97 7 1151 0 21 141 14 758 7 75 70 59 5673 3 2 0 95 March 10, 2026 at 10:45:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 3 2330 205 124 0 2 0 0 18 0 0 0 100 1 12 0 18 223 103 8 0 1 3 0 25 0 0 0 100 2 0 0 0 30 2 22 0 2 0 0 320 0 0 0 100 3 15 0 0 29 5 10 0 0 0 0 16 0 0 0 100 4 0 0 7 19 1 6 0 1 0 0 312 0 0 0 100 5 26 0 77 15 3 8 0 0 5 0 269 0 0 0 99 6 4 0 14 23 2 12 1 0 9 0 277 0 0 0 100 7 0 0 0 131 54 144 1 4 2 0 1391 0 0 0 100 March 10, 2026 at 10:45:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2396 210 213 0 16 53 0 9 0 1 0 99 1 0 0 3 295 107 108 0 8 60 0 1 0 0 0 100 2 0 0 0 147 30 155 0 5 74 0 300 0 0 0 100 3 0 0 0 143 63 86 0 4 60 0 0 0 0 0 100 4 0 0 0 81 1 102 0 7 71 0 300 0 0 0 100 5 0 0 49 81 3 105 0 6 62 0 263 0 1 0 99 6 0 0 476 13 2 114 0 5 53 0 266 0 1 0 99 7 0 0 0 116 17 261 1 6 71 0 1375 0 0 0 100 March 10, 2026 at 10:45:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2316 207 142 0 1 0 0 10 0 0 0 100 1 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 5 1 0 7 8 2 4 0 0 0 0 260 0 0 0 100 6 0 0 14 11 3 10 0 0 0 0 267 0 0 0 100 7 0 0 0 16 4 42 1 1 1 0 1377 0 0 0 100 March 10, 2026 at 10:45:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1855 0 156 2425 209 1212 30 174 115 68 4398 2 3 0 95 1 1660 0 170 341 104 1040 35 168 101 50 3570 2 2 0 96 2 1116 0 7 191 37 1109 27 135 124 46 3537 2 2 0 96 3 44859 0 390 111 5 962 33 136 245 90 5665 14 11 0 75 4 8837 0 43 214 17 1007 24 125 182 78 4736 7 3 0 90 5 2769 0 37 191 7 1152 19 125 111 82 3964 3 1 0 95 6 905 0 36 120 3 932 25 119 96 72 3605 2 2 0 96 7 1450 0 8 121 4 821 18 100 102 63 5548 2 1 0 97 March 10, 2026 at 10:45:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 74 2307 201 118 0 1 5 0 15 0 1 0 99 1 23 0 17 224 104 26 0 2 0 0 9 0 0 0 100 2 0 0 0 22 2 10 0 1 0 0 305 0 0 0 100 3 27 0 0 35 7 20 2 1 0 0 17 0 0 0 100 4 0 0 0 22 1 10 0 2 0 0 317 0 0 0 100 5 17 0 7 125 53 112 0 2 2 0 286 0 0 0 100 6 8 0 21 23 4 24 0 2 6 0 281 0 0 0 100 7 1 0 0 31 4 43 1 1 1 0 1406 0 0 0 100 March 10, 2026 at 10:45:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 46 2372 201 74 0 2 2 0 0 0 1 0 99 1 0 0 3 283 102 12 0 0 0 0 1 0 0 0 100 2 0 0 0 81 2 4 0 0 0 0 300 0 0 0 100 3 0 0 0 92 8 14 0 0 0 0 9 0 0 0 100 4 0 0 0 79 1 2 0 0 0 0 300 0 0 0 100 5 0 0 7 180 33 104 0 2 0 0 263 0 0 0 100 6 0 0 476 33 10 32 0 2 2 0 267 0 0 0 100 7 0 0 0 108 14 64 1 2 1 0 1381 0 0 0 100 March 10, 2026 at 10:45:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2334 224 209 0 16 77 0 0 0 0 0 100 1 0 0 7 274 117 166 0 12 95 0 2 0 0 0 100 2 0 0 0 12 3 99 0 6 75 0 300 0 0 0 100 3 0 0 0 81 67 94 0 6 65 0 10 0 0 0 100 4 0 0 0 10 2 98 0 5 66 0 300 0 0 0 100 5 0 0 7 11 3 97 0 8 58 0 260 0 0 0 100 6 0 0 14 11 3 102 0 7 61 0 266 0 0 0 100 7 0 0 0 54 19 255 1 12 60 0 1383 0 0 0 100 March 10, 2026 at 10:45:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43 0 7 2380 239 248 1 34 28 20 321 0 1 0 99 1 163 0 11 339 113 215 3 21 15 21 1750 0 0 0 99 2 34 0 0 36 2 118 0 20 24 19 660 0 0 0 99 3 4286 0 13 51 11 129 2 22 73 20 879 1 1 0 98 4 2338 0 17 38 1 136 5 23 52 22 898 0 1 0 98 5 845 0 129 21 2 176 0 27 33 40 780 0 1 0 99 6 484 0 33 31 2 174 0 20 30 30 630 0 0 0 100 7 61 0 7 36 3 199 0 28 26 28 1686 0 0 0 99 March 10, 2026 at 10:45:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36506 0 37 2428 203 1201 46 189 87 52 4400 13 8 0 79 1 2088 0 67 396 104 1010 46 164 84 36 3708 4 2 0 94 2 1442 0 5 118 4 976 37 140 108 31 4053 3 2 0 95 3 5989 0 189 88 3 1033 29 118 108 45 3413 3 3 0 94 4 4618 0 186 173 12 1049 23 116 127 55 4222 3 2 0 94 5 932 0 124 179 49 981 24 113 44 58 4265 2 1 0 96 6 1764 0 104 164 2 947 28 99 95 34 3594 4 2 0 95 7 1591 0 8 126 5 901 22 94 101 49 5480 2 2 0 96 March 10, 2026 at 10:45:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2375 200 54 0 1 0 0 0 0 1 0 99 1 0 0 4 288 102 12 0 1 0 0 0 0 0 0 100 2 0 0 0 82 2 4 1 0 0 0 300 0 0 0 100 3 0 0 0 80 2 2 0 0 0 0 0 0 0 0 100 4 26 0 0 143 7 64 0 3 0 0 9 0 0 0 100 5 0 0 7 106 13 26 0 2 0 0 563 0 0 0 100 6 2 0 56 129 29 64 0 2 2 0 266 0 1 0 99 7 0 0 462 42 14 64 1 1 3 0 1381 0 1 0 99 March 10, 2026 at 10:45:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2303 200 104 0 0 0 0 0 0 0 0 100 1 0 0 3 216 102 10 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 3 0 0 0 10 2 4 0 0 1 0 0 0 0 0 100 4 0 0 0 18 7 30 0 1 1 0 9 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 561 0 0 0 100 6 0 0 14 9 3 8 0 0 0 0 267 0 0 0 100 7 0 0 0 118 54 142 1 1 0 0 1383 0 0 0 100 March 10, 2026 at 10:45:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2322 213 210 0 17 82 0 0 0 0 0 100 1 0 0 4 278 123 198 0 15 84 0 0 0 0 0 100 2 0 0 0 9 2 101 0 8 92 0 300 0 0 0 100 3 0 0 0 77 71 107 0 3 75 0 0 0 0 0 100 4 0 0 0 21 6 102 0 3 71 0 10 0 0 0 100 5 0 0 7 11 3 105 0 7 97 0 559 0 0 0 100 6 0 0 14 11 3 116 0 8 67 0 266 0 0 0 100 7 0 0 0 51 19 284 0 10 71 0 1381 0 0 0 100 March 10, 2026 at 10:45:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1018 0 18 2441 212 1105 24 142 99 68 3080 3 2 0 96 1 2649 0 200 341 111 999 18 118 109 74 4392 5 2 0 93 2 3213 0 370 149 13 957 25 126 119 71 4045 3 3 0 94 3 38196 0 25 139 4 1143 33 96 156 72 6984 11 8 0 81 4 5410 0 118 141 24 899 15 104 137 70 3698 3 2 0 95 5 4712 0 50 180 4 824 21 91 134 58 4142 4 3 0 93 6 6067 0 57 179 3 859 19 90 168 72 3396 4 2 0 94 7 2050 0 13 129 5 893 16 95 96 78 3687 3 1 0 95 March 10, 2026 at 10:45:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 3 2329 206 142 0 2 0 0 39 0 0 0 100 1 0 0 18 227 103 23 0 2 0 0 28 0 0 0 100 2 0 0 7 25 4 22 0 2 1 0 318 0 0 0 100 3 23 0 0 23 2 2 0 0 0 0 9 0 0 0 100 4 0 0 0 133 58 110 0 3 0 0 14 0 0 0 100 5 12 0 7 28 4 22 1 1 3 0 591 0 0 0 100 6 19 0 84 24 6 26 0 1 7 0 283 0 0 0 99 7 3 0 0 33 4 60 1 3 13 0 1393 0 0 0 99 March 10, 2026 at 10:45:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2388 206 118 0 0 1 0 9 0 1 0 99 1 0 0 3 282 103 26 0 1 0 0 0 0 0 0 100 2 0 0 0 83 2 6 0 0 0 0 300 0 0 0 100 3 0 0 0 80 2 4 0 1 0 0 21 0 0 0 100 4 0 0 0 185 50 108 0 0 0 0 0 0 0 0 100 5 0 0 7 84 4 8 0 0 0 0 564 0 0 0 100 6 0 0 56 77 3 10 0 0 2 0 267 0 1 0 99 7 0 0 462 21 4 42 0 0 3 0 1377 0 0 0 99 March 10, 2026 at 10:45:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2316 206 116 0 0 0 0 9 0 0 0 100 1 0 0 3 212 104 6 0 0 0 0 1 0 0 0 100 2 0 0 0 9 2 4 0 0 1 0 300 0 0 0 100 3 0 0 0 8 1 2 0 1 0 0 0 0 0 0 100 4 0 0 0 113 50 108 0 0 0 0 0 0 0 0 100 5 1 0 7 10 3 6 0 0 0 0 560 0 0 0 100 6 0 0 14 9 3 8 0 0 0 0 267 0 0 0 100 7 0 0 0 14 3 38 1 0 1 0 1375 0 0 0 100 March 10, 2026 at 10:45:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1639 0 157 2426 211 1258 18 145 198 63 4452 3 3 0 94 1 4936 0 252 396 121 1156 19 127 213 63 4364 4 2 0 93 2 1176 0 13 121 5 1096 14 123 155 57 3351 2 2 0 97 3 934 0 192 185 69 951 16 103 160 48 3405 2 1 0 97 4 588 0 11 169 27 1011 14 113 170 74 2480 2 2 0 97 5 11186 0 127 110 7 748 18 95 278 71 4425 4 4 0 93 6 40875 0 54 188 4 977 37 97 234 91 5769 11 9 0 80 7 1553 0 7 118 7 1166 13 103 173 85 3578 2 1 0 97 March 10, 2026 at 10:45:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 277 0 73 2312 201 111 2 9 15 0 264 0 1 0 99 1 254 0 32 225 103 26 0 5 6 1 73 0 0 0 100 2 0 0 0 26 2 12 1 3 1 0 350 0 0 0 100 3 23 0 0 25 2 31 0 3 3 0 20 0 0 0 99 4 1 0 7 50 0 44 2 7 0 0 162 0 0 0 100 5 373 0 7 29 4 36 0 6 8 1 656 2 0 0 98 6 53 0 14 42 9 45 5 3 1 0 359 2 0 0 98 7 16 0 0 127 51 166 2 7 8 0 1494 0 1 0 99 March 10, 2026 at 10:45:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 46 2372 200 116 0 0 2 0 3 0 1 0 99 1 0 0 3 289 106 18 0 0 0 0 20 0 0 0 100 2 0 0 0 82 2 6 1 0 0 0 300 0 0 0 100 3 0 0 0 78 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 86 5 2 0 0 0 0 0 0 0 0 100 5 0 0 7 82 3 12 0 1 0 0 569 0 0 0 100 6 0 0 14 91 8 22 0 0 0 0 277 0 0 0 100 7 0 0 462 124 54 146 1 1 3 0 1380 0 1 0 99 March 10, 2026 at 10:45:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2307 205 110 0 6 0 0 0 0 0 0 100 1 0 0 3 271 132 66 0 3 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 3 0 0 0 8 1 2 0 1 0 0 0 0 0 0 100 4 0 0 0 5 0 20 0 1 1 0 0 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 561 0 0 0 100 6 0 0 14 17 7 16 0 0 0 0 274 0 0 0 100 7 0 0 0 54 19 76 1 2 1 0 1377 0 0 0 100 March 10, 2026 at 10:45:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2342 236 108 0 4 0 0 0 0 0 0 100 1 0 0 3 314 117 108 0 5 0 0 0 0 0 0 100 2 0 0 0 9 2 6 0 1 0 0 300 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 7 0 22 0 0 0 0 0 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 560 0 0 0 100 6 0 0 14 21 9 20 0 0 0 0 276 0 0 0 100 7 0 0 0 16 4 40 1 1 0 0 1381 0 0 0 100 March 10, 2026 at 10:45:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3974 0 168 2529 210 1225 41 199 160 67 5255 3 3 0 94 1 2821 0 261 337 112 1147 30 182 209 69 4609 5 2 0 93 2 2239 0 124 115 5 1089 22 158 160 73 4632 3 2 0 95 3 34173 0 26 262 64 1077 33 154 190 69 3664 10 8 0 82 4 2440 0 31 118 2 832 23 122 170 50 3226 4 2 0 94 5 9935 0 199 105 4 938 22 108 246 66 4380 4 3 0 93 6 5812 0 30 170 26 962 21 127 219 71 3781 2 3 0 95 7 1765 0 11 154 14 1228 8 131 190 96 4514 3 2 0 95 March 10, 2026 at 10:45:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 73 2330 225 109 0 7 6 0 0 0 1 0 99 1 26 0 3 307 120 88 0 4 0 0 10 0 0 0 100 2 0 0 0 23 3 8 1 1 0 0 300 0 0 0 100 3 0 0 0 19 2 0 0 0 0 0 0 0 0 0 100 4 0 0 0 18 0 2 0 0 1 0 0 0 0 0 100 5 0 0 7 23 3 28 0 2 0 0 563 0 0 0 100 6 2 0 21 19 3 10 0 1 0 0 267 0 0 0 100 7 0 0 0 58 18 76 0 1 6 0 1387 0 0 0 99 March 10, 2026 at 10:45:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 46 2376 206 118 0 7 3 0 0 0 1 0 99 1 0 0 3 361 140 90 0 5 1 0 23 0 0 0 100 2 0 0 0 121 18 45 0 2 0 0 301 0 0 0 100 3 0 0 0 78 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 83 6 0 0 0 0 0 0 0 0 0 100 5 0 0 7 84 3 12 0 1 0 0 568 0 0 0 100 6 0 0 14 83 2 34 0 1 0 0 272 0 0 0 100 7 0 0 462 22 3 48 1 1 3 0 1383 0 1 0 99 March 10, 2026 at 10:45:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2338 233 111 0 3 2 0 0 0 0 0 100 1 0 0 4 316 124 112 0 3 0 0 8 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 7 12 4 8 0 0 0 0 561 0 0 0 100 6 0 0 14 9 3 8 0 0 0 0 267 0 0 0 100 7 0 0 0 16 4 40 1 0 0 0 1385 0 0 0 100 March 10, 2026 at 10:45:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23032 0 41 2516 201 1167 45 201 646 58 5284 11 6 0 83 1 18858 0 104 386 130 1130 30 160 718 73 4057 7 4 0 89 2 2746 0 10 172 15 1069 33 154 144 67 4501 4 2 0 93 3 30290 0 436 122 11 1076 33 138 790 73 3832 10 8 0 82 4 7616 0 4 229 10 846 21 102 472 64 3883 4 2 0 94 5 6058 0 148 101 3 917 27 110 309 77 5845 3 3 0 94 6 17150 0 210 176 3 863 22 109 486 41 3454 7 4 0 89 7 11152 0 56 189 3 885 37 109 332 64 4534 7 3 0 90 March 10, 2026 at 10:45:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 10 2323 201 87 2 10 60 0 19 0 1 0 99 1 28 0 88 221 106 105 0 8 76 0 21 0 1 0 99 2 0 0 0 32 3 99 0 10 61 0 315 0 0 0 100 3 1 0 0 182 70 208 0 15 68 0 11 0 0 0 100 4 8 0 0 121 41 203 0 11 83 0 9 0 0 0 100 5 0 0 7 28 4 117 0 5 106 0 573 0 0 0 100 6 23 0 14 30 6 186 0 8 73 0 287 0 0 0 100 7 15 0 0 38 6 167 2 10 115 0 1388 0 1 0 99 March 10, 2026 at 10:45:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2361 200 2 0 0 0 0 0 0 0 0 100 1 0 0 38 274 108 20 0 1 3 0 9 0 2 0 98 2 0 0 0 74 2 14 0 0 0 0 300 0 0 0 100 3 0 0 0 163 2 102 0 1 0 0 0 0 0 0 100 4 0 0 0 62 1 0 0 0 0 0 0 0 0 0 100 5 0 0 7 163 52 106 0 1 0 0 564 0 0 0 100 6 0 0 14 62 2 6 0 0 0 0 266 0 0 0 100 7 0 0 350 19 3 44 1 0 4 0 1376 0 1 0 99 March 10, 2026 at 10:45:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2318 200 44 0 1 1 0 0 0 0 0 100 1 0 0 3 243 108 46 0 2 0 0 14 0 0 0 100 2 0 0 0 35 2 16 0 0 0 0 300 0 0 0 100 3 0 0 0 90 2 66 0 0 0 0 0 0 0 0 100 4 0 0 0 26 5 0 0 0 0 0 0 0 0 0 100 5 0 0 7 74 27 56 0 0 0 0 566 0 0 0 100 6 0 0 14 55 18 48 0 1 0 0 279 0 0 0 100 7 0 0 112 40 15 70 1 1 0 0 1377 0 0 0 100 March 10, 2026 at 10:45:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3388 0 134 2376 205 608 14 76 99 59 4376 2 2 0 96 1 4842 0 65 344 120 519 8 81 120 52 2501 2 2 0 96 2 3211 0 16 135 14 492 2 70 105 42 2239 1 1 0 97 3 1621 0 147 65 3 427 5 59 84 62 1522 1 1 0 98 4 548 0 6 87 1 495 7 75 67 71 3384 1 1 0 98 5 1099 0 201 86 10 446 3 58 45 50 2694 1 1 0 98 6 171 0 18 82 2 381 6 59 40 50 1458 1 0 0 99 7 27544 0 30 190 19 383 12 42 56 36 1754 9 7 0 84 March 10, 2026 at 10:45:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1256 0 3 2363 203 536 21 89 70 10 3484 2 2 0 97 1 3898 0 211 253 103 567 20 81 82 28 2402 3 2 0 95 2 2978 0 9 162 29 615 16 92 109 21 2342 2 1 0 97 3 1173 0 73 55 4 535 19 88 84 21 1712 1 1 0 98 4 522 0 0 50 2 446 12 52 46 13 1432 3 1 0 97 5 2612 0 19 211 24 523 18 63 65 10 1851 2 1 0 97 6 813 0 15 57 4 460 17 53 51 14 1590 3 1 0 97 7 1018 0 7 64 4 386 19 56 59 11 1457 1 3 0 96 March 10, 2026 at 10:45:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2380 202 220 1 9 81 0 1378 0 1 0 99 1 26 0 3 308 111 167 0 12 70 0 8 0 0 0 100 2 0 0 0 100 9 129 0 11 77 0 300 0 0 0 100 3 0 0 42 232 119 198 0 12 72 0 0 0 1 0 99 4 0 0 0 79 0 108 0 6 79 0 0 0 0 0 100 5 0 0 7 100 3 110 0 5 66 0 564 0 0 0 100 6 2 0 14 80 2 229 0 13 62 0 266 0 0 0 100 7 0 0 462 16 1 111 0 10 67 0 0 0 0 0 100 March 10, 2026 at 10:45:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2307 202 134 0 0 1 0 1381 0 1 0 99 1 0 0 3 230 109 26 0 3 0 0 8 0 0 0 100 2 0 0 0 11 2 26 0 1 0 0 300 0 0 0 100 3 0 0 0 104 49 96 0 0 0 0 0 0 0 0 100 4 0 0 0 9 2 6 0 1 0 0 0 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 559 0 0 0 100 6 0 0 14 9 3 8 0 0 0 0 267 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 March 10, 2026 at 10:45:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2311 202 144 1 3 0 0 1382 0 1 0 99 1 0 0 4 224 108 22 0 1 0 0 16 0 0 0 100 2 0 0 0 13 3 10 0 0 0 0 301 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 110 55 100 0 0 0 0 0 0 0 0 100 5 0 0 7 10 3 10 0 0 0 0 568 0 0 0 100 6 0 0 14 11 4 18 0 0 0 0 280 0 0 0 100 7 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:45:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4964 0 336 2415 207 1122 35 162 117 68 5047 5 6 0 89 1 1511 0 103 349 111 1080 28 153 148 65 4825 2 2 0 95 2 10791 0 126 119 3 959 16 137 249 67 5225 4 4 0 92 3 6421 0 21 241 19 1006 18 140 156 83 4204 2 2 0 96 4 34715 0 16 156 14 964 18 128 132 69 3474 12 7 0 81 5 1952 0 196 135 20 1032 12 99 95 82 4851 3 2 0 96 6 2490 0 61 214 9 910 21 111 71 61 3403 5 2 0 94 7 314 0 15 124 3 726 20 85 61 47 3121 2 1 0 97 March 10, 2026 at 10:45:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 3 2331 208 121 1 3 2 0 1381 0 1 0 99 1 0 0 73 215 102 8 0 1 6 0 0 0 1 0 99 2 0 0 0 22 2 6 0 0 0 0 300 0 0 0 100 3 0 0 0 126 50 126 0 3 0 0 0 0 0 0 100 4 0 0 7 17 0 4 0 1 0 0 0 0 0 0 100 5 0 0 7 51 5 34 0 3 0 0 564 0 0 0 100 6 3 0 14 18 2 6 0 0 0 0 269 0 0 0 100 7 0 0 0 26 3 10 0 1 6 0 0 0 0 0 100 March 10, 2026 at 10:45:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2398 210 234 0 10 76 0 1380 0 1 0 99 1 0 0 49 282 104 90 0 8 67 0 1 0 1 0 99 2 0 0 0 86 3 84 0 4 87 0 300 0 0 0 100 3 0 0 0 170 71 138 0 7 61 0 0 0 0 0 100 4 0 0 0 102 7 103 0 9 71 0 0 0 0 0 100 5 0 0 7 137 30 150 0 5 69 0 560 0 0 0 100 6 0 0 14 80 2 201 0 9 81 0 266 0 0 0 100 7 0 0 462 25 5 95 0 6 74 0 2 0 0 0 100 March 10, 2026 at 10:45:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2319 207 146 1 0 0 0 1380 0 1 0 99 1 0 0 4 210 103 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 15 0 30 0 1 0 0 0 0 0 0 100 5 0 0 7 110 53 106 0 0 0 0 560 0 0 0 100 6 0 0 14 5 1 4 0 0 0 0 266 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:45:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1190 0 32 2445 209 1073 33 154 104 64 4966 2 2 0 96 1 1727 0 69 336 105 878 33 145 103 60 4645 5 2 0 93 2 3293 0 34 195 6 839 25 125 130 43 3034 3 2 0 95 3 11041 0 247 103 9 886 22 108 226 83 4362 3 4 0 93 4 39927 0 29 196 6 950 23 108 168 75 5590 11 8 0 81 5 1240 0 29 165 32 845 13 96 132 69 3434 2 1 0 97 6 3388 0 195 122 13 899 10 92 135 69 3297 4 2 0 94 7 1367 0 186 98 5 708 24 91 89 66 2558 3 1 0 96 March 10, 2026 at 10:45:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 17 2323 206 142 1 6 1 0 1651 0 1 0 99 1 0 0 18 221 103 10 0 1 0 0 14 0 0 0 100 2 19 0 70 72 30 70 0 2 6 0 335 0 1 0 99 3 12 0 0 57 17 38 0 4 0 0 6 0 0 0 100 4 0 0 0 39 9 20 1 1 3 0 10 0 0 0 100 5 0 0 7 33 3 20 0 1 0 0 574 0 0 0 100 6 0 0 7 19 1 6 0 2 2 0 9 0 0 0 100 7 28 0 0 30 5 22 0 3 6 0 17 0 0 0 100 March 10, 2026 at 10:45:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2344 204 140 1 0 2 0 1641 0 1 0 99 1 0 0 4 246 104 6 0 0 0 0 0 0 0 0 100 2 0 0 7 50 4 12 0 0 4 0 303 0 0 0 100 3 0 0 0 40 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 139 50 100 0 0 0 0 0 0 0 0 100 5 0 0 7 52 3 14 0 0 0 0 564 0 0 0 100 6 0 0 0 43 0 6 0 1 0 0 0 0 0 0 100 7 0 0 231 20 6 38 0 3 5 0 10 0 0 0 100 March 10, 2026 at 10:45:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2352 204 246 0 7 70 0 1641 0 1 0 99 1 0 0 3 254 105 111 0 6 57 0 0 0 0 0 100 2 0 0 35 46 2 125 0 8 72 0 300 0 1 0 99 3 0 0 0 103 60 87 0 5 72 0 0 0 0 0 100 4 0 0 0 143 50 198 0 6 58 0 0 0 0 0 100 5 0 0 7 58 3 102 1 7 65 0 560 0 0 0 100 6 0 0 0 43 0 165 0 7 37 0 0 0 0 0 100 7 0 0 231 23 4 117 0 6 61 0 7 0 0 0 100 March 10, 2026 at 10:45:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1233 0 37 2451 205 591 11 72 76 53 4210 1 1 0 97 1 15185 0 165 290 105 426 10 80 60 40 1989 4 3 0 93 2 2246 0 26 109 5 410 9 62 48 46 1595 3 1 0 96 3 490 0 19 81 1 375 5 69 85 41 1419 1 1 0 98 4 7588 0 131 160 44 521 14 58 153 39 3923 3 2 0 95 5 2383 0 22 108 9 472 12 91 83 59 2290 1 1 0 98 6 228 0 21 80 1 402 11 76 56 55 1314 1 1 0 98 7 1473 0 205 83 8 383 6 47 60 50 2076 2 1 0 97 March 10, 2026 at 10:46:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 576 0 26 2373 205 1085 50 176 75 19 5426 3 2 0 96 1 19686 0 38 284 108 973 49 152 59 13 3281 8 5 0 86 2 992 0 0 130 19 1066 38 152 62 13 3201 2 1 0 97 3 2416 0 81 63 3 845 31 131 88 9 2799 6 2 0 93 4 3683 0 179 57 7 809 36 102 77 23 3277 4 2 0 94 5 3944 0 10 142 10 777 23 94 105 15 3309 2 2 0 96 6 686 0 0 149 28 975 33 110 44 30 2423 2 1 0 97 7 1094 0 1 72 2 769 24 89 85 13 2626 2 1 0 97 March 10, 2026 at 10:46:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 18 2379 204 116 2 2 1 0 1745 1 1 0 98 1 0 0 3 308 110 53 0 6 0 0 0 0 0 0 100 2 0 0 0 117 19 42 0 1 0 0 302 0 0 0 100 3 0 0 42 74 1 2 0 1 2 0 0 0 0 0 100 4 0 0 0 77 0 2 0 0 0 0 0 0 0 0 100 5 0 0 7 84 4 8 0 0 0 0 565 0 0 0 100 6 0 0 0 147 29 70 0 2 1 0 1 0 0 0 100 7 26 0 462 33 6 24 0 0 2 0 9 0 0 0 100 March 10, 2026 at 10:46:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2312 205 142 1 4 0 0 1652 0 1 0 99 1 0 0 3 231 112 24 0 1 0 0 0 0 0 0 100 2 0 0 0 93 42 86 0 2 0 0 300 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 559 0 0 0 100 6 0 0 0 7 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 27 6 22 0 0 0 0 9 0 0 0 100 March 10, 2026 at 10:46:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2316 208 237 0 11 90 0 1650 0 1 0 99 1 0 0 3 281 136 161 0 6 88 0 1 0 0 0 100 2 0 0 0 52 19 167 0 12 73 0 302 0 0 0 100 3 0 0 0 63 57 88 0 4 82 0 0 0 0 0 100 4 0 0 0 7 1 96 0 3 52 0 0 0 0 0 100 5 0 0 7 13 4 92 0 4 90 0 561 0 0 0 100 6 0 0 0 9 2 179 0 8 71 0 1 0 0 0 100 7 0 0 0 27 8 100 0 5 84 0 9 0 0 0 100 March 10, 2026 at 10:46:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36725 0 146 2497 207 1359 42 199 129 90 6635 12 9 0 80 1 851 0 70 341 119 1159 23 162 87 66 3344 2 1 0 97 2 903 0 17 169 12 967 24 139 96 61 4761 3 1 0 96 3 2727 0 30 154 19 903 25 126 111 46 3169 3 2 0 95 4 5203 0 124 99 4 857 23 117 192 63 4005 3 3 0 94 5 8668 0 391 117 9 787 16 115 198 79 4055 3 4 0 93 6 7420 0 36 182 2 835 20 109 151 72 3815 5 2 0 92 7 1834 0 29 140 8 874 15 101 156 85 4304 4 1 0 95 March 10, 2026 at 10:46:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 18 2325 206 152 1 3 6 0 1674 0 1 0 99 1 0 0 17 228 104 16 0 3 0 0 22 0 0 0 100 2 5 0 7 34 4 28 0 4 2 0 309 0 0 0 100 3 0 0 0 81 30 65 0 4 0 0 13 0 0 0 100 4 20 0 0 63 24 42 0 2 4 0 10 0 0 0 100 5 26 0 7 23 3 12 1 0 1 0 579 0 0 0 100 6 28 0 0 32 6 26 0 1 0 0 43 0 0 0 100 7 6 0 70 16 1 22 0 2 5 0 9 0 0 0 100 March 10, 2026 at 10:46:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 480 2314 203 142 1 0 1 0 1653 0 1 0 99 1 0 0 3 283 103 4 0 0 0 0 0 0 0 0 100 2 0 0 0 89 3 10 0 0 0 0 300 0 0 0 100 3 0 0 0 86 1 10 0 3 1 0 0 0 0 0 100 4 0 0 0 177 50 122 0 1 0 0 0 0 0 0 100 5 0 0 7 82 3 6 0 0 0 0 560 0 0 0 100 6 0 0 0 89 6 14 0 0 0 0 9 0 0 0 100 7 0 0 42 77 1 8 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:46:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2309 203 138 1 0 0 0 1653 0 1 0 99 1 0 0 4 210 103 6 0 1 0 0 0 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 302 0 0 0 100 3 0 0 0 14 1 8 0 0 0 0 0 0 0 0 100 4 0 0 0 106 50 124 0 1 0 0 0 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 560 0 0 0 100 6 0 0 0 15 5 14 0 0 1 0 8 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:46:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 975 0 24 2438 206 1180 23 154 184 77 4893 4 2 0 94 1 978 0 70 321 108 1046 15 151 193 69 3931 3 2 0 95 2 3374 0 139 232 30 1198 13 125 216 64 4451 3 3 0 94 3 35229 0 38 177 54 1011 21 119 151 59 3622 11 8 0 81 4 1370 0 27 181 11 860 10 101 188 38 2657 2 2 0 97 5 11055 0 312 110 5 798 25 106 293 68 4421 3 4 0 93 6 7892 0 38 194 10 951 18 85 219 67 4076 5 2 0 93 7 2453 0 189 107 7 1048 13 104 178 86 4661 3 2 0 96 March 10, 2026 at 10:46:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 17 2319 204 92 0 2 7 0 570 0 1 0 99 1 41 0 17 235 109 25 0 3 0 0 35 0 0 0 100 2 12 0 0 104 42 90 0 4 4 0 318 0 0 0 100 3 0 0 0 48 14 28 0 1 1 0 11 0 0 0 100 4 0 0 70 28 2 26 0 4 6 0 5 0 0 0 100 5 1 0 14 54 5 62 0 6 3 0 570 0 0 0 100 6 26 0 0 24 2 9 0 1 1 0 14 0 0 0 100 7 3 0 0 29 3 10 1 1 0 0 10 0 0 0 100 March 10, 2026 at 10:46:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 521 2311 207 145 1 7 1 0 1352 0 1 0 99 1 0 0 4 345 130 72 0 4 2 0 310 0 0 0 100 2 0 0 0 93 8 21 0 1 2 0 301 0 0 0 100 3 0 0 0 120 20 40 0 2 0 0 0 0 0 0 100 4 0 0 0 97 8 14 0 1 1 0 0 0 0 0 100 5 0 0 7 88 3 16 1 1 0 0 572 0 0 0 100 6 2 0 2 81 2 42 0 2 0 0 22 0 0 0 100 7 0 0 0 83 1 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:46:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2308 202 42 1 0 0 0 1354 0 1 0 99 1 0 0 3 225 110 18 0 0 0 0 303 0 0 0 100 2 0 0 0 89 34 84 0 6 0 0 302 0 0 0 100 3 0 0 0 30 8 26 0 3 0 0 21 0 0 0 100 4 0 0 0 107 13 104 0 8 0 0 0 0 0 0 100 5 0 0 7 12 4 8 0 0 0 0 561 0 0 0 100 6 0 0 0 7 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:46:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 211 0 27 2354 202 352 5 56 58 39 2986 0 1 0 99 1 2879 0 23 343 112 218 5 38 64 36 1428 2 1 0 98 2 931 0 196 46 4 236 2 38 35 34 957 0 1 0 98 3 433 0 14 109 10 281 1 40 31 40 567 0 0 0 99 4 203 0 3 102 10 252 4 38 54 31 618 0 0 0 99 5 4531 0 18 129 35 294 7 38 101 25 1676 1 2 0 98 6 2127 0 22 53 1 150 1 28 49 21 780 0 1 0 98 7 1498 0 122 41 2 213 5 33 52 31 1022 1 1 0 98 March 10, 2026 at 10:46:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 883 0 35 2402 204 999 28 137 180 32 4429 2 2 0 96 1 653 0 78 313 105 933 33 131 132 34 2187 2 1 0 96 2 2098 0 10 105 10 926 25 117 150 41 2872 4 1 0 94 3 766 0 73 205 96 865 14 105 202 28 2921 2 1 0 97 4 674 0 10 95 2 798 18 104 155 15 2139 2 1 0 97 5 39786 0 308 65 5 653 20 69 135 41 5786 11 9 0 81 6 4522 0 17 170 11 806 9 81 172 35 3040 4 2 0 95 7 1564 0 18 132 3 873 24 95 175 52 3176 3 1 0 96 March 10, 2026 at 10:46:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 478 2313 209 137 1 8 1 0 1368 0 1 0 99 1 0 0 3 298 106 20 0 5 0 0 0 0 0 0 100 2 26 0 0 151 36 74 0 1 1 0 303 0 0 0 100 3 0 0 42 106 14 36 0 3 1 0 300 0 0 0 100 4 0 0 0 87 0 10 0 0 0 0 0 0 0 0 100 5 0 0 7 84 3 6 0 0 0 0 562 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 83 1 6 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:46:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2308 202 134 0 2 1 0 1364 0 1 0 99 1 0 0 3 226 105 46 0 2 1 0 13 0 0 0 100 2 0 0 0 89 42 88 0 1 0 0 305 0 0 0 100 3 0 0 0 42 19 38 0 2 0 0 300 0 0 0 100 4 0 0 0 17 6 6 0 1 0 0 0 0 0 0 100 5 0 0 7 10 3 10 0 0 0 0 568 0 0 0 100 6 0 0 0 5 0 6 0 0 0 0 3 0 0 0 100 7 0 0 0 19 2 18 0 1 0 0 1 0 0 0 100 March 10, 2026 at 10:46:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2306 202 136 1 0 0 0 1359 0 1 0 99 1 0 0 4 212 103 6 0 1 1 0 0 0 0 0 100 2 0 0 0 21 8 38 0 1 0 0 302 0 0 0 100 3 0 0 0 70 33 62 0 0 0 0 300 0 0 0 100 4 0 0 0 47 20 44 0 2 0 0 0 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 560 0 0 0 100 6 0 0 0 5 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:46:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1352 0 35 2436 202 1383 28 159 103 75 6910 3 2 0 95 1 491 0 67 319 103 1052 28 172 91 60 4476 4 1 0 95 2 2540 0 126 114 11 976 16 108 130 67 3968 3 2 0 95 3 3195 0 34 192 3 986 30 127 114 51 3980 4 2 0 94 4 859 0 18 153 19 874 15 107 136 39 3548 2 2 0 97 5 45651 0 507 138 22 923 25 101 224 62 5190 13 11 0 76 6 8047 0 42 178 2 777 19 116 162 93 4111 5 2 0 93 7 1180 0 15 131 11 1009 18 121 119 88 3032 3 1 0 96 March 10, 2026 at 10:46:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 17 2319 202 226 2 7 81 0 1379 0 1 0 99 1 1 0 24 226 104 146 0 12 80 0 14 0 0 0 100 2 11 0 0 27 3 105 0 6 68 0 319 0 0 0 100 3 26 0 0 81 61 96 0 6 75 0 310 0 0 0 100 4 0 0 0 22 2 105 0 8 72 0 14 0 0 0 100 5 0 0 0 125 51 181 0 6 72 0 309 0 0 0 100 6 0 0 77 15 3 187 0 9 58 0 272 0 1 0 99 7 40 0 0 39 5 120 1 7 63 0 17 0 0 0 100 March 10, 2026 at 10:46:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 479 2314 202 138 0 0 1 0 1354 0 1 0 99 1 0 0 3 284 103 8 0 2 0 0 0 0 0 0 100 2 0 0 0 85 4 10 0 1 0 0 296 0 0 0 100 3 0 0 0 83 2 4 1 0 0 0 300 0 0 0 100 4 0 0 0 79 1 22 0 1 0 0 0 0 0 0 100 5 0 0 0 181 51 104 0 1 0 0 300 0 0 0 100 6 2 0 49 78 3 10 0 0 1 0 266 0 0 0 100 7 0 0 0 99 6 22 0 0 0 0 9 0 0 0 100 March 10, 2026 at 10:46:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 16 2306 202 142 1 0 0 0 1356 0 1 0 99 1 0 0 5 216 106 18 0 0 0 0 19 0 0 0 100 2 0 0 0 13 4 10 0 0 0 0 295 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 15 7 2 0 0 0 0 0 0 0 0 100 5 0 0 0 109 51 108 0 0 0 0 308 0 0 0 100 6 0 0 7 10 2 8 0 0 0 0 264 0 0 0 100 7 0 0 0 29 6 28 0 0 0 0 9 0 0 0 100 March 10, 2026 at 10:46:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6043 0 43 2499 205 1145 36 183 173 84 5873 4 3 0 93 1 1543 0 83 348 108 1137 21 165 98 81 3563 2 1 0 97 2 2157 0 249 138 10 1134 26 143 92 77 4884 2 2 0 95 3 854 0 31 122 4 853 15 125 121 71 4931 2 2 0 96 4 1844 0 18 128 5 695 16 102 79 53 2727 4 2 0 94 5 37620 0 17 162 15 814 23 105 161 52 3745 13 8 0 79 6 6084 0 224 154 26 873 14 120 175 82 4259 4 3 0 94 7 6894 0 216 180 6 744 15 97 150 65 3423 3 2 0 95 March 10, 2026 at 10:46:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39 0 52 2315 202 135 2 3 5 0 1397 2 1 0 97 1 46 0 18 221 103 14 0 4 1 0 31 0 0 0 100 2 0 0 0 40 10 23 0 2 2 0 308 0 0 0 100 3 0 0 0 72 27 60 0 3 0 0 305 0 0 0 100 4 0 0 0 67 19 53 1 3 0 0 18 0 0 0 100 5 27 0 7 29 4 25 0 2 2 0 28 0 0 0 100 6 15 0 42 24 5 44 0 4 5 0 576 0 0 0 100 7 12 0 0 32 2 18 0 2 2 0 26 0 0 0 100 March 10, 2026 at 10:46:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2381 202 155 0 4 58 0 1353 0 1 0 99 1 0 0 465 223 104 100 0 7 67 0 1 0 0 0 100 2 0 0 0 90 6 99 0 9 74 0 296 0 0 0 100 3 0 0 0 137 57 89 0 6 67 0 300 0 0 0 100 4 0 0 0 182 52 204 0 8 97 0 0 0 0 0 100 5 0 0 0 95 7 106 0 6 52 0 9 0 0 0 100 6 0 0 49 159 4 259 0 11 47 0 564 0 1 0 99 7 0 0 0 90 1 94 0 7 65 0 0 0 0 0 100 March 10, 2026 at 10:46:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2307 202 40 1 0 0 0 1353 0 1 0 99 1 0 0 4 212 104 6 0 0 0 0 1 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 4 0 0 0 19 5 14 0 3 0 0 0 0 0 0 100 5 0 0 0 19 6 14 0 0 0 0 9 0 0 0 100 6 0 0 7 107 28 122 0 6 0 0 560 0 0 0 100 7 0 0 0 103 21 102 0 2 0 0 0 0 0 0 100 March 10, 2026 at 10:46:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2338 234 135 2 7 0 0 1356 0 1 0 99 1 0 0 3 299 118 100 0 6 0 0 20 0 0 0 100 2 0 0 0 13 4 10 0 0 1 0 296 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 299 0 0 0 100 4 0 0 0 14 6 2 0 0 0 0 0 0 0 0 100 5 0 0 0 18 5 16 1 0 0 0 10 0 0 0 100 6 0 0 7 26 6 24 0 3 0 0 561 0 0 0 100 7 0 0 0 29 3 46 0 3 0 0 1 0 0 0 100 March 10, 2026 at 10:46:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8921 0 175 2482 206 1229 44 196 200 86 6758 6 4 0 90 1 34049 0 88 348 103 1236 37 178 117 102 4790 10 8 0 82 2 1774 0 19 215 8 1170 28 168 110 80 5844 4 2 0 94 3 2552 0 199 134 14 944 29 133 118 58 4286 3 2 0 95 4 841 0 8 179 30 1008 27 122 81 51 3060 2 1 0 96 5 1619 0 16 129 7 1021 28 106 107 61 3698 4 2 0 95 6 762 0 21 129 6 1000 16 106 119 38 3846 2 2 0 96 7 12620 0 316 169 4 988 31 111 204 80 4116 7 4 0 89 March 10, 2026 at 10:46:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 17 2318 202 132 1 3 1 0 1363 0 1 0 99 1 0 0 4 223 103 6 0 0 6 0 0 0 0 0 100 2 0 0 0 50 3 32 0 0 0 0 296 0 0 0 100 3 0 0 70 15 4 8 0 0 6 0 301 0 0 0 99 4 0 0 0 18 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 118 50 102 0 0 0 0 0 0 0 0 100 6 26 0 14 32 8 18 0 0 0 0 571 0 0 0 100 7 0 0 0 30 1 14 0 1 1 0 0 0 0 0 100 March 10, 2026 at 10:46:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2382 202 189 0 9 65 0 1353 0 1 0 99 1 0 0 465 246 104 129 0 10 85 0 1 0 0 0 100 2 0 0 0 81 2 101 0 9 62 0 294 0 0 0 100 3 0 0 42 139 62 110 0 8 72 0 300 0 1 0 99 4 0 0 0 79 1 109 0 10 67 0 0 0 0 0 100 5 0 0 0 180 50 183 0 4 80 0 0 0 0 0 100 6 0 0 7 97 9 199 0 10 42 0 569 0 0 0 100 7 0 0 0 87 0 116 0 8 69 0 0 0 0 0 100 March 10, 2026 at 10:46:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2306 202 138 1 1 0 0 1353 0 1 0 99 1 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 6 0 0 1 0 296 0 0 0 100 3 0 0 0 10 3 4 0 0 1 0 300 0 0 0 100 4 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 5 0 0 0 107 50 100 0 0 0 0 0 0 0 0 100 6 0 0 7 24 10 20 0 0 0 0 570 0 0 0 100 7 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:46:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39712 0 320 2393 205 1288 29 164 171 58 6526 11 10 0 79 1 4428 0 269 330 106 1056 31 151 124 80 4005 3 3 0 94 2 2340 0 9 146 7 933 26 126 100 55 3714 4 2 0 94 3 6471 0 126 126 10 845 19 100 131 66 4222 5 2 0 92 4 7232 0 36 253 20 826 24 98 129 65 4676 5 2 0 93 5 1333 0 19 152 25 943 19 104 147 54 3201 2 1 0 97 6 1167 0 19 144 9 1002 7 92 106 63 4900 2 2 0 96 7 874 0 10 125 5 880 17 89 104 64 2863 2 1 0 97 March 10, 2026 at 10:46:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 80 2317 205 87 1 6 7 0 1125 0 1 0 99 1 26 0 32 227 106 22 0 2 6 0 294 0 0 0 100 2 4 0 0 24 3 12 0 1 3 0 304 0 0 0 100 3 1 0 0 29 5 14 1 0 0 0 326 0 0 0 100 4 23 0 0 86 15 88 1 3 0 0 9 0 0 0 100 5 0 0 0 26 3 6 0 1 0 0 12 0 0 0 100 6 0 0 7 125 39 112 0 2 0 0 564 0 0 0 100 7 2 0 0 32 1 20 1 3 1 0 25 0 0 0 100 March 10, 2026 at 10:46:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 39 2368 207 150 0 0 3 0 1102 0 1 0 99 1 0 0 367 218 104 16 0 2 3 0 266 0 0 0 100 2 0 0 0 64 2 4 0 0 1 0 294 0 0 0 100 3 0 0 0 65 3 4 0 0 0 0 300 0 0 0 100 4 0 0 0 60 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 62 1 2 0 0 0 0 0 0 0 0 100 6 0 0 7 173 57 114 0 0 0 0 567 0 0 0 100 7 0 0 0 70 0 12 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:46:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2344 211 217 1 10 66 0 1101 0 1 0 99 1 0 0 133 290 139 163 0 9 48 0 267 0 0 0 100 2 0 0 0 52 11 109 0 7 64 0 296 0 0 0 100 3 0 0 0 81 56 91 0 3 72 0 300 0 0 0 100 4 0 0 0 26 1 131 0 8 73 0 0 0 0 0 100 5 0 0 0 26 2 104 0 7 78 0 0 0 0 0 100 6 0 0 7 48 9 202 0 9 60 0 560 0 0 0 100 7 0 0 0 35 1 99 0 6 75 0 0 0 0 0 100 March 10, 2026 at 10:46:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1253 0 150 2438 231 667 18 97 54 53 2668 1 2 0 97 1 1156 0 261 369 126 511 9 70 58 44 1615 1 2 0 97 2 569 0 32 119 3 455 10 79 81 47 3347 1 2 0 97 3 5099 0 12 119 4 387 11 71 141 44 2896 2 2 0 95 4 42539 0 169 159 1 429 14 65 144 58 2974 11 8 0 81 5 3694 0 11 189 10 477 4 76 104 60 1939 1 1 0 98 6 364 0 14 105 3 451 6 76 71 69 3483 1 1 0 99 7 969 0 184 101 1 453 5 62 57 58 1913 1 1 0 99 March 10, 2026 at 10:46:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 513 0 3 2332 201 509 13 48 36 19 3026 2 1 0 97 1 209 0 45 238 104 536 14 57 18 12 2034 3 1 0 96 2 915 0 72 134 35 592 17 49 48 13 1905 2 1 0 97 3 739 0 7 105 6 495 9 41 68 5 1816 1 1 0 98 4 326 0 0 65 19 628 16 48 29 8 2187 1 1 0 98 5 2389 0 12 35 4 643 11 35 67 10 1690 4 1 0 95 6 1662 0 8 46 8 457 11 40 59 11 1800 1 1 0 98 7 829 0 0 40 1 435 8 35 58 12 1349 1 1 0 98 March 10, 2026 at 10:46:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 2 2378 201 90 1 2 0 0 1080 0 1 0 99 1 2 0 19 284 104 10 0 1 1 0 266 0 0 0 100 2 0 0 0 89 4 10 0 1 1 0 294 0 0 0 100 3 0 0 504 82 26 79 0 8 0 0 300 0 0 0 99 4 0 0 0 147 25 72 0 11 0 0 0 0 0 0 100 5 26 0 0 91 7 14 0 0 0 0 9 0 0 0 100 6 0 0 7 84 3 24 0 0 0 0 562 0 0 0 100 7 0 0 0 89 1 14 0 0 0 0 1 0 0 0 100 March 10, 2026 at 10:46:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2309 201 134 0 0 0 0 1082 0 1 0 99 1 0 0 18 212 104 8 0 0 0 0 266 0 0 0 100 2 0 0 0 11 3 6 0 0 1 0 296 0 0 0 100 3 0 0 0 10 3 4 0 0 2 0 300 0 0 0 100 4 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 5 0 0 0 17 6 12 0 0 0 0 8 0 0 0 100 6 0 0 7 12 3 8 0 0 0 0 561 0 0 0 100 7 0 0 0 17 0 34 0 2 0 0 0 0 0 0 100 March 10, 2026 at 10:46:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2308 201 206 1 6 69 0 1080 0 1 0 99 1 0 0 17 212 104 96 0 6 59 0 266 0 0 0 100 2 0 0 0 11 2 83 0 7 55 0 294 0 0 0 100 3 0 0 0 75 67 79 0 8 76 0 300 0 0 0 100 4 0 0 0 106 50 209 0 7 71 0 0 0 0 0 100 5 0 0 0 20 7 113 0 7 76 0 9 0 0 0 100 6 0 0 7 13 4 197 0 9 62 0 561 0 0 0 100 7 0 0 0 16 0 96 0 6 44 0 0 0 0 0 100 March 10, 2026 at 10:46:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2115 0 16 2442 205 1122 28 185 121 65 5601 5 3 0 92 1 1593 0 106 327 105 964 24 166 109 61 3645 3 2 0 95 2 4262 0 215 172 5 852 24 136 98 60 3831 4 2 0 94 3 1334 0 21 138 4 781 20 115 123 80 3821 2 2 0 96 4 11036 0 262 110 6 979 18 117 242 76 5599 5 4 0 91 5 40295 0 33 283 43 1007 28 127 179 96 4237 10 8 0 81 6 786 0 15 139 11 884 14 107 101 61 3083 2 1 0 97 7 1960 0 202 117 2 773 20 108 101 56 2874 3 2 0 95 March 10, 2026 at 10:46:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2318 201 69 2 5 2 0 1097 0 1 0 99 1 28 0 18 310 110 116 1 6 0 0 275 0 0 0 100 2 0 0 0 26 3 11 0 1 2 0 295 0 0 0 100 3 0 0 0 23 3 8 0 0 6 0 300 0 0 0 100 4 0 0 70 19 6 4 0 1 5 0 0 0 0 0 100 5 0 0 7 77 30 64 0 2 0 0 9 0 0 0 100 6 0 0 7 65 25 62 0 1 0 0 580 0 0 0 100 7 0 0 0 32 2 24 0 0 0 0 8 0 0 0 100 March 10, 2026 at 10:46:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2376 202 134 2 2 0 0 1083 0 1 0 99 1 0 0 17 302 110 24 0 0 0 0 275 0 0 0 100 2 0 0 0 85 4 8 0 0 0 0 319 0 0 0 100 3 0 0 462 16 3 6 0 0 3 0 300 0 0 0 100 4 0 0 42 73 0 2 0 0 2 0 0 0 0 0 100 5 0 0 0 83 1 8 0 1 0 0 1 0 0 0 100 6 2 0 7 184 54 108 0 0 0 0 562 0 0 0 100 7 0 0 0 87 0 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:46:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2310 202 134 1 0 0 0 1085 0 1 0 99 1 0 0 18 224 109 20 0 1 0 0 274 0 0 0 100 2 0 0 0 11 3 28 0 1 2 0 303 0 0 0 100 3 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 6 0 1 0 0 18 0 0 0 100 6 0 0 7 112 54 108 0 0 0 0 560 0 0 0 100 7 0 0 0 15 0 12 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:46:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3683 0 147 2487 204 1418 40 215 216 76 5660 3 3 0 94 1 1929 0 92 350 111 1482 32 174 166 58 5266 4 2 0 94 2 1842 0 187 134 14 1407 28 166 204 57 3956 4 2 0 95 3 2062 0 11 211 72 1351 31 140 205 56 6190 4 2 0 94 4 9920 0 208 131 5 1062 18 118 316 68 5547 4 5 0 92 5 5883 0 140 105 2 1135 21 130 223 76 4424 3 3 0 95 6 34812 0 15 171 30 1212 19 105 144 73 4058 12 7 0 81 7 3677 0 50 191 3 1064 21 118 162 70 3606 6 2 0 92 March 10, 2026 at 10:46:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2322 202 120 1 6 1 0 1109 0 1 0 99 1 24 0 101 215 104 12 0 2 6 0 277 0 1 0 99 2 2 0 0 22 2 10 0 1 1 0 301 0 0 0 100 3 18 0 0 99 41 89 0 1 8 0 314 0 0 0 100 4 15 0 0 72 13 56 0 1 1 0 21 0 0 0 100 5 0 0 0 28 1 10 0 2 0 0 17 0 0 0 100 6 33 0 7 31 6 24 0 2 1 0 318 0 0 0 100 7 0 0 7 29 3 14 0 3 0 0 261 0 0 0 100 March 10, 2026 at 10:46:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2363 205 141 1 9 0 0 1085 0 1 0 99 1 0 0 45 338 137 86 0 7 4 0 266 0 1 0 99 2 0 0 0 66 3 10 0 0 1 0 296 0 0 0 100 3 0 0 343 14 3 30 0 1 4 0 300 0 0 0 100 4 0 0 0 90 18 24 0 2 0 0 1 0 0 0 100 5 0 0 0 72 3 16 0 2 0 0 9 0 0 0 100 6 1 0 0 78 9 24 0 1 0 0 320 0 0 0 100 7 0 0 7 65 2 22 0 3 0 0 268 0 0 0 100 March 10, 2026 at 10:46:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2342 219 142 0 9 0 0 1081 0 1 0 99 1 0 0 18 335 137 112 0 9 1 0 266 0 0 0 100 2 0 0 0 26 2 6 0 1 0 0 294 0 0 0 100 3 0 0 119 12 3 8 0 1 2 0 300 0 0 0 100 4 0 0 0 22 0 18 0 1 0 0 0 0 0 0 100 5 0 0 0 22 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 36 7 14 0 0 0 0 309 0 0 0 100 7 0 0 7 27 2 8 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:46:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 515 0 37 2412 215 588 6 69 51 55 2382 1 1 0 98 1 22726 0 203 340 120 473 17 56 65 59 5464 7 4 0 89 2 772 0 6 139 20 462 8 73 46 50 2078 2 1 0 98 3 1191 0 204 90 9 385 8 45 48 43 2086 1 1 0 98 4 2744 0 5 86 0 414 5 58 85 61 1528 1 1 0 98 5 4488 0 14 86 1 373 8 52 101 44 1959 1 2 0 97 6 2520 0 23 98 8 485 7 64 103 53 1960 1 1 0 98 7 3169 0 167 140 4 413 4 49 66 47 2030 2 1 0 96 March 10, 2026 at 10:46:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 582 0 73 2350 201 740 13 79 135 28 1899 1 2 0 97 1 12352 0 74 251 104 532 20 80 113 13 3192 4 5 0 92 2 641 0 0 76 4 541 14 82 110 8 1803 3 1 0 96 3 1187 0 0 133 70 504 16 65 101 12 1857 4 1 0 95 4 721 0 0 143 42 633 8 59 144 8 1032 1 1 0 98 5 3734 0 180 40 2 455 13 62 153 21 1446 1 1 0 97 6 5497 0 23 116 2 336 8 50 136 12 1492 2 1 0 97 7 774 0 10 100 6 442 4 59 124 27 1532 1 1 0 98 March 10, 2026 at 10:46:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 45 2371 200 112 0 0 2 0 0 0 1 0 99 1 2 0 18 286 104 38 0 1 1 0 1356 0 0 0 99 2 26 0 0 99 11 24 0 1 0 0 305 0 0 0 100 3 0 0 462 16 3 8 0 0 2 0 300 0 0 0 100 4 0 0 0 177 50 100 0 0 0 0 0 0 0 0 100 5 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 87 3 8 0 1 0 0 302 0 0 0 100 7 0 0 7 82 2 28 0 1 0 0 263 0 0 0 100 March 10, 2026 at 10:46:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2302 200 118 0 0 0 0 3 0 0 0 100 1 0 0 17 211 104 36 1 0 1 0 1352 0 0 0 100 2 0 0 0 27 11 24 0 0 0 0 304 0 0 0 100 3 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 4 0 0 0 112 55 100 0 0 0 0 0 0 0 0 100 5 1 0 0 5 0 4 0 0 0 0 7 0 0 0 100 6 1 0 0 11 3 12 0 0 0 0 316 0 0 0 100 7 0 0 7 12 2 14 0 0 0 0 263 0 0 0 100 March 10, 2026 at 10:46:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2306 200 112 0 0 0 0 0 0 0 0 100 1 0 0 16 212 104 36 1 0 0 0 1353 0 0 0 100 2 0 0 0 25 10 20 0 0 0 0 304 0 0 0 100 3 0 0 0 12 4 6 0 0 1 0 321 0 0 0 100 4 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 7 0 0 7 14 2 30 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:46:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1621 0 10 2436 207 1261 31 188 157 75 4463 3 2 0 95 1 1792 0 219 317 115 1205 29 199 104 79 6558 3 3 0 95 2 4232 0 151 197 16 1067 25 146 135 59 3845 6 2 0 92 3 1559 0 15 117 4 952 22 139 117 83 3192 2 2 0 97 4 2779 0 36 197 12 914 21 121 95 45 3026 5 2 0 94 5 6734 0 184 126 12 778 17 106 186 59 5583 4 3 0 93 6 7931 0 189 129 7 992 34 129 149 88 4576 5 3 0 93 7 36943 0 40 132 10 881 25 117 176 72 4454 11 8 0 81 March 10, 2026 at 10:46:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2330 211 217 0 11 89 0 1 0 0 0 100 1 2 0 18 259 119 167 0 8 79 0 1360 0 0 0 100 2 0 0 70 82 31 178 0 6 97 0 297 0 1 0 99 3 0 0 7 98 72 113 0 7 90 0 300 0 0 0 100 4 0 0 0 21 1 214 0 9 67 0 0 0 0 0 100 5 26 0 0 30 6 130 0 8 71 0 8 0 0 0 100 6 0 0 0 22 2 120 0 10 97 0 300 0 0 0 100 7 0 0 7 26 4 103 0 6 97 0 263 0 0 0 100 March 10, 2026 at 10:46:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2378 200 110 0 0 0 0 0 0 1 0 99 1 0 0 17 283 104 56 1 1 1 0 1347 0 0 0 100 2 0 0 42 177 52 106 0 0 2 0 294 0 1 0 99 3 0 0 462 22 5 12 0 1 2 0 300 0 0 0 100 4 0 0 0 77 0 2 0 1 0 0 0 0 0 0 100 5 0 0 0 90 6 12 1 0 0 0 9 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 300 0 0 0 100 7 0 0 7 82 2 8 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:46:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2308 202 121 1 0 0 0 4 0 0 0 100 1 0 0 18 215 104 40 1 1 2 0 1347 0 0 0 100 2 0 0 0 111 53 108 0 0 0 0 296 0 0 0 100 3 0 0 0 14 5 30 0 1 1 0 300 0 0 0 100 4 0 0 0 12 7 6 0 1 0 0 9 0 0 0 100 5 0 0 0 17 6 16 0 0 0 0 16 0 0 0 100 6 0 0 0 9 1 6 0 0 0 0 305 0 0 0 100 7 0 0 7 12 2 14 0 1 0 0 260 0 0 0 100 March 10, 2026 at 10:46:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1494 0 24 2433 202 1281 36 207 128 82 4175 4 2 0 94 1 4116 0 86 387 105 1138 44 191 142 65 6042 5 2 0 93 2 2470 0 27 263 33 1114 21 172 90 63 4056 5 2 0 93 3 3130 0 315 94 6 916 23 125 111 66 4292 3 2 0 94 4 34450 0 137 120 2 953 32 121 83 69 3502 10 8 0 82 5 2139 0 3 139 13 828 18 121 107 53 3386 4 2 0 94 6 9612 0 198 126 11 905 25 112 178 73 5540 3 4 0 93 7 5848 0 34 120 2 992 14 133 186 87 4195 3 2 0 95 March 10, 2026 at 10:46:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 3 2325 205 56 0 4 1 0 22 0 0 0 100 1 46 0 32 262 122 88 1 5 0 0 1382 0 0 0 99 2 29 0 0 32 6 20 0 4 1 0 317 0 0 0 100 3 0 0 0 29 5 15 0 2 8 0 313 0 0 0 100 4 0 0 0 22 1 28 0 2 0 0 22 0 0 0 100 5 0 0 7 21 1 6 0 2 2 0 13 0 0 0 100 6 4 0 0 86 29 70 0 6 0 0 304 0 0 0 100 7 12 0 77 77 5 74 1 7 6 0 265 0 1 0 99 March 10, 2026 at 10:46:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2329 200 214 0 10 89 0 0 0 0 0 100 1 0 0 17 256 112 153 1 5 77 0 1351 0 0 0 99 2 0 0 0 127 50 199 0 3 86 0 303 0 0 0 100 3 0 0 126 74 63 96 0 5 77 0 300 0 0 0 100 4 0 0 0 27 0 169 0 8 49 0 0 0 0 0 100 5 0 0 0 31 1 121 0 10 56 0 0 0 0 0 100 6 0 0 0 27 1 107 0 9 59 0 300 0 0 0 100 7 0 0 21 32 2 104 0 10 74 0 263 0 0 0 100 March 10, 2026 at 10:46:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2398 242 105 0 5 0 0 0 0 0 0 100 1 0 0 17 355 106 130 0 2 0 0 1350 0 0 0 100 2 0 0 0 89 15 30 0 1 0 0 305 0 0 0 100 3 0 0 336 18 5 10 0 0 1 0 300 0 0 0 100 4 0 0 0 57 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 57 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 61 2 4 0 0 0 0 301 0 0 0 100 7 0 0 35 60 2 10 0 0 1 0 260 0 1 0 99 March 10, 2026 at 10:47:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 698 0 13 2439 248 620 13 92 59 60 1523 1 1 0 98 1 389 0 89 375 105 581 12 84 53 46 3128 1 1 0 98 2 2959 0 23 158 10 389 9 61 64 48 3181 2 2 0 96 3 1137 0 202 87 7 444 12 78 60 54 1916 1 1 0 98 4 1026 0 9 101 8 417 16 66 65 53 3008 2 1 0 97 5 192 0 14 86 2 403 5 69 57 47 1562 1 1 0 99 6 9402 0 256 63 2 401 10 52 127 45 2904 2 3 0 95 7 2308 0 22 90 3 415 6 60 83 56 1919 1 1 0 98 March 10, 2026 at 10:47:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1784 0 2 2420 202 847 19 85 52 21 2724 2 1 0 96 1 2035 0 129 284 120 729 21 86 89 17 3549 3 2 0 95 2 366 0 0 102 25 773 15 81 34 15 2053 1 1 0 98 3 1900 0 177 67 15 667 15 61 37 18 2869 3 1 0 96 4 233 0 0 49 2 531 13 51 30 21 1630 2 1 0 98 5 1099 0 1 59 1 445 13 43 73 11 1427 1 1 0 98 6 34775 0 12 56 3 422 12 36 81 14 1975 10 7 0 83 7 3223 0 16 47 3 405 4 38 91 8 2574 3 1 0 96 March 10, 2026 at 10:47:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 45 2372 201 116 0 1 2 0 0 0 1 0 99 1 1 0 18 283 103 34 1 0 1 0 1350 0 0 0 100 2 0 0 0 187 54 108 0 0 0 0 295 0 0 0 100 3 0 0 0 88 5 8 0 0 0 0 300 0 0 0 100 4 26 0 462 25 6 16 0 0 2 0 9 0 0 0 100 5 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 1 0 0 0 100 7 0 0 7 88 3 12 0 0 0 0 563 0 0 0 100 March 10, 2026 at 10:47:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2323 213 205 0 12 73 0 0 0 0 0 100 1 0 0 21 288 135 205 1 11 62 0 1351 0 0 0 100 2 0 0 0 42 12 126 0 12 93 0 296 0 0 0 100 3 0 0 0 78 64 101 0 6 87 0 300 0 0 0 100 4 0 0 0 20 7 188 0 9 56 0 9 0 0 0 100 5 0 0 0 11 1 99 0 8 84 0 0 0 0 0 100 6 0 0 0 8 1 113 0 8 82 0 0 0 0 0 100 7 0 0 7 16 4 101 0 6 63 0 560 0 0 0 100 March 10, 2026 at 10:47:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2306 202 112 0 2 0 0 0 0 0 0 100 1 0 0 17 228 112 50 1 0 0 0 1350 0 0 0 100 2 0 0 0 29 10 24 0 4 0 0 294 0 0 0 100 3 0 0 0 54 25 50 0 1 1 0 299 0 0 0 100 4 0 0 0 39 17 36 0 1 0 0 9 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 20 0 0 0 0 0 0 0 0 100 7 1 0 7 14 3 12 0 0 0 0 562 0 0 0 100 March 10, 2026 at 10:47:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36887 0 33 2427 202 1194 36 170 128 74 5154 13 9 0 78 1 5986 0 104 327 103 1038 33 154 171 60 5341 4 3 0 93 2 6006 0 299 103 4 982 27 132 182 83 5553 6 2 0 92 3 3902 0 5 195 6 852 16 112 131 65 3387 3 2 0 96 4 2329 0 7 216 44 918 28 114 132 85 2744 2 1 0 97 5 1341 0 26 124 2 962 22 120 109 61 4604 4 2 0 94 6 5654 0 308 87 1 1022 18 111 167 78 3408 4 3 0 93 7 1425 0 49 205 24 833 17 102 119 56 3392 2 2 0 97 March 10, 2026 at 10:47:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2328 209 109 0 8 0 0 5 0 0 0 100 1 14 0 105 289 132 114 1 5 10 0 1384 0 1 0 99 2 1 0 7 30 2 22 0 1 1 0 320 0 0 0 100 3 1 0 0 28 5 12 0 2 1 0 314 0 0 0 100 4 0 0 0 27 3 8 0 2 6 0 16 0 0 0 100 5 26 0 0 23 1 2 0 0 0 0 10 0 0 0 100 6 44 0 0 33 6 26 0 2 1 0 19 0 0 0 100 7 0 0 7 56 17 64 0 5 1 0 574 0 0 0 100 March 10, 2026 at 10:47:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2383 206 105 0 3 0 0 0 0 0 0 100 1 0 0 63 374 148 132 1 5 3 0 1347 0 1 0 99 2 0 0 0 98 3 20 0 2 0 0 296 0 0 0 100 3 0 0 0 87 5 10 0 1 0 0 300 0 0 0 100 4 0 0 462 14 1 4 0 0 2 0 0 0 0 0 100 5 0 0 0 78 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 90 6 14 0 0 0 0 10 0 0 0 100 7 0 0 7 87 3 28 0 0 0 0 563 0 0 0 100 March 10, 2026 at 10:47:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2309 200 192 0 6 74 0 0 0 0 0 100 1 0 0 17 312 153 223 1 5 67 0 1347 0 0 0 100 2 0 0 0 18 2 103 0 7 72 0 294 0 0 0 100 3 0 0 0 70 60 127 0 5 62 0 300 0 0 0 100 4 0 0 0 7 1 167 0 8 46 0 0 0 0 0 100 5 0 0 0 9 1 80 0 5 75 0 0 0 0 0 100 6 0 0 0 17 6 101 0 4 64 0 9 0 0 0 100 7 0 0 7 13 3 93 0 5 71 0 560 0 0 0 100 March 10, 2026 at 10:47:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3144 0 308 2395 204 1139 24 157 121 53 5199 5 3 0 92 1 1083 0 81 332 111 1015 25 129 130 65 4779 2 2 0 96 2 11549 0 193 162 28 949 28 107 212 63 4523 4 4 0 92 3 6310 0 32 126 7 860 22 113 179 88 5803 4 3 0 93 4 34098 0 13 142 3 989 29 132 113 86 3968 9 7 0 84 5 3255 0 15 147 5 819 17 105 127 74 2743 3 1 0 96 6 2058 0 16 217 20 768 16 99 89 63 2713 4 2 0 95 7 1912 0 179 156 8 842 13 93 80 45 3291 2 2 0 96 March 10, 2026 at 10:47:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 3 2321 201 24 0 5 1 0 12 0 0 0 100 1 49 0 102 231 110 80 0 4 6 0 1386 0 1 0 99 2 2 0 0 28 3 26 0 4 1 0 305 0 0 0 100 3 11 0 0 29 5 20 0 1 1 0 321 0 0 0 100 4 24 0 7 128 9 124 0 4 8 0 37 0 0 0 100 5 3 0 0 22 2 16 0 3 1 0 32 0 0 0 100 6 0 0 0 22 1 10 0 1 0 0 21 0 0 0 100 7 27 0 7 127 53 118 1 0 1 0 571 0 0 0 100 March 10, 2026 at 10:47:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2392 214 52 0 6 0 0 0 0 0 0 100 1 0 0 60 329 118 90 1 5 2 0 1357 0 1 0 99 2 0 0 0 91 3 14 0 0 1 0 296 0 0 0 100 3 0 0 0 86 5 8 0 0 0 0 321 0 0 0 100 4 0 0 462 75 13 64 0 3 2 0 0 0 0 0 100 5 0 0 0 83 2 6 0 1 0 0 1 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 1 0 0 0 100 7 0 0 7 140 18 64 0 4 0 0 563 0 0 0 100 March 10, 2026 at 10:47:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2353 248 108 0 7 2 0 0 0 0 0 100 1 0 0 18 313 110 154 1 6 0 0 1355 0 0 0 100 2 0 0 0 23 5 24 0 1 1 0 304 0 0 0 100 3 0 0 0 12 4 6 0 0 0 0 300 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 7 1 6 0 0 0 0 18 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 7 12 3 10 0 1 0 0 560 0 0 0 100 March 10, 2026 at 10:47:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 12 2338 200 293 3 29 95 15 207 0 0 0 99 1 162 0 28 254 112 263 2 20 108 18 3138 0 1 0 99 2 3431 0 122 134 53 324 2 26 143 20 1186 1 1 0 98 3 376 0 11 102 62 245 0 31 106 25 803 0 1 0 99 4 28 0 15 41 5 314 2 23 92 14 335 0 0 0 99 5 20 0 11 31 2 184 2 18 83 18 211 0 0 0 100 6 57 0 2 37 1 194 0 18 71 29 223 0 0 0 100 7 29 0 22 45 4 197 0 26 84 12 795 0 1 0 99 March 10, 2026 at 10:47:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1489 0 120 2399 202 951 26 150 88 51 3151 2 2 0 96 1 1116 0 77 301 106 927 32 138 102 40 3641 2 2 0 96 2 8232 0 203 207 25 1037 31 123 166 55 4662 6 3 0 91 3 6530 0 25 170 9 922 12 104 133 46 2935 4 2 0 94 4 2652 0 251 96 5 937 18 108 102 69 5701 4 2 0 94 5 34138 0 22 102 2 844 24 103 106 63 3623 10 8 0 83 6 1808 0 12 132 2 773 22 102 58 51 3293 3 1 0 96 7 3088 0 23 202 20 766 20 77 74 46 3122 3 1 0 96 March 10, 2026 at 10:47:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2389 212 82 0 8 0 0 0 0 1 0 99 1 3 0 21 324 117 46 0 7 0 0 268 0 0 0 100 2 0 0 0 142 12 66 0 5 0 0 2 0 0 0 100 3 26 0 0 99 10 34 0 1 0 0 9 0 0 0 100 4 0 0 42 92 10 46 1 1 2 0 1388 0 1 0 99 5 0 0 462 16 2 10 0 0 2 0 308 0 0 0 100 6 0 0 0 80 0 12 0 0 0 0 16 0 0 0 100 7 0 0 7 119 17 46 0 4 0 0 564 0 0 0 100 March 10, 2026 at 10:47:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 104 0 0 0 0 0 0 0 0 100 1 0 0 21 207 102 2 0 0 0 0 266 0 0 0 100 2 0 0 0 116 51 110 0 0 0 0 0 0 0 0 100 3 0 0 0 25 9 18 0 0 1 0 9 0 0 0 100 4 0 0 0 13 3 58 1 1 1 0 1376 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 7 13 3 10 0 0 0 0 561 0 0 0 100 March 10, 2026 at 10:47:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2304 200 106 0 0 0 0 0 0 0 0 100 1 0 0 17 206 102 2 0 0 0 0 266 0 0 0 100 2 0 0 0 117 52 112 0 0 0 0 2 0 0 0 100 3 0 0 0 20 8 14 0 0 0 0 9 0 0 0 100 4 0 0 0 12 3 36 1 0 0 0 1375 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 7 12 3 8 0 0 0 0 559 0 0 0 100 March 10, 2026 at 10:47:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3374 0 136 2441 201 1329 51 220 187 76 7777 5 3 0 92 1 4197 0 271 372 103 1211 43 186 185 58 4329 6 2 0 92 2 10476 0 198 162 17 1114 32 172 309 74 5420 4 4 0 92 3 4942 0 44 215 69 1298 41 191 201 86 4386 3 3 0 94 4 35125 0 135 153 5 1356 33 169 163 95 5133 10 8 0 82 5 828 0 5 131 5 1055 25 139 140 68 3266 2 1 0 97 6 1148 0 10 132 8 1060 34 140 191 57 3359 3 1 0 95 7 3188 0 45 212 22 944 24 115 204 41 3175 3 1 0 96 March 10, 2026 at 10:47:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 10 2321 204 88 0 5 1 0 24 0 0 0 100 1 4 0 32 221 103 6 0 1 0 0 278 0 0 0 100 2 41 0 0 66 15 49 2 4 1 0 20 0 0 0 100 3 0 0 70 15 2 7 0 2 4 0 13 0 0 0 99 4 0 0 0 99 37 112 1 2 1 0 1407 0 0 0 100 5 2 0 0 26 3 20 0 2 6 0 308 0 0 0 100 6 11 0 0 27 3 29 2 3 2 0 13 0 0 0 100 7 0 0 7 55 11 42 0 2 2 0 570 0 0 0 100 March 10, 2026 at 10:47:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2379 201 108 0 0 0 0 0 0 1 0 99 1 0 0 17 279 102 4 0 1 0 0 266 0 0 0 100 2 0 0 0 103 8 28 0 0 0 0 10 0 0 0 100 3 0 0 42 76 1 4 0 0 2 0 0 0 1 0 99 4 0 0 0 190 59 140 1 0 4 0 1378 0 0 0 100 5 0 0 462 17 3 12 0 0 2 0 307 0 0 0 100 6 0 0 0 81 2 10 0 0 0 0 13 0 0 0 100 7 0 0 7 86 3 20 0 1 1 0 567 0 0 0 100 March 10, 2026 at 10:47:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2305 201 102 0 0 0 0 0 0 0 0 100 1 0 0 17 206 102 2 0 0 0 0 266 0 0 0 100 2 0 0 0 31 8 26 0 0 0 0 11 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 112 53 136 1 0 0 0 1375 0 0 0 100 5 0 0 0 13 4 8 0 0 0 0 301 0 0 0 100 6 0 0 0 11 2 6 0 1 1 0 2 0 0 0 100 7 0 0 7 12 3 28 0 2 0 0 560 0 0 0 100 March 10, 2026 at 10:47:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2878 0 312 2443 202 1144 31 156 140 66 5141 2 2 0 95 1 2293 0 104 303 103 1097 22 155 134 78 3384 4 2 0 94 2 3486 0 19 153 10 997 27 137 155 64 3672 3 3 0 94 3 37170 0 314 101 3 867 24 116 138 60 4332 10 9 0 81 4 5546 0 22 197 41 1034 22 119 146 64 6206 3 3 0 94 5 3552 0 16 133 6 807 13 98 118 60 3486 3 2 0 95 6 6693 0 22 193 1 810 18 100 176 69 3297 4 2 0 94 7 1581 0 22 142 15 895 19 110 105 68 3692 3 1 0 96 March 10, 2026 at 10:47:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 7 2326 202 106 0 5 92 0 9 0 0 0 100 1 44 0 35 236 110 141 0 7 71 0 299 0 0 0 100 2 1 0 7 127 3 208 0 8 93 0 10 0 0 0 100 3 7 0 0 91 58 106 1 8 85 0 38 2 0 0 98 4 46 0 70 45 16 207 1 13 56 0 1407 0 1 0 99 5 0 0 0 82 31 145 0 6 90 0 314 0 0 0 100 6 0 0 0 47 13 119 0 7 71 0 10 0 0 0 100 7 13 0 7 27 4 101 0 7 72 0 583 0 0 0 100 March 10, 2026 at 10:47:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2377 201 0 0 0 0 0 0 0 0 0 100 1 0 0 17 290 108 18 0 2 0 0 275 0 0 0 100 2 0 0 0 95 3 18 0 3 0 0 0 0 0 0 100 3 0 0 0 82 1 22 0 2 2 0 0 0 0 0 100 4 0 0 42 84 3 44 1 2 2 0 1375 0 1 0 99 5 0 0 462 17 3 8 0 0 2 0 300 0 0 0 100 6 0 0 0 179 4 100 0 2 0 0 0 0 0 0 100 7 0 0 7 172 47 100 0 1 0 0 564 0 0 0 100 March 10, 2026 at 10:47:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2305 200 4 0 0 1 0 0 0 0 0 100 1 0 0 17 221 108 16 0 1 0 0 274 0 0 0 100 2 0 0 0 11 2 8 0 0 0 0 2 0 0 0 100 3 0 0 0 10 1 4 0 1 2 0 0 0 0 0 100 4 0 0 0 26 9 52 0 1 1 0 1384 0 0 0 100 5 0 0 0 11 3 28 0 2 1 0 318 0 0 0 100 6 0 0 0 109 2 112 0 0 0 0 14 0 0 0 100 7 0 0 7 116 53 122 0 1 0 0 562 0 0 0 100 March 10, 2026 at 10:47:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2306 202 44 0 3 0 0 0 0 0 0 100 1 0 0 17 221 109 16 0 0 0 0 272 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 23 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 20 3 44 1 0 1 0 1376 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 6 0 0 0 105 20 100 0 4 0 0 0 0 0 0 100 7 0 0 7 70 31 66 0 2 0 0 560 0 0 0 100 March 10, 2026 at 10:47:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1641 0 133 2416 203 1275 39 206 123 88 3846 2 2 0 96 1 2235 0 87 317 106 1005 19 153 114 82 4949 4 1 0 95 2 2158 0 21 205 2 919 34 146 106 74 2815 2 1 0 96 3 3201 0 27 201 11 917 27 111 86 42 3422 3 1 0 95 4 2824 0 136 128 7 832 20 105 122 54 4266 3 3 0 94 5 881 0 24 111 4 873 11 96 117 66 4175 4 2 0 95 6 10585 0 376 163 39 853 24 104 212 67 4578 3 4 0 93 7 39648 0 27 125 5 1094 25 129 200 103 5624 13 8 0 79 March 10, 2026 at 10:47:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2313 201 208 0 8 66 0 0 0 1 0 99 1 2 0 21 223 103 128 0 10 68 0 266 0 0 0 100 2 0 0 0 24 2 92 0 6 78 0 0 0 0 0 100 3 0 0 0 81 60 86 0 7 74 0 0 0 0 0 100 4 0 0 7 31 3 140 1 6 79 0 1382 0 0 0 100 5 0 0 0 26 3 104 0 5 81 0 300 0 0 0 100 6 0 0 0 119 50 279 0 8 45 0 0 0 0 0 100 7 26 0 7 42 9 105 0 7 94 0 572 0 0 0 100 March 10, 2026 at 10:47:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 45 2371 200 102 0 0 2 0 0 0 1 0 99 1 0 0 18 280 103 4 0 0 0 0 266 0 0 0 100 2 0 0 0 83 2 6 0 0 0 0 2 0 0 0 100 3 0 0 0 80 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 93 3 46 0 0 0 0 1375 0 0 0 100 5 0 0 0 83 3 8 0 1 0 0 300 0 0 0 100 6 0 0 462 118 53 110 0 0 2 0 3 0 0 0 100 7 0 0 7 96 9 22 0 0 0 0 570 0 0 0 100 March 10, 2026 at 10:47:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2306 201 98 0 2 1 0 2 0 0 0 100 1 0 0 18 216 103 12 0 1 0 0 266 0 0 0 100 2 0 0 0 11 2 28 0 1 0 0 1 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 29 10 50 1 0 1 0 1379 0 0 0 100 5 0 0 0 11 3 10 0 0 0 0 307 0 0 0 100 6 0 0 0 61 28 64 0 0 0 0 22 0 0 0 100 7 0 0 7 74 33 80 0 2 0 0 572 0 0 0 100 March 10, 2026 at 10:47:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7951 0 205 2416 202 1239 44 208 232 70 4258 5 4 0 91 1 12791 0 84 475 104 1118 37 174 333 71 4509 5 3 0 92 2 3116 0 6 159 18 1063 27 150 162 84 3422 3 2 0 96 3 1511 0 190 127 6 1035 24 160 88 79 3230 2 1 0 96 4 1538 0 15 143 10 1016 25 148 87 84 4990 3 2 0 95 5 29286 0 62 181 6 876 32 113 465 73 5300 11 9 0 80 6 27800 0 190 100 1 781 25 115 498 57 3972 8 5 0 86 7 4909 0 140 175 32 878 26 119 173 58 5228 5 2 0 92 March 10, 2026 at 10:47:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2324 203 113 1 1 1 0 14 0 0 0 99 1 29 0 35 221 104 7 0 1 0 0 278 0 0 0 100 2 14 0 0 27 3 10 0 1 0 0 20 0 0 0 100 3 27 0 0 130 55 117 0 2 1 0 26 0 0 0 100 4 0 0 0 26 3 39 1 2 0 0 1405 0 0 0 100 5 0 0 70 17 2 12 0 2 5 0 304 0 0 0 99 6 0 0 7 22 1 18 1 2 9 0 17 0 0 0 100 7 13 0 7 28 4 20 0 2 0 0 568 0 0 0 100 March 10, 2026 at 10:47:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2370 206 207 0 11 91 0 0 0 0 0 100 1 0 0 21 266 104 89 0 4 75 0 267 0 0 0 100 2 0 0 0 70 3 101 0 7 60 0 2 0 0 0 100 3 0 0 0 181 80 144 0 8 84 0 9 0 0 0 100 4 0 0 0 127 32 201 1 8 81 0 1374 0 0 0 99 5 0 0 35 67 4 88 0 5 77 0 300 0 1 0 99 6 0 0 350 15 1 181 0 6 52 0 0 0 0 0 100 7 0 0 7 73 5 104 0 5 63 0 563 0 0 0 100 March 10, 2026 at 10:47:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 2 2323 201 109 0 1 0 0 0 0 0 0 100 1 0 0 19 224 103 4 0 0 0 0 266 0 0 0 100 2 0 0 0 25 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 36 7 14 0 0 0 0 9 0 0 0 100 4 0 0 0 128 53 136 0 0 1 0 1376 0 0 0 100 5 0 0 0 27 2 24 0 1 2 0 300 0 0 0 100 6 0 0 112 7 1 4 0 0 0 0 1 0 0 0 100 7 0 0 7 30 4 12 0 0 0 0 561 0 0 0 100 March 10, 2026 at 10:47:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10412 0 325 2381 202 673 12 113 193 78 4819 3 4 0 93 1 7367 0 79 398 104 547 22 97 145 80 4565 3 2 0 95 2 27460 0 33 124 3 586 15 105 60 71 2939 10 8 0 82 3 2977 0 38 185 10 503 10 77 73 64 1538 2 1 0 96 4 835 0 14 152 23 625 13 81 62 71 3140 1 1 0 98 5 809 0 13 145 26 515 11 77 77 59 1867 1 1 0 98 6 1189 0 189 107 13 530 6 76 58 76 1708 1 1 0 98 7 1273 0 129 98 4 390 7 67 92 48 2481 2 1 0 97 March 10, 2026 at 10:47:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 244 0 9 2391 245 965 38 141 17 4 2565 2 1 0 97 1 426 0 47 330 107 843 29 111 46 2 2535 2 1 0 97 2 862 0 0 50 2 656 28 93 53 4 2130 3 1 0 96 3 310 0 84 30 4 576 12 63 30 4 2091 1 1 0 98 4 376 0 0 54 3 602 29 88 41 6 3404 1 1 0 98 5 270 0 0 54 3 563 26 57 22 4 1902 3 1 0 96 6 918 0 0 34 1 553 22 61 48 3 1678 1 1 0 98 7 386 0 7 44 6 529 12 46 31 3 1836 2 0 0 98 March 10, 2026 at 10:47:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 2 2417 239 113 0 3 1 0 0 0 0 0 100 1 0 0 5 376 113 100 0 4 0 0 0 0 0 0 100 2 0 0 0 85 3 8 0 1 0 0 2 0 0 0 100 3 0 0 56 88 8 18 0 0 2 0 275 0 1 0 99 4 0 0 0 84 3 36 1 0 1 0 1376 0 0 0 100 5 0 0 0 81 2 4 0 0 0 0 300 0 0 0 100 6 0 0 462 13 0 22 0 0 2 0 0 0 0 0 100 7 0 0 7 86 4 12 0 1 0 0 563 0 0 0 100 March 10, 2026 at 10:47:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2339 229 175 0 9 72 0 0 0 0 0 100 1 0 0 4 279 103 151 0 11 78 0 0 0 0 0 100 2 0 0 0 51 22 126 0 7 69 0 0 0 0 0 100 3 0 0 14 80 68 110 0 7 57 0 275 0 0 0 100 4 0 0 0 18 4 169 1 8 102 0 1374 0 0 0 99 5 0 0 0 9 2 95 0 8 79 0 300 0 0 0 100 6 0 0 0 7 1 189 0 10 38 0 1 0 0 0 100 7 0 0 7 16 4 100 0 10 67 0 560 0 0 0 100 March 10, 2026 at 10:47:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2304 200 104 0 1 0 0 0 0 0 0 100 1 0 0 3 210 101 4 0 1 0 0 0 0 0 0 100 2 0 0 0 113 52 108 0 0 0 0 2 0 0 0 100 3 0 0 14 18 8 14 0 0 0 0 274 0 0 0 100 4 0 0 0 12 3 36 1 0 0 0 1376 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 11 2 6 0 0 1 0 2 0 0 0 100 7 0 0 7 14 4 34 0 1 0 0 560 0 0 0 100 March 10, 2026 at 10:47:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6482 0 139 2442 220 1207 29 207 212 83 5314 3 4 0 92 1 9829 0 124 449 113 1076 42 187 212 69 5734 5 3 0 92 2 6224 0 24 224 10 995 29 156 145 57 3588 4 2 0 94 3 35592 0 146 135 10 1181 45 167 160 93 4751 12 8 0 80 4 1670 0 187 142 23 1079 30 140 120 72 4781 2 2 0 96 5 895 0 10 132 5 953 24 141 127 57 3081 2 1 0 97 6 1565 0 204 106 3 873 19 108 89 52 3657 3 4 0 93 7 1026 0 24 126 6 851 20 110 65 58 4125 5 2 0 93 March 10, 2026 at 10:47:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2342 226 110 0 3 0 0 0 0 0 0 100 1 0 0 74 311 125 104 0 3 6 0 0 0 1 0 99 2 26 0 7 35 8 22 0 1 0 0 11 0 0 0 100 3 4 0 14 19 2 2 0 0 0 0 268 0 0 0 100 4 0 0 0 24 4 38 0 0 0 0 1383 0 0 0 100 5 0 0 0 22 2 4 0 0 0 0 300 0 0 0 100 6 0 0 0 22 2 8 0 0 6 0 2 0 0 0 100 7 0 0 7 25 4 12 0 0 0 0 563 0 0 0 100 March 10, 2026 at 10:47:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2379 202 128 0 7 1 0 0 0 0 0 100 1 0 0 49 284 105 10 0 3 2 0 0 0 1 0 99 2 0 0 0 103 9 29 0 4 0 0 18 0 0 0 100 3 0 0 14 167 46 94 0 2 0 0 266 0 0 0 100 4 0 0 0 87 4 38 1 0 0 0 1375 0 0 0 100 5 0 0 0 82 2 8 0 0 0 0 318 0 0 0 100 6 0 0 462 16 2 6 0 0 2 0 2 0 0 0 100 7 0 0 7 87 4 12 0 0 0 0 559 0 0 0 100 March 10, 2026 at 10:47:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 2 2310 201 193 0 4 59 0 0 0 0 0 100 1 0 0 5 208 102 120 0 6 102 0 1 0 0 0 100 2 0 0 0 23 8 93 0 6 71 0 10 0 0 0 100 3 0 0 14 170 113 180 0 9 82 0 266 0 0 0 100 4 0 0 0 19 6 151 1 7 68 0 1374 0 0 0 99 5 0 0 0 11 3 90 0 5 69 0 300 0 0 0 100 6 0 0 0 8 1 186 0 7 66 0 0 0 0 0 100 7 0 0 7 15 5 104 0 5 78 0 561 0 0 0 100 March 10, 2026 at 10:47:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2916 0 29 2419 202 975 16 134 124 47 5129 3 2 0 95 1 6436 0 377 299 102 854 19 127 182 77 5922 5 3 0 92 2 43010 0 306 128 7 965 27 127 157 75 4908 13 9 0 78 3 6059 0 37 234 27 901 17 114 165 74 3867 3 2 0 95 4 986 0 17 123 6 935 26 112 105 71 3998 2 2 0 96 5 2267 0 52 189 13 771 17 92 96 43 2653 2 2 0 96 6 1004 0 19 139 12 793 20 93 98 48 2614 2 1 0 97 7 467 0 16 116 5 583 11 88 55 44 2861 3 1 0 96 March 10, 2026 at 10:47:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 4 2341 223 114 0 5 2 0 10 0 0 0 100 1 10 0 17 312 123 100 0 7 2 0 21 0 0 0 100 2 41 0 0 36 9 47 0 4 0 0 22 0 0 0 100 3 4 0 14 23 3 8 0 3 0 0 272 0 0 0 100 4 0 0 7 34 11 48 0 2 4 0 1399 0 0 0 100 5 2 0 70 16 2 15 2 1 8 0 323 0 1 0 99 6 0 0 0 34 8 28 0 3 9 0 24 0 0 0 100 7 2 0 7 31 4 25 1 2 2 0 582 0 0 0 100 March 10, 2026 at 10:47:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 30 2358 203 113 0 3 4 0 0 0 1 0 99 1 0 0 5 267 103 6 0 2 0 0 0 0 0 0 100 2 0 0 0 127 34 88 0 1 0 0 9 0 0 0 100 3 0 0 14 97 21 42 0 1 0 0 266 0 0 0 100 4 0 0 0 69 4 40 1 1 1 0 1375 0 0 0 100 5 0 0 0 64 2 6 0 1 0 0 300 0 0 0 100 6 0 0 343 9 0 8 0 0 4 0 0 0 0 0 100 7 0 0 7 67 4 12 0 0 0 0 563 0 0 0 100 March 10, 2026 at 10:47:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2327 205 113 0 3 0 0 0 0 0 0 100 1 0 0 7 242 110 20 0 1 0 0 0 0 0 0 100 2 0 0 0 35 6 12 0 0 0 0 9 0 0 0 100 3 0 0 14 104 39 80 0 1 0 0 266 0 0 0 100 4 0 0 0 32 4 38 1 0 0 0 1375 0 0 0 100 5 0 0 0 27 2 4 0 0 0 0 300 0 0 0 100 6 0 0 119 6 0 2 0 0 1 0 0 0 0 0 100 7 0 0 7 32 4 12 0 1 0 0 560 0 0 0 100 March 10, 2026 at 10:47:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1441 0 211 2384 202 613 8 94 133 58 2227 1 2 0 97 1 602 0 38 312 111 577 8 77 140 51 1757 1 1 0 98 2 7247 0 124 154 43 612 8 64 192 62 3283 2 2 0 96 3 3000 0 27 156 67 498 10 67 125 53 3367 2 2 0 96 4 27708 0 131 86 8 599 12 67 135 62 2900 7 4 0 88 5 338 0 28 93 6 554 9 68 107 62 2420 1 1 0 99 6 227 0 15 83 1 569 3 60 87 43 2232 1 1 0 98 7 2624 0 50 157 5 453 6 58 86 49 2103 2 1 0 97 March 10, 2026 at 10:47:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2321 0 183 2346 202 600 29 93 62 19 2345 4 2 0 94 1 2225 0 49 255 102 536 15 83 69 25 1902 2 1 0 96 2 2343 0 4 61 2 538 19 82 52 15 2089 2 1 0 97 3 2664 0 16 56 3 477 17 55 72 19 2036 2 1 0 97 4 8690 0 89 125 5 569 26 64 65 15 2570 3 4 0 92 5 1051 0 1 138 40 564 11 60 65 19 2088 1 1 0 98 6 523 0 7 77 13 497 14 63 21 10 1765 3 1 0 97 7 377 0 7 148 5 438 9 38 49 10 1783 1 0 0 98 March 10, 2026 at 10:47:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 2 2376 201 110 0 0 0 0 0 0 1 0 99 1 0 0 5 288 102 8 0 0 0 0 0 0 0 0 100 2 0 0 0 81 2 6 0 0 0 0 1 0 0 0 100 3 2 0 14 80 2 2 0 0 0 0 266 0 0 0 100 4 26 0 42 96 14 56 0 0 3 0 1098 0 1 0 99 5 0 0 0 81 2 8 0 0 0 0 302 0 0 0 100 6 1 0 462 118 53 118 0 0 2 0 316 0 0 0 100 7 2 0 7 88 4 20 0 1 0 0 565 0 0 0 100 March 10, 2026 at 10:47:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2305 200 110 0 1 0 0 0 0 0 0 100 1 0 0 3 209 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 1 1 0 2 0 0 0 100 3 0 0 14 8 3 24 0 1 0 0 287 0 0 0 100 4 0 0 0 24 9 48 1 0 0 0 1091 0 0 0 100 5 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 6 0 0 0 113 54 107 0 0 0 0 302 0 0 0 100 7 0 0 7 16 4 14 0 1 0 0 560 0 0 0 100 March 10, 2026 at 10:47:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 2 2304 201 110 0 0 0 0 0 0 0 0 100 1 0 0 5 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 14 8 2 4 0 1 0 0 266 0 0 0 100 4 0 0 0 22 8 66 1 1 0 0 1088 0 0 0 100 5 0 0 0 9 2 4 0 0 1 0 294 0 0 0 100 6 0 0 0 108 51 103 0 0 1 0 301 0 0 0 100 7 0 0 7 14 4 12 0 0 0 0 559 0 0 0 100 March 10, 2026 at 10:47:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3755 0 246 2402 202 1241 29 181 171 55 4034 5 2 0 93 1 1443 0 69 319 102 1268 33 162 184 57 4746 2 2 0 96 2 9556 0 202 114 6 1183 23 143 256 79 5056 5 4 0 91 3 7592 0 28 300 60 1229 22 132 216 83 4661 4 3 0 93 4 1786 0 208 152 32 1138 18 115 180 78 4313 2 3 0 95 5 35776 0 35 134 5 1087 16 117 180 89 5492 12 8 0 80 6 1940 0 25 239 31 1228 17 118 142 65 3712 4 2 0 94 7 1692 0 30 122 8 1001 14 108 181 64 3872 3 1 0 96 March 10, 2026 at 10:47:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 202 42 0 3 0 0 0 0 0 0 100 1 0 0 7 224 101 4 0 1 0 0 0 0 0 0 100 2 0 0 0 19 1 2 0 0 0 0 0 0 0 0 100 3 2 0 14 18 2 2 0 0 0 0 266 0 0 0 100 4 0 0 0 37 6 48 0 2 0 0 1089 0 0 0 100 5 0 0 0 89 35 72 0 2 1 0 294 0 0 0 100 6 26 0 0 120 20 128 1 5 6 0 309 0 0 0 100 7 0 0 77 18 4 16 0 0 6 0 562 0 0 0 99 March 10, 2026 at 10:47:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 2 2381 204 118 0 4 1 0 0 0 0 0 100 1 0 0 5 288 103 12 0 4 0 0 0 0 0 0 100 2 0 0 0 155 39 82 0 1 0 0 2 0 0 0 100 3 0 0 14 78 2 2 0 0 0 0 266 0 0 0 100 4 0 0 0 94 10 46 1 0 0 0 1102 0 0 0 100 5 0 0 0 81 2 10 0 1 2 0 311 0 0 0 100 6 0 0 462 49 17 60 0 0 3 0 316 0 0 0 100 7 0 0 49 84 4 20 0 0 1 0 561 0 1 0 99 March 10, 2026 at 10:47:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 110 0 0 0 0 0 0 0 0 100 1 0 0 7 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 3 0 0 14 7 2 2 0 0 0 0 266 0 0 0 100 4 0 0 0 13 3 36 1 0 0 0 1081 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 6 0 0 0 20 7 14 0 0 1 0 310 0 0 0 100 7 0 0 7 15 4 12 0 0 0 0 559 0 0 0 100 March 10, 2026 at 10:47:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5682 0 324 2462 201 1088 35 164 127 65 3582 6 3 0 91 1 35408 0 254 303 102 965 30 154 136 82 4131 12 8 0 80 2 8455 0 143 180 33 1108 23 140 237 66 4259 3 4 0 92 3 6004 0 44 200 6 970 17 142 148 58 4480 3 2 0 95 4 3765 0 27 127 3 1099 23 140 157 78 5124 2 2 0 96 5 3012 0 6 120 4 849 17 113 115 59 4611 4 2 0 94 6 520 0 10 157 24 818 14 109 73 66 5158 2 1 0 97 7 666 0 18 110 5 734 19 92 66 42 2857 2 1 0 97 March 10, 2026 at 10:47:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 3 2331 205 186 1 14 109 0 29 0 0 0 99 1 1 0 87 218 103 103 0 13 86 0 16 0 1 0 99 2 0 0 7 27 1 97 0 10 73 0 13 0 0 0 100 3 0 0 0 149 64 146 0 7 81 0 15 0 0 0 100 4 26 0 14 32 5 125 1 5 85 0 1371 0 0 0 100 5 25 0 0 25 2 91 1 5 71 0 303 0 0 0 100 6 19 0 0 107 43 277 0 10 67 0 308 0 0 0 100 7 14 0 7 53 15 142 0 6 105 0 568 0 0 0 100 March 10, 2026 at 10:47:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 2 2345 213 119 0 7 0 0 11 0 0 0 100 1 0 0 19 254 113 28 0 3 4 0 0 0 0 0 100 2 0 0 0 71 20 48 0 2 0 0 0 0 0 0 100 3 0 0 0 28 2 4 0 1 0 0 2 0 0 0 100 4 0 0 14 36 4 42 1 2 1 0 1347 0 0 0 100 5 0 0 0 27 1 2 0 0 0 0 294 0 0 0 100 6 0 0 126 13 3 8 0 0 5 0 303 0 0 0 100 7 0 0 7 68 18 44 0 1 0 0 563 0 0 0 100 March 10, 2026 at 10:48:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2366 205 54 0 2 0 0 8 0 0 0 100 1 0 0 32 272 101 38 0 4 1 0 0 0 0 0 100 2 0 0 0 164 32 109 0 3 0 0 1 0 0 0 100 3 0 0 0 58 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 81 10 54 1 2 0 0 1353 0 0 0 100 5 0 0 0 97 20 46 0 1 0 0 299 0 0 0 100 6 0 0 336 15 3 17 0 0 1 0 316 0 0 0 100 7 1 0 7 70 5 18 0 0 0 0 560 0 0 0 100 March 10, 2026 at 10:48:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3718 0 138 2447 209 496 6 76 68 50 2719 3 2 0 96 1 603 0 40 299 101 531 7 87 72 65 2705 1 1 0 98 2 8817 0 132 161 40 515 10 68 74 44 3028 3 3 0 94 3 514 0 33 91 6 410 6 66 66 50 1527 1 1 0 98 4 7424 0 207 77 5 426 10 58 122 55 3853 3 3 0 94 5 2676 0 13 107 9 495 6 62 73 61 2141 1 1 0 98 6 241 0 16 93 6 408 3 48 50 56 1794 0 1 0 99 7 207 0 27 85 4 394 4 54 48 40 1996 1 1 0 98 March 10, 2026 at 10:48:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 746 0 7 2359 203 457 18 63 65 20 1327 2 1 0 97 1 902 0 46 254 102 296 12 39 62 13 761 1 0 0 98 2 28429 0 183 39 2 258 16 34 70 16 1361 9 6 0 85 3 421 0 70 50 2 281 6 40 34 12 916 1 1 0 98 4 2503 0 25 160 55 389 6 30 71 15 2544 1 1 0 98 5 4799 0 3 122 4 197 7 17 97 11 2051 4 1 0 95 6 1002 0 1 46 2 269 3 33 53 17 1398 1 1 0 98 7 434 0 7 52 4 285 8 38 35 17 1362 1 1 0 99 March 10, 2026 at 10:48:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2383 201 202 0 11 86 0 0 0 1 0 99 1 0 0 7 284 102 99 0 8 62 0 1 0 0 0 100 2 0 0 0 84 2 106 0 8 51 0 0 0 0 0 100 3 26 0 42 150 64 102 0 7 64 0 11 0 1 0 99 4 4 0 14 196 54 218 1 8 59 0 1349 0 0 0 99 5 0 0 0 86 3 110 0 11 67 0 293 0 0 0 100 6 0 0 462 22 4 173 0 10 51 0 300 0 0 0 100 7 0 0 7 90 5 98 0 6 58 0 562 0 0 0 100 March 10, 2026 at 10:48:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2305 200 112 0 0 1 0 0 0 0 0 100 1 0 0 4 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 9 1 22 0 0 1 0 0 0 0 0 100 3 0 0 0 18 7 12 0 0 0 0 8 0 0 0 100 4 0 0 14 107 52 134 0 0 1 0 1347 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 300 0 0 0 100 7 0 0 7 14 4 12 0 0 0 0 560 0 0 0 100 March 10, 2026 at 10:48:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 2 2307 201 114 0 1 0 0 0 0 0 0 100 1 0 0 5 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 7 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 20 8 14 0 0 0 0 10 0 0 0 100 4 0 0 14 119 59 144 1 0 0 0 1355 0 0 0 100 5 0 0 0 9 2 8 0 0 1 0 302 0 0 0 100 6 0 0 0 9 2 12 1 0 0 0 312 0 0 0 100 7 0 0 7 18 4 16 0 1 0 0 560 0 0 0 100 March 10, 2026 at 10:48:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3758 0 320 2435 206 1119 39 185 104 70 3735 4 2 0 93 1 1116 0 77 349 108 1102 41 183 106 74 3129 4 2 0 95 2 1792 0 202 141 3 940 22 146 102 70 4729 2 2 0 96 3 35835 0 25 167 11 1001 32 132 153 60 5572 12 8 0 80 4 7987 0 38 156 15 855 27 127 175 66 5795 4 3 0 93 5 6194 0 30 126 6 937 21 120 147 70 3362 3 2 0 95 6 4760 0 132 207 18 995 27 142 153 71 3764 2 3 0 95 7 1604 0 16 144 15 912 16 114 102 68 3807 2 1 0 96 March 10, 2026 at 10:48:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 80 2327 215 107 0 8 7 0 283 0 1 0 99 1 15 0 32 276 115 65 0 7 7 0 20 0 0 0 100 2 1 0 0 44 12 36 2 5 2 0 10 0 0 0 100 3 19 0 0 33 4 31 2 2 0 0 31 0 0 0 100 4 29 0 14 36 7 56 2 2 1 0 1380 0 0 0 100 5 0 0 0 26 2 10 0 1 2 0 298 0 0 0 100 6 0 0 7 23 2 10 0 2 0 0 312 0 0 0 100 7 0 0 0 62 16 46 0 3 0 0 304 0 0 0 100 March 10, 2026 at 10:48:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 52 2379 203 241 0 3 78 0 260 0 1 0 99 1 0 0 466 214 101 94 0 4 72 0 0 0 0 0 100 2 0 0 0 179 51 193 0 5 61 0 0 0 0 0 100 3 0 0 0 137 59 62 0 4 46 0 0 0 0 0 100 4 0 0 14 89 7 137 0 5 81 0 1355 0 0 0 99 5 0 0 0 81 2 90 0 3 62 0 294 0 0 0 100 6 0 0 0 86 2 187 0 7 64 0 300 0 0 0 100 7 0 0 0 86 3 93 0 6 91 0 300 0 0 0 100 March 10, 2026 at 10:48:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2311 205 124 0 2 2 0 260 0 0 0 100 1 0 0 4 208 102 2 0 0 1 0 0 0 0 0 100 2 0 0 0 107 51 104 0 1 1 0 0 0 0 0 100 3 0 0 0 14 4 28 0 0 0 0 2 0 0 0 100 4 0 0 14 22 9 49 1 1 0 0 1357 0 0 0 100 5 0 0 0 11 3 6 0 0 2 0 294 0 0 0 100 6 0 0 0 12 4 8 0 0 1 0 301 0 0 0 100 7 0 0 0 11 2 8 0 1 1 0 300 0 0 0 100 March 10, 2026 at 10:48:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34469 0 34 2440 205 1259 29 183 94 84 5253 12 8 0 80 1 2102 0 350 318 103 1160 27 183 125 64 4175 2 2 0 96 2 1152 0 16 212 45 1147 28 140 110 67 3382 4 1 0 95 3 802 0 34 136 2 1019 21 142 103 64 3995 4 2 0 94 4 776 0 29 144 16 938 29 142 131 48 5181 2 2 0 96 5 6714 0 201 113 3 807 27 112 182 59 4368 4 3 0 93 6 10707 0 165 181 9 882 21 129 196 76 4688 4 3 0 92 7 6308 0 26 186 2 955 27 115 178 96 4306 4 2 0 94 March 10, 2026 at 10:48:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 10 2325 204 117 1 4 1 0 277 0 0 0 100 1 26 0 18 233 105 22 0 2 6 0 26 0 0 0 100 2 15 0 70 18 4 13 0 2 7 0 45 0 1 0 99 3 1 0 0 27 5 17 0 5 5 0 46 0 0 0 100 4 17 0 14 25 3 37 1 2 0 0 1370 0 0 0 100 5 3 0 0 24 2 8 0 0 0 0 298 0 0 0 100 6 1 0 0 100 41 87 1 2 0 0 310 0 0 0 100 7 0 0 7 45 12 36 0 2 4 0 313 0 0 0 100 March 10, 2026 at 10:48:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2390 211 115 0 8 0 0 264 0 0 0 100 1 0 0 466 247 114 38 0 5 2 0 10 0 0 0 100 2 0 0 42 147 36 82 0 3 2 0 9 0 1 0 99 3 0 0 0 82 2 4 0 0 0 0 0 0 0 0 100 4 0 0 14 83 2 42 0 2 0 0 1351 0 0 0 100 5 0 0 0 81 2 24 0 1 1 0 312 0 0 0 100 6 0 0 0 84 3 6 0 0 0 0 301 0 0 0 100 7 0 0 0 93 4 16 0 1 0 0 299 0 0 0 100 March 10, 2026 at 10:48:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 10 2312 204 210 0 5 75 0 260 0 0 0 99 1 0 0 4 218 107 93 0 5 73 0 9 0 0 0 100 2 0 0 0 109 52 174 0 3 62 0 0 0 0 0 100 3 0 0 0 69 59 81 0 4 68 0 2 0 0 0 100 4 0 0 14 15 4 131 1 6 56 0 1349 0 0 0 100 5 0 0 0 15 3 91 0 9 70 0 294 0 0 0 100 6 0 0 0 11 3 201 0 9 67 0 300 0 0 0 100 7 0 0 0 11 2 100 0 9 64 0 300 0 0 0 100 March 10, 2026 at 10:48:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3327 0 207 2382 204 538 8 84 115 43 1921 1 3 0 96 1 1658 0 60 310 109 334 6 58 58 34 1634 2 1 0 97 2 1839 0 134 173 49 539 7 81 72 47 1878 1 2 0 97 3 209 0 5 80 3 348 4 56 37 36 1247 0 0 0 99 4 263 0 18 97 3 384 7 66 60 41 2692 1 1 0 99 5 249 0 14 78 2 266 4 38 47 23 1381 1 1 0 99 6 3303 0 3 77 2 263 6 36 92 25 3219 2 1 0 97 7 5480 0 146 100 1 287 4 42 91 34 1903 1 2 0 97 March 10, 2026 at 10:48:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3524 0 94 2380 210 905 42 142 131 39 5374 4 3 0 93 1 1003 0 43 265 103 778 33 134 67 27 2750 2 1 0 97 2 1011 0 7 141 8 836 24 138 82 24 2208 2 1 0 97 3 956 0 0 129 3 707 21 106 44 30 1716 3 1 0 96 4 2821 0 26 95 17 706 24 96 84 24 3820 3 1 0 96 5 34481 0 186 61 5 653 25 78 55 26 3035 11 7 0 82 6 576 0 6 116 22 863 26 103 34 19 2737 2 1 0 97 7 2549 0 4 90 13 699 16 90 79 33 2819 2 1 0 97 March 10, 2026 at 10:48:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 56 2376 204 98 0 5 2 0 263 0 1 0 99 1 0 0 7 285 101 6 0 2 0 0 0 0 0 0 100 2 0 0 462 114 39 102 0 4 2 0 0 0 0 0 100 3 0 0 0 93 6 16 0 2 0 0 0 0 0 0 100 4 4 0 14 83 3 36 1 0 0 0 1351 0 0 0 100 5 26 0 0 96 8 16 0 0 1 0 303 0 0 0 100 6 0 0 0 80 1 3 0 0 0 0 300 0 0 0 100 7 0 0 0 112 8 34 0 3 1 0 300 0 0 0 100 March 10, 2026 at 10:48:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2315 211 108 0 7 0 0 260 0 0 0 100 1 0 0 4 218 103 12 0 3 0 0 0 0 0 0 100 2 0 0 0 81 34 78 0 1 0 0 0 0 0 0 100 3 0 0 0 36 10 28 0 1 0 0 3 0 0 0 100 4 0 0 14 9 3 36 0 0 0 0 1351 0 0 0 100 5 0 0 0 21 8 16 0 0 0 0 303 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 March 10, 2026 at 10:48:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2317 204 230 0 11 88 0 260 0 0 0 100 1 0 0 5 208 101 119 0 9 91 0 0 0 0 0 100 2 0 0 0 105 50 217 0 7 92 0 0 0 0 0 100 3 0 0 0 80 72 108 0 6 61 0 0 0 0 0 100 4 0 0 14 10 3 119 1 4 86 0 1349 0 0 0 100 5 0 0 0 21 8 111 0 5 83 0 304 0 0 0 100 6 0 0 0 11 2 219 0 8 69 0 300 0 0 0 100 7 0 0 0 14 2 101 0 9 63 0 300 0 0 0 100 March 10, 2026 at 10:48:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7075 0 257 2407 208 1118 22 185 199 79 5022 5 4 0 91 1 40709 0 278 333 107 1071 30 152 192 75 5976 11 9 0 80 2 2015 0 12 179 23 1084 35 158 146 82 3857 3 2 0 96 3 2436 0 17 145 6 919 25 137 129 57 2887 4 1 0 95 4 4355 0 45 178 5 770 14 93 164 47 4032 2 2 0 96 5 1275 0 200 117 9 693 21 93 72 57 2490 3 2 0 95 6 4350 0 31 210 12 777 23 98 122 75 4430 4 2 0 94 7 1492 0 26 145 5 797 19 104 74 56 3794 3 2 0 95 March 10, 2026 at 10:48:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2335 216 117 0 6 0 0 265 0 0 0 100 1 1 0 21 279 116 65 0 6 0 0 3 0 0 0 100 2 0 0 0 71 25 60 0 2 6 0 14 0 0 0 100 3 0 0 0 28 3 8 0 2 4 0 9 0 0 0 100 4 4 0 21 34 9 46 1 2 2 0 1377 0 0 0 100 5 23 0 0 27 4 16 0 2 2 0 324 0 0 0 100 6 36 0 0 26 4 23 0 2 1 0 336 0 0 0 100 7 26 0 70 23 4 26 0 0 6 0 326 0 1 0 99 March 10, 2026 at 10:48:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2382 204 116 0 0 0 0 263 0 0 0 100 1 0 0 7 279 101 0 0 0 0 0 0 0 0 0 100 2 0 0 462 25 6 16 0 0 2 0 0 0 0 0 100 3 0 0 0 171 46 116 0 3 0 0 0 0 0 0 100 4 0 0 14 86 4 40 0 1 0 0 1349 0 0 0 100 5 0 0 0 82 2 6 0 1 0 0 294 0 0 0 100 6 0 0 0 87 4 8 0 0 1 0 302 0 0 0 100 7 0 0 42 90 7 18 0 0 2 0 309 0 1 0 99 March 10, 2026 at 10:48:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2310 206 118 0 4 2 0 260 0 0 0 100 1 0 0 5 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 73 31 84 0 2 1 0 0 0 0 0 100 4 0 0 14 48 22 76 1 1 1 0 1347 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 6 0 0 0 10 3 6 0 0 0 0 301 0 0 0 100 7 0 0 0 19 6 16 0 0 0 0 308 0 0 0 100 March 10, 2026 at 10:48:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3666 0 36 2523 217 1350 42 213 208 61 5594 4 2 0 93 1 1492 0 251 321 105 1146 44 196 170 66 3817 3 2 0 95 2 1476 0 29 117 2 1079 30 164 182 62 3603 3 2 0 95 3 1300 0 13 183 62 961 31 148 169 54 3268 2 2 0 96 4 12293 0 264 183 31 1197 38 150 292 74 6385 6 5 0 88 5 39538 0 20 133 7 1101 21 143 237 83 4764 13 8 0 79 6 1348 0 188 122 7 1149 28 133 150 81 5506 2 2 0 96 7 2564 0 39 194 10 1007 16 123 186 77 3235 2 2 0 96 March 10, 2026 at 10:48:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2330 205 15 0 3 1 0 292 0 0 0 100 1 13 0 19 221 102 9 0 2 2 0 19 0 0 0 100 2 41 0 70 24 7 20 0 0 8 0 34 0 1 0 99 3 3 0 0 65 2 72 0 2 7 0 9 0 0 0 100 4 11 0 14 127 34 152 2 8 2 0 1375 0 0 0 100 5 0 0 0 70 21 58 0 5 0 0 298 0 0 0 100 6 2 0 7 33 2 18 0 2 0 0 308 0 0 0 100 7 25 0 0 22 1 8 0 0 3 0 309 0 0 0 100 March 10, 2026 at 10:48:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2378 203 58 0 2 0 0 263 0 1 0 99 1 0 0 3 283 102 4 0 1 0 0 0 0 0 0 100 2 0 0 42 86 6 16 0 1 2 0 9 0 1 0 99 3 0 0 462 17 2 6 0 0 3 0 0 0 0 0 100 4 0 0 14 144 29 120 0 3 0 0 1367 0 0 0 100 5 1 0 0 138 5 64 0 3 1 0 313 0 0 0 100 6 0 0 0 122 20 58 0 2 0 0 321 0 0 0 100 7 0 0 7 107 12 40 0 4 0 0 300 0 0 0 100 March 10, 2026 at 10:48:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 10 2341 236 110 0 5 0 0 260 0 0 0 100 1 0 0 4 264 103 60 0 3 0 0 0 0 0 0 100 2 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 16 2 12 0 0 0 0 266 0 0 0 100 5 0 0 0 10 2 36 1 2 1 0 1382 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 55 17 50 0 2 0 0 300 0 0 0 100 March 10, 2026 at 10:48:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 29 2384 250 216 2 31 15 23 494 0 1 0 99 1 25 0 33 324 105 189 0 22 10 15 220 0 0 0 100 2 13 0 7 46 7 92 3 13 4 12 220 0 0 0 100 3 10 0 0 33 3 77 0 15 9 11 153 0 0 0 100 4 3124 0 133 32 3 129 3 16 54 24 1392 1 1 0 98 5 107 0 4 35 3 158 1 21 13 20 1693 0 0 0 99 6 87 0 1 42 2 110 3 19 14 17 1679 0 0 0 100 7 37 0 2 32 1 76 3 16 4 11 574 0 0 0 100 March 10, 2026 at 10:48:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 975 0 17 2426 207 1238 36 181 173 51 3343 2 2 0 96 1 4066 0 343 346 103 1046 39 170 202 33 2856 5 2 0 92 2 1900 0 20 206 35 1018 34 150 179 55 4442 4 2 0 94 3 37307 0 199 229 69 887 29 118 194 34 4068 11 8 0 81 4 6094 0 159 119 3 1000 25 124 215 64 5983 3 3 0 94 5 5216 0 9 147 15 984 32 140 216 45 4681 4 2 0 94 6 3055 0 15 107 4 832 16 97 175 37 3043 2 2 0 96 7 1235 0 10 115 5 1141 27 115 174 45 3563 2 2 0 96 March 10, 2026 at 10:48:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2383 205 108 0 0 0 0 263 0 0 0 100 1 0 0 49 275 101 4 0 1 2 0 0 0 0 0 100 2 0 0 0 180 50 102 0 0 0 0 0 0 0 0 100 3 0 0 462 15 1 4 0 1 2 0 0 0 0 0 100 4 4 0 14 92 3 16 0 0 0 0 270 0 0 0 100 5 0 0 0 85 3 36 1 0 1 0 1382 0 0 0 100 6 0 0 0 84 2 4 0 0 0 0 1 0 0 0 100 7 26 0 0 102 10 23 0 0 0 0 609 0 0 0 100 March 10, 2026 at 10:48:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 206 280 1 0 0 0 593 0 0 0 100 1 0 0 7 209 102 2 0 0 0 0 0 0 0 0 100 2 0 0 0 108 51 106 0 1 0 0 1 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 29 11 22 0 1 0 0 276 0 0 0 100 5 0 0 0 15 4 42 1 0 2 0 1386 0 0 0 100 6 0 0 0 12 2 22 0 1 0 0 20 0 0 0 100 7 0 0 0 26 8 46 0 1 1 0 610 0 0 0 100 March 10, 2026 at 10:48:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 204 130 0 1 0 0 260 0 0 0 100 1 0 0 7 209 102 2 0 0 0 0 0 0 0 0 100 2 0 0 0 108 50 102 0 1 0 0 0 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 21 0 0 0 100 4 0 0 14 18 3 14 0 0 0 0 268 0 0 0 100 5 0 0 0 13 3 36 1 0 1 0 1381 0 0 0 100 6 0 0 0 14 4 8 0 0 0 0 3 0 0 0 100 7 0 0 0 24 7 20 0 0 1 0 609 0 0 0 100 March 10, 2026 at 10:48:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2750 0 339 2458 211 1327 57 236 111 63 4334 3 2 0 95 1 2731 0 80 341 117 1165 39 184 143 85 5380 4 2 0 94 2 1830 0 11 224 20 1124 33 183 94 61 3974 4 1 0 95 3 1521 0 25 163 8 959 47 167 103 58 4915 3 2 0 95 4 2561 0 26 152 2 854 36 145 126 57 3761 3 2 0 95 5 7276 0 300 106 6 1009 29 136 171 59 5273 4 3 0 93 6 40497 0 26 148 2 996 39 127 180 72 4375 11 9 0 80 7 3858 0 11 146 9 953 31 122 109 58 4405 5 2 0 93 March 10, 2026 at 10:48:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 80 2316 203 216 0 11 89 0 268 0 1 0 99 1 6 0 32 243 109 105 0 6 82 0 26 0 0 0 100 2 42 0 0 126 52 206 0 11 83 0 20 0 0 0 100 3 1 0 0 87 61 112 0 9 75 0 25 0 0 0 100 4 15 0 21 37 6 104 1 7 73 0 289 0 0 0 100 5 20 0 0 34 5 151 1 14 76 0 1405 0 0 0 99 6 0 0 0 30 3 111 0 8 86 0 14 0 0 0 100 7 0 0 0 26 3 192 0 11 62 0 605 0 0 0 100 March 10, 2026 at 10:48:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 51 2376 204 102 0 3 1 0 263 0 1 0 99 1 0 0 5 292 102 12 0 2 0 0 0 0 0 0 100 2 0 0 0 191 56 116 0 1 0 0 9 0 0 0 100 3 0 0 462 14 1 4 0 0 1 0 0 0 0 0 100 4 0 0 14 89 2 34 0 1 0 0 266 0 0 0 100 5 0 0 0 83 3 38 0 1 0 0 1385 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 84 2 6 1 0 0 0 599 0 0 0 100 March 10, 2026 at 10:48:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2310 204 110 0 0 0 0 260 0 0 0 100 1 0 0 5 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 119 56 116 0 0 0 0 8 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 24 8 18 0 0 0 0 271 0 0 0 100 5 0 0 0 12 3 40 1 0 2 0 1391 0 0 0 100 6 2 0 0 11 3 14 0 0 1 0 18 0 0 0 100 7 0 0 0 13 2 16 0 0 0 0 605 0 0 0 100 March 10, 2026 at 10:48:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 653 0 18 2355 211 267 1 34 104 20 1117 0 1 0 99 1 468 0 120 231 104 140 0 29 2388 26 314 0 1 0 99 2 49 0 13 143 51 251 0 30 29 18 409 0 0 0 99 3 25 0 0 48 4 122 0 31 35 17 212 0 0 0 100 4 19 0 21 48 5 97 0 21 25 15 459 0 0 0 100 5 342 0 20 48 3 156 2 12 2448 12 1589 0 2 0 98 6 189 0 30 34 1 106 4 15 69 15 1803 0 1 0 99 7 2308 0 25 40 2 173 1 28 252 35 1299 0 1 0 98 March 10, 2026 at 10:48:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 11 2329 208 40 0 1 0 0 264 0 0 0 100 1 0 0 3 250 116 32 0 1 0 0 16 0 0 0 100 2 0 0 0 18 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 120 16 107 0 4 5 0 0 0 0 0 100 4 0 0 14 102 38 90 0 4 0 0 268 0 0 0 100 5 0 0 10 23 3 42 2 0 1 0 1058 0 0 0 100 6 0 0 56 12 1 6 0 1 5 0 0 0 0 0 100 7 0 0 7 23 3 11 0 2 0 0 603 0 0 0 100 March 10, 2026 at 10:48:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2390 213 194 0 14 70 0 259 0 1 0 99 1 0 0 4 316 121 132 0 4 53 0 20 0 0 0 100 2 0 0 0 77 1 68 0 4 61 0 0 0 0 0 100 3 0 0 455 96 61 106 0 10 44 0 0 0 0 0 100 4 0 0 14 159 40 165 0 9 56 0 266 0 0 0 100 5 0 0 0 81 3 115 0 5 58 0 1040 0 0 0 100 6 0 0 35 74 1 84 0 8 65 0 0 0 0 0 100 7 0 0 0 85 2 168 0 8 42 0 600 0 0 0 100 March 10, 2026 at 10:48:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2330 224 115 0 9 0 0 259 0 0 0 100 1 0 0 4 296 127 90 0 7 1 0 20 0 0 0 100 2 0 0 0 43 19 40 0 1 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 25 9 20 0 1 0 0 268 0 0 0 100 5 0 0 0 15 3 38 1 1 0 0 1040 0 0 0 100 6 0 0 1 11 3 20 0 1 0 0 2 0 0 0 100 7 0 0 0 9 1 7 0 0 0 0 597 0 0 0 100 March 10, 2026 at 10:48:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 124 1 1 0 0 267 0 0 0 100 1 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 2 0 0 0 111 52 109 0 1 0 0 1 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 4 0 14 17 9 6 0 0 0 0 271 0 0 0 100 5 0 0 0 12 3 42 1 1 1 0 1058 0 0 0 100 6 0 0 0 15 3 16 0 0 0 0 10 0 0 0 100 7 0 0 0 14 2 38 1 1 2 0 604 0 0 0 100 March 10, 2026 at 10:48:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2308 204 118 0 0 0 0 262 0 0 0 100 1 0 0 4 248 121 42 0 0 0 0 21 0 0 0 100 2 0 0 0 107 51 104 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 14 6 8 0 0 0 0 268 0 0 0 100 5 0 0 0 11 3 38 0 0 0 0 1043 0 0 0 100 6 0 0 0 11 3 10 0 0 0 0 7 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:48:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2312 204 140 0 1 0 0 259 0 0 0 100 1 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 2 0 0 0 109 52 108 0 0 0 0 9 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 40 1 0 0 0 1058 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 13 2 10 0 0 2 0 601 0 0 0 100 March 10, 2026 at 10:48:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2313 205 126 0 2 2 0 259 0 0 0 100 1 0 0 4 249 122 62 0 1 1 0 21 0 0 0 100 2 0 0 0 43 18 38 0 3 3 0 0 0 0 0 100 3 0 0 0 76 35 70 0 2 1 0 0 0 0 0 100 4 0 0 14 11 4 6 0 0 1 0 268 0 0 0 100 5 0 0 0 16 5 40 1 0 2 0 1039 0 0 0 100 6 0 0 0 11 3 6 0 0 2 0 1 0 0 0 100 7 0 0 0 12 3 8 0 0 4 0 599 0 0 0 100 March 10, 2026 at 10:48:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2308 203 116 0 0 0 0 259 0 0 0 100 1 0 0 4 244 120 40 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 106 51 100 0 0 0 0 0 0 0 0 100 4 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 5 0 0 0 11 3 36 0 0 1 0 1041 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:48:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2313 207 125 1 5 0 0 260 0 0 0 100 1 0 0 4 256 124 50 0 4 0 0 20 0 0 0 100 2 0 0 0 85 40 104 0 2 0 0 0 0 0 0 100 3 0 0 0 18 6 10 0 1 0 0 0 0 0 0 100 4 0 0 14 15 9 12 0 1 0 0 276 0 0 0 100 5 0 0 0 12 3 40 1 0 1 0 1048 0 0 0 100 6 0 0 0 13 3 12 0 0 0 0 10 0 0 0 100 7 0 0 0 17 2 16 1 0 1 0 600 0 0 0 100 March 10, 2026 at 10:48:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2308 203 118 0 1 0 0 259 0 0 0 100 1 0 0 4 248 121 42 0 0 0 0 20 0 0 0 100 2 0 0 0 109 51 126 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 5 0 0 0 11 3 36 0 0 1 0 1040 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 8 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:48:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 116 0 0 0 0 259 0 0 0 100 1 0 0 4 248 122 40 0 0 0 0 20 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 8 0 0 0 0 269 0 0 0 100 5 0 0 0 12 3 36 1 0 0 0 1040 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 8 0 1 0 0 600 0 0 0 100 March 10, 2026 at 10:48:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 124 0 0 3 0 259 0 0 0 100 1 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 2 0 0 0 109 51 126 0 0 2 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 5 0 0 0 15 4 40 2 0 4 0 1039 0 0 0 100 6 0 0 0 7 1 4 0 0 2 0 0 0 0 0 100 7 0 0 0 11 2 10 0 0 3 0 600 0 0 0 100 March 10, 2026 at 10:48:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 120 0 1 0 0 259 0 0 0 100 1 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 2 0 0 0 109 51 122 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 6 0 0 0 0 268 0 0 0 100 5 0 0 0 11 3 36 0 0 0 0 1040 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:48:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2312 204 118 0 0 0 0 259 0 0 0 100 1 0 0 4 244 120 40 0 0 0 0 20 0 0 0 100 2 0 0 0 109 52 106 0 0 0 0 1 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 18 9 14 0 0 0 0 275 0 0 0 100 5 0 0 0 13 3 40 2 0 0 0 1049 0 0 0 100 6 0 0 0 7 1 12 0 0 0 0 14 0 0 0 100 7 0 0 0 14 2 12 1 0 0 0 599 0 0 0 100 March 10, 2026 at 10:48:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 116 0 0 0 0 259 0 0 0 100 1 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 2 0 0 0 109 51 104 0 1 1 0 0 0 0 0 100 3 0 0 0 8 2 20 0 1 1 0 21 0 0 0 100 4 0 0 14 11 4 8 0 0 0 0 269 0 0 0 100 5 0 0 0 12 3 36 1 0 1 0 1040 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 7 0 0 0 11 2 8 0 0 1 0 601 0 0 0 100 March 10, 2026 at 10:48:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 118 0 1 0 0 259 0 0 0 100 1 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 7 2 24 0 1 0 0 266 0 0 0 100 5 0 0 0 11 3 36 0 0 1 0 1040 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:48:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2312 204 120 0 1 1 0 259 0 0 0 100 1 0 0 4 249 122 42 0 0 1 0 21 0 0 0 100 2 0 0 0 66 30 59 0 2 0 0 0 0 0 0 100 3 0 0 0 54 24 48 0 2 1 0 0 0 0 0 100 4 0 0 14 11 4 6 0 0 1 0 268 0 0 0 100 5 0 0 0 16 5 40 1 0 2 0 1039 0 0 0 100 6 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 12 3 6 0 0 1 0 600 0 0 0 100 March 10, 2026 at 10:48:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 117 0 4 0 0 259 0 0 0 100 1 0 0 4 248 121 42 0 1 0 0 20 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 40 17 32 0 2 0 0 0 0 0 0 100 4 0 0 14 75 35 74 0 2 0 0 266 0 0 0 100 5 0 0 0 11 3 56 0 1 0 0 1040 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:48:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 120 0 0 0 0 259 0 0 0 100 1 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 123 62 116 0 0 0 0 280 0 0 0 100 5 0 0 0 14 3 44 1 2 0 0 1060 0 0 0 100 6 0 0 0 9 1 32 0 1 0 0 12 0 0 0 100 7 0 0 0 13 2 14 0 0 0 0 601 0 0 0 100 March 10, 2026 at 10:48:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 118 0 0 0 0 259 0 0 0 100 1 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 23 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 107 52 104 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 36 1 0 1 0 1040 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 599 0 0 0 100 March 10, 2026 at 10:48:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 116 0 0 0 0 259 0 0 0 100 1 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 109 53 106 0 0 0 0 268 0 0 0 100 5 0 0 0 11 3 36 0 0 0 0 1040 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 26 1 2 1 0 601 0 0 0 100 March 10, 2026 at 10:48:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 142 0 1 0 0 259 0 0 0 100 1 0 0 4 248 121 42 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 107 52 104 0 0 0 0 266 0 0 0 100 5 0 0 0 14 4 40 1 0 0 0 1040 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 10 0 1 1 0 599 0 0 0 100 March 10, 2026 at 10:48:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2311 203 116 0 0 0 0 259 0 0 0 100 1 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 109 53 106 0 0 0 0 268 0 0 0 100 5 0 0 0 11 3 36 0 0 0 0 1040 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 13 2 10 0 0 0 0 601 0 0 0 100 March 10, 2026 at 10:49:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2309 203 122 0 0 0 0 259 0 0 0 100 1 0 0 4 246 121 60 0 1 0 0 20 0 0 0 100 2 0 0 0 9 2 6 0 0 0 0 1 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 114 57 108 0 0 1 0 271 0 0 0 100 5 0 0 0 12 3 40 1 0 0 0 1047 0 0 0 100 6 0 0 0 13 4 18 0 0 0 0 17 0 0 0 100 7 0 0 0 13 2 14 0 1 0 0 599 0 0 0 100 March 10, 2026 at 10:49:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 116 0 0 0 0 259 0 0 0 100 1 0 0 4 249 121 42 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 22 0 1 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 2 0 14 66 31 58 2 0 0 0 407 1 0 0 99 5 0 0 0 55 25 84 0 2 2 0 1042 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:49:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 116 0 0 0 0 259 0 0 0 100 1 0 0 4 246 121 40 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 5 0 0 0 112 53 136 1 0 0 0 1040 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 599 0 0 0 100 March 10, 2026 at 10:49:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2330 221 71 0 6 0 0 259 0 0 0 100 1 0 0 7 260 126 54 0 2 1 0 21 0 0 0 100 2 0 0 0 62 24 56 0 3 2 0 0 0 0 0 100 3 0 0 0 11 2 22 0 1 2 0 0 0 0 0 100 4 0 0 14 10 3 4 0 0 1 0 266 0 0 0 100 5 0 0 0 105 12 130 1 4 1 0 1042 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 14 3 6 1 0 1 0 601 0 0 0 100 March 10, 2026 at 10:49:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2308 204 68 0 1 0 0 259 0 0 0 100 1 0 0 4 250 121 46 0 2 0 0 20 0 0 0 100 2 0 0 0 23 3 16 0 1 0 0 0 0 0 0 100 3 0 0 0 38 15 32 0 2 1 0 0 0 0 0 100 4 0 0 14 7 2 22 0 1 1 0 266 0 0 0 100 5 0 0 0 111 37 136 0 3 1 0 1041 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:49:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2308 204 114 0 1 0 0 259 0 0 0 100 1 0 0 4 256 121 50 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 14 7 8 0 0 0 0 271 0 0 0 100 5 1 0 0 114 54 142 1 0 0 0 1048 0 0 0 100 6 0 0 0 11 3 18 0 0 0 0 18 0 0 0 100 7 0 0 0 15 2 12 0 0 0 0 601 0 0 0 100 March 10, 2026 at 10:49:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 203 110 0 0 0 0 259 0 0 0 100 1 0 0 4 254 121 48 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 8 2 4 0 0 1 0 266 0 0 0 100 5 0 0 0 111 53 160 0 2 0 0 1041 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 599 0 0 0 100 March 10, 2026 at 10:49:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 110 0 0 0 0 259 0 0 0 100 1 0 0 4 254 121 48 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 118 55 142 1 0 0 0 1041 0 0 0 100 6 0 0 0 7 1 22 0 1 0 0 0 0 0 0 100 7 0 0 0 11 2 8 0 1 0 0 601 0 0 0 100 March 10, 2026 at 10:49:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2310 204 114 0 0 0 0 259 0 0 0 100 1 0 0 4 254 121 48 0 0 0 0 20 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 71 33 96 0 0 0 0 1040 0 0 0 100 6 0 0 0 29 12 26 0 1 0 0 1 0 0 0 100 7 0 0 0 35 14 33 0 1 0 0 605 0 0 0 100 March 10, 2026 at 10:49:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2313 205 114 0 0 1 0 259 0 0 0 100 1 0 0 4 256 122 50 0 0 1 0 20 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 8 2 2 0 0 1 0 0 0 0 0 100 4 0 0 14 7 2 4 0 0 1 0 266 0 0 0 100 5 0 0 0 17 6 38 1 0 0 0 1039 0 0 0 100 6 0 0 0 13 3 12 0 2 1 0 3 0 0 0 100 7 0 0 0 113 53 133 0 4 1 0 600 0 0 0 100 March 10, 2026 at 10:49:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 203 134 0 1 0 0 259 0 0 0 100 1 0 0 7 257 121 50 0 0 0 0 20 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 1 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 17 9 8 0 0 0 0 276 0 0 0 100 5 0 0 0 12 3 42 0 1 0 0 1058 0 0 0 100 6 0 0 0 16 4 20 0 0 0 0 16 0 0 0 100 7 0 0 0 118 53 118 0 0 1 0 600 0 0 0 100 March 10, 2026 at 10:49:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 206 106 0 6 0 0 259 0 0 0 100 1 0 0 7 262 123 53 0 3 0 0 13 0 0 0 100 2 0 0 0 66 30 64 0 2 0 0 7 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 21 0 0 0 100 4 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 13 3 36 1 0 1 0 1040 0 0 0 100 6 0 0 0 16 5 10 0 0 0 0 4 0 0 0 100 7 0 0 0 48 18 43 0 2 0 0 596 0 0 0 100 March 10, 2026 at 10:49:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2311 203 110 0 0 0 0 259 0 0 0 100 1 0 0 4 214 101 28 0 1 0 0 0 0 0 0 100 2 0 0 0 149 72 148 0 0 0 0 29 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 40 1 0 0 0 1058 0 0 0 100 6 0 0 0 13 4 8 0 0 0 0 2 0 0 0 100 7 0 0 0 16 3 12 1 0 0 0 599 0 0 0 100 March 10, 2026 at 10:49:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 207 112 0 6 3 0 259 0 0 0 100 1 0 0 7 221 102 30 0 1 0 0 1 0 0 0 100 2 0 0 0 90 38 80 0 3 1 0 20 0 0 0 100 3 0 0 0 71 32 66 0 3 1 0 0 0 0 0 100 4 0 0 14 8 2 2 0 0 1 0 266 0 0 0 100 5 0 0 0 18 5 42 0 1 1 0 1041 0 0 0 100 6 0 0 0 14 4 6 0 0 1 0 2 0 0 0 100 7 0 0 0 15 4 8 0 0 1 0 601 0 0 0 100 March 10, 2026 at 10:49:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2307 203 114 0 0 0 0 259 0 0 0 100 1 0 0 4 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 3 0 0 0 106 51 100 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 36 1 0 1 0 1040 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 599 0 0 0 100 March 10, 2026 at 10:49:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2309 205 119 0 2 1 0 259 0 0 0 100 1 0 0 4 208 101 24 0 1 0 0 0 0 0 0 100 2 0 0 0 47 21 44 0 0 0 0 20 0 0 0 100 3 0 0 0 104 49 96 0 1 0 0 0 0 0 0 100 4 0 0 14 13 7 6 0 0 1 0 273 0 0 0 100 5 0 0 0 11 3 44 0 1 0 0 1045 0 0 0 100 6 1 0 0 15 5 16 0 0 0 0 14 0 0 0 100 7 0 0 0 15 3 18 0 2 1 0 603 0 0 0 100 March 10, 2026 at 10:49:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2329 221 106 0 8 0 0 259 0 0 0 100 1 0 0 7 312 133 103 0 8 1 0 0 0 0 0 100 2 0 0 0 48 21 62 0 1 0 0 20 0 0 0 100 3 0 0 0 15 1 8 0 1 0 0 0 0 0 0 100 4 0 0 14 10 4 4 0 0 0 0 267 0 0 0 100 5 0 0 0 13 3 36 1 0 1 0 1040 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 14 3 10 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:49:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2339 233 114 0 4 2 0 259 0 0 0 100 1 0 0 4 306 121 102 0 5 0 0 0 0 0 0 100 2 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 11 3 36 0 0 0 0 1040 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 7 0 0 0 13 3 10 0 1 0 0 600 0 0 0 100 March 10, 2026 at 10:49:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2321 215 106 0 7 0 0 259 0 0 0 100 1 0 0 5 279 119 72 0 6 0 0 0 0 0 0 100 2 0 0 0 49 21 44 0 0 1 0 20 0 0 0 100 3 0 0 0 6 1 20 0 1 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 14 4 40 1 0 0 0 1041 0 0 0 100 6 0 0 0 25 10 22 0 1 0 0 0 0 0 0 100 7 0 0 0 37 15 35 0 1 0 0 602 0 0 0 100 March 10, 2026 at 10:49:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2320 212 114 0 7 0 0 259 0 0 0 100 1 0 0 4 278 128 73 0 5 0 0 0 0 0 0 100 2 0 0 0 47 21 42 0 0 0 0 20 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 20 0 1 0 0 266 0 0 0 100 5 0 0 0 12 3 36 1 0 0 0 1040 0 0 0 100 6 0 0 0 13 4 8 0 0 0 0 3 0 0 0 100 7 0 0 0 43 16 39 0 1 1 0 598 0 0 0 100 March 10, 2026 at 10:49:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2326 220 88 0 4 0 0 259 0 0 0 100 1 0 0 4 309 121 102 0 5 0 0 0 0 0 0 100 2 0 0 0 75 35 74 0 1 0 0 21 0 0 0 100 3 0 0 0 6 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 16 8 12 0 0 0 0 283 0 0 0 100 5 0 0 0 13 3 38 0 0 0 0 1043 0 0 0 100 6 0 0 0 9 2 10 0 0 0 0 3 0 0 0 100 7 0 0 0 15 3 18 0 0 0 0 606 0 0 0 100 March 10, 2026 at 10:49:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2309 203 92 0 3 1 0 259 0 0 0 100 1 0 0 5 230 101 24 0 2 0 0 0 0 0 0 100 2 0 0 0 147 71 140 0 0 0 0 20 0 0 0 100 3 0 0 0 6 1 2 0 1 0 0 0 0 0 0 100 4 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 38 1 1 2 0 1040 0 0 0 100 6 0 0 0 15 5 26 0 1 0 0 4 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:49:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2309 203 108 0 0 0 0 259 0 0 0 100 1 0 0 4 215 101 8 0 0 0 0 0 0 0 0 100 2 0 0 0 146 70 140 1 0 0 0 20 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 11 3 36 0 0 1 0 1040 0 0 0 100 6 0 0 0 13 3 8 0 0 0 0 1 0 0 0 100 7 0 0 0 14 3 30 1 1 0 0 600 0 0 0 100 March 10, 2026 at 10:49:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2318 210 115 0 4 1 0 259 0 0 0 100 1 0 0 4 252 115 48 0 3 1 0 1 0 0 0 100 2 0 0 0 109 51 102 0 2 0 0 20 0 0 0 100 3 0 0 0 12 3 4 0 1 1 0 0 0 0 0 100 4 0 0 14 7 2 2 0 0 1 0 266 0 0 0 100 5 0 0 0 18 5 42 1 0 1 0 1040 0 0 0 100 6 0 0 0 13 4 6 0 0 1 0 2 0 0 0 100 7 0 0 0 14 4 8 0 0 1 0 599 0 0 0 100 March 10, 2026 at 10:49:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2312 206 134 0 5 0 0 259 0 0 0 100 1 0 0 4 232 109 22 0 3 0 0 0 0 0 0 100 2 0 0 0 123 59 120 0 1 0 0 20 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 36 1 0 0 0 1040 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 7 0 0 0 15 3 12 0 1 2 0 601 0 0 0 100 March 10, 2026 at 10:49:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2309 203 118 0 0 1 0 259 0 0 0 100 1 0 0 4 206 101 2 0 1 0 0 0 0 0 0 100 2 0 0 0 145 70 160 0 1 0 0 20 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 14 7 8 0 0 0 0 273 0 0 0 100 5 0 0 0 11 3 38 0 0 0 0 1041 0 0 0 100 6 0 0 0 17 5 20 0 0 0 0 21 0 0 0 100 7 0 0 0 19 4 21 0 0 0 0 607 0 0 0 100 March 10, 2026 at 10:49:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 13 2309 203 114 0 0 0 0 259 0 0 0 100 1 0 0 7 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 146 70 140 0 0 0 0 20 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 13 3 36 1 0 0 0 1040 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 9 0 0 3 0 598 0 0 0 100 March 10, 2026 at 10:49:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2309 203 114 0 0 0 0 259 0 0 0 100 1 0 0 4 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 147 70 142 0 0 1 0 20 0 0 0 100 3 0 0 0 8 2 22 0 1 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 36 1 0 2 0 1040 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 7 0 0 0 13 3 10 0 1 0 0 600 0 0 0 100 March 10, 2026 at 10:49:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2309 203 118 0 0 0 0 259 0 0 0 100 1 0 0 4 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 20 0 1 0 0 266 0 0 0 100 5 0 0 0 13 4 40 0 0 1 0 1040 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 601 0 0 0 100 March 10, 2026 at 10:49:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2311 203 116 0 0 0 0 259 0 0 0 100 1 0 0 4 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 36 1 0 0 0 1040 0 0 0 100 6 0 0 0 13 4 8 0 0 0 0 3 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 599 0 0 0 100 March 10, 2026 at 10:49:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2311 204 120 0 0 0 0 261 0 0 0 100 1 0 0 4 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 145 70 142 0 0 0 0 20 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 12 6 10 0 0 0 0 270 0 0 0 100 5 0 0 0 14 3 40 1 1 0 0 1043 0 0 0 100 6 0 0 0 15 5 32 0 1 1 0 17 0 0 0 100 7 0 0 0 15 3 20 0 0 1 0 607 0 0 0 100 March 10, 2026 at 10:49:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2307 202 114 0 0 0 0 259 0 0 0 100 1 0 0 4 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 3 0 0 0 10 3 4 0 0 0 0 21 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 11 3 36 0 0 1 0 1041 0 0 0 100 6 0 0 0 17 5 12 0 0 0 0 4 0 0 0 100 7 0 0 0 13 3 30 0 1 0 0 599 0 0 0 100 March 10, 2026 at 10:49:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 13 2311 203 114 0 0 0 0 259 0 0 0 100 1 0 0 7 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 146 70 140 0 0 0 0 20 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 12 4 8 0 0 0 0 269 0 0 0 100 5 0 0 0 13 3 36 1 0 1 0 1039 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 1 0 0 0 100 7 0 0 0 17 3 12 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:49:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 13 2311 203 144 0 1 1 0 259 0 0 0 100 1 0 0 7 208 102 2 0 0 1 0 1 0 0 0 100 2 0 0 0 148 71 140 0 0 0 0 20 0 0 0 100 3 0 0 0 13 3 4 0 0 1 0 0 0 0 0 100 4 0 0 14 8 2 4 0 1 1 0 266 0 0 0 100 5 0 0 0 18 5 42 0 0 2 0 1040 0 0 0 100 6 0 0 0 14 4 6 0 0 1 0 2 0 0 0 100 7 0 0 0 16 4 10 0 0 4 0 600 0 0 0 100 March 10, 2026 at 10:49:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2309 203 116 0 0 0 0 259 0 0 0 100 1 0 0 4 206 101 20 0 1 0 0 0 0 0 0 100 2 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 36 1 0 1 0 1040 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 599 0 0 0 100 March 10, 2026 at 10:49:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 13 2304 203 118 0 0 0 0 258 0 0 0 100 1 0 0 7 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 146 70 142 0 0 0 0 20 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 18 9 10 0 0 0 0 273 0 0 0 100 5 0 0 0 13 3 36 1 0 0 0 1040 0 0 0 100 6 0 0 0 12 3 14 0 0 0 0 14 0 0 0 100 7 0 0 0 16 3 20 0 0 0 0 609 0 0 0 100 March 10, 2026 at 10:49:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2309 203 116 0 1 1 0 259 0 0 0 100 1 0 0 5 208 101 22 0 0 0 0 0 0 0 0 100 2 0 0 0 145 70 140 0 0 0 0 20 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 5 0 0 0 11 3 36 0 0 0 0 1040 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:49:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2311 203 50 0 1 2 0 259 0 0 0 100 1 0 0 5 208 101 22 0 0 1 0 0 0 0 0 100 2 0 0 0 145 45 140 0 4 0 0 20 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 59 21 58 0 4 0 0 266 0 0 0 100 5 0 0 0 22 8 48 1 1 1 0 1041 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 7 0 0 0 14 3 10 1 1 0 0 600 0 0 0 100 March 10, 2026 at 10:49:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2311 203 18 0 0 0 0 259 0 0 0 100 1 0 0 5 206 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 145 24 140 0 1 0 0 20 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 5 0 0 0 114 50 140 1 1 1 0 1039 0 0 0 100 6 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:49:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2309 203 16 0 0 1 0 259 0 0 0 100 1 0 0 5 208 101 22 0 0 0 0 0 0 0 0 100 2 0 0 0 145 28 140 0 2 0 0 20 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 7 1 4 0 1 0 0 266 0 0 0 100 5 0 0 0 32 5 54 1 1 1 0 1040 0 0 0 100 6 0 0 0 69 32 66 0 1 0 0 3 0 0 0 100 7 0 0 0 39 15 37 0 1 0 0 603 0 0 0 100 March 10, 2026 at 10:49:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2307 202 22 0 0 1 0 259 0 0 0 100 1 0 0 4 208 101 22 0 0 0 0 0 0 0 0 100 2 0 0 0 150 21 147 0 0 0 0 21 0 0 0 100 3 0 0 0 8 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 15 7 8 0 0 0 0 271 0 0 0 100 5 0 0 0 11 3 36 0 0 0 0 1040 0 0 0 100 6 0 0 0 15 4 20 0 0 0 0 15 0 0 0 100 7 0 0 0 115 53 120 0 0 0 0 607 0 0 0 100 March 10, 2026 at 10:49:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 10 2314 205 387 3 5 5 0 321 0 0 0 99 1 0 0 3 226 111 20 0 1 0 0 0 0 0 0 100 2 1 0 0 119 46 114 0 2 0 0 45 0 0 0 100 3 0 0 0 8 2 10 0 0 0 0 0 0 0 0 100 4 9 0 14 293 285 26 1 2 10 0 402 0 0 0 99 5 1286 0 2 13 3 48 2 0 2 0 1079 0 1 0 99 6 568 0 0 16 5 74 2 3 15 0 241 0 0 0 100 7 0 0 0 47 13 328 0 5 8 0 694 0 0 0 100 March 10, 2026 at 10:49:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2340 234 116 0 3 0 0 259 0 0 0 100 1 0 0 7 309 120 122 0 4 0 0 0 0 0 0 100 2 0 0 0 8 1 8 0 0 0 0 9 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 2 0 14 27 16 20 0 0 0 0 297 0 0 0 100 5 0 0 0 15 3 40 1 1 1 0 1059 0 0 0 100 6 0 0 0 16 4 10 0 0 0 0 12 0 0 0 100 7 0 0 0 16 4 14 0 0 0 0 600 0 0 0 100 March 10, 2026 at 10:49:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 205 446 0 9 43 0 259 0 0 0 100 1 0 0 7 265 112 146 0 8 44 0 1 0 0 0 100 2 0 0 0 84 24 182 0 9 32 0 0 0 0 0 100 3 0 0 0 81 71 106 0 5 40 0 0 0 0 0 100 4 0 0 14 306 294 88 0 6 57 0 277 0 0 0 100 5 0 0 0 19 5 121 0 7 43 0 1041 0 0 0 100 6 658 0 0 56 18 180 0 4 42 0 260 0 0 0 99 7 0 0 0 20 5 521 0 5 40 0 602 0 0 0 100 March 10, 2026 at 10:49:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2319 210 71 0 3 0 0 259 0 0 0 100 1 0 0 5 218 105 14 0 3 0 0 0 0 0 0 100 2 0 0 0 91 1 86 0 3 0 0 0 0 0 0 100 3 0 0 0 8 2 4 0 0 0 0 0 0 0 0 100 4 1 0 14 83 72 28 0 1 1 0 316 0 0 0 99 5 0 0 0 12 3 38 1 0 1 0 1043 0 0 0 100 6 0 0 0 73 32 68 0 2 0 0 14 0 0 0 100 7 0 0 0 31 12 64 0 1 2 0 604 0 0 0 100