March 10, 2026 at 10:41:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 735 0 139 2246 126 5524 39 261 1425 4 4887 4 7 0 89 1 741 0 63 119 16 2888 14 328 1349 4 6666 8 4 0 88 2 842 0 54 154 15 2711 17 233 1355 3 6073 8 4 0 88 3 1269 0 38 578 455 3644 12 267 1392 7 7311 3 4 0 93 4 951 0 149 2398 2294 2655 12 308 1487 5 8553 6 4 0 90 5 659 0 31 205 18 2743 11 184 1366 5 6883 7 6 0 87 6 589 0 98 121 7 3619 13 305 1381 6 7558 3 4 0 93 7 771 0 45 99 6 5033 17 183 1417 5 4318 2 4 0 94 March 10, 2026 at 10:41:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9084 0 91 2372 120 1215 57 176 1467 63 4328 2 30 0 67 1 2133 0 45 271 57 490 59 126 680 20 1873 10 12 0 79 2 3741 0 28 152 10 738 46 156 1052 57 2341 5 11 0 84 3 5996 0 97 966 418 649 72 144 673 71 2714 11 18 0 71 4 4118 0 753 165 17 839 42 174 998 83 1543 4 11 0 85 5 12972 0 123 327 2 1032 61 171 1665 65 5324 9 12 0 79 6 8542 0 32 191 12 965 75 165 1426 68 2909 8 14 0 79 7 1591 0 8 144 5 1190 29 200 1231 102 1991 2 11 0 88 March 10, 2026 at 10:41:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 94 0 0 2160 108 1026 4 67 612 0 915 0 1 0 99 1 0 0 10 255 104 262 2 85 573 0 259 0 1 0 99 2 0 0 0 136 48 335 2 64 571 0 0 0 1 0 99 3 0 0 17 591 437 256 3 68 583 0 266 0 1 0 99 4 0 0 0 47 1 248 3 79 549 0 0 0 1 0 99 5 31 0 0 61 1 309 3 72 604 0 1060 0 1 0 99 6 0 0 0 43 0 230 2 75 487 0 0 0 1 0 99 7 0 0 0 55 3 247 3 69 568 0 0 0 1 0 99 March 10, 2026 at 10:41:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 104 998 1 83 501 0 894 0 1 0 99 1 0 0 10 254 104 263 0 84 750 0 260 0 1 0 99 2 0 0 0 156 52 365 0 75 659 0 0 0 1 0 99 3 0 0 17 590 438 258 0 78 687 0 266 0 1 0 99 4 0 0 0 53 1 258 0 73 624 0 2 0 1 0 99 5 27 0 0 59 2 290 1 69 658 0 1043 0 1 0 99 6 0 0 0 44 0 251 0 76 681 0 0 0 1 0 99 7 0 0 0 55 1 243 1 70 567 0 0 0 1 0 99 March 10, 2026 at 10:41:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 104 323 1 22 247 0 903 0 1 0 99 1 0 0 10 219 103 514 1 22 244 0 259 0 0 0 100 2 0 0 0 118 53 323 0 25 277 0 0 0 0 0 100 3 0 0 17 402 289 200 0 20 233 0 266 0 0 0 100 4 0 0 0 25 6 173 1 17 236 0 0 0 0 0 100 5 0 0 0 25 2 228 1 20 211 0 1049 0 0 0 99 6 0 0 0 20 2 207 7 20 233 0 0 0 0 0 100 7 0 0 0 31 5 227 0 18 200 0 11 0 0 0 100 March 10, 2026 at 10:41:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 104 238 0 20 183 1 894 0 1 0 99 1 0 0 10 214 103 199 0 25 198 4 259 0 0 0 100 2 0 0 0 115 52 194 0 11 233 3 0 0 1 0 99 3 0 0 17 262 152 101 0 15 206 1 266 0 1 0 99 4 0 0 0 11 2 104 0 15 184 5 3 0 0 0 100 5 0 0 0 12 1 132 0 8 214 1 1040 0 1 0 99 6 0 0 0 13 1 99 0 15 215 0 0 0 1 0 99 7 0 0 0 12 2 109 0 12 197 0 0 0 0 0 100 March 10, 2026 at 10:41:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4450 0 1 2271 105 932 155 119 270 16 3357 15 6 0 80 1 2422 0 2 305 103 527 51 63 181 16 1540 24 2 0 74 2 1475 0 0 162 25 562 76 68 183 10 1807 16 2 0 82 3 2562 0 354 323 151 730 118 122 280 7 2609 7 2 0 91 4 4834 0 14 131 10 716 81 97 286 17 2448 8 4 0 87 5 3691 0 1 111 14 789 84 96 233 14 2919 11 2 0 87 6 2383 0 0 121 3 695 113 106 215 8 2096 7 2 0 91 7 551 0 0 94 3 451 31 61 124 13 1700 14 1 0 85 March 10, 2026 at 10:41:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 104 127 0 2 1 0 904 0 0 0 100 1 10 0 3 219 106 16 0 2 0 0 12 0 0 0 100 2 1 0 3 15 4 16 0 2 0 0 9 0 0 0 100 3 3 0 31 216 105 13 0 4 5 0 277 0 0 0 100 4 4 0 7 14 4 12 0 1 8 0 323 0 0 0 100 5 0 0 0 110 51 136 1 1 3 0 1125 0 0 0 100 6 0 0 0 11 2 10 0 0 0 0 4 0 0 0 100 7 3 0 0 11 2 4 0 0 6 0 9 0 0 0 100 March 10, 2026 at 10:41:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 105 120 0 2 2 0 895 0 0 0 100 1 0 0 3 219 107 12 0 0 0 0 9 0 0 0 100 2 0 0 0 9 1 20 0 0 0 0 0 0 0 0 100 3 0 0 17 207 103 2 0 0 0 0 266 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 5 6 0 0 108 51 132 1 0 1 0 1120 0 0 0 100 6 0 0 0 11 2 10 0 2 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 March 10, 2026 at 10:41:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 112 127 0 7 0 0 904 0 0 0 100 1 0 0 5 257 124 64 0 10 0 0 10 0 0 0 100 2 0 0 0 21 8 26 0 3 0 0 2 0 0 0 100 3 0 0 17 207 103 2 0 0 0 0 266 0 0 0 100 4 0 0 7 17 8 6 0 0 0 0 262 0 0 0 100 5 1 0 1 13 3 44 0 0 0 1 1129 0 0 0 100 6 0 0 0 51 17 48 0 4 0 0 0 0 0 0 100 7 0 0 0 24 6 29 0 3 0 1 10 0 0 0 100 March 10, 2026 at 10:41:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4697 0 12 2134 104 434 6 55 509 8 1618 2 2 0 96 1 696 0 12 261 110 347 6 57 416 15 565 0 1 0 99 2 685 0 3 127 51 429 2 42 487 9 389 0 1 0 99 3 75 0 17 316 190 411 2 38 326 16 660 0 1 0 99 4 186 0 13 24 5 276 1 42 449 3 463 0 1 0 99 5 447 0 0 24 1 298 5 34 334 6 1696 2 1 0 98 6 39 0 21 29 3 302 4 39 388 6 314 0 2 0 98 7 115 0 14 15 1 308 3 43 482 8 211 0 1 0 99 March 10, 2026 at 10:41:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 105 104 0 3 3 0 895 0 0 0 100 1 0 0 3 232 102 28 0 2 1 0 0 0 0 0 100 2 0 0 0 112 51 108 0 0 2 0 0 0 0 0 100 3 0 0 17 220 109 18 0 0 2 0 267 0 0 0 100 4 0 0 7 17 4 22 0 2 7 0 261 0 0 0 100 5 0 0 7 12 2 36 1 1 1 0 1050 0 0 0 100 6 0 0 0 22 3 20 0 1 5 0 0 0 0 0 100 7 28 0 14 20 6 18 0 1 4 0 29 0 0 0 100 March 10, 2026 at 10:41:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2112 104 118 0 1 1 0 894 0 0 0 99 1 0 0 3 224 101 2 0 0 0 0 0 0 0 0 100 2 0 0 0 124 51 102 0 0 0 0 0 0 0 0 100 3 0 0 17 226 104 4 0 0 0 0 266 0 0 0 100 4 0 0 7 27 3 10 0 0 0 0 316 0 0 0 100 5 5 0 0 29 1 34 1 0 1 0 1041 0 0 0 100 6 0 0 0 40 4 24 0 1 0 0 20 0 0 0 100 7 0 0 0 38 7 16 0 0 0 0 9 0 0 0 100 March 10, 2026 at 10:41:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 104 118 0 1 0 0 895 0 0 0 100 1 0 0 3 211 102 2 0 0 0 0 1 0 0 0 100 2 0 0 0 109 51 102 0 0 0 0 0 0 0 0 100 3 0 0 17 209 103 2 0 0 0 0 266 0 0 0 100 4 0 0 7 14 3 8 0 0 0 0 262 0 0 0 100 5 0 0 0 9 1 34 0 1 0 0 1041 0 0 0 100 6 0 0 0 13 3 22 0 1 1 0 1 0 0 0 100 7 0 0 14 23 6 20 0 1 0 0 9 0 0 0 100 March 10, 2026 at 10:41:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 211 0 0 2138 105 563 14 44 8 1 3216 2 1 0 97 1 53 0 7 228 102 307 6 23 10 0 3002 1 0 0 98 2 170 0 0 129 53 588 5 37 0 1 1834 2 0 0 98 3 26 0 105 214 104 284 4 24 6 0 2262 1 0 0 98 4 85 0 7 34 10 338 3 19 7 0 2906 2 0 0 98 5 51 0 0 30 3 471 4 23 13 0 2689 1 1 0 98 6 18 0 0 39 7 329 6 17 7 0 2047 1 0 0 98 7 94 0 0 51 12 445 2 16 4 0 1446 1 0 0 99 March 10, 2026 at 10:41:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 85 0 0 2165 104 920 23 88 230 1 3853 3 1 0 96 1 66 0 3 249 107 734 16 67 214 0 5675 3 1 0 96 2 91 0 0 51 1 884 17 63 257 0 3294 2 1 0 97 3 60 0 185 318 173 830 9 55 227 0 3359 2 1 0 97 4 12 0 7 127 47 667 5 32 209 0 4136 2 1 0 97 5 41 0 0 55 4 992 15 40 181 0 4609 2 1 0 97 6 84 0 0 55 5 720 16 41 270 0 3193 3 1 0 96 7 18 0 0 49 4 703 2 37 185 0 4193 2 1 0 98 March 10, 2026 at 10:41:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 0 0 0 0 300 0 0 0 100 1 0 0 3 213 104 24 0 1 0 0 593 0 0 0 100 2 0 0 0 7 1 4 0 0 0 0 10 0 0 0 100 3 0 0 17 207 103 2 0 0 0 0 266 0 0 0 100 4 0 0 7 110 53 106 0 0 0 0 261 0 0 0 100 5 0 0 0 8 1 32 1 0 0 0 1043 0 0 0 100 6 0 0 0 13 4 10 0 0 0 0 5 0 0 0 100 7 1 0 0 27 7 22 0 0 0 0 9 0 0 0 100 March 10, 2026 at 10:41:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 110 0 0 0 0 300 0 0 0 100 1 0 0 3 215 104 8 0 1 1 0 595 0 0 0 100 2 0 0 0 7 1 6 0 1 0 0 10 0 0 0 100 3 0 0 17 207 103 16 0 1 0 0 266 0 0 0 100 4 0 0 7 110 53 106 0 0 0 0 262 0 0 0 100 5 0 0 0 8 1 32 1 0 0 0 1045 0 0 0 100 6 0 0 0 11 3 8 0 0 0 0 1 0 1 0 99 7 0 0 0 21 4 16 0 0 0 0 5 0 0 0 100 March 10, 2026 at 10:41:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 118 0 0 2126 102 193 0 10 6 17 500 0 0 0 99 1 16 0 3 232 105 61 1 15 4 4 732 0 0 0 100 2 47 0 0 24 1 55 0 12 5 8 168 0 0 0 100 3 12 0 20 223 103 30 0 5 4 6 317 0 0 0 100 4 39 0 7 125 52 132 0 5 3 6 313 0 0 0 100 5 6 0 0 24 1 54 1 3 3 4 1121 0 0 0 100 6 617 0 0 30 4 38 1 5 5 6 903 1 1 0 98 7 2576 0 112 24 4 51 2 5 5 9 401 0 1 0 99 March 10, 2026 at 10:41:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 0 0 300 0 0 0 100 1 0 0 3 213 104 10 0 0 0 0 603 0 0 0 100 2 0 0 0 7 1 4 0 0 0 0 10 0 0 0 100 3 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 4 0 0 7 127 64 140 0 1 1 0 269 0 0 0 100 5 0 0 0 8 1 40 1 0 0 0 1141 0 0 0 100 6 0 0 0 11 2 10 0 0 0 0 5 0 0 0 100 7 0 0 0 25 5 29 0 0 0 0 329 0 0 0 100 March 10, 2026 at 10:41:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 233 0 0 2130 102 509 15 46 6 1 2620 1 1 0 98 1 99 0 3 230 105 404 6 44 2 1 3115 1 0 0 99 2 112 0 0 20 1 235 6 30 4 3 2288 2 0 0 98 3 139 0 73 208 103 396 5 37 6 4 2279 1 0 0 99 4 119 0 7 78 28 447 11 52 5 2 2858 1 0 0 99 5 144 0 0 77 30 491 3 34 8 1 2938 1 1 0 98 6 8 0 0 24 4 336 6 32 3 0 2232 1 0 0 99 7 297 0 0 27 2 336 5 22 8 0 1736 1 0 0 98 March 10, 2026 at 10:41:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2112 103 106 0 3 1 0 310 0 0 0 100 1 0 0 3 225 104 18 0 0 2 0 599 0 0 0 100 2 1 0 0 15 4 16 0 0 0 0 14 0 0 0 100 3 0 0 31 211 105 10 0 1 11 0 323 0 0 0 100 4 0 0 7 18 6 14 0 1 0 0 270 0 0 0 100 5 0 0 0 112 52 136 1 0 4 0 1144 0 0 0 100 6 2 0 0 15 4 12 0 2 0 0 3 0 0 0 100 7 0 0 0 17 1 12 0 0 0 0 7 0 0 0 100 March 10, 2026 at 10:41:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 110 0 0 0 0 300 0 0 0 100 1 0 0 3 216 104 8 1 0 1 0 594 0 0 0 100 2 0 0 0 17 6 28 0 1 1 0 5 0 0 0 100 3 0 0 17 207 103 2 0 0 0 0 266 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 5 0 0 0 16 5 38 1 0 0 0 1131 0 0 0 100 6 0 0 0 101 48 100 0 1 0 0 0 0 0 0 100 7 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 103 133 1 4 6 0 312 0 0 0 100 1 0 0 3 237 113 33 0 2 6 0 615 0 0 0 100 2 0 0 0 20 4 33 0 1 5 0 38 0 0 0 100 3 0 0 17 214 104 35 0 7 11 3 419 0 0 0 100 4 0 0 16 15 3 28 0 3 4 0 262 0 1 0 99 5 1 0 0 14 1 40 1 4 6 0 1149 0 0 0 100 6 0 0 21 113 52 119 0 3 9 0 14 0 0 0 100 7 2 0 0 18 0 20 0 5 8 0 21 0 0 0 100 March 10, 2026 at 10:41:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 80 1 1 1 0 311 0 0 0 100 1 0 0 3 226 110 24 0 1 1 0 613 0 0 0 100 2 0 0 0 14 4 8 0 1 1 0 3 0 0 0 100 3 0 0 17 208 103 2 0 0 1 0 266 0 0 0 100 4 0 0 7 20 8 6 0 1 1 0 260 0 0 0 100 5 0 0 0 57 23 88 1 2 1 0 1056 0 0 0 100 6 0 0 0 116 34 108 0 2 0 0 0 0 0 0 100 7 0 0 7 11 2 9 0 1 1 0 1 0 0 0 100 March 10, 2026 at 10:41:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 102 197 0 10 149 0 300 0 1 0 99 1 0 0 115 228 111 133 0 13 126 0 606 0 0 0 100 2 0 0 0 31 5 106 0 14 101 0 11 0 0 0 100 3 0 0 17 307 186 148 0 12 158 0 266 0 0 0 100 4 10 0 7 30 4 115 0 12 110 0 292 0 0 0 100 5 0 0 0 136 10 422 1 21 108 0 1043 0 0 0 100 6 0 0 0 128 44 253 0 14 165 0 3 0 0 0 100 7 0 0 0 23 0 87 0 8 89 0 6 0 0 0 100 March 10, 2026 at 10:41:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 84 0 1 0 0 300 0 0 0 100 1 0 0 3 227 110 18 1 0 0 0 600 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 17 208 103 2 0 0 0 0 266 0 0 0 100 4 0 0 7 13 4 8 0 0 0 0 262 0 0 0 100 5 0 0 0 33 3 54 1 2 0 0 1043 0 0 0 100 6 0 0 0 40 7 52 0 4 0 0 0 0 0 0 100 7 0 0 0 94 44 90 0 1 0 0 1 0 0 0 100 March 10, 2026 at 10:41:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 74 0 0 2177 103 1281 26 108 9 0 5384 5 1 0 94 1 41 0 3 271 107 1119 23 92 15 1 5779 4 1 0 95 2 32 0 0 149 43 1014 15 72 6 1 5927 4 1 0 95 3 38 0 255 225 104 1011 16 65 15 0 6421 4 1 0 95 4 20 0 7 67 8 779 12 57 11 1 6664 4 1 0 95 5 9 0 0 59 2 951 5 40 6 0 6652 3 1 0 96 6 41 0 0 65 8 827 6 41 10 0 6423 4 1 0 95 7 8 0 0 62 7 925 8 41 9 0 5182 3 1 0 97 March 10, 2026 at 10:41:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 108 0 0 0 0 299 0 0 0 100 1 0 0 3 215 105 8 0 0 0 0 594 0 0 0 100 2 0 0 0 107 51 104 0 0 0 0 0 0 0 0 100 3 0 0 17 207 103 2 0 0 0 0 266 0 0 0 100 4 9 0 7 8 2 4 0 0 0 0 303 0 0 0 100 5 0 0 0 16 1 42 1 0 0 0 1053 0 0 0 100 6 0 0 0 20 6 16 1 0 1 0 5 0 0 0 100 7 0 0 0 5 0 16 0 1 1 0 0 0 0 0 100 March 10, 2026 at 10:41:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 144 0 1 0 0 311 0 0 0 100 1 0 0 3 217 106 14 0 0 0 0 604 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 17 207 103 2 0 0 0 0 266 0 0 0 100 4 0 0 7 17 9 8 0 0 0 0 264 0 0 0 100 5 0 0 0 16 1 50 1 0 1 0 1064 0 0 0 100 6 0 0 0 17 6 14 0 0 0 0 5 0 0 0 100 7 0 0 0 9 0 9 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 240 0 16 226 0 303 0 1 0 99 1 0 0 3 217 105 332 1 20 219 0 594 0 0 0 100 2 0 0 0 110 52 319 0 17 284 0 5 0 0 0 100 3 0 0 17 298 193 143 0 19 173 0 266 0 0 0 100 4 0 0 7 11 2 145 0 11 257 0 261 0 0 0 100 5 0 0 0 16 1 174 0 12 227 0 1059 0 0 0 99 6 0 0 0 23 9 182 0 13 179 0 12 0 0 0 100 7 0 0 0 7 1 143 0 18 229 0 6 0 0 0 100 March 10, 2026 at 10:41:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 126 0 1 1 0 307 0 0 0 100 1 0 0 3 217 106 32 0 1 1 0 600 0 0 0 100 2 0 0 0 117 56 120 0 1 4 0 7 0 0 0 100 3 0 0 17 215 110 14 0 1 1 0 267 0 0 0 100 4 0 0 7 10 3 18 0 1 4 0 262 0 0 0 100 5 0 0 0 18 2 48 1 0 0 0 1053 0 0 0 100 6 0 0 0 15 5 16 0 0 2 0 319 0 0 0 100 7 0 0 0 11 2 25 0 2 3 0 23 0 0 0 100 March 10, 2026 at 10:41:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 108 0 0 0 0 300 0 0 0 100 1 0 0 3 215 104 8 0 1 0 0 593 0 0 0 100 2 0 0 0 115 55 130 0 1 0 0 5 0 0 0 100 3 0 0 17 207 103 2 0 0 0 0 266 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 5 0 0 0 16 1 42 1 0 0 0 1054 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2128 104 172 0 11 4 8 427 0 0 0 100 1 1378 0 116 225 109 73 1 6 7 13 1568 1 1 0 98 2 1933 0 0 95 34 122 2 10 2 11 417 0 1 0 99 3 60 0 19 259 120 105 0 14 6 13 433 0 0 0 100 4 13 0 7 26 3 49 0 9 5 6 393 0 0 0 100 5 18 0 0 34 2 84 1 6 6 9 1128 0 0 0 100 6 39 0 0 25 2 50 0 6 3 6 125 0 0 0 100 7 5 0 0 31 4 31 0 4 4 4 46 0 0 0 100 March 10, 2026 at 10:41:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 110 120 1 3 1 0 319 0 0 0 100 1 0 0 7 315 146 110 1 1 1 0 601 0 0 0 100 2 1 0 0 14 3 6 0 1 1 0 1 0 0 0 100 3 0 0 21 212 103 25 0 3 0 0 266 0 0 0 100 4 0 0 7 16 8 4 0 0 1 0 260 0 0 0 100 5 0 0 0 19 4 46 0 0 1 0 1138 0 0 0 100 6 0 0 0 12 3 6 0 0 1 0 0 0 0 0 100 7 0 0 0 16 4 11 0 0 1 0 4 0 0 0 100 March 10, 2026 at 10:41:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2158 152 118 0 1 0 0 318 0 0 0 100 1 0 0 3 315 105 110 0 0 0 0 594 0 0 0 100 2 0 0 0 7 1 4 0 0 2 0 0 0 0 0 100 3 0 0 17 214 103 10 0 1 3 0 266 0 0 0 100 4 0 0 7 10 3 26 0 1 0 0 262 0 0 0 100 5 0 0 0 10 1 36 1 0 0 0 1127 0 0 0 100 6 0 0 0 26 10 26 1 0 0 0 17 0 0 0 100 7 0 0 0 13 3 14 0 1 3 0 323 0 0 0 100 March 10, 2026 at 10:41:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 147 110 0 1 0 0 310 0 0 0 100 1 0 0 3 313 109 106 0 1 0 0 595 0 0 0 100 2 0 0 0 7 1 4 0 0 0 0 0 0 0 0 100 3 0 0 17 209 104 4 0 0 0 0 267 0 0 0 100 4 0 0 7 10 3 6 0 0 0 0 261 0 0 0 100 5 0 0 0 8 1 32 1 0 0 0 1126 0 0 0 100 6 0 0 0 17 6 14 0 0 0 0 5 0 0 0 100 7 0 0 0 15 1 10 0 0 0 0 1 0 0 0 100 March 10, 2026 at 10:41:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2148 142 118 0 4 1 0 316 0 0 0 100 1 0 0 3 313 116 108 0 5 0 0 594 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 23 0 17 209 104 4 0 0 1 0 271 0 0 0 100 4 0 0 7 12 3 10 0 0 1 0 262 0 0 0 100 5 0 0 0 8 1 50 1 1 1 0 1126 0 0 0 100 6 0 0 0 17 6 14 0 0 0 0 5 0 0 0 100 7 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 143 113 0 7 1 0 310 0 0 0 100 1 0 0 3 316 113 106 1 5 0 0 595 0 0 0 100 2 0 0 0 9 2 6 0 1 0 0 0 0 0 0 100 3 0 0 17 207 103 2 0 0 0 0 265 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 5 0 0 0 10 1 34 1 0 0 0 1122 0 0 0 100 6 0 0 0 17 6 32 0 1 0 0 5 0 0 0 100 7 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:41:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 118 1 1 0 0 325 0 0 0 100 1 0 0 3 223 104 22 0 0 0 0 603 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 17 207 103 2 0 0 0 0 266 0 0 0 100 4 0 0 7 15 8 6 0 0 0 0 262 0 0 0 100 5 0 0 0 8 1 40 1 0 0 0 1133 0 0 0 100 6 0 0 0 13 4 12 0 0 0 0 319 0 0 0 100 7 0 0 0 25 5 25 0 0 0 0 7 0 0 0 100 March 10, 2026 at 10:41:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 116 0 1 0 0 316 0 0 0 100 1 0 0 3 217 105 12 0 1 0 0 593 0 0 0 100 2 0 0 0 107 51 106 0 0 3 0 0 0 0 0 100 3 0 0 17 209 104 6 0 0 2 0 266 0 0 0 100 4 0 0 7 8 2 6 0 0 2 0 260 0 0 0 100 5 0 0 0 7 1 36 0 0 0 0 1122 0 0 0 100 6 0 0 0 13 3 26 0 0 0 0 1 0 0 0 100 7 0 0 0 29 8 26 0 0 2 0 14 0 0 0 100 March 10, 2026 at 10:41:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 112 0 0 0 0 311 0 0 0 100 1 0 0 3 215 104 8 0 0 0 0 594 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 17 209 104 4 0 0 0 0 267 0 0 0 100 4 0 0 7 10 3 6 0 0 0 0 262 0 0 0 100 5 0 0 0 12 3 36 1 0 1 0 1124 0 0 0 100 6 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 7 0 0 0 21 4 32 0 1 0 0 5 0 0 0 100 March 10, 2026 at 10:41:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 0 0 0 0 313 0 0 0 100 1 0 0 3 220 106 14 1 0 0 0 599 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 17 207 103 2 0 0 0 0 266 0 0 0 100 4 0 0 7 10 3 10 0 0 0 0 269 0 0 0 100 5 0 0 0 8 1 32 1 0 0 0 1122 0 0 0 100 6 0 0 0 9 2 10 0 0 0 0 18 0 0 0 100 7 0 0 0 21 4 16 0 0 0 0 5 0 0 0 100 March 10, 2026 at 10:41:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 222 0 0 2149 109 581 18 68 10 1 2727 1 1 0 98 1 91 0 17 236 106 264 11 43 5 0 2746 2 1 0 98 2 81 0 8 41 9 395 17 59 10 0 1911 1 1 0 98 3 323 0 80 224 106 355 10 41 9 2 2312 1 0 0 98 4 201 0 7 115 46 414 5 42 5 1 2136 1 0 0 98 5 102 0 0 109 1 349 9 37 9 1 2409 1 0 0 99 6 33 0 0 27 3 282 7 42 12 0 2126 1 0 0 99 7 48 0 0 41 3 438 7 48 8 0 3000 1 0 0 99 March 10, 2026 at 10:41:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 108 113 1 1 2 0 310 0 0 0 100 1 0 0 3 218 104 32 0 1 1 0 603 0 0 0 100 2 0 0 0 14 3 6 0 0 1 0 1 0 0 0 100 3 0 0 17 210 103 6 0 1 1 0 266 0 0 0 100 4 0 0 14 118 59 116 0 3 0 0 269 0 0 0 100 5 0 0 0 28 3 22 0 0 1 0 9 0 0 0 100 6 0 0 0 14 3 6 0 0 1 0 0 0 0 0 100 7 0 0 0 18 2 43 1 0 2 0 1045 0 0 0 100 March 10, 2026 at 10:41:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 110 247 0 10 130 0 313 0 1 0 99 1 0 0 3 237 105 150 0 16 153 0 597 0 0 0 100 2 0 0 0 24 1 129 0 7 143 0 0 0 0 0 100 3 0 0 129 287 182 164 0 9 116 0 266 0 0 0 100 4 0 0 7 139 55 231 0 10 162 0 262 0 0 0 100 5 0 0 0 23 0 127 0 11 153 0 0 0 0 0 100 6 0 0 0 26 2 129 0 5 146 0 0 0 0 0 100 7 0 0 0 28 3 284 1 10 113 0 1046 0 0 0 100 March 10, 2026 at 10:41:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 108 38 0 0 0 0 309 0 0 0 100 1 0 0 10 218 104 10 1 1 0 0 594 0 0 0 100 2 0 0 0 8 1 20 0 1 0 0 0 0 0 0 100 3 0 0 17 210 104 4 0 0 0 0 267 0 0 0 100 4 0 0 7 120 50 118 0 3 0 0 261 0 0 0 100 5 0 0 0 88 3 84 0 3 0 0 0 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 34 1 0 2 0 1042 0 0 0 100 March 10, 2026 at 10:41:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 2184 113 1098 18 98 16 0 6523 5 1 0 94 1 5 0 4 268 105 914 20 76 21 0 7749 5 1 0 94 2 52 0 0 76 2 989 28 73 9 0 5674 5 1 0 94 3 10 0 268 239 105 1108 20 67 9 0 5230 4 1 0 95 4 23 0 7 141 37 893 6 44 3 0 6257 3 1 0 96 5 21 0 0 90 6 905 11 44 6 0 6817 3 1 0 96 6 7 0 0 59 2 930 8 35 7 0 6147 3 1 0 96 7 20 0 0 69 10 1093 5 31 6 2 4964 3 1 0 96 March 10, 2026 at 10:41:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 110 0 1 0 0 303 0 0 0 100 1 0 0 3 213 104 6 0 0 0 0 596 0 0 0 100 2 0 0 0 11 1 8 0 2 0 0 0 0 0 0 100 3 0 0 17 212 103 8 0 1 0 0 276 0 0 0 100 4 0 0 7 108 52 104 0 0 0 0 260 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 22 7 46 2 0 1 0 1054 0 0 0 100 March 10, 2026 at 10:41:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 112 0 0 0 0 299 0 0 0 100 1 0 0 3 211 103 8 0 0 0 0 602 0 0 0 100 2 0 0 0 17 3 14 0 1 0 0 2 0 0 0 100 3 0 0 17 210 103 8 0 1 0 0 276 0 0 0 100 4 3 0 7 123 61 138 0 1 0 0 273 0 0 0 100 5 0 0 0 7 1 10 0 0 0 0 15 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 18 5 45 1 1 0 0 1049 0 0 0 100 March 10, 2026 at 10:41:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 102 231 0 15 222 0 300 0 1 0 99 1 0 0 3 214 103 262 1 18 204 0 597 0 0 0 100 2 0 0 0 13 2 135 0 11 218 0 1 0 0 0 100 3 0 0 17 279 174 150 0 16 226 0 276 0 0 0 100 4 0 0 7 110 52 251 0 16 202 0 260 0 0 0 100 5 0 0 0 9 1 169 0 17 247 0 0 0 0 0 100 6 0 0 0 16 4 138 0 17 203 0 1 0 0 0 100 7 0 0 0 23 8 168 0 15 199 0 1054 0 0 0 99 March 10, 2026 at 10:41:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39 0 0 2128 103 176 0 8 5 9 465 0 0 0 100 1 11 0 3 227 103 44 0 10 8 6 695 0 0 0 100 2 45 0 0 34 5 65 0 6 3 7 147 0 0 0 100 3 1810 0 17 227 104 41 2 5 8 6 623 0 0 0 99 4 15 0 7 126 53 142 0 3 4 9 328 0 0 0 100 5 1393 0 113 22 7 66 2 4 7 15 974 1 1 0 98 6 96 0 0 26 2 52 0 8 4 9 95 0 0 0 100 7 25 0 2 32 5 63 1 4 8 4 1483 0 0 0 100 March 10, 2026 at 10:41:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 0 0 300 0 0 0 100 1 0 0 3 211 103 4 0 0 0 0 593 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 17 207 103 4 0 0 0 0 276 0 0 0 100 4 0 0 7 110 54 104 0 0 0 0 260 0 0 0 100 5 1 0 0 15 4 10 0 0 0 0 5 0 0 0 100 6 0 0 0 11 3 28 0 2 0 0 0 0 0 0 100 7 0 0 0 9 1 32 2 0 1 0 1131 0 0 0 100 March 10, 2026 at 10:41:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 57 0 0 2128 105 471 7 48 11 0 2226 1 1 0 99 1 160 0 3 226 104 256 4 25 8 0 2403 2 0 0 98 2 67 0 0 34 5 274 12 34 2 0 1831 1 0 0 99 3 19 0 87 212 103 423 7 40 5 0 2390 1 0 0 99 4 304 0 7 62 21 408 9 39 12 0 2439 1 0 0 98 5 48 0 0 95 34 523 9 31 5 1 2421 1 0 0 99 6 364 0 0 36 6 417 9 40 3 0 1930 1 0 0 99 7 34 0 0 30 2 166 9 17 12 0 2993 2 1 0 98 March 10, 2026 at 10:41:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 108 0 0 1 0 300 0 0 0 100 1 0 0 7 213 103 8 1 0 1 0 598 0 0 0 100 2 0 0 0 24 9 16 0 0 1 0 10 0 0 0 100 3 0 0 21 210 103 4 0 1 1 0 266 0 0 0 100 4 0 0 7 22 10 18 0 0 1 0 277 0 0 0 100 5 0 0 0 10 1 9 0 2 1 0 5 0 0 0 100 6 0 0 0 114 54 108 0 1 0 0 0 0 0 0 100 7 0 0 0 17 2 41 0 0 2 0 1134 0 0 0 100 March 10, 2026 at 10:41:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 112 300 2 13 171 1 392 0 1 0 99 1 0 0 3 273 120 323 0 11 132 0 597 0 0 0 100 2 1 0 7 20 6 143 2 9 142 0 29 0 0 0 100 3 1 0 17 297 184 126 1 7 137 0 304 0 0 0 100 4 0 0 7 16 3 158 0 5 157 0 285 0 0 0 100 5 0 0 8 19 0 133 0 7 125 0 67 0 1 0 99 6 0 0 14 63 25 167 1 7 126 0 21 0 0 0 100 7 2 0 0 27 6 211 2 6 159 0 1153 0 0 0 99 March 10, 2026 at 10:41:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 129 112 0 4 0 0 300 0 0 0 100 1 0 0 3 314 127 126 0 4 0 0 594 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 3 0 0 24 209 104 8 0 1 0 0 266 0 0 0 100 4 0 0 7 9 2 6 0 0 0 0 260 0 0 0 100 5 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 7 0 0 0 19 6 42 1 0 0 0 1053 0 0 0 100 March 10, 2026 at 10:41:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2136 116 106 0 6 0 0 300 0 0 0 100 1 0 0 3 317 131 90 0 4 0 0 594 0 0 0 100 2 0 0 0 39 9 20 0 1 0 0 0 0 0 0 100 3 0 0 129 211 104 8 0 1 0 0 266 0 0 0 100 4 0 0 7 28 4 10 0 1 0 0 263 0 0 0 100 5 0 0 0 29 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 29 3 10 0 1 0 0 1 0 0 0 100 7 0 0 0 35 7 44 0 0 0 0 1053 0 0 0 100 March 10, 2026 at 10:41:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 110 0 1 0 0 300 0 0 0 100 1 0 0 3 217 104 8 1 0 0 0 596 0 0 0 100 2 0 0 0 108 51 120 0 1 0 0 0 0 0 0 100 3 0 0 17 210 104 4 0 0 0 0 266 0 0 0 100 4 0 0 7 9 2 6 0 0 0 0 263 0 0 0 100 5 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 6 0 0 7 13 3 12 0 0 0 0 4 0 0 0 100 7 0 0 0 32 12 56 2 0 0 0 1063 0 0 0 100 March 10, 2026 at 10:42:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2173 103 1268 25 97 12 0 6290 4 1 0 94 1 28 0 17 267 106 1039 21 83 7 0 5954 5 1 0 94 2 35 0 7 150 47 915 17 73 10 0 6935 4 1 0 95 3 16 0 241 232 105 1005 18 59 5 0 5776 4 1 0 95 4 47 0 0 65 12 1048 11 53 22 0 5749 3 1 0 96 5 40 0 0 58 0 769 9 31 21 0 6774 4 1 0 96 6 33 0 0 61 5 921 12 42 16 0 6018 4 1 0 95 7 34 0 0 65 8 1159 6 24 15 0 6343 3 1 0 96 March 10, 2026 at 10:42:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 269 0 12 228 0 301 0 1 0 99 1 0 0 17 213 104 161 0 15 205 0 861 0 0 0 100 2 0 0 7 111 53 252 0 14 210 0 260 0 0 0 100 3 0 0 3 300 193 145 0 18 226 0 0 0 0 0 100 4 0 0 0 15 5 197 0 11 225 0 6 0 0 0 100 5 0 0 0 19 1 351 0 26 228 0 10 0 0 0 100 6 0 0 0 16 5 175 0 15 278 0 4 0 0 0 100 7 0 0 0 11 2 179 1 15 216 0 1043 0 0 0 100 March 10, 2026 at 10:42:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 119 0 0 2134 103 172 0 11 16 13 470 0 0 0 99 1 31 0 19 230 104 59 0 10 7 7 1029 0 0 0 100 2 23 0 7 128 53 147 0 10 8 5 371 0 0 0 100 3 9 0 3 231 104 26 0 5 6 4 54 0 0 0 100 4 37 0 0 32 5 72 0 5 2 8 87 0 0 0 100 5 5 0 0 38 4 50 0 7 8 5 68 0 0 0 100 6 6 0 0 30 4 27 0 2 1 2 58 0 0 0 100 7 3192 0 121 11 1 88 3 6 10 15 2291 2 1 0 97 March 10, 2026 at 10:42:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 110 0 0 0 0 299 0 0 0 100 1 1 0 17 214 104 8 1 0 0 0 862 0 0 0 100 2 0 0 7 110 53 106 0 0 0 0 260 0 0 0 100 3 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 4 0 0 0 15 4 12 0 1 0 0 5 0 0 0 100 5 0 0 0 13 0 28 0 1 0 0 10 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 32 1 0 1 0 1129 0 0 0 100 March 10, 2026 at 10:42:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 110 0 0 0 0 300 0 0 0 100 1 0 0 17 217 105 12 0 0 0 0 862 0 0 0 100 2 0 0 7 110 53 108 0 0 0 0 263 0 0 0 100 3 0 0 3 213 105 8 0 0 0 0 3 0 0 0 100 4 0 0 0 23 9 20 0 0 0 0 332 0 0 0 100 5 0 0 0 17 2 18 0 0 0 0 10 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 34 1 0 1 0 1125 0 0 0 100 March 10, 2026 at 10:42:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 108 0 0 1 0 300 0 0 0 100 1 0 0 21 214 104 12 0 0 1 0 868 0 0 0 100 2 4 0 7 115 55 108 0 0 0 0 261 0 0 0 100 3 0 0 7 220 108 12 0 0 1 0 6 0 0 0 100 4 0 0 0 17 6 18 0 2 1 0 15 0 0 0 100 5 0 0 0 19 3 16 0 0 1 0 17 0 0 0 100 6 0 0 0 12 3 24 0 1 1 0 0 0 0 0 100 7 0 0 0 13 2 38 1 1 1 0 1126 0 0 0 100 March 10, 2026 at 10:42:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 2130 103 527 4 45 129 0 2103 1 1 0 98 1 136 0 17 231 104 338 5 33 137 3 2583 1 1 0 98 2 0 0 7 123 53 533 4 40 144 0 1601 1 0 0 99 3 17 0 87 279 169 363 2 32 174 0 1801 1 0 0 98 4 298 0 0 37 4 717 4 48 142 1 2027 1 1 0 98 5 306 0 0 26 2 497 2 28 133 3 1869 2 1 0 98 6 178 0 0 29 3 364 4 29 138 1 1922 1 0 0 99 7 40 0 0 28 3 509 3 40 84 0 2799 1 1 0 99 March 10, 2026 at 10:42:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 108 0 0 0 0 300 0 0 0 100 1 0 0 17 214 104 8 1 0 0 0 861 0 0 0 100 2 0 0 7 110 53 106 0 0 0 0 260 0 0 0 100 3 0 0 3 211 103 2 0 0 0 0 0 0 0 0 100 4 0 0 0 15 1 10 0 0 0 0 1 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 8 0 0 0 0 1 0 0 0 100 7 0 0 0 19 6 42 2 0 1 0 1137 0 0 0 100 March 10, 2026 at 10:42:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 139 1 3 3 0 327 0 0 0 100 1 0 0 17 217 104 20 0 2 14 0 861 0 0 0 100 2 0 0 7 115 53 112 0 0 3 0 269 0 0 0 100 3 0 0 3 222 107 30 0 1 4 0 98 0 0 0 100 4 0 0 0 22 1 24 1 3 5 0 15 0 0 0 100 5 0 0 8 10 0 20 0 2 4 0 75 0 1 0 99 6 1 0 14 12 2 27 0 7 16 0 27 0 0 0 100 7 0 0 7 24 6 60 1 3 8 0 1158 0 0 0 100 March 10, 2026 at 10:42:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 114 0 2 0 0 300 0 0 0 100 1 0 0 17 216 105 26 0 1 0 0 860 0 0 0 100 2 0 0 7 111 53 106 0 0 0 0 260 0 0 0 100 3 0 0 3 224 110 24 0 0 0 0 16 0 0 0 100 4 0 0 0 14 0 12 0 0 0 0 3 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 3 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 34 1 1 1 0 1045 0 0 0 100 March 10, 2026 at 10:42:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 104 120 0 1 1 0 301 0 0 0 100 1 0 0 17 233 105 16 0 1 1 0 861 0 0 0 100 2 0 0 7 126 53 106 0 0 1 0 260 0 0 0 100 3 0 0 115 217 107 15 0 2 0 0 8 0 0 0 100 4 0 0 0 45 9 26 0 1 1 0 14 0 0 0 100 5 0 0 0 21 0 4 0 1 0 0 4 0 0 0 100 6 0 0 0 27 2 10 0 1 0 0 0 0 0 0 100 7 0 0 0 24 1 34 1 1 1 0 1043 0 0 0 100 March 10, 2026 at 10:42:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 194 0 4 73 0 300 0 0 0 100 1 0 0 17 217 104 84 1 8 63 0 860 0 0 0 100 2 0 0 7 109 52 214 0 6 75 0 260 0 0 0 100 3 0 0 3 274 161 99 0 7 77 0 8 0 0 0 100 4 0 0 0 18 2 122 0 5 69 0 24 0 0 0 100 5 0 0 0 8 0 189 0 7 59 0 0 0 0 0 100 6 0 0 7 13 3 98 0 6 64 0 1 0 0 0 100 7 0 0 0 12 2 118 1 6 59 0 1044 0 0 0 100 March 10, 2026 at 10:42:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 103 1069 20 98 25 0 7531 4 1 0 94 1 19 0 17 278 107 996 16 84 17 0 8103 5 1 0 94 2 1 0 7 138 38 1217 18 80 12 0 5674 4 1 0 95 3 5 0 255 253 110 1139 15 68 32 0 5945 4 1 0 95 4 0 0 0 74 6 939 11 51 17 0 6099 4 1 0 96 5 31 0 0 57 2 921 16 41 16 0 5909 4 1 0 95 6 23 0 0 55 3 915 8 47 14 0 6481 4 1 0 95 7 1 0 0 83 14 1091 15 44 15 0 4855 3 1 0 96 March 10, 2026 at 10:42:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 0 0 310 0 0 0 100 1 0 0 17 223 109 18 0 0 0 0 858 0 0 0 100 2 0 0 7 8 2 5 0 1 0 0 277 0 0 0 100 3 0 0 3 211 104 4 0 0 0 0 0 0 0 0 100 4 0 0 0 22 8 24 0 0 0 0 21 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 0 9 2 10 0 0 0 0 18 0 0 0 100 7 0 0 0 108 51 136 1 0 1 0 1044 0 0 0 100 March 10, 2026 at 10:42:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 779 0 112 2109 102 177 0 11 6 10 475 0 1 0 99 1 100 0 17 248 112 89 1 9 9 11 777 0 0 0 100 2 49 0 9 26 3 66 0 10 5 10 722 0 0 0 100 3 60 0 3 230 104 75 0 9 11 12 151 0 0 0 100 4 5 0 0 32 2 50 0 6 4 3 63 0 0 0 100 5 4 0 0 27 3 15 0 4 1 2 60 0 0 0 100 6 2424 0 0 28 2 32 3 6 5 7 1149 1 1 0 98 7 17 0 0 129 52 166 0 4 7 7 1121 0 0 0 100 March 10, 2026 at 10:42:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 114 0 0 1 0 310 0 0 0 100 1 0 0 21 223 107 20 1 0 1 0 579 0 0 0 100 2 0 0 7 15 5 8 0 0 1 0 556 0 0 0 100 3 0 0 7 212 104 4 0 0 0 0 0 0 0 0 100 4 0 0 0 29 12 24 0 1 3 0 18 0 0 0 100 5 0 0 0 10 1 12 0 3 1 0 6 0 0 0 100 6 0 0 0 12 3 22 0 1 1 0 0 0 0 0 100 7 0 0 0 113 52 139 1 1 1 0 1129 0 0 0 100 March 10, 2026 at 10:42:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 102 279 0 21 222 0 310 0 1 0 99 1 0 0 17 223 109 198 0 13 290 0 893 0 0 0 100 2 0 0 7 13 4 181 0 19 219 0 553 0 0 0 100 3 0 0 3 302 194 159 0 13 242 0 0 0 0 0 100 4 0 0 0 8 1 140 0 10 250 0 2 0 0 0 100 5 0 0 0 17 1 321 0 21 210 0 7 0 0 0 100 6 0 0 0 12 3 148 0 15 227 0 3 0 0 0 100 7 0 0 0 108 51 306 1 14 209 0 1126 0 0 0 99 March 10, 2026 at 10:42:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 110 0 0 0 0 309 0 0 0 100 1 0 0 17 211 103 6 0 0 0 0 566 0 0 0 100 2 0 0 7 12 4 8 0 0 0 0 556 0 0 0 100 3 0 0 3 211 104 4 0 0 0 0 0 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 21 7 18 0 0 0 0 6 0 0 0 100 7 0 0 0 108 51 144 1 1 2 0 1126 0 0 0 100 March 10, 2026 at 10:42:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 191 0 0 2126 105 533 11 48 4 0 2356 1 1 0 98 1 46 0 17 277 128 382 13 39 7 0 2328 1 0 0 98 2 309 0 7 28 4 303 5 27 4 2 2698 2 1 0 98 3 239 0 59 237 113 368 6 50 4 2 2219 1 0 0 99 4 51 0 0 23 2 312 8 38 3 0 1922 1 0 0 99 5 160 0 0 25 1 268 3 21 3 0 1733 1 0 0 98 6 11 0 0 32 8 295 6 28 4 0 1927 1 0 0 99 7 0 0 0 50 15 318 8 39 8 0 3055 1 0 0 99 March 10, 2026 at 10:42:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2135 129 114 0 4 2 0 307 0 0 0 100 1 6 0 17 284 111 82 1 3 0 0 583 0 0 0 100 2 0 0 7 44 19 43 0 2 0 0 566 0 0 0 100 3 0 0 17 211 104 10 0 1 3 0 20 0 0 0 100 4 0 0 0 9 0 10 0 1 1 1 17 0 0 0 100 5 0 0 0 31 8 36 0 1 2 0 21 0 0 0 100 6 0 0 0 25 8 20 0 1 0 0 13 0 0 0 100 7 0 0 0 9 1 34 0 0 0 0 1133 0 0 0 100 March 10, 2026 at 10:42:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2114 102 139 2 3 13 0 321 0 0 0 100 1 0 0 31 214 103 46 0 6 9 0 671 0 0 0 100 2 0 0 7 116 53 119 0 3 3 0 641 0 0 0 100 3 0 0 3 217 104 18 0 4 11 0 10 0 0 0 100 4 0 0 7 19 7 28 0 2 4 0 21 0 1 0 99 5 0 0 0 36 9 49 0 2 10 0 53 0 0 0 100 6 0 0 0 16 3 22 0 4 3 0 32 0 0 0 100 7 0 0 0 15 1 43 1 1 10 0 1132 0 0 0 100 March 10, 2026 at 10:42:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 229 0 14 122 0 300 0 0 0 100 1 0 0 17 220 103 121 0 9 182 0 565 0 0 0 100 2 0 0 7 105 50 234 0 4 166 0 555 0 0 0 100 3 0 0 3 278 166 114 0 8 126 0 0 0 0 0 100 4 0 0 0 15 2 118 0 9 169 0 0 0 0 0 100 5 0 0 7 14 0 206 0 9 104 0 0 0 0 0 100 6 0 0 0 28 10 141 0 11 133 0 8 0 0 0 100 7 0 0 0 9 1 153 1 11 150 0 1045 0 0 0 100 March 10, 2026 at 10:42:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 105 114 0 1 0 0 306 0 0 0 100 1 0 0 17 229 103 8 0 1 0 0 567 0 0 0 100 2 0 0 7 26 3 6 0 0 0 0 553 0 0 0 100 3 0 0 115 213 105 8 0 0 0 0 1 0 0 0 100 4 0 0 0 123 51 102 0 0 0 0 2 0 0 0 100 5 0 0 0 33 1 12 0 0 0 0 1 0 0 0 100 6 0 0 0 35 7 18 0 1 0 0 8 0 0 0 100 7 0 0 0 23 1 32 0 0 0 0 1043 0 0 0 100 March 10, 2026 at 10:42:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 110 0 1 0 0 300 0 0 0 100 1 0 0 24 216 103 8 1 0 0 0 565 0 0 0 100 2 0 0 7 13 3 8 0 0 0 0 555 0 0 0 100 3 0 0 3 212 104 22 0 1 0 0 0 0 0 0 100 4 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 5 0 0 0 16 1 10 0 0 0 0 1 0 0 0 100 6 0 0 0 30 12 26 0 0 0 0 12 0 0 0 100 7 7 0 0 9 1 34 1 0 0 0 1047 0 0 0 100 March 10, 2026 at 10:42:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2177 108 1149 25 103 16 0 6879 5 1 0 94 1 3 0 17 264 105 1013 20 84 18 0 7339 5 1 0 94 2 6 0 7 58 4 1067 14 75 8 0 7629 3 1 0 96 3 23 0 241 228 105 981 14 60 13 1 5953 4 1 0 95 4 30 0 0 144 44 967 9 46 4 1 6584 3 1 0 96 5 0 0 0 78 7 1209 10 41 13 0 5139 3 1 0 96 6 13 0 0 79 14 1045 11 35 17 0 4994 4 1 0 95 7 77 0 0 61 2 917 17 41 16 0 6239 6 1 0 93 March 10, 2026 at 10:42:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 135 113 0 6 0 0 300 0 0 0 100 1 0 0 21 311 120 112 0 7 1 0 584 0 0 0 100 2 2 0 7 15 5 8 0 0 1 0 554 0 0 0 100 3 0 0 7 212 104 4 0 0 1 0 0 0 0 0 100 4 0 0 0 16 7 10 0 0 1 0 13 0 0 0 100 5 0 0 0 14 3 10 0 1 1 0 7 0 0 0 100 6 0 0 0 20 7 14 0 0 1 0 6 0 0 0 100 7 0 0 0 15 2 43 1 1 1 0 1043 0 0 0 100 March 10, 2026 at 10:42:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 141 291 0 18 208 0 300 0 0 0 100 1 0 0 17 312 114 278 0 20 243 0 575 0 0 0 99 2 0 0 7 15 5 159 0 14 199 0 557 0 0 0 100 3 0 0 3 300 193 161 0 18 201 0 0 0 0 0 100 4 0 0 0 10 1 133 0 15 270 0 2 0 0 0 100 5 0 0 0 11 1 178 0 15 260 0 0 0 0 0 100 6 0 0 0 19 7 226 0 18 172 0 6 0 0 0 100 7 0 0 0 15 1 223 0 15 250 0 1043 0 0 0 99 March 10, 2026 at 10:42:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 132 110 0 3 0 0 300 0 0 0 100 1 0 0 17 312 123 112 1 4 2 0 576 0 0 0 100 2 0 0 7 10 3 6 0 0 0 0 554 0 0 0 100 3 0 0 3 216 108 14 0 1 3 0 1 0 0 0 100 4 0 0 0 7 1 6 0 1 1 0 1 0 0 0 100 5 0 0 0 7 0 4 0 0 0 0 0 0 0 0 100 6 0 0 0 17 6 36 0 1 1 0 5 0 0 0 100 7 0 0 0 16 1 48 1 0 2 0 1042 0 0 0 100 March 10, 2026 at 10:42:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 625 0 0 2158 134 155 1 11 9 5 1221 1 1 0 98 1 17 0 17 325 121 133 0 10 7 2 647 0 0 0 100 2 5 0 7 32 6 29 0 3 3 2 617 0 0 0 100 3 2596 0 116 217 105 59 2 3 7 12 451 1 1 0 99 4 119 0 0 24 1 93 0 10 7 22 221 0 0 0 100 5 29 0 3 21 0 46 0 9 7 5 152 0 0 0 100 6 40 0 0 40 9 59 0 5 5 3 427 0 0 0 100 7 6 0 0 32 1 67 1 4 5 3 1115 0 0 0 100 March 10, 2026 at 10:42:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 143 111 0 4 0 0 300 0 0 0 100 1 0 0 17 309 113 108 0 3 0 0 581 0 0 0 100 2 0 0 7 10 3 6 0 0 0 0 555 0 0 0 100 3 0 0 3 211 104 4 0 0 0 0 0 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 13 3 8 0 0 1 0 0 0 0 0 100 7 0 0 0 32 9 76 1 1 1 0 1140 0 0 0 100 March 10, 2026 at 10:42:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 0 2152 131 431 6 41 16 0 1938 1 1 0 98 1 24 0 23 303 116 457 3 41 8 0 2575 1 0 0 99 2 358 0 7 46 12 418 5 12 5 3 2835 2 1 0 97 3 253 0 59 221 104 482 8 31 11 1 1935 1 0 0 98 4 148 0 0 28 9 361 4 29 4 1 1919 1 0 0 99 5 52 0 0 15 0 272 3 28 3 0 1668 1 0 0 99 6 128 0 0 18 2 245 1 21 3 2 1913 1 0 0 99 7 106 0 0 47 7 331 10 36 6 0 2879 1 1 0 98 March 10, 2026 at 10:42:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 102 206 0 9 112 0 312 0 1 0 99 1 5 0 17 227 110 126 1 9 117 0 582 0 0 0 100 2 0 0 7 112 53 253 0 9 195 0 567 0 0 0 100 3 0 0 17 274 164 109 0 9 161 0 5 0 0 0 100 4 0 0 0 11 1 110 0 11 139 0 7 0 0 0 100 5 0 0 0 17 1 124 0 12 146 0 7 0 0 0 100 6 0 0 0 13 3 129 0 11 124 1 13 0 0 0 100 7 17 0 0 14 3 273 1 13 118 0 1150 0 0 0 100 March 10, 2026 at 10:42:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 103 143 0 8 15 0 392 0 0 0 99 1 0 0 24 231 112 56 0 6 9 0 673 0 0 0 100 2 6 0 7 116 53 123 0 3 14 0 588 0 0 0 100 3 0 0 3 219 106 25 0 1 1 0 23 0 0 0 100 4 0 0 0 12 1 14 0 3 11 0 20 0 0 0 100 5 0 0 0 16 1 7 0 1 7 0 1 0 0 0 100 6 0 0 8 16 2 26 1 5 13 0 6 0 1 0 99 7 0 0 0 17 2 41 1 3 5 0 1155 0 0 0 100 March 10, 2026 at 10:42:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 114 0 0 0 0 300 0 0 0 100 1 0 0 17 228 110 42 0 0 0 0 577 0 0 0 100 2 0 0 14 110 53 108 0 1 0 0 554 0 0 0 100 3 0 0 3 212 104 6 0 0 0 0 0 0 0 0 100 4 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 8 0 0 0 0 3 0 0 0 100 7 0 0 0 16 1 40 0 0 2 0 1046 0 0 0 100 March 10, 2026 at 10:42:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 107 117 0 3 0 0 300 0 0 0 100 1 0 0 17 270 125 50 1 1 0 0 576 0 0 0 100 2 0 0 7 98 34 76 0 1 0 0 554 0 0 0 100 3 0 0 115 211 104 8 0 1 0 0 0 0 0 0 100 4 0 0 0 23 1 4 0 0 0 0 2 0 0 0 100 5 0 0 0 23 1 0 0 0 0 0 0 0 0 0 100 6 0 0 0 29 4 10 0 0 0 0 2 0 0 0 100 7 0 0 0 34 1 42 1 0 1 0 1044 0 0 0 100 March 10, 2026 at 10:42:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 108 114 0 1 1 0 300 0 0 0 100 1 0 0 21 330 155 128 1 2 2 0 586 0 0 0 100 2 0 0 7 14 4 24 0 1 1 0 555 0 0 0 100 3 0 0 7 214 104 6 0 1 1 0 0 0 0 0 100 4 0 0 0 25 11 19 0 3 0 0 10 0 0 0 100 5 0 0 0 9 1 8 0 0 1 0 16 0 0 0 100 6 0 0 0 13 3 6 0 0 1 0 0 0 0 0 100 7 0 0 0 18 2 41 1 0 3 0 1045 0 0 0 100 March 10, 2026 at 10:42:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 137 374 2 27 5 0 1774 1 1 0 98 1 0 0 17 329 125 378 5 28 5 0 1837 2 0 0 98 2 16 0 7 20 3 210 1 18 4 0 1776 1 0 0 99 3 0 0 45 212 104 383 3 14 6 0 956 1 0 0 99 4 1 0 0 23 1 243 4 13 5 0 1038 1 0 0 99 5 1 0 0 13 0 170 1 11 7 1 1088 1 0 0 99 6 0 0 0 26 6 141 0 2 9 0 2007 1 0 0 99 7 3 0 0 16 1 260 2 7 6 0 2553 1 0 0 99 March 10, 2026 at 10:42:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2166 112 979 11 71 13 0 5187 3 1 0 96 1 2 0 17 255 106 869 11 62 4 0 5646 3 1 0 96 2 14 0 7 136 44 856 12 55 12 0 5541 4 1 0 95 3 45 0 213 234 105 716 13 55 12 0 5773 3 1 0 96 4 2 0 0 51 4 1037 10 46 12 1 3635 3 1 0 97 5 0 0 0 55 4 884 7 27 19 1 3993 2 1 0 97 6 0 0 0 50 5 567 6 18 3 0 5994 2 1 0 97 7 15 0 0 59 7 787 6 26 2 0 5205 3 1 0 96 March 10, 2026 at 10:42:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 110 0 0 0 0 299 0 0 0 100 1 0 0 17 207 102 2 0 0 0 0 266 0 0 0 100 2 0 0 7 110 53 108 0 0 0 0 564 0 0 0 100 3 0 0 3 217 106 12 0 0 0 0 304 0 0 0 100 4 0 0 0 7 1 18 0 1 1 0 2 0 0 0 100 5 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 13 4 10 0 0 0 0 5 0 0 0 100 7 0 0 0 18 6 44 1 0 0 0 1053 0 0 0 100 March 10, 2026 at 10:42:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 110 0 1 0 0 300 0 0 0 100 1 0 0 17 211 103 6 0 0 0 0 267 0 0 0 100 2 0 0 7 110 53 108 0 0 0 0 563 0 0 0 100 3 0 0 3 214 105 6 1 0 0 0 300 0 0 0 100 4 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 5 0 0 0 13 0 26 0 1 0 0 0 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 16 5 40 1 0 1 0 1049 0 0 0 100 March 10, 2026 at 10:42:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 49 0 1 2123 102 169 0 9 10 7 426 0 0 0 99 1 54 0 17 223 102 69 0 10 11 10 416 0 0 0 100 2 624 0 7 127 53 158 1 10 10 9 1491 1 0 0 98 3 770 0 115 215 106 46 0 9 8 7 416 0 0 0 99 4 83 0 0 33 8 69 0 5 7 12 127 0 0 0 100 5 11 0 0 29 0 52 0 5 3 8 103 0 0 0 100 6 30 0 0 31 5 54 0 6 4 8 122 0 0 0 100 7 1815 0 0 45 8 90 4 7 6 10 1403 0 1 0 99 March 10, 2026 at 10:42:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 257 0 18 251 0 305 0 1 0 99 1 0 0 17 209 103 142 0 13 254 0 266 0 0 0 100 2 0 0 7 10 3 150 0 14 233 0 563 0 0 0 100 3 2 0 3 407 245 267 0 18 201 0 307 0 0 0 100 4 0 0 0 5 0 133 0 11 227 0 0 0 0 0 100 5 0 0 0 15 0 154 0 8 214 0 0 0 0 0 100 6 0 0 0 11 3 160 0 11 221 0 1 0 0 0 100 7 0 0 0 16 4 314 1 15 216 0 1452 0 0 0 99 March 10, 2026 at 10:42:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 274 0 0 2147 134 388 2 32 8 0 2067 1 1 0 98 1 191 0 17 227 106 125 4 11 8 0 1547 2 0 0 98 2 275 0 7 25 7 677 6 37 4 0 2711 1 0 0 98 3 34 0 45 322 129 415 4 27 12 0 1905 1 0 0 98 4 209 0 0 14 1 538 2 34 14 1 1899 1 0 0 99 5 1 0 0 24 1 270 1 33 17 0 2115 1 0 0 99 6 0 0 0 20 2 479 1 33 6 0 2043 1 0 0 99 7 1 0 0 15 1 417 2 32 3 0 3040 1 0 0 98 March 10, 2026 at 10:42:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 52 0 2 0 0 300 0 0 0 100 1 5 0 17 213 103 4 0 0 0 0 268 0 0 0 100 2 0 0 7 72 21 64 0 2 0 0 555 0 0 0 100 3 0 0 17 214 105 8 1 0 0 0 303 0 0 0 100 4 0 0 0 13 3 8 0 0 0 0 10 0 0 0 100 5 0 0 0 117 34 108 0 2 0 0 0 0 0 0 100 6 0 0 0 13 3 10 0 0 0 0 18 0 0 0 100 7 0 0 0 25 9 50 0 0 1 0 1143 0 0 0 100 March 10, 2026 at 10:42:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 130 0 3 0 0 300 0 0 0 100 1 0 0 17 209 103 4 0 0 0 0 267 0 0 0 100 2 0 0 7 12 4 8 0 0 0 0 553 0 0 0 100 3 0 0 3 215 105 6 0 0 0 0 300 0 0 0 100 4 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 5 0 0 0 109 50 104 0 1 0 0 0 0 0 0 100 6 0 0 0 11 3 8 0 0 0 0 1 0 0 0 100 7 0 0 0 20 5 46 1 1 0 0 1140 0 0 0 100 March 10, 2026 at 10:42:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 102 131 0 4 5 0 330 0 0 0 100 1 0 0 17 214 103 34 0 3 8 1 418 0 0 0 100 2 0 0 7 20 6 34 0 5 9 0 588 0 0 0 100 3 0 0 12 221 105 22 0 3 13 0 307 0 1 0 99 4 0 0 14 23 9 28 0 6 8 0 18 0 0 0 100 5 0 0 0 113 50 115 0 4 5 0 11 0 0 0 100 6 0 0 0 22 6 29 0 3 14 0 33 0 0 0 100 7 0 0 0 29 7 72 4 3 15 0 1084 0 0 0 100 March 10, 2026 at 10:42:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 113 253 0 13 129 0 301 0 0 0 100 1 0 0 24 305 140 255 1 12 145 0 266 0 0 0 100 2 0 0 7 16 4 134 0 9 163 0 554 0 0 0 100 3 0 0 3 294 183 134 0 10 131 0 300 0 0 0 100 4 0 0 0 25 8 138 0 12 139 0 2 0 0 0 100 5 0 0 0 8 0 148 0 11 151 0 6 0 0 0 100 6 0 0 0 24 9 159 0 14 146 0 8 0 0 0 100 7 0 0 0 8 1 292 0 12 121 0 1043 0 0 0 100 March 10, 2026 at 10:42:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2139 116 110 0 5 1 0 307 0 0 0 100 1 0 0 17 324 138 104 0 6 0 0 266 0 0 0 100 2 0 0 14 30 4 12 0 1 0 0 553 0 0 0 100 3 0 0 3 231 105 22 1 1 0 0 301 0 0 0 100 4 0 0 0 36 1 12 0 0 0 0 1 0 0 0 100 5 0 0 112 10 1 6 0 1 0 0 1 0 0 0 100 6 0 0 0 42 10 24 0 0 0 0 14 0 0 0 100 7 0 0 0 25 1 34 1 1 0 0 1046 0 0 0 100 March 10, 2026 at 10:42:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 122 106 0 4 0 0 300 0 0 0 100 1 0 0 17 310 131 104 0 2 0 0 266 0 0 0 100 2 0 0 7 15 4 10 0 1 0 0 555 0 0 0 100 3 0 0 3 218 106 14 0 2 0 0 305 0 0 0 100 4 0 0 7 17 1 30 0 1 0 0 2 0 0 0 100 5 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 29 11 26 0 0 0 0 12 0 0 0 100 7 0 0 0 9 1 32 1 0 1 0 1041 0 0 0 100 March 10, 2026 at 10:42:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2179 107 1219 23 104 10 0 6700 5 1 0 94 1 1 0 17 280 103 1305 16 85 5 0 6061 4 1 0 95 2 7 0 7 106 25 1273 14 72 13 0 6749 4 1 0 95 3 2 0 255 232 106 1089 13 52 18 0 5788 4 1 0 95 4 6 0 0 130 22 853 11 45 4 0 6161 4 1 0 96 5 14 0 0 63 3 781 11 37 8 1 6614 3 1 0 96 6 15 0 0 71 9 1034 9 38 13 0 5102 3 1 0 96 7 2 0 0 55 2 772 9 34 17 1 8207 4 1 0 95 March 10, 2026 at 10:42:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 120 0 0 0 0 307 0 0 0 100 1 0 0 17 207 102 6 0 0 0 0 275 0 0 0 100 2 0 0 7 12 4 10 0 0 0 0 564 0 0 0 100 3 0 0 3 213 105 6 0 0 0 0 300 0 0 0 100 4 0 0 0 114 56 112 0 1 0 0 13 0 0 0 100 5 0 0 0 11 2 30 0 2 0 0 10 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 18 1 47 1 0 0 0 1044 0 0 0 100 March 10, 2026 at 10:42:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1854 0 0 2139 106 480 2 23 183 15 654 0 1 0 98 1 19 0 17 226 102 177 0 18 265 5 337 0 0 0 100 2 624 0 7 30 4 184 1 19 289 7 1466 1 1 0 98 3 28 0 3 320 194 185 1 22 259 5 357 0 0 0 100 4 779 0 119 27 10 226 0 16 242 14 162 0 0 0 99 5 76 0 0 114 42 305 0 23 214 8 187 0 0 0 100 6 48 0 3 29 3 200 0 19 209 9 118 0 0 0 100 7 11 0 0 39 3 206 1 18 204 5 1260 0 1 0 99 March 10, 2026 at 10:42:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 120 123 0 4 0 0 310 0 0 0 100 1 0 0 17 291 138 90 0 3 0 0 269 0 0 0 100 2 0 0 7 12 4 10 0 0 0 0 564 0 0 0 100 3 0 0 3 217 107 10 0 0 0 0 302 0 0 0 100 4 0 0 0 7 1 4 0 0 0 0 2 0 0 0 100 5 0 0 0 23 2 16 0 1 0 0 1 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 20 3 44 1 0 0 0 1150 0 0 0 100 March 10, 2026 at 10:42:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 138 116 0 4 0 0 622 0 0 0 100 1 0 0 17 279 105 72 0 2 0 0 266 0 0 0 100 2 0 0 7 44 20 46 0 1 0 0 559 0 0 0 100 3 0 0 3 213 105 6 0 0 0 0 300 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 6 0 0 0 11 2 10 0 0 1 0 3 0 0 0 100 7 0 0 0 15 1 60 0 1 1 0 1132 0 0 0 100 March 10, 2026 at 10:42:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 101 126 0 1 0 0 299 0 0 0 100 1 0 0 17 209 103 4 0 0 0 0 267 0 0 0 100 2 0 0 7 122 59 118 0 0 0 0 560 0 0 0 100 3 0 0 3 213 105 8 0 1 0 0 310 0 0 0 100 4 0 0 0 9 3 2 0 0 0 0 2 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 20 1 44 1 0 0 0 1129 0 0 0 100 March 10, 2026 at 10:42:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 108 0 0 2128 104 427 7 44 5 0 2000 2 1 0 98 1 59 0 21 245 102 413 13 47 9 1 2423 1 0 0 99 2 43 0 7 141 59 508 15 36 23 0 2843 1 0 0 99 3 0 0 77 219 105 475 8 39 6 0 2520 1 0 0 99 4 2 0 0 42 11 213 6 23 3 0 1490 1 0 0 98 5 382 0 0 26 1 254 2 19 8 4 1869 1 0 0 98 6 252 0 0 24 3 350 4 27 5 3 1924 1 0 0 98 7 196 0 0 34 4 365 5 26 7 0 2926 1 1 0 98 March 10, 2026 at 10:42:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 313 0 7 131 0 300 0 0 0 99 1 0 0 17 214 104 134 0 9 122 0 266 0 0 0 100 2 0 0 7 114 54 211 0 5 127 0 555 0 0 0 100 3 0 0 3 272 164 127 0 9 151 0 300 0 0 0 100 4 0 0 0 31 8 129 0 6 143 0 34 0 0 0 100 5 0 0 0 8 0 104 0 8 116 0 0 0 0 0 100 6 0 0 0 11 2 125 0 7 161 0 0 0 0 0 100 7 0 0 0 8 1 136 1 8 118 0 1135 0 0 0 100 March 10, 2026 at 10:42:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 101 120 0 6 9 0 309 0 0 0 100 1 0 0 17 214 102 14 0 2 2 0 268 0 0 0 100 2 0 0 7 118 54 143 0 4 6 0 565 0 0 0 100 3 0 0 13 219 105 19 0 4 13 0 300 0 1 0 99 4 0 0 14 31 7 42 2 3 4 0 38 0 0 0 100 5 0 0 0 20 4 30 0 6 9 1 159 0 0 0 100 6 1 0 7 13 2 28 0 6 17 0 18 0 0 0 100 7 0 0 0 13 1 49 1 4 6 0 1093 0 0 0 100 March 10, 2026 at 10:42:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 0 0 0 300 0 0 0 100 1 0 0 17 208 102 2 0 0 0 0 266 0 0 0 100 2 0 0 7 113 54 108 0 0 0 0 555 0 0 0 100 3 0 0 3 216 106 10 0 0 0 0 304 0 0 0 100 4 0 0 0 18 1 12 0 0 0 0 2 0 0 0 100 5 0 0 0 26 9 24 0 0 0 0 12 0 0 0 100 6 0 0 0 12 2 8 0 1 0 0 0 0 0 0 100 7 0 0 7 8 1 34 1 1 0 0 1045 0 0 0 100 March 10, 2026 at 10:42:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 101 114 0 2 0 0 300 0 0 0 100 1 0 0 17 225 103 4 0 0 0 0 267 0 0 0 100 2 0 0 7 130 54 110 0 0 0 0 553 0 0 0 100 3 0 0 3 230 105 26 1 1 0 0 300 0 0 0 100 4 0 0 0 27 0 6 0 0 0 0 0 0 0 0 100 5 0 0 112 21 7 18 0 0 0 0 10 0 0 0 100 6 0 0 0 25 2 8 0 1 0 0 0 0 0 0 100 7 0 0 0 30 3 38 1 1 0 0 1047 0 0 0 100 March 10, 2026 at 10:43:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 0 0 0 300 0 0 0 100 1 0 0 17 208 102 6 0 0 0 0 273 0 0 0 100 2 0 0 7 113 54 108 0 0 0 0 554 0 0 0 100 3 0 0 3 216 105 8 0 1 0 0 300 0 0 0 100 4 0 0 7 24 10 40 0 1 1 0 22 0 0 0 100 5 0 0 0 22 7 20 0 0 0 0 17 0 0 0 100 6 0 0 0 10 2 8 0 1 0 0 0 0 0 0 100 7 0 0 0 11 1 39 1 0 0 0 1047 0 0 0 100 March 10, 2026 at 10:43:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2176 106 1472 27 125 176 0 7944 6 2 0 92 1 12 0 17 276 103 1242 24 108 240 0 7046 5 1 0 94 2 21 0 7 127 39 1207 11 82 196 1 8120 3 1 0 96 3 27 0 241 313 185 1600 17 89 280 0 4999 4 1 0 95 4 0 0 0 58 3 1102 12 76 285 0 5647 4 1 0 96 5 1 0 0 81 8 1026 9 61 239 0 6015 4 1 0 95 6 13 0 0 65 9 1020 9 61 221 0 6040 3 1 0 96 7 42 0 0 63 7 910 9 52 218 1 5558 3 1 0 96 March 10, 2026 at 10:43:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 142 1 1 0 0 1347 0 1 0 99 1 1 0 17 211 102 4 0 1 0 0 280 0 0 0 100 2 0 0 7 22 9 18 0 0 0 0 560 0 0 0 100 3 0 0 3 216 106 8 0 0 0 0 301 0 0 0 100 4 0 0 0 9 1 4 0 1 0 0 2 0 0 0 100 5 0 0 0 9 1 22 0 1 0 0 1 0 0 0 100 6 0 0 0 109 52 108 0 1 0 0 0 0 0 0 100 7 0 0 0 7 0 6 0 1 0 0 10 0 0 0 100 March 10, 2026 at 10:43:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 140 1 1 0 0 1344 0 1 0 99 1 0 0 17 211 104 6 0 0 0 0 268 0 0 0 100 2 0 0 7 24 10 22 0 0 0 0 564 0 0 0 100 3 0 0 3 214 105 6 1 0 0 0 300 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 9 0 4 0 0 0 0 3 0 0 0 100 6 0 0 0 109 52 124 0 1 0 0 0 0 0 0 100 7 0 0 0 13 0 10 0 1 0 0 10 0 0 0 100 March 10, 2026 at 10:43:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 142 0 1 0 0 1345 0 1 0 99 1 0 0 17 213 105 8 0 0 0 0 270 0 0 0 100 2 0 0 7 21 8 16 1 0 0 0 560 0 0 0 100 3 0 0 3 213 105 6 0 0 0 0 299 0 0 0 100 4 0 0 0 9 2 6 0 0 0 0 4 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 109 52 106 0 0 0 0 0 0 0 0 100 7 0 0 0 15 0 12 0 0 0 0 10 0 0 0 100 March 10, 2026 at 10:43:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 154 1 1 1 0 1350 0 1 0 99 1 0 0 17 213 105 16 0 0 1 0 285 0 0 0 100 2 0 0 7 32 14 28 0 0 2 0 887 0 0 0 100 3 0 0 3 213 105 6 0 0 1 0 300 0 0 0 100 4 0 0 0 19 10 14 0 0 1 0 14 0 0 0 100 5 0 0 0 7 1 8 0 0 1 0 7 0 0 0 100 6 0 0 0 117 54 112 0 1 0 0 1 0 0 0 100 7 0 0 0 14 1 31 0 1 1 0 10 0 0 0 100 March 10, 2026 at 10:43:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 162 1 4 0 0 1344 0 1 0 99 1 0 0 17 209 103 6 0 0 0 0 266 0 0 0 100 2 0 0 0 19 7 16 0 0 2 0 300 0 0 0 100 3 0 0 10 214 106 12 0 1 0 0 560 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 111 52 114 0 1 2 0 0 0 0 0 100 7 0 0 0 7 0 6 0 1 1 0 10 0 0 0 100 March 10, 2026 at 10:43:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 142 1 1 0 0 1348 0 1 0 99 1 0 0 17 211 104 6 0 0 0 0 268 0 0 0 100 2 0 0 0 17 6 12 0 0 0 0 305 0 0 0 100 3 0 0 10 221 109 16 1 0 0 0 564 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 9 1 6 0 2 0 0 1 0 0 0 100 6 0 0 0 109 52 108 0 1 0 0 0 0 0 0 100 7 0 0 0 5 0 6 0 0 0 0 34 0 0 0 100 March 10, 2026 at 10:43:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 138 0 1 0 0 1345 0 1 0 99 1 0 0 17 211 102 24 0 2 0 0 266 0 0 0 100 2 0 0 0 11 2 4 0 0 0 0 294 0 0 0 100 3 0 0 10 226 112 22 0 0 0 0 570 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 5 0 0 0 15 1 12 0 0 0 0 4 0 0 0 100 6 0 0 0 109 52 106 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 2 0 0 0 0 10 0 0 0 100 March 10, 2026 at 10:43:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 148 1 1 0 0 1350 0 1 0 99 1 0 0 17 217 105 16 0 1 1 0 279 0 0 0 100 2 0 0 0 9 2 22 0 1 0 0 294 0 0 0 100 3 0 0 10 224 111 20 0 0 0 0 884 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 109 52 106 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 2 0 0 0 0 10 0 0 0 100 March 10, 2026 at 10:43:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 111 170 1 1 1 0 1356 0 1 0 99 1 0 0 17 209 103 10 0 1 1 0 277 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 10 216 107 11 0 1 1 0 560 0 0 0 100 4 0 0 0 14 7 14 0 1 1 0 13 0 0 0 100 5 0 0 0 17 3 14 0 0 0 0 7 0 0 0 100 6 0 0 0 111 53 108 0 0 1 0 0 0 0 0 100 7 0 0 0 9 1 11 0 0 0 0 10 0 0 0 100 March 10, 2026 at 10:43:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2131 118 160 1 5 0 0 1355 0 1 0 99 1 0 0 17 241 114 40 0 2 1 0 271 0 0 0 100 2 0 0 0 11 2 22 0 0 1 0 294 0 0 0 100 3 0 0 10 215 106 10 1 0 2 0 559 0 0 0 100 4 0 0 0 7 1 4 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 1 0 0 85 34 88 0 3 5 0 6 0 0 0 100 7 0 0 0 5 0 4 0 0 1 0 10 0 0 0 100 March 10, 2026 at 10:43:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 115 152 0 3 0 0 1346 0 1 0 99 1 0 0 17 227 104 20 0 1 0 0 266 0 0 0 100 2 0 0 0 91 42 88 0 1 0 0 294 0 0 0 100 3 0 0 10 216 107 26 0 1 1 0 562 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 3 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 8 0 1 0 0 31 0 0 0 100 March 10, 2026 at 10:43:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 52 0 0 2136 107 209 2 7 4 14 1834 0 1 0 99 1 5 0 17 231 106 36 0 4 2 4 346 0 0 0 100 2 3195 0 113 48 19 91 3 5 9 16 1546 2 1 0 97 3 80 0 10 300 141 159 0 15 6 18 794 0 0 0 100 4 76 0 2 26 2 73 0 8 8 12 193 0 0 0 100 5 10 0 0 22 0 37 0 8 3 5 77 0 0 0 100 6 7 0 0 25 2 32 0 5 8 3 66 0 0 0 100 7 5 0 0 29 0 26 0 3 4 4 40 0 0 0 100 March 10, 2026 at 10:43:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 122 1 4 0 0 1423 0 1 0 99 1 0 0 17 264 124 60 0 4 0 0 267 0 0 0 100 2 0 0 0 19 7 16 0 1 0 0 294 0 0 0 100 3 0 0 10 282 133 74 0 2 0 0 566 0 0 0 100 4 0 0 0 9 2 20 0 1 1 0 2 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 15 0 12 0 0 0 0 10 0 0 0 100 March 10, 2026 at 10:43:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 140 1 0 1 0 1423 0 1 0 99 1 0 0 17 207 102 8 0 0 1 0 276 0 0 0 100 2 0 0 0 113 53 108 0 2 0 0 294 0 0 0 100 3 0 0 10 228 112 22 2 0 1 0 570 0 0 0 100 4 0 0 0 22 10 20 0 0 1 0 18 0 0 0 100 5 0 0 0 7 1 24 0 1 1 0 6 0 0 0 100 6 0 0 0 13 4 8 0 0 1 0 1 0 0 0 100 7 0 0 0 14 1 13 0 1 1 0 10 0 0 0 100 March 10, 2026 at 10:43:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 142 0 1 0 0 1423 0 1 0 99 1 0 0 17 209 103 6 0 0 0 0 266 0 0 0 100 2 0 0 0 117 52 110 0 0 0 0 294 0 0 0 100 3 0 0 10 222 110 16 0 0 0 0 565 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 10 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 2 0 0 0 0 10 0 0 0 100 March 10, 2026 at 10:43:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 179 0 0 2123 102 623 7 38 20 0 3398 1 1 0 98 1 67 0 17 226 103 405 9 35 11 1 2205 1 0 0 98 2 187 0 0 64 19 268 9 27 6 1 1924 2 0 0 98 3 102 0 80 260 111 309 3 25 6 0 2112 1 0 0 99 4 169 0 0 86 34 388 8 28 1 0 1510 1 0 0 99 5 275 0 0 23 1 236 4 19 4 0 1486 2 0 0 98 6 88 0 0 36 6 136 13 17 13 0 1183 2 0 0 98 7 1 0 0 20 1 304 5 19 2 0 1657 1 0 0 99 March 10, 2026 at 10:43:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 158 1 1 0 0 1438 0 1 0 99 1 0 0 17 209 102 4 0 0 0 0 266 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 294 0 0 0 100 3 0 0 10 214 106 8 0 0 0 0 561 0 0 0 100 4 0 0 0 111 53 106 0 0 0 0 2 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 28 11 26 1 0 0 0 12 0 0 0 100 7 0 0 0 9 1 2 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:43:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 136 1 0 0 0 1434 0 1 0 99 1 0 0 17 211 103 6 0 1 0 0 267 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 294 0 0 0 100 3 0 0 10 213 105 6 1 0 0 0 560 0 0 0 100 4 0 0 0 109 52 104 0 1 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 21 8 18 0 0 0 0 9 0 0 0 100 7 0 0 0 5 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:43:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 140 1 3 0 0 1435 0 1 0 99 1 0 0 17 217 103 36 0 3 0 0 276 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 294 0 0 0 100 3 0 0 10 212 105 6 0 0 0 0 560 0 0 0 100 4 0 0 0 69 34 56 0 0 0 0 8 0 0 0 100 5 0 0 0 63 29 70 0 1 0 0 21 0 0 0 100 6 0 0 0 27 11 24 0 0 0 0 15 0 0 0 100 7 0 0 0 7 0 7 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:43:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 102 285 1 20 140 1 1465 0 1 0 99 1 0 0 24 220 104 142 1 15 136 2 351 0 0 0 100 2 0 0 9 25 3 259 0 17 97 0 301 0 1 0 99 3 0 0 24 282 172 140 0 16 149 0 568 0 0 0 100 4 0 0 0 13 1 136 0 11 156 0 11 0 0 0 100 5 0 0 0 107 48 215 0 11 153 0 0 0 0 0 100 6 0 0 0 34 12 190 0 13 139 1 118 0 0 0 100 7 0 0 0 18 4 156 0 17 168 0 22 0 0 0 100 March 10, 2026 at 10:43:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 142 1 0 0 0 1349 0 1 0 99 1 0 0 17 214 103 6 0 0 0 0 266 0 0 0 100 2 0 0 7 17 2 14 0 1 0 0 294 0 0 0 100 3 0 0 10 217 106 10 0 0 0 0 560 0 0 0 100 4 0 0 0 10 2 6 0 0 0 0 3 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 6 0 0 0 112 52 106 0 0 0 0 0 0 0 0 100 7 0 0 0 24 9 18 0 0 0 0 13 0 0 0 100 March 10, 2026 at 10:43:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 115 145 1 5 0 0 1349 0 1 0 99 1 0 0 17 273 116 54 0 3 0 0 266 0 0 0 100 2 0 0 0 37 2 16 0 0 1 0 294 0 0 0 100 3 0 0 10 231 105 28 1 3 0 0 561 0 0 0 100 4 0 0 0 23 1 4 0 0 0 0 0 0 0 0 100 5 0 0 112 5 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 75 26 54 0 1 0 0 0 0 0 0 100 7 0 0 0 41 10 22 0 0 0 0 17 0 0 0 100 March 10, 2026 at 10:43:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 133 138 1 6 0 0 1346 0 1 0 99 1 0 0 17 304 117 96 0 3 0 0 267 0 0 0 100 2 0 0 0 30 8 26 0 1 0 0 294 0 0 0 100 3 0 0 17 216 105 10 0 0 0 0 560 0 0 0 100 4 0 0 0 12 3 8 0 1 0 0 3 0 0 0 100 5 0 0 0 6 0 14 0 1 0 0 0 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 20 6 14 0 0 0 0 9 0 0 0 100 March 10, 2026 at 10:43:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2168 104 1245 23 102 17 1 7559 5 2 0 94 1 16 0 21 263 103 968 16 81 15 0 7504 4 1 0 95 2 3 0 0 118 30 1095 11 80 15 0 6414 4 1 0 95 3 1 0 245 244 106 1027 19 72 20 0 5476 5 1 0 94 4 5 0 7 112 14 1028 17 58 10 0 4925 5 1 0 94 5 11 0 0 99 23 1121 12 58 13 1 5482 3 1 0 96 6 0 0 0 57 5 893 9 44 7 0 6135 3 1 0 97 7 0 0 0 70 10 865 2 22 6 0 6630 3 1 0 96 March 10, 2026 at 10:43:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 240 1 23 244 0 1353 0 1 0 99 1 0 0 17 252 110 210 0 24 220 0 266 0 0 0 100 2 0 0 0 45 19 344 0 21 204 0 294 0 0 0 100 3 0 0 3 298 192 160 0 13 234 0 300 0 0 0 100 4 0 0 7 50 8 179 0 11 191 0 267 0 0 0 100 5 0 0 0 79 25 210 0 17 241 0 0 0 0 0 100 6 0 0 0 12 3 153 0 14 201 0 0 0 0 0 100 7 0 0 0 9 1 145 0 18 250 0 0 0 0 0 100 March 10, 2026 at 10:43:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 106 166 1 6 4 0 1357 0 1 0 99 1 0 0 17 229 110 30 0 6 3 0 271 0 0 0 100 2 0 0 0 91 42 110 0 2 1 0 294 0 0 0 100 3 0 0 3 222 114 14 1 1 4 0 301 0 0 0 100 4 0 0 7 18 7 18 0 0 1 0 265 0 0 0 100 5 0 0 0 13 0 14 0 1 2 0 0 0 0 0 100 6 0 0 0 11 2 14 0 2 2 0 0 0 0 0 100 7 0 0 0 5 0 26 0 1 3 0 0 0 0 0 100 March 10, 2026 at 10:43:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 142 0 1 0 0 1356 0 1 0 99 1 0 0 17 209 102 4 0 1 0 0 266 0 0 0 100 2 0 0 0 109 52 106 0 0 0 0 297 0 0 0 100 3 0 0 3 211 104 4 0 0 0 0 301 0 0 0 100 4 0 0 7 24 10 22 0 0 0 0 272 0 0 0 100 5 0 0 0 15 1 10 0 0 0 0 1 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:43:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 162 1 2 0 0 1356 0 1 0 99 1 0 0 17 217 107 12 0 0 0 0 270 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 294 0 0 0 100 3 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 4 0 0 7 24 10 22 0 0 0 0 585 0 0 0 100 5 0 0 0 13 0 12 0 0 0 0 5 0 0 0 100 6 0 0 0 9 2 10 0 0 0 0 2 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:43:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 148 1 0 0 0 1356 0 1 0 99 1 0 0 17 209 103 24 0 1 0 0 271 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 294 0 0 0 100 3 0 0 3 209 103 4 0 0 0 0 303 0 0 0 100 4 0 0 7 24 14 14 0 0 0 0 269 0 0 0 100 5 0 0 0 17 2 20 0 0 1 0 15 0 0 0 100 6 0 0 0 21 8 20 0 0 0 0 10 0 0 0 100 7 0 0 0 9 0 7 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:43:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 148 1 0 2 0 1379 0 1 0 99 1 0 0 17 217 107 12 0 0 0 0 274 0 0 0 100 2 0 0 0 109 52 106 0 0 2 0 294 0 0 0 100 3 0 0 3 210 103 4 1 0 3 0 300 0 0 0 100 4 0 0 7 12 3 12 0 0 0 0 266 0 0 0 100 5 0 0 0 15 1 12 0 0 1 0 0 0 0 0 100 6 0 0 0 21 8 20 0 0 0 0 18 0 0 0 100 7 0 0 0 11 3 16 0 0 1 0 11 0 0 0 100 March 10, 2026 at 10:43:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 146 0 0 0 0 1358 0 1 0 99 1 0 0 17 211 103 22 0 0 0 0 266 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 294 0 0 0 100 3 0 0 3 211 104 4 0 0 0 0 301 0 0 0 100 4 0 0 7 18 7 14 0 0 0 0 265 0 0 0 100 5 0 0 0 15 1 10 0 0 0 0 1 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 15 5 10 0 0 0 0 26 0 0 0 100 March 10, 2026 at 10:43:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 138 2 3 0 0 1356 0 1 0 99 1 0 0 17 230 111 25 0 5 0 0 272 0 0 0 100 2 0 0 0 99 46 114 0 3 0 0 297 0 0 0 100 3 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 4 0 0 7 10 3 12 0 0 0 0 262 0 0 0 100 5 0 0 0 13 0 12 0 0 0 0 5 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 19 7 16 0 0 1 0 331 0 0 0 100 March 10, 2026 at 10:43:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 142 1 0 0 0 1356 0 1 0 99 1 0 0 17 213 104 8 0 1 0 0 267 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 294 0 0 0 100 3 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 4 0 0 7 20 8 16 0 0 0 0 267 0 0 0 100 5 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:43:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 116 150 0 5 0 0 1355 0 1 0 99 1 1 0 17 291 135 92 0 2 1 0 284 0 0 0 100 2 0 0 0 35 10 26 0 3 2 0 294 0 0 0 100 3 0 0 3 210 103 22 1 1 1 0 303 0 0 0 100 4 0 0 7 40 22 32 0 0 1 0 279 0 0 0 100 5 0 0 0 16 3 18 0 0 1 0 19 0 0 0 100 6 0 0 0 13 4 8 0 0 1 0 1 0 0 0 100 7 0 0 0 9 1 9 0 1 2 0 0 0 0 0 100 March 10, 2026 at 10:43:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 126 142 1 6 2 0 1350 0 1 0 99 1 0 0 17 296 119 88 0 5 0 0 266 0 0 0 100 2 0 0 0 9 2 8 0 1 3 0 294 0 0 0 100 3 0 0 3 211 103 6 0 0 2 0 300 0 0 0 100 4 0 0 7 24 9 36 0 1 1 0 268 0 0 0 100 5 0 0 0 7 1 4 0 0 1 0 0 0 0 0 100 6 0 0 0 29 12 28 0 1 0 0 0 0 0 0 100 7 0 0 0 7 0 10 0 1 2 0 0 0 0 0 100 March 10, 2026 at 10:43:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 142 1 0 0 0 1351 0 1 0 99 1 0 0 17 213 105 8 0 0 0 0 269 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 3 211 104 4 0 0 0 0 301 0 0 0 100 4 0 0 7 22 9 20 0 0 0 0 587 0 0 0 100 5 0 0 0 5 0 4 0 0 0 0 5 0 0 0 100 6 0 0 0 109 52 106 0 0 0 0 0 0 0 0 100 7 0 0 0 13 0 12 0 0 0 0 2 0 0 0 100 March 10, 2026 at 10:43:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 140 0 0 0 0 1350 0 1 0 99 1 0 0 17 207 102 2 0 0 0 0 266 0 0 0 100 2 0 0 0 11 3 8 0 0 0 0 297 0 0 0 100 3 0 0 3 211 104 4 0 0 0 0 301 0 0 0 100 4 0 0 7 16 5 10 0 0 1 0 262 0 0 0 100 5 0 0 0 5 0 18 0 1 0 0 0 0 0 0 100 6 0 0 0 109 52 106 0 0 0 0 0 0 0 0 100 7 0 0 0 23 5 22 0 0 0 0 9 0 0 0 100 March 10, 2026 at 10:43:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 106 1 2 0 0 1350 0 1 0 99 1 0 0 17 245 105 42 0 3 0 0 269 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 3 210 103 2 1 0 0 0 300 0 0 0 100 4 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 109 52 124 0 1 0 0 0 0 0 0 100 7 0 0 0 23 5 18 0 0 0 0 5 0 0 0 100 March 10, 2026 at 10:43:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 140 1 2 0 0 1350 0 1 0 99 1 0 0 17 221 104 18 0 1 0 0 276 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 3 209 103 4 0 0 0 0 303 0 0 0 100 4 0 0 7 24 12 28 0 0 0 0 282 0 0 0 100 5 0 0 0 5 0 4 0 0 0 0 5 0 0 0 100 6 0 0 0 109 52 106 0 0 0 0 0 0 0 0 100 7 0 0 0 29 7 29 0 0 1 0 10 0 0 0 100 March 10, 2026 at 10:43:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 146 1 0 0 0 1364 0 0 0 99 1 0 0 17 211 104 6 0 0 0 0 271 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 4 0 0 7 12 4 12 0 0 0 0 286 0 0 0 100 5 0 0 0 9 1 8 0 0 0 0 4 0 0 0 100 6 0 0 0 119 56 118 0 1 0 0 6 0 0 0 100 7 0 0 0 21 4 40 0 1 0 0 327 0 0 0 100 March 10, 2026 at 10:43:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 164 1 2 0 0 1351 0 1 0 99 1 0 0 17 209 103 4 0 0 0 0 267 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 3 211 104 4 0 0 0 0 301 0 0 0 100 4 0 0 7 12 4 10 0 0 0 0 262 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 0 117 56 114 0 0 0 0 5 0 0 0 100 7 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:43:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 144 0 2 0 0 1350 0 1 0 99 1 0 0 17 211 104 6 0 0 0 0 271 0 0 0 100 2 0 0 0 11 3 8 0 0 0 0 297 0 0 0 100 3 0 0 3 210 103 2 1 0 0 0 300 0 0 0 100 4 0 0 7 12 4 12 0 0 0 0 269 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 33 14 34 0 0 0 0 29 0 0 0 100 7 0 0 0 101 44 96 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:43:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 114 152 1 3 0 0 1350 0 1 0 99 1 0 0 17 247 111 60 0 4 0 0 267 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 294 0 0 0 100 3 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 4 0 0 7 12 4 8 0 0 0 0 262 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 17 6 14 0 0 0 0 5 0 0 0 100 7 0 0 0 69 30 64 0 2 0 0 0 0 0 0 100 March 10, 2026 at 10:43:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 813 0 112 2126 118 202 1 10 11 15 1631 0 1 0 99 1 107 0 21 293 117 149 0 17 10 19 478 0 0 0 100 2 1843 0 2 74 25 117 2 12 11 7 708 0 1 0 99 3 18 0 7 227 103 40 0 6 6 5 382 0 0 0 100 4 624 0 0 42 12 53 1 3 6 9 943 1 0 0 98 5 5 0 7 27 3 41 0 6 4 2 335 0 0 0 100 6 20 0 0 40 9 35 0 2 3 3 367 0 0 0 100 7 6 0 0 28 1 34 0 4 7 3 38 0 0 0 100 March 10, 2026 at 10:43:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 130 0 2 0 0 1433 0 1 0 99 1 0 0 17 221 103 16 0 2 0 0 267 0 0 0 100 2 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 3 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 5 0 0 7 12 3 8 0 0 0 0 260 0 0 0 100 6 0 0 0 17 6 14 0 0 0 0 5 0 0 0 100 7 0 0 0 13 0 12 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:43:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 142 1 0 0 0 1433 0 1 0 99 1 0 0 17 207 102 2 0 0 0 0 266 0 0 0 100 2 0 0 0 113 53 108 0 1 1 0 294 0 0 0 100 3 0 0 3 212 104 22 1 1 0 0 301 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 5 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 19 7 16 0 0 0 0 6 0 0 0 100 7 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:43:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 144 2 1 0 0 1434 0 1 0 99 1 0 0 17 209 102 4 0 0 0 0 266 0 0 0 100 2 0 0 0 112 53 108 1 0 0 0 297 0 0 0 100 3 0 0 3 213 104 6 0 1 0 0 301 0 0 0 100 4 0 0 0 9 2 24 0 1 0 0 2 0 0 0 100 5 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 21 8 20 0 0 0 0 10 0 0 0 100 7 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:43:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 142 2 1 0 0 1432 0 1 0 99 1 0 0 17 213 105 8 0 0 0 0 270 0 0 0 100 2 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 3 0 0 3 209 103 2 0 0 0 0 300 0 0 0 100 4 0 0 0 7 1 6 0 0 0 0 2 0 0 0 100 5 0 0 7 10 3 10 0 0 0 0 266 0 0 0 100 6 0 0 0 20 7 18 0 0 0 0 323 0 0 0 100 7 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:43:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 148 0 0 1 0 1433 0 1 0 99 1 0 0 17 207 102 6 0 0 0 0 274 0 0 0 100 2 0 0 0 111 53 106 0 0 0 0 294 0 0 0 100 3 0 0 3 209 103 4 0 0 0 0 303 0 0 0 100 4 0 0 0 26 12 40 0 0 0 0 21 0 0 0 100 5 0 0 7 12 4 14 0 0 0 0 270 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 15 0 15 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:43:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 179 0 0 2128 105 425 8 38 146 1 3260 2 1 0 97 1 80 0 17 244 102 514 1 36 145 0 1860 2 0 0 98 2 256 0 0 71 29 643 0 33 88 1 2204 1 0 0 99 3 213 0 59 354 217 567 4 31 122 0 2008 1 0 0 99 4 78 0 0 33 6 587 2 29 164 0 1914 1 0 0 99 5 231 0 7 24 3 454 6 26 137 2 2088 2 1 0 98 6 61 0 0 25 4 533 5 28 175 1 1757 1 0 0 99 7 61 0 0 28 3 378 0 32 128 0 1210 1 0 0 98 March 10, 2026 at 10:43:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 131 118 2 10 7 0 1447 0 1 0 99 1 0 0 17 241 104 37 0 5 3 0 277 0 0 0 100 2 0 0 0 21 7 18 0 1 12 0 308 0 0 0 100 3 0 0 17 297 120 90 0 3 3 0 315 0 0 0 100 4 0 0 0 13 3 9 0 1 0 0 16 0 0 0 100 5 0 0 7 23 8 22 1 1 0 0 279 0 0 0 100 6 0 0 0 11 2 10 0 1 0 0 4 0 0 0 100 7 0 0 0 19 2 14 0 0 0 0 27 0 0 0 100 March 10, 2026 at 10:43:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 102 154 1 2 7 1 1510 0 1 0 99 1 0 0 17 213 102 26 1 2 11 0 290 0 0 0 100 2 0 0 0 116 53 116 0 2 3 0 318 0 0 0 100 3 0 0 10 214 103 12 0 2 5 0 307 0 0 0 100 4 0 0 0 14 2 19 0 2 10 0 19 0 0 0 100 5 0 0 7 31 10 61 0 1 15 0 303 0 0 0 100 6 0 0 0 14 2 25 0 4 8 3 82 0 0 0 100 7 0 0 8 20 0 28 0 5 13 0 9 0 1 0 99 March 10, 2026 at 10:43:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 146 1 0 0 0 1349 0 1 0 99 1 0 0 17 226 111 18 0 0 0 0 277 0 0 0 100 2 0 0 0 112 53 106 0 0 0 0 294 0 0 0 100 3 0 0 3 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 9 2 8 0 1 0 0 2 0 0 0 100 5 0 0 7 15 3 8 0 0 0 0 260 0 0 0 100 6 0 0 0 10 2 24 0 1 0 0 0 0 0 0 100 7 0 0 0 20 2 12 0 1 0 0 1 0 0 0 100 March 10, 2026 at 10:43:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 115 144 0 4 1 0 1346 0 1 0 99 1 0 0 17 243 111 26 0 0 1 0 285 0 0 0 100 2 0 0 0 95 30 73 0 4 0 0 294 0 0 0 100 3 0 0 3 262 114 42 1 3 1 0 303 0 0 0 100 4 0 0 0 37 10 14 0 1 1 0 8 0 0 0 100 5 0 0 119 10 3 14 0 1 1 0 270 0 0 0 100 6 0 0 0 29 4 8 0 0 1 0 1 0 0 0 100 7 0 0 0 36 4 17 0 0 1 0 6 0 0 0 100 March 10, 2026 at 10:43:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2135 124 232 1 9 67 0 1346 0 1 0 99 1 0 0 17 227 111 154 0 6 75 0 274 0 0 0 100 2 0 0 0 16 3 207 0 7 52 0 294 0 0 0 100 3 0 0 3 365 187 203 0 9 64 0 300 0 0 0 100 4 0 0 0 15 4 84 0 4 63 0 2 0 0 0 100 5 0 0 7 13 3 78 0 6 54 0 260 0 0 0 100 6 0 0 0 12 2 85 0 5 61 0 0 0 0 0 100 7 0 0 0 6 0 120 0 6 52 0 0 0 0 0 100 March 10, 2026 at 10:43:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 113 1272 19 111 14 1 8206 5 2 0 94 1 1 0 17 297 111 1135 19 97 14 1 6923 4 1 0 95 2 0 0 0 83 8 1008 15 72 11 0 7293 4 1 0 95 3 0 0 241 277 130 1071 13 76 16 0 6243 5 1 0 94 4 10 0 0 60 3 1087 15 75 22 0 5411 5 1 0 94 5 2 0 7 56 2 991 9 58 16 0 5671 3 1 0 96 6 4 0 0 62 4 985 13 49 16 0 6619 4 1 0 96 7 0 0 0 63 6 740 4 29 6 0 5170 2 1 0 97 March 10, 2026 at 10:43:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 118 1 3 0 0 1345 0 1 0 99 1 0 0 17 227 102 24 0 3 0 0 266 0 0 0 100 2 0 0 0 85 39 80 0 2 0 0 304 0 0 0 100 3 0 0 3 253 123 48 0 3 0 0 311 0 0 0 100 4 0 0 0 11 3 8 0 0 0 0 6 0 0 0 100 5 0 0 7 10 3 4 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 13 3 10 0 2 0 0 4 0 0 0 100 March 10, 2026 at 10:43:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 126 142 0 3 0 0 1347 0 1 0 99 1 0 0 17 211 104 24 0 1 0 0 267 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 300 0 0 0 100 3 0 0 3 310 129 104 1 2 0 0 310 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 5 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 17 2 12 0 0 0 0 5 0 0 0 100 March 10, 2026 at 10:44:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 144 1 4 0 0 1346 0 1 0 99 1 0 0 17 219 107 20 0 1 0 0 274 0 0 0 100 2 0 0 0 19 7 32 0 1 0 0 303 0 0 0 100 3 1 0 3 303 147 96 0 2 0 0 310 0 0 0 100 4 0 0 0 24 13 18 0 0 0 0 16 0 0 0 100 5 0 0 7 8 2 10 0 0 0 0 268 0 0 0 100 6 0 0 0 9 2 8 0 0 0 0 3 0 0 0 100 7 0 0 0 15 0 15 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:44:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1819 0 0 2132 102 291 3 24 196 5 1717 0 1 0 98 1 35 0 17 294 137 361 0 27 236 9 387 0 0 0 100 2 629 0 0 38 8 358 1 21 198 9 1517 1 1 0 98 3 15 0 3 327 193 237 0 23 204 7 406 0 0 0 100 4 775 0 113 14 2 200 0 21 215 16 177 0 1 0 99 5 137 0 7 60 18 244 0 21 179 20 367 0 0 0 100 6 18 0 3 28 3 205 0 18 231 10 93 0 0 0 100 7 7 0 0 35 2 173 0 20 188 6 112 0 0 0 100 March 10, 2026 at 10:44:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 144 1 1 0 0 1433 0 1 0 99 1 0 0 17 211 103 6 0 1 0 0 283 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 3 0 0 3 218 107 24 0 1 0 0 305 0 0 0 100 4 0 0 0 9 2 6 0 1 0 0 12 0 0 0 100 5 0 0 7 110 53 106 0 0 0 0 261 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:44:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 63 0 0 2121 103 322 5 31 2 0 3209 1 1 0 98 1 253 0 17 226 105 315 6 30 5 3 1496 1 0 0 98 2 10 0 0 20 3 391 2 30 13 0 2531 1 0 0 99 3 3 0 59 228 110 400 6 33 2 0 2182 1 0 0 99 4 119 0 0 20 2 244 2 21 2 0 1603 1 0 0 98 5 336 0 7 89 37 297 6 17 3 3 1929 1 0 0 98 6 272 0 0 52 18 396 7 29 6 4 1687 1 0 0 98 7 2 0 0 23 0 229 3 10 0 0 1465 1 0 0 99 March 10, 2026 at 10:44:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 122 1 4 0 0 1438 0 1 0 99 1 5 0 17 227 108 22 0 2 0 0 281 0 0 0 100 2 14 0 0 27 2 24 0 4 1 0 311 0 0 0 100 3 0 0 17 209 103 4 0 0 0 0 301 0 0 0 100 4 0 0 0 12 2 6 1 0 6 0 19 0 0 0 100 5 0 0 7 14 4 17 0 1 0 0 273 0 0 0 100 6 0 0 0 113 52 108 0 0 9 0 16 0 0 0 100 7 0 0 0 17 0 20 0 1 1 0 11 0 0 0 100 March 10, 2026 at 10:44:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 102 102 1 8 12 0 1439 0 1 0 99 1 0 0 21 217 104 30 0 3 9 1 368 0 0 0 100 2 0 0 9 76 3 70 0 1 6 1 361 0 1 0 99 3 0 0 21 216 103 23 1 5 9 0 315 0 0 0 100 4 0 0 7 28 10 31 0 2 3 0 45 0 0 0 100 5 0 0 7 35 12 72 0 4 17 0 319 0 0 0 100 6 0 0 0 118 54 117 0 2 7 0 11 0 0 0 100 7 0 0 0 23 2 24 0 1 9 0 23 0 0 0 100 March 10, 2026 at 10:44:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 108 285 0 10 155 0 1357 0 1 0 99 1 0 0 17 213 104 116 0 5 141 0 266 0 0 0 100 2 0 0 0 10 2 240 0 12 151 0 294 0 0 0 100 3 0 0 3 288 177 146 0 13 157 0 301 0 0 0 100 4 0 0 0 15 2 138 0 14 139 0 2 0 0 0 100 5 0 0 14 15 3 117 0 11 162 0 260 0 0 0 100 6 0 0 0 111 52 262 0 11 137 0 0 0 0 0 100 7 0 0 0 9 0 122 0 9 112 0 0 0 0 0 100 March 10, 2026 at 10:44:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2136 108 154 1 1 0 0 1355 0 1 0 99 1 0 0 17 228 104 6 1 0 0 0 267 0 0 0 100 2 0 0 0 25 2 4 0 0 0 0 294 0 0 0 100 3 0 0 3 238 107 12 1 0 0 0 308 0 0 0 100 4 0 0 0 23 1 6 0 0 0 0 1 0 0 0 100 5 0 0 119 10 2 8 0 1 0 0 260 0 0 0 100 6 0 0 0 125 52 108 0 1 0 0 0 0 0 0 100 7 0 0 0 29 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:44:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 113 164 1 0 0 0 1361 0 1 0 99 1 0 0 17 210 103 6 0 1 0 0 269 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 10 213 104 8 0 1 0 0 304 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 112 52 108 0 0 0 0 0 0 0 0 100 7 0 0 0 14 0 26 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:44:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 0 2180 110 1261 21 87 21 0 8343 5 2 0 93 1 28 0 17 269 106 1050 18 70 24 0 6795 4 1 0 95 2 1 0 0 60 2 924 12 62 14 0 7369 3 1 0 96 3 2 0 241 221 105 751 4 36 15 1 7280 3 1 0 96 4 0 0 0 57 1 1047 15 46 5 0 5340 4 1 0 95 5 0 0 7 69 9 1070 14 40 20 0 5656 4 1 0 95 6 24 0 0 137 44 1133 2 31 16 0 4988 3 1 0 96 7 5 0 0 57 0 1021 10 29 18 0 5249 4 1 0 95 March 10, 2026 at 10:44:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 119 185 2 10 2 0 1472 0 1 0 99 1 1 0 17 257 114 124 0 9 0 0 653 0 0 0 100 2 0 0 0 18 3 65 3 7 1 0 241 0 0 0 100 3 0 0 31 221 106 29 0 5 1 0 1041 0 0 0 100 4 0 0 0 21 8 34 1 2 1 0 354 0 0 0 100 5 1 0 7 20 6 78 1 4 1 0 410 0 0 0 100 6 0 0 0 23 7 46 0 3 2 0 407 0 0 0 100 7 0 0 0 79 27 89 0 4 1 0 175 0 0 0 100 March 10, 2026 at 10:44:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 691 0 0 2161 132 388 2 37 249 14 2072 1 1 0 98 1 40 0 18 316 110 313 0 30 224 10 431 0 0 0 99 2 43 0 0 63 20 244 0 25 259 8 74 0 0 0 100 3 18 0 3 319 190 214 1 20 230 4 993 0 0 0 100 4 1807 0 0 26 0 183 2 21 201 3 332 0 1 0 99 5 14 0 7 29 3 200 0 16 237 4 311 0 0 0 100 6 12 0 0 29 3 307 0 20 211 5 69 0 0 0 100 7 805 0 119 17 0 248 0 23 216 21 200 0 1 0 99 March 10, 2026 at 10:44:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 140 2 0 0 0 1132 0 1 0 99 1 0 0 17 215 106 10 0 0 0 0 271 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 3 0 0 3 215 106 8 0 0 0 0 896 0 0 0 100 4 0 0 0 7 1 4 0 0 0 0 12 0 0 0 100 5 0 0 7 14 4 10 0 0 0 0 261 0 0 0 100 6 0 0 0 9 2 24 0 1 0 0 0 0 0 0 100 7 0 0 0 15 1 10 0 0 0 0 21 0 0 0 100 March 10, 2026 at 10:44:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 142 0 0 0 0 1131 0 1 0 99 1 0 0 17 221 109 18 0 0 0 0 278 0 0 0 100 2 0 0 0 109 52 106 0 0 0 0 3 0 0 0 100 3 0 0 3 213 105 6 0 0 0 0 893 0 0 0 100 4 0 0 0 9 2 10 0 0 0 0 10 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 11 3 12 0 0 0 0 19 0 0 0 100 7 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:44:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 143 1 1 0 0 1128 0 0 0 99 1 0 0 17 213 105 8 0 0 0 0 586 0 0 0 100 2 0 0 0 109 52 108 0 0 0 0 6 0 0 0 100 3 0 0 3 215 106 8 0 0 0 0 895 0 0 0 100 4 0 0 0 7 1 4 0 0 0 0 12 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 19 6 20 0 0 0 0 8 0 0 0 100 7 0 0 0 13 0 24 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:44:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 105 584 4 42 3 0 2787 0 1 0 99 1 219 0 21 219 102 241 3 21 0 6 1875 1 0 0 98 2 1 0 0 112 46 341 3 22 5 0 1250 1 0 0 99 3 3 0 63 228 108 312 5 34 6 0 2610 1 0 0 99 4 692 0 0 33 9 218 3 18 6 4 1499 2 0 0 98 5 147 0 7 23 4 248 1 24 4 0 1908 1 0 0 99 6 3 0 0 32 9 284 1 20 3 0 1671 1 0 0 99 7 22 0 0 25 1 146 3 13 3 0 1436 1 0 0 98 March 10, 2026 at 10:44:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 110 273 1 21 171 0 1138 0 1 0 99 1 6 0 17 306 140 199 0 17 111 0 268 0 0 0 100 2 0 0 0 17 6 118 0 11 117 0 0 0 0 0 100 3 0 0 3 295 179 118 0 7 127 0 898 0 0 0 100 4 0 0 0 19 7 154 0 12 110 0 11 0 0 0 100 5 0 0 7 14 4 122 0 14 129 0 260 0 0 0 100 6 0 0 0 11 2 236 0 15 101 0 0 0 0 0 100 7 0 0 0 16 1 129 0 11 139 0 0 0 0 0 100 March 10, 2026 at 10:44:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 136 0 3 0 0 1133 0 1 0 99 1 0 0 17 227 102 22 0 2 0 0 266 0 0 0 100 2 0 0 0 111 53 106 0 0 0 0 1 0 0 0 100 3 0 0 3 213 105 6 0 0 0 0 894 0 0 0 100 4 0 0 0 20 7 14 1 0 0 0 11 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:44:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2112 102 159 1 3 8 0 1064 0 1 0 99 1 0 0 17 214 103 34 0 5 11 0 277 0 0 0 100 2 0 0 0 114 52 125 0 1 0 1 90 0 0 0 100 3 0 0 3 219 106 21 0 1 9 0 920 0 0 0 100 4 0 0 9 17 3 20 0 4 16 0 19 0 1 0 99 5 0 0 7 15 3 28 0 3 16 0 288 0 0 0 100 6 0 0 0 14 2 15 0 3 6 0 83 0 0 0 100 7 0 0 7 45 13 50 0 2 3 0 36 0 0 0 100 March 10, 2026 at 10:44:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 101 144 1 1 0 0 1046 0 1 0 99 1 0 0 17 210 103 4 0 0 0 0 267 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 0 0 0 0 100 3 0 0 3 215 105 6 1 0 0 0 894 0 0 0 100 4 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 5 0 0 7 11 3 8 0 0 0 0 260 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 30 7 24 0 0 0 0 10 0 0 0 100 March 10, 2026 at 10:44:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 102 66 1 3 0 0 1039 0 1 0 99 1 24 0 24 228 103 12 1 1 0 0 278 0 0 0 100 2 0 0 0 66 20 61 0 3 0 0 0 0 0 0 100 3 0 0 3 275 109 52 0 3 0 0 894 0 0 0 100 4 0 0 0 88 34 76 0 2 0 0 22 0 0 0 100 5 0 0 119 11 3 12 0 0 0 0 265 0 0 0 100 6 0 0 0 26 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 82 8 60 0 2 1 0 18 0 0 0 100 March 10, 2026 at 10:44:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2117 114 135 0 6 0 0 1039 0 1 0 99 1 0 0 17 255 113 53 0 6 2 0 266 0 0 0 100 2 0 0 0 77 28 72 0 4 1 0 0 0 0 0 100 3 0 0 3 214 105 28 0 2 0 0 893 0 0 0 100 4 0 0 0 11 1 4 0 1 3 0 0 0 0 0 100 5 0 0 7 13 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 12 3 8 0 0 0 0 1 0 0 0 100 7 0 0 0 23 7 23 1 0 1 0 10 0 0 0 100 March 10, 2026 at 10:44:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2185 110 1230 27 127 11 0 8337 5 2 0 94 1 14 0 17 268 106 1110 22 107 17 0 6655 4 1 0 95 2 2 0 0 84 5 1045 25 93 8 0 7735 4 1 0 95 3 2 0 241 234 110 1001 14 77 12 0 6806 4 1 0 95 4 18 0 0 143 47 1080 12 66 14 0 6493 4 1 0 96 5 0 0 7 65 6 999 19 63 10 0 5855 3 1 0 96 6 0 0 0 74 5 961 11 47 12 1 5695 4 1 0 95 7 6 0 0 57 4 903 11 41 17 1 3766 3 1 0 96 March 10, 2026 at 10:44:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 128 1 2 0 0 1049 0 1 0 99 1 0 0 17 231 107 30 0 2 0 0 277 0 0 0 100 2 0 0 0 15 1 12 0 0 0 0 3 0 0 0 100 3 0 0 3 218 106 10 1 0 0 0 895 0 0 0 100 4 0 0 0 105 50 120 0 1 0 0 0 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 2 0 0 0 0 3 0 0 0 100 March 10, 2026 at 10:44:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 40 0 0 2128 102 189 0 4 3 9 1238 0 1 0 99 1 3189 0 131 226 109 76 3 3 6 18 1527 2 1 0 97 2 94 0 0 33 1 84 0 10 10 15 191 0 0 0 100 3 75 0 4 231 106 67 0 9 7 12 1048 0 0 0 100 4 22 0 0 125 51 151 0 8 6 6 118 0 0 0 100 5 6 0 7 26 3 40 0 7 2 4 353 0 0 0 100 6 5 0 0 25 2 46 0 6 6 2 65 0 0 0 100 7 4 0 0 23 0 14 0 2 3 2 38 0 0 0 100 March 10, 2026 at 10:44:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 148 1 0 2 0 1132 0 1 0 99 1 0 0 21 216 106 14 0 0 1 0 279 0 0 0 100 2 0 0 0 15 2 6 0 0 1 0 0 0 0 0 100 3 0 0 7 216 106 8 0 0 0 0 893 0 0 0 100 4 0 0 0 121 61 116 0 0 3 0 15 0 0 0 100 5 0 0 7 13 4 14 0 0 1 0 278 0 0 0 100 6 0 0 0 12 3 6 0 0 1 0 0 0 0 0 100 7 0 0 0 14 1 16 0 2 1 0 0 0 0 0 100 March 10, 2026 at 10:44:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 306 1 16 266 0 1129 0 1 0 99 1 0 0 17 213 105 173 0 14 231 0 589 0 0 0 100 2 0 0 0 11 3 175 0 17 226 0 5 0 0 0 100 3 0 0 3 306 195 321 0 19 199 0 900 0 0 0 100 4 0 0 0 110 52 260 0 13 192 0 25 0 0 0 100 5 0 0 7 14 3 198 0 24 234 0 270 0 0 0 100 6 0 0 0 11 2 180 0 21 223 0 0 0 0 0 100 7 0 0 0 15 0 183 0 18 251 0 0 0 0 0 100 March 10, 2026 at 10:44:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 162 1 1 4 0 1129 0 1 0 99 1 0 0 17 207 102 12 0 0 4 0 266 0 0 0 100 2 0 0 0 17 6 38 0 1 0 0 6 0 0 0 100 3 0 0 3 228 118 23 1 2 8 0 893 0 0 0 100 4 0 0 0 105 50 112 0 0 0 0 0 0 0 0 100 5 0 0 7 10 3 20 0 1 3 0 270 0 0 0 100 6 0 0 0 11 3 14 0 0 1 0 1 0 0 0 100 7 0 0 0 15 0 26 0 0 4 0 0 0 0 0 100 March 10, 2026 at 10:44:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 293 0 0 2126 102 645 10 40 4 2 3028 1 1 0 98 1 50 0 17 224 102 235 7 21 5 0 1930 2 0 0 98 2 206 0 0 33 3 451 7 30 11 1 1895 1 0 0 99 3 336 0 73 236 115 150 5 15 3 1 2204 2 1 0 98 4 72 0 0 27 4 424 5 34 5 1 1620 1 0 0 98 5 0 0 7 118 51 369 2 26 6 0 1934 1 0 0 99 6 105 0 0 23 3 517 1 31 6 0 1994 1 0 0 99 7 63 0 0 26 1 231 1 17 9 1 1570 1 0 0 99 March 10, 2026 at 10:44:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 134 1 3 0 0 1134 0 1 0 99 1 0 0 17 215 103 12 0 3 1 0 267 0 0 0 100 2 0 0 0 7 1 16 0 1 0 0 0 0 0 0 100 3 0 0 3 227 112 20 0 0 0 0 902 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 7 110 53 106 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:44:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2113 102 169 1 5 16 0 1059 0 1 0 99 1 0 0 31 216 105 31 0 10 19 0 285 0 0 0 100 2 0 0 0 18 2 171 0 1 6 0 331 0 0 0 100 3 0 0 10 231 111 51 0 4 3 0 923 0 0 0 100 4 0 0 0 28 10 41 0 2 0 0 51 0 0 0 100 5 1 0 7 115 53 132 0 7 14 0 289 0 0 0 100 6 0 0 0 14 2 26 0 5 9 1 158 0 0 0 100 7 0 0 0 22 1 22 1 4 9 0 20 0 0 0 100 March 10, 2026 at 10:44:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 115 269 1 17 147 0 1046 0 1 0 99 1 0 0 17 300 137 246 0 15 179 0 275 0 0 0 100 2 0 0 0 8 1 258 0 15 120 0 0 0 0 0 100 3 0 0 3 294 177 143 1 14 159 0 894 0 0 0 100 4 0 0 7 10 1 148 0 16 172 0 1 0 0 0 100 5 0 0 7 31 10 175 0 13 151 0 260 0 0 0 100 6 0 0 0 16 4 123 0 11 145 0 4 0 0 0 100 7 0 0 0 9 1 129 0 10 125 0 6 0 0 0 100 March 10, 2026 at 10:44:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2150 128 136 0 4 0 0 1047 0 1 0 99 1 0 0 17 324 125 103 0 2 0 0 273 0 0 0 100 2 0 0 0 39 9 20 0 1 0 0 0 0 0 0 100 3 0 0 3 233 106 10 0 0 0 0 895 0 0 0 100 4 0 0 0 34 2 30 0 2 0 0 2 0 0 0 100 5 0 0 119 12 4 14 0 2 0 0 261 0 0 0 100 6 0 0 0 29 4 10 0 0 0 0 5 0 0 0 100 7 0 0 0 23 1 2 0 0 0 0 21 0 0 0 100 March 10, 2026 at 10:44:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 138 1 0 0 0 1046 0 1 0 99 1 0 0 24 232 112 28 1 2 0 0 281 0 0 0 100 2 0 0 0 108 51 104 0 1 0 0 3 0 0 0 100 3 0 0 3 214 105 6 0 0 0 0 894 0 0 0 100 4 0 0 0 16 0 12 0 0 1 0 3 0 0 0 100 5 0 0 7 13 4 24 0 1 1 0 260 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:44:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2170 102 1254 27 116 19 0 7145 5 2 0 93 1 6 0 17 280 111 1198 23 103 9 0 6800 4 1 0 95 2 0 0 0 82 14 1031 12 75 17 0 6631 4 1 0 95 3 0 0 227 250 113 1070 16 85 17 1 7217 4 1 0 95 4 0 0 0 119 30 1045 14 53 13 0 5418 5 1 0 94 5 3 0 7 63 5 923 14 48 15 1 5318 3 1 0 96 6 0 0 0 66 8 889 4 29 4 0 7290 3 1 0 96 7 36 0 0 48 1 857 6 36 11 0 4935 3 1 0 96 March 10, 2026 at 10:44:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 102 1 0 1 0 1046 0 1 0 99 1 0 0 21 219 106 14 1 0 0 0 278 0 0 0 100 2 0 0 0 52 2 48 0 2 1 0 0 0 0 0 100 3 0 0 7 215 105 6 1 0 1 0 894 0 0 0 100 4 0 0 0 118 59 112 0 0 1 0 15 0 0 0 100 5 0 0 7 19 6 18 0 1 1 0 267 0 0 0 100 6 0 0 0 14 4 26 0 1 1 0 1 0 0 0 100 7 0 0 0 10 1 11 0 1 1 0 10 0 0 0 100 March 10, 2026 at 10:44:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 209 0 22 209 1 1046 0 1 0 99 1 0 0 17 223 110 211 0 17 217 0 272 0 0 0 100 2 0 0 0 91 15 249 0 21 253 0 0 0 0 0 100 3 0 0 3 321 195 316 0 27 182 0 895 0 0 0 100 4 0 0 0 84 26 240 0 19 220 0 2 0 0 0 100 5 0 0 7 15 4 179 0 16 213 0 260 0 0 0 100 6 0 0 0 15 4 167 0 22 197 0 5 0 0 0 100 7 0 0 0 7 0 179 0 19 195 0 10 0 0 0 100 March 10, 2026 at 10:44:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 112 142 1 3 0 0 1046 0 0 0 99 1 0 0 17 217 106 10 0 0 0 0 271 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 3 0 0 3 313 144 106 0 2 0 0 894 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 7 12 4 8 0 0 0 0 259 0 0 0 100 6 0 0 0 11 3 8 0 0 0 0 1 0 0 0 100 7 0 0 0 5 0 4 0 1 0 0 10 0 0 0 100 March 10, 2026 at 10:44:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 162 1 4 0 0 1051 0 1 0 99 1 0 0 17 215 106 12 0 0 0 0 587 0 0 0 100 2 0 0 0 9 1 6 0 1 0 0 3 0 0 0 100 3 0 0 3 285 139 82 0 2 0 0 904 0 0 0 100 4 0 0 0 47 21 50 0 2 0 0 5 0 0 0 100 5 0 0 7 14 5 10 0 0 0 0 261 0 0 0 100 6 0 0 0 13 4 10 0 0 0 0 2 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:44:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 140 1 1 1 0 1046 0 0 0 99 1 0 0 17 209 103 22 0 1 0 0 267 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 3 229 110 20 1 1 0 0 902 0 0 0 100 4 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 5 0 0 7 12 4 8 0 0 0 0 260 0 0 0 100 6 0 0 0 11 3 8 0 0 0 0 1 0 0 0 100 7 0 0 0 5 0 6 0 0 0 0 20 0 0 0 100 March 10, 2026 at 10:44:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 73 0 0 2123 101 201 0 13 18 10 1314 0 1 0 99 1 767 0 129 208 102 69 0 10 7 10 452 0 0 0 99 2 92 0 0 28 1 57 0 9 8 10 150 0 0 0 100 3 21 0 5 233 107 45 0 7 4 7 983 0 0 0 100 4 44 0 0 140 62 167 0 6 6 7 115 0 0 0 100 5 1 0 7 33 6 39 0 4 3 1 327 0 0 0 100 6 5 0 0 29 4 27 0 3 0 4 60 0 0 0 100 7 2438 0 0 27 0 52 3 4 9 10 1229 2 1 0 98 March 10, 2026 at 10:44:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 142 1 1 0 0 1128 0 1 0 99 1 0 0 17 209 102 20 0 0 1 0 266 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 3 0 0 3 216 105 10 0 1 1 0 894 0 0 0 100 4 0 0 0 111 53 106 0 0 0 0 5 0 0 0 100 5 0 0 7 14 5 12 0 0 1 0 260 0 0 0 100 6 0 0 0 11 3 10 0 0 4 0 1 0 0 0 100 7 0 0 0 5 0 10 0 0 2 0 10 0 0 0 100 March 10, 2026 at 10:44:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 105 146 1 5 0 0 1137 0 1 0 99 1 0 0 17 246 117 45 0 4 1 0 268 0 0 0 100 2 0 0 0 9 1 6 0 2 0 0 0 0 0 0 100 3 0 0 3 215 106 22 0 1 1 0 895 0 0 0 100 4 0 0 0 87 40 86 0 2 0 0 331 0 0 0 100 5 0 0 7 14 5 10 0 0 0 0 261 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 2 0 0 0 0 10 0 0 0 100 March 10, 2026 at 10:44:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 128 148 1 6 0 0 1131 0 1 0 99 1 0 0 17 209 103 4 0 0 0 0 267 0 0 0 100 2 0 0 0 9 1 6 0 0 0 0 3 0 0 0 100 3 0 0 3 214 105 8 1 1 0 0 894 0 0 0 100 4 0 0 0 95 30 96 0 6 0 0 20 0 0 0 100 5 0 0 7 12 4 12 0 1 0 0 266 0 0 0 100 6 0 0 0 13 4 16 0 0 0 0 22 0 0 0 100 7 0 0 0 19 0 16 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:44:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2136 133 146 0 7 0 0 1122 0 1 0 99 1 0 0 17 267 122 64 0 3 0 0 272 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 3 215 105 8 0 1 0 0 893 0 0 0 100 4 0 0 0 31 9 42 0 2 0 0 11 0 0 0 100 5 0 0 7 14 5 10 0 0 0 0 265 0 0 0 100 6 0 0 0 9 2 8 0 0 0 0 0 0 0 0 100 7 0 0 0 41 0 40 0 3 0 0 20 0 0 0 100 March 10, 2026 at 10:44:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2133 127 138 2 2 1 0 1123 0 1 0 99 1 0 0 21 262 103 58 0 1 1 0 273 0 0 0 100 2 0 0 0 58 25 52 0 1 1 0 0 0 0 0 100 3 0 0 7 216 105 10 0 2 0 0 895 0 0 0 100 4 0 0 0 29 13 24 1 0 1 0 24 0 0 0 100 5 0 0 7 17 6 34 0 1 1 0 267 0 0 0 100 6 0 0 0 12 3 6 0 0 1 0 0 0 0 0 100 7 0 0 0 15 1 15 0 0 1 0 10 0 0 0 100 March 10, 2026 at 10:44:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 113 142 1 4 0 0 1128 0 1 0 99 1 0 0 17 229 113 32 0 1 2 0 271 0 0 0 100 2 0 0 0 93 30 86 0 3 0 0 0 0 0 0 100 3 0 0 3 217 105 10 0 0 1 0 894 0 0 0 100 4 0 0 0 15 5 14 0 0 0 0 327 0 0 0 100 5 0 0 7 16 5 12 0 0 1 0 260 0 0 0 100 6 0 0 0 9 2 8 0 0 3 0 0 0 0 0 100 7 0 0 0 5 0 8 0 0 3 0 10 0 0 0 100 March 10, 2026 at 10:44:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 115 138 1 8 0 0 1123 0 0 0 99 1 0 0 17 223 107 16 0 2 0 0 271 0 0 0 100 2 0 0 0 73 29 68 0 4 0 0 0 0 0 0 100 3 0 0 3 250 112 44 1 3 0 0 893 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 5 0 0 7 14 4 10 0 1 1 0 260 0 0 0 100 6 0 0 0 9 2 26 0 1 0 0 0 0 0 0 100 7 0 0 0 5 0 2 0 0 0 0 10 0 0 0 100 March 10, 2026 at 10:44:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2135 130 120 0 6 0 0 1123 0 1 0 99 1 0 0 17 231 111 30 0 3 0 0 278 0 0 0 100 2 0 0 0 31 9 30 0 2 0 0 3 0 0 0 100 3 0 0 3 305 116 98 0 3 0 0 895 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 5 0 0 7 12 4 10 0 0 0 0 263 0 0 0 100 6 0 0 0 11 2 24 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:44:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 107 134 1 8 0 0 1122 0 1 0 99 1 0 0 17 232 112 28 1 3 0 0 275 0 0 0 100 2 0 0 0 81 32 74 0 2 0 0 0 0 0 0 100 3 0 0 3 239 115 32 0 3 0 0 896 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 7 12 4 8 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 6 0 0 0 0 20 0 0 0 100 March 10, 2026 at 10:44:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2148 127 464 9 31 4 0 2670 1 1 0 98 1 324 0 17 325 129 345 2 22 4 4 2364 1 0 0 98 2 86 0 0 28 2 462 3 37 13 2 2168 1 0 0 99 3 198 0 73 219 107 390 6 32 6 0 2463 1 0 0 99 4 214 0 0 29 7 194 6 20 3 0 1962 2 0 0 98 5 71 0 7 35 8 295 5 25 6 0 1503 2 0 0 98 6 77 0 0 29 4 358 6 29 12 2 1837 1 0 0 99 7 39 0 0 34 6 410 8 32 6 0 1951 1 0 0 99 March 10, 2026 at 10:44:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 129 272 1 15 118 0 1135 0 1 0 99 1 0 0 17 267 103 193 0 9 137 0 266 0 0 0 100 2 0 0 0 57 22 159 0 8 114 0 0 0 0 0 100 3 0 0 3 287 177 254 1 13 106 0 894 0 0 0 100 4 0 0 0 9 0 109 0 17 136 0 0 0 0 0 100 5 0 0 7 14 5 117 0 10 141 0 260 0 0 0 100 6 0 0 0 15 4 150 0 11 120 0 2 0 0 0 100 7 0 0 0 17 5 113 0 7 122 0 8 0 0 0 100 March 10, 2026 at 10:44:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 142 1 1 0 0 1136 0 1 0 99 1 0 0 17 207 102 2 0 0 0 0 266 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 3 215 106 8 0 0 0 0 895 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 5 0 0 7 14 5 12 0 0 0 0 264 0 0 0 100 6 0 0 0 13 4 12 0 0 0 0 4 0 0 0 100 7 0 0 0 19 6 16 0 1 0 0 29 0 0 0 100 March 10, 2026 at 10:44:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 138 0 0 0 0 1134 0 1 0 99 1 0 0 17 209 103 20 0 1 0 0 267 0 0 0 100 2 0 0 0 107 51 104 0 0 0 0 3 0 0 0 100 3 0 0 3 213 105 6 0 0 0 0 894 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 7 12 4 8 0 0 0 0 260 0 0 0 100 6 0 0 0 9 2 8 0 0 0 0 3 0 0 0 100 7 0 0 0 35 11 34 0 0 0 0 16 0 0 0 100 March 10, 2026 at 10:44:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 101 135 1 3 0 1 1135 0 1 0 99 1 0 0 17 220 105 27 0 0 3 0 282 0 0 0 100 2 0 0 9 49 19 53 0 6 14 0 8 0 1 0 99 3 0 0 3 274 126 97 0 8 9 0 978 0 0 0 100 4 0 0 0 35 12 39 0 2 9 0 12 0 0 0 100 5 0 0 14 20 5 31 0 3 11 0 288 0 0 0 100 6 0 0 14 12 2 22 0 5 14 0 22 0 0 0 100 7 0 0 0 33 6 32 1 2 12 0 29 0 0 0 100 March 10, 2026 at 10:44:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 118 1 2 1 0 1045 0 1 0 99 1 0 0 17 224 110 22 0 0 1 0 284 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 3 0 0 3 243 105 32 1 0 1 0 894 0 0 0 100 4 0 0 0 118 59 106 0 1 0 0 5 0 0 0 100 5 7 0 7 23 8 30 0 0 1 0 280 0 0 0 100 6 0 0 7 13 3 10 0 2 1 0 0 0 0 0 100 7 0 0 0 13 1 10 0 1 1 0 0 0 0 0 100 March 10, 2026 at 10:44:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 101 146 0 2 4 0 1044 0 1 0 99 1 0 0 17 235 108 16 0 0 1 0 275 0 0 0 100 2 0 0 0 27 3 6 0 0 0 0 5 0 0 0 100 3 0 0 3 231 105 10 0 0 1 0 893 0 0 0 100 4 0 0 0 126 52 122 0 1 0 0 2 0 0 0 100 5 0 0 119 12 4 10 0 0 0 0 260 0 0 0 100 6 0 0 0 31 3 14 0 1 0 0 0 0 0 0 100 7 0 0 0 25 0 15 0 3 2 0 0 0 0 0 100 March 10, 2026 at 10:44:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 109 139 1 3 0 0 1045 0 1 0 99 1 0 0 17 238 117 34 0 1 0 0 274 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 3 214 105 6 0 0 0 0 895 0 0 0 100 4 0 0 0 90 35 80 0 2 0 0 1 0 0 0 100 5 0 0 7 13 4 10 0 1 0 0 260 0 0 0 100 6 0 0 0 10 2 20 0 1 1 0 0 0 0 0 100 7 0 0 0 14 0 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:44:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 2169 102 1114 29 100 12 0 8568 5 2 0 94 1 27 0 17 314 128 1055 19 99 21 0 6302 4 1 0 95 2 24 0 0 65 6 1041 20 75 9 1 5723 4 1 0 95 3 0 0 241 232 108 842 13 67 6 0 6923 4 1 0 96 4 0 0 0 103 27 1025 12 51 6 0 5419 3 1 0 97 5 0 0 7 57 5 917 10 53 15 0 5132 4 1 0 95 6 34 0 0 53 3 836 8 35 6 0 4952 4 1 0 96 7 29 0 0 72 4 996 12 39 20 0 5219 4 1 0 96 March 10, 2026 at 10:44:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 105 125 1 4 0 0 1065 0 1 0 99 1 0 0 17 287 139 82 0 3 0 0 267 0 0 0 100 2 0 0 0 25 10 22 0 1 0 0 0 0 0 0 100 3 0 0 3 214 105 8 1 0 0 0 895 0 0 0 100 4 0 0 0 9 1 2 0 1 0 0 0 0 0 0 100 5 0 0 7 24 4 22 0 1 0 0 260 0 0 0 100 6 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 7 0 0 0 25 6 40 0 1 0 0 8 0 0 0 100 March 10, 2026 at 10:45:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 62 0 3 0 0 1054 0 1 0 99 1 0 0 17 208 102 6 1 0 0 0 272 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 1 0 0 0 100 3 0 0 3 217 107 10 0 0 0 0 896 0 0 0 100 4 0 0 0 13 7 10 0 0 0 0 13 0 0 0 100 5 0 0 7 116 6 120 0 0 0 0 273 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 31 7 29 0 0 1 0 10 0 0 0 100 March 10, 2026 at 10:45:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 101 199 1 20 195 0 1055 0 1 0 99 1 0 0 17 207 102 163 0 12 220 0 266 0 0 0 100 2 0 0 0 108 37 291 0 23 229 0 0 0 0 0 100 3 0 0 3 297 187 150 0 15 205 0 896 0 0 0 100 4 0 0 0 8 0 317 0 21 238 0 0 0 0 0 100 5 0 0 7 112 17 249 1 16 227 0 261 0 0 0 100 6 0 0 0 16 5 146 0 13 238 0 1 0 0 0 100 7 0 0 0 25 5 183 0 16 216 0 6 0 0 0 100 March 10, 2026 at 10:45:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 54 0 2 2128 102 96 1 14 9 8 1299 0 1 0 99 1 11 0 17 223 102 64 0 8 5 4 385 0 0 0 100 2 6 0 0 125 6 137 0 10 3 5 65 0 0 0 100 3 7 0 3 236 108 38 0 3 5 7 962 0 0 0 100 4 1802 0 0 25 1 22 2 3 2 4 300 0 0 0 99 5 633 0 7 35 7 53 1 5 10 6 1185 1 0 0 98 6 784 0 113 95 39 144 0 10 6 12 201 0 0 0 99 7 136 0 0 54 13 125 0 14 10 23 496 0 0 0 100 March 10, 2026 at 10:45:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 44 1 3 0 0 1137 0 1 0 99 1 0 0 17 210 102 8 0 2 1 0 269 0 0 0 100 2 0 0 0 79 33 88 0 3 1 0 10 0 0 0 100 3 0 0 3 214 105 6 1 0 0 0 894 0 0 0 100 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 7 58 13 56 0 3 0 0 261 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 105 17 102 0 5 0 0 0 0 0 0 100 March 10, 2026 at 10:45:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 153 0 0 2130 105 405 15 46 4 0 3186 1 1 0 98 1 83 0 17 264 121 490 9 39 5 0 2264 1 0 0 99 2 71 0 0 63 18 475 13 41 13 0 1955 1 0 0 99 3 135 0 73 223 108 311 7 31 5 0 2452 1 0 0 99 4 159 0 0 28 1 364 8 33 7 0 2225 1 0 0 99 5 90 0 7 56 4 248 10 29 3 1 1908 1 0 0 99 6 289 0 0 24 2 181 3 17 9 2 1683 1 1 0 98 7 91 0 0 66 19 382 15 29 8 1 1953 2 0 0 98 March 10, 2026 at 10:45:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 142 1 1 1 0 1134 0 1 0 99 1 0 0 17 207 102 6 0 0 1 0 275 0 0 0 100 2 0 0 0 113 52 106 0 2 1 0 0 0 0 0 100 3 0 0 3 213 105 8 0 1 2 0 895 0 0 0 100 4 0 0 0 32 13 42 1 2 1 0 24 0 0 0 100 5 0 0 7 20 8 20 0 0 1 0 274 0 0 0 100 6 0 0 0 11 3 6 0 0 1 0 0 0 0 0 100 7 0 0 0 11 2 9 0 1 1 0 0 0 0 0 100 March 10, 2026 at 10:45:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 106 307 1 28 176 0 1068 0 1 0 99 1 0 0 17 228 105 182 0 23 150 0 346 0 1 0 99 2 0 0 14 77 33 232 0 22 158 0 7 0 0 0 100 3 0 0 3 336 207 202 0 19 150 0 919 0 0 0 100 4 0 0 9 29 8 341 1 23 154 0 38 0 0 0 100 5 0 0 14 18 3 186 0 17 184 0 289 0 0 0 100 6 0 0 0 16 2 173 0 14 179 0 13 0 0 0 100 7 0 0 0 14 1 162 0 17 153 1 67 0 0 0 100 March 10, 2026 at 10:45:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 193 1 7 21 0 1052 0 1 0 99 1 0 0 17 214 102 60 0 4 24 0 266 0 0 0 100 2 0 0 0 61 27 90 0 1 19 0 0 0 0 0 100 3 0 0 3 296 163 92 1 3 15 0 894 0 0 0 100 4 0 0 0 16 5 98 0 1 5 0 1 0 0 0 100 5 0 0 7 13 3 51 0 2 17 0 260 0 0 0 100 6 0 0 7 11 3 46 0 4 20 0 1 0 0 0 100 7 0 0 0 10 1 51 0 2 17 0 0 0 0 0 100 March 10, 2026 at 10:45:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 107 150 0 1 0 0 1053 0 1 0 99 1 0 0 17 225 102 4 0 1 0 0 266 0 0 0 100 2 0 0 0 29 4 10 0 0 0 0 3 0 0 0 100 3 0 0 3 229 105 6 0 0 0 0 894 0 0 0 100 4 0 0 0 123 51 102 0 0 0 0 2 0 0 0 100 5 0 0 119 12 3 10 0 1 0 0 260 0 0 0 100 6 0 0 0 27 2 28 0 1 0 0 0 0 0 0 100 7 0 0 0 31 1 12 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:45:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2124 110 156 1 1 0 0 1055 0 1 0 99 1 0 0 17 212 103 6 0 1 0 0 267 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 3 214 105 6 0 0 0 0 896 0 0 0 100 4 0 0 0 106 50 104 0 1 0 0 0 0 0 0 100 5 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 12 2 8 0 1 1 0 0 0 0 0 100 7 0 0 0 16 1 30 0 1 0 0 3 0 0 0 100 March 10, 2026 at 10:45:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2187 114 1254 23 97 16 0 6964 5 2 0 93 1 20 0 17 275 103 1073 16 96 21 0 7045 4 1 0 95 2 3 0 0 77 8 1004 14 70 23 0 6621 4 1 0 95 3 15 0 241 232 106 1085 13 56 9 0 5927 5 1 0 94 4 23 0 0 122 37 937 11 55 11 0 6551 3 1 0 96 5 14 0 0 95 25 969 5 30 16 0 5088 3 1 0 96 6 1 0 0 58 4 981 8 42 9 0 6161 3 1 0 96 7 2 0 14 55 1 857 4 33 15 1 5174 3 1 0 96 March 10, 2026 at 10:45:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 102 306 1 16 216 0 1045 0 1 0 99 1 0 0 17 218 104 300 0 19 185 0 266 0 0 0 100 2 0 0 0 8 1 142 0 14 222 0 0 0 0 0 100 3 0 0 3 299 187 176 1 12 197 0 894 0 0 0 100 4 0 0 0 23 8 161 0 11 194 0 31 0 0 0 100 5 0 0 0 108 49 226 2 11 213 0 20 0 0 0 100 6 0 0 0 18 6 169 0 13 208 0 1 0 0 0 100 7 0 0 7 25 3 158 0 12 204 0 260 0 0 0 100 March 10, 2026 at 10:45:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2125 102 163 1 5 3 1 1166 0 1 0 99 1 26 0 24 225 103 54 0 5 1 5 352 0 0 0 100 2 4 0 0 30 4 27 0 3 0 2 100 0 0 0 100 3 2429 0 3 235 106 48 3 7 12 11 2049 2 1 0 98 4 793 0 113 19 5 75 1 8 9 12 211 0 0 0 99 5 145 0 0 28 2 92 0 9 14 22 193 0 0 0 100 6 25 0 3 130 53 167 0 8 6 7 167 0 0 0 100 7 18 0 7 34 3 40 0 8 9 4 365 0 0 0 100 March 10, 2026 at 10:45:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 118 1 1 0 0 1118 0 1 0 99 1 0 0 17 211 103 6 0 0 0 0 266 0 0 0 100 2 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 3 0 0 3 213 105 6 0 0 0 0 893 0 0 0 100 4 0 0 0 17 6 16 0 0 0 0 15 0 0 0 100 5 0 0 0 7 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 118 44 119 0 2 0 0 18 0 0 0 100 7 0 0 7 24 10 22 0 1 0 0 260 0 0 0 100 March 10, 2026 at 10:45:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 80 1 2 0 0 1118 0 0 0 99 1 0 0 17 213 104 8 0 1 0 0 267 0 0 0 100 2 0 0 0 7 1 20 0 1 0 0 3 0 0 0 100 3 0 0 3 213 105 6 0 0 0 0 894 0 0 0 100 4 0 0 0 21 8 18 0 0 0 0 329 0 0 0 100 5 0 0 0 7 1 6 0 0 0 0 5 0 0 0 100 6 0 0 0 75 2 72 0 0 0 0 1 0 0 0 100 7 0 0 7 114 53 112 0 2 0 0 261 0 0 0 100 March 10, 2026 at 10:45:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 146 1 0 1 0 1118 0 1 0 99 1 1 0 17 211 104 12 0 0 2 0 277 0 0 0 100 2 0 0 0 11 2 6 0 1 2 0 0 0 0 0 100 3 0 0 3 214 105 8 1 1 1 0 893 0 0 0 100 4 0 0 0 12 6 24 0 1 2 0 8 0 0 0 100 5 0 0 0 19 6 28 0 1 1 0 37 0 0 0 100 6 0 0 0 25 10 22 0 0 1 0 12 0 0 0 100 7 0 0 7 117 53 115 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:45:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 329 0 0 2121 101 501 8 38 138 1 3000 2 1 0 97 1 219 0 17 219 103 608 3 45 116 0 2207 2 1 0 98 2 4 0 0 23 3 584 11 57 122 0 2532 1 0 0 98 3 18 0 45 316 180 516 4 46 137 0 2786 1 0 0 98 4 1 0 0 17 1 405 5 49 139 0 2256 1 0 0 98 5 221 0 0 23 1 408 5 41 117 1 1886 1 0 0 99 6 237 0 0 31 8 546 5 45 147 2 1993 1 0 0 98 7 1 0 7 119 52 541 4 41 118 0 2255 1 0 0 99 March 10, 2026 at 10:45:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2110 102 146 1 3 2 0 1137 0 1 0 99 1 0 0 17 211 103 6 0 0 4 0 275 0 0 0 100 2 0 0 0 9 1 5 0 1 0 0 10 0 0 0 100 3 0 0 17 223 110 24 0 0 0 0 908 0 0 0 100 4 0 0 0 13 2 8 0 2 0 0 3 0 0 0 100 5 0 0 0 17 1 26 0 1 1 0 0 0 0 0 100 6 0 0 0 19 5 18 1 1 1 0 12 0 0 0 100 7 0 0 7 110 52 108 0 1 0 0 269 0 0 0 100 March 10, 2026 at 10:45:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2113 101 159 2 4 12 0 1044 0 1 0 99 1 0 0 31 212 103 28 0 3 3 1 423 0 0 0 100 2 0 0 0 13 1 10 0 1 3 0 22 0 0 0 100 3 0 0 3 234 113 44 0 6 14 0 923 0 0 0 100 4 0 0 0 11 1 7 0 1 5 0 2 0 0 0 100 5 0 0 0 23 0 32 0 0 4 0 47 0 0 0 100 6 0 0 12 14 3 37 0 5 7 0 10 0 0 0 100 7 0 0 7 114 52 115 0 1 6 0 273 0 0 0 100 March 10, 2026 at 10:45:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 136 1 3 0 0 1035 0 0 0 99 1 0 0 17 216 104 10 0 1 0 0 267 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 3 215 105 6 1 0 0 0 893 0 0 0 100 4 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 16 1 14 0 0 0 0 2 0 0 0 100 6 0 0 0 26 9 22 0 0 0 0 10 0 0 0 100 7 0 0 14 112 54 110 0 1 0 0 263 0 0 0 100 March 10, 2026 at 10:45:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 101 142 1 1 0 0 1035 0 1 0 99 1 0 0 17 227 103 10 0 0 0 0 274 0 0 0 100 2 0 0 0 25 2 6 0 0 0 0 4 0 0 0 100 3 0 0 3 229 105 6 0 0 0 0 894 0 0 0 100 4 2 0 0 30 8 6 0 0 0 0 12 0 0 0 100 5 0 0 112 17 2 22 0 0 0 0 10 0 0 0 100 6 0 0 0 47 12 30 0 2 0 0 14 0 0 0 100 7 0 0 7 134 55 137 0 2 0 0 266 0 0 0 100 March 10, 2026 at 10:45:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 101 170 2 2 1 0 1038 0 1 0 99 1 0 0 17 212 103 6 0 0 2 0 266 0 0 0 100 2 0 0 0 8 1 4 0 0 3 0 0 0 0 0 100 3 0 0 3 214 105 8 0 0 2 0 893 0 0 0 100 4 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 5 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 30 12 26 0 0 0 0 11 0 0 0 100 7 0 0 7 113 53 110 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:45:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2168 105 1335 23 109 16 0 7330 4 2 0 94 1 2 0 17 269 105 1090 24 95 7 0 6606 5 1 0 94 2 1 0 0 70 3 1157 19 79 16 0 6471 5 1 0 94 3 3 0 241 237 108 791 10 67 10 0 7328 4 1 0 95 4 0 0 0 55 1 743 10 55 11 0 7184 4 1 0 96 5 4 0 0 75 12 1133 3 55 15 0 5062 3 1 0 96 6 23 0 0 71 11 1001 8 39 13 0 6812 3 1 0 96 7 1 0 7 123 35 1142 8 37 12 0 5265 4 1 0 96 March 10, 2026 at 10:45:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 142 1 0 1 0 1035 0 1 0 99 1 0 0 17 211 104 24 0 1 0 0 266 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 3 214 105 6 1 0 0 0 895 0 0 0 100 4 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 123 55 118 0 0 0 0 6 0 0 0 100 6 0 0 0 11 3 10 0 1 0 0 10 0 0 0 100 7 0 0 7 10 3 4 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:45:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1860 0 0 2125 101 199 3 14 12 11 1513 0 1 0 98 1 18 0 17 239 104 57 0 9 7 4 384 0 0 0 100 2 13 0 0 23 1 38 0 5 4 4 55 0 0 0 100 3 622 0 3 230 105 30 1 6 6 4 1788 1 0 0 98 4 7 0 0 23 1 24 0 3 6 4 51 0 0 0 100 5 778 0 112 121 53 154 0 4 6 10 163 0 0 0 99 6 102 0 0 30 4 68 0 10 10 13 164 0 0 0 100 7 36 0 9 32 5 56 0 9 3 5 433 0 0 0 100 March 10, 2026 at 10:45:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 124 1 0 1 0 1118 0 1 0 99 1 1 0 21 210 103 8 0 0 1 0 274 0 0 0 100 2 0 0 0 12 2 6 0 2 0 0 0 0 0 0 100 3 0 0 7 214 105 6 0 0 0 0 894 0 0 0 100 4 0 0 0 14 7 12 0 1 1 0 12 0 0 0 100 5 0 0 0 118 52 115 0 2 1 0 10 0 0 0 100 6 0 0 0 44 14 40 0 2 1 0 12 0 0 0 100 7 0 0 7 15 3 14 0 1 1 0 270 0 0 0 100 March 10, 2026 at 10:45:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 219 0 17 244 0 1117 0 1 0 99 1 0 0 17 212 104 332 0 24 233 0 267 0 0 0 100 2 0 0 0 19 1 229 0 26 253 0 3 0 0 0 100 3 0 0 3 297 189 193 0 17 216 0 902 0 0 0 100 4 0 0 0 7 1 172 0 19 198 0 2 0 0 0 100 5 0 0 0 105 23 272 0 17 216 0 0 0 0 0 100 6 0 0 0 76 12 224 0 24 206 0 330 0 0 0 100 7 0 0 7 62 28 224 0 20 215 0 262 0 0 0 100 March 10, 2026 at 10:45:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 38 1 1 0 0 1118 0 1 0 99 1 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 3 0 0 3 216 105 8 1 0 1 0 893 0 0 0 100 4 0 0 0 7 1 22 0 1 0 0 1 0 0 0 100 5 0 0 0 109 13 104 0 3 0 0 1 0 0 0 100 6 0 0 0 19 7 16 0 0 0 0 5 0 0 0 100 7 0 0 7 108 40 106 0 2 0 0 270 0 0 0 100 March 10, 2026 at 10:45:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 55 0 0 2123 106 281 5 22 0 0 2599 2 1 0 97 1 199 0 17 262 122 343 5 33 2 0 2020 2 0 0 98 2 80 0 0 28 1 264 7 36 5 1 1983 1 0 0 99 3 329 0 59 237 113 227 6 29 7 3 2511 2 0 0 98 4 42 0 0 20 2 423 7 39 6 2 1816 1 0 0 99 5 1 0 0 60 2 465 7 37 2 0 1798 1 0 0 99 6 69 0 0 34 8 391 11 40 10 2 1926 1 0 0 99 7 195 0 7 58 20 402 3 32 2 0 2276 1 0 0 99 March 10, 2026 at 10:45:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2133 119 146 1 10 0 0 1135 0 0 0 99 1 5 0 17 239 113 38 0 3 0 0 277 0 0 0 100 2 0 0 0 89 30 88 0 4 1 0 13 0 0 0 100 3 0 0 17 221 106 18 0 4 1 0 897 0 0 0 100 4 0 0 0 11 1 7 0 0 3 0 10 0 0 0 100 5 0 0 0 11 1 22 0 1 3 0 9 0 0 0 100 6 0 0 0 15 3 16 0 1 0 0 12 0 0 0 100 7 0 0 7 12 3 8 0 0 1 0 264 0 0 0 100 March 10, 2026 at 10:45:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2154 135 184 1 8 3 0 1151 0 1 0 99 1 0 0 24 284 113 90 0 10 15 0 283 0 1 0 99 2 0 0 0 50 19 58 0 7 12 0 11 0 0 0 100 3 0 0 3 221 105 25 0 2 0 0 922 0 0 0 100 4 1 0 9 29 13 21 0 3 3 0 26 0 0 0 100 5 0 0 0 13 0 41 0 3 9 0 113 0 0 0 100 6 0 0 0 16 3 45 0 3 11 0 16 0 0 0 100 7 1 0 7 16 2 22 1 4 8 0 290 0 0 0 100 March 10, 2026 at 10:45:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 101 268 2 8 156 0 1035 0 1 0 99 1 0 0 17 216 103 264 0 15 128 0 269 0 0 0 100 2 0 0 0 108 51 239 0 17 157 0 0 0 0 0 100 3 0 0 3 294 179 123 1 15 132 0 894 0 0 0 100 4 0 0 0 8 0 119 0 9 107 0 1 0 0 0 100 5 0 0 7 7 0 169 0 7 136 0 0 0 0 0 100 6 0 0 0 37 14 138 0 10 98 0 16 0 0 0 100 7 0 0 7 12 3 126 0 11 135 0 263 0 0 0 100 March 10, 2026 at 10:45:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 103 142 1 3 0 0 1035 0 1 0 99 1 0 0 17 230 103 8 0 1 0 0 266 0 0 0 100 2 0 0 0 130 54 108 0 0 0 0 6 0 0 0 100 3 0 0 3 232 106 8 0 0 0 0 894 0 0 0 100 4 0 0 0 24 1 2 0 0 0 0 2 0 0 0 100 5 0 0 112 12 1 8 0 0 0 0 1 0 0 0 100 6 0 0 7 41 9 24 0 1 2 0 6 0 0 0 100 7 0 0 7 29 3 30 0 2 0 0 281 0 0 0 100 March 10, 2026 at 10:45:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 101 158 1 1 0 0 1036 0 1 0 99 1 0 0 17 210 103 4 0 0 0 0 266 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 3 0 0 3 214 105 6 0 0 0 0 895 0 0 0 100 4 0 0 0 6 0 4 0 0 0 0 0 0 0 0 100 5 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 24 8 20 0 1 0 0 5 0 0 0 100 7 0 0 7 19 2 16 0 2 0 0 260 0 0 0 100 March 10, 2026 at 10:45:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2168 103 1083 19 102 11 0 6883 4 1 0 95 1 35 0 17 288 115 1157 23 96 23 0 7184 5 1 0 94 2 2 0 0 134 33 1098 23 91 11 0 4982 4 1 0 95 3 12 0 213 237 108 1056 13 66 13 2 6285 4 1 0 95 4 1 0 0 47 2 889 9 58 13 1 6185 2 1 0 97 5 0 0 0 53 0 1030 15 46 16 0 5070 3 1 0 96 6 1 0 0 76 12 767 14 43 14 0 4918 4 1 0 95 7 0 0 7 59 6 762 5 30 12 0 7136 3 1 0 96 March 10, 2026 at 10:45:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 168 0 10 4 0 358 0 0 0 99 1 0 0 17 326 159 218 2 10 2 0 1611 0 0 0 99 2 0 0 0 14 2 66 1 10 2 0 264 0 0 0 100 3 0 0 31 216 106 38 1 5 1 0 1124 0 0 0 100 4 0 0 0 18 7 56 2 6 2 0 389 0 0 0 100 5 0 0 0 23 5 61 2 7 2 0 250 0 0 0 100 6 4 0 0 25 6 68 2 12 6 0 159 0 0 0 100 7 0 0 7 20 4 39 0 5 1 0 773 0 0 0 100 March 10, 2026 at 10:45:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 636 0 3 2153 125 354 1 42 255 14 994 1 1 0 98 1 19 0 17 309 117 303 0 34 244 5 366 0 0 0 99 2 11 0 0 69 19 276 0 33 289 3 70 0 0 0 100 3 4 0 3 327 198 246 1 30 286 1 2077 0 1 0 99 4 1819 0 0 29 1 198 2 23 240 3 327 0 1 0 99 5 15 0 0 23 0 354 0 25 203 5 54 0 0 0 100 6 785 0 112 13 2 257 0 28 249 13 203 0 1 0 99 7 139 0 7 30 3 283 0 32 259 18 454 0 0 0 100 March 10, 2026 at 10:45:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 120 138 0 8 11 0 20 0 0 0 100 1 0 0 17 311 134 128 0 6 5 0 266 0 0 0 100 2 0 0 0 13 4 30 0 1 9 0 7 0 0 0 100 3 0 0 3 246 133 54 1 0 4 0 2014 0 0 0 99 4 0 0 0 13 0 28 0 0 7 0 0 0 0 0 100 5 0 0 0 7 1 56 0 0 3 0 3 0 0 0 100 6 0 0 0 13 3 34 0 2 9 0 1 0 0 0 100 7 0 0 7 10 3 36 0 0 6 0 260 0 0 0 100 March 10, 2026 at 10:45:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 114 104 0 5 0 0 10 0 0 0 100 1 0 0 17 290 129 83 0 2 0 0 266 0 0 0 100 2 0 0 0 37 15 34 0 1 0 0 6 0 0 0 100 3 0 0 3 217 107 58 0 1 0 0 2014 0 0 0 100 4 0 0 0 15 1 10 0 0 0 0 2 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 7 0 0 7 10 3 6 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:45:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 105 0 6 0 0 10 0 0 0 100 1 0 0 17 238 115 34 0 3 0 0 267 0 0 0 100 2 0 0 0 81 37 78 0 2 0 0 322 0 0 0 100 3 0 0 3 221 107 42 2 0 0 0 2012 0 0 0 100 4 0 0 0 13 0 10 0 1 0 0 0 0 0 0 100 5 0 0 0 7 1 20 0 1 0 0 9 0 0 0 100 6 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 7 0 0 7 18 7 18 0 0 0 0 267 0 0 0 100 March 10, 2026 at 10:45:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 120 0 0 2116 100 510 13 35 6 1 1892 1 1 0 98 1 24 0 17 222 103 238 5 25 4 0 1632 1 0 0 99 2 18 0 0 118 50 339 2 17 3 0 1301 1 0 0 99 3 10 0 73 225 107 350 8 28 11 0 3625 1 0 0 99 4 76 0 0 42 9 333 15 33 5 0 2010 1 0 0 99 5 367 0 0 23 2 154 2 17 5 0 1794 2 0 0 98 6 203 0 0 22 2 451 3 31 4 1 1740 0 0 0 99 7 227 0 7 42 12 244 2 16 8 1 2111 2 0 0 98 March 10, 2026 at 10:45:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 101 257 0 15 138 0 14 0 1 0 99 1 5 0 17 216 105 154 0 17 174 0 297 0 0 0 100 2 17 0 0 107 50 250 0 18 155 0 28 0 0 0 100 3 0 0 17 293 180 182 1 10 194 0 2020 0 0 0 99 4 0 0 0 19 1 154 0 14 143 0 1 0 0 0 100 5 0 0 0 29 8 290 1 18 165 0 22 0 0 0 100 6 0 0 0 24 7 189 1 10 165 0 19 0 0 0 100 7 0 0 7 14 4 163 0 16 170 1 279 0 0 0 100 March 10, 2026 at 10:45:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 106 0 0 0 0 1 0 0 0 100 1 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 220 108 42 1 0 0 0 2019 0 0 0 100 4 0 0 0 15 1 10 0 0 0 0 2 0 0 0 100 5 0 0 0 19 7 14 0 0 0 0 10 0 0 0 100 6 0 0 0 13 2 10 0 0 1 0 0 0 0 0 100 7 0 0 7 10 3 22 0 1 0 0 260 0 0 0 100 March 10, 2026 at 10:45:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2113 102 110 0 8 12 0 6 0 1 0 99 1 0 0 38 230 110 38 0 10 10 0 281 0 0 0 100 2 0 0 0 106 47 120 0 8 6 1 165 0 0 0 100 3 1 0 3 237 109 70 2 5 4 0 1961 0 0 0 100 4 0 0 0 20 1 20 0 3 8 0 9 0 0 0 100 5 0 0 0 16 3 28 0 2 5 0 44 0 0 0 100 6 0 0 0 16 2 34 0 3 9 0 33 0 0 0 100 7 0 0 7 16 3 15 0 1 4 0 266 0 0 0 100 March 10, 2026 at 10:45:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 126 0 2 0 0 0 0 0 0 100 1 0 0 17 216 104 10 0 1 0 0 267 0 0 0 100 2 0 0 7 117 56 114 0 1 0 0 9 0 0 0 100 3 0 0 3 220 108 42 0 0 0 0 1930 0 0 0 100 4 0 0 0 16 1 10 0 0 0 0 2 0 0 0 100 5 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 7 0 0 7 15 3 10 0 1 1 0 260 0 0 0 100 March 10, 2026 at 10:45:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 102 124 1 0 2 0 18 0 0 0 100 1 0 0 21 228 103 24 0 1 1 0 266 0 0 0 100 2 0 0 0 147 61 130 1 0 1 0 23 0 0 0 100 3 4 0 7 237 108 48 1 2 1 0 1934 0 0 0 100 4 0 0 0 38 8 6 0 0 1 0 3 0 0 0 100 5 0 0 112 10 1 12 0 3 1 0 6 0 0 0 100 6 0 0 0 32 4 10 0 0 1 0 1 0 0 0 100 7 0 0 7 31 4 11 0 0 1 0 260 0 0 0 100 March 10, 2026 at 10:45:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 110 0 0 2 0 0 0 0 0 100 1 0 0 24 211 103 6 0 0 0 0 266 0 0 0 100 2 0 0 0 122 58 118 0 0 3 0 11 0 0 0 100 3 0 0 3 223 109 46 1 0 2 0 1932 0 0 0 100 4 0 0 0 8 1 4 0 0 1 0 2 0 0 0 100 5 0 0 0 16 1 14 0 0 1 0 1 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 0 0 0 0 100 7 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:45:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35 0 0 2169 101 1259 28 105 20 0 5890 5 1 0 94 1 11 0 17 266 104 1020 20 84 18 0 7417 4 1 0 95 2 48 0 0 70 7 912 9 54 9 0 7091 5 1 0 95 3 18 0 255 249 112 1142 21 64 17 0 7821 4 1 0 95 4 7 0 0 137 24 1027 8 45 13 0 6204 4 1 0 96 5 35 0 0 69 2 1247 15 54 20 0 5768 4 1 0 95 6 15 0 0 71 7 972 5 39 22 0 6571 3 1 0 96 7 1 0 7 119 22 811 11 36 12 0 6144 3 1 0 96 March 10, 2026 at 10:45:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 108 0 0 0 0 1 0 0 0 100 1 0 0 17 209 103 6 0 0 0 0 276 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 3 219 108 58 0 1 0 0 1932 0 0 0 100 4 0 0 0 107 51 102 0 0 0 0 2 0 0 0 100 5 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 7 18 7 14 0 0 0 0 265 0 0 0 100 March 10, 2026 at 10:45:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 2122 100 153 0 8 4 10 69 0 0 0 100 1 6 0 17 229 105 30 0 4 5 3 330 0 0 0 100 2 33 0 0 21 0 32 0 3 4 5 79 0 0 0 100 3 617 0 3 237 108 57 2 2 3 2 2905 1 1 0 98 4 2581 0 114 13 2 65 2 2 5 18 421 0 1 0 99 5 109 0 0 125 48 188 0 9 9 18 189 0 0 0 100 6 20 0 2 27 2 68 0 12 5 11 157 0 0 0 100 7 38 0 7 34 7 69 0 8 5 7 383 0 0 0 100 March 10, 2026 at 10:45:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 128 1 1 0 0 19 0 0 0 100 1 0 0 17 209 103 6 0 0 0 0 276 0 0 0 100 2 0 0 0 5 0 4 0 0 0 0 7 0 0 0 100 3 0 0 3 220 107 44 1 0 2 0 2015 0 0 0 100 4 0 0 0 17 8 22 0 1 0 0 3 0 0 0 100 5 0 0 0 105 50 106 0 0 0 0 5 0 0 0 100 6 0 0 0 13 3 10 0 0 0 0 4 0 0 0 100 7 0 0 7 34 13 36 0 1 1 0 276 0 0 0 100 March 10, 2026 at 10:45:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 100 297 0 30 248 0 5 0 0 0 100 1 0 0 17 218 107 181 0 23 236 0 273 0 0 0 100 2 0 0 0 6 0 179 0 23 259 0 10 0 0 0 100 3 0 0 3 302 187 208 2 22 206 0 2012 0 0 0 99 4 0 0 0 7 0 162 0 19 231 0 0 0 0 0 100 5 0 0 0 69 31 297 0 23 213 0 0 0 0 0 100 6 0 0 0 51 23 233 0 18 247 0 1 0 0 0 100 7 0 0 7 19 6 327 0 21 184 0 582 0 0 0 100 March 10, 2026 at 10:45:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 105 106 0 3 0 0 2 0 0 0 100 1 0 0 17 219 108 14 0 0 0 0 272 0 0 0 100 2 0 0 0 5 0 2 0 0 0 0 10 0 0 0 100 3 0 0 3 219 108 42 0 0 0 0 2013 0 0 0 100 4 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 6 0 0 0 115 49 114 0 3 0 0 0 0 0 0 100 7 0 0 7 16 4 12 0 1 0 0 281 0 0 0 100 March 10, 2026 at 10:45:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 239 0 0 2125 105 489 4 27 0 0 1774 1 1 0 98 1 85 0 17 237 105 391 6 24 15 0 1901 1 0 0 98 2 17 0 0 18 1 356 1 28 4 1 1674 1 0 0 99 3 3 0 73 220 108 235 2 22 7 0 3369 1 0 0 98 4 1 0 0 17 1 257 0 17 1 0 1433 1 0 0 99 5 258 0 0 20 1 271 1 19 4 0 1602 1 0 0 99 6 96 0 0 129 52 380 4 23 3 0 1630 1 0 0 99 7 184 0 7 22 4 198 0 15 4 0 1445 1 0 0 98 March 10, 2026 at 10:45:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 126 0 1 0 0 0 0 0 0 100 1 0 0 17 211 104 6 0 0 0 0 267 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 218 107 40 1 0 0 0 2018 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 2 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 124 58 122 1 1 0 0 9 0 0 0 100 7 0 0 7 12 3 10 0 1 1 0 260 0 0 0 100 March 10, 2026 at 10:45:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 109 137 1 7 8 0 46 0 0 0 99 1 0 0 17 219 105 27 0 4 11 0 290 0 0 0 100 2 0 0 0 49 17 58 0 3 9 0 175 0 0 0 100 3 0 0 14 233 111 66 2 6 9 0 1940 0 0 0 99 4 0 0 9 20 6 15 0 4 15 0 0 0 1 0 99 5 0 0 0 11 1 28 0 5 15 0 18 0 0 0 100 6 0 0 0 119 40 119 0 4 6 0 26 0 0 0 100 7 0 0 21 19 5 26 0 4 2 0 280 0 0 0 100 March 10, 2026 at 10:45:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 129 267 1 22 186 0 8 0 1 0 99 1 0 0 17 257 115 233 0 22 143 0 266 0 0 0 100 2 0 0 0 16 1 165 0 9 145 0 0 0 0 0 100 3 0 0 3 372 207 233 0 19 123 0 1929 0 0 0 99 4 0 0 7 9 2 148 0 13 179 0 25 0 0 0 100 5 0 0 0 10 0 140 0 12 155 0 0 0 0 0 100 6 0 0 0 10 2 139 0 10 141 0 0 0 0 0 100 7 0 0 7 13 3 293 0 15 109 0 260 0 0 0 100 March 10, 2026 at 10:45:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 108 120 1 2 0 0 8 0 0 0 100 1 0 0 17 235 106 12 0 0 1 0 272 0 0 0 100 2 0 0 0 129 50 128 0 1 0 0 0 0 0 0 100 3 0 0 3 235 107 40 2 0 2 0 1929 0 0 0 100 4 0 0 0 23 0 2 0 0 0 0 0 0 0 0 100 5 0 0 112 5 0 6 0 1 0 0 0 0 0 0 100 6 0 0 0 25 2 6 0 0 0 0 0 0 0 0 100 7 0 0 7 28 3 8 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:45:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2133 121 126 0 5 0 0 12 0 0 0 100 1 0 0 17 248 112 46 0 3 0 0 269 0 0 0 100 2 0 0 0 72 29 62 0 1 0 0 0 0 0 0 100 3 0 0 3 219 107 40 1 0 1 0 1927 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 10 0 1 0 0 0 0 0 0 100 7 0 0 14 12 3 8 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:45:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2185 118 1113 21 95 13 0 7350 3 1 0 95 1 2 0 17 349 122 1100 16 81 12 0 7489 4 1 0 95 2 42 0 0 92 18 1162 21 85 12 1 7084 5 1 0 94 3 22 0 241 273 118 1047 19 85 12 0 8456 5 1 0 93 4 2 0 0 70 5 1220 9 50 17 0 6371 3 1 0 96 5 4 0 0 55 2 868 13 39 15 0 5726 4 1 0 96 6 4 0 0 60 4 891 12 49 13 0 5685 4 1 0 96 7 5 0 7 56 6 1161 5 35 21 0 5227 4 1 0 96 March 10, 2026 at 10:46:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 124 124 1 6 0 0 18 0 0 0 100 1 0 0 17 295 124 90 0 7 0 0 266 0 0 0 100 2 0 0 0 23 8 26 0 2 0 0 17 0 0 0 100 3 0 0 3 230 112 58 1 0 1 0 1941 0 0 0 99 4 0 0 0 14 6 20 0 1 0 0 2 0 0 0 100 5 0 0 0 5 0 4 0 0 0 0 3 0 0 0 100 6 0 0 0 11 3 10 0 0 0 0 4 0 0 0 100 7 0 0 7 14 3 15 0 1 1 0 260 0 0 0 100 March 10, 2026 at 10:46:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2129 103 314 0 29 216 8 122 0 1 0 99 1 4 0 17 227 104 198 0 31 238 2 304 0 0 0 100 2 620 0 0 52 14 223 1 20 260 10 914 1 1 0 98 3 2140 0 3 407 226 322 3 21 222 13 2399 1 1 0 98 4 143 0 0 23 0 244 0 25 231 23 165 0 0 0 100 5 35 0 0 21 0 207 0 22 237 9 95 0 0 0 100 6 466 0 113 12 3 218 0 17 266 9 148 0 1 0 99 7 19 0 9 33 3 340 0 31 206 8 387 0 0 0 100 March 10, 2026 at 10:46:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 111 104 0 10 0 0 1 0 0 0 100 1 1 0 17 237 113 32 0 4 0 0 294 0 0 0 100 2 0 0 0 59 21 56 0 3 0 0 10 0 0 0 100 3 0 0 3 256 123 78 0 3 0 0 2020 0 0 0 99 4 0 0 0 9 1 4 0 0 1 0 2 0 0 0 100 5 0 0 0 7 1 22 0 1 0 0 1 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 7 16 2 12 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:46:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 128 94 0 5 0 0 2 0 0 0 100 1 0 0 17 309 118 106 0 4 0 0 269 0 0 0 100 2 0 0 0 21 7 24 0 1 0 0 15 0 0 0 100 3 0 0 3 240 116 60 3 0 0 0 2344 0 0 0 99 4 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 6 0 0 0 11 3 28 0 1 0 0 1 0 0 0 100 7 0 0 7 16 2 12 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:46:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 107 97 0 11 0 0 1 0 0 0 100 1 0 0 17 237 108 32 0 5 0 0 267 0 0 0 100 2 0 0 0 97 42 96 0 3 0 0 14 0 0 0 100 3 0 0 3 226 111 48 1 0 0 0 2019 0 0 0 99 4 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 5 0 0 0 5 0 2 0 0 0 0 3 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 7 18 2 14 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:46:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 206 0 0 2145 120 584 10 50 5 2 2076 1 1 0 98 1 5 0 21 242 106 394 8 40 7 0 2192 1 0 0 99 2 172 0 0 58 6 465 7 53 12 0 2212 1 0 0 99 3 49 0 77 307 136 354 11 37 6 0 3441 2 1 0 98 4 312 0 0 33 7 212 6 16 5 2 1756 1 0 0 98 5 185 0 14 31 4 276 8 27 6 0 1699 1 0 0 99 6 75 0 0 33 5 245 2 23 6 0 1911 2 0 0 98 7 37 0 7 42 7 312 6 32 5 0 2263 1 0 0 99 March 10, 2026 at 10:46:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 123 278 0 22 167 0 0 0 0 0 100 1 0 0 17 228 110 309 0 23 112 0 266 0 0 0 100 2 0 0 0 7 0 134 0 19 177 0 0 0 0 0 100 3 0 0 3 385 203 265 1 14 141 0 2018 0 0 0 99 4 0 0 0 8 1 138 0 12 143 0 2 0 0 0 100 5 0 0 0 23 7 154 0 10 130 0 7 0 0 0 100 6 0 0 0 9 2 139 0 7 142 0 0 0 0 0 100 7 0 0 7 12 2 126 0 14 127 0 260 0 0 0 100 March 10, 2026 at 10:46:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2124 115 98 0 9 9 2 93 0 0 0 100 1 0 0 17 295 109 100 0 7 5 1 358 0 0 0 100 2 0 0 9 75 31 80 0 2 5 0 14 0 1 0 99 3 0 0 3 224 107 62 2 7 15 1 1944 0 0 0 99 4 0 0 7 9 0 7 0 5 7 0 0 0 0 0 100 5 0 0 0 29 9 41 0 2 9 0 47 0 0 0 100 6 0 0 0 14 2 19 0 2 7 0 2 0 0 0 100 7 0 0 7 14 2 13 0 0 1 0 277 0 0 0 100 March 10, 2026 at 10:46:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 112 0 1 0 0 1 0 0 0 100 1 0 0 17 212 104 24 0 1 0 0 266 0 0 0 100 2 0 0 0 108 50 104 0 1 0 0 0 0 0 0 100 3 0 0 3 219 107 38 1 0 0 0 1931 0 0 0 100 4 0 0 0 12 1 10 0 3 0 0 2 0 0 0 100 5 0 0 7 20 6 16 1 1 0 0 9 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:46:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 100 106 0 1 0 0 0 0 0 0 100 1 0 0 17 231 105 10 0 1 0 0 267 0 0 0 100 2 0 0 0 123 50 120 0 2 0 0 0 0 0 0 100 3 0 0 3 232 106 38 1 0 1 0 1929 0 0 0 100 4 0 0 0 31 1 10 0 0 0 0 0 0 0 0 100 5 0 0 112 17 5 14 0 0 0 0 5 0 0 0 100 6 0 0 0 31 5 14 0 1 0 0 3 0 0 0 100 7 0 0 7 24 2 4 0 0 0 0 260 0 0 0 100 March 10, 2026 at 10:46:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 106 122 3 3 1 0 18 0 0 0 100 1 0 0 17 250 119 46 0 5 1 0 266 0 0 0 100 2 2 0 0 78 34 79 0 3 0 0 6 0 0 0 100 3 0 0 3 220 107 48 0 0 1 0 1937 0 0 0 100 4 0 0 0 28 11 16 0 1 0 0 5 0 0 0 100 5 0 0 0 34 14 28 0 1 0 0 17 0 0 0 100 6 0 0 0 14 4 12 0 1 0 0 1 0 0 0 100 7 0 0 7 13 3 17 0 1 0 0 260 0 0 0 100 March 10, 2026 at 10:46:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 2169 104 1291 21 126 211 1 7937 5 2 0 94 1 0 0 24 303 107 1613 20 119 199 0 6596 5 1 0 94 2 9 0 0 114 27 1275 13 91 224 1 6111 4 1 0 95 3 13 0 255 359 204 1261 17 93 258 0 8179 4 2 0 94 4 0 0 0 63 2 1052 8 69 235 0 6944 3 1 0 96 5 35 0 0 65 8 1013 9 47 201 0 7883 3 1 0 96 6 2 0 0 69 6 1123 16 61 248 0 5540 4 1 0 95 7 0 0 0 59 3 1333 12 52 262 0 4115 4 1 0 95 March 10, 2026 at 10:46:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 116 0 0 0 0 9 0 0 0 100 1 0 0 24 212 105 8 0 0 0 0 525 0 0 0 100 2 0 0 0 107 50 104 0 0 0 0 0 0 0 0 100 3 0 0 3 220 107 14 1 0 0 0 1304 0 0 0 100 4 0 0 0 17 2 31 0 2 0 0 29 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 21 0 0 0 100 March 10, 2026 at 10:46:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 0 2134 107 157 0 15 11 4 130 0 0 0 100 1 793 0 137 264 129 109 0 8 7 13 668 0 0 0 99 2 113 0 0 74 23 148 0 14 10 25 220 0 0 0 100 3 13 0 3 227 104 82 0 9 5 7 1023 0 0 0 100 4 623 0 0 36 3 47 1 6 8 7 1500 1 0 0 98 5 16 0 0 23 1 41 0 5 4 5 68 0 0 0 100 6 14 0 0 34 6 43 0 5 2 5 102 0 0 0 100 7 1811 0 3 23 0 20 2 3 1 5 328 0 0 0 99 March 10, 2026 at 10:46:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 107 104 0 4 0 0 5 0 0 0 100 1 0 0 24 243 116 40 0 2 0 0 528 0 0 0 100 2 0 0 0 85 37 80 0 3 0 0 0 0 0 0 100 3 0 0 3 212 104 36 1 0 0 0 1431 0 0 0 100 4 0 0 0 23 4 18 0 0 1 0 597 0 0 0 100 5 0 0 0 7 1 20 0 1 1 0 0 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:46:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 111 138 0 1 1 0 339 0 0 0 100 1 0 0 24 218 108 18 0 0 1 0 533 0 0 0 100 2 0 0 0 111 51 112 0 2 0 0 14 0 0 0 100 3 0 0 3 212 104 44 1 0 2 0 1428 0 0 0 100 4 0 0 0 26 10 10 0 0 1 0 594 0 0 0 100 5 0 0 0 11 2 10 0 1 1 0 5 0 0 0 100 6 0 0 0 13 4 26 0 1 2 0 1 0 0 0 100 7 0 0 0 9 1 5 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:46:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 1 0 0 0 0 0 0 100 1 0 0 24 224 111 20 0 0 1 0 530 0 0 0 100 2 0 0 0 107 50 110 0 1 2 0 0 0 0 0 100 3 0 0 3 212 104 36 1 0 4 0 1129 0 0 0 100 4 0 0 0 13 4 12 0 1 0 0 896 0 0 0 100 5 0 0 0 7 1 4 0 0 4 0 0 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:46:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 163 0 0 2125 100 502 15 47 6 0 1691 1 1 0 98 1 7 0 24 296 138 338 11 35 11 0 2316 1 0 0 98 2 119 0 0 64 20 468 14 39 9 1 1839 1 0 0 98 3 234 0 73 220 104 370 9 30 13 1 3027 1 1 0 98 4 208 0 0 27 5 232 5 22 2 0 2656 2 0 0 98 5 11 0 0 25 4 253 3 21 2 0 1712 1 0 0 99 6 145 0 0 26 2 338 7 29 2 1 1771 1 0 0 98 7 210 0 0 29 1 182 8 19 4 0 1490 1 0 0 99 March 10, 2026 at 10:46:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 110 122 0 2 0 0 0 0 0 0 100 1 0 0 24 312 145 108 0 3 0 0 526 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 211 103 34 0 0 0 0 1124 0 0 0 100 4 0 0 0 27 11 22 0 0 0 0 905 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 7 0 0 0 15 0 12 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:46:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 122 117 0 10 10 2 144 0 0 0 100 1 0 0 33 291 121 97 0 7 5 0 533 0 1 0 99 2 0 0 14 10 1 16 0 7 11 0 9 0 0 0 100 3 0 0 3 256 116 82 1 3 5 0 1144 0 0 0 100 4 0 0 0 39 14 40 1 1 2 0 929 0 0 0 100 5 0 0 0 12 1 25 0 1 6 0 33 0 0 0 100 6 2 0 7 16 2 20 1 3 11 0 23 0 0 0 100 7 0 0 0 18 0 16 0 1 8 0 7 0 0 0 100 March 10, 2026 at 10:46:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 135 120 1 4 2 0 14 0 0 0 100 1 0 0 24 313 119 128 0 4 0 0 525 0 0 0 100 2 0 0 0 8 0 8 0 0 0 0 11 0 0 0 100 3 0 0 3 215 105 42 1 0 1 0 1045 0 0 0 100 4 0 0 0 42 19 28 0 0 0 0 909 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 10 0 1 0 0 0 0 0 0 100 7 0 0 7 15 0 15 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:46:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 121 285 0 20 134 0 0 0 0 0 100 1 0 0 24 335 134 306 0 16 152 0 527 0 0 0 100 2 0 0 0 24 0 287 0 19 143 0 0 0 0 0 100 3 0 0 3 327 198 178 1 16 149 0 1039 0 0 0 99 4 0 0 0 41 10 170 0 10 157 0 903 0 0 0 100 5 0 0 112 9 1 157 0 12 119 0 0 0 0 0 100 6 0 0 0 27 3 136 0 14 113 0 1 0 0 0 100 7 0 0 0 32 0 139 0 12 142 0 0 0 0 0 100 March 10, 2026 at 10:46:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2129 122 112 0 3 0 0 4 0 0 0 100 1 0 0 24 259 106 52 0 2 0 0 526 0 0 0 100 2 0 0 0 60 27 56 0 1 0 0 0 0 0 0 100 3 0 0 3 218 106 40 0 0 0 0 1038 0 0 0 100 4 0 0 0 30 12 24 0 0 0 0 909 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:46:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 0 2164 100 1271 18 113 7 0 6383 4 1 0 94 1 22 0 24 265 104 1101 17 90 10 1 7484 4 1 0 95 2 3 0 0 113 28 1141 17 81 22 0 5884 4 1 0 95 3 7 0 241 235 107 1129 20 62 9 0 6173 3 1 0 95 4 0 0 0 115 27 910 10 56 12 0 7850 3 1 0 96 5 19 0 0 93 5 917 15 50 14 0 6543 4 1 0 95 6 19 0 0 52 2 849 10 49 14 0 6435 5 1 0 94 7 12 0 0 55 0 951 6 44 10 0 6366 4 1 0 96 March 10, 2026 at 10:46:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 8 0 2 0 0 0 0 0 0 100 1 0 0 24 216 106 8 0 0 0 0 528 0 0 0 100 2 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 3 0 0 3 226 110 48 1 1 1 0 1043 0 0 0 100 4 0 0 0 124 45 143 0 13 0 0 917 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 107 11 102 0 11 0 0 0 0 0 0 100 March 10, 2026 at 10:46:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 787 0 112 2115 110 116 0 7 5 11 202 0 1 0 99 1 701 0 14 255 116 96 1 14 10 17 1268 1 0 0 98 2 75 0 14 24 1 59 0 14 8 8 434 0 0 0 100 3 25 0 9 244 112 95 0 5 8 8 1145 0 0 0 99 4 7 0 0 70 16 62 0 8 4 1 1002 0 0 0 100 5 1820 0 0 64 17 75 2 7 7 8 311 0 1 0 99 6 12 0 0 28 3 39 0 6 7 5 77 0 0 0 100 7 10 0 0 105 13 112 0 12 8 6 67 0 0 0 100 March 10, 2026 at 10:46:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 126 309 0 20 277 0 0 0 0 0 100 1 0 0 10 311 127 256 0 19 217 0 260 0 0 0 100 2 0 0 14 16 1 335 0 23 210 0 266 0 0 0 100 3 0 0 3 306 191 228 1 20 221 0 1125 0 1 0 99 4 0 0 0 19 5 197 0 24 241 0 906 0 0 0 100 5 0 0 0 7 1 170 0 23 225 0 0 0 0 0 100 6 0 0 0 10 2 210 0 20 224 0 0 0 0 0 100 7 0 0 0 11 1 174 0 16 256 0 0 0 0 0 100 March 10, 2026 at 10:46:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 121 106 0 2 0 0 3 0 0 0 100 1 0 0 11 256 105 48 0 1 0 0 260 0 0 0 100 2 0 0 14 59 28 62 0 1 0 0 273 0 0 0 100 3 0 0 2 231 111 52 1 0 1 0 1449 0 0 0 100 4 0 0 0 16 5 10 1 0 0 0 896 0 0 0 100 5 0 0 0 9 1 7 0 1 0 0 0 0 0 0 100 6 0 0 0 11 2 12 0 0 0 0 3 0 0 0 100 7 0 0 0 9 1 20 0 1 0 0 1 0 0 0 100 March 10, 2026 at 10:46:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 0 0 0 0 0 0 0 100 1 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 3 0 0 3 211 103 34 0 0 0 0 1118 0 0 0 100 4 0 0 0 15 5 14 0 0 0 0 915 0 0 0 100 5 0 0 0 15 1 10 0 1 0 0 0 0 0 0 100 6 0 0 0 21 8 18 0 0 0 0 8 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:46:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 159 0 0 2116 101 500 5 28 15 1 2077 2 1 0 98 1 10 0 11 249 104 359 7 30 0 0 1779 1 0 0 99 2 67 0 14 114 51 542 4 31 4 0 2014 1 0 0 99 3 139 0 58 212 104 374 3 23 3 0 2607 2 0 0 98 4 308 0 0 26 4 176 7 19 3 1 2731 2 0 0 98 5 297 0 0 27 1 412 9 35 6 1 1790 1 0 0 99 6 38 0 0 27 7 217 0 16 1 0 1634 1 0 0 99 7 64 0 0 20 0 190 6 27 2 1 1322 1 0 0 98 March 10, 2026 at 10:46:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 122 0 0 4 1 13 0 0 0 100 1 0 0 10 212 103 39 0 4 1 0 281 0 0 0 100 2 0 0 14 110 52 276 0 1 0 0 607 0 0 0 100 3 0 0 17 216 106 48 1 1 0 0 1152 0 0 0 100 4 0 0 0 42 19 32 1 1 0 0 912 0 0 0 100 5 0 0 0 19 2 16 0 1 1 0 17 0 0 0 100 6 0 0 0 17 4 18 0 0 1 0 12 0 0 0 100 7 14 0 0 13 1 9 0 0 4 0 9 0 0 0 100 March 10, 2026 at 10:46:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2114 100 272 1 19 165 0 18 0 0 0 100 1 0 0 24 212 103 162 0 14 145 0 327 0 0 0 100 2 0 0 14 112 51 419 0 21 134 0 342 0 1 0 99 3 0 0 3 312 196 198 3 16 151 0 1157 0 0 0 99 4 0 0 7 39 14 185 1 18 138 0 933 0 0 0 100 5 0 0 0 20 1 188 0 21 184 0 30 0 0 0 100 6 0 0 0 16 3 175 0 14 175 0 15 0 0 0 100 7 0 0 0 14 1 161 0 14 156 0 22 0 0 0 100 March 10, 2026 at 10:46:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 110 0 0 0 0 3 0 0 0 100 1 0 0 10 215 103 8 0 1 0 0 260 0 0 0 100 2 0 0 14 106 51 122 0 1 0 0 269 0 0 0 100 3 0 0 3 212 104 34 0 0 0 0 1039 0 0 0 100 4 0 0 0 18 5 12 0 1 0 0 895 0 0 0 100 5 0 0 7 17 2 16 0 1 0 0 1 0 0 0 100 6 0 0 0 26 10 26 0 1 0 0 14 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 21 0 0 0 100 March 10, 2026 at 10:46:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 101 106 0 0 0 0 1 0 0 0 100 1 0 0 10 228 103 6 0 0 0 0 260 0 0 0 100 2 0 0 14 123 51 106 0 0 0 0 266 0 0 0 100 3 0 0 3 226 103 34 1 1 1 0 1034 0 0 0 100 4 0 0 0 29 4 22 0 1 0 0 894 0 0 0 100 5 0 0 112 17 1 14 0 0 0 0 0 0 0 0 100 6 0 0 0 37 8 20 0 1 0 0 9 0 0 0 100 7 0 0 0 27 2 6 0 0 0 0 5 0 0 0 100 March 10, 2026 at 10:46:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 106 0 0 0 0 0 0 0 0 100 1 0 0 17 214 104 8 0 0 0 0 261 0 0 0 100 2 0 0 14 106 51 102 0 0 0 0 266 0 0 0 100 3 0 0 3 211 103 32 1 0 1 0 1036 0 0 0 100 4 0 0 0 16 5 10 0 0 0 0 896 0 0 0 100 5 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 6 0 0 0 26 10 24 0 1 0 0 13 0 0 0 100 7 0 0 0 12 1 8 0 0 0 0 4 0 0 0 100 March 10, 2026 at 10:46:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 0 2167 102 1221 20 105 9 0 5932 5 1 0 94 1 43 0 14 275 105 1037 15 90 10 0 6572 5 1 0 94 2 17 0 14 144 49 1043 10 71 19 1 6800 3 1 0 96 3 19 0 245 228 104 1085 10 59 23 0 6534 3 1 0 95 4 17 0 0 84 11 1100 10 58 16 1 5956 4 1 0 95 5 8 0 0 59 2 941 12 47 14 0 6779 3 1 0 96 6 21 0 0 73 12 855 8 39 4 1 5678 4 1 0 96 7 2 0 0 64 4 881 11 37 12 0 6134 3 1 0 96 March 10, 2026 at 10:46:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2111 100 281 0 21 243 0 0 0 1 0 99 1 0 0 10 213 104 182 0 18 254 0 260 0 0 0 100 2 0 0 14 113 54 454 0 23 220 0 271 0 0 0 100 3 0 0 3 308 194 204 0 19 230 0 1036 0 1 0 99 4 0 0 0 16 5 190 0 23 206 0 896 0 0 0 100 5 0 0 0 14 3 181 0 23 245 0 10 0 0 0 100 6 0 0 0 9 2 197 0 21 235 0 0 0 0 0 100 7 0 0 0 7 0 169 0 19 241 0 0 0 0 0 100 March 10, 2026 at 10:46:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1832 0 0 2131 108 175 2 11 11 9 405 0 1 0 99 1 21 0 10 324 145 174 0 12 13 10 373 0 0 0 100 2 634 0 14 34 6 120 1 14 12 7 1200 1 0 0 98 3 798 0 116 243 129 144 1 10 11 16 1228 0 1 0 99 4 81 0 0 31 5 89 0 10 7 20 1011 0 0 0 100 5 29 0 1 23 1 46 0 6 12 6 113 0 0 0 100 6 34 0 0 25 2 63 0 5 14 3 56 0 0 0 100 7 4 0 0 29 3 44 0 3 5 3 61 0 0 0 100 March 10, 2026 at 10:46:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 134 102 0 2 0 0 0 0 0 0 100 1 0 0 10 280 104 72 0 1 0 0 260 0 0 0 100 2 0 0 14 51 20 50 0 1 0 0 271 0 0 0 100 3 0 0 3 212 104 34 1 0 0 0 1122 0 0 0 100 4 0 0 0 15 5 10 0 0 0 0 897 0 0 0 100 5 0 0 0 7 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 11 2 10 0 0 1 0 0 0 0 0 100 7 0 0 0 9 1 22 0 1 0 0 1 0 0 0 100 March 10, 2026 at 10:46:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 120 0 1 1 0 0 0 0 0 100 1 0 0 10 212 104 12 0 0 0 0 266 0 0 0 100 2 0 0 14 127 58 128 0 0 0 0 598 0 0 0 100 3 0 0 3 212 104 34 1 0 0 0 1118 0 0 0 100 4 0 0 0 14 4 8 1 0 0 0 894 0 0 0 100 5 0 0 0 9 2 8 0 0 0 0 8 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 9 0 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:46:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 3 0 0 0 100 1 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 117 54 116 0 0 0 0 277 0 0 0 100 3 1 0 3 217 106 52 0 1 0 0 1137 0 0 0 100 4 0 0 0 22 10 10 0 0 0 0 896 0 0 0 100 5 0 0 0 7 1 12 0 1 0 0 15 0 0 0 100 6 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 13 0 0 0 0 4 0 0 0 100 March 10, 2026 at 10:46:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 56 0 0 2117 100 597 6 38 167 0 1743 1 1 0 98 1 228 0 11 227 104 372 4 38 160 1 1724 1 1 0 98 2 199 0 14 103 42 646 5 49 123 0 2010 2 1 0 98 3 152 0 58 306 180 479 5 42 128 0 2747 1 1 0 99 4 181 0 0 32 5 576 8 45 141 2 2522 1 0 0 98 5 186 0 0 22 1 382 5 31 139 0 2088 2 0 0 98 6 63 0 0 25 3 381 8 35 159 0 1728 1 0 0 99 7 22 0 0 50 2 343 6 38 133 0 1449 1 0 0 99 March 10, 2026 at 10:46:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 108 64 0 3 2 0 24 0 0 0 100 1 0 0 10 214 103 7 0 0 2 0 272 0 0 0 100 2 6 0 14 9 1 13 0 3 1 0 280 0 0 0 100 3 17 0 17 226 108 68 1 5 3 0 1134 0 0 0 100 4 0 0 0 113 35 112 0 4 1 0 899 0 0 0 100 5 0 0 0 59 20 56 0 3 0 0 5 0 0 0 100 6 0 0 0 13 2 13 0 2 0 0 1 0 0 0 100 7 0 0 0 19 2 14 0 0 0 0 8 0 0 0 100 March 10, 2026 at 10:46:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2127 109 139 1 4 9 0 36 0 0 0 99 1 0 0 10 215 103 25 2 5 14 0 274 0 0 0 100 2 0 0 14 10 1 15 0 4 14 0 339 0 0 0 100 3 0 0 10 214 103 50 1 3 4 0 1136 0 0 0 100 4 0 0 0 121 55 118 1 1 4 1 961 0 0 0 100 5 0 0 0 15 2 27 0 1 1 0 55 0 0 0 100 6 0 0 9 23 2 36 1 5 11 0 27 0 1 0 99 7 2 0 0 12 0 19 1 4 7 0 30 0 0 0 100 March 10, 2026 at 10:46:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 110 0 1 0 0 0 0 0 0 100 1 0 0 10 215 105 6 0 0 0 0 261 0 0 0 100 2 0 0 14 24 10 20 0 0 0 0 280 0 0 0 100 3 0 0 3 214 103 36 0 2 2 0 1039 0 0 0 100 4 0 0 7 117 56 132 0 2 0 0 896 0 0 0 100 5 0 0 0 8 1 6 0 0 0 0 0 0 0 0 100 6 0 0 0 14 2 10 0 0 0 0 3 0 0 0 100 7 0 0 0 14 1 8 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:46:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 100 80 0 3 1 0 3 0 0 0 100 1 0 0 10 228 103 4 0 0 1 0 260 0 0 0 100 2 0 0 14 38 8 23 1 3 0 0 282 0 0 0 100 3 0 0 3 226 103 36 1 0 1 0 1038 0 0 0 100 4 0 0 0 142 47 112 0 5 2 0 894 0 0 0 100 5 1 0 112 27 7 48 0 8 1 0 14 0 0 0 100 6 0 0 0 56 17 36 0 1 1 0 2 0 0 0 100 7 0 0 0 32 2 13 0 1 3 0 1 0 0 0 100 March 10, 2026 at 10:46:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 100 108 0 0 1 0 0 0 0 0 100 1 0 0 10 211 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 24 7 24 0 0 2 0 275 0 0 0 100 3 0 0 3 213 103 32 1 0 1 0 1035 0 0 0 100 4 0 0 0 20 6 19 0 2 2 0 897 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 112 53 110 0 0 2 0 1 0 0 0 100 7 0 0 0 8 1 4 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:46:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 2146 100 994 14 83 17 0 4303 4 1 0 95 1 13 0 10 256 105 792 14 79 9 0 5219 3 1 0 96 2 21 0 14 64 11 994 8 67 17 0 5932 4 1 0 96 3 0 0 171 219 105 824 7 55 10 0 6803 3 1 0 96 4 1 0 0 49 6 771 8 37 18 0 5188 3 1 0 96 5 25 0 0 43 1 761 8 38 16 0 5205 3 1 0 96 6 0 0 0 134 44 955 6 35 13 0 4439 2 1 0 97 7 42 0 0 63 7 744 8 28 15 0 4189 3 1 0 97 March 10, 2026 at 10:46:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 101 252 3 25 4 0 1414 1 1 0 99 1 0 0 10 228 104 189 3 20 1 0 1811 1 0 0 99 2 0 0 14 27 2 234 2 15 0 0 1255 1 0 0 99 3 0 0 73 224 108 233 6 16 3 0 2417 1 0 0 99 4 0 0 0 29 6 179 3 12 2 0 2068 1 0 0 99 5 0 0 0 118 2 284 1 11 1 0 900 1 0 0 99 6 0 0 0 119 51 288 0 13 4 0 1187 1 0 0 99 7 0 0 0 19 1 282 2 6 2 0 1097 1 0 0 99 March 10, 2026 at 10:46:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 8 0 1 0 0 0 0 0 0 100 1 0 0 10 217 104 10 0 1 0 0 261 0 0 0 100 2 0 0 14 7 1 8 0 1 0 0 269 0 0 0 100 3 0 0 3 220 108 44 1 0 0 0 1044 0 0 0 100 4 0 0 0 15 5 10 0 0 0 0 894 0 0 0 100 5 0 0 0 111 3 106 0 0 0 0 2 0 0 0 100 6 0 0 0 117 56 114 0 0 0 0 8 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:46:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 32 0 3 0 0 3 0 0 0 100 1 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 11 1 10 0 1 0 0 273 0 0 0 100 3 0 0 3 222 109 50 1 0 0 0 1045 0 0 0 100 4 0 0 0 25 12 12 0 0 0 0 895 0 0 0 100 5 1 0 0 111 3 118 0 1 0 0 36 0 0 0 100 6 0 0 0 113 53 110 0 1 0 0 1 0 0 0 100 7 0 0 0 9 0 7 0 1 1 0 0 0 0 0 100 March 10, 2026 at 10:46:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 286 0 20 240 0 0 0 1 0 99 1 0 0 10 212 103 194 1 25 242 0 260 0 0 0 100 2 0 0 14 5 1 193 0 23 261 0 266 0 0 0 100 3 0 0 3 313 199 384 1 28 199 0 1043 0 0 0 99 4 0 0 0 18 5 178 1 17 202 0 895 0 0 0 100 5 0 0 0 7 1 177 0 22 262 0 10 0 0 0 100 6 0 0 0 117 55 308 0 28 234 0 6 0 0 0 100 7 0 0 0 14 1 209 0 23 258 0 0 0 0 0 100 March 10, 2026 at 10:46:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 124 0 1 6 0 4 0 0 0 100 1 0 0 10 210 103 14 0 0 3 0 260 0 0 0 100 2 0 0 14 5 1 12 0 0 3 0 266 0 0 0 100 3 0 0 3 221 113 56 0 1 1 0 1353 0 0 0 100 4 0 0 0 17 6 16 0 1 3 0 896 0 0 0 100 5 0 0 0 9 2 20 0 1 7 0 16 0 0 0 100 6 0 0 0 109 52 116 0 0 3 0 0 0 0 0 100 7 0 0 0 25 6 34 0 1 5 0 31 0 0 0 100 March 10, 2026 at 10:46:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 103 0 0 2123 100 185 0 13 6 12 215 0 0 0 100 1 52 0 12 228 103 58 0 10 8 8 392 0 0 0 100 2 58 0 14 21 1 95 0 12 9 14 380 0 0 0 100 3 6 0 3 229 104 59 1 4 7 3 1104 0 0 0 100 4 621 0 0 32 5 45 1 5 10 10 1792 1 0 0 98 5 8 0 0 23 1 33 0 4 2 3 92 0 0 0 100 6 6 0 0 130 54 131 0 1 3 5 63 0 0 0 100 7 2580 0 114 27 5 63 2 5 14 11 458 1 1 0 99 March 10, 2026 at 10:46:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 0 0 0 0 0 0 0 100 1 0 0 10 213 104 6 1 0 0 0 261 0 0 0 100 2 0 0 14 7 1 8 0 1 1 0 269 0 0 0 100 3 0 0 3 210 103 50 1 1 0 0 1120 0 0 0 100 4 0 0 0 17 6 12 0 0 0 0 896 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 53 108 0 0 0 0 1 0 0 0 100 7 0 0 0 25 5 20 0 0 0 0 7 0 0 0 100 March 10, 2026 at 10:46:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 0 1 0 0 0 0 0 100 1 0 0 14 213 103 9 0 3 0 0 260 0 0 0 100 2 1 0 14 8 2 6 0 0 1 0 273 0 0 0 100 3 0 0 7 214 105 48 0 0 1 0 1137 0 0 0 100 4 0 0 0 25 12 10 1 0 1 0 893 0 0 0 100 5 0 0 0 10 2 10 0 0 1 0 25 0 0 0 100 6 0 0 0 112 53 106 0 0 1 0 0 0 0 0 100 7 0 0 0 29 9 24 0 0 1 0 10 0 0 0 100 March 10, 2026 at 10:46:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 114 0 1 2 0 0 0 0 0 100 1 0 0 10 217 104 12 0 0 1 0 260 0 0 0 100 2 0 0 14 5 1 10 0 0 2 0 266 0 0 0 100 3 0 0 3 212 103 34 1 0 0 0 1119 0 0 0 100 4 0 0 0 20 7 32 0 1 2 0 897 0 0 0 100 5 0 0 0 9 1 10 0 0 0 0 15 0 0 0 100 6 0 0 0 117 56 122 0 0 0 0 7 0 0 0 100 7 0 0 0 13 3 8 0 0 0 0 323 0 0 0 100 March 10, 2026 at 10:46:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 110 0 1 0 0 3 0 0 0 100 1 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 3 214 104 46 1 1 0 0 1125 0 0 0 100 4 0 0 0 19 6 14 0 0 2 0 895 0 0 0 100 5 0 0 0 9 2 24 0 1 0 0 11 0 0 0 100 6 0 0 0 117 56 114 0 0 0 0 12 0 0 0 100 7 0 0 0 5 0 2 0 0 0 0 3 0 0 0 100 March 10, 2026 at 10:46:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 0 0 100 1 0 0 11 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 5 1 4 0 0 0 0 266 0 0 0 100 3 0 0 2 215 103 38 1 0 0 0 1116 0 0 0 100 4 0 0 0 17 6 12 0 0 0 0 896 0 0 0 100 5 23 0 0 9 2 6 0 0 0 0 15 0 0 0 100 6 23 0 0 123 59 122 0 0 1 0 15 0 0 0 100 7 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:46:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 0 0 0 0 100 1 0 0 10 212 104 6 0 0 0 0 261 0 0 0 100 2 0 0 14 5 1 4 0 0 0 0 269 0 0 0 100 3 0 0 3 209 103 32 0 0 0 0 1114 0 0 0 100 4 0 0 0 16 5 10 1 0 0 0 893 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 6 0 0 0 119 57 138 0 2 0 0 8 0 0 0 100 7 0 0 0 13 0 8 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:47:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 112 0 0 0 0 1 0 0 0 100 1 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 5 1 6 0 0 0 0 273 0 0 0 100 3 0 0 3 224 110 56 1 0 3 0 1134 0 0 0 100 4 0 0 0 24 13 12 0 0 1 0 897 0 0 0 100 5 0 0 0 7 1 14 0 0 0 0 21 0 0 0 100 6 0 0 0 115 54 112 0 0 2 0 319 0 0 0 100 7 0 0 0 15 0 33 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:47:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 0 2 0 0 0 0 0 100 1 0 0 10 212 104 8 0 0 1 0 260 0 0 0 100 2 0 0 14 5 1 8 0 0 1 0 266 0 0 0 100 3 0 0 3 220 108 42 1 0 0 0 1122 0 0 0 100 4 0 0 0 15 5 12 0 0 2 0 893 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 111 53 110 0 0 3 0 1 0 0 0 100 7 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:47:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 132 0 3 0 0 4 0 0 0 100 1 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 300 0 0 0 100 3 0 0 3 225 110 46 1 0 0 0 1123 0 0 0 100 4 0 0 0 17 6 12 0 0 0 0 897 0 0 0 100 5 0 0 0 9 2 6 0 0 0 0 11 0 0 0 100 6 0 0 0 109 52 106 0 0 0 0 0 0 0 0 100 7 0 0 0 13 0 6 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:47:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 348 0 0 2113 100 362 2 23 5 1 1675 1 1 0 98 1 423 0 10 222 103 139 3 14 4 5 1934 2 0 0 98 2 130 0 14 30 6 415 5 28 4 0 1879 1 0 0 99 3 33 0 59 222 108 356 4 22 8 0 2951 1 1 0 98 4 74 0 0 24 5 479 2 23 2 2 2720 1 0 0 99 5 0 0 0 26 1 373 1 23 0 0 1690 0 0 0 99 6 1 0 0 108 47 212 3 13 0 0 536 2 0 0 98 7 0 0 0 20 0 417 6 27 1 0 1639 1 0 0 99 March 10, 2026 at 10:47:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 4 0 0 0 0 11 0 0 0 100 1 0 0 10 216 105 12 0 2 5 0 273 0 0 0 100 2 5 0 14 115 35 122 0 6 1 0 302 0 0 0 100 3 0 0 17 212 104 36 1 2 1 0 1130 0 0 0 100 4 0 0 0 19 6 14 0 0 0 0 906 0 0 0 100 5 0 0 0 107 20 112 0 4 2 0 19 0 0 0 100 6 0 0 0 28 10 30 1 2 2 0 24 0 0 0 100 7 0 0 0 21 2 12 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:47:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 2 1 0 4 0 0 0 100 1 0 0 10 210 103 4 0 0 1 0 260 0 0 0 100 2 0 0 14 27 7 24 0 0 2 0 281 0 0 0 100 3 0 0 3 216 105 66 1 1 1 0 1142 0 0 0 100 4 0 0 0 24 13 12 0 1 1 0 893 0 0 0 100 5 0 0 0 11 2 8 0 1 1 0 3 0 0 0 100 6 0 0 0 111 52 106 0 1 0 0 0 0 0 0 100 7 0 0 0 18 3 14 0 0 1 0 1 0 0 0 100 March 10, 2026 at 10:47:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 106 267 0 16 139 0 0 0 0 0 100 1 0 0 10 213 104 146 0 13 111 0 260 0 0 0 100 2 0 0 14 17 7 163 0 13 162 0 275 0 0 0 100 3 0 0 3 298 189 306 0 11 102 0 1125 0 0 0 99 4 0 0 0 17 6 187 0 10 136 0 896 0 0 0 100 5 0 0 0 20 3 172 0 17 140 0 0 0 0 0 100 6 0 0 0 99 44 252 0 13 154 0 1 0 0 0 100 7 0 0 0 7 1 133 0 11 155 0 0 0 0 0 100 March 10, 2026 at 10:47:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 3 0 0 0 100 1 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 21 9 18 0 0 0 0 279 0 0 0 100 3 0 0 3 210 103 34 1 0 0 0 1128 0 0 0 100 4 0 0 0 18 6 14 1 1 0 0 896 0 0 0 100 5 0 0 0 13 2 8 0 1 0 0 1 0 0 0 100 6 0 0 0 115 53 112 0 2 0 0 3 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:47:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 8 2109 101 93 0 8 5 0 5 0 1 0 99 1 4 0 24 245 104 55 0 8 5 1 340 0 0 0 100 2 0 0 14 30 11 37 0 3 9 0 307 0 0 0 100 3 0 0 3 215 103 56 1 4 8 0 1062 0 0 0 100 4 0 0 0 24 6 31 0 5 10 0 897 0 0 0 100 5 0 0 7 14 1 43 0 5 11 0 22 0 0 0 100 6 0 0 0 112 51 123 0 4 6 0 26 0 0 0 100 7 0 0 0 12 1 16 0 4 10 1 83 0 0 0 100 March 10, 2026 at 10:47:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 110 0 2 0 0 0 0 0 0 100 1 0 0 10 217 104 8 0 0 0 0 261 0 0 0 100 2 0 0 14 24 9 20 0 0 0 0 277 0 0 0 100 3 0 0 3 213 104 36 1 1 0 0 1037 0 0 0 100 4 0 0 0 16 5 10 0 0 0 0 894 0 0 0 100 5 0 0 0 16 2 14 0 0 1 0 4 0 0 0 100 6 0 0 7 107 51 126 0 2 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:47:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2119 101 128 0 4 0 0 15 0 0 0 100 1 1 0 10 228 104 8 0 1 1 0 261 0 0 0 100 2 1 0 14 35 7 22 0 2 1 0 282 0 0 0 100 3 1 0 3 231 106 50 0 1 2 0 1055 0 0 0 100 4 0 0 0 42 12 14 0 0 0 0 896 0 0 0 100 5 0 0 112 9 1 12 0 0 0 0 11 0 0 0 100 6 1 0 0 135 56 118 0 1 1 0 10 0 0 0 100 7 5 0 0 29 3 19 0 4 2 0 6 0 0 0 100 March 10, 2026 at 10:47:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 100 114 0 1 1 0 0 0 0 0 100 1 0 0 10 211 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 19 7 20 1 0 1 0 272 0 0 0 100 3 0 0 3 211 103 32 1 0 0 0 1036 0 0 0 100 4 0 0 0 17 5 12 1 0 1 0 894 0 0 0 100 5 0 0 0 16 2 12 0 1 0 0 0 0 0 0 100 6 0 0 0 114 53 114 0 2 2 0 2 0 0 0 100 7 0 0 0 8 1 18 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:47:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 103 1127 23 112 9 0 6304 4 1 0 95 1 34 0 10 269 104 1107 17 103 12 0 6477 4 1 0 95 2 52 0 14 63 4 952 16 79 12 0 6554 5 1 0 95 3 17 0 241 234 108 1079 14 69 11 0 5753 4 1 0 96 4 16 0 0 94 6 768 15 56 19 1 7455 4 1 0 95 5 19 0 0 60 3 1003 12 47 14 0 6569 4 1 0 95 6 6 0 0 134 45 916 8 37 11 0 7262 4 1 0 96 7 0 0 0 67 10 953 5 30 7 0 4081 3 1 0 96 March 10, 2026 at 10:47:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 106 0 1 0 0 0 0 0 0 100 1 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 13 2 8 0 1 0 0 267 0 0 0 100 3 0 0 3 209 102 4 0 1 0 0 0 0 0 0 100 4 0 0 0 15 5 10 0 0 0 0 895 0 0 0 100 5 0 0 0 14 3 42 1 1 0 0 1045 0 0 0 100 6 0 0 0 107 51 110 0 0 0 0 21 0 0 0 100 7 0 0 0 18 6 12 1 0 0 0 7 0 0 0 100 March 10, 2026 at 10:47:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2124 102 149 0 4 2 4 67 0 0 0 100 1 2273 0 123 215 104 63 2 4 4 15 627 0 1 0 99 2 21 0 16 21 1 34 0 3 7 9 352 0 0 0 100 3 336 0 3 231 103 57 0 6 5 9 129 0 0 0 100 4 699 0 0 35 6 92 1 11 12 22 1891 1 0 0 98 5 44 0 0 30 2 93 1 10 8 7 1266 0 0 0 100 6 16 0 0 123 51 140 0 6 3 5 118 0 0 0 100 7 17 0 0 41 7 49 0 8 4 3 71 0 0 0 100 March 10, 2026 at 10:47:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 114 1 0 1 0 5 0 0 0 100 1 0 0 14 211 103 20 0 1 1 0 260 0 0 0 100 2 0 0 14 8 2 6 0 0 1 0 273 0 0 0 100 3 0 0 7 214 104 14 0 1 1 0 13 0 0 0 100 4 0 0 0 24 11 12 1 1 1 0 895 0 0 0 100 5 0 0 0 14 3 44 0 0 2 0 1142 0 0 0 100 6 0 0 0 110 52 104 0 0 1 0 0 0 0 0 100 7 0 0 0 31 9 27 0 0 1 0 9 0 0 0 100 March 10, 2026 at 10:47:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 280 0 14 255 0 4 0 1 0 99 1 0 0 10 210 103 196 0 18 276 0 265 0 0 0 100 2 0 0 14 5 1 183 0 14 232 0 266 0 0 0 100 3 0 0 3 312 194 354 0 23 185 0 7 0 0 0 100 4 0 0 0 18 6 194 0 18 257 0 896 0 0 0 100 5 0 0 0 20 3 256 2 20 255 0 1129 0 1 0 99 6 0 0 0 108 51 285 0 15 226 0 0 0 0 0 100 7 0 0 0 13 4 212 0 20 210 0 324 0 0 0 100 March 10, 2026 at 10:47:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 10 212 103 6 0 1 0 0 260 0 0 0 100 2 0 0 14 5 1 22 0 2 0 0 266 0 0 0 100 3 0 0 3 216 106 8 1 0 0 0 5 0 0 0 100 4 0 0 0 15 5 10 0 0 0 0 894 0 0 0 100 5 0 0 0 20 3 46 1 1 0 0 1130 0 0 0 100 6 0 0 0 107 51 106 0 1 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:47:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 79 0 0 2119 101 667 7 34 5 0 2086 1 1 0 99 1 45 0 10 229 105 363 5 31 2 0 1928 1 0 0 99 2 159 0 14 22 2 220 5 26 4 0 1806 1 0 0 98 3 0 0 73 230 106 346 4 27 1 0 1563 1 0 0 99 4 37 0 0 35 7 251 7 20 5 0 2662 2 0 0 98 5 479 0 0 38 6 443 5 24 10 1 2964 2 1 0 98 6 232 0 0 122 50 282 5 22 13 1 1654 1 0 0 98 7 4 0 0 27 2 265 5 21 13 0 1587 1 0 0 99 March 10, 2026 at 10:47:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 106 0 1 0 0 1 0 0 0 100 1 0 0 10 228 112 24 0 0 0 0 275 0 0 0 100 2 0 0 14 5 1 4 0 0 0 0 269 0 0 0 100 3 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 4 0 0 0 16 5 10 1 0 0 0 895 0 0 0 100 5 0 0 0 10 2 34 1 0 1 0 1125 0 0 0 100 6 0 0 0 109 51 106 0 1 0 0 0 0 0 0 100 7 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:47:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 100 139 0 7 14 2 94 0 0 0 100 1 0 0 10 225 108 26 0 3 6 0 287 0 0 0 100 2 0 0 14 20 6 38 0 4 10 0 299 0 0 0 100 3 1 0 3 219 104 27 1 1 5 0 36 0 0 0 100 4 0 0 10 29 13 41 0 3 5 1 962 0 1 0 99 5 0 0 0 14 2 36 0 0 2 0 1041 0 0 0 100 6 0 0 14 34 12 40 0 5 12 0 22 0 0 0 100 7 0 0 7 101 40 119 0 6 12 0 23 0 0 0 100 March 10, 2026 at 10:47:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2123 115 250 0 22 135 0 0 0 0 0 100 1 0 0 10 247 112 187 0 16 135 0 260 0 0 0 100 2 0 0 14 20 7 163 0 16 137 0 275 0 0 0 100 3 0 0 3 288 180 262 0 20 119 0 0 0 0 0 100 4 0 0 0 18 5 142 0 18 157 0 895 0 0 0 100 5 0 0 0 13 2 188 1 13 136 0 1040 0 0 0 100 6 0 0 0 14 2 120 0 10 163 0 1 0 0 0 100 7 0 0 0 79 28 197 0 12 138 0 0 0 0 0 100 March 10, 2026 at 10:47:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2151 127 106 0 5 0 0 2 0 0 0 100 1 0 0 10 312 120 90 0 4 0 0 260 0 0 0 100 2 0 0 14 49 15 32 0 1 0 0 275 0 0 0 100 3 0 0 3 225 103 2 0 0 0 0 1 0 0 0 100 4 0 0 0 33 6 12 0 0 0 0 896 0 0 0 100 5 0 0 0 27 3 36 0 0 0 0 1038 0 0 0 100 6 0 0 0 27 1 8 0 0 0 0 0 0 0 0 100 7 0 0 112 19 3 18 0 1 1 0 2 0 0 0 100 March 10, 2026 at 10:47:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 104 0 0 0 0 0 0 0 0 100 1 0 0 10 211 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 124 60 122 0 0 0 0 278 0 0 0 100 3 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 4 0 0 0 17 5 10 1 0 0 0 893 0 0 0 100 5 0 0 0 13 2 36 1 1 0 0 1036 0 0 0 100 6 0 0 7 11 1 26 0 1 0 0 0 0 0 0 100 7 0 0 0 18 2 14 0 0 0 0 4 0 0 0 100 March 10, 2026 at 10:47:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 2 2161 100 1077 28 108 18 0 6067 5 1 0 94 1 2 0 10 266 105 1241 19 88 26 0 6089 4 1 0 95 2 1 0 14 94 20 1114 24 81 9 0 6227 5 1 0 94 3 1 0 241 230 106 1043 10 62 17 0 5455 3 1 0 96 4 12 0 0 66 8 957 11 55 14 0 7867 4 1 0 95 5 1 0 0 119 34 1147 6 52 12 0 5227 4 1 0 96 6 20 0 0 54 2 806 9 38 7 0 7395 3 1 0 96 7 2 0 0 81 10 815 9 47 32 0 5652 3 1 0 96 March 10, 2026 at 10:47:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 104 124 1 1 1 0 32 0 0 0 100 1 0 0 10 210 103 6 0 0 1 0 261 0 0 0 100 2 0 0 14 7 2 6 0 0 1 0 273 0 0 0 100 3 0 0 3 207 102 6 0 0 1 0 6 0 0 0 100 4 0 0 0 26 13 12 0 1 1 0 893 0 0 0 100 5 0 0 0 111 52 108 0 1 0 0 0 0 0 0 100 6 0 0 0 13 3 42 0 0 1 0 1056 0 0 0 100 7 0 0 0 34 10 29 0 0 2 0 14 0 0 0 100 March 10, 2026 at 10:47:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 102 314 0 16 252 0 5 0 1 0 99 1 0 0 10 211 103 173 0 13 263 0 260 0 0 0 100 2 0 0 14 5 1 180 0 15 253 0 266 0 0 0 100 3 0 0 3 296 189 179 0 21 230 0 0 0 0 0 100 4 0 0 0 19 7 192 0 13 252 0 920 0 0 0 100 5 0 0 0 115 51 428 0 27 198 0 0 0 0 0 100 6 0 0 0 15 2 219 1 23 247 0 1046 0 0 0 100 7 0 0 0 20 5 175 0 21 230 0 5 0 0 0 100 March 10, 2026 at 10:47:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 0 1 0 1 0 0 0 100 1 0 0 10 210 103 22 0 1 1 0 260 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 4 0 0 0 16 5 10 1 0 0 0 894 0 0 0 100 5 0 0 0 109 52 104 0 0 0 0 1 0 0 0 100 6 0 0 0 12 2 40 1 0 1 0 1046 0 0 0 100 7 0 0 0 23 5 18 0 0 0 0 5 0 0 0 100 March 10, 2026 at 10:47:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 119 114 0 6 0 0 10 0 0 0 100 1 0 0 10 254 117 50 0 4 0 0 260 0 0 0 100 2 0 0 14 5 1 4 0 0 0 0 269 0 0 0 100 3 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 4 0 0 0 27 11 26 0 0 0 0 904 0 0 0 100 5 0 0 0 59 20 52 0 2 0 0 0 0 0 0 100 6 0 0 0 12 2 38 1 0 0 0 1037 0 0 0 100 7 0 0 0 21 4 16 0 0 0 0 323 0 0 0 100 March 10, 2026 at 10:47:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 106 0 4 1 0 1 0 0 0 100 1 0 0 10 258 125 68 0 2 0 0 261 0 0 0 100 2 0 0 14 61 29 62 0 2 0 0 266 0 0 0 100 3 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 4 0 0 0 27 11 22 0 0 0 0 903 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 42 0 0 0 0 1048 0 0 0 100 7 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:47:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 2123 102 153 0 7 1 3 119 0 0 0 100 1 1797 0 10 231 103 19 2 5 3 0 546 0 1 0 99 2 626 0 14 122 51 148 1 4 10 5 1162 1 0 0 98 3 784 0 115 215 105 76 0 4 8 16 189 0 0 0 100 4 139 0 0 49 17 110 0 11 11 21 1085 0 0 0 100 5 33 0 1 23 1 49 0 11 6 8 162 0 0 0 100 6 30 0 0 28 2 90 1 7 11 8 1297 0 0 0 100 7 9 0 0 39 5 45 0 4 5 4 60 0 0 0 100 March 10, 2026 at 10:47:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 112 0 1 0 0 1 0 0 0 100 1 0 0 10 210 103 6 0 0 1 0 260 0 0 0 100 2 0 0 14 105 51 108 0 0 5 0 266 0 0 0 100 3 0 0 3 209 102 2 0 1 0 0 0 0 0 0 100 4 0 0 0 18 5 14 1 0 2 0 895 0 0 0 100 5 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 6 0 0 0 14 3 46 1 0 3 0 1132 0 0 0 100 7 0 0 0 19 7 18 0 0 1 0 11 0 0 0 100 March 10, 2026 at 10:47:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 1 0 0 6 0 0 0 100 1 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 107 51 104 0 1 0 0 266 0 0 0 100 3 0 0 3 209 103 20 0 1 0 0 1 0 0 0 100 4 0 0 0 17 6 12 0 0 0 0 896 0 0 0 100 5 0 0 0 19 7 18 0 1 0 0 8 0 0 0 100 6 0 0 0 15 2 44 2 1 1 0 1129 0 0 0 100 7 0 0 0 15 5 10 0 0 0 0 340 0 0 0 100 March 10, 2026 at 10:47:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 1 0 0 0 0 0 0 100 1 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 107 52 106 0 0 0 0 271 0 0 0 100 3 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 4 0 0 0 15 5 30 0 2 0 0 894 0 0 0 100 5 0 0 0 18 6 12 1 0 0 0 8 0 0 0 100 6 0 0 0 16 2 40 1 0 2 0 1118 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:47:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 116 0 1 0 0 5 0 0 0 100 1 0 0 10 214 104 10 0 2 0 0 261 0 0 0 100 2 0 0 14 105 51 104 0 0 0 0 269 0 0 0 100 3 1 0 3 209 103 2 0 0 0 0 5 0 0 0 100 4 0 0 0 17 6 12 0 0 0 0 895 0 0 0 100 5 0 0 0 21 7 16 0 0 0 0 9 0 0 0 100 6 0 0 0 9 2 40 0 0 0 0 1133 0 0 0 100 7 22 0 0 13 2 8 0 0 0 0 5 0 0 0 100 March 10, 2026 at 10:47:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 118 0 0 1 0 8 0 0 0 100 1 0 0 14 216 103 8 0 0 1 0 260 0 0 0 100 2 0 0 14 108 52 106 0 0 1 0 274 0 0 0 100 3 0 0 7 208 102 8 0 0 0 0 11 0 0 0 100 4 0 0 0 27 12 12 1 1 2 0 895 0 0 0 100 5 0 0 0 24 8 39 0 3 1 0 9 0 0 0 100 6 0 0 0 13 3 40 1 0 2 0 1134 0 0 0 100 7 0 0 0 14 3 11 0 1 1 0 1 0 0 0 100 March 10, 2026 at 10:47:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 7 0 0 0 100 1 0 0 10 210 103 6 0 0 2 0 260 0 0 0 100 2 0 0 14 105 51 108 0 0 4 0 266 0 0 0 100 3 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 4 0 0 0 17 6 14 0 0 2 0 895 0 0 0 100 5 0 0 0 21 4 16 0 0 2 0 324 0 0 0 100 6 0 0 0 12 2 62 1 3 2 0 1124 0 0 0 100 7 0 0 0 18 6 20 1 0 1 0 8 0 0 0 100 March 10, 2026 at 10:47:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 0 0 100 1 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 3 0 0 3 209 103 2 0 0 0 0 1 0 0 0 100 4 0 0 0 15 5 10 0 0 0 0 894 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 18 2 46 1 1 1 0 1124 0 0 0 100 7 0 0 0 15 5 12 0 1 0 0 5 0 0 0 100 March 10, 2026 at 10:47:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 94 0 3 0 0 0 0 0 0 100 1 0 0 10 210 103 6 0 1 0 0 260 0 0 0 100 2 0 0 14 105 51 104 0 0 0 0 269 0 0 0 100 3 0 0 3 209 103 2 0 0 0 0 1 0 0 0 100 4 0 0 0 17 6 12 0 0 0 0 897 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 19 2 46 0 0 0 0 1115 0 0 0 100 7 0 0 0 25 5 38 0 2 0 0 7 0 0 0 100 March 10, 2026 at 10:47:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 130 0 2 0 0 2 0 0 0 100 1 0 0 10 214 104 8 0 0 0 0 261 0 0 0 100 2 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 3 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 4 0 0 0 16 5 10 1 0 0 0 893 0 0 0 100 5 0 0 0 7 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 16 2 44 1 0 0 0 1127 0 0 0 100 7 0 0 0 25 9 20 0 0 0 0 11 0 0 0 100 March 10, 2026 at 10:47:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 115 0 0 2121 102 371 4 29 5 0 1128 1 1 0 98 1 335 0 10 250 114 171 3 22 14 0 2096 2 0 0 98 2 263 0 14 87 31 273 6 21 10 0 2094 2 0 0 98 3 124 0 87 248 114 181 13 25 2 2 1197 1 0 0 99 4 60 0 0 54 18 209 8 26 0 0 2452 1 0 0 99 5 0 0 0 22 1 360 7 27 14 0 1868 1 0 0 99 6 88 0 0 26 2 397 10 27 1 0 2887 1 1 0 98 7 127 0 0 38 6 360 5 20 4 0 1656 1 0 0 99 March 10, 2026 at 10:47:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2140 132 222 0 21 158 0 0 0 0 0 100 1 0 0 10 315 121 272 0 25 142 0 260 0 0 0 100 2 0 0 14 25 8 184 0 14 157 0 276 0 0 0 100 3 0 0 3 283 176 144 0 13 137 0 0 0 0 0 100 4 0 0 0 15 5 140 0 11 151 0 895 0 0 0 100 5 0 0 0 9 1 255 0 17 124 0 0 0 0 0 100 6 0 0 0 11 3 173 0 14 158 0 1127 0 1 0 99 7 0 0 0 10 2 144 0 11 143 0 0 0 0 0 100 March 10, 2026 at 10:47:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 118 106 0 3 0 0 1 0 0 0 100 1 0 0 10 319 136 110 0 4 1 0 260 0 0 0 100 2 0 0 14 17 7 30 0 1 0 0 275 0 0 0 100 3 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 4 0 0 0 17 6 12 0 0 0 0 896 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 10 2 38 1 1 1 0 1127 0 0 0 100 7 0 0 0 9 1 6 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:47:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 131 106 0 5 0 0 3 0 0 0 100 1 0 0 10 296 116 90 0 4 0 0 260 0 0 0 100 2 0 0 14 37 17 40 0 1 0 0 279 0 0 0 100 3 0 0 3 208 102 2 1 1 0 0 3 0 0 0 100 4 0 0 0 16 5 10 1 0 0 0 893 0 0 0 100 5 0 0 0 9 2 8 0 0 0 0 9 0 0 0 100 6 0 0 0 10 2 40 1 0 0 0 1144 0 0 0 100 7 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:47:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 125 1 0 7 0 35 0 0 0 99 1 0 0 10 217 104 24 0 4 7 2 340 0 0 0 100 2 0 0 14 120 55 132 0 1 8 0 304 0 0 0 100 3 0 0 11 214 102 34 0 4 12 0 14 0 1 0 99 4 0 0 14 22 7 30 0 2 6 0 908 0 0 0 100 5 0 0 0 31 9 39 1 8 10 0 23 0 0 0 100 6 0 0 7 13 2 44 0 2 6 1 1140 0 0 0 100 7 0 0 0 22 1 20 0 1 6 0 67 0 0 0 100 March 10, 2026 at 10:47:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 114 0 0 2 0 6 0 0 0 100 1 0 0 10 211 103 4 0 0 1 0 260 0 0 0 100 2 0 0 14 110 52 110 0 2 0 0 273 0 0 0 100 3 0 0 3 214 104 30 0 0 1 0 14 0 0 0 100 4 0 0 0 25 11 12 0 0 1 0 893 0 0 0 100 5 0 0 0 28 11 24 0 0 1 0 17 0 0 0 100 6 0 0 0 15 3 40 1 1 1 0 1042 0 0 0 100 7 0 0 7 18 3 21 0 2 1 0 1 0 0 0 100 March 10, 2026 at 10:47:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 102 114 0 2 0 0 6 0 0 0 100 1 0 0 10 226 103 6 0 0 2 0 260 0 0 0 100 2 0 0 14 129 51 114 0 0 1 0 266 0 0 0 100 3 0 0 3 225 103 2 0 0 0 0 1 0 0 0 100 4 0 0 0 35 6 16 0 0 1 0 896 0 0 0 100 5 0 0 0 35 7 14 0 0 0 0 9 0 0 0 100 6 0 0 0 28 3 40 1 0 0 0 1035 0 0 0 100 7 0 0 112 9 1 10 0 2 2 0 0 0 0 0 100 March 10, 2026 at 10:47:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 110 0 1 0 0 1 0 0 0 100 1 0 0 10 211 103 4 0 0 0 0 260 0 0 0 100 2 0 0 14 106 51 104 0 1 0 0 266 0 0 0 100 3 0 0 3 212 103 4 0 1 0 0 1 0 0 0 100 4 0 0 7 18 5 30 1 1 0 0 894 0 0 0 100 5 0 0 0 20 7 14 0 0 0 0 9 0 0 0 100 6 0 0 0 10 2 36 0 0 0 0 1036 0 0 0 100 7 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:47:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 0 2181 104 1091 33 115 13 0 5501 5 1 0 94 1 2 0 3 275 106 1037 29 108 19 1 6321 5 1 0 94 2 24 0 14 152 47 1278 23 92 14 0 5701 4 1 0 95 3 26 0 248 223 105 1074 15 86 16 0 6124 4 1 0 95 4 28 0 0 70 9 953 14 61 10 0 7133 4 1 0 95 5 34 0 0 68 7 842 12 57 20 1 6797 4 1 0 95 6 0 0 0 77 3 924 15 55 8 0 6824 3 1 0 96 7 5 0 0 61 2 943 12 44 13 0 5714 3 1 0 96 March 10, 2026 at 10:47:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 109 96 1 3 0 0 12 0 0 0 100 1 0 0 3 239 103 30 0 2 0 0 1 0 0 0 100 2 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 3 0 0 10 212 105 4 0 0 0 0 260 0 0 0 100 4 0 0 0 15 5 10 0 0 0 0 894 0 0 0 100 5 0 0 0 7 1 4 0 0 0 0 3 0 0 0 100 6 0 0 0 10 2 36 1 0 1 0 1045 0 0 0 100 7 0 0 0 17 2 12 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:47:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 0 2138 110 178 0 11 1 4 159 0 0 0 99 1 2583 0 116 213 101 53 2 7 8 9 449 0 1 0 99 2 142 0 14 122 51 212 0 11 12 27 457 0 0 0 100 3 45 0 12 232 107 60 0 9 9 7 410 0 0 0 100 4 8 0 0 40 11 54 0 9 5 5 991 0 0 0 100 5 10 0 0 25 1 35 0 5 3 8 62 0 0 0 100 6 8 0 0 24 1 78 1 5 2 2 1110 0 0 0 100 7 617 0 0 36 2 39 1 3 5 4 876 1 0 0 99 March 10, 2026 at 10:47:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 105 439 0 28 216 0 6 0 0 0 99 1 0 0 3 210 101 195 0 25 221 0 0 0 0 0 100 2 0 0 14 106 51 286 0 21 243 0 266 0 0 0 100 3 0 0 10 292 186 191 0 26 203 0 259 0 0 0 100 4 0 0 0 16 5 187 1 14 227 0 893 0 0 0 100 5 0 0 0 9 1 169 0 18 227 0 0 0 0 0 100 6 0 0 0 15 3 207 1 19 246 0 1133 0 1 0 99 7 0 0 0 17 2 206 0 18 270 0 0 0 0 0 100 March 10, 2026 at 10:47:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 126 0 2 0 0 328 0 0 0 100 1 0 0 3 209 101 0 0 0 0 0 0 0 0 0 100 2 0 0 14 105 51 108 0 0 0 0 274 0 0 0 100 3 0 0 10 212 105 6 0 0 0 0 261 0 0 0 100 4 0 0 0 19 7 18 0 0 0 0 900 0 0 0 100 5 0 0 0 9 2 6 0 1 0 0 1 0 0 0 100 6 0 0 0 7 1 34 0 0 1 0 1119 0 0 0 100 7 0 0 0 17 3 10 0 0 0 0 21 0 0 0 100 March 10, 2026 at 10:47:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 116 0 0 1 0 0 0 0 0 100 1 0 0 3 207 101 20 0 1 0 0 0 0 0 0 100 2 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 3 0 0 10 210 104 4 0 0 0 0 260 0 0 0 100 4 0 0 0 27 11 22 0 0 0 0 902 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 38 1 0 1 0 1138 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:47:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 113 0 0 2138 109 325 10 28 13 0 1271 2 1 0 98 1 297 0 3 245 106 171 1 22 5 4 1695 2 0 0 98 2 134 0 14 78 27 408 4 35 10 0 1658 2 0 0 98 3 0 0 94 257 124 350 2 34 4 0 2090 0 0 0 99 4 93 0 0 37 9 253 3 22 1 1 2514 1 0 0 99 5 9 0 0 30 2 386 6 29 5 2 1820 1 0 0 99 6 1 0 0 26 2 509 4 27 3 0 2868 1 0 0 99 7 304 0 0 27 2 235 4 25 4 1 1731 2 0 0 98 March 10, 2026 at 10:47:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 139 126 0 5 1 0 23 0 0 0 100 1 0 0 3 307 115 104 0 4 0 0 0 0 0 0 100 2 0 0 14 7 2 6 0 0 1 0 272 0 0 0 100 3 0 0 10 210 104 12 0 0 1 0 276 0 0 0 100 4 0 0 0 27 11 10 1 0 1 0 895 0 0 0 100 5 0 0 0 9 2 4 0 0 1 0 1 0 0 0 100 6 0 0 0 10 2 34 1 0 3 0 1124 0 0 0 100 7 0 0 0 33 13 29 0 1 2 0 19 0 0 0 100 March 10, 2026 at 10:47:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 108 425 1 28 152 0 30 0 1 0 99 1 0 0 17 317 147 247 0 18 146 0 22 0 0 0 100 2 0 0 14 13 1 165 0 12 193 1 366 0 0 0 100 3 0 0 10 299 186 192 0 22 153 0 276 0 0 0 100 4 0 0 0 22 6 202 0 18 133 0 903 0 0 0 100 5 0 0 0 12 1 148 0 15 168 1 67 0 0 0 100 6 0 0 7 14 1 196 0 15 174 0 1148 0 0 0 99 7 0 0 9 31 8 198 1 17 185 0 18 0 1 0 99 March 10, 2026 at 10:47:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2136 126 124 0 7 0 0 5 0 0 0 100 1 0 0 3 312 130 102 0 8 0 0 0 0 0 0 100 2 0 0 14 6 1 4 0 1 0 0 266 0 0 0 100 3 0 0 10 213 104 6 0 0 1 0 260 0 0 0 100 4 0 0 0 16 5 28 0 1 1 0 895 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 36 2 1 1 0 1040 0 0 0 100 7 0 0 7 11 3 8 0 1 0 0 1 0 0 0 100 March 10, 2026 at 10:47:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2143 134 124 0 8 0 0 5 0 0 0 100 1 0 0 3 329 123 104 0 6 0 0 2 0 0 0 100 2 0 0 14 21 1 2 0 0 0 0 266 0 0 0 100 3 0 0 10 226 104 4 0 0 0 0 260 0 0 0 100 4 0 0 0 35 7 16 0 1 0 0 895 0 0 0 100 5 0 0 0 23 1 4 0 1 0 0 0 0 0 0 100 6 0 0 0 23 1 34 0 0 0 0 1036 0 0 0 100 7 0 0 0 27 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:47:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2128 112 140 1 3 0 0 17 0 0 0 100 1 0 0 3 212 102 2 0 0 0 0 1 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 10 213 105 8 0 0 0 0 264 0 0 0 100 4 0 0 0 119 55 112 1 0 1 0 895 0 0 0 100 5 0 0 0 8 1 22 0 1 0 0 3 0 0 0 100 6 0 0 0 9 1 34 1 0 0 0 1035 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2171 105 1100 25 92 13 0 6335 4 1 0 94 1 0 0 3 270 104 1044 28 106 15 0 6876 5 1 0 94 2 5 0 14 79 7 990 15 75 13 0 6981 4 1 0 95 3 14 0 248 234 106 1065 18 69 14 0 5957 4 1 0 95 4 1 0 0 140 49 1075 12 63 7 0 7611 4 1 0 96 5 39 0 0 83 10 1073 8 51 14 0 4607 3 1 0 96 6 2 0 0 50 1 863 11 46 20 0 6825 4 1 0 95 7 12 0 0 65 2 1010 9 39 19 0 5821 3 1 0 96 March 10, 2026 at 10:48:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 233 0 22 220 0 0 0 1 0 99 1 0 0 3 210 102 160 0 20 232 0 0 0 0 0 100 2 0 0 14 112 54 287 0 19 271 0 269 0 0 0 100 3 0 0 10 300 193 357 0 18 205 0 261 0 0 0 100 4 0 0 0 17 5 223 0 22 248 0 894 0 0 0 100 5 0 0 0 109 1 297 0 21 243 0 0 0 0 0 100 6 0 0 0 12 3 204 1 22 224 0 1057 0 1 0 99 7 0 0 0 23 9 164 0 17 184 0 10 0 0 0 100 March 10, 2026 at 10:48:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 14 0 0 0 0 1 0 0 0 100 1 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 14 109 53 108 0 1 0 0 310 0 0 0 100 3 0 0 10 217 107 10 0 0 0 0 263 0 0 0 100 4 0 0 0 17 7 10 0 0 0 0 895 0 0 0 100 5 0 0 0 111 3 106 0 0 0 0 1 0 0 0 100 6 0 0 0 9 1 38 0 0 0 0 1046 0 0 0 100 7 0 0 0 17 6 30 0 1 0 0 5 0 0 0 100 March 10, 2026 at 10:48:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 12 0 0 0 0 0 0 0 0 100 1 0 0 3 207 101 2 0 1 0 0 0 0 0 0 100 2 0 0 14 105 30 104 0 2 0 0 266 0 0 0 100 3 0 0 10 212 105 6 0 0 0 0 260 0 0 0 100 4 0 0 0 14 4 8 1 0 0 0 894 0 0 0 100 5 0 0 0 71 4 64 0 1 0 0 0 0 0 0 100 6 0 0 0 46 20 76 1 1 0 0 1046 0 0 0 100 7 0 0 0 19 6 30 0 0 0 0 5 0 0 0 100 March 10, 2026 at 10:48:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 627 0 0 2126 101 64 1 8 10 6 922 1 1 0 98 1 5 0 3 226 102 23 0 4 3 3 59 0 0 0 100 2 7 0 14 128 27 129 0 4 2 5 332 0 0 0 100 3 2604 0 131 214 104 64 2 5 5 15 704 1 1 0 99 4 113 0 0 33 5 97 0 9 16 22 1059 0 0 0 100 5 27 0 3 28 2 59 0 7 10 12 121 0 0 0 100 6 52 0 0 120 28 188 1 10 6 9 1200 0 0 0 99 7 7 0 0 44 10 56 0 5 4 5 393 0 0 0 100 March 10, 2026 at 10:48:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 136 0 1 1 0 1 0 0 0 100 1 0 0 3 223 109 16 0 0 1 0 11 0 0 0 100 2 0 0 14 107 52 106 0 0 0 0 274 0 0 0 100 3 0 0 10 214 106 12 0 0 1 0 268 0 0 0 100 4 0 0 0 22 10 10 0 1 1 0 894 0 0 0 100 5 0 0 0 12 3 14 1 0 1 0 15 0 0 0 100 6 0 0 0 10 2 38 1 0 1 0 1142 0 0 0 100 7 0 0 0 17 4 13 0 1 2 0 1 0 0 0 100 March 10, 2026 at 10:48:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 0 2124 102 649 9 53 149 1 1882 1 1 0 99 1 58 0 3 233 108 629 2 48 155 0 1804 1 0 0 98 2 6 0 0 75 30 361 5 32 159 0 1900 1 0 0 99 3 108 0 66 318 187 674 5 46 110 1 1916 1 0 0 98 4 348 0 14 25 5 461 5 35 150 4 3090 1 1 0 98 5 141 0 0 21 2 331 7 38 143 3 1158 2 0 0 98 6 260 0 0 21 1 458 5 38 123 0 3168 2 1 0 98 7 84 0 0 17 2 460 3 41 141 0 1730 0 0 0 99 March 10, 2026 at 10:48:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 108 128 1 5 2 0 13 0 0 0 100 1 0 0 3 267 126 58 0 5 8 0 14 0 0 0 100 2 0 0 0 49 21 47 0 3 6 0 15 0 0 0 100 3 14 0 24 210 104 8 0 1 1 0 274 0 0 0 100 4 0 0 14 16 5 14 1 1 1 0 1164 0 0 0 100 5 0 0 0 15 4 13 0 2 0 0 10 0 0 0 100 6 0 0 0 15 4 46 0 0 0 0 1136 0 0 0 100 7 0 0 0 13 2 10 0 1 0 0 9 0 0 0 100 March 10, 2026 at 10:48:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 108 161 0 4 15 0 43 0 0 0 99 1 0 0 3 215 101 32 0 6 9 0 79 0 0 0 100 2 0 0 0 114 51 108 2 1 3 0 18 0 0 0 100 3 0 0 19 215 104 12 0 1 5 0 267 0 1 0 99 4 1 0 14 20 6 31 0 3 14 0 1176 0 0 0 100 5 0 0 14 12 2 22 0 3 9 0 23 0 0 0 100 6 0 0 0 13 1 45 1 0 4 1 1207 0 0 0 100 7 0 0 0 14 2 19 0 2 5 0 8 0 0 0 100 March 10, 2026 at 10:48:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2133 113 144 0 0 0 0 19 0 0 0 100 1 0 0 10 211 102 6 0 2 0 0 1 0 0 0 100 2 0 0 0 106 50 118 0 1 0 0 0 0 0 0 100 3 0 0 10 211 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 14 5 12 0 0 0 0 1161 0 0 0 100 5 0 0 0 12 2 8 0 1 0 0 3 0 0 0 100 6 0 0 0 9 1 34 1 0 0 0 1039 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 3 0 0 0 100 March 10, 2026 at 10:48:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2118 108 144 0 2 1 0 24 0 0 0 99 1 0 0 3 227 102 4 0 1 1 0 0 0 0 0 100 2 0 0 0 131 55 116 0 1 0 0 14 0 0 0 100 3 0 0 10 228 105 12 0 0 1 0 265 0 0 0 100 4 0 0 14 39 13 16 0 2 0 0 1162 0 0 0 100 5 0 0 0 31 4 18 0 1 1 0 12 0 0 0 100 6 0 0 0 26 2 36 1 0 0 0 1037 0 0 0 100 7 0 0 0 31 4 15 0 0 0 0 5 0 0 0 100 March 10, 2026 at 10:48:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 106 231 1 6 63 0 9 0 0 0 100 1 0 0 3 209 101 88 0 5 65 0 0 0 0 0 100 2 0 0 0 111 51 198 0 6 55 0 0 0 0 0 100 3 0 0 10 262 155 193 0 11 51 0 260 0 0 0 100 4 0 0 14 17 6 100 1 7 82 0 1183 0 0 0 100 5 0 0 7 11 2 89 0 7 74 0 0 0 0 0 100 6 0 0 0 11 2 129 1 6 56 0 1037 0 0 0 100 7 0 0 0 12 2 91 0 3 65 0 0 0 0 0 100 March 10, 2026 at 10:48:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2186 110 1407 25 109 16 0 7459 6 2 0 93 1 0 0 3 276 102 1257 27 95 24 0 5868 5 1 0 94 2 0 0 0 132 40 1088 13 69 12 1 7975 4 1 0 95 3 33 0 262 240 111 1125 15 69 13 0 6624 4 1 0 95 4 0 0 14 75 8 866 13 60 12 0 6794 4 1 0 96 5 0 0 0 56 3 873 12 44 12 0 6538 3 1 0 96 6 0 0 0 60 4 1090 10 31 22 0 6475 3 1 0 96 7 15 0 0 56 3 1012 3 39 18 0 6057 4 1 0 96 March 10, 2026 at 10:48:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 104 0 2 0 0 0 0 0 0 100 1 0 0 3 209 102 0 0 0 0 0 0 0 0 0 100 2 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 3 0 0 10 254 125 48 0 3 0 0 260 0 0 0 100 4 0 0 14 69 33 68 0 1 0 0 1160 0 0 0 100 5 0 0 0 26 10 24 1 0 0 0 18 0 0 0 100 6 0 0 0 10 2 42 1 0 1 0 1073 0 0 0 100 7 0 0 0 17 2 12 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 90 0 2 0 0 0 0 0 0 100 1 0 0 3 225 103 20 0 2 0 0 5 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 10 210 104 6 0 0 0 0 263 0 0 0 100 4 0 0 14 121 58 118 0 0 1 0 1164 0 0 0 100 5 0 0 0 27 10 40 0 1 1 0 12 0 0 0 100 6 0 0 0 7 1 34 0 0 1 0 1037 0 0 0 100 7 0 0 0 19 2 16 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:48:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 112 0 0 3 0 1 0 0 0 100 1 0 0 7 208 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 8 1 4 0 0 1 0 7 0 0 0 100 3 0 0 14 211 104 8 0 0 1 0 266 0 0 0 100 4 0 0 14 128 65 110 1 0 1 0 1161 0 0 0 100 5 0 0 0 32 12 52 0 0 1 0 26 0 0 0 100 6 0 0 0 11 2 40 1 0 1 0 1056 0 0 0 100 7 0 0 0 24 4 21 0 0 1 0 1 0 0 0 100 March 10, 2026 at 10:48:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 100 298 0 20 215 0 5 0 1 0 99 1 0 0 3 211 102 167 0 18 214 0 0 0 0 0 100 2 0 0 0 5 0 166 0 14 262 0 2 0 0 0 100 3 0 0 10 303 191 321 0 16 178 0 260 0 0 0 100 4 0 0 14 121 59 260 0 14 221 0 1168 0 0 0 100 5 0 0 0 21 7 186 1 20 235 0 325 0 0 0 100 6 0 0 0 9 1 205 1 19 228 0 1035 0 0 0 99 7 0 0 0 17 2 170 0 11 218 0 0 0 0 0 100 March 10, 2026 at 10:48:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 106 0 0 0 0 0 0 0 0 100 1 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 9 0 0 0 100 3 0 0 10 210 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 113 55 110 0 0 0 0 1160 0 0 0 100 5 0 0 0 13 3 8 0 0 1 0 1 0 0 0 100 6 0 0 0 7 1 58 0 1 0 0 1057 0 0 0 100 7 0 0 0 17 2 14 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:48:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 1 0 0 11 0 0 0 100 1 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 10 0 0 0 100 3 0 0 10 210 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 119 58 116 0 0 0 0 1164 0 0 0 100 5 0 0 0 9 2 6 0 0 0 0 2 0 0 0 100 6 0 0 0 10 1 40 1 0 1 0 1049 0 0 0 100 7 0 0 0 17 2 34 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:48:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 0 0 0 12 0 0 0 100 1 0 0 3 209 102 4 0 0 0 0 4 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 10 210 104 6 0 0 0 0 263 0 0 0 100 4 0 0 14 118 57 114 1 0 0 0 1163 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 6 0 0 0 27 10 56 2 0 0 0 1051 0 0 0 99 7 0 0 0 17 2 12 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 625 0 0 2122 100 182 1 8 7 11 933 1 1 0 98 1 12 0 3 223 101 34 0 6 5 4 58 0 0 0 100 2 793 0 113 5 0 47 0 6 4 8 173 0 0 0 99 3 138 0 10 227 104 97 0 10 8 20 412 0 0 0 100 4 15 0 14 143 64 160 0 7 2 8 1320 0 0 0 100 5 1823 0 2 33 5 53 2 7 7 6 359 0 1 0 99 6 17 0 0 39 8 75 1 5 5 6 1436 0 0 0 99 7 14 0 0 37 2 49 0 7 5 7 91 0 0 0 100 March 10, 2026 at 10:48:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 114 0 0 3 0 20 0 0 0 100 1 0 0 3 207 101 16 0 1 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 10 212 105 10 0 1 0 0 260 0 0 0 100 4 0 0 14 113 55 116 0 1 2 0 1160 0 0 0 100 5 0 0 0 19 7 16 0 0 1 0 7 0 0 0 100 6 0 0 0 9 2 36 0 0 0 0 1122 0 0 0 100 7 0 0 0 17 2 14 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:48:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 0 0 0 10 0 0 0 100 1 22 0 3 209 102 2 0 0 0 0 5 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 10 212 105 6 0 0 0 0 261 0 0 0 100 4 0 0 14 115 56 112 0 0 0 0 1162 0 0 0 100 5 0 0 0 21 8 16 0 0 0 0 11 0 0 0 100 6 0 0 0 8 1 34 1 0 0 0 1119 0 0 0 100 7 0 0 0 17 2 14 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 108 0 1 0 0 10 0 0 0 100 1 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 16 0 1 0 0 0 0 0 0 100 3 0 0 10 210 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 114 55 110 1 0 0 0 1160 0 0 0 100 5 0 0 0 19 7 14 0 0 0 0 6 0 0 0 100 6 0 0 0 8 1 34 1 0 0 0 1114 0 0 0 100 7 0 0 0 17 2 12 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 7 0 0 0 100 1 0 0 3 211 103 6 0 0 0 0 6 0 0 0 100 2 0 0 0 7 0 4 0 1 1 0 0 0 0 0 100 3 0 0 10 210 104 22 0 1 1 0 263 0 0 0 100 4 0 0 14 117 57 114 0 0 0 0 1163 0 0 0 100 5 0 0 0 31 12 28 0 1 0 0 334 0 0 0 100 6 0 0 0 7 1 38 0 0 0 0 1117 0 0 0 100 7 0 0 0 19 2 14 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 124 0 2 1 0 36 0 0 0 100 1 0 0 3 207 101 0 0 0 1 0 0 0 0 0 100 2 0 0 0 7 1 4 0 0 1 0 7 0 0 0 100 3 0 0 10 210 104 6 0 0 1 0 263 0 0 0 100 4 0 0 14 122 61 112 0 1 0 0 1160 0 0 0 100 5 0 0 0 27 11 26 0 0 1 0 24 0 0 0 100 6 0 0 0 10 2 34 1 0 2 0 1113 0 0 0 100 7 0 0 0 25 5 20 0 1 1 0 6 0 0 0 100 March 10, 2026 at 10:48:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 120 0 0 2 0 10 0 0 0 100 1 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 10 216 105 12 0 1 1 0 260 0 0 0 100 4 0 0 14 115 56 138 0 1 2 0 1162 0 0 0 100 5 0 0 0 19 7 16 0 0 0 0 6 0 0 0 100 6 0 0 0 8 1 34 1 0 0 0 1115 0 0 0 100 7 0 0 0 9 2 6 0 0 2 0 0 0 0 0 100 March 10, 2026 at 10:48:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 116 0 0 0 0 11 0 0 0 100 1 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 10 210 104 6 0 1 0 0 260 0 0 0 100 4 0 0 14 116 55 112 1 1 1 0 1160 0 0 0 100 5 0 0 0 17 6 32 0 1 0 0 5 0 0 0 100 6 0 0 0 8 1 34 1 0 1 0 1113 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 271 0 0 2115 101 234 5 18 4 3 1799 1 1 0 98 1 107 0 3 220 102 207 3 19 4 2 1683 1 0 0 98 2 62 0 0 17 1 236 7 29 10 0 1839 1 0 0 99 3 91 0 66 217 105 391 6 23 2 0 2227 1 0 0 99 4 0 0 14 129 58 485 4 27 2 0 2835 1 0 0 99 5 84 0 0 31 7 247 8 27 1 1 1575 1 0 0 99 6 177 0 0 25 2 328 9 29 2 0 2671 1 0 0 98 7 167 0 0 26 4 283 5 20 1 0 1013 1 0 0 99 March 10, 2026 at 10:48:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 122 0 2 1 0 19 0 0 0 100 1 0 0 3 213 103 10 1 1 0 0 12 0 0 0 100 2 0 0 0 7 0 4 0 1 8 0 15 0 0 0 100 3 0 0 24 212 104 8 0 0 8 0 275 0 0 0 100 4 5 0 14 115 55 114 0 2 0 0 1176 0 0 0 100 5 17 0 0 13 2 8 0 0 0 0 10 0 0 0 100 6 0 0 0 28 10 77 1 4 1 0 1159 0 0 0 100 7 0 0 0 15 4 12 0 1 0 0 7 0 0 0 100 March 10, 2026 at 10:48:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 132 0 0 0 0 10 0 0 0 100 1 0 0 3 207 101 4 0 1 0 0 2 0 0 0 100 2 0 0 0 8 1 168 0 0 0 0 339 0 0 0 100 3 0 0 10 210 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 122 62 114 0 0 0 0 1164 0 0 0 100 5 0 0 0 9 2 12 0 1 0 0 9 0 0 0 100 6 0 0 0 24 8 62 1 0 2 0 1136 0 0 0 100 7 0 0 0 11 2 11 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 238 0 13 129 0 1 0 0 0 100 1 0 0 3 214 101 124 0 13 117 0 0 0 0 0 100 2 0 0 0 6 0 135 0 11 141 0 0 0 0 0 100 3 0 0 10 287 177 239 0 11 101 0 260 0 0 0 100 4 0 0 14 114 55 237 1 10 152 0 1162 0 0 0 100 5 0 0 0 11 2 132 0 10 137 0 0 0 0 0 100 6 0 0 0 23 8 176 2 8 142 0 1138 0 0 0 99 7 0 0 0 12 3 151 0 11 136 0 6 0 0 0 100 March 10, 2026 at 10:48:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 100 149 0 4 6 0 30 0 0 0 99 1 0 0 3 212 101 17 0 4 8 1 29 0 0 0 100 2 0 0 7 13 1 23 0 3 6 2 83 0 0 0 100 3 0 0 10 216 105 19 0 3 7 0 266 0 0 0 100 4 2 0 14 120 56 139 0 4 11 0 1183 0 0 0 100 5 0 0 0 16 3 12 0 2 7 0 1 0 0 0 100 6 0 0 0 31 9 68 1 3 12 0 1169 0 0 0 100 7 0 0 9 16 3 19 0 2 6 0 88 0 1 0 99 March 10, 2026 at 10:48:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 116 0 0 0 0 0 0 0 0 100 1 0 0 3 208 101 20 0 1 0 0 0 0 0 0 100 2 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 3 0 0 17 210 104 6 0 1 0 0 260 0 0 0 100 4 0 0 14 114 55 110 0 0 0 0 1160 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 23 8 46 1 0 0 0 1048 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 100 114 0 0 0 0 0 0 0 0 100 1 0 0 115 211 103 6 0 0 0 0 2 0 0 0 100 2 0 0 0 25 2 6 0 0 0 0 8 0 0 0 100 3 0 0 10 228 104 8 0 1 0 0 263 0 0 0 100 4 0 0 14 131 56 114 0 1 0 0 1162 0 0 0 100 5 0 0 0 27 2 8 0 0 0 0 0 0 0 0 100 6 0 0 0 45 11 56 0 0 0 0 1056 0 0 0 100 7 0 0 0 27 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 102 128 0 0 1 0 8 0 0 0 100 1 0 0 7 211 101 2 0 0 2 0 0 0 0 0 100 2 0 0 0 10 1 22 1 1 1 0 8 0 0 0 100 3 0 0 14 212 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 126 64 110 1 0 2 0 1160 0 0 0 100 5 0 0 0 13 3 16 0 1 1 0 14 0 0 0 100 6 0 0 0 24 8 44 1 0 1 0 1047 0 0 0 100 7 0 0 0 17 4 15 0 1 1 0 1 0 0 0 100 March 10, 2026 at 10:48:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2147 100 956 18 99 71 0 4284 3 1 0 96 1 0 0 3 244 102 757 19 84 88 0 4061 2 1 0 97 2 0 0 0 56 4 773 17 88 71 0 3851 3 1 0 96 3 0 0 150 306 185 635 11 55 51 0 4391 2 1 0 97 4 0 0 14 147 55 872 11 57 69 0 5003 2 1 0 97 5 0 0 0 45 3 751 15 70 96 0 2931 2 1 0 97 6 0 0 0 60 9 643 16 63 77 0 3650 3 1 0 96 7 0 0 0 40 2 738 11 76 116 0 3461 2 1 0 98 March 10, 2026 at 10:48:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2135 104 490 9 43 5 0 2280 1 1 0 98 1 0 0 3 235 103 448 10 31 7 0 2293 2 0 0 98 2 7 0 0 85 20 466 10 33 6 0 1646 2 0 0 97 3 2 0 108 214 105 205 4 13 7 0 3086 1 0 0 98 4 0 0 14 31 4 304 2 23 3 0 3360 2 0 0 98 5 0 0 0 31 4 271 5 19 4 0 3235 2 0 0 98 6 0 0 0 24 2 451 3 18 3 0 2682 1 0 0 99 7 0 0 0 125 33 598 5 19 5 0 1606 1 0 0 99 March 10, 2026 at 10:48:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 120 0 0 0 0 5 0 0 0 100 1 0 0 3 209 102 4 0 0 0 0 304 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 5 0 0 0 100 3 0 0 10 212 104 8 0 1 0 0 260 0 0 0 100 4 0 0 14 11 4 10 0 1 0 0 567 0 0 0 100 5 0 0 0 11 3 20 0 1 0 0 300 0 0 0 100 6 0 0 0 8 1 32 1 0 0 0 1038 0 0 0 100 7 0 0 0 109 52 106 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 111 134 0 0 0 0 17 0 0 0 100 1 0 0 3 211 103 6 0 0 0 0 305 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 10 210 104 6 0 1 0 0 260 0 0 0 100 4 0 0 14 10 3 8 1 0 0 0 570 0 0 0 100 5 0 0 0 13 3 8 0 0 1 0 299 0 0 0 100 6 0 0 0 8 1 34 1 1 0 0 1037 0 0 0 100 7 0 0 0 109 52 122 0 1 0 0 3 0 0 0 100 March 10, 2026 at 10:48:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 139 1 1 0 0 30 0 0 0 100 1 0 0 3 209 102 4 0 0 0 0 304 0 0 0 100 2 0 0 0 9 2 8 0 0 0 0 12 0 0 0 100 3 0 0 10 210 104 6 0 0 0 0 260 0 0 0 100 4 0 0 14 20 11 12 0 1 1 0 574 0 0 0 100 5 0 0 0 11 3 12 0 0 0 0 306 0 0 0 100 6 0 0 0 7 1 32 0 0 0 0 1036 0 0 0 100 7 1 0 0 113 53 115 0 0 0 0 5 0 0 0 100 March 10, 2026 at 10:48:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 104 393 0 18 296 0 321 0 0 0 99 1 0 0 3 209 102 345 0 21 193 0 304 0 0 0 100 2 0 0 0 9 1 167 0 19 205 0 6 0 0 0 100 3 0 0 10 302 193 164 0 18 225 0 260 0 0 0 100 4 0 0 14 10 3 184 0 22 285 0 566 0 0 0 100 5 0 0 0 26 9 160 0 11 180 0 306 0 0 0 100 6 0 0 0 13 2 219 1 15 243 0 1038 0 0 0 99 7 0 0 0 113 52 290 0 16 243 0 0 0 0 0 100 March 10, 2026 at 10:48:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 0 0 0 2 0 0 0 100 1 0 0 3 210 102 24 1 1 0 0 328 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 6 0 0 0 100 3 0 0 10 212 105 8 0 0 0 0 261 0 0 0 100 4 0 0 14 11 4 8 0 0 0 0 568 0 0 0 100 5 0 0 0 23 9 18 0 0 0 0 314 0 0 0 100 6 0 0 0 8 1 34 1 0 0 0 1038 0 0 0 100 7 0 0 0 111 52 108 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 4 0 0 0 0 304 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 10 210 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 10 3 6 1 0 0 0 567 0 0 0 100 5 0 0 0 13 4 12 0 0 0 0 309 0 0 0 100 6 0 0 0 14 4 42 1 1 0 0 1058 0 0 0 100 7 0 0 0 113 54 112 0 1 0 0 3 0 0 0 100 March 10, 2026 at 10:48:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 2 0 0 3 0 0 0 100 1 0 0 3 215 104 10 0 1 1 0 306 0 0 0 100 2 0 0 0 9 2 20 0 1 0 0 2 0 0 0 100 3 0 0 10 210 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 11 4 10 0 0 0 0 570 0 0 0 100 5 0 0 0 17 4 10 0 0 0 0 301 0 0 0 100 6 0 0 0 8 1 32 1 0 1 0 1037 0 0 0 100 7 0 0 0 124 58 124 1 0 0 0 13 0 0 0 100 March 10, 2026 at 10:48:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 118 0 0 1 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 1 0 294 0 0 0 100 2 0 0 0 11 2 12 0 0 1 0 13 0 0 0 100 3 0 0 10 210 104 24 0 1 2 0 261 0 0 0 100 4 0 0 14 17 10 12 0 1 1 0 573 0 0 0 100 5 0 0 0 23 9 26 0 0 1 0 318 0 0 0 100 6 0 0 0 10 2 32 1 0 2 0 1038 0 0 0 100 7 0 0 0 121 57 121 0 0 1 0 322 0 0 0 100 March 10, 2026 at 10:48:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 116 0 0 0 0 1 0 0 0 100 1 0 0 3 209 102 6 0 0 0 0 314 0 0 0 100 2 0 0 0 13 4 8 0 0 0 0 8 0 0 0 100 3 0 0 10 212 105 10 0 0 1 0 260 0 0 0 100 4 0 0 14 13 4 14 0 0 2 0 567 0 0 0 100 5 0 0 0 19 7 14 0 0 0 0 306 0 0 0 100 6 0 0 0 8 1 34 1 0 2 0 1036 0 0 0 100 7 0 0 0 109 52 108 0 0 3 0 0 0 0 0 100 March 10, 2026 at 10:48:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 4 0 0 0 0 304 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 10 214 105 10 0 2 3 0 265 0 0 0 100 4 0 0 14 10 3 24 1 1 0 0 566 0 0 0 100 5 0 0 0 19 7 14 0 0 0 0 305 0 0 0 100 6 0 0 0 7 1 32 0 0 0 0 1031 0 0 0 100 7 0 0 0 113 53 110 0 0 0 0 5 0 0 0 100 March 10, 2026 at 10:48:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 4 0 0 0 0 304 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 5 0 0 0 100 3 0 0 10 210 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 13 4 10 0 0 1 0 569 0 0 0 100 5 0 0 0 21 8 34 0 1 0 0 306 0 0 0 100 6 0 0 0 8 1 34 1 1 1 0 1031 0 0 0 100 7 0 0 0 109 52 106 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 118 0 0 0 0 4 0 0 0 100 1 0 0 3 211 103 6 0 0 0 0 305 0 0 0 100 2 0 0 0 7 1 6 0 0 0 0 6 0 0 0 100 3 0 0 10 210 104 6 0 1 0 0 260 0 0 0 100 4 0 0 14 9 3 8 0 0 0 0 568 0 0 0 100 5 0 0 0 17 6 14 0 0 0 0 621 0 0 0 100 6 0 0 0 8 1 32 1 0 0 0 1032 0 0 0 100 7 0 0 0 121 58 124 0 0 0 0 13 0 0 0 100 March 10, 2026 at 10:48:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2122 100 159 0 9 8 3 95 0 0 0 100 1 327 0 3 226 102 38 0 6 4 6 375 0 0 0 100 2 126 0 0 25 2 62 0 6 11 13 142 0 0 0 100 3 2431 0 10 231 104 50 3 6 11 7 1469 1 1 0 98 4 28 0 14 35 10 53 0 10 8 3 691 0 0 0 100 5 20 0 0 33 5 63 0 9 4 7 410 0 0 0 100 6 472 0 115 8 1 92 0 8 3 7 1181 0 0 0 99 7 17 0 1 140 58 155 1 5 6 9 101 0 0 0 100 March 10, 2026 at 10:48:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 116 0 0 4 0 0 0 0 0 100 1 0 0 3 209 102 6 0 0 0 0 314 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 10 214 105 8 0 0 0 0 260 0 0 0 100 4 0 0 14 10 3 12 1 0 4 0 566 0 0 0 100 5 0 0 0 11 3 8 0 1 0 0 300 0 0 0 100 6 0 0 0 12 2 54 1 0 2 0 1118 0 0 0 100 7 1 0 0 117 56 116 0 0 2 0 13 0 0 0 100 March 10, 2026 at 10:48:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 111 0 0 2123 103 508 8 40 10 2 1965 1 1 0 98 1 193 0 3 220 102 330 4 31 3 1 2164 1 0 0 99 2 133 0 0 23 1 181 7 31 5 0 1919 1 0 0 98 3 113 0 80 217 106 363 5 26 3 0 2013 1 0 0 99 4 290 0 14 23 4 311 4 28 3 3 2499 1 0 0 98 5 82 0 0 29 4 392 8 35 5 0 1828 1 0 0 99 6 63 0 0 23 1 293 6 22 0 0 2549 2 0 0 98 7 26 0 0 134 55 372 3 27 1 1 1394 1 0 0 99 March 10, 2026 at 10:48:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 111 130 0 3 7 0 13 0 0 0 100 1 0 0 3 311 141 108 0 3 1 0 308 0 0 0 100 2 0 0 0 11 2 14 0 1 1 0 16 0 0 0 100 3 0 0 24 212 105 12 0 2 4 0 295 0 0 0 100 4 4 0 14 13 4 10 0 1 0 0 570 0 0 0 100 5 0 0 0 29 11 26 0 0 0 0 313 0 0 0 100 6 0 0 0 14 2 38 1 1 3 1 1139 0 0 0 100 7 0 0 0 11 2 10 0 2 4 0 10 0 0 0 100 March 10, 2026 at 10:48:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 127 114 0 5 0 0 3 0 0 0 100 1 0 0 3 297 118 106 0 4 0 0 296 0 0 0 100 2 0 0 0 25 9 20 0 1 0 0 0 0 0 0 100 3 0 0 10 210 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 11 4 8 0 0 0 0 568 0 0 0 100 5 0 0 0 33 13 32 0 0 0 0 319 0 0 0 100 6 0 0 0 8 1 34 1 0 1 0 1130 0 0 0 100 7 0 0 0 11 2 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 124 0 3 2 0 14 0 0 0 100 1 0 0 3 219 107 14 0 1 1 0 294 0 0 0 100 2 0 0 0 99 46 96 0 1 1 0 12 0 0 0 100 3 0 0 10 214 106 14 0 0 1 0 273 0 0 0 100 4 0 0 14 17 9 14 1 1 0 0 570 0 0 0 100 5 0 0 0 25 10 20 0 0 1 0 312 0 0 0 100 6 0 0 0 10 2 32 1 0 1 0 1125 0 0 0 100 7 0 0 0 17 5 16 0 0 2 0 6 0 0 0 100 March 10, 2026 at 10:48:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 280 0 17 168 0 0 0 1 0 99 1 0 0 3 296 141 362 0 13 114 0 294 0 0 0 100 2 0 0 0 26 10 182 0 13 144 0 0 0 0 0 100 3 0 0 10 287 180 141 0 12 111 0 259 0 0 0 100 4 0 0 14 15 5 145 1 9 139 0 592 0 0 0 100 5 0 0 0 25 9 162 0 8 139 0 306 0 0 0 100 6 0 0 0 9 1 170 1 10 161 0 1126 0 0 0 100 7 0 0 0 9 2 154 0 11 156 0 0 0 0 0 100 March 10, 2026 at 10:48:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 121 0 1 6 0 12 0 0 0 100 1 0 0 11 217 103 19 0 6 9 0 299 0 1 0 99 2 0 0 14 113 50 125 2 3 2 0 52 0 0 0 100 3 0 0 10 215 104 39 0 5 12 0 267 0 0 0 100 4 0 0 14 33 12 49 1 5 15 0 601 0 0 0 100 5 4 0 7 19 5 39 1 6 2 2 470 0 0 0 100 6 0 0 0 14 2 47 0 7 11 0 1048 0 0 0 100 7 0 0 0 15 2 17 0 2 9 0 0 0 0 0 100 March 10, 2026 at 10:48:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 105 110 0 6 0 0 0 0 0 0 100 1 0 0 3 210 102 4 0 1 0 0 294 0 0 0 100 2 0 0 0 68 28 60 0 3 0 0 0 0 0 0 100 3 0 0 10 251 121 50 0 5 0 0 260 0 0 0 100 4 0 0 14 26 11 22 0 0 0 0 578 0 0 0 100 5 0 0 0 14 3 8 0 0 0 0 300 0 0 0 100 6 0 0 7 10 1 34 1 1 0 0 1037 0 0 0 100 7 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:48:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 102 110 0 4 0 0 4 0 0 0 100 1 0 0 3 323 149 100 0 3 0 0 295 0 0 0 100 2 0 0 0 25 1 4 0 1 0 0 0 0 0 0 100 3 0 0 122 220 106 16 0 3 0 0 260 0 0 0 100 4 0 0 14 49 14 48 1 1 0 0 586 0 0 0 100 5 0 0 0 27 3 6 0 0 0 0 300 0 0 0 100 6 0 0 0 26 1 34 1 1 0 0 1035 0 0 0 100 7 0 0 0 25 2 8 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:49:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 94 0 6 0 0 0 0 0 0 100 1 0 0 3 242 105 32 0 4 0 0 294 0 0 0 100 2 0 0 7 97 45 98 0 2 0 0 8 0 0 0 100 3 0 0 10 219 107 20 0 1 0 0 275 0 0 0 100 4 0 0 14 31 15 28 0 0 0 0 581 0 0 0 100 5 0 0 0 12 3 24 0 1 0 0 300 0 0 0 100 6 0 0 0 8 1 32 0 0 0 0 1036 0 0 0 100 7 0 0 0 12 2 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2181 101 1309 21 133 261 0 6752 6 1 0 93 1 18 0 3 274 103 1179 26 104 261 0 6247 5 1 0 94 2 7 0 0 144 6 1508 10 81 254 0 5665 4 1 0 95 3 2 0 248 314 195 1388 9 82 257 0 6111 3 1 0 95 4 14 0 14 71 13 1027 11 70 249 0 8170 4 1 0 95 5 39 0 0 147 48 1205 15 62 221 0 5999 4 1 0 95 6 1 0 0 53 3 1262 7 61 213 0 8093 3 1 0 96 7 0 0 0 55 2 1116 6 51 235 0 6727 3 1 0 96 March 10, 2026 at 10:49:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 126 0 0 1 0 0 0 0 0 100 1 0 0 3 209 102 12 0 1 2 0 297 0 0 0 100 2 0 0 0 7 1 12 0 0 2 0 11 0 0 0 100 3 0 0 10 230 121 14 0 0 0 0 261 0 0 0 100 4 1 0 14 26 11 32 1 0 4 0 621 0 0 0 100 5 0 0 0 117 55 126 0 1 0 0 302 0 0 0 100 6 0 0 0 8 1 82 1 1 3 0 1037 0 0 0 100 7 0 0 0 11 2 20 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:49:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 2 2124 100 178 0 14 8 8 152 0 0 0 100 1 52 0 3 226 102 60 0 10 13 11 425 0 0 0 100 2 6 0 0 21 0 25 0 5 4 4 53 0 0 0 100 3 3 0 10 226 104 22 0 5 6 2 308 0 0 0 100 4 5 0 14 36 9 36 1 4 5 4 620 0 0 0 100 5 614 0 0 42 10 35 1 2 4 5 1193 1 0 0 99 6 2581 0 113 102 46 173 2 5 8 11 1554 1 1 0 98 7 145 0 0 26 2 114 0 16 12 22 203 0 0 0 100 March 10, 2026 at 10:49:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 116 0 0 0 0 6 0 0 0 100 1 0 0 3 211 103 6 0 1 0 0 295 0 0 0 100 2 0 0 0 5 0 2 0 0 0 0 10 0 0 0 100 3 0 0 10 212 105 6 0 0 0 0 261 0 0 0 100 4 0 0 14 23 10 20 0 0 0 0 578 0 0 0 100 5 0 0 0 17 5 14 0 0 0 0 304 0 0 0 100 6 0 0 0 108 51 132 1 0 0 0 1119 0 0 0 100 7 0 0 0 11 2 8 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:49:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 132 0 1 1 0 0 0 0 0 100 1 0 0 7 210 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 9 1 12 1 0 1 0 21 0 0 0 100 3 0 0 14 215 106 14 0 0 1 0 270 0 0 0 100 4 0 0 14 29 15 28 0 0 1 0 908 0 0 0 100 5 0 0 0 14 4 10 0 0 1 0 306 0 0 0 100 6 0 0 0 67 30 86 1 0 1 0 1119 0 0 0 100 7 0 0 0 62 26 61 0 1 1 0 1 0 0 0 100 March 10, 2026 at 10:49:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 118 0 1 5 0 0 0 0 0 100 1 0 0 3 210 102 22 0 1 2 0 294 0 0 0 100 2 0 0 0 5 0 2 0 0 0 0 10 0 0 0 100 3 0 0 10 212 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 20 8 22 1 0 3 0 574 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 300 0 0 0 100 6 0 0 0 8 1 34 1 0 3 0 1120 0 0 0 100 7 0 0 0 111 53 110 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 54 0 0 2130 105 476 11 35 11 0 1833 1 1 0 98 1 212 0 3 225 103 490 9 49 13 1 2310 1 0 0 99 2 283 0 0 26 2 309 5 28 6 2 2073 1 0 0 98 3 162 0 86 213 104 202 3 18 6 1 1896 2 0 0 98 4 4 0 14 32 7 288 4 25 3 0 2531 1 0 0 99 5 179 0 0 22 3 245 5 29 3 1 1960 1 0 0 99 6 0 0 0 24 2 237 7 23 5 0 2338 2 0 0 98 7 120 0 0 129 53 632 10 35 4 2 2107 1 0 0 99 March 10, 2026 at 10:49:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 106 124 1 0 0 0 9 0 0 0 100 1 0 0 3 211 102 4 0 1 1 0 294 0 0 0 100 2 0 0 0 5 0 20 0 2 0 0 0 0 0 0 100 3 0 0 10 210 104 4 0 0 0 0 260 0 0 0 100 4 0 0 14 15 5 10 0 0 0 0 570 0 0 0 100 5 0 0 0 13 3 6 0 0 0 0 300 0 0 0 100 6 0 0 0 7 1 32 0 0 0 0 1126 0 0 0 100 7 0 0 0 109 52 106 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5266 0 32 2224 114 480 64 53 122 22 1779 11 2 0 87 1 3361 0 10 340 109 496 36 68 231 29 2438 7 2 0 92 2 2601 0 6 111 3 440 76 53 240 19 1421 12 1 0 87 3 2090 0 223 271 118 375 10 51 184 18 2224 6 1 0 93 4 364 0 10 117 10 370 61 44 71 16 1650 4 1 0 95 5 1075 0 18 73 4 276 25 37 129 15 1917 6 1 0 93 6 2187 0 14 71 2 310 19 40 197 18 3253 5 1 0 94 7 2398 0 6 118 21 301 27 29 133 7 1900 5 1 0 93 March 10, 2026 at 10:49:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2117 113 126 0 8 1 0 14 0 0 0 100 1 47 0 2 337 148 130 0 3 1 0 320 0 0 0 100 2 1 0 0 10 1 14 0 1 0 0 13 0 0 0 100 3 0 0 25 217 107 20 0 1 0 0 274 0 0 0 100 4 2 0 0 24 10 20 0 1 4 0 326 0 0 0 100 5 0 0 0 16 3 11 0 1 1 0 305 0 0 0 100 6 19 0 14 15 3 42 1 2 2 0 1414 0 0 0 100 7 0 0 0 20 4 19 0 0 4 0 13 0 0 0 100 March 10, 2026 at 10:49:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 103 263 0 11 157 0 0 0 1 0 99 1 0 0 10 323 155 257 0 18 110 0 303 0 0 0 100 2 0 0 0 7 0 131 0 8 162 0 0 0 0 0 100 3 0 0 17 291 180 127 0 10 123 0 260 0 0 0 100 4 0 0 0 12 2 158 1 10 133 0 300 0 0 0 100 5 0 0 0 11 2 157 0 12 144 0 300 0 0 0 100 6 0 0 14 16 4 278 0 10 114 0 1389 0 0 0 100 7 0 0 0 14 3 145 0 11 149 0 0 0 0 0 100 March 10, 2026 at 10:49:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 111 116 0 3 0 0 1 0 0 0 100 1 0 0 3 324 148 116 0 3 0 0 303 0 0 0 100 2 0 0 0 8 1 6 0 1 0 0 1 0 0 0 100 3 0 0 10 213 105 6 0 0 0 0 261 0 0 0 100 4 0 0 0 14 4 8 0 0 0 0 303 0 0 0 100 5 0 0 0 14 3 8 0 0 1 0 301 0 0 0 100 6 0 0 14 11 3 54 1 1 0 0 1387 0 0 0 100 7 0 0 0 14 3 10 0 0 0 0 21 0 0 0 100 March 10, 2026 at 10:49:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1060 0 31 2131 114 156 1 25 1648 6 271 0 1 0 98 1 40 0 7 335 136 209 4 27 26 9 441 0 0 0 100 2 537 0 19 22 1 88 1 16 1169 18 262 1 1 0 98 3 63 0 15 246 114 142 1 29 28 14 504 0 0 0 100 4 55 0 7 26 2 103 5 19 21 12 468 0 1 0 99 5 20 0 0 32 6 134 4 23 23 8 467 0 0 0 100 6 17 0 30 23 4 66 1 6 912 3 1442 0 1 0 99 7 41 0 5 22 2 91 2 16 96 9 81 0 0 0 100 March 10, 2026 at 10:49:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 42 2106 100 136 0 4 6 1 16 0 1 0 99 1 159 0 3 319 153 120 0 3 5 4 333 0 0 0 100 2 284 0 0 16 0 18 1 3 19 1 98 0 0 0 100 3 7 0 17 217 104 36 0 1 5 2 280 0 0 0 100 4 6 0 0 21 3 17 0 2 8 2 314 0 0 0 100 5 16 0 7 22 4 27 1 3 7 3 330 0 0 0 100 6 7 0 14 20 3 52 2 3 6 2 1090 0 0 0 100 7 7 0 0 19 2 50 0 3 1 5 15 0 0 0 100 March 10, 2026 at 10:49:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2179 125 136 0 5 3 0 0 0 1 0 99 1 0 0 3 365 127 102 0 5 1 0 294 0 0 0 100 2 0 0 0 63 1 6 0 1 0 0 6 0 0 0 100 3 0 0 353 219 104 16 0 0 3 0 267 0 0 0 100 4 0 0 7 76 10 16 1 1 2 0 313 0 0 0 100 5 0 0 0 67 3 4 0 0 1 0 300 0 0 0 100 6 0 0 14 67 4 36 0 0 0 0 1025 0 0 0 100 7 0 0 0 71 3 15 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:49:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2137 129 114 0 3 1 0 0 0 0 0 100 1 0 0 3 311 124 106 0 3 1 0 294 0 0 0 100 2 0 0 0 5 0 2 0 0 2 0 0 0 0 0 100 3 0 0 10 212 104 6 0 1 0 0 259 0 0 0 100 4 0 0 0 15 4 16 0 0 1 0 303 0 0 0 100 5 0 0 0 9 2 6 0 1 0 0 300 0 0 0 100 6 0 0 14 10 3 38 1 0 3 0 1018 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 123 116 0 3 0 0 0 0 0 0 100 1 0 0 3 309 129 120 0 2 0 0 294 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 10 210 104 4 0 0 0 0 259 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 14 9 3 36 0 0 0 0 1019 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 114 0 0 0 0 0 0 0 0 100 1 3 0 3 311 152 114 0 0 14 0 358 0 0 0 100 2 833 0 1 8 1 36 0 4 64 0 697 0 1 0 99 3 500 0 11 223 110 22 0 2 28 0 401 0 0 0 100 4 322 0 1 20 9 32 0 3 19 0 422 0 0 0 100 5 20 0 0 9 2 8 0 1 32 0 383 0 0 0 100 6 0 0 14 10 3 36 1 0 1 0 1019 0 0 0 100 7 0 0 0 10 2 12 0 1 0 0 2 0 0 0 100 March 10, 2026 at 10:49:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 115 106 0 5 0 0 0 0 0 0 100 1 0 0 2 297 128 87 0 5 0 0 295 0 0 0 100 2 0 0 0 25 10 24 0 1 0 0 0 0 0 0 100 3 0 0 11 250 124 44 0 0 0 0 279 0 0 0 100 4 0 0 0 10 2 4 1 0 0 0 300 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 300 0 0 0 100 6 0 0 14 9 3 36 0 0 0 0 1019 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 116 0 3 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 75 31 68 0 2 0 0 0 0 0 0 100 3 0 0 10 282 140 94 0 2 0 0 279 0 0 0 100 4 0 0 0 20 10 14 0 0 0 0 309 0 0 0 100 5 0 0 0 9 2 14 0 1 1 0 313 0 0 0 100 6 0 0 14 11 3 40 2 2 0 0 1017 0 0 0 100 7 0 0 0 11 2 13 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:49:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 111 216 0 9 95 0 0 0 0 0 100 1 0 0 3 213 103 84 0 8 42 0 294 0 0 0 100 2 0 0 0 6 0 81 0 5 68 0 0 0 0 0 100 3 0 0 10 409 219 218 0 10 84 0 279 0 0 0 100 4 0 0 0 11 2 112 0 7 77 0 300 0 0 0 100 5 0 0 0 10 2 75 0 7 82 0 300 0 0 0 100 6 0 0 14 11 4 202 0 5 42 0 1011 0 0 0 100 7 0 0 0 10 2 102 0 4 83 0 0 0 0 0 100 March 10, 2026 at 10:49:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 104 116 0 3 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 3 349 169 142 0 1 0 0 21 0 0 0 100 4 0 0 7 12 4 10 0 1 0 0 561 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 6 0 0 14 10 3 36 1 0 0 0 1011 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 111 0 7 0 0 0 0 0 0 100 1 0 0 3 229 108 22 0 3 0 0 294 0 0 0 100 2 0 0 0 23 9 20 0 1 0 0 0 0 0 0 100 3 1 0 3 311 153 102 0 1 0 0 21 0 0 0 100 4 0 0 7 20 7 14 1 1 0 0 564 0 0 0 100 5 0 0 0 9 2 24 0 1 1 0 305 0 0 0 100 6 0 0 14 10 3 38 1 0 1 0 1013 0 0 0 100 7 0 0 0 9 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 88 0 1 0 0 0 0 0 0 100 1 0 0 3 211 103 4 0 0 0 0 295 0 0 0 100 2 0 0 0 48 12 41 0 2 0 0 0 0 0 0 100 3 0 0 3 324 160 121 0 3 0 0 20 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 561 0 0 0 100 5 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 6 0 0 14 11 3 54 0 2 0 0 1011 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 104 0 2 1 0 0 0 0 0 100 1 0 0 7 224 105 18 0 3 1 0 294 0 0 0 100 2 0 0 0 16 5 12 0 2 1 0 0 0 0 0 100 3 0 0 7 333 163 124 0 2 0 0 20 0 0 0 100 4 0 0 7 23 11 16 0 0 1 0 573 0 0 0 100 5 0 0 0 18 6 14 0 0 1 0 308 0 0 0 100 6 0 0 14 13 4 40 1 0 1 0 1017 0 0 0 100 7 0 0 0 18 4 16 0 0 1 0 1 0 0 0 100 March 10, 2026 at 10:49:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 2 4 0 0 0 0 0 100 1 0 0 3 217 102 8 0 1 0 0 294 0 0 0 100 2 0 0 0 105 50 102 0 0 1 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 16 6 14 0 0 1 0 561 0 0 0 100 5 0 0 0 11 2 10 0 1 2 0 300 0 0 0 100 6 0 0 14 12 3 40 1 0 1 0 1012 0 0 0 100 7 0 0 0 9 2 26 0 2 0 0 0 0 0 0 100 March 10, 2026 at 10:49:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 134 0 4 0 0 0 0 0 0 100 1 0 0 3 245 120 42 0 2 0 0 294 0 0 0 100 2 0 0 0 67 29 60 0 1 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 13 4 8 1 0 0 0 558 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 14 9 3 36 0 0 0 0 1010 0 0 0 100 7 0 0 0 13 2 10 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:49:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 125 110 0 6 0 0 0 0 0 0 100 1 0 0 3 299 121 92 0 6 0 0 294 0 0 0 100 2 0 0 0 17 6 14 0 1 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 562 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 14 10 3 36 1 0 0 0 1011 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 3 211 103 22 0 2 0 0 295 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 12 4 8 0 0 0 0 559 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 301 0 0 0 100 6 0 0 14 9 3 36 0 0 0 0 1011 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 112 117 0 6 0 0 0 0 0 0 100 1 0 0 3 241 111 34 0 4 0 0 294 0 0 0 100 2 0 0 0 73 29 86 0 4 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 25 13 18 0 1 0 0 568 0 0 0 100 5 0 0 0 13 4 16 0 0 0 0 317 0 0 0 100 6 0 0 14 10 3 40 1 0 0 0 1016 0 0 0 100 7 0 0 0 11 2 11 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 114 0 0 3 0 0 0 0 0 100 1 0 0 3 209 102 4 0 0 0 0 294 0 0 0 100 2 0 0 0 105 50 102 0 0 1 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 15 5 14 1 0 0 0 561 0 0 0 100 5 0 0 0 9 2 10 0 0 4 0 300 0 0 0 100 6 0 0 14 11 4 42 0 0 2 0 1013 0 0 0 100 7 0 0 0 11 3 10 0 0 0 0 6 0 0 0 100 March 10, 2026 at 10:49:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 109 51 104 0 0 1 0 1 0 0 0 100 3 0 0 3 249 123 60 0 1 0 0 21 0 0 0 100 4 0 0 7 18 7 14 0 0 0 0 562 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 6 0 0 14 10 3 38 1 1 0 0 1011 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 21 0 0 0 100 March 10, 2026 at 10:49:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 249 122 42 0 0 1 0 20 0 0 0 100 4 0 0 7 14 5 32 0 2 0 0 560 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 14 10 3 36 1 0 0 0 1011 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 112 111 0 3 0 0 0 0 0 0 100 1 0 0 3 229 112 24 0 1 0 0 295 0 0 0 100 2 0 0 0 85 29 80 0 2 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 562 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 6 0 0 14 9 3 36 0 0 1 0 1011 0 0 0 100 7 0 0 0 11 2 10 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:49:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 121 108 0 6 1 0 0 0 0 0 100 1 0 0 7 278 115 68 0 6 1 0 294 0 0 0 100 2 0 0 0 48 17 44 0 3 1 0 0 0 0 0 100 3 0 0 7 248 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 27 12 18 1 0 2 0 565 0 0 0 100 5 0 0 0 12 3 30 0 1 1 0 312 0 0 0 100 6 0 0 14 13 4 40 1 0 1 0 1019 0 0 0 100 7 0 0 0 14 3 13 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:49:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 1 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 113 50 108 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 18 6 14 0 0 0 0 562 0 0 0 100 5 0 0 0 11 2 10 0 0 0 0 299 0 0 0 100 6 0 0 14 9 3 52 0 1 0 0 1010 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 1 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 109 50 102 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 12 4 10 0 0 0 0 559 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 6 0 0 14 10 3 36 1 0 1 0 1012 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 114 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 4 0 1 0 0 294 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 248 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 560 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 14 12 3 38 1 1 1 0 1011 0 0 0 100 7 0 0 0 9 2 26 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:49:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 132 0 1 0 0 0 0 0 0 100 1 0 0 3 211 103 4 0 0 0 0 295 0 0 0 100 2 0 0 0 105 50 102 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 13 4 8 1 0 0 0 560 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 14 9 3 36 0 0 0 0 1011 0 0 0 100 7 0 0 0 11 2 8 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:49:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 105 50 102 0 1 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 21 10 16 0 1 0 0 566 0 0 0 100 5 0 0 0 13 4 20 0 0 0 0 320 0 0 0 100 6 0 0 14 10 3 40 1 0 0 0 1018 0 0 0 100 7 0 0 0 11 2 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 116 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 18 0 1 0 0 294 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 16 6 16 0 0 0 0 582 0 0 0 100 5 0 0 0 9 2 8 0 0 0 0 300 0 0 0 100 6 0 0 14 12 4 38 1 0 0 0 1012 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 211 102 4 0 0 0 0 294 0 0 0 100 2 0 0 0 107 51 120 0 1 0 0 1 0 0 0 100 3 0 0 3 249 123 44 0 1 0 0 21 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 562 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 6 0 0 14 10 3 36 1 0 1 0 1011 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 114 0 0 0 0 0 0 0 0 100 1 0 0 3 210 102 4 0 1 0 0 294 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 13 4 8 1 0 0 0 559 0 0 0 100 5 0 0 0 11 3 10 0 0 0 0 308 0 0 0 100 6 0 0 14 9 3 40 0 0 0 0 1029 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 213 104 4 0 0 0 0 295 0 0 0 100 2 0 0 0 107 50 104 0 0 0 0 0 0 0 0 100 3 0 0 3 248 122 58 0 1 0 0 20 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 560 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 14 10 3 38 1 1 1 0 1312 0 0 0 100 7 0 0 0 11 2 8 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:49:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 116 0 0 1 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 1 0 294 0 0 0 100 2 0 0 0 107 51 102 0 1 1 0 1 0 0 0 100 3 0 0 3 249 122 58 0 0 1 0 20 0 0 0 100 4 0 0 7 21 10 12 0 0 1 0 562 0 0 0 100 5 0 0 0 15 5 18 0 0 1 0 20 0 0 0 100 6 0 0 14 14 5 44 1 1 1 0 1317 0 0 0 100 7 0 0 0 13 3 11 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:49:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 42 0 0 0 0 20 0 0 0 100 4 0 0 7 16 6 14 0 0 0 0 561 0 0 0 100 5 0 0 0 9 1 6 0 0 0 0 0 0 0 0 100 6 0 0 14 11 4 38 0 0 0 0 1311 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 249 122 42 0 0 0 0 20 0 0 0 100 4 0 0 7 13 4 28 1 2 0 0 560 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 12 4 38 1 0 1 0 1311 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 105 50 102 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 16 5 12 0 0 2 0 561 0 0 0 100 5 0 0 0 7 1 22 0 1 0 0 0 0 0 0 100 6 0 0 14 12 4 38 1 0 0 0 1311 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 1 0 0 0 0 0 0 100 1 0 0 3 211 103 4 0 0 0 0 295 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 12 4 8 0 0 0 0 558 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 14 12 4 38 1 0 0 0 1312 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 114 0 0 0 0 0 0 0 0 100 1 0 0 4 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 105 50 102 0 0 0 0 3 0 0 0 100 3 0 0 2 249 123 42 0 0 0 0 20 0 0 0 100 4 0 0 7 21 10 14 0 0 0 0 563 0 0 0 100 5 0 0 0 13 3 16 0 0 1 0 17 0 0 0 100 6 0 0 14 12 4 60 1 1 0 0 1317 0 0 0 100 7 0 0 0 11 2 11 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 114 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 107 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 15 5 14 1 0 0 0 560 0 0 0 100 5 0 0 0 7 1 6 0 0 0 0 0 0 0 0 100 6 0 0 14 15 5 42 0 0 1 0 1313 0 0 0 100 7 0 0 0 9 2 24 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:49:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 107 51 104 0 0 0 0 1 0 0 0 100 3 0 0 3 249 123 42 0 0 0 0 21 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 561 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 14 12 4 38 1 0 0 0 1311 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 21 0 0 0 100 March 10, 2026 at 10:49:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 134 0 1 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 12 4 8 0 0 0 0 558 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 14 11 4 38 0 0 0 0 1311 0 0 0 100 7 0 0 0 11 2 8 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:49:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 116 0 1 1 0 0 0 0 0 100 1 0 0 3 211 103 20 0 1 0 0 295 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 248 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 562 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 14 12 4 38 1 0 0 0 1310 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 112 115 0 3 1 0 0 0 0 0 100 1 0 0 7 248 111 44 0 3 1 0 294 0 0 0 100 2 0 0 0 68 30 58 0 1 1 0 0 0 0 0 100 3 0 0 7 248 122 42 0 1 0 0 20 0 0 0 100 4 0 0 7 23 10 14 1 1 1 0 563 0 0 0 100 5 0 0 0 14 4 16 0 0 1 0 18 0 0 0 100 6 0 0 14 15 5 42 1 0 1 0 1318 0 0 0 100 7 0 0 0 14 3 10 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:49:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 119 116 0 3 0 0 0 0 0 0 100 1 0 0 3 311 133 104 0 1 1 0 294 0 0 0 100 2 0 0 0 5 0 16 0 1 2 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 16 6 14 0 0 0 0 562 0 0 0 100 5 0 0 0 7 1 6 0 0 0 0 0 0 0 0 100 6 0 0 14 11 4 38 0 0 1 0 1311 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 114 0 2 0 0 0 0 0 0 100 1 0 0 3 251 122 40 0 2 0 0 294 0 0 0 100 2 0 0 0 67 30 64 0 1 1 0 0 0 0 0 100 3 0 0 3 248 122 58 0 1 0 0 20 0 0 0 100 4 0 0 7 12 4 8 0 0 0 0 558 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 14 12 4 38 1 0 0 0 1311 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 113 113 0 3 0 0 0 0 0 0 100 1 0 0 3 242 107 36 0 3 0 0 294 0 0 0 100 2 0 0 0 71 32 64 0 1 0 0 0 0 0 0 100 3 0 0 3 248 122 40 1 0 0 0 20 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 561 0 0 0 100 5 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 6 0 0 14 11 4 38 1 0 0 0 1311 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:49:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 123 114 0 3 0 0 0 0 0 0 100 1 0 0 3 311 130 104 0 3 0 0 295 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 249 122 58 0 0 0 0 20 0 0 0 100 4 0 0 7 13 4 8 1 0 0 0 560 0 0 0 100 5 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 6 0 0 14 12 4 38 1 0 0 0 1312 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 125 112 0 7 0 0 0 0 0 0 100 1 0 0 3 299 119 88 0 5 0 0 294 0 0 0 100 2 0 0 0 21 8 18 0 1 0 0 0 0 0 0 100 3 0 0 3 249 122 42 0 0 1 0 20 0 0 0 100 4 0 0 7 23 12 34 0 1 0 0 566 0 0 0 100 5 0 0 0 11 3 18 0 0 0 0 19 0 0 0 100 6 0 0 14 12 4 44 1 1 0 0 1317 0 0 0 100 7 0 0 0 11 2 11 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:50:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 113 0 4 0 0 0 0 0 0 100 1 0 0 3 247 119 44 0 4 0 0 294 0 0 0 100 2 0 0 0 65 29 58 0 1 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 14 5 12 0 0 0 0 558 0 0 0 100 5 0 0 0 7 1 6 0 0 0 0 0 0 0 0 100 6 0 0 14 13 5 40 0 0 0 0 1313 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2139 137 112 0 3 0 0 0 0 0 0 100 1 0 0 3 309 115 102 0 3 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 3 0 0 3 250 123 42 0 0 0 0 21 0 0 0 100 4 0 0 7 16 5 12 0 0 1 0 562 0 0 0 100 5 0 0 0 11 3 26 0 1 0 0 2 0 0 0 100 6 0 0 14 12 4 38 1 0 0 0 1355 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2130 126 110 0 3 0 0 0 0 0 0 100 1 0 0 4 309 126 102 0 3 0 0 294 0 0 0 100 2 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 3 0 0 2 249 123 40 0 0 0 0 20 0 0 0 100 4 0 0 7 13 4 8 1 0 0 0 558 0 0 0 100 5 0 0 0 9 1 6 0 0 0 0 0 0 0 0 100 6 0 0 14 12 4 54 1 1 1 0 1310 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 2 0 0 0 0 0 0 100 1 0 0 3 217 103 8 0 0 0 0 295 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 42 0 1 0 0 20 0 0 0 100 4 0 0 7 16 7 10 0 0 0 0 562 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 14 12 4 38 1 0 0 0 1312 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 105 115 0 5 1 0 0 0 0 0 100 1 0 0 3 229 109 22 0 3 1 0 294 0 0 0 100 2 0 0 0 87 39 80 0 3 1 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 1 0 20 0 0 0 100 4 0 0 7 20 11 12 0 0 1 0 563 0 0 0 100 5 0 0 0 13 4 14 0 0 1 0 14 0 0 0 100 6 0 0 14 15 5 46 0 1 1 0 1317 0 0 0 100 7 0 0 0 13 3 33 0 1 1 0 0 0 0 0 100 March 10, 2026 at 10:50:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 107 130 0 7 0 0 0 0 0 0 100 1 0 0 2 234 111 26 0 4 0 0 294 0 0 0 100 2 0 0 0 83 35 78 0 3 0 0 0 0 0 0 100 3 0 0 5 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 18 6 14 0 0 0 0 562 0 0 0 100 5 0 0 0 7 1 6 0 0 0 0 0 0 0 0 100 6 0 0 14 12 4 38 1 0 0 0 1311 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 110 114 0 4 0 0 0 0 0 0 100 1 0 0 3 248 113 44 0 4 0 0 294 0 0 0 100 2 0 0 0 65 29 58 0 1 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 13 4 8 1 0 0 0 559 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 12 4 38 1 0 1 0 1311 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 113 118 0 8 0 0 0 0 0 0 100 1 0 0 3 249 113 58 0 6 0 0 294 0 0 0 100 2 0 0 0 63 26 58 0 4 0 0 0 0 0 0 100 3 0 0 3 247 122 42 0 0 0 0 20 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 560 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 11 4 38 0 0 1 0 1311 0 0 0 100 7 0 0 0 11 2 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 121 109 0 5 0 0 0 0 0 0 100 1 0 0 3 309 129 100 0 5 1 0 295 0 0 0 100 2 0 0 0 11 3 28 0 2 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 12 4 8 0 0 0 0 560 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 12 4 40 1 0 0 0 1312 0 0 0 100 7 0 0 0 9 2 6 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 96 0 4 1 0 0 0 0 0 100 1 0 0 3 217 104 8 0 0 1 0 294 0 0 0 100 2 0 0 0 59 25 52 0 1 1 0 0 0 0 0 100 3 0 0 3 251 124 42 0 0 0 0 20 0 0 0 100 4 0 0 7 21 11 20 0 1 1 0 568 0 0 0 100 5 0 0 0 87 31 96 0 4 1 0 17 0 0 0 100 6 0 0 14 11 4 42 0 0 0 0 1318 0 0 0 100 7 0 0 0 13 3 15 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:50:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 60 0 2 0 0 20 0 0 0 100 4 0 0 7 17 5 12 1 0 0 0 559 0 0 0 100 5 0 0 0 115 51 114 0 0 0 0 0 0 0 0 100 6 0 0 14 12 4 38 1 0 1 0 1312 0 0 0 100 7 0 0 0 11 3 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 84 0 2 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 28 0 0 0 100 3 0 0 3 251 123 44 0 1 1 0 21 0 0 0 100 4 0 0 7 14 5 28 0 1 0 0 562 0 0 0 100 5 0 0 0 114 40 108 0 2 0 0 1 0 0 0 100 6 0 0 14 34 15 62 1 1 2 0 1312 0 0 0 100 7 0 0 0 13 4 10 0 0 0 0 21 0 0 0 100 March 10, 2026 at 10:50:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 2 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 245 121 38 0 0 0 0 19 0 0 0 100 4 0 0 7 12 4 8 0 0 0 0 558 0 0 0 100 5 0 0 0 11 2 8 0 0 0 0 9 0 0 0 100 6 0 0 14 109 53 142 0 0 0 0 1328 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 112 0 0 0 0 0 0 0 0 100 1 0 0 3 211 103 4 0 0 0 0 295 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 18 6 14 0 0 1 0 562 0 0 0 100 5 0 0 0 9 1 24 0 1 0 0 0 0 0 0 100 6 0 0 14 110 53 138 1 1 1 0 1311 0 0 0 100 7 0 0 0 13 3 10 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 118 0 0 0 0 0 0 0 0 100 1 0 0 3 209 102 2 0 0 1 0 294 0 0 0 100 2 0 0 0 7 1 2 0 1 1 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 1 0 20 0 0 0 100 4 0 0 7 30 16 16 1 0 2 0 566 0 0 0 100 5 0 0 0 11 2 18 0 1 1 0 16 0 0 0 100 6 0 0 14 112 54 158 1 1 1 0 1320 0 0 0 100 7 0 0 0 15 4 15 0 0 1 0 0 0 0 0 100 March 10, 2026 at 10:50:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 114 0 0 0 0 0 0 0 0 100 1 0 0 3 210 102 2 0 0 0 0 294 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 249 123 40 0 0 0 0 20 0 0 0 100 4 0 0 7 16 6 14 0 0 0 0 561 0 0 0 100 5 0 0 0 7 1 6 0 0 0 0 0 0 0 0 100 6 0 0 14 109 53 136 0 0 1 0 1310 0 0 0 100 7 0 0 0 11 3 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 18 0 1 0 0 0 0 0 0 100 1 0 0 3 211 103 2 0 0 0 0 294 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 249 123 40 0 0 0 0 20 0 0 0 100 4 0 0 7 12 4 8 0 0 0 0 560 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 112 9 140 1 1 0 0 1311 0 0 0 100 7 0 0 0 103 47 120 0 3 0 0 0 0 0 0 100 March 10, 2026 at 10:50:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 113 96 0 5 0 0 0 0 0 0 100 1 0 0 3 245 119 40 0 2 0 0 294 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 561 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 14 49 4 74 0 1 1 0 1312 0 0 0 100 7 0 0 0 77 22 72 0 2 0 0 0 0 0 0 100 March 10, 2026 at 10:50:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 120 112 0 6 0 0 0 0 0 0 100 1 0 0 3 300 126 90 0 4 0 0 295 0 0 0 100 2 0 0 0 19 7 16 0 1 0 0 0 0 0 0 100 3 0 0 3 248 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 13 4 8 1 0 0 0 558 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 10 3 36 1 0 1 0 1311 0 0 0 100 7 0 0 0 11 3 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 108 122 0 6 0 0 0 0 0 0 100 1 0 0 3 225 107 32 0 4 0 0 294 0 0 0 100 2 0 0 0 91 38 86 0 3 0 0 0 0 0 0 100 3 0 0 3 249 123 40 0 0 0 0 20 0 0 0 100 4 0 0 7 19 10 14 0 0 0 0 567 0 0 0 100 5 0 0 0 11 3 14 0 0 0 0 15 0 0 0 100 6 0 0 14 10 3 40 1 0 0 0 1317 0 0 0 100 7 0 0 0 13 3 15 0 1 0 0 0 0 0 0 100 March 10, 2026 at 10:50:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 114 0 1 0 0 0 0 0 0 100 1 0 0 3 211 102 4 0 0 0 0 294 0 0 0 100 2 0 0 0 105 50 118 0 1 0 0 0 0 0 0 100 3 0 0 3 247 122 40 0 0 0 0 20 0 0 0 100 4 0 0 7 16 5 12 0 0 0 0 558 0 0 0 100 5 0 0 0 7 1 6 0 0 0 0 0 0 0 0 100 6 0 0 14 11 4 38 0 0 0 0 1313 0 0 0 100 7 0 0 0 11 3 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 114 0 0 0 0 0 0 0 0 100 1 0 0 3 211 103 2 0 0 0 0 294 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 3 0 0 3 250 123 42 0 0 0 0 21 0 0 0 100 4 0 0 7 14 5 10 0 0 0 0 562 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 6 0 0 14 10 3 36 1 0 0 0 1310 0 0 0 100 7 0 0 0 11 3 8 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 112 0 0 0 0 0 0 0 0 100 1 0 0 2 214 103 4 0 0 0 0 295 0 0 0 100 2 1287 0 2 108 50 114 1 1 4 0 25 0 0 0 100 3 0 0 5 237 117 54 0 3 0 0 48 0 0 0 100 4 10 0 7 65 53 28 1 0 0 0 677 0 0 0 100 5 17 0 0 8 1 32 1 0 0 0 138 0 0 0 100 6 1 0 14 9 3 58 0 2 2 0 1408 0 0 0 100 7 0 0 0 13 3 12 0 0 0 0 0 0 0 0 100 March 10, 2026 at 10:50:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 146 0 0 0 0 0 0 0 0 100 1 0 0 3 211 103 6 0 1 0 0 295 0 0 0 100 2 0 0 0 107 50 102 0 0 0 0 1 0 0 0 100 3 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 4 61 0 7 94 82 52 0 1 0 0 619 0 0 0 100 5 2 0 0 15 3 14 0 1 3 0 14 0 0 0 100 6 0 0 14 10 3 42 1 0 0 0 1316 0 0 0 100 7 0 0 0 13 3 42 0 0 0 0 0 0 0 0 100