March 12, 2026 at 10:48:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 660 0 423 2277 132 5255 51 318 1259 7 5104 4 6 0 90 1 559 0 85 278 13 3054 14 257 1471 19 6352 8 6 0 86 2 634 0 46 243 14 4136 10 244 1552 5 6745 2 4 0 93 3 832 0 701 647 453 3364 16 302 1441 22 6831 10 4 0 86 4 929 0 39 2486 2342 2639 13 250 1555 22 6657 4 5 0 92 5 785 0 69 218 10 3738 12 277 1535 22 8432 3 4 0 93 6 1240 0 138 665 8 2312 12 203 1450 8 6666 8 4 0 88 7 1040 0 126 180 22 4837 17 235 1491 23 6156 2 5 0 93 March 12, 2026 at 10:48:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9564 0 125 2275 151 423 20 120 455 39 4496 12 33 0 56 1 9499 0 133 135 12 912 29 210 1284 82 4935 5 12 0 83 2 1279 0 28 112 2 540 26 119 581 52 1863 6 15 0 79 3 7077 0 28 535 387 1130 29 198 1228 91 2142 3 15 0 82 4 4244 0 13 191 29 1064 41 187 1550 78 2359 7 15 0 78 5 4728 0 22 134 1 842 34 158 1202 67 2290 7 15 0 78 6 5093 0 12 118 3 1065 27 143 2069 59 2598 7 16 0 77 7 5634 0 32 113 0 1093 25 182 1555 68 1734 5 14 0 81 March 12, 2026 at 10:48:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 35 2385 244 340 0 84 623 0 1128 0 1 0 98 1 47 0 0 66 5 251 1 68 684 0 893 0 1 0 99 2 0 0 0 53 3 251 2 68 734 0 1 0 1 0 99 3 0 0 0 482 336 578 2 72 686 0 0 0 1 0 99 4 0 0 0 63 11 298 1 86 665 0 0 0 1 0 99 5 0 0 0 49 2 247 1 88 633 0 33 0 1 0 99 6 0 0 0 59 2 613 1 66 698 0 0 0 1 0 99 7 0 0 0 51 2 320 1 70 756 0 0 0 1 0 99 March 12, 2026 at 10:48:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2367 228 374 3 76 503 0 967 0 1 0 99 1 0 0 0 57 3 262 2 53 581 0 600 0 1 0 99 2 0 0 0 41 1 243 3 64 500 0 0 0 1 0 99 3 0 0 0 440 336 304 0 72 519 0 0 0 1 0 99 4 0 0 0 93 26 306 0 66 499 0 2 0 1 0 99 5 0 0 0 40 1 259 1 65 475 1 294 0 1 0 99 6 0 0 0 57 1 921 1 73 543 0 0 0 1 0 99 7 0 0 0 40 0 249 1 83 594 0 0 0 1 0 99 March 12, 2026 at 10:48:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2336 211 344 1 35 253 0 1570 0 1 0 99 1 0 0 0 93 37 279 1 32 291 0 600 0 0 0 100 2 0 0 0 23 2 219 0 29 294 0 1 0 0 0 100 3 0 0 0 244 206 253 1 32 305 1 0 0 1 0 99 4 0 0 0 37 7 247 2 36 316 0 0 0 0 0 100 5 0 0 0 27 2 233 2 28 300 0 294 0 0 0 100 6 0 0 0 26 1 546 2 29 238 0 0 0 0 0 100 7 0 0 0 30 5 244 2 39 273 1 0 0 0 0 100 March 12, 2026 at 10:48:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2316 204 217 0 19 209 3 1567 0 1 0 99 1 0 0 0 35 4 143 0 16 201 2 614 0 0 0 100 2 0 0 0 19 5 209 0 22 169 6 7 0 0 0 100 3 0 0 0 152 88 216 0 15 190 2 0 0 0 0 100 4 0 0 0 23 8 122 0 21 222 3 11 0 0 0 100 5 0 0 0 13 1 102 0 13 205 2 294 0 0 0 100 6 0 0 0 10 2 116 0 15 176 4 0 0 0 0 100 7 0 0 0 13 1 97 0 14 140 3 0 0 0 0 100 March 12, 2026 at 10:48:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2615 0 336 2379 210 799 100 102 287 10 3253 17 3 0 81 1 3199 0 14 116 6 795 72 112 274 11 3013 12 2 0 86 2 2202 0 7 96 5 1031 81 143 190 17 2864 9 2 0 89 3 2834 0 0 198 68 815 80 125 368 16 2086 13 2 0 85 4 4358 0 9 117 10 645 52 122 295 21 2265 14 7 0 79 5 2156 0 1 112 7 421 59 67 271 14 1986 15 2 0 83 6 2990 0 0 103 2 820 73 124 309 12 2430 8 2 0 90 7 1043 0 2 94 4 513 17 60 224 11 1591 14 1 0 84 March 12, 2026 at 10:48:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 28 2321 206 147 2 2 1 0 1139 0 1 0 99 1 1 0 14 20 6 16 0 1 0 0 904 0 0 0 100 2 2 0 7 15 4 8 0 0 3 0 315 0 0 0 100 3 1 0 0 19 1 22 0 1 0 0 11 0 0 0 100 4 0 0 0 12 2 8 0 1 0 0 6 0 0 0 100 5 0 0 0 112 51 104 0 0 0 0 294 0 0 0 100 6 2 0 0 12 2 4 0 0 3 0 8 0 0 0 100 7 0 0 0 12 1 6 0 0 5 0 9 0 0 0 100 March 12, 2026 at 10:48:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 14 2318 208 168 1 1 0 0 1131 0 1 0 99 1 0 0 14 14 5 10 0 0 0 0 866 0 0 0 100 2 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 3 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 4 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 5 0 0 0 110 51 102 0 0 0 0 294 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 6 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:48:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2324 209 149 1 3 0 0 1130 0 1 0 99 1 0 0 14 68 32 88 0 2 0 0 866 0 0 0 100 2 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 3 0 0 0 17 1 12 0 0 0 0 0 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 0 52 22 44 0 1 0 0 294 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:48:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 582 0 15 2345 211 428 3 49 414 17 1576 0 2 0 98 1 2378 0 24 128 50 412 6 56 326 10 1395 2 1 0 97 2 376 0 25 49 8 324 3 68 447 10 742 0 2 0 98 3 54 0 14 88 55 290 1 49 461 11 369 0 1 0 99 4 2518 0 3 31 9 287 2 35 361 7 524 2 1 0 97 5 624 0 2 23 1 276 1 39 373 12 871 0 1 0 99 6 397 0 8 25 1 249 3 31 407 7 361 0 1 0 99 7 11 0 15 21 1 206 0 33 329 4 134 0 1 0 99 March 12, 2026 at 10:48:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 60 0 14 2320 205 108 2 4 34 0 1064 0 1 0 99 1 0 0 14 25 4 44 0 5 11 0 867 0 0 0 100 2 0 0 7 94 15 170 0 11 35 0 259 0 0 0 100 3 0 0 14 95 48 94 0 7 34 0 0 0 0 0 100 4 0 0 0 72 31 164 0 4 22 0 2 0 0 0 100 5 0 0 0 12 1 52 0 1 25 0 294 0 0 0 100 6 0 0 0 15 2 60 0 2 40 0 1 0 0 0 100 7 0 0 7 14 1 66 0 1 46 0 0 0 0 0 100 March 12, 2026 at 10:48:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 133 2315 207 147 1 4 2 0 1068 0 1 0 99 1 0 0 14 95 33 76 0 2 1 0 873 0 0 0 100 2 0 0 7 38 6 32 0 0 1 0 308 0 0 0 100 3 0 0 0 28 2 4 0 1 1 0 0 0 0 0 100 4 0 0 0 73 24 48 0 2 0 0 0 0 0 0 100 5 0 0 0 31 3 4 0 0 1 0 295 0 0 0 100 6 0 0 0 27 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 34 4 8 0 0 1 0 2 0 0 0 100 March 12, 2026 at 10:48:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2320 215 138 0 4 0 0 1042 0 1 0 99 1 0 0 14 102 31 96 0 3 0 0 883 0 0 0 100 2 0 0 7 43 17 42 0 1 0 0 278 0 0 0 100 3 0 0 14 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 0 14 2 6 0 0 0 0 2 0 0 0 100 5 0 0 0 10 1 2 0 0 0 0 294 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 14 2 6 0 0 0 0 1 0 0 0 100 March 12, 2026 at 10:48:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 92 0 70 2315 204 397 1 27 1 0 2229 1 1 0 98 1 114 0 14 110 49 276 0 16 2 0 2084 1 0 0 99 2 71 0 7 48 13 280 0 21 12 0 1395 1 0 0 99 3 79 0 0 16 1 239 1 15 5 0 1474 1 0 0 99 4 90 0 0 17 1 203 1 13 1 0 656 1 0 0 99 5 6 0 0 16 1 212 0 15 14 0 1566 1 0 0 99 6 30 0 0 16 1 188 0 13 0 0 1201 1 0 0 99 7 15 0 0 24 3 123 1 6 2 0 813 1 0 0 99 March 12, 2026 at 10:48:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 133 0 196 2343 206 1337 23 111 220 0 4835 3 2 0 95 1 200 0 14 84 8 996 35 106 218 0 5477 5 1 0 94 2 114 0 7 125 9 964 25 77 187 0 6271 4 1 0 95 3 83 0 0 126 67 875 11 75 213 0 4660 3 1 0 96 4 44 0 0 135 49 1116 13 55 198 0 4091 2 1 0 97 5 36 0 0 52 3 866 12 67 255 1 6744 3 1 0 97 6 132 0 0 48 2 781 9 45 239 0 6065 3 1 0 96 7 103 0 0 56 5 977 12 47 204 0 3206 2 1 0 97 March 12, 2026 at 10:48:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2313 203 198 1 2 7 0 1051 0 1 0 99 1 0 0 14 10 2 12 0 2 6 0 565 0 0 0 100 2 0 0 7 25 5 59 1 4 20 0 560 0 0 0 100 3 0 0 0 38 28 28 0 4 19 0 5 0 0 0 100 4 0 0 0 112 53 142 0 1 18 0 2 0 0 0 100 5 0 0 0 10 2 44 0 3 16 0 294 0 0 0 100 6 0 0 0 12 3 19 0 2 18 0 12 0 0 0 100 7 0 0 0 8 0 42 0 1 26 0 0 0 0 0 100 March 12, 2026 at 10:49:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 38 1 0 0 0 1047 0 0 0 99 1 0 0 14 105 16 103 0 5 0 0 567 0 0 0 100 2 0 0 7 75 30 72 0 1 0 0 560 0 0 0 100 3 0 0 0 19 6 14 0 1 0 0 5 0 0 0 100 4 0 0 0 56 12 48 0 2 1 0 2 0 0 0 100 5 0 0 0 11 2 24 1 1 0 0 294 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 14 2328 204 76 1 7 4 6 1135 0 1 0 99 1 1862 0 14 90 7 97 2 13 6 5 946 0 1 0 99 2 806 0 121 123 31 171 0 16 14 14 710 0 0 0 99 3 93 0 0 73 24 109 1 11 11 13 128 0 1 0 99 4 37 0 0 24 1 51 0 10 8 7 156 0 0 0 100 5 10 0 0 28 2 28 0 6 5 4 359 0 0 0 100 6 257 0 0 25 1 38 1 6 5 2 865 1 0 0 99 7 4 0 0 24 0 12 0 2 5 0 40 0 0 0 100 March 12, 2026 at 10:49:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 36 1 0 0 0 1134 0 0 0 99 1 0 0 14 12 3 8 0 0 0 0 567 0 0 0 100 2 0 0 7 62 20 63 0 4 0 0 566 0 0 0 100 3 6 0 0 111 7 118 0 4 0 0 371 0 0 0 100 4 30 0 0 72 33 72 0 1 0 0 6 0 0 0 100 5 13 0 0 10 2 10 0 1 1 0 299 0 0 0 100 6 394 0 0 18 6 15 0 0 0 0 45 0 0 0 99 7 0 0 0 8 0 4 0 1 0 0 10 0 0 0 100 March 12, 2026 at 10:49:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 289 0 56 2314 201 410 9 47 7 2 3250 1 1 0 98 1 5 0 14 19 2 336 5 49 1 0 2811 1 0 0 99 2 159 0 7 41 5 438 14 45 18 1 3085 1 0 0 99 3 21 0 0 120 7 420 8 40 10 0 2293 1 0 0 99 4 308 0 0 44 15 111 5 15 3 3 1625 2 1 0 98 5 188 0 0 102 43 566 5 40 5 0 2185 1 0 0 99 6 270 0 0 30 6 455 9 32 9 2 1949 1 0 0 99 7 55 0 0 25 1 501 7 40 6 0 2163 1 0 0 99 March 12, 2026 at 10:49:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2307 202 62 1 4 4 0 1147 0 0 0 99 1 0 0 14 12 2 8 0 2 5 0 323 0 0 0 100 2 0 0 7 35 8 28 0 2 11 0 873 0 0 0 100 3 0 0 0 101 16 98 0 4 1 0 4 0 0 0 100 4 0 0 0 12 2 9 0 2 0 0 7 0 0 0 100 5 1 0 0 54 7 50 0 4 0 0 302 0 0 0 100 6 0 0 0 74 33 74 0 1 1 0 10 0 0 0 100 7 1 0 0 18 3 10 0 0 1 0 9 0 0 0 100 March 12, 2026 at 10:49:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 132 0 0 1 0 1136 0 1 0 99 1 0 0 14 10 2 4 0 0 1 0 266 0 0 0 100 2 0 0 7 30 7 22 1 0 1 0 861 0 0 0 100 3 0 0 0 11 3 4 0 0 1 0 0 0 0 0 100 4 0 0 0 12 2 4 0 0 1 0 0 0 0 0 100 5 0 0 0 25 9 16 1 0 1 0 303 0 0 0 100 6 0 0 0 112 52 104 0 1 0 0 0 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:49:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 24 2310 201 144 1 7 21 0 1141 0 1 0 99 1 0 0 28 18 1 47 0 5 7 0 282 0 0 0 100 2 0 0 7 31 5 45 1 6 5 0 891 0 0 0 100 3 1 0 0 14 2 16 0 1 0 1 150 0 0 0 100 4 0 0 0 15 2 15 0 3 3 0 25 0 0 0 100 5 0 0 0 33 11 40 0 5 17 0 325 0 0 0 100 6 0 0 7 113 51 108 0 1 3 0 6 0 0 0 100 7 0 0 0 15 1 21 0 1 11 0 17 0 0 0 100 March 12, 2026 at 10:49:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 52 1 4 0 0 1049 0 1 0 99 1 0 0 14 106 44 104 1 5 1 0 267 0 0 0 100 2 0 0 7 27 5 26 1 1 0 0 860 0 0 0 100 3 0 0 0 12 2 22 0 1 0 0 0 0 0 0 100 4 0 0 0 13 2 6 0 1 0 0 1 0 0 0 100 5 1 0 0 26 8 16 1 0 0 0 304 0 0 0 100 6 0 0 0 107 10 98 0 5 1 0 3 0 0 0 100 7 0 0 7 10 0 6 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:49:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2329 201 341 1 12 113 0 1052 0 1 0 99 1 10 0 14 129 52 192 0 9 127 0 292 0 0 0 99 2 0 0 119 28 6 103 0 8 107 0 860 0 0 0 100 3 0 0 0 87 61 157 0 9 186 0 0 0 0 0 100 4 0 0 0 40 11 90 0 8 125 0 10 0 0 0 100 5 0 0 0 45 11 180 0 3 124 0 311 0 0 0 100 6 4 0 0 31 4 99 0 7 134 0 24 0 0 0 100 7 0 0 0 29 0 87 0 7 137 0 8 0 0 0 100 March 12, 2026 at 10:49:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 204 153 0 3 3 0 1045 0 1 0 99 1 0 0 21 82 36 82 0 3 1 0 266 0 0 0 100 2 0 0 7 51 17 52 1 1 1 0 859 0 0 0 100 3 0 0 0 18 8 36 0 0 8 0 0 0 0 0 100 4 0 0 0 11 1 10 0 0 4 0 0 0 0 0 100 5 0 0 0 24 8 28 1 0 5 0 303 0 0 0 100 6 0 0 0 11 2 14 0 0 2 0 1 0 0 0 100 7 0 0 0 11 1 10 0 1 3 0 1 0 0 0 100 March 12, 2026 at 10:49:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 40 0 252 2342 205 1073 21 96 11 0 7594 5 2 0 93 1 7 0 14 124 36 969 12 69 16 1 6744 4 1 0 95 2 43 0 7 114 20 1165 20 75 13 0 5736 4 1 0 95 3 18 0 0 62 4 1005 10 55 4 0 5797 3 1 0 96 4 35 0 0 57 3 852 6 42 5 1 6494 3 1 0 96 5 31 0 0 59 6 885 5 32 3 0 5552 2 1 0 97 6 21 0 0 62 7 747 8 33 10 0 4009 3 1 0 96 7 40 0 0 55 1 818 11 34 17 0 5065 4 1 0 95 March 12, 2026 at 10:49:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 207 138 1 3 0 0 1046 0 1 0 99 1 0 0 14 59 23 52 1 3 0 0 266 0 0 0 100 2 8 0 7 78 31 74 1 1 0 0 906 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 0 10 2 6 0 0 0 0 11 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2500 0 14 2320 201 141 3 9 6 8 2268 2 1 0 97 1 806 0 128 24 2 85 0 12 12 17 449 0 0 0 99 2 118 0 7 97 26 139 0 9 10 17 988 0 0 0 100 3 33 0 0 45 9 96 0 13 7 10 129 0 0 0 100 4 18 0 0 78 28 100 0 7 5 5 140 0 0 0 100 5 10 0 0 29 3 34 1 7 8 4 351 0 0 0 100 6 28 0 0 24 1 38 0 7 9 3 83 0 0 0 100 7 7 0 0 32 4 32 0 4 1 2 89 0 0 0 100 March 12, 2026 at 10:49:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2313 201 227 1 13 174 0 1136 0 1 0 99 1 0 0 14 15 3 114 0 11 200 0 267 0 0 0 100 2 0 0 7 43 14 256 0 16 195 0 574 0 0 0 100 3 0 0 0 69 58 102 1 12 197 0 300 0 0 0 100 4 0 0 0 119 55 237 0 14 140 0 29 0 0 0 100 5 0 0 0 26 5 119 0 14 199 0 294 0 0 0 100 6 0 0 0 10 1 123 0 11 189 0 11 0 0 0 100 7 0 0 0 12 0 164 0 11 250 0 8 0 0 0 100 March 12, 2026 at 10:49:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2325 214 168 1 3 16 0 1136 0 1 0 99 1 0 0 14 46 21 62 0 1 13 0 266 0 0 0 100 2 0 0 7 29 7 89 0 2 16 0 879 0 0 0 100 3 0 0 0 36 26 24 0 2 16 0 300 0 0 0 100 4 0 0 0 70 23 92 0 3 16 0 17 0 0 0 100 5 0 0 0 10 2 24 0 1 12 0 295 0 0 0 100 6 0 0 0 10 2 34 0 0 16 0 1 0 0 0 100 7 0 0 0 10 1 50 0 0 21 0 2 0 0 0 100 March 12, 2026 at 10:49:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 208 145 1 3 1 0 1153 0 1 0 99 1 0 0 14 55 24 48 1 3 0 0 266 0 0 0 100 2 0 0 7 74 32 68 1 2 1 0 562 0 0 0 100 3 0 0 0 19 4 12 0 2 1 0 300 0 0 0 100 4 0 0 0 14 3 8 0 1 2 0 11 0 0 0 100 5 0 0 0 14 4 26 0 1 1 0 295 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:49:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 45 0 84 2327 205 516 11 54 13 0 3316 1 1 0 98 1 63 0 14 19 1 508 4 40 3 0 2716 1 0 0 99 2 305 0 7 55 15 319 7 31 6 1 2291 1 0 0 98 3 254 0 7 117 44 422 7 48 6 0 2408 1 0 0 99 4 62 0 0 32 4 413 10 46 3 0 2390 1 0 0 99 5 16 0 0 30 3 327 8 42 7 0 2587 1 0 0 99 6 170 0 0 22 1 255 1 30 15 0 1955 2 0 0 98 7 195 0 0 26 2 448 8 35 7 1 1772 1 0 0 99 March 12, 2026 at 10:49:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 202 140 0 1 0 0 1136 0 1 0 99 1 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 2 0 0 7 17 5 12 0 0 0 0 561 0 0 0 100 3 0 0 0 116 52 108 1 1 0 0 300 0 0 0 100 4 0 0 0 20 7 14 0 0 0 0 10 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 1 0 0 0 100 7 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2319 204 282 1 19 135 0 1147 0 1 0 99 1 0 0 14 66 26 178 0 12 135 0 287 0 0 0 100 2 0 0 21 26 8 252 0 10 148 0 567 0 0 0 100 3 0 0 0 136 91 189 0 13 144 0 325 0 0 0 100 4 0 0 0 40 16 146 0 12 140 0 49 0 0 0 100 5 0 0 0 16 2 132 1 8 158 0 315 0 0 0 100 6 0 0 0 15 1 132 0 9 135 1 167 0 0 0 100 7 1 0 10 18 0 162 0 12 188 0 15 0 1 0 99 March 12, 2026 at 10:49:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 203 50 1 2 1 0 1049 0 1 0 99 1 0 0 21 101 31 120 1 10 0 0 266 0 0 0 100 2 0 0 7 121 23 118 1 8 1 0 561 0 0 0 100 3 0 0 0 23 9 20 0 0 0 0 309 0 0 0 100 4 0 0 0 9 1 4 0 0 1 0 0 0 0 0 100 5 0 0 0 13 3 6 0 0 0 0 295 0 0 0 100 6 0 0 0 11 2 6 0 1 3 0 1 0 0 0 100 7 0 0 0 9 0 4 0 1 3 0 0 0 0 0 100 March 12, 2026 at 10:49:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2323 201 38 1 1 0 0 1047 0 1 0 99 1 0 0 14 124 8 104 0 7 0 0 266 0 0 0 100 2 0 0 7 70 15 48 0 9 0 0 560 0 0 0 100 3 0 0 112 89 41 88 0 2 0 0 309 0 0 0 100 4 0 0 0 32 5 12 0 1 0 0 8 0 0 0 100 5 0 0 0 27 2 4 1 0 0 0 293 0 0 0 100 6 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 26 1 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 138 1 0 0 0 1046 0 1 0 99 1 0 0 14 111 48 108 0 2 1 0 266 0 0 0 100 2 0 0 14 19 5 32 0 2 1 0 559 0 0 0 100 3 0 0 0 31 11 22 1 1 0 0 309 0 0 0 100 4 0 0 0 13 2 6 0 0 0 0 1 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 238 2330 202 1103 18 105 10 1 6332 4 2 0 94 1 2 0 14 93 18 1003 12 77 11 0 7466 4 1 0 95 2 39 0 7 78 8 854 9 70 22 0 6420 4 1 0 95 3 32 0 0 64 7 997 9 69 6 0 5687 4 1 0 95 4 3 0 0 68 6 923 11 62 9 0 5930 3 1 0 96 5 19 0 0 101 29 848 7 40 8 1 6220 4 1 0 96 6 66 0 0 125 9 1090 10 53 6 0 4334 4 1 0 95 7 12 0 0 50 0 811 8 43 9 0 4798 3 1 0 96 March 12, 2026 at 10:49:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 201 151 1 14 216 0 1050 0 1 0 99 1 0 0 14 13 3 113 1 13 217 0 267 0 0 0 100 2 0 0 7 18 5 125 1 12 201 0 559 0 0 0 100 3 0 0 0 66 58 223 0 16 197 0 300 0 0 0 100 4 0 0 0 21 9 136 0 15 209 0 13 0 0 0 100 5 0 0 0 110 52 225 0 12 211 0 307 0 0 0 100 6 0 0 0 114 4 225 0 9 237 0 11 0 0 0 100 7 0 0 0 20 5 182 0 13 234 0 16 0 0 0 100 March 12, 2026 at 10:49:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 201 141 1 5 24 0 1045 0 1 0 99 1 0 0 14 6 1 40 0 2 13 0 266 0 0 0 100 2 0 0 7 17 5 40 0 0 24 0 561 0 0 0 100 3 0 0 0 52 43 134 0 2 13 0 300 0 0 0 100 4 0 0 0 18 5 46 0 2 23 0 5 0 0 0 100 5 0 0 0 111 50 142 0 3 19 0 304 0 0 0 100 6 0 0 0 52 4 102 0 5 19 0 1 0 0 0 100 7 0 0 0 16 4 42 0 2 19 0 5 0 0 0 100 March 12, 2026 at 10:49:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 205 147 1 3 3 0 1047 0 1 0 99 1 0 0 14 58 27 56 0 1 1 0 266 0 0 0 100 2 0 0 7 21 7 16 0 1 1 0 560 0 0 0 100 3 0 0 0 13 3 26 0 0 1 0 300 0 0 0 100 4 0 0 0 16 4 8 0 0 1 0 3 0 0 0 100 5 0 0 0 63 25 54 1 2 0 0 305 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 17 5 7 0 0 1 0 4 0 0 0 100 March 12, 2026 at 10:49:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 52 1 0 0 0 1051 0 1 0 99 1 0 0 14 118 47 122 0 3 0 0 281 0 0 0 100 2 0 0 7 103 14 104 0 2 0 0 578 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 16 4 10 0 0 0 0 7 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 304 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 14 3 9 0 0 0 0 320 0 0 0 100 March 12, 2026 at 10:49:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 64 0 2 0 0 1046 0 1 0 99 1 0 0 14 82 26 75 1 6 0 0 271 0 0 0 100 2 0 0 7 83 29 77 1 6 0 0 561 0 0 0 100 3 0 0 0 58 7 52 1 5 1 0 300 0 0 0 100 4 0 0 0 10 1 24 0 1 0 0 0 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 304 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 1 0 0 0 100 7 0 0 0 10 0 4 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:49:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 138 1 0 0 0 1050 0 1 0 99 1 28 0 14 20 4 16 0 1 0 0 278 0 0 0 100 2 0 0 7 127 60 128 0 0 0 0 573 0 0 0 100 3 0 0 0 9 2 6 0 0 1 0 300 0 0 0 100 4 0 0 0 35 15 27 0 0 3 0 15 0 0 0 100 5 0 0 0 13 3 42 1 1 3 0 340 0 0 0 100 6 0 0 0 8 1 14 0 0 3 0 14 0 0 0 100 7 0 0 0 10 0 20 0 0 3 0 10 0 0 0 100 March 12, 2026 at 10:49:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 203 133 1 3 0 0 1047 0 1 0 99 1 0 0 14 68 28 66 0 1 0 0 266 0 0 0 100 2 0 0 7 63 27 56 0 2 0 0 561 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 16 2 11 0 0 0 0 1 0 0 0 100 5 0 0 0 12 3 8 0 0 0 0 305 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 14 3 10 0 2 0 0 5 0 0 0 100 March 12, 2026 at 10:49:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 208 160 0 5 0 0 1058 0 1 0 99 1 0 0 14 54 23 48 0 2 0 0 266 0 0 0 100 2 0 0 7 69 31 66 0 1 0 0 560 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 16 4 10 0 0 0 0 7 0 0 0 100 5 0 0 0 12 2 8 0 0 1 0 304 0 0 0 100 6 0 0 0 8 1 22 0 1 1 0 0 0 0 0 100 7 0 0 0 16 4 10 0 0 0 0 320 0 0 0 100 March 12, 2026 at 10:49:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 208 151 1 3 1 0 1050 0 1 0 99 1 0 0 14 59 27 56 1 1 0 0 266 0 0 0 100 2 0 0 7 64 26 56 1 2 0 0 560 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 304 0 0 0 100 6 0 0 0 10 1 24 0 0 0 0 0 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 205 62 2 1 0 0 1051 0 1 0 99 1 0 0 14 108 41 104 0 6 0 0 267 0 0 0 100 2 7 0 7 99 15 94 0 4 0 0 560 0 0 0 100 3 20 0 0 13 4 10 0 1 0 0 305 0 0 0 100 4 20 0 0 20 6 14 0 0 0 0 10 0 0 0 100 5 0 0 0 11 2 6 1 0 0 0 304 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 209 60 1 0 0 0 1056 0 1 0 99 1 0 0 14 108 2 106 0 1 0 0 270 0 0 0 100 2 0 0 7 17 5 12 0 0 0 0 559 0 0 0 100 3 0 0 0 109 52 106 0 0 1 0 300 0 0 0 100 4 0 0 0 25 11 20 0 0 1 0 19 0 0 0 100 5 0 0 0 12 3 14 0 0 1 0 307 0 0 0 100 6 0 0 0 10 1 12 0 0 4 0 6 0 0 0 100 7 0 0 0 10 0 36 0 1 2 0 7 0 0 0 100 March 12, 2026 at 10:49:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2317 205 72 1 1 0 0 1364 0 1 0 99 1 0 0 14 106 38 108 0 4 0 0 271 0 0 0 100 2 0 0 7 17 5 12 0 1 0 0 561 0 0 0 100 3 0 0 0 89 5 82 0 3 0 0 300 0 0 0 100 4 0 0 0 40 16 36 0 1 0 0 7 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 304 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 18 4 14 0 0 1 0 6 0 0 0 100 March 12, 2026 at 10:49:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2303 202 42 0 0 1 0 1062 0 1 0 99 1 0 0 14 21 2 12 1 0 1 0 266 0 0 0 100 2 0 0 7 22 7 14 1 0 1 0 560 0 0 0 100 3 0 0 0 11 3 4 0 0 1 0 300 0 0 0 100 4 0 0 0 113 33 106 0 5 1 0 0 0 0 0 100 5 0 0 0 100 23 98 0 7 0 0 305 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 17 5 8 0 0 1 0 5 0 0 0 100 March 12, 2026 at 10:49:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 42 1 0 1 0 1042 0 1 0 99 1 0 0 14 6 1 4 0 1 0 0 266 0 0 0 100 2 0 0 7 17 5 28 0 1 0 0 561 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 117 54 111 0 1 0 0 7 0 0 0 100 5 0 0 0 108 2 104 0 1 0 0 304 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 14 3 8 0 0 0 0 4 0 0 0 100 March 12, 2026 at 10:49:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 134 1 1 0 0 1042 0 1 0 99 1 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 2 0 0 7 19 5 14 0 0 4 0 560 0 0 0 100 3 0 0 0 9 2 6 0 1 0 0 300 0 0 0 100 4 0 0 0 112 52 122 0 1 1 0 1 0 0 0 100 5 0 0 0 23 2 20 1 1 0 0 303 0 0 0 100 6 0 0 0 12 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 21 5 14 1 0 0 0 6 0 0 0 100 March 12, 2026 at 10:49:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 14 2327 201 192 1 12 10 7 1163 0 1 0 99 1 9 0 14 121 50 131 0 7 2 2 348 0 0 0 100 2 17 0 7 33 5 55 0 5 7 7 668 0 0 0 100 3 649 0 0 26 2 24 1 2 5 5 1177 1 0 0 98 4 5 0 0 74 18 65 0 4 3 3 70 0 0 0 100 5 2655 0 115 16 3 76 2 4 5 17 756 1 1 0 99 6 111 0 0 29 3 87 0 11 5 16 226 0 0 0 100 7 59 0 3 32 3 76 0 9 12 9 490 0 0 0 100 March 12, 2026 at 10:49:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 206 144 1 3 0 0 1129 0 1 0 99 1 0 0 14 67 27 62 1 3 0 0 271 0 0 0 100 2 0 0 7 64 28 60 1 1 0 0 559 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 12 2 8 0 0 1 0 304 0 0 0 100 6 0 0 0 10 2 24 0 1 0 0 1 0 0 0 100 7 0 0 0 10 0 2 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:49:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 140 1 0 0 0 1125 0 1 0 99 1 0 0 14 16 6 12 0 0 0 0 273 0 0 0 100 2 0 0 7 117 55 112 0 0 0 0 561 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 0 11 2 6 1 0 0 0 304 0 0 0 100 6 0 0 0 12 2 6 0 0 1 0 1 0 0 0 100 7 0 0 0 8 0 22 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:49:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 142 1 0 0 0 1125 0 1 0 99 1 0 0 14 14 5 10 0 0 0 0 271 0 0 0 100 2 0 0 7 117 55 112 0 0 0 0 560 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 304 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 204 170 2 2 0 0 1131 0 1 0 99 1 0 0 14 16 6 12 0 0 0 0 587 0 0 0 100 2 0 0 7 117 55 114 0 0 0 0 565 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 304 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 0 4 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:49:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2324 211 170 1 0 2 0 1141 0 1 0 99 1 0 0 14 9 2 28 1 1 0 0 268 0 0 0 100 2 0 0 7 115 55 112 0 0 0 0 562 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 18 9 12 0 0 0 0 14 0 0 0 100 5 0 0 0 12 3 14 0 0 0 0 307 0 0 0 100 6 0 0 0 14 3 12 0 0 0 0 10 0 0 0 100 7 0 0 0 10 0 14 0 0 1 0 7 0 0 0 100 March 12, 2026 at 10:49:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 204 66 0 1 0 0 1128 0 1 0 99 1 2 0 14 8 1 4 0 1 0 0 282 0 0 0 100 2 0 0 7 117 17 111 1 2 0 0 560 0 0 0 100 3 0 0 0 86 40 82 1 1 0 0 300 0 0 0 100 4 0 0 0 16 5 10 0 0 0 0 5 0 0 0 100 5 0 0 0 11 2 6 1 0 0 0 304 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 205 50 1 1 1 0 1131 0 1 0 99 1 1 0 14 10 2 8 0 3 2 0 266 0 0 0 100 2 0 0 7 119 7 132 0 2 2 0 561 0 0 0 100 3 0 0 0 111 53 104 0 0 0 0 300 0 0 0 100 4 0 0 0 12 2 4 0 0 1 0 0 0 0 0 100 5 0 0 0 14 4 8 0 0 1 0 305 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:49:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 206 46 2 0 0 0 1446 0 1 0 99 1 0 0 14 18 6 20 0 2 0 0 272 0 0 0 100 2 0 0 7 78 33 76 0 2 3 0 565 0 0 0 100 3 0 0 0 107 3 124 0 4 0 0 300 0 0 0 100 4 0 0 0 50 22 46 0 1 0 0 2 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 304 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 56 1 2 0 0 1126 0 0 0 99 1 0 0 14 20 6 14 1 0 0 0 271 0 0 0 100 2 0 0 7 19 4 12 0 1 0 0 560 0 0 0 100 3 0 0 0 93 2 90 0 0 0 0 300 0 0 0 100 4 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 304 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 171 0 88 2324 202 556 15 37 162 0 2716 2 1 0 97 1 91 0 14 47 9 684 13 70 188 0 2348 1 1 0 98 2 66 0 7 35 4 352 11 37 156 1 2360 2 1 0 98 3 343 0 0 104 66 433 7 40 147 0 2399 1 1 0 99 4 81 0 0 71 26 547 9 47 168 0 2206 1 1 0 98 5 31 0 0 42 7 410 12 57 184 0 2471 1 1 0 98 6 54 0 0 85 31 629 11 48 162 0 1976 1 0 0 99 7 270 0 0 31 1 438 9 31 201 0 2110 1 1 0 98 March 12, 2026 at 10:49:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 201 318 0 7 46 0 1138 0 1 0 99 1 0 0 14 112 53 178 0 4 36 0 267 0 0 0 100 2 0 0 7 19 4 67 0 6 32 0 560 0 0 0 100 3 0 0 0 88 71 114 0 3 45 0 309 0 0 0 100 4 0 0 0 11 2 66 0 2 40 0 1 0 0 0 100 5 0 0 0 15 2 106 1 2 51 0 294 0 0 0 100 6 0 0 0 10 2 76 0 1 46 0 1 0 0 0 100 7 0 0 0 8 0 64 0 3 37 0 0 0 0 0 100 March 12, 2026 at 10:49:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 201 61 1 1 3 0 1148 0 1 0 99 1 0 0 14 97 13 104 0 7 10 0 288 0 0 0 100 2 0 0 15 102 33 106 0 5 8 0 569 0 1 0 99 3 0 0 14 47 19 59 1 5 8 0 340 0 0 0 100 4 1 0 7 17 3 21 1 4 7 0 16 0 0 0 100 5 0 0 0 16 2 16 0 5 12 0 317 0 0 0 100 6 0 0 0 13 1 26 0 3 9 2 150 0 0 0 100 7 0 0 0 14 1 15 0 3 8 0 17 0 0 0 100 March 12, 2026 at 10:49:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 207 107 1 6 0 0 1051 0 1 0 99 1 0 0 14 58 25 54 1 1 0 0 266 0 0 0 100 2 0 0 7 54 4 45 0 1 0 0 559 0 0 0 100 3 0 0 0 80 32 72 0 3 0 0 311 0 0 0 100 4 0 0 0 11 1 6 0 1 0 0 0 0 0 0 100 5 0 0 7 12 2 8 0 1 1 0 294 0 0 0 100 6 0 0 0 9 1 22 0 1 1 0 0 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 201 142 1 0 0 0 1048 0 1 0 99 1 0 0 14 134 56 116 0 1 0 0 275 0 0 0 100 2 0 0 7 32 5 12 1 0 0 0 562 0 0 0 100 3 0 0 0 40 7 18 1 1 0 0 309 0 0 0 100 4 0 0 112 10 2 6 0 0 0 0 2 0 0 0 100 5 0 0 0 29 2 6 1 1 0 0 294 0 0 0 100 6 0 0 0 28 2 8 0 2 1 0 1 0 0 0 100 7 0 0 0 24 0 24 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:49:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 70 0 2 1 0 1048 0 1 0 99 1 0 0 14 117 53 118 0 3 4 0 291 0 0 0 100 2 0 0 7 18 6 14 0 1 1 0 562 0 0 0 100 3 0 0 7 31 11 36 0 2 6 0 318 0 0 0 100 4 0 0 0 18 6 22 0 1 2 0 18 0 0 0 100 5 0 0 0 11 2 8 0 1 1 0 294 0 0 0 100 6 0 0 0 15 3 14 0 1 2 0 7 0 0 0 100 7 0 0 0 94 3 96 0 3 2 0 8 0 0 0 100 March 12, 2026 at 10:49:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 252 2329 202 1425 22 125 13 0 6945 5 2 0 94 1 17 0 0 115 27 1228 26 107 12 0 7044 5 1 0 94 2 5 0 7 106 6 1296 16 97 26 0 6717 4 1 0 95 3 5 0 14 71 9 1072 16 70 6 0 7378 4 1 0 95 4 34 0 0 60 4 885 15 49 20 1 6524 4 1 0 95 5 6 0 0 102 25 1066 12 50 19 0 5363 3 1 0 96 6 1 0 0 57 2 959 7 58 20 0 6150 4 1 0 95 7 5 0 0 110 4 719 15 41 9 0 6519 3 1 0 96 March 12, 2026 at 10:49:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 202 44 1 2 1 0 1068 0 1 0 99 1 0 0 0 10 1 2 0 1 1 0 0 0 0 0 100 2 0 0 7 119 7 114 0 2 1 0 560 0 0 0 100 3 0 0 14 14 4 10 1 1 1 0 565 0 0 0 100 4 0 0 0 10 2 18 0 1 1 0 0 0 0 0 100 5 1 0 0 28 11 18 0 0 1 0 300 0 0 0 100 6 0 0 0 104 49 100 0 2 1 0 10 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:49:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 14 2327 201 102 1 7 6 3 1113 0 1 0 99 1 649 0 0 32 3 27 1 1 5 3 904 1 0 0 99 2 2657 0 126 68 5 125 3 2 5 15 1032 1 1 0 99 3 126 0 14 82 28 124 1 11 10 14 739 0 0 0 100 4 56 0 2 29 3 54 0 8 9 8 151 0 0 0 100 5 10 0 0 36 6 56 1 8 5 7 391 0 0 0 100 6 10 0 0 89 26 89 0 6 7 2 91 0 0 0 100 7 8 0 0 25 0 18 0 2 6 4 50 0 0 0 100 March 12, 2026 at 10:49:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 202 68 1 1 0 0 1134 0 1 0 99 1 0 0 0 84 37 82 0 2 0 0 0 0 0 0 100 2 0 0 7 15 5 10 0 0 0 0 560 0 0 0 100 3 0 0 14 111 16 108 0 2 0 0 566 0 0 0 100 4 4 0 0 14 2 8 0 0 2 0 2 0 0 0 100 5 0 0 0 20 7 32 0 1 0 0 300 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 7 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:49:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 202 168 0 12 204 0 1137 0 1 0 99 1 0 0 0 109 22 228 0 24 191 0 1 0 0 0 100 2 0 0 7 17 6 214 0 16 190 0 559 0 0 0 100 3 0 0 14 82 62 131 0 10 219 0 276 0 0 0 100 4 0 0 0 69 28 175 0 13 251 0 315 0 0 0 100 5 0 0 0 64 15 176 0 17 204 0 617 0 0 0 100 6 0 0 0 12 1 138 1 11 224 0 19 0 0 0 100 7 0 0 0 10 0 111 0 11 177 0 10 0 0 0 100 March 12, 2026 at 10:49:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 202 182 1 3 28 0 1132 0 1 0 99 1 0 0 0 8 0 54 0 2 25 0 0 0 0 0 100 2 0 0 7 115 55 222 0 4 13 0 560 0 0 0 100 3 0 0 14 66 52 64 1 4 24 0 272 0 0 0 100 4 0 0 0 10 2 50 0 4 32 0 300 0 0 0 100 5 0 0 0 10 2 54 0 4 22 0 294 0 0 0 100 6 0 0 0 10 2 67 0 2 30 0 11 0 0 0 100 7 0 0 0 8 0 52 0 2 27 0 0 0 0 0 100 March 12, 2026 at 10:50:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 206 0 84 2310 202 498 12 58 19 2 3425 1 1 0 98 1 71 0 2 26 1 394 4 46 10 0 1985 1 0 0 98 2 172 0 7 128 29 485 3 33 4 2 2566 2 0 0 98 3 127 0 14 38 7 360 3 29 6 1 2528 2 0 0 98 4 79 0 0 31 6 362 5 31 5 0 2563 1 0 0 99 5 107 0 0 25 3 342 6 39 8 0 2302 1 0 0 99 6 36 0 0 24 3 536 2 46 5 0 2177 1 0 0 99 7 317 0 0 71 26 407 4 38 7 1 2029 1 0 0 99 March 12, 2026 at 10:50:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 202 42 1 1 1 0 1142 0 1 0 99 1 0 0 0 12 2 30 0 1 1 0 4 0 0 0 100 2 0 0 7 99 10 92 0 4 0 0 561 0 0 0 100 3 0 0 14 31 10 30 0 1 0 0 266 0 0 0 100 4 0 0 0 13 2 4 1 0 0 0 300 0 0 0 100 5 0 0 0 11 2 4 1 0 0 0 294 0 0 0 100 6 0 0 0 20 7 14 0 0 0 0 9 0 0 0 100 7 0 0 0 108 37 102 0 4 0 0 0 0 0 0 100 March 12, 2026 at 10:50:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2310 202 119 1 5 0 0 1188 0 1 0 99 1 2 0 0 51 1 63 0 5 16 0 15 0 0 0 100 2 0 0 14 20 5 26 0 8 11 0 566 0 0 0 100 3 0 0 14 23 7 25 0 5 10 0 266 0 0 0 100 4 0 0 0 106 48 120 0 4 3 1 457 0 0 0 100 5 0 0 0 18 3 16 0 5 7 0 304 0 0 0 100 6 0 0 9 31 8 26 0 1 6 0 25 0 1 0 99 7 1 0 0 24 2 42 1 6 17 0 22 0 0 0 100 March 12, 2026 at 10:50:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 204 111 0 10 106 0 1056 0 1 0 99 1 0 0 0 115 34 167 0 18 88 0 0 0 0 0 100 2 0 0 7 18 5 131 0 10 88 0 564 0 0 0 100 3 0 0 21 37 27 67 1 11 123 0 266 0 0 0 100 4 0 0 0 50 12 100 0 12 107 0 305 0 0 0 100 5 0 0 0 79 15 134 0 13 121 0 294 0 0 0 100 6 0 0 0 13 3 84 0 7 108 0 14 0 0 0 100 7 0 0 0 23 6 78 0 9 86 0 12 0 0 0 100 March 12, 2026 at 10:50:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2336 207 96 1 5 29 0 1056 0 1 0 99 1 0 0 0 52 2 74 0 6 42 0 0 0 0 0 100 2 0 0 7 114 32 140 1 4 32 0 561 0 0 0 100 3 0 0 14 70 45 78 0 3 39 0 266 0 0 0 100 4 0 0 112 12 3 132 0 6 14 0 302 0 0 0 100 5 0 0 0 126 23 163 0 9 27 0 294 0 0 0 100 6 0 0 0 27 2 69 0 5 35 0 1 0 0 0 100 7 0 0 0 29 2 62 0 4 29 0 2 0 0 0 100 March 12, 2026 at 10:50:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2323 210 56 2 2 1 0 1061 0 1 0 99 1 0 0 0 19 1 10 0 0 1 0 0 0 0 0 100 2 0 0 7 120 7 112 0 1 1 0 561 0 0 0 100 3 0 0 14 10 3 4 0 0 1 0 266 0 0 0 100 4 0 0 0 15 3 6 0 0 1 0 300 0 0 0 100 5 0 0 0 116 54 108 1 0 0 0 298 0 0 0 100 6 0 0 0 13 3 4 0 0 1 0 1 0 0 0 100 7 0 0 0 10 1 0 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:50:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 266 2347 207 1166 26 109 20 0 7713 5 2 0 93 1 4 0 0 73 0 1179 21 91 3 0 5481 4 1 0 95 2 17 0 7 137 33 1213 13 78 9 0 6687 4 1 0 95 3 28 0 14 67 3 1125 19 64 15 0 5528 4 1 0 95 4 26 0 0 77 3 1116 7 44 18 0 6666 3 1 0 96 5 6 0 0 131 10 871 9 38 14 0 8263 4 1 0 95 6 37 0 0 51 1 981 7 34 12 0 5507 3 1 0 96 7 37 0 0 85 16 834 7 33 14 0 7068 4 1 0 95 March 12, 2026 at 10:50:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 203 144 1 0 1 0 1057 0 1 0 99 1 0 0 0 18 1 10 0 0 0 0 0 0 0 0 100 2 0 0 7 15 4 10 0 0 0 0 559 0 0 0 100 3 0 0 14 12 3 24 1 0 0 0 266 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 295 0 0 0 100 6 0 0 0 20 7 12 0 0 0 0 6 0 0 0 100 7 0 0 0 110 50 102 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 202 473 1 29 188 0 1058 0 1 0 99 1 0 0 0 18 0 166 0 23 207 0 0 0 0 0 100 2 0 0 7 18 5 184 1 13 198 0 561 0 0 0 100 3 0 0 14 100 94 179 0 17 251 0 269 0 0 0 100 4 0 0 0 21 8 175 0 16 220 0 307 0 0 0 100 5 0 0 0 11 2 148 1 13 222 0 294 0 0 0 100 6 0 0 0 24 9 180 0 11 216 0 27 0 0 0 100 7 0 0 0 112 50 289 0 11 238 0 9 0 0 0 100 March 12, 2026 at 10:50:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 53 1 0 0 0 1057 0 1 0 99 1 0 0 0 70 21 66 0 6 1 0 0 0 0 0 100 2 0 0 7 116 11 114 0 6 0 0 559 0 0 0 100 3 0 0 14 59 30 56 0 2 1 0 266 0 0 0 100 4 0 0 0 10 2 32 0 1 1 0 300 0 0 0 100 5 0 0 0 10 2 6 0 1 3 0 294 0 0 0 100 6 0 0 0 20 7 18 0 0 2 0 6 0 0 0 100 7 0 0 0 8 0 12 0 3 3 0 0 0 0 0 100 March 12, 2026 at 10:50:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 40 0 0 0 0 1053 0 1 0 99 1 0 0 0 18 1 12 0 0 0 0 1 0 0 0 100 2 0 0 7 117 16 116 0 1 0 0 565 0 0 0 100 3 0 0 14 107 40 104 0 2 0 0 266 0 0 0 100 4 0 0 0 15 3 8 1 0 0 0 302 0 0 0 100 5 0 0 0 10 2 24 0 1 0 0 294 0 0 0 100 6 0 0 0 24 9 20 0 0 0 0 327 0 0 0 100 7 0 0 0 18 5 12 0 0 0 0 9 0 0 0 100 March 12, 2026 at 10:50:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 38 1 0 0 0 1058 0 0 0 99 1 0 0 0 16 0 10 0 0 0 0 0 0 0 0 100 2 0 0 7 125 15 120 0 2 0 0 565 0 0 0 100 3 0 0 14 108 46 104 1 1 0 0 266 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2517 0 14 2325 201 149 4 15 13 14 2283 2 1 0 97 1 43 0 0 72 13 275 0 22 9 11 477 0 0 0 100 2 9 0 7 52 12 61 1 9 5 6 633 0 0 0 100 3 9 0 14 35 4 39 0 6 6 5 318 0 0 0 100 4 25 0 0 113 36 124 0 10 5 3 410 0 0 0 100 5 6 0 0 40 6 39 0 7 7 2 350 0 0 0 100 6 801 0 116 8 1 51 0 7 5 11 169 0 0 0 99 7 115 0 0 32 3 86 1 10 4 13 195 0 0 0 100 March 12, 2026 at 10:50:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2325 212 168 2 6 1 0 1143 0 1 0 99 1 0 0 0 72 28 74 0 2 3 0 10 0 0 0 100 2 0 0 7 59 22 54 0 3 0 0 562 0 0 0 100 3 0 0 14 7 2 6 0 0 0 0 269 0 0 0 100 4 0 0 0 21 8 14 0 0 1 0 305 0 0 0 100 5 0 0 0 15 2 10 1 0 1 0 294 0 0 0 100 6 0 0 0 12 3 20 0 0 2 0 18 0 0 0 100 7 0 0 0 12 0 14 0 1 4 0 7 0 0 0 100 March 12, 2026 at 10:50:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 209 150 0 3 0 0 1460 0 1 0 99 1 0 0 0 62 22 60 0 4 0 0 15 0 0 0 100 2 0 0 7 67 30 68 0 1 0 0 562 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 203 64 1 0 1 0 1152 0 1 0 99 1 0 0 0 18 1 34 0 2 2 0 10 0 0 0 100 2 0 0 7 136 29 131 0 2 0 0 572 0 0 0 100 3 0 0 14 78 37 76 1 2 1 0 269 0 0 0 100 4 0 0 0 12 3 6 0 1 1 0 299 0 0 0 100 5 0 0 0 14 4 6 0 0 1 0 295 0 0 0 100 6 0 0 0 10 2 4 0 0 1 0 0 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:50:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 34 1 1 0 0 1131 0 1 0 99 1 0 0 0 19 1 12 0 1 1 0 10 0 0 0 100 2 0 0 7 125 51 142 1 8 0 0 565 0 0 0 100 3 0 0 14 21 6 16 0 3 0 0 266 0 0 0 100 4 0 0 0 96 6 92 0 3 0 0 302 0 0 0 100 5 3 0 0 13 3 6 1 0 0 0 299 0 0 0 100 6 22 0 0 10 2 4 0 0 0 0 5 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 202 106 1 2 0 0 1128 0 1 0 99 1 0 0 0 14 0 10 0 0 0 0 10 0 0 0 100 2 0 0 7 125 58 121 0 2 0 0 566 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 44 3 36 0 1 0 0 300 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 295 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 203 144 0 0 0 0 1132 0 1 0 99 1 0 0 0 14 0 22 0 0 1 0 25 0 0 0 100 2 0 0 7 132 61 128 0 1 2 0 888 0 0 0 100 3 0 0 14 7 2 28 0 2 1 0 268 0 0 0 100 4 0 0 0 24 9 20 1 1 0 0 310 0 0 0 100 5 0 0 0 12 2 11 0 0 2 0 294 0 0 0 100 6 0 0 0 12 3 16 0 0 1 0 16 0 0 0 100 7 0 0 0 12 1 16 0 0 2 0 10 0 0 0 100 March 12, 2026 at 10:50:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 207 114 1 0 1 0 224 0 0 0 99 1 0 0 0 14 0 10 0 0 0 0 10 0 0 0 100 2 0 0 7 119 54 114 0 0 0 0 561 0 0 0 100 3 0 0 14 12 3 8 1 0 1 0 266 0 0 0 100 4 0 0 0 10 2 26 0 1 0 0 303 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 295 0 0 0 100 6 0 0 0 8 1 36 0 2 0 0 909 0 0 0 100 7 0 0 0 12 2 8 0 1 0 0 4 0 0 0 100 March 12, 2026 at 10:50:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 207 114 0 0 0 0 10 0 0 0 100 1 0 0 0 16 1 12 0 0 0 0 11 0 0 0 100 2 0 0 7 118 54 112 1 0 0 0 559 0 0 0 100 3 0 0 14 9 3 8 0 0 0 0 269 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 11 2 4 1 0 0 0 294 0 0 0 100 6 0 0 0 11 2 34 1 0 0 0 1126 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 209 114 1 4 0 0 6 0 0 0 100 1 0 0 0 64 25 62 0 1 0 0 10 0 0 0 100 2 0 0 7 65 25 56 0 2 0 0 561 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 0 14 3 8 0 1 0 0 301 0 0 0 100 5 0 0 0 10 2 24 0 1 0 0 294 0 0 0 100 6 0 0 0 11 2 34 1 0 1 0 1125 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 78 0 70 2326 213 473 8 47 2 0 2245 1 1 0 98 1 59 0 0 82 24 307 3 35 8 1 2157 1 0 0 98 2 157 0 7 76 27 423 8 35 3 0 2366 1 0 0 98 3 279 0 14 20 4 336 3 35 9 0 1944 1 0 0 98 4 83 0 0 23 4 308 2 36 1 1 2389 1 0 0 99 5 30 0 0 29 3 352 9 41 5 0 2165 1 0 0 99 6 0 0 0 26 3 332 8 31 4 0 3036 1 0 0 99 7 326 0 0 21 1 208 6 16 5 1 1908 1 0 0 98 March 12, 2026 at 10:50:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2326 211 360 0 20 146 0 25 0 0 0 99 1 0 0 0 17 0 137 0 11 101 0 4 0 0 0 100 2 0 0 7 78 28 182 0 6 131 0 565 0 0 0 100 3 6 0 14 121 86 166 1 10 166 0 283 0 0 0 100 4 1 0 0 34 15 134 0 9 115 0 335 0 0 0 100 5 0 0 0 14 3 182 0 4 145 0 300 0 0 0 100 6 14 0 0 16 3 144 0 12 123 0 1164 0 0 0 99 7 0 0 0 12 0 120 0 15 156 0 23 0 0 0 100 March 12, 2026 at 10:50:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 200 64 0 1 0 0 0 0 0 0 100 1 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 2 0 0 7 18 4 12 1 1 0 0 560 0 0 0 100 3 0 0 14 109 53 106 0 0 0 0 266 0 0 0 100 4 0 0 0 69 3 64 1 1 0 0 302 0 0 0 100 5 0 0 0 11 2 4 1 0 0 0 294 0 0 0 100 6 0 0 0 28 10 50 2 0 1 0 1149 0 0 0 100 7 0 0 0 10 0 4 0 0 2 0 0 0 0 0 100 March 12, 2026 at 10:50:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2303 200 94 0 2 1 0 0 0 0 0 100 1 0 0 0 16 1 28 0 1 1 0 0 0 0 0 100 2 0 0 7 19 6 12 0 0 1 0 560 0 0 0 100 3 0 0 14 111 54 110 0 1 1 0 269 0 0 0 100 4 0 0 0 28 4 18 0 0 1 0 300 0 0 0 100 5 0 0 0 14 4 6 0 0 1 0 295 0 0 0 100 6 0 0 0 31 12 52 1 0 1 0 1149 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:50:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 200 118 0 2 4 0 16 0 0 0 100 1 0 0 0 22 1 29 1 0 3 2 98 0 0 0 100 2 0 0 7 20 4 30 0 5 11 0 589 0 0 0 100 3 0 0 14 114 53 122 0 4 7 0 280 0 0 0 100 4 0 0 0 18 3 23 0 2 9 0 328 0 0 0 100 5 0 0 14 13 2 21 0 5 12 3 363 0 0 0 100 6 0 0 9 33 10 60 2 1 10 0 1163 0 1 0 99 7 0 0 7 16 1 20 1 3 4 0 30 0 0 0 100 March 12, 2026 at 10:50:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 202 110 0 1 0 0 1 0 0 0 100 1 0 0 0 17 0 12 0 0 1 0 3 0 0 0 100 2 0 0 7 32 12 44 0 1 1 0 569 0 0 0 100 3 0 0 14 113 53 106 1 0 0 0 266 0 0 0 100 4 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 5 0 0 0 15 3 8 0 0 0 0 295 0 0 0 100 6 0 0 0 13 3 34 0 0 0 0 1052 0 0 0 100 7 0 0 0 11 0 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2331 205 118 0 3 0 0 11 0 0 0 100 1 0 0 0 30 0 16 0 1 2 0 0 0 0 0 100 2 0 0 7 54 13 36 1 0 2 0 576 0 0 0 100 3 0 0 14 73 26 70 0 3 1 0 266 0 0 0 100 4 0 0 112 90 47 79 0 2 0 0 317 0 0 0 100 5 0 0 0 29 2 10 1 0 4 0 294 0 0 0 100 6 0 0 0 27 2 48 1 0 1 0 1062 0 0 0 100 7 0 0 0 28 1 16 0 0 1 0 8 0 0 0 100 March 12, 2026 at 10:50:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 200 102 0 0 0 0 0 0 0 0 100 1 0 0 0 15 0 8 0 0 0 0 0 0 0 0 100 2 0 0 7 26 9 20 0 0 0 0 568 0 0 0 100 3 0 0 14 10 3 6 0 0 0 0 266 0 0 0 100 4 0 0 0 113 53 106 0 0 0 0 301 0 0 0 100 5 0 0 7 14 3 8 0 0 0 0 295 0 0 0 100 6 0 0 0 12 2 34 1 0 0 0 1049 0 0 0 100 7 0 0 0 9 0 2 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:50:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 252 2335 204 1027 18 82 13 0 6807 4 1 0 95 1 25 0 0 79 1 1087 25 82 11 0 5950 5 1 0 94 2 17 0 7 85 12 1028 19 59 8 0 7192 4 1 0 94 3 2 0 14 66 5 941 23 61 8 0 6427 4 1 0 95 4 0 0 0 141 46 1116 9 40 7 0 6406 3 1 0 96 5 1 0 0 64 2 966 15 44 15 0 6434 4 1 0 96 6 5 0 0 69 7 1162 10 40 12 0 6352 4 1 0 95 7 20 0 0 48 0 833 6 29 13 0 5249 3 1 0 96 March 12, 2026 at 10:50:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 208 81 0 8 0 0 1 0 0 0 100 1 0 0 0 60 24 54 0 3 0 0 10 0 0 0 100 2 0 0 7 15 4 10 0 0 0 0 559 0 0 0 100 3 0 0 14 43 20 38 1 1 0 0 266 0 0 0 100 4 0 0 0 30 6 24 0 2 2 0 299 0 0 0 100 5 0 0 0 18 6 30 0 1 0 0 299 0 0 0 100 6 0 0 0 43 3 62 1 0 1 0 1048 0 0 0 100 7 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 14 2329 206 168 0 13 5 7 133 0 0 0 99 1 2651 0 114 105 48 152 2 9 9 13 459 1 1 0 99 2 129 0 7 40 4 88 1 11 11 18 725 0 0 0 100 3 46 0 16 25 2 68 0 10 10 14 420 0 0 0 100 4 6 0 0 30 3 50 0 9 4 2 416 0 0 0 100 5 6 0 0 41 9 48 1 3 6 4 360 0 0 0 100 6 650 0 0 28 2 60 2 2 6 4 1942 1 1 0 98 7 4 0 0 24 0 19 0 3 5 3 40 0 0 0 100 March 12, 2026 at 10:50:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 203 225 0 19 151 0 0 0 1 0 99 1 0 0 0 56 23 180 0 12 253 0 10 0 0 0 100 2 0 0 7 66 28 184 0 15 242 0 563 0 0 0 100 3 0 0 14 70 60 140 0 19 217 0 266 0 0 0 100 4 0 0 0 23 9 229 0 18 236 0 310 0 0 0 100 5 0 0 0 24 8 136 0 12 191 0 304 0 0 0 100 6 0 0 0 13 2 176 1 15 204 0 1150 0 0 0 99 7 0 0 0 10 0 133 0 15 234 0 9 0 0 0 100 March 12, 2026 at 10:50:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 126 0 2 10 0 1 0 0 0 100 1 0 0 0 8 1 16 0 1 9 0 10 0 0 0 100 2 0 0 7 15 4 26 0 0 6 0 564 0 0 0 100 3 0 0 14 120 63 122 0 1 4 0 266 0 0 0 100 4 0 0 0 14 5 34 0 2 1 0 302 0 0 0 100 5 0 0 0 23 8 32 0 1 6 0 623 0 0 0 100 6 0 0 0 15 3 58 1 0 9 0 1141 0 0 0 100 7 0 0 0 8 0 38 0 1 9 0 0 0 0 0 100 March 12, 2026 at 10:50:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 206 111 0 3 1 0 21 0 0 0 100 1 0 0 0 58 26 54 0 1 1 0 10 0 0 0 100 2 0 0 7 28 10 20 1 0 1 0 565 0 0 0 100 3 0 0 14 62 24 54 1 1 0 0 266 0 0 0 100 4 0 0 0 12 3 4 0 0 1 0 300 0 0 0 100 5 0 0 0 14 4 6 0 0 1 0 295 0 0 0 100 6 0 0 0 12 3 36 0 1 1 0 1131 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:50:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 85 0 70 2311 200 441 7 36 6 0 1909 1 1 0 98 1 68 0 0 126 43 435 8 26 8 0 1939 1 0 0 99 2 7 0 7 60 19 394 9 30 5 0 2173 1 0 0 99 3 197 0 18 24 2 374 6 29 5 0 2004 1 0 0 99 4 28 0 0 24 3 244 7 32 2 0 1558 1 0 0 99 5 27 0 0 23 2 149 6 14 5 0 1959 1 0 0 99 6 248 0 0 25 2 288 6 33 5 1 2861 1 0 0 98 7 304 0 13 23 0 134 4 14 1 0 1709 2 0 0 98 March 12, 2026 at 10:50:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2320 208 32 0 2 1 0 14 0 0 0 100 1 0 0 0 110 40 125 0 4 10 0 12 0 0 0 100 2 0 0 7 119 15 122 0 2 1 0 572 0 0 0 100 3 5 0 14 14 3 10 0 1 2 1 279 0 0 0 100 4 0 0 0 23 7 22 0 1 0 0 323 0 0 0 100 5 1 0 0 14 3 12 0 3 9 0 313 0 0 0 100 6 0 0 0 19 4 44 1 1 2 0 1143 0 0 0 100 7 0 0 0 12 1 8 0 0 1 0 4 0 0 0 100 March 12, 2026 at 10:50:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2311 200 141 0 18 139 3 81 0 1 0 99 1 0 0 0 117 46 230 0 13 146 1 115 0 0 0 100 2 0 0 15 124 11 209 0 16 134 0 564 0 1 0 99 3 0 0 28 70 60 120 0 14 158 0 281 0 0 0 100 4 0 0 0 45 19 206 1 13 130 0 365 0 0 0 100 5 0 0 0 23 4 138 1 13 147 0 308 0 0 0 100 6 0 0 0 25 5 218 1 11 138 0 1161 0 0 0 100 7 0 0 0 16 1 124 0 9 118 0 24 0 0 0 100 March 12, 2026 at 10:50:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 200 74 0 3 4 0 0 0 0 0 100 1 0 0 7 58 17 62 0 6 6 0 0 0 0 0 100 2 0 0 7 16 4 36 0 3 5 0 561 0 0 0 100 3 0 0 14 22 11 19 1 1 3 0 266 0 0 0 100 4 0 0 0 11 2 12 0 1 3 0 300 0 0 0 100 5 0 0 0 13 3 22 0 1 1 0 295 0 0 0 100 6 0 0 0 49 5 92 0 2 1 0 1052 0 0 0 100 7 0 0 0 85 38 86 0 2 5 0 10 0 0 0 100 March 12, 2026 at 10:50:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2325 205 107 0 4 0 0 0 0 0 0 100 1 0 0 0 78 24 56 0 1 0 0 0 0 0 0 100 2 0 0 7 34 4 14 1 2 1 0 559 0 0 0 100 3 0 0 14 27 2 10 0 1 0 0 266 0 0 0 100 4 0 0 112 14 3 24 0 1 1 0 302 0 0 0 100 5 0 0 0 27 2 4 1 0 0 0 294 0 0 0 100 6 0 0 0 27 2 34 1 0 0 0 1048 0 0 0 100 7 0 0 0 90 29 66 0 1 0 0 11 0 0 0 100 March 12, 2026 at 10:50:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 210 114 0 4 0 0 1 0 0 0 100 1 0 0 0 45 12 38 0 5 0 0 0 0 0 0 100 2 0 0 7 74 33 70 0 1 0 0 561 0 0 0 100 3 0 0 21 11 2 8 0 0 0 0 266 0 0 0 100 4 0 0 0 11 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 294 0 0 0 100 6 0 0 0 14 3 36 1 0 0 0 1048 0 0 0 100 7 0 0 0 21 6 14 0 0 0 0 9 0 0 0 100 March 12, 2026 at 10:50:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 56 2307 201 277 2 19 6 0 1377 1 1 0 99 1 1 0 0 21 3 184 3 17 4 1 1144 1 0 0 99 2 0 0 7 125 54 256 3 8 1 0 1661 1 0 0 99 3 0 0 14 17 2 99 2 9 0 0 1218 0 0 0 99 4 0 0 0 21 3 168 2 7 1 0 1416 1 0 0 99 5 0 0 0 19 3 319 1 9 3 0 1045 1 0 0 99 6 0 0 0 18 2 216 3 10 11 0 2043 1 0 0 99 7 14 0 0 43 13 240 2 6 1 0 771 1 0 0 99 March 12, 2026 at 10:50:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 196 2350 205 910 29 98 209 0 5705 4 1 0 95 1 2 0 0 61 7 1056 15 93 204 0 5108 4 1 0 95 2 19 0 7 148 28 1084 19 76 184 2 5932 3 1 0 96 3 1 0 14 114 62 957 16 71 213 0 4579 3 1 0 96 4 2 0 0 63 13 1059 8 64 193 0 4590 3 1 0 96 5 0 0 0 45 4 1096 5 47 191 0 4249 2 1 0 97 6 31 0 0 57 7 779 14 57 187 0 6642 3 1 0 96 7 15 0 0 149 29 814 10 56 220 0 4148 3 1 0 96 March 12, 2026 at 10:50:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 200 152 0 2 27 0 0 0 0 0 100 1 0 0 0 18 6 118 0 4 28 0 6 0 0 0 100 2 0 0 7 20 6 68 1 2 24 0 572 0 0 0 100 3 0 0 14 48 41 48 0 1 28 0 278 0 0 0 100 4 0 0 0 12 3 42 0 0 19 0 302 0 0 0 100 5 0 0 0 8 1 46 0 1 27 0 0 0 0 0 100 6 0 0 0 16 4 84 2 1 23 0 1343 0 0 0 100 7 0 0 0 109 50 145 0 2 33 0 0 0 0 0 100 March 12, 2026 at 10:50:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 203 110 0 3 1 0 0 0 0 0 100 1 0 0 0 70 32 66 0 2 1 0 5 0 0 0 100 2 0 0 7 19 6 14 0 1 1 0 570 0 0 0 100 3 0 0 14 11 3 6 0 1 1 0 266 0 0 0 100 4 0 0 0 12 3 4 0 0 1 0 300 0 0 0 100 5 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 6 0 0 0 17 4 38 1 1 1 0 1342 0 0 0 100 7 0 0 0 55 22 64 0 2 1 0 0 0 0 0 100 March 12, 2026 at 10:50:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 16 2322 200 168 0 12 5 11 95 0 0 0 100 1 27 0 0 133 55 156 0 11 6 6 123 0 0 0 100 2 21 0 7 43 8 55 2 8 9 7 663 0 0 0 100 3 2103 0 14 26 2 47 3 8 11 13 1403 1 1 0 98 4 22 0 0 30 4 49 0 5 11 4 393 0 0 0 100 5 29 0 0 26 1 29 0 4 9 6 75 0 0 0 100 6 794 0 113 14 3 80 1 8 10 8 1523 0 1 0 99 7 73 0 0 27 0 55 0 6 6 16 84 0 0 0 100 March 12, 2026 at 10:50:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 206 126 0 2 0 0 9 0 0 0 100 1 0 0 0 58 25 52 0 2 0 0 320 0 0 0 100 2 6 0 7 69 31 78 0 1 0 0 621 0 0 0 100 3 402 0 14 8 2 13 1 0 0 0 319 1 0 0 99 4 0 0 0 10 2 12 0 2 0 0 302 0 0 0 100 5 12 0 0 10 2 12 0 0 2 0 8 0 0 0 100 6 0 0 0 13 3 36 1 0 0 0 1428 0 0 0 100 7 29 0 0 8 0 6 0 0 0 0 4 0 0 0 100 March 12, 2026 at 10:50:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 142 0 56 2327 209 407 8 28 0 1 1336 2 1 0 98 1 199 0 0 16 1 305 3 32 15 2 1774 0 0 0 99 2 99 0 7 125 55 419 2 22 8 1 2477 1 0 0 99 3 55 0 14 19 2 335 6 34 16 0 2060 1 0 0 99 4 49 0 0 38 11 283 5 30 5 0 2116 1 0 0 99 5 47 0 0 34 3 293 17 26 4 0 1483 1 0 0 99 6 120 0 0 26 4 408 6 27 6 1 3442 1 0 0 99 7 401 0 0 24 1 238 4 16 8 4 1643 2 0 0 98 March 12, 2026 at 10:50:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2306 201 16 1 4 0 0 422 0 0 0 100 1 0 0 0 14 1 65 1 4 0 0 174 0 0 0 100 2 14 0 7 21 5 63 0 5 1 0 668 0 0 0 100 3 5 0 14 24 3 28 0 3 0 0 431 0 0 0 100 4 0 0 0 115 40 149 2 6 6 0 487 0 0 0 100 5 1 0 0 100 13 100 0 5 11 1 181 0 0 0 100 6 4 0 0 26 7 51 2 1 1 0 1246 0 0 0 99 7 0 0 0 16 1 82 2 4 0 0 157 0 0 0 100 March 12, 2026 at 10:50:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 10 0 0 0 0 294 0 0 0 100 1 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 2 0 0 7 17 5 12 0 0 0 0 560 0 0 0 100 3 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 4 0 0 0 112 43 106 0 2 0 0 302 0 0 0 100 5 0 0 0 108 11 102 0 2 0 0 0 0 0 0 100 6 0 0 0 27 9 48 1 0 2 0 1146 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2315 203 127 0 9 8 1 376 0 1 0 99 1 0 0 0 16 3 22 0 3 9 0 10 0 0 0 100 2 0 0 7 30 6 38 1 4 6 0 607 0 0 0 100 3 0 0 23 18 3 46 1 6 9 0 275 0 1 0 99 4 0 0 0 115 52 137 0 4 11 0 319 0 0 0 100 5 0 0 0 19 2 15 0 2 8 0 15 0 0 0 100 6 1 0 0 23 6 62 3 2 5 1 1156 0 0 0 100 7 0 0 7 14 0 17 0 6 15 0 0 0 0 0 100 March 12, 2026 at 10:50:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 206 115 0 4 0 0 294 0 0 0 100 1 0 0 0 77 35 74 0 1 0 0 14 0 0 0 100 2 0 0 7 19 5 12 1 0 0 0 559 0 0 0 100 3 0 0 14 14 3 10 0 1 0 0 267 0 0 0 100 4 0 0 0 63 24 76 0 3 0 0 302 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 3 0 0 0 100 6 0 0 0 14 2 34 1 0 1 0 1047 0 0 0 100 7 0 0 0 11 0 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2334 208 279 1 17 153 0 294 0 1 0 99 1 0 0 0 136 50 280 0 18 126 0 11 0 0 0 100 2 0 0 7 44 10 130 0 13 121 0 566 0 0 0 100 3 0 0 14 86 62 116 0 12 155 0 266 0 0 0 100 4 0 0 112 20 8 116 1 11 143 0 308 0 0 0 100 5 0 0 0 26 2 102 0 10 138 0 0 0 0 0 100 6 0 0 0 32 5 144 0 9 124 0 1061 0 0 0 100 7 0 0 0 28 1 117 0 11 131 0 11 0 0 0 100 March 12, 2026 at 10:50:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2320 213 295 0 10 15 0 294 0 0 0 100 1 0 0 0 47 17 102 0 9 30 0 8 0 0 0 100 2 0 0 7 88 31 173 0 6 43 0 559 0 0 0 100 3 0 0 14 85 79 68 0 6 33 0 266 0 0 0 100 4 0 0 0 16 3 104 0 7 27 0 302 0 0 0 100 5 0 0 0 9 1 96 0 5 45 0 0 0 0 0 100 6 0 0 0 16 4 120 1 2 40 0 1049 0 0 0 100 7 0 0 0 9 0 76 0 3 27 0 0 0 0 0 100 March 12, 2026 at 10:50:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 252 2338 202 1150 28 107 16 0 7527 5 2 0 94 1 37 0 0 74 7 988 17 89 19 1 6626 5 1 0 94 2 17 0 7 156 21 1129 14 69 16 0 7027 4 1 0 95 3 0 0 14 133 39 860 6 54 14 0 6427 3 1 0 96 4 28 0 0 72 8 1130 15 50 11 0 5785 3 1 0 96 5 0 0 0 69 4 904 9 46 18 0 6472 4 1 0 96 6 5 0 0 59 3 1357 8 37 14 0 5408 4 1 0 95 7 14 0 0 62 4 774 10 38 8 0 5496 4 1 0 96 March 12, 2026 at 10:50:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 6 0 2 0 0 294 0 0 0 100 1 0 0 0 8 1 8 0 1 0 0 9 0 0 0 100 2 0 0 7 116 27 116 1 3 0 0 587 0 0 0 100 3 0 0 14 73 11 71 0 4 0 0 266 0 0 0 100 4 0 0 0 60 27 56 0 1 0 0 308 0 0 0 100 5 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 32 0 0 0 0 1048 0 0 0 100 7 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:50:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 14 2326 202 46 1 9 7 9 409 0 0 0 100 1 659 0 0 23 0 47 1 10 7 10 943 1 0 0 98 2 6 0 7 131 7 143 0 9 4 1 655 0 0 0 100 3 6 0 14 32 3 36 0 8 2 2 334 0 0 0 100 4 809 0 113 128 56 182 1 6 3 17 466 0 0 0 99 5 1952 0 0 27 1 44 2 6 6 9 376 0 1 0 99 6 30 0 3 29 2 81 1 7 12 14 1254 0 0 0 100 7 34 0 0 28 1 77 0 6 4 6 131 0 0 0 100 March 12, 2026 at 10:50:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 264 0 16 170 0 294 0 0 0 99 1 0 0 0 11 1 110 0 18 201 0 1 0 0 0 100 2 0 0 7 109 21 222 0 18 214 0 570 0 0 0 100 3 0 0 14 79 59 131 0 16 175 0 269 0 0 0 100 4 0 0 0 100 48 216 1 19 200 0 327 0 0 0 100 5 0 0 0 8 1 113 0 9 196 0 0 0 0 0 100 6 0 0 0 16 3 161 1 11 223 0 1138 0 0 0 99 7 0 0 0 14 1 121 0 9 206 0 8 0 0 0 100 March 12, 2026 at 10:50:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 209 198 0 4 12 0 295 0 0 0 100 1 0 0 0 50 22 84 0 3 5 0 1 0 0 0 100 2 0 0 7 21 6 42 0 2 9 0 565 0 0 0 100 3 0 0 14 109 59 106 1 3 23 0 276 0 0 0 100 4 0 0 0 22 8 44 0 2 18 0 626 0 0 0 100 5 0 0 0 8 1 36 0 1 12 0 0 0 0 0 100 6 0 0 0 9 1 70 1 0 17 0 1136 0 0 0 100 7 0 0 0 10 1 50 0 1 17 0 0 0 0 0 100 March 12, 2026 at 10:51:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 114 0 0 0 0 294 0 0 0 100 1 0 0 0 106 50 104 0 1 0 0 0 0 0 0 100 2 0 0 7 28 9 38 1 1 0 0 565 0 0 0 100 3 0 0 14 7 2 6 0 0 0 0 276 0 0 0 100 4 0 0 0 14 4 8 0 0 0 0 302 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 32 1 0 0 0 1130 0 0 0 100 7 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:51:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 209 0 84 2314 202 474 11 45 4 1 2483 1 1 0 98 1 217 0 0 128 52 542 15 33 6 1 1981 1 0 0 99 2 126 0 7 39 7 108 5 17 3 0 2267 2 0 0 98 3 6 0 14 26 2 358 14 33 12 0 2121 1 0 0 99 4 101 0 0 32 4 421 7 36 11 0 1991 1 0 0 99 5 0 0 0 32 3 244 16 26 13 0 1648 1 0 0 99 6 125 0 0 20 1 281 3 21 9 0 2591 1 0 0 98 7 262 0 0 23 1 226 4 17 2 3 1958 1 0 0 98 March 12, 2026 at 10:51:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2301 201 110 0 0 0 0 293 0 0 0 100 1 0 0 0 121 57 116 1 0 0 0 10 0 0 0 100 2 0 0 7 17 4 14 0 1 0 0 559 0 0 0 100 3 0 0 14 11 3 6 0 0 0 0 267 0 0 0 100 4 0 0 0 14 4 8 0 0 0 0 302 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 34 0 0 0 0 1136 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 4 0 0 0 100 March 12, 2026 at 10:51:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 203 274 0 15 134 0 382 0 1 0 99 1 0 0 0 69 28 175 0 17 137 0 47 0 0 0 100 2 0 0 7 75 30 214 0 16 128 0 628 0 0 0 100 3 0 0 23 80 63 139 2 19 134 0 278 0 1 0 99 4 0 0 21 33 13 173 1 17 149 0 339 0 0 0 100 5 0 0 0 16 2 127 0 11 159 0 34 0 0 0 100 6 0 0 0 19 3 160 1 9 102 0 1085 0 0 0 100 7 0 0 0 18 1 171 0 14 126 0 8 0 0 0 100 March 12, 2026 at 10:51:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 201 116 0 1 6 0 294 0 0 0 100 1 0 0 0 7 0 12 0 1 4 0 0 0 0 0 100 2 0 0 7 119 54 114 1 1 0 0 560 0 0 0 100 3 0 0 14 18 10 10 0 1 5 0 269 0 0 0 100 4 0 0 0 33 10 34 0 3 5 0 312 0 0 0 100 5 0 0 7 8 1 34 0 3 4 0 0 0 0 0 100 6 0 0 0 12 2 46 1 2 5 0 1049 0 0 0 100 7 0 0 0 11 1 21 0 2 2 0 0 0 0 0 100 March 12, 2026 at 10:51:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2325 204 113 1 3 0 0 294 0 0 0 100 1 0 0 0 96 37 74 0 1 1 0 0 0 0 0 100 2 0 0 7 63 17 38 0 1 1 0 561 0 0 0 100 3 0 0 14 29 5 8 0 0 1 0 271 0 0 0 100 4 0 0 0 44 10 20 0 0 1 0 310 0 0 0 100 5 0 0 112 14 3 8 0 0 1 0 1 0 0 0 100 6 0 0 0 27 2 36 1 2 1 0 1047 0 0 0 100 7 0 0 0 27 2 2 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:51:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 203 115 0 3 2 0 294 0 0 0 100 1 0 0 0 53 22 44 0 2 0 0 0 0 0 0 100 2 0 0 7 70 30 64 0 1 0 0 559 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 4 0 0 7 29 10 22 1 0 0 0 311 0 0 0 100 5 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 52 1 1 2 0 1047 0 0 0 100 7 0 0 0 11 1 4 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:51:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 252 2354 206 1373 31 119 15 1 6349 6 2 0 93 1 1 0 0 65 1 1142 19 109 11 0 6432 4 1 0 95 2 10 0 7 170 25 1199 19 84 6 0 6951 4 1 0 95 3 1 0 14 70 7 878 18 57 7 0 6224 4 1 0 95 4 12 0 0 128 37 987 10 52 9 0 5708 3 1 0 96 5 0 0 0 52 2 708 9 37 15 1 6604 3 1 0 96 6 8 0 0 53 2 891 6 43 15 0 5926 3 1 0 96 7 1 0 0 53 2 930 9 32 4 0 5136 3 1 0 97 March 12, 2026 at 10:51:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2326 211 165 0 17 194 0 306 0 1 0 99 1 0 0 0 9 1 119 0 11 224 0 4 0 0 0 100 2 0 0 7 83 10 295 1 20 195 0 561 0 0 0 100 3 0 0 14 63 58 124 0 15 212 0 266 0 0 0 100 4 0 0 0 43 12 170 0 19 230 0 317 0 0 0 100 5 0 0 0 91 40 210 0 18 236 0 20 0 0 0 100 6 0 0 0 16 3 146 1 11 220 0 1054 0 0 0 99 7 0 0 0 12 1 128 0 12 179 0 6 0 0 0 100 March 12, 2026 at 10:51:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2317 206 78 2 6 18 0 299 0 0 0 100 1 0 0 0 106 1 137 0 3 20 0 1 0 0 0 100 2 0 0 7 19 6 106 0 2 11 0 560 0 0 0 100 3 0 0 14 144 89 148 1 5 22 0 271 0 0 0 100 4 0 0 0 19 3 55 0 4 17 0 300 0 0 0 100 5 0 0 0 8 1 48 0 4 27 0 10 0 0 0 100 6 0 0 0 9 1 74 1 2 17 0 1046 0 0 0 100 7 0 0 0 12 1 36 0 2 21 0 0 0 0 0 100 March 12, 2026 at 10:51:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2319 208 83 0 5 2 0 299 0 0 0 100 1 0 0 0 54 15 68 0 4 0 0 0 0 0 0 100 2 0 0 7 65 29 62 0 2 0 0 560 0 0 0 100 3 0 0 14 41 9 36 0 2 0 0 266 0 0 0 100 4 0 0 0 22 4 18 0 1 0 0 302 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 10 0 0 0 100 6 0 0 0 9 1 32 1 0 1 0 1047 0 0 0 100 7 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:51:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2317 209 117 0 3 0 0 615 0 0 0 99 1 0 0 0 58 26 54 0 1 0 0 0 0 0 0 100 2 0 0 7 67 28 62 0 1 0 0 564 0 0 0 100 3 0 0 14 14 5 10 1 0 0 0 269 0 0 0 100 4 0 0 0 19 2 12 1 0 0 0 300 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 10 0 0 0 100 6 0 0 0 8 1 36 0 0 0 0 1052 0 0 0 100 7 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:51:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 207 107 0 5 0 0 294 0 0 0 100 1 0 0 0 78 33 76 0 4 1 0 3 0 0 0 100 2 0 0 7 55 21 68 2 4 1 0 567 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 267 0 0 0 100 4 0 0 0 20 3 16 0 0 0 0 303 0 0 0 100 5 0 0 0 12 3 8 0 0 0 0 5 0 0 0 100 6 0 0 0 9 1 32 1 0 1 0 1048 0 0 0 100 7 0 0 0 12 2 6 0 0 0 0 6 0 0 0 100 March 12, 2026 at 10:51:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 203 114 1 2 2 0 296 0 0 0 100 1 0 0 0 54 22 48 0 2 0 0 3 0 0 0 100 2 0 0 7 81 36 80 0 2 0 0 574 0 0 0 100 3 0 0 14 15 6 28 0 1 2 0 271 0 0 0 100 4 0 0 0 31 12 30 0 0 0 0 315 0 0 0 100 5 0 0 0 11 2 20 0 1 1 0 44 0 0 0 100 6 0 0 0 11 1 38 1 0 1 0 1052 0 0 0 100 7 0 0 0 20 5 28 0 0 1 0 14 0 0 0 100 March 12, 2026 at 10:51:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 106 0 1 0 0 294 0 0 0 100 1 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 2 0 0 7 115 54 108 0 0 0 0 561 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 26 6 20 0 0 0 0 306 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 10 0 0 0 100 6 0 0 0 10 2 34 0 0 1 0 1047 0 0 0 100 7 0 0 0 18 5 12 0 1 0 0 5 0 0 0 100 March 12, 2026 at 10:51:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 14 2333 204 160 0 5 9 5 429 0 1 0 99 1 6 0 0 24 1 27 0 5 6 4 56 0 0 0 100 2 25 0 7 133 56 143 0 7 5 7 622 0 0 0 100 3 6 0 14 32 5 32 1 3 4 3 329 0 0 0 100 4 3285 0 113 25 3 97 4 3 10 15 1572 2 1 0 97 5 130 0 0 31 4 89 0 10 9 18 198 0 0 0 100 6 43 0 2 27 2 99 1 6 11 15 1289 0 0 0 100 7 6 0 0 37 7 55 0 11 6 5 422 0 0 0 100 March 12, 2026 at 10:51:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 205 116 0 0 0 0 299 0 0 0 100 1 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 2 0 0 7 114 54 108 1 0 0 0 560 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 22 3 16 0 0 1 0 302 0 0 0 100 5 0 0 0 10 2 8 0 1 0 0 10 0 0 0 100 6 0 0 0 9 1 48 1 1 1 0 1130 0 0 0 100 7 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:51:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 14 2320 209 128 1 0 1 0 308 0 0 0 99 1 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 2 0 0 7 113 54 108 0 0 0 0 560 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 18 2 12 0 0 0 0 300 0 0 0 100 5 20 0 0 12 3 8 0 0 0 0 8 0 0 0 100 6 0 0 0 11 2 34 1 0 0 0 1126 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:51:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 208 128 0 0 1 0 306 0 0 0 100 1 0 0 0 10 1 6 0 1 0 0 4 0 0 0 100 2 0 0 7 113 54 110 0 0 0 0 559 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 36 14 26 0 0 0 0 309 0 0 0 100 5 0 0 0 12 2 19 0 0 2 0 20 0 0 0 100 6 0 0 0 10 1 48 0 0 2 0 1142 0 0 0 100 7 0 0 0 12 1 36 0 1 3 0 8 0 0 0 100 March 12, 2026 at 10:51:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 206 130 0 3 2 0 617 0 0 0 99 1 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 2 0 0 7 115 55 110 0 0 0 0 561 0 0 0 100 3 0 0 14 10 3 6 1 0 0 0 267 0 0 0 100 4 0 0 0 14 2 8 0 1 0 0 300 0 0 0 100 5 0 0 0 16 2 14 0 2 0 0 10 0 0 0 100 6 0 0 0 9 1 36 1 0 0 0 1130 0 0 0 100 7 0 0 0 18 4 14 0 1 1 0 5 0 0 0 100 March 12, 2026 at 10:51:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 203 108 0 3 0 0 294 0 0 0 100 1 0 0 0 60 27 56 0 1 0 0 0 0 0 0 100 2 0 0 7 58 25 50 1 1 0 0 561 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 14 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 17 2 13 0 0 0 0 10 0 0 0 100 6 0 0 0 9 1 34 2 1 0 0 1127 0 0 0 100 7 0 0 0 18 5 12 0 0 0 0 5 0 0 0 100 March 12, 2026 at 10:51:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 206 109 1 4 0 0 295 0 0 0 100 1 0 0 0 58 23 52 0 3 0 0 0 0 0 0 100 2 0 0 7 59 27 72 0 2 0 0 559 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 299 0 0 0 100 5 0 0 0 10 1 6 0 0 0 0 10 0 0 0 100 6 0 0 0 17 2 42 1 1 0 0 1125 0 0 0 100 7 0 0 0 20 6 14 0 0 0 0 6 0 0 0 100 March 12, 2026 at 10:51:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 106 0 0 0 0 294 0 0 0 100 1 0 0 0 10 1 4 0 1 0 0 1 0 0 0 100 2 0 0 7 115 54 132 0 0 0 0 564 0 0 0 100 3 0 0 14 13 5 12 0 0 0 0 271 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 10 1 6 0 1 0 0 4 0 0 0 100 6 0 0 0 19 3 42 0 0 1 0 1128 0 0 0 100 7 0 0 0 21 6 16 1 1 0 0 7 0 0 0 100 March 12, 2026 at 10:51:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 58 0 70 2317 206 520 1 49 137 0 2140 1 1 0 98 1 0 0 0 88 2 432 3 41 159 0 1770 1 0 0 99 2 140 0 7 65 20 386 8 33 141 1 1257 2 0 0 97 3 59 0 14 83 62 332 10 31 143 0 1883 1 1 0 98 4 0 0 0 37 11 521 4 42 137 0 2024 1 0 0 99 5 192 0 0 88 34 466 4 26 155 1 1716 1 0 0 98 6 219 0 0 34 4 628 4 36 111 0 3174 1 1 0 98 7 289 0 0 43 11 535 5 31 151 0 1983 1 0 0 99 March 12, 2026 at 10:51:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 76 0 2 7 0 294 0 0 0 100 1 0 0 0 6 0 19 0 1 8 0 0 0 0 0 100 2 0 0 7 58 4 74 1 1 1 0 560 0 0 0 100 3 0 0 14 29 19 28 0 1 7 0 274 0 0 0 100 4 0 0 0 13 3 36 0 1 4 0 301 0 0 0 100 5 0 0 0 110 51 116 0 1 6 0 0 0 0 0 100 6 0 0 0 19 2 56 1 0 6 0 1140 0 0 0 100 7 0 0 0 14 2 16 0 0 6 0 0 0 0 0 100 March 12, 2026 at 10:51:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 106 1 1 1 0 294 0 0 0 100 1 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 2 0 0 7 17 6 10 0 0 1 0 562 0 0 0 100 3 0 0 14 23 10 18 0 0 1 0 273 0 0 0 100 4 0 0 0 14 3 6 0 1 3 0 300 0 0 0 100 5 0 0 0 114 53 128 0 2 0 0 1 0 0 0 100 6 0 0 0 19 2 40 1 0 1 0 1137 0 0 0 100 7 0 0 0 13 3 4 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:51:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2326 224 113 0 5 0 0 294 0 0 0 100 1 0 0 0 56 25 56 0 1 0 0 9 0 0 0 100 2 0 0 7 13 4 12 0 0 0 0 577 0 0 0 100 3 0 0 14 19 8 16 0 0 0 0 275 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 52 3 44 0 4 0 0 0 0 0 0 100 6 0 0 0 19 2 42 1 0 0 0 1139 0 0 0 100 7 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:51:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 204 133 0 6 5 1 383 0 0 0 100 1 0 0 21 61 23 70 0 5 11 0 9 0 0 0 100 2 0 0 7 68 29 74 0 4 5 0 574 0 0 0 100 3 0 0 14 33 12 48 1 5 16 0 303 0 0 0 100 4 0 0 0 16 2 17 0 3 4 1 399 0 0 0 100 5 0 0 0 14 1 19 0 3 14 0 21 0 0 0 100 6 0 0 0 24 2 76 1 3 7 0 1067 0 0 0 100 7 0 0 9 18 2 14 0 2 5 0 2 0 1 0 99 March 12, 2026 at 10:51:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 208 110 0 5 1 0 294 0 0 0 100 1 4 0 0 33 6 28 0 4 0 0 4 0 0 0 100 2 0 0 14 95 42 92 0 4 0 0 561 0 0 0 100 3 0 0 14 26 10 20 0 0 0 0 279 0 0 0 100 4 0 0 0 22 9 14 0 0 0 0 307 0 0 0 100 5 0 0 0 9 1 12 0 0 1 0 0 0 0 0 100 6 0 0 0 24 3 56 1 0 5 0 1062 0 0 0 100 7 1 0 0 15 2 38 0 1 1 0 7 0 0 0 100 March 12, 2026 at 10:51:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2329 206 108 1 3 0 0 294 0 0 0 100 1 0 0 0 28 2 6 0 0 0 0 2 0 0 0 100 2 0 0 7 48 7 24 1 3 0 0 561 0 0 0 100 3 0 0 14 123 52 108 0 2 0 0 274 0 0 0 100 4 0 0 0 26 2 4 0 0 0 0 299 0 0 0 100 5 0 0 112 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 33 1 42 1 1 1 0 1048 0 0 0 100 7 0 0 0 28 2 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:51:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 201 126 0 1 0 0 294 0 0 0 100 1 0 0 7 8 0 2 0 1 0 0 0 0 0 0 100 2 0 0 7 14 4 8 0 0 0 0 560 0 0 0 100 3 0 0 14 121 58 116 1 0 0 0 275 0 0 0 100 4 0 0 0 13 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 18 1 40 1 0 0 0 1048 0 0 0 100 7 0 0 0 15 2 8 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:51:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 266 2339 203 1342 28 121 13 0 6896 6 2 0 92 1 32 0 7 97 12 1165 10 92 17 0 7606 5 1 0 94 2 2 0 0 72 5 1285 14 87 15 0 5715 4 1 0 95 3 2 0 14 112 32 851 8 46 8 0 7172 3 1 0 96 4 6 0 0 68 7 867 8 41 11 0 7747 3 1 0 96 5 11 0 0 52 1 967 7 39 17 0 5949 4 1 0 96 6 10 0 0 101 16 1116 8 46 11 1 5437 3 1 0 96 7 19 0 0 60 2 911 5 31 7 0 4852 3 1 0 97 March 12, 2026 at 10:51:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 201 4 0 0 0 0 294 0 0 0 100 1 0 0 7 127 26 152 1 5 0 0 1319 0 0 0 100 2 0 0 0 56 25 52 0 1 0 0 301 0 0 0 100 3 0 0 14 11 4 6 0 0 0 0 267 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 13 0 0 0 100 6 0 0 0 68 12 61 0 5 0 0 0 0 0 0 100 7 0 0 0 14 3 6 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:51:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 201 182 1 13 166 0 297 0 1 0 99 1 0 0 7 134 52 273 1 15 205 0 1322 0 1 0 99 2 0 0 0 45 14 192 0 16 180 0 305 0 0 0 100 3 0 0 14 64 59 109 0 11 145 0 266 0 0 0 100 4 0 0 0 22 9 116 1 8 168 0 306 0 0 0 100 5 0 0 0 9 1 227 0 9 168 0 20 0 0 0 100 6 0 0 0 14 3 123 0 6 191 0 14 0 0 0 100 7 0 0 0 17 2 129 0 16 203 0 7 0 0 0 100 March 12, 2026 at 10:51:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 205 144 0 6 11 0 294 0 0 0 100 1 0 0 7 71 29 135 2 8 21 0 1312 0 0 0 100 2 0 0 0 58 26 84 0 3 16 0 300 0 0 0 100 3 0 0 14 36 29 34 0 5 18 0 266 0 0 0 100 4 0 0 0 12 3 46 0 1 14 0 302 0 0 0 100 5 0 0 0 8 1 80 0 3 21 0 10 0 0 0 100 6 0 0 0 12 1 34 0 1 14 0 1 0 0 0 100 7 0 0 0 12 2 36 0 1 18 0 0 0 0 0 100 March 12, 2026 at 10:51:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 14 2332 206 158 0 9 7 5 388 0 0 0 100 1 25 0 7 47 13 81 0 6 4 4 1803 0 0 0 99 2 5 0 0 124 49 120 0 5 0 3 364 0 0 0 100 3 2645 0 130 13 3 51 3 3 10 15 658 1 1 0 99 4 735 0 0 32 4 84 1 15 11 20 1290 1 0 0 98 5 56 0 0 28 3 65 0 10 10 10 148 0 0 0 100 6 21 0 0 28 2 43 0 7 7 5 117 0 0 0 100 7 17 0 0 29 2 38 0 3 5 3 70 0 0 0 100 March 12, 2026 at 10:51:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 210 123 0 2 0 0 302 0 0 0 100 1 0 0 7 66 29 92 1 1 1 0 1391 0 0 0 100 2 0 0 0 58 24 52 0 1 0 0 301 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 16 5 8 0 0 0 0 302 0 0 0 100 5 0 0 0 8 1 24 0 1 1 0 20 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 6 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:51:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 147 0 70 2326 207 256 6 19 4 0 1294 2 1 0 98 1 199 0 7 73 28 501 7 43 7 1 3696 1 1 0 98 2 0 0 0 74 4 358 5 42 0 0 1940 1 0 0 99 3 95 0 14 67 25 339 3 23 6 0 2112 1 0 0 99 4 0 0 0 24 3 401 4 32 5 0 2377 1 0 0 99 5 364 0 0 26 2 223 6 21 10 1 1863 1 0 0 98 6 124 0 6 26 2 231 6 23 5 1 1994 2 0 0 98 7 82 0 0 37 8 353 2 24 4 1 1690 1 0 0 99 March 12, 2026 at 10:51:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 28 2314 202 191 0 7 122 0 303 0 0 0 99 1 0 0 7 15 3 133 1 11 118 0 1409 0 0 0 99 2 0 0 0 112 50 266 0 10 151 0 314 0 0 0 100 3 0 0 14 79 64 106 0 10 99 0 271 0 0 0 100 4 0 0 0 26 10 105 1 4 87 0 324 0 0 0 100 5 0 0 0 31 9 234 0 9 90 0 18 0 0 0 100 6 0 0 0 14 1 113 0 8 132 0 15 0 0 0 100 7 0 0 0 20 2 121 0 6 139 0 18 0 0 0 100 March 12, 2026 at 10:51:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 23 2315 203 149 0 8 9 0 299 0 0 0 100 1 0 0 14 73 31 116 1 5 17 0 1402 0 0 0 100 2 0 0 0 59 23 72 0 3 10 0 329 0 0 0 100 3 0 0 14 21 9 20 1 2 9 0 345 0 0 0 100 4 0 0 0 14 2 31 0 2 13 0 316 0 0 0 100 5 0 0 10 37 8 58 0 6 21 1 90 0 1 0 99 6 0 0 14 18 2 33 0 5 3 0 33 0 0 0 100 7 0 0 0 18 1 33 0 6 9 0 24 0 0 0 100 March 12, 2026 at 10:51:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2323 212 130 0 4 0 0 304 0 0 0 99 1 0 0 7 121 52 164 1 4 0 0 1314 0 0 0 100 2 0 0 7 10 2 6 0 1 0 0 300 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 13 3 8 0 0 0 0 303 0 0 0 100 5 0 0 0 11 2 2 0 0 0 0 0 0 0 0 100 6 0 0 0 15 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 15 2 8 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:51:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2338 209 126 1 0 0 0 302 0 0 0 100 1 0 0 7 90 34 96 1 0 0 0 1311 0 0 0 100 2 0 0 0 70 23 50 0 2 0 0 300 0 0 0 100 3 0 0 14 23 2 6 0 1 0 0 266 0 0 0 100 4 0 0 0 26 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 28 1 6 0 0 0 0 0 0 0 0 100 7 0 0 112 12 1 8 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:51:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 208 126 0 0 0 0 307 0 0 0 100 1 0 0 7 17 4 40 1 1 1 0 1308 0 0 0 100 2 0 0 0 111 52 124 0 1 0 0 300 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 13 3 6 0 0 0 0 301 0 0 0 100 5 4 0 0 9 1 4 0 0 0 0 3 0 0 0 100 6 0 0 7 12 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 13 1 6 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:51:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 266 2370 223 1254 26 133 222 0 7656 5 2 0 94 1 27 0 7 120 28 1184 26 100 229 1 9121 5 2 0 93 2 33 0 0 103 7 1355 15 104 172 0 6230 4 1 0 94 3 3 0 14 118 59 1114 14 84 221 0 6747 4 1 0 95 4 5 0 0 67 8 1206 12 87 185 0 5573 4 1 0 95 5 39 0 0 56 2 1085 13 78 182 0 6260 4 1 0 95 6 31 0 0 69 6 1034 13 59 198 0 7078 4 1 0 94 7 6 0 0 88 9 1216 13 52 180 0 4432 3 1 0 96 March 12, 2026 at 10:51:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 212 127 0 9 22 0 304 0 0 0 100 1 0 0 7 80 32 136 1 6 21 0 1308 0 0 0 100 2 0 0 0 8 1 66 0 3 10 0 300 0 0 0 100 3 0 0 14 33 26 36 0 1 21 0 283 0 0 0 100 4 0 0 0 12 3 32 0 1 7 0 302 0 0 0 100 5 0 0 0 8 1 34 0 0 12 0 0 0 0 0 100 6 0 0 0 12 2 36 0 0 21 0 1 0 0 0 100 7 0 0 0 65 17 85 0 5 19 0 5 0 0 0 100 March 12, 2026 at 10:51:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 49 0 14 2324 203 143 1 12 3 9 461 0 0 0 99 1 17 0 7 115 28 154 1 14 8 5 1451 0 0 0 100 2 2498 0 0 83 29 96 3 10 7 8 1511 2 1 0 98 3 18 0 14 29 4 41 0 7 9 7 328 0 0 0 100 4 20 0 0 28 3 52 0 6 7 6 423 0 0 0 100 5 791 0 112 12 3 64 0 7 10 9 116 0 0 0 100 6 106 0 0 29 2 55 0 6 6 14 95 0 0 0 100 7 16 0 2 39 7 46 0 5 7 8 66 0 0 0 100 March 12, 2026 at 10:51:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 66 0 2 0 0 304 0 0 0 100 1 0 0 7 39 8 64 0 3 0 0 1393 0 0 0 100 2 0 0 0 51 8 43 0 4 0 0 300 0 0 0 100 3 0 0 14 85 41 84 0 1 0 0 266 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 10 1 4 0 0 3 0 0 0 0 0 100 6 0 0 0 10 1 26 0 1 1 0 0 0 0 0 100 7 0 0 0 20 5 14 0 1 0 0 5 0 0 0 100 March 12, 2026 at 10:51:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 205 112 0 3 0 0 297 0 0 0 100 1 0 0 7 21 3 48 2 0 0 0 1395 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 62 26 58 1 4 0 0 266 0 0 0 100 4 0 0 0 59 26 54 1 1 0 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 14 3 8 0 0 0 0 4 0 0 0 100 7 0 0 0 28 9 22 0 1 0 0 329 0 0 0 100 March 12, 2026 at 10:51:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 209 118 0 0 0 0 304 0 0 0 100 1 0 0 7 22 4 52 1 2 0 0 1401 0 0 0 100 2 0 0 0 8 1 4 0 0 3 0 300 0 0 0 100 3 0 0 14 9 3 8 0 1 1 0 266 0 0 0 100 4 0 0 0 121 60 114 0 0 0 0 311 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 16 3 26 0 0 2 0 18 0 0 0 100 7 0 0 0 14 1 36 0 1 3 0 7 0 0 0 100 March 12, 2026 at 10:51:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 84 2328 212 327 8 30 3 0 2038 1 1 0 98 1 40 0 7 82 26 298 3 29 2 0 3048 1 0 0 99 2 53 0 0 21 1 153 3 12 4 0 1369 2 0 0 98 3 197 0 14 55 5 480 5 30 2 0 2037 1 0 0 99 4 14 0 0 72 23 168 5 18 0 0 1749 1 0 0 99 5 262 0 0 18 1 234 8 25 4 0 1567 1 0 0 99 6 297 0 0 28 1 277 10 21 1 0 1978 2 0 0 98 7 72 0 0 27 1 395 2 25 7 0 1657 1 0 0 99 March 12, 2026 at 10:51:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2306 201 6 0 0 0 0 298 0 0 0 100 1 0 0 7 38 8 64 0 6 0 0 1404 0 0 0 100 2 0 0 0 101 46 98 1 2 0 0 310 0 0 0 100 3 5 0 14 117 9 120 0 5 0 0 279 0 0 0 100 4 0 0 0 14 3 8 0 1 0 0 315 0 0 0 100 5 0 0 0 10 1 6 0 2 9 0 16 0 0 0 100 6 0 0 0 14 2 9 0 1 3 0 15 0 0 0 100 7 0 0 0 16 2 10 0 1 0 0 4 0 0 0 100 March 12, 2026 at 10:51:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2313 202 89 0 6 13 0 298 0 0 0 100 1 0 0 7 27 3 67 2 2 4 0 1433 0 0 0 99 2 0 0 14 44 10 69 0 9 9 0 316 0 0 0 100 3 0 0 14 131 51 142 1 8 10 0 318 0 0 0 100 4 0 0 9 18 3 24 0 4 7 0 319 0 1 0 99 5 0 0 0 13 1 23 0 5 7 0 78 0 0 0 100 6 0 0 0 15 1 9 0 1 3 0 3 0 0 0 100 7 0 0 0 18 1 24 0 4 14 0 72 0 0 0 100 March 12, 2026 at 10:51:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 204 106 0 3 0 0 294 0 0 0 100 1 0 0 14 128 57 160 1 3 1 0 1323 0 0 0 100 2 0 0 0 13 1 8 0 1 0 0 303 0 0 0 100 3 0 0 14 18 5 30 0 2 1 0 266 0 0 0 100 4 0 0 0 13 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 13 1 6 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:51:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2327 201 267 1 11 157 0 294 0 0 0 99 1 0 0 7 155 60 268 1 8 175 0 1318 0 1 0 99 2 0 0 0 34 4 230 0 11 109 0 300 0 0 0 100 3 0 0 14 86 63 111 0 8 158 0 266 0 0 0 100 4 0 0 0 39 10 115 0 7 122 0 317 0 0 0 100 5 0 0 0 26 2 97 0 3 135 0 0 0 0 0 100 6 0 0 0 28 2 112 0 6 124 0 6 0 0 0 100 7 0 0 112 16 2 116 0 9 113 0 7 0 0 0 100 March 12, 2026 at 10:51:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 211 124 0 4 7 0 294 0 0 0 100 1 0 0 7 36 11 97 0 2 18 0 1318 0 0 0 100 2 0 0 7 72 23 118 0 4 4 0 303 0 0 0 100 3 0 0 14 69 42 70 0 3 11 0 266 0 0 0 100 4 0 0 0 13 3 52 0 3 10 0 301 0 0 0 100 5 0 0 0 9 1 26 0 1 10 0 0 0 0 0 100 6 0 0 0 13 2 30 0 1 15 0 1 0 0 0 100 7 0 0 0 13 1 26 0 0 9 0 0 0 0 0 100 March 12, 2026 at 10:51:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 252 2336 204 1459 21 101 12 0 6633 5 2 0 94 1 22 0 7 118 31 1096 19 76 17 0 8797 5 1 0 93 2 32 0 0 64 4 841 18 55 17 0 6707 5 1 0 94 3 21 0 14 105 26 913 10 54 16 1 6537 4 1 0 96 4 0 0 0 62 5 1181 11 47 10 0 5914 3 1 0 96 5 0 0 0 65 6 1256 8 36 10 0 4319 3 1 0 96 6 0 0 0 58 4 755 6 34 7 1 6702 3 1 0 96 7 17 0 0 62 3 797 10 36 10 0 7226 4 1 0 95 March 12, 2026 at 10:51:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 110 0 1 0 0 294 0 0 0 100 1 0 0 7 122 58 150 1 0 0 0 1321 0 0 0 100 2 0 0 0 10 2 8 0 0 0 0 319 0 0 0 100 3 0 0 14 13 4 6 0 0 0 0 266 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 6 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:51:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 202 116 1 0 0 0 295 0 0 0 100 1 0 0 7 123 59 150 0 0 0 0 1318 0 0 0 100 2 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 10 1 8 0 1 0 0 13 0 0 0 100 6 0 0 0 10 1 26 0 2 0 0 0 0 0 0 100 7 0 0 0 17 3 8 1 1 0 0 2 0 0 0 100 March 12, 2026 at 10:51:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 201 240 0 15 210 0 294 0 0 0 99 1 0 0 7 121 56 273 1 16 220 0 1314 0 1 0 99 2 0 0 0 16 5 138 0 14 200 0 303 0 0 0 100 3 0 0 14 66 59 126 0 7 193 0 266 0 0 0 100 4 0 0 0 19 8 126 0 6 179 0 308 0 0 0 100 5 0 0 0 8 1 125 0 7 222 0 11 0 0 0 100 6 0 0 0 17 3 247 0 18 167 0 18 0 0 0 100 7 0 0 0 14 1 136 0 9 172 0 7 0 0 0 100 March 12, 2026 at 10:51:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 202 142 1 1 15 0 297 0 0 0 100 1 0 0 7 28 10 106 3 1 21 0 1638 0 0 0 100 2 0 0 0 112 53 140 0 3 20 0 312 0 0 0 100 3 0 0 14 35 28 30 1 1 15 0 266 0 0 0 100 4 0 0 0 12 3 26 0 0 10 0 301 0 0 0 100 5 0 0 0 8 1 24 0 2 13 0 0 0 0 0 100 6 0 0 0 10 1 84 0 1 14 0 0 0 0 0 100 7 0 0 0 14 2 30 0 2 13 0 4 0 0 0 100 March 12, 2026 at 10:52:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 205 138 0 1 0 0 299 0 0 0 100 1 0 0 7 14 4 36 1 0 1 0 1307 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 301 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 14 1 8 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:52:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 210 88 1 3 2 0 308 0 0 0 100 1 0 0 7 11 3 40 0 1 2 0 1310 0 0 0 100 2 0 0 0 88 22 98 0 6 0 0 306 0 0 0 100 3 0 0 14 69 32 68 0 3 0 0 266 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 8 1 8 0 0 0 0 34 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 14 1 8 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:52:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 207 112 0 3 0 0 294 0 0 0 100 1 0 0 7 61 27 86 2 1 0 0 1308 0 0 0 100 2 0 0 0 24 9 18 0 0 0 0 311 0 0 0 100 3 0 0 14 61 24 56 0 3 0 0 265 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 8 1 6 0 0 0 0 13 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 6 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:52:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 114 0 0 0 0 294 0 0 0 100 1 0 0 7 113 53 138 2 0 0 0 1308 0 0 0 100 2 0 0 0 26 9 24 0 1 2 0 627 0 0 0 100 3 0 0 14 10 3 34 1 2 3 0 271 0 0 0 100 4 0 0 0 22 10 16 0 0 0 0 315 0 0 0 100 5 0 0 0 10 2 10 0 0 0 0 10 0 0 0 100 6 0 0 0 10 1 18 0 0 2 0 8 0 0 0 100 7 0 0 0 14 1 18 0 1 5 0 7 0 0 0 100 March 12, 2026 at 10:52:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 110 0 0 0 0 294 0 0 0 100 1 0 0 7 119 57 146 0 0 1 0 1314 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 11 3 8 0 0 0 0 266 0 0 0 100 4 0 0 0 12 3 24 0 1 0 0 302 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 1 0 0 0 100 7 0 0 0 12 1 8 0 0 0 0 3 0 0 0 100 March 12, 2026 at 10:52:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 112 1 0 1 0 294 0 0 0 100 1 22 0 7 128 61 152 1 1 1 0 1319 0 0 0 99 2 0 0 0 18 6 10 0 0 1 0 304 0 0 0 100 3 0 0 14 11 4 6 0 0 1 0 266 0 0 0 100 4 0 0 0 12 3 4 0 0 1 0 300 0 0 0 100 5 20 0 0 14 4 10 0 0 1 0 26 0 0 0 100 6 0 0 0 12 2 4 0 0 1 0 0 0 0 0 100 7 0 0 0 13 2 4 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:52:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 110 0 0 0 0 294 0 0 0 100 1 0 0 7 89 41 110 2 0 0 0 1310 0 0 0 100 2 0 0 0 42 18 38 0 1 0 0 300 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 0 14 3 8 0 1 1 0 302 0 0 0 100 5 0 0 0 8 1 22 0 1 0 0 10 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 6 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:52:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38 0 14 2342 216 170 0 13 5 5 418 0 0 0 100 1 39 0 7 74 25 127 2 11 6 8 1736 0 0 0 99 2 15 0 0 100 26 109 0 7 2 7 422 0 0 0 100 3 2635 0 138 12 3 57 3 8 4 14 658 1 1 0 98 4 95 0 0 28 2 77 0 7 6 18 458 0 0 0 100 5 660 0 0 29 1 68 1 8 11 13 962 1 0 0 98 6 24 0 0 30 2 65 0 7 7 5 104 0 0 0 100 7 5 0 0 33 3 24 0 2 2 3 42 0 0 0 100 March 12, 2026 at 10:52:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 118 0 0 0 0 294 0 0 0 100 1 0 0 7 71 33 94 0 0 1 0 1412 0 0 0 100 2 0 0 0 58 26 56 0 1 4 0 305 0 0 0 100 3 0 0 14 9 3 8 0 0 1 0 266 0 0 0 100 4 0 0 0 21 10 16 0 0 0 0 316 0 0 0 100 5 0 0 0 10 2 10 0 0 0 0 10 0 0 0 100 6 0 0 0 14 3 20 0 0 3 0 8 0 0 0 100 7 0 0 0 14 1 18 0 0 3 0 8 0 0 0 100 March 12, 2026 at 10:52:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 128 1 1 0 0 294 0 0 0 100 1 0 0 7 14 4 38 1 0 0 0 1388 0 0 0 100 2 0 0 0 118 55 114 0 0 0 0 307 0 0 0 100 3 0 0 14 9 3 8 0 1 0 0 266 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 6 0 0 3 0 0 0 0 0 100 7 0 0 0 14 2 10 0 1 0 0 4 0 0 0 100 March 12, 2026 at 10:52:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 204 113 0 3 0 0 294 0 0 0 100 1 0 0 7 64 29 110 1 2 1 0 1386 0 0 0 100 2 0 0 0 66 28 58 0 2 0 0 308 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 8 1 6 0 0 0 0 20 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 6 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:52:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 128 0 70 2326 215 347 10 25 3 0 1845 1 1 0 98 1 319 0 7 113 35 153 8 10 4 1 2329 3 1 0 97 2 149 0 0 54 16 431 8 26 3 0 2317 1 0 0 99 3 134 0 14 38 4 490 7 34 4 0 2109 1 0 0 99 4 0 0 0 22 3 112 3 15 0 0 1573 1 0 0 99 5 168 0 0 19 2 297 3 26 2 0 1661 0 0 0 99 6 82 0 0 23 2 428 5 30 6 0 1929 1 0 0 99 7 6 0 0 24 2 282 7 27 7 0 1912 1 0 0 99 March 12, 2026 at 10:52:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2307 202 16 0 1 5 0 322 0 0 0 100 1 0 0 7 20 5 211 0 2 1 0 1744 0 0 0 99 2 0 0 0 120 44 137 1 5 0 0 320 0 0 0 100 3 6 0 14 109 14 108 0 4 0 0 280 0 0 0 100 4 0 0 0 14 3 8 0 0 0 0 303 0 0 0 100 5 0 0 0 16 4 11 0 1 0 0 12 0 0 0 100 6 22 0 0 24 7 24 0 2 0 0 35 0 0 0 100 7 0 0 0 16 2 14 0 0 10 1 30 0 0 0 100 March 12, 2026 at 10:52:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 205 229 1 15 183 0 294 0 1 0 99 1 0 0 7 62 28 194 1 10 155 0 1397 0 0 0 99 2 0 0 0 60 23 169 0 17 105 0 301 0 0 0 100 3 0 0 14 79 61 146 0 15 153 0 266 0 0 0 100 4 0 0 0 18 8 123 0 11 144 0 306 0 0 0 100 5 0 0 0 11 2 123 0 10 146 0 0 0 0 0 100 6 0 0 0 27 9 248 0 12 143 0 27 0 0 0 100 7 1 0 0 14 1 118 0 7 127 0 7 0 0 0 100 March 12, 2026 at 10:52:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 36 0 2 24 0 294 0 0 0 100 1 0 0 7 86 32 130 1 4 12 0 1398 0 0 0 100 2 0 0 0 34 14 62 0 1 26 0 300 0 0 0 100 3 0 0 14 125 27 132 0 5 12 0 266 0 0 0 100 4 0 0 0 12 3 22 0 0 12 0 302 0 0 0 100 5 0 0 0 8 1 24 0 1 15 0 0 0 0 0 100 6 0 0 0 30 11 76 0 1 12 0 12 0 0 0 100 7 0 0 0 13 1 32 0 1 21 0 3 0 0 0 100 March 12, 2026 at 10:52:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 207 132 0 7 10 0 461 0 0 0 99 1 0 0 7 68 28 98 2 6 17 0 1417 0 0 0 100 2 0 0 0 70 24 67 0 6 2 0 331 0 0 0 100 3 0 0 21 19 4 20 1 3 5 0 283 0 0 0 100 4 0 0 0 16 3 43 0 5 19 0 300 0 0 0 100 5 0 0 8 18 3 20 0 3 4 0 23 0 0 0 100 6 1 0 0 35 10 35 1 3 13 0 32 0 0 0 100 7 0 0 14 16 2 13 0 1 7 0 2 0 0 0 100 March 12, 2026 at 10:52:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 201 112 0 0 0 0 294 0 0 0 100 1 0 0 7 112 53 138 0 0 0 0 1313 0 0 0 100 2 0 0 0 15 3 10 0 0 0 0 307 0 0 0 100 3 0 0 14 26 10 22 0 1 0 0 276 0 0 0 100 4 0 0 7 17 4 14 1 1 1 0 303 0 0 0 100 5 0 0 0 9 1 25 0 1 0 0 0 0 0 0 100 6 0 0 0 11 1 10 0 1 0 0 7 0 0 0 100 7 0 0 0 15 1 10 0 1 0 0 9 0 0 0 100 March 12, 2026 at 10:52:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2306 202 118 1 0 0 0 295 0 0 0 100 1 0 0 7 130 53 136 1 0 0 0 1311 0 0 0 100 2 0 0 0 28 3 6 0 0 0 0 302 0 0 0 100 3 0 0 14 37 9 18 0 0 0 0 275 0 0 0 100 4 0 0 0 28 2 6 0 0 0 0 300 0 0 0 100 5 0 0 0 26 1 4 0 1 0 0 0 0 0 0 100 6 0 0 0 26 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 32 2 10 0 0 0 0 1 0 0 0 100 March 12, 2026 at 10:52:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 201 114 0 0 3 0 294 0 0 0 100 1 0 0 7 83 38 104 1 0 0 0 1308 0 0 0 100 2 0 0 0 41 17 38 0 1 4 0 304 0 0 0 100 3 0 0 14 24 10 22 0 0 0 0 273 0 0 0 100 4 0 0 0 24 10 22 0 1 0 0 319 0 0 0 100 5 0 0 0 13 1 9 0 1 1 0 0 0 0 0 100 6 0 0 0 12 1 32 1 1 3 0 5 0 0 0 100 7 0 0 7 18 2 18 0 0 1 0 7 0 0 0 100 March 12, 2026 at 10:52:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 120 0 2 0 0 404 0 0 0 100 1 0 0 7 14 4 56 1 1 1 0 1338 0 0 0 100 2 0 0 0 20 6 22 0 4 3 1 333 0 0 0 100 3 0 0 14 121 58 139 2 2 0 0 315 0 0 0 100 4 0 0 0 11 2 21 1 2 0 0 390 0 0 0 100 5 0 0 0 8 1 7 0 1 0 0 76 0 0 0 100 6 0 0 0 12 1 11 0 0 2 0 100 0 0 0 100 7 0 0 0 14 2 36 0 4 3 0 73 0 0 0 100 March 12, 2026 at 10:52:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 252 2332 202 1343 20 97 21 0 6634 4 1 0 95 1 11 0 7 76 8 1289 25 70 22 0 8132 4 1 0 95 2 1 0 0 142 44 1097 18 69 14 0 7473 3 1 0 96 3 23 0 14 70 9 1113 13 53 14 0 5551 3 1 0 96 4 33 0 0 61 5 888 11 50 10 0 5723 5 1 0 94 5 21 0 0 58 2 871 9 36 14 0 5626 5 1 0 94 6 1 0 0 59 3 906 11 41 20 0 5409 3 1 0 96 7 18 0 0 56 2 723 9 32 4 0 6802 3 1 0 96 March 12, 2026 at 10:52:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 204 133 1 4 1 0 295 0 0 0 100 1 0 0 7 78 36 106 1 1 1 0 1317 0 0 0 100 2 0 0 0 56 24 50 0 1 0 0 312 0 0 0 100 3 0 0 14 11 4 8 0 0 0 0 267 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 1 6 0 0 0 0 3 0 0 0 100 7 0 0 0 12 1 8 0 1 1 0 0 0 0 0 100 March 12, 2026 at 10:52:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 203 114 0 3 1 0 294 0 0 0 100 1 0 0 7 70 31 108 1 3 1 0 1317 0 0 0 100 2 0 0 0 62 28 60 0 1 0 0 314 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 301 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:52:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 204 252 0 24 209 0 294 0 1 0 99 1 0 0 7 72 33 208 1 16 216 0 1312 0 1 0 99 2 0 0 0 58 23 179 0 21 214 0 311 0 0 0 100 3 0 0 14 67 59 124 1 20 216 0 266 0 0 0 100 4 0 0 0 21 9 117 0 13 192 0 319 0 0 0 100 5 0 0 0 9 1 116 0 12 210 0 0 0 0 0 100 6 0 0 0 12 0 235 0 21 165 0 6 0 0 0 100 7 0 0 0 17 3 146 0 22 212 0 7 0 0 0 100 March 12, 2026 at 10:52:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 206 72 0 2 17 0 302 0 0 0 100 1 0 0 7 117 23 173 1 7 18 0 1629 0 0 0 100 2 0 0 0 10 2 40 0 2 16 0 301 0 0 0 100 3 0 0 14 106 60 126 0 2 20 0 266 0 0 0 100 4 0 0 0 12 3 34 0 1 16 0 302 0 0 0 100 5 0 0 0 9 1 32 0 0 14 0 5 0 0 0 100 6 0 0 0 14 2 82 0 1 19 0 5 0 0 0 100 7 0 0 0 12 2 32 0 2 22 0 0 0 0 0 100 March 12, 2026 at 10:52:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2324 209 26 1 0 1 0 311 0 0 0 99 1 0 0 7 52 6 74 1 1 1 0 1310 0 0 0 100 2 0 0 0 82 38 86 0 2 1 0 341 0 0 0 100 3 0 0 14 113 21 108 0 2 1 0 266 0 0 0 100 4 0 0 0 12 3 24 0 1 1 0 300 0 0 0 100 5 0 0 0 12 3 6 0 1 1 0 12 0 0 0 100 6 0 0 0 12 1 6 0 0 1 0 1 0 0 0 100 7 0 0 0 13 3 4 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:52:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2303 201 108 0 0 0 0 294 0 0 0 100 1 0 0 7 31 12 58 2 0 1 0 1328 0 0 0 100 2 0 0 0 111 52 109 0 1 0 0 322 0 0 0 100 3 0 0 14 11 3 6 0 0 0 0 266 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 10 0 6 0 0 0 0 3 0 0 0 100 7 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:52:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 116 0 0 0 0 295 0 0 0 100 1 0 0 7 20 7 44 1 0 1 0 1312 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 300 0 0 0 100 3 0 0 14 10 3 6 1 0 0 0 266 0 0 0 100 4 0 0 0 12 2 6 0 0 2 0 300 0 0 0 100 5 0 0 0 9 1 24 1 1 0 0 10 0 0 0 100 6 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 14 3 8 0 0 0 0 1 0 0 0 100 March 12, 2026 at 10:52:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 14 2331 207 151 0 12 6 3 430 0 0 0 100 1 2 0 7 80 29 108 1 7 9 1 1767 0 0 0 99 2 24 0 0 86 27 82 0 5 3 4 372 0 0 0 100 3 2646 0 128 12 3 47 2 4 8 10 694 1 1 0 99 4 130 0 0 36 8 91 0 9 9 20 485 0 0 0 100 5 668 0 0 30 2 71 1 11 6 13 986 1 0 0 98 6 26 0 0 30 2 93 0 11 13 8 112 0 0 0 100 7 8 0 0 30 2 34 0 5 9 3 68 0 0 0 100 March 12, 2026 at 10:52:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 112 1 0 0 0 295 0 0 0 100 1 0 0 7 112 53 136 1 0 0 0 1391 0 0 0 100 2 0 0 0 18 6 12 0 0 0 0 307 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 8 0 0 0 0 3 0 0 0 100 7 0 0 0 14 3 8 0 1 0 0 1 0 0 0 100 March 12, 2026 at 10:52:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 14 2308 202 112 0 0 0 0 299 0 0 0 100 1 0 0 7 112 53 136 1 0 1 0 1386 0 0 0 100 2 0 0 0 22 7 16 0 0 0 0 308 0 0 0 100 3 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 2 0 0 8 1 6 0 0 0 0 25 0 0 0 100 6 0 0 0 14 1 10 0 1 0 0 0 0 0 0 100 7 0 0 0 12 2 24 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:52:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 132 0 1 0 0 295 0 0 0 100 1 0 0 7 86 40 108 1 0 0 0 1386 0 0 0 100 2 0 0 0 49 21 46 1 1 0 0 317 0 0 0 100 3 0 0 14 12 4 8 1 0 0 0 267 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 6 0 4 0 0 0 0 20 0 0 0 100 6 0 0 0 12 1 8 0 0 0 0 3 0 0 0 100 7 0 0 0 14 2 8 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:52:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 112 0 0 0 0 294 0 0 0 100 1 0 0 7 22 8 48 1 0 0 0 1393 0 0 0 100 2 0 0 0 30 12 24 0 0 0 0 619 0 0 0 100 3 0 0 14 91 44 90 0 1 0 0 266 0 0 0 100 4 0 0 0 14 4 8 0 0 0 0 303 0 0 0 100 5 0 0 0 6 0 6 0 0 0 0 15 0 0 0 100 6 0 0 0 12 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:52:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 201 118 1 1 4 0 295 0 0 0 100 1 0 0 7 20 7 62 1 1 1 0 1391 0 0 0 100 2 0 0 0 10 2 6 0 0 2 0 301 0 0 0 100 3 0 0 14 109 53 108 0 0 2 0 266 0 0 0 100 4 0 0 0 21 9 12 0 0 0 0 308 0 0 0 100 5 0 0 0 8 1 8 0 0 0 0 10 0 0 0 100 6 0 0 0 12 1 20 0 0 2 0 14 0 0 0 100 7 0 0 0 14 2 14 0 0 1 0 6 0 0 0 100 March 12, 2026 at 10:52:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 110 0 0 0 0 294 0 0 0 100 1 0 0 7 24 8 48 1 0 1 0 1392 0 0 0 100 2 0 0 0 12 3 28 0 1 0 0 304 0 0 0 100 3 0 0 14 109 53 106 0 0 0 0 266 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 15 2 12 0 0 0 0 7 0 0 0 100 7 0 0 0 12 2 6 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:52:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 118 0 1 0 0 335 0 0 0 100 1 13 0 7 31 12 55 2 0 3 0 1412 0 0 0 99 2 0 0 0 12 3 7 0 1 1 0 304 0 0 0 100 3 0 0 14 112 54 106 1 0 1 0 266 0 0 0 100 4 0 0 0 12 3 8 0 0 1 0 303 0 0 0 100 5 0 0 0 10 2 10 0 0 1 0 41 0 0 0 100 6 49 0 0 14 2 8 0 0 3 0 12 0 0 0 100 7 0 0 0 13 3 6 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:52:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 70 2319 202 219 16 21 11 0 1716 2 1 0 98 1 219 0 7 85 4 469 1 39 20 1 3159 1 1 0 98 2 31 0 0 28 3 327 0 31 10 0 2113 1 0 0 99 3 26 0 24 124 53 538 1 31 8 0 1942 1 1 0 98 4 358 0 14 29 3 212 6 26 15 1 1993 2 1 0 98 5 40 0 0 25 1 351 4 29 13 0 1621 1 0 0 99 6 159 0 0 42 9 464 1 26 3 1 1644 1 0 0 99 7 14 0 7 32 4 112 3 15 7 0 840 2 0 0 98 March 12, 2026 at 10:52:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 203 122 1 1 0 0 296 0 0 0 100 1 0 0 7 13 3 36 1 0 1 0 1304 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 3 0 0 14 112 53 106 0 1 1 0 266 0 0 0 100 4 0 0 0 15 4 28 0 1 0 0 300 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 27 8 20 0 0 0 0 10 0 0 0 100 7 0 0 0 19 3 10 0 0 0 0 1 0 0 0 100 March 12, 2026 at 10:52:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2313 203 233 0 12 147 0 299 0 1 0 99 1 0 0 7 84 30 195 1 13 138 0 1305 0 0 0 100 2 0 0 0 26 1 115 0 12 83 0 300 0 0 0 100 3 0 0 14 128 83 142 0 14 130 0 266 0 0 0 100 4 0 0 0 35 8 112 0 11 119 0 306 0 0 0 100 5 0 0 0 27 1 103 0 10 115 0 0 0 0 0 100 6 0 0 0 42 8 228 0 14 103 0 16 0 0 0 100 7 0 0 0 34 4 117 0 10 130 0 11 0 0 0 100 March 12, 2026 at 10:52:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 124 0 3 5 0 295 0 0 0 100 1 0 0 7 113 53 150 1 0 3 0 1306 0 0 0 100 2 0 0 0 9 1 12 0 0 7 0 300 0 0 0 100 3 0 0 14 20 12 14 1 0 12 0 266 0 0 0 100 4 0 0 0 14 2 20 1 1 5 0 300 0 0 0 100 5 0 0 0 7 0 30 0 1 6 0 0 0 0 0 100 6 0 0 0 28 8 48 1 2 6 0 10 0 0 0 100 7 0 0 7 13 2 12 0 3 6 0 0 0 0 0 100 March 12, 2026 at 10:52:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 267 2386 243 1225 34 122 14 0 7786 5 2 0 94 1 3 0 7 105 19 1150 35 88 20 1 8511 5 1 0 94 2 18 0 0 124 4 1153 21 89 14 0 7056 4 1 0 95 3 35 0 14 80 6 1189 21 68 6 0 5142 3 1 0 96 4 3 0 0 69 6 1214 14 54 24 0 6027 3 1 0 96 5 58 0 0 60 3 1090 14 49 13 0 5781 4 1 0 95 6 0 0 0 65 5 699 6 29 13 0 6663 4 1 0 96 7 5 0 0 68 7 786 9 35 18 0 5594 4 1 0 95 March 12, 2026 at 10:52:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2338 226 127 1 6 0 0 308 0 0 0 100 1 0 0 7 13 3 40 2 0 0 0 1322 0 0 0 100 2 0 0 0 46 2 36 0 4 0 0 300 0 0 0 100 3 0 0 14 73 35 70 0 1 0 0 266 0 0 0 100 4 0 0 0 12 3 8 0 0 0 0 301 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 3 0 0 0 100 6 0 0 0 12 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 6 0 0 0 0 1 0 0 0 100 March 12, 2026 at 10:52:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2501 0 14 2345 219 96 4 12 2 10 1472 2 1 0 97 1 804 0 119 82 35 152 1 10 12 8 1612 0 1 0 99 2 112 0 0 103 6 148 0 15 10 14 464 0 0 0 100 3 53 0 16 37 4 70 0 13 6 7 427 0 0 0 100 4 11 0 0 28 3 46 0 6 4 4 396 0 0 0 100 5 7 0 0 22 0 19 0 5 4 2 51 0 0 0 100 6 4 0 0 30 1 30 0 3 6 2 49 0 0 0 100 7 19 0 0 30 3 63 0 3 2 7 95 0 0 0 100 March 12, 2026 at 10:52:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2325 209 188 1 18 187 0 313 0 1 0 99 1 0 0 7 93 43 234 1 17 214 0 1402 0 1 0 99 2 0 0 0 108 1 224 0 16 215 0 300 0 0 0 100 3 0 0 14 90 71 155 1 14 199 0 266 0 0 0 100 4 0 0 0 17 7 144 0 17 215 0 303 0 0 0 100 5 0 0 0 6 0 143 0 19 215 0 0 0 0 0 100 6 0 0 0 15 1 264 0 21 191 0 7 0 0 0 100 7 0 0 0 18 3 166 0 14 196 0 9 0 0 0 100 March 12, 2026 at 10:52:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 207 104 0 1 20 0 620 0 0 0 99 1 0 0 7 12 3 62 1 2 11 0 1401 0 0 0 100 2 0 0 0 55 3 87 0 3 17 0 305 0 0 0 100 3 0 0 14 132 76 131 0 3 20 0 293 0 0 0 100 4 0 0 0 12 3 34 0 2 18 0 302 0 0 0 100 5 0 0 0 6 0 30 0 1 10 0 0 0 0 0 100 6 0 0 0 20 5 72 0 1 4 0 4 0 0 0 100 7 0 0 0 10 1 26 0 1 9 0 0 0 0 0 100 March 12, 2026 at 10:52:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 202 116 1 0 3 0 294 0 0 0 100 1 0 0 7 14 4 40 1 1 2 0 1401 0 0 0 100 2 0 0 0 24 8 32 0 1 1 0 307 0 0 0 100 3 0 0 14 111 54 106 0 1 0 0 266 0 0 0 100 4 0 0 0 12 3 6 0 0 1 0 300 0 0 0 100 5 0 0 0 10 2 2 0 0 1 0 1 0 0 0 100 6 0 0 0 14 2 6 0 0 1 0 0 0 0 0 100 7 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:52:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 246 0 84 2318 209 406 4 36 3 2 2513 2 1 0 98 1 270 0 7 78 29 334 5 26 9 2 3144 2 1 0 97 2 57 0 0 34 5 390 11 39 6 1 1778 1 0 0 98 3 230 0 14 78 24 498 4 35 8 0 2696 1 0 0 98 4 84 0 0 31 4 442 8 42 8 0 2176 1 0 0 98 5 124 0 0 23 1 397 5 33 5 0 1478 1 0 0 99 6 0 0 0 40 6 354 9 34 3 0 1925 1 0 0 99 7 0 0 0 23 2 220 1 19 0 0 2012 1 0 0 99 March 12, 2026 at 10:52:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 203 118 0 0 0 0 295 0 0 0 100 1 0 0 7 126 60 150 1 0 0 0 1406 0 0 0 99 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 12 4 6 1 0 0 0 567 0 0 0 100 4 0 0 0 10 2 6 0 0 0 0 300 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 14 2 8 0 0 0 0 1 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:52:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2319 204 260 2 20 149 2 386 0 1 0 99 1 0 0 15 133 59 279 1 19 117 0 1331 0 1 0 99 2 0 0 14 19 3 140 0 22 148 0 31 0 0 0 100 3 0 0 14 77 63 149 0 18 134 1 596 0 0 0 100 4 0 0 0 26 10 140 0 13 151 0 317 0 0 0 100 5 0 0 7 10 0 142 0 17 169 0 73 0 0 0 100 6 0 0 0 22 4 241 0 21 115 0 24 0 0 0 100 7 1 0 0 18 1 124 1 15 97 0 30 0 0 0 100 March 12, 2026 at 10:52:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2325 219 122 1 5 7 0 294 0 0 0 100 1 0 0 7 71 15 104 1 6 4 0 1308 0 0 0 100 2 0 0 0 61 26 70 0 2 8 0 9 0 0 0 100 3 0 0 14 25 17 14 0 0 9 0 565 0 0 0 100 4 0 0 0 13 2 16 0 2 3 0 300 0 0 0 100 5 0 0 0 11 1 22 0 1 8 0 1 0 0 0 100 6 0 0 7 12 1 62 0 2 8 0 0 0 0 0 100 7 0 0 0 11 1 14 0 1 6 0 0 0 0 0 100 March 12, 2026 at 10:52:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2307 202 106 0 0 0 0 294 0 0 0 100 1 0 0 7 36 3 44 1 1 0 0 1308 0 0 0 100 2 0 0 0 136 56 114 0 0 0 0 6 0 0 0 100 3 0 0 14 27 4 6 0 0 0 0 567 0 0 0 100 4 0 0 0 28 3 8 0 0 0 0 302 0 0 0 100 5 0 0 0 22 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 30 1 8 0 0 0 0 0 0 0 0 100 7 0 0 0 32 4 12 0 1 0 0 3 0 0 0 100 March 12, 2026 at 10:52:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 205 108 0 3 0 0 295 0 0 0 100 1 0 0 7 75 30 100 1 1 0 0 1308 0 0 0 100 2 0 0 7 76 33 70 0 1 0 0 17 0 0 0 100 3 0 0 14 13 4 8 1 1 0 0 568 0 0 0 100 4 0 0 0 14 3 8 1 0 0 0 301 0 0 0 100 5 7 0 0 8 0 2 1 0 0 0 3 0 0 0 100 6 0 0 0 15 1 8 0 0 1 0 0 0 0 0 100 7 0 0 0 11 1 24 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:52:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 253 2340 203 1209 27 102 13 0 6593 5 1 0 93 1 8 0 7 109 24 1252 19 89 9 0 7383 4 1 0 95 2 28 0 0 78 9 906 16 62 16 0 5535 4 1 0 95 3 11 0 14 92 8 1184 22 79 28 0 6625 4 1 0 95 4 2 0 0 65 4 1059 17 49 8 0 5630 4 1 0 96 5 2 0 0 106 25 994 17 52 10 0 6179 4 1 0 96 6 14 0 0 66 2 901 10 41 14 0 6778 3 1 0 96 7 4 0 0 63 6 838 8 31 11 0 6501 2 1 0 97 March 12, 2026 at 10:52:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 208 155 1 24 199 0 303 0 1 0 99 1 0 0 7 54 14 202 1 26 230 0 1331 0 1 0 99 2 0 0 0 68 30 188 0 23 217 0 0 0 0 0 100 3 0 0 14 85 69 147 0 19 210 0 573 0 0 0 100 4 0 0 0 22 10 135 0 20 216 0 321 0 0 0 100 5 0 0 0 108 11 269 0 22 192 0 0 0 0 0 100 6 0 0 0 15 2 145 0 21 197 0 16 0 0 0 100 7 0 0 7 14 2 240 0 25 154 0 8 0 0 0 100 March 12, 2026 at 10:52:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 21 2329 202 78 0 10 23 4 407 0 0 0 100 1 20 0 7 36 6 123 1 7 33 8 1472 0 0 0 100 2 2642 0 113 10 0 72 2 5 29 12 441 1 1 0 99 3 124 0 14 162 70 221 0 15 28 19 759 0 0 0 100 4 41 0 3 125 15 194 0 13 36 11 460 0 0 0 100 5 10 0 0 34 0 97 0 6 35 3 80 0 0 0 100 6 651 0 0 32 2 64 1 3 35 5 891 1 0 0 98 7 4 0 0 30 1 100 0 5 21 2 40 0 0 0 100 March 12, 2026 at 10:52:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 203 10 0 0 2 0 315 0 0 0 100 1 6 0 14 18 5 46 1 1 3 0 1394 0 0 0 100 2 0 0 0 11 2 26 0 2 3 0 34 0 0 0 100 3 0 0 14 101 11 90 1 2 1 0 571 0 0 0 100 4 0 0 0 19 5 12 0 1 1 0 310 0 0 0 100 5 0 0 0 114 38 111 0 4 0 0 1 0 0 0 100 6 0 0 0 37 13 30 0 2 1 0 0 0 0 0 100 7 0 0 0 12 2 2 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:52:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2313 204 52 0 1 0 0 300 0 0 0 100 1 0 0 7 18 5 50 1 1 0 0 1396 0 0 0 100 2 0 0 0 6 0 8 0 1 0 0 21 0 0 0 100 3 0 0 14 23 10 22 0 0 0 0 893 0 0 0 100 4 0 0 0 12 3 8 0 0 0 0 302 0 0 0 100 5 0 0 0 112 44 108 0 6 0 0 3 0 0 0 100 6 0 0 0 75 7 68 0 4 0 0 0 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:52:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2317 207 126 1 1 0 0 300 0 0 0 100 1 0 0 7 12 3 36 1 0 1 0 1381 0 0 0 100 2 0 0 0 8 0 2 0 1 2 0 0 0 0 0 100 3 0 0 14 11 4 26 0 1 0 0 566 0 0 0 100 4 0 0 0 10 2 8 0 0 0 0 310 0 0 0 100 5 0 0 0 108 50 100 0 0 0 0 0 0 0 0 100 6 0 0 0 16 3 10 0 1 0 0 2 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:52:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 62 0 84 2329 207 636 7 39 152 1 2298 1 1 0 98 1 1 0 7 34 6 381 5 29 144 0 2788 2 1 0 98 2 0 0 0 26 1 530 8 39 131 0 1546 1 0 0 99 3 368 0 14 88 63 312 4 30 119 4 2294 1 0 0 98 4 103 0 14 33 8 538 4 34 125 0 2184 1 1 0 98 5 0 0 0 120 51 538 0 33 154 0 1716 1 0 0 99 6 168 0 0 29 3 475 4 36 103 1 1927 1 0 0 99 7 254 0 0 35 4 545 3 35 114 3 1653 1 1 0 98 March 12, 2026 at 10:52:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 205 134 0 3 4 0 294 0 0 0 100 1 0 0 7 65 29 100 2 2 11 0 1388 0 0 0 100 2 0 0 0 6 0 12 0 0 4 0 0 0 0 0 100 3 0 0 14 24 16 20 1 0 6 0 567 0 0 0 100 4 0 0 0 12 3 22 0 1 9 0 301 0 0 0 100 5 0 0 0 52 21 52 0 1 8 0 0 0 0 0 100 6 0 0 0 12 1 28 0 0 7 0 0 0 0 0 100 7 0 0 0 22 7 42 0 2 0 0 7 0 0 0 100 March 12, 2026 at 10:53:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 206 132 0 8 9 0 328 0 1 0 99 1 0 0 7 64 25 109 0 7 4 0 1341 0 0 0 100 2 0 0 12 62 25 62 0 4 3 1 132 0 0 0 100 3 0 0 24 18 4 25 2 5 17 0 575 0 0 0 100 4 0 0 0 20 3 27 0 2 11 1 321 0 0 0 100 5 0 0 0 15 2 32 0 4 14 0 4 0 0 0 100 6 0 0 14 18 1 15 0 4 14 0 3 0 0 0 100 7 0 0 0 31 8 31 0 4 8 0 32 0 0 0 100 March 12, 2026 at 10:53:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 209 112 1 3 0 0 295 0 0 0 100 1 0 0 7 13 3 40 1 0 2 0 1299 0 0 0 100 2 0 0 0 75 26 70 0 3 0 0 6 0 0 0 100 3 0 0 21 51 24 50 0 2 0 0 565 0 0 0 100 4 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 5 0 0 0 27 9 20 0 0 1 0 14 0 0 0 100 6 0 0 0 17 2 30 0 1 0 0 1 0 0 0 100 7 0 0 0 13 1 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:53:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2327 206 106 0 3 0 0 294 0 0 0 100 1 0 0 119 48 21 74 1 1 0 0 1300 0 0 0 100 2 0 0 0 52 11 32 0 2 0 0 6 0 0 0 100 3 0 0 14 77 25 54 0 2 0 0 567 0 0 0 100 4 0 0 0 28 3 10 0 1 0 0 302 0 0 0 100 5 0 0 0 34 6 12 0 0 0 0 9 0 0 0 100 6 0 0 0 30 1 8 0 0 0 0 0 0 0 0 100 7 0 0 0 26 1 4 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:53:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 206 118 0 3 0 0 297 0 0 0 100 1 0 0 7 60 27 88 0 2 1 0 1298 0 0 0 100 2 0 0 0 59 23 52 0 3 1 0 0 0 0 0 100 3 0 0 14 13 4 8 1 0 3 0 565 0 0 0 100 4 0 0 0 18 7 14 0 0 1 0 303 0 0 0 100 5 0 0 0 25 9 20 0 0 0 0 11 0 0 0 100 6 0 0 7 20 3 28 0 0 3 0 21 0 0 0 100 7 0 0 0 13 1 32 0 1 0 0 7 0 0 0 100 March 12, 2026 at 10:53:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 266 2340 207 1212 25 114 17 0 7212 5 2 0 94 1 4 0 0 101 18 1143 22 92 15 0 8373 4 1 0 94 2 19 0 0 95 13 1052 16 87 8 0 6267 4 1 0 95 3 7 0 7 96 19 1167 18 68 18 0 5821 4 1 0 96 4 1 0 14 59 3 1005 15 54 11 0 6025 4 1 0 95 5 0 0 0 66 6 945 7 39 7 0 6137 4 1 0 96 6 13 0 0 64 2 1135 11 43 16 1 4831 3 1 0 96 7 3 0 0 95 6 806 9 32 21 1 6974 3 1 0 96 March 12, 2026 at 10:53:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 205 103 1 4 0 0 294 0 0 0 100 1 0 0 0 21 3 42 1 2 1 0 1040 0 0 0 100 2 0 0 0 98 46 92 0 1 1 0 1 0 0 0 100 3 0 0 7 26 7 16 0 2 1 0 561 0 0 0 100 4 0 0 14 15 5 14 1 0 1 0 587 0 0 0 100 5 0 0 0 12 3 2 0 0 1 0 1 0 0 0 100 6 0 0 0 14 2 4 0 0 1 0 0 0 0 0 100 7 0 0 0 30 10 18 1 1 1 0 8 0 0 0 100 March 12, 2026 at 10:53:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 204 112 0 4 0 0 294 0 0 0 100 1 0 0 0 69 28 112 1 2 0 0 1037 0 0 0 100 2 0 0 0 56 23 48 0 1 0 0 5 0 0 0 100 3 0 0 7 16 6 10 0 0 0 0 561 0 0 0 100 4 0 0 14 12 4 12 0 0 0 0 579 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 3 0 0 0 100 7 0 0 0 24 8 18 0 0 0 0 10 0 0 0 100 March 12, 2026 at 10:53:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 204 118 0 1 0 0 295 0 0 0 100 1 0 0 0 110 50 134 0 2 1 0 1038 0 0 0 100 2 0 0 0 8 0 20 0 1 1 0 0 0 0 0 100 3 0 0 7 15 5 8 1 0 0 0 559 0 0 0 100 4 0 0 14 11 3 10 1 0 0 0 575 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 6 0 1 0 0 1 0 0 0 100 7 0 0 0 20 6 14 0 0 0 0 6 0 0 0 100 March 12, 2026 at 10:53:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 797 0 127 2325 213 312 0 27 215 18 438 0 1 0 99 1 71 0 0 50 3 236 1 25 198 10 1239 0 1 0 99 2 48 0 3 104 40 280 0 23 239 9 144 0 0 0 100 3 1896 0 7 91 62 192 2 20 209 8 967 0 1 0 99 4 24 0 14 45 15 191 0 18 235 9 671 0 0 0 100 5 16 0 0 23 0 168 0 20 221 8 103 0 0 0 100 6 23 0 0 28 1 220 0 20 239 6 146 0 0 0 100 7 649 0 0 48 9 297 1 25 149 4 1235 1 1 0 98 March 12, 2026 at 10:53:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2320 212 140 1 5 18 0 294 0 0 0 100 1 0 0 0 11 2 64 1 1 23 0 1123 0 0 0 100 2 0 0 0 110 40 128 0 5 20 0 0 0 0 0 100 3 0 0 7 31 22 44 0 2 7 0 559 0 0 0 100 4 0 0 14 23 9 44 1 2 23 0 574 0 0 0 100 5 0 0 0 6 0 28 0 2 19 0 20 0 0 0 100 6 0 0 0 12 2 34 0 1 24 0 1 0 0 0 100 7 0 0 0 10 1 54 0 5 9 0 0 0 0 0 100 March 12, 2026 at 10:53:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 83 0 70 2319 207 484 8 41 2 0 2238 1 1 0 98 1 70 0 0 75 25 316 11 26 4 0 2549 1 0 0 98 2 384 0 14 74 23 198 7 17 3 1 1457 2 0 0 97 3 117 0 0 28 4 455 8 42 10 0 2431 1 0 0 99 4 6 0 14 41 9 413 14 44 4 0 2582 1 0 0 99 5 199 0 0 21 0 248 13 24 4 2 2344 1 0 0 99 6 138 0 0 21 1 276 4 25 7 1 1974 2 0 0 98 7 23 0 7 78 2 384 14 35 4 0 2073 1 0 0 98 March 12, 2026 at 10:53:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2307 203 22 0 4 0 0 301 0 0 0 99 1 0 0 0 102 19 128 0 3 10 1 1145 0 0 0 100 2 0 0 0 40 15 36 0 2 0 0 22 0 0 0 100 3 0 0 0 13 3 12 0 2 0 0 310 0 0 0 100 4 0 0 14 15 3 14 1 0 1 0 573 0 0 0 100 5 11 0 0 10 1 6 0 1 2 1 7 0 0 0 100 6 0 0 0 12 1 5 0 1 7 0 19 0 0 0 100 7 3 0 7 120 33 114 1 4 3 0 275 0 0 0 100 March 12, 2026 at 10:53:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 203 61 1 4 9 0 319 0 0 0 100 1 0 0 11 13 2 56 1 6 10 0 1130 0 0 0 100 2 0 0 0 41 13 48 0 3 4 0 36 0 0 0 100 3 0 0 6 84 15 93 0 11 15 0 328 0 1 0 99 4 0 0 28 17 4 27 0 5 15 0 569 0 0 0 100 5 0 0 0 16 2 39 0 1 0 0 120 0 0 0 100 6 0 0 0 15 1 16 0 3 4 0 20 0 0 0 100 7 0 0 7 120 38 117 0 7 6 0 274 0 0 0 100 March 12, 2026 at 10:53:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 202 241 1 14 121 0 295 0 0 0 99 1 0 0 0 16 3 161 1 16 139 0 1038 0 0 0 100 2 0 0 7 23 7 137 1 16 141 0 9 0 0 0 100 3 0 0 0 72 61 117 0 15 122 0 300 0 0 0 100 4 0 0 14 24 9 166 1 14 187 0 572 0 0 0 100 5 0 0 0 9 0 137 0 13 102 0 0 0 0 0 100 6 0 0 0 13 3 125 0 12 136 0 16 0 0 0 100 7 0 0 7 116 52 342 0 10 146 0 267 0 0 0 100 March 12, 2026 at 10:53:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2333 207 145 0 4 11 0 294 0 0 0 100 1 0 0 112 67 30 132 1 2 13 0 1038 0 0 0 100 2 0 0 0 50 12 63 0 2 12 0 10 0 0 0 100 3 0 0 7 58 34 38 0 3 18 0 300 0 0 0 100 4 0 0 14 31 4 42 0 2 13 0 568 0 0 0 100 5 0 0 0 23 0 28 0 1 10 0 0 0 0 0 100 6 0 0 0 25 1 30 0 1 11 0 0 0 0 0 100 7 0 0 7 68 17 110 0 3 4 0 266 0 0 0 100 March 12, 2026 at 10:53:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 216 116 0 4 1 0 315 0 0 0 100 1 0 0 0 45 19 70 0 1 1 0 1041 0 0 0 100 2 0 0 0 93 31 86 0 4 1 0 15 0 0 0 100 3 0 0 0 16 4 24 0 1 3 0 301 0 0 0 100 4 0 0 21 15 4 12 1 1 1 0 566 0 0 0 100 5 0 0 0 11 2 2 0 0 1 0 1 0 0 0 100 6 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 7 0 0 7 20 4 10 1 1 1 0 262 0 0 0 100 March 12, 2026 at 10:53:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 266 2328 204 1062 18 96 11 0 8104 4 2 0 94 1 20 0 0 113 24 1042 18 81 14 0 8717 4 1 0 95 2 20 0 0 107 24 1037 13 72 17 0 6390 5 1 0 94 3 0 0 0 81 12 1020 10 59 7 0 7135 4 1 0 95 4 32 0 14 71 9 1063 9 50 9 0 5801 4 1 0 95 5 17 0 0 65 0 1172 9 46 15 0 5324 4 1 0 96 6 14 0 0 52 1 1099 6 33 5 0 5217 3 1 0 96 7 36 0 7 63 4 876 7 34 9 1 6043 3 1 0 96 March 12, 2026 at 10:53:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 203 12 1 2 0 0 295 0 0 0 100 1 0 0 0 18 2 40 1 1 0 0 1037 0 0 0 100 2 0 0 0 8 1 2 0 1 0 0 0 0 0 0 100 3 0 0 0 109 5 102 0 2 0 0 300 0 0 0 100 4 0 0 14 11 3 8 1 0 0 0 566 0 0 0 100 5 0 0 0 108 48 104 0 1 0 0 10 0 0 0 100 6 0 0 0 20 7 14 0 0 0 0 7 0 0 0 100 7 0 0 7 17 3 10 0 0 0 0 260 0 0 0 100 March 12, 2026 at 10:53:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2626 0 126 2313 202 223 2 25 241 9 654 1 1 0 98 1 125 0 0 61 3 261 0 28 243 17 1230 0 1 0 99 2 17 0 3 28 2 181 0 23 225 6 87 0 0 0 100 3 660 0 0 118 57 210 1 29 203 9 1220 1 1 0 98 4 36 0 14 41 10 195 0 19 242 4 737 0 0 0 100 5 32 0 0 126 45 332 0 31 233 10 181 0 0 0 100 6 13 0 0 36 7 209 0 26 228 10 102 0 0 0 100 7 6 0 7 43 5 284 1 22 198 2 353 0 0 0 100 March 12, 2026 at 10:53:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 202 154 0 3 19 0 294 0 0 0 100 1 0 0 0 17 4 77 1 1 26 0 1121 0 0 0 100 2 0 0 0 103 48 124 0 1 22 0 0 0 0 0 100 3 0 0 0 36 27 28 0 0 17 0 303 0 0 0 100 4 0 0 14 11 3 50 1 0 27 0 566 0 0 0 100 5 0 0 0 12 2 38 0 1 22 0 11 0 0 0 100 6 0 0 0 17 5 67 1 3 32 0 5 0 0 0 100 7 0 0 7 20 4 86 1 3 15 0 264 0 0 0 100 March 12, 2026 at 10:53:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 204 114 0 2 0 0 294 0 0 0 100 1 0 0 0 83 38 106 1 1 0 0 1121 0 0 0 100 2 0 0 0 32 12 32 0 3 0 0 4 0 0 0 100 3 0 0 0 11 3 4 0 0 0 0 301 0 0 0 100 4 0 0 14 12 4 10 0 0 0 0 568 0 0 0 100 5 0 0 0 8 1 6 0 0 0 0 5 0 0 0 100 6 0 0 0 22 8 20 0 0 0 0 327 0 0 0 100 7 0 0 7 15 2 8 0 0 0 0 260 0 0 0 100 March 12, 2026 at 10:53:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 203 116 1 0 0 0 295 0 0 0 100 1 0 0 0 9 1 32 1 0 1 0 1121 0 0 0 100 2 0 0 0 120 57 116 0 0 0 0 10 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 303 0 0 0 100 4 0 0 14 13 4 10 1 0 0 0 567 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 12 2 4 0 0 0 0 0 0 0 0 100 7 0 0 7 15 2 30 0 1 0 0 260 0 0 0 100 March 12, 2026 at 10:53:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 70 2308 202 248 2 28 5 0 1698 2 1 0 98 1 303 0 0 24 2 340 9 32 4 0 2799 1 1 0 98 2 311 0 0 104 41 426 13 23 11 1 1909 1 0 0 98 3 218 0 0 18 2 103 2 11 2 0 1875 1 0 0 98 4 3 0 14 50 18 290 4 27 1 0 2113 1 0 0 98 5 156 0 0 47 1 294 5 16 1 1 1694 1 0 0 99 6 53 0 0 19 1 201 5 21 5 0 1379 1 0 0 99 7 0 0 7 31 2 251 5 23 3 0 1610 1 0 0 99 March 12, 2026 at 10:53:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2320 208 330 0 20 120 0 306 0 0 0 99 1 0 0 0 15 3 193 1 10 129 0 1134 0 0 0 99 2 0 0 0 17 2 140 1 11 148 1 11 0 0 0 100 3 0 0 0 101 92 152 0 13 134 1 312 0 0 0 100 4 5 0 14 127 62 283 1 22 153 0 590 0 0 0 100 5 0 0 0 111 2 254 0 12 165 0 5 0 0 0 100 6 0 0 0 11 1 168 0 13 143 0 29 0 0 0 100 7 0 0 7 22 3 167 1 15 168 0 272 0 0 0 100 March 12, 2026 at 10:53:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2348 226 120 0 7 8 0 341 0 0 0 99 1 0 0 0 40 14 76 1 4 7 0 1051 0 0 0 100 2 0 0 0 13 1 37 0 5 18 0 5 0 0 0 100 3 0 0 0 14 2 12 0 1 7 0 313 0 0 0 100 4 0 0 23 51 5 58 0 7 14 0 569 0 1 0 99 5 0 0 21 17 3 17 0 3 5 0 22 0 0 0 100 6 0 0 0 79 19 89 0 3 5 2 154 0 0 0 100 7 0 0 7 22 3 25 0 3 6 0 292 0 0 0 100 March 12, 2026 at 10:53:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 202 116 1 1 0 0 297 0 0 0 100 1 0 0 0 128 60 152 1 0 1 0 1050 0 0 0 99 2 0 0 0 15 3 6 0 1 3 0 1 0 0 0 100 3 0 0 0 12 3 22 0 1 2 0 300 0 0 0 100 4 0 0 14 14 4 8 1 0 1 0 567 0 0 0 100 5 0 0 0 17 3 8 0 1 1 0 1 0 0 0 100 6 0 0 7 12 3 6 0 1 1 0 1 0 0 0 100 7 0 0 7 17 3 8 0 0 1 0 260 0 0 0 100 March 12, 2026 at 10:53:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2329 205 118 0 0 0 0 297 0 0 0 100 1 0 0 112 126 60 158 0 0 0 0 1061 0 0 0 100 2 0 0 0 24 1 6 0 0 0 0 18 0 0 0 100 3 0 0 0 27 3 6 0 0 0 0 304 0 0 0 100 4 0 0 14 28 4 10 0 0 0 0 567 0 0 0 100 5 0 0 0 26 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 26 1 4 0 0 0 0 0 0 0 0 100 7 0 0 7 31 2 12 0 1 0 0 260 0 0 0 100 March 12, 2026 at 10:53:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 203 118 0 0 0 0 295 0 0 0 100 1 0 0 0 115 53 134 2 0 0 0 1047 0 0 0 100 2 0 0 0 17 5 12 0 1 0 0 0 0 0 0 100 3 0 0 0 12 2 4 0 0 1 0 300 0 0 0 100 4 0 0 14 12 3 26 1 1 1 0 566 0 0 0 100 5 0 0 7 10 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 7 0 0 7 17 2 10 1 0 0 0 260 0 0 0 100 March 12, 2026 at 10:53:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 210 2348 205 1186 30 138 136 0 4922 5 1 0 94 1 3 0 0 77 10 971 21 108 153 0 6155 4 1 0 95 2 7 0 0 142 46 1104 22 101 137 0 5415 3 1 0 96 3 0 0 0 115 62 857 13 98 147 2 5325 3 1 0 96 4 2 0 14 63 9 886 13 93 124 0 6019 3 1 0 96 5 0 0 0 52 3 835 10 84 171 0 4430 3 1 0 97 6 24 0 0 67 5 919 16 87 178 0 3686 3 1 0 96 7 2 0 7 65 4 864 11 92 214 0 4787 2 1 0 97 March 12, 2026 at 10:53:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 56 2312 204 256 5 21 12 0 1255 1 1 0 99 1 0 0 0 112 49 309 2 17 13 0 2125 1 0 0 99 2 3 0 0 18 1 176 5 11 8 0 758 1 0 0 99 3 13 0 0 33 18 229 1 9 3 0 931 1 0 0 99 4 0 0 14 27 7 198 5 15 4 0 1556 1 0 0 99 5 4 0 0 23 3 283 4 9 12 0 868 1 0 0 99 6 0 0 0 19 2 141 1 9 13 0 1246 1 0 0 99 7 0 0 7 24 3 124 1 10 8 0 1706 1 0 0 99 March 12, 2026 at 10:53:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 203 116 0 0 0 0 298 0 0 0 100 1 0 0 0 111 52 134 1 0 0 0 1339 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 22 9 22 0 0 0 0 575 0 0 0 100 5 0 0 0 10 1 4 0 0 1 0 0 0 0 0 100 6 0 0 0 8 1 22 0 1 0 0 0 0 0 0 100 7 0 0 7 19 4 14 0 0 0 0 265 0 0 0 100 March 12, 2026 at 10:53:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 204 132 0 1 0 0 295 0 0 0 100 1 0 0 0 110 52 134 0 0 0 0 1338 0 0 0 100 2 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 1 0 14 27 11 24 1 0 0 0 579 0 0 0 100 5 0 0 0 8 1 6 0 0 0 0 20 0 0 0 100 6 0 0 0 10 1 4 0 0 1 0 0 0 0 0 100 7 0 0 7 18 3 14 1 1 0 0 264 0 0 0 100 March 12, 2026 at 10:53:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2640 0 128 2308 202 152 2 9 16 15 673 1 1 0 98 1 99 0 0 120 48 192 1 10 10 12 1606 0 0 0 99 2 673 0 0 35 6 79 0 11 9 20 947 1 0 0 98 3 36 0 0 23 1 44 0 9 5 6 74 0 0 0 100 4 34 0 14 41 10 57 1 7 6 7 683 0 0 0 100 5 11 0 0 34 1 43 0 7 7 6 99 0 0 0 100 6 20 0 0 24 1 46 0 6 6 6 131 0 0 0 100 7 7 0 7 36 4 46 0 6 3 3 357 0 0 0 100 March 12, 2026 at 10:53:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 202 159 1 13 215 0 298 0 1 0 99 1 0 0 0 11 2 187 1 11 218 0 1418 0 0 0 99 2 0 0 0 109 11 238 0 9 186 0 0 0 0 0 100 3 0 0 0 65 58 137 0 7 160 0 5 0 0 0 100 4 0 0 14 21 9 230 1 15 157 0 886 0 0 0 100 5 0 0 0 118 45 226 1 15 174 0 6 0 0 0 100 6 0 0 0 14 3 147 0 17 171 0 26 0 0 0 100 7 0 0 7 20 3 156 0 13 202 0 267 0 0 0 100 March 12, 2026 at 10:53:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35 0 70 2316 202 486 9 39 24 0 2332 1 1 0 99 1 225 0 0 27 2 325 11 22 24 0 2993 2 1 0 98 2 177 0 0 71 3 560 5 44 34 1 1756 1 0 0 99 3 249 0 0 110 65 496 4 29 19 1 1923 1 0 0 99 4 225 0 14 23 4 478 3 25 21 1 2125 1 0 0 99 5 6 0 0 130 27 356 5 20 19 0 1852 1 0 0 99 6 183 0 0 20 1 214 6 14 10 1 1207 2 0 0 98 7 86 0 7 31 3 362 6 21 27 0 2047 2 0 0 98 March 12, 2026 at 10:53:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2306 203 58 0 2 9 0 330 0 0 0 100 1 0 0 0 16 4 41 0 1 3 0 1433 0 0 0 100 2 0 0 0 30 7 26 0 0 2 0 17 0 0 0 100 3 0 0 0 120 56 117 0 3 0 0 17 0 0 0 100 4 5 0 14 14 4 14 1 2 4 0 580 0 0 0 100 5 0 0 0 68 3 60 0 1 1 0 5 0 0 0 100 6 0 0 0 12 2 6 0 0 1 0 12 0 0 0 100 7 0 0 7 21 4 12 1 0 5 0 272 0 0 0 100 March 12, 2026 at 10:53:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 110 0 0 0 0 294 0 0 0 100 1 0 0 0 11 2 34 1 0 0 0 1427 0 0 0 100 2 0 0 0 16 0 12 0 1 0 0 0 0 0 0 100 3 0 0 0 127 61 142 0 1 0 0 13 0 0 0 100 4 0 0 14 12 4 12 0 1 0 0 570 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 15 2 8 0 0 0 0 260 0 0 0 100 March 12, 2026 at 10:53:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2312 203 144 1 7 7 0 373 0 1 0 99 1 0 0 0 16 2 47 1 3 16 0 1342 0 0 0 100 2 0 0 7 19 2 17 1 2 6 0 8 0 1 0 99 3 0 0 0 130 59 145 0 3 13 0 64 0 0 0 100 4 0 0 14 16 3 25 1 4 1 0 651 0 0 0 100 5 0 0 0 12 1 25 0 2 9 0 0 0 0 0 100 6 0 0 9 15 2 17 0 4 7 0 33 0 0 0 100 7 0 0 7 23 3 21 0 2 11 0 280 0 0 0 100 March 12, 2026 at 10:53:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 202 219 0 7 150 0 297 0 0 0 99 1 0 0 0 15 3 173 2 7 147 0 1360 0 0 0 99 2 0 0 0 10 1 92 0 11 109 0 1 0 0 0 100 3 0 0 0 181 116 202 1 10 133 0 9 0 0 0 100 4 0 0 14 22 11 148 0 6 131 0 571 0 0 0 100 5 0 0 0 12 1 128 1 11 135 0 0 0 0 0 100 6 0 0 7 17 3 206 1 11 107 0 13 0 0 0 100 7 0 0 7 24 3 144 0 12 151 0 267 0 0 0 100 March 12, 2026 at 10:53:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2324 202 80 0 2 3 0 294 0 0 0 100 1 0 0 112 12 3 58 0 1 6 0 1339 0 0 0 100 2 0 0 0 42 9 20 0 2 2 0 5 0 0 0 100 3 0 0 0 139 66 106 0 1 1 0 11 0 0 0 100 4 0 0 14 27 3 26 1 0 4 0 570 0 0 0 100 5 0 0 0 28 2 22 0 0 9 0 1 0 0 0 100 6 0 0 0 26 1 60 0 1 5 0 0 0 0 0 100 7 0 0 7 74 3 72 1 5 6 0 260 0 0 0 100 March 12, 2026 at 10:53:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 202 116 0 0 2 0 294 0 0 0 100 1 0 0 0 13 3 36 1 0 0 0 1337 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 124 59 116 0 0 0 0 8 0 0 0 100 4 0 0 14 13 4 10 0 0 0 0 567 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 1 22 0 0 1 0 0 0 0 0 100 7 0 0 7 16 2 10 0 2 0 0 260 0 0 0 100 March 12, 2026 at 10:53:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 55 0 252 2338 206 1120 23 106 9 0 7390 5 1 0 93 1 18 0 0 84 6 1059 27 87 11 0 7495 5 1 0 94 2 10 0 0 74 5 1059 17 86 14 0 6494 4 1 0 94 3 5 0 0 76 10 929 13 60 11 0 6731 3 1 0 96 4 0 0 14 149 23 1203 14 64 10 1 6044 4 1 0 95 5 8 0 0 71 9 896 12 47 24 0 5232 3 1 0 96 6 9 0 0 123 27 994 6 51 12 0 4819 3 1 0 96 7 0 0 7 74 6 915 5 32 5 0 5901 3 1 0 96 March 12, 2026 at 10:53:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 96 0 4 0 0 294 0 0 0 100 1 0 0 0 13 3 36 1 0 0 0 1338 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 30 5 26 0 3 0 0 567 0 0 0 100 5 0 0 0 18 6 12 0 0 0 0 5 0 0 0 100 6 0 0 0 12 2 8 0 0 1 0 11 0 0 0 100 7 0 0 7 116 51 127 0 2 0 0 260 0 0 0 100 March 12, 2026 at 10:53:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2313 204 254 0 20 187 0 297 0 1 0 99 1 0 0 0 101 47 242 0 11 185 0 1337 0 0 0 99 2 0 0 0 8 1 118 0 13 179 0 0 0 0 0 100 3 0 0 0 75 62 124 0 13 222 0 3 0 0 0 100 4 0 0 14 27 9 147 1 12 190 0 569 0 0 0 100 5 0 0 0 20 6 133 0 14 193 0 5 0 0 0 100 6 0 0 0 14 3 251 0 18 144 0 26 0 0 0 100 7 0 0 7 30 5 192 1 17 256 0 267 0 0 0 100 March 12, 2026 at 10:53:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 130 0 0 13 0 294 0 0 0 100 1 0 0 0 111 52 180 1 2 15 0 1338 0 0 0 100 2 0 0 0 6 0 34 0 2 20 0 3 0 0 0 100 3 0 0 0 31 24 22 0 2 13 0 0 0 0 0 100 4 1 0 14 20 4 38 0 0 12 0 596 0 0 0 100 5 0 0 0 26 10 42 0 0 17 0 11 0 0 0 100 6 0 0 0 8 1 58 0 3 5 0 10 0 0 0 100 7 0 0 7 13 3 33 0 2 11 0 261 0 0 0 100 March 12, 2026 at 10:53:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 108 1 0 0 0 294 0 0 0 100 1 0 0 0 119 56 162 1 1 2 0 1347 0 0 0 100 2 0 0 0 12 3 10 0 1 1 0 9 0 0 0 100 3 0 0 0 15 5 8 0 1 1 0 2 0 0 0 100 4 0 0 14 21 4 16 1 0 1 0 566 0 0 0 100 5 0 0 0 18 6 12 0 0 2 0 325 0 0 0 100 6 0 0 0 10 2 4 0 0 1 0 10 0 0 0 100 7 0 0 7 12 3 4 0 0 1 0 260 0 0 0 100 March 12, 2026 at 10:53:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 201 106 0 0 0 0 294 0 0 0 100 1 1 0 0 27 9 52 1 0 1 0 1349 0 0 0 100 2 0 0 0 106 50 120 0 1 0 0 0 0 0 0 100 3 0 0 0 17 6 10 0 0 0 0 5 0 0 0 100 4 0 0 14 21 4 20 1 0 0 0 569 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 8 0 0 0 0 14 0 0 0 100 7 0 0 7 11 2 6 0 0 0 0 260 0 0 0 100 March 12, 2026 at 10:53:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 211 118 0 6 0 0 295 0 0 0 100 1 0 0 0 32 11 56 0 4 0 0 1344 0 0 0 100 2 0 0 0 80 33 74 0 3 0 0 0 0 0 0 100 3 0 0 0 21 8 16 0 0 0 0 11 0 0 0 100 4 0 0 14 18 3 16 0 0 0 0 566 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 3 0 0 0 100 6 0 0 0 10 2 10 0 0 0 0 35 0 0 0 100 7 0 0 7 12 2 6 1 0 0 0 260 0 0 0 100 March 12, 2026 at 10:53:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 204 119 0 2 3 0 295 0 0 0 100 1 0 0 0 63 28 90 2 1 3 0 1339 0 0 0 100 2 0 0 0 54 21 46 0 1 1 0 0 0 0 0 100 3 0 0 0 17 6 26 0 1 2 0 5 0 0 0 100 4 0 0 14 25 9 24 0 0 0 0 575 0 0 0 100 5 0 0 0 12 3 10 0 0 1 0 0 0 0 0 100 6 0 0 0 12 3 16 0 0 2 0 22 0 0 0 100 7 0 0 7 13 2 16 0 0 1 0 269 0 0 0 100 March 12, 2026 at 10:53:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 655 0 14 2324 201 54 3 6 7 8 1205 1 1 0 98 1 35 0 0 129 13 169 1 7 5 4 1506 0 0 0 100 2 5 0 0 114 40 120 0 8 6 1 45 0 0 0 100 3 4 0 0 38 7 29 2 2 3 1 380 0 0 0 100 4 2663 0 127 17 3 76 3 4 6 19 1018 1 1 0 99 5 99 0 0 44 8 125 0 15 14 17 194 0 0 0 100 6 41 0 2 24 1 61 0 9 7 13 164 0 0 0 100 7 20 0 7 28 2 54 0 8 10 5 405 0 0 0 100 March 12, 2026 at 10:53:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 50 0 2 0 0 294 0 0 0 100 1 0 0 0 111 52 134 1 0 0 0 1421 0 0 0 100 2 0 0 0 66 0 58 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 13 4 10 1 0 0 0 568 0 0 0 100 5 0 0 0 26 6 20 0 0 0 0 5 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 11 0 0 0 100 7 0 0 7 11 2 6 0 0 0 0 260 0 0 0 100 March 12, 2026 at 10:53:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2320 214 111 0 7 0 0 295 0 0 0 100 1 0 0 0 72 28 96 0 4 0 0 1417 0 0 0 100 2 0 0 0 38 12 32 0 3 0 0 0 0 0 0 100 3 22 0 0 13 4 10 0 0 3 0 6 0 0 0 100 4 0 0 14 10 3 8 0 0 0 0 567 0 0 0 100 5 0 0 0 34 9 28 0 0 2 0 10 0 0 0 100 6 20 0 0 10 2 10 0 1 2 0 18 0 0 0 100 7 0 0 7 12 2 22 1 1 0 0 260 0 0 0 100 March 12, 2026 at 10:53:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 204 128 0 3 0 0 294 0 0 0 100 1 0 0 0 61 25 82 1 2 0 0 1419 0 0 0 100 2 0 0 0 56 25 52 0 1 0 0 0 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 4 0 0 14 12 4 10 0 0 0 0 567 0 0 0 100 5 0 0 0 28 7 22 0 0 0 0 6 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 7 0 0 7 13 2 8 0 0 1 0 260 0 0 0 100 March 12, 2026 at 10:53:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 203 129 1 3 3 0 297 0 0 0 100 1 0 0 0 67 30 96 1 2 4 0 1416 0 0 0 100 2 0 0 0 52 22 48 0 1 1 0 8 0 0 0 100 3 0 0 0 20 7 18 1 0 0 0 7 0 0 0 100 4 0 0 14 19 10 14 1 0 0 0 569 0 0 0 100 5 0 0 0 28 7 26 0 0 1 0 324 0 0 0 100 6 0 0 0 14 4 18 0 0 1 0 24 0 0 0 100 7 0 0 7 15 3 20 0 0 1 0 267 0 0 0 100 March 12, 2026 at 10:53:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2320 215 112 0 3 0 0 294 0 0 0 100 1 0 0 0 39 5 72 1 4 0 0 1416 0 0 0 100 2 0 0 0 72 33 70 0 1 0 0 3 0 0 0 100 3 0 0 0 19 7 14 0 0 0 0 9 0 0 0 100 4 0 0 14 13 4 16 1 1 0 0 567 0 0 0 100 5 0 0 0 20 3 14 0 0 0 0 1 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 11 0 0 0 100 7 0 0 7 13 3 8 0 0 0 0 261 0 0 0 100 March 12, 2026 at 10:53:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 110 0 0 1 0 318 0 0 0 100 1 0 0 0 14 3 34 2 0 2 0 1417 0 0 0 100 2 0 0 0 110 52 102 0 0 0 0 1 0 0 0 100 3 0 0 0 19 7 12 0 0 1 0 7 0 0 0 100 4 0 0 14 14 4 10 0 0 1 0 567 0 0 0 100 5 0 0 0 22 4 32 0 1 2 0 1 0 0 0 100 6 0 0 0 10 2 6 0 1 1 0 10 0 0 0 100 7 0 0 7 13 3 4 1 0 1 0 260 0 0 0 100 March 12, 2026 at 10:53:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 203 108 0 2 0 0 294 0 0 0 100 1 0 0 0 66 30 65 0 1 0 0 1226 0 0 0 100 2 0 0 0 50 21 46 0 1 0 0 18 0 0 0 100 3 0 0 0 27 11 20 0 0 0 0 12 0 0 0 100 4 0 0 14 12 4 10 0 0 0 0 568 0 0 0 100 5 0 0 0 18 2 12 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 6 0 0 0 0 13 0 0 0 100 7 0 0 7 11 2 6 0 0 0 0 260 0 0 0 100 March 12, 2026 at 10:53:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 99 0 84 2313 202 396 8 46 10 0 2313 1 1 0 98 1 195 0 0 48 5 364 8 39 4 1 2492 2 0 0 98 2 237 0 0 132 52 543 12 52 11 0 1972 1 0 0 98 3 155 0 0 34 4 342 14 37 9 0 2038 1 0 0 98 4 54 0 14 30 3 259 14 35 5 0 2632 1 0 0 99 5 23 0 0 38 5 319 10 27 6 0 1777 1 0 0 98 6 80 0 0 35 3 367 5 40 3 1 1949 1 0 0 99 7 216 0 7 25 3 359 1 16 19 2 2142 1 0 0 98 March 12, 2026 at 10:53:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 201 213 0 13 109 0 295 0 0 0 99 1 0 0 0 11 2 137 1 13 156 0 1129 0 0 0 100 2 0 0 0 118 56 205 0 12 114 0 309 0 0 0 100 3 0 0 0 69 61 116 0 12 107 0 0 0 0 0 100 4 0 0 14 23 10 156 1 12 136 0 575 0 0 0 100 5 0 0 0 13 3 126 0 17 126 0 0 0 0 0 100 6 0 0 0 24 3 242 0 18 107 0 19 0 0 0 100 7 0 0 7 13 2 148 0 15 122 0 267 0 0 0 100 March 12, 2026 at 10:53:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 15 2308 201 138 0 1 21 0 294 0 0 0 100 1 0 0 0 11 2 72 1 1 26 0 1130 0 0 0 100 2 0 0 0 124 59 142 0 0 14 0 312 0 0 0 100 3 0 0 0 46 40 32 0 0 15 0 3 0 0 0 100 4 0 0 14 13 4 88 0 3 20 0 565 0 0 0 100 5 0 0 0 11 2 32 0 0 20 0 0 0 0 0 100 6 0 0 0 16 1 118 0 0 22 0 0 0 0 0 100 7 0 0 7 12 2 64 1 1 33 0 260 0 0 0 100 March 12, 2026 at 10:54:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 205 128 0 4 1 0 294 0 0 0 100 1 0 0 0 59 26 84 1 1 0 0 1128 0 0 0 100 2 0 0 0 69 28 60 1 3 0 0 309 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 14 5 12 0 0 0 0 568 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 7 0 0 7 13 2 8 0 0 1 0 260 0 0 0 100 March 12, 2026 at 10:54:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2320 206 135 1 2 8 0 328 0 0 0 99 1 0 0 0 115 51 180 2 5 9 2 1205 0 0 0 100 2 0 0 8 28 9 30 0 3 3 0 334 0 0 0 100 3 1 0 0 13 1 16 0 1 6 0 36 0 0 0 100 4 0 0 14 19 4 23 1 1 5 0 580 0 0 0 100 5 0 0 0 14 2 13 0 3 11 0 0 0 0 0 100 6 0 0 7 22 1 18 0 6 9 0 0 0 1 0 99 7 0 0 21 14 2 29 0 3 5 3 351 0 0 0 100 March 12, 2026 at 10:54:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2323 209 116 0 0 0 0 307 0 0 0 99 1 0 0 0 112 52 136 1 0 0 0 1043 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 303 0 0 0 100 3 0 0 7 7 1 2 0 1 0 0 0 0 0 0 100 4 0 0 14 16 5 12 1 0 0 0 569 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 19 2 12 0 0 0 0 1 0 0 0 100 7 0 0 7 18 2 14 0 1 0 0 260 0 0 0 100 March 12, 2026 at 10:54:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2336 207 112 0 2 1 0 306 0 0 0 100 1 0 0 112 31 3 56 1 2 5 0 1038 0 0 0 100 2 0 0 0 24 1 20 0 1 0 0 300 0 0 0 100 3 0 0 0 27 2 2 0 1 0 0 0 0 0 0 100 4 0 0 14 39 12 24 0 1 0 0 573 0 0 0 100 5 0 0 0 28 3 10 0 0 0 0 0 0 0 0 100 6 0 0 0 36 3 22 0 0 2 0 12 0 0 0 100 7 0 0 7 132 50 118 1 2 1 0 266 0 0 0 100 March 12, 2026 at 10:54:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2319 207 120 1 0 0 0 304 0 0 0 100 1 0 0 0 10 1 32 1 0 0 0 1040 0 0 0 100 2 0 0 0 11 1 4 0 1 1 0 300 0 0 0 100 3 0 0 0 8 1 20 0 1 0 0 0 0 0 0 100 4 0 0 14 19 7 16 0 0 0 0 572 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 7 0 0 14 115 53 110 0 0 0 0 261 0 0 0 100 March 12, 2026 at 10:54:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 266 2353 211 1268 23 101 17 0 7369 5 2 0 93 1 3 0 0 82 8 1369 24 98 14 0 6516 4 1 0 94 2 30 0 0 80 7 1038 16 64 24 0 6804 4 1 0 95 3 16 0 0 66 8 1138 4 50 13 0 5433 4 1 0 96 4 12 0 14 122 26 1031 5 45 19 0 6294 4 1 0 95 5 16 0 0 74 11 739 7 30 12 0 8177 3 1 0 96 6 16 0 0 70 5 974 10 44 13 0 5447 4 1 0 95 7 1 0 7 149 29 851 8 45 14 0 6137 3 1 0 96 March 12, 2026 at 10:54:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2319 207 18 0 1 0 0 305 0 0 0 100 1 0 0 0 9 1 34 1 0 0 0 1049 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 11 2 4 0 0 1 0 1 0 0 0 100 4 0 0 14 15 5 32 1 1 1 0 568 0 0 0 100 5 0 0 0 44 12 38 0 3 0 0 3 0 0 0 100 6 0 0 0 76 35 72 0 1 0 0 1 0 0 0 100 7 0 0 7 119 9 115 0 4 0 0 260 0 0 0 100 March 12, 2026 at 10:54:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 211 117 0 3 0 0 306 0 0 0 99 1 0 0 0 93 43 120 1 1 0 0 1049 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 303 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 20 7 18 0 0 0 0 572 0 0 0 100 5 0 0 0 10 2 24 0 1 0 0 0 0 0 0 100 6 0 0 0 22 5 14 0 2 0 0 0 0 0 0 100 7 0 0 7 34 5 26 1 2 0 0 261 0 0 0 100 March 12, 2026 at 10:54:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2324 211 364 0 27 195 0 299 0 1 0 99 1 0 0 0 63 23 223 1 24 215 0 1049 0 0 0 99 2 0 0 0 52 23 184 0 14 237 0 300 0 0 0 100 3 0 0 0 66 57 136 0 18 238 0 0 0 0 0 100 4 0 0 14 22 11 140 0 16 194 0 572 0 0 0 100 5 0 0 0 13 3 130 0 16 217 0 0 0 0 0 100 6 0 0 0 14 3 152 0 11 225 0 16 0 0 0 100 7 0 0 7 21 2 149 0 17 206 0 265 0 0 0 100 March 12, 2026 at 10:54:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 14 2336 207 219 1 21 33 11 727 0 0 0 99 1 1432 0 113 26 9 151 1 13 40 13 1993 1 1 0 98 2 94 0 0 116 44 213 0 16 42 8 434 0 0 0 100 3 14 0 3 63 41 136 0 9 17 6 144 0 0 0 100 4 9 0 14 35 6 85 1 6 31 5 634 0 0 0 100 5 1883 0 0 31 2 113 2 6 31 12 417 0 1 0 99 6 54 0 0 26 2 109 0 13 52 6 120 0 0 0 100 7 16 0 7 29 2 108 0 12 55 10 347 0 0 0 100 March 12, 2026 at 10:54:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 130 0 1 0 0 294 0 0 0 100 1 0 0 0 9 1 34 1 0 0 0 1136 0 0 0 100 2 0 0 0 116 55 110 0 0 0 0 305 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 15 5 12 1 0 0 0 568 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 6 0 0 1 0 1 0 0 0 100 7 0 0 7 13 2 10 0 1 0 0 260 0 0 0 100 March 12, 2026 at 10:54:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 164 0 84 2313 203 411 7 26 6 2 2201 1 1 0 98 1 79 0 0 23 1 365 3 29 8 2 3146 1 0 0 99 2 50 0 0 59 20 99 6 4 9 0 1516 2 0 0 97 3 425 0 11 99 39 360 4 26 9 5 1853 1 0 0 98 4 63 0 14 27 5 281 9 31 10 1 2312 2 0 0 98 5 0 0 0 26 3 366 2 33 6 0 2056 1 0 0 99 6 232 0 0 24 1 543 5 33 8 1 1811 1 0 0 99 7 63 0 7 29 3 328 1 22 5 0 2242 0 0 0 99 March 12, 2026 at 10:54:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2326 214 138 0 6 1 0 308 0 0 0 99 1 0 0 0 100 45 308 1 5 0 0 1464 0 0 0 99 2 0 0 0 10 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 19 5 10 0 1 0 0 0 0 0 0 100 4 0 0 14 16 6 16 0 0 0 0 570 0 0 0 100 5 0 0 0 14 4 8 0 0 0 0 2 0 0 0 100 6 0 0 0 10 2 6 0 1 0 0 2 0 0 0 100 7 0 0 7 15 3 12 0 0 0 0 266 0 0 0 100 March 12, 2026 at 10:54:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2333 209 268 1 16 145 0 352 0 1 0 99 1 0 0 0 63 23 218 0 19 137 0 1219 0 0 0 99 2 0 0 9 72 30 202 1 17 112 0 310 0 0 0 100 3 0 0 0 73 59 245 0 24 123 0 12 0 0 0 100 4 0 0 14 27 8 146 1 14 168 0 596 0 1 0 99 5 0 0 14 13 2 132 0 14 150 0 0 0 0 0 100 6 0 0 7 17 3 130 0 17 120 0 14 0 0 0 100 7 0 0 7 22 3 143 0 16 138 0 345 0 0 0 100 March 12, 2026 at 10:54:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 201 213 0 5 47 0 294 0 0 0 100 1 0 0 0 10 1 100 1 5 43 0 1041 0 0 0 100 2 0 0 0 121 57 196 0 2 36 0 309 0 0 0 100 3 0 0 0 86 79 198 0 9 21 0 0 0 0 0 100 4 0 0 14 24 13 110 1 9 38 0 568 0 0 0 100 5 0 0 0 14 2 85 0 4 46 0 0 0 0 0 100 6 0 0 0 17 4 119 0 8 53 0 18 0 0 0 100 7 0 0 14 16 3 94 0 7 34 0 266 0 0 0 100 March 12, 2026 at 10:54:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2326 207 114 0 4 0 0 294 0 0 0 100 1 0 0 112 57 25 82 1 1 1 0 1037 0 0 0 100 2 0 0 0 94 29 70 0 4 3 0 327 0 0 0 100 3 0 0 0 29 4 24 0 2 2 0 5 0 0 0 100 4 0 0 14 33 7 12 0 0 1 0 568 0 0 0 100 5 0 0 0 32 4 10 0 0 1 0 1 0 0 0 100 6 0 0 0 26 2 2 0 0 1 0 0 0 0 0 100 7 0 0 7 35 3 10 1 0 1 0 260 0 0 0 100 March 12, 2026 at 10:54:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 112 0 0 0 0 294 0 0 0 100 1 0 0 0 109 51 134 0 0 0 0 1042 0 0 0 100 2 0 0 0 27 10 20 0 0 0 0 311 0 0 0 100 3 0 0 0 12 2 4 0 0 2 0 1 0 0 0 100 4 0 0 14 15 5 32 0 1 0 0 569 0 0 0 100 5 0 0 7 12 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 7 0 0 7 14 2 8 0 0 0 0 260 0 0 0 100 March 12, 2026 at 10:54:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 252 2347 207 1094 29 112 12 0 6755 4 2 0 94 1 2 0 0 129 9 1181 14 85 16 0 6919 4 1 0 95 2 0 0 0 110 26 1134 18 62 18 0 5430 5 1 0 94 3 0 0 0 65 7 898 10 62 19 1 5688 3 1 0 96 4 1 0 14 72 9 955 17 60 18 1 6203 4 1 0 95 5 4 0 0 58 4 906 11 46 17 1 5548 4 1 0 95 6 0 0 7 106 30 856 7 40 8 1 4819 3 1 0 96 7 19 0 0 62 4 784 9 31 8 0 6597 3 1 0 96 March 12, 2026 at 10:54:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2313 201 265 0 20 243 0 296 0 1 0 99 1 0 0 0 21 7 179 1 19 206 0 1046 0 0 0 99 2 0 0 0 9 1 129 0 21 219 0 320 0 0 0 100 3 0 0 0 63 56 267 0 13 216 0 0 0 0 0 100 4 0 0 14 25 10 157 1 17 203 0 577 0 0 0 100 5 0 0 0 15 3 147 0 18 151 0 0 0 0 0 100 6 1 0 7 115 55 256 0 16 214 0 277 0 0 0 100 7 0 0 0 12 0 153 0 16 215 0 8 0 0 0 100 March 12, 2026 at 10:54:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2317 209 84 0 5 37 0 294 0 0 0 100 1 0 0 0 71 23 134 1 5 35 0 1042 0 0 0 100 2 0 0 0 8 1 46 0 1 27 0 310 0 0 0 100 3 0 0 0 36 30 82 0 4 21 0 0 0 0 0 100 4 0 0 14 14 5 50 0 2 24 0 567 0 0 0 100 5 0 0 0 12 2 55 0 4 29 0 0 0 0 0 100 6 0 0 7 91 16 152 0 9 34 0 261 0 0 0 100 7 0 0 0 38 14 82 0 6 37 0 2 0 0 0 100 March 12, 2026 at 10:54:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 207 106 0 3 0 0 294 0 0 0 100 1 0 0 0 62 28 88 0 1 0 0 1045 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 310 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 14 5 12 0 0 0 0 568 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 7 20 3 14 1 0 0 0 260 0 0 0 100 7 0 0 0 64 22 56 0 1 0 0 1 0 0 0 100 March 12, 2026 at 10:54:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 203 112 1 0 0 0 299 0 0 0 100 1 0 0 0 122 57 148 2 0 0 0 1364 0 0 0 100 2 0 0 0 8 1 6 0 0 0 0 305 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 17 6 16 1 0 0 0 570 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 7 21 3 16 0 0 2 0 260 0 0 0 100 7 0 0 0 14 2 28 0 1 0 0 2 0 0 0 100 March 12, 2026 at 10:54:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 126 0 1 0 0 295 0 0 0 100 1 0 0 0 111 52 134 1 0 0 0 1039 0 0 0 100 2 0 0 0 8 1 6 0 0 0 0 313 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 27 11 24 1 0 0 0 576 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 7 19 3 14 0 0 0 0 260 0 0 0 100 7 0 0 0 16 2 10 0 1 0 0 3 0 0 0 100 March 12, 2026 at 10:54:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2650 0 128 2311 201 167 2 3 11 14 722 1 1 0 98 1 113 0 0 75 23 145 1 10 14 14 1223 0 0 0 99 2 25 0 3 83 30 134 0 12 13 13 482 0 0 0 100 3 28 0 0 32 5 71 0 11 3 6 155 0 0 0 100 4 659 0 14 43 14 56 1 10 6 6 1494 1 1 0 98 5 39 0 0 26 2 36 0 7 5 3 95 0 0 0 100 6 3 0 7 35 3 34 0 1 3 2 303 0 0 0 100 7 5 0 0 34 3 38 0 2 1 2 62 0 0 0 100 March 12, 2026 at 10:54:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 203 110 0 4 1 0 294 0 0 0 100 1 0 0 0 62 28 108 0 2 0 0 1123 0 0 0 100 2 0 0 0 52 22 46 0 1 0 0 310 0 0 0 100 3 0 0 0 15 5 8 0 0 0 0 5 0 0 0 100 4 0 0 14 16 5 12 0 0 0 0 568 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 7 20 3 14 1 0 0 0 260 0 0 0 100 7 0 0 0 12 1 4 0 0 0 0 1 0 0 0 100 March 12, 2026 at 10:54:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 204 110 1 2 1 0 294 0 0 0 100 1 0 0 0 63 25 86 1 3 0 0 1124 0 0 0 100 2 0 0 0 60 27 76 0 2 3 0 305 0 0 0 100 3 0 0 0 19 7 10 0 0 1 0 321 0 0 0 100 4 0 0 14 17 6 12 1 0 1 0 567 0 0 0 100 5 0 0 0 14 4 6 0 0 1 0 1 0 0 0 100 6 0 0 7 21 4 14 0 0 1 0 260 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:54:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 110 0 0 0 0 297 0 0 0 100 1 0 0 0 29 11 58 1 0 0 0 1144 0 0 0 100 2 0 0 0 108 51 110 0 0 0 0 338 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 15 5 12 1 0 0 0 568 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 7 19 3 14 0 0 0 0 260 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:54:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2332 220 116 0 5 0 0 297 0 0 0 100 1 0 0 0 83 38 110 1 1 0 0 1130 0 0 0 100 2 0 0 0 40 2 38 0 5 3 0 313 0 0 0 100 3 0 0 0 7 1 20 0 1 0 0 0 0 0 0 100 4 0 0 14 14 5 12 0 0 0 0 568 0 0 0 100 5 23 0 0 12 3 6 0 0 2 0 5 0 0 0 100 6 22 0 7 21 4 18 0 0 1 0 265 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 1 0 0 0 100 March 12, 2026 at 10:54:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 120 0 0 2 0 297 0 0 0 100 1 0 0 0 118 55 142 2 0 4 0 1122 0 0 0 100 2 0 0 0 8 1 6 0 0 1 0 310 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 26 13 44 0 1 0 0 584 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 6 0 0 7 20 3 20 1 0 4 0 264 0 0 0 100 7 1 0 0 14 2 18 0 0 0 0 8 0 0 0 100 March 12, 2026 at 10:54:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 106 1 0 0 0 294 0 0 0 100 1 0 0 0 116 55 142 0 0 0 0 1440 0 0 0 100 2 0 0 0 8 1 6 0 0 0 0 305 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 3 0 0 0 100 4 0 0 14 15 5 12 1 0 0 0 568 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 7 19 3 14 0 0 0 0 260 0 0 0 100 7 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:54:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 108 0 0 0 0 294 0 0 0 100 1 0 0 0 21 7 42 1 0 0 0 1116 0 0 0 100 2 0 0 0 96 45 96 0 1 0 0 320 0 0 0 100 3 0 0 0 17 6 10 0 0 0 0 7 0 0 0 100 4 0 0 14 17 5 14 1 1 1 0 567 0 0 0 100 5 0 0 0 10 2 24 0 1 1 0 0 0 0 0 100 6 0 0 7 19 3 14 0 0 0 0 260 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:54:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 203 112 0 0 0 0 299 0 0 0 100 1 0 0 0 9 1 32 1 0 0 0 1118 0 0 0 100 2 0 0 0 108 51 106 0 0 0 0 313 0 0 0 100 3 0 0 0 23 9 16 0 0 0 0 11 0 0 0 100 4 0 0 14 14 5 12 0 0 0 0 567 0 0 0 100 5 0 0 0 12 2 6 0 0 1 0 0 0 0 0 100 6 0 0 7 19 3 34 0 1 0 0 260 0 0 0 100 7 0 0 0 12 2 8 0 0 0 0 4 0 0 0 100 March 12, 2026 at 10:54:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 106 0 0 0 0 294 0 0 0 100 1 0 0 0 11 2 34 1 0 0 0 1118 0 0 0 100 2 0 0 0 108 51 106 0 0 0 0 313 0 0 0 100 3 0 0 0 19 7 12 0 0 0 0 10 0 0 0 100 4 0 0 14 14 5 12 0 0 0 0 568 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 7 20 3 14 1 0 0 0 260 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:54:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 84 2322 202 425 21 43 129 0 2315 1 1 0 98 1 447 0 8 28 2 466 7 50 162 0 3241 1 1 0 98 2 238 0 0 120 22 415 9 33 128 0 1840 1 1 0 98 3 3 0 0 99 67 403 10 45 124 0 1269 2 0 0 98 4 157 0 14 103 39 491 6 44 187 0 2626 1 0 0 99 5 34 0 0 31 5 327 4 34 153 0 1849 2 0 0 98 6 15 0 7 34 4 371 9 40 125 0 2076 1 0 0 99 7 162 0 0 41 4 539 6 39 127 0 1760 1 0 0 99 March 12, 2026 at 10:54:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 126 0 4 2 0 294 0 0 0 100 1 0 0 0 9 1 46 1 0 10 0 1128 0 0 0 100 2 0 0 0 8 1 21 0 1 13 0 300 0 0 0 100 3 0 0 0 23 15 44 0 1 6 0 0 0 0 0 100 4 0 0 14 22 5 34 1 2 6 0 568 0 0 0 100 5 0 0 0 120 57 126 0 1 4 0 5 0 0 0 100 6 0 0 7 11 3 26 0 0 6 0 260 0 0 0 100 7 0 0 0 24 1 28 0 0 8 0 1 0 0 0 100 March 12, 2026 at 10:54:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 108 0 0 1 0 294 0 0 0 100 1 0 0 0 11 2 32 1 0 2 0 1131 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 321 0 0 0 100 3 0 0 0 9 2 2 0 1 1 0 0 0 0 0 100 4 0 0 14 22 5 18 0 0 1 0 566 0 0 0 100 5 0 0 0 124 59 116 0 0 0 0 6 0 0 0 100 6 0 0 7 15 5 8 0 0 1 0 261 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:54:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2303 201 110 0 0 2 0 297 0 0 0 100 1 0 0 0 9 1 52 1 1 0 0 1128 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 20 4 18 0 0 0 0 569 0 0 0 100 5 0 0 0 126 60 122 0 0 0 0 14 0 0 0 100 6 0 0 7 12 3 6 1 0 0 0 260 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 1 0 0 0 100 March 12, 2026 at 10:54:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 203 122 1 2 8 0 301 0 0 0 100 1 0 0 0 15 1 57 0 4 5 4 1287 0 0 0 100 2 0 0 8 16 1 43 0 5 9 0 316 0 1 0 99 3 0 0 0 12 1 30 0 10 14 0 33 0 0 0 100 4 0 0 21 26 5 35 1 8 12 0 573 0 0 0 100 5 0 0 14 129 59 145 3 5 8 0 39 0 0 0 100 6 0 0 7 17 4 14 0 2 4 0 269 0 0 0 100 7 1 0 0 18 2 24 2 5 9 0 28 0 0 0 100 March 12, 2026 at 10:54:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 206 122 0 4 1 0 294 0 0 0 100 1 0 0 0 58 25 86 1 1 5 0 1041 0 0 0 100 2 0 0 0 9 1 4 0 0 2 0 300 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 4 0 0 21 44 18 40 1 0 0 0 587 0 0 0 100 5 0 0 0 65 24 58 0 1 0 0 0 0 0 0 100 6 1 0 7 16 5 20 0 0 2 0 274 0 0 0 100 7 0 0 0 11 0 14 0 1 0 0 11 0 0 0 100 March 12, 2026 at 10:54:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2319 201 108 0 0 0 0 294 0 0 0 100 1 0 0 112 109 51 134 1 0 0 0 1039 0 0 0 100 2 0 0 0 26 1 4 0 0 1 0 300 0 0 0 100 3 0 0 0 23 1 20 0 1 0 0 0 0 0 0 100 4 0 0 14 50 10 32 0 1 0 0 576 0 0 0 100 5 0 0 0 34 5 14 0 2 0 0 2 0 0 0 100 6 0 0 7 27 3 6 0 0 0 0 260 0 0 0 100 7 0 0 0 24 0 2 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:54:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 106 0 0 0 0 294 0 0 0 100 1 0 0 0 110 51 132 1 0 0 0 1039 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 10 1 4 0 1 0 0 1 0 0 0 100 4 0 0 14 33 11 30 0 1 0 0 576 0 0 0 100 5 0 0 7 20 6 30 0 1 0 0 4 0 0 0 100 6 0 0 7 13 3 6 1 0 0 0 260 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:54:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 252 2337 203 1139 24 111 10 0 6144 6 2 0 93 1 1 0 0 125 33 1184 20 105 12 0 7568 4 1 0 94 2 35 0 0 58 2 902 10 60 6 0 7312 4 1 0 96 3 13 0 0 61 2 890 18 67 12 0 5204 5 1 0 94 4 30 0 0 113 10 967 15 54 3 2 6102 3 1 0 96 5 16 0 14 60 7 848 7 47 11 1 5586 3 1 0 97 6 4 0 7 75 15 1012 8 46 8 0 5419 3 1 0 96 7 30 0 0 59 2 766 13 31 6 0 5131 3 1 0 96 March 12, 2026 at 10:54:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 96 0 2 0 0 294 0 0 0 100 1 0 0 0 14 3 34 2 0 0 0 1040 0 0 0 100 2 0 0 0 22 8 16 0 0 0 0 310 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 20 0 0 0 100 4 0 0 0 32 3 26 0 1 0 0 302 0 0 0 100 5 0 0 14 15 4 10 1 0 1 0 266 0 0 0 100 6 0 0 7 111 53 126 0 1 0 0 260 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:54:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 208 375 0 29 199 0 294 0 0 0 99 1 0 0 0 92 42 252 1 19 209 0 1038 0 0 0 99 2 0 0 0 22 8 167 0 21 232 0 310 0 0 0 100 3 0 0 0 69 59 140 1 15 208 0 10 0 0 0 100 4 0 0 0 27 9 160 0 22 223 0 313 0 0 0 100 5 0 0 14 12 4 143 0 27 247 0 266 0 0 0 100 6 0 0 7 28 5 177 0 18 199 0 271 0 0 0 100 7 0 0 0 15 2 170 0 19 225 0 11 0 0 0 100 March 12, 2026 at 10:54:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 201 162 0 0 24 0 294 0 0 0 100 1 0 0 0 108 51 190 0 3 30 0 1040 0 0 0 100 2 0 0 0 16 5 118 0 2 25 0 305 0 0 0 100 3 0 0 0 53 47 48 0 3 17 0 10 0 0 0 100 4 0 0 0 20 3 62 0 0 19 0 302 0 0 0 100 5 0 0 14 12 4 52 0 0 33 0 297 0 0 0 100 6 0 0 7 12 3 58 1 1 17 0 260 0 0 0 100 7 0 0 0 12 2 52 0 0 24 0 2 0 0 0 100 March 12, 2026 at 10:54:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 126 1 1 2 0 294 0 0 0 100 1 0 0 0 113 53 138 1 1 1 0 1041 0 0 0 100 2 0 0 0 20 7 12 0 0 1 0 621 0 0 0 100 3 0 0 0 9 2 4 0 0 1 0 5 0 0 0 100 4 0 0 0 23 4 16 1 0 1 0 301 0 0 0 100 5 0 0 14 17 6 10 1 0 1 0 267 0 0 0 100 6 0 0 7 13 4 6 0 0 1 0 260 0 0 0 100 7 0 0 0 15 3 6 0 1 2 0 5 0 0 0 100 March 12, 2026 at 10:54:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2303 201 112 0 0 2 0 297 0 0 0 100 1 0 0 0 123 58 170 1 1 0 0 1050 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 7 1 4 0 0 0 0 20 0 0 0 100 4 0 0 0 20 3 16 0 0 0 0 302 0 0 0 100 5 0 0 14 12 4 8 0 0 0 0 266 0 0 0 100 6 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:54:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2660 0 129 2308 202 169 2 8 9 14 746 1 1 0 98 1 95 0 0 92 34 170 1 14 12 16 1274 0 0 0 99 2 667 0 0 30 2 77 1 15 11 16 1289 1 0 0 98 3 51 0 0 65 21 113 0 14 7 12 120 0 0 0 100 4 7 0 0 34 2 50 0 7 3 6 376 0 0 0 100 5 29 0 14 28 4 54 0 5 5 8 366 0 0 0 100 6 2 0 7 29 4 27 0 4 4 2 305 0 0 0 100 7 4 0 0 30 3 19 0 2 1 2 57 0 0 0 100 March 12, 2026 at 10:54:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2313 204 122 0 2 0 0 314 0 0 0 100 1 0 0 0 10 1 38 0 1 2 0 1125 0 0 0 100 2 0 0 0 8 1 6 0 2 2 0 300 0 0 0 100 3 0 0 0 123 57 136 0 2 1 0 14 0 0 0 100 4 0 0 0 28 9 30 0 1 0 0 319 0 0 0 100 5 0 0 14 12 4 10 0 0 0 0 266 0 0 0 100 6 0 0 7 18 5 22 1 0 1 0 272 0 0 0 100 7 1 0 0 12 1 14 0 0 0 0 10 0 0 0 100 March 12, 2026 at 10:54:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 202 108 1 1 0 0 304 0 0 0 100 1 0 0 0 107 50 132 1 1 1 0 1121 0 0 0 100 2 0 0 0 10 2 8 0 0 0 0 303 0 0 0 100 3 0 0 0 19 6 14 0 0 2 0 327 0 0 0 100 4 0 0 0 19 2 38 1 2 0 0 305 0 0 0 100 5 0 0 14 13 4 8 1 0 0 0 266 0 0 0 100 6 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 7 0 0 0 12 2 8 0 1 0 0 4 0 0 0 100 March 12, 2026 at 10:54:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 110 0 0 0 0 314 0 0 0 100 1 0 0 0 109 51 132 1 0 0 0 1123 0 0 0 100 2 0 0 0 22 8 16 0 0 0 0 309 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 20 3 16 0 0 0 0 302 0 0 0 100 5 0 0 14 12 4 8 0 0 0 0 266 0 0 0 100 6 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:54:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2309 204 116 0 0 0 0 314 0 0 0 100 1 0 0 0 109 51 132 1 0 0 0 1122 0 0 0 100 2 0 0 0 20 7 16 0 0 0 0 310 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 23 0 0 22 3 18 0 0 0 0 305 0 0 0 100 5 0 0 14 12 4 10 0 1 0 0 266 0 0 0 100 6 0 0 7 13 4 24 0 1 1 0 261 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:54:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 112 0 0 0 0 321 0 0 0 100 1 0 0 0 110 52 136 0 1 0 0 1119 0 0 0 100 2 1 0 0 18 6 14 0 1 0 0 315 0 0 0 100 3 1 0 0 7 1 2 0 1 0 0 1 0 0 0 100 4 1 0 0 20 3 18 0 0 0 0 303 0 0 0 100 5 3 0 14 14 5 10 0 0 0 0 271 0 0 0 100 6 3 0 7 14 3 12 1 2 2 0 272 0 0 0 100 7 1 0 0 8 0 24 0 1 0 0 1 0 0 0 100 March 12, 2026 at 10:54:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 202 90 1 2 1 0 295 0 0 0 100 1 0 0 0 83 30 106 1 2 1 0 1117 0 0 0 100 2 0 0 0 62 20 60 0 3 2 0 627 0 0 0 100 3 0 0 0 39 17 40 0 2 3 0 3 0 0 0 100 4 0 0 0 26 8 30 1 0 4 0 314 0 0 0 100 5 0 0 14 15 5 12 1 0 1 0 266 0 0 0 100 6 0 0 7 19 6 22 0 0 2 0 273 0 0 0 100 7 0 0 0 12 1 14 0 0 1 0 8 0 0 0 100 March 12, 2026 at 10:54:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 132 0 1 0 0 314 0 0 0 100 1 0 0 0 9 1 32 1 0 0 0 1117 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 121 58 114 0 0 0 0 9 0 0 0 100 4 0 0 0 20 3 16 0 0 0 0 302 0 0 0 100 5 0 0 14 12 4 8 0 0 0 0 266 0 0 0 100 6 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 7 0 0 0 12 1 6 0 0 1 0 1 0 0 0 100 March 12, 2026 at 10:54:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 112 0 0 3 0 304 0 0 0 100 1 0 0 0 11 2 54 1 1 1 0 1116 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 321 0 0 0 100 3 0 0 0 117 56 108 0 0 1 0 5 0 0 0 100 4 0 0 0 24 5 18 0 0 1 0 302 0 0 0 100 5 0 0 14 16 6 10 0 0 1 0 267 0 0 0 100 6 0 0 7 13 4 8 0 1 1 0 260 0 0 0 100 7 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 March 12, 2026 at 10:54:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 110 0 0 0 0 307 0 0 0 100 1 0 0 0 10 2 38 0 0 0 0 1127 0 0 0 100 2 0 0 0 8 1 6 0 0 0 0 318 0 0 0 100 3 0 0 0 120 57 114 1 0 0 0 10 0 0 0 100 4 0 0 0 20 3 16 0 0 0 0 302 0 0 0 100 5 0 0 14 12 4 8 0 0 0 0 266 0 0 0 100 6 0 0 7 12 3 6 1 0 0 0 260 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:54:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 243 0 92 2313 203 171 5 11 2 1 1464 2 1 0 97 1 222 0 0 24 2 343 4 23 4 0 3143 1 1 0 99 2 223 0 0 24 2 386 2 24 4 0 2189 1 0 0 99 3 27 0 0 101 37 384 7 22 2 0 1421 1 0 0 98 4 123 0 0 34 3 340 4 26 6 0 2037 0 0 0 99 5 22 0 14 37 5 318 8 25 7 0 2263 1 0 0 98 6 155 0 7 70 4 439 5 36 6 0 2014 1 0 0 99 7 125 0 0 67 23 250 2 13 8 0 1512 1 0 0 98 March 12, 2026 at 10:54:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2310 201 226 0 14 132 0 313 0 1 0 99 1 0 0 0 15 2 172 1 17 168 0 1139 0 0 0 100 2 0 0 0 14 1 138 0 17 175 0 313 0 0 0 100 3 0 0 0 92 70 160 1 10 129 0 26 0 0 0 100 4 0 0 0 33 10 152 0 12 172 0 310 0 0 0 100 5 0 0 14 17 4 232 1 19 123 0 284 0 0 0 100 6 0 0 7 18 3 174 1 14 144 0 290 0 0 0 100 7 0 0 0 116 52 257 0 14 177 0 31 0 0 0 100 March 12, 2026 at 10:54:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 140 0 1 6 0 294 0 0 0 100 1 0 0 0 9 1 54 1 1 8 0 1129 0 0 0 100 2 0 0 0 10 2 28 0 0 4 0 301 0 0 0 100 3 0 0 0 57 45 38 0 0 7 0 9 0 0 0 100 4 0 0 0 18 2 44 0 2 5 0 300 0 0 0 100 5 0 0 14 12 4 92 0 2 5 0 266 0 0 0 100 6 0 0 7 13 4 30 0 0 11 0 261 0 0 0 100 7 0 0 0 108 50 138 0 2 12 0 0 0 0 0 100 March 12, 2026 at 10:55:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 201 106 0 0 0 0 294 0 0 0 100 1 0 0 0 8 1 32 0 0 0 0 1129 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 19 6 12 0 1 2 0 9 0 0 0 100 4 0 0 0 20 3 36 0 1 0 0 302 0 0 0 100 5 0 0 14 12 4 8 0 0 0 0 266 0 0 0 100 6 0 0 7 12 3 6 1 0 0 0 260 0 0 0 100 7 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:55:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2319 209 137 1 4 5 1 326 0 0 0 99 1 0 0 14 76 33 110 1 5 6 1 1204 0 0 0 100 2 0 0 7 13 1 23 0 4 12 3 367 0 0 0 100 3 0 0 0 33 11 51 1 3 17 0 64 0 0 0 100 4 0 0 0 26 2 28 1 2 4 0 316 0 0 0 100 5 0 0 14 19 4 34 1 2 7 0 273 0 0 0 100 6 0 0 16 18 3 18 0 1 8 0 267 0 1 0 99 7 1 0 0 48 12 56 0 7 14 0 27 0 0 0 100 March 12, 2026 at 10:55:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2327 210 126 0 0 0 0 308 0 0 0 99 1 0 0 0 114 52 134 1 0 1 0 1043 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 300 0 0 0 100 3 0 0 7 11 2 2 0 1 0 0 0 0 0 0 100 4 7 0 0 21 3 18 0 0 0 0 305 0 0 0 100 5 0 0 14 13 4 8 0 0 0 0 266 0 0 0 100 6 0 0 7 12 3 6 0 0 0 0 260 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:55:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2339 210 136 0 0 0 0 308 0 0 0 99 1 0 0 0 125 51 132 1 0 0 0 1039 0 0 0 100 2 0 0 112 10 2 8 0 0 1 0 301 0 0 0 100 3 0 0 0 27 2 6 0 0 0 0 0 0 0 0 100 4 0 0 0 40 8 24 0 1 1 0 306 0 0 0 100 5 0 0 14 30 4 14 0 1 4 0 266 0 0 0 100 6 0 0 7 31 5 38 0 1 2 0 275 0 0 0 100 7 0 0 0 30 2 18 0 0 0 0 12 0 0 0 100 March 12, 2026 at 10:55:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2319 207 124 0 0 2 0 303 0 0 0 99 1 0 0 0 110 51 132 1 0 1 0 1039 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 8 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 23 4 18 0 0 0 0 303 0 0 0 100 5 0 0 14 13 4 8 0 0 0 0 266 0 0 0 100 6 0 0 7 15 3 8 1 0 0 0 260 0 0 0 100 7 0 0 0 11 1 20 0 1 0 0 1 0 0 0 100 March 12, 2026 at 10:55:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 252 2343 209 1166 20 99 14 0 6581 5 1 0 94 1 47 0 0 161 48 1168 28 97 10 0 6813 5 1 0 94 2 18 0 0 57 3 1026 11 56 10 0 6435 4 1 0 95 3 33 0 0 79 5 1070 12 47 11 0 6394 4 1 0 96 4 35 0 0 69 4 868 11 42 21 0 6067 3 1 0 96 5 12 0 14 62 6 969 11 40 15 0 5759 4 1 0 95 6 39 0 7 56 4 1072 11 35 9 0 5519 3 1 0 96 7 28 0 0 63 5 968 10 26 13 0 5963 3 1 0 96 March 12, 2026 at 10:55:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 208 140 0 3 0 0 303 0 0 0 99 1 0 0 0 109 51 136 1 1 0 0 1059 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 11 2 0 0 0 0 0 0 0 0 0 100 4 0 0 0 20 3 16 0 0 0 0 302 0 0 0 100 5 0 0 14 12 4 8 0 0 0 0 266 0 0 0 100 6 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 7 0 0 0 12 1 4 0 1 1 0 0 0 0 0 100 March 12, 2026 at 10:55:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 14 2337 207 161 0 11 8 3 446 0 0 0 99 1 506 0 113 42 17 131 1 8 5 7 1235 0 0 0 99 2 1882 0 2 78 26 120 2 11 8 12 704 0 1 0 99 3 312 0 0 49 14 93 0 12 9 15 143 0 0 0 100 4 121 0 0 35 2 74 0 4 9 16 395 0 0 0 100 5 6 0 14 30 5 39 0 4 4 7 327 0 0 0 100 6 650 0 7 28 3 32 1 4 5 4 1162 1 0 0 98 7 5 0 0 28 2 26 0 4 4 4 45 0 0 0 100 March 12, 2026 at 10:55:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2328 210 260 1 19 209 0 308 0 1 0 99 1 0 0 0 13 2 178 2 19 182 0 1168 0 0 0 99 2 0 0 0 8 1 167 0 24 207 0 303 0 0 0 100 3 0 0 0 161 105 211 0 16 189 0 0 0 0 0 100 4 0 0 0 37 13 163 0 18 197 0 317 0 0 0 100 5 0 0 14 12 4 144 0 19 199 0 266 0 0 0 100 6 0 0 7 14 3 258 1 25 198 0 265 0 0 0 100 7 0 0 0 10 0 134 0 13 200 0 7 0 0 0 100 March 12, 2026 at 10:55:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 206 170 1 6 24 0 615 0 0 0 99 1 0 0 0 12 1 72 0 4 45 0 1127 0 0 0 100 2 0 0 0 9 1 66 0 2 30 0 300 0 0 0 100 3 0 0 0 43 37 44 0 4 28 0 0 0 0 0 100 4 0 0 0 26 8 68 1 5 22 0 302 0 0 0 100 5 0 0 14 103 49 136 1 2 28 0 266 0 0 0 100 6 0 0 7 13 4 120 0 4 31 0 261 0 0 0 100 7 0 0 0 8 0 40 0 2 28 0 0 0 0 0 100 March 12, 2026 at 10:55:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 201 26 0 1 0 0 294 0 0 0 100 1 0 0 0 9 1 36 1 0 0 0 1143 0 0 0 100 2 0 0 0 10 1 4 0 0 3 0 300 0 0 0 100 3 0 0 0 7 1 2 0 1 0 0 0 0 0 0 100 4 0 0 0 28 10 42 0 1 1 0 311 0 0 0 100 5 0 0 14 72 28 66 0 2 0 0 266 0 0 0 100 6 0 0 7 51 23 48 0 1 0 0 260 0 0 0 100 7 0 0 0 92 6 90 0 5 0 0 0 0 0 0 100 March 12, 2026 at 10:55:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 110 0 70 2321 210 241 6 17 8 0 1501 1 1 0 98 1 26 0 0 85 19 548 11 30 17 0 3075 1 1 0 99 2 445 0 0 22 1 376 7 21 1 0 2129 1 0 0 98 3 187 0 0 16 1 231 1 11 3 0 1644 1 0 0 98 4 8 0 0 31 7 167 1 15 5 0 1439 2 0 0 98 5 150 0 14 22 4 533 4 24 4 0 2096 1 0 0 99 6 8 0 7 53 12 242 1 25 0 0 1958 1 0 0 99 7 0 0 0 76 15 517 1 31 1 0 1516 0 0 0 99 March 12, 2026 at 10:55:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2306 201 44 0 3 0 0 300 0 0 0 100 1 0 0 0 126 36 158 0 2 1 0 1153 0 0 0 100 2 0 0 0 12 2 8 0 1 5 0 318 0 0 0 100 3 0 0 0 13 3 10 0 1 0 0 11 0 0 0 100 4 17 0 0 20 4 18 0 1 3 0 316 0 0 0 100 5 6 0 14 14 4 32 0 2 0 0 274 0 0 0 100 6 0 0 7 14 3 10 1 1 0 0 262 0 0 0 100 7 0 0 0 90 25 84 0 2 5 1 19 0 0 0 100 March 12, 2026 at 10:55:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2319 202 243 1 12 152 0 306 0 0 0 99 1 0 0 0 63 25 215 1 16 134 0 1171 0 0 0 99 2 1 0 0 87 37 207 1 19 168 0 341 0 0 0 100 3 0 0 0 75 62 118 0 12 94 3 52 0 0 0 100 4 0 0 9 33 12 144 1 15 148 0 324 0 1 0 99 5 0 0 28 16 3 121 1 12 126 0 275 0 0 0 100 6 0 0 14 20 3 252 0 14 122 0 268 0 0 0 100 7 1 0 0 18 1 169 0 10 147 3 119 0 0 0 100 March 12, 2026 at 10:55:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 153 0 1 13 0 294 0 0 0 100 1 0 0 0 12 2 69 0 3 15 0 1042 0 0 0 100 2 0 0 0 9 1 40 0 4 20 0 300 0 0 0 100 3 0 0 0 140 83 128 0 0 13 0 0 0 0 0 100 4 0 0 0 15 3 44 0 0 12 0 302 0 0 0 100 5 0 0 14 15 3 47 0 2 13 0 266 0 0 0 100 6 0 0 7 14 3 91 0 2 8 0 260 0 0 0 100 7 0 0 7 26 9 50 0 3 10 0 8 0 0 0 100 March 12, 2026 at 10:55:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2329 206 132 0 3 2 0 294 0 0 0 100 1 0 0 0 29 2 32 1 0 1 0 1039 0 0 0 100 2 0 0 112 12 3 6 0 0 1 0 321 0 0 0 100 3 0 0 0 125 47 102 0 3 0 0 0 0 0 0 100 4 0 0 0 32 4 10 0 1 1 0 301 0 0 0 100 5 0 0 14 36 7 14 0 0 1 0 269 0 0 0 100 6 0 0 7 31 4 8 0 1 4 0 260 0 0 0 100 7 0 0 0 41 8 18 0 2 1 0 10 0 0 0 100 March 12, 2026 at 10:55:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 204 116 0 2 1 0 294 0 0 0 100 1 0 0 0 106 49 150 1 2 0 0 1038 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 10 1 2 0 0 0 0 1 0 0 0 100 4 0 0 0 17 4 14 0 0 0 0 306 0 0 0 100 5 0 0 21 16 5 12 0 0 0 0 269 0 0 0 100 6 0 0 7 13 3 6 1 0 0 0 260 0 0 0 100 7 0 0 0 25 8 20 0 0 0 0 13 0 0 0 100 March 12, 2026 at 10:55:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 182 2331 203 978 22 93 6 0 4933 3 1 0 96 1 0 0 0 142 47 993 18 82 9 0 5735 3 1 0 96 2 3 0 0 55 2 816 17 60 10 0 4152 3 1 0 96 3 0 0 0 41 1 627 12 43 6 0 5133 2 1 0 97 4 21 0 0 52 2 689 13 47 12 1 5431 3 1 0 96 5 41 0 14 54 8 628 10 40 1 0 4527 3 1 0 96 6 0 0 7 44 5 723 6 42 7 0 3930 3 1 0 97 7 0 0 0 56 9 667 6 24 17 0 2859 2 1 0 97 March 12, 2026 at 10:55:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 70 2316 201 534 3 54 228 0 1835 1 1 0 98 1 1 0 0 30 3 435 9 49 208 1 2950 1 1 0 98 2 0 0 0 38 10 435 3 41 233 0 1821 1 0 0 99 3 0 0 0 78 59 440 2 39 234 0 1267 1 0 0 99 4 1 0 0 37 11 402 4 43 223 0 1524 1 1 0 99 5 0 0 14 24 4 360 3 34 239 0 2055 1 1 0 99 6 0 0 7 30 5 470 4 36 197 0 1331 1 0 0 99 7 0 0 0 120 50 488 3 38 220 0 1571 1 1 0 98 March 12, 2026 at 10:55:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 200 152 0 2 35 0 0 0 0 0 100 1 0 0 0 11 1 84 1 3 26 0 1049 0 0 0 100 2 0 0 0 20 6 51 0 4 16 0 599 0 0 0 100 3 0 0 0 36 30 68 0 4 32 0 0 0 0 0 100 4 0 0 0 10 1 48 0 3 23 0 0 0 0 0 100 5 0 0 14 16 6 50 0 3 23 0 567 0 0 0 100 6 0 0 7 11 3 78 0 3 19 0 261 0 0 0 100 7 0 0 0 112 52 146 0 6 37 0 0 0 0 0 100 March 12, 2026 at 10:55:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 200 110 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 34 1 0 1 0 1049 0 0 0 100 2 0 0 0 18 6 12 0 0 0 0 599 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 12 2 8 0 0 0 0 2 0 0 0 100 5 0 0 14 12 4 8 0 0 0 0 567 0 0 0 100 6 0 0 7 12 3 6 1 0 0 0 261 0 0 0 100 7 0 0 0 112 52 106 0 0 0 0 0 0 0 0 100 March 12, 2026 at 10:55:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 14 2324 202 153 0 6 5 5 117 0 0 0 99 1 21 0 0 25 1 72 1 8 7 5 1110 0 0 0 100 2 5 0 0 39 8 35 1 3 2 2 644 0 0 0 100 3 4 0 0 25 1 18 0 2 3 1 50 0 0 0 100 4 2675 0 115 13 1 82 2 5 15 18 443 1 1 0 99 5 133 0 14 37 7 92 2 9 13 20 735 0 0 0 100 6 666 0 7 27 2 54 1 8 9 14 1228 1 0 0 98 7 13 0 0 128 52 152 0 9 12 6 155 0 0 0 100 March 12, 2026 at 10:55:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2319 213 115 0 4 0 0 0 0 0 0 100 1 0 0 0 92 43 120 1 1 0 0 1133 0 0 0 100 2 0 0 0 16 5 12 0 1 0 0 922 0 0 0 100 3 0 0 0 7 1 4 0 0 0 0 5 0 0 0 100 4 0 0 0 14 2 10 0 0 1 0 2 0 0 0 100 5 0 0 14 14 5 28 0 1 0 0 570 0 0 0 100 6 0 0 7 9 2 6 0 1 0 0 271 0 0 0 100 7 0 0 0 34 4 26 0 2 0 0 0 0 0 0 100 March 12, 2026 at 10:55:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 213 0 70 2317 201 429 6 32 144 1 1666 1 1 0 98 1 93 0 0 135 58 718 3 51 128 0 2986 1 1 0 98 2 45 0 0 28 3 428 10 41 170 0 2176 1 0 0 98 3 67 0 0 81 60 255 5 34 145 0 1755 1 0 0 98 4 168 0 0 33 12 474 0 35 165 0 1541 1 0 0 98 5 238 0 14 25 4 342 8 36 148 0 2220 2 0 0 98 6 41 0 7 87 4 703 2 48 123 0 2036 1 0 0 99 7 111 0 0 22 2 471 2 30 132 0 1731 1 0 0 99 March 12, 2026 at 10:55:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2310 202 110 0 1 6 0 11 0 0 0 100 1 0 0 0 35 2 70 1 4 9 0 1137 0 0 0 100 2 0 0 0 13 2 28 1 2 5 0 607 0 0 0 100 3 0 0 0 26 17 13 0 2 10 0 1 0 0 0 100 4 0 0 0 22 6 38 0 2 4 0 18 0 0 0 100 5 5 0 14 18 5 29 0 2 5 0 573 0 0 0 100 6 0 0 7 114 52 161 1 4 4 0 271 0 0 0 100 7 0 0 0 16 3 24 0 0 11 0 10 0 0 0 100 March 12, 2026 at 10:55:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 200 100 0 2 1 0 0 0 0 0 100 1 0 0 0 77 34 102 1 1 1 0 1130 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 593 0 0 0 100 3 0 0 0 13 4 6 0 0 1 0 4 0 0 0 100 4 0 0 0 28 10 22 0 0 1 0 8 0 0 0 100 5 0 0 14 18 6 12 2 1 1 0 567 0 0 0 100 6 0 0 7 48 19 39 0 1 1 0 260 0 0 0 100 7 0 0 0 25 5 32 0 4 1 0 0 0 0 0 100 March 12, 2026 at 10:55:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2330 210 45 1 5 2 0 39 0 0 0 100 1 0 0 7 118 29 167 1 16 9 0 1074 0 0 0 100 2 0 0 0 18 3 29 0 2 8 1 652 0 0 0 100 3 0 0 14 12 1 17 1 2 4 0 23 0 0 0 100 4 0 0 0 19 3 29 0 3 11 0 46 0 0 0 100 5 0 0 14 95 20 95 0 10 15 0 633 0 0 0 100 6 0 0 7 30 9 30 0 4 4 1 327 0 0 0 100 7 0 0 9 20 3 20 0 5 18 0 3 0 1 0 99 March 12, 2026 at 10:55:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2323 209 64 0 4 0 0 12 0 0 0 100 1 0 0 0 119 43 140 0 6 1 0 1038 0 0 0 100 2 0 0 7 12 2 10 0 1 0 0 594 0 0 0 100 3 0 0 0 10 1 2 0 1 0 0 0 0 0 0 100 4 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 5 0 0 14 13 4 8 0 0 0 0 567 0 0 0 100 6 0 0 7 66 7 58 0 4 0 0 260 0 0 0 100 7 0 0 0 43 6 36 0 4 1 0 1 0 0 0 100 March 12, 2026 at 10:55:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2337 207 136 0 0 2 0 16 0 0 0 99 1 0 0 0 127 51 160 1 1 1 0 1043 0 0 0 100 2 0 0 112 18 5 16 0 0 0 0 600 0 0 0 100 3 0 0 0 25 1 6 0 1 1 0 0 0 0 0 100 4 0 0 0 34 8 8 0 0 0 0 2 0 0 0 100 5 0 0 14 28 4 12 0 0 3 0 567 0 0 0 100 6 7 0 7 30 4 18 1 0 3 0 277 0 0 0 100 7 0 0 0 30 2 18 0 0 1 0 6 0 0 0 100 March 12, 2026 at 10:55:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 206 120 0 0 0 0 6 0 0 0 100 1 0 0 0 114 52 136 1 1 1 0 1040 0 0 0 100 2 0 0 0 14 3 6 1 0 0 0 594 0 0 0 100 3 0 0 7 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 5 0 0 14 15 4 8 2 0 0 0 565 0 0 0 100 6 0 0 7 10 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 13 2 6 0 1 0 0 0 0 0 0 100 March 12, 2026 at 10:55:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 266 2338 204 958 33 93 18 0 6853 5 2 0 93 1 3 0 0 87 7 1254 25 94 13 0 6874 4 1 0 94 2 0 0 0 88 12 1127 21 92 9 0 7487 4 1 0 95 3 18 0 0 133 37 994 11 68 14 0 6579 3 1 0 96 4 1 0 0 70 3 1072 16 75 17 0 6094 4 1 0 95 5 32 0 14 62 5 1010 12 41 11 0 7495 3 1 0 96 6 33 0 7 59 3 1004 8 46 16 0 5432 4 1 0 95 7 0 0 0 148 7 1099 9 46 17 0 4640 3 1 0 96 March 12, 2026 at 10:55:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2319 213 94 0 3 0 0 1 0 0 0 100 1 0 0 0 74 34 100 0 1 1 0 1038 0 0 0 100 2 0 0 0 28 10 22 0 0 2 0 604 0 0 0 100 3 0 0 0 39 5 54 0 5 0 0 13 0 0 0 100 4 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 5 0 0 14 12 4 10 0 0 0 0 566 0 0 0 100 6 0 0 7 11 2 6 0 0 0 0 260 0 0 0 100 7 0 0 0 32 4 24 0 2 0 0 0 0 0 0 100 March 12, 2026 at 10:55:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 667 0 14 2323 200 162 1 11 13 12 992 1 1 0 98 1 42 0 0 127 52 180 1 6 8 8 1234 0 0 0 99 2 41 0 0 36 7 50 0 11 6 4 705 0 0 0 100 3 7 0 0 24 1 23 0 5 4 3 73 0 0 0 100 4 6 0 0 28 2 31 0 5 7 3 51 0 0 0 100 5 790 0 129 12 4 51 0 3 7 8 704 0 0 0 99 6 89 0 7 37 5 79 1 7 2 15 445 0 0 0 100 7 1878 0 2 38 2 61 2 8 7 10 354 0 0 0 99 March 12, 2026 at 10:55:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 201 242 0 24 213 0 0 0 1 0 99 1 0 0 0 111 51 397 1 22 185 0 1128 0 0 0 100 2 0 0 0 25 8 162 1 28 236 0 602 0 0 0 99 3 0 0 0 65 57 150 0 28 190 0 10 0 0 0 100 4 0 0 0 19 7 177 0 25 221 0 0 0 0 0 100 5 0 0 14 14 4 150 2 22 204 0 566 0 0 0 100 6 0 0 7 20 6 172 0 24 225 0 281 0 0 0 100 7 0 0 0 22 2 164 0 24 181 0 10 0 0 0 100 March 12, 2026 at 10:55:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 202 140 0 2 34 0 0 0 0 0 100 1 0 0 0 109 50 256 1 6 16 0 1124 0 0 0 100 2 0 0 0 16 5 48 0 0 16 0 913 0 0 0 100 3 0 0 0 50 44 72 0 2 30 0 0 0 0 0 100 4 0 0 0 14 2 62 0 4 29 0 7 0 0 0 100 5 0 0 14 12 4 62 0 2 30 0 566 0 0 0 100 6 0 0 7 16 4 70 0 3 25 0 264 0 0 0 100 7 0 0 0 30 7 80 0 2 26 0 6 0 0 0 100 March 12, 2026 at 10:55:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 204 102 0 2 1 0 0 0 0 0 100 1 0 0 0 16 3 38 0 2 3 0 1121 0 0 0 100 2 0 0 0 106 50 100 0 1 0 0 616 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 10 0 0 0 100 4 0 0 0 14 3 6 0 0 1 0 1 0 0 0 100 5 0 0 14 16 6 12 0 0 1 0 566 0 0 0 100 6 0 0 7 13 3 6 0 0 1 0 260 0 0 0 100 7 0 0 0 31 8 22 0 0 1 0 6 0 0 0 100 March 12, 2026 at 10:55:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 56 0 84 2310 201 706 8 48 6 0 2200 1 1 0 99 1 202 0 0 24 2 354 5 32 9 0 3237 2 1 0 98 2 392 0 0 131 54 508 7 36 7 1 2458 1 0 0 98 3 225 0 0 22 2 361 1 27 2 2 1840 1 0 0 99 4 108 0 0 42 7 279 11 29 6 1 1948 2 0 0 98 5 4 0 14 24 4 351 6 35 6 0 2777 1 0 0 99 6 50 0 7 24 2 457 3 33 2 0 2431 1 0 0 99 7 50 0 0 46 6 164 9 20 6 0 1234 2 0 0 98 March 12, 2026 at 10:55:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 202 124 0 1 0 0 1 0 0 0 100 1 0 0 0 9 1 32 1 0 1 0 1128 0 0 0 100 2 0 0 0 125 58 118 1 1 0 0 604 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 5 0 0 14 16 5 12 2 0 0 0 571 0 0 0 100 6 0 0 7 11 2 8 0 1 0 0 271 0 0 0 100 7 0 0 0 24 3 18 0 0 1 0 1 0 0 0 100 March 12, 2026 at 10:55:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2336 213 287 0 26 152 0 24 0 1 0 99 1 0 0 7 24 6 314 1 26 141 0 1077 0 0 0 100 2 0 0 0 34 12 157 0 13 171 0 630 0 0 0 100 3 0 0 0 158 99 258 0 19 172 0 22 0 0 0 100 4 0 0 0 28 10 152 1 14 148 0 20 0 0 0 100 5 0 0 14 20 4 147 0 16 140 1 416 0 0 0 100 6 1 0 16 21 3 155 1 18 144 0 272 0 1 0 99 7 0 0 14 25 2 160 0 17 162 0 312 0 0 0 100 March 12, 2026 at 10:55:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2320 208 138 0 0 10 0 10 0 0 0 100 1 0 0 0 112 51 224 0 2 8 0 1038 0 0 0 100 2 0 0 7 12 2 32 0 2 11 0 595 0 0 0 100 3 0 0 0 37 30 30 0 1 12 0 0 0 0 0 100 4 0 0 0 13 2 42 0 1 4 0 1 0 0 0 100 5 0 0 14 11 3 40 0 2 7 0 266 0 0 0 100 6 0 0 7 12 2 26 0 1 7 0 260 0 0 0 100 7 0 0 0 25 3 26 0 1 7 0 300 0 0 0 100 March 12, 2026 at 10:55:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2337 209 116 0 1 0 0 8 0 0 0 100 1 0 0 0 127 50 134 1 2 3 0 1038 0 0 0 100 2 0 0 112 13 2 28 1 1 0 0 593 0 0 0 100 3 0 0 0 23 1 2 0 1 0 0 0 0 0 0 100 4 0 0 0 28 2 6 0 0 0 0 2 0 0 0 100 5 0 0 14 26 3 8 0 0 0 0 266 0 0 0 100 6 0 0 7 30 3 8 1 1 0 0 261 0 0 0 100 7 0 0 0 40 3 18 0 0 0 0 300 0 0 0 100 March 12, 2026 at 10:55:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2327 216 119 0 2 0 0 14 0 0 0 100 1 0 0 0 24 2 44 1 1 1 0 1038 0 0 0 100 2 0 0 0 95 44 90 0 1 0 0 595 0 0 0 100 3 0 0 0 8 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 14 3 6 1 0 0 0 3 0 0 0 100 5 0 0 14 12 3 8 1 0 0 0 266 0 0 0 100 6 0 0 7 12 2 6 0 0 0 0 260 0 0 0 100 7 0 0 7 25 3 18 1 0 0 0 300 0 0 0 100 March 12, 2026 at 10:55:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 266 2349 208 1280 23 120 8 0 5709 5 1 0 94 1 19 0 0 69 4 1172 19 101 22 0 6734 5 1 0 94 2 2 0 0 94 17 1145 23 75 17 0 7138 4 1 0 95 3 26 0 0 62 4 902 15 66 14 0 7116 4 1 0 95 4 39 0 0 132 36 1064 17 71 28 1 5540 4 1 0 95 5 1 0 14 62 5 913 5 51 15 0 6479 3 1 0 96 6 1 0 7 59 3 868 4 38 14 0 6493 3 1 0 96 7 2 0 0 66 4 946 8 41 7 0 6804 3 1 0 96 March 12, 2026 at 10:55:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 246 0 17 209 0 1 0 1 0 99 1 0 0 0 13 2 169 1 17 220 0 1045 0 0 0 99 2 0 0 0 31 12 169 0 18 224 0 610 0 0 0 100 3 0 0 0 67 57 243 0 20 193 0 10 0 0 0 100 4 0 0 0 118 56 263 0 22 251 0 0 0 0 0 100 5 0 0 14 11 3 152 0 14 185 0 269 0 0 0 100 6 0 0 7 19 5 151 0 12 228 0 278 0 0 0 100 7 0 0 0 16 3 157 0 23 188 0 305 0 0 0 100 March 12, 2026 at 10:55:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 200 146 0 3 25 0 0 0 0 0 100 1 0 0 0 10 1 74 1 2 26 0 1038 0 0 0 100 2 0 0 0 23 8 40 1 3 16 0 604 0 0 0 100 3 0 0 0 32 26 68 0 3 18 0 10 0 0 0 100 4 0 0 0 112 52 130 0 2 14 0 2 0 0 0 100 5 1 0 14 11 3 54 1 3 22 0 303 0 0 0 100 6 0 0 7 16 4 42 1 3 18 0 262 0 0 0 100 7 0 0 0 16 4 44 0 2 22 0 301 0 0 0 100 March 12, 2026 at 10:55:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 204 109 0 3 1 0 0 0 0 0 100 1 0 0 0 92 43 116 0 1 1 0 1039 0 0 0 100 2 0 0 0 22 8 14 0 0 1 0 599 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 10 0 0 0 100 4 0 0 0 32 9 22 0 1 3 0 1 0 0 0 100 5 0 0 14 14 5 30 0 1 1 0 267 0 0 0 100 6 0 0 7 15 4 10 0 1 1 0 261 0 0 0 100 7 0 0 0 16 4 6 1 0 1 0 300 0 0 0 100 March 12, 2026 at 10:55:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 14 2327 200 182 0 11 4 10 138 0 0 0 100 1 37 0 0 126 51 164 2 8 3 3 1226 0 0 0 99 2 5 0 0 42 10 38 0 2 2 3 980 0 0 0 100 3 2639 0 113 12 2 56 2 4 4 14 464 1 1 0 99 4 117 0 0 29 2 84 0 13 11 18 206 0 0 0 100 5 29 0 16 28 3 51 0 6 11 9 353 0 0 0 100 6 650 0 7 34 5 60 1 6 6 4 1173 1 0 0 98 7 5 0 0 30 3 31 0 5 4 4 356 0 0 0 100 March 12, 2026 at 10:55:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2302 202 112 0 0 0 0 1 0 0 0 100 1 0 0 0 109 51 132 1 0 1 0 1122 0 0 0 100 2 0 0 0 12 2 6 0 0 0 0 595 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 10 0 0 0 100 4 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 5 0 0 14 10 3 8 0 0 0 0 266 0 0 0 100 6 0 0 7 19 6 14 0 0 0 0 264 0 0 0 100 7 0 0 0 16 4 10 0 0 0 0 301 0 0 0 100 March 12, 2026 at 10:55:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 274 0 98 2315 201 597 11 67 188 0 2189 1 1 0 98 1 152 0 0 57 14 498 15 52 171 1 3038 1 1 0 98 2 83 0 0 105 36 492 6 48 167 2 2509 2 1 0 98 3 143 0 0 94 64 533 10 56 148 0 1905 1 0 0 98 4 270 0 0 37 10 348 4 36 176 2 1724 1 1 0 98 5 108 0 14 29 4 394 7 59 190 1 2198 1 0 0 98 6 109 0 7 51 11 410 10 49 190 0 1974 2 1 0 98 7 47 0 0 116 8 577 15 63 151 0 1991 1 0 0 98 March 12, 2026 at 10:55:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 207 136 0 7 20 0 0 0 0 0 100 1 0 0 0 35 11 82 1 7 20 0 1127 0 0 0 100 2 0 0 0 63 28 86 1 3 15 0 595 0 0 0 100 3 0 0 0 48 30 76 0 7 13 0 0 0 0 0 100 4 0 0 0 10 1 24 0 1 14 0 0 0 0 0 100 5 0 0 14 10 3 38 0 2 23 0 266 0 0 0 100 6 0 0 7 27 10 60 0 2 21 0 271 0 0 0 100 7 0 0 0 37 5 56 1 6 24 0 300 0 0 0 100 March 12, 2026 at 10:55:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 200 115 0 1 5 0 58 0 0 0 100 1 0 0 0 23 6 68 0 5 17 0 1160 0 0 0 100 2 0 0 0 117 53 122 0 2 10 0 623 0 0 0 100 3 0 0 0 14 1 11 1 1 2 0 35 0 0 0 100 4 0 0 9 17 2 21 1 1 14 0 2 0 0 0 100 5 0 0 28 15 4 28 0 2 3 0 275 0 0 0 100 6 0 0 7 26 7 26 0 2 7 0 289 0 0 0 100 7 0 0 7 20 3 24 0 5 10 0 389 0 1 0 99 March 12, 2026 at 10:55:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2304 201 114 0 1 1 0 1 0 0 0 100 1 0 0 0 26 9 68 1 1 0 0 1055 0 0 0 100 2 0 0 0 111 52 108 0 1 0 0 598 0 0 0 100 3 0 0 0 8 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 5 0 0 14 13 3 10 0 1 0 0 266 0 0 0 100 6 0 0 7 12 2 6 0 0 0 0 260 0 0 0 100 7 0 0 0 17 3 10 0 1 0 0 300 0 0 0 100 March 12, 2026 at 10:55:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2323 200 110 0 0 0 0 0 0 0 0 100 1 0 0 0 41 8 52 1 1 2 0 1049 0 0 0 100 2 0 0 112 51 22 64 1 1 1 0 593 0 0 0 100 3 0 0 0 83 31 62 0 1 0 0 0 0 0 0 100 4 0 0 0 28 2 6 0 1 0 0 2 0 0 0 100 5 0 0 14 31 4 12 1 0 0 0 271 0 0 0 100 6 0 0 7 28 2 8 1 1 0 0 271 0 0 0 100 7 0 0 0 36 6 14 0 0 0 0 307 0 0 0 100 March 12, 2026 at 10:55:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 128 0 0 2 0 0 0 0 0 100 1 0 0 0 32 11 60 1 0 1 0 1081 0 0 0 99 2 0 0 0 13 3 6 0 0 0 0 595 0 0 0 100 3 0 0 0 110 52 104 0 0 2 0 0 0 0 0 100 4 0 0 0 22 9 6 0 1 0 0 0 0 0 0 100 5 0 0 21 16 5 18 0 1 1 0 266 0 0 0 100 6 1 0 7 20 6 30 0 1 3 0 280 0 0 0 100 7 0 0 0 20 4 24 1 0 2 0 311 0 0 0 100 March 12, 2026 at 10:55:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 266 2344 204 1179 24 112 12 0 6872 5 1 0 93 1 17 0 0 75 10 1078 15 81 24 1 8006 4 1 0 95 2 0 0 0 75 6 1062 16 64 20 0 7133 4 1 0 95 3 17 0 0 115 25 930 23 58 5 0 6875 4 1 0 95 4 0 0 0 128 7 1216 14 59 12 0 5553 3 1 0 96 5 0 0 14 64 7 1122 7 40 11 0 5801 3 1 0 96 6 0 0 7 116 30 923 14 37 15 1 5677 4 1 0 95 7 0 0 0 70 8 936 14 38 15 0 5728 3 1 0 96 March 12, 2026 at 10:55:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 205 108 0 1 3 0 5 0 0 0 100 1 0 0 0 11 2 50 1 1 1 0 1038 0 0 0 100 2 0 0 0 14 4 6 0 0 1 0 615 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 10 0 0 0 100 4 0 0 0 26 3 18 0 1 1 0 1 0 0 0 100 5 0 0 14 14 5 10 0 0 1 0 267 0 0 0 100 6 0 0 7 113 53 106 0 0 0 0 260 0 0 0 100 7 0 0 0 15 4 6 0 0 1 0 300 0 0 0 100 March 12, 2026 at 10:55:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 14 2338 211 166 0 11 5 7 94 0 0 0 99 1 10 0 0 75 26 118 1 8 4 4 1147 0 0 0 100 2 10 0 0 27 2 36 1 4 6 6 671 0 0 0 100 3 4 0 0 27 3 20 0 2 3 2 72 0 0 0 100 4 2659 0 117 15 2 58 2 4 10 16 433 0 1 0 99 5 128 0 14 28 3 90 1 7 12 21 427 0 0 0 100 6 25 0 7 78 23 105 0 9 8 7 409 0 0 0 100 7 657 0 0 31 3 41 1 5 7 6 1230 1 0 0 98 March 12, 2026 at 10:55:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 206 122 0 0 0 0 7 0 0 0 100 1 0 0 0 110 51 134 0 1 1 0 1124 0 0 0 100 2 0 0 0 12 2 26 0 2 0 0 595 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 10 0 0 0 100 4 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 5 0 0 14 10 3 8 0 0 0 0 266 0 0 0 100 6 0 0 7 14 3 8 1 0 0 0 261 0 0 0 100 7 0 0 0 17 4 10 1 0 0 0 301 0 0 0 100 March 12, 2026 at 10:55:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 208 283 0 27 207 0 322 0 1 0 99 1 0 0 0 47 18 218 1 22 221 0 1133 0 0 0 99 2 0 0 0 72 32 216 0 20 230 0 594 0 0 0 100 3 0 0 0 65 58 160 0 18 227 0 16 0 0 0 100 4 0 0 0 23 11 161 0 16 185 0 8 0 0 0 100 5 0 0 14 13 4 163 0 19 187 0 266 0 0 0 100 6 0 0 7 18 4 261 0 21 186 0 273 0 0 0 100 7 1 0 0 18 3 168 0 18 259 0 307 0 0 0 100 March 12, 2026 at 10:55:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 160 0 7 24 0 0 0 0 0 100 1 0 0 0 9 1 74 1 3 30 0 1121 0 0 0 100 2 0 0 0 110 52 152 0 5 15 0 593 0 0 0 100 3 0 0 0 49 43 51 0 4 37 0 10 0 0 0 100 4 0 0 0 23 7 60 0 2 32 0 6 0 0 0 100 5 0 0 14 10 3 62 0 2 22 0 266 0 0 0 100 6 0 0 7 11 2 120 0 5 18 0 260 0 0 0 100 7 0 0 0 16 4 66 0 5 25 0 301 0 0 0 100 March 12, 2026 at 10:56:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 221 0 70 2313 201 322 10 30 10 2 1323 2 1 0 97 1 210 0 0 25 1 398 6 42 13 3 2890 1 1 0 98 2 23 0 0 64 23 404 6 38 15 0 2813 1 0 0 98 3 56 0 0 79 30 371 11 38 5 0 2030 1 0 0 99 4 62 0 0 36 7 344 4 31 3 0 1981 1 0 0 99 5 312 0 14 31 7 198 6 17 5 4 1926 2 0 0 98 6 110 0 7 21 3 300 4 37 7 1 2370 1 0 0 99 7 24 0 0 28 4 419 8 34 2 0 2163 1 0 0 99 March 12, 2026 at 10:56:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 202 112 0 0 0 0 1 0 0 0 100 1 0 0 0 12 3 34 0 0 0 0 1127 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 596 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 4 0 0 0 100 4 0 0 0 12 1 4 0 0 2 0 0 0 0 0 100 5 0 0 14 26 11 28 0 1 0 0 280 0 0 0 100 6 0 0 7 12 2 26 1 2 0 0 263 0 0 0 100 7 0 0 0 15 3 8 1 0 0 0 300 0 0 0 100 March 12, 2026 at 10:56:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 22 2306 200 130 0 5 11 1 9 0 1 0 99 1 0 0 21 14 2 53 1 4 9 0 1137 0 0 0 100 2 0 0 0 17 3 23 0 6 7 0 621 0 0 0 100 3 0 0 0 117 53 125 1 2 6 0 44 0 0 0 100 4 0 0 0 15 2 11 0 4 12 0 22 0 0 0 100 5 0 0 14 27 9 48 0 2 5 2 436 0 0 0 100 6 0 0 7 16 2 11 0 2 7 0 263 0 0 0 100 7 0 0 0 19 3 18 0 2 9 0 304 0 0 0 100 March 12, 2026 at 10:56:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 201 260 0 16 142 0 1 0 1 0 99 1 0 0 0 22 3 163 1 11 134 0 1049 0 0 0 100 2 0 0 7 12 2 113 0 8 179 0 594 0 0 0 100 3 0 0 0 179 115 242 0 15 130 0 6 0 0 0 100 4 0 0 0 20 7 127 0 13 133 0 0 0 0 0 100 5 0 0 14 11 3 128 0 15 149 0 266 0 0 0 100 6 0 0 7 14 2 227 0 13 134 0 275 0 0 0 100 7 0 0 0 17 3 136 0 12 157 0 308 0 0 0 100 March 12, 2026 at 10:56:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 200 144 0 1 18 0 0 0 0 0 100 1 0 0 0 24 1 82 0 3 10 0 1039 0 0 0 100 2 0 0 112 13 2 34 1 1 13 0 595 0 0 0 100 3 0 0 0 168 89 130 0 1 8 0 7 0 0 0 100 4 0 0 0 26 2 48 0 3 13 0 2 0 0 0 100 5 0 0 14 31 5 38 1 3 14 0 271 0 0 0 100 6 0 0 7 27 2 88 0 3 9 0 260 0 0 0 100 7 0 0 0 32 4 34 0 1 12 0 301 0 0 0 100 March 12, 2026 at 10:56:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2308 201 110 0 0 1 0 0 0 0 0 100 1 0 0 0 12 2 34 1 1 2 0 1038 0 0 0 100 2 0 0 0 13 3 4 0 0 1 0 593 0 0 0 100 3 0 0 0 129 61 120 1 0 0 0 13 0 0 0 100 4 0 0 0 13 3 4 0 0 1 0 1 0 0 0 100 5 0 0 14 15 5 10 0 0 1 0 267 0 0 0 100 6 0 0 7 18 4 8 2 0 1 0 261 0 0 0 100 7 4 0 0 17 4 8 1 0 1 0 303 0 0 0 100 March 12, 2026 at 10:56:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 252 2334 206 1413 28 119 20 0 6003 4 2 0 94 1 0 0 0 78 3 1071 21 91 13 0 7880 4 1 0 95 2 14 0 0 84 14 1059 19 81 6 0 6584 5 1 0 95 3 0 0 0 128 38 1006 10 68 5 0 6932 4 1 0 95 4 21 0 0 65 2 895 16 58 14 0 5508 4 1 0 96 5 58 0 14 57 6 840 8 38 15 0 5867 3 1 0 96 6 0 0 7 60 2 1144 13 45 10 0 5043 4 1 0 95 7 0 0 0 53 3 807 4 25 13 2 6891 3 1 0 96 March 12, 2026 at 10:56:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 205 120 0 0 0 0 6 0 0 0 100 1 0 0 0 9 1 32 1 0 0 0 1037 0 0 0 100 2 0 0 0 114 52 108 0 0 1 0 593 0 0 0 100 3 0 0 0 9 2 16 0 1 1 0 0 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 10 0 0 0 100 5 0 0 14 12 4 10 0 0 0 0 271 0 0 0 100 6 0 0 7 13 3 8 0 1 0 0 271 0 0 0 100 7 0 0 0 16 4 10 0 0 0 0 301 0 0 0 100 March 12, 2026 at 10:56:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2323 207 378 0 20 202 0 10 0 1 0 99 1 0 0 0 9 1 164 0 15 196 0 1041 0 0 0 99 2 0 0 0 110 51 244 1 15 252 0 594 0 0 0 100 3 0 0 0 65 58 123 1 15 223 0 0 0 0 0 100 4 0 0 0 27 10 170 1 15 203 0 12 0 0 0 100 5 0 0 14 12 4 135 1 11 189 0 266 0 0 0 100 6 0 0 7 16 4 155 2 13 213 0 276 0 0 0 100 7 0 0 0 18 4 130 0 14 188 0 308 0 0 0 100 March 12, 2026 at 10:56:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 202 250 0 3 46 0 0 0 0 0 100 1 0 0 0 17 5 106 1 5 42 0 1043 0 0 0 100 2 0 0 0 11 2 62 1 5 33 0 595 0 0 0 100 3 0 0 0 61 53 60 0 3 41 0 0 0 0 0 100 4 0 0 0 8 1 90 0 2 38 0 10 0 0 0 100 5 0 0 14 10 3 71 0 4 36 0 266 0 0 0 100 6 0 0 7 12 2 54 1 3 32 0 260 0 0 0 100 7 0 0 0 119 54 162 1 5 25 0 301 0 0 0 100 March 12, 2026 at 10:56:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 14 2331 208 163 0 9 5 9 105 0 0 0 99 1 2644 0 120 43 16 115 4 5 12 10 1805 1 1 0 98 2 121 0 0 70 23 132 0 12 11 20 774 0 0 0 100 3 21 0 3 24 1 43 0 6 10 8 85 0 0 0 100 4 48 0 0 28 2 58 0 10 6 6 163 0 0 0 100 5 10 0 14 29 3 45 0 7 7 3 364 0 0 0 100 6 653 0 7 31 3 46 1 5 4 6 1151 1 0 0 98 7 7 0 0 73 21 72 0 5 6 4 356 0 0 0 100 March 12, 2026 at 10:56:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 110 0 0 0 0 1 0 0 0 100 1 0 0 0 11 2 32 1 0 0 0 1124 0 0 0 100 2 0 0 0 120 57 116 0 0 0 0 602 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 8 1 6 0 0 0 0 13 0 0 0 100 5 0 0 14 10 3 8 0 0 0 0 266 0 0 0 100 6 0 0 7 11 2 6 0 0 0 0 260 0 0 0 100 7 0 0 0 14 3 8 0 0 0 0 300 0 0 0 100 March 12, 2026 at 10:56:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 70 2312 200 277 5 22 11 0 1304 2 1 0 98 1 270 0 0 24 3 577 3 32 7 2 3497 1 1 0 99 2 29 0 0 92 37 426 4 28 7 0 2683 1 0 0 99 3 1 0 0 21 2 396 7 32 15 0 1622 1 0 0 99 4 324 0 14 27 2 85 3 7 9 3 1971 2 1 0 97 5 161 0 14 69 26 500 5 33 6 0 2199 1 0 0 99 6 148 0 11 24 2 284 0 22 9 1 2053 0 0 0 99 7 56 0 0 26 4 321 2 30 4 0 2058 1 0 0 99 March 12, 2026 at 10:56:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2312 202 374 0 18 137 0 12 0 1 0 99 1 1 0 0 15 3 162 1 8 117 0 1149 0 0 0 99 2 0 0 0 14 2 127 0 13 154 0 594 0 0 0 100 3 0 0 0 80 65 145 1 12 126 0 13 0 0 0 100 4 0 0 0 19 7 112 0 12 150 0 18 0 0 0 100 5 0 0 14 115 53 237 0 11 137 0 281 0 0 0 100 6 0 0 7 17 3 147 1 12 155 0 278 0 0 0 100 7 0 0 0 21 3 140 1 9 171 0 322 0 0 0 100 March 12, 2026 at 10:56:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 200 173 0 3 14 0 14 0 0 0 100 1 0 0 14 15 2 80 2 6 17 0 1149 0 0 0 100 2 0 0 0 15 2 35 0 5 17 0 604 0 0 0 100 3 0 0 0 46 26 65 0 1 23 0 43 0 0 0 100 4 0 0 0 16 2 26 0 2 9 0 17 0 0 0 100 5 0 0 24 116 53 137 0 1 12 1 333 0 1 0 99 6 0 0 14 17 2 48 0 6 14 3 353 0 0 0 100 7 0 0 0 21 4 39 0 5 16 0 315 0 0 0 100 March 12, 2026 at 10:56:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 112 0 0 2 0 0 0 0 0 100 1 0 0 0 13 2 54 0 1 2 0 1041 0 0 0 100 2 0 0 0 15 4 10 0 0 1 0 618 0 0 0 100 3 0 0 0 31 11 20 1 1 1 0 11 0 0 0 100 4 0 0 0 13 3 4 0 0 1 0 1 0 0 0 100 5 0 0 14 115 55 110 0 0 0 0 267 0 0 0 100 6 0 0 7 18 4 8 0 0 1 0 260 0 0 0 100 7 0 0 7 15 4 8 0 1 1 0 300 0 0 0 100 March 12, 2026 at 10:56:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 201 112 0 1 0 0 0 0 0 0 100 1 0 0 0 33 3 40 1 1 1 0 1042 0 0 0 100 2 0 0 112 11 2 24 1 1 0 0 595 0 0 0 100 3 0 0 0 41 10 18 0 0 0 0 14 0 0 0 100 4 0 0 0 26 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 127 53 108 1 0 0 0 266 0 0 0 100 6 0 0 7 27 2 8 0 0 0 0 263 0 0 0 100 7 0 0 0 32 3 10 0 0 0 0 300 0 0 0 100 March 12, 2026 at 10:56:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 54 0 1 0 0 1 0 0 0 100 1 0 0 7 11 1 34 1 0 1 0 1038 0 0 0 100 2 0 0 0 69 2 64 0 1 0 0 593 0 0 0 100 3 0 0 0 20 7 12 0 0 0 0 9 0 0 0 100 4 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 111 53 108 0 0 0 0 266 0 0 0 100 6 0 0 7 15 3 8 1 0 0 0 261 0 0 0 100 7 0 0 0 18 4 10 1 0 0 0 301 0 0 0 100 March 12, 2026 at 10:56:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 252 2332 201 1349 21 129 249 0 6647 4 2 0 94 1 1 0 0 83 4 1373 29 125 255 0 7251 5 1 0 94 2 1 0 0 116 4 1207 13 94 227 0 6977 4 1 0 95 3 0 0 0 152 76 1109 18 92 320 0 5891 5 1 0 94 4 0 0 0 69 8 1203 18 69 213 0 5840 4 1 0 95 5 0 0 14 131 42 1201 6 57 246 0 6413 3 1 0 96 6 2 0 7 65 4 1189 12 67 274 1 6025 3 1 0 95 7 0 0 0 65 6 1001 9 58 242 0 6246 3 1 0 96 March 12, 2026 at 10:56:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 202 185 0 1 14 0 0 0 0 0 100 1 0 0 0 18 2 66 0 2 24 0 1038 0 0 0 100 2 0 0 0 16 5 32 0 1 13 0 598 0 0 0 100 3 0 0 0 134 78 128 0 1 21 0 1 0 0 0 100 4 0 0 0 10 1 32 0 0 23 0 10 0 0 0 100 5 0 0 14 18 7 50 0 3 19 0 271 0 0 0 100 6 0 0 7 13 3 48 0 3 18 0 260 0 0 0 100 7 0 0 0 14 3 46 0 3 16 0 300 0 0 0 100 March 12, 2026 at 10:56:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 659 0 14 2321 201 131 1 11 5 12 954 1 1 0 98 1 789 0 114 41 1 113 1 8 2 13 1175 0 0 0 99 2 83 0 0 31 4 51 0 4 2 9 729 0 0 0 100 3 1899 0 0 100 38 125 2 8 7 12 397 0 1 0 99 4 41 0 0 52 15 98 0 7 12 13 120 0 0 0 100 5 14 0 14 43 11 66 1 5 6 9 369 0 0 0 100 6 20 0 7 29 3 58 0 7 3 9 376 0 0 0 100 7 5 0 0 30 3 35 0 4 4 3 356 0 0 0 100 March 12, 2026 at 10:56:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 201 12 0 3 0 0 1 0 0 0 100 1 0 0 0 31 6 55 1 4 1 0 1128 0 0 0 100 2 0 0 0 11 2 4 1 0 0 0 593 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 103 4 98 0 4 0 0 10 0 0 0 100 5 0 0 14 108 52 108 0 1 0 0 276 0 0 0 100 6 0 0 7 14 2 8 1 0 0 0 260 0 0 0 100 7 0 0 0 15 3 26 1 1 0 0 300 0 0 0 100 March 12, 2026 at 10:56:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2301 201 120 0 1 1 0 0 0 0 0 100 1 0 0 0 12 2 36 0 0 1 0 1121 0 0 0 100 2 0 0 0 16 2 12 0 3 1 0 595 0 0 0 100 3 0 0 0 7 1 4 0 0 0 0 5 0 0 0 100 4 0 0 0 10 2 10 0 0 0 0 14 0 0 0 100 5 5 0 14 124 60 124 0 0 0 0 599 0 0 0 100 6 0 0 7 11 2 8 0 1 0 0 271 0 0 0 100 7 0 0 0 16 3 10 0 0 0 0 300 0 0 0 100 March 12, 2026 at 10:56:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 201 112 0 0 1 0 1 0 0 0 100 1 0 0 0 17 3 44 1 1 2 0 1129 0 0 0 100 2 0 0 0 18 2 12 0 0 0 0 594 0 0 0 100 3 0 0 0 7 1 2 0 0 3 0 0 0 0 0 100 4 0 0 0 17 7 8 0 0 1 0 10 0 0 0 100 5 0 0 14 122 59 122 0 0 0 0 273 0 0 0 100 6 2 0 7 11 2 16 0 0 0 0 278 0 0 0 100 7 0 0 0 16 3 18 0 0 0 0 308 0 0 0 100 March 12, 2026 at 10:56:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 60 0 70 2306 201 220 6 16 1 0 1638 2 1 0 98 1 119 0 0 49 6 328 9 31 9 1 2395 2 0 0 98 2 24 0 0 28 2 337 4 33 9 0 2613 1 0 0 99 3 451 0 4 19 1 238 6 26 9 1 2063 1 0 0 99 4 12 0 0 23 2 409 7 30 11 0 1816 1 0 0 99 5 109 0 14 112 48 624 10 35 4 0 2148 1 1 0 98 6 218 0 7 40 5 331 6 25 5 3 2131 1 0 0 98 7 0 0 0 40 8 395 7 37 1 0 2171 1 0 0 99 March 12, 2026 at 10:56:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2307 202 42 0 3 7 1 25 0 0 0 100 1 0 0 0 91 23 121 1 4 1 0 1140 0 0 0 100 2 0 0 0 67 25 86 1 3 1 0 613 0 0 0 100 3 0 0 0 13 3 7 0 4 6 0 25 0 0 0 100 4 0 0 0 16 3 6 0 1 1 0 2 0 0 0 100 5 5 0 14 18 5 12 0 1 1 0 272 0 0 0 100 6 0 0 7 19 4 10 2 0 1 0 275 0 0 0 100 7 19 0 0 84 20 72 1 2 4 0 323 0 0 0 100 March 12, 2026 at 10:56:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 201 113 0 1 6 0 19 0 0 0 100 1 0 0 0 19 2 62 0 2 5 0 1156 0 0 0 100 2 0 0 8 133 57 144 0 1 11 0 639 0 1 0 99 3 1 0 14 22 7 37 0 6 5 0 39 0 0 0 100 4 0 0 0 17 2 24 1 7 12 1 18 0 0 0 100 5 0 0 14 15 3 14 0 1 4 0 274 0 0 0 100 6 0 0 14 12 2 25 0 3 5 2 410 0 0 0 100 7 0 0 0 19 3 15 0 0 6 0 307 0 0 0 100 March 12, 2026 at 10:56:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 104 1 0 0 0 1 0 0 0 100 1 0 0 0 16 2 38 1 0 1 0 1042 0 0 0 100 2 0 0 0 23 2 16 0 1 1 0 595 0 0 0 100 3 0 0 0 122 57 136 0 1 0 0 10 0 0 0 100 4 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 5 0 0 14 11 3 8 0 0 0 0 266 0 0 0 100 6 0 0 7 12 2 6 0 1 0 0 260 0 0 0 100 7 0 0 7 16 4 12 0 1 0 0 301 0 0 0 100 March 12, 2026 at 10:56:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2327 201 361 0 18 154 0 4 0 1 0 99 1 0 0 0 38 5 186 1 15 167 0 1050 0 0 0 99 2 0 0 0 34 2 161 0 17 173 0 594 0 0 0 100 3 0 0 0 200 116 257 0 14 196 0 10 0 0 0 100 4 0 0 112 20 8 142 0 14 122 0 2 0 0 0 100 5 0 0 14 27 3 158 1 10 166 0 266 0 0 0 100 6 0 0 7 29 4 137 0 11 158 0 276 0 0 0 100 7 0 0 0 34 3 168 0 11 167 0 307 0 0 0 100 March 12, 2026 at 10:56:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 94 0 2 25 0 0 0 0 0 100 1 0 0 0 40 2 86 1 3 19 0 1039 0 0 0 100 2 0 0 0 21 2 55 2 4 13 0 597 0 0 0 100 3 0 0 7 164 61 155 0 5 22 0 14 0 0 0 100 4 0 0 0 79 36 106 0 3 14 0 0 0 0 0 100 5 0 0 14 11 3 48 0 1 21 0 266 0 0 0 100 6 0 0 7 11 2 42 1 0 13 0 260 0 0 0 100 7 0 0 0 17 3 37 1 2 27 0 300 0 0 0 100 March 12, 2026 at 10:56:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 182 2327 201 821 23 75 10 0 4866 4 1 0 95 1 28 0 0 63 7 922 15 75 13 0 5717 3 1 0 96 2 4 0 0 50 3 751 9 41 9 0 5813 3 1 0 97 3 3 0 0 80 11 715 9 43 10 0 5016 3 1 0 96 4 27 0 0 95 9 757 8 46 14 0 4398 3 1 0 96 5 34 0 14 121 41 767 11 37 12 0 5651 2 1 0 97 6 1 0 7 44 4 628 5 28 8 0 4211 2 1 0 97 7 24 0 0 47 3 731 9 31 8 0 3071 3 1 0 96 March 12, 2026 at 10:56:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 84 2325 206 441 7 39 0 0 1398 2 1 0 98 1 20 0 0 72 3 403 9 27 4 0 2573 1 1 0 98 2 11 0 0 29 4 280 4 20 3 0 2340 1 0 0 99 3 3 0 0 23 2 275 3 19 3 0 2015 1 0 0 99 4 2 0 0 21 1 215 1 11 2 0 1996 1 0 0 99 5 1 0 14 25 4 295 3 17 2 0 2440 1 0 0 99 6 0 0 7 44 11 347 5 15 6 0 2161 1 0 0 99 7 2 0 0 110 40 375 2 14 4 0 1781 1 0 0 99 March 12, 2026 at 10:56:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 207 20 0 1 0 0 6 0 0 0 100 1 0 0 0 117 51 140 1 3 0 0 1044 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 10 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 11 2 8 1 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 115 6 108 1 4 0 0 595 0 0 0 100 March 12, 2026 at 10:56:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 206 196 0 24 225 0 6 0 1 0 99 1 0 0 0 116 51 286 1 29 221 0 1046 0 1 0 99 2 0 0 0 12 3 138 0 23 167 0 300 0 0 0 100 3 0 0 0 65 56 245 0 20 205 0 10 0 0 0 100 4 0 0 0 15 8 147 0 25 236 0 0 0 0 0 100 5 0 0 14 10 2 151 0 21 227 0 266 0 0 0 100 6 0 0 7 11 2 158 1 24 204 0 272 0 0 0 100 7 0 0 0 118 5 265 1 19 276 0 602 0 0 0 100 March 12, 2026 at 10:56:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 14 2343 209 207 0 11 32 10 145 0 0 0 99 1 660 0 0 41 5 162 2 15 31 15 2054 1 1 0 98 2 1894 0 0 28 2 97 2 13 26 9 668 0 1 0 99 3 806 0 113 29 22 140 0 14 31 21 132 0 0 0 100 4 77 0 0 29 3 86 0 8 24 11 172 0 0 0 100 5 45 0 17 25 2 73 0 6 25 10 376 0 0 0 100 6 4 0 7 28 3 55 0 4 30 2 302 0 0 0 100 7 5 0 0 132 52 159 0 6 15 4 631 0 0 0 100 March 12, 2026 at 10:56:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 204 114 0 0 0 0 318 0 0 0 100 1 0 0 0 16 3 40 0 0 1 0 1128 0 0 0 100 2 0 0 0 14 4 6 0 0 1 0 321 0 0 0 100 3 0 0 0 9 2 4 0 0 1 0 5 0 0 0 100 4 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 5 0 0 14 24 10 22 0 0 1 0 276 0 0 0 100 6 0 0 7 11 3 6 0 1 1 0 260 0 0 0 100 7 0 0 0 115 54 106 0 0 1 0 593 0 0 0 100 March 12, 2026 at 10:56:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 88 0 70 2308 202 375 3 24 4 2 1683 1 1 0 98 1 109 0 0 30 2 492 8 30 6 2 2806 1 0 0 99 2 255 0 0 26 5 245 8 18 6 0 1666 2 0 0 98 3 299 0 0 20 1 196 3 13 3 1 1595 1 0 0 98 4 33 0 0 20 2 481 4 33 8 0 1962 1 0 0 99 5 24 0 14 32 9 183 3 17 9 0 1562 1 0 0 99 6 128 0 7 19 2 308 4 21 1 0 1903 1 0 0 98 7 87 0 0 125 49 350 3 21 4 0 1902 1 0 0 99 March 12, 2026 at 10:56:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2314 205 26 0 1 0 0 10 0 0 0 100 1 0 0 0 19 3 47 1 1 10 1 1146 0 0 0 100 2 0 0 0 60 22 58 0 5 1 0 316 0 0 0 100 3 0 0 0 73 18 91 0 6 5 0 14 0 0 0 100 4 13 0 0 10 1 4 0 0 5 0 13 0 0 0 100 5 4 0 14 18 6 18 0 0 1 0 284 0 0 0 100 6 0 0 7 14 3 12 1 2 0 0 279 0 0 0 100 7 0 0 0 117 20 110 1 5 0 0 598 0 0 0 100 March 12, 2026 at 10:56:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 137 0 15 135 0 4 0 0 0 100 1 0 0 0 16 2 155 1 15 149 0 1152 0 0 0 99 2 0 0 0 24 8 193 1 14 169 0 306 0 0 0 100 3 0 0 0 165 61 319 0 23 154 0 0 0 0 0 100 4 0 0 0 24 10 121 0 20 139 0 2 0 0 0 100 5 0 0 14 13 3 119 0 13 142 0 266 0 0 0 100 6 0 0 7 13 4 137 0 16 153 0 276 0 0 0 100 7 0 0 0 117 52 234 0 17 110 0 601 0 0 0 100 March 12, 2026 at 10:56:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2316 204 187 1 9 43 0 17 0 1 0 99 1 0 0 7 26 2 144 1 7 53 0 1065 0 0 0 100 2 0 0 0 121 54 206 2 7 61 0 332 0 0 0 100 3 0 0 0 88 74 211 0 6 29 0 37 0 0 0 100 4 0 0 9 24 1 128 1 8 50 0 0 0 1 0 99 5 0 0 14 13 2 112 0 9 48 0 359 0 0 0 100 6 0 0 7 15 2 99 1 6 56 0 334 0 0 0 100 7 0 0 0 32 9 80 1 6 25 0 602 0 0 0 100 March 12, 2026 at 10:56:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 22 1 46 1 0 0 0 1042 0 0 0 100 2 0 0 7 128 60 124 0 1 0 0 314 0 0 0 100 3 0 0 0 8 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 13 2 6 0 0 0 0 2 0 0 0 100 5 0 0 14 10 2 10 1 1 0 0 266 0 0 0 100 6 0 0 7 10 2 20 0 1 0 0 260 0 0 0 100 7 0 0 0 20 5 12 1 0 0 0 597 0 0 0 100 March 12, 2026 at 10:56:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 203 108 0 0 0 0 4 0 0 0 100 1 0 0 0 29 1 36 1 1 1 0 1037 0 0 0 100 2 0 0 0 150 60 132 0 2 0 0 314 0 0 0 100 3 0 0 0 23 1 2 0 1 0 0 0 0 0 0 100 4 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 5 0 0 126 8 2 8 0 0 0 0 266 0 0 0 100 6 0 0 7 26 2 4 1 0 0 0 260 0 0 0 100 7 0 0 0 33 4 10 1 0 0 0 597 0 0 0 100 March 12, 2026 at 10:56:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2308 202 106 0 0 0 0 0 0 0 0 100 1 0 0 0 15 2 38 1 0 0 0 1039 0 0 0 100 2 0 0 0 130 58 122 0 0 0 0 306 0 0 0 100 3 0 0 0 8 1 2 0 1 0 0 0 0 0 0 100 4 0 0 0 11 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 14 3 8 0 1 1 0 261 0 0 0 100 7 0 0 0 15 3 28 0 1 1 0 594 0 0 0 100 March 12, 2026 at 10:56:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 266 2345 203 1252 33 128 234 0 7343 5 2 0 94 1 0 0 0 80 6 1169 21 106 233 0 8585 5 2 0 93 2 2 0 0 92 10 1338 17 105 217 0 7539 4 1 0 94 3 48 0 0 114 56 1307 17 85 235 0 6263 4 1 0 95 4 16 0 0 73 11 1328 16 92 233 0 6168 4 1 0 95 5 1 0 14 133 43 1218 11 85 199 0 6270 3 1 0 96 6 36 0 7 66 3 1086 12 66 279 0 5032 4 1 0 95 7 5 0 0 66 7 1055 7 57 214 0 6295 3 1 0 96 March 12, 2026 at 10:56:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 50 0 2 20 0 0 0 0 0 100 1 0 0 0 13 1 84 1 4 31 0 1039 0 0 0 100 2 0 0 0 17 1 56 0 2 28 0 300 0 0 0 100 3 0 0 0 50 43 120 0 7 31 0 10 0 0 0 100 4 0 0 0 20 7 52 0 3 32 0 8 0 0 0 100 5 1 0 14 110 43 145 1 5 27 0 309 0 0 0 100 6 0 0 7 105 11 159 0 8 25 0 260 0 0 0 100 7 0 0 0 19 4 50 1 4 13 0 595 0 0 0 100 March 12, 2026 at 10:56:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 14 2348 223 108 0 12 4 6 140 0 0 0 100 1 8 0 0 47 4 81 1 5 3 4 1190 0 0 0 99 2 2663 0 113 24 2 62 2 7 11 12 755 1 1 0 99 3 110 0 0 27 3 100 0 13 12 15 207 0 0 0 100 4 43 0 2 42 10 79 0 7 9 14 118 0 0 0 100 5 13 0 14 54 12 71 0 7 6 6 344 0 0 0 100 6 648 0 7 102 20 107 2 8 6 6 1155 1 0 0 98 7 5 0 0 76 8 69 1 9 3 4 646 0 0 0 100 March 12, 2026 at 10:56:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2313 211 111 0 4 0 0 3 0 0 0 100 1 0 0 0 34 5 56 0 2 0 0 1128 0 0 0 100 2 0 0 0 94 41 88 0 1 0 0 300 0 0 0 100 3 0 0 0 11 2 8 0 1 0 0 13 0 0 0 100 4 0 0 0 24 9 40 0 1 0 0 13 0 0 0 100 5 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 16 3 10 0 0 0 0 594 0 0 0 100 March 12, 2026 at 10:56:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 204 36 0 0 0 0 2 0 0 0 100 1 0 0 0 9 1 36 1 0 0 0 1127 0 0 0 100 2 0 0 0 110 51 104 0 0 0 0 300 0 0 0 100 3 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 4 0 0 0 16 5 8 0 0 0 0 324 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 96 5 98 0 2 0 0 599 0 0 0 100 March 12, 2026 at 10:56:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2303 202 116 0 1 3 0 6 0 0 0 100 1 0 0 0 9 1 34 1 0 1 0 1122 0 0 0 100 2 0 0 0 109 51 105 0 1 2 0 300 0 0 0 100 3 0 0 0 11 3 8 0 0 1 0 10 0 0 0 100 4 0 0 0 21 9 20 0 1 2 0 16 0 0 0 100 5 0 0 14 8 2 28 0 1 0 0 266 0 0 0 100 6 0 0 7 9 2 8 0 0 0 0 267 0 0 0 100 7 0 0 0 35 6 32 1 1 3 0 597 0 0 0 100 March 12, 2026 at 10:56:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 112 2324 206 418 11 31 0 0 1874 1 1 0 99 1 36 0 0 30 3 264 5 33 5 1 2427 1 0 0 98 2 192 0 0 40 8 313 5 33 5 0 1957 1 0 0 98 3 66 0 2 121 49 315 4 23 15 1 2055 1 0 0 99 4 325 0 13 30 1 278 15 21 14 0 2164 2 0 0 98 5 153 0 14 32 3 204 5 20 7 2 1544 2 0 0 98 6 170 0 7 35 3 344 15 19 4 2 1859 1 0 0 98 7 0 0 0 53 6 230 6 23 4 0 2173 1 0 0 99 March 12, 2026 at 10:56:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 210 122 0 0 0 0 11 0 0 0 100 1 0 0 0 9 1 32 1 0 0 0 1127 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 109 52 104 0 0 0 0 3 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 3 0 0 0 100 5 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 6 0 0 7 11 2 4 0 0 0 0 260 0 0 0 100 7 0 0 0 26 4 20 0 0 0 0 595 0 0 0 100 March 12, 2026 at 10:56:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1971 0 261 2350 211 325 12 42 155 15 1890 7 1 0 91 1 4118 0 16 126 5 462 39 53 155 18 3527 9 2 0 89 2 2521 0 1 157 28 444 53 54 164 21 2396 4 1 0 95 3 1060 0 6 153 17 364 23 48 112 17 1059 9 1 0 91 4 1936 0 2 84 8 284 20 33 174 18 1176 7 1 0 92 5 4911 0 36 72 3 360 17 53 187 22 2623 8 2 0 90 6 944 0 22 110 4 387 64 46 118 16 1990 6 1 0 94 7 617 0 14 113 3 407 56 39 105 15 2344 5 1 0 95 March 12, 2026 at 10:56:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 45 0 28 2311 205 20 0 2 2 0 13 0 0 0 100 1 0 0 0 14 2 54 1 1 1 0 1129 0 0 0 100 2 10 0 0 111 8 110 0 5 1 0 310 0 0 0 100 3 0 0 0 38 7 28 0 6 0 0 9 0 0 0 100 4 1 0 7 88 40 92 0 3 0 0 7 0 0 0 100 5 0 0 14 13 3 11 0 0 5 0 281 0 0 0 100 6 26 0 7 16 4 18 0 1 1 0 287 0 0 0 100 7 0 0 0 32 3 24 1 0 7 0 603 0 0 0 100 March 12, 2026 at 10:56:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2325 208 157 1 16 162 0 11 0 0 0 100 1 0 0 0 14 2 144 1 7 141 0 1124 0 0 0 100 2 0 0 0 114 23 259 0 13 178 0 300 0 0 0 100 3 0 0 0 75 61 246 0 15 144 0 0 0 0 0 100 4 0 0 0 124 39 247 0 17 157 0 14 0 0 0 100 5 0 0 21 11 3 128 0 16 131 0 270 0 0 0 100 6 0 0 14 13 3 137 1 15 150 0 268 0 0 0 100 7 0 0 0 33 4 145 1 12 151 0 594 0 0 0 100 March 12, 2026 at 10:56:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 207 126 0 3 14 0 8 0 0 0 100 1 0 0 0 12 1 63 1 3 15 0 1124 0 0 0 100 2 0 0 0 25 3 34 0 4 10 0 300 0 0 0 100 3 0 0 0 40 31 94 0 4 7 0 0 0 0 0 100 4 0 0 0 21 5 42 0 3 10 0 3 0 0 0 100 5 0 0 14 105 48 134 1 4 5 0 266 0 0 0 100 6 0 0 7 10 2 24 0 2 6 0 260 0 0 0 100 7 0 0 7 28 4 44 0 1 12 0 594 0 0 0 100 March 12, 2026 at 10:56:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 34 2341 211 163 3 13 2182 7 108 0 2 0 98 1 12 0 20 23 2 131 6 32 25 11 1244 0 0 0 99 2 34 0 5 73 5 117 4 23 78 10 435 0 0 0 100 3 32 0 17 31 3 69 2 16 204 5 81 0 0 0 100 4 1646 0 8 35 4 125 5 27 55 12 452 1 1 0 98 5 63 0 20 130 56 214 3 27 40 11 496 0 0 0 100 6 33 0 14 30 3 95 0 22 2350 15 454 0 1 0 99 7 17 0 22 34 4 74 0 11 1808 6 690 0 1 0 99 March 12, 2026 at 10:56:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2316 203 20 0 2 7 1 14 0 0 0 100 1 19 0 0 21 2 46 1 2 1 1 829 0 0 0 100 2 8 0 0 120 43 129 0 4 10 2 339 0 0 0 100 3 11 0 7 16 1 17 0 3 9 0 34 0 0 0 100 4 139 0 0 20 2 17 0 2 7 2 32 0 0 0 100 5 295 0 56 111 12 131 1 6 26 7 362 0 1 0 99 6 2 0 7 19 2 24 0 3 6 2 274 0 0 0 100 7 9 0 7 33 3 39 2 3 3 2 616 0 0 0 100 March 12, 2026 at 10:56:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2365 203 10 0 2 0 0 1 0 0 0 100 1 0 0 0 65 1 32 1 0 1 0 760 0 0 0 100 2 0 0 0 130 32 66 0 2 0 0 299 0 0 0 100 3 0 0 0 101 19 40 0 1 0 0 0 0 0 0 100 4 0 0 0 67 1 4 0 0 1 0 0 0 0 0 100 5 0 0 57 160 3 118 0 3 2 0 266 0 1 0 99 6 0 0 350 17 2 6 1 0 2 0 259 0 0 0 100 7 0 0 0 83 3 20 1 0 0 0 595 0 0 0 100 March 12, 2026 at 10:56:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 118 0 2 4 0 0 0 0 0 100 1 0 0 0 8 1 34 0 1 0 0 757 0 0 0 100 2 0 0 0 8 1 4 0 0 1 0 300 0 0 0 100 3 0 0 0 109 51 102 0 0 0 0 0 0 0 0 100 4 0 0 0 20 10 18 0 0 3 0 17 0 0 0 100 5 0 0 14 19 4 20 1 0 2 0 272 0 0 0 100 6 0 0 7 9 2 26 0 1 0 0 264 0 0 0 100 7 0 0 0 26 3 26 0 0 1 0 593 0 0 0 100 March 12, 2026 at 10:56:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 106 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 32 1 0 0 0 756 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 109 51 102 0 0 0 0 0 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 1 0 0 595 0 0 0 100 March 12, 2026 at 10:57:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 122 0 1 0 0 0 0 0 0 100 1 19 0 0 21 7 48 1 0 19 0 843 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 109 51 104 0 0 0 0 2 0 0 0 100 4 3 0 0 21 10 34 0 1 17 0 125 0 0 0 100 5 830 0 15 11 3 20 0 3 62 0 903 0 1 0 99 6 501 0 8 12 2 31 0 3 19 0 410 0 0 0 100 7 322 0 1 27 3 24 2 3 21 0 697 0 0 0 100 March 12, 2026 at 10:57:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 205 103 0 3 0 0 0 0 0 0 100 1 0 0 0 110 51 149 0 3 3 0 776 0 0 0 100 2 0 0 0 12 3 8 0 1 0 0 301 0 0 0 100 3 0 0 0 45 17 36 0 1 0 0 0 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 70 0 1 0 0 0 0 0 0 100 1 0 0 0 69 29 90 1 3 0 0 769 0 0 0 100 2 0 0 0 108 36 102 0 6 0 0 300 0 0 0 100 3 0 0 0 27 9 20 0 2 0 0 0 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 3 0 0 0 100 5 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 6 0 0 7 10 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 593 0 0 0 100 March 12, 2026 at 10:57:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 194 0 2 90 0 0 0 0 0 100 1 0 0 0 52 21 140 1 6 80 0 767 0 0 0 100 2 0 0 0 56 25 187 0 6 94 0 300 0 0 0 100 3 0 0 0 112 78 220 0 9 51 0 0 0 0 0 100 4 0 0 0 22 10 86 0 5 66 0 19 0 0 0 100 5 0 0 14 12 3 68 0 3 60 0 267 0 0 0 100 6 0 0 7 11 2 107 0 4 82 0 267 0 0 0 100 7 0 0 0 26 3 92 0 2 73 0 596 0 0 0 100 March 12, 2026 at 10:57:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 205 105 0 3 0 0 0 0 0 0 100 1 0 0 0 66 30 94 0 2 0 0 769 0 0 0 100 2 0 0 0 10 1 4 0 0 1 0 300 0 0 0 100 3 0 0 0 89 39 102 0 3 0 0 0 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 10 2 4 1 0 0 0 259 0 0 0 100 7 0 0 0 27 4 20 1 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 202 102 0 0 1 0 0 0 0 0 100 1 1 0 0 113 53 134 1 0 0 0 768 0 0 0 100 2 0 0 0 48 21 42 0 1 1 0 300 0 0 0 100 3 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 4 0 0 0 17 6 10 0 0 1 0 6 0 0 0 100 5 0 0 14 12 4 12 0 0 1 0 271 0 0 0 100 6 0 0 7 11 3 8 0 1 1 0 261 0 0 0 100 7 0 0 0 26 4 16 1 0 1 0 595 0 0 0 100 March 12, 2026 at 10:57:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 51 22 74 1 0 0 0 769 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 300 0 0 0 100 3 0 0 0 11 1 4 0 1 1 0 0 0 0 0 100 4 0 0 0 12 3 24 0 1 1 0 3 0 0 0 100 5 0 0 14 11 2 6 1 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 203 90 0 0 0 0 1 0 0 0 100 1 0 0 0 51 15 74 1 2 1 0 760 0 0 0 100 2 0 0 0 124 58 120 0 2 0 0 308 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 10 1 4 0 0 1 0 0 0 0 0 100 5 0 0 14 10 3 28 0 1 0 0 267 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 16 0 1 3 0 0 0 0 0 100 1 0 0 0 112 5 134 1 1 0 0 748 0 0 0 100 2 0 0 0 148 69 144 0 1 3 0 320 0 0 0 100 3 0 0 0 9 1 6 0 1 1 0 0 0 0 0 100 4 0 0 0 23 11 16 0 0 1 0 12 0 0 0 100 5 0 0 14 8 2 20 0 0 0 0 283 0 0 0 100 6 0 0 7 9 2 8 0 0 0 0 266 0 0 0 100 7 0 0 0 27 3 26 1 0 2 0 594 0 0 0 100 March 12, 2026 at 10:57:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 4 0 0 1 0 0 0 0 0 100 1 0 0 0 110 17 134 0 2 0 0 749 0 0 0 100 2 0 0 0 82 23 74 0 1 0 0 320 0 0 0 100 3 0 0 0 75 34 70 0 1 0 0 0 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 10 2 26 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 1 0 0 594 0 0 0 100 March 12, 2026 at 10:57:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 34 0 2 0 0 0 0 0 0 100 1 0 0 0 111 29 134 1 1 1 0 747 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 320 0 0 0 100 3 0 0 0 81 24 70 0 2 0 0 0 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 11 2 8 1 0 1 0 266 0 0 0 100 6 0 0 7 9 2 24 0 1 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 111 52 134 1 0 0 0 748 0 0 0 100 2 0 0 0 50 22 44 0 0 0 0 321 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 10 3 8 0 0 0 0 267 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 112 53 138 0 0 1 0 750 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 320 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 10 2 6 0 0 0 0 4 0 0 0 100 5 0 0 14 10 3 8 0 0 0 0 268 0 0 0 100 6 0 0 7 11 2 6 0 0 0 0 259 0 0 0 100 7 0 0 0 27 4 42 1 1 0 0 600 0 0 0 100 March 12, 2026 at 10:57:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 134 0 1 2 0 0 0 0 0 100 1 0 0 0 111 52 136 1 0 1 0 749 0 0 0 100 2 0 0 0 48 21 44 0 0 2 0 320 0 0 0 100 3 0 0 0 9 2 4 0 0 1 0 0 0 0 0 100 4 0 0 0 17 8 14 0 0 1 0 14 0 0 0 100 5 0 0 14 14 4 19 0 1 0 0 274 0 0 0 100 6 0 0 7 9 2 8 0 0 0 0 265 0 0 0 100 7 0 0 0 29 3 26 1 0 4 0 594 0 0 0 100 March 12, 2026 at 10:57:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 74 34 96 0 0 0 0 748 0 0 0 100 2 0 0 0 84 39 80 0 1 0 0 320 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 14 4 8 0 0 0 0 4 0 0 0 100 5 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 26 4 20 0 0 0 0 595 0 0 0 100 March 12, 2026 at 10:57:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2302 201 54 0 1 1 0 0 0 0 0 100 1 0 0 0 39 5 60 1 3 1 0 748 0 0 0 100 2 0 0 0 146 57 138 0 3 0 0 341 0 0 0 100 3 0 0 0 39 16 48 0 3 2 0 0 0 0 0 100 4 0 0 0 14 4 6 0 0 1 0 2 0 0 0 100 5 0 0 14 12 4 8 0 0 1 0 267 0 0 0 100 6 0 0 7 11 3 6 0 1 1 0 259 0 0 0 100 7 0 0 0 25 4 16 0 0 1 0 593 0 0 0 100 March 12, 2026 at 10:57:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 4 0 0 0 0 0 0 0 0 100 1 0 0 0 10 2 34 0 0 0 0 748 0 0 0 100 2 0 0 0 149 23 145 0 3 0 0 320 0 0 0 100 3 0 0 0 104 48 116 0 1 0 0 0 0 0 0 100 4 0 0 0 12 3 8 0 1 0 0 2 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 0 0 0 595 0 0 0 100 March 12, 2026 at 10:57:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 203 10 0 1 0 0 1 0 0 0 100 1 0 0 0 11 2 34 1 0 0 0 747 0 0 0 100 2 0 0 0 150 58 144 0 3 0 0 320 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 0 98 9 90 0 2 0 0 0 0 0 0 100 5 0 0 14 18 7 18 0 1 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 0 0 0 593 0 0 0 100 March 12, 2026 at 10:57:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 12 0 0 0 0 0 0 0 0 100 1 0 0 0 10 2 34 0 0 0 0 749 0 0 0 100 2 0 0 0 148 21 142 0 0 0 0 320 0 0 0 100 3 0 0 0 11 2 6 0 1 1 0 0 0 0 0 100 4 0 0 0 23 11 36 0 1 0 0 12 0 0 0 100 5 0 0 14 109 52 118 1 0 0 0 282 0 0 0 100 6 0 0 7 9 2 8 0 0 0 0 268 0 0 0 100 7 0 0 0 26 3 24 0 0 1 0 594 0 0 0 100 March 12, 2026 at 10:57:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 4 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 34 1 0 0 0 748 0 0 0 100 2 0 0 0 143 25 136 0 1 0 0 317 0 0 0 100 3 0 0 0 11 3 6 0 1 0 0 3 0 0 0 100 4 0 0 0 12 2 6 0 0 1 0 1 0 0 0 100 5 0 0 14 108 46 126 0 2 1 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 1 0 0 594 0 0 0 100 March 12, 2026 at 10:57:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 6 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 34 1 0 0 0 747 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 108 2 106 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 4 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 34 1 0 1 0 749 0 0 0 100 2 0 0 0 110 9 104 0 2 0 0 301 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 28 4 24 0 1 0 0 266 0 0 0 100 6 0 0 7 91 43 108 0 2 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 0 0 0 595 0 0 0 100 March 12, 2026 at 10:57:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 4 0 0 0 0 0 0 0 0 100 1 0 0 0 12 3 36 0 0 0 0 749 0 0 0 100 2 0 0 0 108 39 102 0 4 0 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 6 0 0 7 71 6 64 0 2 2 0 259 0 0 0 100 7 0 0 0 64 11 82 0 3 0 0 594 0 0 0 100 March 12, 2026 at 10:57:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2318 214 102 0 3 0 0 0 0 0 0 100 1 0 0 0 13 3 38 1 0 0 0 771 0 0 0 100 2 0 0 0 108 37 102 0 3 0 0 300 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 20 0 0 0 100 4 0 0 0 19 8 10 0 0 0 0 8 0 0 0 100 5 0 0 14 8 2 18 0 0 0 0 281 0 0 0 100 6 0 0 7 9 2 8 0 0 0 0 267 0 0 0 100 7 0 0 0 36 5 31 0 3 0 0 594 0 0 0 100 March 12, 2026 at 10:57:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 94 0 2 0 0 0 0 0 0 100 1 0 0 0 38 16 64 0 1 1 0 749 0 0 0 100 2 0 0 0 81 37 74 0 0 0 0 300 0 0 0 100 3 0 0 0 75 21 70 0 2 0 0 20 0 0 0 100 4 0 0 0 12 2 6 0 1 0 0 2 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 29 4 22 1 1 2 0 595 0 0 0 100 March 12, 2026 at 10:57:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 202 74 0 2 3 0 0 0 0 0 100 1 0 0 0 45 13 66 1 3 1 0 748 0 0 0 100 2 0 0 0 10 2 18 0 1 1 0 300 0 0 0 100 3 0 0 0 73 24 62 0 1 1 0 20 0 0 0 100 4 0 0 0 22 8 14 0 1 1 0 1 0 0 0 100 5 0 0 14 78 37 76 0 1 1 0 267 0 0 0 100 6 0 0 7 11 3 6 0 1 1 0 259 0 0 0 100 7 0 0 0 26 4 16 1 0 1 0 593 0 0 0 100 March 12, 2026 at 10:57:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 13 3 40 1 0 0 0 757 0 0 0 100 2 0 0 0 8 1 6 0 0 0 0 318 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 109 52 106 1 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 595 0 0 0 100 March 12, 2026 at 10:57:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 203 110 0 0 0 0 1 0 0 0 100 1 0 0 0 10 2 34 0 0 0 0 748 0 0 0 100 2 0 0 0 12 1 4 0 1 1 0 300 0 0 0 100 3 0 0 0 47 21 62 0 1 0 0 20 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 110 53 108 0 0 0 0 267 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 593 0 0 0 100 March 12, 2026 at 10:57:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 202 114 0 0 0 0 0 0 0 0 100 1 0 0 0 13 2 36 1 0 0 0 751 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 51 22 46 0 0 1 0 20 0 0 0 100 4 0 0 0 19 9 28 0 1 0 0 7 0 0 0 100 5 0 0 14 112 54 124 0 0 0 0 284 0 0 0 100 6 0 0 7 10 2 8 1 0 0 0 267 0 0 0 100 7 0 0 0 27 3 24 1 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 34 1 0 2 0 748 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 108 52 106 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 1 0 0 595 0 0 0 100 March 12, 2026 at 10:57:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 106 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 34 1 0 0 0 748 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 12 2 6 0 0 0 0 2 0 0 0 100 5 0 0 14 109 52 126 1 1 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 593 0 0 0 100 March 12, 2026 at 10:57:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2302 201 104 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 34 1 0 0 0 748 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 301 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 111 53 130 0 0 0 0 267 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 595 0 0 0 100 March 12, 2026 at 10:57:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 12 3 36 0 0 0 0 749 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 108 52 106 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 0 0 0 593 0 0 0 100 March 12, 2026 at 10:57:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 112 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 34 1 0 0 0 748 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 20 0 0 0 100 4 0 0 0 13 6 10 0 0 0 0 13 0 0 0 100 5 0 0 14 61 28 66 0 0 1 0 276 0 0 0 100 6 0 0 7 61 28 62 0 1 0 0 268 0 0 0 100 7 0 0 0 27 3 44 1 1 0 0 594 0 0 0 100 March 12, 2026 at 10:57:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 126 0 1 0 0 0 0 0 0 100 1 0 0 0 10 2 34 0 0 0 0 748 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 6 0 0 7 109 52 104 0 0 0 0 259 0 0 0 100 7 0 0 0 28 4 22 0 0 0 0 596 0 0 0 100 March 12, 2026 at 10:57:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 108 0 0 1 0 0 0 0 0 100 1 0 0 0 13 3 34 1 0 2 0 748 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 321 0 0 0 100 3 0 0 0 49 22 40 0 0 1 0 20 0 0 0 100 4 0 0 0 14 4 6 0 0 0 0 2 0 0 0 100 5 0 0 14 12 4 8 0 0 1 0 267 0 0 0 100 6 0 0 7 111 53 106 0 1 0 0 259 0 0 0 100 7 0 0 0 25 4 16 0 0 1 0 594 0 0 0 100 March 12, 2026 at 10:57:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 52 0 0 1 0 0 0 0 0 100 1 0 0 0 62 25 88 0 3 0 0 749 0 0 0 100 2 0 0 0 8 1 20 0 1 1 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 109 29 104 0 2 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 203 74 0 2 2 0 1 0 0 0 100 1 0 0 0 81 37 100 1 0 0 0 747 0 0 0 100 2 0 0 0 39 16 36 0 2 0 0 300 0 0 0 100 3 0 0 0 48 21 62 0 1 0 0 20 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 49 2 42 0 0 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 202 114 0 0 0 0 0 0 0 0 100 1 0 0 0 8 1 32 0 0 0 0 747 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 20 0 0 0 100 4 0 0 0 22 10 14 0 0 1 0 12 0 0 0 100 5 0 0 14 9 2 16 1 0 0 0 275 0 0 0 100 6 0 0 7 9 2 8 0 0 0 0 267 0 0 0 100 7 0 0 0 26 3 24 0 0 0 0 593 0 0 0 100 March 12, 2026 at 10:57:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 32 1 0 1 0 749 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 3 0 0 0 49 21 42 0 1 0 0 20 0 0 0 100 4 0 0 0 8 1 22 0 1 0 0 0 0 0 0 100 5 0 0 14 10 3 8 0 0 0 0 267 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 1 0 0 595 0 0 0 100 March 12, 2026 at 10:57:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 32 1 0 1 0 747 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 12 2 6 0 1 1 0 2 0 0 0 100 5 0 0 14 8 2 26 0 1 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 106 0 0 0 0 0 0 0 0 100 1 0 0 0 8 1 32 0 0 0 0 749 0 0 0 100 2 0 0 0 112 53 106 0 0 0 0 301 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 106 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 34 1 0 0 0 750 0 0 0 100 2 0 0 0 110 52 106 0 0 1 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 11 2 28 1 0 0 0 266 0 0 0 100 6 0 0 7 10 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 112 0 0 0 0 0 0 0 0 100 1 0 0 0 8 1 32 0 0 1 0 747 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 3 0 0 0 50 22 44 1 0 0 0 20 0 0 0 100 4 0 0 0 18 9 14 0 0 0 0 14 0 0 0 100 5 0 0 14 16 4 18 0 0 2 0 273 0 0 0 100 6 0 0 7 10 2 26 0 1 1 0 267 0 0 0 100 7 0 0 0 26 3 24 0 0 0 0 593 0 0 0 100 March 12, 2026 at 10:57:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 32 1 0 0 0 748 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 299 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 12 4 4 0 0 0 0 2 0 0 0 100 5 0 0 14 9 2 6 1 0 0 0 311 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 27 4 20 1 0 0 0 596 0 0 0 100 March 12, 2026 at 10:57:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 202 104 0 0 1 0 0 0 0 0 100 1 0 0 0 10 2 32 0 0 2 0 748 0 0 0 100 2 0 0 0 112 53 104 0 0 0 0 300 0 0 0 100 3 0 0 0 49 22 40 0 0 1 0 20 0 0 0 100 4 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 5 0 0 14 12 4 8 0 0 1 0 267 0 0 0 100 6 0 0 7 13 3 8 0 1 2 0 259 0 0 0 100 7 0 0 0 26 4 36 1 1 1 0 594 0 0 0 100 March 12, 2026 at 10:57:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 124 0 1 0 0 0 0 0 0 100 1 0 0 0 9 1 32 1 0 1 0 747 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 26 3 20 0 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 203 110 0 0 0 0 1 0 0 0 100 1 0 0 0 9 1 32 1 0 1 0 749 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 10 2 4 1 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 60 0 0 1 0 0 0 0 0 100 1 0 0 0 60 1 86 0 2 0 0 748 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 3 0 0 0 49 22 64 0 1 1 0 20 0 0 0 100 4 0 0 0 19 9 16 0 0 0 0 15 0 0 0 100 5 0 0 14 11 2 12 1 0 0 0 271 0 0 0 100 6 0 0 7 9 2 8 0 0 0 0 266 0 0 0 100 7 0 0 0 27 3 24 1 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 6 0 1 0 0 0 0 0 0 100 1 0 0 0 109 41 134 1 2 0 0 748 0 0 0 100 2 0 0 0 110 12 104 0 3 0 0 300 0 0 0 100 3 0 0 0 49 21 42 0 0 1 0 20 0 0 0 100 4 0 0 0 8 1 20 0 1 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 1 0 0 594 0 0 0 100 March 12, 2026 at 10:57:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 202 78 0 1 0 0 0 0 0 0 100 1 0 0 0 111 48 134 1 2 0 0 747 0 0 0 100 2 0 0 0 14 4 6 0 0 0 0 300 0 0 0 100 3 0 0 0 69 22 62 0 2 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 102 0 0 1 0 0 0 0 0 100 1 0 0 0 110 51 134 0 1 0 0 749 0 0 0 100 2 0 0 0 18 3 13 0 2 0 0 301 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 10 1 4 0 0 1 0 0 0 0 0 100 5 0 0 14 8 2 26 0 1 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 18 3 10 0 0 0 0 594 0 0 0 100 March 12, 2026 at 10:57:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 102 0 0 0 0 0 0 0 0 100 1 0 0 0 87 39 108 1 0 0 0 749 0 0 0 100 2 0 0 0 43 15 38 0 1 0 0 300 0 0 0 100 3 0 0 0 47 21 42 0 1 0 0 20 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 3 0 0 0 100 5 0 0 14 11 2 8 1 1 0 0 266 0 0 0 100 6 0 0 7 10 2 6 0 1 0 0 259 0 0 0 100 7 0 0 0 17 3 26 1 2 0 0 594 0 0 0 100 March 12, 2026 at 10:57:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 128 0 2 0 0 0 0 0 0 100 1 0 0 0 12 2 38 0 0 1 0 749 0 0 0 100 2 0 0 0 112 52 104 0 0 1 0 300 0 0 0 100 3 0 0 0 53 24 48 0 0 1 0 20 0 0 0 100 4 0 0 0 20 10 18 0 0 0 0 16 0 0 0 100 5 0 0 14 12 3 14 0 0 0 0 272 0 0 0 100 6 0 0 7 12 3 10 0 0 0 0 266 0 0 0 100 7 0 0 0 21 4 18 1 0 1 0 594 0 0 0 100 March 12, 2026 at 10:57:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 130 0 1 0 0 0 0 0 0 100 1 0 0 0 11 1 34 1 0 1 0 748 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 300 0 0 0 100 3 0 0 0 49 22 42 0 0 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 21 4 14 1 0 0 0 595 0 0 0 100 March 12, 2026 at 10:57:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 202 110 0 0 3 0 0 0 0 0 100 1 0 0 0 12 2 54 0 2 1 0 748 0 0 0 100 2 0 0 0 114 54 106 0 0 0 0 348 0 0 0 100 3 0 0 0 51 23 42 0 0 1 0 20 0 0 0 100 4 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 5 0 0 14 12 4 8 0 0 1 0 267 0 0 0 100 6 0 0 7 11 3 4 0 0 1 0 259 0 0 0 100 7 0 0 0 17 4 8 0 0 1 0 594 0 0 0 100 March 12, 2026 at 10:57:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 110 0 0 0 0 0 0 0 0 100 1 0 0 0 13 2 40 1 0 0 0 757 0 0 0 100 2 0 0 0 108 51 106 0 0 0 0 318 0 0 0 100 3 0 0 0 49 22 42 0 0 0 0 20 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 3 0 0 0 100 5 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 17 3 10 1 0 0 0 593 0 0 0 100 March 12, 2026 at 10:57:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 203 120 0 0 0 0 1 0 0 0 100 1 0 0 0 13 1 36 1 0 3 0 747 0 0 0 100 2 0 0 0 108 51 124 0 1 0 0 300 0 0 0 100 3 0 0 0 49 22 42 0 0 0 0 20 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 265 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 17 3 10 1 0 0 0 595 0 0 0 100 March 12, 2026 at 10:57:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 202 46 0 1 0 0 0 0 0 0 100 1 0 0 0 79 12 108 0 6 1 0 752 0 0 0 100 2 0 0 0 74 27 66 0 5 1 0 300 0 0 0 100 3 0 0 0 80 36 78 0 3 0 0 20 0 0 0 100 4 0 0 0 23 11 34 0 1 0 0 20 0 0 0 100 5 0 0 14 8 2 12 0 0 0 0 268 0 0 0 100 6 0 0 7 9 2 8 0 0 0 0 266 0 0 0 100 7 0 0 0 22 3 20 0 1 0 0 594 0 0 0 100 March 12, 2026 at 10:57:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 202 104 0 1 0 0 0 0 0 0 100 1 0 0 0 111 51 132 1 0 0 0 748 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 3 0 0 0 49 22 42 0 0 0 0 20 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 24 3 18 0 2 0 0 594 0 0 0 100 March 12, 2026 at 10:58:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 104 0 0 0 0 0 0 0 0 100 1 0 0 0 84 39 106 0 0 1 0 748 0 0 0 100 2 0 0 0 32 13 28 0 1 0 0 300 0 0 0 100 3 0 0 0 49 22 42 0 0 0 0 20 0 0 0 100 4 0 0 0 14 3 8 0 0 0 0 3 0 0 0 100 5 0 0 14 9 2 8 1 1 0 0 266 0 0 0 100 6 0 0 7 9 2 20 0 1 0 0 259 0 0 0 100 7 0 0 0 25 3 18 1 0 0 0 594 0 0 0 100 March 12, 2026 at 10:58:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 202 104 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 32 1 0 0 0 748 0 0 0 100 2 0 0 0 111 52 104 1 0 0 0 301 0 0 0 100 3 0 0 0 49 22 42 0 0 0 0 20 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 12 2 6 0 1 0 0 259 0 0 0 100 7 0 0 0 25 3 38 1 1 0 0 593 0 0 0 100 March 12, 2026 at 10:58:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 202 108 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 34 1 0 0 0 749 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 300 0 0 0 100 3 0 0 0 53 22 44 0 1 0 0 20 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 18 3 12 0 1 0 0 595 0 0 0 100 March 12, 2026 at 10:58:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 136 0 1 0 0 0 0 0 0 100 1 0 0 0 8 1 32 0 0 1 0 747 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 300 0 0 0 100 3 0 0 0 49 22 44 0 0 0 0 20 0 0 0 100 4 0 0 0 17 8 14 0 0 0 0 13 0 0 0 100 5 0 0 14 10 2 12 0 0 0 0 271 0 0 0 100 6 0 0 7 10 2 8 1 0 0 0 266 0 0 0 100 7 0 0 0 22 4 18 0 1 0 0 593 0 0 0 100 March 12, 2026 at 10:58:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 112 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 48 1 1 2 0 749 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 300 0 0 0 100 3 0 0 0 47 21 40 0 0 0 0 20 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 3 0 0 0 100 5 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 6 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 7 0 0 0 21 5 14 1 0 0 0 595 0 0 0 100 March 12, 2026 at 10:58:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 202 120 0 1 2 1 9 0 0 0 100 1 1287 0 1 13 2 40 2 1 2 0 774 0 0 0 99 2 1 0 1 111 52 112 0 3 1 0 328 0 0 0 100 3 0 0 0 37 16 28 0 0 1 0 20 0 0 0 100 4 17 0 0 62 50 38 0 0 1 0 147 0 0 0 100 5 12 0 14 12 4 36 0 2 1 0 453 0 0 0 100 6 0 0 7 11 3 12 0 0 0 0 271 0 0 0 100 7 0 0 0 20 5 14 1 0 1 0 595 0 0 0 100 March 12, 2026 at 10:58:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 142 0 0 0 0 1 0 0 0 100 1 81 0 0 13 1 52 1 1 1 0 800 0 0 0 100 2 0 0 0 108 51 122 0 1 0 0 300 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 93 78 16 0 0 1 0 16 0 0 0 100 5 0 0 14 10 2 6 0 0 0 0 266 0 0 0 100 6 0 0 7 9 2 8 0 0 0 0 263 0 0 0 100 7 0 0 0 18 4 38 0 0 0 0 593 0 0 0 100