March 31, 2026 at 06:32:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 730 0 112 2287 133 6400 81 407 1705 39 5656 8 6 0 86 1 794 0 107 315 15 6004 21 287 1533 23 10730 3 4 0 94 2 1045 0 132 236 13 4958 18 275 1494 27 8782 2 3 0 94 3 750 0 52 549 241 5290 19 283 1574 39 9747 4 4 0 93 4 1072 0 375 506 243 4919 20 305 1233 6 12669 4 4 0 92 5 687 0 64 6554 6315 3635 21 259 2866 32 6654 2 6 0 93 6 722 0 57 451 12 5238 14 296 1425 8 12805 5 6 0 90 7 870 0 27 360 13 5813 22 261 1601 36 4347 7 4 0 89 March 31, 2026 at 06:32:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5528 0 43 2207 131 1291 24 184 4047 62 2535 2 23 0 75 1 7805 0 13 333 4 724 31 155 4050 39 3657 5 4 0 91 2 5116 0 59 475 2 1311 29 192 4173 72 2211 3 4 0 93 3 5448 0 54 677 279 826 24 181 4306 44 3251 6 7 0 87 4 3995 0 104 721 268 881 26 177 4519 49 2161 4 5 0 91 5 746 0 19 334 9 744 13 157 3881 25 1193 2 2 0 96 6 7896 0 16 373 1 865 30 195 4085 57 3107 8 5 0 87 7 3915 0 10 535 2 1424 22 197 4146 87 1624 1 8 0 91 March 31, 2026 at 06:32:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 116 0 1 0 0 1 0 0 0 100 1 31 0 0 11 2 34 0 1 0 0 1020 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 17 210 104 6 0 0 0 0 566 0 0 0 100 4 0 0 10 315 154 106 0 0 1 0 553 0 0 0 100 5 0 0 0 11 2 6 0 1 3 0 368 0 0 0 100 6 0 0 0 12 2 6 0 1 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:32:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 101 206 7 44 633 6 0 0 13 0 87 1 24 0 0 56 1 149 6 29 387 0 1002 0 13 0 87 2 0 0 0 61 2 145 6 39 468 5 2 0 13 0 87 3 0 0 3 379 215 157 6 31 524 6 300 0 13 0 87 4 0 0 24 552 233 674 0 71 501 4 817 0 1 0 99 5 0 0 0 65 2 139 6 35 416 4 355 0 13 0 87 6 0 0 0 192 31 356 0 56 318 6 0 0 1 0 99 7 0 0 0 64 1 132 7 31 409 3 0 0 13 0 87 March 31, 2026 at 06:32:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 420 1 88 1202 41 3 0 1 0 99 1 0 0 0 127 3 325 0 63 641 26 999 0 1 0 99 2 0 0 0 119 2 287 0 58 611 23 13 0 1 0 99 3 0 0 7 504 271 323 0 61 800 40 300 0 1 0 99 4 0 0 26 647 271 846 1 68 1029 51 568 0 1 0 99 5 0 0 0 171 9 384 0 67 555 41 313 0 1 0 99 6 0 0 1 244 21 509 0 76 597 25 262 0 1 0 99 7 0 0 0 190 35 343 0 69 508 25 0 0 1 0 99 March 31, 2026 at 06:32:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 408 0 80 1064 20 0 0 1 0 99 1 0 0 15 101 1 274 1 61 466 10 1001 0 1 0 99 2 0 0 0 110 1 251 0 66 498 9 2 0 1 0 99 3 0 0 3 470 268 261 0 75 663 8 300 0 1 0 99 4 0 0 10 562 271 689 0 71 798 8 551 0 1 0 99 5 0 0 0 144 2 333 0 69 457 9 266 0 1 0 99 6 0 0 14 184 1 417 0 67 495 8 266 0 1 0 99 7 0 0 0 203 51 363 0 66 424 10 0 0 1 0 99 March 31, 2026 at 06:32:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 217 0 14 303 1 0 0 1 0 99 1 0 0 0 57 1 145 0 15 231 2 1000 0 0 0 100 2 0 0 0 60 0 123 0 14 166 1 0 0 0 0 100 3 0 0 3 331 164 137 0 19 268 2 300 0 0 0 100 4 0 0 10 358 164 302 0 21 216 2 553 0 0 0 100 5 0 0 0 90 2 180 0 25 205 0 272 0 0 0 100 6 0 0 14 91 1 183 0 18 185 1 266 0 0 0 100 7 0 0 0 168 51 233 0 14 167 2 0 0 0 0 100 March 31, 2026 at 06:32:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 108 0 0 0 0 0 0 0 0 100 1 0 0 0 8 1 32 1 0 0 0 999 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 3 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 4 0 0 10 221 104 14 0 0 3 0 551 0 0 0 100 5 0 0 0 9 2 4 0 0 2 0 313 0 0 0 100 6 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 109 52 104 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:32:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 112 0 0 0 0 0 0 0 0 100 1 0 0 0 10 1 36 1 1 0 0 1000 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 3 213 104 8 0 0 0 0 300 0 0 0 100 4 0 0 10 224 104 20 0 1 0 0 553 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 300 0 0 0 100 6 0 0 14 8 2 6 0 0 0 0 267 0 0 0 100 7 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:32:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 112 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 36 0 1 0 0 1001 0 0 0 100 2 0 0 0 13 1 12 0 0 0 0 14 0 0 0 100 3 0 0 3 212 103 8 0 1 0 0 300 0 0 0 100 4 0 0 10 221 104 14 0 0 2 0 552 0 0 0 100 5 0 0 0 24 10 18 0 0 3 0 334 0 0 0 100 6 0 0 14 12 3 14 0 0 0 0 283 0 0 0 100 7 0 0 0 111 51 110 0 0 3 0 0 0 0 0 100 March 31, 2026 at 06:32:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 104 116 0 0 0 0 0 0 1 0 99 1 0 0 0 10 1 36 1 2 1 0 999 0 0 0 100 2 0 0 0 8 0 6 0 2 0 0 0 0 0 0 100 3 0 0 3 212 103 8 0 2 0 0 300 0 0 0 100 4 0 0 10 224 105 18 0 1 1 0 553 0 0 0 100 5 0 0 0 10 2 6 0 1 3 0 277 0 0 0 100 6 0 0 14 7 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:32:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 108 0 0 0 0 0 0 0 0 100 1 1 0 0 11 2 34 1 0 0 0 1015 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 3 0 0 3 212 103 6 0 1 0 0 300 0 0 0 100 4 0 0 10 222 104 16 0 1 1 0 552 0 0 0 100 5 0 0 0 9 2 4 0 0 3 0 312 0 0 0 100 6 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:32:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 22 0 0 0 0 22 0 0 0 100 1 0 0 0 98 2 124 1 1 0 0 1014 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 3 214 104 10 0 0 0 0 309 0 0 0 100 4 0 0 10 224 104 16 1 0 2 0 552 0 0 0 100 5 0 0 0 12 3 8 0 1 1 0 286 0 0 0 100 6 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 111 52 108 0 0 0 0 18 0 0 0 100 March 31, 2026 at 06:32:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 98 0 2 0 0 0 0 0 0 100 1 0 0 1 21 1 46 0 0 0 0 1012 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 2 0 0 0 100 3 0 0 3 213 104 8 0 0 0 0 300 0 0 0 100 4 0 0 10 224 104 20 0 0 1 0 552 0 0 0 100 5 0 0 0 10 2 6 0 0 1 0 310 0 0 0 100 6 0 0 14 6 1 4 0 0 0 0 266 0 0 0 100 7 0 0 0 110 51 105 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:32:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 114 0 0 0 0 0 0 0 0 100 1 0 0 0 12 3 34 1 0 1 0 1013 0 0 0 100 2 0 0 0 14 2 12 0 0 1 0 12 0 0 0 100 3 0 0 3 210 103 4 0 0 1 0 300 0 0 0 100 4 0 0 10 221 104 14 0 0 3 0 552 0 0 0 100 5 0 0 0 30 12 24 0 0 5 0 344 0 0 0 100 6 0 0 14 11 2 10 0 1 1 0 277 0 0 0 100 7 0 0 0 112 52 108 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:32:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 110 0 0 0 0 0 0 0 0 100 1 0 0 0 8 1 32 1 0 0 0 1012 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 3 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 4 0 0 10 221 104 14 0 0 1 0 551 0 0 0 100 5 0 0 0 11 2 4 0 0 1 0 267 0 0 0 100 6 0 0 14 9 1 8 0 0 0 0 266 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:32:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 108 0 0 0 0 0 0 0 0 100 1 0 0 0 8 1 32 1 0 0 0 1013 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 4 0 0 10 222 104 14 1 0 1 0 553 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 314 0 0 0 100 6 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:32:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 108 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 32 0 0 0 0 1011 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 2 0 0 0 100 3 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 4 0 0 10 221 104 14 0 0 1 0 552 0 0 0 100 5 0 0 0 9 2 4 0 0 1 0 292 0 0 0 100 6 0 0 14 7 1 4 0 0 1 0 266 0 0 0 100 7 0 0 0 111 52 108 0 1 0 0 1 0 0 0 100 March 31, 2026 at 06:32:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 24 0 2 0 0 0 0 0 0 100 1 0 0 0 9 1 34 1 0 0 0 1012 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 3 320 107 117 0 6 0 0 300 0 0 0 100 4 0 0 10 239 114 34 0 2 2 0 551 0 0 0 100 5 0 0 0 10 2 4 1 0 1 0 274 0 0 0 100 6 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 86 38 78 0 1 1 0 0 0 0 0 100 March 31, 2026 at 06:32:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 14 0 0 0 0 0 0 0 0 100 1 0 0 0 10 2 34 1 0 0 0 1013 0 0 0 100 2 0 0 0 12 1 12 0 0 0 0 13 0 1 0 99 3 0 0 3 317 109 110 0 3 0 0 300 0 0 0 100 4 0 0 10 277 129 68 0 3 0 0 553 0 0 0 100 5 0 0 0 64 31 56 0 1 3 0 413 0 0 0 100 6 0 0 14 11 1 14 0 0 0 0 280 0 0 0 100 7 0 0 0 11 1 8 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:32:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 64 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 34 1 1 0 0 1011 0 0 0 100 2 0 0 0 8 0 6 0 1 0 0 0 0 0 0 100 3 0 0 3 315 131 110 0 5 0 0 300 0 0 0 100 4 0 0 10 218 106 10 1 0 0 0 553 0 0 0 100 5 0 0 0 39 15 32 0 2 1 0 230 0 0 0 100 6 0 0 14 25 9 20 0 2 0 0 266 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:32:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1376 0 7 2119 103 356 9 25 99 8 720 2 3 0 95 1 2652 0 1 47 3 285 15 30 115 10 2026 2 4 0 94 2 972 0 0 147 3 252 9 32 109 12 552 0 1 0 98 3 691 0 45 401 142 292 7 20 87 5 706 1 1 0 99 4 957 0 3 301 113 153 0 19 50 4 795 1 1 0 99 5 926 0 7 92 2 161 8 16 91 10 997 2 0 0 98 6 1094 0 14 80 1 167 15 21 77 4 959 1 1 0 98 7 1042 0 0 66 4 121 7 17 64 3 366 0 0 0 99 March 31, 2026 at 06:32:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 10 0 0 0 0 1 0 0 0 100 1 0 0 0 10 2 34 1 0 0 0 1092 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 3 218 102 10 0 1 0 0 300 0 0 0 100 4 0 0 3 314 105 108 0 1 2 0 294 0 0 0 100 5 0 0 7 108 50 102 1 1 0 0 648 0 0 0 100 6 0 0 14 9 2 4 1 0 0 0 266 0 0 0 100 7 18 0 0 18 6 12 0 0 0 0 8 0 0 0 100 March 31, 2026 at 06:32:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 221 0 9 122 0 0 0 1 0 99 1 7 0 0 59 1 133 1 6 109 0 1090 0 0 0 100 2 0 0 0 60 1 109 0 8 112 0 2 0 0 0 100 3 0 0 3 301 136 107 0 8 105 0 300 0 0 0 100 4 0 0 3 306 136 163 0 9 99 0 294 0 0 0 100 5 0 0 7 167 52 221 0 7 75 0 574 0 0 0 100 6 0 0 14 63 2 120 0 12 85 0 265 0 0 0 100 7 0 0 0 73 7 119 0 7 73 0 10 0 0 0 100 March 31, 2026 at 06:32:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 0 0 0 0 0 0 0 0 100 1 0 0 0 10 2 32 1 0 1 0 1087 0 0 0 100 2 0 0 0 16 3 14 0 0 1 0 13 0 0 0 100 3 0 0 3 216 102 10 0 0 1 0 300 0 0 0 100 4 0 0 3 216 104 6 0 0 2 0 294 0 0 0 100 5 0 0 7 126 60 122 0 1 2 0 602 0 0 0 100 6 0 0 14 18 5 18 0 1 1 0 283 0 0 0 100 7 0 0 0 22 7 16 0 0 1 0 8 0 0 0 100 March 31, 2026 at 06:32:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26506 0 51 2222 104 1000 43 173 118 59 4334 8 20 0 72 1 3413 0 121 467 3 883 24 114 104 52 4373 3 2 0 94 2 7702 0 14 470 19 828 16 110 214 58 3850 2 2 0 95 3 6490 0 48 489 104 887 25 136 122 49 3675 3 2 0 96 4 1511 0 201 663 111 902 29 118 126 54 3211 1 2 0 97 5 1972 0 29 436 24 652 13 85 72 41 2770 2 1 0 98 6 1270 0 199 374 10 649 14 83 66 30 2522 1 1 0 98 7 3268 0 6 396 6 584 16 72 101 31 3443 3 2 0 96 March 31, 2026 at 06:32:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 56 2107 101 110 0 3 5 0 9 0 1 0 99 1 0 0 7 29 4 46 1 3 6 0 1120 0 0 0 99 2 0 0 0 21 1 6 0 0 0 0 15 0 0 0 100 3 27 0 17 225 105 10 0 0 0 0 308 0 0 0 100 4 3 0 3 227 105 12 0 0 1 0 307 0 0 0 100 5 45 0 7 31 6 18 1 0 1 0 495 0 0 0 100 6 22 0 14 68 20 55 0 2 0 0 304 0 0 0 100 7 1 0 0 95 33 82 0 1 0 0 8 0 0 0 100 March 31, 2026 at 06:32:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2125 102 120 0 4 4 0 0 0 1 0 99 1 13 0 126 74 30 96 1 1 3 0 1096 0 1 0 99 2 0 0 0 30 1 8 0 2 0 0 2 0 0 0 100 3 0 0 3 228 102 2 0 0 0 0 300 0 0 0 100 4 0 0 3 232 104 4 0 0 2 0 294 0 0 0 100 5 0 0 7 40 8 16 0 0 7 0 651 0 0 0 100 6 0 0 14 29 2 6 0 0 2 0 266 0 0 0 100 7 0 0 0 79 23 51 0 2 2 0 1 0 0 0 100 March 31, 2026 at 06:32:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2141 101 200 0 8 76 0 0 0 1 0 99 1 0 0 1 119 16 164 0 11 91 0 1092 0 0 0 99 2 0 0 224 65 7 98 0 10 74 0 0 0 0 0 100 3 0 0 3 352 159 148 0 7 63 0 300 0 0 0 100 4 0 0 3 320 131 128 0 7 61 0 294 0 0 0 100 5 0 0 7 102 8 113 0 8 75 0 565 0 0 0 100 6 0 0 14 94 2 110 0 6 51 0 266 0 0 0 100 7 0 0 0 81 1 79 0 3 53 0 0 0 0 0 100 March 31, 2026 at 06:32:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37630 0 172 2268 106 987 37 153 93 62 5082 10 7 0 83 1 1410 0 12 279 42 1022 32 153 160 67 5417 3 2 0 96 2 11882 0 34 276 5 947 20 138 179 63 4224 4 4 0 93 3 5459 0 169 581 104 774 12 106 154 60 3758 2 2 0 97 4 1267 0 19 610 107 714 17 98 86 62 2434 1 1 0 98 5 1157 0 209 416 20 774 17 86 89 44 2544 1 1 0 98 6 1133 0 194 322 3 628 15 86 85 57 4337 1 1 0 98 7 423 0 10 161 2 714 13 91 79 60 2647 1 1 0 98 March 31, 2026 at 06:32:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 668 0 0 2138 118 127 4 21 35 5 318 0 1 0 99 1 286 0 0 71 15 118 2 9 26 2 1234 0 0 0 99 2 465 0 0 41 1 92 3 22 20 0 428 1 0 0 99 3 818 0 31 245 104 48 2 7 51 0 604 1 0 0 99 4 390 0 80 245 109 69 3 14 40 2 483 0 1 0 99 5 413 0 7 130 23 145 7 20 50 3 462 0 0 0 99 6 524 0 14 65 9 75 13 18 20 2 745 0 0 0 99 7 264 0 0 31 1 52 8 10 22 4 159 0 0 0 100 March 31, 2026 at 06:32:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 100 106 0 1 0 0 0 0 1 0 99 1 1 0 0 194 54 146 1 0 0 0 1093 0 1 0 99 2 0 0 0 82 1 4 0 0 0 0 2 0 0 0 100 3 0 0 3 285 102 6 0 1 0 0 300 0 0 0 100 4 0 0 45 283 104 8 0 0 3 0 294 0 1 0 99 5 0 0 469 16 2 8 0 0 2 0 308 0 0 0 99 6 1 0 14 94 9 20 0 0 1 0 588 0 0 0 100 7 0 0 0 79 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:32:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 110 0 0 0 0 22 0 0 0 100 1 0 0 0 121 54 146 0 0 0 0 1095 0 0 0 100 2 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 3 0 0 3 211 102 8 0 1 0 0 300 0 0 0 100 4 0 0 3 212 104 4 0 0 0 0 294 0 0 0 100 5 0 0 7 6 1 2 0 0 0 0 259 0 0 0 100 6 0 0 14 21 9 18 0 0 1 0 607 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 213 0 6 122 0 0 0 0 0 100 1 0 0 0 167 53 236 1 8 70 0 1093 0 0 0 100 2 0 0 0 69 1 128 0 10 84 0 2 0 0 0 100 3 0 0 3 290 137 102 0 7 75 0 300 0 0 0 100 4 0 0 3 310 139 149 0 8 61 0 294 0 0 0 100 5 0 0 7 80 2 145 1 8 69 0 260 0 0 0 100 6 0 0 14 86 10 142 1 10 59 0 570 0 0 0 100 7 0 0 0 50 2 87 0 4 78 0 0 0 0 0 100 March 31, 2026 at 06:33:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36949 0 402 2193 102 1139 38 171 139 75 3985 9 7 0 84 1 2676 0 135 583 9 1006 21 121 175 69 5594 2 2 0 96 2 4588 0 129 273 4 1006 18 127 145 69 5971 3 2 0 95 3 1638 0 70 558 108 988 14 127 95 63 4347 2 1 0 96 4 2664 0 39 458 112 1032 19 122 161 52 3332 2 2 0 96 5 7680 0 37 472 12 832 13 95 147 39 3711 2 2 0 96 6 6056 0 26 273 14 658 11 85 140 50 3290 2 1 0 96 7 1683 0 11 370 36 765 16 72 71 50 2471 2 1 0 97 March 31, 2026 at 06:33:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2105 100 86 0 1 6 0 0 0 1 0 99 1 0 0 0 22 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 24 2 36 0 0 0 0 1113 0 0 0 100 3 0 0 3 325 140 108 0 2 0 0 300 0 0 0 100 4 0 0 3 227 104 12 0 1 0 0 294 0 0 0 100 5 0 0 7 20 1 6 0 0 6 0 262 0 0 0 100 6 46 0 21 34 9 20 0 1 1 0 598 0 0 0 100 7 0 0 0 47 13 28 0 2 0 0 0 0 0 0 100 March 31, 2026 at 06:33:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2170 100 48 0 1 2 0 0 0 1 0 99 1 0 0 0 81 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 81 1 34 1 0 1 0 1103 0 0 0 100 3 0 0 1 384 121 107 0 1 0 0 300 0 0 0 100 4 0 0 5 347 134 68 0 1 1 0 294 0 0 0 100 5 0 0 469 14 1 6 0 1 3 0 259 0 0 0 100 6 0 0 14 95 9 20 0 0 1 0 544 0 0 0 100 7 0 0 0 80 1 4 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:33:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 92 0 0 0 0 0 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 36 1 0 0 0 1103 0 0 0 100 3 0 0 3 229 102 22 0 1 0 0 300 0 0 0 100 4 0 0 3 314 154 106 0 1 1 0 294 0 0 0 100 5 0 0 7 7 1 4 0 0 0 0 259 0 0 0 100 6 0 0 14 21 9 18 1 0 0 0 590 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:33:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2175 0 34 2234 105 1146 33 188 193 68 4182 3 2 0 95 1 2368 0 185 232 30 1012 30 150 199 72 3332 2 1 0 96 2 37106 0 321 254 2 834 29 119 156 71 5932 10 7 0 84 3 5147 0 79 524 131 835 14 139 214 55 3757 3 2 0 95 4 1121 0 22 552 152 949 18 128 196 60 3497 1 2 0 97 5 1227 0 28 274 3 804 13 113 203 55 2727 1 1 0 97 6 8570 0 27 442 10 756 22 107 210 49 3790 2 2 0 95 7 6448 0 139 344 3 705 15 97 231 50 3239 2 2 0 97 March 31, 2026 at 06:33:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 70 2115 103 126 1 2 6 0 20 0 1 0 99 1 51 0 6 135 56 120 0 3 0 0 17 0 0 0 100 2 0 0 0 32 3 44 1 0 1 0 1119 0 0 0 100 3 1 0 17 224 102 10 0 1 0 0 321 0 0 0 100 4 0 0 3 232 104 12 1 3 3 0 309 0 0 0 100 5 26 0 7 41 8 24 1 0 7 0 282 0 0 0 100 6 5 0 14 39 5 30 0 2 1 0 665 0 0 0 100 7 0 0 7 30 1 8 0 1 0 0 1 0 0 0 100 March 31, 2026 at 06:33:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2155 101 51 0 2 3 0 0 0 1 0 99 1 0 0 0 179 25 118 0 1 0 0 10 0 0 0 100 2 0 0 0 132 35 102 1 1 0 0 1095 0 0 0 100 3 0 0 3 266 102 6 0 1 0 0 300 0 0 0 100 4 0 0 3 271 106 8 0 0 0 0 296 0 0 0 100 5 0 0 357 14 1 6 0 0 3 0 262 0 0 0 100 6 0 0 14 68 4 8 0 0 0 0 534 0 0 0 100 7 0 0 0 63 0 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2105 101 87 0 0 0 0 0 0 0 0 100 1 0 0 0 64 7 40 0 0 0 0 8 0 0 0 100 2 0 0 0 125 51 133 1 1 1 0 1092 0 0 0 100 3 0 0 3 228 102 8 0 1 0 0 302 0 0 0 100 4 0 0 3 228 104 4 0 0 0 0 294 0 0 0 100 5 0 0 7 25 2 4 0 0 0 0 260 0 0 0 100 6 0 0 14 27 3 8 0 1 0 0 556 0 0 0 100 7 0 0 0 25 0 8 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:33:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7284 0 145 2274 103 1083 33 174 199 64 4541 3 3 0 94 1 2674 0 208 333 13 997 23 172 140 75 4273 3 2 0 95 2 641 0 19 256 37 1027 21 147 74 66 4613 2 2 0 96 3 2578 0 78 700 108 935 19 96 124 70 3229 2 1 0 96 4 2137 0 19 657 109 788 19 116 79 69 4544 2 1 0 96 5 34459 0 22 211 5 686 17 95 125 46 3112 7 6 0 87 6 8831 0 139 406 4 786 15 98 181 54 4944 3 2 0 94 7 5319 0 201 402 0 832 16 107 124 64 3298 3 2 0 96 March 31, 2026 at 06:33:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 70 2111 106 219 0 10 116 0 4 0 1 0 99 1 0 0 0 105 10 150 0 9 71 0 15 0 0 0 100 2 49 0 0 130 26 192 1 10 81 0 1131 0 0 0 99 3 0 0 17 356 158 158 0 7 109 0 303 0 0 0 100 4 23 0 3 317 135 126 0 6 72 0 302 0 0 0 100 5 0 0 7 83 2 129 1 10 76 0 268 0 0 0 100 6 50 0 14 95 6 140 0 9 79 0 466 0 0 0 100 7 7 0 7 78 1 115 0 8 80 0 19 0 0 0 100 March 31, 2026 at 06:33:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2171 101 126 0 1 3 0 0 0 1 0 99 1 0 0 462 24 3 16 0 1 4 0 0 0 0 0 100 2 0 0 0 100 9 54 1 0 2 0 1128 0 1 0 99 3 0 0 3 383 152 106 0 1 1 0 300 0 0 0 99 4 0 0 3 284 104 4 0 0 2 0 294 0 0 0 100 5 9 0 7 102 12 18 0 0 1 0 315 0 0 0 100 6 0 0 16 89 4 18 0 0 5 0 606 0 0 0 100 7 0 0 0 84 1 4 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:33:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 48 0 1 0 0 0 0 0 0 100 1 0 0 0 12 2 6 0 1 0 0 0 0 0 0 100 2 0 0 0 21 6 50 0 1 0 0 1112 0 0 0 100 3 0 0 3 311 128 107 0 3 0 0 300 0 0 0 100 4 0 0 3 213 104 6 0 1 0 0 296 0 0 0 100 5 2 0 7 7 1 2 0 0 0 0 261 0 0 0 100 6 0 0 14 72 27 68 0 2 1 0 586 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2548 0 18 2187 103 478 10 79 97 38 3336 1 1 0 97 1 32736 0 13 279 5 440 9 67 62 49 1844 6 4 0 90 2 1686 0 199 253 12 454 10 61 63 44 3876 2 1 0 97 3 1125 0 161 519 106 500 10 60 63 56 2262 1 2 0 98 4 3134 0 46 441 125 458 6 63 67 46 2036 2 1 0 97 5 1168 0 126 189 2 407 7 57 51 60 2354 1 1 0 99 6 265 0 27 183 23 441 11 61 86 51 2063 1 1 0 99 7 6644 0 7 138 1 390 6 55 124 50 2337 1 2 0 97 March 31, 2026 at 06:33:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3229 0 2 2163 108 699 25 110 116 16 2604 2 2 0 97 1 1550 0 7 99 16 732 40 123 47 19 2493 2 3 0 95 2 1053 0 7 315 2 668 30 89 76 19 3031 2 1 0 97 3 1358 0 33 551 115 489 24 76 41 18 2097 1 1 0 98 4 1607 0 72 291 119 622 19 83 72 17 2589 2 1 0 97 5 1631 0 19 260 15 442 6 48 33 5 1612 2 0 0 97 6 1079 0 17 57 3 464 11 60 83 18 1780 1 1 0 98 7 3113 0 179 41 2 502 12 68 61 26 1748 1 1 0 98 March 31, 2026 at 06:33:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2193 106 203 0 4 109 0 8 0 1 0 99 1 0 0 468 77 3 120 0 6 79 0 0 0 0 0 100 2 0 0 0 128 2 125 1 5 92 0 1093 0 1 0 99 3 0 0 3 459 178 207 0 7 89 0 300 0 0 0 100 4 0 0 3 370 130 126 0 10 73 0 294 0 0 0 100 5 0 0 7 129 3 99 0 5 68 0 262 0 0 0 100 6 2 0 14 132 2 112 0 10 64 0 640 0 0 0 100 7 0 0 0 121 0 88 0 5 50 0 0 0 0 0 100 March 31, 2026 at 06:33:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 107 126 0 0 0 0 9 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 1 40 0 0 0 0 1104 0 0 0 100 3 0 0 3 309 151 106 0 0 0 0 300 0 0 0 100 4 0 0 3 214 105 6 0 0 0 0 294 0 0 0 100 5 0 0 7 28 12 20 0 0 1 0 270 0 0 0 100 6 0 0 14 14 3 18 0 0 4 0 619 0 0 0 100 7 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 60 0 1 0 0 9 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 8 1 32 1 0 0 0 1095 0 0 0 100 3 0 0 3 310 121 107 0 1 0 0 299 0 0 0 100 4 0 0 3 281 137 74 0 1 3 0 296 0 0 0 100 5 0 0 7 8 1 6 0 1 0 0 259 0 0 0 100 6 0 0 14 8 2 4 2 0 3 0 528 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8712 0 149 2285 109 1061 31 152 206 73 5876 4 3 0 93 1 35839 0 219 285 4 1082 44 161 123 63 4420 8 7 0 84 2 4128 0 17 567 5 906 19 109 135 63 4122 2 2 0 96 3 2256 0 188 432 104 1130 20 133 118 89 5451 3 2 0 95 4 990 0 15 708 118 867 13 102 108 56 3064 1 1 0 98 5 1225 0 200 257 9 977 14 101 70 50 3322 2 1 0 97 6 640 0 26 254 6 757 20 105 119 54 2866 2 1 0 97 7 10214 0 26 314 32 898 11 95 191 54 4557 3 3 0 94 March 31, 2026 at 06:33:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 102 108 0 1 0 0 1 0 0 0 100 1 0 0 0 27 4 10 0 1 0 0 22 0 0 0 100 2 0 0 0 22 1 36 0 0 5 0 1111 0 0 0 100 3 0 0 3 225 102 8 0 1 0 0 300 0 0 0 100 4 0 0 10 230 104 11 0 2 3 0 294 0 0 0 100 5 0 0 7 21 2 4 1 0 0 0 262 0 0 0 100 6 2 0 14 19 2 6 0 0 3 0 574 0 0 0 100 7 44 0 70 120 56 114 0 1 5 0 9 0 0 0 99 March 31, 2026 at 06:33:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2182 101 195 0 6 102 0 0 0 1 0 99 1 0 0 0 139 3 114 0 4 62 0 2 0 0 0 100 2 0 0 462 61 1 124 1 7 76 0 1098 0 1 0 99 3 0 0 2 354 127 98 0 4 81 0 300 0 0 0 100 4 0 0 4 367 130 115 0 7 77 0 294 0 0 0 100 5 0 0 7 129 4 105 0 8 66 0 260 0 0 0 100 6 0 0 14 128 3 102 0 3 66 0 571 0 0 0 100 7 0 0 42 237 56 215 0 4 61 0 9 0 1 0 99 March 31, 2026 at 06:33:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 114 46 0 2 0 0 0 0 0 0 100 1 0 0 0 14 4 6 0 0 1 0 0 0 0 0 100 2 0 0 0 19 3 44 1 0 2 0 1110 0 0 0 100 3 0 0 7 313 104 108 0 4 1 0 300 0 0 0 100 4 0 0 7 212 103 4 0 1 1 0 294 0 0 0 100 5 0 0 7 27 11 20 0 0 1 0 276 0 0 0 100 6 0 0 14 16 3 14 1 0 1 0 573 0 0 0 100 7 0 0 0 94 40 84 0 2 1 0 8 0 0 0 100 March 31, 2026 at 06:33:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6413 0 30 2280 140 1135 30 149 165 59 5187 5 4 0 92 1 7143 0 152 607 5 1051 21 118 139 68 3212 3 2 0 94 2 1672 0 10 458 11 919 13 105 122 76 7391 2 2 0 97 3 2060 0 239 694 104 955 12 101 99 71 3263 2 2 0 97 4 973 0 21 668 106 866 15 95 112 67 3163 2 1 0 98 5 3454 0 43 335 4 885 17 92 87 53 3172 2 1 0 96 6 34885 0 360 231 3 675 20 82 122 58 3802 7 6 0 86 7 7115 0 29 475 6 796 17 79 173 56 4156 2 2 0 96 March 31, 2026 at 06:33:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 122 119 0 3 0 0 15 0 0 0 100 1 1 0 77 79 32 74 0 3 6 0 16 0 1 0 99 2 0 0 7 33 3 52 0 1 5 0 1104 0 0 0 99 3 0 0 17 228 102 14 0 2 2 0 313 0 0 0 100 4 0 0 3 270 103 48 0 0 1 0 310 0 0 0 100 5 103 0 7 47 10 33 1 4 0 0 281 0 0 0 100 6 0 0 0 26 1 4 0 0 0 0 188 0 0 0 100 7 7 0 21 26 2 6 0 1 0 0 279 0 0 0 100 March 31, 2026 at 06:33:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 100 118 0 1 0 0 0 0 0 0 100 1 0 0 7 146 53 108 0 0 3 0 0 0 0 0 100 2 0 0 231 13 1 38 1 1 3 0 1088 0 0 0 99 3 0 0 3 247 102 6 0 0 0 0 300 0 0 0 100 4 0 0 3 244 103 2 0 0 0 0 294 0 0 0 100 5 0 0 7 60 9 22 0 0 1 0 271 0 0 0 100 6 0 0 0 43 2 4 0 0 2 0 323 0 0 0 100 7 0 0 14 43 2 6 0 1 0 0 267 0 0 0 100 March 31, 2026 at 06:33:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 100 239 0 12 128 0 0 0 1 0 99 1 0 0 14 196 53 218 0 6 84 0 0 0 0 0 100 2 0 0 224 57 1 116 1 6 72 0 1088 0 1 0 99 3 0 0 3 316 138 97 0 7 89 0 300 0 0 0 100 4 0 0 3 335 136 121 0 8 57 0 294 0 0 0 100 5 0 0 7 102 7 116 0 10 69 0 266 0 0 0 100 6 0 0 0 114 1 149 1 11 100 0 257 0 0 0 100 7 0 0 14 107 2 142 0 10 75 0 266 0 0 0 100 March 31, 2026 at 06:33:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13268 0 394 2193 106 1005 29 140 245 69 8194 5 5 0 90 1 5619 0 45 384 26 1135 33 159 169 72 4600 2 2 0 96 2 2014 0 10 209 16 1070 23 150 114 75 4744 3 2 0 96 3 35814 0 191 532 105 855 23 107 87 52 3634 8 6 0 85 4 3252 0 19 436 104 957 24 118 109 50 3384 2 1 0 96 5 2042 0 129 469 17 883 8 92 84 69 2977 2 1 0 97 6 1052 0 21 444 13 833 13 86 95 47 2916 1 2 0 97 7 816 0 27 155 1 858 12 105 128 58 3095 1 1 0 97 March 31, 2026 at 06:33:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 137 134 0 4 0 0 10 0 0 0 100 1 9 0 70 115 17 110 0 2 5 0 11 0 1 0 99 2 1 0 7 38 4 50 1 4 6 0 1121 0 0 0 100 3 0 0 19 228 104 10 0 1 0 0 316 0 0 0 100 4 1 0 1 231 105 10 0 0 0 0 314 0 0 0 100 5 77 0 7 44 10 28 1 3 1 0 284 0 0 0 100 6 0 0 0 25 1 3 0 1 0 0 196 0 0 0 100 7 14 0 14 26 3 10 1 2 1 0 316 0 0 0 100 March 31, 2026 at 06:33:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 100 112 0 0 0 0 0 0 1 0 99 1 0 0 42 183 55 112 0 1 2 0 2 0 1 0 99 2 0 0 462 19 2 38 0 0 2 0 1092 0 1 0 99 3 0 0 3 283 102 6 0 1 0 0 300 0 0 0 100 4 0 0 3 288 106 8 0 0 0 0 297 0 0 0 100 5 0 0 7 94 9 18 0 0 0 0 271 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 293 0 0 0 100 7 2 0 14 77 1 2 0 0 0 0 294 0 0 0 100 March 31, 2026 at 06:33:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 118 0 0 0 0 1 0 0 0 100 1 0 0 0 119 54 118 0 1 0 0 1 0 0 0 100 2 0 0 0 8 1 32 1 0 0 0 1090 0 0 0 100 3 0 0 3 210 102 6 0 0 0 0 300 0 0 0 100 4 0 0 3 210 103 2 0 0 2 0 294 0 0 0 100 5 0 0 7 20 8 16 0 0 0 0 267 0 0 0 100 6 0 0 0 8 1 2 1 0 3 0 287 0 0 0 100 7 1 0 14 5 1 2 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:33:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7098 0 39 2188 100 737 12 102 268 46 2500 1 3 0 96 1 2766 0 25 307 52 609 8 74 179 47 2023 1 1 0 97 2 8683 0 243 295 3 608 11 69 183 48 5641 2 2 0 96 3 399 0 52 456 153 667 6 100 215 72 2224 1 1 0 98 4 1031 0 199 560 156 565 4 66 158 55 1555 0 1 0 98 5 544 0 25 289 11 553 4 61 148 50 1513 1 1 0 98 6 2271 0 14 340 1 427 5 49 116 33 1548 1 1 0 98 7 462 0 23 322 3 566 8 66 183 36 1391 0 1 0 99 March 31, 2026 at 06:33:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4153 0 72 2146 104 737 19 91 106 20 2322 2 2 0 96 1 3339 0 2 81 9 715 15 69 116 13 2589 2 1 0 96 2 27767 0 7 70 4 532 13 65 54 10 3577 6 5 0 88 3 372 0 35 273 106 526 12 50 50 9 2123 1 1 0 98 4 1598 0 14 555 116 484 6 41 53 13 1605 2 1 0 97 5 1169 0 8 293 13 512 6 40 57 12 1885 1 1 0 98 6 1059 0 178 104 34 542 8 47 34 18 1875 1 1 0 98 7 910 0 26 55 3 501 10 45 47 11 1635 1 1 0 98 March 31, 2026 at 06:33:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2170 100 112 0 0 5 0 0 0 1 0 99 1 0 0 462 22 3 12 0 0 5 0 0 0 0 0 100 2 0 0 0 91 2 46 1 0 1 0 1092 0 0 0 99 3 0 0 3 281 102 4 0 0 0 0 300 0 0 0 100 4 0 0 3 292 104 10 0 1 0 0 295 0 0 0 100 5 0 0 7 83 3 8 0 1 0 0 262 0 0 0 100 6 0 0 0 181 51 102 0 0 1 0 291 0 0 0 100 7 46 0 14 89 7 14 0 0 0 0 275 0 0 0 100 March 31, 2026 at 06:33:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 2 0 0 0 16 1 44 0 0 0 0 1089 0 0 0 100 3 0 0 3 209 102 4 0 0 0 0 300 0 0 0 100 4 0 0 3 210 103 2 0 0 1 0 294 0 0 0 100 5 5 0 7 10 3 6 0 0 0 0 259 0 0 0 100 6 0 0 0 108 51 102 1 0 0 0 307 0 0 0 100 7 0 0 14 17 7 14 0 0 0 0 275 0 0 0 100 March 31, 2026 at 06:33:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 11 3 6 0 0 0 0 0 0 0 0 100 2 0 0 0 12 2 36 1 0 1 0 1094 0 0 0 100 3 0 0 3 209 102 4 0 0 0 0 300 0 0 0 100 4 0 0 3 210 103 2 0 0 1 0 294 0 0 0 100 5 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 6 0 0 0 110 52 106 0 0 4 0 311 0 0 0 100 7 0 0 14 17 7 14 0 0 0 0 276 0 0 0 100 March 31, 2026 at 06:33:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3206 0 39 2256 104 1362 50 220 267 53 4817 2 2 0 95 1 37024 0 261 321 7 1090 54 173 202 51 5095 8 7 0 85 2 5378 0 20 621 7 1010 32 142 236 56 4542 2 2 0 96 3 3196 0 88 756 135 938 24 141 180 76 5195 2 2 0 95 4 5817 0 138 553 135 981 37 136 205 42 3454 3 2 0 95 5 2830 0 393 205 7 1079 26 143 196 68 4510 3 2 0 95 6 2625 0 21 591 41 924 26 125 211 60 3581 2 1 0 96 7 3655 0 49 503 8 812 20 123 138 51 3343 3 2 0 95 March 31, 2026 at 06:33:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2115 101 118 1 1 0 0 268 0 0 0 100 1 0 0 0 56 18 38 0 1 6 0 0 0 0 0 100 2 1 0 0 29 3 46 0 0 0 0 1121 0 0 0 100 3 0 0 3 221 102 2 0 0 0 0 300 0 0 0 100 4 0 0 3 232 106 18 0 0 2 0 318 0 0 0 100 5 44 0 70 32 13 20 0 1 7 0 9 0 1 0 99 6 0 0 7 67 21 62 0 1 2 0 536 0 0 0 100 7 0 0 7 55 16 40 0 4 0 0 0 0 0 0 100 March 31, 2026 at 06:33:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2180 103 36 0 3 0 0 266 0 1 0 99 1 0 0 462 38 13 26 0 0 1 0 0 0 0 0 100 2 0 0 0 158 37 110 1 4 0 0 1118 0 0 0 99 3 0 0 46 363 104 94 0 6 0 0 300 0 0 0 100 4 0 0 2 300 110 18 0 2 2 0 295 0 0 0 100 5 0 0 0 97 8 20 0 1 1 0 9 0 0 0 100 6 0 0 7 84 3 8 1 1 2 0 543 0 0 0 100 7 0 0 0 80 0 4 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:33:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2102 101 134 0 1 0 0 266 0 0 0 100 1 0 0 0 14 4 8 0 0 0 0 2 0 0 0 100 2 0 0 0 10 2 34 1 0 0 0 1094 0 0 0 100 3 0 0 3 208 102 2 0 0 0 0 300 0 0 0 100 4 0 0 3 310 153 102 0 0 2 0 294 0 0 0 100 5 0 0 0 18 6 14 0 0 0 0 8 0 0 0 100 6 0 0 7 12 4 8 0 0 0 0 585 0 0 0 100 7 0 0 0 7 0 2 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:33:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4243 0 167 2283 105 1128 42 151 106 54 4271 3 2 0 95 1 34765 0 16 263 8 873 28 137 93 56 5005 8 6 0 86 2 898 0 15 178 6 913 20 120 136 40 4327 2 2 0 96 3 6094 0 256 414 110 939 21 120 155 48 4654 2 3 0 95 4 11130 0 339 575 131 1074 21 117 209 61 3960 3 3 0 94 5 3902 0 14 328 16 921 14 98 171 74 3445 2 2 0 96 6 1448 0 19 478 5 898 11 84 102 72 4459 2 1 0 97 7 1177 0 18 377 0 692 11 85 92 46 3354 1 1 0 98 March 31, 2026 at 06:33:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 84 2112 103 119 1 8 140 0 291 0 1 0 99 1 1 0 7 88 2 130 0 6 70 0 1 0 0 0 100 2 0 0 0 79 4 141 0 5 107 0 1108 0 0 0 100 3 65 0 17 408 135 236 0 9 73 0 331 0 0 0 100 4 2 0 3 296 130 102 0 8 79 0 303 0 0 0 100 5 0 0 0 179 52 211 0 10 79 0 16 0 0 0 100 6 0 0 7 70 7 87 0 7 61 0 546 0 0 0 100 7 2 0 0 64 1 89 0 7 63 0 12 0 0 0 100 March 31, 2026 at 06:33:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 56 2171 101 12 0 0 4 0 266 0 1 0 99 1 0 0 462 24 2 12 0 2 5 0 0 0 0 0 100 2 1 0 0 95 3 54 1 2 2 0 1107 0 0 0 99 3 0 0 7 396 109 118 0 0 1 0 310 0 0 0 100 4 0 0 7 294 104 20 0 0 3 0 311 0 0 0 100 5 0 0 0 197 59 110 0 0 1 0 0 0 0 0 100 6 0 0 7 97 7 22 1 0 5 0 575 0 0 0 100 7 0 0 0 84 1 2 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:33:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2102 101 8 0 0 0 0 266 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 14 3 38 1 1 2 0 1095 0 0 0 100 3 0 0 3 318 107 112 0 0 0 0 308 0 0 0 100 4 0 0 3 214 104 8 0 1 2 0 294 0 0 0 100 5 0 0 0 114 50 110 0 0 0 0 0 0 0 0 100 6 0 0 7 14 4 8 0 0 2 0 533 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35326 0 148 2207 104 1149 25 169 109 77 4635 8 7 0 85 1 2580 0 132 469 1 946 24 131 117 67 3594 2 2 0 96 2 4107 0 28 298 3 888 17 115 145 57 5168 4 2 0 95 3 1143 0 233 587 110 752 17 104 116 49 3418 1 1 0 97 4 10159 0 195 601 105 823 32 108 209 66 3860 3 3 0 94 5 6733 0 41 578 20 923 15 90 166 57 5809 3 2 0 94 6 2088 0 14 213 23 867 24 119 101 70 3950 2 1 0 97 7 2007 0 33 385 10 742 23 107 119 57 2621 2 1 0 96 March 31, 2026 at 06:33:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 14 2125 109 129 2 3 0 0 310 0 0 0 100 1 21 0 0 118 47 102 0 2 6 0 19 0 0 0 100 2 3 0 7 29 3 42 1 1 1 0 1119 0 0 0 100 3 19 0 16 222 102 5 0 2 0 0 311 0 0 0 100 4 51 0 4 243 109 30 0 1 2 0 319 0 0 0 100 5 0 0 70 34 4 30 0 5 6 0 4 0 1 0 99 6 0 0 7 37 7 18 0 1 2 0 419 0 0 0 100 7 0 0 0 27 2 2 1 0 0 0 1 0 0 0 100 March 31, 2026 at 06:33:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 56 2174 101 144 0 9 77 0 266 0 1 0 99 1 0 0 462 174 20 222 0 8 75 0 0 0 1 0 99 2 0 0 0 145 2 159 0 7 72 0 1093 0 0 0 99 3 0 0 3 347 133 90 0 8 66 0 300 0 0 0 100 4 0 0 3 373 140 114 0 12 83 0 304 0 0 0 100 5 0 0 0 128 1 96 0 9 58 0 0 0 0 0 100 6 0 0 7 201 35 180 1 11 61 0 590 0 0 0 100 7 0 0 0 117 0 80 0 4 38 0 0 0 0 0 100 March 31, 2026 at 06:33:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 110 0 1 0 0 266 0 0 0 100 1 0 0 0 15 2 8 0 2 0 0 0 0 0 0 100 2 0 0 0 16 3 44 1 0 1 0 1107 0 0 0 100 3 0 0 3 208 102 2 0 0 0 0 300 0 0 0 100 4 0 0 3 227 109 24 0 0 3 0 317 0 0 0 100 5 0 0 0 14 6 6 0 0 0 0 0 0 0 0 100 6 0 0 7 53 21 54 0 2 2 0 576 0 0 0 100 7 0 0 0 71 31 68 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:33:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38 0 34 2107 101 150 0 11 8 10 320 0 1 0 99 1 3 0 2 19 1 22 0 5 9 5 51 0 0 0 100 2 132 0 0 23 2 66 1 6 20 5 1142 0 0 0 100 3 11 0 10 215 102 14 0 2 6 1 324 0 0 0 100 4 298 0 3 243 111 41 3 4 25 1 425 0 0 0 100 5 5 0 0 22 2 17 2 3 4 1 17 0 0 0 100 6 4 0 10 28 4 29 2 4 8 3 622 0 0 0 100 7 28 0 7 123 50 130 0 4 2 5 31 0 1 0 99 March 31, 2026 at 06:33:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3157 0 396 2198 113 1091 27 153 97 64 4934 3 3 0 94 1 34069 0 11 378 37 1096 28 149 96 58 4696 7 6 0 86 2 9066 0 36 329 6 999 20 122 173 46 5680 3 3 0 94 3 6162 0 244 671 104 911 12 115 183 77 5666 2 2 0 96 4 7597 0 151 744 106 860 15 99 141 45 4523 3 2 0 94 5 1674 0 16 302 3 954 19 123 99 62 3760 2 1 0 97 6 604 0 10 443 6 764 10 92 83 40 2846 2 1 0 97 7 1219 0 3 260 8 806 9 97 68 41 2906 2 1 0 97 March 31, 2026 at 06:33:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 28 2182 108 131 1 1 2 0 277 0 1 0 99 1 0 0 462 41 13 34 0 2 2 0 0 0 0 0 100 2 0 0 0 158 42 116 0 1 1 0 1101 0 0 0 99 3 0 0 3 276 102 3 0 0 3 0 19 0 0 0 100 4 0 0 3 285 104 8 0 0 5 0 294 0 0 0 100 5 0 0 0 78 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 84 4 10 0 0 4 0 415 0 0 0 100 7 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2122 107 223 0 9 76 0 276 0 1 0 99 1 0 0 0 75 1 133 0 13 61 0 0 0 0 0 100 2 0 0 0 116 19 203 1 8 97 0 1107 0 0 0 100 3 0 0 3 350 163 157 0 9 76 0 583 0 0 0 100 4 0 0 3 289 129 94 0 6 91 0 295 0 0 0 100 5 0 0 0 57 1 97 0 1 93 0 0 0 0 0 100 6 0 0 7 51 4 76 1 3 46 0 681 0 0 0 100 7 0 0 0 55 0 90 0 10 41 0 0 0 0 0 100 March 31, 2026 at 06:33:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 106 128 0 1 0 0 274 0 0 0 100 1 0 0 0 18 2 14 0 0 1 0 0 0 0 0 100 2 0 0 0 16 3 42 1 0 2 0 1114 0 0 0 100 3 0 0 3 254 122 45 0 1 1 0 301 0 0 0 100 4 0 0 3 279 135 76 0 1 2 0 311 0 0 0 100 5 0 0 0 17 7 7 0 1 1 0 0 0 0 0 100 6 0 0 7 21 5 22 0 0 2 0 614 0 0 0 100 7 0 0 0 12 1 2 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:33:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1827 0 35 2253 112 1216 25 191 130 76 4402 2 2 0 96 1 1845 0 10 504 9 896 11 141 117 61 2997 2 1 0 97 2 34466 0 31 325 24 829 24 132 102 40 5000 8 7 0 85 3 1054 0 56 371 105 876 19 129 92 68 4449 1 1 0 98 4 4155 0 224 663 120 765 21 100 120 44 2785 3 2 0 96 5 11164 0 246 248 2 833 14 100 259 84 4652 3 3 0 94 6 6959 0 37 456 7 757 17 102 183 63 5101 3 2 0 95 7 2420 0 204 464 9 918 21 101 108 77 3356 3 1 0 95 March 31, 2026 at 06:33:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 14 2115 101 20 0 1 0 0 284 0 0 0 99 1 29 0 0 32 3 20 0 1 6 0 30 0 0 0 100 2 0 0 0 129 51 114 0 2 0 0 13 0 0 0 100 3 26 0 17 322 103 136 1 2 1 0 1415 0 0 0 99 4 2 0 73 219 103 8 0 1 12 0 303 0 1 0 99 5 6 0 7 32 1 17 0 4 0 0 22 0 0 0 100 6 0 0 7 33 5 18 1 2 2 0 537 0 0 0 100 7 44 0 0 34 5 19 0 2 0 0 24 0 0 0 100 March 31, 2026 at 06:33:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2159 101 14 0 1 0 0 266 0 1 0 99 1 0 0 350 16 1 6 0 0 4 0 0 0 0 0 100 2 0 0 0 105 20 42 0 2 1 0 0 0 0 0 100 3 0 0 3 369 106 141 1 4 1 0 1393 0 0 0 100 4 0 0 38 323 132 67 0 3 9 0 296 0 1 0 99 5 0 0 0 70 2 9 0 1 0 0 0 0 0 0 100 6 0 0 7 69 4 10 1 1 2 0 554 0 0 0 100 7 0 0 0 74 7 14 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:33:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2125 102 114 0 7 77 0 266 0 1 0 99 1 0 0 0 95 1 141 0 8 70 0 0 0 0 0 100 2 0 0 0 84 1 120 0 9 74 0 0 0 0 0 100 3 0 0 3 373 137 215 0 8 91 0 1394 0 0 0 99 4 0 0 115 396 162 206 0 11 85 0 294 0 0 0 100 5 0 0 0 129 26 155 0 9 79 0 0 0 0 0 100 6 0 0 7 70 4 96 0 5 60 0 563 0 0 0 100 7 0 0 0 91 5 131 0 8 76 0 8 0 0 0 100 March 31, 2026 at 06:33:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3214 0 334 2203 101 1135 30 183 92 69 4203 3 3 0 95 1 4288 0 45 323 5 1052 17 150 126 62 3367 4 2 0 95 2 5254 0 13 184 7 912 20 142 124 65 3769 3 2 0 95 3 4427 0 47 633 103 787 19 93 139 56 6503 2 2 0 96 4 35072 0 147 383 110 1050 36 141 136 74 4562 8 7 0 86 5 6289 0 202 526 45 1106 18 104 151 62 4506 3 3 0 95 6 2762 0 35 416 8 813 19 105 151 68 3491 2 2 0 97 7 2210 0 21 458 8 655 18 85 60 51 3366 2 1 0 98 March 31, 2026 at 06:33:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 14 2119 102 114 0 1 0 0 286 0 0 0 100 1 0 0 70 28 4 21 0 1 6 0 18 0 1 0 99 2 0 0 0 25 2 4 0 1 0 0 1 0 0 0 100 3 0 0 17 226 103 38 1 0 1 0 1417 0 0 0 100 4 9 0 3 238 104 24 0 1 7 0 315 0 0 0 100 5 2 0 0 129 53 114 0 1 0 0 16 0 0 0 100 6 6 0 7 35 6 19 1 3 2 0 487 0 0 0 100 7 69 0 7 41 9 32 0 3 0 0 36 0 0 0 100 March 31, 2026 at 06:33:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2176 101 12 0 1 0 0 266 0 1 0 99 1 0 0 42 90 4 20 0 0 1 0 2 0 0 0 100 2 0 0 0 80 1 4 0 1 0 0 0 0 0 0 100 3 0 0 3 382 103 134 1 2 1 0 1393 0 0 0 99 4 0 0 465 220 104 6 0 0 3 0 296 0 0 0 100 5 0 0 0 178 50 102 0 0 0 0 0 0 0 0 100 6 0 0 7 85 4 8 1 0 1 0 562 0 0 0 100 7 0 0 0 92 6 14 0 0 0 0 9 0 0 0 100 March 31, 2026 at 06:33:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 12 0 0 2 0 267 0 0 0 100 1 0 0 0 19 3 14 0 0 0 0 21 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 3 0 0 3 309 103 134 0 0 1 0 1395 0 0 0 100 4 0 0 3 215 103 12 0 0 2 0 294 0 0 0 100 5 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 6 0 0 7 12 4 8 0 0 5 0 580 0 0 0 100 7 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 March 31, 2026 at 06:34:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 638 0 34 2202 102 636 7 93 168 73 2850 1 1 0 98 1 34679 0 206 332 1 557 21 85 138 47 2781 7 6 0 86 2 2935 0 11 323 3 533 7 68 138 53 2589 1 2 0 98 3 2389 0 51 609 127 592 6 72 190 29 3031 1 2 0 97 4 7507 0 139 487 129 456 7 64 186 44 4187 2 2 0 96 5 2605 0 19 354 44 553 3 69 172 45 2016 1 1 0 98 6 917 0 139 172 6 488 9 65 113 48 1960 1 1 0 98 7 2797 0 28 320 15 437 3 72 142 47 1401 2 1 0 97 March 31, 2026 at 06:34:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 937 0 84 2160 107 687 26 101 64 16 2099 2 2 0 96 1 781 0 0 70 4 412 19 71 54 5 1472 1 1 0 98 2 2000 0 183 141 48 633 14 64 64 14 2522 2 1 0 97 3 693 0 35 420 106 414 14 53 34 16 2740 1 1 0 98 4 1102 0 8 359 105 287 7 39 32 14 1291 1 1 0 99 5 3028 0 12 286 11 379 13 42 33 13 1001 2 1 0 97 6 514 0 7 68 6 497 8 44 38 17 2215 2 0 0 98 7 835 0 7 76 6 515 17 56 52 16 1865 1 1 0 99 March 31, 2026 at 06:34:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 56 2181 107 112 0 1 3 0 277 0 1 0 99 1 0 0 0 78 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 181 52 104 0 0 0 0 0 0 0 0 100 3 1 0 3 285 104 36 1 0 0 0 1396 0 0 0 100 4 0 0 3 291 103 12 0 0 1 0 2 0 0 0 100 5 0 0 462 13 0 4 0 0 2 0 0 0 0 0 100 6 0 0 7 104 4 28 1 1 0 0 593 0 0 0 100 7 0 0 0 82 1 4 0 0 1 0 294 0 0 0 100 March 31, 2026 at 06:34:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 106 110 0 0 1 0 274 0 0 0 100 1 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 30 11 24 0 1 0 0 0 0 0 0 100 3 0 0 3 295 145 120 0 1 0 0 1394 0 0 0 100 4 0 0 3 213 102 8 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 7 28 4 22 0 0 2 0 533 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 March 31, 2026 at 06:34:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 107 124 0 1 0 0 275 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 3 243 119 66 1 0 0 0 1394 0 0 0 100 4 0 0 3 280 136 72 0 2 0 0 0 0 0 0 100 5 0 0 0 7 0 4 0 1 0 0 2 0 0 0 100 6 0 0 7 12 4 8 0 0 3 0 559 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 295 0 0 0 100 March 31, 2026 at 06:34:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1173 0 55 2248 112 1325 34 179 172 71 3900 2 2 0 96 1 37156 0 26 323 4 924 33 127 192 44 5512 9 6 0 85 2 2001 0 129 509 31 978 23 121 177 65 2334 1 2 0 97 3 871 0 52 487 136 882 16 105 190 50 5690 1 2 0 97 4 10344 0 131 429 137 906 21 103 266 69 4432 3 3 0 94 5 8566 0 28 451 3 794 16 100 271 48 3516 4 2 0 94 6 1462 0 19 301 18 896 9 112 156 72 3018 1 1 0 97 7 2435 0 388 229 4 865 12 91 180 50 3172 2 2 0 96 March 31, 2026 at 06:34:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 84 2110 104 120 1 3 7 0 266 0 1 0 99 1 0 0 7 51 15 35 0 3 0 0 0 0 0 0 100 2 0 0 0 94 34 80 0 2 0 0 12 0 0 0 100 3 0 0 3 226 104 36 1 0 1 0 1397 0 0 0 100 4 1 0 3 231 103 12 0 1 0 0 22 0 0 0 100 5 44 0 0 51 13 40 0 0 6 0 12 0 0 0 100 6 0 0 7 36 6 22 2 0 2 0 558 0 0 0 100 7 0 0 3 24 1 6 0 0 0 0 295 0 0 0 100 March 31, 2026 at 06:34:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 56 2168 101 12 0 1 2 0 266 0 1 0 99 1 0 0 0 80 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 182 52 106 0 1 0 0 0 0 0 0 100 3 0 0 3 286 104 36 1 0 0 0 1396 0 0 0 99 4 0 0 3 387 103 110 0 3 0 0 1 0 0 0 100 5 0 0 462 25 6 16 0 0 2 0 9 0 1 0 99 6 0 0 7 86 4 8 0 0 4 0 583 0 0 0 100 7 0 0 0 79 1 2 0 0 3 0 293 0 0 0 100 March 31, 2026 at 06:34:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 12 0 0 0 0 266 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 3 0 0 3 213 104 36 1 0 0 0 1397 0 0 0 100 4 0 0 3 315 102 108 0 0 0 0 0 0 0 0 100 5 0 0 0 20 6 16 0 0 0 0 10 0 0 0 100 6 0 0 7 17 4 18 0 1 0 0 569 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 March 31, 2026 at 06:34:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4491 0 36 2364 102 1062 57 184 123 70 4539 3 2 0 95 1 35104 0 28 286 2 979 38 151 133 54 4405 8 6 0 86 2 3319 0 319 296 24 962 19 141 75 63 2975 2 2 0 97 3 728 0 72 713 126 879 19 114 130 72 4275 2 2 0 96 4 5175 0 30 690 113 796 17 111 125 48 3103 2 2 0 96 5 6425 0 5 414 6 699 13 86 146 49 3749 2 2 0 96 6 5622 0 27 386 6 674 23 94 185 66 4418 2 2 0 95 7 3083 0 322 229 3 751 17 109 94 69 4497 3 2 0 95 March 31, 2026 at 06:34:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 45 0 70 2122 105 237 1 10 78 0 12 0 1 0 99 1 7 0 14 88 2 132 0 12 61 0 321 0 0 0 100 2 3 0 7 90 3 140 0 13 58 0 9 0 0 0 100 3 19 0 17 351 156 204 0 15 91 0 1415 0 0 0 99 4 22 0 3 384 173 181 1 11 60 0 18 0 0 0 100 5 0 0 0 79 3 111 0 13 93 0 5 0 0 0 100 6 23 0 0 72 3 99 1 6 93 0 280 0 0 0 100 7 1 0 7 82 3 121 1 12 50 0 522 0 0 0 100 March 31, 2026 at 06:34:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2165 106 136 0 0 4 0 9 0 1 0 99 1 0 0 21 63 3 4 2 0 1 0 528 0 0 0 100 2 0 0 0 74 3 14 0 0 1 0 11 0 0 0 100 3 0 0 3 271 105 42 1 1 1 0 1394 0 0 0 99 4 0 0 3 365 151 112 0 0 1 0 13 0 0 0 100 5 0 0 343 27 11 12 0 0 7 0 0 0 0 0 100 6 0 0 0 74 6 18 0 0 5 0 345 0 0 0 100 7 0 0 0 72 2 14 0 0 4 0 294 0 0 0 100 March 31, 2026 at 06:34:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2131 105 126 0 1 0 0 8 0 0 0 99 1 0 0 21 23 2 4 0 0 0 0 525 0 0 0 100 2 0 0 0 27 2 6 0 1 0 0 0 0 0 0 100 3 0 0 3 230 104 36 1 0 0 0 1394 0 0 0 100 4 0 0 3 266 122 41 0 1 0 0 0 0 0 0 100 5 0 0 119 67 30 64 0 1 1 0 2 0 0 0 100 6 0 0 0 31 3 8 0 0 4 0 298 0 0 0 100 7 0 0 0 29 1 10 0 0 1 0 294 0 0 0 100 March 31, 2026 at 06:34:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1975 0 161 2241 111 1340 62 239 129 67 4316 2 2 0 96 1 2177 0 142 532 13 922 37 137 80 67 5863 3 2 0 95 2 1174 0 11 303 2 1028 44 160 103 56 3806 2 1 0 97 3 36117 0 81 560 106 958 47 154 86 41 5645 9 7 0 85 4 1239 0 13 377 104 948 38 154 152 44 3788 2 2 0 97 5 10891 0 202 533 27 941 20 119 218 72 5717 4 4 0 92 6 7670 0 47 597 14 963 17 125 194 53 4357 3 2 0 95 7 2332 0 210 256 2 981 25 137 95 68 3699 2 2 0 96 March 31, 2026 at 06:34:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2140 123 120 0 3 0 0 9 0 0 0 100 1 6 0 21 81 31 66 0 2 0 0 548 0 0 0 100 2 0 0 0 42 3 26 0 1 0 0 21 0 0 0 100 3 0 0 19 229 104 44 1 2 0 0 1410 0 0 0 100 4 4 0 1 229 103 9 0 2 0 0 19 0 0 0 100 5 69 0 7 80 13 56 0 5 1 0 18 0 0 0 100 6 0 0 70 26 3 18 1 2 8 0 240 0 1 0 99 7 8 0 0 30 3 14 0 2 8 0 307 0 0 0 100 March 31, 2026 at 06:34:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 100 214 0 10 111 0 0 0 1 0 99 1 0 0 21 237 36 223 1 10 99 0 528 0 0 0 100 2 0 0 0 173 19 149 0 11 79 0 1 0 0 0 100 3 0 0 3 372 139 162 0 9 109 0 1395 0 1 0 99 4 0 0 3 371 137 112 0 9 80 0 0 0 0 0 100 5 0 0 0 144 7 124 0 5 78 0 9 0 0 0 100 6 0 0 0 139 3 115 0 5 68 0 299 0 0 0 100 7 0 0 462 67 1 109 0 6 57 0 294 0 0 0 99 March 31, 2026 at 06:34:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 118 0 0 0 0 0 0 0 0 100 1 0 0 21 6 2 4 1 0 0 0 525 0 0 0 100 2 0 0 0 113 52 112 0 0 0 0 11 0 0 0 100 3 0 0 3 213 104 36 1 0 0 0 1394 0 0 0 100 4 1 0 3 217 105 10 0 0 0 0 16 0 0 0 100 5 0 0 0 23 13 10 0 0 0 0 7 0 0 0 100 6 0 0 0 18 3 22 0 0 3 0 314 0 0 0 100 7 0 0 0 13 2 8 0 0 2 0 296 0 0 0 100 March 31, 2026 at 06:34:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19964 0 22 2258 101 538 17 83 61 58 1711 5 3 0 92 1 1175 0 214 121 3 433 13 68 59 66 1976 1 1 0 98 2 381 0 13 344 50 503 6 68 39 45 1343 0 0 0 99 3 459 0 51 346 107 447 8 68 70 48 2644 1 2 0 98 4 219 0 31 399 104 395 9 55 55 40 1420 0 1 0 99 5 8441 0 244 200 10 324 3 35 137 58 5125 2 3 0 95 6 2346 0 21 191 5 386 6 64 107 60 2109 1 1 0 99 7 911 0 5 237 2 373 8 56 70 36 2406 1 1 0 98 March 31, 2026 at 06:34:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17251 0 77 2157 103 984 47 178 58 21 3919 6 5 0 89 1 588 0 21 99 11 877 39 145 50 14 3319 2 1 0 97 2 954 0 179 417 11 775 22 98 26 18 2321 2 1 0 97 3 2282 0 43 409 139 854 32 126 68 12 3881 2 1 0 97 4 1170 0 4 587 105 729 21 95 74 19 2129 1 1 0 98 5 3948 0 2 67 1 619 32 90 70 14 2886 2 1 0 96 6 2691 0 2 305 4 544 24 74 58 11 2435 1 1 0 98 7 761 0 7 327 4 619 13 74 63 16 2075 1 1 0 98 March 31, 2026 at 06:34:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2188 110 124 0 2 2 0 10 0 1 0 99 1 2 0 21 182 49 108 1 1 0 0 548 0 0 0 100 2 0 0 0 81 2 4 0 0 0 0 0 0 0 0 100 3 0 0 3 288 105 40 0 1 0 0 1395 0 0 0 100 4 0 0 3 285 103 4 0 1 0 0 0 0 0 0 100 5 0 0 0 79 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 86 4 10 0 0 3 0 281 0 0 0 100 7 0 0 462 17 1 6 0 0 5 0 294 0 0 0 100 March 31, 2026 at 06:34:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 106 230 0 9 82 0 9 0 0 0 100 1 0 0 21 164 52 209 0 7 75 0 526 0 0 0 100 2 0 0 0 51 3 94 0 8 69 0 0 0 0 0 100 3 0 0 3 287 129 145 1 6 98 0 1394 0 0 0 100 4 0 0 3 284 127 105 0 7 92 0 0 0 0 0 100 5 0 0 0 49 0 89 0 6 76 0 0 0 0 0 100 6 0 0 0 49 3 86 0 3 89 0 353 0 0 0 100 7 0 0 0 63 2 113 0 7 91 0 296 0 0 0 100 March 31, 2026 at 06:34:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 138 0 1 1 0 8 0 0 0 100 1 0 0 21 118 53 112 1 0 1 0 526 0 0 0 100 2 0 0 0 16 3 12 0 0 1 0 11 0 0 0 100 3 0 0 7 216 104 36 1 0 1 0 1395 0 0 0 100 4 0 0 7 217 103 14 0 0 1 0 14 0 0 0 100 5 0 0 0 16 8 2 0 0 1 0 0 0 0 0 100 6 0 0 0 22 6 18 0 0 4 0 344 0 0 0 100 7 0 0 0 15 2 6 0 1 2 0 294 0 0 0 100 March 31, 2026 at 06:34:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6062 0 325 2294 123 1067 39 162 137 81 5221 2 2 0 95 1 2394 0 48 545 36 902 22 126 108 76 4430 3 2 0 96 2 2500 0 6 369 9 670 13 97 116 54 3659 2 1 0 97 3 795 0 72 604 105 770 19 91 79 54 3870 2 1 0 97 4 2252 0 41 697 104 762 23 92 112 59 2123 2 2 0 96 5 33987 0 27 294 2 652 23 93 114 35 2684 7 6 0 87 6 10364 0 309 230 5 648 12 84 206 57 4034 3 3 0 94 7 5268 0 14 202 4 759 19 112 174 71 3703 2 2 0 96 March 31, 2026 at 06:34:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 7 2126 106 58 0 1 0 0 9 0 0 0 100 1 2 0 21 130 22 121 0 2 0 0 528 0 0 0 100 2 0 0 0 83 32 68 0 2 0 0 0 0 0 0 100 3 0 0 3 223 103 34 0 0 0 0 1394 0 0 0 100 4 0 0 3 223 103 2 0 0 0 0 0 0 0 0 100 5 0 0 70 9 0 2 0 0 6 0 0 0 0 0 100 6 0 0 0 23 3 8 0 0 0 0 308 0 0 0 100 7 0 0 0 25 2 12 0 0 6 0 294 0 0 0 100 March 31, 2026 at 06:34:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2180 105 20 0 1 2 0 8 0 1 0 99 1 0 0 21 190 2 114 1 0 0 0 525 0 0 0 100 2 0 0 0 186 52 110 0 2 0 0 0 0 0 0 100 3 0 0 3 284 103 34 2 0 1 0 1394 0 0 0 100 4 0 0 3 282 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 79 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 84 3 8 0 0 5 0 303 0 0 0 100 7 0 0 462 18 3 8 0 0 2 0 297 0 0 0 100 March 31, 2026 at 06:34:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 180 0 12 98 0 8 0 0 0 99 1 0 0 7 111 2 150 0 7 45 0 259 0 0 0 100 2 0 0 14 153 53 200 0 11 66 0 267 0 0 0 100 3 0 0 3 291 130 139 0 10 78 0 1394 0 0 0 100 4 0 0 3 296 130 115 0 8 83 0 0 0 0 0 100 5 0 0 0 42 0 74 0 6 47 0 0 0 0 0 100 6 0 0 0 54 3 93 0 6 64 0 267 0 0 0 100 7 0 0 0 49 2 80 0 9 49 0 294 0 0 0 100 March 31, 2026 at 06:34:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8467 0 147 2284 110 1105 33 166 161 84 4179 3 3 0 94 1 36334 0 324 191 15 959 28 155 123 78 4661 9 7 0 84 2 2047 0 51 241 33 920 18 132 105 75 3228 2 1 0 97 3 1680 0 73 374 107 853 12 109 95 51 4243 1 1 0 97 4 1704 0 21 410 106 683 14 98 96 56 2643 2 1 0 97 5 1615 0 11 443 11 676 18 74 61 49 3540 2 1 0 98 6 2496 0 193 379 4 866 13 93 123 55 3383 2 2 0 96 7 9369 0 20 356 5 678 19 92 193 60 5177 3 3 0 94 March 31, 2026 at 06:34:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 64 0 0 2127 105 21 1 3 0 0 21 0 0 0 99 1 22 0 7 128 22 112 0 2 0 0 273 0 0 0 100 2 11 0 84 123 38 121 0 4 6 0 275 0 1 0 99 3 1 0 24 235 103 48 1 3 0 0 1414 0 0 0 99 4 1 0 3 232 103 12 0 2 0 0 2 0 0 0 100 5 4 0 0 25 1 6 0 0 0 0 16 0 0 0 100 6 0 0 0 28 3 10 0 0 0 0 303 0 0 0 100 7 0 0 0 22 1 6 0 1 7 0 306 0 0 0 100 March 31, 2026 at 06:34:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2188 106 20 0 0 0 0 9 0 1 0 99 1 0 0 7 184 32 107 1 2 0 0 263 0 0 0 100 2 1 0 56 181 25 110 1 1 2 0 303 0 1 0 99 3 0 0 3 294 103 44 1 0 1 0 1394 0 0 0 99 4 0 0 3 281 102 2 0 1 0 0 0 0 0 0 100 5 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 84 3 8 0 0 1 0 274 0 0 0 100 7 0 0 462 16 2 6 0 0 3 0 296 0 0 0 100 March 31, 2026 at 06:34:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 18 0 0 0 0 10 0 0 0 100 1 0 0 7 103 2 96 0 0 0 0 259 0 0 0 100 2 0 0 14 110 52 108 0 2 0 0 265 0 0 0 100 3 0 0 3 226 105 50 1 2 0 0 1396 0 0 0 100 4 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 9 0 8 0 1 0 0 0 0 0 0 100 6 0 0 0 12 3 8 0 0 1 0 308 0 0 0 100 7 0 0 0 7 1 2 0 0 2 0 294 0 0 0 100 March 31, 2026 at 06:34:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7105 0 132 2293 109 1365 30 214 253 81 5265 3 3 0 94 1 1601 0 36 236 3 1198 39 197 213 75 4825 2 2 0 96 2 36592 0 41 400 40 1188 34 170 239 51 4691 10 7 0 83 3 1727 0 76 846 145 1118 16 138 180 45 5967 2 2 0 96 4 2755 0 28 750 133 933 18 118 126 52 3013 3 1 0 96 5 3890 0 384 252 0 1058 19 129 170 65 4227 3 2 0 94 6 1139 0 6 516 5 978 18 111 211 58 3729 2 2 0 97 7 9517 0 135 177 3 896 14 126 275 55 4290 2 3 0 95 March 31, 2026 at 06:34:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2121 101 12 0 3 1 0 12 0 0 0 100 1 0 0 7 32 5 12 0 1 1 0 281 0 0 0 100 2 7 0 14 37 4 28 0 2 2 0 304 0 0 0 100 3 7 0 87 226 107 48 1 2 6 0 1412 0 1 0 99 4 0 0 3 336 105 124 0 6 1 0 16 0 0 0 100 5 0 0 7 109 46 87 0 6 1 0 4 0 0 0 100 6 6 0 0 59 16 43 0 1 1 0 242 0 0 0 100 7 69 0 0 43 8 24 0 2 8 0 311 0 0 0 100 March 31, 2026 at 06:34:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 102 117 0 3 1 0 8 0 1 0 99 1 0 0 7 86 2 12 1 1 0 0 262 0 0 0 100 2 3 0 14 87 2 12 0 0 0 0 266 0 0 0 100 3 0 0 45 279 103 36 1 1 2 0 1391 0 1 0 99 4 0 0 3 283 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 81 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 122 21 44 0 0 1 0 251 0 0 0 100 7 0 0 462 87 37 76 0 1 3 0 298 0 0 0 100 March 31, 2026 at 06:34:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 105 118 0 0 0 0 8 0 0 0 100 1 0 0 7 13 3 10 0 0 0 0 259 0 0 0 100 2 0 0 14 20 2 20 1 1 0 0 266 0 0 0 100 3 0 0 3 211 103 34 1 0 0 0 1391 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 8 0 0 4 0 337 0 0 0 100 7 0 0 0 107 51 102 0 0 1 0 294 0 0 0 100 March 31, 2026 at 06:34:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5148 0 122 2156 109 319 4 40 85 29 1149 1 2 0 97 1 3304 0 199 103 2 186 4 33 55 38 1553 1 1 0 98 2 2142 0 38 178 2 148 5 26 32 20 678 1 1 0 98 3 289 0 11 318 104 186 0 34 33 35 1719 0 1 0 99 4 130 0 16 314 104 179 3 31 38 42 1429 0 1 0 99 5 48 0 9 95 0 124 2 27 18 20 414 0 0 0 100 6 39 0 10 95 3 115 3 28 17 18 680 0 1 0 99 7 143 0 17 203 52 228 0 28 45 26 1152 0 0 0 99 March 31, 2026 at 06:34:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1819 0 197 2191 104 1385 53 181 208 32 4318 2 2 0 96 1 6024 0 128 548 7 1061 19 139 263 42 3908 2 2 0 96 2 5691 0 41 579 13 970 21 124 201 41 3919 4 2 0 94 3 34190 0 88 493 135 1264 45 148 146 48 6911 8 6 0 86 4 2108 0 10 781 146 1027 12 90 161 31 3195 3 1 0 96 5 826 0 7 459 27 930 22 95 148 35 2547 2 1 0 97 6 1100 0 12 407 3 788 21 86 149 22 3077 2 1 0 97 7 527 0 79 407 3 696 24 77 139 15 2620 1 1 0 97 March 31, 2026 at 06:34:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 462 2110 100 116 0 0 1 0 0 0 1 0 99 1 0 0 7 82 3 6 0 0 0 0 264 0 0 0 100 2 2 0 14 183 52 112 0 0 0 0 278 0 0 0 100 3 44 0 4 294 109 46 0 0 0 0 1406 0 0 0 99 4 0 0 2 295 105 18 0 0 1 0 10 0 0 0 100 5 0 0 0 86 6 4 0 1 0 0 0 0 0 0 100 6 0 0 0 93 3 22 0 2 2 0 433 0 0 0 100 7 0 0 42 80 1 12 0 2 4 0 294 0 0 0 100 March 31, 2026 at 06:34:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 122 0 0 0 0 0 0 0 0 100 1 0 0 7 11 3 6 1 0 0 0 259 0 0 0 100 2 0 0 14 109 53 106 0 0 0 0 266 0 0 0 100 3 0 0 3 225 110 48 1 0 1 0 1408 0 0 0 100 4 0 0 3 214 105 6 0 0 0 0 1 0 0 0 100 5 0 0 0 8 1 6 0 2 0 0 0 0 0 0 100 6 0 0 0 13 3 8 0 1 2 0 349 0 0 0 100 7 0 0 0 9 2 5 0 1 5 0 294 0 0 0 100 March 31, 2026 at 06:34:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 128 0 1 1 0 0 0 0 0 100 1 0 0 7 12 4 8 0 0 0 0 262 0 0 0 100 2 0 0 14 108 52 104 1 0 0 0 266 0 0 0 100 3 0 0 3 223 109 46 1 0 0 0 1406 0 0 0 100 4 0 0 3 212 104 4 0 0 0 0 1 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 8 1 1 3 0 287 0 0 0 100 7 0 0 0 10 2 4 0 0 1 0 294 0 0 0 100 March 31, 2026 at 06:34:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1967 0 213 2217 103 1272 50 206 128 76 4311 2 2 0 95 1 5995 0 140 515 4 1007 20 127 179 86 5899 2 2 0 95 2 3238 0 30 550 17 1030 20 135 121 62 4969 2 2 0 96 3 2273 0 56 409 115 1112 15 143 122 72 4886 2 2 0 96 4 2954 0 35 498 127 1095 26 133 157 53 4688 3 2 0 95 5 9628 0 308 407 10 825 15 101 148 64 3393 4 2 0 94 6 37196 0 15 359 6 938 21 113 133 64 4512 9 6 0 85 7 953 0 18 238 5 947 20 123 116 52 3541 2 1 0 97 March 31, 2026 at 06:34:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2110 101 232 0 13 116 0 0 0 1 0 99 1 0 0 7 141 29 188 0 10 86 0 260 0 0 0 100 2 4 0 14 68 2 98 0 11 77 0 268 0 0 0 100 3 0 0 17 281 129 97 1 7 63 0 1118 0 0 0 100 4 0 0 3 335 151 143 0 6 57 0 0 0 0 0 100 5 0 0 0 54 0 70 0 5 64 0 0 0 0 0 100 6 44 0 0 77 6 103 0 7 57 0 233 0 0 0 100 7 0 0 0 76 5 99 0 6 78 0 594 0 0 0 100 March 31, 2026 at 06:34:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2154 100 111 0 1 3 0 0 0 1 0 99 1 0 0 357 47 16 38 0 1 4 0 262 0 0 0 100 2 0 0 14 149 40 98 0 3 1 0 278 0 0 0 100 3 0 0 3 266 103 34 1 0 1 0 1110 0 0 0 100 4 0 0 3 276 105 16 0 0 1 0 17 0 0 0 100 5 0 0 0 70 7 3 0 1 1 0 0 0 0 0 100 6 0 0 0 81 7 26 0 0 2 0 330 0 0 0 100 7 0 0 0 82 5 20 0 0 1 0 594 0 0 0 100 March 31, 2026 at 06:34:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2106 101 113 0 0 0 0 1 0 0 0 100 1 0 0 7 28 3 6 1 0 0 0 261 0 0 0 100 2 0 0 14 125 52 106 0 0 0 0 265 0 0 0 100 3 0 0 3 226 102 36 0 1 0 0 1109 0 0 0 100 4 0 0 3 228 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 22 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 36 7 14 1 0 0 0 249 0 0 0 100 7 0 0 0 39 4 20 0 1 1 0 594 0 0 0 100 March 31, 2026 at 06:34:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9038 0 337 2254 102 1101 30 167 195 67 4696 5 3 0 92 1 3835 0 49 355 7 978 30 140 168 85 3491 3 1 0 95 2 1324 0 23 237 32 1042 38 168 91 72 4403 2 1 0 96 3 985 0 53 677 105 940 19 108 98 44 4059 1 1 0 98 4 1260 0 26 646 116 754 19 92 92 48 3545 1 2 0 97 5 3804 0 9 170 4 866 23 110 88 53 4096 3 2 0 95 6 2498 0 20 401 9 713 11 94 125 40 3193 1 2 0 97 7 40888 0 305 247 6 760 17 73 157 60 5772 8 7 0 85 March 31, 2026 at 06:34:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 49 0 0 2131 106 96 0 1 0 0 15 0 0 0 100 1 0 0 77 45 4 40 0 2 4 0 275 0 0 0 100 2 8 0 21 25 3 12 0 1 5 0 282 0 0 0 100 3 7 0 17 227 103 43 1 4 0 0 1118 0 0 0 100 4 21 0 3 231 106 11 0 2 0 0 19 0 0 0 100 5 25 0 0 128 51 112 0 1 1 0 9 0 0 0 100 6 4 0 0 27 2 10 0 1 2 0 256 0 0 0 100 7 2 0 0 42 7 26 0 1 3 0 604 0 0 0 100 March 31, 2026 at 06:34:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2188 107 180 0 11 101 0 9 0 1 0 99 1 0 0 49 206 5 200 0 12 99 0 262 0 1 0 99 2 0 0 476 70 2 111 0 8 71 0 266 0 0 0 100 3 0 0 2 357 128 130 1 12 77 0 1099 0 1 0 99 4 0 0 4 368 138 117 0 10 72 0 0 0 0 0 100 5 0 0 0 204 38 168 0 8 75 0 0 0 0 0 100 6 0 0 0 117 1 78 0 4 74 0 314 0 0 0 100 7 0 0 0 130 4 94 0 6 63 0 594 0 0 0 100 March 31, 2026 at 06:34:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 116 0 0 0 0 7 0 0 0 100 1 0 0 7 18 3 12 1 0 0 0 261 0 0 0 100 2 0 0 14 12 2 14 0 1 0 0 278 0 0 0 100 3 0 0 3 208 102 32 0 0 1 0 1101 0 0 0 100 4 0 0 3 216 103 14 0 0 0 0 13 0 0 0 100 5 0 0 0 112 56 102 0 0 0 0 0 0 0 0 100 6 0 0 0 17 4 16 1 0 4 0 345 0 0 0 100 7 0 0 0 17 4 14 0 0 4 0 593 0 0 0 100 March 31, 2026 at 06:34:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 41884 0 314 2195 109 616 21 87 166 71 5418 9 8 0 84 1 3985 0 15 378 8 543 3 86 109 68 2221 1 1 0 98 2 375 0 39 296 4 514 9 89 65 63 1775 0 1 0 99 3 283 0 47 450 102 434 11 63 62 52 2554 1 1 0 99 4 1954 0 40 535 106 457 7 64 63 49 1219 1 2 0 98 5 1110 0 304 303 44 470 13 67 46 53 1232 1 1 0 98 6 1373 0 11 295 2 356 2 57 106 43 2463 1 1 0 98 7 5364 0 130 235 5 361 8 51 130 45 3896 1 2 0 96 March 31, 2026 at 06:34:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 457 0 73 2124 102 861 23 101 38 11 2708 2 1 0 96 1 1840 0 19 349 35 598 21 66 18 6 2047 3 1 0 96 2 468 0 14 51 6 655 14 72 25 15 2090 1 1 0 98 3 977 0 31 239 104 632 12 60 69 9 3216 1 1 0 98 4 921 0 10 446 104 521 9 47 26 10 1639 1 1 0 98 5 1143 0 0 229 1 475 13 42 33 10 2459 2 1 0 98 6 1131 0 0 47 6 561 17 42 50 15 1973 1 1 0 98 7 625 0 0 294 20 532 10 38 37 8 2075 1 1 0 99 March 31, 2026 at 06:34:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 45 2186 107 52 0 1 1 0 10 0 1 0 99 1 0 0 469 107 34 92 0 4 1 0 262 0 0 0 100 2 2 0 14 155 11 80 0 3 0 0 266 0 0 0 100 3 0 0 3 303 112 54 1 1 0 0 1109 0 0 0 99 4 0 0 3 284 103 4 0 1 0 0 0 0 0 0 100 5 0 0 0 78 0 2 0 1 0 0 0 0 0 0 100 6 0 0 0 80 1 2 0 0 0 0 314 0 0 0 100 7 0 0 0 86 4 10 0 0 0 0 594 0 0 0 100 March 31, 2026 at 06:34:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 195 0 8 111 0 8 0 1 0 99 1 0 0 7 78 2 131 1 7 85 0 261 0 0 0 100 2 0 0 14 93 13 133 0 8 54 0 266 0 0 0 100 3 0 0 3 357 167 191 1 8 67 0 1111 0 0 0 100 4 0 0 3 285 130 112 0 8 62 0 1 0 0 0 100 5 0 0 0 55 0 101 0 7 76 0 0 0 0 0 100 6 0 0 0 47 1 83 1 4 68 0 265 0 0 0 100 7 0 0 0 57 5 95 0 4 114 0 593 0 0 0 100 March 31, 2026 at 06:34:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 116 0 1 0 0 9 0 0 0 100 1 0 0 7 19 2 12 0 0 1 0 259 0 0 0 100 2 0 0 14 22 4 24 1 1 1 0 276 0 0 0 100 3 0 0 7 217 104 39 0 1 1 0 1109 0 0 0 100 4 0 0 7 316 152 114 0 2 1 0 17 0 0 0 100 5 0 0 0 18 8 3 0 1 1 0 0 0 0 0 100 6 0 0 0 16 2 14 0 0 3 0 352 0 0 0 100 7 0 0 0 20 5 12 0 0 2 0 595 0 0 0 100 March 31, 2026 at 06:34:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22752 0 30 2317 110 1134 39 168 144 53 4211 6 5 0 89 1 9274 0 230 459 6 846 16 129 228 73 6244 4 3 0 93 2 5941 0 24 503 7 940 24 131 161 69 4230 3 2 0 95 3 20904 0 511 519 136 1131 30 150 90 69 4722 5 6 0 89 4 1132 0 12 408 115 967 25 143 143 71 3627 2 1 0 97 5 1766 0 14 255 2 755 16 88 97 62 3097 2 1 0 97 6 1209 0 13 439 4 776 12 94 90 52 2866 1 1 0 98 7 651 0 13 275 6 715 13 82 115 62 4410 1 1 0 97 March 31, 2026 at 06:34:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2130 109 118 0 2 0 0 9 0 0 0 100 1 0 0 77 110 47 106 0 1 4 0 262 0 0 0 100 2 2 0 14 26 3 12 0 1 5 0 268 0 0 0 100 3 0 0 3 222 102 32 1 0 0 0 1108 0 0 0 100 4 0 0 3 230 103 14 0 3 0 0 0 0 0 0 100 5 0 0 0 20 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 20 1 6 0 1 3 0 278 0 0 0 100 7 0 0 0 27 4 10 0 0 4 0 594 0 0 0 100 March 31, 2026 at 06:34:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2188 106 116 0 0 0 0 9 0 1 0 99 1 0 0 49 94 7 22 0 0 2 0 261 0 1 0 99 2 0 0 476 16 3 8 0 0 2 0 266 0 0 0 100 3 0 0 3 372 147 124 0 1 0 0 1110 0 0 0 99 4 0 0 3 284 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 78 0 2 0 1 0 0 0 0 0 0 100 6 0 0 0 87 2 10 1 2 1 0 318 0 0 0 100 7 0 0 0 89 5 14 0 1 5 0 595 0 0 0 100 March 31, 2026 at 06:34:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 206 0 7 109 0 8 0 0 0 99 1 0 0 7 78 1 132 2 10 79 0 259 0 0 0 100 2 0 0 14 65 3 125 0 10 59 0 266 0 0 0 100 3 0 0 3 325 152 168 2 10 83 0 1109 0 0 0 100 4 0 0 3 336 156 168 0 11 59 0 0 0 0 0 100 5 0 0 0 48 0 85 0 6 63 0 0 0 0 0 100 6 0 0 0 54 1 92 0 7 67 0 297 0 0 0 100 7 0 0 0 58 4 97 0 8 91 0 594 0 0 0 100 March 31, 2026 at 06:34:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34807 0 48 2261 114 1127 43 204 148 56 4956 8 7 0 85 1 10141 0 291 387 25 1104 36 174 211 63 4679 4 4 0 92 2 5998 0 206 228 5 992 32 155 203 68 4415 2 2 0 96 3 5123 0 247 682 105 932 24 119 178 94 6363 4 3 0 94 4 2413 0 23 779 111 930 25 109 78 57 2847 2 1 0 97 5 915 0 13 252 9 820 20 113 93 64 4047 1 1 0 98 6 3139 0 18 457 5 820 16 101 87 48 3623 3 2 0 96 7 1270 0 17 417 14 721 26 101 61 47 2854 1 1 0 98 March 31, 2026 at 06:34:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2119 100 114 0 4 0 0 12 0 0 0 100 1 23 0 77 30 4 25 0 2 5 0 264 0 1 0 99 2 6 0 14 31 3 18 1 2 5 0 278 0 0 0 100 3 0 0 17 228 103 40 1 1 1 0 1121 0 0 0 100 4 49 0 3 340 159 120 0 0 0 0 17 0 0 0 100 5 0 0 0 27 3 12 0 1 0 0 15 0 0 0 100 6 1 0 0 24 1 8 0 1 2 0 264 0 0 0 100 7 0 0 7 27 3 10 0 0 1 0 610 0 0 0 100 March 31, 2026 at 06:34:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2153 100 98 0 2 0 0 0 0 1 0 99 1 0 0 21 70 3 16 0 0 3 0 263 0 0 0 100 2 0 0 357 14 3 12 0 2 4 0 266 0 0 0 100 3 0 0 3 265 102 38 0 2 0 0 1112 0 0 0 100 4 0 0 3 321 131 61 0 1 0 0 13 0 0 0 100 5 0 0 0 117 30 62 0 1 0 0 0 0 0 0 100 6 0 0 0 63 2 6 1 0 5 0 325 0 0 0 100 7 0 0 0 65 3 8 0 0 1 0 594 0 0 0 100 March 31, 2026 at 06:34:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 101 104 0 1 0 0 1 0 0 0 100 1 0 0 21 36 2 16 0 0 0 0 280 0 0 0 100 2 0 0 133 16 4 12 0 0 1 0 266 0 0 0 100 3 0 0 3 232 103 38 1 1 1 0 1109 0 0 0 100 4 0 0 3 239 108 12 0 0 0 0 8 0 0 0 100 5 0 0 0 67 21 41 0 1 0 0 0 0 0 0 100 6 0 0 0 87 30 64 0 1 1 0 369 0 0 0 100 7 0 0 0 30 3 6 0 0 0 0 594 0 0 0 100 March 31, 2026 at 06:35:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4322 0 204 2290 104 1187 42 202 200 57 5108 3 3 0 94 1 1973 0 145 409 13 1149 28 182 229 65 4146 2 2 0 96 2 4657 0 36 262 18 1157 26 197 267 61 4834 3 2 0 95 3 7444 0 60 720 132 925 10 121 214 44 4825 3 2 0 95 4 5134 0 14 738 138 839 23 118 217 68 5372 2 2 0 96 5 2433 0 200 472 2 863 15 116 142 60 3204 2 2 0 96 6 2345 0 35 470 19 880 13 118 131 71 2740 2 1 0 97 7 35414 0 133 236 3 798 28 108 163 40 4380 8 7 0 85 March 31, 2026 at 06:35:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 0 2126 105 122 0 7 0 0 14 0 0 0 100 1 3 0 7 38 3 19 0 3 1 0 273 0 0 0 100 2 8 0 14 48 10 36 0 3 6 0 302 0 0 0 100 3 1 0 17 263 121 75 1 4 1 0 1122 0 0 0 100 4 21 0 3 252 110 38 0 5 1 0 27 0 0 0 100 5 26 0 0 92 36 64 0 1 2 0 10 0 0 0 100 6 0 0 70 31 5 24 0 2 6 0 239 0 0 0 99 7 0 0 7 38 5 18 0 3 1 0 608 0 0 0 100 March 31, 2026 at 06:35:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2202 121 128 0 2 0 0 9 0 1 0 99 1 0 0 7 83 2 6 1 0 0 0 262 0 0 0 100 2 0 0 476 23 4 14 1 1 2 0 266 0 0 0 100 3 0 0 3 282 103 34 0 0 0 0 1099 0 0 0 100 4 0 0 3 286 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 182 35 110 0 4 0 0 0 0 0 0 100 6 0 0 42 79 2 6 1 1 2 0 282 0 0 0 100 7 0 0 0 85 3 8 0 0 1 0 594 0 0 0 100 March 31, 2026 at 06:35:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2162 155 122 0 0 0 0 8 0 0 0 100 1 1 0 7 9 2 6 0 0 0 0 259 0 0 0 100 2 0 0 14 11 3 8 0 1 0 0 266 0 0 0 100 3 0 0 3 209 102 32 1 0 0 0 1096 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 107 0 102 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 6 0 1 2 0 263 0 0 0 100 7 0 0 0 11 3 6 0 0 2 0 595 0 0 0 100 March 31, 2026 at 06:35:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1759 0 346 2220 156 644 6 102 82 58 2224 1 2 0 97 1 449 0 16 273 4 450 7 79 42 53 2033 1 1 0 99 2 366 0 32 254 3 413 8 68 56 56 2114 1 1 0 98 3 3381 0 46 331 103 391 10 69 114 41 5112 2 2 0 96 4 2465 0 12 319 103 385 5 55 96 45 1586 1 1 0 98 5 7815 0 129 350 2 484 7 55 112 54 1924 3 2 0 96 6 12093 0 5 150 1 468 7 72 74 50 2980 3 2 0 96 7 326 0 17 214 4 410 5 53 53 41 2126 1 1 0 99 March 31, 2026 at 06:35:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 852 0 70 2163 113 676 16 100 184 21 1757 1 2 0 98 1 2982 0 26 344 4 459 11 62 138 10 1415 2 1 0 97 2 1297 0 194 247 7 472 13 60 148 19 1226 1 1 0 98 3 887 0 46 398 163 611 25 96 129 14 2564 1 1 0 98 4 1158 0 5 331 131 463 3 58 126 13 1293 1 1 0 98 5 2752 0 2 92 1 459 6 55 137 8 1609 2 1 0 97 6 24534 0 9 111 3 400 12 52 176 10 1994 5 5 0 90 7 1170 0 0 214 8 397 6 48 104 16 2154 1 1 0 98 March 31, 2026 at 06:35:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2168 101 146 0 1 4 0 293 0 1 0 99 1 0 0 469 21 1 8 0 1 2 0 262 0 1 0 99 2 2 0 14 87 4 16 1 0 0 0 280 0 0 0 100 3 0 0 3 283 103 34 0 0 0 0 1101 0 0 0 100 4 0 0 3 388 152 114 0 0 0 0 13 0 0 0 100 5 44 0 0 95 11 14 0 0 0 0 9 0 0 0 100 6 0 0 1 89 2 16 0 2 0 0 17 0 0 0 100 7 0 0 0 88 3 8 1 0 3 0 568 0 0 0 100 March 31, 2026 at 06:35:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 118 0 0 1 0 294 0 0 0 100 1 0 0 7 8 1 4 1 0 0 0 259 0 0 0 100 2 0 0 14 13 5 10 0 0 0 0 290 0 0 0 100 3 0 0 3 212 103 36 1 0 0 0 1096 0 0 0 100 4 0 0 3 312 154 104 0 0 0 0 1 0 0 0 100 5 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 3 6 0 0 1 0 612 0 0 0 100 March 31, 2026 at 06:35:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 116 0 0 6 0 294 0 0 0 100 1 0 0 7 14 2 18 0 1 0 0 260 0 0 0 100 2 0 0 14 11 4 8 0 0 0 0 266 0 0 0 100 3 0 0 3 211 103 34 1 0 0 0 1098 0 0 0 100 4 0 0 3 308 152 102 0 0 0 0 0 0 0 0 100 5 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 3 6 0 0 2 0 587 0 0 0 100 March 31, 2026 at 06:35:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1011 0 26 2236 111 1172 24 169 132 71 5185 2 2 0 96 1 1224 0 30 639 22 1103 22 115 94 54 2896 1 1 0 97 2 1645 0 146 418 5 769 19 114 80 56 5212 2 1 0 97 3 677 0 81 649 106 820 22 110 91 58 3973 1 1 0 97 4 2139 0 20 741 116 827 18 100 135 34 2835 2 1 0 97 5 12798 0 492 159 8 897 33 114 234 82 5432 5 4 0 91 6 42125 0 33 368 7 863 30 103 225 67 4060 9 8 0 84 7 2196 0 30 243 11 970 19 120 119 73 3549 3 2 0 95 March 31, 2026 at 06:35:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2111 101 203 0 8 99 0 294 0 1 0 99 1 0 0 7 114 20 146 0 5 61 0 0 0 0 0 100 2 1 0 21 142 34 189 0 11 70 0 529 0 0 0 100 3 0 0 3 287 132 132 0 3 79 0 1097 0 0 0 99 4 0 0 3 297 130 129 0 6 70 0 0 0 0 0 100 5 0 0 0 67 0 100 0 8 62 0 2 0 0 0 100 6 44 0 0 78 7 107 0 6 82 0 9 0 0 0 100 7 0 0 0 65 3 88 1 6 79 0 579 0 0 0 100 March 31, 2026 at 06:35:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2173 101 124 0 0 3 0 294 0 1 0 99 1 0 0 0 92 1 12 0 0 1 0 0 0 0 0 100 2 0 0 483 123 54 118 1 0 3 0 536 0 1 0 99 3 0 0 7 286 104 40 1 1 0 0 1098 0 1 0 99 4 0 0 7 297 107 20 0 0 1 0 18 0 0 0 100 5 0 0 0 88 8 2 0 0 2 0 0 0 0 0 100 6 0 0 0 98 7 24 0 0 1 0 22 0 0 0 100 7 0 0 0 89 4 10 0 0 4 0 627 0 0 0 100 March 31, 2026 at 06:35:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 116 0 1 0 0 294 0 0 0 100 1 0 0 0 12 0 10 0 0 0 0 0 0 0 0 100 2 0 0 21 109 53 106 1 0 0 0 525 0 0 0 100 3 0 0 3 215 104 40 1 0 0 0 1096 0 0 0 99 4 0 0 3 217 104 5 0 1 0 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 6 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 7 0 0 0 11 3 6 0 0 4 0 577 0 0 0 100 March 31, 2026 at 06:35:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1408 0 17 2241 108 1311 28 184 144 90 5040 2 2 0 96 1 1292 0 30 501 6 981 16 135 100 61 3488 1 2 0 97 2 2211 0 29 536 36 860 15 95 44 41 3974 3 1 0 96 3 1364 0 65 356 106 913 16 104 72 45 4165 2 1 0 97 4 2198 0 31 506 106 807 19 82 152 44 4358 2 2 0 97 5 12169 0 433 221 2 900 14 103 229 74 4649 3 3 0 93 6 41405 0 34 303 8 820 24 110 228 71 4326 10 7 0 84 7 1570 0 204 302 11 817 12 101 81 79 3551 2 2 0 96 March 31, 2026 at 06:35:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 101 77 1 2 0 0 301 0 0 0 100 1 0 0 7 28 0 16 0 1 0 0 11 0 0 0 100 2 31 0 21 35 7 22 0 1 5 0 535 0 0 0 100 3 0 0 17 322 128 137 1 4 0 0 1108 0 0 0 100 4 2 0 73 263 126 55 0 2 5 0 21 0 0 0 100 5 1 0 0 25 2 4 0 1 0 0 3 0 0 0 100 6 49 0 0 32 4 14 1 0 0 0 17 0 0 0 100 7 23 0 0 34 6 14 1 0 0 0 586 0 0 0 100 March 31, 2026 at 06:35:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2175 101 214 0 15 76 0 294 0 1 0 99 1 0 0 0 128 0 96 0 7 83 0 0 0 0 0 100 2 0 0 483 60 2 101 0 9 73 0 527 0 0 0 100 3 0 0 3 353 130 145 1 8 74 0 1089 0 1 0 99 4 0 0 3 391 150 156 0 9 79 0 0 0 0 0 100 5 0 0 0 180 31 145 0 13 90 0 0 0 0 0 100 6 0 0 0 134 7 101 0 11 63 0 10 0 0 0 100 7 0 0 0 120 3 82 0 8 45 0 566 0 0 0 100 March 31, 2026 at 06:35:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 120 0 0 5 0 294 0 0 0 100 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 21 12 2 12 2 0 0 0 538 0 0 0 100 3 0 0 3 215 104 40 1 0 0 0 1087 0 0 0 100 4 0 0 3 218 104 16 0 0 0 0 13 0 0 0 100 5 0 0 0 111 55 102 0 0 0 0 0 0 0 0 100 6 0 0 0 23 7 24 0 1 0 0 27 0 0 0 100 7 0 0 0 14 3 10 0 0 2 0 595 0 0 0 100 March 31, 2026 at 06:35:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2516 0 195 2213 104 1192 23 152 116 65 3856 3 2 0 95 1 1776 0 35 363 7 920 27 154 89 48 3959 2 2 0 97 2 2696 0 58 248 2 996 24 151 93 56 3303 2 2 0 95 3 2333 0 85 621 107 780 16 89 77 47 3381 2 1 0 97 4 2693 0 204 371 105 756 11 102 97 61 4046 3 2 0 95 5 44892 0 242 331 37 805 16 97 237 61 5779 9 8 0 83 6 5364 0 14 428 12 879 20 108 169 71 3896 2 2 0 97 7 1442 0 5 459 3 997 13 104 113 58 5100 2 1 0 97 March 31, 2026 at 06:35:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 69 0 70 2126 111 138 0 5 6 0 313 0 1 0 99 1 0 0 7 38 3 20 0 2 0 0 11 0 0 0 100 2 4 0 21 115 48 104 0 2 0 0 544 0 0 0 100 3 25 0 17 232 106 42 1 1 0 0 1112 0 0 0 100 4 0 0 3 236 105 18 0 2 5 0 15 0 0 0 100 5 1 0 0 26 3 4 0 1 0 0 10 0 0 0 100 6 0 0 0 23 2 4 0 1 0 0 12 0 0 0 100 7 4 0 0 37 6 19 1 2 1 0 472 0 0 0 100 March 31, 2026 at 06:35:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2186 108 132 0 1 3 0 304 0 1 0 99 1 0 0 0 82 1 4 0 0 0 0 21 0 0 0 100 2 2 0 21 178 52 104 0 0 0 0 531 0 0 0 100 3 0 0 3 291 105 42 1 1 0 0 1092 0 0 0 100 4 0 0 465 221 105 8 0 0 1 0 1 0 0 0 100 5 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 79 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 85 4 8 0 0 3 0 584 0 0 0 100 March 31, 2026 at 06:35:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 106 227 0 8 93 0 302 0 1 0 99 1 0 0 0 52 0 94 0 7 60 0 0 0 0 0 100 2 0 0 21 162 52 217 1 4 66 0 525 0 0 0 100 3 0 0 3 279 131 141 0 5 73 0 1090 0 0 0 100 4 0 0 3 278 131 93 0 5 53 0 0 0 0 0 100 5 0 0 0 51 0 91 0 7 55 0 0 0 0 0 100 6 0 0 0 56 1 99 0 8 79 0 2 0 0 0 100 7 0 0 0 48 4 80 0 6 71 0 604 0 0 0 100 March 31, 2026 at 06:35:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2759 0 39 2240 109 370 5 42 44 35 1489 1 1 0 97 1 325 0 11 152 1 203 3 34 28 33 2196 0 1 0 99 2 294 0 30 246 53 337 5 36 22 22 1314 0 0 0 99 3 400 0 11 325 105 211 4 30 20 18 1629 0 1 0 99 4 819 0 195 323 106 229 3 47 46 39 874 0 1 0 98 5 3857 0 122 131 8 236 2 40 63 42 1491 1 1 0 97 6 2522 0 16 145 2 216 4 42 68 27 1056 1 1 0 99 7 2278 0 9 139 4 215 3 33 61 25 1203 0 1 0 99 March 31, 2026 at 06:35:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1535 0 187 2185 108 1256 32 148 112 53 3335 2 2 0 96 1 731 0 7 155 3 853 29 114 70 32 3146 2 1 0 97 2 1629 0 28 442 4 681 15 66 42 22 3159 1 1 0 98 3 743 0 72 609 112 825 15 82 55 23 3917 2 1 0 97 4 2296 0 27 559 107 623 8 61 69 24 2045 2 1 0 97 5 1236 0 3 421 41 682 8 55 76 37 4510 3 1 0 96 6 5861 0 189 124 1 672 15 81 140 45 2869 2 2 0 96 7 36250 0 19 174 4 767 19 68 86 30 3904 7 6 0 86 March 31, 2026 at 06:35:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2186 108 136 0 0 6 0 603 0 1 0 99 1 0 0 0 81 1 0 0 0 0 0 0 0 0 0 100 2 3 0 21 85 2 14 0 0 0 0 530 0 0 0 100 3 0 0 3 291 104 40 1 0 0 0 1092 0 0 0 100 4 0 0 465 219 104 6 0 0 1 0 0 0 0 0 100 5 0 0 0 179 50 100 0 0 0 0 0 0 0 0 100 6 0 0 0 81 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 83 2 4 0 0 3 0 389 0 0 0 100 March 31, 2026 at 06:35:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 128 0 0 3 0 603 0 0 0 100 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 21 9 2 6 1 0 0 0 525 0 0 0 100 3 0 0 3 217 104 46 0 1 0 0 1091 0 0 0 100 4 0 0 3 212 104 4 0 0 0 0 0 0 0 0 100 5 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 2 0 0 0 100 7 0 0 0 11 3 6 0 0 2 0 303 0 0 0 100 March 31, 2026 at 06:35:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 171 0 12 109 0 602 0 0 0 99 1 0 0 0 48 0 85 0 7 79 0 0 0 0 0 100 2 1 0 21 60 2 113 0 7 76 0 525 0 0 0 100 3 0 0 3 275 130 132 1 4 96 0 1091 0 0 0 100 4 0 0 3 344 130 170 0 9 88 0 0 0 0 0 100 5 0 0 0 144 51 175 0 5 79 0 0 0 0 0 100 6 0 0 0 44 0 82 0 8 75 0 0 0 0 0 100 7 0 0 0 49 2 83 0 8 44 0 262 0 0 0 100 March 31, 2026 at 06:35:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2445 0 220 2235 110 1230 36 223 109 85 5613 4 2 0 94 1 1241 0 12 554 9 921 21 137 101 47 3386 2 1 0 97 2 3484 0 49 578 20 875 27 127 111 62 4182 3 2 0 95 3 35372 0 200 458 106 992 26 151 131 70 5065 8 6 0 86 4 3372 0 8 455 116 952 20 143 126 60 5207 3 2 0 95 5 6166 0 142 566 25 896 34 120 140 53 3408 3 2 0 94 6 7758 0 14 403 4 683 22 103 187 55 4495 2 2 0 96 7 4084 0 200 430 4 894 26 109 136 62 3436 2 2 0 96 March 31, 2026 at 06:35:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2107 102 115 0 1 6 0 593 0 1 0 99 1 44 0 0 30 6 14 0 1 0 0 9 0 0 0 100 2 3 0 21 18 2 4 1 0 0 0 526 0 0 0 100 3 0 0 10 231 104 38 1 1 0 0 1091 0 0 0 100 4 0 0 3 266 123 52 0 0 6 0 1 0 0 0 100 5 0 0 0 85 31 72 0 2 0 0 0 0 0 0 100 6 0 0 0 20 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 20 2 4 0 0 1 0 244 0 0 0 100 March 31, 2026 at 06:35:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2176 102 119 0 0 5 0 595 0 1 0 99 1 0 0 0 94 8 16 0 0 0 0 11 0 0 0 100 2 1 0 21 80 2 4 2 0 0 0 583 0 0 0 99 3 0 0 3 288 103 36 1 0 0 0 1090 0 0 0 99 4 0 0 465 220 104 8 0 0 2 0 0 0 1 0 99 5 0 0 0 177 50 100 0 0 0 0 0 0 0 0 100 6 0 0 0 79 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 81 2 4 0 0 1 0 307 0 0 0 100 March 31, 2026 at 06:35:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 115 0 1 4 0 594 0 0 0 100 1 0 0 0 23 6 12 0 1 0 0 8 0 0 0 100 2 0 0 21 7 2 6 0 1 0 0 526 0 0 0 100 3 0 0 3 213 104 36 1 0 1 0 1093 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 0 0 0 0 100 5 0 0 0 107 50 102 0 1 0 0 0 0 0 0 100 6 0 0 0 9 0 8 0 1 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 4 0 316 0 0 0 100 March 31, 2026 at 06:35:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3767 0 42 2302 105 1419 48 249 263 84 4585 4 2 0 94 1 2551 0 20 635 7 1168 24 174 174 58 3278 3 1 0 96 2 2103 0 206 336 16 1144 38 176 141 70 4387 3 2 0 95 3 1768 0 72 428 131 1038 29 156 161 64 4410 2 2 0 95 4 1048 0 14 634 134 1060 19 124 220 69 6092 2 2 0 96 5 42803 0 197 367 26 1089 36 141 253 59 5129 8 6 0 85 6 5150 0 16 491 10 885 16 131 197 59 3404 2 3 0 95 7 4369 0 250 329 3 1001 14 125 196 78 4407 3 2 0 95 March 31, 2026 at 06:35:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 70 2120 106 60 0 3 4 0 616 0 1 0 99 1 0 0 0 26 3 2 0 1 1 0 1 0 0 0 100 2 8 0 21 212 53 200 0 3 1 0 553 0 0 0 100 3 1 0 21 236 105 48 2 3 1 0 1107 0 0 0 100 4 23 0 7 256 112 44 0 1 5 0 44 0 0 0 99 5 6 0 7 30 7 6 0 1 1 0 9 0 0 0 100 6 23 0 0 30 2 14 0 0 1 0 22 0 0 0 100 7 0 0 0 32 3 10 0 1 3 0 164 0 0 0 100 March 31, 2026 at 06:35:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2186 108 28 0 0 5 0 603 0 1 0 99 1 0 0 0 78 0 0 0 0 0 0 0 0 0 0 100 2 0 0 21 283 52 210 1 0 0 0 528 0 0 0 100 3 0 0 3 286 104 34 1 0 1 0 1093 0 0 0 100 4 0 0 465 225 105 12 0 1 2 0 0 0 1 0 99 5 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 82 1 4 0 1 0 0 2 0 0 0 100 7 0 0 0 88 2 14 0 0 7 0 301 0 0 0 100 March 31, 2026 at 06:35:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 22 0 0 2 0 602 0 0 0 100 1 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 2 0 0 21 210 52 210 1 0 0 0 526 0 0 0 100 3 0 0 3 211 102 34 1 0 0 0 1095 0 0 0 100 4 0 0 3 215 105 8 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 16 2 14 0 0 2 0 314 0 0 0 100 March 31, 2026 at 06:35:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34270 0 40 2232 111 595 11 94 101 59 3348 7 7 0 85 1 865 0 22 161 0 513 6 98 79 62 2028 1 1 0 98 2 1263 0 212 458 43 740 12 83 71 65 3009 1 1 0 98 3 1113 0 40 505 104 511 8 76 70 50 3326 1 1 0 98 4 3670 0 205 538 113 472 9 62 102 53 1718 2 2 0 97 5 10234 0 129 142 1 502 9 71 178 76 3068 2 3 0 96 6 7573 0 31 279 2 383 10 58 135 61 5049 2 2 0 96 7 1155 0 142 301 4 623 10 87 102 78 2016 1 1 0 99 March 31, 2026 at 06:35:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 394 0 70 2134 102 743 15 66 184 1 2767 1 2 0 97 1 176 0 0 114 4 805 10 43 118 1 1744 1 1 0 98 2 330 0 21 256 4 469 7 37 150 2 1723 1 1 0 99 3 543 0 45 583 157 726 9 29 119 3 2240 1 1 0 98 4 1002 0 3 583 160 574 3 33 145 0 1163 2 1 0 98 5 469 0 0 201 50 663 4 39 133 4 1077 1 1 0 99 6 654 0 0 231 2 421 7 33 110 3 674 1 0 0 99 7 344 0 7 261 2 506 3 30 144 0 1591 2 1 0 98 March 31, 2026 at 06:35:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2172 102 98 0 2 6 0 593 0 1 0 99 1 0 0 0 82 0 2 0 1 0 0 0 0 0 0 100 2 2 0 21 83 2 12 1 0 0 0 539 0 0 0 100 3 0 0 3 297 110 48 1 0 1 0 1102 0 0 0 99 4 0 0 465 261 106 54 0 2 1 0 13 0 0 0 100 5 0 0 0 187 58 104 0 1 1 0 0 0 0 0 100 6 0 0 0 85 3 12 0 0 0 0 18 0 0 0 100 7 0 0 0 97 2 20 0 1 2 0 351 0 0 0 100 March 31, 2026 at 06:35:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 51 0 3 4 0 595 0 0 0 100 1 0 0 0 11 1 4 0 1 1 0 0 0 0 0 100 2 0 0 21 8 3 6 1 0 0 0 524 0 0 0 100 3 0 0 3 225 110 48 1 0 1 0 1100 0 0 0 100 4 0 0 3 296 106 88 0 2 0 0 1 0 0 0 100 5 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 1 0 0 0 0 0 100 7 0 0 0 9 2 4 0 1 0 0 303 0 0 0 100 March 31, 2026 at 06:35:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 14 0 1 2 0 593 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 2 0 0 21 6 2 4 0 0 0 0 526 0 0 0 100 3 0 0 3 221 108 46 0 1 0 0 1099 0 0 0 100 4 0 0 3 318 104 112 0 1 0 0 0 0 0 0 100 5 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 12 1 6 1 0 4 0 309 0 0 0 100 March 31, 2026 at 06:35:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37197 0 52 2297 105 1115 37 156 147 67 6094 10 7 0 83 1 1846 0 10 451 4 856 22 137 109 52 3713 2 1 0 96 2 875 0 24 269 3 802 29 129 104 38 3233 1 1 0 98 3 978 0 74 585 111 663 19 78 75 41 5208 2 1 0 97 4 2728 0 368 470 111 878 11 92 141 58 3456 2 2 0 96 5 9480 0 28 398 9 693 15 85 163 70 3689 2 3 0 95 6 9071 0 257 317 8 803 25 119 174 66 3669 4 3 0 94 7 1566 0 27 507 37 892 19 103 112 69 3006 2 1 0 97 March 31, 2026 at 06:35:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2112 102 233 0 10 96 0 593 0 1 0 99 1 44 0 7 81 8 105 0 10 74 0 9 0 0 0 100 2 2 0 21 58 2 83 0 7 52 0 529 0 0 0 100 3 0 0 3 293 133 153 1 12 66 0 1091 0 0 0 100 4 0 0 3 297 133 116 0 10 75 0 0 0 0 0 100 5 0 0 0 68 1 91 0 10 44 0 0 0 0 0 100 6 0 0 0 66 2 100 0 12 67 0 2 0 0 0 100 7 0 0 0 159 52 180 0 7 53 0 296 0 0 0 100 March 31, 2026 at 06:35:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 102 120 0 2 4 0 594 0 1 0 99 1 0 0 0 98 8 18 0 1 1 0 10 0 0 0 100 2 0 0 21 88 4 16 1 0 1 0 538 0 0 0 100 3 0 0 4 285 104 36 1 0 1 0 1092 0 0 0 100 4 0 0 464 230 106 22 0 0 3 0 18 0 0 0 100 5 0 0 0 96 9 13 0 1 2 0 0 0 0 0 100 6 0 0 0 100 2 22 0 2 1 0 16 0 0 0 100 7 0 0 0 184 52 104 0 0 3 0 320 0 0 0 100 March 31, 2026 at 06:35:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 113 0 1 4 0 594 0 0 0 100 1 0 0 0 21 7 14 0 1 1 0 8 0 0 0 100 2 0 0 21 7 2 6 1 1 0 0 524 0 0 0 100 3 0 0 3 210 103 34 0 0 0 0 1091 0 0 0 100 4 0 0 3 215 104 6 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 6 0 1 0 0 2 0 0 0 100 7 0 0 0 108 51 102 1 0 4 0 282 0 0 0 100 March 31, 2026 at 06:35:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1575 0 32 2234 105 1210 40 197 150 80 5213 2 2 0 96 1 1462 0 191 537 9 896 28 140 80 50 4039 2 1 0 97 2 2395 0 46 533 4 926 34 129 105 53 3817 2 2 0 96 3 34661 0 78 370 104 1009 35 158 80 48 5295 8 6 0 86 4 3553 0 134 623 107 795 19 124 101 56 4012 4 2 0 94 5 10749 0 189 499 31 932 29 111 204 70 4598 3 3 0 94 6 8080 0 19 456 3 771 28 115 188 75 4641 3 2 0 95 7 1603 0 124 279 21 849 19 112 112 59 3518 2 1 0 96 March 31, 2026 at 06:35:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 102 130 0 3 5 0 603 0 0 0 100 1 0 0 7 33 3 10 0 2 0 0 21 0 0 0 100 2 12 0 21 25 3 8 0 1 0 0 533 0 0 0 100 3 0 0 87 217 104 40 1 0 5 0 1110 0 1 0 99 4 0 0 3 233 105 18 0 2 5 0 18 0 0 0 100 5 70 0 0 134 56 117 0 1 0 0 18 0 0 0 100 6 0 0 0 25 1 10 0 1 2 0 9 0 0 0 100 7 0 0 0 26 2 8 0 2 4 0 251 0 0 0 100 March 31, 2026 at 06:35:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2160 102 233 0 9 118 0 594 0 1 0 99 1 0 0 0 117 2 109 0 5 71 0 0 0 0 0 100 2 0 0 21 99 3 102 0 6 65 0 528 0 0 0 100 3 0 0 3 336 130 148 0 3 99 0 1091 0 0 0 99 4 0 0 346 305 130 143 0 7 94 0 0 0 1 0 99 5 0 0 0 218 56 212 0 8 65 0 9 0 0 0 100 6 0 0 0 94 1 85 0 4 63 0 1 0 0 0 100 7 0 0 0 103 1 88 0 5 89 0 292 0 0 0 100 March 31, 2026 at 06:35:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 102 40 0 1 6 0 593 0 0 0 99 1 0 0 0 27 2 6 0 1 0 0 1 0 0 0 100 2 0 0 21 111 3 95 1 3 0 0 536 0 0 0 100 3 0 0 3 230 103 32 1 0 0 0 1091 0 0 0 100 4 0 0 122 225 105 26 0 1 1 0 13 0 0 0 100 5 0 0 0 139 61 112 0 0 0 0 8 0 0 0 100 6 0 0 0 30 3 12 0 0 0 0 18 0 0 0 100 7 0 0 0 28 1 4 1 0 5 0 322 0 0 0 100 March 31, 2026 at 06:35:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2178 0 205 2246 106 1473 61 276 113 75 6001 3 2 0 94 1 2720 0 208 637 9 1154 39 183 132 81 4502 3 2 0 95 2 956 0 47 730 3 1226 36 194 101 68 4511 2 2 0 97 3 3426 0 76 516 103 1282 42 220 103 63 5217 3 2 0 95 4 33818 0 34 499 108 1007 50 180 117 36 4448 8 7 0 85 5 8552 0 240 517 40 1052 36 150 153 60 4691 4 3 0 93 6 4866 0 12 517 1 920 28 127 160 53 3415 2 2 0 96 7 7058 0 30 520 10 828 28 111 178 51 6875 3 2 0 94 March 31, 2026 at 06:35:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 70 2114 106 134 0 5 8 0 612 0 1 0 99 1 24 0 7 140 54 122 0 3 0 0 17 0 0 0 100 2 9 0 21 25 3 10 1 1 0 0 552 0 0 0 100 3 70 0 17 234 107 45 1 1 0 0 1129 0 0 0 100 4 21 0 3 239 107 14 0 0 0 0 9 0 0 0 100 5 0 0 0 28 2 12 0 0 6 0 27 0 0 0 100 6 0 0 0 29 3 10 0 1 0 0 9 0 0 0 100 7 4 0 0 24 1 5 0 1 3 0 119 0 0 0 100 March 31, 2026 at 06:35:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2178 103 119 0 1 6 0 596 0 1 0 99 1 0 0 0 184 51 106 0 1 0 0 0 0 0 0 100 2 0 0 21 85 3 6 0 1 0 0 529 0 0 0 100 3 0 0 3 295 109 46 1 0 0 0 1107 0 0 0 99 4 0 0 3 285 104 6 0 0 0 0 0 0 0 0 100 5 0 0 462 15 1 6 0 0 2 0 0 0 0 0 100 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 79 1 2 0 0 0 0 305 0 0 0 100 March 31, 2026 at 06:35:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 205 0 11 111 0 594 0 0 0 99 1 0 0 0 162 52 194 0 7 81 0 0 0 0 0 100 2 0 0 21 64 2 115 1 10 76 0 526 0 0 0 100 3 0 0 3 294 136 174 1 6 75 0 1104 0 0 0 99 4 0 0 3 289 132 121 0 8 109 0 0 0 0 0 100 5 0 0 0 53 1 96 0 7 66 0 0 0 0 0 100 6 0 0 0 42 2 71 0 7 55 0 2 0 0 0 100 7 0 0 0 49 1 85 1 5 52 0 286 0 0 0 100 March 31, 2026 at 06:35:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3004 0 42 2263 104 576 13 82 89 49 3877 2 2 0 95 1 894 0 45 387 49 596 9 77 64 53 2818 1 1 0 98 2 1205 0 150 146 7 457 8 71 65 46 2247 1 1 0 98 3 1589 0 169 430 113 405 3 52 44 40 3397 1 1 0 97 4 381 0 8 446 107 394 4 60 44 39 1136 0 1 0 99 5 219 0 14 215 11 356 9 60 67 33 1896 0 1 0 99 6 7305 0 194 203 1 351 7 58 133 39 2160 1 2 0 97 7 14418 0 6 201 3 389 9 57 95 62 2035 3 2 0 95 March 31, 2026 at 06:35:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 550 0 1 2164 103 782 17 79 63 19 2360 1 1 0 98 1 620 0 77 261 5 482 16 56 75 13 1465 1 1 0 98 2 1655 0 21 66 3 522 19 58 46 17 3032 2 1 0 97 3 1656 0 214 442 108 478 5 32 65 21 1592 2 1 0 97 4 505 0 3 390 108 376 4 38 46 17 2334 1 1 0 98 5 596 0 1 374 48 599 12 36 67 18 1534 1 1 0 98 6 2735 0 2 53 1 290 11 40 80 11 1315 1 1 0 98 7 27040 0 20 116 1 410 12 29 96 10 2410 7 5 0 88 March 31, 2026 at 06:35:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 102 118 0 1 1 0 775 0 1 0 99 1 44 0 0 106 9 22 0 1 1 0 303 0 0 0 100 2 2 0 21 81 2 8 1 2 0 0 529 0 0 0 100 3 0 0 3 285 101 10 0 0 0 0 0 0 0 0 100 4 0 0 3 288 105 38 1 0 0 0 1088 0 0 0 100 5 0 0 462 106 46 92 0 0 1 0 0 0 0 0 100 6 0 0 0 90 5 12 0 1 0 0 0 0 0 0 100 7 0 0 0 79 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 70 1 1 1 0 454 0 0 0 100 1 0 0 0 58 7 56 0 3 0 0 302 0 0 0 100 2 0 0 21 18 3 10 1 1 0 0 525 0 0 0 100 3 0 0 3 208 101 2 0 1 0 0 0 0 0 0 100 4 0 0 3 217 105 38 1 0 1 0 1088 0 0 0 100 5 0 0 0 9 1 4 0 1 1 0 0 0 0 0 100 6 0 0 0 106 50 102 0 1 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 1 0 0 3 0 0 0 100 March 31, 2026 at 06:35:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 135 0 13 92 0 614 0 1 0 99 1 0 0 0 170 8 220 0 13 93 0 302 0 0 0 100 2 0 0 21 79 2 135 0 11 82 0 524 0 0 0 100 3 0 0 3 297 138 152 0 11 84 0 0 0 0 0 100 4 0 0 3 306 143 162 1 9 84 0 1088 0 0 0 100 5 0 0 0 61 1 107 0 8 57 0 0 0 0 0 100 6 0 0 0 86 20 124 0 6 72 0 0 0 0 0 100 7 0 0 0 111 31 154 0 9 68 0 0 0 0 0 100 March 31, 2026 at 06:35:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39882 0 151 2219 106 1216 30 187 191 68 5435 8 8 0 83 1 2371 0 205 274 20 1154 26 148 132 56 3708 2 2 0 97 2 905 0 37 318 32 1037 23 123 109 57 4241 2 1 0 97 3 3334 0 82 803 104 918 23 120 97 47 2731 2 1 0 96 4 3068 0 193 474 110 1045 13 104 126 71 6845 4 2 0 94 5 1073 0 20 297 11 1016 28 121 111 57 3935 2 2 0 97 6 5779 0 20 484 4 922 16 83 179 57 5186 3 2 0 95 7 7618 0 132 429 14 889 18 100 183 66 4127 3 2 0 95 March 31, 2026 at 06:35:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 103 40 0 1 2 0 596 0 0 0 100 1 0 0 70 13 2 8 0 1 7 0 294 0 1 0 99 2 2 0 21 121 52 106 0 0 0 0 527 0 0 0 100 3 0 0 9 296 101 82 0 3 0 0 2 0 0 0 100 4 0 0 4 234 106 40 0 1 0 0 1097 0 0 0 100 5 0 0 0 25 3 12 0 0 6 0 6 0 0 0 100 6 0 0 0 20 1 4 0 0 1 0 0 0 0 0 100 7 44 0 0 33 6 26 0 2 2 0 11 0 0 0 100 March 31, 2026 at 06:35:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 102 14 1 1 1 0 559 0 1 0 99 1 0 0 42 157 4 86 0 2 3 0 295 0 1 0 99 2 0 0 21 183 52 108 0 1 0 0 524 0 0 0 100 3 0 0 3 305 101 26 0 1 0 0 0 0 0 0 100 4 0 0 3 286 104 36 1 1 0 0 1093 0 0 0 100 5 0 0 462 17 2 8 0 0 2 0 0 0 0 0 100 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 89 6 12 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:35:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 16 0 1 0 0 602 0 0 0 100 1 0 0 0 111 3 106 0 0 0 0 315 0 0 0 100 2 0 0 21 109 52 104 2 0 0 0 525 0 0 0 100 3 0 0 3 217 103 11 0 2 0 0 1 0 0 0 100 4 0 0 3 213 104 34 1 0 0 0 1095 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 20 5 16 0 0 0 0 8 0 0 0 100 March 31, 2026 at 06:36:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6803 0 35 2309 107 1302 37 215 277 57 5730 4 3 0 93 1 8457 0 129 425 7 1291 39 196 263 56 5819 3 3 0 94 2 5717 0 238 349 34 1269 35 202 212 79 4745 3 2 0 95 3 1892 0 176 483 148 1218 33 179 176 88 4333 2 2 0 96 4 1504 0 13 708 135 948 15 115 145 60 4118 3 1 0 96 5 914 0 11 432 4 850 14 110 142 45 2839 1 1 0 98 6 2115 0 197 414 1 762 25 101 169 47 3253 2 2 0 96 7 36112 0 33 199 5 917 31 115 220 58 4848 8 7 0 85 March 31, 2026 at 06:36:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 70 2111 102 132 0 3 7 0 540 0 1 0 99 1 50 0 0 48 7 34 0 1 7 0 332 0 0 0 100 2 6 0 21 25 4 8 0 0 1 0 548 0 0 0 100 3 21 0 17 326 154 110 0 1 1 0 27 0 0 0 100 4 25 0 10 242 105 55 1 3 2 0 1127 0 0 0 99 5 1 0 0 45 12 25 1 2 1 0 21 0 0 0 100 6 11 0 0 25 2 4 0 0 1 0 10 0 0 0 100 7 6 0 0 28 2 7 1 2 1 0 14 0 0 0 100 March 31, 2026 at 06:36:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2174 102 115 1 1 3 0 598 0 1 0 99 1 0 0 462 34 8 22 0 1 3 0 303 0 0 0 100 2 0 0 21 83 2 12 0 1 0 0 529 0 0 0 100 3 0 0 3 376 150 100 0 0 0 0 0 0 0 0 100 4 0 0 3 295 105 39 1 1 0 0 1096 0 0 0 100 5 0 0 0 84 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 79 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:36:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 111 0 1 3 0 614 0 0 0 100 1 0 0 0 23 7 18 0 1 1 0 302 0 0 0 100 2 0 0 21 9 2 6 1 1 0 0 525 0 0 0 100 3 0 0 3 305 150 100 0 0 0 0 0 0 0 0 100 4 0 0 3 223 105 46 0 2 2 0 1098 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1269 0 18 2227 103 1064 21 177 156 73 5349 2 2 0 96 1 44343 0 312 347 11 1007 34 153 223 68 6619 9 8 0 82 2 6314 0 37 500 2 807 23 122 167 66 4375 2 2 0 96 3 2211 0 187 457 140 921 20 141 129 72 3701 2 2 0 96 4 1693 0 218 698 115 952 26 129 84 69 4567 2 2 0 96 5 1531 0 14 417 3 779 23 117 91 59 3213 3 1 0 96 6 5081 0 27 436 1 688 11 87 100 47 2797 4 1 0 95 7 1595 0 14 362 3 615 13 95 93 53 2718 2 1 0 97 March 31, 2026 at 06:36:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 103 227 0 8 87 0 551 0 1 0 99 1 10 0 0 68 2 99 0 12 86 0 316 0 0 0 100 2 7 0 21 77 3 116 1 11 77 0 538 0 0 0 100 3 68 0 17 296 134 110 0 12 103 0 21 0 0 0 100 4 2 0 73 403 184 255 1 12 95 0 1127 0 1 0 99 5 1 0 7 87 3 127 0 8 80 0 20 0 0 0 100 6 0 0 0 61 2 79 0 7 56 0 20 0 0 0 100 7 22 0 0 67 3 89 0 5 53 0 10 0 0 0 100 March 31, 2026 at 06:36:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 102 114 1 1 0 0 625 0 1 0 99 1 0 0 462 21 2 16 0 1 2 0 307 0 0 0 100 2 3 0 21 89 3 10 0 1 0 0 529 0 0 0 100 3 0 0 3 290 107 12 0 0 0 0 9 0 0 0 100 4 1 0 45 356 139 116 0 0 3 0 1124 0 1 0 99 5 0 0 0 137 26 64 1 2 0 0 10 0 0 0 100 6 0 0 0 78 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 82 1 6 0 0 1 0 2 0 0 0 100 March 31, 2026 at 06:36:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 38 0 1 1 0 580 0 0 0 100 1 0 0 0 92 3 87 0 3 3 0 294 0 0 0 100 2 0 0 21 9 2 6 1 1 0 0 526 0 0 0 100 3 0 0 3 217 106 10 0 0 0 0 8 0 0 0 100 4 0 0 3 215 105 36 1 0 0 0 1106 0 0 0 100 5 0 0 0 49 20 42 0 0 0 0 0 0 0 0 100 6 0 0 0 68 31 64 0 1 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 8 2137 102 151 0 27 49 13 1030 0 1 0 99 1 3954 0 119 177 4 235 1 19 94 21 1339 1 2 0 98 2 88 0 38 75 3 116 1 22 22 22 809 0 0 0 100 3 38 0 12 302 109 156 0 22 17 20 284 0 0 0 100 4 39 0 15 277 104 130 2 12 16 14 1337 0 0 0 99 5 159 0 0 69 3 86 0 10 19 24 1689 0 0 0 99 6 42 0 26 172 50 210 1 18 15 15 268 0 1 0 99 7 14 0 2 60 1 59 0 12 17 10 191 0 0 0 100 March 31, 2026 at 06:36:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3030 0 193 2198 105 904 22 133 126 46 5554 4 2 0 94 1 9785 0 149 223 6 952 24 141 152 45 3932 2 2 0 95 2 39328 0 107 330 42 970 27 123 167 41 4567 9 7 0 84 3 1556 0 50 650 106 896 9 112 101 66 2851 2 1 0 97 4 578 0 5 445 109 807 22 102 59 41 3663 1 1 0 98 5 677 0 10 259 2 502 10 76 40 31 2221 1 1 0 98 6 4216 0 208 238 3 564 6 69 57 38 3086 3 2 0 95 7 971 0 4 126 9 649 4 78 66 30 2595 1 1 0 98 March 31, 2026 at 06:36:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 102 127 1 7 110 0 702 0 1 0 99 1 0 0 0 131 2 97 0 7 71 0 294 0 0 0 100 2 4 0 63 308 52 288 0 10 62 0 528 0 1 0 99 3 0 0 465 282 129 96 0 8 79 0 0 0 1 0 99 4 0 0 3 353 130 129 1 8 67 0 1102 0 1 0 99 5 0 0 0 153 3 146 0 10 82 0 0 0 0 0 100 6 44 0 0 133 6 101 0 7 61 0 9 0 0 0 100 7 0 0 0 123 1 89 0 12 79 0 2 0 0 0 100 March 31, 2026 at 06:36:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 24 0 0 1 0 505 0 0 0 100 1 0 0 0 16 3 12 0 0 1 0 306 0 0 0 100 2 0 0 21 212 53 206 1 0 1 0 525 0 0 0 100 3 0 0 7 213 102 10 0 1 1 0 1 0 0 0 100 4 0 0 7 223 104 48 0 0 1 0 1127 0 0 0 100 5 0 0 0 34 13 24 0 0 2 0 10 0 0 0 100 6 0 0 0 20 7 12 0 0 1 0 9 0 0 0 100 7 0 0 0 11 1 2 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:36:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2106 102 12 0 1 1 0 565 0 0 0 100 1 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 2 0 0 21 212 52 210 1 1 0 0 524 0 0 0 100 3 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 4 0 0 3 216 104 42 1 1 0 0 1104 0 0 0 100 5 0 0 0 12 3 8 0 0 0 0 0 0 0 0 100 6 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:36:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35583 0 21 2233 103 1215 34 193 190 74 7142 9 7 0 84 1 7672 0 193 192 4 1022 30 162 178 61 4467 3 3 0 95 2 5452 0 34 315 19 1201 23 147 152 69 6104 3 2 0 95 3 4408 0 84 785 110 936 26 114 129 55 3636 3 2 0 95 4 3918 0 46 739 106 1010 21 127 110 68 4414 3 2 0 95 5 3746 0 138 293 6 942 11 119 98 56 3746 4 2 0 95 6 640 0 5 314 33 1004 19 115 93 39 2806 2 1 0 98 7 2649 0 328 233 1 881 19 105 92 48 3724 2 2 0 96 March 31, 2026 at 06:36:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 7 2132 108 24 1 2 2 0 571 0 0 0 99 1 0 0 0 23 2 6 0 1 0 0 294 0 0 0 100 2 3 0 21 18 2 4 0 0 0 0 526 0 0 0 100 3 0 0 3 219 101 4 0 0 6 0 0 0 0 0 100 4 0 0 3 226 104 36 1 0 1 0 1091 0 0 0 100 5 0 0 70 122 3 121 0 1 6 0 0 0 1 0 99 6 0 0 0 120 50 102 0 1 0 0 0 0 0 0 100 7 0 0 0 22 2 6 0 0 0 0 3 0 0 0 100 March 31, 2026 at 06:36:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2197 108 142 0 9 109 0 627 0 1 0 99 1 0 0 0 125 2 92 0 9 68 0 294 0 0 0 100 2 0 0 21 135 2 118 0 9 77 0 528 0 0 0 100 3 0 0 465 308 135 145 0 14 88 0 0 0 0 0 100 4 0 0 3 317 137 148 0 7 101 0 1091 0 1 0 99 5 0 0 42 246 3 231 0 6 59 0 0 0 1 0 99 6 0 0 0 185 51 201 0 10 111 0 0 0 0 0 100 7 0 0 0 127 0 105 0 9 75 0 0 0 0 0 100 March 31, 2026 at 06:36:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 22 0 0 2 0 632 0 0 0 100 1 0 0 0 14 2 12 1 0 0 0 304 0 0 0 100 2 0 0 21 7 2 4 1 0 0 0 524 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 221 104 48 1 1 1 0 1114 0 0 0 100 5 0 0 0 133 12 128 0 0 0 0 10 0 0 0 100 6 0 0 0 109 51 102 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:36:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34882 0 218 2221 109 1157 34 173 85 62 4947 8 8 0 84 1 1657 0 10 507 2 1013 21 105 171 60 5234 2 2 0 96 2 11280 0 266 485 3 1001 32 130 153 94 6832 3 3 0 93 3 10049 0 68 755 102 818 19 120 188 75 3725 4 2 0 94 4 1303 0 15 673 106 848 16 111 76 58 3873 2 1 0 97 5 982 0 11 467 2 768 18 98 77 56 3072 2 1 0 97 6 884 0 12 483 51 833 13 90 109 44 2824 1 1 0 97 7 2645 0 199 434 2 807 14 81 84 50 2892 2 2 0 96 March 31, 2026 at 06:36:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 70 2111 102 122 1 2 7 0 516 0 1 0 99 1 21 0 0 38 7 22 0 2 10 0 312 0 0 0 100 2 9 0 28 28 3 13 1 5 0 0 530 0 0 0 100 3 25 0 17 226 104 6 0 1 3 0 9 0 0 0 100 4 0 0 3 229 104 40 0 0 0 0 1107 0 0 0 100 5 0 0 0 30 5 12 0 1 1 0 10 0 0 0 100 6 6 0 0 132 52 113 0 3 0 0 22 0 0 0 100 7 44 0 0 38 7 20 0 2 0 0 15 0 0 0 100 March 31, 2026 at 06:36:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2176 103 116 0 1 3 0 607 0 1 0 99 1 0 0 462 19 3 8 0 0 2 0 315 0 0 0 100 2 0 0 21 80 2 6 0 0 0 0 529 0 0 0 100 3 0 0 3 281 102 4 0 1 0 0 1 0 0 0 100 4 0 0 3 287 104 34 1 0 1 0 1090 0 0 0 100 5 0 0 0 84 4 6 0 0 0 0 0 0 0 0 100 6 0 0 0 188 51 107 0 1 0 0 0 0 0 0 100 7 0 0 0 89 6 12 0 0 0 0 9 0 0 0 100 March 31, 2026 at 06:36:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 222 0 7 96 0 595 0 0 0 99 1 0 0 0 46 3 75 0 5 74 0 294 0 0 0 100 2 0 0 21 61 2 110 1 9 80 0 524 0 0 0 100 3 0 0 3 292 131 131 0 12 84 0 0 0 0 0 100 4 0 0 3 292 135 130 1 8 57 0 1091 0 0 0 100 5 0 0 0 58 3 95 0 8 44 0 1 0 0 0 100 6 0 0 0 170 51 215 0 5 60 0 0 0 0 0 100 7 0 0 0 55 5 90 0 7 83 0 9 0 0 0 100 March 31, 2026 at 06:36:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2115 0 134 2219 103 641 15 92 87 72 3932 2 2 0 96 1 419 0 14 400 4 615 9 96 86 65 2284 1 1 0 98 2 1134 0 224 303 3 629 10 76 92 60 2433 1 2 0 98 3 45058 0 64 437 103 529 19 87 206 65 3850 9 8 0 84 4 6383 0 199 436 104 446 12 54 154 67 5182 2 2 0 96 5 1158 0 144 280 16 534 6 69 91 65 2986 1 1 0 98 6 624 0 25 337 52 642 7 78 76 64 1568 1 1 0 98 7 3146 0 19 337 9 472 4 53 75 45 1445 2 1 0 98 March 31, 2026 at 06:36:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 770 0 0 2177 148 575 14 54 25 2 1610 1 1 0 98 1 909 0 0 357 6 609 17 51 49 6 2173 1 1 0 99 2 224 0 91 254 5 478 11 47 13 2 2269 1 1 0 98 3 544 0 30 239 104 513 16 50 26 6 1521 2 1 0 98 4 485 0 11 406 105 379 11 31 21 3 2080 1 1 0 98 5 129 0 0 223 3 401 5 27 17 0 932 0 0 0 99 6 66 0 0 36 3 411 3 22 7 0 1656 1 0 0 99 7 818 0 0 124 4 220 7 26 46 4 1034 2 0 0 98 March 31, 2026 at 06:36:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2228 151 110 0 0 3 0 352 0 1 0 99 1 0 0 0 190 5 114 0 0 1 0 594 0 0 0 100 2 2 0 63 76 2 6 1 0 2 0 531 0 1 0 99 3 0 0 465 226 107 16 0 1 2 0 9 0 0 0 100 4 0 0 3 287 104 36 1 1 0 0 1094 0 0 0 100 5 0 0 0 83 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 82 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 81 0 8 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:36:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 151 128 0 1 0 0 303 0 0 0 100 1 0 0 0 115 3 112 0 0 1 0 594 0 0 0 100 2 0 0 21 9 2 4 1 0 0 0 526 0 0 0 100 3 0 0 3 218 107 12 0 0 0 0 8 0 0 0 100 4 0 0 3 213 104 34 1 0 0 0 1094 0 0 0 100 5 0 0 0 12 3 8 0 0 0 0 1 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 6 0 0 3 0 3 0 0 0 100 March 31, 2026 at 06:36:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 131 185 0 11 99 0 312 0 1 0 99 1 0 0 0 199 23 241 0 10 69 0 595 0 0 0 100 2 0 0 21 59 2 104 0 8 103 0 525 0 0 0 100 3 0 0 3 300 138 125 0 12 58 0 7 0 0 0 100 4 0 0 3 291 135 128 2 10 64 0 1094 0 0 0 100 5 0 0 0 58 2 106 0 11 65 0 0 0 0 0 100 6 0 0 0 58 0 115 0 11 82 0 0 0 0 0 100 7 0 0 0 38 0 66 0 6 57 0 0 0 0 0 100 March 31, 2026 at 06:36:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1742 0 209 2209 104 1066 29 162 122 81 3740 2 2 0 96 1 1505 0 22 355 21 1047 24 132 93 56 4918 3 2 0 95 2 1131 0 35 243 4 1035 15 112 73 46 3910 3 1 0 96 3 4570 0 184 665 144 855 20 85 138 48 5249 3 2 0 95 4 43341 0 332 503 106 766 29 84 169 51 5953 8 8 0 83 5 8224 0 22 354 11 787 20 103 198 55 3289 3 2 0 95 6 2699 0 17 492 3 914 14 90 120 85 2713 2 1 0 97 7 742 0 18 231 2 668 13 85 83 50 2142 1 1 0 98 March 31, 2026 at 06:36:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2107 101 8 0 1 6 0 323 0 1 0 99 1 0 0 0 28 2 12 0 2 6 0 594 0 0 0 100 2 2 0 21 124 3 111 0 1 0 0 529 0 0 0 100 3 0 0 3 325 151 110 0 2 1 0 0 0 0 0 100 4 44 0 3 241 111 50 1 1 0 0 1105 0 0 0 100 5 0 0 0 23 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 18 0 2 0 1 0 0 0 0 0 0 100 7 0 0 7 16 0 2 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:36:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2172 101 12 0 1 2 0 306 0 1 0 99 1 0 0 462 20 3 10 0 0 4 0 595 0 0 0 100 2 1 0 21 185 3 112 1 0 0 0 603 0 0 0 99 3 0 0 4 379 150 100 0 0 0 0 0 0 0 0 100 4 0 0 2 305 114 54 1 0 0 0 1106 0 0 0 99 5 0 0 0 82 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 81 1 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:36:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 87 0 1 1 0 317 0 0 0 100 1 0 0 0 11 2 6 0 0 1 0 594 0 0 0 100 2 0 0 21 42 3 34 2 0 0 0 525 0 0 0 100 3 0 0 3 309 151 104 0 1 0 0 1 0 0 0 100 4 0 0 3 226 110 46 1 0 1 0 1101 0 0 0 100 5 0 0 0 16 2 18 0 1 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1509 0 20 2238 103 1446 40 196 214 66 5700 3 2 0 95 1 2560 0 355 474 5 892 21 140 176 64 4655 2 2 0 95 2 5893 0 31 517 3 1011 17 123 215 50 4477 2 2 0 96 3 3233 0 59 452 155 977 28 144 260 66 3593 2 2 0 96 4 9144 0 141 795 143 997 24 126 209 78 5256 5 3 0 92 5 5914 0 17 525 3 839 21 106 231 58 2835 3 2 0 95 6 659 0 10 475 2 965 13 113 166 51 3175 2 1 0 98 7 35114 0 213 310 22 1089 28 117 156 59 4379 8 7 0 85 March 31, 2026 at 06:36:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2120 102 123 0 3 2 0 321 0 0 0 99 1 0 0 77 27 3 22 0 2 8 0 624 0 1 0 99 2 30 0 21 36 7 18 0 0 7 0 540 0 0 0 100 3 26 0 21 223 102 4 0 1 2 0 11 0 0 0 100 4 0 0 7 238 106 52 1 0 1 0 1113 0 0 0 100 5 0 0 0 42 11 27 0 2 3 0 33 0 0 0 100 6 44 0 0 34 6 14 0 2 1 0 21 0 0 0 100 7 0 0 0 136 52 111 0 2 3 0 1 0 0 0 100 March 31, 2026 at 06:36:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 29 2159 102 118 0 1 5 0 307 0 1 0 99 1 0 0 0 74 2 10 0 1 0 0 594 0 0 0 100 2 0 0 364 18 3 18 0 1 5 0 528 0 0 0 100 3 0 0 3 259 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 268 104 34 1 0 0 0 1092 0 0 0 100 5 0 0 0 70 2 16 0 0 0 0 0 0 0 0 100 6 0 0 0 70 6 12 0 0 0 0 9 0 0 0 100 7 0 0 0 161 51 102 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 101 116 0 1 1 0 306 0 0 0 100 1 0 0 0 27 2 4 0 0 0 0 594 0 0 0 100 2 9 0 140 9 3 8 0 0 1 0 525 0 0 0 100 3 0 0 3 223 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 232 105 36 1 0 0 0 1092 0 0 0 100 5 0 0 0 35 2 16 0 0 0 0 0 0 0 0 100 6 0 0 0 32 5 10 0 0 0 0 8 0 0 0 100 7 0 0 0 131 51 105 0 2 0 0 0 0 0 0 100 March 31, 2026 at 06:36:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34246 0 37 2269 105 1580 63 284 117 63 5923 8 8 0 84 1 4798 0 227 770 2 1388 48 220 96 47 5506 5 3 0 93 2 3455 0 37 628 9 1317 40 188 151 48 6818 3 2 0 95 3 8625 0 356 763 102 1108 28 176 166 63 5925 4 3 0 94 4 8232 0 34 767 105 1136 33 163 153 54 5837 5 2 0 93 5 2106 0 120 518 10 1121 31 141 110 71 5161 3 1 0 96 6 1117 0 13 181 8 1219 32 156 102 67 4251 2 2 0 96 7 1279 0 17 641 37 1156 40 157 113 56 4310 3 1 0 96 March 31, 2026 at 06:36:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2130 104 157 0 9 105 0 231 0 1 0 99 1 0 0 70 146 5 183 0 10 102 0 624 0 1 0 99 2 7 0 28 175 53 203 0 7 76 0 544 0 0 0 100 3 0 0 17 293 129 101 1 10 102 0 33 0 0 0 100 4 23 0 3 297 131 124 1 8 125 0 1119 0 0 0 99 5 8 0 0 85 4 122 0 4 79 0 11 0 0 0 100 6 45 0 0 96 6 138 0 8 97 0 14 0 0 0 100 7 6 0 0 72 1 102 0 10 106 0 7 0 0 0 100 March 31, 2026 at 06:36:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 102 12 0 0 1 0 313 0 0 0 99 1 0 0 42 185 2 121 0 1 3 0 606 0 1 0 99 2 0 0 483 120 53 110 0 0 2 0 529 0 1 0 99 3 0 0 3 280 102 0 0 0 0 0 0 0 0 0 100 4 0 0 3 295 106 50 1 0 0 0 1110 0 0 0 100 5 0 0 0 96 8 20 0 1 0 0 20 0 0 0 100 6 0 0 0 93 6 20 0 1 0 0 9 0 0 0 100 7 0 0 0 82 1 6 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:36:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 106 40 0 2 5 0 325 0 0 0 100 1 0 0 0 103 4 99 0 8 1 0 594 0 0 0 100 2 0 0 28 114 54 116 0 3 1 0 550 0 0 0 100 3 0 0 3 214 102 12 0 5 4 0 0 0 0 0 100 4 0 0 3 228 105 51 1 6 2 0 1101 0 0 0 100 5 0 0 0 17 3 14 0 4 2 0 0 0 0 0 100 6 0 0 0 22 7 18 0 2 2 0 10 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:36:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1025 0 137 2148 102 415 11 72 55 33 1812 1 2 0 98 1 286 0 16 303 3 416 5 64 37 33 1869 0 0 0 99 2 1783 0 211 238 50 439 8 50 128 41 3951 2 1 0 97 3 6908 0 51 408 104 357 2 60 166 37 2310 1 2 0 97 4 5091 0 40 449 104 338 6 42 88 40 2648 2 2 0 96 5 342 0 12 215 3 327 3 42 45 31 1420 0 0 0 99 6 316 0 9 195 8 303 2 36 43 23 953 0 1 0 99 7 219 0 3 121 0 304 4 52 44 28 943 0 0 0 99 March 31, 2026 at 06:36:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35627 0 257 2149 102 801 29 119 96 26 4642 8 7 0 85 1 561 0 0 380 7 674 7 85 45 35 2513 1 1 0 98 2 244 0 33 77 2 539 15 87 65 27 2781 1 1 0 98 3 3824 0 149 487 104 505 7 61 65 30 2116 2 1 0 97 4 3057 0 8 520 111 668 23 90 105 28 3444 1 1 0 97 5 3529 0 14 305 6 470 4 64 76 30 1777 3 1 0 96 6 947 0 3 289 3 593 16 74 67 36 2160 2 1 0 97 7 789 0 2 180 45 654 16 81 59 35 2004 1 1 0 98 March 31, 2026 at 06:36:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2189 109 238 0 17 64 0 312 0 1 0 99 1 0 0 0 125 2 79 0 8 51 0 593 0 0 0 100 2 2 0 21 128 3 102 0 9 76 0 528 0 0 0 100 3 0 0 3 362 131 104 0 10 90 0 0 0 0 0 100 4 0 0 3 355 135 115 1 7 77 0 1087 0 1 0 99 5 0 0 0 143 4 125 0 11 79 0 1 0 0 0 100 6 0 0 0 132 0 106 0 9 70 0 0 0 0 0 100 7 0 0 462 164 50 202 0 10 54 0 0 0 0 0 100 March 31, 2026 at 06:36:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 106 129 0 1 0 0 165 0 0 0 100 1 1 0 0 21 3 20 0 2 1 0 607 0 0 0 100 2 0 0 21 15 4 6 0 1 1 0 525 0 0 0 100 3 0 0 3 208 102 2 0 0 1 0 1 0 0 0 100 4 0 0 3 225 107 52 0 0 1 0 1100 0 0 0 100 5 0 0 0 29 13 20 0 0 1 0 21 0 0 0 100 6 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 111 51 106 0 1 2 0 0 0 0 0 100 March 31, 2026 at 06:36:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 107 125 1 0 0 0 300 0 0 0 100 1 0 0 0 14 3 8 0 0 0 0 593 0 0 0 100 2 0 0 21 9 2 8 2 1 0 0 525 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 217 104 34 1 0 0 0 1087 0 0 0 100 5 0 0 0 12 3 8 0 0 0 0 0 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20029 0 13 2254 114 1145 37 191 603 50 4649 6 4 0 90 1 8078 0 369 229 7 1041 32 167 224 66 6323 4 3 0 94 2 29461 0 42 294 3 1125 32 154 752 69 5000 8 7 0 86 3 11492 0 432 456 110 946 25 147 409 67 4294 4 3 0 93 4 19032 0 34 792 106 929 21 116 525 70 5564 7 3 0 89 5 9401 0 16 565 30 972 22 106 357 68 3762 3 2 0 94 6 5501 0 23 308 2 901 23 126 517 57 2813 2 2 0 95 7 15796 0 21 443 14 807 28 103 367 71 3022 4 2 0 94 March 31, 2026 at 06:36:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 102 118 0 1 7 0 273 0 1 0 99 1 0 0 0 21 2 4 0 0 0 0 594 0 0 0 100 2 3 0 21 22 1 8 1 0 0 0 266 0 0 0 100 3 0 0 10 220 102 2 0 0 0 0 258 0 0 0 100 4 44 0 3 247 111 53 1 2 0 0 1097 0 0 0 99 5 0 0 0 60 21 44 0 0 0 0 0 0 0 0 100 6 0 0 0 81 31 64 0 1 0 0 0 0 0 0 100 7 0 0 70 10 1 4 0 0 6 0 1 0 0 0 100 March 31, 2026 at 06:36:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 462 2119 101 212 0 12 121 0 289 0 1 0 99 1 0 0 0 129 2 99 0 10 63 0 593 0 0 0 100 2 0 0 14 139 1 122 0 9 73 0 266 0 0 0 100 3 0 0 10 326 131 94 0 9 68 0 262 0 0 0 100 4 0 0 3 376 142 128 1 6 76 0 1098 0 0 0 99 5 0 0 0 133 3 108 0 8 59 0 0 0 0 0 100 6 0 0 0 191 51 195 0 5 49 0 0 0 0 0 100 7 0 0 42 128 0 109 0 6 60 0 0 0 0 0 100 March 31, 2026 at 06:36:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 1 1 0 0 302 0 0 0 100 1 0 0 0 14 2 12 0 0 1 0 607 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 10 207 102 2 0 0 0 0 259 0 0 0 100 4 0 0 3 242 112 65 0 1 0 0 1108 0 0 0 100 5 0 0 0 26 11 20 0 0 0 0 21 0 0 0 100 6 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 6 1 0 1 0 1 0 0 0 100 March 31, 2026 at 06:36:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2102 0 260 2205 102 1325 42 237 123 71 4646 2 3 0 95 1 2687 0 202 649 16 1002 27 168 103 54 4795 3 2 0 96 2 27853 0 210 220 3 1030 41 187 88 59 4426 8 7 0 85 3 1844 0 76 384 104 957 30 153 163 50 5714 3 2 0 95 4 9628 0 29 735 112 1034 22 128 213 69 6467 3 3 0 94 5 9395 0 34 341 3 829 28 125 185 55 3649 5 2 0 93 6 1748 0 6 519 38 968 21 119 121 72 3412 2 1 0 97 7 1389 0 20 448 2 845 30 119 76 63 3261 2 1 0 97 March 31, 2026 at 06:36:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 70 2113 104 131 1 2 5 0 239 0 1 0 99 1 9 0 0 140 56 116 0 2 5 0 606 0 0 0 100 2 8 0 21 34 3 20 1 1 0 0 288 0 0 0 100 3 0 0 24 224 103 8 0 2 0 0 264 0 0 0 100 4 0 0 3 228 104 38 1 1 0 0 1100 0 0 0 100 5 0 0 0 31 4 14 0 1 0 0 21 0 0 0 100 6 4 0 0 23 2 8 0 3 0 0 16 0 0 0 100 7 45 0 0 29 4 11 0 1 0 0 24 0 0 0 100 March 31, 2026 at 06:36:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2176 102 117 0 1 3 0 328 0 1 0 99 1 0 0 462 119 52 110 0 1 3 0 594 0 0 0 99 2 0 0 14 87 2 6 0 1 0 0 266 0 0 0 100 3 0 0 10 281 103 4 0 0 0 0 263 0 0 0 100 4 0 0 3 287 105 36 1 0 1 0 1088 0 0 0 99 5 0 0 0 84 3 8 0 0 0 0 0 0 0 0 100 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 89 6 12 0 0 0 0 9 0 0 0 100 March 31, 2026 at 06:36:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 249 1 15 85 0 293 0 1 0 99 1 0 0 0 170 54 209 0 8 83 0 594 0 0 0 100 2 0 0 14 64 1 118 1 10 73 0 266 0 0 0 100 3 0 0 10 288 134 125 0 11 85 0 259 0 0 0 100 4 0 0 3 286 136 118 0 10 64 0 1089 0 0 0 100 5 0 0 0 59 4 100 1 5 109 0 1 0 0 0 99 6 0 0 0 60 0 112 0 4 50 0 0 0 0 0 100 7 0 0 0 75 5 132 0 11 76 0 8 0 0 0 100 March 31, 2026 at 06:36:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1620 0 195 2211 102 729 16 115 77 75 3192 2 1 0 97 1 1289 0 125 257 53 744 9 97 93 67 3115 1 1 0 98 2 2017 0 219 166 3 572 8 77 76 54 2634 1 1 0 98 3 547 0 55 495 105 484 10 76 87 58 3547 1 1 0 98 4 2574 0 12 381 106 478 12 74 106 52 3847 1 2 0 97 5 7671 0 125 288 13 445 7 52 129 50 2326 2 2 0 96 6 7359 0 49 221 1 491 11 77 161 71 2640 3 2 0 95 7 29862 0 59 341 10 555 17 68 98 84 2959 8 6 0 86 March 31, 2026 at 06:36:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 764 0 70 2128 102 563 25 68 33 5 1669 1 1 0 98 1 246 0 0 47 6 490 13 46 34 2 2202 1 0 0 98 2 709 0 21 139 52 530 16 53 19 1 1846 1 1 0 99 3 396 0 36 395 102 353 12 35 12 3 1284 2 0 0 98 4 362 0 5 244 107 416 12 38 22 1 2221 1 1 0 98 5 661 0 0 194 6 379 10 37 36 5 985 1 0 0 98 6 183 0 0 34 3 315 13 39 9 1 1139 1 0 0 99 7 418 0 0 48 2 402 10 30 33 1 1490 1 0 0 99 March 31, 2026 at 06:36:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2172 101 116 0 1 3 0 316 0 1 0 99 1 0 0 0 82 2 4 0 0 1 0 593 0 0 0 100 2 2 0 14 193 52 117 0 1 0 0 266 0 0 0 100 3 0 0 10 279 102 2 0 0 0 0 262 0 0 0 100 4 0 0 3 286 105 36 0 0 0 0 1089 0 0 0 100 5 0 0 0 96 8 18 0 0 0 0 8 0 0 0 100 6 0 0 0 79 0 0 0 0 0 0 0 0 0 0 100 7 0 0 462 12 0 2 0 0 2 0 0 0 0 0 100 March 31, 2026 at 06:36:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 116 1 1 1 0 339 0 0 0 100 1 0 0 0 10 2 4 0 0 1 0 594 0 0 0 100 2 0 0 14 119 52 115 0 1 0 0 266 0 0 0 100 3 0 0 10 207 102 2 0 0 0 0 259 0 0 0 100 4 0 0 3 212 104 34 1 0 0 0 1087 0 0 0 100 5 0 0 0 25 10 19 0 0 0 0 9 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:36:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2110 101 214 0 12 93 0 284 0 0 0 100 1 0 0 0 60 3 89 0 6 84 0 593 0 0 0 100 2 0 0 14 149 52 182 0 6 58 0 266 0 0 0 100 3 0 0 9 288 131 123 1 9 66 0 259 0 0 0 100 4 0 0 4 284 134 133 1 12 89 0 1088 0 0 0 100 5 0 0 0 67 7 114 0 8 59 0 8 0 0 0 100 6 0 0 0 58 0 101 0 5 69 0 0 0 0 0 100 7 0 0 0 58 0 112 0 8 68 0 0 0 0 0 100 March 31, 2026 at 06:36:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28492 0 34 2245 104 1212 66 197 169 70 5914 9 8 0 83 1 2086 0 21 631 4 1033 24 155 101 46 4439 2 2 0 96 2 3527 0 54 544 9 939 28 127 125 65 3124 3 3 0 94 3 2982 0 367 641 110 842 25 111 86 53 4408 4 2 0 95 4 678 0 12 782 143 1020 30 114 163 57 4101 1 2 0 97 5 10361 0 128 475 16 906 32 114 187 63 6266 3 3 0 94 6 7573 0 202 499 4 786 23 113 166 62 4119 2 2 0 96 7 1104 0 12 212 2 941 21 114 126 57 3559 2 1 0 96 March 31, 2026 at 06:36:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 70 2120 109 109 0 1 5 0 286 0 1 0 99 1 0 0 0 47 2 30 0 0 1 0 602 0 0 0 100 2 2 0 14 32 4 20 1 1 0 0 272 0 0 0 100 3 0 0 10 222 102 8 0 1 0 0 263 0 0 0 100 4 0 0 10 318 150 130 0 1 0 0 1098 0 0 0 100 5 0 0 0 32 7 18 0 1 0 0 3 0 0 0 100 6 0 0 0 16 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 19 0 6 0 0 5 0 0 0 0 0 100 March 31, 2026 at 06:36:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2191 108 128 1 2 3 0 316 0 1 0 99 1 0 0 0 87 3 8 0 1 1 0 595 0 0 0 100 2 0 0 14 81 2 4 0 0 0 0 266 0 0 0 100 3 0 0 12 283 103 4 0 1 0 0 259 0 0 0 100 4 0 0 1 288 104 36 1 0 0 0 1098 0 0 0 100 5 0 0 7 119 20 44 0 1 0 0 0 0 0 0 100 6 0 0 0 141 31 64 0 1 0 0 0 0 0 0 100 7 0 0 462 13 0 2 0 0 2 0 0 0 0 0 100 March 31, 2026 at 06:36:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 108 128 0 0 1 0 325 0 0 0 100 1 0 0 0 14 3 8 0 0 2 0 616 0 0 0 100 2 0 0 14 14 2 16 0 1 0 0 266 0 0 0 100 3 0 0 10 210 103 4 0 0 0 0 260 0 0 0 100 4 0 0 3 213 104 34 1 0 0 0 1097 0 0 0 100 5 0 0 0 13 2 8 0 0 0 0 0 0 0 0 100 6 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3575 0 45 2288 127 1319 29 182 233 80 5779 3 2 0 94 1 4116 0 204 191 4 1126 22 155 151 70 4512 3 2 0 95 2 27507 0 31 241 5 1061 22 157 150 70 4276 8 6 0 86 3 3095 0 92 457 132 1036 10 127 195 57 3689 3 2 0 95 4 1120 0 154 686 135 880 19 98 209 42 4781 2 2 0 96 5 11597 0 29 301 4 959 17 123 328 67 4791 3 3 0 93 6 4343 0 12 265 23 890 5 112 211 69 3744 2 2 0 96 7 2179 0 301 440 12 925 13 110 153 74 2561 2 1 0 96 March 31, 2026 at 06:37:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2127 119 156 0 2 5 0 317 0 1 0 99 1 7 0 0 105 36 86 0 3 3 0 613 0 0 0 100 2 5 0 14 25 4 8 0 1 1 0 280 0 0 0 100 3 23 0 24 227 105 12 1 1 1 0 277 0 0 0 100 4 4 0 3 231 104 40 1 2 1 0 1095 0 0 0 100 5 0 0 0 43 10 26 0 1 2 0 15 0 0 0 100 6 46 0 7 44 9 32 0 1 1 0 32 0 0 0 100 7 0 0 0 31 2 12 0 1 6 0 9 0 0 0 100 March 31, 2026 at 06:37:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2141 102 116 1 1 5 0 343 0 1 0 99 1 0 0 0 146 52 106 0 1 3 0 595 0 0 0 100 2 0 0 14 53 3 8 1 1 0 0 266 0 0 0 100 3 0 0 10 245 102 4 0 0 0 0 262 0 0 0 100 4 0 0 3 250 103 42 0 1 0 0 1089 0 0 0 100 5 0 0 0 46 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 58 6 14 0 0 0 0 9 0 0 0 100 7 0 0 231 11 0 6 0 0 6 0 0 0 0 0 100 March 31, 2026 at 06:37:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2139 101 110 0 1 2 0 312 0 1 0 99 1 0 0 0 156 53 110 0 1 2 0 594 0 0 0 100 2 0 0 14 44 2 6 0 1 0 0 266 0 0 0 100 3 0 0 10 243 102 2 0 0 0 0 259 0 0 0 100 4 0 0 3 251 104 36 1 0 0 0 1088 0 0 0 100 5 0 0 0 47 2 8 0 1 0 0 0 0 0 0 100 6 0 0 0 51 5 10 0 0 0 0 8 0 0 0 100 7 0 0 231 9 0 2 0 0 2 0 0 0 0 0 100 March 31, 2026 at 06:37:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1981 0 269 2211 103 1216 28 153 151 84 3844 2 2 0 96 1 3571 0 36 657 38 896 18 105 109 45 3512 3 1 0 96 2 28155 0 282 180 5 931 30 128 137 56 3743 7 7 0 86 3 1659 0 73 600 112 774 19 108 104 59 2926 2 2 0 96 4 1943 0 120 621 108 738 18 79 141 45 2783 1 2 0 97 5 11942 0 45 475 2 595 15 77 178 57 5752 3 3 0 94 6 6068 0 20 368 8 590 10 74 135 53 3860 3 2 0 95 7 1689 0 125 331 2 708 16 95 104 73 4188 2 3 0 95 March 31, 2026 at 06:37:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 102 205 0 14 123 0 249 0 1 0 99 1 1 0 70 79 5 120 0 9 82 0 599 0 1 0 99 2 8 0 14 85 3 127 0 8 80 0 280 0 0 0 100 3 19 0 24 292 131 89 1 6 72 0 268 0 0 0 100 4 70 0 3 410 186 234 0 9 81 0 17 0 0 0 100 5 6 0 0 80 6 134 0 7 78 0 1096 0 0 0 99 6 0 0 7 80 2 117 0 10 64 0 1 0 0 0 100 7 24 0 0 80 2 119 0 8 68 0 12 0 0 0 100 March 31, 2026 at 06:37:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2173 102 120 1 1 3 0 320 0 1 0 99 1 0 0 0 88 2 14 0 1 1 0 606 0 0 0 100 2 0 0 14 88 3 8 1 2 0 0 266 0 0 0 100 3 0 0 10 280 102 2 0 0 0 0 262 0 0 0 100 4 0 0 3 390 157 112 0 0 0 0 10 0 0 0 100 5 0 0 0 106 13 58 1 0 0 0 1093 0 1 0 99 6 0 0 0 88 0 22 0 1 0 0 20 0 0 0 100 7 0 0 462 15 0 4 0 0 2 0 0 0 0 0 100 March 31, 2026 at 06:37:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 1 1 0 310 0 0 0 100 1 0 0 0 20 3 10 0 1 1 0 595 0 0 0 100 2 0 0 14 8 2 6 0 1 0 0 266 0 0 0 100 3 0 0 10 207 102 2 0 0 0 0 259 0 0 0 100 4 0 0 3 318 157 112 0 0 0 0 9 0 0 0 100 5 0 0 0 15 4 40 1 0 0 0 1081 0 0 0 99 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 420 0 38 2166 102 528 9 71 78 46 3363 1 2 0 98 1 432 0 5 159 3 331 12 63 40 26 1569 1 0 0 99 2 165 0 15 181 3 283 9 48 29 29 1166 0 0 0 99 3 1536 0 220 385 102 352 7 48 56 40 1831 1 1 0 98 4 504 0 28 507 155 425 10 51 61 39 1454 1 1 0 98 5 1674 0 33 195 5 297 7 52 64 26 2354 1 1 0 98 6 8710 0 140 201 3 370 8 49 131 35 2295 2 4 0 94 7 2613 0 5 130 1 451 6 66 84 55 1647 1 1 0 98 March 31, 2026 at 06:37:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34546 0 81 2184 103 843 37 111 85 46 3533 8 7 0 85 1 2393 0 15 151 5 699 15 97 71 26 2419 2 1 0 97 2 1157 0 18 321 4 549 22 67 70 19 1874 1 1 0 98 3 1019 0 153 531 105 611 13 64 62 16 2071 1 1 0 98 4 820 0 7 640 105 681 13 68 59 22 4002 1 1 0 98 5 874 0 183 97 23 709 12 52 44 31 3399 2 1 0 97 6 2787 0 11 325 32 552 9 57 88 27 1946 2 1 0 97 7 4265 0 6 86 2 634 19 67 105 24 2687 3 1 0 96 March 31, 2026 at 06:37:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 42 2189 108 132 1 10 108 0 308 0 1 0 99 1 0 0 0 126 1 88 0 11 63 0 294 0 0 0 100 2 4 0 14 136 2 117 1 4 52 0 268 0 0 0 100 3 0 0 10 360 134 109 0 7 80 0 262 0 0 0 100 4 0 0 3 454 137 214 0 13 74 0 300 0 0 0 100 5 0 0 0 144 4 150 1 10 88 0 1082 0 1 0 99 6 0 0 0 170 20 144 0 5 69 0 0 0 0 0 100 7 0 0 462 121 30 160 0 11 63 0 0 0 0 0 100 March 31, 2026 at 06:37:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 32 0 0 1 0 193 0 0 0 100 1 0 0 0 15 2 12 0 1 1 0 306 0 0 0 100 2 0 0 14 11 3 6 0 1 1 0 266 0 0 0 100 3 0 0 14 210 103 4 0 0 1 0 260 0 0 0 100 4 0 0 7 315 103 108 0 0 1 0 300 0 0 0 100 5 0 0 0 41 16 56 1 0 1 0 1092 0 0 0 100 6 0 0 0 14 1 12 0 1 1 0 25 0 0 0 100 7 0 0 0 111 51 102 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:37:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 107 20 0 0 0 0 287 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 2 0 0 14 9 2 6 0 1 0 0 266 0 0 0 100 3 0 0 10 211 102 10 0 1 0 0 259 0 0 0 100 4 0 0 3 314 103 108 0 0 0 0 300 0 0 0 100 5 0 0 0 17 4 40 1 0 0 0 1082 0 0 0 99 6 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35392 0 127 2235 111 1173 39 218 116 85 6618 9 7 0 84 1 3599 0 152 557 10 1009 23 130 112 57 5261 3 3 0 94 2 3759 0 29 324 6 948 30 160 98 64 3827 4 2 0 94 3 2877 0 85 558 128 1119 34 158 105 59 4933 3 1 0 96 4 1803 0 204 713 107 943 27 126 98 46 3226 2 2 0 97 5 1377 0 182 445 7 870 16 93 135 63 4422 2 2 0 96 6 9662 0 28 437 5 791 24 107 192 68 4735 3 3 0 94 7 5615 0 24 431 15 814 19 97 164 51 3457 2 2 0 96 March 31, 2026 at 06:37:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2117 102 12 1 2 2 0 268 0 0 0 100 1 0 0 0 103 1 89 0 3 0 0 294 0 0 0 100 2 0 0 0 21 1 2 0 0 0 0 0 0 0 0 100 3 3 0 94 331 152 129 1 2 4 0 525 0 1 0 99 4 0 0 3 230 103 12 0 1 0 0 300 0 0 0 100 5 0 0 0 28 4 40 1 0 0 0 1087 0 0 0 100 6 0 0 0 16 0 0 0 0 0 0 0 0 0 0 100 7 44 0 0 40 8 22 0 0 4 0 10 0 0 0 100 March 31, 2026 at 06:37:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2177 101 173 0 12 92 0 302 0 1 0 99 1 0 0 0 153 2 138 1 9 95 0 294 0 0 0 100 2 0 0 0 138 1 123 0 13 53 0 0 0 0 0 100 3 0 0 486 392 181 204 1 11 68 0 528 0 1 0 99 4 0 0 3 358 132 122 0 11 79 0 300 0 0 0 100 5 0 0 0 139 4 147 1 11 60 0 1088 0 0 0 100 6 0 0 0 133 0 104 0 12 56 0 0 0 0 0 100 7 0 0 0 124 7 75 0 8 36 0 9 0 0 0 100 March 31, 2026 at 06:37:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 32 0 0 0 0 301 0 0 0 100 1 0 0 0 21 1 21 0 1 1 0 306 0 0 0 100 2 0 0 0 85 2 80 0 2 0 0 0 0 0 0 100 3 0 0 24 307 152 104 1 0 0 0 525 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 300 0 0 0 100 5 0 0 0 31 12 54 1 0 1 0 1098 0 0 0 100 6 0 0 0 10 0 12 0 1 0 0 20 0 0 0 100 7 0 0 0 18 5 14 0 0 0 0 9 0 0 0 100 March 31, 2026 at 06:37:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 878 0 35 2227 102 1019 23 194 104 62 4921 2 2 0 96 1 3139 0 23 548 2 956 14 152 128 62 4841 3 2 0 95 2 2094 0 207 513 1 944 17 134 86 58 3434 2 1 0 96 3 1058 0 70 422 138 970 23 143 94 69 3444 1 1 0 98 4 2626 0 327 454 121 918 23 119 95 59 4110 3 2 0 95 5 2139 0 26 491 4 877 13 108 154 52 4606 2 2 0 96 6 11538 0 126 441 1 863 13 111 244 60 5479 3 3 0 93 7 41320 0 27 334 7 781 22 112 183 72 3850 9 7 0 85 March 31, 2026 at 06:37:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2120 102 56 1 2 3 0 230 0 0 0 100 1 24 0 0 41 6 25 0 4 2 0 306 0 0 0 100 2 0 0 70 23 2 17 0 5 5 0 9 0 0 0 100 3 57 0 45 237 108 24 1 2 5 0 544 0 0 0 99 4 26 0 3 329 154 106 0 1 0 0 310 0 0 0 100 5 0 0 0 113 6 126 1 3 0 0 1103 0 0 0 100 6 0 0 0 23 1 4 0 1 0 0 18 0 0 0 100 7 0 0 0 26 1 8 0 3 0 0 11 0 0 0 100 March 31, 2026 at 06:37:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2180 102 8 0 1 1 0 354 0 1 0 99 1 0 0 0 87 2 8 0 1 1 0 315 0 0 0 100 2 0 0 42 75 1 4 0 0 2 0 0 0 0 0 100 3 0 0 486 230 110 22 0 1 2 0 539 0 1 0 99 4 0 0 3 390 153 113 0 3 0 0 300 0 0 0 100 5 0 0 0 185 3 138 0 0 0 0 1081 0 0 0 100 6 0 0 0 80 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 114 0 6 96 0 277 0 0 0 100 1 0 0 0 49 2 89 0 12 66 0 294 0 0 0 100 2 0 0 0 64 1 119 0 8 62 0 0 0 0 0 100 3 0 0 24 296 135 118 1 10 77 0 532 0 0 0 100 4 0 0 3 376 181 200 0 7 75 0 300 0 0 0 100 5 0 0 0 159 3 233 1 9 63 0 1083 0 0 0 100 6 0 0 0 61 1 111 0 7 65 0 0 0 0 0 100 7 0 0 0 46 0 83 0 7 63 0 0 0 0 0 100 March 31, 2026 at 06:37:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3234 0 23 2294 103 914 18 151 106 74 3292 2 2 0 96 1 1453 0 151 202 3 897 23 125 94 60 3260 1 1 0 97 2 1240 0 7 448 3 783 17 96 68 54 3974 1 1 0 98 3 1066 0 73 590 113 741 14 76 68 50 4273 2 1 0 97 4 323 0 36 623 145 701 2 73 78 46 2081 1 1 0 98 5 1022 0 186 505 22 849 15 82 91 59 4182 1 2 0 97 6 43992 0 316 147 4 738 14 70 163 72 4811 9 9 0 82 7 7628 0 42 481 2 795 10 77 157 56 3205 2 2 0 95 March 31, 2026 at 06:37:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 736 0 0 2129 104 122 3 14 38 5 248 0 1 0 99 1 334 0 0 37 2 111 8 19 17 1 599 0 0 0 99 2 316 0 0 51 4 59 0 5 22 2 628 1 0 0 99 3 401 0 66 238 103 37 2 3 24 1 935 0 0 0 99 4 471 0 3 278 104 109 7 20 15 3 424 1 0 0 99 5 401 0 0 100 24 154 7 22 24 4 1672 0 0 0 99 6 769 0 7 95 33 137 1 13 30 1 527 0 0 0 99 7 420 0 70 151 3 212 8 20 21 2 377 1 1 0 98 March 31, 2026 at 06:37:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2178 100 26 0 0 0 0 0 0 1 0 99 1 0 0 0 84 1 6 0 0 4 0 330 0 0 0 100 2 0 0 0 84 2 8 0 1 1 0 294 0 0 0 100 3 2 0 486 219 103 16 0 1 1 0 531 0 0 0 100 4 0 0 3 280 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 87 4 40 1 0 0 0 1382 0 0 0 100 6 0 0 0 197 56 118 0 2 0 0 9 0 0 0 100 7 0 0 42 160 2 87 0 1 1 0 0 0 0 0 100 March 31, 2026 at 06:37:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 30 0 0 0 0 2 0 0 0 100 1 0 0 0 86 1 82 0 1 1 0 331 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 293 0 0 0 100 3 0 0 24 212 103 10 0 0 0 0 524 0 0 0 100 4 0 0 3 208 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 15 4 40 1 0 0 0 1381 0 0 0 100 6 0 0 0 117 56 112 0 0 0 0 10 0 0 0 100 7 0 0 0 17 2 12 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:37:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 107 0 10 88 0 0 0 0 0 100 1 0 0 0 152 1 189 0 3 72 0 266 0 0 0 100 2 0 0 0 67 3 114 0 6 55 0 294 0 0 0 100 3 0 0 24 287 132 104 0 8 90 0 525 0 0 0 100 4 0 0 3 272 129 97 0 9 48 0 0 0 0 0 100 5 0 0 0 66 4 138 1 4 80 0 1383 0 0 0 99 6 0 0 0 173 56 228 0 9 78 0 9 0 0 0 100 7 0 0 0 53 1 91 0 9 69 0 0 0 0 0 100 March 31, 2026 at 06:37:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35444 0 235 2234 107 1300 47 203 123 93 4869 8 8 0 84 1 1738 0 14 584 11 985 21 141 110 73 5929 3 2 0 95 2 4287 0 137 260 4 1093 36 168 112 47 4545 4 2 0 94 3 2395 0 288 410 104 984 29 140 165 57 5356 3 2 0 96 4 1697 0 21 767 139 952 32 122 102 64 3148 2 1 0 97 5 485 0 10 497 15 895 11 104 141 49 4234 2 2 0 97 6 10373 0 134 272 7 914 22 126 220 61 4454 3 3 0 94 7 7464 0 32 444 4 741 24 101 137 35 3367 3 2 0 95 March 31, 2026 at 06:37:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 77 2120 107 106 0 4 6 0 9 0 1 0 99 1 0 0 0 23 1 6 0 1 0 0 298 0 0 0 100 2 0 0 0 18 1 2 0 0 0 0 294 0 0 0 100 3 2 0 24 230 104 20 2 0 6 0 529 0 0 0 100 4 0 0 3 323 153 102 0 0 0 0 1 0 0 0 100 5 0 0 0 27 4 40 1 0 0 0 1381 0 0 0 99 6 0 0 0 18 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 46 2 26 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2185 108 126 0 0 2 0 11 0 1 0 99 1 0 0 0 89 2 12 0 1 0 0 299 0 0 0 100 2 0 0 0 80 1 4 0 1 1 0 294 0 0 0 100 3 2 0 486 220 104 10 1 0 2 0 623 1 0 0 99 4 0 0 3 380 152 100 0 0 0 0 0 0 0 0 100 5 0 0 0 87 4 40 1 0 0 0 1382 0 1 0 99 6 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 79 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 124 0 0 0 0 10 0 0 0 100 1 0 0 0 12 1 4 0 0 2 0 300 0 0 0 100 2 0 0 0 9 2 6 0 1 0 0 294 0 0 0 100 3 0 0 24 218 105 18 0 0 0 0 526 0 0 0 100 4 0 0 3 308 152 100 0 0 0 0 0 0 0 0 100 5 0 0 0 15 4 40 1 0 0 0 1382 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8933 0 449 2202 109 1284 33 174 319 90 5040 4 4 0 92 1 1672 0 22 470 4 899 19 136 181 64 3722 3 1 0 96 2 1233 0 20 321 5 984 27 130 181 71 3552 2 2 0 97 3 1364 0 80 503 140 845 19 126 188 63 3226 1 1 0 98 4 2335 0 29 849 187 926 21 115 172 54 4017 1 2 0 97 5 2314 0 187 204 9 823 26 133 184 50 4345 2 2 0 96 6 3650 0 15 414 3 713 14 117 217 45 3418 2 2 0 96 7 42497 0 26 349 3 683 29 97 211 32 3909 9 7 0 84 March 31, 2026 at 06:37:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 70 2114 103 121 1 0 6 0 15 0 1 0 99 1 50 0 0 50 7 36 0 3 3 0 358 0 0 0 100 2 0 0 7 29 2 12 0 3 2 0 310 0 0 0 100 3 5 0 35 231 106 15 1 1 7 0 280 0 0 0 100 4 2 0 14 234 107 10 0 0 1 0 267 0 0 0 100 5 9 0 0 46 11 54 1 0 1 0 1413 0 0 0 100 6 6 0 0 62 16 51 0 3 1 0 36 0 0 0 100 7 0 0 0 95 34 74 0 2 1 0 2 0 0 0 100 March 31, 2026 at 06:37:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2155 101 46 0 1 4 0 2 0 1 0 99 1 0 0 0 140 6 82 0 1 2 0 339 0 0 0 100 2 0 0 0 62 1 4 0 1 0 0 294 0 0 0 100 3 0 0 360 220 104 14 0 0 5 0 266 0 1 0 99 4 0 0 10 266 103 6 1 2 1 0 262 0 0 0 100 5 0 0 0 67 3 36 0 0 0 0 1384 0 0 0 100 6 0 0 0 66 1 14 0 1 0 0 0 0 0 0 100 7 0 0 0 160 51 102 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 100 20 0 1 0 0 0 0 0 0 100 1 0 0 0 130 6 108 0 3 1 0 307 0 0 0 100 2 0 0 0 24 1 2 0 0 0 0 294 0 0 0 100 3 0 0 136 216 104 10 0 1 1 0 266 0 0 0 100 4 0 0 10 226 103 2 0 0 0 0 259 0 0 0 100 5 0 0 0 28 3 36 1 0 1 0 1386 0 0 0 100 6 0 0 0 29 1 14 0 0 0 0 0 0 0 0 100 7 0 0 0 124 51 102 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8278 0 165 2277 102 1074 31 190 173 64 6770 4 3 0 93 1 1662 0 137 252 11 1075 30 165 146 70 4136 2 2 0 96 2 2310 0 8 544 1 1008 19 109 132 51 2962 2 1 0 96 3 38093 0 268 523 105 835 20 113 125 52 4504 9 7 0 84 4 2211 0 207 471 111 952 29 114 107 62 4902 2 2 0 95 5 1070 0 28 313 13 971 27 123 123 65 5015 1 1 0 97 6 661 0 11 475 2 864 12 97 98 50 3395 2 1 0 97 7 9512 0 9 220 35 788 12 110 191 52 3612 3 2 0 94 March 31, 2026 at 06:37:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 0 2129 104 224 0 6 102 0 23 0 0 0 100 1 23 0 0 77 3 92 0 6 62 0 104 0 0 0 100 2 0 0 0 65 3 86 0 7 92 0 303 0 0 0 100 3 47 0 32 315 138 142 0 13 105 0 289 0 0 0 99 4 0 0 9 299 137 128 0 12 80 0 276 0 0 0 100 5 0 0 77 136 34 215 0 11 86 0 1388 0 1 0 99 6 6 0 0 77 4 105 0 6 57 0 18 0 0 0 100 7 0 0 0 112 22 139 0 9 47 0 8 0 0 0 100 March 31, 2026 at 06:37:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 102 58 0 1 0 0 3 0 1 0 99 1 0 0 0 87 1 14 0 1 2 0 319 0 0 0 100 2 0 0 0 161 2 85 0 2 1 0 294 0 0 0 100 3 0 0 479 228 109 18 1 0 2 0 275 0 0 0 100 4 0 0 10 282 103 2 1 0 0 0 262 0 0 0 100 5 0 0 42 99 11 56 1 0 2 0 1398 0 1 0 99 6 0 0 0 85 1 14 0 0 0 0 21 0 0 0 100 7 0 0 0 184 51 106 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:37:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 99 0 4 2 0 0 0 0 0 100 1 0 0 0 16 3 8 0 0 3 0 308 0 0 0 100 2 0 0 0 33 2 28 0 0 1 0 294 0 0 0 100 3 0 0 17 219 108 14 0 0 1 0 274 0 0 0 100 4 0 0 10 214 105 6 0 0 1 0 260 0 0 0 100 5 0 0 0 15 3 38 1 1 0 0 1389 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 7 0 0 0 109 52 104 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:37:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25665 0 36 2197 102 610 21 93 108 55 2787 5 4 0 91 1 244 0 18 275 8 435 5 63 54 45 1947 0 1 0 98 2 1866 0 26 286 1 409 6 52 53 42 2687 1 1 0 98 3 2115 0 242 325 110 454 4 64 73 54 1848 1 1 0 98 4 1304 0 22 434 103 419 6 49 67 59 3960 1 1 0 97 5 238 0 14 205 5 331 4 50 37 41 2339 0 0 0 99 6 416 0 9 215 4 381 6 56 45 44 1389 0 1 0 99 7 8253 0 230 275 45 435 10 42 143 49 2188 2 2 0 96 March 31, 2026 at 06:37:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13739 0 82 2214 105 645 23 84 101 23 2201 4 5 0 91 1 1099 0 1 180 53 671 15 74 62 30 1588 1 1 0 99 2 1534 0 12 228 4 400 13 52 42 15 1580 1 1 0 99 3 992 0 45 335 105 466 8 45 41 10 2085 1 1 0 98 4 454 0 10 398 103 320 12 35 22 11 1170 1 0 0 99 5 1074 0 7 209 4 347 9 26 21 4 3036 2 1 0 98 6 333 0 0 196 5 321 5 20 27 4 1382 1 0 0 98 7 4230 0 178 249 2 516 10 28 57 22 2011 3 1 0 96 March 31, 2026 at 06:37:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2175 102 189 0 10 87 0 2 0 1 0 99 1 44 0 0 234 57 201 0 10 90 0 356 0 0 0 100 2 0 0 0 131 2 101 0 11 74 0 294 0 0 0 100 3 2 0 479 332 132 150 1 9 92 0 266 0 1 0 99 4 0 0 10 351 132 128 1 8 55 0 262 0 0 0 100 5 0 0 0 132 3 133 1 4 75 0 1387 0 0 0 99 6 0 0 0 129 2 102 0 7 93 0 0 0 0 0 100 7 0 0 0 117 2 73 0 8 30 0 0 0 0 0 100 March 31, 2026 at 06:37:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 110 0 1 0 0 0 0 0 0 100 1 0 0 0 129 58 124 0 1 2 0 273 0 0 0 100 2 0 0 0 22 2 18 0 2 1 0 294 0 0 0 100 3 0 0 21 212 104 6 0 0 1 0 267 0 0 0 100 4 0 0 14 210 103 2 0 0 1 0 259 0 0 0 100 5 0 0 0 32 14 52 2 0 2 0 1398 0 0 0 100 6 0 0 0 17 3 16 0 0 1 0 20 0 0 0 100 7 0 0 0 18 2 10 0 1 1 0 0 0 0 0 100 March 31, 2026 at 06:37:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 1 0 0 2 0 0 0 100 1 0 0 0 121 56 114 1 1 2 0 276 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 3 0 0 17 218 103 10 0 2 1 0 266 0 0 0 100 4 0 0 10 209 103 2 0 0 0 0 259 0 0 0 100 5 0 0 0 13 3 36 0 0 0 0 1388 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8806 0 53 2360 102 1179 33 176 227 70 4720 4 3 0 93 1 2101 0 28 610 30 1113 16 151 133 75 4057 2 2 0 96 2 34383 0 33 173 3 1037 39 156 88 57 4200 8 4 0 88 3 2465 0 197 769 136 1045 17 103 105 60 4574 2 2 0 96 4 1889 0 191 649 105 797 20 103 82 60 3320 2 3 0 95 5 1078 0 187 454 4 922 20 98 77 61 5154 2 1 0 97 6 2088 0 14 185 4 964 27 121 168 58 4356 4 2 0 95 7 10955 0 139 468 3 855 24 111 182 61 5008 4 4 0 92 March 31, 2026 at 06:37:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2107 101 110 0 2 6 0 2 0 1 0 99 1 0 0 0 23 1 6 0 2 4 0 277 0 0 0 100 2 0 0 0 20 1 2 0 0 1 0 294 0 0 0 100 3 2 0 18 321 152 108 0 0 6 0 266 0 0 0 100 4 0 0 9 235 104 20 0 2 0 0 262 0 0 0 100 5 44 0 0 37 9 48 1 0 1 0 1391 0 0 0 100 6 0 0 7 23 2 8 0 0 0 0 0 0 0 0 100 7 0 0 0 22 2 4 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:37:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2177 100 228 0 13 126 0 0 0 1 0 99 1 0 0 0 126 3 89 0 11 80 0 312 0 0 0 100 2 0 0 0 127 1 96 0 6 70 0 294 0 0 0 100 3 0 0 478 383 180 204 0 7 77 0 266 0 1 0 99 4 0 0 12 341 132 99 1 8 58 0 259 0 0 0 100 5 0 0 0 148 9 156 1 8 58 0 1392 0 0 0 99 6 0 0 0 130 2 102 0 8 55 0 0 0 0 0 100 7 0 0 0 123 1 85 0 10 59 0 0 0 0 0 100 March 31, 2026 at 06:37:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 0 1 0 0 3 0 0 0 100 1 0 0 0 13 1 12 1 1 3 0 300 0 0 0 100 2 0 0 0 16 2 6 0 1 1 0 294 0 0 0 100 3 0 0 17 306 152 102 1 0 0 0 266 0 0 0 100 4 0 0 10 209 103 2 0 0 0 0 259 0 0 0 100 5 0 0 0 42 19 31 1 0 0 0 554 0 0 0 100 6 0 0 0 15 2 18 0 1 0 0 320 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29518 0 47 2236 100 1258 51 222 456 75 5968 7 6 0 87 1 1402 0 18 464 4 926 22 127 225 72 4086 2 2 0 96 2 1145 0 7 554 4 1045 23 123 113 45 5003 2 1 0 97 3 2961 0 229 731 137 1024 16 123 106 65 4051 3 1 0 96 4 9269 0 164 814 119 901 25 118 181 69 3105 5 2 0 93 5 24846 0 203 249 7 870 16 89 296 62 5048 7 7 0 86 6 2157 0 9 503 6 926 22 118 155 66 3728 2 2 0 96 7 18250 0 194 250 3 711 27 96 333 41 3612 4 3 0 93 March 31, 2026 at 06:37:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 70 2116 106 126 0 3 7 0 24 0 1 0 99 1 0 0 0 32 2 18 1 6 5 0 241 0 0 0 100 2 4 0 0 37 3 18 0 5 1 0 307 0 0 0 100 3 32 0 30 220 103 8 0 0 6 0 278 0 0 0 100 4 2 0 10 326 153 106 0 2 0 0 268 0 0 0 100 5 0 0 0 25 2 36 0 1 0 0 1112 0 0 0 100 6 0 0 0 30 4 12 0 1 0 0 315 0 0 0 100 7 19 0 5 31 4 14 0 2 0 0 7 0 0 0 100 March 31, 2026 at 06:37:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2184 107 129 0 2 1 0 9 0 1 0 99 1 0 0 0 88 2 6 0 2 1 0 302 0 0 0 100 2 0 0 0 80 1 4 0 1 1 0 294 0 0 0 100 3 0 0 479 215 103 6 0 0 1 0 267 0 0 0 100 4 0 0 10 380 152 102 1 0 0 0 262 0 0 0 100 5 0 0 0 82 2 34 1 0 0 0 1085 0 0 0 100 6 0 0 0 84 3 8 0 0 0 0 300 0 0 0 100 7 0 0 0 81 1 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 106 230 1 12 87 0 10 0 1 0 99 1 0 0 0 53 1 86 1 8 41 0 289 0 0 0 100 2 0 0 0 53 2 78 0 6 75 0 294 0 0 0 100 3 0 0 17 289 129 129 0 7 68 0 266 0 0 0 100 4 0 0 10 363 178 204 0 11 59 0 259 0 0 0 100 5 0 0 0 62 3 139 1 10 78 0 1085 0 0 0 100 6 0 0 0 53 3 97 0 8 91 0 300 0 0 0 100 7 0 0 0 49 2 82 0 10 87 0 0 0 0 0 100 March 31, 2026 at 06:37:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6625 0 31 2239 108 1104 37 164 192 57 3901 4 2 0 94 1 30739 0 27 383 4 924 36 132 147 67 5615 9 7 0 84 2 1842 0 204 446 2 828 13 111 87 55 3797 2 2 0 96 3 1996 0 247 589 103 739 22 111 106 70 3890 1 1 0 97 4 1180 0 25 703 153 777 13 85 95 48 2981 1 1 0 98 5 3072 0 143 476 12 894 19 110 105 57 4431 3 3 0 95 6 1060 0 32 348 5 736 17 113 98 55 3222 2 1 0 96 7 9966 0 124 379 3 668 13 92 177 46 4245 3 3 0 94 March 31, 2026 at 06:37:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 2120 102 110 0 4 1 0 11 0 0 0 100 1 0 0 7 42 3 23 0 5 2 0 88 0 0 0 100 2 0 0 0 29 4 8 0 0 1 0 307 0 0 0 100 3 4 0 30 225 104 14 1 3 6 0 280 0 0 0 100 4 0 0 11 325 153 104 0 0 1 0 268 0 0 0 100 5 44 0 0 35 6 54 0 1 0 0 1117 0 0 0 100 6 7 0 70 26 6 20 0 1 6 0 320 0 1 0 99 7 21 0 0 27 3 12 0 0 1 0 17 0 0 0 100 March 31, 2026 at 06:37:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2176 100 108 0 1 0 0 0 0 1 0 99 1 0 0 0 85 2 8 0 1 1 0 318 0 0 0 100 2 0 0 0 80 1 4 0 1 0 0 294 0 0 0 100 3 2 0 479 226 103 12 0 2 2 0 266 0 0 0 100 4 0 0 10 381 152 102 1 0 0 0 262 0 0 0 100 5 0 0 0 101 8 56 1 0 0 0 1094 0 0 0 100 6 0 0 42 80 3 10 0 0 2 0 300 0 1 0 99 7 0 0 0 80 1 2 1 0 0 0 1 0 0 0 100 March 31, 2026 at 06:37:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 30 0 1 0 0 2 0 0 0 100 1 0 0 0 12 3 4 1 0 2 0 272 0 0 0 100 2 0 0 0 8 1 4 0 1 2 0 294 0 0 0 100 3 0 0 17 289 102 86 0 1 0 0 266 0 0 0 100 4 0 0 10 308 152 102 0 0 0 0 259 0 0 0 100 5 0 0 0 22 7 46 1 1 1 0 1092 0 0 0 100 6 0 0 0 15 4 10 0 0 0 0 301 0 0 0 100 7 0 0 0 10 1 8 0 1 0 0 1 0 0 0 100 March 31, 2026 at 06:37:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 7 2118 100 209 1 14 93 5 69 0 1 0 99 1 5 0 19 60 3 108 2 12 66 2 536 0 0 0 100 2 2 0 7 54 3 85 0 6 64 2 320 0 0 0 100 3 8 0 17 326 130 159 1 12 76 3 291 0 0 0 100 4 38 0 10 383 180 237 0 14 53 9 295 0 0 0 100 5 17 0 2 85 9 158 1 10 73 1 1135 0 0 0 99 6 8 0 2 79 3 143 2 8 87 1 346 0 0 0 100 7 2146 0 3 59 0 94 2 8 92 1 361 0 1 0 99 March 31, 2026 at 06:37:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8601 0 155 2284 103 1124 26 154 169 66 4861 5 3 0 93 1 27947 0 98 206 5 950 21 129 115 55 6033 8 8 0 84 2 3974 0 25 539 8 934 14 114 121 56 4596 4 1 0 95 3 965 0 96 481 103 876 19 114 89 65 2977 1 2 0 97 4 3633 0 494 633 105 856 16 88 103 64 4822 2 2 0 96 5 1578 0 4 304 24 943 20 99 122 72 3303 1 1 0 98 6 840 0 9 390 13 747 10 79 92 53 3044 1 1 0 98 7 6873 0 13 442 31 697 9 67 171 48 2751 2 2 0 96 March 31, 2026 at 06:37:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 101 112 0 0 0 0 0 0 1 0 99 1 44 0 42 99 9 56 1 1 1 0 1406 0 1 0 99 2 0 0 0 81 1 4 0 1 2 0 294 0 0 0 100 3 2 0 486 220 102 14 0 1 1 0 268 0 0 0 100 4 0 0 10 285 104 6 0 0 0 0 264 0 0 0 100 5 0 0 0 83 2 6 0 0 0 0 6 0 0 0 100 6 0 0 0 89 4 10 0 0 0 0 300 0 0 0 100 7 0 0 0 181 51 106 0 1 0 0 2 0 0 0 100 March 31, 2026 at 06:37:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 0 0 0 0 2 0 0 0 100 1 0 0 0 29 10 52 1 0 5 0 1143 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 3 0 0 17 208 102 4 0 1 0 0 266 0 0 0 100 4 0 0 10 211 103 4 1 1 0 0 259 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 2 0 0 0 100 6 0 0 0 12 3 8 0 0 0 0 300 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 29 10 52 1 1 3 0 1418 0 0 0 100 2 0 0 0 8 1 2 0 0 2 0 294 0 0 0 100 3 0 0 17 212 103 10 0 0 1 0 267 0 0 0 100 4 0 0 10 209 103 2 0 0 0 0 259 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 12 3 8 0 0 0 0 300 0 0 0 100 7 0 0 0 107 51 102 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:38:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10330 0 326 2281 109 1400 51 224 294 86 5071 5 4 0 91 1 27106 0 40 355 13 1322 43 178 99 76 6223 8 7 0 85 2 1267 0 16 351 27 1142 27 158 195 58 3830 2 2 0 96 3 2688 0 353 438 130 1070 30 140 193 56 4692 2 2 0 96 4 1533 0 34 402 131 1086 28 162 187 51 4424 2 2 0 96 5 3122 0 23 571 3 1081 22 127 167 50 3187 3 2 0 95 6 1330 0 8 480 5 939 17 119 261 46 4828 2 2 0 97 7 9308 0 15 310 19 976 25 111 259 56 4464 2 2 0 95 March 31, 2026 at 06:38:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2108 100 126 1 3 5 0 5 0 1 0 99 1 0 0 0 35 4 40 1 1 4 0 1354 0 0 0 100 2 0 0 0 133 53 122 0 1 2 0 330 0 0 0 100 3 49 0 35 232 107 23 1 3 7 0 287 0 0 0 100 4 26 0 14 226 103 6 0 1 1 0 268 0 0 0 100 5 21 0 7 49 13 24 0 2 1 0 22 0 0 0 100 6 5 0 0 37 4 25 0 2 1 0 341 0 0 0 100 7 0 0 0 27 1 4 0 1 1 0 13 0 0 0 100 March 31, 2026 at 06:38:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2154 100 116 0 1 2 0 0 0 1 0 99 1 0 0 0 68 3 36 1 0 2 0 1385 0 0 0 99 2 0 0 0 165 52 104 0 0 0 0 294 0 0 0 100 3 0 0 367 228 108 22 0 2 2 0 277 0 0 0 99 4 0 0 10 271 103 12 0 0 0 0 262 0 0 0 100 5 0 0 0 64 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 68 3 10 0 1 0 0 300 0 0 0 100 7 0 0 0 60 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2106 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 30 3 36 1 0 2 0 1386 0 0 0 100 2 0 0 0 125 51 102 0 0 1 0 294 0 0 0 100 3 0 0 17 237 109 18 0 1 0 0 275 0 0 0 100 4 0 0 10 228 103 4 1 0 0 0 259 0 0 0 100 5 0 0 0 26 2 6 0 1 0 0 1 0 0 0 100 6 0 0 0 28 3 8 0 0 0 0 300 0 0 0 100 7 0 0 0 23 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:38:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7474 0 56 2288 100 1297 38 189 179 67 4721 4 3 0 93 1 3776 0 20 307 3 1221 40 173 194 47 6077 2 2 0 95 2 3524 0 317 336 41 1343 34 157 122 71 5082 3 2 0 95 3 2851 0 64 829 121 950 30 109 91 64 2976 2 1 0 97 4 3098 0 208 377 103 977 24 116 125 75 6005 4 2 0 94 5 683 0 13 255 2 1087 19 122 79 62 3498 2 1 0 97 6 34699 0 24 241 4 888 28 117 147 64 5382 8 7 0 85 7 7949 0 123 404 1 816 14 96 226 53 3845 2 5 0 93 March 31, 2026 at 06:38:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 49 0 70 2120 105 170 0 19 109 0 15 0 1 0 99 1 21 0 0 193 6 262 1 17 121 0 1232 0 1 0 99 2 26 0 7 85 4 123 0 15 93 0 562 0 0 0 100 3 7 0 31 412 193 218 1 10 97 0 278 0 0 0 100 4 0 0 3 319 142 146 2 11 79 0 12 0 0 0 100 5 0 0 0 85 2 124 0 15 68 0 14 0 0 0 100 6 0 0 0 89 5 136 0 15 89 0 318 0 0 0 100 7 0 0 7 75 2 110 0 9 98 0 17 0 0 0 100 March 31, 2026 at 06:38:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2188 107 30 0 1 2 0 10 0 1 0 99 1 0 0 462 124 3 143 1 1 5 0 1372 0 1 0 99 2 0 0 7 86 2 12 0 0 0 0 568 0 0 0 100 3 0 0 17 379 152 105 0 1 0 0 266 0 0 0 100 4 0 0 3 283 102 4 0 1 0 0 2 0 0 0 100 5 0 0 0 104 13 28 0 1 0 0 10 0 0 0 100 6 0 0 0 89 3 18 0 0 0 0 321 0 0 0 100 7 0 0 0 82 0 4 0 1 1 0 0 0 0 0 100 March 31, 2026 at 06:38:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1 2112 105 20 0 0 0 0 8 0 0 0 100 1 0 0 0 116 3 143 1 1 1 0 1382 0 0 0 100 2 0 0 7 13 3 6 1 0 3 0 578 0 0 0 100 3 0 0 17 308 152 105 0 1 1 0 266 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 1 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 8 0 0 0 0 300 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8298 0 148 2188 108 500 12 80 151 57 2514 2 3 0 95 1 2976 0 20 279 5 559 3 69 86 65 3819 1 1 0 98 2 338 0 18 240 2 410 9 66 59 51 1985 1 1 0 98 3 235 0 67 544 152 530 5 65 70 44 1925 1 1 0 98 4 23335 0 132 401 104 438 11 57 62 51 1624 4 3 0 92 5 1648 0 24 262 1 281 2 46 54 32 887 0 0 0 99 6 1635 0 202 159 4 267 5 35 49 36 3247 2 1 0 97 7 702 0 6 146 1 380 7 57 79 47 2727 1 1 0 99 March 31, 2026 at 06:38:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3474 0 248 2138 101 536 20 70 95 26 1963 2 2 0 96 1 4463 0 21 136 3 418 16 65 70 10 2595 2 1 0 97 2 1399 0 8 262 4 523 19 59 69 25 1887 1 1 0 98 3 1442 0 75 475 112 445 5 43 24 19 1614 2 1 0 98 4 10954 0 10 356 150 404 7 45 18 7 1215 3 3 0 94 5 1477 0 0 165 6 279 8 34 26 9 1564 1 1 0 98 6 349 0 0 175 4 259 13 29 22 9 1391 1 0 0 99 7 886 0 0 61 1 388 10 41 35 11 1499 2 1 0 98 March 31, 2026 at 06:38:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2175 101 177 0 9 101 0 0 0 1 0 99 1 0 0 0 127 2 119 2 9 74 0 1404 0 0 0 99 2 0 0 469 70 2 109 0 7 71 0 556 0 0 0 99 3 2 0 17 398 136 145 0 7 47 0 266 0 0 0 100 4 44 0 3 470 188 239 0 8 63 0 9 0 0 0 100 5 0 0 0 136 2 116 0 13 78 0 2 0 0 0 100 6 0 0 0 137 3 112 0 9 57 0 300 0 0 0 100 7 0 0 0 119 0 81 0 6 58 0 0 0 0 0 100 March 31, 2026 at 06:38:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 138 0 2 0 0 0 0 0 0 100 1 0 0 0 21 3 38 2 1 3 0 1361 0 0 0 100 2 0 0 7 15 3 12 1 0 1 0 567 0 0 0 100 3 0 0 17 210 104 6 0 0 1 0 267 0 0 0 100 4 0 0 3 319 157 112 0 0 1 0 8 0 0 0 100 5 0 0 0 24 10 16 0 0 1 0 15 0 0 0 100 6 0 0 0 20 4 20 0 0 1 0 313 0 0 0 100 7 0 0 0 12 1 4 0 0 2 0 0 0 0 0 100 March 31, 2026 at 06:38:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 1 2 0 0 0 0 0 100 1 0 0 0 14 2 40 1 1 2 0 1381 0 0 0 100 2 0 0 7 8 2 4 0 0 0 0 552 0 0 0 100 3 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 4 0 0 3 325 157 115 0 1 0 0 8 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 2 0 0 0 100 6 0 0 0 12 3 8 0 0 0 0 300 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9843 0 26 2250 102 1297 38 201 193 58 6090 4 4 0 92 1 10486 0 330 217 4 1046 34 165 251 58 7841 5 4 0 91 2 34603 0 29 282 4 970 31 163 132 71 4773 7 7 0 86 3 1835 0 201 363 108 939 18 123 144 49 4659 2 1 0 96 4 3839 0 202 730 118 899 9 101 88 68 3029 3 1 0 96 5 1478 0 13 507 13 851 14 107 89 65 3060 2 1 0 97 6 1360 0 31 162 7 910 19 122 109 48 2871 2 1 0 97 7 809 0 7 270 31 905 23 95 127 50 2858 1 1 0 97 March 31, 2026 at 06:38:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 132 178 0 1 0 0 1 0 0 0 100 1 0 0 0 27 2 36 2 1 2 0 1387 0 0 0 100 2 0 0 7 27 2 20 0 1 8 0 556 0 0 0 100 3 2 0 17 222 103 6 1 0 0 0 266 0 0 0 100 4 0 0 10 223 103 6 0 2 0 0 0 0 0 0 100 5 0 0 0 22 2 4 0 0 0 0 2 0 0 0 100 6 44 0 70 25 8 20 0 0 6 0 309 0 1 0 99 7 0 0 0 56 19 38 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2227 151 287 0 13 73 0 0 0 1 0 99 1 0 0 0 122 2 112 1 10 63 0 1383 0 1 0 99 2 0 0 462 64 2 101 0 7 81 0 294 0 0 0 100 3 0 0 16 348 131 103 0 11 79 0 265 0 0 0 100 4 0 0 11 366 132 110 0 14 86 0 259 0 0 0 100 5 0 0 0 137 1 116 0 6 56 0 0 0 0 0 100 6 0 0 42 134 9 110 0 8 87 0 310 0 1 0 99 7 0 0 0 127 1 100 0 11 67 0 0 0 0 0 100 March 31, 2026 at 06:38:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 150 160 0 2 0 0 0 0 0 0 100 1 0 0 0 62 2 84 1 3 2 0 1386 0 0 0 100 2 0 0 0 14 1 12 0 1 3 0 306 0 0 0 100 3 0 0 17 211 103 6 0 1 0 0 266 0 0 0 100 4 0 0 10 213 104 4 1 0 0 0 259 0 0 0 100 5 0 0 0 22 8 18 0 0 0 0 15 0 0 0 100 6 0 0 0 28 9 28 0 0 0 0 326 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7827 0 14 2250 124 1142 26 135 186 59 5376 3 3 0 94 1 6857 0 203 474 4 816 19 107 163 63 5051 3 3 0 94 2 4766 0 263 387 2 833 14 97 155 67 4811 2 2 0 96 3 1562 0 58 640 129 764 6 90 92 77 2966 1 1 0 98 4 1457 0 197 354 109 760 21 97 86 58 2768 2 1 0 97 5 1240 0 22 502 2 988 21 92 80 65 4702 2 1 0 96 6 5682 0 45 537 9 737 25 79 86 40 2736 4 2 0 94 7 34063 0 13 277 6 739 18 80 106 49 3787 7 6 0 87 March 31, 2026 at 06:38:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 101 32 0 2 0 0 12 0 0 0 100 1 55 0 0 119 8 135 1 4 2 0 1296 0 0 0 100 2 23 0 0 31 3 10 0 1 0 0 307 0 0 0 100 3 32 0 101 313 154 110 0 2 6 0 277 0 1 0 99 4 0 0 10 226 103 10 0 3 6 0 265 0 0 0 100 5 0 0 0 27 3 8 0 0 0 0 13 0 0 0 100 6 0 0 7 29 2 14 0 1 1 0 312 0 0 0 100 7 0 0 0 29 2 14 0 1 1 0 9 0 0 0 100 March 31, 2026 at 06:38:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 10 0 0 0 0 1 0 0 0 100 1 0 0 0 134 10 156 1 0 1 0 1437 0 0 0 99 2 0 0 0 14 2 2 0 0 0 0 294 0 0 0 100 3 0 0 31 313 153 110 0 1 4 0 267 0 0 0 100 4 0 0 24 212 103 4 0 0 4 0 262 0 0 0 100 5 0 0 0 13 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 16 2 8 0 0 0 0 300 0 0 0 100 7 0 0 0 12 1 4 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:38:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2179 100 122 0 10 99 0 0 0 1 0 99 1 0 0 0 237 7 243 1 10 87 0 1395 0 1 0 99 2 0 0 0 126 1 101 0 9 73 0 294 0 0 0 100 3 0 0 31 451 185 209 0 9 75 0 0 0 0 0 100 4 0 0 458 287 135 103 1 7 63 0 259 0 0 0 100 5 0 0 14 139 3 131 0 10 65 0 268 0 0 0 100 6 0 0 0 139 2 127 0 10 60 0 300 0 0 0 100 7 0 0 0 132 1 109 0 10 41 0 0 0 0 0 100 March 31, 2026 at 06:38:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3306 0 437 2183 102 1123 37 199 165 74 4132 2 3 0 95 1 11302 0 29 363 11 1165 48 180 217 72 6748 3 4 0 93 2 7657 0 28 369 2 924 32 155 188 56 4725 4 2 0 94 3 2050 0 48 743 140 857 14 104 113 66 4774 2 1 0 96 4 926 0 28 639 105 828 12 117 121 60 3116 1 1 0 98 5 35837 0 36 286 15 884 23 116 126 56 4167 9 6 0 85 6 1410 0 201 434 16 796 26 112 88 57 2688 1 1 0 98 7 1543 0 26 365 4 773 16 96 101 62 4363 2 2 0 95 March 31, 2026 at 06:38:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2109 103 42 0 1 6 0 20 0 1 0 99 1 0 0 7 107 2 122 1 3 1 0 1203 0 0 0 100 2 0 0 0 24 1 6 0 2 2 0 296 0 0 0 100 3 6 0 17 227 104 10 0 1 0 0 13 0 0 0 100 4 0 0 10 231 106 14 0 1 6 0 278 0 0 0 100 5 59 0 14 38 11 23 0 1 0 0 287 0 0 0 100 6 25 0 0 126 52 108 0 1 0 0 309 0 0 0 100 7 50 0 0 25 3 8 0 1 0 0 13 0 0 0 100 March 31, 2026 at 06:38:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 43 2172 100 10 0 0 2 0 0 0 1 0 99 1 0 0 0 188 2 141 1 3 1 0 1418 0 1 0 99 2 0 0 0 83 1 6 0 2 0 0 294 0 0 0 100 3 0 0 3 283 102 4 0 1 3 0 0 0 0 0 100 4 0 0 472 224 104 16 0 1 2 0 262 0 0 0 100 5 3 0 14 91 8 16 0 0 0 0 275 0 0 0 100 6 0 0 0 185 53 108 0 0 0 0 301 0 0 0 100 7 0 0 0 81 2 4 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:38:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 101 12 0 0 1 0 1 0 0 0 100 1 0 0 0 115 3 140 1 0 1 0 1380 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 294 0 0 0 100 3 0 0 3 207 101 2 0 1 0 0 0 0 0 0 100 4 0 0 10 217 104 10 1 0 1 0 259 0 0 0 100 5 0 0 14 19 8 16 0 0 0 0 277 0 0 0 100 6 0 0 0 110 52 106 0 0 0 0 300 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 505 0 11 2162 100 264 2 39 136 20 1312 1 1 0 98 1 3116 0 120 169 2 298 5 28 143 34 3452 1 2 0 98 2 1696 0 18 160 1 275 3 41 125 36 905 0 1 0 98 3 2854 0 214 446 132 351 1 29 123 30 726 0 1 0 98 4 2010 0 28 435 134 216 1 27 120 22 681 0 1 0 99 5 306 0 24 204 11 300 2 42 118 24 700 0 0 0 99 6 657 0 4 251 52 312 2 33 90 20 365 1 0 0 99 7 40 0 5 136 2 202 0 26 86 10 621 0 0 0 100 March 31, 2026 at 06:38:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2100 0 198 2193 134 1044 36 119 88 38 3223 2 2 0 96 1 843 0 8 393 3 691 20 89 105 28 3743 2 1 0 97 2 5115 0 15 414 3 800 27 88 126 37 3632 2 2 0 96 3 5991 0 60 359 103 801 27 90 120 33 2902 3 2 0 96 4 1799 0 196 514 108 568 4 52 53 35 3082 2 1 0 97 5 1341 0 18 295 11 609 10 74 114 49 2368 1 1 0 98 6 1474 0 4 220 16 684 19 64 53 36 4239 2 1 0 97 7 33828 0 8 218 10 722 18 67 40 32 3305 7 6 0 87 March 31, 2026 at 06:38:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2214 144 198 0 1 2 0 0 0 1 0 99 1 0 0 0 108 9 54 1 2 1 0 1565 0 0 0 99 2 0 0 0 82 1 4 0 1 1 0 294 0 0 0 100 3 0 0 3 278 101 0 0 0 0 0 0 0 0 0 100 4 0 0 472 224 105 12 0 0 2 0 263 0 0 0 100 5 46 0 14 95 8 18 0 0 0 0 275 0 0 0 100 6 0 0 0 86 1 12 0 1 0 0 0 0 0 0 100 7 0 0 0 81 2 4 0 0 0 0 300 0 0 0 100 March 31, 2026 at 06:38:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 30 0 1 0 0 0 0 0 0 100 1 0 0 0 27 10 50 1 1 0 0 1214 0 0 0 100 2 0 0 0 177 45 173 0 3 1 0 294 0 0 0 100 3 0 0 3 209 101 0 0 0 0 0 0 0 0 0 100 4 0 0 10 211 104 4 0 0 0 0 259 0 0 0 100 5 2 0 14 23 9 18 2 0 0 0 393 1 0 0 99 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 March 31, 2026 at 06:38:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 16 0 1 0 0 0 0 0 0 100 1 0 0 0 14 4 38 1 0 1 0 1392 0 0 0 100 2 0 0 0 211 51 208 0 0 1 0 294 0 0 0 100 3 0 0 3 210 102 2 0 0 0 0 1 0 0 0 100 4 0 0 10 212 104 4 1 0 0 0 259 0 0 0 100 5 0 0 14 17 7 14 0 0 0 0 274 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 6 0 1 0 0 300 0 0 0 100 March 31, 2026 at 06:38:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30944 0 329 2275 104 1134 34 170 181 61 3676 7 5 0 88 1 1506 0 16 581 29 1053 18 135 231 65 5921 2 2 0 96 2 10021 0 197 318 17 1127 17 137 271 84 5789 3 3 0 94 3 7225 0 78 515 135 878 25 122 252 70 4240 4 3 0 93 4 1714 0 156 496 146 967 12 119 215 73 3249 2 1 0 96 5 8331 0 14 192 11 775 13 105 115 55 2707 3 4 0 94 6 892 0 30 252 3 786 16 103 160 38 3091 1 1 0 98 7 2812 0 43 399 3 742 12 93 129 37 3035 2 1 0 97 March 31, 2026 at 06:38:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2108 103 50 0 0 6 0 10 0 1 0 99 1 0 0 0 129 54 138 1 1 3 0 1387 0 0 0 100 2 0 0 0 77 2 61 0 3 2 0 306 0 0 0 100 3 0 0 3 253 102 37 0 3 2 0 1 0 0 0 100 4 0 0 10 226 104 6 0 0 1 0 258 0 0 0 100 5 44 0 7 46 14 24 0 1 7 0 9 0 0 0 100 6 3 0 14 28 3 18 0 0 1 0 291 0 0 0 100 7 0 0 0 27 3 6 0 0 1 0 300 0 0 0 100 March 31, 2026 at 06:38:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2172 100 8 0 1 2 0 0 0 1 0 99 1 0 0 462 120 52 140 1 2 2 0 1368 0 1 0 99 2 0 0 0 87 2 12 0 2 1 0 294 0 0 0 100 3 0 0 3 382 101 106 0 2 0 0 0 0 0 0 100 4 0 0 10 285 104 4 0 0 0 0 262 0 0 0 100 5 0 0 0 94 7 16 0 1 0 0 10 0 0 0 100 6 0 0 14 81 2 6 0 0 0 0 266 0 0 0 100 7 0 0 0 82 2 6 0 1 0 0 300 0 0 0 100 March 31, 2026 at 06:38:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 6 0 0 0 0 0 0 0 0 100 1 0 0 0 112 52 136 1 0 1 0 1384 0 0 0 100 2 0 0 0 9 1 4 0 0 1 0 294 0 0 0 100 3 0 0 3 314 102 112 0 1 0 0 0 0 0 0 100 4 0 0 10 213 104 4 0 0 0 0 259 0 0 0 100 5 0 0 0 18 6 14 0 1 0 0 8 0 0 0 100 6 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 March 31, 2026 at 06:38:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1333 0 18 2229 102 1195 37 197 122 70 3859 2 2 0 96 1 34413 0 18 335 11 1115 34 164 118 52 5848 8 7 0 85 2 9786 0 149 308 19 1140 37 145 198 57 6351 4 3 0 92 3 8269 0 71 883 104 1039 21 135 197 65 4063 3 2 0 94 4 4204 0 33 493 105 898 20 124 142 68 4952 3 2 0 95 5 2616 0 296 247 12 908 25 109 121 66 4508 2 2 0 97 6 1525 0 27 497 12 913 14 108 111 77 3091 2 2 0 96 7 1658 0 215 237 14 767 20 96 94 56 2835 2 1 0 97 March 31, 2026 at 06:38:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2144 133 278 0 11 95 0 292 0 1 0 99 1 28 0 0 86 6 140 1 8 60 0 1221 0 1 0 99 2 0 0 0 62 1 81 0 5 106 0 303 0 0 0 100 3 5 0 17 302 132 100 0 9 84 0 27 0 0 0 100 4 26 0 3 314 135 122 0 10 78 0 10 0 0 0 100 5 0 0 0 69 5 94 0 7 81 0 18 0 0 0 100 6 50 0 14 108 6 173 0 13 70 0 286 0 0 0 100 7 0 0 7 122 21 165 0 13 89 0 311 0 0 0 100 March 31, 2026 at 06:38:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2225 153 228 0 0 2 0 272 0 1 0 99 1 4 0 462 21 3 40 1 1 3 0 1396 0 1 0 99 2 3 0 0 84 1 12 0 1 1 0 317 0 0 0 100 3 0 0 3 286 101 8 0 0 0 0 0 0 0 0 100 4 0 0 3 284 103 4 0 0 2 0 0 0 0 0 100 5 0 0 0 90 8 10 0 1 1 0 2 0 0 0 100 6 0 0 14 98 8 30 0 1 0 0 295 0 0 0 100 7 0 0 0 87 2 8 0 0 0 0 300 0 0 0 100 March 31, 2026 at 06:38:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2157 153 216 0 0 0 0 260 0 0 0 100 1 1 0 0 17 4 42 1 2 1 0 1357 0 0 0 100 2 0 0 0 9 2 4 0 1 0 0 294 0 0 0 100 3 0 0 3 218 102 14 0 1 0 0 7 0 0 0 100 4 1 0 3 216 105 10 0 2 0 0 2 0 0 0 100 5 0 0 0 12 3 8 0 1 0 0 1 0 0 0 100 6 1 0 14 20 7 18 1 1 0 0 275 0 0 0 100 7 1 0 0 12 3 8 0 1 1 0 301 0 0 0 100 March 31, 2026 at 06:38:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 593 0 29 2261 150 1188 37 151 69 68 3070 1 1 0 97 1 2876 0 131 418 3 739 14 97 79 53 5486 2 2 0 97 2 2146 0 201 369 3 699 11 106 67 50 3247 2 2 0 97 3 6866 0 155 646 101 781 18 88 126 57 5041 3 3 0 95 4 7785 0 34 556 103 652 10 92 165 70 3472 2 2 0 96 5 37661 0 36 261 3 571 22 78 90 36 3391 8 7 0 86 6 1662 0 202 195 11 758 14 97 96 63 2869 1 1 0 98 7 425 0 26 347 2 741 9 85 55 75 2580 1 1 0 98 March 31, 2026 at 06:38:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 640 0 77 2117 103 216 5 17 32 0 1230 1 1 0 98 1 655 0 0 107 5 214 10 29 29 3 1931 1 1 0 98 2 175 0 0 101 3 140 11 17 9 3 778 1 0 0 98 3 162 0 31 285 104 111 3 16 9 1 346 1 0 0 99 4 451 0 3 302 104 181 8 26 25 2 705 0 0 0 99 5 663 0 0 77 22 199 6 20 24 2 513 1 0 0 99 6 795 0 14 102 38 224 2 21 19 2 1004 1 0 0 99 7 338 0 7 95 2 160 17 25 16 1 482 0 0 0 100 March 31, 2026 at 06:38:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2179 103 204 0 12 81 0 563 0 1 0 99 1 0 0 462 65 2 133 1 9 78 0 1419 0 1 0 99 2 0 0 0 126 1 99 0 10 100 0 294 0 0 0 100 3 0 0 3 351 128 96 0 5 70 0 0 0 0 0 100 4 0 0 3 357 129 103 0 8 66 0 0 0 0 0 100 5 0 0 0 135 7 98 0 6 50 0 10 0 0 0 100 6 2 0 14 233 54 205 0 8 80 0 266 0 0 0 100 7 0 0 0 133 1 101 0 8 71 0 0 0 0 0 100 March 31, 2026 at 06:38:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 104 132 0 0 1 0 568 0 0 0 100 1 0 0 0 13 3 36 0 1 2 0 1350 0 0 0 100 2 0 0 0 14 2 10 1 0 2 0 306 0 0 0 100 3 0 0 3 211 103 4 1 0 1 0 2 0 0 0 100 4 0 0 3 210 103 2 0 0 1 0 0 0 0 0 100 5 0 0 0 35 13 24 0 0 1 0 9 0 0 0 100 6 0 0 14 117 54 118 1 0 1 0 286 0 0 0 100 7 0 0 0 18 2 16 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:38:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 102 112 1 0 3 0 560 0 0 0 100 1 0 0 0 13 2 36 2 1 4 0 1372 0 0 0 100 2 0 0 0 7 1 2 0 0 4 0 294 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 29 8 24 0 0 0 0 11 0 0 0 100 6 0 0 14 110 53 108 0 1 0 0 266 0 0 0 100 7 0 0 0 13 1 16 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:38:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5801 0 328 2255 104 1138 44 199 151 74 5237 4 3 0 92 1 5208 0 29 351 7 1173 40 203 197 77 6840 3 3 0 94 2 6119 0 24 650 37 944 23 134 149 49 4262 3 2 0 96 3 1877 0 271 369 104 1107 39 181 87 63 4426 3 2 0 95 4 36453 0 23 482 105 882 39 148 145 49 4281 8 5 0 87 5 3023 0 15 439 8 872 22 130 147 44 3086 1 1 0 97 6 4264 0 139 390 8 717 13 96 115 53 3629 2 3 0 94 7 1016 0 16 483 12 865 24 110 65 61 3985 2 1 0 97 March 31, 2026 at 06:38:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2120 103 122 0 0 0 0 563 0 0 0 100 1 44 0 70 31 10 50 1 0 10 0 1402 0 1 0 99 2 0 0 0 122 51 106 0 1 8 0 294 0 0 0 100 3 0 0 3 219 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 223 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 20 2 4 0 0 0 0 2 0 0 0 100 6 2 0 14 21 2 6 0 0 0 0 266 0 0 0 100 7 0 0 7 29 1 14 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2183 102 131 0 11 84 0 559 0 1 0 99 1 0 0 42 223 8 239 0 13 80 0 1402 0 1 0 99 2 0 0 462 153 52 179 0 4 64 0 294 0 1 0 99 3 0 0 4 349 130 88 0 7 85 0 0 0 0 0 100 4 0 0 2 356 132 91 0 7 61 0 0 0 0 0 100 5 0 0 0 123 1 92 0 7 79 0 0 0 0 0 100 6 0 0 14 131 2 104 1 9 42 0 266 0 0 0 100 7 0 0 0 140 2 117 0 10 59 0 0 0 0 0 100 March 31, 2026 at 06:38:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 104 28 0 0 0 0 569 0 0 0 100 1 0 0 0 125 7 150 2 0 2 0 1393 0 0 0 100 2 0 0 0 114 52 110 0 0 1 0 306 0 0 0 100 3 0 0 3 207 101 2 0 1 0 0 0 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 15 7 6 0 0 0 0 2 0 0 0 100 6 0 0 14 13 2 16 0 0 0 0 286 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2598 0 14 2228 102 869 35 136 143 59 3731 4 2 0 94 1 41705 0 496 294 10 900 26 110 190 63 8263 9 8 0 82 2 6215 0 134 209 20 1136 19 134 165 86 4539 3 3 0 94 3 3187 0 77 666 115 885 20 120 132 70 4538 2 2 0 96 4 4120 0 19 664 106 775 22 97 136 57 2963 2 2 0 97 5 1433 0 17 278 2 887 13 93 65 51 2757 2 1 0 97 6 2427 0 38 521 25 771 12 80 95 45 3096 2 2 0 96 7 2438 0 29 390 3 748 21 79 78 36 2508 2 1 0 97 March 31, 2026 at 06:38:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 71 2111 102 120 0 1 5 0 308 0 1 0 99 1 0 0 7 29 4 44 1 1 2 0 1574 0 0 0 100 2 2 0 0 32 2 14 0 0 1 0 303 0 0 0 100 3 70 0 17 236 108 20 0 1 0 0 18 0 0 0 100 4 2 0 3 230 103 12 0 1 5 0 11 0 0 0 100 5 0 0 0 31 3 16 0 2 0 0 15 0 0 0 100 6 6 0 14 125 52 109 0 1 0 0 287 0 0 0 100 7 23 0 7 23 1 6 0 1 0 0 9 0 0 0 100 March 31, 2026 at 06:38:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2155 101 110 0 1 4 0 300 0 1 0 99 1 0 0 7 66 4 38 1 0 0 0 1646 0 0 0 99 2 0 0 0 68 1 10 0 0 0 0 294 0 0 0 100 3 0 0 3 276 109 18 0 0 0 0 10 0 0 0 100 4 0 0 346 219 103 12 0 0 5 0 0 0 0 0 100 5 0 0 0 60 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 160 52 104 0 0 0 0 266 0 0 0 100 7 0 0 0 62 1 4 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:38:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 101 207 0 10 99 0 300 0 1 0 99 1 0 0 7 82 4 138 2 6 84 0 1636 0 0 0 99 2 0 0 0 71 1 93 0 8 79 0 294 0 0 0 100 3 0 0 3 310 136 106 0 8 84 0 8 0 0 0 100 4 0 0 122 288 132 100 0 12 58 0 0 0 0 0 100 5 0 0 0 72 2 97 0 7 66 0 2 0 0 0 100 6 0 0 14 186 52 229 0 10 69 0 266 0 0 0 100 7 0 0 0 87 1 130 0 9 74 0 0 0 0 0 100 March 31, 2026 at 06:38:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2656 0 161 2216 104 1124 20 150 104 69 4989 2 2 0 96 1 1807 0 16 265 7 1049 23 147 111 65 6805 2 2 0 96 2 704 0 17 456 3 719 10 81 120 34 3422 2 1 0 97 3 10501 0 354 594 111 772 20 94 181 62 3666 3 3 0 94 4 7809 0 46 428 103 869 13 95 173 59 3567 3 2 0 95 5 35474 0 199 259 11 860 30 118 129 75 3608 8 6 0 86 6 3438 0 50 517 37 873 18 101 101 65 3627 4 2 0 95 7 1505 0 13 297 19 880 21 102 110 58 3834 1 1 0 97 March 31, 2026 at 06:38:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2141 133 172 0 4 6 0 309 0 1 0 99 1 0 0 14 30 4 48 1 3 7 0 1433 0 0 0 99 2 0 0 0 35 4 14 0 2 1 0 332 0 0 0 100 3 45 0 17 241 107 24 0 5 1 0 13 0 0 0 100 4 0 0 3 228 104 6 0 1 0 0 13 0 0 0 100 5 4 0 0 29 4 12 0 1 0 0 9 0 0 0 100 6 29 0 14 28 4 12 0 1 0 0 275 0 0 0 100 7 23 0 0 69 20 50 0 4 0 0 8 0 0 0 100 March 31, 2026 at 06:38:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2224 151 156 0 2 2 0 300 0 1 0 99 1 0 0 469 104 4 123 2 2 6 0 1702 0 1 0 99 2 0 0 0 82 1 6 0 2 5 0 294 0 0 0 100 3 0 0 3 291 107 14 0 0 0 0 9 0 0 0 100 4 0 0 3 282 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 79 1 2 0 0 0 0 0 0 0 0 100 6 0 0 14 79 2 4 0 0 0 0 266 0 0 0 100 7 0 0 0 82 1 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 151 110 0 0 1 0 300 0 0 0 100 1 0 0 7 43 4 68 1 2 1 0 1600 0 0 0 100 2 0 0 0 88 2 82 0 2 3 0 294 0 0 0 100 3 0 0 3 219 106 14 0 1 0 0 8 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 6 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20422 0 144 2268 147 674 16 84 172 43 1598 5 4 0 91 1 411 0 15 317 8 543 9 70 130 43 3309 1 1 0 98 2 1635 0 16 364 1 576 7 71 106 47 2051 1 1 0 97 3 285 0 41 524 139 446 7 64 151 38 2377 1 1 0 98 4 8368 0 312 470 133 481 7 48 195 63 4545 2 2 0 96 5 2570 0 23 276 1 540 3 75 184 46 2085 1 1 0 98 6 985 0 34 299 5 517 7 68 83 53 1530 0 1 0 98 7 201 0 10 259 2 450 1 63 101 36 1726 0 0 0 99 March 31, 2026 at 06:38:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16031 0 7 2169 103 655 30 98 62 11 2414 4 5 0 92 1 550 0 0 368 13 685 29 85 43 7 3381 1 1 0 98 2 337 0 0 308 3 559 18 60 14 5 2091 2 1 0 97 3 2197 0 214 624 148 692 19 58 43 14 2557 2 1 0 97 4 5333 0 23 587 105 582 17 59 93 16 2038 4 1 0 95 5 3385 0 72 291 9 513 11 51 94 21 2159 1 2 0 97 6 316 0 15 259 3 451 14 47 34 19 1839 1 0 0 99 7 748 0 7 246 3 447 10 37 33 9 2060 1 1 0 98 March 31, 2026 at 06:38:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 100 14 0 1 0 0 0 0 1 0 99 1 0 0 462 19 3 38 1 0 2 0 1735 0 1 0 99 2 0 0 0 81 1 4 0 0 1 0 294 0 0 0 100 3 0 0 3 489 153 218 0 1 0 0 2 0 0 0 100 4 44 0 3 304 110 20 0 0 0 0 12 0 0 0 100 5 0 0 42 79 2 10 0 1 2 0 6 0 1 0 99 6 2 0 14 81 2 4 0 0 0 0 266 0 0 0 100 7 0 0 7 80 2 4 0 0 0 0 262 0 0 0 100 March 31, 2026 at 06:38:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 28 0 1 0 0 0 0 0 0 100 1 0 0 0 16 4 40 2 1 3 0 1579 0 0 0 100 2 0 0 0 8 1 2 0 0 1 0 294 0 0 0 100 3 0 0 3 386 151 180 0 2 0 0 0 0 0 0 100 4 0 0 3 222 109 14 0 0 0 0 10 0 0 0 100 5 0 0 0 18 3 12 0 1 1 0 2 0 0 0 100 6 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 7 0 0 7 9 2 4 1 0 0 0 259 0 0 0 100 March 31, 2026 at 06:38:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 8 0 0 0 0 0 0 0 0 100 1 0 0 0 18 6 42 1 0 1 0 1749 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 3 409 151 206 0 0 0 0 1 0 0 0 100 4 0 0 3 222 108 16 0 1 0 0 8 0 0 0 100 5 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 6 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 7 0 0 7 8 2 4 0 0 0 0 259 0 0 0 100 March 31, 2026 at 06:39:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2433 0 136 2228 102 1286 34 195 248 63 5573 2 2 0 96 1 2312 0 207 633 6 1130 29 160 234 64 4871 2 2 0 96 2 1597 0 29 316 3 1138 38 168 193 64 3916 2 2 0 97 3 35558 0 287 560 147 1013 31 144 194 56 4183 8 7 0 85 4 3330 0 30 549 147 1052 24 145 201 54 3470 2 2 0 96 5 2274 0 9 334 34 1027 22 137 204 53 5417 4 2 0 94 6 8542 0 152 422 4 890 19 126 230 48 3992 4 3 0 94 7 8143 0 26 351 4 895 25 123 261 76 3525 2 2 0 96 March 31, 2026 at 06:39:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 100 120 0 0 0 0 0 0 0 0 100 1 0 0 0 29 4 36 1 0 3 0 1650 0 0 0 100 2 0 0 70 18 2 16 0 2 5 0 309 0 1 0 99 3 0 0 3 227 102 12 0 2 6 0 10 0 0 0 100 4 0 0 10 226 104 8 0 0 1 0 0 0 0 0 100 5 0 0 0 128 57 106 0 0 1 0 0 0 0 0 100 6 46 0 14 42 11 28 1 0 1 0 292 0 0 0 100 7 0 0 7 25 3 10 0 0 1 0 263 0 0 0 100 March 31, 2026 at 06:39:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 100 105 0 1 1 0 0 0 1 0 99 1 0 0 0 87 3 36 2 0 1 0 1664 0 0 0 99 2 0 0 42 75 1 4 0 0 3 0 294 0 0 0 99 3 0 0 466 213 101 2 0 0 2 0 0 0 0 0 100 4 0 0 2 294 104 15 0 1 0 0 0 0 0 0 100 5 0 0 0 184 51 106 0 1 0 0 0 0 0 0 100 6 0 0 14 96 9 20 0 1 0 0 278 0 0 0 100 7 0 0 7 81 2 6 0 1 0 0 259 0 0 0 100 March 31, 2026 at 06:39:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 108 0 1 1 0 0 0 0 0 100 1 0 0 0 12 3 38 0 1 2 0 1674 0 0 0 100 2 0 0 0 7 1 2 0 0 2 0 294 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 222 104 10 0 1 0 0 0 0 0 0 100 5 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 6 0 0 14 14 5 10 0 1 0 0 268 0 0 0 100 7 0 0 7 17 4 12 1 1 3 0 265 0 0 0 100 March 31, 2026 at 06:39:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34067 0 45 2234 104 1155 38 184 117 80 4692 7 7 0 85 1 3910 0 34 649 23 1006 17 124 111 59 5168 3 2 0 94 2 1274 0 18 451 2 754 13 101 66 48 5409 2 1 0 97 3 4725 0 360 498 105 770 20 105 102 57 3758 3 2 0 96 4 1894 0 17 451 104 862 19 124 91 71 3223 2 2 0 96 5 1648 0 25 419 27 733 15 98 124 44 2741 2 1 0 96 6 11002 0 314 230 4 868 11 96 180 69 4435 3 3 0 94 7 5038 0 11 194 15 862 19 104 158 82 3535 2 2 0 97 March 31, 2026 at 06:39:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 72 0 7 2134 107 162 0 12 107 0 290 0 1 0 99 1 0 0 0 284 53 352 1 6 95 0 1591 0 0 0 99 2 2 0 70 63 4 102 0 8 80 0 303 0 1 0 99 3 19 0 17 298 134 111 0 6 71 0 9 0 0 0 100 4 1 0 3 318 135 123 0 9 77 0 2 0 0 0 100 5 25 0 7 64 1 86 0 10 68 0 10 0 0 0 100 6 7 0 14 67 4 90 1 9 70 0 281 0 0 0 100 7 0 0 0 85 1 123 0 8 46 0 2 0 0 0 100 March 31, 2026 at 06:39:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2183 107 46 0 1 2 0 271 0 1 0 99 1 0 0 462 147 17 164 1 1 3 0 1646 0 1 0 99 2 0 0 0 166 41 94 0 2 0 0 322 0 0 0 100 3 0 0 3 282 101 8 0 0 0 0 12 0 0 0 100 4 0 0 3 291 103 12 0 0 0 0 0 0 0 0 100 5 0 0 0 87 6 5 0 1 0 0 0 0 0 0 100 6 0 0 14 91 4 24 0 1 0 0 284 0 0 0 100 7 0 0 0 84 1 6 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 106 94 0 0 0 0 267 0 0 0 100 1 0 0 0 38 3 60 2 0 1 0 1682 0 0 0 100 2 0 0 0 114 52 108 0 1 0 0 294 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 221 104 14 0 0 0 0 1 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4750 0 216 2293 109 1132 45 183 132 59 4326 4 3 0 93 1 1437 0 10 355 6 1189 40 161 108 81 5691 2 2 0 97 2 932 0 11 526 40 924 17 128 76 66 4248 2 1 0 97 3 34561 0 39 438 103 832 39 143 84 43 3768 8 6 0 86 4 1858 0 16 640 113 681 13 98 101 52 4756 2 2 0 96 5 313 0 22 396 0 787 20 102 91 51 2745 1 1 0 98 6 11946 0 458 355 6 745 24 106 226 62 4292 3 4 0 93 7 7875 0 32 456 2 753 15 104 182 81 3187 3 2 0 96 March 31, 2026 at 06:39:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 7 2117 102 106 0 2 0 0 268 0 0 0 100 1 0 0 0 57 6 71 0 3 8 0 1785 0 0 0 99 2 0 0 0 30 3 18 0 1 0 0 313 0 0 0 100 3 65 0 19 245 111 28 0 1 0 0 40 0 0 0 100 4 0 0 1 329 153 111 2 3 0 0 8 0 0 0 100 5 0 0 70 13 1 5 0 2 4 0 11 0 0 0 99 6 12 0 14 26 3 13 1 4 3 0 283 0 0 0 100 7 1 0 7 28 2 16 1 4 2 0 32 0 0 0 100 March 31, 2026 at 06:39:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 2181 101 234 0 10 98 0 262 0 1 0 99 1 0 0 462 67 3 133 2 7 55 0 1673 0 1 0 99 2 0 0 0 134 2 89 0 5 51 0 294 0 0 0 100 3 0 0 3 364 134 117 0 4 67 0 9 0 0 0 100 4 0 0 3 455 178 196 0 6 75 0 0 0 0 0 100 5 0 0 42 117 0 90 0 7 75 0 0 0 1 0 99 6 3 0 14 124 5 88 0 7 65 0 269 0 0 0 100 7 0 0 0 143 2 121 0 7 54 0 0 0 0 0 100 March 31, 2026 at 06:39:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 101 118 0 1 0 0 259 0 0 0 100 1 0 0 0 24 5 40 1 1 2 0 1710 0 0 0 100 2 0 0 0 19 2 18 0 1 2 0 307 0 0 0 100 3 0 0 7 227 107 28 0 1 1 0 21 0 0 0 100 4 0 0 7 312 153 104 0 0 1 0 0 0 0 0 100 5 0 0 0 16 7 2 0 0 1 0 0 0 0 0 100 6 0 0 14 18 6 14 0 0 1 0 279 0 0 0 100 7 0 0 0 13 2 4 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:39:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 861 0 139 2118 102 226 5 22 23 22 1063 0 1 0 99 1 67 0 4 93 4 163 4 25 27 21 2201 0 1 0 99 2 31 0 5 92 2 110 0 22 21 17 631 0 0 0 100 3 33 0 8 295 109 107 0 11 15 13 250 0 0 0 100 4 41 0 18 380 152 206 0 19 23 13 241 0 1 0 98 5 22 0 18 69 0 94 0 19 49 15 270 0 0 0 99 6 4089 0 24 90 5 114 2 16 72 21 1055 1 1 0 98 7 1671 0 11 75 1 111 2 15 44 19 1411 0 1 0 99 March 31, 2026 at 06:39:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2940 0 193 2194 102 944 31 154 109 52 3919 3 2 0 95 1 34210 0 22 282 8 1018 29 141 90 58 5418 8 7 0 85 2 1706 0 21 128 3 869 21 112 81 38 5275 2 2 0 96 3 2211 0 48 304 106 777 21 100 103 34 3473 3 1 0 96 4 989 0 7 632 115 741 19 84 83 31 2038 1 1 0 98 5 2076 0 259 253 39 705 14 86 79 35 3360 2 2 0 96 6 7004 0 147 397 3 631 9 69 121 26 3129 2 2 0 96 7 6037 0 15 426 2 625 10 57 126 55 2304 3 1 0 96 March 31, 2026 at 06:39:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2175 101 108 0 1 0 0 262 0 1 0 99 1 44 0 462 47 10 60 2 1 4 0 1693 0 1 0 99 2 0 0 0 79 1 2 0 0 1 0 294 0 0 0 100 3 0 0 3 280 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 289 104 8 0 1 0 0 0 0 0 0 100 5 0 0 42 174 50 103 0 1 2 0 0 0 1 0 99 6 2 0 14 89 4 16 0 1 0 0 268 0 0 0 100 7 0 0 0 83 2 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 101 141 0 9 60 0 259 0 0 0 100 1 0 0 0 76 9 151 1 9 87 0 1493 0 0 0 99 2 0 0 0 44 1 77 0 8 55 0 294 0 0 0 100 3 0 0 3 282 128 100 0 7 58 0 0 0 0 0 100 4 0 0 3 377 134 199 0 9 83 0 0 0 0 0 100 5 0 0 0 149 50 187 0 8 75 0 0 0 0 0 100 6 0 0 14 52 3 84 0 5 55 0 266 0 0 0 100 7 0 0 0 68 1 125 0 11 58 0 0 0 0 0 100 March 31, 2026 at 06:39:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 101 89 0 1 1 0 259 0 0 0 100 1 0 0 0 22 8 46 1 0 0 0 1654 0 0 0 100 2 0 0 0 15 3 14 0 0 0 0 311 0 0 0 100 3 0 0 3 210 101 8 0 0 0 0 12 0 0 0 100 4 0 0 3 244 104 32 0 0 0 0 0 0 0 0 100 5 0 0 0 115 56 102 0 0 0 0 0 0 0 0 100 6 0 0 14 18 4 24 0 1 1 0 286 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3732 0 35 2296 108 1126 22 142 131 77 4802 3 2 0 95 1 2187 0 25 247 13 872 22 135 88 56 5462 3 2 0 95 2 35029 0 190 323 28 815 28 91 98 49 3988 7 6 0 86 3 4266 0 201 715 106 810 15 84 89 64 3553 3 1 0 95 4 2539 0 330 362 107 779 9 112 88 79 3376 2 3 0 96 5 1698 0 11 428 18 774 18 106 151 67 4276 1 1 0 97 6 9153 0 40 439 5 810 10 90 188 51 3849 2 2 0 95 7 5414 0 11 325 4 614 15 85 139 49 2341 2 1 0 96 March 31, 2026 at 06:39:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 101 52 0 2 0 0 258 0 0 0 100 1 44 0 0 125 11 139 2 3 5 0 1690 0 0 0 99 2 0 0 7 122 51 106 0 2 0 0 294 0 0 0 100 3 0 0 3 219 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 224 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 19 0 0 0 0 0 0 0 0 0 0 100 6 3 0 84 15 4 10 1 0 4 0 268 0 0 0 100 7 0 0 0 22 1 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2157 101 13 1 1 3 0 262 0 1 0 99 1 0 0 350 141 11 166 0 0 3 0 1720 0 1 0 99 2 0 0 0 167 52 104 0 0 0 0 294 0 0 0 100 3 0 0 3 265 102 6 0 2 0 0 1 0 0 0 100 4 0 0 3 266 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 60 0 0 0 0 0 0 0 0 0 0 100 6 0 0 14 66 3 6 0 0 0 0 266 0 0 0 100 7 0 0 0 62 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2107 101 211 0 9 91 0 259 0 1 0 99 1 0 0 0 120 9 167 1 9 69 0 1352 0 0 0 99 2 0 0 0 167 51 190 0 8 56 0 595 0 0 0 100 3 0 0 3 301 131 105 0 7 50 0 0 0 0 0 100 4 0 0 3 304 132 94 0 6 61 0 0 0 0 0 100 5 0 0 0 68 0 95 0 5 83 0 0 0 0 0 100 6 0 0 14 69 5 83 0 5 59 0 269 0 0 0 100 7 0 0 0 76 1 107 0 5 58 0 0 0 0 0 100 March 31, 2026 at 06:39:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36509 0 52 2226 102 1174 35 198 173 44 5418 8 7 0 85 1 1685 0 204 564 12 1179 20 138 91 87 5329 2 2 0 97 2 3503 0 136 353 32 913 29 126 104 56 5445 3 3 0 95 3 2070 0 247 432 103 894 26 113 108 62 3203 2 1 0 96 4 3310 0 25 730 104 888 21 95 81 59 4401 4 1 0 95 5 1068 0 134 219 28 963 16 114 107 51 3869 1 2 0 97 6 5963 0 26 282 7 936 20 108 173 51 4001 2 2 0 95 7 9492 0 33 300 2 913 22 121 186 73 3728 3 3 0 94 March 31, 2026 at 06:39:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 77 2110 102 42 0 2 4 0 282 0 1 0 99 1 0 0 0 34 5 46 2 0 9 0 1324 0 0 0 99 2 25 0 0 30 4 13 0 2 0 0 606 0 0 0 100 3 0 0 17 227 104 12 0 1 0 0 19 0 0 0 100 4 0 0 10 228 103 10 0 2 0 0 17 0 0 0 100 5 67 0 0 215 56 201 0 4 0 0 26 0 0 0 100 6 7 0 14 30 4 14 0 2 0 0 273 0 0 0 100 7 2 0 0 23 2 4 0 0 1 0 9 0 0 0 100 March 31, 2026 at 06:39:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2171 101 14 0 0 3 0 262 0 1 0 99 1 0 0 462 18 2 38 1 1 2 0 1394 0 1 0 99 2 0 0 0 90 4 10 0 1 4 0 595 0 0 0 100 3 0 0 3 280 101 2 0 1 1 0 0 0 0 0 100 4 0 0 3 286 103 6 0 0 0 0 0 0 0 0 100 5 0 0 0 291 56 217 0 4 0 0 9 0 0 0 100 6 0 0 14 84 3 8 1 1 0 0 266 0 0 0 100 7 0 0 0 79 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 101 18 1 0 0 0 259 0 0 0 100 1 0 0 0 16 3 42 0 0 2 0 1393 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 595 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 218 58 210 0 0 0 0 8 0 0 0 100 6 0 0 14 12 4 10 0 1 0 0 268 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38611 0 41 2219 102 613 18 97 250 64 3677 8 8 0 85 1 811 0 8 372 2 629 8 92 192 62 4099 1 1 0 98 2 1577 0 136 300 3 551 8 72 162 52 2735 1 1 0 98 3 1430 0 224 540 132 585 6 87 154 53 1950 1 1 0 98 4 313 0 12 563 135 541 5 69 137 56 2024 0 1 0 99 5 3559 0 206 482 51 615 6 63 142 56 1416 2 2 0 97 6 1574 0 56 382 14 533 9 65 163 50 2120 1 1 0 98 7 9707 0 128 316 2 588 6 72 233 65 4425 2 3 0 95 March 31, 2026 at 06:39:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 982 0 7 2130 102 496 20 72 37 8 2066 1 1 0 98 1 732 0 0 224 5 436 21 67 38 4 2969 1 1 0 98 2 280 0 0 303 26 543 19 64 7 5 2168 2 1 0 98 3 867 0 45 421 133 353 14 41 47 4 1013 1 1 0 98 4 664 0 3 417 105 378 4 36 19 5 1142 1 1 0 98 5 680 0 0 273 5 434 15 41 41 2 1085 1 0 0 98 6 1472 0 91 191 5 372 12 36 60 5 1057 1 1 0 98 7 642 0 0 154 2 374 4 35 21 6 1582 1 0 0 99 March 31, 2026 at 06:39:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 8 2183 103 60 0 1 0 0 264 0 1 0 99 1 0 0 0 82 2 34 1 0 1 0 1386 0 0 0 99 2 0 0 0 87 2 8 0 2 2 0 594 0 0 0 100 3 44 0 3 389 156 114 0 1 0 0 9 0 0 0 100 4 0 0 3 285 104 8 0 1 0 0 1 0 0 0 100 5 0 0 0 157 1 80 0 1 2 0 0 0 0 0 100 6 2 0 56 82 3 10 0 0 2 0 268 0 1 0 99 7 0 0 462 19 2 9 0 2 3 0 0 0 0 0 100 March 31, 2026 at 06:39:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 101 38 0 1 0 0 259 0 0 0 100 1 0 0 0 16 3 38 1 1 3 0 1382 0 0 0 100 2 0 0 0 10 2 4 0 0 2 0 594 0 0 0 100 3 0 0 3 317 156 112 0 0 0 0 9 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 84 0 78 0 2 0 0 0 0 0 0 100 6 2 0 14 16 6 12 2 0 0 0 407 1 0 0 99 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 101 84 1 1 1 0 259 0 0 0 100 1 0 0 0 22 3 52 0 2 4 0 1380 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 594 0 0 0 100 3 0 0 3 318 157 112 0 0 0 0 9 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 36 0 30 0 2 0 0 0 0 0 0 100 6 0 0 14 11 4 8 0 0 0 0 267 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3294 0 622 2175 104 1299 40 203 198 71 4437 2 3 0 94 1 10105 0 49 559 3 1208 24 137 291 71 5687 3 3 0 93 2 5510 0 10 517 4 1011 18 131 236 46 4859 3 2 0 95 3 33616 0 74 608 178 1107 33 141 166 74 4060 7 6 0 86 4 2226 0 22 561 142 940 19 123 176 56 6270 3 2 0 96 5 2705 0 20 310 4 864 17 98 152 48 3226 3 1 0 96 6 2081 0 37 455 6 891 16 95 216 57 3224 2 2 0 96 7 4319 0 19 425 3 895 18 106 208 53 2705 2 2 0 96 March 31, 2026 at 06:39:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 77 2118 107 62 0 1 6 0 271 0 1 0 99 1 0 0 0 26 3 36 1 1 4 0 1383 0 0 0 100 2 0 0 0 30 3 16 0 0 3 0 608 0 0 0 100 3 0 0 3 325 152 110 0 0 1 0 12 0 0 0 100 4 0 0 3 222 103 4 0 0 1 0 0 0 0 0 100 5 0 0 0 107 10 80 0 2 1 0 0 0 0 0 100 6 2 0 21 30 6 18 0 0 1 0 283 0 0 0 100 7 0 0 0 31 3 10 0 1 8 0 0 0 0 0 100 March 31, 2026 at 06:39:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 49 2183 107 24 0 1 2 0 269 0 1 0 99 1 0 0 0 84 3 34 1 0 2 0 1383 0 0 0 99 2 0 0 0 89 2 16 0 1 1 0 595 0 0 0 100 3 0 0 2 376 150 100 0 0 0 0 0 0 0 0 100 4 0 0 4 283 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 182 0 106 0 1 0 0 0 0 0 0 100 6 0 0 14 86 4 10 0 0 0 0 268 0 0 0 100 7 0 0 462 16 1 8 0 1 2 0 0 0 0 0 100 March 31, 2026 at 06:39:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 106 20 0 0 0 0 267 0 0 0 100 1 0 0 0 10 2 34 1 0 1 0 1385 0 0 0 100 2 0 0 0 16 4 10 0 1 4 0 595 0 0 0 100 3 0 0 3 310 150 112 0 1 1 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 109 0 106 0 2 0 0 0 0 0 0 100 6 0 0 14 11 3 6 0 0 0 0 266 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2593 0 324 2203 107 1166 30 197 172 77 4253 3 2 0 95 1 9915 0 140 195 4 1210 49 187 196 89 5177 4 3 0 93 2 8266 0 39 251 4 876 30 141 180 64 5341 3 2 0 94 3 4125 0 75 746 129 861 17 110 123 72 4339 2 2 0 96 4 34299 0 31 503 126 802 18 119 106 56 5189 7 7 0 86 5 1324 0 24 470 4 806 14 109 93 54 2768 2 1 0 97 6 2539 0 206 355 5 652 15 89 92 52 3354 2 1 0 97 7 597 0 13 419 1 751 13 91 79 48 2194 1 1 0 98 March 31, 2026 at 06:39:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2122 102 260 0 9 81 0 272 0 1 0 99 1 47 0 0 78 4 112 0 7 62 0 308 0 0 0 100 2 45 0 0 87 7 156 2 7 83 0 1708 0 0 0 99 3 2 0 17 296 129 100 0 9 64 0 9 0 0 0 100 4 4 0 3 394 180 189 0 8 53 0 9 0 0 0 100 5 0 0 70 58 2 97 0 7 81 0 14 0 1 0 99 6 3 0 14 67 4 90 1 6 68 0 270 0 0 0 100 7 0 0 0 90 3 125 0 4 73 0 17 0 0 0 100 March 31, 2026 at 06:39:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2154 101 114 1 1 4 0 262 0 1 0 99 1 0 0 0 74 3 12 0 2 1 0 321 0 0 0 100 2 0 0 0 87 11 64 1 2 1 0 1716 0 0 0 99 3 0 0 3 265 101 10 0 1 0 0 12 0 0 0 100 4 0 0 3 367 152 114 0 1 0 0 0 0 0 0 100 5 0 0 0 72 8 2 0 0 0 0 0 0 0 0 100 6 0 0 14 70 4 22 0 0 0 0 286 0 0 0 100 7 0 0 343 19 1 16 0 0 5 0 0 0 0 0 100 March 31, 2026 at 06:39:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2122 103 123 0 3 0 0 259 0 1 0 99 1 0 0 0 27 2 6 0 1 2 0 285 0 0 0 100 2 0 0 0 52 11 54 1 1 1 0 1708 0 0 0 99 3 0 0 3 227 103 4 0 0 0 0 1 0 0 0 100 4 0 0 3 332 155 108 0 0 1 0 1 0 0 0 100 5 0 0 0 24 1 2 0 1 0 0 0 0 0 0 100 6 0 0 14 27 3 6 0 1 0 0 266 0 0 0 100 7 0 0 119 11 2 6 0 1 1 0 0 0 0 0 100 March 31, 2026 at 06:39:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1709 0 65 2224 102 913 18 136 155 55 3853 2 2 0 96 1 47627 0 161 433 4 835 34 119 226 69 6606 10 9 0 82 2 5783 0 22 319 12 850 16 110 194 63 6023 2 2 0 96 3 3051 0 432 328 102 741 14 105 93 77 3783 2 2 0 96 4 1065 0 14 670 145 852 15 113 86 83 2723 2 1 0 97 5 2523 0 128 430 8 943 20 94 86 74 3333 3 1 0 96 6 362 0 21 243 3 611 23 88 56 45 2506 1 1 0 98 7 1421 0 11 360 2 716 11 75 93 47 2334 2 1 0 97 March 31, 2026 at 06:39:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2110 103 124 0 1 6 0 267 0 1 0 99 1 50 0 7 47 7 31 0 4 7 0 157 0 0 0 100 2 23 0 0 36 7 44 1 1 1 0 1702 0 0 0 100 3 0 0 17 232 105 18 0 3 0 0 22 0 0 0 100 4 0 0 3 230 103 10 0 2 1 0 4 0 0 0 100 5 0 0 0 128 53 108 0 0 1 0 9 0 0 0 100 6 31 0 14 26 3 8 1 2 0 0 278 0 0 0 100 7 0 0 0 32 3 16 0 2 0 0 31 0 0 0 100 March 31, 2026 at 06:39:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2178 102 223 1 11 98 0 262 0 1 0 99 1 0 0 462 81 6 127 0 7 59 0 304 0 0 0 99 2 0 0 0 140 4 146 1 6 76 0 1676 0 1 0 99 3 0 0 3 356 132 82 0 7 31 0 0 0 0 0 100 4 0 0 3 365 134 106 0 9 63 0 0 0 0 0 100 5 0 0 0 226 50 198 0 8 72 0 0 0 0 0 100 6 0 0 14 124 3 90 0 8 33 0 268 0 0 0 100 7 0 0 0 129 1 103 0 4 38 0 0 0 0 0 100 March 31, 2026 at 06:39:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 102 142 0 2 0 0 259 0 0 0 100 1 0 0 0 28 8 16 0 1 2 0 311 0 0 0 100 2 0 0 0 21 4 50 1 1 2 0 1689 0 0 0 100 3 1 0 3 211 102 10 0 0 1 0 13 0 0 0 100 4 0 0 3 211 103 4 0 0 1 0 0 0 0 0 100 5 0 0 0 113 56 102 0 0 1 0 0 0 0 0 100 6 0 0 14 18 6 18 0 0 1 0 284 0 0 0 100 7 0 0 0 14 2 6 0 0 3 0 0 0 0 0 100 March 31, 2026 at 06:39:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18171 0 22 2202 103 595 13 74 89 49 3186 4 3 0 93 1 9497 0 441 170 11 467 9 60 140 65 3992 3 3 0 95 2 2468 0 17 279 4 514 8 68 99 68 3637 1 2 0 97 3 305 0 60 472 102 467 8 59 54 52 2626 0 1 0 99 4 432 0 14 363 104 423 4 55 52 58 1904 1 0 0 99 5 212 0 18 334 47 484 6 60 55 34 1214 0 1 0 98 6 296 0 27 232 6 352 2 47 56 29 1166 0 0 0 99 7 2872 0 20 256 3 296 7 44 47 33 1479 2 1 0 97 March 31, 2026 at 06:39:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16367 0 84 2140 102 574 20 87 42 14 2460 4 5 0 91 1 1065 0 177 77 3 494 25 75 42 14 1898 2 1 0 97 2 5537 0 14 289 5 402 16 53 90 13 3327 3 1 0 96 3 3815 0 34 460 104 445 9 50 83 24 2708 3 1 0 96 4 873 0 12 261 105 444 10 60 44 25 1310 1 1 0 99 5 615 0 0 211 2 390 4 41 25 16 1372 1 0 0 99 6 860 0 14 245 53 389 6 38 52 13 1271 1 1 0 99 7 446 0 0 48 2 342 6 37 31 4 947 1 0 0 99 March 31, 2026 at 06:39:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2172 102 112 1 2 2 0 262 0 1 0 99 1 0 0 462 25 2 14 0 1 4 0 435 0 0 0 100 2 0 0 0 88 3 38 0 1 1 0 1678 0 0 0 99 3 44 0 3 303 109 27 0 2 1 0 10 0 0 0 100 4 0 0 3 285 103 6 0 0 0 0 0 0 0 0 100 5 0 0 0 78 0 2 0 1 0 0 0 0 0 0 100 6 2 0 14 179 52 104 0 0 0 0 266 0 0 0 100 7 0 0 0 82 1 2 0 1 0 0 2 0 0 0 100 March 31, 2026 at 06:39:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 209 0 9 93 0 259 0 0 0 99 1 0 0 0 58 1 97 0 9 59 0 165 0 0 0 100 2 0 0 0 66 5 109 2 8 77 0 1378 0 0 0 99 3 0 0 3 299 135 110 0 10 59 0 9 0 0 0 100 4 0 0 3 288 130 101 0 9 69 0 0 0 0 0 100 5 0 0 0 46 0 85 0 5 45 0 0 0 0 0 100 6 0 0 14 143 52 206 0 8 74 0 563 0 0 0 100 7 0 0 0 57 0 110 0 7 36 0 0 0 0 0 100 March 31, 2026 at 06:39:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 103 112 0 1 0 0 259 0 0 0 100 1 0 0 0 16 1 10 1 0 0 0 296 0 0 0 100 2 0 0 0 17 4 16 0 0 1 0 612 0 0 0 100 3 0 0 3 225 107 21 0 1 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 11 5 2 0 0 0 0 0 0 0 0 100 6 0 0 14 116 53 148 1 0 1 0 1362 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3856 0 145 2281 105 1195 29 143 90 73 5313 4 2 0 94 1 34814 0 195 288 4 1136 46 153 163 55 5140 8 7 0 85 2 9284 0 311 548 5 1074 23 112 186 79 7213 4 4 0 93 3 6112 0 94 782 112 1055 27 123 192 73 4541 4 3 0 94 4 3669 0 26 729 105 960 28 112 128 59 2877 1 2 0 97 5 3640 0 67 536 4 875 12 81 102 55 3342 3 2 0 95 6 1689 0 24 309 54 868 12 91 118 60 4165 1 1 0 98 7 560 0 0 358 1 626 18 80 70 32 2478 2 1 0 97 March 31, 2026 at 06:39:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2119 102 108 0 0 0 0 262 0 0 0 100 1 44 0 0 41 8 28 0 1 9 0 287 0 0 0 100 2 0 0 0 26 3 8 0 0 3 0 595 0 0 0 100 3 0 0 75 216 102 14 0 1 6 0 0 0 0 0 100 4 0 0 1 224 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 18 0 2 0 0 0 0 0 0 0 0 100 6 2 0 21 123 53 138 1 1 1 0 1350 0 0 0 100 7 0 0 0 20 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2176 102 106 1 0 0 0 259 0 1 0 99 1 0 0 462 32 9 22 0 0 6 0 310 0 0 0 100 2 0 0 0 88 2 12 0 2 2 0 594 0 0 0 100 3 0 0 45 279 103 6 0 1 2 0 1 0 1 0 99 4 0 0 3 284 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 6 0 0 14 187 54 142 2 1 1 0 1349 0 0 0 100 7 0 0 0 78 0 2 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:39:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 206 0 8 106 0 0 0 0 0 100 1 0 0 0 87 7 146 1 13 64 0 308 0 0 0 100 2 0 0 0 70 2 112 1 7 61 0 595 0 0 0 100 3 0 0 3 297 136 111 0 11 75 0 0 0 0 0 100 4 0 0 3 295 135 135 0 11 105 0 0 0 0 0 100 5 0 0 0 61 0 112 0 7 89 0 0 0 0 0 100 6 0 0 21 81 23 145 0 6 49 0 1607 0 0 0 100 7 0 0 0 111 31 148 0 8 77 0 2 0 0 0 100 March 31, 2026 at 06:39:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4554 0 512 2185 105 1205 40 201 144 76 4348 3 3 0 94 1 2108 0 22 246 12 1074 33 171 123 76 4424 2 2 0 96 2 34397 0 14 207 4 917 34 153 154 54 6425 8 7 0 86 3 8172 0 70 673 109 736 22 113 190 45 3260 2 2 0 95 4 5255 0 19 673 106 865 36 118 171 81 4486 2 2 0 96 5 4679 0 130 201 27 850 24 114 145 52 3289 3 2 0 95 6 1307 0 38 434 10 897 18 110 121 67 5209 2 2 0 96 7 3518 0 39 512 27 821 19 106 97 59 2652 2 2 0 96 March 31, 2026 at 06:39:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 77 2115 105 126 0 2 6 0 28 0 1 0 99 1 0 0 0 35 3 18 0 2 10 0 315 0 0 0 100 2 2 0 0 24 2 8 0 1 1 0 602 0 0 0 100 3 2 0 17 223 102 7 0 2 0 0 7 0 0 0 100 4 25 0 3 228 103 8 0 2 0 0 9 0 0 0 100 5 19 0 0 121 50 102 0 1 0 0 9 0 0 0 100 6 51 0 21 37 8 54 0 1 0 0 1639 0 0 0 99 7 0 0 0 27 3 8 0 1 0 0 21 0 0 0 100 March 31, 2026 at 06:39:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2171 101 36 0 2 2 0 0 0 1 0 99 1 0 0 462 97 2 87 0 4 6 0 310 0 0 0 100 2 0 0 0 92 4 14 0 2 3 0 595 0 0 0 100 3 0 0 3 279 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 285 103 6 0 0 0 0 0 0 0 0 100 5 0 0 0 181 50 108 0 1 0 0 0 0 0 0 100 6 0 0 21 97 10 50 2 0 0 0 1625 0 0 0 100 7 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 10 0 0 1 0 0 0 0 0 100 1 0 0 0 37 4 28 1 0 0 0 290 0 0 0 100 2 0 0 0 91 2 88 0 1 0 0 594 0 0 0 100 3 0 0 3 210 102 4 0 1 0 0 1 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 6 0 0 21 22 9 50 2 1 0 0 1620 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 31 2137 101 302 0 32 1599 20 337 0 1 0 99 1 625 0 16 143 2 241 0 30 153 15 1964 0 1 0 99 2 25 0 19 151 2 217 2 27 1306 13 814 0 1 0 99 3 31 0 10 378 130 228 0 25 107 8 200 0 1 0 99 4 3155 0 121 340 132 213 3 30 112 24 1233 1 1 0 98 5 95 0 14 194 40 280 0 29 1053 26 275 0 1 0 99 6 64 0 24 184 30 313 2 26 72 20 1975 0 1 0 99 7 72 0 18 141 1 243 1 32 194 21 398 0 1 0 99 March 31, 2026 at 06:39:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 56 2107 102 18 0 2 5 0 0 0 1 0 99 1 0 0 0 34 3 22 0 1 6 0 296 0 0 0 100 2 0 0 7 29 2 22 0 2 0 0 608 0 0 0 100 3 0 0 3 320 102 104 0 1 0 0 0 0 0 0 100 4 0 0 3 231 105 16 1 0 0 0 12 0 0 0 100 5 0 0 0 30 9 168 0 0 0 0 331 0 0 0 100 6 0 0 21 175 78 196 1 1 1 0 1329 0 0 0 100 7 0 0 5 21 1 10 1 1 0 0 2 0 0 0 100 March 31, 2026 at 06:39:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2173 101 12 0 0 2 0 0 0 1 0 99 1 0 0 455 24 2 14 0 0 3 0 303 0 0 0 100 2 0 0 7 84 3 8 0 0 0 0 595 0 0 0 100 3 0 0 3 379 101 103 0 1 0 0 2 0 0 0 100 4 0 0 3 287 105 10 0 0 0 0 2 0 0 0 100 5 0 0 0 79 1 4 0 0 0 0 6 0 0 0 100 6 0 0 21 168 46 120 1 0 0 0 1292 0 0 0 100 7 0 0 1 140 29 68 0 2 0 0 2 0 0 0 100 March 31, 2026 at 06:39:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 10 0 1 0 0 2 0 0 0 100 1 0 0 0 18 2 12 1 0 2 0 300 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 595 0 0 0 100 3 0 0 3 306 101 102 0 1 0 0 0 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 21 51 24 78 1 0 0 0 1290 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:39:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 32 0 1 1 0 0 0 0 0 100 1 0 0 0 15 4 10 0 1 1 0 321 0 0 0 100 2 0 0 0 9 2 4 0 0 1 0 594 0 0 0 100 3 0 0 3 308 102 102 0 0 0 0 1 0 0 0 100 4 0 0 3 217 104 8 0 1 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 21 51 24 78 1 0 0 0 1291 0 0 0 100 7 0 0 0 107 50 102 0 0 3 0 0 0 0 0 100 March 31, 2026 at 06:40:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 168 0 8 50 0 2 0 0 0 100 1 0 0 0 66 3 119 0 10 60 0 299 0 0 0 100 2 3 0 0 47 2 80 0 8 42 0 597 0 0 0 100 3 0 0 3 325 130 150 0 3 44 0 0 0 0 0 100 4 0 0 3 284 130 98 0 7 61 0 3 0 0 0 100 5 0 0 0 41 3 66 0 6 44 0 0 0 0 0 100 6 0 0 7 92 24 155 1 8 51 0 1032 0 0 0 100 7 0 0 14 137 50 171 0 6 46 0 266 0 0 0 100 March 31, 2026 at 06:40:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 38 0 1 0 0 0 0 0 0 100 1 0 0 0 94 3 87 0 2 1 0 308 0 0 0 100 2 0 0 0 20 4 12 0 0 4 0 606 0 0 0 100 3 0 0 7 210 102 2 0 0 1 0 1 0 0 0 100 4 0 0 7 217 103 12 0 0 1 0 11 0 0 0 100 5 0 0 0 15 7 2 0 0 1 0 0 0 0 0 100 6 0 0 7 64 26 92 1 0 1 0 1043 0 0 0 100 7 0 0 14 111 52 106 0 1 1 0 266 0 0 0 100 March 31, 2026 at 06:40:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 97 0 1 2 0 2 0 0 0 100 1 0 0 0 39 2 32 1 0 4 0 294 0 0 0 100 2 0 0 0 11 3 4 0 0 2 0 593 0 0 0 100 3 0 0 3 207 101 2 0 1 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 53 23 76 1 0 0 0 1024 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 104 0 2 0 0 0 0 0 0 100 1 0 0 0 17 2 12 0 2 4 0 302 0 0 0 100 2 0 0 0 11 2 8 0 1 3 0 594 0 0 0 100 3 0 0 3 217 102 6 0 1 2 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 50 23 76 0 0 0 0 1025 0 0 0 100 7 0 0 14 105 51 102 1 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 0 0 0 0 2 0 0 0 100 1 0 0 0 14 4 6 0 0 0 0 300 0 0 0 100 2 0 0 0 10 2 6 0 1 2 0 595 0 0 0 100 3 0 0 2 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 4 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 51 23 76 1 0 0 0 1024 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 113 0 1 1 0 0 0 0 0 100 1 0 0 0 12 2 6 0 0 3 0 300 0 0 0 100 2 0 0 0 19 3 11 0 1 0 0 593 0 0 0 100 3 0 0 3 207 101 2 0 1 0 0 0 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 54 23 82 1 0 0 0 1027 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 117 0 1 0 0 2 0 0 0 100 1 2 0 0 15 3 8 1 1 1 0 305 0 0 0 100 2 0 0 0 17 3 18 0 1 0 0 611 0 0 0 100 3 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 4 0 0 3 218 103 20 0 1 0 0 13 0 0 0 100 5 0 0 0 14 8 2 0 0 0 0 0 0 0 0 100 6 1 0 7 62 26 92 1 0 0 0 1049 0 0 0 100 7 0 0 14 108 51 106 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 113 0 2 0 0 0 0 0 0 100 1 0 0 0 10 2 4 0 0 0 0 308 0 0 0 100 2 0 0 0 16 3 8 0 1 1 0 594 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 1 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 53 23 76 1 0 0 0 1025 0 0 0 100 7 0 0 14 106 51 102 1 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 114 0 1 0 0 2 0 0 0 100 1 0 0 0 17 2 8 0 1 1 0 296 0 0 0 100 2 0 0 0 12 3 8 0 1 2 0 595 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 213 103 6 0 0 1 0 0 0 0 0 100 5 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 6 0 0 7 51 23 78 0 1 0 0 1025 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 113 0 2 1 0 0 0 0 0 100 1 0 0 0 12 3 6 0 0 2 0 301 0 0 0 100 2 0 0 0 16 3 8 0 1 3 0 594 0 0 0 100 3 0 0 3 212 103 8 0 0 0 0 10 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 57 23 82 2 0 2 0 1025 0 0 0 100 7 0 0 14 107 51 106 0 0 0 0 284 0 0 0 100 March 31, 2026 at 06:40:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 114 0 1 0 0 2 0 0 0 100 1 0 0 0 17 2 10 1 1 4 0 294 0 0 0 100 2 0 0 0 13 3 10 0 1 1 0 595 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 212 103 6 0 0 1 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 1 0 0 0 0 0 100 6 0 0 7 53 23 82 0 0 1 0 1026 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 118 0 1 0 0 0 0 0 0 100 1 0 0 0 18 3 8 0 1 4 0 301 0 0 0 100 2 0 0 0 25 6 24 0 0 5 0 613 0 0 0 100 3 0 0 7 209 102 2 0 0 1 0 1 0 0 0 100 4 0 0 7 216 103 12 0 0 1 0 11 0 0 0 100 5 0 0 0 16 8 2 0 0 1 0 0 0 0 0 100 6 0 0 7 60 24 86 1 0 2 0 1040 0 0 0 100 7 0 0 14 115 52 112 1 1 2 0 266 0 0 0 100 March 31, 2026 at 06:40:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 132 0 3 1 0 2 0 0 0 100 1 0 0 0 11 2 4 0 0 3 0 300 0 0 0 100 2 0 0 0 12 3 6 0 1 0 0 595 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 30 12 52 0 0 0 0 1012 0 0 0 100 7 0 0 14 130 62 128 0 1 2 0 278 0 0 0 100 March 31, 2026 at 06:40:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 108 0 1 0 0 0 0 0 0 100 1 0 0 0 19 2 10 0 1 2 0 302 0 0 0 100 2 0 0 0 10 2 6 0 1 2 0 593 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 36 2 0 0 0 1005 0 0 0 100 7 0 0 14 145 71 142 0 0 0 0 286 0 0 0 100 March 31, 2026 at 06:40:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 0 0 0 0 2 0 0 0 100 1 0 0 0 15 3 8 1 1 0 0 299 0 0 0 100 2 0 0 0 13 4 8 0 0 2 0 595 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 11 3 36 1 0 0 0 1005 0 0 0 100 7 0 0 14 145 71 142 0 0 0 0 286 0 0 0 100 March 31, 2026 at 06:40:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 120 155 0 1 1 0 20 0 0 0 100 1 0 0 0 12 2 6 0 0 3 0 313 0 0 0 100 2 0 0 0 13 3 10 0 1 2 0 595 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 40 0 0 0 0 1006 0 0 0 100 7 0 0 14 106 51 102 1 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2146 122 157 0 1 0 0 22 0 0 0 100 1 0 0 0 12 2 6 0 1 1 0 289 0 0 0 100 2 0 0 0 18 5 18 0 0 2 0 610 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 215 103 12 0 0 0 0 12 0 0 0 100 5 0 0 0 15 9 2 0 0 0 0 0 0 0 0 100 6 0 0 7 18 3 48 2 0 0 0 1018 0 0 0 100 7 0 0 14 109 51 108 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 121 150 0 2 0 0 20 0 0 0 100 1 0 0 0 11 2 4 0 0 4 0 300 0 0 0 100 2 0 0 0 20 3 10 0 1 1 0 594 0 0 0 100 3 0 0 3 207 101 2 0 1 0 0 0 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 1 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 36 2 0 0 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 123 154 0 1 1 0 22 0 0 0 100 1 0 0 0 18 2 8 1 1 1 0 299 0 0 0 100 2 0 0 0 12 3 8 0 1 0 0 595 0 0 0 100 3 0 0 3 210 101 8 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 12 4 38 0 0 0 0 1006 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2145 121 153 0 1 1 0 20 0 0 0 100 1 0 0 0 16 4 10 0 1 1 0 323 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 593 0 0 0 100 3 0 0 2 208 102 2 0 0 0 0 1 0 0 0 100 4 0 0 4 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 11 3 36 1 0 0 0 1006 0 0 0 100 7 0 0 14 105 51 102 1 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2148 122 153 0 2 0 0 22 0 0 0 100 1 0 0 0 10 2 4 0 0 2 0 305 0 0 0 100 2 0 0 0 16 3 8 0 1 1 0 595 0 0 0 100 3 0 0 3 208 101 2 0 0 0 0 0 0 0 0 100 4 0 0 3 212 103 8 0 1 0 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 40 0 0 1 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2147 122 156 0 1 0 0 20 0 0 0 100 1 1 0 0 24 4 12 0 1 2 0 294 0 0 0 100 2 0 0 0 18 3 16 0 2 2 0 618 0 0 0 100 3 0 0 7 209 102 2 0 0 1 0 1 0 0 0 100 4 0 0 7 221 103 18 0 0 1 0 12 0 0 0 100 5 0 0 0 14 6 2 0 0 1 0 0 0 0 0 100 6 0 0 7 25 6 52 2 0 1 0 1022 0 0 0 100 7 0 0 14 111 52 106 0 0 1 0 266 0 0 0 100 March 31, 2026 at 06:40:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 111 131 0 2 0 0 10 0 0 0 100 1 0 0 0 34 13 28 1 1 2 0 316 0 0 0 100 2 0 0 0 18 4 10 0 1 3 0 617 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 36 0 0 1 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 110 0 1 0 0 0 0 0 0 100 1 0 0 0 59 22 50 0 1 2 0 320 0 0 0 100 2 0 0 0 10 2 6 0 1 1 0 595 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 213 103 6 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 2 0 1 1 0 0 0 0 0 100 6 0 0 7 11 3 36 1 0 1 0 1005 0 0 0 100 7 0 0 14 106 51 102 1 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 118 0 0 1 0 2 0 0 0 100 1 0 0 0 53 23 46 0 0 4 0 319 0 0 0 100 2 0 0 0 11 3 6 0 0 5 0 594 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 9 0 6 0 0 1 0 0 0 0 0 100 6 0 0 7 11 3 36 1 0 0 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 111 0 2 0 0 0 0 0 0 100 1 0 0 0 50 22 44 0 0 1 0 323 0 0 0 100 2 0 0 0 16 3 8 0 1 1 0 593 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 10 3 4 0 0 0 0 0 0 0 0 100 6 0 0 7 13 3 40 1 0 0 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 114 0 1 0 0 2 0 0 0 100 1 0 0 0 59 22 48 1 1 0 0 312 0 0 0 100 2 0 0 0 12 2 12 0 1 2 0 605 0 0 0 100 3 0 0 3 207 101 2 0 1 0 0 1 0 0 0 100 4 0 0 3 215 103 12 0 0 0 0 11 0 0 0 100 5 0 0 0 16 8 4 0 0 0 0 0 0 0 0 100 6 0 0 7 24 6 58 1 1 0 0 1024 0 0 0 100 7 0 0 14 108 51 106 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 1 2 0 0 0 0 0 100 1 0 0 0 15 2 8 0 1 2 0 308 0 0 0 100 2 0 0 0 11 3 6 0 0 4 0 595 0 0 0 100 3 0 0 3 244 120 38 0 0 0 0 19 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 1 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 16 3 44 0 0 2 0 1005 0 0 0 100 7 0 0 14 105 51 102 1 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 0 2 0 0 2 0 0 0 100 1 0 0 0 11 2 4 0 0 2 0 302 0 0 0 100 2 0 0 0 14 4 8 0 1 3 0 594 0 0 0 100 3 0 0 3 247 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 11 3 36 1 0 0 0 1006 0 0 0 100 7 3 0 14 107 51 102 2 0 0 0 411 1 0 0 99 March 31, 2026 at 06:40:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 0 2 0 0 0 0 0 0 100 1 0 0 0 21 3 12 0 1 1 0 303 0 0 0 100 2 0 0 0 10 2 6 0 1 2 0 594 0 0 0 100 3 0 0 3 248 122 42 0 0 0 0 21 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 14 3 38 2 0 1 0 1005 0 0 0 100 7 0 0 14 106 51 104 0 1 0 0 266 0 0 0 100 March 31, 2026 at 06:40:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 114 0 0 0 0 2 0 0 0 100 1 0 0 0 13 2 6 1 1 1 0 294 0 0 0 100 2 0 0 0 11 3 6 0 0 3 0 594 0 0 0 100 3 0 0 3 244 120 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 14 4 42 0 0 0 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 119 0 2 0 0 0 0 0 0 100 1 0 0 0 13 3 4 0 0 2 0 293 0 0 0 100 2 0 0 0 25 4 20 0 1 1 0 607 0 0 0 100 3 0 0 7 249 122 42 0 0 1 0 21 0 0 0 100 4 0 0 7 216 103 12 0 0 1 0 11 0 0 0 100 5 0 0 0 14 6 2 0 0 1 0 0 0 0 0 100 6 0 0 7 20 6 46 1 0 2 0 1021 0 0 0 100 7 0 0 14 111 52 106 0 0 1 0 266 0 0 0 100 March 31, 2026 at 06:40:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 103 111 0 1 0 0 2 0 0 0 100 1 0 0 0 20 2 10 0 1 5 0 302 0 0 0 100 2 0 0 0 12 2 14 0 2 5 0 595 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 13 3 36 1 0 0 0 1006 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 113 0 2 0 0 0 0 0 0 100 1 0 0 0 10 2 4 0 0 1 0 300 0 0 0 100 2 0 0 0 18 3 10 0 1 2 0 594 0 0 0 100 3 0 0 3 249 121 46 0 1 2 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 11 3 36 1 0 0 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 110 0 1 0 0 2 0 0 0 100 1 0 0 0 22 3 12 1 1 2 0 305 0 0 0 100 2 0 0 0 12 3 8 0 1 3 0 594 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 11 3 36 1 0 1 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 112 0 1 2 0 0 0 0 0 100 1 0 0 0 15 2 8 0 1 2 0 302 0 0 0 100 2 0 0 0 11 3 6 0 0 3 0 595 0 0 0 100 3 0 0 3 249 121 42 0 0 1 0 20 0 0 0 100 4 0 0 3 212 103 6 0 1 0 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 40 0 0 0 0 1004 0 0 0 100 7 0 0 14 106 51 102 1 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 118 0 2 1 0 2 0 0 0 100 1 0 0 0 13 3 6 0 0 3 0 328 0 0 0 100 2 0 0 0 19 5 18 0 2 3 0 621 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 219 103 18 0 0 0 0 11 0 0 0 100 5 0 0 0 12 6 2 0 0 0 0 0 0 0 0 100 6 0 0 7 17 3 48 1 0 1 0 1018 0 0 0 100 7 0 0 14 108 51 106 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 119 0 0 0 0 0 0 0 0 100 1 0 0 0 13 3 8 0 2 3 0 282 0 0 0 100 2 0 0 0 13 3 6 0 1 1 0 593 0 0 0 100 3 0 0 3 249 122 44 0 1 0 0 20 0 0 0 100 4 0 0 3 216 105 10 0 1 1 0 1 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 7 14 4 38 2 0 0 0 1006 0 0 0 100 7 0 0 14 107 52 104 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 0 0 2 0 0 0 100 1 0 0 0 13 3 4 1 0 1 0 295 0 0 0 100 2 0 0 0 14 4 10 0 1 0 0 595 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 213 103 6 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 2 0 1 1 0 0 0 0 0 100 6 0 0 7 12 4 38 0 0 0 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 2 0 0 0 0 0 0 100 1 0 0 0 14 4 8 0 0 4 0 323 0 0 0 100 2 0 0 0 16 4 10 0 1 1 0 594 0 0 0 100 3 0 0 3 261 123 54 0 1 0 0 30 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 9 0 6 0 0 2 0 0 0 0 0 100 6 0 0 7 14 3 38 1 1 0 0 1005 0 0 0 100 7 0 0 14 107 51 106 1 0 0 0 284 0 0 0 100 March 31, 2026 at 06:40:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 111 0 1 0 0 2 0 0 0 100 1 0 0 0 12 2 6 0 1 1 0 302 0 0 0 100 2 0 0 0 13 4 8 0 0 2 0 594 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 13 3 40 1 0 0 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 117 0 2 0 0 0 0 0 0 100 1 0 0 0 13 3 4 0 0 2 0 297 0 0 0 100 2 0 0 0 28 5 18 0 1 1 0 606 0 0 0 100 3 0 0 7 249 122 42 0 0 1 0 21 0 0 0 100 4 0 0 7 216 103 12 0 0 1 0 9 0 0 0 100 5 0 0 0 20 10 4 0 0 1 0 0 0 0 0 100 6 0 0 7 25 6 54 1 1 1 0 1025 0 0 0 100 7 0 0 14 112 52 108 0 0 1 0 266 0 0 0 100 March 31, 2026 at 06:40:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 108 0 1 0 0 2 0 0 0 100 1 0 0 0 20 2 10 1 1 1 0 297 0 0 0 100 2 0 0 0 12 3 8 0 1 2 0 593 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 17 4 40 1 0 0 0 1006 0 0 0 100 7 0 0 14 106 51 104 0 1 0 0 266 0 0 0 100 March 31, 2026 at 06:40:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 111 0 2 0 0 0 0 0 0 100 1 0 0 0 10 2 4 0 0 1 0 302 0 0 0 100 2 0 0 0 18 4 10 0 1 2 0 595 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 10 3 36 0 0 0 0 1004 0 0 0 100 7 0 0 14 106 51 102 1 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 126 0 2 0 0 2 0 0 0 100 1 0 0 0 21 3 12 0 1 1 0 303 0 0 0 100 2 0 0 0 12 3 8 0 1 0 0 594 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 11 3 36 1 0 0 0 1005 0 0 0 100 7 0 0 14 107 51 104 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 109 0 1 2 0 0 0 0 0 100 1 0 0 0 13 2 8 0 2 0 0 299 0 0 0 100 2 0 0 0 13 4 8 0 0 1 0 593 0 0 0 100 3 0 0 3 244 120 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 13 3 40 1 0 0 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 116 0 2 0 0 2 0 0 0 100 1 0 0 0 12 2 4 1 0 3 0 299 0 0 0 100 2 0 0 0 17 4 16 0 1 1 0 606 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 215 103 12 0 0 0 0 12 0 0 0 100 5 0 0 0 13 6 3 0 1 0 0 0 0 0 0 100 6 0 0 7 23 5 54 2 0 1 0 1026 0 0 0 100 7 0 0 14 108 51 104 0 0 1 0 266 0 0 0 100 March 31, 2026 at 06:40:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 109 0 1 0 0 0 0 0 0 100 1 0 0 0 20 2 10 0 1 5 0 303 0 0 0 100 2 0 0 0 14 3 14 0 2 5 0 595 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 1 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 36 0 0 0 0 1005 0 0 0 100 7 0 0 14 105 51 102 1 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 111 0 1 0 0 2 0 0 0 100 1 0 0 0 12 2 6 0 1 0 0 298 0 0 0 100 2 0 0 0 17 5 12 0 0 0 0 594 0 0 0 100 3 0 0 3 247 121 42 0 1 0 0 20 0 0 0 100 4 0 0 3 212 103 6 0 1 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 11 3 36 1 0 2 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 109 0 2 0 0 0 0 0 0 100 1 0 0 0 12 3 6 0 0 0 0 309 0 0 0 100 2 0 0 0 20 4 10 0 1 1 0 594 0 0 0 100 3 0 0 3 248 122 42 0 0 0 0 21 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 36 2 0 2 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 108 0 1 0 0 2 0 0 0 100 1 0 0 0 20 2 10 1 1 2 0 292 0 0 0 100 2 0 0 0 12 3 8 0 1 1 0 594 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 213 103 6 0 1 2 0 0 0 0 0 100 5 0 0 0 9 1 6 0 1 0 0 0 0 0 0 100 6 0 0 7 13 3 42 0 1 0 0 1006 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 115 0 2 0 0 0 0 0 0 100 1 0 0 0 14 4 6 0 0 1 0 301 0 0 0 100 2 0 0 0 30 5 24 0 2 2 0 607 0 0 0 100 3 0 0 3 248 122 42 0 0 1 0 21 0 0 0 100 4 0 0 3 215 103 12 0 0 1 0 10 0 0 0 100 5 0 0 0 13 6 2 0 0 1 0 0 0 0 0 100 6 0 0 7 26 7 52 1 0 1 0 1023 0 0 0 100 7 0 0 14 110 52 106 1 0 1 0 266 0 0 0 100 March 31, 2026 at 06:40:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 115 0 0 0 0 2 0 0 0 100 1 0 0 0 11 2 6 0 1 2 0 299 0 0 0 100 2 0 0 0 11 3 6 0 0 2 0 594 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 10 3 36 0 0 0 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 12 3 4 0 0 1 0 300 0 0 0 100 2 0 0 0 14 3 10 0 1 1 0 593 0 0 0 100 3 0 0 3 249 121 46 0 1 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 36 2 0 1 0 1005 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 2 0 0 2 0 0 0 100 1 0 0 0 14 3 6 1 0 1 0 301 0 0 0 100 2 0 0 0 14 4 8 0 1 0 0 594 0 0 0 100 3 0 0 3 248 121 42 0 0 0 0 20 0 0 0 100 4 0 0 3 212 103 6 0 1 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 11 3 36 1 0 0 0 1004 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 108 0 1 0 0 0 0 0 0 100 1 0 0 0 19 2 10 0 1 2 0 300 0 0 0 100 2 0 0 0 14 4 10 0 1 1 0 596 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 40 0 0 0 0 1006 0 0 0 100 7 0 0 14 105 51 102 1 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 118 0 0 0 0 2 0 0 0 100 1 0 0 0 11 2 4 0 0 0 0 299 0 0 0 100 2 0 0 0 20 6 18 0 0 2 0 609 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 217 103 14 0 0 0 0 9 0 0 0 100 5 0 0 0 15 8 4 0 1 0 0 0 0 0 0 100 6 0 0 7 18 4 48 1 0 1 0 1019 0 0 0 100 7 0 0 14 108 51 106 0 1 0 0 266 0 0 0 100 March 31, 2026 at 06:40:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 1 0 0 0 0 0 0 100 1 0 0 0 10 2 4 0 0 4 0 298 0 0 0 100 2 0 0 0 20 4 11 0 1 2 0 594 0 0 0 100 3 0 0 3 247 121 42 0 0 0 0 21 0 0 0 100 4 0 0 3 214 104 8 0 0 0 0 3 0 0 0 100 5 0 0 0 10 1 6 0 0 0 0 6 0 0 0 100 6 0 0 7 13 3 38 2 1 1 0 1004 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 2 0 0 0 100 1 0 0 0 12 2 4 1 0 1 0 298 0 0 0 100 2 0 0 0 15 5 10 0 0 2 0 595 0 0 0 100 3 0 0 3 246 121 40 0 0 0 0 20 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 15 5 40 1 0 0 0 1007 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 March 31, 2026 at 06:40:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 1 0 0 0 0 0 0 100 1 0 0 0 14 4 10 0 1 0 0 326 0 0 0 100 2 0 0 0 18 4 10 0 1 3 0 594 0 0 0 100 3 0 0 3 248 122 42 0 0 0 0 21 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 7 15 4 40 1 0 0 0 1005 0 0 0 100 7 0 0 14 106 51 104 1 1 0 0 266 0 0 0 100 March 31, 2026 at 06:41:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 438 0 1 10 0 2 0 0 0 100 1 0 0 2 14 3 6 0 0 3 0 297 0 0 0 100 2 567 0 0 28 3 34 0 1 1 2 705 0 0 0 100 3 7 0 6 246 117 53 0 4 0 2 135 0 0 0 100 4 9 0 3 242 103 63 1 5 221 0 219 0 0 0 100 5 3 0 0 789 777 13 0 3 494 0 31 0 0 0 100 6 1311 0 9 37 3 84 2 1 0 0 1276 1 1 0 99 7 2 0 16 233 51 356 0 3 126 0 302 0 0 0 100 March 31, 2026 at 06:41:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 118 0 1 0 0 0 0 0 0 100 1 0 0 0 21 3 10 0 1 3 0 300 0 0 0 100 2 0 0 1 21 5 16 0 0 6 0 606 0 0 0 100 3 0 0 3 208 102 2 0 0 1 0 1 0 0 0 100 4 0 0 3 218 103 14 0 0 1 0 12 0 0 0 100 5 0 0 0 30 22 2 0 0 1 0 0 0 0 0 100 6 1281 0 7 39 9 66 2 1 1 0 1066 0 0 0 99 7 0 0 14 110 52 106 0 0 1 0 266 0 0 0 100 March 31, 2026 at 06:41:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 550 0 2 8 0 2 0 0 0 100 1 0 0 0 12 2 4 1 0 0 0 297 0 0 0 100 2 0 0 0 19 4 12 0 1 3 0 596 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 214 103 8 0 0 0 0 3 0 0 0 100 5 0 0 0 1257 1247 6 0 1 633 0 0 0 0 0 100 6 0 0 7 63 5 132 1 0 91 0 1287 0 0 0 99 7 0 0 14 286 51 458 0 0 290 0 266 0 1 0 99 March 31, 2026 at 06:41:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 113 0 1 0 0 0 0 0 0 100 1 0 0 0 19 2 10 0 1 3 0 308 0 0 0 100 2 0 0 0 12 3 8 0 1 0 0 594 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 26 17 4 0 0 0 0 0 0 0 0 100 6 0 0 7 20 5 44 1 1 0 0 1025 0 0 0 100 7 0 0 14 106 51 104 1 0 0 0 266 0 0 0 100 March 31, 2026 at 06:41:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 147 0 3 1 0 2 0 0 0 100 1 0 0 0 13 3 6 0 0 2 0 301 0 0 0 100 2 0 0 0 16 4 12 0 1 1 0 596 0 0 0 100 3 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 4 0 0 3 213 103 8 0 0 0 0 6 0 0 0 100 5 0 0 0 127 120 2 0 0 7 0 0 0 0 0 100 6 1 0 7 28 4 60 0 0 0 0 1071 0 0 0 100 7 0 0 14 120 51 130 0 0 2 0 266 0 0 0 100