March 31, 2026 at 06:33:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 960 0 69 2329 138 7732 84 404 1984 11 8064 13 7 0 80 1 1163 0 163 307 12 5939 29 322 1818 12 10122 8 5 0 87 2 1255 0 226 343 13 8761 17 348 2040 15 18598 7 10 0 83 3 1149 0 370 657 317 8058 23 503 2137 16 17533 4 5 0 91 4 1145 0 100 611 319 6565 17 310 1897 14 13475 6 5 0 89 5 1045 0 78 8568 8284 5941 21 470 3714 15 12422 3 7 0 90 6 1014 0 92 389 20 7487 17 550 1965 18 14230 3 5 0 92 7 1177 0 46 303 12 6230 25 275 2258 8 3236 4 5 0 91 March 31, 2026 at 06:33:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8209 0 71 2299 158 974 22 215 4648 72 3434 5 29 0 66 1 6113 0 41 455 4 1074 31 216 6071 61 1822 2 3 0 94 2 4124 0 20 304 2 1076 18 224 5206 59 2312 2 3 0 95 3 2160 0 55 654 271 1079 32 209 5839 32 3490 5 5 0 90 4 4787 0 20 608 232 1256 21 218 5802 68 3106 2 10 0 89 5 6087 0 66 353 30 1123 27 207 5215 71 2891 6 4 0 89 6 8514 0 25 317 2 1013 26 231 4836 74 2888 6 5 0 89 7 4972 0 15 426 4 1053 35 226 4920 47 2733 4 4 0 92 March 31, 2026 at 06:33:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 19 2306 202 225 0 12 515 0 266 0 1 0 99 1 0 0 0 91 1 171 0 16 299 0 311 0 0 0 100 2 31 0 0 65 2 145 0 14 337 0 1065 0 0 0 100 3 0 0 9 305 148 106 0 9 365 0 575 0 0 0 100 4 0 0 0 237 99 291 0 13 281 0 16 0 0 0 100 5 0 0 0 72 9 122 0 10 203 0 294 0 0 0 100 6 0 0 0 55 1 101 0 8 256 0 15 0 0 0 100 7 0 0 0 74 1 135 0 5 346 0 0 0 0 0 100 March 31, 2026 at 06:33:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 19 2317 202 168 7 22 371 2 266 0 12 0 88 1 0 0 0 236 4 600 0 84 418 3 302 0 1 0 99 2 27 0 0 147 15 349 0 68 441 1 1048 0 1 0 99 3 0 0 9 359 200 125 8 27 265 4 547 0 12 0 88 4 0 0 0 189 117 146 6 19 237 1 0 0 12 0 88 5 0 0 0 51 3 108 8 32 263 2 294 0 12 0 88 6 0 0 0 45 1 98 7 29 219 2 0 0 12 0 88 7 0 0 0 49 2 96 7 21 235 2 0 0 12 0 88 March 31, 2026 at 06:33:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2307 201 577 0 144 1345 21 266 0 1 0 99 1 0 0 0 378 2 1127 0 122 742 15 300 0 1 0 99 2 0 0 0 190 2 455 1 106 701 17 45 0 1 0 99 3 0 0 10 612 294 668 0 133 1061 22 566 0 1 0 99 4 0 0 0 452 229 555 0 117 1035 22 0 0 1 0 99 5 0 0 0 185 3 434 0 98 463 12 294 0 0 0 99 6 0 0 0 180 1 452 0 104 497 9 2 0 1 0 99 7 0 0 0 186 1 492 0 116 684 11 997 0 1 0 99 March 31, 2026 at 06:33:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 19 2302 201 414 0 88 1032 20 266 0 1 0 99 1 0 0 0 401 3 843 0 80 489 15 301 0 1 0 99 2 0 0 0 99 1 270 0 78 555 12 0 0 1 0 99 3 0 0 9 517 270 348 0 75 584 11 552 0 1 0 99 4 0 0 0 343 208 338 1 71 593 7 0 0 1 0 99 5 2 0 0 128 13 294 0 67 458 16 315 0 1 0 99 6 0 0 0 101 0 251 0 75 326 12 0 0 0 0 100 7 0 0 0 111 5 293 1 67 376 15 1047 0 1 0 99 March 31, 2026 at 06:33:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2872 0 287 2348 202 911 39 132 623 13 2613 7 2 0 91 1 5519 0 14 335 2 1078 136 113 519 20 4057 6 7 0 87 2 3582 0 1 262 2 1118 137 129 437 20 2340 6 2 0 92 3 2886 0 7 572 173 920 73 102 469 13 1911 5 2 0 94 4 4214 0 0 350 73 870 134 102 438 10 1901 6 2 0 92 5 1916 0 1 311 48 684 59 81 429 12 2110 11 2 0 87 6 2106 0 0 185 1 461 34 76 307 13 1718 10 1 0 89 7 1031 0 0 207 10 533 64 74 401 5 1633 11 1 0 87 March 31, 2026 at 06:33:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 35 2306 202 120 0 1 0 0 307 0 0 0 100 1 19 0 7 34 8 58 1 2 1 0 1759 0 0 0 99 2 3 0 0 19 1 14 0 0 2 0 21 0 0 0 100 3 1 0 7 217 103 8 0 1 2 0 304 0 0 0 100 4 0 0 0 31 5 20 0 0 1 0 18 0 0 0 100 5 1 0 3 126 60 114 0 1 3 0 303 0 0 0 100 6 2 0 0 13 2 2 0 0 1 0 8 0 0 0 100 7 2 0 0 20 4 12 0 1 1 0 6 0 0 0 100 March 31, 2026 at 06:33:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2313 202 333 0 30 462 0 266 0 3 0 97 1 6 0 7 126 12 240 2 27 386 0 1691 0 1 0 99 2 0 0 0 160 4 312 0 24 420 0 0 0 0 0 100 3 0 0 7 364 156 242 0 20 327 0 301 0 1 0 99 4 0 0 0 165 54 222 0 23 410 0 0 0 0 0 100 5 0 0 0 196 47 296 0 26 413 0 294 0 1 0 99 6 0 0 0 104 1 211 0 23 468 0 2 0 0 0 100 7 0 0 0 119 1 244 0 29 348 0 0 0 0 0 100 March 31, 2026 at 06:33:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 202 112 0 0 0 0 266 0 0 0 100 1 0 0 7 27 9 52 0 0 0 0 1689 0 0 0 100 2 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 3 0 0 7 214 103 7 0 1 4 0 303 0 0 0 100 4 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 15 3 8 0 0 2 0 294 0 0 0 100 6 0 0 0 10 0 8 0 1 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 101 0 45 2315 202 265 1 20 48 4 1065 0 2 0 98 1 5264 0 16 102 13 200 5 18 89 19 2378 2 1 0 97 2 812 0 10 139 31 201 3 22 81 18 575 0 1 0 98 3 591 0 16 301 105 176 4 25 49 15 825 1 0 0 98 4 101 0 7 86 18 127 1 20 17 6 229 0 0 0 100 5 56 0 2 51 6 66 2 16 17 7 455 0 0 0 100 6 16 0 8 34 1 48 0 13 17 3 141 0 0 0 100 7 29 0 3 43 1 63 2 16 13 1 223 0 0 0 100 March 31, 2026 at 06:33:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2308 203 118 0 0 1 0 266 0 1 0 99 1 0 0 7 27 3 42 0 1 2 0 1601 0 0 0 99 2 0 0 5 16 2 6 0 1 0 0 1 0 0 0 100 3 0 0 7 215 102 4 0 0 3 0 300 0 0 0 100 4 0 0 0 117 53 108 0 1 0 0 1 0 0 0 100 5 55 0 0 28 9 18 0 0 7 0 302 0 0 0 100 6 0 0 7 9 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 17 3 6 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2322 202 124 0 0 0 0 266 0 1 0 99 1 5 0 126 18 3 42 2 1 1 0 1640 0 0 0 99 2 0 0 0 28 0 8 0 0 0 0 12 0 0 0 100 3 0 0 7 238 102 20 0 0 6 0 319 0 0 0 100 4 0 0 0 144 56 124 0 0 0 0 13 0 1 0 99 5 0 0 0 48 17 16 0 0 4 0 302 0 0 0 100 6 0 0 0 27 1 4 0 1 0 0 2 0 0 0 100 7 0 0 0 29 1 6 0 1 1 0 0 0 0 0 100 March 31, 2026 at 06:33:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2306 203 122 0 0 0 0 266 0 1 0 99 1 0 0 7 20 4 42 1 0 0 0 1590 0 0 0 100 2 0 0 0 10 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 219 102 12 0 0 5 0 302 0 0 0 100 4 0 0 0 114 53 106 0 0 0 0 1 0 0 0 100 5 0 0 0 28 9 22 0 0 4 0 302 0 0 0 100 6 0 0 0 10 0 6 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 179 0 189 2345 212 1180 29 132 23 1 6746 4 2 0 95 1 227 0 7 533 4 1070 24 100 13 1 7115 3 1 0 96 2 133 0 0 493 1 848 19 64 15 0 6460 2 1 0 97 3 126 0 7 447 103 977 21 63 27 0 6162 3 1 0 97 4 120 0 0 480 40 1011 16 61 9 0 4980 3 1 0 96 5 210 0 0 186 11 976 15 71 18 2 6717 2 1 0 97 6 106 0 0 271 9 825 8 50 11 0 6690 2 1 0 97 7 242 0 0 265 2 1094 9 50 12 1 5239 2 1 0 97 March 31, 2026 at 06:33:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2357 253 130 0 2 0 0 274 0 0 0 100 1 0 0 7 20 4 44 0 0 0 0 1598 0 0 0 100 2 0 0 0 10 1 0 0 0 0 0 0 0 0 0 100 3 0 0 7 219 103 14 0 0 2 0 321 0 0 0 100 4 0 0 0 16 3 12 0 0 0 0 9 0 0 0 100 5 0 0 0 17 5 12 0 0 4 0 300 0 0 0 100 6 0 0 0 107 0 100 0 0 0 0 0 0 0 0 100 7 0 0 0 21 7 14 0 0 0 0 20 0 0 0 100 March 31, 2026 at 06:33:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2320 213 130 0 2 0 0 273 0 0 0 99 1 0 0 7 108 48 132 2 2 0 0 1594 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 220 102 14 0 1 5 0 308 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 19 5 12 1 0 4 0 299 0 0 0 100 6 0 0 0 18 2 10 0 0 0 0 3 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2315 206 126 0 1 0 0 271 0 1 0 99 1 0 0 7 22 7 42 0 0 1 0 1596 0 0 0 100 2 0 0 0 107 48 104 0 1 1 0 12 0 0 0 100 3 0 0 7 217 102 16 0 0 3 0 324 0 0 0 100 4 0 0 0 23 5 18 0 0 1 0 17 0 0 0 100 5 0 0 0 21 10 8 0 0 1 0 295 0 0 0 100 6 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 13 2 6 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:33:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2326 210 286 0 24 281 0 590 0 1 0 99 1 0 0 7 89 3 194 1 16 227 0 1596 0 1 0 99 2 0 0 0 211 50 309 0 18 281 0 0 0 0 0 100 3 0 0 7 344 145 205 0 23 190 0 314 0 0 0 100 4 0 0 0 109 44 178 0 22 229 0 0 0 0 0 100 5 0 0 0 87 6 154 0 15 205 0 299 0 0 0 100 6 0 0 0 81 1 160 0 21 293 0 2 0 0 0 100 7 0 0 0 84 2 170 0 18 262 0 2 0 0 0 100 March 31, 2026 at 06:33:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 202 118 0 0 0 0 266 0 0 0 100 1 0 0 7 16 3 38 1 0 1 0 1592 0 0 0 100 2 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 3 0 0 7 217 102 12 0 0 2 0 312 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 12 3 6 0 0 5 0 294 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 14 4 8 0 0 0 0 5 0 0 0 100 March 31, 2026 at 06:33:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1392 0 134 2310 204 192 1 7 13 16 1277 1 1 0 98 1 75 0 7 54 3 87 2 7 11 7 1735 0 0 0 99 2 18 0 1 135 50 132 0 3 4 5 57 0 0 0 100 3 50 0 7 241 103 36 0 5 6 5 398 0 0 0 100 4 13 0 0 39 2 40 0 6 1 2 126 0 0 0 100 5 9 0 0 46 5 48 0 8 6 4 413 0 0 0 100 6 1894 0 0 42 1 41 2 8 4 8 356 0 1 0 99 7 72 0 0 64 7 85 0 10 6 8 169 0 0 0 100 March 31, 2026 at 06:33:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2313 206 126 0 0 0 0 272 0 0 0 100 1 0 0 7 15 3 38 0 0 0 0 1682 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 1 0 0 0 100 3 0 0 7 217 102 12 0 0 2 0 311 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 17 5 10 1 0 2 0 295 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2316 208 130 0 1 0 0 589 0 0 0 99 1 0 0 7 17 3 40 1 0 0 0 1677 0 0 0 100 2 0 0 0 95 42 91 0 1 0 0 12 0 0 0 100 3 0 0 7 243 112 44 0 1 2 0 333 0 0 0 100 4 0 0 0 20 3 22 0 0 0 0 15 0 0 0 100 5 0 0 0 17 8 6 0 0 4 0 294 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 203 126 0 0 1 0 266 0 0 0 100 1 0 0 7 20 4 48 0 4 0 0 1678 0 0 0 100 2 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 3 0 0 7 312 151 108 1 1 3 0 308 0 0 0 100 4 0 0 0 20 6 14 1 1 0 0 5 0 0 0 100 5 0 0 0 17 4 14 0 1 1 0 294 0 0 0 100 6 0 0 0 9 0 6 0 0 1 0 0 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 21 2309 203 120 0 0 0 0 271 0 0 0 100 1 0 0 7 18 3 42 2 0 0 0 1692 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 20 0 7 316 152 112 0 0 5 0 322 0 0 0 100 4 0 0 0 20 7 14 0 0 0 0 6 0 0 0 100 5 0 0 0 17 5 12 0 0 5 0 298 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 203 126 0 0 2 0 272 0 0 0 100 1 0 0 7 19 4 42 1 0 0 0 1689 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 319 153 118 0 0 3 0 317 0 0 0 100 4 0 0 0 23 8 16 0 0 0 0 16 0 0 0 100 5 0 0 0 18 4 14 1 0 2 0 336 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 8 0 0 0 0 5 0 0 0 100 March 31, 2026 at 06:33:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 203 120 0 0 0 0 267 0 0 0 100 1 0 0 7 16 3 40 1 0 1 0 1687 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 311 151 108 0 0 3 0 312 0 0 0 100 4 0 0 0 23 8 18 0 0 0 0 324 0 0 0 100 5 0 0 0 14 3 6 0 0 6 0 294 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 3 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:33:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 202 122 0 0 1 0 266 0 0 0 100 1 0 0 7 16 4 38 0 0 1 0 1683 0 0 0 100 2 0 0 0 12 1 8 0 0 1 0 11 0 0 0 100 3 0 0 7 319 151 122 1 0 6 0 325 0 0 0 100 4 0 0 0 24 6 16 0 0 1 0 16 0 0 0 100 5 0 0 0 21 11 6 0 0 3 0 294 0 0 0 100 6 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 23 7 16 0 0 1 0 6 0 0 0 100 March 31, 2026 at 06:33:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 202 120 0 0 2 0 266 0 0 0 100 1 9 0 7 17 3 40 2 0 1 0 1732 0 0 0 100 2 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 314 151 112 0 0 3 0 307 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 16 4 12 0 0 2 0 294 0 0 0 100 6 0 0 0 11 1 8 0 0 0 0 2 0 0 0 100 7 0 0 0 19 6 14 0 0 1 0 5 0 0 0 100 March 31, 2026 at 06:33:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2306 202 116 0 0 0 0 266 0 0 0 100 1 2 0 7 15 3 38 1 0 0 0 1687 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 2 308 151 104 0 0 0 0 310 0 0 0 100 4 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 5 9 0 0 16 5 10 1 0 4 0 323 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 15 5 10 0 0 0 0 5 0 0 0 100 March 31, 2026 at 06:33:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 423 0 61 2312 204 298 4 21 10 3 1616 1 1 0 99 1 13 0 7 49 6 126 5 14 2 0 2573 1 0 0 99 2 142 0 0 32 0 115 4 15 0 1 984 0 0 0 99 3 0 0 2 346 151 337 2 16 6 0 1630 0 0 0 99 4 13 0 0 62 3 245 0 16 3 0 1103 0 0 0 99 5 455 0 0 49 4 220 5 16 6 1 1889 1 0 0 99 6 7 0 0 43 4 184 2 16 0 1 1121 0 0 0 100 7 172 0 0 45 8 126 3 9 5 2 1660 1 0 0 98 March 31, 2026 at 06:33:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 35 2305 202 118 0 3 3 0 325 0 0 0 100 1 1 0 7 19 3 40 0 0 1 0 1705 0 0 0 100 2 0 0 0 19 1 12 0 2 0 0 18 0 0 0 100 3 0 0 7 317 151 112 1 1 3 0 314 0 0 0 100 4 0 0 0 13 2 6 0 0 0 0 1 0 0 0 100 5 0 0 0 17 3 12 0 0 2 0 301 0 0 0 100 6 0 0 0 21 6 14 0 0 0 0 19 0 0 0 100 7 0 0 0 13 1 4 0 1 0 0 12 0 0 0 100 March 31, 2026 at 06:33:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2303 202 122 0 0 0 0 266 0 0 0 100 1 0 0 7 15 3 38 2 0 0 0 1697 0 0 0 100 2 0 0 0 10 0 8 0 0 0 0 11 0 0 0 100 3 0 0 8 315 152 110 0 0 4 0 315 0 0 0 100 4 0 0 0 18 2 18 0 0 0 0 13 0 0 0 100 5 0 0 0 19 9 8 0 0 5 0 294 0 0 0 100 6 0 0 0 18 6 12 0 0 0 0 10 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2314 203 249 0 12 209 0 269 0 1 0 99 1 0 0 7 68 4 149 1 11 160 0 1701 0 1 0 99 2 0 0 0 84 0 153 0 7 105 0 0 0 0 0 100 3 0 0 7 405 182 249 0 15 130 0 297 0 0 0 100 4 0 0 0 103 33 133 0 15 140 0 1 0 0 0 100 5 0 0 0 86 7 156 1 12 149 0 300 0 0 0 100 6 0 0 0 70 6 114 1 11 96 0 8 0 0 0 100 7 0 0 0 65 2 119 0 10 128 0 0 0 0 0 100 March 31, 2026 at 06:33:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 21 2309 202 133 0 6 9 1 357 0 1 0 99 1 0 0 21 21 3 52 0 5 12 0 1707 0 0 0 99 2 1 0 0 18 1 15 0 4 1 1 83 0 0 0 100 3 0 0 7 325 151 130 0 4 16 1 336 0 0 0 100 4 0 0 7 18 2 22 0 6 10 0 4 0 0 0 100 5 1 0 0 27 5 27 0 3 11 0 314 0 0 0 100 6 0 0 0 35 8 38 0 1 8 0 45 0 0 0 100 7 0 0 9 18 1 13 1 4 5 0 0 0 1 0 99 March 31, 2026 at 06:33:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 202 112 0 0 0 0 266 0 0 0 100 1 0 0 7 22 4 42 1 0 1 0 1616 0 0 0 99 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 312 152 104 1 0 4 0 302 0 0 0 100 4 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 5 0 0 7 17 5 12 0 1 2 0 296 0 0 0 100 6 0 0 0 34 12 24 0 0 0 0 19 0 0 0 100 7 0 0 0 20 2 14 0 2 0 0 4 0 0 0 100 March 31, 2026 at 06:33:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2311 205 123 0 0 0 0 272 0 1 0 99 1 0 0 7 34 3 38 2 0 0 0 1605 0 0 0 99 2 0 0 0 24 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 329 151 110 0 0 1 0 296 0 0 0 100 4 0 0 0 28 3 6 0 0 0 0 1 0 0 0 100 5 0 0 0 30 3 8 0 0 3 0 294 0 0 0 100 6 0 0 0 35 6 14 0 1 0 0 10 0 0 0 100 7 0 0 0 34 2 12 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:33:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2307 202 116 0 0 1 0 266 0 1 0 99 1 0 0 7 16 4 36 1 0 1 0 1607 0 0 0 100 2 0 0 0 13 1 8 0 0 1 0 12 0 0 0 100 3 0 0 7 322 151 124 0 0 3 0 317 0 0 0 100 4 0 0 0 24 5 18 0 0 1 0 17 0 0 0 100 5 0 0 0 26 11 10 1 1 7 0 294 0 0 0 100 6 0 0 0 19 6 10 0 0 1 0 8 0 0 0 100 7 0 0 0 22 2 14 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:33:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 175 2339 207 1305 26 134 16 0 6125 4 1 0 95 1 19 0 7 376 9 1090 15 90 12 0 7256 3 1 0 96 2 38 0 0 308 3 912 13 65 7 0 5153 2 1 0 97 3 42 0 7 433 141 1124 16 65 7 0 5472 3 1 0 96 4 5 0 0 241 2 943 11 52 10 0 5399 2 1 0 97 5 25 0 0 361 4 816 6 32 3 0 5068 1 0 0 98 6 8 0 0 131 9 753 7 37 6 0 5985 2 1 0 97 7 51 0 0 213 1 767 5 35 9 0 6212 2 1 0 97 March 31, 2026 at 06:33:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2305 202 108 0 2 0 0 266 0 0 0 100 1 0 0 7 14 3 36 1 0 0 0 1605 0 0 0 100 2 0 0 0 14 1 6 0 2 0 0 0 0 0 0 100 3 0 0 4 324 155 120 0 1 0 0 317 0 0 0 100 4 0 0 0 10 2 6 0 1 0 0 10 0 0 0 100 5 0 0 0 11 3 6 0 0 1 0 294 0 0 0 100 6 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 7 0 0 0 17 2 10 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 21 2321 202 150 0 7 11 4 344 0 1 0 99 1 652 0 7 45 3 63 3 3 7 5 2514 1 1 0 98 2 6 0 0 30 0 18 0 5 2 3 55 0 0 0 100 3 5 0 7 352 160 146 1 5 5 4 375 0 0 0 100 4 2642 0 114 39 2 69 2 5 4 15 453 0 1 0 99 5 98 0 0 60 3 83 0 9 13 16 478 0 0 0 100 6 37 0 0 46 2 57 0 10 4 5 125 0 0 0 100 7 48 0 2 49 1 60 0 6 8 10 119 0 0 0 100 March 31, 2026 at 06:33:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 202 106 0 1 0 0 266 0 0 0 100 1 0 0 7 19 3 42 1 2 1 0 1691 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 318 156 110 0 0 3 0 307 0 0 0 100 4 0 0 0 12 2 8 0 0 0 0 10 0 0 0 100 5 0 0 0 17 4 8 0 0 6 0 294 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2303 202 116 0 0 0 0 271 0 0 0 100 1 0 0 7 14 3 40 0 0 0 0 1695 0 0 0 100 2 0 0 0 10 0 8 0 0 0 0 12 0 0 0 100 3 0 0 7 336 161 134 0 0 4 0 647 0 0 0 100 4 0 0 0 21 2 24 0 0 1 0 26 0 0 0 100 5 0 0 0 22 8 10 1 1 1 0 294 0 0 0 100 6 0 0 0 9 1 4 0 1 0 0 2 0 0 0 100 7 0 0 0 21 1 18 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:33:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2310 202 282 0 22 270 0 266 0 1 0 99 1 0 0 7 83 4 177 1 21 232 0 1691 0 1 0 99 2 0 0 0 88 0 173 0 16 241 0 0 0 0 0 100 3 0 0 2 427 194 317 0 22 198 0 300 0 0 0 100 4 0 0 0 121 45 170 0 25 267 0 10 0 0 0 100 5 0 0 0 84 4 155 0 19 214 0 294 0 0 0 100 6 0 0 0 75 1 145 0 24 253 0 0 0 0 0 100 7 0 0 0 99 6 170 0 17 224 0 6 0 0 0 100 March 31, 2026 at 06:33:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 309 0 65 2310 203 353 6 31 0 0 2115 1 1 0 98 1 35 0 7 100 9 325 13 33 3 0 3279 1 0 0 99 2 0 0 0 82 1 235 2 25 3 0 1663 0 0 0 99 3 78 0 7 372 144 301 3 27 6 0 1605 1 0 0 99 4 11 0 0 92 4 210 3 19 2 0 1122 0 0 0 99 5 1 0 0 67 3 145 1 19 6 0 2113 0 0 0 99 6 179 0 0 49 1 104 1 2 3 0 1230 1 0 0 99 7 415 0 0 125 7 293 3 22 9 1 2033 1 0 0 99 March 31, 2026 at 06:33:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 35 2303 202 112 0 0 0 0 314 0 0 0 99 1 0 0 7 119 54 144 0 0 1 0 1712 0 0 0 100 2 0 0 0 12 1 4 0 0 0 0 14 0 0 0 100 3 0 0 7 216 103 8 0 1 5 0 306 0 0 0 100 4 0 0 0 37 12 26 0 0 0 0 22 0 0 0 100 5 0 0 0 21 5 16 0 0 3 0 320 0 0 0 100 6 0 0 0 11 0 4 0 0 0 0 1 0 0 0 100 7 17 0 0 27 3 22 0 1 1 0 12 0 0 0 100 March 31, 2026 at 06:33:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2314 203 159 0 7 21 0 363 0 1 0 99 1 0 0 7 127 53 155 1 1 9 0 1716 0 0 0 99 2 0 0 0 16 1 13 0 1 2 1 70 0 0 0 100 3 0 0 7 216 101 6 0 0 6 0 307 0 0 0 100 4 1 0 0 41 10 44 2 4 11 0 34 0 0 0 100 5 0 0 9 24 4 24 1 3 16 0 302 0 1 0 99 6 0 0 14 20 1 20 0 6 11 0 21 0 0 0 100 7 0 0 0 20 1 14 0 3 5 0 33 0 0 0 100 March 31, 2026 at 06:33:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2304 202 119 0 0 0 0 266 0 0 0 99 1 0 0 7 117 54 136 1 0 1 0 1610 0 0 0 100 2 0 0 0 29 9 22 0 0 1 0 22 0 0 0 100 3 0 0 7 217 103 13 0 0 2 0 330 0 0 0 100 4 0 0 0 29 4 26 0 0 1 0 10 0 0 0 100 5 0 0 0 20 9 6 0 0 3 0 294 0 0 0 100 6 0 0 7 14 2 6 0 0 1 0 0 0 0 0 100 7 0 0 0 16 3 8 0 1 1 0 0 0 0 0 100 March 31, 2026 at 06:33:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2309 202 235 0 10 221 0 266 0 1 0 99 1 0 0 7 176 53 232 2 9 147 0 1607 0 1 0 99 2 0 0 0 86 6 112 1 9 138 0 9 0 0 0 100 3 0 0 7 311 133 139 0 8 123 0 302 0 0 0 100 4 0 0 0 117 30 136 0 5 98 0 1 0 0 0 100 5 0 0 0 85 5 121 0 13 151 0 294 0 0 0 100 6 0 0 0 76 2 108 0 10 145 0 2 0 0 0 100 7 0 0 0 74 2 106 0 11 123 0 0 0 0 0 100 March 31, 2026 at 06:33:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2307 202 110 0 0 0 0 266 0 1 0 99 1 5 0 7 32 11 54 0 0 0 0 1605 0 0 0 100 2 0 0 0 108 48 106 0 2 0 0 9 0 0 0 100 3 0 0 7 212 102 2 1 0 5 0 301 0 0 0 100 4 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 5 0 0 0 13 3 6 0 0 4 0 294 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:33:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 175 2332 202 1290 37 131 9 0 6839 3 1 0 96 1 41 0 7 267 3 1031 27 96 8 0 8519 3 1 0 96 2 53 0 0 579 58 946 14 56 17 0 5700 3 1 0 96 3 18 0 7 345 105 1061 17 78 18 0 5975 2 1 0 97 4 7 0 0 341 1 909 16 67 12 0 5533 2 1 0 97 5 22 0 0 454 3 817 10 56 13 0 5613 2 1 0 97 6 7 0 0 231 4 987 17 63 15 0 4512 2 1 0 97 7 16 0 0 169 4 654 10 52 8 0 5844 2 1 0 97 March 31, 2026 at 06:33:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2310 207 110 0 5 0 0 266 0 0 0 100 1 0 0 7 95 43 120 1 1 0 0 1606 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 3 0 0 4 227 105 23 0 4 0 0 310 0 0 0 100 4 0 0 0 13 3 8 0 1 0 0 3 0 0 0 100 5 0 0 0 21 8 16 0 0 2 0 300 0 0 0 100 6 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 7 0 0 0 22 4 14 0 3 0 0 10 0 0 0 100 March 31, 2026 at 06:33:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 202 120 0 0 0 0 266 0 0 0 100 1 0 0 7 114 53 138 1 0 0 0 1607 0 0 0 100 2 0 0 0 10 0 8 0 0 0 0 12 0 0 0 100 3 0 0 7 220 102 16 0 1 4 0 312 0 0 0 100 4 0 0 0 27 6 26 0 1 0 0 22 0 0 0 100 5 0 0 0 26 12 14 1 0 2 0 299 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 13 1 8 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:33:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2311 202 276 0 19 326 0 266 0 1 0 99 1 0 0 7 179 54 271 1 19 236 0 1610 0 1 0 99 2 0 0 0 88 0 175 0 18 176 0 0 0 0 0 100 3 0 0 7 301 140 206 0 20 301 0 302 0 0 0 100 4 0 0 0 111 40 154 0 19 270 0 0 0 0 0 100 5 0 0 0 83 7 152 0 21 216 0 287 0 0 0 100 6 0 0 0 71 0 144 0 21 228 0 0 0 0 0 100 7 0 0 0 94 1 175 0 16 167 0 10 0 0 0 100 March 31, 2026 at 06:33:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 203 119 0 1 1 0 547 0 0 0 100 1 0 0 7 114 53 138 1 0 0 0 1607 0 0 0 100 2 5 0 0 10 1 6 0 0 0 0 4 0 0 0 100 3 0 0 7 209 101 1 1 0 0 0 290 0 0 0 100 4 0 0 0 20 5 16 0 0 0 0 11 0 0 0 100 5 0 0 0 28 8 28 1 1 1 0 326 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:33:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 203 120 0 0 1 0 561 0 0 0 100 1 0 0 7 116 54 138 1 0 0 0 1606 0 0 0 99 2 0 0 0 24 8 18 0 0 0 0 14 0 0 0 100 3 0 0 7 216 104 10 0 0 1 0 310 0 0 0 100 4 0 0 0 11 2 6 0 0 0 0 3 0 0 0 100 5 0 0 0 18 2 16 0 0 0 0 18 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 3 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 11 0 0 0 100 March 31, 2026 at 06:33:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 665 0 21 2324 204 179 1 17 15 7 1510 1 1 0 98 1 9 0 7 67 12 88 1 6 9 3 1725 0 0 0 100 2 35 0 0 137 48 142 0 5 3 7 129 0 0 0 100 3 20 0 7 239 103 30 0 5 3 6 359 0 0 0 100 4 7 0 0 39 4 25 0 3 3 0 71 0 0 0 100 5 2622 0 113 36 3 57 2 4 7 12 454 0 1 0 99 6 105 0 2 41 1 51 0 9 14 10 140 0 0 0 100 7 22 0 0 44 1 53 0 8 16 7 126 0 0 0 100 March 31, 2026 at 06:33:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 203 128 0 1 0 0 560 0 0 0 100 1 0 0 7 15 4 36 1 0 1 0 1691 0 0 0 99 2 0 0 0 123 56 120 0 0 1 0 15 0 0 0 100 3 0 0 7 219 104 14 0 0 1 0 317 0 0 0 100 4 0 0 0 18 3 16 0 0 1 0 14 0 0 0 100 5 0 0 0 26 11 12 0 0 2 0 0 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 14 2 6 0 0 1 0 10 0 0 0 100 March 31, 2026 at 06:33:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 203 120 0 0 4 0 560 0 0 0 100 1 0 0 7 17 4 42 1 0 1 0 1692 0 0 0 100 2 0 0 0 121 56 114 0 0 0 0 329 0 0 0 100 3 0 0 7 211 102 2 1 0 1 0 300 0 0 0 100 4 0 0 0 14 3 10 0 0 0 0 6 0 0 0 100 5 0 0 0 19 2 18 0 0 0 0 2 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 2 0 0 0 100 7 0 0 0 12 1 10 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:33:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 203 120 0 0 2 0 560 0 0 0 100 1 0 0 7 14 3 36 1 0 0 0 1690 0 0 0 100 2 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 3 0 0 7 210 102 2 0 0 1 0 300 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 20 7 14 0 0 0 0 6 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:34:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 21 2309 204 118 0 0 1 0 565 0 0 0 100 1 0 0 7 15 3 40 1 0 0 0 1693 0 0 0 100 2 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 19 5 14 1 0 0 0 8 0 0 0 100 5 0 0 0 31 10 24 1 1 0 0 14 0 0 0 100 6 0 0 0 15 2 14 0 1 0 0 6 0 0 0 100 7 5 0 0 11 2 6 0 0 0 0 15 0 0 0 100 March 31, 2026 at 06:34:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 21 2308 203 120 0 0 0 0 576 0 0 0 100 1 0 0 7 15 3 36 2 0 1 0 1683 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 1 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 18 6 12 0 0 0 0 5 0 0 0 100 6 0 0 0 10 0 6 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:34:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 203 120 0 0 0 0 560 0 0 0 100 1 0 0 7 14 3 38 1 0 0 0 1687 0 0 0 100 2 1 0 0 115 51 116 0 0 0 0 11 0 0 0 100 3 0 0 7 216 102 12 1 0 1 0 312 0 0 0 100 4 0 0 0 22 4 20 0 0 0 0 21 0 0 0 100 5 0 0 0 28 13 18 0 0 0 0 329 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 12 1 8 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:34:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 203 120 0 0 3 0 560 0 0 0 100 1 0 0 7 18 5 42 0 0 1 0 1686 0 0 0 100 2 0 0 0 116 55 110 0 0 0 0 6 0 0 0 100 3 0 0 7 210 102 2 0 0 1 0 300 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 13 1 14 0 1 0 0 10 0 0 0 100 March 31, 2026 at 06:34:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 203 120 0 0 1 0 559 0 0 0 99 1 0 0 7 16 3 40 2 1 0 0 1685 0 0 0 100 2 0 0 0 116 55 110 0 0 0 0 6 0 0 0 100 3 0 0 7 214 104 6 0 0 0 0 302 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 12 1 6 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:34:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 203 114 0 0 1 0 561 0 0 0 100 1 0 0 7 20 4 42 1 1 0 0 1684 0 0 0 100 2 0 0 0 126 59 118 0 0 0 0 14 0 0 0 100 3 0 0 7 214 104 6 0 0 1 0 302 0 0 0 100 4 0 0 0 11 2 6 0 0 0 0 3 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 21 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 3 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 11 0 0 0 100 March 31, 2026 at 06:34:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 466 0 70 2323 205 313 11 33 14 0 2942 1 1 0 98 1 2 0 14 88 4 181 7 19 13 0 2770 1 1 0 98 2 137 0 0 189 53 331 9 33 19 0 1210 1 0 0 99 3 9 0 7 294 107 153 7 26 9 0 1826 0 0 0 99 4 75 0 7 94 7 190 3 27 19 0 1609 1 0 0 99 5 37 0 8 124 3 238 6 22 9 0 1362 0 1 0 99 6 104 0 0 55 1 86 0 5 15 1 1156 1 0 0 99 7 235 0 0 98 2 236 6 16 13 1 1813 1 0 0 99 March 31, 2026 at 06:34:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 21 2308 203 129 0 0 1 0 566 0 0 0 99 1 0 0 7 18 4 40 0 0 1 0 1611 0 0 0 100 2 0 0 0 22 2 20 0 0 1 0 21 0 0 0 100 3 0 0 7 222 104 16 0 1 1 0 318 0 0 0 100 4 0 0 0 111 47 108 0 1 1 0 24 0 0 0 100 5 0 0 7 49 23 35 0 2 1 0 0 0 0 0 100 6 0 0 0 12 2 4 0 0 1 0 10 0 0 0 100 7 0 0 0 18 3 10 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:34:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2311 203 262 0 9 210 0 560 0 1 0 99 1 0 0 7 88 4 151 2 8 138 0 1606 0 1 0 99 2 0 0 0 86 0 134 0 11 133 0 0 0 0 0 100 3 0 0 7 327 140 171 0 10 171 0 300 0 0 0 100 4 0 0 0 124 45 153 0 8 118 0 9 0 0 0 100 5 0 0 0 177 52 209 0 6 111 0 0 0 0 0 100 6 0 0 0 84 2 121 0 13 129 0 3 0 0 0 100 7 0 0 0 93 1 147 0 9 128 0 0 0 0 0 100 March 31, 2026 at 06:34:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2307 203 120 0 0 0 0 560 0 0 0 99 1 0 0 7 16 3 38 1 0 0 0 1605 0 0 0 100 2 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 215 102 10 0 1 0 0 300 0 0 0 100 4 0 0 0 25 9 18 0 0 0 0 10 0 0 0 100 5 0 0 0 111 52 104 0 0 0 0 0 0 0 0 100 6 0 0 0 13 3 6 0 0 0 0 4 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 203 124 0 1 1 0 569 0 0 0 100 1 0 0 7 15 3 40 1 1 1 0 1606 0 0 0 100 2 0 0 0 8 0 4 0 0 0 0 9 0 0 0 100 3 0 0 7 217 103 11 0 0 0 0 376 0 0 0 100 4 0 0 0 36 12 36 0 1 1 0 28 0 0 0 100 5 1 0 0 112 52 107 0 1 0 0 7 0 0 0 100 6 0 0 0 14 3 9 0 1 0 0 14 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 189 2373 239 1337 25 120 21 0 7206 3 1 0 96 1 22 0 7 179 3 1107 28 88 19 0 7955 4 1 0 95 2 33 0 0 239 2 1123 25 73 15 0 5402 2 1 0 97 3 6 0 7 366 109 1163 17 58 18 0 5678 2 1 0 97 4 4 0 0 383 3 1072 19 61 12 1 5982 2 1 0 97 5 33 0 0 489 16 953 12 42 17 0 5694 3 1 0 96 6 17 0 0 271 2 679 7 23 15 0 7309 2 1 0 98 7 0 0 0 396 2 730 6 38 3 0 5224 2 0 0 98 March 31, 2026 at 06:34:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2357 253 120 0 1 1 0 560 0 0 0 100 1 0 0 7 16 3 38 2 0 0 0 1607 0 0 0 100 2 0 0 0 10 0 8 0 0 0 0 12 0 0 0 100 3 0 0 7 224 106 23 0 0 1 0 319 0 0 0 100 4 0 0 0 21 3 18 0 0 0 0 16 0 0 0 100 5 0 0 0 121 9 112 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 19 3 14 0 1 0 0 11 0 0 0 100 March 31, 2026 at 06:34:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2523 0 24 2330 204 292 4 33 361 14 1816 1 2 0 97 1 53 0 7 228 53 338 0 29 228 14 1806 0 1 0 99 2 22 0 0 123 0 205 0 26 196 3 100 0 0 0 100 3 7 0 7 353 145 208 1 27 178 3 356 0 0 0 100 4 2 0 0 130 38 165 0 19 275 2 16 0 1 0 99 5 751 0 120 127 3 219 0 25 264 11 150 0 1 0 99 6 111 0 0 114 0 197 0 23 139 16 139 0 0 0 100 7 24 0 0 113 3 186 0 15 240 4 138 0 0 0 100 March 31, 2026 at 06:34:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 203 116 0 0 2 0 560 0 0 0 100 1 0 0 7 114 53 138 1 0 0 0 1690 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 217 105 9 0 0 0 0 305 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 24 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 11 0 0 0 100 March 31, 2026 at 06:34:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 203 120 0 0 1 0 563 0 0 0 99 1 0 0 7 42 16 66 1 0 1 0 1698 0 0 0 100 2 0 0 0 98 44 96 0 1 0 0 12 0 0 0 100 3 0 0 7 220 106 10 1 0 1 0 622 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 0 8 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 11 0 0 0 100 March 31, 2026 at 06:34:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2311 205 126 0 0 2 0 562 0 0 0 100 1 68 0 7 15 3 38 1 0 0 0 1414 0 0 0 99 2 3 0 0 133 60 134 0 2 0 0 58 0 0 0 100 3 0 0 7 215 103 9 0 2 1 0 617 0 0 0 100 4 0 0 0 15 3 11 0 2 0 0 3 0 0 0 100 5 0 0 0 14 2 11 0 1 0 0 7 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 2 0 0 0 100 7 15 0 0 18 1 24 0 1 0 0 37 0 0 0 100 March 31, 2026 at 06:34:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 169 0 73 2313 203 421 8 28 7 1 2191 0 1 0 99 1 124 0 7 89 3 305 15 31 12 2 2879 1 0 0 99 2 18 0 0 80 6 201 12 23 5 0 1429 1 0 0 99 3 0 0 3 281 104 263 2 23 2 0 1871 1 0 0 99 4 100 0 0 176 53 369 2 21 5 1 1940 1 0 0 99 5 258 0 0 61 8 148 4 20 5 0 2126 1 0 0 98 6 0 0 0 61 2 145 3 21 9 0 1490 0 0 0 100 7 366 0 10 48 3 56 1 4 3 0 1269 1 0 0 99 March 31, 2026 at 06:34:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2313 204 252 1 22 140 0 560 0 1 0 99 1 0 0 7 73 3 160 1 16 117 0 1399 0 0 0 99 2 0 0 0 102 8 174 0 16 143 0 10 0 0 0 100 3 0 0 7 295 131 148 1 15 152 0 300 0 0 0 100 4 0 0 0 148 64 164 0 11 105 0 300 0 0 0 100 5 0 0 0 94 20 136 0 12 89 0 0 0 0 0 100 6 0 0 0 56 1 99 0 8 121 0 2 0 0 0 100 7 0 0 0 66 3 116 0 13 106 0 4 0 0 0 100 March 31, 2026 at 06:34:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2308 203 136 0 6 18 0 576 0 1 0 99 1 0 0 7 36 2 73 1 6 6 2 1409 0 0 0 100 2 2 0 7 27 4 24 2 4 9 0 35 0 0 0 100 3 0 0 14 220 103 16 0 4 9 0 300 0 0 0 100 4 1 0 0 34 8 28 1 1 0 0 323 0 0 0 100 5 0 0 8 30 8 29 0 3 11 1 75 0 1 0 99 6 0 0 0 103 44 99 0 4 6 0 8 0 0 0 100 7 1 0 0 21 2 15 1 1 3 0 30 0 0 0 100 March 31, 2026 at 06:34:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2308 203 123 0 0 0 0 560 0 0 0 100 1 0 0 7 16 2 38 2 0 0 0 1310 0 0 0 100 2 0 0 7 9 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 211 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 32 12 26 0 0 0 0 312 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 109 51 102 0 0 0 0 2 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2309 203 123 0 1 1 0 561 0 1 0 99 1 0 0 7 30 2 36 0 0 1 0 1307 0 0 0 100 2 0 0 0 32 2 16 0 1 2 0 5 0 0 0 100 3 0 0 7 229 103 6 0 1 0 0 301 0 0 0 100 4 0 0 0 44 11 22 0 0 0 0 311 0 0 0 100 5 0 0 0 26 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 122 50 100 0 0 0 0 0 0 0 0 100 7 0 0 0 25 1 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2307 203 124 0 0 1 0 560 0 0 0 99 1 0 0 7 14 2 38 1 1 1 0 1310 0 0 0 100 2 0 0 0 15 0 12 0 0 2 0 12 0 0 0 100 3 0 0 7 218 102 16 0 0 0 0 316 0 0 0 100 4 0 0 0 26 6 19 0 0 1 0 317 0 0 0 100 5 0 0 0 32 14 18 0 1 0 0 12 0 0 0 100 6 0 0 0 109 51 102 0 0 0 0 2 0 0 0 100 7 0 0 0 14 2 6 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 175 2346 207 1456 39 180 314 0 7386 3 2 0 96 1 18 0 7 250 15 1406 27 128 264 0 7476 3 1 0 96 2 25 0 0 283 7 1191 25 104 221 0 6845 3 1 0 96 3 2 0 7 791 155 1134 14 74 237 0 6929 2 1 0 97 4 13 0 0 515 51 1169 22 86 205 0 6079 3 1 0 96 5 12 0 0 354 6 1032 9 74 191 0 7231 2 1 0 97 6 26 0 0 308 10 925 8 65 224 0 5761 3 1 0 96 7 3 0 0 406 24 1236 16 69 255 0 4373 2 1 0 97 March 31, 2026 at 06:34:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 23 2307 203 118 1 1 0 0 560 0 0 0 99 1 0 0 7 12 2 38 1 1 0 0 1308 0 0 0 100 2 0 0 0 13 1 8 0 0 0 0 1 0 0 0 100 3 0 0 7 211 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 10 2 5 0 0 0 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 20 6 12 0 0 0 0 8 0 0 0 100 7 0 0 0 112 52 106 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:34:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 649 0 21 2326 203 175 1 8 6 11 1480 1 1 0 98 1 24 0 7 39 3 57 1 3 6 4 1479 0 0 0 100 2 5 0 0 36 2 24 0 2 4 2 60 0 0 0 100 3 2625 0 123 246 105 74 2 4 7 17 765 0 1 0 99 4 105 0 0 58 3 89 0 8 13 20 471 0 0 0 100 5 25 0 0 51 2 70 0 9 5 10 155 0 0 0 100 6 57 0 0 57 6 69 0 7 8 9 104 0 0 0 100 7 5 0 0 144 54 139 0 5 2 3 72 0 0 0 100 March 31, 2026 at 06:34:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2311 204 124 0 0 0 0 562 0 0 0 100 1 0 0 7 12 2 36 1 0 1 0 1390 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 11 3 6 0 0 0 0 299 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 18 6 12 0 0 0 0 8 0 0 0 100 7 0 0 0 112 52 108 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:34:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 203 120 0 1 3 0 559 0 0 0 99 1 0 0 7 15 3 36 1 0 1 0 1393 0 0 0 100 2 0 0 0 19 3 16 0 1 3 0 16 0 0 0 100 3 0 0 7 232 108 32 0 1 2 0 324 0 0 0 100 4 0 0 0 23 4 22 1 0 1 0 316 0 0 0 100 5 0 0 0 15 7 2 0 0 1 0 0 0 0 0 100 6 0 0 0 21 6 10 1 0 1 0 327 0 0 0 100 7 0 0 0 120 54 116 0 1 1 0 15 0 0 0 100 March 31, 2026 at 06:34:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 203 122 0 0 4 0 560 0 0 0 100 1 0 0 7 14 3 40 0 0 1 0 1390 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 221 106 14 0 0 0 0 305 0 0 0 100 4 0 0 0 13 3 8 0 1 1 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 2 0 0 0 100 7 0 0 0 111 52 106 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:34:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 125 0 77 2315 206 446 4 25 2 0 2540 1 1 0 98 1 6 0 7 83 16 156 3 14 6 0 2567 1 0 0 99 2 448 0 0 128 30 237 4 26 10 2 1415 1 0 0 99 3 25 0 7 288 105 261 3 25 8 0 1644 1 0 0 99 4 22 0 0 64 6 205 0 20 3 0 1604 0 0 0 99 5 178 0 7 48 1 112 0 7 4 3 1255 1 0 0 99 6 139 0 0 85 1 353 0 19 4 0 1338 0 0 0 99 7 250 0 0 137 10 300 1 27 2 0 2064 1 0 0 99 March 31, 2026 at 06:34:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2328 211 132 0 0 0 0 571 0 0 0 100 1 0 0 7 12 2 36 1 0 1 0 1396 0 0 0 100 2 0 0 0 108 50 100 0 0 0 0 0 0 0 0 100 3 0 0 7 213 102 4 0 0 0 0 303 0 0 0 100 4 0 0 0 14 3 8 0 0 3 0 300 0 0 0 100 5 0 0 0 11 1 8 0 1 1 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 29 2317 207 154 0 3 13 1 643 0 1 0 99 1 0 0 7 25 3 55 0 10 14 0 1331 0 0 0 100 2 2 0 0 117 50 112 0 5 5 0 25 0 0 0 100 3 0 0 7 238 110 33 0 4 2 0 319 0 0 0 100 4 0 0 21 18 3 16 1 7 16 0 301 0 0 0 100 5 0 0 0 19 1 13 0 2 6 0 20 0 0 0 100 6 0 0 0 22 1 25 0 4 12 0 75 0 0 0 100 7 0 0 0 24 3 19 0 3 3 0 40 0 0 0 100 March 31, 2026 at 06:34:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 203 120 0 0 3 0 559 0 0 0 99 1 0 0 7 14 2 36 1 0 0 0 1307 0 0 0 100 2 1 0 0 45 16 40 0 0 0 0 15 0 0 0 100 3 0 0 7 303 144 102 0 1 0 0 326 0 0 0 100 4 0 0 0 28 5 25 0 2 1 0 317 0 0 0 100 5 0 0 7 16 8 4 0 1 1 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 14 2 8 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2330 204 262 0 8 166 0 564 0 1 0 99 1 0 0 7 88 4 152 2 12 183 0 1307 0 1 0 99 2 0 0 0 88 1 132 0 11 77 0 0 0 0 0 100 3 4 0 7 384 173 211 0 9 173 0 322 0 0 0 99 4 0 0 112 133 50 174 0 8 153 0 304 0 1 0 99 5 0 0 0 78 2 107 0 8 109 0 6 0 0 0 100 6 0 0 0 72 0 101 0 5 109 0 0 0 0 0 100 7 4 0 0 83 3 276 0 7 132 0 331 0 0 0 100 March 31, 2026 at 06:34:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2310 203 118 0 0 1 0 561 0 0 0 99 1 0 0 7 14 2 38 1 1 1 0 1307 0 0 0 100 2 2 0 0 10 1 4 0 1 0 0 1 0 0 0 100 3 0 0 7 229 110 20 1 0 0 0 314 0 0 0 100 4 0 0 7 115 53 110 0 1 0 0 303 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 189 2326 203 1331 32 140 15 1 7086 3 1 0 96 1 6 0 7 188 3 1174 31 112 18 0 6877 3 1 0 95 2 37 0 0 258 1 1048 24 93 15 0 6214 3 1 0 96 3 3 0 7 718 111 1035 17 60 6 0 7435 2 1 0 97 4 4 0 0 381 18 755 12 51 7 0 7304 3 1 0 96 5 46 0 0 447 6 840 9 46 16 0 5273 2 1 0 97 6 13 0 0 502 35 967 19 51 12 0 5655 2 1 0 97 7 18 0 0 426 4 790 12 39 2 0 5139 2 0 0 97 March 31, 2026 at 06:34:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 203 124 0 0 0 0 561 0 1 0 99 1 0 0 7 13 2 38 1 0 1 0 1308 0 0 0 100 2 0 0 0 14 1 10 0 0 0 0 1 0 0 0 100 3 0 0 7 220 107 14 0 0 0 0 307 0 0 0 100 4 0 0 0 11 2 5 0 0 0 0 300 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 111 52 106 0 0 0 0 2 0 0 0 100 7 0 0 0 15 4 10 0 0 0 0 13 0 0 0 100 March 31, 2026 at 06:34:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 203 120 0 0 4 0 559 0 0 0 99 1 0 0 7 15 3 36 1 0 2 0 1311 0 0 0 100 2 0 0 0 14 1 10 0 0 1 0 12 0 0 0 100 3 0 0 7 234 110 28 0 1 1 0 326 0 0 0 100 4 0 0 0 23 4 25 0 1 2 0 315 0 0 0 100 5 0 0 0 15 7 2 0 0 1 0 0 0 0 0 100 6 0 0 0 108 51 102 0 1 0 0 0 0 0 0 100 7 0 0 0 20 5 14 0 1 1 0 15 0 0 0 100 March 31, 2026 at 06:34:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2313 203 273 0 25 327 0 561 0 1 0 99 1 0 0 7 80 3 180 1 20 319 0 1306 0 1 0 99 2 0 0 0 83 0 156 1 20 209 0 0 0 0 0 100 3 0 0 7 305 142 134 0 17 232 0 305 0 0 0 100 4 0 0 0 105 41 138 1 12 187 0 300 0 1 0 99 5 0 0 0 99 1 192 0 23 174 0 0 0 0 0 100 6 0 0 0 178 51 259 0 29 202 0 2 0 0 0 100 7 0 0 0 83 2 162 0 20 226 0 10 0 0 0 100 March 31, 2026 at 06:34:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2640 0 134 2311 204 185 2 5 12 16 990 0 1 0 98 1 114 0 7 52 2 94 1 8 15 13 1522 0 0 0 99 2 27 0 1 46 2 49 1 11 18 4 135 0 0 0 100 3 17 0 7 255 108 63 0 5 13 8 709 0 0 0 100 4 9 0 0 44 3 49 1 8 8 2 408 0 0 0 100 5 6 0 0 39 1 39 0 4 3 4 54 0 0 0 100 6 30 0 0 144 51 149 0 3 2 8 95 0 0 0 100 7 643 0 0 42 4 38 1 4 2 5 915 1 0 0 99 March 31, 2026 at 06:34:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 203 116 0 0 2 0 561 0 0 0 100 1 0 0 7 13 2 36 2 0 1 0 1390 0 0 0 100 2 2 0 0 18 6 12 0 0 0 0 7 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 300 0 0 0 100 5 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 109 51 104 0 1 1 0 2 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:34:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 63 2307 203 231 3 14 2 0 1796 1 1 0 98 1 0 0 7 132 40 239 2 16 3 0 2635 0 0 0 99 2 269 0 0 37 3 80 4 6 1 3 1635 1 0 0 98 3 10 0 7 254 104 162 4 12 1 0 1728 1 0 0 99 4 500 0 0 61 5 249 6 22 1 0 1886 1 0 0 99 5 7 0 0 61 2 103 2 13 1 0 1295 0 0 0 100 6 306 0 0 72 13 196 2 20 2 3 1310 0 0 0 99 7 0 0 0 59 7 153 4 16 1 0 1101 1 0 0 99 March 31, 2026 at 06:34:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 203 122 0 0 3 0 560 0 0 0 100 1 0 0 7 113 52 138 1 0 0 0 1399 0 0 0 100 2 0 0 0 12 0 8 0 0 0 0 12 0 0 0 100 3 0 0 7 216 102 14 0 0 0 0 313 0 0 0 100 4 0 0 0 22 4 19 0 0 1 0 317 0 0 0 100 5 0 0 0 16 9 2 0 0 0 0 0 0 0 0 100 6 0 0 0 13 1 8 0 0 0 0 2 0 0 0 100 7 0 0 0 26 8 22 0 0 0 0 9 0 0 0 100 March 31, 2026 at 06:34:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2312 203 242 0 13 202 0 589 0 1 0 99 1 0 0 15 167 53 246 1 15 177 0 1413 0 1 0 99 2 0 0 0 70 2 115 0 14 93 0 14 0 0 0 100 3 0 0 7 302 132 127 0 8 117 0 311 0 0 0 100 4 0 0 0 105 34 148 1 17 145 1 381 0 0 0 100 5 0 0 0 79 2 141 2 16 128 0 12 0 0 0 100 6 0 0 0 96 5 161 0 12 123 0 83 0 0 0 100 7 0 0 0 94 7 165 0 15 154 0 47 0 0 0 100 March 31, 2026 at 06:34:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2308 203 121 0 1 2 0 560 0 0 0 100 1 0 0 14 115 52 140 2 1 0 0 1313 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 3 0 0 7 211 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 14 3 6 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 30 11 22 0 0 0 0 17 0 0 0 100 7 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2310 203 135 0 1 1 0 561 0 1 0 99 1 0 0 7 133 53 140 0 1 0 0 1309 0 0 0 100 2 0 0 7 24 0 4 0 1 0 0 1 0 0 0 100 3 0 0 7 237 107 12 0 0 0 0 310 0 0 0 100 4 20 0 0 30 3 7 0 0 0 0 305 0 0 0 100 5 0 0 0 27 2 4 0 0 0 0 21 0 0 0 100 6 0 0 0 33 5 10 0 0 0 0 5 0 0 0 100 7 0 0 0 31 3 8 0 0 2 0 1 0 0 0 100 March 31, 2026 at 06:34:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2307 203 126 0 0 2 0 560 0 0 0 100 1 4 0 7 115 52 140 1 1 0 0 1307 0 0 0 100 2 0 0 0 16 3 10 0 1 0 0 2 0 0 0 100 3 0 0 7 214 103 6 0 1 0 0 301 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 24 8 18 0 0 0 0 12 0 0 0 100 7 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 161 2335 204 1203 29 115 16 0 6830 3 1 0 96 1 2 0 21 301 21 1061 20 87 16 0 8311 3 1 0 96 2 45 0 0 341 5 955 15 64 10 0 6074 3 1 0 96 3 16 0 7 611 115 868 11 49 9 0 7066 2 1 0 97 4 5 0 0 195 29 1258 13 65 24 0 5739 2 1 0 97 5 17 0 0 130 9 871 18 58 11 0 5629 2 1 0 97 6 40 0 0 227 6 1148 8 40 11 0 5195 2 1 0 97 7 46 0 0 148 3 691 7 39 7 0 6242 2 1 0 97 March 31, 2026 at 06:34:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 202 261 0 18 237 0 294 0 1 0 99 1 0 0 21 76 3 162 1 12 184 0 1574 0 1 0 99 2 0 0 0 68 0 133 0 17 185 0 0 0 0 0 100 3 0 0 7 321 142 165 1 18 216 0 306 0 0 0 100 4 0 0 0 205 87 242 0 17 270 0 316 0 0 0 100 5 0 0 0 80 8 140 0 12 228 0 0 0 0 0 100 6 0 0 0 89 1 172 0 15 209 0 2 0 0 0 100 7 0 0 0 85 2 158 0 18 223 0 0 0 0 0 100 March 31, 2026 at 06:34:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 7 2325 202 176 0 12 15 8 435 0 0 0 99 1 18 0 21 47 3 74 0 7 4 5 1662 0 0 0 100 2 33 0 0 50 2 51 0 3 7 5 98 0 0 0 100 3 6 0 7 251 111 37 0 2 1 3 372 0 0 0 100 4 1891 0 0 81 21 80 2 5 5 6 634 0 1 0 99 5 1413 0 113 91 33 133 1 7 10 18 991 1 1 0 98 6 91 0 0 43 0 54 0 7 8 11 131 0 0 0 100 7 22 0 2 45 2 56 0 6 11 13 145 0 0 0 100 March 31, 2026 at 06:34:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 116 0 0 0 0 294 0 0 0 100 1 0 0 21 12 3 38 1 0 1 0 1660 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 218 106 10 0 0 0 0 305 0 0 0 100 4 0 0 0 13 3 9 0 0 1 0 311 0 0 0 100 5 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2302 202 116 0 0 1 0 296 0 0 0 99 1 0 0 21 18 5 46 1 1 1 0 1664 0 0 0 100 2 0 0 0 12 1 8 0 0 0 0 5 0 0 0 100 3 0 0 7 229 110 22 0 1 0 0 630 0 0 0 100 4 0 0 0 14 3 6 1 0 0 0 300 0 0 0 100 5 0 0 0 110 52 104 0 0 0 0 1 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2312 205 118 0 2 0 0 294 0 0 0 100 1 0 0 21 25 8 50 1 2 0 0 1662 0 0 0 100 2 0 0 0 33 11 32 0 1 0 0 12 0 0 0 100 3 0 0 7 220 102 18 0 0 0 0 313 0 0 0 100 4 1 0 0 21 4 20 0 0 0 0 326 0 0 0 100 5 0 0 0 87 41 74 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 13 2 8 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 179 0 63 2317 203 509 10 34 122 2 1650 1 1 0 98 1 512 0 21 160 8 343 6 32 174 0 3325 1 1 0 98 2 11 0 0 205 44 398 8 36 127 0 1603 1 0 0 99 3 14 0 7 359 139 368 7 35 139 0 1949 1 0 0 99 4 151 0 0 151 33 340 4 28 138 1 2076 1 1 0 99 5 0 0 0 116 1 344 7 39 112 0 1724 0 0 0 99 6 108 0 0 156 5 366 9 42 136 0 2377 1 1 0 98 7 118 0 2 116 2 270 2 20 124 1 1494 1 0 0 99 March 31, 2026 at 06:34:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2325 210 134 0 0 1 0 308 0 0 0 99 1 0 0 21 15 3 40 1 1 0 0 1668 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 4 0 0 0 100 3 0 0 7 321 154 118 0 0 0 0 305 0 0 0 100 4 0 0 0 12 3 6 0 0 1 0 300 0 0 0 100 5 0 0 0 12 2 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 2 0 0 0 0 2 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 207 142 0 3 8 0 333 0 1 0 99 1 0 0 28 21 4 57 1 3 18 1 1676 0 0 0 99 2 0 0 0 21 1 20 0 0 0 0 26 0 0 0 100 3 0 0 14 328 153 131 0 3 7 1 327 0 0 0 100 4 0 0 0 24 4 19 1 1 7 0 316 0 0 0 100 5 0 0 0 25 1 28 1 4 7 2 168 0 0 0 100 6 0 0 0 32 6 32 0 2 6 0 17 0 0 0 100 7 0 0 9 22 3 20 0 4 14 0 3 0 1 0 99 March 31, 2026 at 06:34:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 123 0 0 1 0 294 0 0 0 100 1 0 0 21 13 3 38 0 0 1 0 1579 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 3 0 0 14 314 152 108 0 0 0 0 303 0 0 0 100 4 0 0 0 13 3 6 0 0 0 0 300 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 26 9 20 0 0 0 0 14 0 0 0 100 7 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:34:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2309 202 125 0 1 0 0 294 0 1 0 99 1 0 0 21 30 4 36 1 0 2 0 1572 0 0 0 99 2 0 0 0 28 1 8 0 0 1 0 12 0 0 0 100 3 0 0 7 341 153 124 0 0 1 0 317 0 0 0 100 4 0 0 0 41 6 24 0 0 2 0 318 0 0 0 100 5 0 0 0 31 7 2 0 0 1 0 0 0 0 0 100 6 0 0 0 38 8 14 0 0 1 0 10 0 0 0 100 7 0 0 0 31 3 8 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:34:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 202 238 0 6 80 0 294 0 1 0 99 1 0 0 21 62 3 136 2 3 64 0 1574 0 0 0 100 2 0 0 0 57 1 97 0 4 50 0 0 0 0 0 100 3 0 0 7 383 182 200 0 4 52 0 300 0 0 0 100 4 0 0 0 87 35 106 0 4 55 0 301 0 0 0 100 5 0 0 0 49 1 82 0 8 38 0 0 0 0 0 100 6 0 0 0 86 7 146 1 7 43 0 8 0 0 0 100 7 0 0 0 66 2 115 0 5 49 0 0 0 0 0 100 March 31, 2026 at 06:34:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 175 2334 203 1300 29 102 17 0 8358 3 1 0 96 1 2 0 21 332 6 1156 22 89 18 2 8691 3 1 0 96 2 2 0 0 330 2 828 11 57 10 0 7164 3 1 0 97 3 7 0 7 495 127 1113 14 67 15 0 5912 3 1 0 97 4 3 0 0 531 31 929 16 55 16 1 6909 2 1 0 97 5 2 0 0 145 3 1064 18 76 16 1 5559 3 1 0 96 6 0 0 0 341 8 892 11 53 10 0 4966 2 1 0 97 7 6 0 0 268 3 915 12 37 25 0 4669 2 1 0 98 March 31, 2026 at 06:35:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 118 0 0 0 0 294 0 0 0 100 1 0 0 21 20 7 46 1 0 0 0 1579 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 10 0 0 0 100 3 0 0 7 217 102 12 0 0 0 0 300 0 0 0 100 4 0 0 0 112 53 106 0 0 0 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 3 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 118 0 0 1 0 294 0 0 0 100 1 0 0 21 27 10 50 1 0 0 0 1599 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 10 0 0 0 100 3 0 0 7 219 104 12 0 0 1 0 301 0 0 0 100 4 0 0 0 113 53 108 0 0 4 0 303 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 202 120 0 0 0 0 294 0 0 0 100 1 0 0 14 20 7 44 0 0 1 0 1319 0 0 0 100 2 0 0 7 12 0 12 1 1 0 0 281 0 0 0 100 3 0 0 7 216 102 16 0 0 0 0 318 0 0 0 100 4 0 0 0 123 55 119 0 0 0 0 317 0 0 0 100 5 0 0 0 18 9 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 7 2336 204 316 0 26 244 8 385 0 1 0 99 1 10 0 14 133 7 237 2 25 242 4 1738 0 1 0 99 2 648 0 7 125 1 219 2 22 213 7 1202 1 1 0 99 3 7 0 7 352 149 180 0 14 231 3 353 0 0 0 100 4 781 0 114 178 73 291 1 25 238 17 494 0 1 0 99 5 97 0 0 120 2 200 0 26 198 10 111 0 0 0 100 6 46 0 3 173 22 263 0 25 207 6 146 0 0 0 100 7 1882 0 0 162 10 268 2 29 231 5 387 0 1 0 99 March 31, 2026 at 06:35:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2323 209 130 0 0 2 0 304 0 0 0 99 1 0 0 14 11 2 36 1 0 0 0 1401 0 0 0 100 2 0 0 7 11 2 6 0 0 0 0 270 0 0 0 100 3 0 0 7 216 102 10 0 0 0 0 300 0 0 0 100 4 0 0 0 12 3 6 0 0 1 0 300 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 3 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 110 52 104 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 239 0 63 2321 208 209 2 15 3 0 2006 1 1 0 98 1 166 0 14 69 4 150 6 16 2 0 3168 1 0 0 99 2 0 0 7 104 27 177 2 14 0 0 1592 0 0 0 99 3 452 0 7 249 104 135 4 8 2 0 2018 2 0 0 98 4 6 0 0 70 3 139 2 12 2 0 1578 1 0 0 99 5 0 0 0 58 3 141 2 12 0 0 1090 0 0 0 100 6 1 0 0 47 1 65 1 13 2 0 1258 0 0 0 99 7 34 0 0 129 31 196 5 16 6 0 1304 1 0 0 99 March 31, 2026 at 06:35:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 203 124 0 0 1 0 295 0 0 0 100 1 5 0 14 10 2 36 0 0 0 0 1405 0 0 0 100 2 0 0 7 110 52 104 1 0 0 0 260 0 0 0 100 3 0 0 7 219 104 12 0 0 0 0 301 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 5 0 0 0 100 7 0 0 0 29 11 22 0 0 0 0 14 0 0 0 100 March 31, 2026 at 06:35:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2311 203 139 2 2 8 0 306 0 1 0 99 1 0 0 14 26 3 59 1 5 12 2 1557 0 0 0 100 2 0 0 14 124 52 132 0 6 16 0 306 0 0 0 100 3 0 0 7 240 104 36 1 1 4 0 342 0 0 0 100 4 0 0 0 46 10 51 1 5 13 0 334 0 0 0 100 5 0 0 0 26 9 15 1 8 14 0 6 0 0 0 100 6 1 0 0 18 1 8 1 1 4 0 23 0 0 0 100 7 0 0 8 34 7 31 0 2 8 0 20 0 1 0 99 March 31, 2026 at 06:35:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2313 202 233 0 7 204 0 294 0 1 0 99 1 0 0 14 70 3 155 1 11 165 0 1318 0 0 0 99 2 0 0 7 181 52 250 0 15 140 0 259 0 0 0 100 3 0 0 9 310 144 150 0 14 169 0 300 0 0 0 100 4 0 0 0 124 49 168 1 12 149 0 306 0 0 0 100 5 0 0 0 69 1 131 0 8 136 0 0 0 0 0 100 6 0 0 0 74 2 131 0 9 117 0 3 0 0 0 100 7 0 0 0 92 2 172 0 14 127 0 0 0 0 0 100 March 31, 2026 at 06:35:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2302 202 121 0 0 1 0 293 0 1 0 99 1 0 0 14 28 2 36 1 1 0 0 1315 0 0 0 100 2 0 0 7 125 52 104 0 0 0 0 260 0 0 0 100 3 0 0 7 235 102 12 0 0 0 0 300 0 0 0 100 4 0 0 0 49 13 26 0 0 1 0 315 0 0 0 100 5 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 26 2 4 0 0 0 0 5 0 0 0 100 7 0 0 0 27 2 6 0 0 0 0 3 0 0 0 100 March 31, 2026 at 06:35:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 120 0 0 3 0 294 0 0 0 100 1 0 0 14 12 2 36 1 0 0 0 1316 0 0 0 100 2 0 0 7 110 51 104 1 0 0 0 259 0 0 0 100 3 0 0 7 216 102 10 0 0 0 0 300 0 0 0 100 4 0 0 0 25 9 18 0 0 1 0 307 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 175 2334 205 1212 32 128 17 0 7220 3 1 0 96 1 0 0 14 314 3 1148 22 102 9 0 7983 2 1 0 96 2 1 0 7 334 32 1152 24 84 16 0 5984 3 1 0 97 3 0 0 7 722 106 995 8 60 11 0 5207 2 1 0 97 4 0 0 0 386 10 831 14 49 12 0 6667 3 1 0 96 5 0 0 0 234 3 956 9 41 18 0 5798 3 1 0 97 6 14 0 0 361 4 879 12 52 17 1 5770 2 1 0 97 7 0 0 0 333 19 912 7 39 10 0 5703 2 1 0 97 March 31, 2026 at 06:35:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2321 209 132 0 0 2 0 303 0 0 0 100 1 0 0 14 11 2 36 1 0 1 0 1315 0 0 0 100 2 0 0 7 13 1 14 0 0 0 0 282 0 0 0 100 3 1 0 7 218 102 16 0 0 0 0 313 0 0 0 100 4 0 0 0 27 6 29 0 1 2 0 317 0 0 0 100 5 0 0 0 16 9 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 113 52 110 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 231 272 0 16 238 0 305 0 1 0 99 1 0 0 14 82 3 187 1 12 269 0 1317 0 1 0 99 2 0 0 7 86 1 162 0 10 199 0 269 0 0 0 100 3 0 0 7 322 141 172 0 13 198 0 300 0 0 0 100 4 0 0 0 120 43 163 0 11 227 0 300 0 0 0 100 5 0 0 0 87 2 163 0 13 218 0 0 0 0 0 100 6 0 0 0 87 0 171 0 10 175 0 0 0 0 0 100 7 0 0 0 183 30 292 0 11 216 0 0 0 0 0 100 March 31, 2026 at 06:35:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2367 258 122 0 1 0 0 304 0 0 0 99 1 0 0 0 16 2 38 2 1 0 0 1052 0 0 0 100 2 0 0 21 10 2 8 1 1 0 0 536 0 0 0 100 3 0 0 7 213 103 4 0 0 0 0 301 0 0 0 100 4 0 0 0 19 3 12 0 2 0 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 110 2 104 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2369 258 126 0 0 0 0 625 0 0 0 100 1 0 0 0 15 3 38 1 0 0 0 1050 0 0 0 100 2 0 0 21 11 3 10 0 0 0 0 535 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 301 0 0 0 100 4 0 0 0 25 4 20 1 0 0 0 304 0 0 0 100 5 0 0 0 16 1 14 0 0 0 0 5 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 112 3 106 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:35:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2363 254 116 0 0 2 0 296 0 0 0 100 1 0 0 0 12 2 36 0 0 1 0 1049 0 0 0 100 2 0 0 21 10 3 8 0 0 0 0 536 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 33 9 26 0 0 1 0 310 0 0 0 100 5 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 115 2 116 0 1 0 0 3 0 0 0 100 March 31, 2026 at 06:35:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 662 0 9 2364 238 169 1 12 11 11 1280 1 1 0 98 1 1890 0 0 91 22 128 3 11 7 7 1455 0 1 0 99 2 56 0 21 57 3 77 0 8 10 9 730 0 0 0 100 3 11 0 7 246 104 45 0 10 10 6 413 0 0 0 100 4 23 0 0 66 7 72 0 7 2 4 402 0 0 0 100 5 749 0 114 35 7 54 0 7 8 12 124 0 0 0 99 6 61 0 0 43 1 44 0 7 3 10 85 0 0 0 100 7 40 0 0 103 3 98 0 5 1 7 61 0 0 0 100 March 31, 2026 at 06:35:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 206 136 0 1 1 0 299 0 0 0 100 1 0 0 0 113 52 136 1 0 0 0 1136 0 0 0 100 2 0 0 21 14 4 12 1 0 0 0 534 0 0 0 100 3 0 0 7 213 102 8 0 1 0 0 300 0 0 0 100 4 0 0 0 21 3 16 0 0 0 0 301 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 1 0 2 0 0 0 100 7 0 0 0 13 2 8 0 0 2 0 0 0 0 0 100 March 31, 2026 at 06:35:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 8 2323 209 128 1 0 2 0 627 0 0 0 99 1 0 0 0 115 52 140 1 1 0 0 1135 0 0 0 100 2 0 0 21 10 3 8 0 0 0 0 537 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 27 4 20 2 0 0 0 305 0 0 0 100 5 0 0 0 10 1 6 0 0 0 0 5 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 203 110 0 1 1 0 295 0 0 0 100 1 0 0 0 112 52 136 0 0 0 0 1132 0 0 0 100 2 0 0 21 11 3 10 0 0 0 0 535 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 26 6 20 0 0 1 0 305 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 13 2 6 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:35:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 204 116 0 0 1 0 298 0 0 0 100 1 0 0 0 115 52 136 1 0 0 0 1131 0 0 0 100 2 0 0 21 10 2 10 0 1 1 0 537 0 0 0 100 3 19 0 7 214 104 6 0 0 0 0 306 0 0 0 100 4 0 0 0 32 8 25 0 0 2 0 310 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 4 0 0 15 4 10 0 0 0 0 9 0 0 0 100 March 31, 2026 at 06:35:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 202 110 0 0 2 0 294 0 0 0 100 1 0 0 0 113 52 136 1 0 0 0 1128 0 0 0 100 2 0 0 21 15 2 16 1 0 0 0 548 0 0 0 100 3 0 0 7 218 102 18 0 1 0 0 316 0 0 0 100 4 0 0 0 36 9 35 0 0 1 0 323 0 0 0 100 5 0 0 0 17 8 4 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 205 126 0 1 1 0 298 0 0 0 100 1 0 0 0 116 53 140 1 1 1 0 1128 0 0 0 100 2 0 0 21 11 3 10 0 0 3 0 534 0 0 0 100 3 0 0 7 217 103 10 0 0 3 0 301 0 0 0 100 4 0 0 0 33 8 26 1 1 1 0 624 0 0 0 100 5 0 0 0 14 2 10 0 2 0 0 5 0 0 0 100 6 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2319 208 124 0 0 1 0 304 0 0 0 100 1 0 0 0 59 25 82 0 0 1 0 1129 0 0 0 100 2 0 0 21 65 30 64 0 1 0 0 536 0 0 0 100 3 0 0 7 212 102 4 0 0 0 0 300 0 0 0 100 4 0 0 0 18 1 13 0 1 0 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 206 120 0 0 0 0 299 0 0 0 100 1 0 0 0 15 3 36 1 0 0 0 1129 0 0 0 100 2 0 0 21 111 53 110 0 0 0 0 535 0 0 0 100 3 0 0 7 216 104 10 0 0 0 0 310 0 0 0 100 4 0 0 0 20 2 14 0 0 1 0 300 0 0 0 100 5 0 0 0 13 2 10 0 1 1 0 39 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 12 3 6 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:35:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 208 126 0 0 1 0 304 0 0 0 99 1 0 0 0 13 2 36 1 0 0 0 1126 0 0 0 100 2 0 0 21 111 53 108 1 0 0 0 536 0 0 0 100 3 0 0 7 214 104 6 0 0 0 0 302 0 0 0 100 4 0 0 0 19 3 13 0 0 1 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 3 0 0 0 100 March 31, 2026 at 06:35:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 49 2326 207 366 8 21 2 0 1822 1 1 0 99 1 6 0 0 74 3 214 3 15 1 0 2594 0 0 0 99 2 204 0 21 103 33 241 6 12 2 0 1308 2 0 0 98 3 3 0 7 328 124 203 4 16 1 0 1267 1 0 0 99 4 128 0 0 75 9 169 2 16 2 3 1668 1 0 0 99 5 268 0 0 66 8 132 3 14 4 2 1378 0 0 0 99 6 439 0 0 35 1 116 1 9 4 0 1807 1 0 0 98 7 16 0 0 61 4 115 4 17 5 0 1478 0 0 0 99 March 31, 2026 at 06:35:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2316 204 252 2 13 184 0 305 0 1 0 99 1 0 0 0 113 17 206 2 13 180 0 1151 0 0 0 99 2 4 0 21 81 3 150 1 14 122 0 553 0 0 0 100 3 18 0 7 364 171 205 1 10 130 0 309 0 0 0 100 4 0 0 0 132 46 171 1 16 126 0 311 0 0 0 100 5 0 0 0 77 2 130 1 14 114 0 12 0 0 0 100 6 0 0 0 91 5 152 0 12 104 0 7 0 0 0 100 7 0 0 0 90 6 146 0 8 96 0 12 0 0 0 100 March 31, 2026 at 06:35:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2335 228 116 0 2 3 0 294 0 0 0 100 1 0 0 0 117 26 137 1 3 0 0 1142 0 0 0 100 2 0 0 21 9 3 6 0 0 0 0 527 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 10 1 3 0 0 0 0 299 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 26 9 18 1 0 0 0 11 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2359 254 116 0 1 2 0 298 0 0 0 100 1 0 0 0 67 2 88 0 2 0 0 1138 0 0 0 100 2 0 0 21 67 3 66 1 2 0 0 527 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 10 2 4 0 0 1 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 22 7 16 0 0 1 0 11 0 0 0 100 7 0 0 0 12 2 8 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:35:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2361 252 129 1 6 18 0 314 0 1 0 99 1 0 0 0 26 1 49 1 5 6 0 1148 0 0 0 100 2 0 0 21 123 3 131 1 4 13 0 554 0 0 0 100 3 0 0 14 223 104 20 0 2 5 0 317 0 0 0 100 4 0 0 0 30 6 27 1 3 6 0 318 0 0 0 100 5 0 0 0 18 1 16 0 6 6 0 8 0 1 0 99 6 0 0 15 41 10 47 0 3 5 0 182 0 0 0 100 7 0 0 0 26 3 21 0 1 7 0 5 0 0 0 100 March 31, 2026 at 06:35:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2358 252 119 0 0 2 0 294 0 0 0 100 1 0 0 0 21 1 42 1 0 0 0 1053 0 0 0 100 2 0 0 21 116 4 116 0 0 0 0 534 0 0 0 100 3 0 0 14 222 104 18 0 0 0 0 320 0 0 0 100 4 0 0 0 37 11 34 1 0 1 0 325 0 0 0 100 5 0 0 0 21 10 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 14 2 8 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:35:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 116 2361 253 119 0 0 0 0 298 0 1 0 99 1 0 0 0 37 2 42 1 0 0 0 1049 0 0 0 100 2 0 0 21 124 3 106 0 0 0 0 526 0 0 0 100 3 0 0 2 234 104 14 0 0 0 0 305 0 0 0 100 4 0 0 0 43 9 24 0 1 3 0 311 0 0 0 100 5 0 0 0 29 3 10 0 0 0 0 6 0 0 0 100 6 0 0 0 22 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 32 2 14 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2355 252 132 0 1 0 0 294 0 0 0 99 1 0 0 0 20 1 42 1 0 1 0 1050 0 0 0 100 2 0 0 21 113 4 108 1 0 0 0 525 0 0 0 100 3 0 0 7 211 102 2 0 0 0 0 300 0 0 0 100 4 0 0 0 27 10 20 0 0 0 0 311 0 0 0 100 5 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 13 2 6 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:35:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 161 2374 242 1260 27 114 23 0 6869 3 1 0 95 1 17 0 0 465 9 1068 18 89 16 0 6408 3 1 0 96 2 8 0 21 257 7 1127 14 76 16 0 5520 2 1 0 97 3 43 0 7 482 106 968 13 63 14 0 6715 2 1 0 97 4 3 0 0 329 9 932 10 52 10 0 6150 3 1 0 97 5 5 0 0 155 3 1085 12 50 10 0 5395 2 1 0 97 6 19 0 0 197 3 886 5 35 14 0 7145 2 1 0 97 7 0 0 0 355 4 775 2 37 15 0 6111 2 1 0 97 March 31, 2026 at 06:35:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2304 202 14 0 1 1 0 294 0 0 0 100 1 0 0 0 65 27 92 0 1 0 0 1050 0 0 0 100 2 0 0 21 69 28 68 0 2 0 0 535 0 0 0 100 3 0 0 2 316 105 108 0 0 0 0 302 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 22 8 16 0 0 0 0 12 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 3 0 0 0 100 March 31, 2026 at 06:35:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 202 16 0 0 2 0 294 0 0 0 100 1 0 0 0 16 3 36 1 0 1 0 1049 0 0 0 100 2 0 0 21 85 27 85 0 6 1 0 546 0 0 0 100 3 0 0 7 324 112 121 0 6 1 0 316 0 0 0 100 4 0 0 0 65 25 64 0 1 1 0 320 0 0 0 100 5 0 0 0 19 11 2 0 0 2 0 0 0 0 0 100 6 0 0 0 21 7 16 0 1 0 0 11 0 0 0 100 7 0 0 0 15 3 6 0 0 1 0 1 0 0 0 100 March 31, 2026 at 06:35:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 202 236 0 18 312 0 294 0 1 0 99 1 0 0 0 90 2 202 1 14 253 0 1049 0 0 0 99 2 0 0 21 94 2 174 1 13 249 0 546 0 0 0 100 3 0 0 7 388 152 261 0 15 236 0 300 0 0 0 100 4 0 0 0 219 100 254 0 16 177 0 300 0 1 0 99 5 0 0 0 88 2 178 0 17 193 0 0 0 0 0 100 6 0 0 0 88 6 158 0 16 165 0 12 0 0 0 100 7 0 0 0 89 1 168 0 15 249 0 0 0 0 0 100 March 31, 2026 at 06:35:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38 0 7 2326 202 163 0 9 10 7 456 0 0 0 99 1 11 0 0 45 2 78 1 7 5 5 1119 0 0 0 100 2 3 0 21 48 2 39 0 4 2 1 583 0 0 0 100 3 15 0 7 251 108 47 0 3 4 1 383 0 0 0 100 4 3266 0 115 111 38 146 3 7 14 21 1548 1 1 0 98 5 141 0 0 82 15 102 0 11 16 10 147 0 0 0 100 6 22 0 2 50 6 61 0 6 11 9 457 0 0 0 100 7 10 0 0 39 1 43 0 7 5 6 92 0 0 0 100 March 31, 2026 at 06:35:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 110 0 0 0 0 294 0 0 0 100 1 0 0 0 12 2 36 0 0 0 0 1136 0 0 0 100 2 0 0 21 18 3 16 0 0 0 0 535 0 0 0 100 3 0 0 7 214 103 6 0 0 1 0 300 0 0 0 100 4 0 0 0 10 1 7 0 1 2 0 300 0 0 0 100 5 0 0 0 110 52 104 0 0 0 0 0 0 0 0 100 6 0 0 0 16 5 10 0 0 0 0 7 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 49 2311 204 651 4 44 2 0 2165 1 1 0 99 1 1 0 0 104 3 431 11 33 10 0 3023 1 0 0 99 2 68 0 21 33 4 30 4 5 5 0 1027 2 0 0 98 3 567 0 7 323 104 317 2 24 7 1 2263 1 0 0 99 4 186 0 0 111 2 274 1 19 4 0 2017 1 0 0 99 5 47 0 0 225 42 531 5 36 7 0 1801 0 0 0 99 6 38 0 0 92 13 182 2 18 2 0 1585 1 0 0 99 7 0 0 0 48 2 217 0 16 1 0 1617 0 0 0 100 March 31, 2026 at 06:35:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2321 209 122 0 2 0 0 308 0 0 0 100 1 0 0 0 35 8 60 1 1 1 0 1149 0 0 0 100 2 4 0 21 27 4 26 1 0 0 0 545 0 0 0 100 3 0 0 7 225 105 16 0 0 0 0 317 0 0 0 100 4 0 0 0 24 2 24 0 1 0 0 330 0 0 0 100 5 0 0 0 23 6 14 0 1 0 0 5 0 0 0 100 6 17 0 0 106 45 94 0 1 0 0 15 0 0 0 100 7 0 0 0 14 1 8 0 0 2 0 13 0 0 0 100 March 31, 2026 at 06:35:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2331 210 296 0 25 190 1 420 0 1 0 99 1 0 0 0 186 51 267 2 19 233 0 1146 0 0 0 99 2 0 0 21 115 5 204 0 15 153 0 545 0 0 0 100 3 0 0 15 327 143 174 0 17 158 0 317 0 1 0 99 4 0 0 0 124 47 157 0 15 132 0 301 0 0 0 100 5 0 0 7 93 2 168 0 17 115 0 18 0 0 0 100 6 0 0 0 83 0 154 0 14 113 0 15 0 0 0 100 7 0 0 7 96 3 181 0 21 119 0 83 0 0 0 100 March 31, 2026 at 06:35:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 117 0 0 1 0 294 0 0 0 100 1 0 0 0 115 52 136 1 0 1 0 1053 0 0 0 100 2 0 0 21 33 10 30 0 0 0 0 535 0 0 0 100 3 0 0 7 211 102 4 0 0 0 0 300 0 0 0 100 4 0 0 0 10 1 3 0 0 0 0 300 0 0 0 100 5 0 0 7 15 3 8 0 0 0 0 24 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:35:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2305 202 109 0 1 2 0 294 0 1 0 99 1 0 0 0 131 53 138 0 0 0 0 1050 0 0 0 100 2 0 0 21 45 9 26 0 0 0 0 534 0 0 0 100 3 0 0 7 235 104 10 0 1 0 0 301 0 0 0 100 4 0 0 0 26 2 4 1 0 0 0 300 0 0 0 100 5 0 0 0 28 2 6 0 0 0 0 21 0 0 0 100 6 0 0 0 29 3 8 0 1 0 0 6 0 0 0 100 7 0 0 0 31 2 10 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:35:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 202 132 0 1 1 0 294 0 0 0 100 1 0 0 0 114 52 136 1 0 1 0 1048 0 0 0 100 2 0 0 21 38 12 32 1 0 0 0 537 0 0 0 100 3 0 0 7 213 103 4 0 0 0 0 300 0 0 0 100 4 0 0 0 11 2 4 0 0 1 0 300 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 12 1 6 0 0 3 0 3 0 0 0 100 March 31, 2026 at 06:35:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 175 2332 204 1257 25 127 27 0 6512 3 1 0 95 1 9 0 0 419 52 1244 13 104 21 0 7911 3 1 0 96 2 4 0 21 241 17 969 22 91 19 0 6860 3 1 0 96 3 40 0 7 543 105 935 11 65 14 0 6644 2 1 0 97 4 4 0 0 308 8 975 11 53 18 0 6776 3 1 0 97 5 1 0 0 175 8 980 15 73 12 0 5194 2 1 0 97 6 3 0 0 305 5 758 12 51 17 0 5586 2 1 0 97 7 3 0 0 428 4 862 8 46 15 0 5750 2 1 0 97 March 31, 2026 at 06:35:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2338 230 283 0 19 294 0 304 0 1 0 99 1 0 0 0 183 24 282 1 19 256 0 1050 0 1 0 99 2 0 0 21 86 2 167 0 14 224 0 524 0 0 0 100 3 0 0 4 311 143 167 0 16 207 0 301 0 0 0 100 4 0 0 0 110 41 178 0 12 210 0 303 0 0 0 100 5 0 0 0 69 1 139 0 18 176 0 0 0 0 0 100 6 0 0 0 69 1 137 0 8 203 0 2 0 0 0 100 7 0 0 0 87 5 160 0 15 211 0 5 0 0 0 100 March 31, 2026 at 06:35:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 8 2330 202 182 0 11 11 10 439 0 1 0 99 1 8 0 0 148 52 170 1 4 8 4 1124 0 0 0 100 2 636 0 21 39 2 34 1 5 3 3 1444 1 0 0 99 3 73 0 7 246 103 45 0 7 10 4 421 0 0 0 100 4 0 0 0 36 5 15 0 1 2 0 321 0 0 0 100 5 2629 0 114 27 1 54 2 3 9 11 438 0 1 0 99 6 121 0 0 50 0 74 0 9 12 15 166 0 0 0 100 7 19 0 0 50 5 57 0 8 5 5 98 0 0 0 100 March 31, 2026 at 06:35:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2302 202 116 0 0 0 0 303 0 0 0 99 1 0 0 0 112 52 136 0 0 0 0 1134 0 0 0 100 2 0 0 21 10 3 6 1 0 0 0 525 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 0 9 1 3 1 0 0 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 16 5 10 0 0 0 0 5 0 0 0 100 March 31, 2026 at 06:35:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 120 0 0 1 0 307 0 0 0 100 1 0 0 0 113 52 134 1 0 0 0 1132 0 0 0 100 2 0 0 21 9 2 8 0 0 0 0 527 0 0 0 100 3 0 0 7 218 105 10 0 0 1 0 302 0 0 0 100 4 0 0 0 15 2 18 0 1 1 0 305 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 29 10 22 1 0 0 0 332 0 0 0 100 March 31, 2026 at 06:35:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 202 120 0 0 3 0 304 0 0 0 100 1 0 0 0 113 52 136 1 0 0 0 1132 0 0 0 100 2 0 0 21 27 9 26 1 0 0 0 547 0 0 0 100 3 0 0 7 221 105 16 0 0 0 0 317 0 0 0 100 4 0 0 0 21 3 20 0 0 1 0 314 0 0 0 100 5 0 0 0 17 9 4 0 1 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 5 0 0 0 100 7 0 0 0 11 1 6 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:35:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 264 0 49 2315 204 408 6 24 11 1 2008 1 1 0 99 1 151 0 0 139 44 237 4 15 0 3 2676 1 1 0 98 2 0 0 21 116 17 234 5 23 15 0 2039 1 0 0 99 3 64 0 7 290 104 174 10 14 3 0 1883 1 0 0 98 4 12 0 0 83 3 235 3 22 0 0 1863 1 0 0 99 5 87 0 0 55 2 175 0 14 11 0 1166 1 0 0 99 6 69 0 0 70 0 163 4 19 6 2 1320 0 0 0 100 7 435 0 0 99 2 349 4 29 2 0 1729 1 0 0 99 March 31, 2026 at 06:35:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 18 2306 202 120 0 0 1 0 313 0 0 0 100 1 0 0 0 14 2 38 0 1 5 0 1157 0 0 0 100 2 5 0 21 131 60 126 2 1 0 0 544 0 0 0 100 3 0 0 2 215 103 8 0 1 0 0 304 0 0 0 100 4 0 0 0 16 3 9 0 0 0 0 305 0 0 0 100 5 0 0 0 17 1 14 0 0 0 0 4 0 0 0 100 6 0 0 0 13 2 8 0 0 0 0 21 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:35:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 202 150 2 11 19 2 439 0 1 0 99 1 0 0 0 25 3 46 1 2 1 0 1157 0 0 0 100 2 0 0 28 125 55 130 0 3 14 0 563 0 0 0 100 3 0 0 7 231 105 31 0 4 3 0 353 0 0 0 100 4 0 0 8 25 3 26 1 4 13 0 324 0 1 0 99 5 0 0 0 21 1 24 0 2 12 0 30 0 0 0 100 6 0 0 7 16 0 13 0 5 5 0 5 0 0 0 100 7 0 0 0 26 6 21 0 3 4 0 1 0 0 0 100 March 31, 2026 at 06:35:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2309 203 123 0 0 2 0 295 0 0 0 100 1 0 0 0 24 7 46 1 0 0 0 1056 0 0 0 100 2 0 0 21 9 3 6 0 0 0 0 525 0 0 0 100 3 0 0 1 215 104 6 0 0 0 0 300 0 0 0 100 4 0 0 0 8 1 3 0 0 1 0 300 0 0 0 100 5 0 0 0 10 2 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 2 0 0 0 100 7 0 0 7 108 51 104 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:35:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2307 202 129 0 2 1 0 294 0 0 0 100 1 0 0 0 52 12 54 2 1 1 0 1060 0 0 0 99 2 0 0 21 42 9 26 0 1 1 0 547 0 0 0 100 3 0 0 7 235 103 18 0 0 1 0 314 0 0 0 100 4 0 0 0 39 5 18 0 0 1 0 317 0 0 0 100 5 0 0 0 32 8 2 0 0 1 0 0 0 0 0 100 6 0 0 0 25 1 2 0 0 1 0 3 0 0 0 100 7 0 0 0 131 52 106 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:35:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 203 303 0 13 257 0 297 0 1 0 99 1 0 0 0 96 12 175 1 7 191 0 1060 0 0 0 99 2 0 0 21 90 2 181 1 10 132 0 525 0 0 0 100 3 0 0 7 313 149 155 0 12 158 0 300 0 0 0 100 4 0 0 0 125 49 171 0 11 181 0 300 0 0 0 100 5 0 0 0 92 1 175 0 10 140 0 0 0 0 0 100 6 0 0 0 73 1 136 0 10 113 0 2 0 0 0 100 7 0 0 0 191 51 272 0 11 211 0 0 0 0 0 100 March 31, 2026 at 06:35:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 119 2324 202 873 20 92 16 0 6057 3 1 0 96 1 15 0 0 426 9 851 27 73 14 0 5531 2 1 0 97 2 0 0 21 178 5 758 16 60 14 0 5861 2 1 0 97 3 23 0 7 587 104 695 19 50 5 0 5595 2 1 0 97 4 0 0 0 407 2 769 16 53 11 0 4482 2 1 0 98 5 20 0 0 348 1 803 12 45 12 0 4246 2 1 0 98 6 3 0 0 391 1 725 13 36 14 0 3492 2 1 0 98 7 6 0 0 455 51 730 9 38 10 0 3732 2 1 0 98 March 31, 2026 at 06:36:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 58 2354 243 406 3 27 4 0 2029 1 1 0 99 1 0 0 0 22 2 275 6 26 4 0 2589 1 0 0 99 2 1 0 21 22 3 219 7 19 0 0 1930 1 0 0 99 3 4 0 5 281 104 114 1 5 3 0 1798 0 0 0 100 4 0 0 0 124 10 409 2 12 3 0 1102 0 0 0 99 5 0 0 0 22 1 280 3 10 1 0 1066 1 0 0 99 6 0 0 0 66 5 218 1 11 1 0 1412 0 0 0 99 7 14 0 0 26 3 122 1 6 0 0 1676 0 0 0 99 March 31, 2026 at 06:36:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 651 0 7 2376 252 154 1 7 8 5 1203 1 1 0 98 1 759 0 120 29 2 77 1 7 4 8 1224 0 1 0 99 2 121 0 21 49 2 66 0 7 6 14 673 0 0 0 100 3 42 0 9 252 104 57 0 9 8 8 453 0 0 0 100 4 8 0 0 152 4 148 1 6 4 5 400 0 0 0 100 5 1893 0 0 49 1 43 2 6 4 3 364 0 1 0 99 6 16 0 0 39 4 35 0 7 9 1 68 0 0 0 100 7 5 0 0 39 1 32 0 4 3 4 89 0 0 0 100 March 31, 2026 at 06:36:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2357 252 120 0 0 3 0 294 0 0 0 100 1 0 0 0 13 2 36 1 0 1 0 1134 0 0 0 100 2 1 0 21 13 2 14 1 1 0 0 541 0 0 0 100 3 0 0 7 222 105 18 0 0 0 0 327 0 0 0 100 4 0 0 0 119 3 119 0 0 0 0 314 0 0 0 100 5 0 0 0 14 7 2 0 0 0 0 0 0 0 0 100 6 0 0 0 25 9 20 0 0 0 0 13 0 0 0 100 7 0 0 0 13 1 6 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2349 233 330 2 24 254 0 1303 0 1 0 99 1 0 0 0 120 7 220 1 23 231 0 124 0 0 0 100 2 0 0 21 111 3 208 1 20 251 0 524 0 0 0 100 3 0 0 7 344 153 201 1 19 217 0 310 0 0 0 100 4 0 0 0 234 70 318 0 18 301 0 305 0 0 0 99 5 0 0 0 98 1 213 0 16 251 0 0 0 0 0 100 6 0 0 0 114 7 210 1 19 196 0 10 0 0 0 100 7 0 0 0 95 1 184 0 17 210 0 0 0 0 0 100 March 31, 2026 at 06:36:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 206 160 1 0 1 0 1430 0 1 0 99 1 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 2 0 0 21 12 4 8 0 0 0 0 527 0 0 0 100 3 0 0 7 213 103 6 0 0 0 0 310 0 0 0 100 4 0 0 0 110 52 104 0 0 0 0 299 0 0 0 100 5 0 0 0 10 1 6 0 0 0 0 5 0 0 0 100 6 0 0 0 22 4 20 0 0 0 0 325 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 50 0 49 2320 208 450 12 31 1 1 3114 1 1 0 99 1 111 0 0 62 1 191 2 21 2 0 1691 1 0 0 99 2 113 0 21 33 3 61 0 8 1 1 1730 1 0 0 99 3 548 0 15 304 104 318 3 22 3 0 2237 1 0 0 98 4 14 0 0 172 49 507 3 20 1 1 1710 0 0 0 99 5 0 0 0 66 2 256 4 23 2 0 1405 0 0 0 100 6 70 0 0 33 0 67 1 6 3 0 615 1 0 0 98 7 169 0 0 89 5 251 8 22 3 0 1603 1 0 0 99 March 31, 2026 at 06:36:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 17 2318 208 166 1 0 0 0 1448 0 1 0 99 1 0 0 0 11 0 6 0 0 0 0 3 0 0 0 100 2 3 0 21 15 4 12 1 0 0 0 541 0 0 0 100 3 0 0 3 219 105 12 0 0 0 0 308 0 0 0 100 4 0 0 0 20 5 13 1 0 0 0 317 0 0 0 100 5 17 0 0 10 1 4 0 0 0 0 13 0 0 0 100 6 0 0 0 11 1 4 0 0 0 0 2 0 0 0 100 7 0 0 0 113 51 112 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:36:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2329 212 178 1 2 4 0 1445 0 1 0 99 1 0 0 0 18 4 8 0 2 1 0 0 0 0 0 100 2 1 0 21 51 21 52 0 1 1 0 542 0 0 0 100 3 0 0 7 218 103 16 0 0 1 0 314 0 0 0 100 4 0 0 0 22 5 18 0 0 1 0 317 0 0 0 100 5 0 0 0 17 7 2 0 0 1 0 0 0 0 0 100 6 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 81 33 72 0 2 1 0 0 0 0 0 100 March 31, 2026 at 06:36:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2319 204 307 1 19 160 0 1367 0 1 0 99 1 1 0 7 93 0 170 0 25 155 0 24 0 0 0 100 2 0 0 21 206 61 272 0 18 156 0 540 0 0 0 100 3 1 0 7 308 138 169 0 15 107 0 329 0 0 0 100 4 0 0 0 119 37 162 0 12 159 1 404 0 0 0 100 5 0 0 0 90 2 162 1 19 210 0 18 0 0 0 100 6 0 0 0 70 2 126 0 9 164 0 69 0 0 0 100 7 0 0 9 73 1 131 0 8 175 0 0 0 1 0 99 March 31, 2026 at 06:36:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 11 2310 203 155 0 2 0 0 1342 0 1 0 99 1 0 0 7 19 1 10 0 3 0 0 1 0 0 0 100 2 0 0 21 122 58 118 0 1 0 0 532 0 0 0 100 3 0 0 7 215 103 4 0 0 0 0 300 0 0 0 100 4 0 0 0 15 3 10 0 1 0 0 300 0 0 0 100 5 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2309 203 151 1 0 1 0 1342 0 1 0 99 1 0 0 0 36 2 10 0 0 0 0 5 0 0 0 100 2 0 0 21 142 61 122 1 0 0 0 536 0 0 0 100 3 0 0 7 228 103 4 0 0 0 0 300 0 0 0 100 4 0 0 0 29 2 6 1 0 1 0 300 0 0 0 100 5 0 0 0 28 1 10 0 1 0 0 0 0 0 0 100 6 0 0 0 24 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 203 150 1 1 0 0 1342 0 1 0 99 1 0 0 0 11 1 2 0 0 0 0 1 0 0 0 100 2 0 0 21 114 55 108 1 0 0 0 532 0 0 0 100 3 0 0 7 224 108 16 0 1 0 0 301 0 0 0 100 4 0 0 0 10 1 3 0 0 0 0 300 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 161 2348 211 1140 29 119 18 0 7747 3 2 0 95 1 19 0 0 368 14 913 23 95 3 0 7141 3 1 0 97 2 2 0 21 187 30 1010 26 94 17 0 7415 3 1 0 96 3 19 0 7 562 111 981 17 68 11 0 6080 3 1 0 96 4 25 0 0 339 6 1024 23 76 6 0 6009 2 1 0 97 5 2 0 0 456 10 868 11 54 9 0 5181 2 1 0 97 6 3 0 0 413 1 746 8 44 7 0 4580 2 1 0 98 7 9 0 0 452 1 817 11 40 11 0 3342 2 1 0 97 March 31, 2026 at 06:36:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2331 210 277 2 31 264 0 1353 0 1 0 99 1 0 0 0 112 1 208 0 23 256 0 14 0 0 0 100 2 0 0 21 192 54 311 0 25 223 0 526 0 0 0 100 3 0 0 7 428 149 285 0 23 280 0 300 0 0 0 100 4 0 0 0 132 46 189 0 22 243 0 299 0 1 0 99 5 0 0 0 83 1 159 0 17 209 0 0 0 0 0 100 6 0 0 0 85 1 180 1 17 267 0 0 0 0 0 100 7 0 0 0 86 1 168 0 18 223 0 0 0 0 0 100 March 31, 2026 at 06:36:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2319 208 70 1 1 4 0 1348 0 1 0 99 1 0 0 0 14 0 6 0 1 0 0 10 0 0 0 100 2 0 0 21 67 29 59 2 1 0 0 529 0 0 0 100 3 0 0 7 311 112 103 0 3 0 0 300 0 0 0 100 4 0 0 0 50 21 44 1 1 1 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 207 52 1 2 0 0 1347 0 1 0 99 1 0 0 0 11 1 4 0 0 0 0 11 0 0 0 100 2 0 0 21 13 5 10 0 0 0 0 527 0 0 0 100 3 0 0 7 322 104 116 0 1 0 0 302 0 0 0 100 4 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 0 8 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:36:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 756 0 120 2314 205 175 0 8 11 6 1900 0 1 0 99 1 52 0 1 41 1 41 0 9 5 6 101 0 0 0 100 2 661 0 21 51 6 62 1 7 6 10 1485 1 0 0 99 3 1929 0 7 276 103 92 2 11 5 14 719 0 1 0 99 4 54 0 0 155 53 164 0 5 13 8 445 0 0 0 100 5 19 0 0 53 6 44 0 6 8 2 76 0 0 0 100 6 12 0 0 37 1 34 0 4 11 5 71 0 0 0 100 7 7 0 0 37 1 41 0 7 6 2 60 0 0 0 100 March 31, 2026 at 06:36:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 154 1 0 1 0 1425 0 1 0 99 1 0 0 0 10 1 2 0 0 1 0 10 0 0 0 100 2 0 0 21 17 5 16 0 0 1 0 538 0 0 0 100 3 0 0 7 212 103 4 0 0 1 0 300 0 0 0 100 4 0 0 0 118 53 116 0 0 1 0 320 0 0 0 100 5 0 0 0 41 16 30 0 0 1 0 20 0 0 0 100 6 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 7 0 0 0 14 2 6 0 0 1 0 3 0 0 0 100 March 31, 2026 at 06:36:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 63 2315 203 515 4 37 220 1 2939 0 1 0 98 1 7 0 0 110 1 246 6 23 114 0 733 1 0 0 98 2 5 0 21 141 3 337 3 32 145 1 1684 0 0 0 99 3 112 0 7 348 144 214 2 21 138 1 1494 2 1 0 98 4 218 0 0 190 41 418 6 28 116 2 2381 1 1 0 98 5 331 0 0 272 50 535 3 34 149 0 1767 1 1 0 99 6 59 0 0 113 1 257 3 24 132 0 1384 0 0 0 99 7 511 0 0 133 3 337 3 27 137 11 1325 0 0 0 99 March 31, 2026 at 06:36:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 150 2 0 1 0 1431 0 1 0 99 1 0 0 0 11 0 6 0 1 0 0 0 0 0 0 100 2 0 0 21 9 3 6 0 0 0 0 525 0 0 0 100 3 0 0 7 224 109 16 0 0 0 0 310 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 300 0 0 0 100 5 0 0 0 110 51 102 0 0 0 0 0 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2311 203 161 0 4 13 1 1414 0 1 0 99 1 0 0 0 21 1 23 0 3 10 0 34 0 0 0 100 2 0 0 21 31 7 34 1 4 5 1 630 0 0 0 100 3 0 0 7 234 108 27 0 2 5 0 337 0 0 0 100 4 0 0 0 24 4 17 0 2 6 0 305 0 0 0 100 5 0 0 7 117 52 115 0 4 15 0 7 0 0 0 100 6 0 0 8 16 1 19 1 3 8 0 3 0 1 0 99 7 0 0 0 22 2 27 0 5 10 0 22 0 0 0 100 March 31, 2026 at 06:36:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2312 203 149 1 1 2 0 1343 0 1 0 99 1 0 0 7 17 1 8 0 4 0 0 0 0 0 0 100 2 0 0 21 21 8 18 0 1 0 0 533 0 0 0 100 3 0 0 7 219 104 14 0 1 0 0 302 0 0 0 100 4 0 0 0 10 1 3 0 0 0 0 300 0 0 0 100 5 0 0 0 81 36 72 0 2 0 0 0 0 0 0 100 6 0 0 0 36 14 30 0 1 0 0 0 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2309 203 156 2 0 2 0 1342 0 1 0 99 1 0 0 0 27 0 4 0 0 0 0 0 0 0 0 100 2 0 0 21 43 9 28 1 1 0 0 547 0 0 0 100 3 0 0 7 234 105 10 0 0 0 0 305 0 0 0 100 4 0 0 0 35 3 18 1 1 0 0 321 0 0 0 100 5 0 0 0 43 10 18 0 1 1 0 10 0 0 0 100 6 0 0 0 124 51 102 0 0 0 0 2 0 0 0 100 7 0 0 0 27 1 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 205 282 1 10 100 0 1342 0 1 0 99 1 0 0 0 85 2 147 0 12 78 0 1 0 0 0 100 2 0 0 21 92 14 147 0 9 75 0 541 0 0 0 100 3 0 0 7 309 142 139 0 7 104 0 303 0 0 0 100 4 0 0 0 109 41 148 0 7 114 0 303 0 0 0 100 5 0 0 0 72 2 128 1 8 97 0 0 0 0 0 100 6 0 0 0 123 29 170 1 7 91 0 0 0 0 0 100 7 0 0 0 117 23 177 0 10 73 0 0 0 0 0 100 March 31, 2026 at 06:36:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 161 2332 203 1163 24 108 20 0 9074 3 2 0 95 1 2 0 0 342 1 959 18 93 14 0 6251 3 1 0 96 2 3 0 21 147 10 1143 22 86 18 0 7513 3 1 0 96 3 0 0 7 622 108 840 10 53 7 0 6955 2 1 0 97 4 55 0 0 335 3 1036 13 65 9 1 5827 2 1 0 97 5 3 0 0 223 4 750 9 41 12 0 6622 2 1 0 97 6 0 0 0 257 31 1198 16 52 12 0 5890 3 1 0 97 7 7 0 0 553 23 1050 13 48 6 0 3286 2 1 0 97 March 31, 2026 at 06:36:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 68 1 2 2 0 1342 0 1 0 99 1 0 0 0 12 1 6 0 1 0 0 11 0 0 0 100 2 0 0 21 14 3 8 0 1 0 0 525 0 0 0 100 3 0 0 7 218 105 12 0 0 0 0 310 0 0 0 100 4 0 0 0 110 2 104 0 0 0 0 300 0 0 0 100 5 0 0 0 10 1 6 0 0 0 0 39 0 0 0 100 6 0 0 0 16 5 10 0 0 0 0 5 0 0 0 100 7 0 0 0 112 52 106 0 0 1 0 1 0 0 0 100 March 31, 2026 at 06:36:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 66 0 7 2325 203 192 0 10 19 7 1524 0 1 0 99 1 34 0 0 48 2 50 0 9 7 7 124 0 0 0 100 2 21 0 21 40 4 42 0 8 2 2 602 0 0 0 100 3 29 0 7 256 106 63 0 7 6 9 425 0 0 0 100 4 3251 0 114 54 1 75 4 4 9 16 1527 1 1 0 98 5 60 0 2 43 0 49 0 9 10 10 133 0 0 0 100 6 10 0 0 45 5 42 0 6 19 7 99 0 0 0 100 7 9 0 0 143 53 142 0 5 6 4 111 0 0 0 100 March 31, 2026 at 06:36:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 152 1 0 1 0 1425 0 1 0 99 1 0 0 0 12 1 6 0 1 1 0 10 0 0 0 100 2 0 0 21 16 4 14 1 0 1 0 537 0 0 0 100 3 0 0 7 212 103 4 0 0 1 0 300 0 0 0 100 4 0 0 0 18 3 18 0 0 1 0 324 0 0 0 100 5 0 0 0 25 9 16 0 1 2 0 10 0 0 0 100 6 0 0 0 21 7 12 1 0 1 0 6 0 0 0 100 7 0 0 0 113 52 104 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:36:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 203 332 0 16 321 0 1426 0 1 0 99 1 0 0 0 103 0 188 0 13 252 0 15 0 0 0 100 2 0 0 21 98 3 188 0 16 219 0 525 0 0 0 100 3 0 0 7 307 147 176 0 14 213 0 300 0 0 0 100 4 0 0 0 141 53 188 0 7 231 0 312 0 0 0 100 5 0 0 0 96 1 179 0 13 165 0 4 0 0 0 100 6 0 0 0 106 7 191 0 13 209 0 326 0 0 0 100 7 0 0 0 210 54 320 0 21 249 0 6 0 0 0 100 March 31, 2026 at 06:36:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 148 1 0 1 0 1425 0 1 0 99 1 0 0 0 9 0 2 0 0 0 0 10 0 0 0 100 2 0 0 21 9 3 6 0 0 0 0 525 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 0 18 6 12 0 0 1 0 305 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 24 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 110 52 104 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 550 0 49 2309 203 276 3 20 10 3 3417 1 1 0 98 1 8 0 0 170 46 432 1 21 4 1 1584 0 0 0 99 2 64 0 21 41 3 111 1 15 0 0 1844 0 0 0 99 3 3 0 7 250 104 96 4 11 2 0 1342 1 0 0 99 4 210 0 0 32 3 47 2 11 4 3 1747 1 0 0 98 5 67 0 0 48 1 140 4 23 0 0 1501 1 0 0 99 6 1 0 0 54 1 168 3 22 7 0 1385 1 0 0 99 7 0 0 0 54 10 74 2 9 1 0 1009 1 0 0 99 March 31, 2026 at 06:36:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 150 1 0 2 0 1431 0 1 0 99 1 0 0 0 123 57 114 1 0 0 0 7 0 0 0 100 2 0 0 21 10 3 6 1 0 0 0 525 0 0 0 100 3 0 0 7 218 104 10 0 0 1 0 301 0 0 0 100 4 0 0 0 12 2 4 0 0 1 0 300 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2316 204 177 0 9 12 0 1382 0 1 0 99 1 0 0 7 138 58 143 0 7 13 0 46 0 0 0 100 2 0 0 21 28 3 31 1 4 2 0 587 0 0 0 100 3 0 0 7 220 103 9 0 3 3 0 366 0 0 0 100 4 0 0 0 27 4 32 0 2 14 0 322 0 0 0 100 5 0 0 0 32 9 21 0 0 2 0 77 0 0 0 100 6 0 0 0 16 1 15 0 5 15 0 12 0 0 0 100 7 0 0 9 25 3 24 0 4 11 0 14 0 1 0 99 March 31, 2026 at 06:36:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2326 207 306 1 15 189 0 1351 0 1 0 99 1 0 0 7 191 59 256 0 12 157 0 16 0 0 0 100 2 0 0 21 83 4 155 0 13 134 0 524 0 0 0 100 3 0 0 7 306 135 133 0 13 109 0 302 0 0 0 100 4 0 0 0 98 34 136 0 11 141 0 301 0 0 0 100 5 0 0 0 79 2 138 0 11 108 0 6 0 0 0 100 6 0 0 0 60 1 102 0 10 132 0 0 0 0 0 100 7 0 0 0 78 2 296 0 7 92 0 334 0 0 0 100 March 31, 2026 at 06:36:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2309 205 149 1 1 0 0 1342 0 1 0 99 1 0 0 0 140 56 116 0 0 0 0 9 0 0 0 100 2 0 0 28 28 4 10 0 1 0 0 526 0 0 0 100 3 19 0 7 231 104 6 0 0 0 0 305 0 0 0 100 4 0 0 0 30 2 6 1 0 0 0 300 0 0 0 100 5 0 0 0 27 0 8 0 1 0 0 0 0 0 0 100 6 0 0 0 30 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 27 2 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:36:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 14 2311 203 150 1 1 0 0 1344 0 1 0 99 1 0 0 0 101 44 90 0 1 0 0 13 0 0 0 100 2 0 0 21 46 19 42 1 2 0 0 526 0 0 0 100 3 0 0 7 216 104 8 0 1 0 0 301 0 0 0 100 4 0 0 0 11 2 4 0 0 0 0 300 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:36:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 175 2332 205 1289 24 120 22 0 7972 3 2 0 95 1 21 0 0 183 9 1120 24 103 15 0 5890 3 1 0 96 2 12 0 21 313 19 1084 13 75 11 0 6788 3 1 0 97 3 11 0 7 494 108 1080 16 77 20 0 5952 3 1 0 96 4 24 0 0 332 32 864 7 52 14 0 7237 2 1 0 97 5 6 0 0 474 1 985 11 45 8 0 5527 2 1 0 97 6 32 0 0 246 2 694 10 39 16 0 5319 2 1 0 97 7 3 0 0 377 3 866 13 40 21 0 5580 2 1 0 97 March 31, 2026 at 06:36:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2343 237 154 1 2 2 0 1343 0 1 0 99 1 0 0 0 17 5 8 0 0 1 0 5 0 0 0 100 2 0 0 21 16 4 16 0 0 1 0 548 0 0 0 100 3 0 0 7 212 103 4 0 0 1 0 300 0 0 0 100 4 0 0 0 123 19 123 0 2 1 0 316 0 0 0 100 5 0 0 0 26 11 12 1 0 2 0 18 0 0 0 100 6 0 0 0 16 2 10 0 0 1 0 0 0 0 0 100 7 0 0 0 14 2 4 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:36:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 7 2382 253 362 2 32 322 2 1512 0 1 0 99 1 1 0 0 143 9 224 0 26 214 0 66 0 0 0 100 2 2627 0 135 142 3 302 2 28 272 13 947 0 1 0 98 3 92 0 7 378 148 259 0 25 237 17 469 0 1 0 99 4 38 0 3 290 51 377 1 35 247 12 449 0 0 0 99 5 655 0 0 127 3 218 1 21 257 6 970 1 1 0 99 6 51 0 0 121 1 221 0 26 285 8 81 0 0 0 100 7 27 0 0 126 2 224 0 23 225 2 62 0 0 0 100 March 31, 2026 at 06:36:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2359 253 146 1 1 0 0 1426 0 1 0 99 1 0 0 0 24 5 14 0 1 0 0 6 0 0 0 100 2 0 0 21 11 3 8 1 0 0 0 534 0 0 0 100 3 0 0 7 213 103 4 0 0 0 0 300 0 0 0 100 4 0 0 0 110 2 104 0 0 0 0 300 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 12 1 10 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:36:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2365 257 154 0 1 1 0 1432 0 1 0 99 1 0 0 0 13 2 8 0 1 0 0 2 0 0 0 100 2 0 0 21 25 5 24 1 2 0 0 862 0 0 0 100 3 0 0 7 215 103 10 0 1 0 0 308 0 0 0 100 4 0 0 0 112 3 106 0 0 0 0 301 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 14 2 8 0 0 1 0 2 0 0 0 100 March 31, 2026 at 06:36:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2367 256 154 1 0 0 0 1431 0 1 0 99 1 0 0 0 14 1 5 0 1 0 0 0 0 0 0 100 2 0 0 21 10 2 6 0 0 0 0 536 0 0 0 100 3 0 0 7 214 104 6 0 0 0 0 301 0 0 0 100 4 0 0 0 110 2 104 0 0 0 0 300 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2350 240 412 7 28 10 0 3155 1 1 0 99 1 0 0 0 126 18 237 5 22 1 0 1312 1 0 0 99 2 5 0 21 62 4 177 6 17 4 0 1759 1 0 0 99 3 0 0 7 261 103 147 3 16 0 0 1630 0 0 0 99 4 433 0 0 198 4 360 3 25 4 1 2309 1 0 0 98 5 347 0 2 72 10 102 5 16 8 0 1664 1 0 0 98 6 50 0 0 89 2 237 3 28 1 0 1633 0 0 0 99 7 128 0 0 68 5 120 1 5 5 1 1038 1 0 0 99 March 31, 2026 at 06:36:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2316 204 247 1 16 199 0 1436 0 1 0 99 1 0 0 0 188 29 330 0 18 176 0 1 0 0 0 100 2 0 0 21 127 3 243 0 16 178 0 526 0 0 0 100 3 0 0 7 353 172 198 0 16 184 0 300 0 0 0 100 4 0 0 0 251 85 330 0 20 175 0 300 0 0 0 100 5 0 0 0 106 7 250 0 19 179 0 0 0 0 0 100 6 0 0 0 93 1 178 0 15 138 0 0 0 0 0 100 7 0 0 0 131 10 235 0 11 154 0 11 0 0 0 100 March 31, 2026 at 06:36:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 16 2313 203 66 1 4 18 1 1421 0 1 0 99 1 0 0 14 22 0 21 0 7 10 0 7 0 0 0 100 2 0 0 21 37 8 38 2 6 2 0 556 0 0 0 100 3 0 0 7 230 104 27 0 7 8 0 345 0 0 0 100 4 0 0 7 131 6 130 0 7 8 0 382 0 0 0 100 5 0 0 0 113 50 104 0 1 4 0 5 0 0 0 100 6 0 0 0 16 1 11 0 2 7 0 17 0 0 0 100 7 0 0 0 29 7 22 0 2 6 0 32 0 0 0 100 March 31, 2026 at 06:36:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2345 238 132 1 3 3 0 1343 0 1 0 99 1 0 0 0 22 1 12 0 0 0 0 1 0 0 0 100 2 0 0 21 27 11 24 0 0 0 0 540 0 0 0 100 3 0 0 7 215 104 6 0 0 0 0 301 0 0 0 100 4 0 0 0 114 3 110 0 4 0 0 303 0 0 0 100 5 0 0 7 30 11 24 0 1 0 0 21 0 0 0 100 6 0 0 0 19 4 10 0 2 0 0 0 0 0 0 100 7 0 0 0 14 2 6 0 1 1 0 1 0 0 0 100 March 31, 2026 at 06:36:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2375 253 148 0 0 0 0 1343 0 1 0 99 1 0 0 112 19 0 15 0 2 0 0 0 0 0 0 100 2 0 0 21 45 13 26 0 0 0 0 541 0 0 0 100 3 0 0 7 228 103 4 0 0 0 0 300 0 0 0 100 4 0 0 0 128 2 104 1 0 1 0 300 0 0 0 100 5 0 0 0 25 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 26 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 26 2 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:36:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2360 253 148 1 0 1 0 1343 0 1 0 99 1 0 0 7 19 1 10 0 0 1 0 0 0 0 0 100 2 1 0 21 31 11 28 1 0 1 0 545 0 0 0 100 3 0 0 7 213 103 4 0 0 1 0 300 0 0 0 100 4 0 0 0 123 5 120 0 0 1 0 310 0 0 0 100 5 1 0 0 20 8 10 0 0 3 0 21 0 0 0 100 6 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 14 2 4 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:36:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 175 2355 223 1351 29 127 243 1 8875 4 2 0 95 1 0 0 0 454 3 1036 17 102 232 1 5770 2 1 0 97 2 1 0 14 300 10 1292 19 101 221 0 6464 3 1 0 96 3 0 0 14 500 149 1493 20 96 212 0 5834 2 1 0 97 4 19 0 0 507 70 1159 21 77 253 1 7234 3 1 0 96 5 0 0 0 602 1 1254 14 61 201 0 4487 2 1 0 97 6 0 0 0 330 9 997 13 61 236 1 5279 2 1 0 97 7 0 0 0 425 3 999 8 62 218 0 6146 2 1 0 97 March 31, 2026 at 06:36:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 203 122 1 2 1 0 1344 0 1 0 99 1 0 0 0 46 15 38 0 1 0 0 0 0 0 0 100 2 0 0 14 9 1 6 0 1 0 0 266 0 0 0 100 3 0 0 14 219 104 16 1 1 1 0 569 0 0 0 100 4 0 0 0 39 10 31 0 3 0 0 307 0 0 0 100 5 0 0 0 76 32 67 0 3 0 0 0 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 204 144 0 0 1 0 1344 0 1 0 99 1 0 0 0 116 50 110 0 0 0 0 0 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 14 214 104 8 0 0 0 0 570 0 0 0 100 4 0 0 0 26 9 18 1 0 0 0 309 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 4 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 16 5 10 0 0 0 0 5 0 0 0 100 March 31, 2026 at 06:36:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 142 1 0 1 0 1343 0 1 0 99 1 0 0 0 116 50 108 0 0 0 0 0 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 14 220 105 14 0 1 0 0 570 0 0 0 100 4 0 0 0 21 7 16 0 1 0 0 306 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 13 3 6 0 0 0 0 3 0 0 0 100 March 31, 2026 at 06:36:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 203 148 1 0 1 0 1344 0 1 0 99 1 0 0 0 118 50 114 0 0 0 0 5 0 0 0 100 2 0 0 14 12 2 12 0 0 0 0 276 0 0 0 100 3 0 0 14 214 104 8 0 0 0 0 570 0 0 0 100 4 0 0 0 33 8 30 1 0 1 0 642 0 0 0 100 5 0 0 0 21 7 16 0 2 0 0 15 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 18 4 12 0 0 0 0 7 0 0 0 100 March 31, 2026 at 06:36:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 204 154 0 1 4 0 1345 0 1 0 99 1 0 0 0 114 51 104 0 0 0 0 1 0 0 0 100 2 0 0 14 10 2 8 0 0 0 0 269 0 0 0 100 3 0 0 14 215 104 8 1 0 0 0 569 0 0 0 100 4 0 0 0 26 8 24 0 0 0 0 310 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 6 0 0 1 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:36:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 203 152 1 0 1 0 1344 0 1 0 99 1 0 0 0 109 50 104 0 1 0 0 1 0 0 0 100 2 0 0 14 10 3 6 0 0 0 0 267 0 0 0 100 3 0 0 14 215 104 10 0 0 0 0 591 0 0 0 100 4 0 0 0 23 8 16 1 0 1 0 313 0 0 0 100 5 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 6 0 0 0 12 1 10 0 1 0 0 0 0 0 0 100 7 0 0 0 16 5 10 0 0 0 0 8 0 0 0 100 March 31, 2026 at 06:36:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 203 154 0 1 1 0 1344 0 1 0 99 1 0 0 0 110 51 102 0 0 0 0 1 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 14 221 106 16 0 0 0 0 580 0 0 0 100 4 0 0 0 29 10 20 0 0 0 0 311 0 0 0 100 5 0 0 0 10 0 6 1 0 0 0 21 0 0 0 100 6 0 0 0 10 1 4 0 1 2 0 0 0 0 0 100 7 0 0 0 11 2 6 0 1 1 0 1 0 0 0 100 March 31, 2026 at 06:36:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2637 0 120 2311 205 226 3 9 11 20 1862 1 1 0 98 1 117 0 0 99 20 112 0 10 18 11 112 0 0 0 100 2 22 0 15 98 33 102 0 6 10 9 349 0 0 0 100 3 661 0 7 255 104 74 1 7 13 16 1269 1 0 0 99 4 19 0 7 53 5 58 1 12 12 6 1020 0 0 0 100 5 15 0 0 42 0 45 0 6 6 7 75 0 0 0 100 6 6 0 0 35 2 25 0 5 2 3 88 0 0 0 100 7 24 0 0 42 4 37 0 3 4 5 77 0 0 0 100 March 31, 2026 at 06:36:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2319 207 164 1 0 1 0 1432 0 1 0 99 1 0 0 0 13 1 10 0 1 1 0 0 0 0 0 100 2 0 0 14 114 53 112 0 0 1 0 276 0 0 0 100 3 0 0 7 213 103 6 0 0 1 0 310 0 0 0 100 4 0 0 7 21 4 20 1 0 1 0 573 0 0 0 100 5 0 0 0 28 11 14 0 0 1 0 18 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 13 2 6 0 1 1 0 0 0 0 0 100 March 31, 2026 at 06:36:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2325 210 162 1 0 2 0 1431 0 1 0 99 1 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 2 0 0 14 114 52 116 0 1 0 0 269 0 0 0 100 3 0 0 7 213 103 6 0 0 0 0 310 0 0 0 100 4 0 0 7 15 3 12 1 0 0 0 560 0 0 0 100 5 4 0 0 8 1 2 0 0 0 0 5 0 0 0 100 6 0 0 0 11 2 6 0 0 1 0 0 0 0 0 100 7 19 0 0 15 4 10 0 0 0 0 8 0 0 0 100 March 31, 2026 at 06:36:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 207 156 1 0 2 0 1426 0 1 0 99 1 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 266 0 0 0 100 3 0 0 7 213 103 6 0 0 0 0 310 0 0 0 100 4 0 0 7 11 3 6 0 0 1 0 559 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2325 210 162 1 0 0 0 1753 0 1 0 99 1 0 0 0 11 0 6 0 0 0 0 5 0 0 0 100 2 0 0 14 110 52 106 0 1 0 0 266 0 0 0 100 3 0 0 7 214 103 8 0 1 0 0 303 0 0 0 100 4 0 0 7 19 6 15 0 0 0 0 562 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 3 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 15 4 10 0 0 0 0 6 0 0 0 100 March 31, 2026 at 06:37:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 150 0 0 1 0 1421 0 1 0 99 1 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 290 0 0 0 100 3 0 0 7 219 104 12 0 0 1 0 311 0 0 0 100 4 0 0 7 22 8 16 1 0 1 0 566 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 203 148 1 0 2 0 1420 0 1 0 99 1 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 2 0 0 14 112 52 112 0 0 0 0 276 0 0 0 100 3 0 0 7 213 103 6 0 0 0 0 310 0 0 0 100 4 0 0 7 30 9 28 1 0 0 0 581 0 0 0 100 5 1 0 0 19 7 10 0 0 0 0 12 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 8 0 1 0 0 2 0 0 0 100 March 31, 2026 at 06:37:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 204 152 1 0 1 0 1422 0 1 0 99 1 0 0 0 10 1 2 0 0 0 0 1 0 0 0 100 2 0 0 14 109 52 106 0 0 0 0 269 0 0 0 100 3 0 0 7 215 103 8 0 0 0 0 310 0 0 0 100 4 0 0 7 27 9 26 0 1 0 0 569 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 110 0 63 2322 206 416 7 36 4 2 3433 1 1 0 98 1 186 0 0 116 9 234 6 23 7 0 1930 1 0 0 99 2 116 0 14 210 43 424 2 26 3 1 1931 0 0 0 99 3 12 0 7 281 106 204 6 20 0 0 1967 1 0 0 99 4 191 0 21 74 5 139 4 16 4 0 2190 1 0 0 99 5 219 0 0 51 3 117 6 16 2 1 1292 1 0 0 98 6 40 0 0 124 4 284 3 27 6 1 1688 0 0 0 99 7 0 0 0 60 6 140 4 17 0 0 1186 1 0 0 99 March 31, 2026 at 06:37:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2325 211 166 2 0 0 0 1447 0 1 0 99 1 0 0 0 10 1 2 0 0 0 0 1 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 312 153 106 0 0 0 0 301 0 0 0 100 4 0 0 7 11 3 6 0 0 0 0 558 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 25 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:37:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2321 209 164 1 0 0 0 1442 0 1 0 99 1 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 2 0 0 14 10 3 6 0 0 0 0 267 0 0 0 100 3 0 0 7 310 152 104 0 0 0 0 300 0 0 0 100 4 0 0 7 13 3 6 2 0 0 0 559 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:37:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2321 209 160 0 0 0 0 1442 0 1 0 99 1 0 0 0 12 1 2 0 0 2 0 0 0 0 0 100 2 0 0 14 17 3 16 0 1 1 0 278 0 0 0 100 3 0 0 10 311 152 107 0 1 1 0 301 0 0 0 100 4 1 0 7 21 4 20 0 0 1 0 584 0 0 0 100 5 0 0 0 27 11 14 0 0 1 0 10 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 15 3 8 0 0 1 0 1 0 0 0 100 March 31, 2026 at 06:37:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2326 208 279 1 21 166 0 1376 0 1 0 99 1 0 0 0 102 0 185 0 18 151 0 83 0 0 0 100 2 0 0 14 164 10 244 1 16 164 0 288 0 0 0 100 3 0 0 7 317 151 170 1 17 154 0 336 0 0 0 100 4 0 0 15 180 70 230 0 15 188 0 560 0 1 0 99 5 0 0 0 147 26 221 0 18 148 0 14 0 0 0 100 6 0 0 0 88 2 153 0 15 139 0 83 0 0 0 100 7 0 0 7 102 2 193 1 11 118 0 18 0 0 0 100 March 31, 2026 at 06:37:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 205 101 1 3 1 0 1345 0 1 0 99 1 0 0 0 11 0 0 0 0 0 0 0 0 0 0 100 2 0 0 14 137 35 131 0 3 0 0 280 0 0 0 100 3 0 0 7 219 103 16 0 1 0 0 304 0 0 0 100 4 0 0 7 14 3 6 0 0 0 0 559 0 0 0 100 5 0 0 0 64 27 54 0 1 0 0 1 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2313 205 145 1 1 0 0 1348 0 1 0 99 1 0 0 0 32 1 8 0 3 0 0 0 0 0 0 100 2 0 0 14 99 35 76 0 3 0 0 275 0 0 0 100 3 0 0 7 276 125 54 0 2 1 0 300 0 0 0 100 4 0 0 7 31 3 9 2 1 0 0 558 0 0 0 100 5 0 0 0 22 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 26 2 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:37:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 204 146 0 2 1 0 1344 0 1 0 99 1 0 0 0 43 14 32 0 2 0 0 0 0 0 0 100 2 0 0 14 44 18 40 0 2 0 0 275 0 0 0 100 3 0 0 7 272 129 60 0 2 0 0 301 0 0 0 100 4 0 0 7 12 3 7 0 0 0 0 560 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 158 2340 206 1105 26 111 16 0 8600 3 2 0 95 1 19 0 0 156 1 1037 27 97 17 0 6379 3 1 0 96 2 17 0 14 229 36 1004 21 67 10 0 6533 3 1 0 96 3 8 0 2 705 107 940 13 51 21 0 6268 3 1 0 96 4 0 0 7 544 4 998 7 45 12 0 5843 2 1 0 97 5 14 0 0 343 14 908 10 61 13 0 4902 3 1 0 97 6 10 0 0 335 14 986 8 48 14 0 6123 2 1 0 97 7 2 0 0 241 3 962 10 47 15 0 7118 2 1 0 97 March 31, 2026 at 06:37:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2318 205 342 1 23 317 0 1344 0 1 0 99 1 0 0 0 96 1 174 0 13 201 0 1 0 0 0 100 2 0 0 14 95 2 188 0 25 228 0 269 0 0 0 100 3 0 0 7 342 155 201 0 22 285 0 309 0 0 0 100 4 0 0 7 135 50 192 0 16 236 0 572 0 1 0 99 5 0 0 0 94 0 234 0 21 210 0 0 0 0 0 100 6 0 0 0 205 51 302 0 17 273 0 0 0 0 0 100 7 0 0 0 118 1 220 0 16 207 0 0 0 0 0 100 March 31, 2026 at 06:37:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 7 2329 205 189 0 7 5 4 1535 0 1 0 99 1 3265 0 114 38 0 71 3 2 7 20 1254 1 1 0 98 2 143 0 14 59 2 75 0 8 7 14 397 0 0 0 100 3 32 0 11 247 103 56 0 12 8 8 453 0 0 0 100 4 28 0 7 55 8 61 2 9 9 5 698 0 0 0 100 5 7 0 0 39 1 39 0 9 3 4 109 0 0 0 100 6 6 0 0 136 52 126 0 2 1 3 58 0 0 0 100 7 4 0 0 33 3 17 0 3 1 1 44 0 0 0 100 March 31, 2026 at 06:37:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 204 146 1 0 1 0 1428 0 1 0 99 1 0 0 0 10 1 2 0 0 0 0 1 0 0 0 100 2 0 0 14 14 1 10 0 0 0 0 266 0 0 0 100 3 0 0 7 214 104 6 0 0 0 0 301 0 0 0 100 4 0 0 7 19 7 14 0 0 1 0 564 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 10 0 0 0 100 6 0 0 0 112 52 106 0 0 0 0 0 0 0 0 100 7 0 0 0 16 3 14 0 1 0 0 1 0 0 0 100 March 31, 2026 at 06:37:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 162 1 1 1 0 1426 0 1 0 99 1 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 2 0 0 14 18 2 16 0 0 0 0 272 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 26 10 20 0 0 1 0 889 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 11 0 0 0 100 6 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 7 0 0 0 18 4 14 0 0 2 0 5 0 0 0 100 March 31, 2026 at 06:37:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 144 1 0 0 0 1426 0 1 0 99 1 0 0 0 10 1 0 0 0 1 0 0 0 0 0 100 2 0 0 14 21 2 18 0 0 1 0 278 0 0 0 100 3 0 0 7 212 103 4 0 0 1 0 300 0 0 0 100 4 0 0 7 24 5 21 0 0 1 0 568 0 0 0 100 5 0 0 0 20 7 12 0 0 1 0 31 0 0 0 100 6 0 0 0 110 52 102 0 0 1 0 0 0 0 0 100 7 0 0 0 23 7 16 0 1 1 0 5 0 0 0 100 March 31, 2026 at 06:37:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 180 0 49 2319 206 449 2 28 118 0 2297 1 1 0 98 1 0 0 0 103 1 234 0 23 158 0 1067 1 0 0 99 2 23 0 14 117 5 335 1 33 158 1 1403 0 0 0 99 3 494 0 7 362 141 336 1 26 152 1 2132 1 1 0 99 4 92 0 7 184 43 341 3 26 123 0 1859 0 0 0 99 5 182 0 0 103 1 198 1 21 126 1 1302 1 0 0 99 6 46 0 0 173 27 295 1 19 104 0 1563 1 0 0 99 7 1 0 0 197 31 350 1 20 152 0 1173 1 0 0 99 March 31, 2026 at 06:37:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2326 209 166 2 0 1 0 1453 0 1 0 99 1 0 0 0 12 0 4 0 0 0 0 21 0 0 0 100 2 4 0 14 24 4 18 0 0 0 0 271 0 0 0 100 3 0 0 7 220 103 16 0 1 0 0 319 0 0 0 100 4 0 0 7 15 3 8 1 1 0 0 577 0 0 0 100 5 0 0 0 10 0 4 0 0 0 0 2 0 0 0 100 6 0 0 0 11 1 4 0 0 0 0 3 0 0 0 100 7 0 0 0 115 52 106 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:37:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2325 209 172 1 5 12 0 1378 0 1 0 99 1 0 0 10 18 0 12 0 2 3 1 17 0 1 0 99 2 0 0 14 27 3 26 0 5 8 0 284 0 0 0 100 3 0 0 14 222 103 18 0 2 5 0 314 0 0 0 100 4 0 0 7 21 3 24 0 2 12 0 579 0 0 0 100 5 0 0 0 15 0 10 0 2 10 0 15 0 0 0 100 6 0 0 14 16 1 19 1 5 14 1 79 0 0 0 100 7 0 0 0 125 53 122 0 2 2 1 74 0 0 0 100 March 31, 2026 at 06:37:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 146 1 0 0 0 1343 0 1 0 99 1 0 0 0 9 0 0 0 0 0 0 0 0 0 0 100 2 0 0 14 25 6 20 0 0 0 0 274 0 0 0 100 3 0 0 14 219 104 10 0 0 1 0 301 0 0 0 100 4 0 0 7 16 4 10 1 1 0 0 561 0 0 0 100 5 0 0 0 10 1 4 0 1 1 0 0 0 0 0 100 6 0 0 0 11 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 114 53 106 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2309 203 146 0 0 2 0 1343 0 1 0 99 1 0 0 0 24 0 2 0 0 0 0 0 0 0 0 100 2 0 0 14 44 6 28 0 0 0 0 286 0 0 0 100 3 0 0 7 230 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 45 7 26 2 1 0 0 577 0 0 0 100 5 0 0 0 39 6 18 0 0 1 0 13 0 0 0 100 6 0 0 0 26 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 131 53 110 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:37:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2321 208 282 1 12 115 0 1344 0 1 0 99 1 0 0 0 81 2 144 0 16 80 0 1 0 0 0 100 2 0 0 14 86 11 132 0 11 90 0 280 0 0 0 100 3 0 0 7 307 140 139 0 10 91 0 303 0 0 0 100 4 0 0 7 105 40 131 0 9 66 0 563 0 0 0 100 5 0 0 0 79 1 146 0 8 94 0 0 0 0 0 100 6 0 0 14 77 2 134 0 8 57 0 0 0 0 0 100 7 0 0 0 170 52 221 0 4 59 0 0 0 0 0 100 March 31, 2026 at 06:37:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 59 0 175 2337 205 1227 29 113 13 0 8291 3 2 0 95 1 14 0 0 185 11 1169 23 117 20 0 6687 3 1 0 96 2 9 0 14 318 17 1016 11 68 19 0 6913 3 1 0 96 3 11 0 7 547 103 1086 15 62 11 0 6405 3 1 0 96 4 3 0 7 496 7 904 17 47 10 1 6404 2 1 0 97 5 19 0 0 497 1 1014 16 54 22 0 4906 2 1 0 97 6 35 0 0 427 2 792 6 29 18 0 6898 2 1 0 97 7 0 0 0 425 34 717 7 36 10 0 5666 2 1 0 97 March 31, 2026 at 06:37:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 159 2 2 3 0 1337 0 1 0 99 1 0 0 0 19 5 10 0 0 0 0 7 0 0 0 100 2 0 0 14 17 2 12 0 1 1 0 266 0 0 0 100 3 3 0 7 318 154 116 0 1 1 0 319 0 0 0 100 4 0 0 7 14 3 10 0 0 2 0 592 0 0 0 100 5 0 0 0 14 2 12 0 0 0 0 50 0 0 0 100 6 0 0 0 10 1 4 0 0 1 0 0 0 0 0 100 7 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 March 31, 2026 at 06:37:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 108 0 7 2331 203 227 0 16 19 13 1638 0 1 0 99 1 31 0 1 50 3 58 0 6 4 10 141 0 0 0 100 2 43 0 14 48 2 57 0 8 7 8 355 0 0 0 100 3 11 0 7 340 152 128 0 3 4 4 357 0 0 0 100 4 22 0 7 44 3 42 2 2 4 7 666 0 0 0 100 5 7 0 0 30 1 23 0 3 6 3 62 0 0 0 100 6 20 0 0 33 3 21 0 2 1 1 62 0 0 0 100 7 3262 0 114 40 2 70 3 3 9 17 1257 1 1 0 98 March 31, 2026 at 06:37:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 203 148 1 0 3 0 1416 0 1 0 99 1 0 0 0 21 6 14 0 1 1 0 6 0 0 0 100 2 0 0 14 22 3 20 0 0 1 0 278 0 0 0 100 3 0 0 7 311 152 106 0 0 1 0 303 0 0 0 100 4 0 0 7 19 4 20 0 0 1 0 572 0 0 0 100 5 0 0 0 26 9 16 0 0 1 0 27 0 0 0 100 6 0 0 0 15 4 8 0 0 1 0 4 0 0 0 100 7 0 0 0 13 2 6 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:37:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 203 386 1 28 265 0 1422 0 1 0 99 1 0 0 0 126 8 232 0 19 314 0 325 0 0 0 100 2 0 0 14 115 1 234 0 26 254 0 269 0 0 0 100 3 0 0 7 456 207 315 0 21 249 0 310 0 0 0 99 4 0 0 7 151 58 208 0 27 307 0 561 0 0 0 100 5 0 0 0 99 1 188 0 19 221 0 0 0 0 0 100 6 0 0 0 92 1 192 0 15 275 0 0 0 0 0 100 7 0 0 0 116 2 227 0 21 238 0 2 0 0 0 100 March 31, 2026 at 06:37:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 146 1 0 0 0 1417 0 1 0 99 1 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 2 0 0 14 8 1 4 0 1 0 0 266 0 0 0 100 3 0 0 7 316 155 110 0 0 0 0 304 0 0 0 100 4 0 0 7 13 4 8 0 0 0 0 559 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 10 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 14 1 8 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:37:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 173 0 63 2311 203 329 5 27 16 0 3023 1 1 0 98 1 304 0 0 48 1 119 2 12 2 1 1976 2 0 0 98 2 0 0 14 62 3 141 1 14 5 0 1467 1 0 0 99 3 469 0 7 368 139 385 2 27 12 1 2225 1 0 0 99 4 110 0 7 104 4 281 2 27 11 1 1943 0 0 0 99 5 7 0 0 80 1 264 0 18 11 0 1311 1 0 0 99 6 1 0 0 104 19 328 2 25 2 0 1702 1 0 0 99 7 58 0 0 74 2 280 0 19 11 0 1534 1 0 0 99 March 31, 2026 at 06:37:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 203 128 1 1 1 0 1425 0 1 0 99 1 0 0 0 17 3 6 0 0 0 0 8 0 0 0 100 2 5 0 14 11 2 6 0 0 5 0 291 0 0 0 100 3 0 0 7 220 104 10 0 0 0 0 325 0 0 0 100 4 0 0 7 23 4 21 0 1 2 0 570 0 0 0 100 5 0 0 0 10 0 4 0 1 0 0 3 0 0 0 100 6 21 0 0 113 44 107 0 2 0 0 24 0 0 0 100 7 0 0 0 32 7 26 0 1 0 0 1 0 0 0 100 March 31, 2026 at 06:37:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2315 204 61 1 4 4 0 1370 0 1 0 99 1 0 0 0 27 2 29 0 6 14 0 11 0 0 0 100 2 0 0 14 21 2 22 0 2 7 0 285 0 0 0 100 3 0 0 7 223 103 19 0 4 10 0 378 0 0 0 100 4 0 0 22 45 14 43 1 2 5 0 597 0 0 0 100 5 0 0 0 34 9 37 0 4 14 1 124 0 0 0 100 6 0 0 0 120 14 112 0 3 4 0 25 0 0 0 100 7 0 0 5 130 38 120 0 4 4 0 2 0 1 0 99 March 31, 2026 at 06:37:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2319 205 184 0 23 186 0 1351 0 1 0 99 1 0 0 0 109 14 167 0 15 197 0 17 0 0 0 100 2 2 0 14 77 2 152 0 22 146 0 278 0 0 0 100 3 0 0 7 309 140 146 1 16 183 0 303 0 0 0 100 4 0 0 14 115 39 169 0 15 157 0 560 0 0 0 99 5 0 0 0 79 5 143 0 18 143 0 5 0 0 0 100 6 0 0 0 178 50 247 0 20 171 0 0 0 0 0 100 7 0 0 0 193 1 268 0 18 135 0 6 0 0 0 100 March 31, 2026 at 06:37:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2346 238 137 1 2 1 0 1335 0 1 0 99 1 0 0 0 35 5 12 0 0 0 0 8 0 0 0 100 2 0 0 14 26 3 6 0 0 0 0 267 0 0 0 100 3 0 0 7 228 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 29 2 7 2 0 0 0 560 0 0 0 100 5 0 0 0 23 0 2 0 1 0 0 0 0 0 0 100 6 0 0 0 129 16 106 0 2 0 0 2 0 0 0 100 7 0 0 0 65 3 40 0 2 1 0 2 0 0 0 100 March 31, 2026 at 06:37:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2359 253 146 1 0 0 0 1334 0 1 0 99 1 0 0 0 25 8 16 0 0 0 0 12 0 0 0 100 2 0 0 14 9 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 215 104 6 0 0 0 0 301 0 0 0 100 4 0 0 7 12 3 6 0 0 0 0 558 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 111 2 104 0 0 0 0 1 0 0 0 100 7 0 0 0 17 1 10 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:37:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 175 2371 241 1167 23 113 5 0 7934 3 2 0 95 1 2 0 0 528 12 969 15 70 7 0 6606 3 1 0 96 2 0 0 14 365 10 964 16 69 6 1 6737 2 1 0 97 3 1 0 7 544 104 1018 11 66 13 0 6001 2 1 0 97 4 1 0 7 254 4 1012 15 70 9 0 5870 3 1 0 96 5 13 0 0 539 3 994 12 50 8 0 4959 2 1 0 97 6 2 0 0 519 5 868 12 44 10 0 4474 3 1 0 97 7 1 0 0 130 4 737 8 33 9 0 6520 2 1 0 97 March 31, 2026 at 06:37:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 205 150 0 1 0 0 1334 0 1 0 99 1 0 0 0 118 52 112 0 1 1 0 4 0 0 0 100 2 0 0 14 18 3 12 0 0 1 0 278 0 0 0 100 3 0 0 7 212 103 4 0 0 1 0 300 0 0 0 100 4 0 0 7 21 4 21 0 0 1 0 579 0 0 0 100 5 0 0 0 26 9 16 0 0 1 0 20 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 19 1 12 0 1 1 0 0 0 0 0 100 March 31, 2026 at 06:37:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3266 0 120 2319 203 469 4 28 353 18 2674 1 2 0 97 1 131 0 0 253 57 436 0 33 275 17 140 0 1 0 99 2 24 0 16 148 3 317 0 35 267 3 413 0 0 0 99 3 48 0 7 409 178 342 0 27 240 9 440 0 0 0 99 4 6 0 7 200 79 289 1 25 308 4 636 0 1 0 99 5 8 0 0 112 0 265 0 21 249 4 61 0 0 0 100 6 6 0 0 158 1 297 0 30 316 2 67 0 0 0 100 7 10 0 0 128 3 300 0 25 235 1 93 0 0 0 100 March 31, 2026 at 06:37:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 142 1 1 0 0 1417 0 1 0 99 1 0 0 0 106 46 94 1 1 0 0 4 0 0 0 100 2 0 0 14 27 9 28 0 2 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 6 1 0 0 0 560 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 203 144 0 0 0 0 1417 0 1 0 99 1 0 0 0 27 9 20 0 0 0 0 326 0 0 0 100 2 0 0 14 110 52 106 0 0 0 0 266 0 0 0 100 3 0 0 7 215 103 10 0 1 0 0 305 0 0 0 100 4 0 0 7 11 3 6 0 0 0 0 558 0 0 0 100 5 0 0 0 9 2 2 0 0 0 0 10 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 16 1 10 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:37:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 146 1 0 0 0 1417 0 1 0 99 1 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 266 0 0 0 100 3 0 0 7 214 104 6 0 0 0 0 301 0 0 0 100 4 0 0 7 11 3 6 0 0 0 0 560 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 10 0 0 0 100 6 0 0 0 19 6 12 1 0 0 0 6 0 0 0 100 7 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 92 0 49 2317 203 460 3 30 6 1 3216 1 1 0 99 1 133 0 0 55 0 138 5 12 1 2 1443 1 0 0 99 2 0 0 14 140 39 361 4 16 2 0 1473 1 0 0 99 3 277 0 7 305 116 269 4 24 8 0 2323 1 0 0 99 4 0 0 7 89 3 269 3 14 7 0 2201 0 0 0 99 5 22 0 0 61 9 82 6 8 4 0 1004 1 0 0 99 6 265 0 12 99 6 343 0 17 3 1 1996 1 0 0 99 7 138 0 0 122 1 264 0 21 6 2 1724 0 0 0 99 March 31, 2026 at 06:37:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 21 2315 204 307 1 18 177 0 1431 0 1 0 99 1 0 0 0 93 6 160 0 11 168 0 12 0 0 0 100 2 5 0 14 80 2 141 0 14 115 0 273 0 0 0 100 3 0 0 7 406 194 261 0 14 164 0 318 0 0 0 100 4 0 0 7 104 38 141 1 16 110 0 569 0 0 0 100 5 14 0 0 73 1 126 0 11 118 0 10 0 0 0 100 6 0 0 0 87 2 152 0 14 102 0 12 0 0 0 100 7 0 0 0 91 2 169 0 15 112 0 9 0 0 0 100 March 31, 2026 at 06:37:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 15 2314 203 160 2 6 10 0 1340 0 1 0 99 1 0 0 14 17 0 11 0 5 7 0 3 0 0 0 100 2 0 0 14 26 4 28 2 4 3 0 286 0 0 0 100 3 0 0 14 342 161 151 0 5 12 0 349 0 0 0 100 4 0 0 7 22 3 25 0 8 10 1 652 0 0 0 100 5 0 0 0 15 0 12 1 2 3 0 89 0 0 0 100 6 0 0 0 16 1 11 1 2 10 0 6 0 0 0 100 7 1 0 0 17 1 15 0 3 15 0 24 0 0 0 100 March 31, 2026 at 06:37:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 203 154 0 0 0 0 1333 0 1 0 99 1 0 0 0 13 1 5 0 1 0 0 1 0 0 0 100 2 0 0 14 13 3 6 0 0 0 0 266 0 0 0 100 3 0 0 14 329 159 122 0 0 0 0 311 0 0 0 100 4 0 0 7 12 3 6 0 0 0 0 558 0 0 0 100 5 0 0 0 16 2 10 0 0 2 0 21 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 15 4 6 0 0 0 0 4 0 0 0 100 March 31, 2026 at 06:37:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2311 203 155 1 1 1 0 1335 0 1 0 99 1 0 0 0 30 1 4 0 0 0 0 1 0 0 0 100 2 0 0 14 26 3 6 0 0 0 0 267 0 0 0 100 3 0 0 7 340 158 118 0 0 0 0 309 0 0 0 100 4 0 0 7 29 3 8 1 1 0 0 560 0 0 0 100 5 0 0 0 26 1 4 0 0 0 0 1 0 0 0 100 6 0 0 0 27 1 8 0 1 0 0 0 0 0 0 100 7 0 0 0 28 3 6 0 0 0 0 7 0 0 0 100 March 31, 2026 at 06:37:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 203 154 0 0 2 0 1334 0 1 0 99 1 0 0 0 10 1 0 0 0 1 0 0 0 0 0 100 2 0 0 14 15 3 12 0 0 1 0 278 0 0 0 100 3 0 0 7 324 158 116 1 0 1 0 309 0 0 0 100 4 0 0 7 21 4 18 1 0 1 0 579 0 0 0 100 5 0 0 0 27 10 14 0 0 1 0 10 0 0 0 100 6 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 14 2 8 0 1 0 0 1 0 0 0 100 March 31, 2026 at 06:37:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 161 2339 203 1272 35 118 18 0 8259 3 2 0 95 1 0 0 0 326 1 922 16 89 12 0 7525 3 1 0 96 2 0 0 14 511 2 1203 26 87 21 0 5474 3 1 0 96 3 18 0 7 689 156 1322 28 94 25 0 5833 3 1 0 96 4 2 0 7 289 6 837 13 62 21 0 7986 3 1 0 96 5 1 0 0 327 1 1068 15 55 12 0 5141 3 1 0 97 6 12 0 0 425 5 760 14 49 14 0 5514 2 0 0 98 7 0 0 0 170 4 709 12 41 14 0 5613 2 0 0 98 March 31, 2026 at 06:37:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2309 203 154 0 0 3 0 1334 0 0 0 99 1 0 0 0 9 1 0 0 0 0 0 0 0 0 0 100 2 0 0 14 9 3 4 0 0 0 0 266 0 0 0 100 3 0 0 4 211 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 5 0 0 1 0 559 0 0 0 100 5 0 0 0 19 7 12 0 0 0 0 7 0 0 0 100 6 0 0 0 108 51 104 0 1 0 0 10 0 0 0 100 7 0 0 0 13 1 8 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:37:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 7 2329 205 198 1 10 2 4 1507 0 1 0 99 1 3265 0 114 40 0 75 3 4 8 22 1258 1 1 0 98 2 98 0 14 53 2 74 0 8 10 14 424 0 0 0 100 3 30 0 10 249 103 55 0 12 10 7 448 0 0 0 100 4 25 0 7 45 3 50 1 9 5 7 685 0 0 0 100 5 6 0 0 39 4 25 0 4 2 1 69 0 0 0 100 6 8 0 0 137 51 130 0 4 2 2 78 0 0 0 100 7 20 0 0 34 1 26 0 3 1 3 72 0 0 0 100 March 31, 2026 at 06:37:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 204 164 1 1 0 0 1417 0 1 0 99 1 0 0 0 16 0 10 0 2 0 0 0 0 0 0 100 2 0 0 14 10 3 6 0 0 0 0 266 0 0 0 100 3 0 0 7 214 104 6 0 0 0 0 301 0 0 0 100 4 0 0 7 11 3 6 0 0 0 0 559 0 0 0 100 5 0 0 0 14 4 8 0 0 0 0 5 0 0 0 100 6 0 0 0 109 51 104 0 0 0 0 10 0 0 0 100 7 0 0 0 9 0 2 0 0 3 0 0 0 0 0 100 March 31, 2026 at 06:37:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 204 150 0 0 0 0 1419 0 1 0 99 1 0 0 0 21 1 18 0 1 0 0 3 0 0 0 100 2 0 0 14 12 2 12 0 0 0 0 278 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 18 3 18 1 0 0 0 579 0 0 0 100 5 0 0 0 38 15 28 0 0 0 0 337 0 0 0 100 6 0 0 0 111 51 108 0 0 0 0 15 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:37:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 204 381 1 25 286 0 1418 0 1 0 99 1 0 0 0 135 10 237 0 23 257 0 13 0 0 0 100 2 0 0 14 102 2 195 0 20 263 0 272 0 0 0 100 3 0 0 7 330 149 195 0 19 295 0 300 0 0 0 100 4 0 0 7 143 49 214 0 25 242 0 559 0 1 0 99 5 0 0 0 94 0 185 0 13 220 0 0 0 0 0 100 6 0 0 0 185 51 279 0 16 194 0 0 0 0 0 100 7 0 0 0 109 0 212 0 17 204 0 0 0 0 0 100 March 31, 2026 at 06:37:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 361 0 49 2322 208 428 10 22 7 4 3473 1 1 0 98 1 165 0 0 127 8 293 6 22 11 2 1485 1 0 0 99 2 134 0 14 76 2 191 3 15 16 4 1508 2 0 0 98 3 234 0 7 263 103 128 2 9 2 4 2155 1 0 0 98 4 1 0 7 79 3 229 6 17 5 0 2082 1 0 0 99 5 20 0 0 104 2 244 14 20 11 0 1738 0 0 0 99 6 165 0 0 151 46 277 10 29 3 0 1623 0 0 0 99 7 68 0 0 35 1 76 3 11 1 0 1154 1 0 0 99 March 31, 2026 at 06:37:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 32 2357 253 144 1 1 1 0 1443 0 1 0 99 1 0 0 0 74 8 64 0 3 0 0 19 0 0 0 100 2 4 0 14 81 3 70 0 2 0 0 271 0 0 0 100 3 0 0 2 227 105 24 0 3 0 0 313 0 0 0 100 4 0 0 7 15 3 8 0 1 1 0 577 0 0 0 100 5 0 0 0 14 1 6 0 1 1 0 37 0 0 0 100 6 0 0 0 15 1 10 0 1 0 0 7 0 0 0 100 7 0 0 0 12 1 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:37:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2365 253 167 2 8 12 0 1445 0 1 0 99 1 0 0 0 43 8 40 0 2 6 0 93 0 0 0 100 2 0 0 14 116 2 117 0 4 13 0 268 0 0 0 100 3 0 0 7 224 104 20 0 2 4 0 396 0 0 0 100 4 0 0 7 20 3 19 0 1 6 0 569 0 0 0 100 5 0 0 7 14 0 16 0 5 6 0 24 0 0 0 100 6 0 0 0 23 2 19 1 1 10 0 33 0 0 0 100 7 0 0 8 17 1 15 0 5 10 0 11 0 1 0 99 March 31, 2026 at 06:37:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2361 253 149 1 1 2 0 1340 0 1 0 99 1 0 0 0 21 2 8 0 0 1 0 0 0 0 0 100 2 0 0 14 115 3 112 0 0 1 0 278 0 0 0 100 3 0 0 7 221 104 14 0 0 1 0 300 0 0 0 100 4 0 0 7 34 10 32 1 0 1 0 591 0 0 0 100 5 0 0 0 32 12 20 0 1 1 0 10 0 0 0 100 6 0 0 7 11 2 4 0 1 1 0 0 0 0 0 100 7 0 0 0 12 1 4 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:37:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2369 255 331 1 15 209 0 1339 0 1 0 99 1 0 0 0 102 1 149 0 13 143 0 0 0 0 0 100 2 0 0 14 190 1 249 0 14 176 0 266 0 0 0 100 3 0 0 7 324 138 157 0 16 152 0 300 0 0 0 100 4 0 0 7 148 45 184 1 20 153 0 569 0 0 0 99 5 0 0 0 87 1 144 0 17 176 0 1 0 0 0 100 6 0 0 0 99 1 149 0 10 114 0 3 0 0 0 100 7 0 0 0 89 1 140 0 15 124 0 2 0 0 0 100 March 31, 2026 at 06:37:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2359 253 146 0 0 3 0 1340 0 1 0 99 1 0 0 0 17 0 10 0 0 0 0 0 0 0 0 100 2 0 0 14 107 1 102 0 0 0 0 266 0 0 0 100 3 0 0 7 215 104 6 0 0 0 0 300 0 0 0 100 4 0 0 7 29 11 24 0 0 0 0 570 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 24 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 77 2372 253 688 13 63 15 0 4531 2 1 0 97 1 14 0 0 226 4 419 9 41 7 0 3339 1 0 0 98 2 1 0 14 338 1 534 5 33 5 0 2966 1 0 0 99 3 2 0 7 386 104 312 2 26 8 0 3052 1 0 0 98 4 2 0 7 304 12 555 13 35 9 0 2852 2 0 0 98 5 13 0 0 226 0 396 5 27 5 0 2611 1 0 0 98 6 2 0 0 204 1 386 6 23 5 1 2109 1 0 0 98 7 0 0 0 176 1 311 1 13 8 0 2643 1 0 0 99 March 31, 2026 at 06:38:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 101 2339 213 795 25 84 16 0 4360 2 1 0 97 1 1 0 0 149 47 735 14 67 13 0 3783 2 0 0 98 2 1 0 14 105 3 673 17 60 10 0 3587 1 0 0 98 3 39 0 3 435 105 364 4 26 6 0 2689 1 0 0 98 4 5 0 7 171 3 454 10 32 3 0 3758 1 0 0 98 5 4 0 0 197 1 540 8 32 13 0 2685 1 0 0 98 6 0 0 0 253 3 444 7 23 5 0 2688 1 0 0 99 7 35 0 0 180 1 434 6 23 1 0 2681 1 0 0 99 March 31, 2026 at 06:38:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 120 0 7 2336 207 242 0 11 18 12 1553 0 1 0 99 1 52 0 0 144 51 143 1 10 1 6 117 0 0 0 100 2 448 0 127 29 1 38 0 5 5 3 370 0 0 0 100 3 8 0 7 241 105 28 0 2 2 5 359 0 0 0 100 4 1886 0 9 58 3 71 4 8 10 11 954 0 1 0 99 5 16 0 0 52 8 52 0 8 9 5 98 0 0 0 100 6 653 0 0 38 1 44 1 10 12 4 942 1 0 0 99 7 318 0 0 39 1 40 0 7 3 4 112 0 0 0 100 March 31, 2026 at 06:38:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2331 210 382 1 23 312 0 1435 0 1 0 99 1 0 0 0 163 33 251 1 18 240 0 7 0 0 0 100 2 0 0 14 126 21 230 0 19 216 0 266 0 0 0 100 3 0 0 7 332 145 162 1 12 225 0 304 0 0 0 100 4 0 0 7 124 42 197 0 23 273 0 559 0 0 0 100 5 0 0 0 90 1 179 0 16 301 0 0 0 0 0 100 6 0 0 0 100 2 197 1 25 227 0 10 0 0 0 100 7 0 0 0 97 0 188 0 16 193 0 0 0 0 0 100 March 31, 2026 at 06:38:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2323 210 166 1 0 2 0 1431 0 1 0 99 1 0 0 0 13 0 10 0 2 0 0 0 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 266 0 0 0 100 3 0 0 7 213 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 11 3 6 0 0 0 0 558 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 5 0 0 0 100 March 31, 2026 at 06:38:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 206 154 1 0 0 0 1741 0 1 0 99 1 0 0 0 20 4 16 0 1 0 0 7 0 0 0 100 2 0 0 14 111 52 108 0 0 0 0 271 0 0 0 100 3 0 0 7 214 104 6 0 0 0 0 301 0 0 0 100 4 0 0 7 11 3 6 0 0 0 0 560 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 21 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:38:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 387 0 63 2311 204 415 6 17 10 2 3487 1 1 0 98 1 310 0 0 88 7 166 3 19 4 1 1805 1 0 0 99 2 9 0 14 189 52 300 2 19 7 0 1472 1 0 0 99 3 39 0 7 274 103 176 3 17 3 0 1815 0 0 0 99 4 166 0 7 52 3 108 1 9 1 1 1821 1 0 0 99 5 3 0 0 72 1 174 10 20 8 0 1102 1 0 0 99 6 2 0 0 52 1 129 1 13 7 0 1546 1 0 0 99 7 0 0 0 57 1 112 5 17 0 0 1227 0 0 0 99 March 31, 2026 at 06:38:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 203 152 1 4 2 0 1436 0 1 0 99 1 0 0 0 28 7 16 1 1 1 0 10 0 0 0 100 2 3 0 14 124 52 122 0 3 1 0 296 0 0 0 100 3 0 0 7 221 103 14 0 1 1 0 300 0 0 0 100 4 0 0 7 25 4 26 0 0 2 0 587 0 0 0 100 5 0 0 0 32 12 16 0 0 2 0 13 0 0 0 100 6 0 0 0 15 3 4 0 0 1 0 1 0 0 0 100 7 0 0 0 16 2 4 0 1 1 0 9 0 0 0 100 March 31, 2026 at 06:38:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 205 339 1 18 172 0 1429 0 1 0 99 1 0 0 0 190 50 277 0 18 155 0 0 0 0 0 100 2 0 0 14 93 10 172 0 10 173 0 278 0 0 0 100 3 0 0 7 318 150 136 0 16 152 0 301 0 0 0 100 4 0 0 7 125 48 186 1 12 158 0 559 0 0 0 100 5 0 0 0 75 0 138 0 14 110 0 0 0 0 0 100 6 0 0 0 89 1 166 0 9 174 0 0 0 0 0 100 7 0 0 0 85 1 161 0 15 136 0 2 0 0 0 100 March 31, 2026 at 06:38:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2313 203 166 0 4 10 0 1367 0 1 0 99 1 0 0 14 120 51 118 0 3 9 0 15 0 0 0 100 2 0 0 14 25 4 25 0 4 7 0 298 0 0 0 100 3 0 0 15 230 103 30 1 9 13 0 314 0 1 0 99 4 0 0 17 25 4 27 0 5 3 0 559 0 0 0 100 5 0 0 0 18 1 20 0 7 12 1 84 0 0 0 100 6 0 0 0 41 11 35 0 0 2 0 33 0 0 0 100 7 0 0 0 15 0 10 0 2 6 0 90 0 0 0 100 March 31, 2026 at 06:38:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 203 148 1 0 2 0 1336 0 1 0 99 1 0 0 0 113 51 107 0 1 0 0 0 0 0 0 100 2 0 0 14 8 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 215 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 17 3 10 1 0 1 0 560 0 0 0 100 5 0 0 7 11 1 8 0 2 0 0 1 0 0 0 100 6 0 0 0 23 7 14 0 0 0 0 9 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2329 203 152 1 0 1 0 1335 0 1 0 99 1 0 0 112 117 53 109 0 1 0 0 2 0 0 0 100 2 0 0 14 24 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 234 104 10 0 0 0 0 301 0 0 0 100 4 0 0 7 28 3 6 0 0 0 0 558 0 0 0 100 5 0 0 7 25 0 2 0 0 0 0 0 0 0 0 100 6 21 0 0 45 10 20 1 0 0 0 16 0 0 0 100 7 0 0 0 26 1 4 0 0 1 0 3 0 0 0 100 March 31, 2026 at 06:38:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 203 152 0 0 1 0 1335 0 1 0 99 1 0 0 7 119 54 112 0 0 0 0 4 0 0 0 100 2 0 0 14 13 1 12 0 0 0 0 279 0 0 0 100 3 0 0 7 216 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 20 3 18 1 0 0 0 579 0 0 0 100 5 0 0 0 30 7 20 0 0 2 0 9 0 0 0 100 6 0 0 7 23 7 16 1 1 0 0 9 0 0 0 100 7 0 0 0 13 1 6 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 161 2367 228 1561 43 171 244 0 8301 3 2 0 95 1 1 0 0 564 28 1320 23 113 274 0 6672 3 1 0 96 2 17 0 14 298 2 1130 19 106 235 0 7434 3 1 0 96 3 29 0 7 535 146 1020 8 78 229 0 6794 2 1 0 97 4 3 0 7 613 46 1069 16 74 252 0 5833 2 1 0 97 5 0 0 0 551 6 1116 19 67 261 0 4976 2 1 0 96 6 10 0 0 288 5 1211 15 82 195 0 5242 3 1 0 96 7 19 0 0 545 2 1022 10 70 208 0 5541 2 1 0 97 March 31, 2026 at 06:38:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 205 146 1 0 1 0 1338 0 1 0 99 1 0 0 0 123 55 116 0 1 0 0 10 0 0 0 100 2 0 0 14 11 3 8 0 1 0 0 266 0 0 0 100 3 0 0 7 214 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 6 1 0 0 0 560 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 12 0 0 0 100 March 31, 2026 at 06:38:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 204 152 0 1 0 0 1333 0 1 0 99 1 0 0 0 21 6 12 0 0 0 0 6 0 0 0 100 2 0 0 14 111 53 106 1 0 0 0 271 0 0 0 100 3 0 0 7 216 104 8 0 0 0 0 301 0 0 0 100 4 0 0 7 11 3 6 0 0 0 0 559 0 0 0 100 5 0 0 0 12 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 11 0 0 0 100 March 31, 2026 at 06:38:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 205 158 1 0 0 0 1335 0 1 0 99 1 0 0 0 23 7 18 0 0 0 0 10 0 0 0 100 2 0 0 14 111 53 108 0 0 0 0 272 0 0 0 100 3 0 0 7 216 104 8 0 0 0 0 301 0 0 0 100 4 0 0 7 12 3 6 1 0 0 0 559 0 0 0 100 5 0 0 0 12 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 12 0 0 0 100 March 31, 2026 at 06:38:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2319 207 162 1 1 2 0 1341 0 1 0 99 1 0 0 0 24 8 12 0 0 1 0 323 0 0 0 100 2 0 0 14 119 54 118 1 1 1 0 288 0 0 0 100 3 0 0 7 214 103 6 0 0 1 0 300 0 0 0 100 4 0 0 7 20 4 20 0 0 1 0 582 0 0 0 100 5 0 0 0 27 11 16 0 1 1 0 10 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 12 1 4 0 0 1 0 10 0 0 0 100 March 31, 2026 at 06:38:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2318 209 162 0 0 3 0 1338 0 1 0 99 1 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 2 0 0 14 106 51 102 0 0 0 0 266 0 0 0 100 3 0 0 7 214 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 15 3 12 1 0 1 0 560 0 0 0 100 5 0 0 0 13 0 10 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 12 0 0 0 100 March 31, 2026 at 06:38:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 7 2341 210 212 1 8 11 6 1545 0 1 0 99 1 13 0 0 39 1 32 0 5 4 3 67 0 0 0 100 2 1 0 14 133 53 124 0 6 2 0 313 0 0 0 100 3 3261 0 121 249 103 82 3 3 13 23 1568 1 1 0 98 4 101 0 7 52 3 76 0 9 6 15 733 0 0 0 100 5 62 0 1 57 2 78 0 8 14 11 135 0 0 0 100 6 36 0 0 43 1 56 0 9 13 10 119 0 0 0 100 7 18 0 0 39 0 53 0 4 2 7 137 0 0 0 100 March 31, 2026 at 06:38:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2321 208 156 1 0 1 0 1423 0 1 0 99 1 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 267 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 6 1 0 0 0 559 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 12 0 0 0 100 March 31, 2026 at 06:38:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 208 164 0 0 1 0 1741 0 1 0 99 1 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 114 53 114 0 0 0 0 278 0 0 0 100 3 0 0 7 223 107 20 0 1 0 0 312 0 0 0 100 4 0 0 7 11 3 6 0 0 0 0 560 0 0 0 100 5 0 0 0 12 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:38:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 204 156 1 0 1 0 1417 0 1 0 99 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 14 110 51 110 0 0 0 0 278 0 0 0 100 3 0 0 7 220 107 12 0 0 0 0 305 0 0 0 100 4 0 0 7 19 3 20 1 0 0 0 571 0 0 0 100 5 0 0 0 27 7 20 0 0 0 0 17 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 6 0 0 0 0 12 0 0 0 100 March 31, 2026 at 06:38:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 7 2320 207 164 1 0 2 0 1422 0 1 0 99 1 0 0 0 15 3 8 0 1 0 0 1 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 266 0 0 0 100 3 0 0 7 224 108 18 1 1 1 0 307 0 0 0 100 4 0 0 7 16 4 14 0 0 1 0 558 0 0 0 100 5 0 0 0 9 1 6 0 1 3 0 0 0 0 0 100 6 0 0 0 10 2 4 0 0 1 0 0 0 0 0 100 7 4 0 0 12 2 8 0 0 1 0 15 0 0 0 100 March 31, 2026 at 06:38:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 205 150 0 0 2 0 1412 0 1 0 99 1 0 0 0 13 2 8 0 0 0 0 3 0 0 0 100 2 0 0 14 106 51 102 0 0 0 0 266 0 0 0 100 3 0 0 7 225 109 18 0 0 0 0 310 0 0 0 100 4 0 0 7 12 3 6 1 0 0 0 560 0 0 0 100 5 0 0 0 13 1 8 0 0 0 0 1 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 12 0 0 0 100 March 31, 2026 at 06:38:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 205 160 1 0 2 0 1417 0 1 0 99 1 0 0 0 14 3 6 0 0 0 0 1 0 0 0 100 2 0 0 14 108 51 106 0 0 0 0 271 0 0 0 100 3 0 0 7 229 110 22 0 0 0 0 633 0 0 0 100 4 0 0 7 11 3 6 0 0 0 0 558 0 0 0 100 5 0 0 0 14 1 10 0 0 1 0 39 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 11 0 0 0 100 March 31, 2026 at 06:38:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2323 211 166 1 0 1 0 1423 0 1 0 99 1 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 2 0 0 14 109 52 106 0 0 0 0 270 0 0 0 100 3 0 0 7 214 104 6 0 0 0 0 301 0 0 0 100 4 0 0 7 12 3 6 1 0 0 0 560 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 12 0 0 0 100 March 31, 2026 at 06:38:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2321 208 160 0 0 2 0 1418 0 1 0 99 1 0 0 0 13 3 4 0 0 1 0 0 0 0 0 100 2 0 0 14 112 52 110 0 0 1 0 276 0 0 0 100 3 0 0 7 212 103 4 0 0 1 0 300 0 0 0 100 4 0 0 7 25 7 22 0 0 2 0 577 0 0 0 100 5 0 0 0 26 9 20 0 0 4 0 16 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 0 12 1 4 0 0 1 0 10 0 0 0 100 March 31, 2026 at 06:38:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2320 209 160 1 0 2 0 1417 0 1 0 99 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 14 109 52 106 0 1 0 0 267 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 13 3 8 1 0 0 0 559 0 0 0 100 5 0 0 0 10 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 12 0 0 0 100 March 31, 2026 at 06:38:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 240 0 77 2324 207 303 8 22 6 0 2816 1 1 0 98 1 82 0 0 66 2 165 3 12 3 3 1244 1 0 0 99 2 41 0 14 81 6 246 5 33 4 0 1797 1 0 0 99 3 55 0 7 284 104 389 5 26 5 0 2111 0 0 0 99 4 0 0 7 71 4 232 4 28 4 0 2280 0 0 0 99 5 90 0 0 89 6 290 1 25 19 1 1342 1 0 0 99 6 132 0 0 93 2 276 2 27 7 0 1482 1 0 0 99 7 395 0 14 185 48 396 11 26 5 2 2397 1 0 0 98 March 31, 2026 at 06:38:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 204 152 0 0 2 0 1426 0 1 0 99 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 14 11 3 8 0 0 0 0 270 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 6 1 0 0 0 558 0 0 0 100 5 0 0 0 25 7 18 0 0 0 0 6 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 102 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 204 152 1 0 1 0 1424 0 1 0 99 1 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 7 1 4 0 0 0 0 269 0 0 0 100 3 0 0 7 214 104 6 0 0 0 0 301 0 0 0 100 4 0 0 7 11 3 6 0 0 0 0 560 0 0 0 100 5 0 0 0 28 8 24 0 0 0 0 11 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 203 116 0 0 0 0 393 0 0 0 100 1 0 0 0 11 1 5 0 1 0 0 12 0 0 0 100 2 0 0 14 10 1 10 0 0 0 0 276 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 21 4 21 1 0 2 0 591 0 0 0 100 5 0 0 0 36 16 24 0 1 1 0 14 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 111 51 104 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 16 2317 204 352 0 22 243 0 1038 0 1 0 99 1 0 0 0 120 4 222 0 16 175 0 309 0 0 0 100 2 2 0 28 76 2 139 0 12 125 1 289 0 0 0 99 3 0 0 14 325 145 164 0 15 166 0 397 0 0 0 100 4 0 0 7 137 48 167 0 16 152 0 565 0 0 0 100 5 1 0 0 106 8 182 0 18 122 0 56 0 0 0 100 6 0 0 0 91 2 167 0 13 125 1 68 0 0 0 100 7 0 0 0 208 52 456 0 16 131 0 354 0 0 0 100 March 31, 2026 at 06:38:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 204 148 1 0 0 0 1046 0 1 0 99 1 0 0 0 31 10 24 0 0 3 0 305 0 0 0 100 2 0 0 14 9 1 5 0 1 0 0 266 0 0 0 100 3 0 0 7 215 103 6 0 0 0 0 300 0 0 0 100 4 0 0 14 14 3 10 1 1 1 0 561 0 0 0 100 5 0 0 0 17 2 12 0 0 0 0 2 0 0 0 100 6 0 0 0 13 3 6 0 0 0 0 1 0 0 0 100 7 0 0 0 111 51 102 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2309 203 149 1 1 0 0 1041 0 1 0 99 1 0 0 0 42 9 18 0 0 5 0 301 0 0 0 100 2 0 0 14 29 3 6 0 0 0 0 268 0 0 0 100 3 0 0 7 230 104 6 0 0 0 0 301 0 0 0 100 4 0 0 7 29 3 8 0 0 2 0 561 0 0 0 100 5 0 0 0 25 1 4 0 1 0 0 1 0 0 0 100 6 0 0 0 26 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 124 51 102 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:38:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 148 2 1 0 0 1041 0 1 0 99 1 0 0 0 35 9 26 1 1 9 0 304 0 0 0 100 2 0 0 14 10 2 6 0 0 0 0 270 0 0 0 100 3 0 0 7 215 104 6 0 0 0 0 301 0 0 0 100 4 0 0 7 13 3 6 1 0 0 0 554 0 0 0 100 5 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 13 3 6 0 0 0 0 1 0 0 0 100 7 0 0 0 109 51 102 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 175 2331 203 1342 28 118 14 0 7867 3 2 0 95 1 25 0 0 374 13 1187 33 110 15 0 6568 3 1 0 96 2 0 0 14 475 6 1061 16 79 17 0 6789 3 1 0 96 3 0 0 7 440 138 1070 21 79 15 0 6457 2 1 0 97 4 0 0 7 300 5 930 15 62 13 0 7436 3 1 0 96 5 1 0 0 301 10 899 8 52 17 0 6412 2 1 0 97 6 15 0 0 391 4 743 10 41 16 0 6894 2 1 0 97 7 0 0 0 517 12 1088 8 35 9 0 4447 2 1 0 97 March 31, 2026 at 06:38:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2312 203 402 1 31 251 0 1040 0 1 0 99 1 0 0 0 151 28 248 0 22 217 0 300 0 0 0 100 2 0 0 14 99 1 191 0 20 214 0 266 0 0 0 100 3 0 0 7 383 171 227 0 16 309 0 308 0 0 0 99 4 0 0 7 122 44 173 0 12 208 0 560 0 0 0 100 5 0 0 0 80 0 156 0 17 249 0 0 0 0 0 100 6 0 0 0 93 3 180 0 20 216 0 0 0 0 0 100 7 0 0 0 101 1 200 0 21 258 0 2 0 0 0 100 March 31, 2026 at 06:38:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 150 1 0 0 0 1043 0 1 0 99 1 0 0 0 123 57 116 0 0 4 0 303 0 0 0 100 2 0 0 14 12 4 8 0 0 0 0 270 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 13 3 8 1 0 5 0 567 0 0 0 100 5 0 0 0 14 1 10 0 0 0 0 1 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 3 0 0 0 100 March 31, 2026 at 06:38:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 146 1 0 1 0 1041 0 1 0 99 1 0 0 0 121 56 114 1 0 2 0 299 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 13 3 8 1 0 2 0 570 0 0 0 100 5 0 0 0 11 0 10 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 144 0 0 0 0 1041 0 1 0 99 1 0 0 0 121 56 116 0 1 1 0 617 0 0 0 100 2 0 0 14 14 4 12 0 0 0 0 277 0 0 0 100 3 0 0 7 215 104 8 0 0 0 0 304 0 0 0 100 4 0 0 7 12 3 8 0 0 0 0 568 0 0 0 100 5 0 0 0 8 2 0 0 0 0 0 0 0 0 0 100 6 0 0 0 21 6 18 0 0 0 0 10 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 152 1 0 0 0 1041 0 1 0 99 1 0 0 0 112 52 106 0 0 3 0 294 0 0 0 100 2 0 0 14 10 1 10 0 0 0 0 279 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 19 3 22 0 0 0 0 591 0 0 0 100 5 0 0 0 32 11 20 0 0 0 0 10 0 0 0 100 6 0 0 0 20 7 14 0 0 0 0 6 0 0 0 100 7 0 0 0 12 1 8 0 1 0 0 2 0 0 0 100 March 31, 2026 at 06:38:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 797 0 120 2311 202 197 1 8 10 10 1193 0 1 0 99 1 85 0 0 65 5 75 0 7 9 12 427 0 0 0 100 2 40 0 14 141 52 153 0 7 4 8 370 0 0 0 100 3 1893 0 11 254 103 59 2 8 8 10 705 0 1 0 99 4 654 0 7 47 3 48 2 6 10 6 1548 1 0 0 99 5 31 0 0 51 2 64 0 9 8 6 105 0 0 0 100 6 9 0 0 50 8 45 0 6 6 2 85 0 0 0 100 7 5 0 0 32 0 22 0 5 6 3 38 0 0 0 100 March 31, 2026 at 06:38:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 146 0 0 0 0 1128 0 1 0 99 1 0 0 0 13 2 6 1 0 2 0 294 0 0 0 100 2 0 0 14 106 51 102 0 0 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 13 3 8 1 0 4 0 570 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 24 0 0 0 100 6 0 0 0 25 8 18 0 0 0 0 11 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 5 0 0 0 100 March 31, 2026 at 06:38:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 154 1 0 0 0 1129 0 1 0 99 1 0 0 0 14 3 8 0 0 2 0 295 0 0 0 100 2 0 0 14 110 52 108 0 0 0 0 272 0 0 0 100 3 0 0 7 214 104 6 0 0 0 0 301 0 0 0 100 4 0 0 7 12 3 8 0 0 1 0 569 0 0 0 100 5 0 0 0 13 1 8 0 0 0 0 21 0 0 0 100 6 0 0 0 22 7 14 1 0 1 0 325 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:38:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2321 209 168 1 0 1 0 1135 0 1 0 99 1 0 0 0 14 3 8 0 0 2 0 295 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 267 0 0 0 100 3 0 0 7 215 104 8 0 0 0 0 304 0 0 0 100 4 0 0 7 12 3 8 0 0 2 0 569 0 0 0 100 5 0 0 0 10 0 6 0 0 2 0 0 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 206 156 0 0 0 0 1128 0 1 0 99 1 4 0 0 15 4 6 0 0 2 0 299 0 0 0 100 2 0 0 14 114 53 112 0 0 1 0 283 0 0 0 100 3 0 0 7 212 103 4 0 0 1 0 300 0 0 0 100 4 0 0 7 23 4 24 1 0 2 0 584 0 0 0 100 5 0 0 0 25 10 12 0 0 1 0 17 0 0 0 100 6 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 7 0 0 0 11 1 4 0 1 1 0 0 0 0 0 100 March 31, 2026 at 06:38:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2319 206 156 2 0 2 0 1127 0 1 0 99 1 0 0 0 14 2 8 1 0 0 0 294 0 0 0 100 2 0 0 14 114 54 112 0 0 0 0 270 0 0 0 100 3 0 0 7 214 103 8 0 0 0 0 300 0 0 0 100 4 0 0 7 14 3 10 1 0 0 0 569 0 0 0 100 5 0 0 0 10 0 4 0 0 2 0 0 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 206 154 1 0 0 0 1440 0 1 0 99 1 0 0 0 12 2 6 0 0 2 0 294 0 0 0 100 2 0 0 14 108 51 106 0 0 0 0 271 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 8 0 0 2 0 570 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 23 6 20 0 0 0 0 10 0 0 0 100 7 0 0 0 8 0 4 0 1 1 0 3 0 0 0 100 March 31, 2026 at 06:38:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 140 0 1 0 0 1119 0 1 0 99 1 0 0 0 18 2 10 0 2 2 0 294 0 0 0 100 2 0 0 14 106 51 102 0 0 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 13 3 8 0 0 2 0 570 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 20 7 12 0 0 0 0 5 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 202 160 1 1 1 0 1117 0 1 0 99 1 0 0 0 12 2 4 0 0 2 0 294 0 0 0 100 2 0 0 14 106 51 102 0 0 0 0 266 0 0 0 100 3 0 0 7 215 104 8 0 0 0 0 304 0 0 0 100 4 0 0 7 15 4 10 1 0 0 0 572 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 23 8 18 0 0 0 0 10 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:38:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2312 202 150 0 0 0 0 1120 0 1 0 99 1 0 0 0 14 2 8 1 1 0 0 294 0 0 0 100 2 0 0 14 110 51 110 0 0 0 0 278 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 23 4 22 1 0 1 0 590 0 0 0 100 5 0 0 0 18 7 10 0 0 1 0 5 0 0 0 100 6 0 0 0 16 5 10 0 0 0 0 4 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 56 2320 203 438 4 35 165 2 2232 0 1 0 99 1 0 0 0 110 4 179 2 16 170 0 1471 0 0 0 99 2 7 0 14 207 52 350 2 18 135 0 1157 0 0 0 99 3 361 0 15 323 140 168 1 18 145 2 1986 2 1 0 97 4 19 0 14 145 40 194 3 15 152 1 1081 2 1 0 98 5 68 0 0 125 5 227 2 26 149 1 1022 1 0 0 99 6 269 0 0 118 8 251 6 25 131 2 1324 1 0 0 99 7 451 0 7 143 1 329 6 30 135 2 1353 0 0 0 99 March 31, 2026 at 06:38:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 203 151 1 1 0 0 1038 0 1 0 99 1 0 0 0 16 2 8 0 0 5 0 294 0 0 0 100 2 0 0 14 111 51 110 0 1 0 0 266 0 0 0 100 3 0 0 7 213 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 6 0 0 2 0 560 0 0 0 100 5 0 0 0 9 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 32 11 24 0 0 0 0 12 0 0 0 100 7 0 0 0 12 1 6 0 0 0 0 5 0 0 0 100 March 31, 2026 at 06:38:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2311 204 155 1 0 0 0 1037 0 1 0 99 1 0 0 0 32 3 8 0 1 3 0 295 0 0 0 100 2 0 0 14 124 51 104 0 0 1 0 266 0 0 0 100 3 0 0 7 235 105 14 0 1 0 0 310 0 0 0 100 4 0 0 7 29 3 8 1 1 1 0 560 0 0 0 100 5 0 0 0 26 1 6 0 0 0 0 19 0 0 0 100 6 0 0 0 36 7 14 0 0 0 0 8 0 0 0 100 7 0 0 0 24 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:38:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 202 150 0 0 0 0 1036 0 1 0 99 1 0 0 0 16 3 8 1 0 5 0 295 0 0 0 100 2 0 0 14 109 52 104 0 0 0 0 267 0 0 0 100 3 0 0 7 216 104 8 0 0 0 0 304 0 0 0 100 4 0 0 7 13 3 6 1 0 3 0 561 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 28 10 22 0 0 0 0 14 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:38:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 175 2376 235 1488 46 127 19 0 7153 3 2 0 96 1 0 0 0 445 18 1106 33 104 13 0 7061 3 1 0 96 2 12 0 14 594 6 1160 27 80 15 0 5287 3 1 0 96 3 1 0 7 661 107 975 12 56 14 0 5970 3 1 0 96 4 9 0 7 344 5 982 22 74 19 0 6657 3 1 0 96 5 2 0 0 356 13 845 12 56 11 0 7710 2 1 0 97 6 2 0 0 386 10 728 16 46 8 0 6249 2 1 0 97 7 3 0 0 469 4 812 9 37 7 0 5555 2 1 0 97 March 31, 2026 at 06:38:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2342 231 377 1 29 263 0 1041 0 1 0 99 1 0 0 0 147 23 243 0 21 253 0 294 0 0 0 100 2 0 0 14 101 2 209 0 28 283 0 266 0 0 0 100 3 0 0 7 350 149 225 0 24 288 0 300 0 0 0 100 4 0 0 7 138 48 197 0 21 289 0 562 0 1 0 99 5 0 0 0 101 0 199 0 19 257 0 0 0 0 0 100 6 0 0 0 108 2 214 0 19 215 0 0 0 0 0 100 7 0 0 0 188 6 310 1 16 266 0 9 0 0 0 100 March 31, 2026 at 06:38:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 7 2325 202 188 1 14 9 8 1200 0 1 0 99 1 4 0 0 146 45 127 0 5 5 2 337 0 0 0 100 2 645 0 14 54 8 37 1 3 4 4 1150 1 0 0 99 3 6 0 7 243 105 31 0 3 2 4 373 0 0 0 100 4 2619 0 121 40 4 74 2 4 6 11 1042 0 1 0 99 5 146 0 0 54 1 87 0 12 7 22 157 0 0 0 100 6 22 0 1 42 2 48 0 7 7 5 99 0 0 0 100 7 23 0 0 52 6 59 0 7 4 6 132 0 0 0 100 March 31, 2026 at 06:39:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 96 0 1 0 0 1127 0 1 0 99 1 0 0 0 66 2 56 1 1 0 0 294 0 0 0 100 2 0 0 14 108 51 104 0 1 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 14 3 8 2 0 3 0 570 0 0 0 100 5 0 0 0 12 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 16 5 10 0 0 0 0 7 0 0 0 100 March 31, 2026 at 06:39:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 140 1 0 1 0 1124 0 1 0 99 1 0 0 0 22 2 18 0 1 3 0 299 0 0 0 100 2 1 0 14 106 51 102 0 0 0 0 301 0 0 0 100 3 0 0 7 215 104 8 0 0 0 0 304 0 0 0 100 4 0 0 7 13 3 8 1 0 3 0 570 0 0 0 100 5 0 0 0 22 4 20 0 0 1 0 10 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 16 4 8 1 0 0 0 322 0 0 0 100 March 31, 2026 at 06:39:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 140 1 0 0 0 1124 0 1 0 99 1 0 0 0 23 2 22 0 0 1 0 309 0 0 0 100 2 0 0 14 106 51 102 0 0 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 23 5 26 0 0 3 0 581 0 0 0 100 5 0 0 0 21 10 10 0 0 0 0 6 0 0 0 100 6 0 0 0 14 2 12 0 0 0 0 11 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 783 0 63 2314 203 494 2 36 220 0 2764 1 1 0 97 1 7 0 0 142 4 303 0 29 107 0 1350 1 0 0 99 2 4 0 14 202 51 375 2 25 141 0 1470 0 0 0 99 3 1 0 7 373 147 437 0 30 159 0 1928 0 0 0 99 4 0 0 7 151 49 364 0 36 159 0 1694 1 0 0 99 5 0 0 0 125 5 407 0 26 145 0 1191 1 0 0 99 6 401 0 0 106 3 189 1 23 164 0 1831 2 1 0 98 7 68 0 0 145 1 386 1 38 136 0 1143 0 0 0 99 March 31, 2026 at 06:39:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 203 106 0 1 0 0 1132 0 1 0 99 1 0 0 0 57 2 48 1 2 1 0 294 0 0 0 100 2 0 0 14 109 51 105 0 1 0 0 269 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 29 11 24 1 0 6 0 570 0 0 0 100 5 0 0 0 16 1 8 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 3 0 0 0 100 March 31, 2026 at 06:39:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 203 154 2 4 9 0 1147 0 1 0 99 1 0 0 8 29 3 27 0 4 14 0 308 0 1 0 99 2 0 0 14 118 51 116 0 3 9 0 278 0 0 0 100 3 12 0 7 231 107 26 0 5 10 0 327 0 0 0 100 4 0 0 14 38 11 41 0 6 11 0 672 0 0 0 100 5 0 0 0 24 3 25 1 3 7 1 105 0 0 0 100 6 0 0 0 23 2 16 1 4 5 0 15 0 0 0 100 7 0 0 14 13 1 9 0 2 7 0 4 0 0 0 100 March 31, 2026 at 06:39:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2312 203 153 1 1 0 0 1045 0 1 0 99 1 0 0 0 15 2 8 0 1 1 0 294 0 0 0 100 2 0 0 14 113 53 108 0 0 0 0 268 0 0 0 100 3 0 0 7 231 112 22 0 0 0 0 313 0 0 0 100 4 0 0 14 15 3 8 1 0 1 0 559 0 0 0 100 5 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 6 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2305 202 145 0 0 1 0 1039 0 1 0 99 1 0 0 0 38 3 18 0 1 1 0 308 0 0 0 100 2 0 0 14 126 53 104 0 0 1 0 266 0 0 0 100 3 0 0 7 245 111 20 0 0 1 0 314 0 0 0 100 4 0 0 7 39 6 22 0 0 3 0 578 0 0 0 100 5 0 0 0 38 8 10 0 1 2 0 0 0 0 0 100 6 0 0 0 38 2 20 0 1 0 0 12 0 0 0 100 7 0 0 0 28 1 4 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:39:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2313 202 285 1 7 90 0 1041 0 1 0 99 1 0 0 0 61 2 98 1 4 55 0 294 0 0 0 100 2 0 0 14 147 52 182 0 1 77 0 266 0 0 0 100 3 0 0 7 299 135 123 0 3 69 0 314 0 0 0 100 4 0 0 7 83 28 97 1 7 79 0 556 0 0 0 100 5 0 0 0 52 1 86 0 7 66 0 0 0 0 0 100 6 0 0 0 61 1 102 0 5 69 0 3 0 0 0 100 7 0 0 0 60 1 101 0 3 45 0 2 0 0 0 100 March 31, 2026 at 06:39:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43 0 161 2333 205 1280 31 119 2 0 6185 3 1 0 95 1 3 0 0 253 19 991 23 84 9 0 6594 3 1 0 96 2 4 0 14 183 25 923 12 66 9 0 6792 3 1 0 96 3 3 0 7 710 113 948 15 57 12 0 5367 2 1 0 97 4 19 0 7 399 8 1182 15 60 17 0 5476 3 1 0 96 5 15 0 0 485 5 906 12 45 8 1 6571 2 1 0 97 6 28 0 0 347 2 741 8 32 9 0 5857 2 1 0 97 7 6 0 0 122 1 878 12 51 13 0 6107 2 1 0 97 March 31, 2026 at 06:39:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 136 0 0 0 0 1041 0 1 0 99 1 0 0 0 114 52 108 0 0 2 0 294 0 0 0 100 2 0 0 14 9 2 6 0 1 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 22 8 16 1 0 0 0 566 0 0 0 100 5 0 0 0 9 0 4 0 0 0 0 10 0 0 0 100 6 0 0 0 17 1 16 0 1 1 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 8 2327 202 208 1 12 13 9 1194 0 1 0 99 1 26 0 0 63 8 44 0 11 8 5 369 0 0 0 100 2 648 0 14 132 46 132 1 7 4 6 1163 1 0 0 99 3 5 0 7 238 104 20 0 4 0 2 342 0 0 0 100 4 7 0 7 52 11 45 0 3 3 4 655 0 0 0 100 5 2621 0 117 29 0 55 2 3 8 12 474 0 1 0 99 6 128 0 0 53 1 66 0 11 10 9 168 0 0 0 100 7 21 0 0 37 0 53 0 10 11 9 108 0 0 0 100 March 31, 2026 at 06:39:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 144 1 0 0 0 1126 0 1 0 99 1 0 0 0 23 4 18 1 0 3 0 311 0 0 0 100 2 0 0 14 114 52 112 0 0 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 27 7 28 1 0 1 0 574 0 0 0 100 5 0 0 0 12 5 2 0 0 0 0 10 0 0 0 100 6 0 0 0 20 1 18 0 0 0 0 12 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 202 427 0 26 245 0 1126 0 1 0 99 1 1 0 0 119 4 231 0 28 236 0 302 0 0 0 100 2 1 0 14 207 53 302 0 20 224 0 270 0 0 0 100 3 0 0 7 345 152 211 0 17 289 0 307 0 0 0 100 4 4 0 7 173 61 225 0 18 265 0 893 0 1 0 99 5 3 0 0 89 1 176 0 21 225 0 12 0 0 0 100 6 1 0 0 92 1 172 0 15 199 0 1 0 0 0 100 7 1 0 0 86 0 242 0 17 280 0 3 0 0 0 100 March 31, 2026 at 06:39:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 205 148 1 1 0 0 1131 0 1 0 99 1 0 0 0 14 3 8 0 0 3 0 295 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 266 0 0 0 100 3 0 0 7 214 103 6 1 0 0 0 303 0 0 0 100 4 0 0 7 14 4 8 1 0 4 0 561 0 0 0 100 5 0 0 0 8 0 4 0 0 0 0 20 0 0 0 100 6 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 18 6 12 0 0 0 0 8 0 0 0 100 March 31, 2026 at 06:39:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 588 0 63 2323 209 311 5 22 3 2 2872 1 1 0 98 1 149 0 0 116 26 155 12 24 8 1 1728 1 0 0 99 2 144 0 14 84 24 95 5 11 1 2 2219 1 0 0 98 3 0 0 7 272 106 139 5 20 1 0 1589 0 0 0 99 4 4 0 7 79 6 134 8 13 8 0 1830 1 0 0 99 5 13 0 0 58 1 152 7 17 2 0 1234 1 0 0 99 6 168 0 0 61 1 148 4 21 1 1 1424 0 0 0 99 7 57 0 11 54 4 77 5 14 4 1 983 1 0 0 99 March 31, 2026 at 06:39:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2306 202 144 1 0 0 0 1129 0 1 0 99 1 0 0 0 112 52 106 1 0 4 0 294 0 0 0 100 2 6 0 14 15 3 14 0 0 0 0 269 0 0 0 100 3 0 0 2 211 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 13 4 8 1 0 4 0 560 0 0 0 100 5 0 0 0 15 5 10 0 0 0 0 8 0 0 0 100 6 0 0 0 17 2 12 0 0 0 0 1 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 15 2310 202 163 0 4 11 1 1194 0 1 0 99 1 0 0 14 85 30 87 0 3 15 0 334 0 0 0 100 2 0 0 14 69 26 73 0 5 9 0 297 0 0 0 100 3 0 0 7 222 103 19 0 7 10 0 312 0 0 0 100 4 0 0 14 38 7 38 0 3 11 0 609 0 0 0 100 5 0 0 0 38 13 30 0 6 18 0 45 0 0 0 100 6 0 0 0 30 2 27 0 2 10 1 78 0 0 0 100 7 0 0 0 25 4 15 0 2 5 0 13 0 0 0 100 March 31, 2026 at 06:39:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 202 347 1 20 156 0 1046 0 1 0 99 1 0 0 0 86 4 146 0 16 168 0 295 0 0 0 100 2 0 0 14 176 52 233 0 13 128 0 266 0 0 0 100 3 0 0 7 305 139 145 0 15 111 0 300 0 0 0 100 4 0 0 14 121 40 158 1 13 162 0 559 0 0 0 100 5 0 0 0 76 1 148 0 13 148 0 0 0 0 0 100 6 0 0 0 78 1 138 0 13 148 0 0 0 0 0 100 7 0 0 0 117 10 200 1 15 134 0 16 0 0 0 100 March 31, 2026 at 06:39:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2309 202 143 1 1 0 0 1041 0 1 0 99 1 0 0 0 35 4 10 0 0 4 0 299 0 0 0 100 2 0 0 14 130 52 112 0 0 0 0 266 0 0 0 100 3 0 0 7 229 103 6 0 0 0 0 303 0 0 0 100 4 0 0 7 29 3 8 0 0 3 0 561 0 0 0 100 5 0 0 0 23 0 2 0 1 0 0 0 0 0 0 100 6 0 0 0 32 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 43 10 20 0 0 0 0 12 0 0 0 100 March 31, 2026 at 06:39:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 142 1 0 0 0 1040 0 1 0 99 1 0 0 0 16 3 8 1 0 2 0 295 0 0 0 100 2 0 0 14 109 52 104 0 0 0 0 266 0 0 0 100 3 0 0 7 213 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 13 3 6 1 0 0 0 557 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 21 7 14 0 0 0 0 11 0 0 0 100 March 31, 2026 at 06:39:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 161 2338 202 1254 44 120 15 0 7467 3 2 0 95 1 1 0 0 502 4 907 21 80 19 0 5913 3 1 0 97 2 14 0 14 541 31 907 15 62 18 0 6853 2 1 0 97 3 0 0 7 452 104 830 20 67 8 0 6129 2 1 0 97 4 0 0 7 485 4 1083 18 69 15 1 4878 2 1 0 97 5 1 0 0 160 20 1008 16 70 14 0 5019 2 1 0 97 6 15 0 0 406 1 740 12 50 13 0 5934 2 1 0 97 7 19 0 0 143 6 803 8 52 18 0 5913 3 1 0 97 March 31, 2026 at 06:39:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 152 1 0 0 0 1040 0 1 0 99 1 0 0 0 36 11 34 0 0 4 0 320 0 0 0 100 2 0 0 14 18 3 12 0 1 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 20 3 20 2 0 3 0 575 0 0 0 100 5 0 0 0 114 56 104 0 0 0 0 20 0 0 0 100 6 0 0 0 16 2 12 0 1 0 0 12 0 0 0 100 7 0 0 0 14 2 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 203 441 1 32 312 0 1039 0 1 0 99 1 0 0 0 125 14 228 0 26 267 0 309 0 0 0 100 2 0 0 14 100 2 198 0 15 265 0 266 0 0 0 100 3 0 0 7 351 152 223 0 24 236 0 300 0 0 0 100 4 0 0 7 121 52 213 0 22 236 0 554 0 0 0 100 5 0 0 0 145 32 223 0 21 206 0 10 0 0 0 100 6 0 0 0 128 22 212 0 17 273 0 0 0 0 0 100 7 0 0 0 101 1 200 0 20 234 0 3 0 0 0 100 March 31, 2026 at 06:39:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 203 148 1 0 0 0 1042 0 1 0 99 1 0 0 0 32 11 26 1 0 1 0 308 0 0 0 100 2 0 0 14 12 1 10 0 0 0 0 266 0 0 0 100 3 0 0 7 213 103 6 0 0 0 0 301 0 0 0 100 4 0 0 7 14 4 8 1 0 1 0 564 0 0 0 100 5 0 0 0 8 0 4 0 0 0 0 14 0 0 0 100 6 0 0 0 110 52 104 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 764 0 120 2307 202 139 0 12 6 11 1231 0 1 0 99 1 720 0 0 142 44 153 1 13 9 15 1601 1 0 0 99 2 1918 0 16 50 1 55 2 9 12 7 652 0 1 0 99 3 49 0 7 254 105 64 0 8 7 8 447 0 0 0 100 4 20 0 7 43 3 39 0 6 6 4 625 0 0 0 100 5 18 0 0 43 1 46 0 4 3 6 144 0 0 0 100 6 7 0 0 142 17 139 0 6 3 4 97 0 0 0 100 7 2 0 0 28 1 10 0 1 1 0 13 0 0 0 100 March 31, 2026 at 06:39:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 150 1 0 0 0 1127 0 1 0 99 1 0 0 0 12 2 6 0 0 3 0 294 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 267 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 6 1 0 2 0 564 0 0 0 100 5 0 0 0 10 1 6 0 0 0 0 20 0 0 0 100 6 0 0 0 120 57 114 0 0 0 0 7 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 128 0 49 2310 202 272 1 21 4 2 2349 1 1 0 98 1 222 0 0 51 4 101 3 7 4 2 2183 2 0 0 98 2 59 0 14 57 2 145 0 11 4 0 1319 1 0 0 99 3 1 0 7 253 103 204 3 16 6 0 1764 1 0 0 99 4 520 0 7 69 6 231 2 15 12 5 2155 1 0 0 99 5 178 0 0 81 8 227 1 18 2 0 1449 0 0 0 99 6 5 0 0 161 58 342 1 15 0 0 1086 1 0 0 99 7 34 0 0 41 1 173 0 13 1 0 1152 0 0 0 100 March 31, 2026 at 06:39:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2313 204 365 1 18 228 0 1139 0 1 0 99 1 0 0 0 117 12 199 1 12 164 0 317 0 0 0 99 2 4 0 14 96 2 178 1 14 164 0 278 0 0 0 100 3 0 0 7 316 139 181 0 11 155 0 303 0 0 0 100 4 0 0 7 118 41 170 1 10 198 0 583 0 0 0 100 5 0 0 0 74 0 138 1 11 168 0 30 0 0 0 100 6 0 0 0 175 52 242 0 10 229 0 2 0 0 0 100 7 14 0 0 89 1 167 0 8 148 0 21 0 0 0 100 March 31, 2026 at 06:39:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 205 174 2 3 8 0 1157 0 1 0 99 1 0 0 0 41 11 39 1 3 13 0 326 0 0 0 100 2 0 0 14 20 2 16 0 4 10 0 295 0 0 0 100 3 0 0 16 221 103 18 0 1 11 0 315 0 1 0 99 4 0 0 14 24 3 28 1 6 12 1 654 0 0 0 100 5 0 0 7 20 1 19 0 4 13 0 50 0 0 0 100 6 0 0 0 120 52 114 0 3 7 0 4 0 0 0 100 7 0 0 0 11 0 5 0 1 5 0 58 0 0 0 100 March 31, 2026 at 06:39:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2323 209 161 0 0 0 0 1053 0 1 0 99 1 0 0 0 16 2 6 0 0 2 0 294 0 0 0 100 2 0 0 14 15 2 12 0 0 0 0 267 0 0 0 100 3 0 0 7 213 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 13 3 6 1 0 3 0 561 0 0 0 100 5 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 112 52 108 0 2 0 0 0 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2316 208 161 1 0 0 0 1048 0 1 0 99 1 0 0 0 29 2 6 0 1 3 0 294 0 0 0 100 2 0 0 14 31 3 12 0 0 0 0 267 0 0 0 100 3 0 0 7 230 104 6 0 0 0 0 301 0 0 0 100 4 0 0 7 27 3 6 0 0 3 0 560 0 0 0 100 5 0 0 0 22 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 129 52 106 0 0 0 0 0 0 0 0 100 7 0 0 0 23 0 2 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:39:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 209 162 1 1 0 0 1053 0 1 0 99 1 0 0 0 26 3 18 1 0 1 0 303 0 0 0 100 2 0 0 14 7 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 215 103 6 0 1 0 0 300 0 0 0 100 4 0 0 7 19 3 18 1 0 4 0 578 0 0 0 100 5 0 0 0 15 8 0 0 0 1 0 0 0 0 0 100 6 0 0 0 40 13 34 0 2 0 0 12 0 0 0 100 7 0 0 0 92 40 86 0 1 0 0 5 0 0 0 100 March 31, 2026 at 06:39:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 175 2351 212 1449 31 126 23 1 7124 3 2 0 95 1 4 0 0 442 4 1083 18 91 19 0 6398 3 1 0 96 2 15 0 14 165 6 1178 11 75 24 0 6667 3 1 0 96 3 20 0 7 723 103 1000 8 65 9 0 6063 2 1 0 97 4 0 0 7 507 19 930 5 60 16 0 6270 2 1 0 97 5 1 0 0 437 1 807 6 39 11 0 6707 2 1 0 97 6 18 0 0 358 2 818 4 40 13 0 5685 2 1 0 98 7 24 0 0 304 33 747 8 40 23 0 6641 2 1 0 97 March 31, 2026 at 06:39:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2310 205 116 1 2 0 0 1040 0 1 0 99 1 0 0 0 16 4 12 0 0 1 0 299 0 0 0 100 2 0 0 14 13 2 10 0 0 0 0 266 0 0 0 100 3 0 0 2 226 109 18 0 0 0 0 310 0 0 0 100 4 0 0 7 112 53 107 1 1 1 0 573 0 0 0 100 5 0 0 0 35 1 28 0 1 0 0 10 0 0 0 100 6 0 0 0 18 3 10 0 2 0 0 0 0 0 0 100 7 0 0 0 9 2 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 651 0 7 2327 202 177 2 5 3 7 1947 1 1 0 98 1 7 0 0 76 21 67 2 4 7 3 395 0 0 0 100 2 2643 0 128 33 1 63 2 3 2 15 707 0 1 0 99 3 109 0 7 269 108 91 0 8 14 18 486 0 0 0 100 4 41 0 9 118 37 126 0 9 15 7 667 0 0 0 100 5 44 0 0 39 1 43 0 5 3 4 107 0 0 0 100 6 20 0 0 45 1 42 0 4 3 4 74 0 0 0 100 7 7 0 0 32 1 24 0 3 3 5 59 0 0 0 100 March 31, 2026 at 06:39:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 146 1 0 0 0 1126 0 1 0 99 1 0 0 0 114 53 108 0 0 2 0 295 0 0 0 100 2 0 0 14 14 2 12 0 0 0 0 267 0 0 0 100 3 0 0 7 220 107 12 0 0 0 0 305 0 0 0 100 4 0 0 7 13 4 8 0 0 2 0 560 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 18 2 12 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 202 146 0 0 0 0 1125 0 1 0 99 1 0 0 0 126 55 120 1 0 3 0 316 0 0 0 100 2 0 0 14 14 2 10 0 0 1 0 266 0 0 0 100 3 0 0 7 226 109 20 0 0 1 0 631 0 0 0 100 4 0 0 7 23 4 23 1 0 2 0 570 0 0 0 100 5 0 0 0 19 8 8 0 0 1 0 3 0 0 0 100 6 0 0 0 22 2 18 0 0 1 0 12 0 0 0 100 7 0 0 0 11 1 4 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:39:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 203 375 1 24 273 0 1124 0 1 0 99 1 0 0 0 201 53 300 0 16 298 0 295 0 0 0 100 2 0 0 14 109 1 215 0 23 195 0 266 0 0 0 100 3 0 0 7 322 145 202 0 19 293 0 300 0 0 0 100 4 0 0 7 131 45 202 1 21 329 0 558 0 1 0 99 5 0 0 0 101 5 194 0 28 224 0 5 0 0 0 100 6 0 0 0 102 1 192 0 17 259 0 10 0 0 0 100 7 0 0 0 96 1 197 0 16 260 0 2 0 0 0 100 March 31, 2026 at 06:39:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 263 0 49 2309 203 222 5 14 1 0 2267 1 1 0 98 1 43 0 0 76 13 120 2 19 6 2 1280 1 0 0 98 2 261 0 14 165 28 325 4 22 2 3 1975 0 0 0 99 3 223 0 7 236 104 42 1 6 1 2 1961 1 0 0 98 4 6 0 7 94 20 150 2 17 2 0 2092 0 0 0 99 5 2 0 0 91 6 189 10 25 0 0 1293 1 0 0 99 6 0 0 0 98 2 186 2 15 1 0 1263 0 0 0 100 7 210 0 0 72 1 184 2 18 4 1 1288 0 0 0 100 March 31, 2026 at 06:39:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 202 142 1 0 0 0 1142 0 1 0 99 1 0 0 0 15 2 8 0 0 3 0 297 0 0 0 100 2 4 0 14 27 9 20 0 0 0 0 282 0 0 0 100 3 0 0 7 216 103 8 0 1 0 0 302 0 0 0 100 4 0 0 7 116 54 110 0 1 3 0 577 0 0 0 100 5 18 0 0 13 1 4 0 1 0 0 13 0 0 0 100 6 0 0 0 19 1 12 0 1 0 0 1 0 0 0 100 7 0 0 0 16 1 10 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 13 2310 202 157 0 3 12 0 1135 0 1 0 99 1 0 0 0 29 2 26 1 3 5 0 329 0 0 0 100 2 0 0 14 29 8 38 0 5 13 0 308 0 0 0 100 3 0 0 2 226 104 29 0 2 3 1 464 0 0 0 100 4 0 0 7 120 53 124 1 3 14 0 569 0 0 0 100 5 0 0 7 16 1 17 0 6 12 0 11 0 0 0 100 6 0 0 14 22 1 20 1 3 9 0 4 0 0 0 100 7 0 0 0 15 0 9 0 1 4 0 16 0 0 0 100 March 31, 2026 at 06:39:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 170 1 1 0 0 1046 0 1 0 99 1 0 0 0 27 5 26 0 0 0 0 314 0 0 0 100 2 0 0 14 12 2 4 0 1 0 0 267 0 0 0 100 3 0 0 7 230 111 22 0 0 0 0 315 0 0 0 100 4 0 0 7 124 55 120 1 0 4 0 578 0 0 0 100 5 0 0 0 24 11 6 0 0 0 0 0 0 0 0 100 6 0 0 7 27 3 25 0 2 0 0 12 0 0 0 100 7 0 0 0 14 1 6 0 0 1 0 2 0 0 0 100 March 31, 2026 at 06:39:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2334 207 343 1 22 180 0 1039 0 1 0 99 1 0 0 0 150 22 224 0 14 186 0 300 0 0 0 100 2 0 0 14 114 1 200 0 17 178 0 266 0 0 0 100 3 0 0 7 360 156 194 0 18 237 0 307 0 0 0 100 4 0 0 7 218 78 261 0 18 162 0 556 0 0 0 100 5 0 0 0 93 1 147 0 16 136 0 11 0 0 0 100 6 0 0 112 88 1 152 0 11 178 0 0 0 0 0 100 7 0 0 7 94 0 148 0 10 146 0 0 0 0 0 100 March 31, 2026 at 06:39:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 142 1 1 0 0 1040 0 1 0 99 1 0 0 0 113 52 106 0 0 2 0 294 0 0 0 100 2 0 0 14 7 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 228 110 20 0 0 0 0 313 0 0 0 100 4 0 0 7 12 3 6 0 0 2 0 561 0 0 0 100 5 0 0 0 11 1 4 1 0 0 0 3 0 0 0 100 6 0 0 7 18 1 12 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 161 2340 202 1259 35 126 29 0 8003 3 1 0 95 1 1 0 0 310 21 989 24 91 21 0 7228 3 1 0 96 2 1 0 14 304 32 1479 25 88 29 0 5356 2 1 0 97 3 33 0 7 677 116 1274 15 71 29 0 5552 3 1 0 96 4 1 0 7 253 2 871 15 57 20 0 7224 3 1 0 96 5 1 0 0 217 2 970 6 45 17 0 6940 2 1 0 97 6 52 0 0 366 1 826 8 38 11 0 5494 2 1 0 97 7 18 0 0 295 1 672 6 33 17 0 5355 2 0 0 98 March 31, 2026 at 06:39:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2311 203 144 1 0 0 0 1040 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 2 0 0 14 117 57 114 0 0 0 0 274 0 0 0 100 3 0 0 4 217 103 10 0 0 0 0 299 0 0 0 100 4 0 0 7 14 5 9 1 0 0 0 570 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 10 0 0 0 100 6 0 0 0 17 2 10 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 202 140 1 0 1 0 1038 0 1 0 99 1 0 0 0 24 5 20 0 0 2 0 320 0 0 0 100 2 0 0 14 123 59 118 0 0 1 0 279 0 0 0 100 3 0 0 7 210 102 2 0 0 1 0 300 0 0 0 100 4 0 0 7 20 4 20 0 0 2 0 575 0 0 0 100 5 0 0 0 20 10 6 0 0 1 0 1 0 0 0 100 6 0 0 0 23 2 22 1 1 0 0 14 0 0 0 100 7 0 0 0 11 1 2 0 0 2 0 0 0 0 0 100 March 31, 2026 at 06:39:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 203 343 0 26 236 0 1040 0 1 0 99 1 0 0 0 87 2 169 0 18 258 0 294 0 0 0 100 2 0 0 14 208 57 311 0 15 300 0 274 0 0 0 99 3 0 0 7 334 141 216 0 20 210 0 300 0 0 0 100 4 0 0 7 133 42 193 0 18 211 0 558 0 0 0 100 5 0 0 0 87 2 173 0 21 246 0 20 0 0 0 100 6 0 0 0 96 1 186 0 20 245 0 0 0 0 0 100 7 0 0 0 88 1 177 0 21 222 0 2 0 0 0 100 March 31, 2026 at 06:39:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 7 2324 202 202 1 8 9 9 1196 0 1 0 99 1 13 0 2 45 2 37 0 6 10 5 381 0 0 0 100 2 5 0 14 152 59 144 0 3 2 3 663 0 0 0 100 3 3258 0 127 243 102 69 3 5 13 15 1564 1 1 0 98 4 99 0 7 57 5 77 0 7 21 16 699 0 0 0 100 5 26 0 0 43 2 44 0 9 10 4 81 0 0 0 100 6 45 0 0 46 1 56 0 6 1 5 104 0 0 0 100 7 7 0 0 33 0 26 0 6 2 4 64 0 0 0 100 March 31, 2026 at 06:39:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2306 202 138 1 0 0 0 1125 0 1 0 99 1 0 0 0 20 6 14 1 0 3 0 299 0 0 0 100 2 0 0 14 107 52 104 0 0 0 0 267 0 0 0 100 3 0 0 3 209 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 6 2 0 3 0 559 0 0 0 100 5 0 0 0 12 3 8 0 0 0 0 10 0 0 0 100 6 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:39:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 272 0 49 2311 202 346 6 15 1 3 2802 1 1 0 99 1 0 0 0 67 7 196 4 17 8 0 2058 1 0 0 99 2 151 0 14 162 53 365 6 15 7 3 1668 1 0 0 99 3 0 0 7 268 103 251 0 12 0 0 1560 0 0 0 100 4 242 0 9 34 3 38 1 2 2 3 2195 1 0 0 98 5 117 0 0 45 2 152 3 11 0 0 833 1 0 0 99 6 3 0 0 52 1 187 0 9 0 0 1314 0 0 0 100 7 205 0 0 56 0 224 1 16 6 0 1559 1 0 0 99 March 31, 2026 at 06:39:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 20 2304 202 142 0 1 0 0 1127 0 1 0 99 1 0 0 0 101 40 100 1 1 2 0 323 0 0 0 100 2 5 0 14 37 13 32 0 1 0 0 274 0 0 0 100 3 0 0 1 229 106 22 1 0 0 0 312 0 0 0 100 4 0 0 7 24 5 22 0 1 3 0 584 0 0 0 100 5 0 0 0 17 7 6 0 1 0 0 11 0 0 0 100 6 0 0 0 22 1 20 0 1 0 0 13 0 0 0 100 7 0 0 0 29 8 18 0 0 0 0 15 0 0 0 100 March 31, 2026 at 06:39:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2317 202 334 1 19 151 0 1162 0 1 0 99 1 0 0 8 171 48 226 0 11 172 0 296 0 1 0 99 2 0 0 14 98 7 170 0 18 162 0 285 0 0 0 100 3 0 0 14 321 135 195 0 18 159 0 315 0 0 0 100 4 0 0 7 111 36 163 0 13 170 0 645 0 0 0 99 5 0 0 0 81 3 144 0 10 151 0 82 0 0 0 100 6 0 0 0 81 1 139 0 9 148 0 13 0 0 0 100 7 0 0 0 104 8 173 0 12 127 0 36 0 0 0 100 March 31, 2026 at 06:39:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2309 204 149 1 1 0 0 1043 0 1 0 99 1 0 0 0 12 2 6 0 0 1 0 294 0 0 0 100 2 0 0 14 106 51 102 0 0 0 0 266 0 0 0 100 3 0 0 8 219 102 12 0 0 0 0 300 0 0 0 100 4 0 0 7 14 3 8 2 0 1 0 573 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 0 0 0 0 100 6 0 0 0 21 3 12 0 0 0 0 0 0 0 0 100 7 0 0 0 26 9 18 1 0 0 0 13 0 0 0 100 March 31, 2026 at 06:39:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2312 204 151 1 0 0 0 1045 0 1 0 99 1 0 0 0 32 3 8 1 0 5 0 295 0 0 0 100 2 0 0 14 122 51 102 0 0 0 0 266 0 0 0 100 3 0 0 7 241 104 20 0 0 0 0 310 0 0 0 100 4 0 0 7 30 3 6 1 0 3 0 560 0 0 0 100 5 0 0 0 28 2 8 0 0 0 0 18 0 0 0 100 6 0 0 0 34 2 12 0 0 0 0 0 0 0 0 100 7 0 0 0 36 7 14 0 0 0 0 10 0 0 0 100 March 31, 2026 at 06:39:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 146 0 0 0 0 1039 0 1 0 99 1 0 0 0 15 3 8 0 0 2 0 295 0 0 0 100 2 0 0 14 109 52 104 0 0 0 0 267 0 0 0 100 3 0 0 7 211 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 6 0 0 1 0 560 0 0 0 100 5 0 0 0 12 2 6 0 0 0 0 3 0 0 0 100 6 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 30 11 22 0 0 0 0 14 0 0 0 100 March 31, 2026 at 06:39:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 175 2329 205 1376 24 122 16 0 7287 3 2 0 96 1 9 0 0 253 7 1085 14 87 16 0 6560 3 1 0 96 2 0 0 14 426 47 1004 16 66 20 0 6792 3 1 0 96 3 37 0 7 362 105 908 15 68 21 0 7398 2 1 0 97 4 27 0 7 471 4 1164 10 46 25 0 5145 2 1 0 97 5 23 0 0 322 8 792 10 40 27 0 6385 2 1 0 97 6 0 0 0 530 2 1011 9 48 13 0 4357 2 1 0 97 7 18 0 0 385 9 683 6 36 22 0 5972 2 1 0 97 March 31, 2026 at 06:39:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2325 208 378 1 29 256 0 1044 0 1 0 99 1 0 0 0 196 52 300 0 23 240 0 304 0 0 0 100 2 0 0 14 89 2 172 0 22 242 0 266 0 0 0 100 3 0 0 4 345 146 221 0 17 256 0 300 0 0 0 100 4 0 0 7 152 46 220 1 26 267 0 571 0 0 0 100 5 0 0 0 85 2 174 0 20 284 0 11 0 0 0 100 6 0 0 0 91 2 162 0 18 194 0 0 0 0 0 100 7 0 0 0 88 2 203 0 20 269 0 2 0 0 0 100 March 31, 2026 at 06:39:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1420 0 120 2317 207 203 1 7 11 13 2042 1 1 0 98 1 124 0 0 102 23 122 0 10 13 14 445 0 0 0 100 2 1885 0 16 116 33 124 2 11 12 9 721 0 1 0 99 3 45 0 7 244 102 43 0 7 6 6 418 0 0 0 100 4 20 0 7 43 4 42 0 6 13 3 654 0 0 0 100 5 9 0 0 36 2 25 0 3 4 1 54 0 0 0 100 6 5 0 0 44 1 35 0 3 4 0 77 0 0 0 100 7 5 0 0 25 0 12 0 1 3 2 40 0 0 0 100 March 31, 2026 at 06:40:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2319 208 119 2 0 0 0 27 0 0 0 100 1 0 0 0 121 54 148 1 2 2 0 1423 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 216 102 10 0 0 0 0 300 0 0 0 100 4 0 0 7 13 3 8 1 0 0 0 565 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 0 0 0 0 100 6 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2319 209 128 0 0 0 0 332 0 0 0 99 1 0 0 0 119 53 140 3 0 4 0 1429 0 0 0 100 2 1 0 14 8 1 6 0 0 0 0 312 0 0 0 100 3 0 0 7 218 103 12 0 0 0 0 301 0 0 0 100 4 0 0 7 13 4 8 0 0 2 0 564 0 0 0 100 5 0 0 0 12 2 8 0 0 0 0 2 0 0 0 100 6 0 0 0 18 2 12 0 0 0 0 1 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:40:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 110 0 0 0 0 0 0 0 0 100 1 0 0 0 122 53 152 1 0 4 0 1444 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 22 5 18 1 0 1 0 574 0 0 0 100 5 0 0 0 26 12 12 0 0 0 0 5 0 0 0 100 6 0 0 0 20 1 18 0 0 0 0 9 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 63 0 49 2311 202 271 5 16 2 0 1710 1 1 0 98 1 473 0 0 205 48 476 1 23 11 0 3198 1 1 0 98 2 100 0 14 77 2 215 4 19 4 1 1261 1 0 0 98 3 230 0 7 266 107 114 1 10 1 1 1521 1 0 0 99 4 0 0 7 55 2 198 3 15 5 0 2043 1 0 0 99 5 1 0 0 73 9 143 0 13 6 0 1505 0 0 0 99 6 197 0 0 72 1 166 3 15 2 1 1226 1 0 0 99 7 0 0 0 42 0 125 0 6 0 0 1221 0 0 0 100 March 31, 2026 at 06:40:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2310 204 112 0 2 0 0 8 0 0 0 100 1 0 0 0 48 14 66 1 0 2 0 1443 0 0 0 100 2 5 0 14 9 1 6 0 0 0 0 276 0 0 0 100 3 0 0 2 317 151 114 0 0 0 0 312 0 0 0 100 4 0 0 7 15 4 9 0 1 0 0 575 0 0 0 100 5 0 0 0 14 2 10 0 1 0 0 3 0 0 0 100 6 17 0 0 20 2 12 0 0 0 0 9 0 0 0 100 7 0 0 0 11 1 6 0 1 0 0 4 0 0 0 100 March 31, 2026 at 06:40:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2311 201 127 0 7 10 0 23 0 1 0 99 1 0 0 0 49 13 77 0 6 16 0 1478 0 0 0 100 2 1 0 14 18 1 25 2 6 14 0 369 0 0 0 100 3 0 0 7 319 152 111 0 3 8 0 324 0 0 0 100 4 0 0 14 23 3 18 1 2 11 0 569 0 0 0 100 5 0 0 9 25 3 22 1 1 4 0 27 0 1 0 99 6 0 0 0 27 1 26 0 2 3 0 73 0 0 0 100 7 0 0 9 15 1 11 0 6 10 0 1 0 0 0 100 March 31, 2026 at 06:40:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 203 123 0 1 0 0 4 0 0 0 99 1 0 0 0 36 12 56 1 0 2 0 1347 0 0 0 100 2 0 0 14 9 2 4 0 0 0 0 267 0 0 0 100 3 0 0 7 315 151 110 0 0 0 0 300 0 0 0 100 4 0 0 7 13 3 6 1 0 2 0 564 0 0 0 100 5 0 0 0 12 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 19 2 12 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 4 0 1 0 0 2 0 0 0 100 March 31, 2026 at 06:40:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2312 204 123 0 0 1 0 3 0 1 0 99 1 0 0 0 60 12 64 2 1 3 0 1353 0 0 0 100 2 0 0 14 24 2 2 0 0 1 0 265 0 0 0 100 3 0 0 7 329 151 108 0 0 1 0 300 0 0 0 100 4 0 0 7 35 4 18 0 0 4 0 574 0 0 0 100 5 0 0 0 33 8 4 0 0 1 0 0 0 0 0 100 6 0 0 0 38 2 18 0 0 1 0 12 0 0 0 100 7 0 0 0 27 1 4 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:40:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 13 2308 203 306 0 21 159 0 0 0 1 0 99 1 0 0 0 101 10 197 0 10 114 0 1339 0 0 0 99 2 0 0 14 90 1 177 0 13 149 0 266 0 0 0 100 3 0 0 1 405 193 279 0 16 158 0 300 0 0 0 100 4 0 0 7 134 47 167 0 12 190 0 564 0 0 0 100 5 0 0 0 75 2 140 0 10 138 0 0 0 0 0 100 6 0 0 0 91 1 163 0 13 158 0 0 0 0 0 100 7 0 0 0 89 1 171 0 17 130 0 2 0 0 0 100 March 31, 2026 at 06:40:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2320 207 287 3 13 4 0 1007 1 1 0 99 1 0 0 0 134 15 254 2 10 6 0 1892 1 0 0 99 2 0 0 14 98 1 180 1 12 2 0 1215 0 0 0 99 3 0 0 7 359 151 190 0 8 7 0 1307 0 0 0 99 4 0 0 7 63 3 107 0 4 1 0 1624 0 0 0 99 5 0 0 0 48 2 77 1 4 0 0 1196 0 0 0 100 6 0 0 0 109 1 199 2 9 1 0 673 0 0 0 100 7 0 0 0 55 0 98 1 8 4 0 598 0 0 0 99 March 31, 2026 at 06:40:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 143 2324 202 1072 25 113 21 0 5729 3 1 0 96 1 14 0 0 317 3 886 19 85 17 0 6786 2 1 0 97 2 2 0 14 356 2 1017 19 65 9 0 5119 2 1 0 97 3 0 0 4 306 105 1149 17 69 16 0 5368 2 1 0 97 4 0 0 7 401 5 771 9 60 13 0 5385 2 1 0 97 5 0 0 0 312 4 627 6 41 10 0 6008 2 0 0 98 6 1 0 0 152 51 858 10 44 8 0 5982 2 1 0 97 7 0 0 0 84 2 669 8 40 5 0 5616 2 1 0 97 March 31, 2026 at 06:40:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 112 0 0 0 0 5 0 0 0 100 1 0 0 0 16 3 40 1 1 2 0 1337 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 213 103 6 0 0 0 0 311 0 0 0 100 4 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 5 0 0 0 13 3 6 1 0 0 0 302 0 0 0 100 6 0 0 0 129 57 124 0 0 0 0 10 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:40:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 110 0 0 1 0 0 0 0 0 100 1 0 0 0 25 4 50 2 0 0 0 1341 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 216 102 10 0 0 0 0 310 0 0 0 100 4 0 0 7 15 2 16 0 0 0 0 279 0 0 0 100 5 0 0 0 17 8 6 0 0 1 0 300 0 0 0 100 6 0 0 0 130 56 128 0 0 0 0 18 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 203 369 0 30 258 0 3 0 1 0 99 1 0 0 0 115 5 236 1 16 230 0 1335 0 1 0 99 2 0 0 14 103 1 211 0 28 219 0 266 0 0 0 100 3 0 0 7 350 152 209 0 17 225 0 310 0 0 0 100 4 0 0 7 153 53 220 0 24 249 0 264 0 1 0 99 5 0 0 0 101 3 194 0 15 222 0 306 0 0 0 100 6 0 0 0 206 55 296 0 18 240 0 5 0 0 0 100 7 0 0 0 86 1 170 0 20 263 0 0 0 0 0 100 March 31, 2026 at 06:40:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 112 0 0 0 0 4 0 0 0 100 1 0 0 0 15 3 38 1 0 1 0 1333 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 212 102 6 0 0 0 0 305 0 0 0 100 4 0 0 7 23 7 18 1 0 0 0 268 0 0 0 100 5 0 0 0 14 4 8 0 0 0 0 327 0 0 0 100 6 0 0 0 121 53 116 0 0 0 0 323 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 7 2309 204 129 0 3 4 2 32 0 0 0 99 1 1879 0 0 23 4 58 2 4 7 4 1599 0 1 0 99 2 264 0 14 16 1 28 0 5 3 1 339 0 0 0 100 3 18 0 7 236 103 64 0 9 6 5 478 0 0 0 100 4 5 0 7 39 10 54 0 5 7 3 361 0 0 0 100 5 1 0 0 17 3 14 1 3 5 0 294 0 0 0 100 6 1 0 0 123 51 124 0 2 3 1 21 0 0 0 100 7 0 0 0 12 1 9 0 1 2 0 2 0 0 0 100 March 31, 2026 at 06:40:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 3 2323 201 134 0 3 1 5 45 0 0 0 100 1 3 0 0 34 3 44 1 1 2 0 1458 0 0 0 100 2 1137 0 128 18 2 38 1 0 2 12 1195 1 0 0 99 3 91 0 3 245 103 46 0 4 4 6 402 0 0 0 100 4 19 0 10 46 8 42 0 4 4 7 356 0 0 0 100 5 14 0 0 33 3 23 0 3 3 3 367 0 0 0 100 6 22 0 0 137 52 124 0 1 0 2 43 0 0 0 100 7 25 0 0 33 1 30 0 1 0 7 77 0 0 0 100 March 31, 2026 at 06:40:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2302 201 106 0 0 0 0 0 0 0 0 100 1 0 0 0 23 6 42 2 1 4 0 1423 0 0 0 100 2 0 0 14 15 2 12 0 1 1 0 282 0 0 0 100 3 0 0 7 212 102 6 0 0 1 0 320 0 0 0 100 4 0 0 7 28 7 26 0 0 1 0 284 0 0 0 100 5 0 0 0 22 10 10 0 2 4 0 301 0 0 0 100 6 0 0 0 120 52 114 0 1 1 0 6 0 0 0 100 7 0 0 0 11 1 4 0 1 1 0 0 0 0 0 100 March 31, 2026 at 06:40:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 204 128 0 2 0 0 4 0 0 0 100 1 0 0 0 16 3 40 1 0 5 0 1416 0 0 0 100 2 0 0 14 7 1 4 0 0 1 0 266 0 0 0 100 3 0 0 7 219 102 16 0 0 0 0 315 0 0 0 100 4 0 0 7 20 5 14 2 0 0 0 586 0 0 0 100 5 0 0 0 19 6 14 0 0 3 0 299 0 0 0 100 6 0 0 0 120 52 114 0 1 0 0 7 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 116 0 0 0 0 3 0 0 0 100 1 0 0 0 15 3 38 1 0 3 0 1417 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 216 102 10 0 0 0 0 300 0 0 0 100 4 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 5 0 0 0 13 3 6 1 0 3 0 299 0 0 0 100 6 0 0 0 117 55 112 0 0 0 0 7 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:40:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 112 0 0 0 0 0 0 0 0 100 1 19 0 0 16 4 40 0 0 2 0 1417 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 19 0 7 214 103 8 0 0 0 0 325 0 0 0 100 4 0 0 7 9 2 4 0 0 0 0 259 0 0 0 100 5 0 0 0 12 3 6 0 0 4 0 301 0 0 0 100 6 0 0 0 120 57 114 0 0 0 0 8 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 116 0 0 0 0 0 0 0 0 100 1 0 0 0 17 3 38 2 0 2 0 1414 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 217 103 10 0 0 0 0 301 0 0 0 100 4 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 5 0 0 0 12 3 6 0 0 4 0 300 0 0 0 100 6 0 0 0 121 57 114 0 0 0 0 8 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:40:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 116 0 0 0 0 0 0 0 0 100 1 0 0 0 19 3 46 1 0 8 0 1425 0 0 0 100 2 0 0 14 12 1 14 0 0 0 0 279 0 0 0 100 3 0 0 7 217 102 12 0 0 0 0 315 0 0 0 100 4 0 0 7 32 8 30 2 0 0 0 283 0 0 0 100 5 0 0 0 18 9 6 0 0 6 0 300 0 0 0 100 6 0 0 0 113 53 108 0 0 0 0 323 0 0 0 100 7 0 0 0 11 1 6 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 204 130 0 1 1 0 1 0 0 0 100 1 0 0 0 18 4 42 1 1 2 0 1413 0 0 0 100 2 0 0 14 9 2 6 0 0 1 0 266 0 0 0 100 3 0 0 7 214 103 8 0 1 0 0 310 0 0 0 100 4 0 0 7 20 7 16 0 1 1 0 264 0 0 0 100 5 0 0 0 16 4 12 1 0 3 0 298 0 0 0 100 6 0 0 0 111 52 106 0 0 1 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:40:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 118 0 0 0 0 4 0 0 0 100 1 0 0 0 12 2 36 0 0 2 0 1411 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 216 103 8 0 0 0 0 300 0 0 0 100 4 0 0 7 23 8 18 0 1 0 0 267 0 0 0 100 5 0 0 0 12 3 6 0 0 2 0 300 0 0 0 100 6 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 119 0 21 2306 201 189 2 11 4 1 726 0 0 0 99 1 278 0 0 49 3 192 3 10 6 1 2424 0 0 0 99 2 0 0 14 38 2 99 3 11 1 0 847 0 0 0 100 3 229 0 7 249 105 82 3 10 2 0 1559 1 0 0 99 4 292 0 7 39 10 44 1 2 2 3 1236 1 0 0 99 5 0 0 0 39 4 67 2 10 3 0 864 0 0 0 100 6 144 0 0 125 51 181 1 11 3 0 685 0 0 0 100 7 0 0 0 24 1 39 2 9 1 0 394 1 0 0 99 March 31, 2026 at 06:40:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 45 2323 211 183 1 6 0 0 737 0 0 0 99 1 0 0 0 33 2 117 2 5 1 0 2193 0 0 0 99 2 5 0 14 36 2 48 2 6 1 0 842 0 0 0 100 3 0 0 3 237 104 54 3 7 1 0 1184 0 0 0 100 4 8 0 7 20 2 19 1 4 1 0 1024 0 0 0 99 5 14 0 0 36 2 57 0 5 0 0 704 0 0 0 100 6 0 0 0 128 52 153 2 5 1 0 940 0 0 0 100 7 1 0 0 30 7 19 0 0 0 0 61 1 0 0 99 March 31, 2026 at 06:40:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 203 124 0 0 1 0 4 0 0 0 100 1 0 0 0 18 3 42 1 0 2 0 1435 0 0 0 100 2 0 0 14 18 4 14 0 0 1 0 283 0 0 0 100 3 0 0 7 212 103 4 0 0 1 0 300 0 0 0 100 4 0 0 7 21 3 20 0 0 1 0 276 0 0 0 100 5 0 0 0 24 10 10 0 0 1 0 0 0 0 0 100 6 0 0 0 112 53 106 0 1 2 0 304 0 0 0 100 7 0 0 0 21 6 14 0 0 1 0 8 0 0 0 100 March 31, 2026 at 06:40:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 267 0 17 184 0 0 0 1 0 99 1 0 0 0 77 2 166 0 11 172 0 1424 0 0 0 99 2 0 0 14 66 1 124 0 17 100 0 266 0 0 0 100 3 0 0 7 311 136 161 0 16 142 0 300 0 0 0 100 4 0 0 7 110 34 154 0 12 142 0 264 0 0 0 100 5 0 0 0 66 2 117 0 12 108 0 11 0 0 0 100 6 0 0 0 170 52 231 1 16 173 0 298 0 0 0 100 7 0 0 0 86 8 149 0 16 141 0 9 0 0 0 100 March 31, 2026 at 06:40:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 116 0 0 0 0 3 0 0 0 100 1 0 0 0 13 2 34 1 0 0 0 1424 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 300 0 0 0 100 4 0 0 7 9 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 110 52 104 0 0 2 0 303 0 0 0 100 7 0 0 0 27 10 20 0 0 0 0 12 0 0 0 100 March 31, 2026 at 06:40:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2312 202 153 0 8 13 0 24 0 1 0 99 1 0 0 0 26 3 47 2 5 10 0 1340 0 0 0 100 2 0 0 14 18 2 12 0 2 3 0 344 0 0 0 100 3 0 0 7 239 109 40 1 8 13 0 345 0 0 0 100 4 0 0 7 21 3 16 1 2 8 0 272 0 0 0 100 5 0 0 0 19 3 12 0 1 2 0 22 0 0 0 100 6 0 0 8 117 52 115 0 2 14 0 298 0 1 0 99 7 0 0 7 31 5 41 0 6 8 1 115 0 0 0 100 March 31, 2026 at 06:40:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 201 121 0 2 0 0 0 0 0 0 100 1 0 0 0 17 2 40 1 2 2 0 1336 0 0 0 100 2 0 0 14 7 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 234 113 26 0 0 0 0 313 0 0 0 100 4 0 0 7 10 2 4 0 0 0 0 259 0 0 0 100 5 0 0 0 13 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 114 53 106 0 0 1 0 301 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:40:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2305 201 121 0 0 0 0 0 0 0 0 100 1 0 0 0 34 2 46 0 1 2 0 1347 0 0 0 100 2 0 0 14 28 1 14 0 0 0 0 279 0 0 0 100 3 0 0 7 240 109 16 0 0 0 0 306 0 0 0 100 4 0 0 7 36 4 18 0 0 0 0 276 0 0 0 100 5 0 0 0 31 7 4 0 0 0 0 0 0 0 0 100 6 0 0 0 127 52 104 1 0 4 0 304 0 0 0 100 7 0 0 0 31 3 10 0 0 0 0 7 0 0 0 100 March 31, 2026 at 06:40:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2310 202 118 0 0 0 0 2 0 0 0 100 1 0 0 0 24 5 46 1 0 4 0 1341 0 0 0 100 2 0 0 14 14 2 14 0 1 1 0 266 0 0 0 100 3 0 0 7 225 108 20 0 1 1 0 310 0 0 0 100 4 0 0 7 12 2 8 0 0 0 0 261 0 0 0 100 5 0 0 0 12 2 6 0 0 0 0 1 0 0 0 100 6 0 0 0 114 52 110 0 0 3 0 297 0 0 0 100 7 0 0 0 10 1 164 0 0 0 0 331 0 0 0 100 March 31, 2026 at 06:40:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 175 2336 205 1253 32 133 12 0 7030 3 1 0 96 1 2 0 0 574 35 1191 24 90 21 0 7382 3 1 0 96 2 18 0 14 320 4 1101 26 83 8 0 5479 3 1 0 96 3 17 0 7 513 112 922 11 58 14 0 7360 3 1 0 96 4 45 0 7 289 3 881 12 49 5 0 6521 2 1 0 97 5 1 0 0 372 3 833 8 41 19 1 5707 2 1 0 97 6 23 0 0 372 13 900 12 48 20 0 7425 2 1 0 97 7 4 0 0 443 8 934 9 45 15 0 4984 3 1 0 96 March 31, 2026 at 06:40:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 114 0 0 0 0 0 0 0 0 100 1 0 0 0 115 53 138 1 0 7 0 1336 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 225 109 18 0 0 0 0 311 0 0 0 100 4 0 0 7 13 3 8 1 0 0 0 270 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 6 0 0 2 0 308 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3289 0 121 2306 201 163 3 7 10 16 1250 1 2 0 97 1 97 0 0 90 8 130 0 9 17 11 1602 0 0 0 99 2 48 0 15 50 5 53 0 9 11 4 403 0 0 0 100 3 27 0 7 344 147 154 0 12 11 6 437 0 0 0 100 4 8 0 7 40 2 34 0 3 12 4 333 0 0 0 100 5 8 0 0 36 2 37 0 5 3 4 76 0 0 0 100 6 17 0 0 39 2 30 1 3 3 2 358 0 0 0 100 7 20 0 0 44 6 35 0 2 1 2 68 0 0 0 100 March 31, 2026 at 06:40:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 120 0 0 1 0 0 0 0 0 100 1 0 0 0 18 3 42 1 0 3 0 1429 0 0 0 100 2 0 0 14 18 4 14 0 0 1 0 283 0 0 0 100 3 0 0 7 257 123 50 0 0 1 0 310 0 0 0 100 4 0 0 7 94 38 96 0 1 1 0 292 0 0 0 100 5 0 0 0 17 8 4 0 0 1 0 0 0 0 0 100 6 0 0 0 12 3 6 0 1 1 0 301 0 0 0 100 7 0 0 0 11 1 4 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:40:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 201 350 0 22 285 0 0 0 1 0 99 1 0 0 0 105 7 219 2 20 272 0 1423 0 1 0 99 2 0 0 14 84 1 165 0 16 217 0 266 0 0 0 100 3 0 0 7 316 147 184 0 16 236 0 623 0 0 0 100 4 0 0 7 239 94 316 0 15 215 0 270 0 1 0 99 5 0 0 0 82 2 168 0 21 246 0 5 0 0 0 100 6 0 0 0 101 2 196 0 9 250 0 296 0 0 0 100 7 0 0 0 79 1 161 0 17 155 0 2 0 0 0 100 March 31, 2026 at 06:40:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 118 0 0 0 0 0 0 0 0 100 1 0 0 0 21 6 46 1 0 6 0 1424 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 215 102 8 0 0 0 0 300 0 0 0 100 4 0 0 7 112 52 106 2 0 0 0 269 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 301 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:40:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 316 0 49 2306 201 358 3 19 4 0 1639 0 1 0 99 1 1 0 0 61 4 181 1 11 3 0 2887 1 0 0 99 2 4 0 14 59 1 172 1 20 2 0 1773 0 0 0 99 3 21 0 7 263 103 217 2 13 2 0 1544 1 0 0 99 4 16 0 7 175 58 223 7 14 5 0 1237 1 0 0 99 5 184 0 0 39 3 68 2 6 0 1 1840 2 0 0 98 6 576 0 0 54 2 128 1 12 5 2 1814 1 0 0 99 7 8 0 0 59 1 169 1 21 11 0 1422 0 0 0 99 March 31, 2026 at 06:40:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 114 0 0 0 0 0 0 0 0 100 1 0 0 0 15 2 36 1 1 2 0 1423 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 301 0 0 0 100 4 0 0 7 128 61 124 0 0 0 0 271 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 3 0 0 0 100 6 0 0 0 11 2 4 0 0 1 0 301 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:40:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1212 0 217 2387 204 650 83 50 119 5 2285 3 2 0 95 1 6768 0 11 198 2 323 13 48 138 27 2977 6 2 0 92 2 2985 0 21 236 1 364 24 46 230 20 2739 2 1 0 96 3 2050 0 14 404 106 363 5 36 205 12 2676 5 1 0 94 4 1919 0 7 224 20 278 9 34 225 16 2078 5 1 0 94 5 811 0 246 204 17 346 13 46 258 7 1557 4 1 0 95 6 1240 0 0 269 38 403 48 39 197 12 1651 4 1 0 95 7 693 0 0 185 3 302 19 39 74 8 1553 4 0 0 95 March 31, 2026 at 06:40:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 201 336 0 15 181 0 0 0 1 0 99 1 3 0 0 99 4 198 1 14 172 0 1421 0 1 0 99 2 0 0 21 82 1 155 0 11 137 0 266 0 0 0 100 3 0 0 7 324 145 168 0 8 124 0 300 0 0 0 100 4 3 0 7 132 49 183 0 12 173 0 267 0 0 0 100 5 46 0 0 88 8 146 0 11 97 0 20 0 0 0 100 6 0 0 2 179 52 242 0 12 123 0 296 0 0 0 100 7 0 0 0 65 0 127 0 10 156 0 0 0 0 0 100 March 31, 2026 at 06:40:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 201 117 0 0 0 0 0 0 0 0 100 1 0 0 0 15 2 36 0 0 2 0 1419 0 0 0 100 2 0 0 14 12 2 6 0 0 0 0 267 0 0 0 100 3 0 0 14 212 102 4 0 1 0 0 300 0 0 0 100 4 0 0 7 12 2 4 1 0 0 0 259 0 0 0 100 5 0 0 0 26 10 16 0 0 0 0 9 0 0 0 100 6 0 0 0 113 52 104 1 0 2 0 305 0 0 0 100 7 0 0 0 10 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 120 0 0 0 0 0 0 0 0 100 1 0 0 0 15 3 38 1 0 2 0 1422 0 0 0 100 2 0 0 14 12 3 8 0 0 0 0 270 0 0 0 100 3 0 0 7 216 103 6 0 0 0 0 301 0 0 0 100 4 0 0 7 11 2 6 0 0 0 0 262 0 0 0 100 5 0 0 0 27 10 20 0 0 0 0 31 0 0 0 100 6 0 0 0 116 52 110 0 0 3 0 302 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:40:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 27 2326 202 161 3 22 5064 9 100 0 1 0 99 1 1658 0 9 122 2 221 17 26 50 13 1855 1 2 0 97 2 66 0 43 65 3 128 3 31 85 18 519 0 0 0 99 3 17 0 23 261 104 88 1 17 35 14 489 0 0 0 100 4 18 0 15 38 2 60 0 14 3458 7 357 0 1 0 99 5 23 0 5 68 8 100 2 19 26 7 186 0 0 0 100 6 67 0 15 154 54 197 3 21 26 14 393 0 0 0 100 7 5 0 2 37 4 41 0 10 4331 0 33 0 1 0 99 March 31, 2026 at 06:40:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 49 2307 201 43 0 6 13 5 17 0 1 0 99 1 149 0 0 140 3 175 1 5 16 9 1152 0 1 0 99 2 292 0 14 34 2 31 1 2 12 2 374 0 0 0 100 3 5 0 15 237 105 32 0 1 3 0 325 0 0 0 100 4 10 0 14 37 5 39 0 1 3 1 294 0 0 0 100 5 3 0 0 34 8 15 1 1 4 1 19 0 0 0 100 6 9 0 0 131 54 127 0 3 7 2 314 0 0 0 100 7 2 0 0 22 1 16 0 2 4 2 10 0 0 0 100 March 31, 2026 at 06:40:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2357 201 77 0 2 1 0 0 0 1 0 99 1 0 0 343 68 2 84 1 1 2 0 1056 0 0 0 99 2 0 0 14 64 1 4 0 0 0 0 266 0 0 0 100 3 0 0 14 269 102 6 0 0 0 0 300 0 0 0 100 4 0 0 7 71 4 8 1 0 0 0 258 0 0 0 100 5 0 0 0 70 2 6 0 1 0 0 0 0 0 0 100 6 0 0 1 175 52 116 1 0 4 0 307 0 0 0 100 7 0 0 0 64 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2307 203 119 0 1 5 0 261 0 0 0 100 1 0 0 0 12 2 37 1 0 5 0 785 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 2 212 102 4 0 1 0 0 300 0 0 0 100 4 0 0 7 10 2 8 0 2 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 108 0 0 2 0 280 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:40:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 203 118 0 0 2 0 294 0 0 0 100 1 0 0 0 11 2 36 0 0 1 0 758 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 1 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 109 52 104 0 0 1 0 299 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2329 212 140 0 0 4 0 307 0 0 0 100 1 3 0 0 19 2 48 1 1 11 0 854 0 0 0 99 2 858 0 15 15 2 16 0 4 70 0 983 0 1 0 99 3 505 0 8 222 103 26 0 2 18 0 451 0 0 0 100 4 329 0 8 21 2 18 1 1 10 0 373 0 0 0 100 5 0 0 0 19 8 10 0 1 0 0 0 0 0 0 100 6 0 0 0 115 52 106 0 1 1 0 302 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:40:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2341 223 164 0 0 2 0 313 0 0 0 99 1 0 0 0 12 2 36 1 0 1 0 757 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 2 214 102 10 0 0 0 0 311 0 0 0 100 4 0 0 7 22 4 20 1 0 0 0 275 0 0 0 100 5 0 0 0 21 9 10 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 110 1 0 0 0 310 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2352 223 276 0 3 162 0 314 0 1 0 99 1 0 0 0 50 3 114 0 2 109 0 750 0 0 0 100 2 0 0 14 48 1 88 0 3 72 0 266 0 0 0 100 3 0 0 2 267 127 81 0 4 90 0 300 0 0 0 100 4 0 0 7 76 27 102 0 7 61 0 258 0 0 0 100 5 0 0 0 40 1 66 0 3 77 0 0 0 0 0 100 6 0 0 0 154 52 197 0 4 49 0 301 0 0 0 100 7 0 0 0 47 0 89 0 4 90 0 0 0 0 0 100 March 31, 2026 at 06:40:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2349 223 158 0 0 2 0 314 0 0 0 100 1 0 0 0 12 2 36 1 0 0 0 750 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 1 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 115 52 112 0 1 0 0 300 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 158 0 0 2 0 314 0 0 0 100 1 0 0 0 15 3 38 1 0 0 0 750 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 216 104 10 0 0 0 0 310 0 0 0 100 4 0 0 7 9 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 10 1 6 0 0 0 0 18 0 0 0 100 6 0 0 0 114 52 108 0 0 1 0 300 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 1 0 0 0 100 March 31, 2026 at 06:40:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2347 223 162 0 0 1 0 315 0 0 0 100 1 0 0 0 12 2 36 0 0 0 0 748 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 267 0 0 0 100 3 0 0 7 211 102 4 0 0 0 0 303 0 0 0 100 4 0 0 7 14 2 8 1 0 0 0 260 0 0 0 100 5 0 0 0 13 4 2 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 108 1 0 0 0 305 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 182 0 2 2 0 314 0 0 0 100 1 0 0 0 14 3 34 1 0 1 0 750 0 0 0 100 2 0 0 14 8 2 2 0 0 1 0 266 0 0 0 100 3 0 0 7 214 102 10 0 0 1 0 311 0 0 0 100 4 0 0 7 20 4 18 0 0 1 0 272 0 0 0 100 5 0 0 0 15 7 2 0 0 1 0 0 0 0 0 100 6 0 0 0 121 55 114 0 0 1 0 316 0 0 0 100 7 0 0 0 13 1 4 0 0 2 0 0 0 0 0 100 March 31, 2026 at 06:40:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2349 223 158 0 0 0 0 314 0 0 0 100 1 0 0 0 14 2 42 1 1 0 0 749 0 0 0 100 2 0 0 14 6 1 4 0 0 0 0 266 0 0 0 100 3 0 0 1 213 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 13 4 10 0 0 1 0 264 0 0 0 100 5 0 0 0 9 1 6 0 1 0 0 11 0 0 0 100 6 0 0 0 112 52 110 0 0 0 0 301 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:40:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 156 0 0 2 0 314 0 0 0 100 1 0 0 0 13 2 36 1 0 0 0 749 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 9 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 24 0 0 0 100 6 0 0 0 110 52 104 0 0 1 0 299 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 158 0 0 0 0 314 0 0 0 100 1 0 0 0 14 2 38 0 0 0 0 748 0 0 0 100 2 0 0 14 8 1 8 0 1 0 0 266 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 10 2 4 1 0 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 52 104 1 0 0 0 301 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2346 223 160 0 0 2 0 314 0 0 0 100 1 0 0 0 12 2 34 1 0 0 0 749 0 0 0 100 2 1 0 14 7 1 4 0 0 0 0 312 0 0 0 100 3 0 0 2 213 103 6 0 1 1 0 301 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 109 52 104 0 0 1 0 300 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2349 223 158 0 0 1 0 314 0 0 0 100 1 0 0 0 11 2 36 0 0 0 0 750 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 1 214 102 10 0 0 0 0 313 0 0 0 100 4 1 0 7 20 4 20 0 0 0 0 282 0 0 0 100 5 0 0 0 12 6 2 0 0 0 0 0 0 0 0 100 6 0 0 0 114 52 114 0 0 0 0 305 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2349 222 158 0 0 3 0 314 0 0 0 100 1 0 0 0 15 3 38 1 0 0 0 749 0 0 0 100 2 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 3 0 0 7 217 103 10 0 0 0 0 300 0 0 0 100 4 0 0 7 10 2 6 0 0 0 0 258 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 110 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 156 0 0 1 0 314 0 0 0 100 1 0 0 0 13 2 36 1 0 0 0 749 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 212 102 4 0 0 0 0 300 0 0 0 100 4 0 0 7 11 2 6 1 1 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 52 104 1 0 0 0 299 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2345 223 158 0 0 1 0 314 0 0 0 100 1 0 0 0 13 3 36 0 0 0 0 751 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 1 212 103 4 0 0 0 0 301 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 21 0 0 0 100 6 0 0 0 109 52 104 0 0 0 0 302 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:41:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2349 223 162 0 0 2 0 314 0 0 0 100 1 0 0 0 12 2 36 1 0 0 0 749 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 267 0 0 0 100 3 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 12 2 10 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 53 106 0 0 0 0 301 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2347 223 164 0 0 3 0 314 0 0 0 100 1 0 0 0 12 3 34 0 0 1 0 749 0 0 0 100 2 0 0 14 7 2 2 0 0 1 0 266 0 0 0 100 3 0 0 1 214 102 10 0 0 1 0 312 0 0 0 100 4 0 0 7 19 3 16 0 0 1 0 271 0 0 0 100 5 0 0 0 17 9 4 0 1 1 0 0 0 0 0 100 6 0 0 0 121 55 122 0 1 1 0 315 0 0 0 100 7 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:41:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 160 0 0 0 0 314 0 0 0 100 1 0 0 0 13 2 36 1 0 0 0 748 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 213 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 10 2 4 1 0 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 108 1 0 1 0 301 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2349 223 158 0 0 1 0 314 0 0 0 100 1 0 0 0 11 2 34 0 0 0 0 749 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 110 52 106 0 1 0 0 301 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2345 223 158 0 0 1 0 314 0 0 0 100 1 0 0 0 12 2 36 1 0 0 0 750 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 110 0 0 0 0 300 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2350 223 156 0 0 0 0 314 0 0 0 100 1 0 0 0 13 2 34 1 0 0 0 749 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 210 102 4 0 0 0 0 301 0 0 0 100 4 0 0 7 9 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 6 0 0 0 113 53 106 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 162 0 0 4 0 314 0 0 0 100 1 0 0 0 12 2 36 0 0 0 0 748 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 215 102 12 0 1 0 0 313 0 0 0 100 4 0 0 7 17 2 14 1 0 0 0 271 0 0 0 100 5 0 0 0 15 8 2 0 0 1 0 0 0 0 0 100 6 0 0 0 124 54 122 1 0 0 0 317 0 0 0 100 7 0 0 0 12 1 8 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2347 223 160 0 0 0 0 314 0 0 0 99 1 0 0 0 14 3 36 1 0 0 0 751 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 2 217 103 10 0 0 1 0 300 0 0 0 100 4 0 0 7 10 3 6 0 0 0 0 263 0 0 0 100 5 0 0 0 8 1 4 0 1 0 0 11 0 0 0 100 6 0 0 0 111 52 108 0 0 0 0 300 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2347 223 158 0 0 3 0 314 0 0 0 100 1 0 0 0 12 2 36 1 0 0 0 749 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 109 52 104 0 0 1 0 301 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2349 223 158 0 0 0 0 314 0 0 0 100 1 0 0 0 13 3 38 0 1 0 0 750 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 1 214 103 6 0 0 0 0 301 0 0 0 100 4 0 0 7 13 2 14 0 1 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 53 106 0 0 0 0 301 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:41:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2350 223 162 0 0 1 0 314 0 0 0 100 1 0 0 0 13 2 36 1 0 0 0 748 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 267 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 15 2 12 1 0 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 52 104 1 0 0 0 300 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2343 223 160 0 0 1 0 313 0 0 0 99 1 0 0 0 14 3 34 1 0 1 0 749 0 0 0 100 2 0 0 14 8 2 2 0 0 1 0 266 0 0 0 100 3 1 0 7 214 102 12 0 1 0 0 310 0 0 0 100 4 0 0 7 18 3 14 0 0 1 0 271 0 0 0 100 5 0 0 0 15 7 2 0 0 1 0 0 0 0 0 100 6 0 0 0 121 55 118 0 0 1 0 315 0 0 0 100 7 0 0 0 11 1 2 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:41:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2351 223 156 0 0 1 0 314 0 0 0 100 1 0 0 0 11 2 36 0 0 0 0 750 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 2 213 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 10 2 6 0 0 0 0 258 0 0 0 100 5 0 0 0 11 1 10 0 1 0 0 0 0 0 0 100 6 0 0 0 111 52 108 0 0 0 0 302 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2346 223 158 0 0 1 0 314 0 0 0 100 1 0 0 0 12 2 36 1 0 0 0 749 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 1 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 112 53 108 0 1 1 0 301 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 156 0 0 3 0 314 0 0 0 100 1 0 0 0 12 2 36 0 0 0 0 749 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 10 2 4 1 0 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 52 104 1 0 0 0 299 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2345 223 158 0 0 1 0 314 0 0 0 100 1 0 0 0 12 2 36 1 1 0 0 749 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 265 0 0 0 100 3 0 0 2 212 103 4 0 0 0 0 301 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 108 0 0 1 0 300 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2349 223 164 0 0 2 0 314 0 0 0 100 1 0 0 0 12 2 36 1 0 0 0 748 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 2 214 102 10 0 0 0 0 311 0 0 0 100 4 0 0 7 15 2 14 0 0 0 0 273 0 0 0 100 5 0 0 0 12 6 2 0 0 0 0 0 0 0 0 100 6 0 0 0 123 54 126 0 0 0 0 317 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2350 224 162 1 0 2 0 314 0 0 0 100 1 0 0 0 15 4 40 0 1 1 0 751 0 0 0 100 2 0 0 14 7 2 4 0 1 0 0 266 0 0 0 100 3 0 0 1 216 104 10 0 1 0 0 300 0 0 0 100 4 0 0 7 10 3 6 0 0 1 0 258 0 0 0 100 5 0 0 0 9 2 4 0 0 1 0 0 0 0 0 100 6 0 0 0 116 54 114 0 1 2 0 301 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 156 0 0 0 0 314 0 0 0 100 1 0 0 0 13 2 36 1 0 0 0 749 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 10 2 4 1 0 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 115 52 108 1 0 2 0 299 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2349 223 156 0 0 0 0 314 0 0 0 100 1 0 0 0 13 3 38 0 0 0 0 749 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 2 215 104 10 0 0 0 0 310 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 11 2 8 0 0 0 0 39 0 0 0 100 6 0 0 0 113 52 108 0 0 0 0 299 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:41:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2341 223 158 0 0 0 0 313 0 0 0 99 1 0 0 0 12 2 36 1 0 0 0 750 0 0 0 100 2 0 0 14 9 3 6 0 0 0 0 267 0 0 0 100 3 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 109 52 104 0 0 0 0 302 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2349 223 160 0 0 3 0 314 0 0 0 100 1 0 0 0 13 3 34 1 0 2 0 749 0 0 0 100 2 0 0 14 9 3 4 0 0 1 0 266 0 0 0 100 3 0 0 1 214 102 10 0 0 1 0 311 0 0 0 100 4 0 0 7 15 3 14 0 0 1 0 268 0 0 0 100 5 0 0 0 15 8 2 0 0 1 0 0 0 0 0 100 6 0 0 0 126 55 124 0 1 1 0 318 0 0 0 100 7 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:41:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2350 223 156 0 0 1 0 314 0 0 0 100 1 0 0 0 12 2 36 0 0 0 0 748 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 213 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 6 1 0 0 0 259 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 117 52 112 1 0 1 0 300 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 154 0 0 2 0 314 0 0 0 100 1 0 0 0 13 2 36 1 0 1 0 749 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 9 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 110 52 104 0 0 0 0 299 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2344 223 160 0 0 1 0 314 0 0 0 100 1 0 0 0 12 2 36 1 0 0 0 749 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 112 52 106 0 0 0 0 302 0 0 0 100 7 0 0 0 8 1 4 0 1 0 0 2 0 0 0 100 March 31, 2026 at 06:41:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2349 223 166 0 1 2 0 314 0 0 0 100 1 0 0 0 11 2 36 0 1 0 0 750 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 1 212 103 4 0 0 0 0 301 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 112 53 106 0 0 0 0 300 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2346 223 156 0 0 0 0 314 0 0 0 100 1 0 0 0 13 2 36 1 0 1 0 749 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 214 102 10 0 0 0 0 310 0 0 0 100 4 0 0 7 17 2 14 1 0 0 0 271 0 0 0 100 5 0 0 0 15 6 4 0 1 0 0 0 0 0 0 100 6 0 0 0 119 53 118 1 0 0 0 318 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2354 224 158 0 0 3 0 316 0 0 0 100 1 0 0 0 20 4 46 1 1 0 0 755 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 213 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 10 2 6 0 0 0 0 259 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 2 0 0 0 100 6 0 0 0 112 52 108 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2346 223 156 0 0 1 0 314 0 0 0 100 1 0 0 0 16 2 42 0 0 1 0 750 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 113 54 108 0 0 0 0 303 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2345 223 154 0 0 0 0 314 0 0 0 100 1 0 0 0 14 3 38 1 0 0 0 749 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 2 212 103 4 0 0 0 0 301 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 53 106 0 0 0 0 300 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:41:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2350 223 160 0 0 1 0 314 0 0 0 100 1 0 0 0 14 2 38 0 0 0 0 749 0 0 0 100 2 0 0 14 14 3 14 0 1 0 0 267 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 10 2 4 1 0 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 52 104 1 0 1 0 300 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2350 223 162 0 0 1 0 314 0 0 0 100 1 0 0 0 15 3 34 2 0 2 0 750 0 0 0 100 2 0 0 14 15 3 10 0 0 1 0 266 0 0 0 100 3 0 0 7 214 102 10 0 0 1 0 312 0 0 0 100 4 0 0 7 21 3 20 0 0 1 0 272 0 0 0 100 5 0 0 0 15 7 2 0 0 1 0 0 0 0 0 100 6 0 0 0 122 55 118 0 1 0 0 316 0 0 0 100 7 0 0 0 11 1 4 0 0 1 0 0 0 0 0 100 March 31, 2026 at 06:41:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2343 223 156 0 0 2 0 313 0 0 0 99 1 0 0 0 11 2 36 0 0 0 0 749 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 2 213 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 52 108 0 0 0 0 302 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2349 223 154 0 0 3 0 314 0 0 0 100 1 0 0 0 12 2 36 1 0 0 0 749 0 0 0 100 2 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 3 0 0 2 214 102 10 0 1 0 0 300 0 0 0 100 4 0 0 7 10 3 6 0 0 0 0 259 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 156 0 0 4 0 314 0 0 0 100 1 0 0 0 13 2 36 1 0 0 0 748 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 214 102 10 0 0 2 0 300 0 0 0 100 4 0 0 7 10 2 4 1 0 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 52 104 1 0 0 0 300 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2348 223 156 0 1 0 0 314 0 0 0 100 1 0 0 0 12 2 34 0 0 0 0 749 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 212 103 4 0 0 0 0 301 0 0 0 100 4 0 0 7 9 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 111 52 104 0 0 0 0 299 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2344 223 156 0 0 2 0 314 0 0 0 100 1 0 0 0 13 2 36 1 0 0 0 750 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 2 216 102 12 1 0 0 0 311 0 0 0 100 4 0 0 7 22 4 24 0 1 0 0 276 0 0 0 100 5 0 0 0 15 8 2 0 0 0 0 0 0 0 0 100 6 0 0 0 112 52 110 0 0 0 0 312 0 0 0 100 7 0 0 0 10 1 6 0 1 0 0 2 0 0 0 100 March 31, 2026 at 06:41:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2351 223 156 0 0 4 0 314 0 0 0 100 1 0 0 0 14 3 38 1 0 1 0 749 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 2 213 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 12 3 8 0 0 0 0 259 0 0 0 100 5 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 6 0 0 0 111 52 108 0 0 0 0 300 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2346 223 156 0 0 2 0 314 0 0 0 100 1 0 0 0 12 2 36 0 0 0 0 749 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 10 2 4 1 0 0 0 258 0 0 0 100 5 0 0 0 11 2 4 1 0 0 0 24 0 0 0 100 6 0 0 0 111 52 104 1 0 0 0 300 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2350 223 154 0 0 0 0 314 0 0 0 100 1 0 0 0 14 3 38 1 1 0 0 751 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 4 211 103 4 0 0 0 0 301 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 13 4 6 0 0 0 0 21 0 0 0 100 6 0 0 0 110 52 106 0 1 0 0 299 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:41:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2347 223 159 0 0 2 0 314 0 0 0 100 1 0 0 0 13 2 36 1 0 0 0 749 0 0 0 100 2 0 0 14 9 3 6 0 0 0 0 267 0 0 0 100 3 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 108 0 0 1 0 300 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2345 223 156 0 0 1 0 314 0 0 0 99 1 0 0 0 12 3 34 0 0 1 0 749 0 0 0 100 2 0 0 14 9 3 4 0 0 1 0 266 0 0 0 100 3 0 0 2 214 102 10 0 0 1 0 311 0 0 0 100 4 0 0 7 24 5 24 0 0 1 0 279 0 0 0 100 5 0 0 0 18 9 4 0 1 1 0 0 0 0 0 100 6 0 0 0 114 53 112 0 1 0 0 312 0 0 0 100 7 0 0 0 10 1 2 0 0 2 0 0 0 0 0 100 March 31, 2026 at 06:41:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2349 222 156 0 0 1 0 313 0 0 0 100 1 0 0 0 12 2 36 1 0 1 0 748 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 1 213 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 9 2 4 1 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 116 52 112 1 0 1 0 300 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 204 116 0 0 0 0 294 0 0 0 100 1 0 0 0 51 21 76 0 1 1 0 769 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 9 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 114 52 108 0 0 1 0 299 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2307 203 114 0 0 1 0 294 0 0 0 100 1 0 0 0 52 22 76 1 0 0 0 770 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 2 210 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 109 52 104 0 0 2 0 300 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2307 203 118 0 0 2 0 294 0 0 0 100 1 0 0 0 52 22 76 1 1 0 0 769 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 2 212 103 4 0 0 0 0 301 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 106 0 0 2 0 301 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 March 31, 2026 at 06:41:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 203 130 0 1 3 0 294 0 0 0 100 1 0 0 0 51 22 76 0 0 0 0 768 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 1 214 102 10 0 0 0 0 313 0 0 0 100 4 0 0 7 24 5 24 1 0 0 0 277 0 0 0 100 5 0 0 0 13 6 2 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 112 1 0 0 0 311 0 0 0 100 7 0 0 0 12 1 8 0 1 4 0 2 0 0 0 100 March 31, 2026 at 06:41:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 116 0 0 0 0 294 0 0 0 100 1 0 0 0 55 23 78 1 0 0 0 771 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 213 103 6 0 0 0 0 300 0 0 0 100 4 0 0 7 9 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 112 52 108 0 0 1 0 300 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 March 31, 2026 at 06:41:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2307 203 116 0 0 2 0 294 0 0 0 100 1 0 0 0 56 22 84 1 1 0 0 768 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 2 209 102 2 0 0 0 0 300 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 109 52 104 0 0 0 0 300 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 March 31, 2026 at 06:41:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2307 203 116 0 0 1 0 294 0 0 0 100 1 0 0 0 58 23 84 0 0 0 0 770 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 2 216 104 10 0 0 0 0 310 0 0 0 100 4 0 0 7 8 2 4 0 0 0 0 258 0 0 0 100 5 0 0 0 9 1 6 0 0 0 0 18 0 0 0 100 6 0 0 0 109 52 104 0 0 0 0 301 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 March 31, 2026 at 06:41:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2310 203 130 0 0 1 0 294 0 0 0 100 1 0 0 0 34 13 58 1 1 0 0 767 0 0 0 100 2 0 0 14 9 3 6 0 0 0 0 267 0 0 0 100 3 0 0 1 216 102 12 0 0 0 0 314 0 0 0 100 4 1291 0 8 24 3 24 2 0 0 0 293 0 0 0 99 5 4 0 2 67 52 14 0 2 0 0 38 0 0 0 100 6 40 0 0 133 52 143 2 2 0 0 561 0 0 0 99 7 1 0 0 11 1 12 0 2 0 0 53 0 0 0 100 March 31, 2026 at 06:41:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 203 153 0 1 4 0 293 0 0 0 99 1 0 0 0 16 3 36 1 0 1 0 751 0 0 0 100 2 0 0 14 17 3 14 0 2 1 0 266 0 0 0 100 3 0 0 7 216 102 14 0 0 1 0 316 0 0 0 100 4 1283 0 7 37 6 42 1 0 7 0 337 0 1 0 99 5 0 0 0 102 92 4 0 0 19 0 0 0 0 0 100 6 0 0 0 124 55 122 0 1 0 0 318 0 0 0 100 7 0 0 0 26 1 32 0 0 7 0 0 0 0 0 100