April 1, 2026 at 06:54:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 713 0 317 2226 123 6317 66 286 1564 7 4393 4 5 0 91 1 722 0 141 260 13 6953 21 265 1459 34 12883 7 6 0 87 2 980 0 58 358 17 5413 15 236 1430 23 10442 5 5 0 90 3 1358 0 52 625 248 5801 12 262 1427 25 14297 3 4 0 93 4 1310 0 38 633 246 6346 18 326 1400 32 12600 6 4 0 90 5 724 0 149 6920 6665 3184 19 204 2976 17 6420 3 6 0 92 6 438 0 52 328 12 5514 12 394 1426 30 9978 2 4 0 94 7 554 0 47 249 11 6040 21 362 1664 16 4801 6 4 0 90 April 1, 2026 at 06:54:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4991 0 36 2262 162 114 10 10 103 0 4278 13 8 0 78 1 315 0 31 268 6 520 1 114 167 62 1043 0 1 0 99 2 9991 0 73 195 4 828 3 112 1248 85 3631 2 21 0 76 3 4734 0 18 366 23 801 1 87 465 87 2138 1 2 0 97 4 12094 0 34 190 22 878 7 98 1247 87 3916 2 19 0 78 5 3063 0 42 322 84 300 7 33 88 28 2063 12 3 0 85 6 2145 0 41 219 5 699 0 91 440 82 1112 0 1 0 98 7 633 0 15 245 14 550 0 80 134 65 982 0 1 0 99 April 1, 2026 at 06:54:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 19 2305 202 36 0 1 0 0 1268 0 1 0 99 1 0 0 0 13 0 9 0 1 0 0 0 0 0 0 100 2 0 0 0 9 1 4 0 1 2 0 300 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 4 0 0 0 14 4 10 0 1 0 0 297 0 0 0 100 5 0 0 8 316 105 108 0 0 0 0 259 0 0 0 100 6 0 0 0 12 1 4 0 0 0 0 1 0 0 0 100 7 0 0 0 108 51 108 0 2 0 0 0 0 0 0 100 April 1, 2026 at 06:54:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2324 204 269 7 58 924 5 1267 0 14 0 86 1 0 0 0 275 5 570 0 64 465 2 0 0 1 0 99 2 0 0 0 109 1 250 8 51 637 3 300 0 14 0 86 3 0 0 0 222 144 194 7 43 576 2 300 0 14 0 86 4 0 0 0 228 151 187 7 44 624 2 295 0 14 0 86 5 0 0 14 471 114 518 0 66 533 0 259 0 1 0 99 6 0 0 0 132 26 231 8 45 522 2 0 0 14 0 86 7 0 0 0 105 11 202 7 47 505 1 0 0 14 0 86 April 1, 2026 at 06:54:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 16 2309 202 362 3 72 1399 18 259 0 1 0 99 1 0 0 5 308 1 635 5 72 735 12 254 0 1 0 99 2 0 0 0 193 16 393 1 79 641 13 300 0 1 0 99 3 0 0 0 308 181 311 1 62 818 14 300 0 1 0 99 4 0 0 0 291 174 292 2 68 1023 12 294 0 1 0 99 5 0 0 7 475 106 563 0 77 742 10 261 0 1 0 99 6 0 0 0 132 12 291 3 79 560 7 0 0 1 0 99 7 0 0 0 131 13 290 0 66 626 7 0 0 1 0 99 April 1, 2026 at 06:54:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2302 200 389 0 84 1042 12 752 0 1 0 99 1 0 0 14 332 26 655 0 67 421 9 276 0 1 0 99 2 0 0 0 158 3 363 0 73 490 7 301 0 1 0 99 3 0 0 0 296 171 287 0 77 568 6 300 0 1 0 99 4 0 0 0 284 174 290 0 70 706 9 294 0 1 0 99 5 0 0 14 490 122 556 0 81 527 11 259 0 1 0 99 6 0 0 0 143 13 319 0 86 485 9 24 0 1 0 99 7 0 0 0 121 3 270 0 79 365 7 12 0 0 0 100 April 1, 2026 at 06:54:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2309 201 319 1 40 482 18 1000 0 1 0 99 1 0 0 14 197 22 355 1 33 246 6 266 0 0 0 100 2 0 0 0 178 3 304 0 41 248 7 300 0 0 0 100 3 0 0 0 220 111 242 0 32 262 6 300 0 0 0 100 4 0 0 0 178 84 213 0 27 341 11 294 0 1 0 99 5 0 0 9 340 105 284 0 29 206 10 259 0 0 0 100 6 0 0 0 85 1 174 0 27 171 9 2 0 0 0 100 7 0 0 0 94 0 198 0 33 180 8 0 0 0 0 100 April 1, 2026 at 06:54:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2306 202 36 1 1 0 0 1000 0 1 0 99 1 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 2 0 0 0 117 1 110 0 1 1 0 300 0 0 0 100 3 0 0 0 107 51 102 0 1 0 0 300 0 0 0 100 4 0 0 1 15 3 10 0 1 0 0 294 0 0 0 100 5 0 0 8 215 105 8 0 0 0 0 259 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:54:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 38 0 0 0 0 999 0 1 0 99 1 0 0 14 10 2 8 0 1 0 0 266 0 0 0 100 2 0 0 0 119 22 117 0 7 0 0 300 0 0 0 100 3 0 0 0 110 31 104 0 4 1 0 300 0 0 0 100 4 0 0 0 16 3 8 0 0 1 0 294 0 0 0 100 5 0 0 14 218 105 12 0 0 0 0 259 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:54:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 36 1 0 0 0 1001 0 1 0 99 1 0 0 14 16 3 13 0 3 0 0 267 0 0 0 100 2 0 0 0 113 34 108 0 2 1 0 300 0 0 0 100 3 0 0 0 109 18 104 0 3 0 0 300 0 0 0 100 4 0 0 0 15 4 8 0 0 0 0 295 0 0 0 100 5 0 0 14 217 105 8 0 0 0 0 259 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:54:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 202 38 1 0 0 0 999 0 1 0 99 1 0 0 14 25 4 26 1 1 0 0 276 0 0 0 100 2 0 0 0 113 51 106 0 1 0 0 300 0 0 0 100 3 0 0 0 109 1 104 0 1 1 0 300 0 0 0 100 4 0 0 0 12 3 6 0 0 0 0 294 0 0 0 100 5 0 0 14 226 113 8 0 0 0 0 259 0 0 0 100 6 0 0 0 18 2 20 0 0 0 0 25 0 0 0 100 7 0 0 0 14 0 12 0 1 1 0 12 0 0 0 100 April 1, 2026 at 06:54:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 204 42 0 0 0 0 1002 0 1 0 99 1 0 0 14 16 1 16 0 3 0 0 266 0 0 0 100 2 0 0 0 114 51 110 0 3 2 0 300 0 0 0 100 3 0 0 0 114 3 110 0 3 0 0 301 0 0 0 100 4 0 0 0 13 3 10 0 2 0 0 294 0 0 0 100 5 0 0 14 217 105 10 0 1 0 0 259 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:54:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2305 202 36 1 0 0 0 1013 0 1 0 99 1 0 0 14 15 1 11 0 1 0 0 266 0 0 0 100 2 0 0 0 111 52 104 0 0 0 0 300 0 0 0 100 3 0 0 0 112 1 104 0 1 1 0 300 0 0 0 100 4 0 0 0 15 3 10 0 1 0 0 294 0 0 0 100 5 0 0 14 218 105 10 0 0 0 0 259 0 1 0 99 6 0 0 0 10 2 4 0 0 0 0 3 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:54:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 38 0 0 0 0 1012 0 1 0 99 1 0 0 14 13 2 10 0 0 0 0 267 0 0 0 100 2 0 0 0 117 14 113 0 4 0 0 300 0 0 0 100 3 0 0 0 37 3 28 0 1 0 0 300 0 0 0 100 4 0 0 0 92 42 90 0 3 2 0 316 0 0 0 100 5 0 0 14 218 105 12 0 0 0 0 259 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 7 0 2 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:54:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 96 1 1 0 0 1013 0 1 0 99 1 0 0 14 10 1 4 1 1 0 0 266 0 0 0 100 2 0 0 0 56 10 46 0 3 0 0 300 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 4 0 0 0 31 4 26 0 4 0 0 294 0 0 0 100 5 0 0 14 262 123 54 0 4 0 0 268 0 0 0 100 6 0 0 0 59 26 54 0 1 0 0 2 0 0 0 100 7 0 0 0 8 0 4 0 0 0 0 18 0 0 0 100 April 1, 2026 at 06:54:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 134 1 1 1 0 1012 0 1 0 99 1 0 0 14 24 4 20 0 0 1 0 284 0 0 0 100 2 0 0 0 23 3 14 0 0 1 0 301 0 0 0 100 3 0 0 0 14 2 6 0 1 2 0 300 0 0 0 100 4 0 0 0 16 5 8 0 0 1 0 294 0 0 0 100 5 0 0 14 224 111 10 0 0 2 0 259 0 0 0 100 6 0 0 0 66 25 63 0 3 0 0 11 0 0 0 100 7 0 0 0 67 27 65 0 1 1 0 11 0 0 0 100 April 1, 2026 at 06:54:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 82 0 0 0 0 1014 0 1 0 99 1 0 0 14 61 1 58 0 1 0 0 266 0 0 0 100 2 0 0 0 16 1 10 0 0 1 0 300 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 4 0 0 0 14 4 8 0 0 0 0 294 0 0 0 100 5 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 7 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:54:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 36 1 1 0 0 1012 0 0 0 99 1 0 0 14 51 5 44 0 1 0 0 267 0 0 0 100 2 0 0 0 74 31 68 0 2 0 0 300 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 4 0 0 0 19 4 14 0 2 0 0 294 0 0 0 100 5 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 6 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 107 17 102 0 2 0 0 0 0 0 0 100 April 1, 2026 at 06:54:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 54 0 1 0 0 1012 0 1 0 99 1 0 0 14 8 1 4 1 1 0 0 266 0 0 0 100 2 0 0 0 113 4 110 0 3 0 0 300 0 0 0 100 3 0 0 0 8 1 2 0 0 1 0 300 0 0 0 100 4 0 0 0 24 3 16 0 0 0 0 294 0 0 0 100 5 0 0 14 218 105 12 0 0 0 0 259 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 7 0 0 0 109 49 102 0 1 1 0 0 0 0 0 100 April 1, 2026 at 06:54:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 98 1 2 0 0 1012 0 1 0 99 1 0 0 14 61 27 58 0 1 0 0 266 0 0 0 100 2 0 0 0 44 2 34 1 0 1 0 300 0 0 0 100 3 0 0 0 8 1 2 0 0 2 0 300 0 0 0 100 4 0 0 0 22 4 16 0 0 0 0 295 0 0 0 100 5 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 61 24 54 0 4 0 0 0 0 0 0 100 April 1, 2026 at 06:54:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 146 2 2 0 0 1021 0 0 0 99 1 0 0 14 114 49 118 0 2 0 0 285 0 0 0 100 2 0 0 0 19 6 14 0 2 1 0 300 0 0 0 100 3 0 0 0 8 1 4 0 1 2 0 300 0 0 0 100 4 0 0 0 20 3 14 0 0 0 0 294 0 0 0 100 5 0 0 14 226 113 8 0 0 1 0 259 0 0 0 100 6 0 0 0 11 1 12 0 0 0 0 17 0 0 0 100 7 0 0 0 15 0 8 0 1 0 0 3 0 0 0 100 April 1, 2026 at 06:54:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 553 0 46 2318 202 253 6 26 104 5 1668 2 1 0 97 1 826 0 14 173 19 296 12 27 113 6 797 1 1 0 99 2 4181 0 7 133 5 303 14 25 154 23 1335 3 7 0 91 3 598 0 1 167 35 259 0 22 98 10 889 1 1 0 98 4 603 0 0 113 3 250 6 27 123 4 925 1 1 0 98 5 465 0 9 275 105 123 5 17 94 3 607 0 0 0 99 6 1244 0 0 106 2 213 6 16 154 8 510 1 1 0 98 7 885 0 0 74 1 146 6 17 61 7 364 1 0 0 98 April 1, 2026 at 06:55:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 38 1 2 0 0 1092 0 1 0 99 1 0 0 14 13 1 9 0 2 0 0 266 0 0 0 100 2 19 0 0 120 6 112 0 0 0 0 309 0 0 0 100 3 0 0 0 111 52 104 0 0 0 0 300 0 0 0 100 4 0 0 0 16 3 8 0 0 0 0 294 0 0 0 100 5 0 0 14 218 105 8 0 0 0 0 307 0 0 0 100 6 0 0 0 14 3 6 0 0 0 0 3 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 7 2314 203 148 1 5 159 0 1090 0 1 0 99 1 0 0 14 81 1 150 1 5 71 0 266 0 0 0 100 2 0 0 0 184 13 230 1 10 83 0 309 0 0 0 100 3 0 0 0 142 53 153 0 11 100 0 300 0 0 0 100 4 0 0 0 156 69 161 0 8 53 0 295 0 0 0 100 5 0 0 14 287 105 158 0 7 77 0 260 0 0 0 100 6 0 0 0 53 0 95 0 4 99 0 0 0 0 0 100 7 0 0 0 56 0 99 0 6 77 0 0 0 0 0 100 April 1, 2026 at 06:55:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 36 1 0 0 0 1087 0 1 0 99 1 0 0 14 13 1 9 0 2 0 0 266 0 0 0 100 2 0 0 0 76 23 68 0 4 1 0 309 0 0 0 100 3 0 0 0 59 24 50 0 1 0 0 300 0 0 0 100 4 0 0 0 114 15 106 0 5 0 0 294 0 0 0 100 5 0 0 14 219 105 12 0 2 0 0 260 0 0 0 100 6 0 0 0 12 1 12 0 2 0 0 2 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27860 0 191 2385 203 1091 44 169 166 43 6944 9 22 0 69 1 4285 0 21 586 5 923 20 129 157 37 3218 4 2 0 94 2 10984 0 47 496 13 897 27 122 185 47 4820 4 3 0 93 3 6003 0 196 519 6 926 28 117 144 53 3909 2 2 0 96 4 1558 0 191 435 11 759 10 94 89 50 2953 2 1 0 97 5 1020 0 31 696 134 768 8 97 129 54 2960 1 2 0 97 6 1073 0 18 469 17 875 19 91 122 37 2737 1 2 0 97 7 438 0 9 409 6 721 8 72 79 24 2621 2 1 0 98 April 1, 2026 at 06:55:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 77 2317 206 54 1 1 4 0 1144 0 1 0 99 1 33 0 0 35 3 21 0 3 4 0 37 0 0 0 100 2 21 0 0 89 7 70 1 5 2 0 308 0 0 0 100 3 3 0 14 64 22 50 0 3 1 0 609 0 0 0 100 4 0 0 0 34 4 22 0 1 0 0 304 0 0 0 100 5 18 0 21 334 133 114 0 7 1 0 268 0 0 0 100 6 2 0 0 26 2 12 0 2 0 0 11 0 0 0 100 7 12 0 0 25 0 12 0 3 0 0 19 0 0 0 100 April 1, 2026 at 06:55:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 21 2336 207 168 1 4 2 0 1104 0 1 0 99 1 0 0 126 19 1 10 0 1 2 0 0 0 0 0 100 2 0 0 0 33 1 4 1 0 1 0 300 0 0 0 100 3 0 0 14 36 3 10 0 1 0 0 567 0 0 0 100 4 0 0 0 33 3 6 0 0 0 0 294 0 0 0 100 5 0 0 14 283 124 51 0 3 0 0 307 0 0 0 100 6 0 0 0 40 5 13 0 3 0 0 0 0 0 0 100 7 0 0 0 83 26 60 0 4 0 0 0 0 0 0 100 April 1, 2026 at 06:55:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2351 206 245 1 11 111 0 1101 0 1 0 99 1 0 0 224 63 1 99 0 6 64 0 0 0 0 0 100 2 0 0 0 81 1 78 0 9 58 0 300 0 0 0 100 3 0 0 14 122 30 126 1 9 74 0 565 0 0 0 100 4 0 0 2 114 30 94 0 11 70 0 294 0 0 0 100 5 0 0 14 304 106 119 0 10 59 0 260 0 0 0 100 6 0 0 0 89 2 95 0 9 57 0 2 0 0 0 100 7 0 0 0 174 50 172 0 4 92 0 0 0 0 0 100 April 1, 2026 at 06:55:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1864 0 64 2439 209 908 27 139 81 46 4332 2 2 0 96 1 1263 0 128 265 2 721 30 125 106 62 3638 2 2 0 97 2 11601 0 322 390 1 686 20 104 140 79 4737 3 3 0 93 3 8668 0 58 465 3 701 12 115 136 62 3959 2 2 0 95 4 1420 0 202 392 6 719 11 95 81 70 2864 1 1 0 98 5 1215 0 30 612 107 755 10 104 62 65 2961 2 1 0 97 6 34188 0 19 258 2 613 16 88 82 50 4293 7 6 0 87 7 450 0 12 432 50 711 14 84 56 47 2029 1 1 0 98 April 1, 2026 at 06:55:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 695 0 34 2333 202 582 27 93 33 0 3042 1 1 0 98 1 918 0 0 110 28 532 27 76 63 2 1612 1 1 0 98 2 482 0 0 233 3 387 14 48 23 2 1118 1 0 0 99 3 270 0 14 223 3 426 17 63 30 4 1972 1 0 0 99 4 396 0 70 199 2 368 10 46 40 4 1282 1 1 0 98 5 759 0 8 403 113 364 18 44 37 5 1332 1 1 0 98 6 192 0 7 45 5 433 10 52 14 2 1590 1 0 0 99 7 169 0 0 242 30 416 10 48 18 2 1355 2 0 0 98 April 1, 2026 at 06:55:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 4 2379 202 142 1 1 0 0 1093 0 1 0 99 1 0 0 462 70 25 56 0 2 2 0 1 0 0 0 100 2 0 0 0 130 26 54 0 1 0 0 0 0 0 0 100 3 2 0 14 82 3 8 1 1 0 0 580 0 0 0 100 4 0 0 42 79 3 8 0 1 3 0 300 0 1 0 99 5 0 0 9 289 106 10 0 0 0 0 308 0 0 0 100 6 0 0 0 85 2 6 0 0 0 0 294 0 0 0 100 7 0 0 0 91 5 14 0 1 0 0 10 0 0 0 100 April 1, 2026 at 06:55:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 126 1 1 0 0 1092 0 1 0 99 1 0 0 0 29 9 22 0 2 0 0 0 0 0 0 100 2 0 0 0 109 42 102 0 3 0 0 0 0 0 0 100 3 0 0 14 12 2 14 1 1 0 0 566 0 0 0 100 4 0 0 0 16 3 12 0 0 1 0 301 0 0 0 100 5 0 0 14 216 105 8 0 0 0 0 260 0 0 0 100 6 0 0 0 15 4 10 0 0 0 0 297 0 0 0 100 7 0 0 0 19 6 12 0 0 0 0 9 0 0 0 100 April 1, 2026 at 06:55:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 202 215 0 16 94 0 1090 0 1 0 99 1 0 0 0 74 1 133 0 11 71 0 0 0 0 0 100 2 0 0 0 155 26 191 0 9 59 0 0 0 0 0 100 3 0 0 14 145 56 180 0 9 67 0 566 0 0 0 100 4 0 0 0 92 37 98 0 8 64 0 322 0 0 0 100 5 0 0 14 260 105 89 0 5 49 0 260 0 0 0 100 6 0 0 0 59 2 104 0 8 58 0 294 0 0 0 100 7 0 0 0 62 7 100 0 6 65 0 9 0 0 0 100 April 1, 2026 at 06:55:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3264 0 191 2461 202 1360 42 199 135 67 5424 3 3 0 95 1 1820 0 201 562 4 1037 20 146 144 52 4308 2 2 0 96 2 10357 0 129 311 9 1126 33 162 174 59 5276 3 3 0 94 3 5790 0 34 554 12 1029 16 135 214 83 5649 2 2 0 96 4 3015 0 10 247 30 922 21 110 114 60 5295 3 2 0 95 5 2347 0 36 516 115 891 19 124 94 65 3176 3 1 0 96 6 1533 0 19 184 3 930 18 128 113 50 3424 2 1 0 97 7 36308 0 216 164 8 967 25 121 91 56 3680 9 6 0 85 April 1, 2026 at 06:55:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 201 156 1 1 1 0 1112 0 1 0 99 1 0 0 70 23 4 14 0 1 7 0 13 0 0 0 99 2 0 0 0 23 2 4 0 0 7 0 0 0 0 0 100 3 36 0 14 38 9 18 1 0 3 0 590 0 0 0 100 4 0 0 0 133 55 116 0 1 3 0 301 0 0 0 100 5 0 0 14 245 113 20 0 2 2 0 276 0 0 0 100 6 0 0 0 26 3 8 0 1 0 0 294 0 0 0 100 7 0 0 7 26 1 9 1 0 2 0 1 0 0 0 100 April 1, 2026 at 06:55:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2376 201 90 0 1 0 0 1089 0 1 0 99 1 0 0 42 77 1 4 0 0 2 0 0 0 1 0 99 2 0 0 462 13 0 2 0 0 2 0 0 0 0 0 100 3 0 0 14 90 7 14 1 0 1 0 574 0 0 0 100 4 0 0 0 190 37 110 0 3 2 0 300 0 0 0 100 5 0 0 14 342 121 70 0 5 0 0 260 0 0 0 100 6 0 0 0 85 3 8 0 1 0 0 296 0 0 0 100 7 0 0 0 80 0 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 201 42 1 1 0 0 1092 0 1 0 99 1 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 18 7 16 0 1 0 0 574 0 0 0 100 4 0 0 1 71 6 61 0 4 1 0 300 0 0 0 100 5 0 0 14 272 110 62 0 3 0 0 260 0 0 0 100 6 0 0 0 104 44 95 0 4 0 0 294 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38076 0 230 2466 203 1096 26 162 210 59 4938 9 8 0 83 1 2389 0 202 261 4 1216 22 165 242 74 4393 2 2 0 95 2 10326 0 132 458 0 840 11 111 245 74 5492 2 3 0 95 3 7727 0 46 375 46 975 24 123 211 69 4435 4 2 0 95 4 1576 0 19 540 40 1053 11 113 219 83 2637 1 2 0 97 5 1112 0 16 477 109 1019 13 119 173 52 3797 2 1 0 97 6 886 0 12 441 32 792 11 75 137 44 4398 2 1 0 97 7 2388 0 206 257 22 777 22 93 181 46 2624 2 2 0 96 April 1, 2026 at 06:55:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 98 2305 202 178 1 4 6 0 1123 0 1 0 99 1 18 0 0 32 4 10 0 1 0 0 17 0 0 0 100 2 11 0 0 33 1 14 0 4 6 0 11 0 0 0 100 3 5 0 14 28 2 10 2 2 1 0 603 0 0 0 100 4 0 0 0 27 3 6 0 0 0 0 301 0 0 0 100 5 52 0 14 245 110 26 0 0 1 0 280 0 0 0 100 6 2 0 0 27 1 6 0 2 0 0 303 0 0 0 100 7 25 0 0 128 52 112 0 2 0 0 9 0 0 0 100 April 1, 2026 at 06:55:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2342 201 150 1 3 3 0 1107 0 1 0 99 1 0 0 1 62 5 28 0 3 1 0 12 0 0 0 100 2 0 0 231 60 23 56 0 4 4 0 0 0 0 0 100 3 0 0 14 42 2 4 1 0 1 0 566 0 0 0 100 4 0 0 0 44 2 4 0 0 2 0 300 0 1 0 99 5 0 0 14 280 121 34 0 0 0 0 292 0 0 0 100 6 0 0 0 46 2 6 0 0 0 0 296 0 0 0 100 7 0 0 0 90 23 49 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:55:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2339 201 136 2 2 2 0 1093 0 1 0 99 1 0 0 0 61 5 20 0 4 0 0 0 0 0 0 100 2 0 0 231 66 22 53 0 4 2 0 0 0 0 0 100 3 0 0 14 99 28 58 0 1 2 0 567 0 0 0 100 4 0 0 0 48 2 4 0 0 0 0 300 0 0 0 100 5 0 0 14 268 112 22 0 0 0 0 268 0 0 0 100 6 0 0 0 46 1 2 0 0 0 0 294 0 0 0 100 7 0 0 0 44 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2144 0 288 2394 202 1082 37 176 94 57 4795 2 2 0 95 1 1438 0 29 511 2 874 26 137 100 46 2867 2 2 0 97 2 4951 0 191 479 3 804 22 118 179 57 5453 4 2 0 94 3 41797 0 217 347 29 966 41 143 149 59 5464 9 7 0 84 4 5590 0 24 527 11 958 30 128 136 74 4746 2 2 0 96 5 6038 0 77 855 121 896 18 129 139 71 3781 4 2 0 94 6 1475 0 15 507 4 969 19 118 100 81 3698 1 1 0 98 7 1010 0 20 256 0 746 23 108 107 49 2736 1 1 0 98 April 1, 2026 at 06:55:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2328 206 202 1 10 98 0 1129 0 1 0 99 1 28 0 7 86 1 118 0 8 67 0 10 0 0 0 100 2 0 0 0 71 3 95 0 5 83 0 18 0 0 0 100 3 41 0 14 117 38 135 1 11 95 0 622 0 0 0 100 4 0 0 0 175 58 180 0 11 76 0 303 0 0 0 100 5 0 0 84 331 120 178 0 9 84 0 280 0 1 0 99 6 30 0 0 99 14 120 0 7 85 0 321 0 0 0 100 7 18 0 0 67 2 88 0 8 51 0 9 0 0 0 100 April 1, 2026 at 06:55:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2378 201 38 1 1 0 0 1102 0 1 0 99 1 0 0 0 83 0 6 0 2 0 0 0 0 0 0 100 2 0 0 462 25 2 17 0 2 2 0 0 0 0 0 100 3 0 0 14 92 8 16 0 0 1 0 575 0 0 0 100 4 0 0 0 83 2 4 0 0 2 0 300 0 0 0 100 5 8 0 56 394 110 121 0 3 2 0 316 0 1 0 99 6 0 0 0 186 50 106 0 3 0 0 296 0 0 0 100 7 0 0 0 81 0 4 0 0 0 0 18 0 0 0 100 April 1, 2026 at 06:55:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2307 202 84 1 1 0 0 1115 0 1 0 99 1 0 0 0 22 3 14 0 1 1 0 14 0 0 0 100 2 0 0 0 21 3 16 0 0 1 0 0 0 0 0 100 3 0 0 14 21 8 14 1 0 2 0 576 0 0 0 100 4 0 0 0 16 4 8 0 0 2 0 301 0 0 0 100 5 0 0 14 312 114 102 0 0 1 0 278 0 0 0 100 6 0 0 0 113 52 106 0 1 1 0 294 0 0 0 100 7 0 0 0 11 1 2 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:55:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 390 0 61 2380 202 466 10 71 66 52 3974 1 2 0 97 1 206 0 19 208 4 370 5 67 53 42 1291 0 0 0 99 2 1565 0 27 278 3 327 2 52 67 38 1289 1 1 0 98 3 8038 0 137 204 11 371 6 56 127 40 3674 2 2 0 96 4 3500 0 27 204 3 358 7 66 86 44 1769 1 2 0 97 5 2332 0 338 414 107 414 8 50 58 58 3779 2 2 0 97 6 24892 0 8 317 29 544 9 58 60 66 1912 5 3 0 92 7 341 0 20 301 21 460 3 59 47 32 1233 0 0 0 99 April 1, 2026 at 06:55:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2919 0 47 2419 201 638 25 67 42 4 3046 2 2 0 96 1 642 0 1 348 6 628 21 64 43 6 1898 1 1 0 98 2 859 0 7 259 3 452 12 50 69 5 1405 2 1 0 98 3 3200 0 192 205 2 379 7 33 56 21 2049 2 1 0 97 4 3059 0 2 241 3 412 15 43 69 14 1750 1 1 0 98 5 1634 0 86 270 114 492 13 52 73 26 2377 2 1 0 97 6 9635 0 7 133 10 505 14 45 22 18 1276 3 3 0 94 7 1138 0 0 350 36 601 6 41 51 6 2355 1 1 0 98 April 1, 2026 at 06:55:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2387 201 208 1 13 108 0 1095 0 1 0 99 1 0 0 0 197 26 178 0 10 60 0 0 0 0 0 100 2 0 0 462 73 3 115 0 8 73 0 0 0 1 0 99 3 2 0 14 170 39 130 0 8 88 0 566 0 0 0 100 4 0 0 0 174 38 137 0 10 68 0 300 0 0 0 100 5 0 0 56 349 106 138 0 5 72 0 263 0 1 0 99 6 0 0 0 234 23 208 0 7 83 0 2 0 0 0 100 7 34 0 0 147 9 114 0 7 60 0 303 0 0 0 100 April 1, 2026 at 06:55:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2303 201 42 2 0 0 0 1092 0 1 0 99 1 0 0 0 107 3 102 0 2 0 0 0 0 0 0 100 2 0 0 0 104 49 100 0 1 0 0 0 0 0 0 100 3 0 0 14 7 2 4 1 0 2 0 565 0 0 0 100 4 0 0 0 11 3 8 0 1 0 0 301 0 0 0 100 5 0 0 8 218 106 10 0 0 0 0 260 0 0 0 100 6 0 0 0 10 0 2 0 0 0 0 0 0 0 0 100 7 0 0 0 19 7 14 0 0 0 0 303 0 0 0 100 April 1, 2026 at 06:55:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 52 0 0 0 0 1106 0 1 0 99 1 0 0 0 17 0 14 0 0 0 0 17 0 0 0 100 2 0 0 0 113 7 108 0 2 0 0 0 0 0 0 100 3 0 0 14 39 17 34 0 1 0 0 567 0 0 0 100 4 0 0 0 73 32 68 0 2 1 0 300 0 0 0 100 5 0 0 14 237 115 26 0 1 1 0 270 0 0 0 100 6 0 0 0 13 1 8 0 2 0 0 2 0 0 0 100 7 0 0 0 22 6 20 0 1 0 0 302 0 0 0 100 April 1, 2026 at 06:55:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 618 0 76 2426 203 1019 35 147 90 53 4385 2 2 0 97 1 36351 0 381 260 2 885 28 112 76 67 4263 8 7 0 85 2 2102 0 121 188 13 914 21 117 158 67 3662 2 2 0 96 3 11392 0 174 187 6 832 10 100 194 65 7789 4 4 0 93 4 9651 0 37 355 5 775 24 117 200 67 3320 3 2 0 95 5 1312 0 12 661 110 824 12 99 112 81 2809 1 1 0 98 6 1880 0 48 384 9 687 12 80 100 46 2706 2 1 0 96 7 800 0 19 366 11 618 8 70 79 40 2392 1 1 0 98 April 1, 2026 at 06:55:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2320 202 143 1 2 0 0 1105 0 1 0 99 1 0 0 0 22 0 2 0 0 0 0 0 0 0 0 100 2 34 0 0 34 7 18 0 0 5 0 9 0 0 0 100 3 1 0 28 24 4 12 0 1 3 0 829 0 0 0 100 4 0 0 0 23 3 6 0 0 2 0 301 0 0 0 100 5 0 0 7 226 104 6 0 0 0 0 0 0 0 0 100 6 0 0 0 122 2 104 0 0 0 0 3 0 0 0 100 7 0 0 70 11 1 4 0 0 5 0 294 0 0 0 100 April 1, 2026 at 06:55:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2382 203 282 1 11 90 0 1093 0 1 0 99 1 0 0 0 108 0 139 0 8 68 0 0 0 0 0 100 2 0 0 462 76 7 114 0 7 69 0 8 0 0 0 100 3 0 0 21 164 40 120 1 6 88 0 825 0 0 0 100 4 0 0 0 169 41 125 0 9 59 0 322 0 0 0 100 5 0 0 0 296 104 128 0 7 69 0 0 0 0 0 100 6 0 0 0 225 0 200 0 4 48 0 0 0 0 0 100 7 0 0 42 126 1 108 0 7 63 0 294 0 1 0 99 April 1, 2026 at 06:55:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 134 0 0 1 0 1093 0 1 0 99 1 0 0 0 21 4 16 0 3 0 0 0 0 0 0 100 2 0 0 0 20 6 14 0 0 0 0 8 0 0 0 100 3 0 0 21 11 4 10 0 1 2 0 826 0 0 0 100 4 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 5 0 0 7 215 104 8 0 0 0 0 1 0 0 0 100 6 0 0 0 108 24 102 0 1 0 0 2 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:55:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1723 0 95 2432 201 1210 37 177 77 52 5301 2 2 0 96 1 2584 0 144 512 2 901 27 114 119 47 3111 2 2 0 96 2 1087 0 7 292 9 852 22 131 117 54 3996 2 2 0 97 3 12529 0 322 187 6 863 32 132 229 71 5769 4 4 0 92 4 7985 0 62 361 5 876 33 149 197 72 4477 3 2 0 95 5 34819 0 52 499 115 963 30 142 140 70 5248 8 6 0 86 6 647 0 3 515 31 844 18 97 74 49 2908 1 1 0 98 7 2897 0 216 516 5 813 19 97 86 54 2891 2 1 0 96 April 1, 2026 at 06:55:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 35 2321 203 140 1 1 0 0 1125 0 1 0 99 1 12 0 0 47 10 27 0 4 1 0 25 0 0 0 100 2 0 0 0 37 3 24 0 3 6 0 14 0 0 0 100 3 0 0 7 30 3 13 1 3 2 0 563 0 0 0 100 4 7 0 14 27 3 6 0 0 1 0 584 0 0 0 100 5 62 0 84 232 106 22 1 0 6 0 21 0 1 0 99 6 0 0 0 30 3 15 0 3 0 0 24 0 0 0 100 7 0 0 0 131 20 114 1 4 0 0 309 0 0 0 100 April 1, 2026 at 06:55:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 201 142 0 4 4 0 1089 0 1 0 99 1 0 0 0 43 13 30 0 2 0 0 0 0 0 0 100 2 0 0 14 68 27 62 0 1 5 0 0 0 0 0 100 3 0 0 7 18 4 10 0 1 1 0 563 0 0 0 100 4 0 0 14 14 3 6 1 1 1 0 566 0 0 0 100 5 0 0 7 233 108 16 0 0 0 0 9 0 0 0 100 6 0 0 0 14 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 38 13 27 0 1 0 0 294 0 0 0 100 April 1, 2026 at 06:55:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2377 201 271 3 9 101 0 1091 0 1 0 99 1 0 0 0 150 1 139 0 12 63 0 0 0 0 0 100 2 0 0 448 110 21 153 0 14 45 0 0 0 0 0 100 3 0 0 7 222 69 178 0 7 60 0 561 0 0 0 100 4 0 0 14 153 39 103 0 9 54 0 566 0 0 0 100 5 0 0 7 357 108 147 0 10 75 0 9 0 0 0 100 6 0 0 0 141 2 133 0 7 78 0 2 0 0 0 100 7 0 0 0 126 3 100 0 8 72 0 294 0 0 0 100 April 1, 2026 at 06:55:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4482 0 91 2493 203 1335 31 183 116 65 6299 5 3 0 92 1 35671 0 30 245 11 1090 30 146 125 62 6337 9 6 0 85 2 2191 0 24 597 7 912 18 114 98 34 3224 2 2 0 96 3 11711 0 255 320 36 1165 33 146 216 73 5232 3 3 0 94 4 6305 0 206 524 4 1048 24 136 186 76 4733 2 2 0 96 5 909 0 16 712 111 993 18 115 108 79 3281 2 1 0 97 6 2442 0 203 444 1 888 15 100 107 48 3178 3 1 0 96 7 890 0 24 156 4 940 22 103 111 58 4349 2 2 0 96 April 1, 2026 at 06:55:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 21 2315 201 155 1 6 0 0 1135 0 1 0 99 1 18 0 70 26 2 16 0 1 6 0 21 0 1 0 99 2 0 0 0 31 3 16 0 0 6 0 17 0 0 0 100 3 0 0 7 80 9 61 0 6 1 0 563 0 0 0 100 4 38 0 14 88 33 73 1 4 1 0 580 0 0 0 100 5 18 0 7 249 114 22 0 1 1 0 21 0 0 0 100 6 1 0 0 39 5 28 0 3 0 0 15 0 0 0 100 7 36 0 7 29 3 15 0 4 0 0 306 0 0 0 100 April 1, 2026 at 06:55:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2378 201 108 0 1 2 0 1092 0 1 0 99 1 0 0 0 84 1 2 0 0 0 0 0 0 0 0 100 2 0 0 462 53 10 46 0 3 2 0 0 0 0 0 100 3 0 0 7 101 11 24 0 1 3 0 563 0 0 0 100 4 5 0 14 133 29 58 0 1 2 0 603 0 0 0 100 5 0 0 7 297 108 15 0 2 0 0 0 0 0 0 100 6 0 0 0 112 8 34 0 3 0 0 0 0 0 0 100 7 0 0 0 87 2 6 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:55:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2301 201 84 1 2 0 0 1088 0 1 0 99 1 0 0 0 15 4 10 0 1 0 0 3 0 0 0 100 2 0 0 0 116 26 108 0 3 0 0 0 0 0 0 100 3 0 0 7 68 28 62 0 3 1 0 560 0 0 0 100 4 1 0 14 19 8 14 0 0 1 0 574 0 0 0 100 5 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 16 3 10 0 0 1 0 3 0 0 0 100 7 0 0 0 15 2 16 0 1 0 0 294 0 0 0 100 April 1, 2026 at 06:55:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 896 0 45 2389 203 559 5 91 166 37 3456 1 1 0 97 1 606 0 10 200 2 477 11 79 121 30 1589 0 1 0 99 2 2810 0 26 391 14 500 4 57 129 30 1171 1 1 0 97 3 450 0 40 362 67 478 3 59 110 20 1669 1 1 0 98 4 3396 0 134 283 44 440 5 52 176 34 3622 1 2 0 97 5 3028 0 202 420 103 393 9 59 145 29 1920 1 1 0 98 6 5326 0 116 257 1 479 3 63 161 55 1837 1 2 0 97 7 284 0 17 296 2 513 4 64 135 44 1658 0 1 0 99 April 1, 2026 at 06:55:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 775 0 52 2381 205 909 42 154 71 27 2666 2 1 0 97 1 35120 0 191 85 12 764 37 130 53 28 5658 8 6 0 86 2 1003 0 3 387 22 721 18 96 63 39 1963 1 1 0 98 3 1296 0 81 315 4 583 15 82 67 26 2960 2 1 0 97 4 709 0 15 100 6 662 24 103 48 24 2972 1 1 0 98 5 909 0 2 509 105 555 18 71 64 17 2174 2 1 0 97 6 2877 0 3 96 5 656 20 82 58 19 2278 2 1 0 96 7 5126 0 27 379 3 604 14 80 62 19 2566 2 1 0 96 April 1, 2026 at 06:55:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 201 122 0 2 3 0 12 0 1 0 99 1 34 0 0 151 31 102 0 2 2 0 1118 0 0 0 99 2 0 0 2 141 28 58 0 3 1 0 0 0 0 0 100 3 0 0 7 88 4 6 0 0 1 0 564 0 0 0 100 4 2 0 477 26 5 14 0 2 3 0 567 0 0 0 99 5 0 0 7 299 111 16 0 0 2 0 15 0 0 0 100 6 0 0 0 84 2 6 0 0 1 0 0 0 0 0 100 7 0 0 0 97 6 18 0 3 0 0 294 0 0 0 100 April 1, 2026 at 06:55:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 108 0 1 0 0 0 0 0 0 100 1 0 0 0 73 31 93 2 2 0 0 1104 0 0 0 100 2 0 0 0 63 27 60 0 2 0 0 0 0 0 0 100 3 3 0 7 15 3 14 0 1 2 0 561 0 0 0 100 4 0 0 14 11 3 4 0 0 0 0 566 0 0 0 100 5 0 0 7 213 103 4 0 0 0 0 1 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:55:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 108 0 1 0 0 0 0 0 0 100 1 0 0 0 26 7 46 1 1 0 0 1104 0 0 0 100 2 0 0 0 109 51 104 0 1 0 0 0 0 0 0 100 3 0 0 7 12 3 8 1 1 0 0 561 0 0 0 100 4 0 0 14 9 3 4 0 0 1 0 566 0 0 0 100 5 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:55:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2508 0 266 2405 204 1303 27 214 245 81 4012 2 2 0 96 1 3237 0 33 356 37 1106 42 185 173 57 5287 3 2 0 96 2 1975 0 24 585 17 927 18 151 153 55 3251 2 2 0 96 3 7920 0 311 218 31 1082 34 157 249 76 4596 3 2 0 94 4 4021 0 15 382 39 1020 35 153 230 48 3950 3 2 0 95 5 749 0 41 671 103 897 13 119 206 50 4592 2 2 0 96 6 6897 0 133 279 4 834 23 116 224 63 4208 3 3 0 95 7 36981 0 12 344 6 954 26 117 158 64 4070 8 6 0 86 April 1, 2026 at 06:55:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 77 2317 206 124 0 0 5 0 9 0 1 0 99 1 0 0 0 127 51 140 1 2 5 0 1108 0 0 0 99 2 0 0 7 21 2 6 0 1 0 0 0 0 0 0 100 3 0 0 7 28 5 10 0 0 1 0 560 0 0 0 100 4 0 0 0 24 3 6 0 1 1 0 301 0 0 0 100 5 4 0 21 228 103 12 0 1 0 0 268 0 0 0 100 6 0 0 0 20 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 24 2 6 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:55:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 47 2379 205 132 0 1 2 0 21 0 1 0 99 1 0 0 462 71 25 96 1 1 3 0 1108 0 1 0 99 2 0 0 0 86 2 6 0 0 0 0 0 0 0 0 100 3 0 0 7 135 29 60 0 1 1 0 563 0 0 0 100 4 0 0 0 80 2 4 0 1 0 0 300 0 0 0 100 5 0 0 15 296 111 14 0 0 1 0 280 0 0 0 100 6 0 0 0 83 2 8 0 0 0 0 2 0 0 0 100 7 0 0 0 87 2 8 0 1 0 0 294 0 0 0 100 April 1, 2026 at 06:55:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 207 124 0 0 0 0 8 0 0 0 100 1 0 0 0 15 3 40 1 1 0 0 1122 0 0 0 100 2 0 0 0 12 3 7 0 1 0 0 0 0 0 0 100 3 0 0 7 116 54 110 1 1 2 0 560 0 0 0 100 4 0 0 0 14 4 8 0 1 1 0 301 0 0 0 100 5 0 0 21 215 104 8 0 0 0 0 266 0 0 0 100 6 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:55:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26363 0 366 2402 206 1187 38 175 95 77 5558 6 5 0 89 1 11628 0 128 340 3 1169 34 167 104 70 4736 4 4 0 92 2 1210 0 20 503 7 891 20 113 87 48 4380 2 2 0 96 3 3494 0 11 334 28 881 24 128 144 46 4620 2 2 0 96 4 8579 0 201 478 6 818 19 105 160 55 4606 4 3 0 94 5 7455 0 60 453 105 913 21 100 148 62 4068 3 2 0 95 6 4150 0 45 508 7 768 16 108 88 52 2755 4 2 0 95 7 1644 0 37 420 3 827 18 99 103 48 3577 1 1 0 97 April 1, 2026 at 06:55:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 91 2323 208 232 0 13 97 0 27 0 1 0 99 1 0 0 0 75 2 122 0 10 61 0 1126 0 1 0 99 2 18 0 0 84 4 123 0 10 80 0 21 0 0 0 100 3 0 0 7 111 33 148 0 9 74 0 580 0 0 0 100 4 12 0 7 106 35 119 0 11 60 0 342 0 0 0 100 5 5 0 21 320 113 155 0 11 80 0 272 0 0 0 100 6 0 0 0 122 32 140 0 7 55 0 5 0 0 0 100 7 8 0 0 67 2 91 0 10 86 0 303 0 0 0 100 April 1, 2026 at 06:55:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2382 206 146 0 2 2 0 9 0 1 0 99 1 0 0 462 25 2 40 1 1 2 0 1093 0 1 0 99 2 0 0 0 84 2 4 0 0 0 0 0 0 0 0 100 3 0 0 7 86 4 10 0 0 1 0 563 0 0 0 100 4 0 0 0 86 2 6 0 1 0 0 300 0 0 0 100 5 0 0 21 289 104 12 0 1 0 0 275 0 0 0 100 6 0 0 0 183 52 106 0 0 0 0 2 0 0 0 100 7 0 0 0 86 2 12 0 2 2 0 312 0 0 0 100 April 1, 2026 at 06:55:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 205 136 0 1 0 0 20 0 0 0 100 1 0 0 0 23 4 44 1 1 1 0 1108 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 3 0 0 7 14 4 6 1 0 1 0 561 0 0 0 100 4 0 0 0 13 4 4 0 0 2 0 301 0 0 0 100 5 0 0 21 228 111 20 0 0 1 0 282 0 0 0 100 6 0 0 0 112 52 106 0 0 1 0 0 0 0 0 100 7 0 0 0 15 3 6 0 0 1 0 294 0 0 0 100 April 1, 2026 at 06:55:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2257 0 88 2462 209 1379 60 239 124 67 4852 3 2 0 95 1 35333 0 198 322 2 1109 53 189 98 50 5626 8 7 0 85 2 3081 0 31 540 2 806 36 134 61 44 3280 3 1 0 96 3 3137 0 324 512 3 993 20 120 90 65 4970 2 3 0 95 4 3361 0 18 529 4 1036 29 147 149 60 4087 2 2 0 96 5 8287 0 155 656 103 861 20 111 169 69 6917 3 2 0 95 6 5309 0 21 237 29 1000 28 158 160 60 4048 3 2 0 95 7 3338 0 20 346 24 866 31 123 89 48 3219 3 1 0 96 April 1, 2026 at 06:55:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 69 0 90 2321 210 126 0 6 5 0 26 0 1 0 99 1 4 0 0 38 2 46 1 2 5 0 1119 0 0 0 100 2 0 0 0 87 28 82 0 3 0 0 22 0 0 0 100 3 71 0 7 28 4 14 0 0 1 0 588 0 0 0 100 4 3 0 0 32 4 16 0 2 1 0 343 1 0 0 99 5 4 0 22 228 103 11 0 3 0 0 279 0 0 0 100 6 1 0 0 79 26 65 0 4 0 0 11 0 0 0 100 7 3 0 0 30 4 15 0 3 0 0 302 0 0 0 100 April 1, 2026 at 06:55:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2386 206 253 0 10 124 0 9 0 1 0 99 1 0 0 462 118 27 192 0 12 55 0 1099 0 1 0 99 2 0 0 0 167 13 148 0 6 71 0 0 0 0 0 100 3 0 0 7 200 52 172 0 12 87 0 564 0 0 0 100 4 0 0 0 165 38 117 0 8 72 0 300 0 0 0 100 5 2 0 21 346 103 128 0 10 68 0 268 0 0 0 100 6 0 0 0 135 5 100 0 10 56 0 2 0 0 0 100 7 0 0 0 142 2 125 0 12 59 0 294 0 0 0 100 April 1, 2026 at 06:55:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2311 204 114 0 1 0 0 4 0 0 0 100 1 0 0 0 61 25 82 1 1 0 0 1098 0 0 0 100 2 0 0 0 64 29 60 0 1 0 0 1 0 0 0 100 3 0 0 7 11 3 6 1 0 1 0 559 0 0 0 100 4 0 0 0 10 3 4 0 0 1 0 300 0 0 0 100 5 0 0 15 213 104 6 0 0 0 0 267 0 0 0 100 6 0 0 0 8 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:55:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2315 206 134 0 1 4 0 22 0 0 0 100 1 0 0 0 16 1 48 1 1 0 0 1117 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 3 0 0 7 13 3 8 0 0 4 0 560 0 0 0 100 4 0 0 0 9 2 4 0 1 1 0 300 0 0 0 100 5 0 0 15 229 112 16 1 1 0 0 280 0 0 0 100 6 0 0 0 11 2 8 0 0 0 0 2 0 0 0 100 7 0 0 0 15 3 12 0 1 0 0 294 0 0 0 100 April 1, 2026 at 06:55:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3728 0 84 2455 205 1416 64 231 122 72 5501 5 2 0 93 1 1757 0 199 275 3 1303 48 229 115 58 5602 2 2 0 96 2 2749 0 131 653 42 1076 38 161 100 65 3636 2 1 0 97 3 1263 0 37 505 4 957 40 141 153 52 3951 2 2 0 97 4 2040 0 2 517 9 1068 28 130 171 46 4071 3 2 0 95 5 44742 0 420 468 103 941 41 150 181 62 5568 10 9 0 81 6 6610 0 54 568 10 866 22 112 159 75 5178 2 2 0 96 7 1364 0 6 540 5 952 21 119 80 74 4192 2 1 0 97 April 1, 2026 at 06:56:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2305 200 112 0 0 6 0 0 0 1 0 99 1 0 0 0 24 1 34 1 0 6 0 1099 0 0 0 99 2 34 0 0 134 58 118 0 1 0 0 9 0 0 0 100 3 0 0 7 24 3 6 0 0 1 0 563 0 0 0 100 4 0 0 0 20 2 2 0 0 1 0 300 0 0 0 100 5 2 0 21 224 103 4 0 0 0 0 266 0 0 0 100 6 0 0 0 28 3 10 0 0 0 0 3 0 0 0 100 7 0 0 7 23 3 8 0 1 0 0 295 0 0 0 100 April 1, 2026 at 06:56:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 48 2375 201 225 0 8 108 0 1 0 1 0 99 1 0 0 462 117 28 177 1 8 49 0 1099 0 1 0 99 2 0 0 0 199 32 175 0 8 70 0 9 0 0 0 100 3 0 0 7 160 33 142 1 4 54 0 560 0 0 0 100 4 0 0 0 160 33 117 0 10 76 0 301 0 0 0 100 5 0 0 15 304 103 84 0 7 44 0 266 0 0 0 100 6 0 0 0 125 2 93 0 8 74 0 0 0 0 0 100 7 0 0 0 95 2 92 0 8 58 0 294 0 0 0 100 April 1, 2026 at 06:56:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2303 200 110 0 3 0 0 0 0 0 0 100 1 0 0 0 106 48 128 1 3 0 0 1099 0 0 0 100 2 0 0 0 27 8 20 0 2 0 0 8 0 0 0 100 3 0 0 7 10 3 6 0 0 1 0 561 0 0 0 100 4 0 0 0 10 2 4 0 0 2 0 300 0 0 0 100 5 0 0 15 211 103 4 1 0 0 0 266 0 0 0 100 6 0 0 0 10 2 8 0 1 0 0 2 0 0 0 100 7 0 0 0 17 2 16 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:56:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4526 0 201 2458 203 1239 30 163 143 69 4007 3 2 0 95 1 2215 0 202 569 20 1035 18 126 111 58 4786 3 2 0 95 2 3679 0 218 195 13 885 33 133 120 69 4449 3 2 0 96 3 2644 0 32 507 12 888 19 104 99 52 3849 2 2 0 96 4 1109 0 16 490 30 793 12 82 125 53 2991 2 1 0 97 5 10581 0 32 477 114 689 16 95 264 49 5962 3 3 0 94 6 5269 0 10 171 2 788 23 92 111 45 3332 2 2 0 97 7 35119 0 124 195 4 777 20 88 81 61 3517 8 6 0 86 April 1, 2026 at 06:56:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 91 2309 203 138 1 3 6 0 14 0 1 0 99 1 0 0 7 32 2 48 0 5 7 0 1126 0 0 0 99 2 2 0 0 27 3 10 0 1 0 0 10 0 0 0 100 3 0 0 7 27 3 10 0 0 2 0 571 0 0 0 100 4 0 0 0 124 52 106 0 2 3 0 302 0 0 0 100 5 38 0 14 234 107 16 0 0 0 0 281 0 0 0 100 6 0 0 0 28 3 10 0 1 0 0 14 0 0 0 100 7 25 0 0 23 1 8 0 2 0 0 304 0 0 0 100 April 1, 2026 at 06:56:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 34 2353 201 112 0 1 4 0 0 0 1 0 99 1 0 0 343 22 1 46 1 3 6 0 1100 0 1 0 99 2 0 0 0 64 2 10 0 2 0 0 0 0 0 0 100 3 0 0 7 64 3 6 1 0 3 0 564 0 0 0 100 4 0 0 0 161 52 102 0 0 1 0 300 0 0 0 100 5 0 0 15 280 111 20 0 0 0 0 277 0 0 0 100 6 0 0 0 61 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 61 1 4 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:56:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2327 201 183 0 5 85 0 0 0 1 0 99 1 0 0 119 57 1 128 1 7 45 0 1099 0 0 0 99 2 0 0 0 80 2 106 0 7 66 0 0 0 0 0 100 3 0 0 7 94 33 125 0 6 76 0 559 0 0 0 100 4 0 0 0 194 72 197 0 12 81 0 300 0 0 0 100 5 0 0 21 301 114 125 1 10 50 0 273 0 0 0 100 6 0 0 0 70 2 88 0 7 44 0 2 0 0 0 100 7 0 0 0 68 1 93 0 6 91 0 294 0 0 0 100 April 1, 2026 at 06:56:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4362 0 439 2394 202 1258 30 184 143 75 5158 5 3 0 92 1 1573 0 35 254 14 1008 29 151 87 92 4650 2 2 0 96 2 985 0 19 284 8 849 26 139 95 59 3906 2 1 0 97 3 1668 0 126 411 3 751 15 97 80 62 4555 2 1 0 97 4 37290 0 42 426 34 810 24 106 151 42 4034 9 7 0 84 5 6462 0 154 654 116 814 15 103 186 70 3603 2 2 0 96 6 8608 0 41 463 1 769 14 78 160 44 3795 2 2 0 96 7 3057 0 18 350 2 634 19 91 114 57 2914 1 1 0 97 April 1, 2026 at 06:56:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 41 0 21 2326 207 100 0 5 0 0 45 0 0 0 99 1 0 0 70 76 26 94 1 5 6 0 1115 0 1 0 99 2 18 0 0 131 31 272 0 5 6 0 348 0 0 0 100 3 0 0 14 36 5 21 0 4 1 0 566 0 0 0 100 4 3 0 0 28 3 14 0 4 2 0 316 0 0 0 100 5 16 0 21 251 114 34 0 4 0 0 297 0 0 0 100 6 28 0 0 34 3 20 0 2 0 0 30 0 0 0 100 7 0 0 0 27 1 10 0 2 0 0 296 0 0 0 100 April 1, 2026 at 06:56:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2387 208 116 0 1 2 0 15 0 1 0 99 1 0 0 0 85 1 34 1 0 0 0 1092 0 0 0 99 2 0 0 462 83 26 69 0 2 2 0 0 0 0 0 100 3 0 0 14 141 29 63 1 2 0 0 563 0 0 0 100 4 0 0 0 83 3 4 0 0 0 0 301 0 0 0 100 5 0 0 14 287 104 8 0 0 0 0 267 0 0 0 100 6 0 0 0 81 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 82 1 4 0 0 0 0 295 0 0 0 100 April 1, 2026 at 06:56:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 206 119 0 2 0 0 8 0 0 0 100 1 0 0 0 58 23 82 0 3 0 0 1092 0 0 0 100 2 0 0 0 16 1 12 0 1 0 0 0 0 0 0 100 3 0 0 7 67 28 58 0 1 2 0 559 0 0 0 100 4 0 0 0 10 2 2 0 0 0 0 300 0 0 0 100 5 0 0 21 215 104 8 1 0 1 0 266 0 0 0 100 6 0 0 0 12 2 8 0 1 1 0 2 0 0 0 100 7 0 0 0 11 2 6 0 1 0 0 295 0 0 0 100 April 1, 2026 at 06:56:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 719 0 60 2407 211 753 12 105 171 70 1621 1 1 0 98 1 28443 0 18 374 26 585 10 72 140 44 2934 5 4 0 91 2 1000 0 8 390 22 537 9 70 117 32 1237 1 1 0 99 3 496 0 40 205 32 513 7 76 112 41 2429 1 2 0 98 4 2043 0 31 256 34 349 6 54 99 22 3188 2 1 0 97 5 487 0 24 368 103 437 7 61 153 34 2602 1 1 0 98 6 8873 0 309 224 2 435 5 59 174 55 2913 2 2 0 96 7 3082 0 127 184 2 492 8 64 168 63 2532 1 1 0 98 April 1, 2026 at 06:56:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1786 0 221 2329 202 671 18 89 81 18 2306 2 2 0 96 1 6745 0 49 72 4 632 19 76 79 27 3558 2 4 0 94 2 393 0 28 340 21 554 17 56 28 18 1375 1 1 0 98 3 1108 0 7 85 13 497 10 53 37 14 2540 2 1 0 98 4 792 0 7 304 28 476 8 42 43 10 1435 1 1 0 99 5 471 0 21 261 105 367 7 45 38 5 1717 1 1 0 98 6 2664 0 2 254 2 497 10 47 69 14 1782 1 1 0 98 7 5580 0 14 121 2 409 11 51 63 15 1789 3 1 0 96 April 1, 2026 at 06:56:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 7 2387 207 138 0 3 1 0 22 0 1 0 99 1 0 0 0 136 25 90 0 3 1 0 1094 0 0 0 99 2 0 0 42 78 2 4 0 0 3 0 0 0 1 0 99 3 0 0 469 74 29 58 1 1 3 0 562 0 0 0 99 4 0 0 0 87 4 6 0 1 1 0 301 0 0 0 100 5 2 0 21 303 113 24 0 3 0 0 276 0 0 0 100 6 0 0 0 86 2 14 0 0 1 0 18 0 0 0 100 7 0 0 0 88 3 6 0 1 1 0 294 0 0 0 100 April 1, 2026 at 06:56:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2321 207 122 0 1 0 0 9 0 0 0 100 1 0 0 0 42 15 62 1 2 2 0 1093 0 0 0 100 2 0 0 0 82 37 76 0 1 0 0 0 0 0 0 100 3 0 0 7 15 4 16 0 1 3 0 560 0 0 0 100 4 0 0 0 8 2 2 0 0 1 0 300 0 0 0 100 5 0 0 15 211 103 4 1 0 0 0 266 0 0 0 100 6 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 294 0 0 0 100 April 1, 2026 at 06:56:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2312 206 122 0 1 0 0 9 0 0 0 100 1 0 0 0 61 27 86 1 1 1 0 1095 0 0 0 100 2 0 0 0 58 25 50 0 1 0 0 0 0 0 0 100 3 0 0 7 12 4 8 0 0 0 0 560 0 0 0 100 4 0 0 0 8 2 2 0 0 0 0 300 0 0 0 100 5 0 0 15 212 103 6 0 0 0 0 266 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:56:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37337 0 102 2508 209 1277 41 195 155 77 4277 9 7 0 83 1 2351 0 141 529 14 968 19 141 164 49 4727 3 2 0 95 2 4397 0 229 552 9 955 13 125 196 59 4172 3 2 0 95 3 5871 0 19 369 27 1107 29 155 252 68 4277 2 2 0 96 4 3204 0 29 222 31 963 27 160 192 58 4346 2 2 0 97 5 1134 0 31 697 111 871 17 107 139 51 3922 2 1 0 97 6 6119 0 18 570 8 975 12 108 243 49 3571 2 2 0 96 7 4143 0 330 263 2 755 11 99 178 57 4466 2 2 0 96 April 1, 2026 at 06:56:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2313 201 112 0 0 0 0 0 0 0 0 100 1 0 0 0 29 1 36 1 1 0 0 1103 0 0 0 100 2 34 0 0 30 7 14 0 0 0 0 9 0 0 0 100 3 0 0 0 25 2 8 1 0 7 0 300 0 0 0 100 4 0 0 7 26 5 10 0 0 1 0 564 0 0 0 100 5 2 0 15 230 104 16 0 1 0 0 267 0 0 0 100 6 0 0 7 119 1 108 0 2 0 0 0 0 0 0 100 7 0 0 70 10 1 4 0 1 6 0 294 0 0 0 99 April 1, 2026 at 06:56:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 201 119 0 3 2 0 13 0 1 0 99 1 0 0 0 134 26 86 1 2 0 0 1094 0 0 0 100 2 0 0 0 93 7 14 0 0 0 0 9 0 0 0 100 3 0 0 462 22 2 10 0 2 3 0 300 0 0 0 100 4 0 0 7 84 4 6 0 0 1 0 560 0 0 0 100 5 0 0 21 300 111 18 0 0 1 0 276 0 0 0 100 6 0 0 0 137 2 65 0 1 0 0 19 0 0 0 100 7 0 0 0 87 1 10 0 1 0 0 294 0 0 0 100 April 1, 2026 at 06:56:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 201 104 0 0 0 0 0 0 0 0 100 1 0 0 0 110 52 134 1 0 0 0 1094 0 0 0 100 2 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 3 0 0 0 15 1 10 0 0 2 0 300 0 0 0 100 4 0 0 7 13 5 8 0 0 0 0 561 0 0 0 100 5 0 0 15 213 103 6 1 1 0 0 266 0 0 0 100 6 0 0 0 13 1 12 0 1 1 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:56:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2763 0 297 2399 202 1391 43 192 116 77 4575 2 2 0 96 1 3547 0 196 323 19 1212 28 174 129 74 5698 4 3 0 93 2 1065 0 17 212 19 1169 36 161 108 50 3937 3 2 0 96 3 11715 0 51 545 5 828 16 112 187 55 4539 4 3 0 93 4 39403 0 31 281 7 920 27 118 152 55 4974 8 7 0 85 5 3472 0 41 538 107 784 17 109 113 59 3091 3 1 0 96 6 2169 0 186 165 2 955 19 91 125 73 5659 2 2 0 96 7 597 0 12 373 2 692 11 99 113 54 2786 2 1 0 98 April 1, 2026 at 06:56:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 58 0 90 2320 206 222 0 9 110 0 22 0 1 0 99 1 18 0 0 149 42 210 1 9 97 0 1128 0 1 0 99 2 0 0 0 79 2 111 1 12 77 0 6 0 0 0 100 3 11 0 0 88 28 79 1 7 55 0 311 0 0 0 100 4 2 0 7 110 32 146 0 9 90 0 568 0 0 0 100 5 6 0 15 317 106 155 0 9 76 0 286 0 0 0 100 6 2 0 0 80 2 115 0 8 77 0 1 0 0 0 100 7 1 0 7 72 2 100 0 8 65 0 305 0 0 0 100 April 1, 2026 at 06:56:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 20 2318 207 126 0 3 4 0 9 0 1 0 99 1 0 0 14 115 49 141 1 3 5 0 1094 0 0 0 99 2 0 0 0 23 5 12 0 2 0 0 0 0 0 0 100 3 0 0 0 12 1 2 0 0 0 0 300 0 0 0 100 4 0 0 7 15 4 6 0 0 0 0 563 0 0 0 100 5 0 0 15 221 104 14 0 0 1 0 275 0 0 0 100 6 0 0 0 14 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 19 1 12 0 0 0 0 312 0 0 0 100 April 1, 2026 at 06:56:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2379 206 140 0 2 3 0 21 0 1 0 99 1 0 0 448 76 27 100 1 1 4 0 1093 0 1 0 99 2 0 0 0 131 28 56 0 1 1 0 0 0 0 0 100 3 0 0 0 78 2 2 0 0 2 0 300 0 0 0 100 4 0 0 7 84 6 8 0 0 2 0 562 0 0 0 100 5 0 0 21 297 112 20 1 0 2 0 276 0 0 0 100 6 0 0 0 84 2 14 0 0 1 0 20 0 0 0 100 7 0 0 0 85 2 8 0 1 1 0 294 0 0 0 100 April 1, 2026 at 06:56:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2280 0 442 2413 210 1163 40 191 139 71 4383 2 3 0 95 1 1578 0 4 248 3 1008 30 142 98 81 4474 2 2 0 97 2 1559 0 14 560 36 944 15 119 123 55 4131 3 2 0 95 3 11806 0 242 419 8 842 24 108 228 72 5189 3 3 0 94 4 7840 0 62 227 7 815 21 117 153 58 6363 4 3 0 94 5 1322 0 55 674 106 888 24 120 114 70 3345 1 1 0 97 6 36959 0 27 391 2 804 25 112 99 64 2965 9 6 0 85 7 616 0 22 414 7 759 11 92 86 48 2701 2 1 0 97 April 1, 2026 at 06:56:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 64 0 98 2316 207 135 0 7 7 0 28 0 1 0 99 1 18 0 0 86 4 114 1 4 8 0 1116 0 1 0 99 2 0 0 0 29 3 12 0 2 0 0 21 0 0 0 100 3 25 0 0 24 1 4 1 1 2 0 309 0 0 0 100 4 0 0 7 30 5 10 0 1 1 0 579 0 0 0 100 5 3 0 21 246 112 17 0 1 0 0 292 0 0 0 100 6 1 0 0 31 3 10 0 2 0 0 4 0 0 0 100 7 0 0 0 81 26 64 0 3 0 0 301 0 0 0 100 April 1, 2026 at 06:56:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 48 2387 208 172 0 8 102 0 10 0 1 0 99 1 0 0 462 155 7 214 0 14 59 0 1094 0 1 0 99 2 0 0 0 196 26 176 0 16 39 0 0 0 0 0 100 3 0 0 0 151 32 77 0 5 64 0 300 0 0 0 100 4 0 0 7 163 35 119 0 5 51 0 562 0 0 0 100 5 3 0 15 344 104 125 0 10 77 0 268 0 0 0 100 6 0 0 0 135 2 110 0 8 40 0 2 0 0 0 100 7 0 0 0 124 1 85 0 8 44 0 294 0 0 0 100 April 1, 2026 at 06:56:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2313 206 64 0 0 0 0 9 0 0 0 100 1 0 0 0 69 2 94 1 4 1 0 1094 0 0 0 100 2 0 0 0 109 51 102 0 2 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 1 0 0 300 0 0 0 100 4 0 0 7 13 5 8 0 0 0 0 562 0 0 0 100 5 0 0 15 210 103 4 1 0 0 0 266 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 8 0 1 0 0 294 0 0 0 100 April 1, 2026 at 06:56:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1289 0 132 2361 209 403 3 57 46 43 1129 1 1 0 98 1 413 0 5 278 4 395 5 48 41 19 2510 0 1 0 99 2 194 0 16 173 24 300 7 50 44 29 1026 0 1 0 99 3 6710 0 24 249 26 244 6 33 96 22 1555 2 1 0 97 4 2863 0 23 161 4 227 7 40 48 20 2953 1 1 0 98 5 440 0 29 356 113 222 2 28 21 24 1071 0 0 0 99 6 725 0 8 139 3 233 4 36 23 31 1772 1 1 0 98 7 889 0 192 125 1 221 3 40 25 26 941 0 0 0 99 April 1, 2026 at 06:56:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2252 0 273 2363 201 772 31 130 88 36 2977 2 2 0 95 1 34725 0 7 226 8 852 28 127 98 37 4923 7 6 0 86 2 554 0 17 124 12 625 21 101 68 25 2490 1 1 0 98 3 5648 0 188 189 25 842 13 77 83 39 2988 3 2 0 96 4 3791 0 15 406 13 687 8 64 97 45 2625 2 1 0 97 5 799 0 20 577 108 743 13 74 63 38 3222 2 1 0 97 6 671 0 8 257 1 532 10 70 60 27 2662 1 1 0 98 7 2484 0 16 119 3 553 7 64 57 23 2127 2 1 0 98 April 1, 2026 at 06:56:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2371 201 58 0 1 2 0 0 0 1 0 99 1 34 0 462 33 7 52 0 2 2 0 1103 0 1 0 99 2 0 0 0 82 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 185 29 104 0 5 0 0 0 0 0 0 100 4 0 0 7 132 25 54 0 4 0 0 563 0 0 0 100 5 2 0 21 293 105 12 0 2 0 0 565 0 0 0 100 6 0 0 0 86 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 86 3 6 0 0 0 0 296 0 0 0 100 April 1, 2026 at 06:56:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 202 143 0 7 86 0 1 0 1 0 99 1 0 0 0 65 7 125 1 5 72 0 1103 0 0 0 100 2 0 0 0 60 1 107 0 8 53 0 0 0 0 0 100 3 0 0 0 181 54 194 0 9 77 0 0 0 0 0 100 4 0 0 7 141 61 166 0 8 41 0 561 0 0 0 100 5 0 0 21 266 106 108 1 9 61 0 587 0 0 0 100 6 0 0 0 69 1 125 0 11 53 0 0 0 0 0 100 7 0 0 0 57 1 99 0 7 56 0 294 0 0 0 100 April 1, 2026 at 06:56:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 8 2304 201 28 0 2 1 0 0 0 0 0 100 1 0 0 0 27 6 50 1 0 0 0 1102 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 108 0 100 0 0 0 0 0 0 0 0 100 4 0 0 7 115 55 108 0 0 0 0 560 0 0 0 100 5 0 0 21 213 104 6 0 0 0 0 566 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 10 1 6 0 1 2 0 294 0 0 0 100 April 1, 2026 at 06:56:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4819 0 329 2458 202 1071 40 155 120 94 4563 4 2 0 93 1 34604 0 27 272 20 974 30 166 84 63 3842 8 6 0 86 2 1380 0 27 436 24 830 12 109 135 50 3427 1 2 0 97 3 2003 0 200 417 13 772 14 90 90 69 2991 2 2 0 96 4 2899 0 20 215 11 826 24 109 132 46 3732 2 2 0 97 5 9790 0 243 512 120 643 21 69 174 58 5029 4 2 0 94 6 6744 0 13 291 5 705 14 90 153 70 3493 2 2 0 96 7 2015 0 4 434 7 889 10 96 108 69 3686 2 1 0 97 April 1, 2026 at 06:56:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2309 201 56 0 3 7 0 0 0 1 0 99 1 34 0 0 139 35 126 0 3 6 0 33 0 0 0 100 2 0 0 0 72 25 82 0 2 0 0 1099 0 0 0 100 3 0 0 0 26 0 10 0 1 0 0 0 0 0 0 100 4 0 0 7 27 5 10 0 0 2 0 560 0 0 0 100 5 4 0 28 226 106 8 0 1 0 0 568 0 0 0 100 6 0 0 0 26 2 10 0 2 0 0 2 0 0 0 100 7 0 0 0 20 1 2 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:56:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2352 200 57 0 2 3 0 0 0 1 0 99 1 0 0 350 130 31 120 0 2 3 0 9 0 0 0 100 2 0 0 0 121 28 90 1 1 0 0 1091 0 0 0 100 3 0 0 0 73 0 16 0 1 0 0 0 0 0 0 100 4 0 0 7 69 5 8 0 0 2 0 562 0 0 0 100 5 0 0 21 271 104 8 1 0 0 0 567 0 0 0 100 6 0 0 0 65 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 63 1 2 0 0 0 0 294 0 0 0 100 April 1, 2026 at 06:56:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 116 2306 200 120 0 9 68 0 0 0 1 0 99 1 0 0 0 151 10 171 0 13 82 0 8 0 0 0 100 2 0 0 0 102 12 160 1 5 57 0 1091 0 0 0 100 3 0 0 0 180 66 175 0 10 56 0 0 0 0 0 100 4 0 0 7 105 34 118 0 10 67 0 561 0 0 0 100 5 0 0 16 287 104 125 0 12 60 0 565 0 0 0 100 6 0 0 0 72 2 99 0 7 40 0 2 0 0 0 100 7 0 0 0 69 1 94 0 10 70 0 294 0 0 0 100 April 1, 2026 at 06:56:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2628 0 306 2407 201 1413 43 191 122 71 5182 3 2 0 95 1 2721 0 391 570 8 1158 33 160 112 83 5339 2 2 0 95 2 1186 0 20 636 16 1311 34 150 120 87 6183 2 1 0 97 3 2234 0 21 305 25 1040 26 129 122 46 4158 3 1 0 96 4 533 0 21 282 7 951 28 132 84 44 3827 2 2 0 97 5 787 0 35 707 106 930 21 108 96 36 3882 2 1 0 96 6 43302 0 11 269 3 864 19 97 153 53 5375 9 8 0 83 7 10566 0 47 652 8 1028 18 95 200 50 3970 6 2 0 92 April 1, 2026 at 06:56:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 91 2313 205 133 0 2 6 0 42 0 1 0 99 1 18 0 0 32 5 16 0 1 6 0 9 0 0 0 100 2 1 0 0 85 32 96 0 3 0 0 1123 0 0 0 100 3 0 0 0 84 24 72 0 4 0 0 24 0 0 0 100 4 0 0 7 33 6 18 0 1 1 0 576 0 0 0 100 5 15 0 28 246 111 28 0 2 2 0 576 0 0 0 100 6 26 0 0 38 6 22 0 1 0 0 25 0 0 0 100 7 0 0 0 27 2 10 0 1 0 0 295 0 0 0 100 April 1, 2026 at 06:56:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2385 206 118 0 0 2 0 9 0 1 0 99 1 0 0 462 16 1 6 0 0 2 0 0 0 0 0 100 2 0 0 0 84 2 34 1 0 0 0 1091 0 0 0 100 3 0 0 0 186 50 108 0 0 0 0 0 0 0 0 100 4 0 0 7 87 5 8 0 0 2 0 563 0 0 0 100 5 0 0 21 293 106 14 1 1 2 0 602 0 0 0 100 6 0 0 0 81 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 82 1 6 0 2 0 0 294 0 0 0 100 April 1, 2026 at 06:56:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2316 206 102 0 1 0 0 9 0 0 0 100 1 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 12 3 36 1 0 0 0 1093 0 0 0 100 3 0 0 0 78 25 71 0 2 0 0 0 0 0 0 100 4 0 0 7 66 30 61 0 2 1 0 560 0 0 0 100 5 0 0 21 220 104 16 0 0 0 0 565 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 295 0 0 0 100 April 1, 2026 at 06:56:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9287 0 68 2485 210 831 13 127 237 67 4662 3 3 0 94 1 40633 0 208 361 3 629 18 98 176 67 3621 9 7 0 84 2 2194 0 229 309 6 733 14 92 165 71 3609 1 2 0 97 3 1339 0 23 374 27 674 9 94 206 62 2232 1 1 0 98 4 702 0 11 403 61 608 13 82 131 48 2183 1 1 0 98 5 682 0 53 594 120 668 7 87 166 38 2372 1 2 0 97 6 3524 0 191 211 3 660 12 102 217 65 2345 1 2 0 97 7 2456 0 7 288 1 598 11 89 175 58 3414 1 1 0 98 April 1, 2026 at 06:56:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 158 0 119 2325 204 616 16 72 13 0 2111 1 1 0 97 1 437 0 0 49 2 452 20 76 33 3 1514 1 1 0 98 2 258 0 0 60 7 490 21 51 19 1 2785 2 1 0 97 3 626 0 0 221 8 400 14 46 43 5 1160 1 0 0 99 4 323 0 7 241 5 427 6 31 21 2 1771 1 0 0 99 5 876 0 28 390 118 303 7 35 63 2 1655 2 0 0 98 6 640 0 0 68 10 510 7 31 26 2 1599 1 1 0 99 7 680 0 0 86 27 559 14 53 37 5 1520 1 1 0 99 April 1, 2026 at 06:56:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2384 207 145 0 3 3 0 315 0 1 0 99 1 0 0 462 45 15 30 0 1 2 0 0 0 0 0 100 2 0 0 0 106 13 56 1 1 2 0 1091 0 0 0 99 3 0 0 0 91 4 10 0 0 1 0 13 0 0 0 100 4 0 0 7 88 6 8 0 0 2 0 564 0 0 0 100 5 2 0 21 300 109 14 0 0 1 0 567 0 0 0 100 6 0 0 0 89 2 18 0 0 1 0 13 0 0 0 100 7 0 0 0 139 28 59 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:56:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 206 122 0 1 0 0 302 0 0 0 99 1 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 65 28 87 1 1 0 0 1090 0 0 0 100 3 0 0 0 58 25 54 0 1 0 0 0 0 0 0 100 4 0 0 7 12 4 6 0 0 2 0 559 0 0 0 100 5 0 0 21 214 103 6 0 0 1 0 565 0 0 0 100 6 0 0 0 13 2 12 0 1 0 0 2 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2318 206 118 0 1 0 0 302 0 0 0 100 1 0 0 0 61 27 56 0 1 0 0 0 0 0 0 100 2 0 0 0 13 3 36 1 0 0 0 1092 0 0 0 100 3 0 0 0 61 25 52 0 1 0 0 0 0 0 0 100 4 0 0 7 13 4 6 1 0 0 0 561 0 0 0 100 5 0 0 21 211 103 4 0 0 0 0 566 0 0 0 100 6 0 0 0 9 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13118 0 242 2495 206 1307 30 163 273 70 7347 5 4 0 91 1 34328 0 75 294 6 1212 15 130 208 67 5163 9 8 0 83 2 1447 0 6 567 15 1107 13 112 177 80 4360 2 1 0 97 3 1429 0 197 377 48 1009 22 123 140 50 2534 2 1 0 97 4 2752 0 129 292 59 1066 17 135 190 65 5130 2 2 0 96 5 1031 0 43 497 104 1102 20 130 153 45 3521 2 1 0 97 6 8421 0 16 261 5 697 22 88 105 38 2677 2 2 0 96 7 1584 0 189 354 2 702 8 72 229 41 2769 2 2 0 97 April 1, 2026 at 06:56:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2305 201 69 0 2 3 0 294 0 1 0 99 1 0 0 0 29 3 10 0 2 4 0 0 0 0 0 100 2 34 0 0 82 32 96 0 1 0 0 1100 0 0 0 100 3 0 0 0 17 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 129 30 110 0 2 1 0 563 0 0 0 100 5 2 0 28 224 103 6 0 0 0 0 568 0 0 0 100 6 0 0 0 22 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 28 1 10 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:56:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2374 201 82 0 3 2 0 306 0 1 0 99 1 0 0 462 18 1 4 0 1 2 0 0 0 0 0 100 2 0 0 0 152 33 99 1 3 0 0 1100 0 0 0 100 3 0 0 0 135 25 66 0 1 0 0 14 0 0 0 100 4 0 0 7 123 5 43 0 2 0 0 561 0 0 0 100 5 0 0 21 294 111 6 0 0 3 0 566 0 0 0 100 6 0 0 0 92 4 16 0 0 0 0 15 0 0 0 100 7 0 0 0 87 1 10 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:56:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 203 112 0 0 0 0 294 0 0 0 100 1 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 23 8 46 1 0 0 0 1098 0 0 0 100 3 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 4 0 0 7 24 6 16 1 0 0 0 559 0 0 0 100 5 0 0 21 216 105 12 0 3 2 0 568 0 0 0 100 6 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 14 1 13 0 3 1 0 0 0 0 0 100 April 1, 2026 at 06:56:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15411 0 217 2534 202 1306 43 189 227 65 6678 6 5 0 89 1 6483 0 141 585 11 1149 21 153 161 88 4591 3 2 0 95 2 1183 0 14 226 16 1121 23 159 117 75 3631 2 2 0 97 3 1464 0 15 505 32 860 17 98 86 37 3751 2 1 0 97 4 36292 0 201 297 6 923 38 123 74 70 6606 9 7 0 84 5 2097 0 228 373 108 991 21 113 100 69 4114 2 2 0 97 6 437 0 9 408 4 686 15 89 71 53 2784 2 1 0 98 7 562 0 8 365 2 656 18 77 113 42 2118 1 1 0 98 April 1, 2026 at 06:56:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 91 2319 205 249 0 12 69 0 312 0 1 0 99 1 6 0 0 65 1 82 0 13 65 0 18 0 0 0 100 2 29 0 0 87 3 133 0 8 103 0 10 0 0 0 100 3 0 0 0 141 50 171 0 9 84 0 1117 0 0 0 99 4 0 0 7 158 68 155 1 7 60 0 569 0 0 0 100 5 4 0 28 290 105 133 0 6 80 0 594 0 0 0 100 6 0 0 0 71 2 98 1 8 57 0 10 0 0 0 100 7 46 0 0 88 5 135 0 8 68 0 14 0 0 0 100 April 1, 2026 at 06:56:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2355 201 113 0 1 4 0 294 0 1 0 99 1 0 0 0 64 1 4 0 1 0 0 0 0 0 0 100 2 0 0 343 17 1 14 0 2 4 0 0 0 0 0 100 3 0 0 0 63 1 32 1 0 1 0 1092 0 0 0 100 4 0 0 7 166 54 108 0 1 1 0 564 0 0 0 100 5 0 0 21 280 106 16 0 1 1 0 577 0 0 0 100 6 0 0 0 64 2 8 0 1 0 0 2 0 0 0 100 7 0 0 0 75 7 18 0 0 0 0 27 0 0 0 100 April 1, 2026 at 06:56:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2323 201 131 0 1 0 0 307 0 0 0 100 1 0 0 0 28 2 2 0 0 1 0 0 0 0 0 100 2 0 0 119 13 3 6 0 0 2 0 0 0 0 0 100 3 0 0 0 36 4 42 0 0 1 0 1105 0 0 0 100 4 0 0 7 136 56 110 1 0 4 0 561 0 0 0 100 5 0 0 21 245 112 12 0 1 2 0 565 0 0 0 100 6 0 0 0 35 2 20 0 0 1 0 17 0 0 0 100 7 0 0 0 41 7 16 0 0 1 0 8 0 0 0 100 April 1, 2026 at 06:56:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10040 0 275 2405 202 1063 37 186 165 54 5299 3 3 0 94 1 6962 0 10 553 1 926 24 137 147 70 4183 3 2 0 95 2 3117 0 242 493 3 924 24 122 106 81 4734 2 2 0 95 3 2163 0 29 234 2 946 28 155 134 73 5850 2 2 0 96 4 4426 0 242 539 37 932 16 118 70 65 3669 4 2 0 94 5 2066 0 39 683 120 874 12 106 117 63 3774 2 1 0 96 6 34839 0 25 222 4 773 24 114 82 53 3894 7 7 0 86 7 1096 0 9 279 10 824 24 123 141 60 2638 1 1 0 97 April 1, 2026 at 06:56:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 91 2316 203 59 0 3 5 0 310 0 1 0 99 1 0 0 0 28 2 8 0 1 0 0 11 0 0 0 100 2 1 0 0 95 3 80 0 5 0 0 16 0 0 0 100 3 18 0 0 35 5 40 2 0 0 0 1122 0 0 0 100 4 23 0 7 33 5 18 0 1 5 0 568 0 0 0 100 5 41 0 28 286 127 74 0 1 3 0 599 0 0 0 100 6 0 0 0 87 32 70 0 2 0 0 19 0 0 0 100 7 3 0 0 29 3 10 0 2 0 0 4 0 0 0 100 April 1, 2026 at 06:56:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 201 128 0 5 86 0 293 0 1 0 99 1 0 0 0 128 3 94 0 10 72 0 0 0 0 0 100 2 0 0 0 233 0 209 0 8 73 0 0 0 0 0 100 3 1 0 0 154 29 115 1 5 60 0 1101 0 0 0 99 4 0 0 469 98 33 121 0 6 79 0 564 0 1 0 99 5 0 0 21 359 109 140 0 7 69 0 574 0 0 0 100 6 0 0 0 229 52 197 0 9 46 0 2 0 0 0 100 7 0 0 0 125 1 88 0 7 44 0 0 0 0 0 100 April 1, 2026 at 06:56:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2307 201 10 0 0 0 0 294 0 0 0 100 1 0 0 0 14 2 7 0 2 1 0 0 0 0 0 100 2 0 0 0 108 0 102 0 1 1 0 0 0 0 0 100 3 0 0 0 8 1 32 0 0 0 0 1100 0 0 0 100 4 0 0 7 16 6 10 1 0 3 0 561 0 0 0 100 5 0 0 16 220 108 14 0 0 1 0 574 0 0 0 100 6 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 7 0 0 0 9 2 6 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:56:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15258 0 59 2388 202 426 14 77 58 34 2396 4 3 0 93 1 9744 0 423 207 3 422 13 52 137 67 4539 3 3 0 94 2 2545 0 22 280 1 631 5 81 92 70 2126 1 1 0 98 3 732 0 8 270 2 442 8 66 66 46 2208 1 1 0 99 4 326 0 20 279 6 476 11 68 52 45 2268 0 0 0 99 5 289 0 36 439 118 345 5 46 53 33 3395 1 1 0 99 6 1560 0 57 374 54 417 3 51 60 36 1133 1 1 0 98 7 385 0 12 219 2 316 8 50 56 22 1125 1 1 0 99 April 1, 2026 at 06:56:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20765 0 112 2348 201 767 39 141 54 20 3053 5 6 0 89 1 885 0 0 357 5 600 17 86 72 11 2480 1 1 0 98 2 3782 0 2 70 2 665 28 94 95 13 2905 2 2 0 96 3 3475 0 2 94 3 743 28 104 78 14 3703 2 1 0 96 4 1511 0 193 346 7 693 21 67 68 22 2342 2 1 0 97 5 638 0 29 489 104 528 11 67 39 19 1993 1 1 0 99 6 1780 0 0 75 7 548 19 75 52 15 2155 2 1 0 97 7 662 0 15 388 46 550 12 60 16 11 1644 1 0 0 98 April 1, 2026 at 06:57:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 200 110 0 1 2 0 0 0 1 0 99 1 0 0 462 19 2 10 0 2 2 0 294 0 0 0 99 2 0 0 0 81 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 88 2 34 1 1 1 0 1091 0 0 0 100 4 34 0 7 98 11 20 0 0 0 0 573 0 0 0 100 5 3 0 21 286 103 6 0 0 1 0 566 0 0 0 100 6 0 0 0 85 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 184 52 104 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:57:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 201 210 0 10 82 0 1 0 1 0 99 1 0 0 0 63 3 94 0 10 91 0 294 0 0 0 100 2 0 0 0 57 1 103 0 9 86 0 0 0 0 0 100 3 0 0 0 88 29 139 1 10 80 0 1090 0 0 0 100 4 0 0 7 104 40 132 1 6 85 0 570 0 0 0 100 5 0 0 21 256 103 105 0 8 54 0 567 0 0 0 100 6 0 0 0 53 1 95 0 7 72 0 0 0 0 0 100 7 0 0 0 154 51 195 0 6 54 0 0 0 0 0 100 April 1, 2026 at 06:57:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2303 200 109 0 0 0 0 0 0 0 0 100 1 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 36 0 1 0 0 1092 0 0 0 100 4 0 0 7 26 10 28 0 1 3 0 568 0 0 0 100 5 0 0 15 211 103 4 0 0 1 0 565 0 0 0 100 6 0 0 0 13 3 12 0 1 0 0 2 0 0 0 100 7 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35153 0 81 2427 201 1149 30 148 123 57 4185 8 7 0 85 1 1903 0 142 256 31 994 20 123 115 62 3425 2 2 0 96 2 3302 0 28 439 5 837 16 100 122 51 2501 1 2 0 97 3 3380 0 191 378 7 670 15 81 116 48 4894 2 2 0 96 4 12691 0 360 233 13 806 18 87 166 89 6205 5 3 0 91 5 5239 0 47 724 113 825 19 100 124 99 3822 3 2 0 95 6 1782 0 12 458 6 871 15 99 114 69 3434 2 1 0 97 7 1134 0 12 325 26 782 8 84 102 64 3234 1 1 0 98 April 1, 2026 at 06:57:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2307 201 112 0 0 4 0 0 0 1 0 99 1 0 0 0 126 52 104 0 0 0 0 294 0 0 0 100 2 0 0 0 25 1 12 0 1 5 0 0 0 0 0 100 3 34 0 0 33 7 44 1 0 0 0 1100 0 0 0 100 4 4 0 21 27 6 12 0 1 3 0 828 0 0 0 100 5 0 0 14 228 102 12 0 1 2 0 300 0 0 0 100 6 0 0 0 24 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 19 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 48 2369 200 114 0 0 2 0 0 0 1 0 99 1 0 0 0 183 52 106 0 1 0 0 294 0 0 0 100 2 0 0 462 16 1 6 0 0 2 0 0 0 0 0 100 3 0 0 0 92 7 44 1 0 1 0 1100 0 0 0 99 4 0 0 21 87 6 10 1 0 0 0 829 0 0 0 100 5 0 0 1 293 102 14 0 0 1 0 300 0 0 0 100 6 0 0 0 80 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 80 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 201 194 0 5 77 0 0 0 1 0 99 1 0 0 0 156 52 194 0 7 54 0 294 0 0 0 100 2 0 0 0 52 1 88 0 8 75 0 0 0 0 0 100 3 0 0 0 90 35 134 0 6 60 0 1100 0 0 0 100 4 0 0 21 86 35 107 0 7 48 0 825 0 0 0 100 5 0 0 7 267 102 115 0 8 70 0 300 0 0 0 100 6 0 0 0 65 3 115 0 7 66 0 3 0 0 0 100 7 0 0 0 61 1 109 0 3 75 0 0 0 0 0 100 April 1, 2026 at 06:57:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35661 0 84 2494 200 1099 47 168 92 51 3789 8 7 0 85 1 2259 0 188 568 36 983 16 126 69 52 3881 2 1 0 96 2 3054 0 210 558 17 883 22 107 100 52 4497 2 2 0 96 3 1282 0 12 249 8 801 14 115 115 58 4136 2 2 0 97 4 11270 0 270 363 9 781 13 90 173 63 5469 4 3 0 93 5 8194 0 48 450 103 990 24 119 175 94 4202 4 2 0 94 6 1119 0 23 268 2 861 19 110 118 65 3810 2 2 0 96 7 1502 0 26 311 3 563 10 81 73 50 3090 2 1 0 98 April 1, 2026 at 06:57:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 91 2309 202 65 0 4 7 0 15 0 1 0 99 1 19 0 0 37 5 22 0 1 0 0 321 0 0 0 100 2 11 0 0 198 51 182 0 3 5 0 10 0 0 0 100 3 18 0 0 31 1 44 1 1 1 0 1129 0 0 0 100 4 8 0 21 31 6 16 0 1 3 0 841 0 0 0 100 5 6 0 14 235 108 8 0 1 4 0 303 0 0 0 100 6 46 0 0 49 9 39 0 0 0 0 33 0 0 0 100 7 0 0 0 35 3 20 0 2 0 0 13 0 0 0 100 April 1, 2026 at 06:57:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 201 12 0 1 2 0 6 0 1 0 99 1 0 0 462 20 2 8 0 1 3 0 295 0 0 0 100 2 0 0 0 283 51 206 0 0 0 0 0 0 0 0 100 3 0 0 0 83 1 32 1 0 1 0 1094 0 0 0 100 4 0 0 21 88 6 10 1 0 1 0 829 0 0 0 100 5 0 0 7 289 103 8 0 1 1 0 301 0 0 0 100 6 0 0 0 93 7 16 0 0 0 0 9 0 0 0 100 7 0 0 0 82 1 6 0 0 0 0 2 0 0 0 100 April 1, 2026 at 06:57:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 6 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 6 0 1 0 0 294 0 0 0 100 2 0 0 0 212 51 210 0 3 0 0 1 0 0 0 100 3 0 0 0 17 4 38 1 0 0 0 1096 0 0 0 100 4 0 0 21 14 6 10 0 0 0 0 826 0 0 0 100 5 0 0 7 214 103 4 0 1 0 0 300 0 0 0 100 6 0 0 0 22 7 16 0 0 0 0 10 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:57:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1296 0 80 2421 203 1209 36 189 224 73 3781 2 2 0 96 1 5881 0 60 393 5 1082 27 148 201 72 5584 5 3 0 92 2 35783 0 129 451 40 1266 33 151 162 68 4043 8 7 0 86 3 2215 0 16 518 33 984 14 139 174 63 5390 3 2 0 95 4 5125 0 328 531 46 968 22 117 189 66 4410 3 2 0 95 5 8175 0 203 666 106 857 11 98 255 67 3962 3 2 0 95 6 5754 0 17 450 10 882 10 103 178 54 3497 2 2 0 97 7 240 0 14 435 1 807 6 97 115 49 2579 1 1 0 98 April 1, 2026 at 06:57:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 90 2313 206 117 0 4 6 0 22 0 1 0 99 1 0 0 0 33 4 14 0 1 0 0 310 0 0 0 100 2 28 0 0 33 1 14 0 1 6 0 10 0 0 0 100 3 0 0 0 29 3 42 2 2 0 0 1122 0 0 0 100 4 24 0 21 36 9 18 0 1 1 0 834 0 0 0 100 5 0 0 1 328 152 108 0 2 0 0 315 0 0 0 100 6 0 0 7 28 3 12 0 2 0 0 11 0 0 0 100 7 0 0 0 27 3 12 0 1 1 0 5 0 0 0 100 April 1, 2026 at 06:57:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2382 206 90 0 2 2 0 9 0 1 0 99 1 0 0 0 92 3 14 0 0 1 0 306 0 0 0 100 2 0 0 462 17 1 4 0 1 3 0 0 0 0 0 100 3 0 0 0 98 4 54 1 1 1 0 1104 0 0 0 100 4 2 0 21 136 9 55 1 1 2 0 831 0 0 0 100 5 0 0 7 388 157 102 0 0 2 0 300 0 0 0 100 6 0 0 0 91 2 18 0 0 1 0 20 0 0 0 100 7 0 0 0 87 2 8 0 1 1 0 0 0 0 0 100 April 1, 2026 at 06:57:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2316 205 116 0 1 0 0 8 0 0 0 100 1 0 0 0 18 2 11 0 3 0 0 294 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 13 2 36 1 1 1 0 1096 0 0 0 100 4 2 0 21 20 7 14 0 2 2 0 828 0 0 0 100 5 0 0 7 312 152 104 0 1 1 0 300 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 7 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 49 0 7 2327 207 182 0 15 7 8 140 0 0 0 99 1 38 0 0 30 2 35 0 8 3 8 354 0 0 0 100 2 12 0 3 27 0 32 0 7 6 4 45 0 0 0 100 3 18 0 15 29 2 62 2 4 2 0 1150 0 1 0 99 4 26 0 21 31 7 51 2 7 22 7 893 0 0 0 100 5 2370 0 21 338 153 161 1 12 51 13 760 0 1 0 99 6 20 0 7 31 1 36 0 8 3 4 88 0 0 0 100 7 389 0 2 27 1 42 0 7 10 7 96 0 0 0 100 April 1, 2026 at 06:57:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2636 0 91 2503 207 1410 53 233 205 45 4446 3 2 0 95 1 3376 0 334 291 3 1286 34 183 203 48 6439 4 2 0 94 2 2634 0 193 560 1 1040 14 128 202 57 4167 2 2 0 96 3 34733 0 14 336 33 1105 29 157 98 60 6598 8 6 0 86 4 960 0 27 236 36 1168 33 178 198 48 4858 3 2 0 96 5 7497 0 82 784 153 1007 29 129 214 47 4172 3 3 0 95 6 8282 0 20 544 3 946 29 129 231 67 3628 4 2 0 94 7 1537 0 138 517 5 1031 18 120 156 54 2972 2 1 0 97 April 1, 2026 at 06:57:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2373 202 114 0 1 2 0 0 0 1 0 99 1 0 0 0 87 2 6 0 0 0 0 294 0 0 0 100 2 0 0 462 14 0 6 0 2 2 0 0 0 0 0 100 3 0 0 0 85 2 32 1 0 0 0 1095 0 0 0 100 4 2 0 21 91 7 12 1 0 2 0 830 0 0 0 100 5 34 0 7 299 107 14 0 0 0 0 9 0 0 0 100 6 0 0 0 187 52 116 0 2 1 0 300 0 0 0 100 7 0 0 0 82 0 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 104 0 2 0 0 0 0 0 0 100 1 0 0 0 16 2 14 0 1 0 0 306 0 0 0 100 2 0 0 0 17 1 6 0 1 0 0 0 0 0 0 100 3 0 0 0 21 3 46 2 0 0 0 1104 0 0 0 100 4 0 0 21 14 6 10 0 0 1 0 825 0 0 0 100 5 0 0 7 229 115 12 0 0 2 0 9 0 0 0 100 6 0 0 0 130 53 128 0 0 1 0 322 0 0 0 100 7 0 0 0 9 0 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:57:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 112 0 0 0 0 0 0 0 0 100 1 0 0 0 15 4 8 0 1 0 0 318 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 8 1 32 0 0 0 0 1093 0 0 0 100 4 0 0 21 15 6 12 1 0 1 0 827 0 0 0 100 5 0 0 7 221 107 12 0 0 0 0 9 0 0 0 100 6 0 0 0 114 52 108 0 0 0 0 300 0 0 0 100 7 0 0 0 9 0 6 0 1 1 0 0 0 0 0 100 April 1, 2026 at 06:57:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36529 0 384 2383 202 1093 43 160 137 80 4696 8 8 0 84 1 1406 0 11 610 10 921 16 118 108 60 4168 2 1 0 98 2 1243 0 2 322 26 874 24 131 104 56 2988 1 1 0 98 3 1682 0 122 202 5 953 27 119 102 77 5512 2 1 0 96 4 2831 0 58 445 7 732 19 105 127 68 3782 2 2 0 96 5 7255 0 194 646 109 853 22 100 168 57 3814 3 2 0 94 6 6891 0 22 223 18 735 16 109 149 71 3708 2 3 0 95 7 6278 0 52 309 5 577 18 79 97 55 2921 3 1 0 95 April 1, 2026 at 06:57:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 91 2313 202 123 0 10 101 0 16 0 1 0 99 1 34 0 7 184 7 210 0 7 59 0 319 0 0 0 100 2 13 0 0 90 0 141 1 8 78 0 19 0 0 0 100 3 25 0 0 202 84 226 1 8 76 0 1108 0 1 0 99 4 15 0 21 98 40 116 1 7 61 0 838 0 0 0 100 5 0 0 7 271 101 96 0 11 71 0 4 0 0 0 100 6 0 0 0 68 2 90 0 7 56 0 307 0 0 0 100 7 25 0 0 96 0 159 0 10 93 0 9 0 0 0 100 April 1, 2026 at 06:57:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2356 201 6 0 0 3 0 0 0 1 0 99 1 0 0 0 184 9 124 0 1 2 0 304 0 0 0 100 2 0 0 350 15 0 8 0 3 3 0 0 0 0 0 100 3 0 0 0 170 52 141 1 3 0 0 1093 0 0 0 99 4 0 0 21 67 6 10 0 0 1 0 829 0 0 0 100 5 0 0 7 267 102 6 0 0 0 0 9 0 0 0 100 6 0 0 0 66 3 8 0 0 2 0 302 0 0 0 100 7 0 0 0 62 0 6 0 0 0 0 18 0 0 0 100 April 1, 2026 at 06:57:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2304 201 19 0 2 0 0 0 0 1 0 99 1 1 0 0 147 8 126 0 1 1 0 313 0 0 0 100 2 0 0 0 30 1 2 0 0 1 0 0 0 0 0 100 3 0 0 0 95 31 96 1 0 1 0 1111 0 0 0 100 4 0 0 21 89 33 68 1 3 1 0 828 0 0 0 100 5 0 0 7 237 109 4 0 1 2 0 0 0 0 0 100 6 0 0 0 38 3 20 0 0 2 0 314 0 0 0 100 7 0 0 0 29 1 2 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:57:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1565 0 100 2429 202 1222 22 168 148 94 3839 3 2 0 95 1 1776 0 197 378 19 1193 10 123 92 69 4042 2 1 0 97 2 2068 0 124 448 1 776 6 87 82 59 3590 2 1 0 97 3 2982 0 25 440 2 743 17 77 73 39 3367 2 1 0 96 4 1741 0 35 485 29 738 10 78 85 40 3866 2 2 0 96 5 6101 0 150 376 112 900 25 100 151 58 4916 2 2 0 95 6 42205 0 205 270 5 826 23 111 195 63 4532 8 8 0 84 7 5859 0 28 310 7 936 14 89 138 70 4656 3 2 0 95 April 1, 2026 at 06:57:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 91 2317 208 131 0 2 5 0 16 0 1 0 99 1 0 0 0 135 52 122 0 5 5 0 306 0 0 0 100 2 28 0 0 27 1 8 0 1 0 0 10 0 0 0 100 3 0 0 7 28 2 38 1 2 0 0 1118 0 0 0 100 4 8 0 21 40 8 18 1 2 2 0 838 0 0 0 100 5 0 0 7 231 102 8 0 1 2 0 16 0 0 0 100 6 2 0 0 36 3 24 0 2 0 0 315 0 0 0 100 7 24 0 0 30 3 12 0 1 0 0 10 0 0 0 100 April 1, 2026 at 06:57:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2390 207 163 0 10 98 0 9 0 1 0 99 1 0 0 462 237 54 274 0 13 84 0 294 0 1 0 99 2 0 0 0 132 0 106 0 9 64 0 0 0 0 0 100 3 0 0 0 156 29 120 1 4 70 0 1094 0 0 0 99 4 0 0 21 142 33 96 0 6 39 0 830 0 0 0 100 5 0 0 7 324 101 87 0 6 89 0 0 0 0 0 100 6 0 0 0 137 5 107 0 7 79 0 302 0 0 0 100 7 0 0 0 151 0 149 0 5 78 0 0 0 0 0 100 April 1, 2026 at 06:57:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2313 206 14 0 0 0 0 8 0 0 0 100 1 0 0 0 162 26 158 0 0 0 0 294 0 0 0 100 2 0 0 0 61 27 54 0 1 0 0 0 0 0 0 100 3 0 0 0 8 1 34 0 1 0 0 1095 0 0 0 100 4 0 0 21 15 7 12 1 0 0 0 826 0 0 0 100 5 0 0 1 209 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 12 3 8 0 0 1 0 301 0 0 0 100 7 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:57:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 486 0 50 2393 210 525 9 85 57 65 1944 1 1 0 98 1 1185 0 122 221 3 509 12 64 56 41 1645 1 1 0 98 2 1509 0 192 270 45 472 10 68 54 36 1951 1 1 0 98 3 36223 0 26 286 3 341 9 44 42 40 3115 7 6 0 87 4 768 0 42 250 7 420 8 59 53 41 3993 1 1 0 98 5 103 0 37 435 114 332 2 55 82 42 1611 0 1 0 99 6 8356 0 133 198 5 359 5 52 144 54 4096 2 3 0 96 7 2940 0 13 233 1 366 3 44 91 44 1237 1 1 0 98 April 1, 2026 at 06:57:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1217 0 119 2353 204 478 25 72 51 18 1617 2 2 0 96 1 1111 0 0 83 6 393 11 55 47 9 1790 2 1 0 98 2 220 0 0 185 2 286 8 32 15 9 1044 1 0 0 99 3 1670 0 183 78 3 428 9 44 41 15 2042 1 1 0 98 4 700 0 21 184 7 306 6 29 38 23 2011 1 0 0 99 5 930 0 7 453 145 376 6 32 29 11 1272 1 0 0 99 6 3980 0 16 259 12 316 7 24 43 11 1331 2 1 0 97 7 2434 0 8 222 1 398 13 37 47 16 1407 1 1 0 99 April 1, 2026 at 06:57:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 201 92 0 2 2 0 0 0 1 0 99 1 0 0 462 23 2 10 0 1 2 0 294 0 0 0 100 2 0 0 0 81 1 2 0 0 0 0 1 0 0 0 100 3 34 0 0 116 8 64 0 3 0 0 1103 0 0 0 99 4 2 0 21 90 6 16 0 3 1 0 830 0 0 0 100 5 0 0 7 281 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 186 53 108 0 0 0 0 302 0 0 0 100 7 0 0 0 82 1 4 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:57:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 224 0 11 64 0 1 0 1 0 99 1 0 0 0 55 2 89 0 9 48 0 294 0 0 0 100 2 0 0 0 62 0 114 0 8 59 0 0 0 0 0 100 3 0 0 0 99 37 141 1 9 56 0 1104 0 0 0 99 4 0 0 21 91 37 119 1 9 43 0 827 0 0 0 100 5 0 0 7 252 101 83 0 7 68 0 0 0 0 0 100 6 0 0 0 67 10 100 0 3 70 0 300 0 0 0 100 7 0 0 0 154 44 206 0 6 35 0 21 0 0 0 100 April 1, 2026 at 06:57:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 106 0 1 0 0 0 0 0 0 100 1 0 0 0 11 2 4 0 0 0 0 294 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 23 7 46 1 0 1 0 1103 0 0 0 100 4 0 0 21 28 7 25 0 3 3 0 826 0 0 0 100 5 0 0 7 209 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 13 3 8 0 0 0 0 302 0 0 0 100 7 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2039 0 95 2430 203 1412 42 211 152 92 5159 2 2 0 96 1 1366 0 16 319 7 1110 49 188 122 59 6161 4 2 0 95 2 2661 0 127 169 3 1062 35 178 87 68 3932 2 2 0 96 3 2316 0 224 229 8 1112 33 140 115 74 5131 3 3 0 94 4 1111 0 45 200 13 977 29 144 87 68 4164 1 1 0 97 5 3042 0 21 579 145 964 17 123 146 48 3119 3 1 0 96 6 10849 0 308 271 5 945 26 117 195 49 4242 3 3 0 94 7 40655 0 40 326 11 896 22 115 198 55 4372 8 7 0 85 April 1, 2026 at 06:57:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2307 201 114 0 0 5 0 0 0 1 0 99 1 0 0 7 28 2 12 0 1 5 0 294 0 0 0 100 2 34 0 0 31 6 14 0 0 0 0 9 0 0 0 100 3 0 0 0 22 1 32 1 0 0 0 1094 0 0 0 100 4 2 0 21 32 7 16 0 0 2 0 828 0 0 0 100 5 0 0 7 326 151 108 0 1 1 0 0 0 0 0 100 6 0 0 0 26 3 8 0 0 1 0 302 0 0 0 100 7 0 0 0 17 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 201 109 0 2 2 0 0 0 1 0 99 1 0 0 462 20 2 8 0 0 2 0 294 0 0 0 100 2 0 0 0 94 6 16 0 2 0 0 10 0 0 0 100 3 0 0 0 81 1 32 1 0 0 0 1095 0 0 0 100 4 0 0 21 88 7 12 1 0 0 0 826 0 0 0 100 5 0 0 7 385 153 102 0 0 0 0 0 0 0 0 100 6 0 0 0 97 3 20 0 3 0 0 301 0 0 0 100 7 0 0 0 79 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 202 225 0 8 117 0 0 0 1 0 99 1 0 0 0 58 2 88 0 6 58 0 294 0 0 0 100 2 0 0 0 59 5 93 0 5 72 0 8 0 0 0 100 3 0 0 0 92 30 138 1 6 78 0 1094 0 0 0 100 4 1 0 21 85 36 123 0 9 68 0 826 0 0 0 100 5 0 0 7 355 151 197 0 6 76 0 0 0 0 0 100 6 0 0 0 62 4 106 0 5 86 0 303 0 0 0 100 7 0 0 0 78 0 146 0 6 75 0 0 0 0 0 100 April 1, 2026 at 06:57:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6977 0 251 2397 204 994 34 168 196 68 4917 3 3 0 95 1 1993 0 13 559 26 942 29 138 88 60 3007 3 1 0 96 2 844 0 17 435 7 773 22 105 93 59 3438 2 1 0 96 3 34717 0 22 300 1 952 28 155 91 85 3408 7 7 0 86 4 1659 0 52 516 9 770 12 99 98 55 5483 2 2 0 96 5 3587 0 23 483 129 852 22 104 126 43 2843 3 1 0 96 6 6155 0 386 400 4 598 17 83 109 52 3938 3 2 0 95 7 8539 0 123 199 0 876 17 102 219 81 4871 2 2 0 96 April 1, 2026 at 06:57:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 21 2316 201 17 1 1 1 0 7 0 0 0 99 1 0 0 0 137 54 126 0 1 5 0 321 0 0 0 100 2 29 0 0 29 2 12 1 2 0 0 10 0 0 0 100 3 0 0 7 31 1 14 0 3 0 0 11 0 0 0 100 4 54 0 91 41 11 69 0 3 6 0 1962 0 1 0 99 5 0 0 7 237 111 6 0 0 0 0 14 0 0 0 100 6 18 0 0 43 7 30 0 2 2 0 324 0 0 0 100 7 1 0 0 128 1 112 0 2 0 0 15 0 0 0 100 April 1, 2026 at 06:57:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2341 201 4 0 0 0 0 0 0 0 0 100 1 0 0 231 115 53 108 0 0 4 0 294 0 0 0 100 2 0 0 0 40 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 50 0 12 0 1 0 0 0 0 0 0 100 4 1 0 28 69 14 63 2 2 6 0 1987 0 1 0 99 5 0 0 7 245 102 2 0 0 0 0 1 0 0 0 100 6 0 0 0 45 2 6 0 0 1 0 300 0 0 0 100 7 0 0 0 140 0 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2346 201 6 0 0 0 0 0 0 1 0 99 1 0 0 0 150 53 106 0 0 0 0 294 0 0 0 100 2 0 0 0 51 1 8 0 0 1 0 1 0 0 0 100 3 0 0 0 52 0 8 0 0 0 0 0 0 0 0 100 4 0 0 56 65 12 58 1 0 1 0 1924 0 1 0 99 5 0 0 238 215 101 2 0 1 1 0 0 0 0 0 100 6 0 0 0 51 3 8 0 0 1 0 302 0 0 0 100 7 0 0 0 147 1 104 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:57:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 41727 0 107 2467 203 1183 43 201 234 66 5281 11 8 0 81 1 833 0 18 423 35 1316 37 155 159 72 4222 2 2 0 96 2 1858 0 24 627 2 1155 21 148 183 60 3299 2 2 0 97 3 2002 0 7 600 32 1064 34 130 176 60 4894 2 2 0 96 4 2676 0 265 489 45 898 20 98 144 68 6234 2 2 0 96 5 2323 0 53 887 117 1079 19 125 186 62 3186 2 1 0 96 6 1142 0 11 467 2 919 16 124 190 41 3317 2 1 0 97 7 11505 0 383 509 0 919 14 103 239 68 4317 3 4 0 93 April 1, 2026 at 06:57:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 91 2309 202 67 0 5 6 0 17 0 1 0 99 1 0 0 0 33 5 12 0 0 0 0 311 0 0 0 100 2 0 0 0 33 4 12 0 2 1 0 10 0 0 0 100 3 28 0 0 26 2 6 0 1 0 0 10 0 0 0 100 4 51 0 21 54 12 68 1 2 2 0 1949 0 0 0 99 5 0 0 14 328 152 108 0 2 7 0 16 0 0 0 100 6 0 0 0 77 3 60 0 0 2 0 310 0 0 0 100 7 19 0 0 34 4 14 0 2 0 0 10 0 0 0 100 April 1, 2026 at 06:57:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2371 201 88 0 1 3 0 0 0 1 0 99 1 0 0 0 94 3 18 0 2 1 0 306 0 0 0 100 2 0 0 0 82 2 2 0 0 1 0 0 0 0 0 100 3 0 0 0 85 2 6 0 0 1 0 0 0 0 0 100 4 0 0 21 143 17 98 0 5 2 0 1938 0 1 0 99 5 0 0 469 280 131 58 0 4 4 0 0 0 0 0 100 6 0 0 0 92 3 22 0 2 2 0 320 0 0 0 100 7 0 0 0 135 27 56 0 1 1 0 0 0 0 0 100 April 1, 2026 at 06:57:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 106 0 1 0 0 0 0 0 0 100 1 0 0 0 14 2 8 0 1 0 0 294 0 0 0 100 2 0 0 0 15 1 5 0 2 0 0 0 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 21 27 12 52 1 0 2 0 1927 0 0 0 99 5 0 0 7 213 101 2 0 0 0 0 0 0 0 0 100 6 0 0 0 18 3 18 0 1 0 0 302 0 0 0 100 7 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2497 0 62 2387 201 547 7 87 95 58 2814 1 2 0 97 1 1811 0 41 305 6 384 9 65 47 51 1619 1 1 0 98 2 1567 0 207 133 0 436 8 65 50 59 1996 1 1 0 98 3 8742 0 123 247 0 401 2 52 50 46 1931 2 1 0 97 4 227 0 31 253 15 436 13 62 52 41 3208 1 1 0 99 5 397 0 17 412 101 311 5 44 46 34 1087 1 0 0 99 6 1448 0 11 204 2 306 8 46 56 28 1541 1 1 0 98 7 7754 0 118 213 46 453 2 45 124 52 3856 2 2 0 96 April 1, 2026 at 06:57:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5295 0 123 2411 202 716 28 94 147 11 2446 3 2 0 95 1 1531 0 3 465 9 919 9 72 103 29 2930 2 1 0 97 2 949 0 181 64 7 638 19 73 117 26 1976 1 1 0 98 3 26608 0 7 92 31 598 23 78 120 19 1938 6 5 0 89 4 1426 0 21 110 48 609 4 57 104 12 3304 2 1 0 97 5 829 0 2 319 132 546 23 67 129 11 1145 1 1 0 98 6 391 0 0 59 3 519 19 58 119 9 1694 1 1 0 98 7 3195 0 2 56 2 558 11 49 176 16 1863 1 1 0 98 April 1, 2026 at 06:57:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 201 14 0 0 2 0 0 0 1 0 99 1 0 0 0 189 2 118 0 2 0 0 294 0 0 0 100 2 0 0 0 80 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 82 1 2 0 0 0 0 0 0 0 0 100 4 36 0 21 106 15 58 0 0 0 0 1935 0 0 0 99 5 0 0 469 309 147 92 0 0 1 0 0 0 0 0 100 6 0 0 0 93 6 18 0 1 0 0 301 0 0 0 100 7 0 0 0 83 0 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 8 0 0 0 0 0 0 0 0 100 1 0 0 0 118 2 118 0 2 0 0 306 0 0 0 100 2 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 2 1 0 0 0 0 0 100 4 0 0 21 41 15 68 1 0 1 0 1944 0 0 0 99 5 0 0 7 215 107 0 0 0 0 0 0 0 0 0 100 6 0 0 0 65 27 67 0 1 1 0 322 0 0 0 100 7 0 0 0 62 26 56 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:57:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 203 89 0 3 0 0 0 0 0 0 100 1 0 0 0 52 4 42 0 0 2 0 294 0 0 0 100 2 0 0 0 14 2 14 0 2 1 0 0 0 0 0 100 3 0 0 0 9 1 6 0 2 2 0 0 0 0 0 100 4 0 0 21 30 13 54 3 0 3 0 1930 0 0 0 99 5 0 0 7 213 103 4 0 0 0 0 1 0 0 0 100 6 0 0 0 11 2 6 0 0 1 0 300 0 0 0 100 7 0 0 0 108 51 102 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:57:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8207 0 387 2405 206 1028 25 147 175 70 5074 4 3 0 93 1 37560 0 54 369 4 1101 30 139 138 81 5219 10 7 0 84 2 1846 0 16 375 27 963 18 125 121 83 4640 2 2 0 97 3 2191 0 122 477 4 966 15 98 94 60 3146 2 1 0 97 4 2895 0 50 490 21 832 13 99 74 51 5089 2 1 0 96 5 476 0 24 604 105 793 11 91 64 56 3082 1 1 0 97 6 732 0 10 405 3 710 10 82 155 40 2941 1 1 0 97 7 10183 0 184 374 20 682 18 74 153 56 3515 2 3 0 95 April 1, 2026 at 06:57:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2316 202 132 0 8 66 0 1 0 1 0 99 1 0 0 7 82 3 110 0 6 54 0 294 0 0 0 100 2 0 0 0 63 0 92 0 9 56 0 0 0 0 0 100 3 34 0 0 106 35 105 1 8 65 0 9 0 0 0 100 4 3 0 21 217 57 246 2 9 65 0 1923 0 1 0 99 5 0 0 7 346 134 182 0 10 54 0 1 0 0 0 100 6 0 0 0 67 1 96 0 9 78 0 299 0 0 0 100 7 0 0 0 73 1 107 0 7 58 0 21 0 0 0 100 April 1, 2026 at 06:57:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 47 2369 201 10 0 0 2 0 0 0 1 0 99 1 0 0 0 85 3 8 0 0 0 0 294 0 0 0 100 2 0 0 0 77 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 92 6 14 0 1 0 0 9 0 0 0 100 4 0 0 483 130 8 154 1 1 3 0 1928 0 1 0 99 5 0 0 1 392 152 116 0 1 0 0 9 0 0 0 100 6 0 0 0 82 2 8 0 1 0 0 302 0 0 0 100 7 0 0 0 79 0 4 0 0 0 0 18 0 0 0 100 April 1, 2026 at 06:57:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 18 0 1 0 0 0 0 0 0 100 1 0 0 0 18 4 14 0 0 1 0 306 0 0 0 100 2 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 3 0 0 0 18 6 10 0 0 1 0 8 0 0 0 100 4 0 0 21 135 11 164 3 1 1 0 1933 0 0 0 99 5 0 0 7 324 160 104 0 1 1 0 0 0 0 0 100 6 0 0 0 18 2 18 0 1 1 0 321 0 0 0 100 7 0 0 0 11 1 2 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:57:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 41478 0 88 2433 202 1055 55 197 163 71 4509 9 8 0 83 1 5305 0 18 484 4 826 24 124 129 63 4142 2 2 0 96 2 2079 0 122 476 3 850 21 112 82 56 4025 2 1 0 97 3 4479 0 327 337 8 857 34 131 99 49 3172 3 2 0 96 4 2146 0 30 290 9 973 18 129 114 78 7008 2 2 0 96 5 3596 0 36 695 134 750 20 95 111 55 2552 2 1 0 97 6 1852 0 201 399 3 690 17 85 75 48 3246 2 2 0 96 7 2919 0 13 428 17 714 12 90 140 50 4017 2 2 0 96 April 1, 2026 at 06:57:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 91 2307 201 114 0 2 6 0 9 0 1 0 99 1 35 0 0 44 7 24 0 3 0 0 317 0 0 0 100 2 2 0 0 31 2 12 0 0 1 0 5 0 0 0 100 3 0 0 7 24 1 6 0 1 0 0 9 0 0 0 100 4 23 0 21 37 8 50 1 0 7 0 1943 0 1 0 99 5 29 0 7 230 103 10 0 1 0 0 25 0 0 0 100 6 0 0 0 35 3 20 0 2 2 0 318 0 0 0 100 7 0 0 0 122 50 102 0 1 0 0 1 0 0 0 100 April 1, 2026 at 06:57:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2375 201 199 0 7 79 0 0 0 1 0 99 1 0 0 0 151 8 119 0 12 52 0 302 0 0 0 100 2 0 0 0 132 1 108 0 8 59 0 0 0 0 0 100 3 0 0 0 152 27 91 0 4 77 0 0 0 0 0 100 4 0 0 483 91 35 128 0 10 62 0 1928 0 1 0 99 5 0 0 7 327 101 95 0 6 79 0 0 0 0 0 100 6 0 0 0 137 4 110 0 8 43 0 303 0 0 0 100 7 0 0 0 225 50 193 0 6 49 0 0 0 0 0 100 April 1, 2026 at 06:57:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 201 40 0 1 0 0 0 0 0 0 100 1 0 0 0 22 8 16 0 0 0 0 302 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 21 19 8 44 3 0 0 0 1920 0 0 0 99 5 0 0 1 209 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 79 2 78 0 2 1 0 300 0 0 0 100 7 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9506 0 380 2396 201 1339 54 238 155 66 5441 4 4 0 92 1 6248 0 29 235 12 1153 32 199 140 63 5750 4 2 0 93 2 4675 0 27 700 3 1102 29 164 139 61 3900 2 2 0 96 3 932 0 14 275 1 1066 28 168 103 70 3612 2 1 0 97 4 2607 0 155 304 12 1155 30 158 81 61 8251 3 2 0 95 5 2884 0 202 696 110 929 18 126 92 67 3955 2 1 0 96 6 718 0 19 205 3 959 21 154 73 48 4068 2 2 0 97 7 36490 0 37 381 38 926 20 123 117 31 4223 8 6 0 85 April 1, 2026 at 06:57:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 91 2307 201 117 0 6 6 0 32 0 1 0 99 1 40 0 0 55 9 33 0 3 5 0 313 0 0 0 100 2 0 0 0 28 1 10 0 3 0 0 25 0 0 0 100 3 6 0 0 29 3 8 0 1 0 0 15 0 0 0 100 4 36 0 21 81 28 95 1 1 7 0 1936 0 1 0 99 5 0 0 14 290 132 72 0 5 0 0 4 0 0 0 100 6 18 0 0 39 7 21 0 2 2 0 313 0 0 0 100 7 16 0 0 24 1 3 0 2 0 0 20 0 0 0 100 April 1, 2026 at 06:58:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 201 113 0 1 2 0 0 0 1 0 99 1 0 0 0 98 9 20 0 1 0 0 303 0 0 0 100 2 0 0 0 85 1 2 0 1 0 0 0 0 0 0 100 3 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 4 2 0 483 25 7 46 1 1 2 0 1917 0 1 0 99 5 0 0 7 383 151 102 0 1 0 0 0 0 0 0 100 6 0 0 0 85 2 8 0 1 1 0 302 0 0 0 100 7 0 0 0 80 1 2 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:58:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 203 131 0 7 80 0 1 0 1 0 99 1 0 0 0 152 9 207 0 12 65 0 302 0 0 0 100 2 0 0 0 56 0 104 0 11 71 0 0 0 0 0 100 3 0 0 0 84 32 98 0 8 59 0 0 0 0 0 100 4 0 0 21 93 38 132 1 9 86 0 1916 0 1 0 99 5 0 0 7 372 152 224 0 12 84 0 1 0 0 0 100 6 0 0 0 63 1 111 0 10 76 0 300 0 0 0 100 7 0 0 0 50 0 89 0 8 45 0 0 0 0 0 100 April 1, 2026 at 06:58:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 21 2310 201 113 0 11 25 4 116 0 1 0 99 1 2379 0 2 97 10 108 1 11 32 10 777 0 1 0 99 2 22 0 0 32 1 40 0 5 8 5 62 0 0 0 100 3 32 0 2 33 0 63 0 13 7 11 92 0 0 0 100 4 22 0 23 36 7 80 5 7 4 6 1956 0 0 0 99 5 9 0 7 318 151 113 0 4 3 2 29 0 0 0 100 6 16 0 10 26 2 28 0 2 2 3 343 0 0 0 100 7 235 0 7 32 0 49 1 8 4 5 117 0 1 0 99 April 1, 2026 at 06:58:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1773 0 257 2404 203 1335 45 200 85 62 4319 3 3 0 94 1 1208 0 13 570 5 889 24 123 88 32 3722 1 2 0 97 2 4140 0 194 193 2 926 39 132 183 50 3951 3 2 0 95 3 11003 0 220 484 4 716 12 75 123 43 4007 4 3 0 93 4 5717 0 43 584 13 944 20 106 105 64 5432 3 2 0 95 5 34668 0 25 542 112 983 23 126 97 67 3717 8 6 0 86 6 1206 0 25 376 8 734 14 103 90 48 2798 1 1 0 98 7 1719 0 118 475 48 898 24 89 82 54 5747 2 1 0 97 April 1, 2026 at 06:58:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 201 116 0 0 2 0 0 0 1 0 99 1 34 0 462 36 10 24 0 0 2 0 327 0 0 0 99 2 0 0 0 88 0 10 0 0 0 0 0 0 0 0 100 3 0 0 0 82 1 2 0 0 0 0 0 0 0 0 100 4 2 0 21 91 7 40 0 0 2 0 1920 0 0 0 99 5 0 0 7 282 101 2 0 1 0 0 0 0 0 0 100 6 0 0 0 86 2 10 0 1 2 0 302 0 0 0 100 7 0 0 0 178 50 102 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:58:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 110 0 2 0 0 0 0 0 0 100 1 0 0 0 34 9 24 0 1 0 0 303 0 0 0 100 2 0 0 0 13 0 10 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 16 6 40 2 0 2 0 1919 0 0 0 100 5 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 4 0 0 1 0 300 0 0 0 100 7 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 201 195 0 8 76 0 0 0 0 0 100 1 0 0 0 84 9 121 0 9 72 0 303 0 0 0 100 2 0 0 0 54 0 96 0 9 68 0 0 0 0 0 100 3 0 0 0 73 28 85 0 6 69 0 0 0 0 0 100 4 0 0 21 83 34 122 2 5 67 0 1915 0 0 0 99 5 0 0 7 257 102 94 0 5 70 0 0 0 0 0 100 6 0 0 0 66 3 118 0 10 77 0 303 0 0 0 100 7 0 0 0 163 50 217 0 4 72 0 0 0 0 0 100 April 1, 2026 at 06:58:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1424 0 189 2407 203 1065 35 190 99 60 3837 2 3 0 96 1 1364 0 214 461 11 861 26 144 98 57 3726 3 2 0 96 2 35415 0 14 303 1 863 30 142 147 54 4483 8 5 0 87 3 11513 0 317 379 2 837 19 121 210 73 5205 3 5 0 92 4 8002 0 49 517 9 925 21 115 160 70 7174 5 2 0 93 5 3631 0 44 741 103 961 12 134 119 90 3072 3 1 0 96 6 1902 0 19 431 5 764 14 107 91 57 3753 2 1 0 97 7 1157 0 4 532 51 870 20 104 87 48 2421 1 1 0 98 April 1, 2026 at 06:58:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 21 2319 203 54 0 2 0 0 29 0 0 0 99 1 1 0 70 92 4 88 0 3 6 0 308 0 1 0 99 2 18 0 0 36 1 184 0 1 6 0 341 0 0 0 100 3 0 0 0 30 1 12 0 1 0 0 10 0 0 0 100 4 51 0 21 48 10 73 1 5 1 0 1959 0 0 0 99 5 0 0 7 239 112 6 0 1 0 0 20 0 0 0 100 6 0 0 7 99 36 87 1 2 0 0 325 0 0 0 100 7 11 0 0 64 19 44 0 2 0 0 10 0 0 0 100 April 1, 2026 at 06:58:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2365 202 10 0 1 0 0 6 0 1 0 99 1 0 0 35 165 3 113 0 2 3 0 296 0 1 0 99 2 0 0 350 16 1 4 0 0 3 0 0 0 0 0 100 3 0 0 0 70 0 9 0 1 0 0 0 0 0 0 100 4 0 0 21 86 13 54 2 0 3 0 1931 0 0 0 99 5 0 0 1 269 103 4 0 0 0 0 1 0 0 0 100 6 0 0 7 166 51 106 0 0 2 0 300 0 0 0 100 7 0 0 0 64 0 4 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:58:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2322 201 10 0 1 0 0 0 0 0 0 100 1 0 0 112 116 3 113 0 1 0 0 294 0 0 0 100 2 0 0 0 30 0 10 0 0 0 0 0 0 0 0 100 3 0 0 0 27 1 4 0 1 0 0 0 0 0 0 100 4 0 0 21 42 11 52 2 1 2 0 1928 0 0 0 100 5 0 0 7 227 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 130 52 108 0 1 1 0 302 0 0 0 100 7 0 0 0 27 1 2 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:58:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3678 0 91 2436 203 1252 18 152 198 89 5286 2 2 0 95 1 1797 0 49 572 4 1018 12 116 150 75 3638 2 1 0 96 2 2075 0 131 217 0 1015 22 138 206 52 4687 2 2 0 96 3 8072 0 28 420 37 967 14 123 207 65 4253 4 2 0 94 4 6086 0 48 429 51 896 14 117 228 60 5285 3 2 0 95 5 34705 0 24 463 104 1014 19 108 197 52 3173 8 6 0 86 6 4180 0 307 366 32 936 17 104 179 55 3517 2 2 0 96 7 3792 0 197 323 9 911 11 97 194 59 2894 2 2 0 96 April 1, 2026 at 06:58:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 91 2308 202 98 0 3 6 0 17 0 1 0 99 1 0 0 7 159 30 152 0 6 6 0 311 0 0 0 100 2 35 0 0 34 5 14 1 2 0 0 19 0 0 0 100 3 0 0 0 25 1 2 0 1 0 0 1 0 0 0 100 4 19 0 21 37 9 51 1 2 3 0 1946 0 0 0 99 5 0 0 7 234 104 12 0 2 0 0 16 0 0 0 100 6 0 0 0 32 4 12 0 0 0 0 311 0 0 0 100 7 29 0 0 28 3 8 0 1 0 0 14 0 0 0 100 April 1, 2026 at 06:58:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 201 18 0 0 3 0 0 0 1 0 99 1 0 0 462 231 54 224 0 2 3 0 306 0 0 0 99 2 0 0 0 102 7 24 0 1 1 0 10 0 0 0 100 3 0 0 0 80 1 0 0 0 1 0 0 0 0 0 100 4 0 0 21 105 11 56 2 1 2 0 1936 0 0 0 99 5 0 0 7 290 109 2 0 0 2 0 0 0 0 0 100 6 1 0 0 92 3 22 0 1 2 0 313 0 0 0 100 7 0 0 0 83 1 4 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:58:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 40 0 2 0 0 0 0 0 0 100 1 0 0 0 135 28 126 0 2 0 0 294 0 0 0 100 2 0 0 0 76 31 70 0 1 0 0 8 0 0 0 100 3 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 4 0 0 21 16 6 40 2 0 1 0 1919 0 0 0 100 5 0 0 7 209 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 13 3 10 0 1 1 0 302 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37003 0 203 2374 202 588 18 96 108 74 2597 7 7 0 86 1 270 0 19 237 4 498 7 75 58 48 1497 0 0 0 99 2 1614 0 26 376 49 419 8 56 33 29 1181 1 1 0 99 3 421 0 6 210 3 293 6 57 37 37 1342 1 0 0 99 4 1522 0 37 240 12 406 8 56 56 34 3246 2 1 0 97 5 1907 0 132 445 102 420 3 51 52 53 3023 1 1 0 97 6 845 0 189 219 2 364 8 47 86 34 2224 1 1 0 98 7 7046 0 19 227 1 384 12 59 104 58 3832 2 2 0 97 April 1, 2026 at 06:58:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3070 0 107 2349 201 819 31 137 167 15 2492 2 2 0 96 1 1216 0 0 104 11 770 18 125 136 19 2782 1 1 0 98 2 1654 0 187 215 1 574 24 94 111 15 2509 2 1 0 97 3 521 0 2 372 29 675 18 95 124 15 1560 1 1 0 98 4 825 0 21 366 56 710 22 82 154 10 3427 1 1 0 98 5 2931 0 19 532 133 648 4 66 108 10 1613 3 1 0 97 6 965 0 1 276 5 639 5 80 165 19 2084 2 1 0 97 7 2736 0 2 182 1 434 8 53 129 14 1945 2 1 0 97 April 1, 2026 at 06:58:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2370 200 12 0 1 2 0 0 0 1 0 99 1 0 0 462 22 4 10 0 0 2 0 294 0 0 0 100 2 0 0 0 87 0 12 0 0 0 0 0 0 0 0 100 3 0 0 0 182 1 103 0 2 0 0 0 0 0 0 100 4 2 0 21 93 7 48 2 3 2 0 1921 0 0 0 99 5 34 0 7 393 157 112 0 0 0 0 9 0 0 0 100 6 0 0 0 84 2 6 0 0 0 0 300 0 0 0 100 7 0 0 0 80 1 2 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:58:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 8 0 0 0 0 0 0 0 0 100 1 0 0 0 22 5 20 0 0 0 0 306 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 110 0 108 0 1 0 0 0 0 0 0 100 4 1 0 21 24 7 52 2 0 3 0 1931 0 0 0 100 5 0 0 7 324 161 114 0 2 1 0 8 0 0 0 100 6 1 0 0 25 5 22 0 0 1 0 319 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 6 0 0 0 0 0 0 0 0 100 1 0 0 0 14 4 8 0 0 0 0 294 0 0 0 100 2 0 0 0 13 0 10 0 0 0 0 0 0 0 0 100 3 0 0 0 110 0 105 0 1 1 0 0 0 0 0 100 4 0 0 21 16 6 40 0 0 1 0 1917 0 0 0 100 5 0 0 7 324 158 117 0 1 1 0 10 0 0 0 100 6 0 0 0 11 2 8 0 1 1 0 300 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39688 0 112 2488 205 1117 34 175 172 52 4950 10 8 0 82 1 7283 0 320 516 8 995 17 122 167 74 4856 3 3 0 94 2 6193 0 14 515 9 869 21 119 167 67 3552 2 2 0 96 3 4629 0 310 169 2 922 20 124 140 85 4238 2 2 0 96 4 3659 0 58 526 9 937 18 108 100 68 4659 2 2 0 96 5 1123 0 14 419 114 1025 23 141 101 67 3065 1 1 0 98 6 602 0 14 443 10 739 21 92 84 49 5508 2 2 0 96 7 1301 0 27 414 34 650 11 73 86 38 3090 2 2 0 96 April 1, 2026 at 06:58:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2311 201 210 0 12 99 0 1 0 1 0 99 1 0 0 0 72 4 84 0 9 63 0 294 0 0 0 100 2 0 0 0 154 45 185 0 7 87 0 0 0 0 0 100 3 0 0 7 91 29 95 0 11 65 0 0 0 0 0 100 4 4 0 21 84 34 107 2 8 31 0 1932 0 0 0 99 5 0 0 7 284 102 130 0 7 63 0 0 0 0 0 100 6 0 0 0 63 3 83 0 7 44 0 301 0 0 0 100 7 34 0 0 96 12 131 0 8 82 0 9 0 0 0 100 April 1, 2026 at 06:58:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2368 200 112 0 0 2 0 0 0 1 0 99 1 0 0 462 24 4 12 0 0 2 0 294 0 0 0 100 2 0 0 0 179 50 102 0 1 0 0 0 0 0 0 100 3 0 0 0 83 0 4 0 2 0 0 0 0 0 0 100 4 0 0 21 92 6 48 2 1 3 0 1921 0 0 0 99 5 0 0 7 288 103 10 0 1 0 0 9 0 0 0 100 6 0 0 0 87 3 8 0 0 1 0 302 0 0 0 100 7 0 0 0 92 6 16 0 0 0 0 27 0 0 0 100 April 1, 2026 at 06:58:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 200 44 0 1 1 0 0 0 0 0 100 1 0 0 0 21 5 16 0 0 1 0 306 0 0 0 100 2 0 0 0 108 51 100 0 0 1 0 0 0 0 0 100 3 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 4 0 0 21 29 10 56 1 0 4 0 1943 0 0 0 99 5 0 0 7 289 107 80 0 3 2 0 0 0 0 0 100 6 0 0 0 22 3 20 0 0 1 0 313 0 0 0 100 7 0 0 0 21 6 16 0 1 0 0 8 0 0 0 100 April 1, 2026 at 06:58:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35127 0 266 2395 202 1031 41 147 92 64 4819 8 8 0 84 1 474 0 19 554 5 895 22 104 53 41 4122 2 2 0 97 2 1783 0 13 217 20 829 25 115 132 51 3454 3 2 0 95 3 11586 0 135 373 1 722 17 92 179 53 4333 3 4 0 93 4 8210 0 54 441 7 843 16 101 156 68 5808 3 2 0 95 5 852 0 21 489 113 974 21 103 117 59 3450 1 1 0 98 6 4936 0 324 478 7 854 17 83 92 68 4113 3 2 0 95 7 1001 0 9 204 7 781 13 95 73 65 2640 1 1 0 98 April 1, 2026 at 06:58:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 89 2304 200 219 1 4 6 0 6 0 1 0 99 1 0 0 0 36 4 21 1 2 6 0 298 0 0 0 100 2 19 0 0 23 1 7 0 1 1 0 17 0 0 0 100 3 26 0 0 23 1 4 0 2 0 0 9 0 0 0 100 4 4 0 21 32 6 42 2 1 2 0 1934 0 0 0 99 5 20 0 8 240 106 23 0 1 0 0 17 0 0 0 100 6 35 0 0 36 6 20 0 3 1 0 322 0 0 0 100 7 0 0 0 25 2 4 0 1 0 0 12 0 0 0 100 April 1, 2026 at 06:58:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2341 200 245 0 7 81 0 0 0 1 0 99 1 0 0 238 68 4 109 0 9 63 0 294 0 0 0 100 2 0 0 0 105 6 108 0 8 61 0 0 0 0 0 100 3 0 0 0 174 56 151 0 8 81 0 1 0 0 0 100 4 0 0 21 113 36 117 2 2 59 0 1926 0 0 0 99 5 0 0 7 305 101 112 0 6 49 0 0 0 0 0 100 6 0 0 0 99 9 99 0 6 80 0 311 0 0 0 100 7 0 0 0 98 1 110 0 4 38 0 0 0 0 0 100 April 1, 2026 at 06:58:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 245 2304 200 45 0 2 0 0 0 0 1 0 99 1 0 0 0 113 3 74 0 1 1 0 282 0 0 0 100 2 0 0 0 42 0 1 0 1 0 0 17 0 0 0 100 3 0 0 0 140 50 100 0 0 0 0 0 0 0 0 100 4 0 0 21 51 7 42 1 0 0 0 1924 0 0 0 100 5 0 0 7 243 101 0 0 0 0 0 0 0 0 0 100 6 0 0 0 55 7 18 0 1 0 0 309 0 0 0 100 7 0 0 0 43 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35516 0 196 2404 202 1131 32 181 142 78 5158 9 8 0 83 1 1585 0 23 240 4 974 16 125 73 53 3733 2 1 0 96 2 1850 0 206 257 1 944 23 119 74 56 4206 3 2 0 96 3 6373 0 22 549 34 861 21 101 162 57 3100 3 2 0 95 4 7881 0 211 451 7 808 11 95 159 72 7070 2 3 0 95 5 5669 0 146 607 111 771 5 87 143 64 3457 2 2 0 96 6 1636 0 12 344 29 889 16 84 97 69 2653 1 1 0 98 7 3474 0 19 306 2 815 21 82 75 50 3618 2 1 0 97 April 1, 2026 at 06:58:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2317 201 104 0 4 1 0 13 0 0 0 100 1 18 0 70 30 8 22 0 2 7 0 18 0 1 0 99 2 28 0 0 26 1 8 0 1 6 0 304 0 0 0 100 3 0 0 0 27 1 4 0 0 0 0 4 0 0 0 100 4 7 0 21 32 6 44 2 1 1 0 1934 0 0 0 99 5 46 0 14 241 106 22 0 0 0 0 16 0 0 0 100 6 0 0 0 50 14 34 0 1 1 0 312 0 0 0 100 7 0 0 0 129 43 107 0 5 0 0 12 0 0 0 100 April 1, 2026 at 06:58:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2376 200 110 0 1 0 0 0 0 1 0 99 1 0 0 42 87 4 12 0 0 2 0 0 0 1 0 99 2 0 0 462 15 1 4 0 0 2 0 294 0 0 0 100 3 0 0 0 78 0 0 0 0 0 0 0 0 0 0 100 4 0 0 21 89 7 42 2 0 1 0 1920 0 0 0 99 5 0 0 7 295 107 14 0 0 0 0 9 0 0 0 100 6 0 0 0 85 3 10 0 1 0 0 302 0 0 0 100 7 0 0 0 191 52 109 0 1 0 0 1 0 0 0 100 April 1, 2026 at 06:58:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 257 0 10 82 0 1 0 1 0 99 1 0 0 0 71 3 124 0 6 84 0 0 0 0 0 100 2 0 0 0 64 2 113 0 8 81 0 294 0 0 0 100 3 0 0 0 101 38 112 0 10 73 0 0 0 0 0 100 4 0 0 21 105 43 176 0 11 71 0 1912 0 0 0 99 5 0 0 7 279 106 134 0 9 96 0 8 0 0 0 100 6 0 0 0 54 3 87 0 3 71 0 301 0 0 0 100 7 0 0 0 171 52 208 0 6 59 0 21 0 0 0 100 April 1, 2026 at 06:58:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 637 0 78 2380 200 609 9 84 67 71 2583 1 1 0 98 1 7806 0 2 274 7 384 6 57 36 44 1794 1 1 0 98 2 805 0 9 251 1 394 5 59 46 38 1904 1 1 0 98 3 2710 0 19 266 1 297 6 54 83 32 2113 1 1 0 98 4 7776 0 158 184 7 385 10 47 135 44 5906 2 2 0 96 5 3164 0 211 342 109 415 9 71 88 52 2124 1 1 0 98 6 1158 0 120 253 3 472 8 64 53 52 1700 1 1 0 98 7 276 0 21 311 46 546 6 56 59 50 1272 0 1 0 99 April 1, 2026 at 06:58:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1103 0 105 2340 201 533 11 55 33 19 1731 2 2 0 97 1 26909 0 7 91 6 590 24 79 44 16 2470 6 5 0 88 2 1589 0 180 216 9 439 11 41 39 17 2079 1 1 0 98 3 2542 0 14 254 2 426 11 42 58 11 1309 2 1 0 98 4 2819 0 24 227 11 394 13 42 58 23 3171 1 1 0 98 5 3786 0 19 268 112 308 7 29 85 16 2121 1 1 0 98 6 704 0 0 206 9 408 8 33 64 15 1190 2 0 0 98 7 459 0 0 354 43 562 5 35 14 14 1266 2 0 0 98 April 1, 2026 at 06:58:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2370 200 110 0 1 2 0 0 0 1 0 99 1 0 0 462 28 3 14 0 2 2 0 0 0 0 0 100 2 0 0 0 85 1 12 0 2 1 0 294 0 0 0 100 3 0 0 0 82 1 2 0 0 0 0 0 0 0 0 100 4 2 0 21 86 5 38 2 0 0 0 1620 0 0 0 99 5 0 0 7 289 103 4 0 0 0 0 300 0 0 0 100 6 0 0 0 89 3 10 0 0 0 0 302 0 0 0 100 7 34 0 0 191 56 114 0 1 0 0 9 0 0 0 100 April 1, 2026 at 06:58:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 108 0 2 0 0 0 0 0 0 100 1 0 0 0 16 2 10 0 1 0 0 0 0 0 0 100 2 0 0 0 19 2 9 0 2 0 0 294 0 0 0 100 3 0 0 0 12 1 8 0 1 1 0 0 0 0 0 100 4 0 0 21 13 5 38 1 0 0 0 1615 0 0 0 100 5 0 0 7 211 102 2 0 0 0 0 300 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 7 0 0 0 118 56 112 0 0 0 0 9 0 0 0 100 April 1, 2026 at 06:58:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 200 141 0 9 65 0 0 0 0 0 100 1 0 0 0 131 5 175 0 9 57 0 0 0 0 0 100 2 0 0 0 60 1 105 0 6 72 0 294 0 0 0 100 3 0 0 0 89 32 102 0 9 63 0 0 0 0 0 100 4 0 0 21 91 37 151 0 8 56 0 1617 0 0 0 99 5 0 0 7 272 102 124 0 4 62 0 300 0 0 0 100 6 0 0 0 54 4 91 0 4 53 0 303 0 0 0 100 7 0 0 0 165 55 212 0 7 76 0 8 0 0 0 100 April 1, 2026 at 06:58:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35705 0 286 2414 203 1152 63 225 109 70 5668 10 7 0 83 1 4562 0 144 605 4 1106 39 170 170 57 4258 2 3 0 95 2 3358 0 24 516 4 850 18 129 115 59 3670 2 2 0 96 3 6087 0 54 636 8 782 18 107 157 42 3664 2 2 0 95 4 8222 0 317 322 38 995 32 138 229 67 7180 4 3 0 93 5 3632 0 23 699 106 853 16 105 135 66 3964 2 1 0 96 6 1341 0 14 511 6 962 39 118 88 63 3810 2 1 0 97 7 1412 0 20 467 19 790 14 95 91 40 2890 2 1 0 98 April 1, 2026 at 06:58:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2316 201 76 0 0 0 0 0 0 0 0 100 1 0 0 0 62 2 48 0 0 0 0 9 0 0 0 100 2 0 0 70 19 2 12 0 3 6 0 294 0 1 0 99 3 0 0 0 21 1 4 0 0 6 0 0 0 0 0 100 4 0 0 7 104 41 116 2 0 0 0 1365 0 0 0 100 5 0 0 8 264 121 42 0 1 0 0 300 0 0 0 100 6 35 0 0 47 11 36 0 0 1 0 326 0 0 0 100 7 3 0 14 22 1 6 1 1 0 0 266 0 0 0 100 April 1, 2026 at 06:58:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 466 2309 200 112 0 1 1 0 0 0 1 0 99 1 0 0 0 84 2 6 0 1 0 0 0 0 0 0 100 2 0 0 42 79 2 10 0 1 1 0 294 0 0 0 100 3 0 0 0 80 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 84 4 36 1 0 0 0 1354 0 0 0 100 5 0 0 2 387 153 106 0 0 1 0 301 0 0 0 100 6 0 0 0 94 8 18 0 0 0 0 309 0 0 0 100 7 1 0 14 78 1 2 1 0 0 0 342 0 0 0 100 April 1, 2026 at 06:58:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 110 0 0 0 0 0 0 0 0 100 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 13 4 36 1 0 0 0 1351 0 0 0 100 5 0 0 7 317 152 110 0 0 0 0 300 0 0 0 100 6 0 0 0 30 11 26 0 0 0 0 313 0 0 0 100 7 0 0 14 10 3 6 0 0 0 0 268 0 0 0 100 April 1, 2026 at 06:58:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5766 0 207 2427 202 1280 32 166 158 58 4439 3 3 0 94 1 32832 0 23 423 4 1206 46 164 220 58 3777 8 6 0 85 2 9480 0 128 551 4 1051 19 115 266 69 7939 4 3 0 93 3 6863 0 379 254 33 1057 20 135 228 74 4058 2 2 0 95 4 5800 0 37 569 36 870 16 102 199 56 4584 2 2 0 96 5 1265 0 32 601 127 1063 30 133 147 72 3219 2 2 0 97 6 910 0 7 517 20 930 14 110 169 58 2913 2 1 0 97 7 1050 0 42 414 3 740 15 93 125 46 3009 2 2 0 96 April 1, 2026 at 06:58:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 91 2303 200 164 0 1 6 0 10 0 1 0 99 1 0 0 0 31 2 18 0 3 6 0 18 0 0 0 100 2 0 0 0 84 30 66 0 3 0 0 304 0 0 0 100 3 25 0 0 25 1 4 0 0 0 0 9 0 0 0 100 4 0 0 7 31 5 40 1 1 0 0 1364 0 0 0 100 5 0 0 14 227 102 6 0 0 1 0 311 0 0 0 100 6 34 0 0 48 10 36 0 1 0 0 320 0 0 0 100 7 35 0 14 31 4 12 2 1 0 0 289 0 0 0 100 April 1, 2026 at 06:58:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 200 124 0 2 3 0 0 0 1 0 99 1 0 0 462 28 3 14 0 0 3 0 12 0 0 0 100 2 0 0 0 187 53 106 0 1 1 0 294 0 0 0 100 3 0 0 0 84 3 4 0 0 1 0 1 0 0 0 100 4 0 0 7 96 6 52 1 0 1 0 1372 0 0 0 99 5 0 0 7 292 109 6 0 1 3 0 300 0 0 0 100 6 0 0 0 111 11 36 0 2 2 0 325 0 0 0 100 7 0 0 14 86 2 10 0 2 1 0 266 0 0 0 100 April 1, 2026 at 06:58:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2302 200 106 0 1 0 0 0 0 0 0 100 1 0 0 0 19 1 12 0 3 0 0 0 0 0 0 100 2 0 0 0 113 53 108 0 1 0 0 294 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 1 0 7 13 4 36 1 0 0 0 1351 0 0 0 100 5 0 0 7 212 102 4 0 0 2 0 300 0 0 0 100 6 0 0 0 21 7 14 0 0 1 0 309 0 0 0 100 7 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:58:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2840 0 181 2406 201 1321 39 193 116 67 5094 4 2 0 94 1 36005 0 391 172 2 1115 51 189 117 74 4546 8 7 0 85 2 979 0 38 362 53 1091 31 157 99 57 4111 2 2 0 97 3 4125 0 11 288 1 914 28 144 154 63 4456 3 2 0 95 4 9911 0 47 488 6 746 14 100 144 39 4849 4 2 0 93 5 6840 0 40 731 104 837 21 107 143 52 3499 2 2 0 96 6 1384 0 15 253 10 942 21 99 76 42 4289 2 1 0 97 7 1849 0 137 166 3 982 19 107 89 47 4955 2 1 0 96 April 1, 2026 at 06:58:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 91 2314 203 204 0 13 91 0 24 0 1 0 99 1 0 0 0 88 2 134 0 12 95 0 13 0 0 0 100 2 0 0 0 138 24 171 0 13 79 0 304 0 0 0 100 3 28 0 0 158 63 188 0 11 96 0 10 0 0 0 100 4 0 0 7 115 36 134 0 10 82 0 268 0 0 0 100 5 0 0 7 279 102 112 0 6 90 0 309 0 0 0 100 6 53 0 7 92 11 149 1 10 77 0 1422 0 0 0 99 7 4 0 14 68 3 93 1 8 58 0 291 0 0 0 100 April 1, 2026 at 06:58:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2370 200 110 0 1 2 0 0 0 1 0 99 1 0 0 0 88 1 6 0 2 0 0 0 0 0 0 100 2 0 0 0 88 3 8 0 0 0 0 294 0 0 0 100 3 0 0 462 119 51 106 0 0 2 0 0 0 0 0 100 4 0 0 7 88 4 16 0 1 0 0 264 0 0 0 100 5 0 0 7 284 102 4 0 0 1 0 300 0 0 0 100 6 0 0 0 99 9 52 0 0 0 0 1399 0 0 0 100 7 2 0 14 79 1 4 0 1 0 0 266 0 0 0 100 April 1, 2026 at 06:58:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 104 0 1 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 1 0 0 3 0 0 0 100 2 0 0 0 23 4 12 0 1 0 0 294 0 0 0 100 3 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 4 0 0 7 17 5 10 0 0 0 0 266 0 0 0 100 5 0 0 7 214 104 4 0 0 0 0 300 0 0 0 100 6 0 0 0 26 9 50 2 0 1 0 1402 0 0 0 100 7 0 0 14 6 1 4 0 1 0 0 266 0 0 0 100 April 1, 2026 at 06:58:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 23 2314 205 134 0 5 6 0 23 0 1 0 99 1 8 0 0 24 3 18 0 5 2 1 38 0 0 0 100 2 22 0 2 27 4 34 1 7 4 2 313 0 0 0 100 3 7 0 0 127 52 134 0 6 9 5 60 0 0 0 100 4 782 0 11 30 4 34 2 10 27 3 562 0 0 0 99 5 8 0 7 235 104 35 1 9 6 2 336 0 0 0 100 6 17 0 0 50 11 94 1 9 4 8 1460 0 0 0 100 7 20 0 30 30 3 43 1 11 8 6 323 0 1 0 99 April 1, 2026 at 06:58:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38641 0 247 2412 202 1158 45 165 149 65 6965 10 7 0 83 1 7990 0 35 361 4 1106 38 163 161 80 5104 3 4 0 92 2 2055 0 372 491 8 950 15 112 106 81 3203 1 1 0 97 3 964 0 17 536 5 993 19 110 119 60 4097 2 1 0 97 4 4983 0 24 218 14 914 20 115 111 59 4076 3 2 0 96 5 5588 0 24 772 149 910 15 90 151 47 3111 2 2 0 96 6 1183 0 5 418 7 759 23 94 72 61 4098 1 1 0 98 7 1777 0 144 408 6 862 19 105 113 46 3292 2 2 0 96 April 1, 2026 at 06:58:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2375 202 107 0 12 92 0 0 0 1 0 99 1 0 0 462 159 1 198 0 10 75 0 1 0 1 0 99 2 0 0 0 127 3 97 0 6 83 0 294 0 0 0 100 3 0 0 0 150 28 97 0 7 69 0 0 0 0 0 100 4 34 0 7 165 37 113 0 12 51 0 272 0 0 0 100 5 0 0 7 435 152 214 0 13 73 0 300 0 0 0 100 6 0 0 0 130 5 122 2 6 75 0 1393 0 0 0 99 7 2 0 14 119 2 92 0 9 77 0 287 0 0 0 100 April 1, 2026 at 06:58:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2304 200 5 0 0 2 0 0 0 0 0 100 1 0 0 0 45 1 34 0 0 0 0 0 0 0 0 100 2 0 0 0 15 2 8 0 1 1 0 294 0 0 0 100 3 0 0 0 12 1 4 0 0 0 0 33 0 0 0 100 4 4 0 7 101 10 96 0 1 0 0 278 0 0 0 100 5 0 0 7 321 153 112 0 0 1 0 309 0 0 0 100 6 0 0 0 22 5 44 1 1 0 0 1387 0 0 0 100 7 0 0 14 17 1 16 0 1 0 0 284 0 0 0 100 April 1, 2026 at 06:58:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2302 200 40 0 1 1 0 11 0 0 0 100 1 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 2 0 0 0 18 5 10 0 1 1 0 294 0 0 0 100 3 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 4 0 0 7 141 13 142 0 2 1 0 288 0 0 0 100 5 0 0 7 324 160 104 1 0 1 0 300 0 0 0 100 6 0 0 0 23 5 46 1 0 0 0 1393 0 0 0 100 7 0 0 14 13 2 6 0 0 2 0 266 0 0 0 100 April 1, 2026 at 06:58:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3907 0 88 2490 205 1118 35 151 165 61 5282 3 3 0 94 1 12175 0 424 523 2 1059 24 120 181 87 5328 3 3 0 94 2 5319 0 30 463 5 812 14 115 158 61 3751 2 2 0 96 3 1427 0 8 299 5 1021 34 127 92 64 3118 2 1 0 97 4 3410 0 40 566 12 895 18 90 117 68 2621 2 2 0 96 5 1375 0 26 524 129 866 19 113 117 59 3959 2 1 0 97 6 34344 0 17 283 31 774 14 85 76 44 4406 7 6 0 86 7 2242 0 217 399 2 674 11 72 43 45 4108 3 2 0 95 April 1, 2026 at 06:58:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 91 2305 200 105 0 3 7 0 9 0 1 0 99 1 34 0 0 36 5 20 0 3 6 0 25 0 0 0 100 2 13 0 0 34 2 17 0 5 0 0 308 0 0 0 100 3 19 0 7 27 2 10 0 2 0 0 9 0 0 0 100 4 0 0 7 28 3 12 0 2 0 0 266 0 0 0 100 5 25 0 7 235 102 14 0 0 1 0 309 0 0 0 100 6 0 0 0 133 54 144 1 1 0 0 1392 0 0 0 100 7 3 0 14 26 2 8 1 1 0 0 282 0 0 0 100 April 1, 2026 at 06:58:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2358 200 220 0 12 79 0 0 0 1 0 99 1 0 0 350 85 7 130 0 12 70 0 10 0 1 0 99 2 0 0 0 127 2 124 0 12 55 0 295 0 0 0 100 3 0 0 0 144 33 99 0 8 57 0 0 0 0 0 100 4 0 0 7 151 35 129 0 10 76 0 263 0 0 0 100 5 0 0 7 322 102 108 0 7 68 0 300 0 0 0 100 6 0 0 0 211 54 218 1 9 83 0 1381 0 0 0 99 7 0 0 14 102 4 77 0 8 46 0 268 0 0 0 100 April 1, 2026 at 06:58:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2304 200 94 0 1 0 0 0 0 0 0 100 1 0 0 0 35 5 10 0 0 0 0 8 0 0 0 100 2 0 0 0 26 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 48 5 28 0 1 0 0 262 0 0 0 100 5 0 0 7 229 102 4 1 0 1 0 300 0 0 0 100 6 0 0 0 111 44 116 0 0 1 0 1383 0 0 0 100 7 0 0 14 45 12 28 0 2 0 0 266 0 0 0 100 April 1, 2026 at 06:58:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3033 0 375 2374 200 1124 20 156 138 60 3628 3 3 0 94 1 6788 0 133 520 10 848 18 113 149 50 4605 4 2 0 94 2 8031 0 23 203 3 1068 26 153 168 89 5825 3 2 0 94 3 39571 0 16 275 1 865 24 117 162 56 4519 8 7 0 85 4 1209 0 26 524 27 865 14 102 92 70 4005 2 1 0 97 5 2804 0 58 485 108 958 18 129 138 67 3984 3 1 0 96 6 928 0 16 438 4 866 11 77 68 51 3835 1 1 0 98 7 1842 0 205 387 22 725 8 83 64 46 4001 3 2 0 95 April 1, 2026 at 06:58:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 21 2327 207 66 1 2 4 0 16 0 1 0 99 1 25 0 0 93 1 73 0 3 0 0 9 0 0 0 100 2 0 0 0 25 2 6 0 1 0 0 303 0 0 0 100 3 1 0 0 28 3 9 0 1 0 0 12 0 0 0 100 4 0 0 7 128 53 108 0 1 0 0 277 0 0 0 100 5 16 0 77 232 106 22 0 2 6 0 320 0 1 0 99 6 11 0 0 38 5 50 1 2 3 0 1390 0 0 0 100 7 4 0 21 31 4 14 1 3 0 0 268 0 0 0 100 April 1, 2026 at 06:59:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2382 206 20 0 0 2 0 9 0 1 0 99 1 0 0 462 120 1 111 0 2 3 0 1 0 0 0 100 2 0 0 0 84 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 80 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 182 53 106 0 1 0 0 263 0 0 0 100 5 0 0 7 284 102 4 0 0 1 0 300 0 0 0 100 6 0 0 0 89 4 39 1 1 3 0 1385 0 0 0 100 7 0 0 14 87 4 10 0 0 0 0 269 0 0 0 100 April 1, 2026 at 06:59:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2315 204 160 0 10 100 0 8 0 0 0 99 1 0 0 0 160 2 204 0 10 59 0 1 0 0 0 100 2 0 0 0 63 2 109 0 8 68 0 294 0 0 0 100 3 0 0 0 78 33 81 0 7 63 0 0 0 0 0 100 4 0 0 7 176 86 183 0 7 51 0 261 0 0 0 100 5 0 0 1 261 102 104 1 5 79 0 300 0 0 0 100 6 0 0 0 66 5 141 1 10 49 0 1386 0 0 0 100 7 0 0 14 60 2 108 0 6 55 0 266 0 0 0 100 April 1, 2026 at 06:59:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35639 0 76 2430 208 531 18 90 40 52 3620 7 6 0 87 1 2018 0 141 308 1 423 8 55 61 43 3035 1 2 0 97 2 6110 0 129 246 2 390 9 69 105 53 3053 2 2 0 96 3 4593 0 19 184 2 427 5 71 117 43 2031 1 1 0 98 4 246 0 23 346 53 527 6 62 52 51 1738 0 1 0 99 5 586 0 24 461 104 411 2 63 58 60 1442 0 1 0 98 6 1077 0 202 205 3 390 3 50 69 41 2712 1 1 0 98 7 321 0 26 220 4 341 7 51 50 31 1395 0 0 0 99 April 1, 2026 at 06:59:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1127 0 42 2358 203 681 20 90 43 17 2921 3 2 0 95 1 866 0 178 288 5 577 8 55 31 12 1633 2 1 0 97 2 702 0 2 280 3 526 11 54 58 17 1597 1 1 0 98 3 3308 0 2 126 3 518 7 63 94 11 2018 1 1 0 97 4 5217 0 21 280 13 372 5 34 76 14 1933 2 1 0 97 5 1363 0 8 524 159 488 8 39 55 21 1715 1 1 0 98 6 789 0 70 278 6 545 18 40 67 16 2857 1 1 0 98 7 528 0 14 62 5 391 13 39 49 12 1737 1 1 0 98 April 1, 2026 at 06:59:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2376 200 8 0 0 0 0 0 0 1 0 99 1 34 0 0 91 5 12 0 1 0 0 9 0 0 0 100 2 0 0 0 84 2 6 0 0 0 0 294 0 0 0 100 3 0 0 0 189 2 116 0 1 0 0 0 0 0 0 100 4 0 0 7 85 3 4 0 0 0 0 263 0 0 0 100 5 0 0 7 385 152 106 0 1 0 0 300 0 0 0 100 6 0 0 42 81 3 40 1 2 3 0 1382 0 1 0 99 7 2 0 476 17 3 8 0 0 2 0 268 0 0 0 100 April 1, 2026 at 06:59:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 10 0 0 0 0 0 0 0 0 100 1 0 0 0 20 6 14 0 0 0 0 9 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 113 1 107 0 2 1 0 0 0 0 0 100 4 0 0 7 12 3 6 0 1 0 0 260 0 0 0 100 5 0 0 7 320 153 110 1 2 2 0 300 0 0 0 100 6 0 0 0 15 4 38 1 0 0 0 1384 0 0 0 100 7 0 0 14 8 2 6 0 1 0 0 266 0 0 0 100 April 1, 2026 at 06:59:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 200 118 0 8 93 0 0 0 0 0 100 1 0 0 0 73 6 123 0 8 76 0 9 0 0 0 100 2 0 0 0 58 3 98 0 7 59 0 294 0 0 0 100 3 0 0 0 181 30 192 0 8 72 0 0 0 0 0 100 4 1 0 7 83 32 102 0 9 56 0 260 0 0 0 100 5 0 0 7 356 153 194 0 7 59 0 300 0 0 0 100 6 0 0 0 56 3 122 1 6 57 0 1382 0 0 0 100 7 0 0 14 60 3 105 0 7 67 0 268 0 0 0 100 April 1, 2026 at 06:59:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1121 0 114 2422 202 1228 35 171 95 62 4797 2 2 0 96 1 38269 0 227 354 7 1075 44 152 121 53 4882 9 7 0 84 2 1718 0 20 582 5 1026 29 135 98 59 4486 2 2 0 96 3 2544 0 125 478 5 889 15 119 143 55 3423 2 2 0 96 4 9320 0 15 483 7 869 26 125 187 42 4054 2 2 0 95 5 9611 0 343 678 118 834 17 103 178 68 5369 4 3 0 93 6 789 0 10 493 6 929 12 104 59 58 4731 3 1 0 96 7 797 0 18 467 6 870 13 111 68 71 2912 1 1 0 98 April 1, 2026 at 06:59:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2307 201 243 0 2 4 0 27 0 1 0 99 1 0 0 0 27 1 8 0 1 0 0 1 0 0 0 100 2 0 0 7 24 2 6 0 1 0 0 294 0 0 0 100 3 34 0 0 32 7 18 0 1 0 0 18 0 0 0 100 4 0 0 7 33 5 20 0 0 0 0 277 0 0 0 100 5 0 0 7 235 110 8 0 0 1 0 306 0 0 0 100 6 0 0 0 35 5 49 0 0 2 0 1395 0 0 0 100 7 2 0 14 30 3 16 1 0 6 0 268 0 0 0 100 April 1, 2026 at 06:59:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2371 201 164 0 0 2 0 3 0 1 0 99 1 0 0 0 134 26 56 0 1 0 0 1 0 0 0 100 2 0 0 0 84 2 6 0 0 0 0 294 0 0 0 100 3 0 0 0 93 8 16 0 0 0 0 9 0 0 0 100 4 0 0 7 85 5 8 0 0 0 0 261 0 0 0 100 5 0 0 0 287 103 6 1 0 2 0 301 0 0 0 100 6 0 0 0 84 3 38 1 1 2 0 1382 0 0 0 100 7 0 0 476 16 2 8 0 0 2 0 267 0 0 0 100 April 1, 2026 at 06:59:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 108 0 1 0 0 0 0 0 0 100 1 0 0 0 109 50 102 0 1 0 0 0 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 18 6 12 0 0 0 0 9 0 0 0 100 4 0 0 7 19 4 9 0 2 0 0 260 0 0 0 100 5 0 0 7 213 102 4 0 0 0 0 300 0 0 0 100 6 0 0 0 13 3 38 1 1 1 0 1382 0 0 0 100 7 0 0 14 12 4 8 0 0 0 0 269 0 0 0 100 April 1, 2026 at 06:59:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2435 0 257 2406 200 1274 36 200 179 70 3583 2 2 0 96 1 35103 0 128 373 26 1206 42 178 175 67 7129 8 7 0 85 2 3819 0 44 380 9 1032 39 162 156 52 3688 3 2 0 95 3 687 0 11 595 40 1028 17 126 209 43 3111 2 1 0 97 4 14236 0 357 578 39 1017 25 107 272 66 4764 5 5 0 90 5 6217 0 28 708 121 895 21 105 216 56 4293 2 2 0 95 6 780 0 8 233 7 1061 23 148 150 68 4771 2 1 0 97 7 663 0 18 484 5 908 30 132 124 51 3420 1 1 0 98 April 1, 2026 at 06:59:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 91 2318 207 122 0 1 4 0 19 0 1 0 99 1 29 0 0 27 3 10 0 0 0 0 9 0 0 0 100 2 0 0 7 27 2 12 0 1 0 0 314 0 0 0 100 3 0 0 0 28 2 6 0 0 0 0 18 0 0 0 100 4 1 0 7 36 5 16 0 2 0 0 265 0 0 0 100 5 2 0 7 328 152 108 0 1 0 0 309 0 0 0 100 6 9 0 0 29 3 38 1 1 2 0 1393 0 0 0 100 7 9 0 14 32 4 18 1 1 5 0 272 0 0 0 100 April 1, 2026 at 06:59:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2351 207 136 0 2 4 0 21 0 1 0 99 1 0 0 0 49 2 2 0 0 1 0 1 0 0 0 100 2 0 0 0 53 3 6 0 0 1 0 294 0 0 0 100 3 0 0 0 55 2 12 0 0 1 0 0 0 0 0 100 4 0 0 7 66 7 22 0 0 1 0 277 0 0 0 100 5 0 0 7 312 133 58 1 2 1 0 300 0 0 0 100 6 0 0 0 60 4 50 1 0 1 0 1398 0 0 0 100 7 0 0 252 70 28 64 0 1 6 0 266 0 0 0 100 April 1, 2026 at 06:59:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2345 206 128 0 1 0 0 8 0 1 0 99 1 0 0 0 91 26 54 0 1 0 0 0 0 0 0 100 2 0 0 0 42 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 44 1 8 0 1 0 0 0 0 0 0 100 4 1 0 7 46 3 8 0 1 0 0 260 0 0 0 100 5 0 0 7 250 103 8 0 1 1 0 300 0 0 0 100 6 0 0 0 46 3 36 1 0 1 0 1385 0 0 0 100 7 0 0 238 50 22 46 0 1 1 0 268 0 0 0 100 April 1, 2026 at 06:59:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34582 0 98 2438 210 1029 31 140 93 69 4317 9 7 0 85 1 2655 0 312 380 35 739 17 90 89 56 2809 1 2 0 97 2 1848 0 201 404 4 788 16 90 75 61 5150 2 2 0 96 3 2201 0 37 489 9 722 16 87 153 57 3488 2 1 0 97 4 10523 0 135 290 4 920 26 105 219 54 4631 2 3 0 95 5 7454 0 18 701 102 828 12 90 144 69 4665 4 2 0 94 6 2190 0 13 362 3 678 14 79 93 59 3535 2 1 0 97 7 2487 0 42 221 2 800 15 84 91 65 2649 2 1 0 97 April 1, 2026 at 06:59:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 91 2313 202 289 0 16 113 0 8 0 1 0 99 1 0 0 0 150 29 191 0 12 77 0 7 0 0 0 100 2 2 0 0 77 2 108 0 6 91 0 310 0 0 0 100 3 44 0 7 102 34 101 0 7 90 0 14 0 0 0 100 4 0 0 7 106 34 117 1 6 63 0 269 0 0 0 100 5 46 0 7 292 107 131 0 11 59 0 323 0 0 0 100 6 0 0 0 89 5 154 1 7 64 0 1395 0 0 0 100 7 5 0 14 96 4 145 1 11 98 0 280 0 0 0 100 April 1, 2026 at 06:59:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 48 2368 201 44 0 1 2 0 0 0 1 0 99 1 0 0 0 180 50 102 0 0 0 0 0 0 0 0 100 2 0 0 0 85 2 14 0 1 0 0 294 0 0 0 100 3 0 0 0 82 1 4 0 0 0 0 0 0 0 0 100 4 0 0 7 154 5 80 0 3 0 0 264 0 0 0 100 5 0 0 1 299 108 16 1 0 0 0 309 0 0 0 100 6 0 0 0 86 4 38 1 0 1 0 1386 0 0 0 100 7 0 0 476 12 1 4 0 0 2 0 266 0 0 0 100 April 1, 2026 at 06:59:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 201 89 0 2 0 0 12 0 0 0 100 1 0 0 0 107 50 100 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 4 0 0 7 55 5 52 0 0 0 0 275 0 0 0 100 5 0 0 7 231 114 14 0 0 0 0 308 0 0 0 100 6 0 0 0 23 5 48 1 1 1 0 1398 0 0 0 100 7 0 0 14 11 2 8 0 1 1 0 268 0 0 0 100 April 1, 2026 at 06:59:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9233 0 349 2350 202 643 10 96 85 50 1873 2 2 0 96 1 454 0 10 370 50 545 13 72 55 44 1552 0 1 0 99 2 549 0 15 298 2 481 7 59 62 51 2904 1 1 0 99 3 1218 0 16 246 2 355 7 56 56 32 3427 1 1 0 98 4 10111 0 164 276 4 361 7 54 113 55 2849 2 3 0 95 5 2388 0 12 433 111 365 4 50 85 39 2153 1 1 0 98 6 217 0 20 197 4 370 4 46 49 46 2795 0 1 0 98 7 150 0 26 200 2 315 5 48 40 42 1816 0 1 0 99 April 1, 2026 at 06:59:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26996 0 125 2354 202 855 31 120 66 22 2645 6 6 0 88 1 444 0 0 330 11 551 10 66 41 8 1933 1 0 0 98 2 723 0 0 309 3 508 12 69 41 9 2282 2 1 0 98 3 803 0 7 152 44 523 18 59 88 6 1500 1 1 0 98 4 3592 0 9 210 3 384 20 62 76 22 2188 2 1 0 97 5 2720 0 5 447 103 408 7 51 51 11 1813 1 1 0 98 6 2971 0 29 297 6 414 8 38 41 16 2789 3 1 0 96 7 1456 0 199 49 5 454 8 41 54 12 1824 1 1 0 98 April 1, 2026 at 06:59:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2375 201 136 0 10 60 0 0 0 1 0 99 1 0 0 0 202 3 173 0 13 51 0 0 0 0 0 100 2 0 0 0 139 3 117 0 9 64 0 295 0 0 0 100 3 0 0 0 252 83 177 0 3 60 0 0 0 0 0 100 4 0 0 7 160 37 108 0 7 85 0 264 0 0 0 100 5 0 0 7 343 102 115 1 6 51 0 300 0 0 0 100 6 34 0 0 148 10 147 1 6 74 0 1397 0 0 0 99 7 2 0 476 65 1 105 0 5 56 0 266 0 1 0 99 April 1, 2026 at 06:59:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 8 0 0 0 0 0 0 0 0 100 1 0 0 0 110 0 106 0 0 0 0 0 0 0 0 100 2 0 0 0 13 3 4 0 0 0 0 294 0 0 0 100 3 0 0 0 117 51 116 0 1 0 0 0 0 0 0 100 4 0 0 7 10 3 4 0 0 0 0 260 0 0 0 100 5 0 0 7 216 103 10 0 0 0 0 309 0 0 0 100 6 0 0 0 25 9 48 1 0 1 0 1394 0 0 0 100 7 0 0 14 10 2 8 0 0 0 0 286 0 0 0 100 April 1, 2026 at 06:59:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 93 0 1 2 0 12 0 0 0 100 1 0 0 0 52 2 40 0 0 2 0 1 0 0 0 100 2 0 0 0 13 3 4 0 0 1 0 294 0 0 0 100 3 0 0 0 119 53 114 0 0 1 0 0 0 0 0 100 4 1 0 8 24 7 18 0 0 1 0 276 0 0 0 100 5 0 0 7 219 109 4 0 0 4 0 300 0 0 0 100 6 0 0 0 30 9 60 1 1 1 0 1406 0 0 0 100 7 0 0 14 11 2 6 0 0 1 0 266 0 0 0 100 April 1, 2026 at 06:59:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1274 0 100 2439 206 1151 36 200 117 70 3904 2 2 0 96 1 35871 0 322 233 3 980 34 160 77 77 5171 8 7 0 86 2 2657 0 191 417 2 833 27 113 133 57 4092 2 2 0 96 3 708 0 31 464 16 865 22 131 84 61 3642 1 1 0 97 4 3165 0 25 438 13 742 13 92 106 42 3239 2 2 0 96 5 4605 0 41 690 132 764 21 88 134 47 3191 3 2 0 96 6 8471 0 130 382 10 688 10 74 170 52 6505 3 3 0 94 7 7593 0 50 492 3 799 12 85 144 66 2961 3 2 0 95 April 1, 2026 at 06:59:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 21 2316 202 115 0 1 0 0 268 0 0 0 100 1 0 0 70 19 0 5 0 2 5 0 0 0 0 0 100 2 0 0 0 21 2 6 0 1 0 0 294 0 0 0 100 3 0 0 7 30 2 16 0 0 0 0 0 0 0 0 100 4 0 0 7 27 5 6 0 0 0 0 260 0 0 0 100 5 0 0 7 326 152 106 1 1 2 0 300 0 0 0 100 6 34 0 0 38 9 48 1 0 1 0 1394 0 0 0 100 7 0 0 0 21 0 2 0 0 5 0 0 0 0 0 100 April 1, 2026 at 06:59:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2377 202 235 0 11 89 0 266 0 1 0 99 1 0 0 42 108 1 66 0 8 55 0 0 0 1 0 99 2 0 0 461 53 2 82 0 9 71 0 293 0 0 0 99 3 0 0 0 173 32 111 0 13 80 0 0 0 0 0 100 4 0 0 7 162 33 126 0 9 73 0 263 0 0 0 100 5 0 0 2 390 126 164 0 7 38 0 300 0 0 0 100 6 0 0 0 190 30 192 1 9 54 0 1394 0 0 0 99 7 0 0 0 136 6 112 0 10 61 0 2 0 0 0 100 April 1, 2026 at 06:59:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 202 109 0 1 0 0 266 0 0 0 100 1 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 15 2 4 0 1 0 0 0 0 0 0 100 4 0 0 7 12 4 6 0 0 0 0 261 0 0 0 100 5 0 0 7 214 102 6 0 1 1 0 300 0 0 0 100 6 0 0 0 25 8 48 1 0 1 0 1394 0 0 0 100 7 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:59:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2465 0 269 2390 202 1021 24 147 96 58 3515 2 2 0 96 1 3628 0 44 622 23 971 20 101 107 63 4062 3 1 0 96 2 2003 0 119 276 3 852 21 121 97 64 3386 2 1 0 97 3 2612 0 40 177 3 754 14 122 111 62 4235 3 2 0 95 4 35446 0 131 200 7 827 25 113 96 57 4150 8 6 0 85 5 385 0 18 546 109 557 15 74 123 39 2528 1 1 0 98 6 10640 0 210 187 10 839 27 100 186 67 6098 2 4 0 94 7 6742 0 47 520 27 782 13 90 135 49 3201 2 2 0 97 April 1, 2026 at 06:59:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 35 2318 204 27 0 3 0 0 277 0 0 0 100 1 11 0 70 217 50 216 0 2 6 0 22 0 1 0 99 2 0 0 0 31 4 10 0 1 6 0 304 0 0 0 100 3 0 0 7 34 1 23 0 2 0 0 8 0 0 0 100 4 38 0 7 34 8 18 0 3 0 0 290 0 0 0 100 5 0 0 7 231 103 10 1 1 1 0 310 0 0 0 100 6 28 0 0 30 3 38 2 0 2 0 1394 0 0 0 100 7 18 0 0 28 3 8 0 1 0 0 15 0 0 0 100 April 1, 2026 at 06:59:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2377 202 60 0 1 0 0 266 0 1 0 99 1 0 0 42 172 23 97 0 1 2 0 0 0 1 0 99 2 0 0 462 24 2 12 0 2 2 0 294 0 0 0 100 3 0 0 0 141 29 62 0 1 0 0 0 0 0 0 100 4 0 0 7 95 9 16 0 0 0 0 272 0 0 0 100 5 0 0 7 286 102 6 0 0 1 0 300 0 0 0 100 6 0 0 0 86 3 36 2 0 2 0 1385 0 0 0 100 7 0 0 0 82 2 4 0 0 0 0 3 0 0 0 100 April 1, 2026 at 06:59:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2308 202 200 0 11 90 0 266 0 1 0 99 1 0 0 0 60 0 98 0 10 65 0 0 0 0 0 100 2 0 0 0 56 3 94 0 7 66 0 295 0 0 0 100 3 0 0 0 192 81 201 0 6 62 0 0 0 0 0 100 4 0 0 7 97 37 128 0 4 58 0 268 0 0 0 100 5 0 0 7 266 103 111 0 8 66 0 300 0 0 0 100 6 0 0 0 69 4 147 1 9 48 0 1387 0 0 0 100 7 0 0 0 57 1 98 0 8 66 0 21 0 0 0 100 April 1, 2026 at 06:59:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9113 0 232 2552 203 1252 47 190 166 75 7165 6 3 0 91 1 1894 0 28 363 0 1276 38 208 111 88 4954 3 2 0 95 2 3425 0 322 505 4 1054 26 158 115 81 4056 3 2 0 95 3 1231 0 10 648 52 1134 23 139 77 72 3306 2 1 0 97 4 34244 0 22 230 11 893 31 135 93 51 3925 8 6 0 86 5 612 0 18 493 102 946 32 132 98 46 3766 2 2 0 97 6 5416 0 12 395 3 737 17 104 127 31 5155 2 2 0 96 7 8059 0 204 163 1 846 28 117 145 56 3861 2 2 0 95 April 1, 2026 at 06:59:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 42 0 35 2330 210 44 0 2 0 0 312 0 0 0 99 1 21 0 0 38 7 14 0 2 3 0 14 0 0 0 100 2 11 0 70 126 4 121 0 4 6 0 313 0 1 0 99 3 0 0 7 103 38 82 0 1 6 0 23 0 0 0 100 4 0 0 7 71 22 54 0 2 1 0 272 0 0 0 100 5 11 0 14 238 109 12 1 1 2 0 311 0 0 0 100 6 0 0 0 38 4 48 1 1 2 0 1415 0 0 0 100 7 0 0 0 27 2 6 0 1 1 0 9 0 0 0 100 April 1, 2026 at 06:59:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 21 2389 208 50 0 0 0 0 275 0 1 0 99 1 0 0 0 84 2 4 0 0 0 0 25 0 0 0 100 2 0 0 42 158 3 81 0 0 2 0 294 0 1 0 99 3 0 0 462 19 1 6 0 0 2 0 0 0 0 0 100 4 0 0 7 193 53 120 0 2 0 0 263 0 0 0 100 5 0 0 7 286 102 6 0 0 2 0 300 0 0 0 100 6 0 0 0 85 3 38 1 1 2 0 1385 0 0 0 100 7 0 0 0 80 1 2 0 0 0 0 2 0 0 0 100 April 1, 2026 at 06:59:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2313 207 123 0 1 0 0 274 0 0 0 99 1 0 0 0 10 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 126 54 119 0 2 0 0 260 0 0 0 100 5 0 0 7 214 102 6 0 0 0 0 300 0 0 0 100 6 0 0 0 13 3 36 1 0 0 0 1386 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:59:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 997 0 149 2333 210 293 4 23 138 7 507 0 1 0 99 1 50 0 6 92 0 142 0 23 81 7 108 0 0 0 100 2 23 0 2 96 2 155 0 19 72 8 445 0 0 0 100 3 17 0 7 125 32 142 0 13 59 8 112 0 0 0 100 4 25 0 7 219 86 240 0 21 64 8 306 0 0 0 100 5 11 0 9 286 102 108 0 7 64 1 316 0 0 0 100 6 2 0 1 101 3 180 0 17 85 3 1150 0 0 0 99 7 2086 0 9 85 1 120 3 15 89 2 604 0 1 0 98 April 1, 2026 at 06:59:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6537 0 280 2394 206 1232 45 189 166 83 5621 3 4 0 94 1 6050 0 35 737 5 1037 28 152 83 66 3255 5 1 0 94 2 35034 0 26 227 4 1169 40 178 106 68 3884 8 7 0 85 3 910 0 18 490 4 934 19 121 100 57 3096 2 1 0 97 4 2132 0 208 364 8 770 26 108 106 51 3186 2 1 0 97 5 873 0 7 635 113 782 21 97 80 49 3675 1 1 0 98 6 832 0 18 378 3 739 20 82 109 46 5787 2 2 0 96 7 9187 0 183 399 42 708 14 84 151 50 5032 3 3 0 94 April 1, 2026 at 06:59:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 64 2383 208 138 0 2 2 0 289 0 1 0 99 1 0 0 462 19 1 6 0 3 3 0 0 0 0 0 100 2 0 0 0 83 2 6 0 1 0 0 294 0 0 0 100 3 0 0 0 81 0 2 0 0 0 0 0 0 0 0 100 4 0 0 7 99 7 18 0 2 0 0 277 0 0 0 100 5 0 0 7 299 112 10 1 0 5 0 299 0 1 0 99 6 0 0 0 94 2 50 1 1 1 0 1098 0 0 0 100 7 0 0 0 187 52 106 0 1 4 0 302 0 0 0 100 April 1, 2026 at 06:59:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 21 2318 208 112 2 2 0 0 367 0 0 0 99 1 0 0 0 27 1 12 0 1 0 0 0 0 0 0 100 2 0 0 0 111 52 106 0 1 0 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 11 3 4 0 0 0 0 260 0 0 0 100 5 0 0 7 218 104 10 0 0 2 0 301 0 0 0 100 6 0 0 0 11 2 34 1 0 0 0 1085 0 0 0 100 7 0 0 0 8 1 4 0 1 2 0 300 0 0 0 100 April 1, 2026 at 06:59:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2313 207 52 0 0 0 0 274 0 0 0 99 1 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 180 53 176 0 3 0 0 294 0 0 0 100 3 0 0 0 9 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 10 3 6 0 1 0 0 260 0 0 0 100 5 0 0 7 216 103 8 0 0 1 0 300 0 0 0 100 6 0 0 0 11 2 34 1 0 1 0 1084 0 0 0 100 7 0 0 0 19 3 16 0 0 1 0 303 0 0 0 100 April 1, 2026 at 06:59:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8378 0 209 2431 210 1064 33 181 273 62 5540 3 4 0 93 1 8100 0 26 318 3 985 32 157 208 60 3879 4 2 0 94 2 3649 0 202 609 24 896 24 141 171 65 2952 3 1 0 96 3 3504 0 309 335 33 1013 21 129 186 74 3217 3 2 0 96 4 1183 0 21 565 44 986 24 126 143 72 3277 2 1 0 97 5 34531 0 41 591 126 930 31 137 140 60 3574 8 7 0 85 6 1026 0 38 391 6 829 17 98 142 45 2874 1 2 0 97 7 3597 0 9 419 4 749 21 82 182 48 6495 2 2 0 96 April 1, 2026 at 06:59:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39 0 34 2325 206 29 1 2 0 0 283 0 0 0 100 1 4 0 0 24 0 6 0 1 5 0 17 0 0 0 100 2 24 0 0 123 2 106 0 1 0 0 302 0 0 0 100 3 20 0 7 27 2 8 0 2 0 0 13 0 0 0 100 4 11 0 7 34 3 18 0 2 0 0 278 0 0 0 100 5 2 0 1 333 154 110 1 2 1 0 302 0 0 0 100 6 0 0 70 22 3 46 1 1 5 0 1102 0 1 0 99 7 0 0 0 23 2 6 0 0 2 0 303 0 0 0 100 April 1, 2026 at 06:59:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 19 2371 209 36 0 1 1 0 288 0 1 0 99 1 0 0 350 16 1 4 0 0 4 0 0 0 0 0 100 2 0 0 0 169 3 106 0 0 1 0 294 0 0 0 100 3 0 0 0 71 1 12 0 1 1 0 0 0 0 0 100 4 0 0 7 81 5 26 0 0 1 0 278 0 0 0 100 5 0 0 1 375 160 106 0 0 3 0 300 0 0 0 100 6 0 0 35 74 5 51 1 2 5 0 1098 0 1 0 99 7 0 0 0 67 2 6 0 1 2 0 300 0 0 0 100 April 1, 2026 at 06:59:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2315 207 21 0 1 0 0 274 0 0 0 99 1 0 0 0 22 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 128 3 106 0 0 0 0 295 0 0 0 100 3 0 0 0 26 0 2 0 0 0 0 0 0 0 0 100 4 0 0 7 39 3 22 0 1 0 0 260 0 0 0 100 5 0 0 7 331 154 106 0 0 0 0 300 0 0 0 100 6 0 0 0 31 2 36 1 0 0 0 1085 0 0 0 99 7 0 0 0 26 2 4 0 0 0 0 302 0 0 0 100 April 1, 2026 at 06:59:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2891 0 312 2424 211 889 30 148 123 58 4092 2 2 0 95 1 5984 0 27 364 1 825 27 125 169 42 4193 3 2 0 95 2 41651 0 208 240 2 965 37 127 165 62 4533 8 8 0 84 3 7071 0 137 415 1 853 22 105 180 63 5137 3 2 0 95 4 1247 0 30 462 4 996 21 130 90 81 3407 2 1 0 97 5 1258 0 124 704 134 867 13 117 96 58 3141 2 1 0 97 6 834 0 2 428 5 778 23 102 107 50 3329 1 1 0 98 7 3457 0 59 348 19 709 17 94 87 57 4101 2 2 0 96 April 1, 2026 at 06:59:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 105 2313 203 147 0 10 116 0 281 0 1 0 99 1 0 0 0 78 2 105 0 4 87 0 11 0 0 0 100 2 18 0 0 79 3 114 1 2 115 0 302 0 0 0 100 3 10 0 7 101 33 95 0 7 83 0 13 0 0 0 100 4 18 0 7 115 42 122 0 11 63 0 281 0 0 0 100 5 11 0 7 364 104 206 3 11 46 0 310 0 0 0 100 6 37 0 0 94 7 164 0 11 81 0 1117 0 0 0 99 7 0 0 0 167 52 192 0 11 53 0 308 0 0 0 100 April 1, 2026 at 06:59:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 63 2371 202 12 1 0 2 0 266 0 1 0 99 1 0 0 462 14 0 4 0 1 2 0 0 0 0 0 100 2 0 0 0 82 2 6 0 1 0 0 294 0 0 0 100 3 0 0 0 80 0 2 0 0 0 0 0 0 0 0 100 4 0 0 7 155 3 80 0 2 0 0 263 0 0 0 100 5 0 0 7 325 105 40 0 0 2 0 301 0 0 0 100 6 0 0 0 101 8 56 1 2 3 0 1103 0 0 0 100 7 0 0 0 180 51 102 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2302 201 16 1 0 0 0 278 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 121 5 118 0 2 0 0 273 0 0 0 100 5 0 0 7 225 111 4 0 0 1 0 300 0 0 0 100 6 0 0 0 33 8 66 1 2 0 0 1119 0 0 0 100 7 0 0 0 113 52 108 0 1 0 0 302 0 0 0 100 April 1, 2026 at 06:59:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 303 0 65 2396 204 445 9 74 57 32 2589 1 1 0 98 1 2836 0 25 283 3 298 6 41 85 32 3056 2 1 0 97 2 7835 0 125 152 4 471 11 68 110 49 2808 2 2 0 97 3 2457 0 3 230 1 412 4 67 105 53 2403 1 1 0 98 4 35924 0 339 255 7 464 16 57 69 62 2685 7 5 0 88 5 448 0 38 355 105 439 5 61 65 59 1584 0 1 0 98 6 463 0 14 245 12 446 8 52 45 43 2167 1 1 0 99 7 179 0 21 307 52 408 3 43 27 33 1570 0 1 0 99 April 1, 2026 at 06:59:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 787 0 121 2338 203 793 25 80 43 19 2105 2 1 0 97 1 1581 0 0 344 1 680 15 54 63 14 2370 2 1 0 96 2 3276 0 1 69 5 551 12 68 63 15 2330 1 1 0 98 3 3353 0 2 247 2 439 11 45 78 6 1600 1 1 0 98 4 1885 0 22 133 8 498 18 62 21 17 2004 2 2 0 96 5 355 0 15 266 104 362 10 52 26 8 1570 1 0 0 99 6 1816 0 183 191 6 388 7 38 49 22 3041 2 1 0 97 7 666 0 0 411 53 660 7 40 38 22 1942 2 0 0 98 April 1, 2026 at 06:59:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 63 2374 202 210 1 9 103 0 266 0 1 0 99 1 0 0 462 71 0 108 0 10 72 0 0 0 1 0 99 2 34 0 0 138 7 104 0 6 51 0 302 0 0 0 100 3 0 0 0 156 30 99 0 12 59 0 0 0 0 0 100 4 3 0 7 159 33 109 0 3 79 0 263 0 0 0 100 5 0 0 7 336 104 99 0 6 67 0 301 0 0 0 100 6 0 0 0 140 5 143 1 10 72 0 1086 0 0 0 100 7 0 0 0 221 52 182 0 5 51 0 321 0 0 0 100 April 1, 2026 at 06:59:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 202 134 0 2 1 0 266 0 0 0 100 1 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 22 8 16 0 0 0 0 303 0 0 0 100 3 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 4 0 0 7 10 3 4 0 0 0 0 260 0 0 0 100 5 0 0 7 217 104 10 0 0 0 0 309 0 0 0 100 6 0 0 0 22 3 41 1 1 1 0 1084 0 0 0 100 7 0 0 0 114 52 110 0 0 2 0 320 0 0 0 100 April 1, 2026 at 06:59:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2303 202 128 0 2 1 0 279 0 0 0 99 1 0 0 0 10 1 2 0 1 1 0 0 0 0 0 100 2 0 0 0 24 9 16 0 0 1 0 303 0 0 0 100 3 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 4 0 0 7 20 5 16 1 0 1 0 281 0 0 0 100 5 0 0 7 223 111 4 0 0 1 0 299 0 0 0 100 6 0 0 0 35 6 59 1 1 1 0 1097 0 0 0 100 7 0 0 0 114 52 104 0 0 1 0 300 0 0 0 100 April 1, 2026 at 06:59:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35335 0 82 2430 204 1081 35 177 92 69 5041 8 7 0 84 1 2186 0 26 534 3 1023 22 122 86 51 3274 2 2 0 96 2 1526 0 29 482 8 787 12 97 94 52 4517 2 2 0 96 3 7009 0 305 183 3 891 19 133 161 59 3713 3 3 0 95 4 8576 0 202 189 3 899 15 105 170 68 6107 3 3 0 95 5 2920 0 22 644 138 794 12 95 126 70 3387 2 1 0 96 6 5809 0 163 341 7 909 10 101 115 59 4050 3 2 0 96 7 1135 0 10 470 22 828 15 103 82 63 2975 1 1 0 98 April 1, 2026 at 06:59:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 21 2317 203 116 1 0 0 0 266 0 0 0 100 1 0 0 0 24 1 2 0 1 0 0 0 0 0 0 100 2 0 0 70 15 2 10 0 2 6 0 294 0 0 0 100 3 0 0 0 25 0 12 0 1 6 0 0 0 0 0 100 4 0 0 7 23 3 4 0 0 0 0 263 0 0 0 100 5 0 0 7 326 153 104 0 0 0 0 300 0 0 0 100 6 0 0 0 26 2 38 0 0 0 0 1082 0 0 0 100 7 34 0 7 31 7 16 0 1 0 0 309 0 0 0 100 April 1, 2026 at 06:59:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 62 2374 203 210 0 8 82 0 266 0 1 0 99 1 0 0 0 121 0 86 0 5 63 0 0 0 0 0 100 2 0 0 0 107 3 113 0 8 79 0 294 0 0 0 100 3 0 0 462 102 30 119 0 7 64 0 0 0 0 0 100 4 0 0 7 154 31 113 0 7 67 0 260 0 0 0 100 5 0 0 1 385 153 208 0 8 87 0 300 0 0 0 100 6 0 0 0 125 2 120 1 4 47 0 1081 0 0 0 100 7 0 0 0 121 8 110 0 4 57 0 311 0 0 0 100 April 1, 2026 at 06:59:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 20 2304 202 110 0 1 0 0 266 0 0 0 100 1 0 0 0 12 1 6 0 2 0 0 0 0 0 0 100 2 0 0 0 10 2 6 0 1 0 0 294 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 9 3 6 0 1 0 0 260 0 0 0 100 5 0 0 1 315 154 106 0 0 0 0 301 0 0 0 100 6 0 0 0 11 2 36 1 0 0 0 1084 0 0 0 100 7 0 0 0 18 6 12 0 0 0 0 308 0 0 0 100 April 1, 2026 at 06:59:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4917 0 294 2468 206 1009 36 145 134 57 4151 3 3 0 94 1 3064 0 324 447 0 884 23 116 105 72 4688 2 2 0 95 2 34765 0 16 351 22 977 33 137 83 59 3797 8 6 0 86 3 929 0 19 289 3 747 22 102 107 45 2857 2 1 0 96 4 8438 0 148 352 3 719 18 85 171 45 5015 3 3 0 94 5 7415 0 22 692 140 827 11 111 165 68 4537 2 2 0 96 6 3879 0 13 394 5 720 11 85 166 51 4302 2 2 0 97 7 825 0 17 414 8 760 13 86 81 52 3180 1 1 0 98 April 1, 2026 at 06:59:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 49 2320 205 51 1 3 0 0 289 0 0 0 100 1 17 0 77 87 1 76 1 3 6 0 9 0 0 0 100 2 49 0 0 142 56 123 0 3 0 0 311 0 0 0 100 3 30 0 0 26 1 6 0 1 6 0 10 0 0 0 100 4 0 0 7 32 4 12 0 2 1 0 273 0 0 0 100 5 0 0 7 232 104 10 0 2 3 0 316 0 0 0 100 6 0 0 0 32 2 46 1 1 0 0 1095 0 0 0 99 7 0 0 0 29 2 6 0 1 2 0 301 0 0 0 100 April 1, 2026 at 07:00:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 203 14 0 0 0 0 266 0 0 0 100 1 0 0 14 113 0 108 0 2 4 0 0 0 0 0 100 2 0 0 0 127 57 118 0 1 0 0 302 0 0 0 100 3 0 0 14 9 0 2 0 0 4 0 0 0 0 0 100 4 0 0 7 17 4 6 0 0 0 0 264 0 0 0 100 5 0 0 7 217 103 4 0 0 0 0 300 0 0 0 100 6 0 0 0 15 2 5 0 0 0 0 880 0 0 0 100 7 0 0 0 16 3 6 0 0 1 0 303 0 0 0 100 April 1, 2026 at 07:00:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2380 202 129 0 7 78 0 266 0 1 0 99 1 0 0 28 215 2 189 0 6 53 0 0 0 1 0 99 2 0 0 0 244 57 224 0 8 66 0 302 0 0 0 100 3 0 0 448 85 30 90 0 6 58 0 0 0 0 0 100 4 0 0 7 145 33 94 0 6 48 0 260 0 0 0 100 5 0 0 7 332 104 103 0 10 54 0 301 0 0 0 100 6 0 0 0 132 2 143 0 9 54 0 203 0 0 0 100 7 0 0 0 134 1 115 0 6 55 0 300 0 0 0 100 April 1, 2026 at 07:00:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2278 0 89 2424 203 1220 47 196 138 79 5378 3 2 0 95 1 1096 0 20 655 13 1155 27 164 85 65 3281 2 2 0 96 2 2615 0 327 333 41 1107 28 153 103 65 4501 3 2 0 95 3 36997 0 32 338 3 925 28 136 88 57 3312 8 6 0 85 4 2605 0 40 515 14 832 18 100 127 53 3964 2 1 0 97 5 3654 0 28 395 104 808 27 104 150 48 3665 2 2 0 96 6 8219 0 31 435 2 815 22 102 176 54 4813 3 3 0 95 7 6810 0 305 333 2 792 19 97 149 68 5766 3 2 0 95 April 1, 2026 at 07:00:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 105 2305 203 140 1 3 6 0 292 0 1 0 99 1 18 0 0 37 4 14 0 1 1 0 22 0 0 0 100 2 34 0 7 42 8 22 0 2 1 0 308 0 0 0 100 3 0 0 0 28 2 8 0 0 7 0 9 0 0 0 100 4 2 0 7 137 57 120 0 1 3 0 279 0 0 0 100 5 0 0 7 237 110 8 0 1 4 0 317 0 0 0 100 6 0 0 0 36 4 50 1 1 1 0 1121 0 0 0 100 7 14 0 0 33 4 15 0 3 3 0 309 0 0 0 100 April 1, 2026 at 07:00:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 63 2373 202 78 0 0 2 0 266 0 1 0 99 1 0 0 0 126 0 52 0 2 0 0 0 0 0 0 100 2 0 0 0 99 9 22 0 1 0 0 303 0 0 0 100 3 0 0 462 14 0 4 0 0 2 0 0 0 0 0 100 4 0 0 7 182 53 104 0 0 0 0 263 0 0 0 100 5 0 0 7 287 104 6 0 0 1 0 301 0 0 0 100 6 0 0 0 84 2 36 1 0 1 0 1082 0 0 0 99 7 0 0 0 82 2 4 0 0 1 0 302 0 0 0 100 April 1, 2026 at 07:00:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 202 8 0 1 0 0 266 0 0 0 100 1 0 0 0 112 0 110 0 1 0 0 0 0 0 0 100 2 0 0 0 29 8 28 0 1 1 0 302 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 1 0 7 110 53 106 0 1 0 0 260 0 0 0 100 5 0 0 7 213 103 4 0 0 0 0 300 0 0 0 100 6 0 0 0 12 2 36 0 0 0 0 1082 0 0 0 100 7 0 0 0 8 1 2 0 0 1 0 300 0 0 0 100 April 1, 2026 at 07:00:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1245 0 169 2385 203 652 13 112 168 55 2366 1 2 0 97 1 8912 0 17 367 0 601 10 85 78 53 1737 2 2 0 96 2 1663 0 206 292 11 508 9 60 101 47 2277 1 1 0 97 3 524 0 7 280 31 500 6 82 106 43 1359 0 1 0 99 4 409 0 19 300 84 516 10 64 126 47 1406 1 1 0 99 5 201 0 26 463 104 408 7 58 118 27 1910 1 1 0 98 6 5012 0 19 225 2 439 7 43 197 49 6047 2 2 0 96 7 6365 0 144 272 2 375 4 55 169 40 1889 1 1 0 97 April 1, 2026 at 07:00:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3802 0 62 2370 205 754 31 118 96 11 3551 3 2 0 95 1 26982 0 79 66 2 868 35 109 75 31 3351 7 6 0 87 2 248 0 0 432 3 755 23 81 39 10 2955 1 1 0 98 3 1133 0 7 385 2 722 13 67 45 9 2114 1 1 0 98 4 3184 0 19 140 9 598 25 80 62 10 2856 3 1 0 96 5 390 0 3 601 149 636 14 55 33 12 1610 1 1 0 98 6 627 0 0 342 4 659 20 50 54 9 3106 1 1 0 98 7 3568 0 180 140 4 481 11 48 61 13 1868 1 1 0 98 April 1, 2026 at 07:00:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 63 2376 203 128 0 0 3 0 278 0 1 0 99 1 0 0 0 82 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 89 3 170 0 0 0 0 624 0 0 0 100 3 0 0 462 19 1 6 0 0 2 0 0 0 0 0 100 4 0 0 7 94 6 22 0 3 0 0 278 0 0 0 100 5 0 0 7 395 159 109 0 2 2 0 300 0 0 0 100 6 34 0 0 105 8 63 1 0 0 0 1116 0 0 0 100 7 0 0 0 87 2 6 0 0 1 0 302 0 0 0 100 April 1, 2026 at 07:00:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 203 116 0 0 0 0 272 0 0 0 100 1 0 0 0 9 0 2 0 0 0 0 1 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 12 4 6 0 0 0 0 260 0 0 0 100 5 0 0 7 315 154 106 0 0 0 0 301 0 0 0 100 6 0 0 0 23 8 48 0 0 0 0 1093 0 0 0 100 7 0 0 0 9 1 6 0 1 0 0 302 0 0 0 100 April 1, 2026 at 07:00:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 202 114 0 0 0 0 266 0 0 0 100 1 0 0 0 9 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 12 4 6 0 0 0 0 260 0 0 0 100 5 0 0 7 321 153 114 1 0 0 0 300 0 0 0 100 6 0 0 0 26 9 50 1 0 1 0 1095 0 0 0 100 7 0 0 0 12 3 8 0 1 0 0 303 0 0 0 100 April 1, 2026 at 07:00:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7949 0 95 2493 205 1186 39 187 261 64 3671 3 3 0 94 1 4787 0 146 280 2 1048 36 166 216 67 4222 2 2 0 96 2 1926 0 15 234 6 965 32 157 193 62 4597 2 2 0 96 3 805 0 13 246 34 1074 29 147 173 72 3288 2 2 0 97 4 2352 0 331 531 36 1018 21 137 148 61 4243 2 2 0 96 5 1139 0 19 796 156 979 18 113 197 58 2834 1 1 0 98 6 37740 0 219 296 14 946 34 108 232 61 6753 9 7 0 84 7 7531 0 25 491 4 877 22 118 223 61 4722 3 3 0 94 April 1, 2026 at 07:00:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2311 200 108 0 0 0 0 0 0 0 0 100 1 37 0 14 30 7 14 0 0 0 0 275 0 0 0 100 2 0 0 0 24 3 8 0 0 0 0 294 0 0 0 100 3 0 0 0 18 0 0 0 0 0 0 0 0 0 0 100 4 0 0 77 15 4 8 0 0 6 0 259 0 1 0 99 5 0 0 8 328 153 110 0 0 6 0 300 0 0 0 100 6 0 0 0 24 2 38 2 1 0 0 1097 0 0 0 100 7 0 0 0 22 2 4 0 0 1 0 302 0 0 0 100 April 1, 2026 at 07:00:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2374 201 143 0 2 2 0 12 0 1 0 99 1 0 0 14 92 7 12 0 0 1 0 274 0 0 0 100 2 0 0 0 88 4 8 0 1 1 0 294 0 0 0 100 3 0 0 0 80 1 0 0 0 1 0 0 0 0 0 100 4 0 0 7 97 6 22 0 0 1 0 280 0 0 0 100 5 0 0 469 333 161 108 0 1 4 0 300 0 0 0 100 6 0 0 0 95 5 46 0 0 1 0 1098 0 0 0 100 7 0 0 0 89 2 10 0 2 2 0 300 0 0 0 100 April 1, 2026 at 07:00:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 108 0 0 0 0 0 0 0 0 100 1 0 0 14 19 6 14 0 1 0 0 274 0 0 0 100 2 0 0 0 14 3 8 0 0 0 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 2 0 7 12 4 6 0 0 0 0 260 0 0 0 100 5 0 0 7 316 154 106 1 0 0 0 301 0 0 0 100 6 0 0 0 12 2 36 1 0 1 0 1084 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 302 0 0 0 100 April 1, 2026 at 07:00:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43227 0 190 2416 202 1243 44 182 169 78 6060 9 9 0 82 1 7469 0 223 194 16 1229 37 180 142 72 5177 3 3 0 94 2 1364 0 18 607 20 1030 14 112 95 78 4018 1 2 0 96 3 4856 0 71 544 3 853 25 114 117 45 3710 3 2 0 96 4 2514 0 133 478 6 861 16 110 128 61 4191 3 1 0 96 5 2848 0 211 694 130 822 24 97 66 56 3366 3 2 0 95 6 1028 0 6 462 3 902 19 105 80 56 4330 1 1 0 97 7 497 0 17 403 2 704 12 94 117 55 3473 2 1 0 97 April 1, 2026 at 07:00:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 28 2320 201 236 0 14 99 0 5 0 1 0 99 1 23 0 14 75 3 108 0 7 61 0 277 0 0 0 100 2 59 0 0 193 58 231 0 12 70 0 317 0 0 0 100 3 0 0 70 91 34 91 0 7 88 0 9 0 1 0 99 4 1 0 7 109 39 118 0 6 72 0 280 0 0 0 100 5 0 0 7 291 104 129 0 9 77 0 320 0 0 0 100 6 0 0 0 84 5 136 1 5 74 0 1106 0 0 0 100 7 12 0 0 90 2 140 1 12 75 0 315 0 0 0 100 April 1, 2026 at 07:00:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2375 200 112 0 0 0 0 0 0 1 0 99 1 0 0 14 80 1 4 0 1 0 0 266 0 0 0 100 2 0 0 0 193 58 116 0 0 0 0 303 0 0 0 100 3 0 0 42 74 0 4 0 1 1 0 0 0 0 0 100 4 0 0 7 86 5 8 0 0 0 0 263 0 0 0 100 5 0 0 463 229 104 18 0 0 2 0 301 0 0 0 100 6 0 0 0 83 2 38 1 1 0 0 1086 0 0 0 100 7 0 0 0 79 1 2 0 0 1 0 300 0 0 0 100 April 1, 2026 at 07:00:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 120 0 0 0 0 12 0 0 0 100 1 0 0 14 8 1 2 0 0 0 0 266 0 0 0 100 2 0 0 0 120 57 116 0 1 0 0 302 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 22 7 16 0 0 0 0 273 0 0 0 100 5 0 0 7 220 109 4 1 0 1 0 300 0 0 0 100 6 0 0 0 18 2 50 1 0 1 0 1097 0 0 0 99 7 0 0 0 14 2 8 0 0 0 0 302 0 0 0 100 April 1, 2026 at 07:00:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10469 0 195 2403 201 1457 44 212 212 65 5742 3 4 0 92 1 10353 0 71 757 2 1115 36 153 179 60 5036 5 3 0 92 2 36482 0 204 355 48 1215 40 171 120 72 5867 9 7 0 84 3 1792 0 8 546 4 921 20 112 113 63 4933 3 1 0 96 4 1494 0 25 496 14 916 18 115 120 59 3158 2 2 0 97 5 1723 0 313 414 104 946 22 122 72 49 3286 2 1 0 97 6 806 0 13 258 3 1097 28 134 91 63 6242 2 1 0 97 7 951 0 13 161 3 1008 25 128 127 57 3968 2 1 0 97 April 1, 2026 at 07:00:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 91 2311 203 129 0 5 10 0 333 1 1 0 98 1 6 0 14 28 1 14 0 1 7 0 290 0 0 0 100 2 72 0 7 44 6 32 0 4 2 0 630 0 0 0 100 3 12 0 0 32 4 16 0 2 0 0 7 0 0 0 100 4 2 0 7 31 5 10 0 1 1 0 269 0 0 0 100 5 36 0 7 248 108 27 0 1 0 0 15 0 0 0 100 6 0 0 0 30 3 40 1 1 3 0 1103 0 0 0 100 7 0 0 0 131 54 112 0 0 1 0 21 0 0 0 100 April 1, 2026 at 07:00:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2376 201 212 0 9 91 0 300 0 1 0 99 1 2 0 476 50 1 78 0 4 50 0 266 0 1 0 99 2 0 0 0 137 3 100 0 3 72 0 594 0 0 0 100 3 0 0 0 151 30 87 0 6 54 0 0 0 0 0 100 4 0 0 7 149 35 94 0 7 54 0 263 0 0 0 100 5 0 0 7 354 109 129 0 10 74 0 10 0 0 0 100 6 0 0 0 146 4 157 1 11 103 0 1083 0 1 0 99 7 0 0 0 229 50 202 0 7 38 0 0 0 0 0 100 April 1, 2026 at 07:00:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 108 0 0 2 0 300 0 0 0 100 1 0 0 14 10 1 12 0 1 1 0 266 0 0 0 100 2 0 0 0 21 3 16 1 0 1 0 594 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 14 5 8 0 0 0 0 260 0 0 0 100 5 0 0 7 225 108 18 0 0 0 0 17 0 0 0 100 6 0 0 0 12 2 36 1 0 0 0 1083 0 0 0 100 7 0 0 0 110 51 106 0 0 0 0 20 0 0 0 100 April 1, 2026 at 07:00:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 128 0 1 1 0 312 0 0 0 100 1 0 0 14 15 2 12 1 0 1 0 266 0 0 0 100 2 0 0 0 22 4 14 0 0 1 0 594 0 0 0 100 3 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 4 0 0 7 25 7 22 1 0 1 0 274 0 0 0 100 5 0 0 7 232 117 14 0 0 1 0 6 0 0 0 100 6 0 0 0 23 5 46 1 0 1 0 1095 0 0 0 99 7 0 0 0 111 51 104 0 0 2 0 0 0 0 0 100 April 1, 2026 at 07:00:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12466 0 365 2468 203 1212 45 189 211 55 5366 3 4 0 93 1 40481 0 147 264 1 932 24 153 135 77 6816 9 8 0 83 2 2831 0 21 290 4 944 37 152 140 90 4819 3 2 0 95 3 2180 0 226 187 5 961 35 145 98 66 3726 2 2 0 97 4 833 0 12 296 6 994 26 128 112 51 3899 2 1 0 97 5 2258 0 28 629 109 758 21 114 102 62 3370 3 2 0 96 6 2319 0 26 499 4 753 16 91 67 27 3266 2 1 0 97 7 878 0 12 460 39 704 18 95 130 36 2297 1 1 0 98 April 1, 2026 at 07:00:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 201 156 0 1 0 0 300 0 0 0 100 1 2 0 14 75 27 60 0 1 6 0 266 0 0 0 100 2 34 0 0 42 9 28 0 2 0 0 603 0 0 0 100 3 0 0 70 13 1 6 0 1 6 0 0 0 0 0 100 4 0 0 14 27 5 10 0 1 0 0 263 0 0 0 100 5 0 0 7 224 102 2 0 0 0 0 0 0 0 0 100 6 0 0 0 23 2 36 1 0 1 0 1093 0 0 0 100 7 0 0 0 19 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2382 201 213 0 9 84 0 300 0 1 0 99 1 0 0 476 101 21 134 0 9 92 0 266 0 1 0 99 2 0 0 0 210 39 183 1 11 46 0 603 0 0 0 100 3 0 0 42 146 30 84 0 5 71 0 0 0 1 0 99 4 0 0 7 160 34 114 0 7 78 0 260 0 0 0 100 5 0 0 7 333 102 111 0 11 55 0 0 0 0 0 100 6 0 0 0 134 3 136 1 8 57 0 1083 0 0 0 99 7 0 0 0 147 1 131 0 7 55 0 2 0 0 0 100 April 1, 2026 at 07:00:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 201 110 0 0 1 0 300 0 0 0 100 1 0 0 14 7 1 2 1 0 0 0 266 0 0 0 100 2 0 0 0 121 58 116 0 0 1 0 601 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 15 6 10 0 0 0 0 261 0 0 0 100 5 0 0 1 213 103 4 0 0 0 0 1 0 0 0 100 6 0 0 0 10 2 36 0 0 0 0 1086 0 0 0 100 7 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:00:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5053 0 387 2403 202 1083 32 164 120 54 4836 3 4 0 93 1 9075 0 42 358 2 996 25 155 136 75 4760 3 2 0 94 2 8139 0 154 622 35 1017 21 118 208 66 4366 3 2 0 94 3 1391 0 14 229 28 946 24 121 136 78 3026 1 1 0 98 4 35752 0 22 297 8 776 30 108 92 59 3838 8 6 0 86 5 1857 0 211 459 111 780 19 91 92 45 2797 1 1 0 97 6 1315 0 9 378 4 704 18 77 84 55 5132 2 1 0 97 7 1318 0 17 226 5 792 14 83 82 51 4608 2 2 0 96 April 1, 2026 at 07:00:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2316 201 110 0 2 1 0 308 0 0 0 100 1 6 0 84 17 1 10 0 1 6 0 275 0 1 0 99 2 53 0 0 45 9 28 0 3 8 0 624 0 0 0 100 3 0 0 0 124 50 106 0 3 0 0 13 0 0 0 100 4 11 0 7 27 3 10 1 3 0 0 273 0 0 0 100 5 0 0 7 234 104 14 0 2 0 0 14 0 0 0 100 6 28 0 7 30 2 42 1 1 0 0 1108 0 0 0 100 7 0 0 0 28 0 20 0 2 0 0 7 0 0 0 100 April 1, 2026 at 07:00:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2359 202 104 0 0 1 0 300 0 1 0 99 1 0 0 49 59 1 7 0 2 3 0 266 0 0 0 100 2 0 0 350 45 10 34 1 0 3 0 604 0 0 0 100 3 0 0 0 162 51 102 0 0 0 0 0 0 0 0 100 4 0 0 7 64 3 4 0 0 0 0 263 0 0 0 100 5 0 0 1 269 103 6 0 0 0 0 0 0 0 0 100 6 0 0 0 70 2 40 1 0 0 0 1084 0 0 0 100 7 0 0 0 64 2 4 0 0 0 0 3 0 0 0 100 April 1, 2026 at 07:00:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2329 201 243 0 10 98 0 300 0 1 0 99 1 0 0 126 46 1 76 1 4 61 0 266 0 0 0 100 2 0 0 0 97 8 125 0 6 52 0 601 0 0 0 100 3 0 0 0 198 80 198 0 5 81 0 0 0 0 0 100 4 1 0 7 107 33 120 0 9 82 0 261 0 0 0 100 5 0 0 7 290 104 124 0 6 68 0 1 0 0 0 100 6 0 0 0 72 3 128 0 9 64 0 1086 0 0 0 100 7 0 0 0 74 2 98 0 6 73 0 21 0 0 0 100 April 1, 2026 at 07:00:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1735 0 60 2422 202 1352 47 238 117 77 6922 3 3 0 94 1 1391 0 51 204 2 1279 52 239 136 68 4752 3 2 0 95 2 37616 0 132 199 10 1235 61 218 198 47 5708 9 7 0 83 3 6161 0 129 593 34 1072 27 129 168 60 3922 2 2 0 95 4 6995 0 203 213 12 1107 39 159 134 73 6252 3 2 0 94 5 5976 0 216 759 104 948 31 127 152 52 3309 3 2 0 95 6 3411 0 53 336 13 1038 29 134 109 72 4974 3 2 0 95 7 1550 0 4 265 1 1023 22 130 113 64 3447 2 1 0 97 April 1, 2026 at 07:00:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 91 2308 202 120 0 2 8 0 311 0 1 0 99 1 29 0 14 34 3 14 0 0 1 0 291 0 0 0 100 2 48 0 0 52 9 38 0 1 8 0 611 0 0 0 100 3 23 0 0 32 5 8 0 1 4 0 11 0 0 0 100 4 23 0 7 43 9 28 0 1 1 0 300 0 0 0 100 5 6 0 7 293 139 65 0 2 1 0 28 0 0 0 100 6 7 0 0 87 29 107 1 5 1 0 1130 0 0 0 100 7 0 0 7 30 2 14 0 2 1 0 5 0 0 0 100 April 1, 2026 at 07:00:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2371 201 112 0 1 2 0 300 0 1 0 99 1 0 0 14 84 1 12 0 0 0 0 266 0 0 0 100 2 0 0 462 42 9 34 1 1 2 0 603 0 0 0 99 3 0 0 0 80 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 82 3 4 0 0 0 0 263 0 0 0 100 5 0 0 7 385 153 104 0 0 0 0 0 0 0 0 100 6 0 0 0 87 2 36 1 0 0 0 1085 0 0 0 100 7 0 0 0 84 2 6 0 0 0 0 3 0 0 0 100 April 1, 2026 at 07:00:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 109 0 0 1 0 300 0 0 0 100 1 0 0 14 13 1 12 1 1 1 0 266 0 0 0 100 2 0 0 0 32 8 26 0 0 0 0 602 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 12 4 6 0 0 0 0 261 0 0 0 100 5 0 0 7 313 153 104 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 36 0 0 0 0 1085 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2495 0 352 2373 202 686 6 84 142 67 4065 2 2 0 96 1 21442 0 211 303 3 485 8 78 402 44 2805 5 4 0 91 2 34479 0 5 345 12 410 10 60 464 39 2246 8 4 0 88 3 298 0 6 343 33 510 1 78 146 54 1973 1 1 0 98 4 7059 0 35 350 35 573 6 75 200 55 2576 1 2 0 96 5 2325 0 31 560 153 582 2 68 120 46 1601 1 1 0 98 6 941 0 24 290 3 463 6 54 164 35 3182 1 1 0 98 7 530 0 22 306 2 510 6 73 230 30 1388 0 1 0 99 April 1, 2026 at 07:00:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 900 0 34 2353 204 781 24 101 55 13 2767 1 1 0 97 1 7697 0 28 56 3 706 20 96 40 17 2865 3 4 0 94 2 639 0 0 147 47 730 22 84 41 4 2482 1 1 0 98 3 2383 0 11 327 3 620 14 57 86 10 2236 3 1 0 96 4 4086 0 188 259 3 487 6 44 58 18 2641 3 1 0 96 5 3593 0 74 534 107 519 14 57 62 10 1771 2 2 0 97 6 897 0 1 294 5 596 8 55 72 30 2847 1 1 0 98 7 790 0 0 244 2 446 13 39 58 17 1682 1 1 0 99 April 1, 2026 at 07:00:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2376 201 115 0 1 1 0 300 0 1 0 99 1 2 0 14 87 1 12 0 1 0 0 278 0 0 0 100 2 0 0 462 105 45 92 0 1 1 0 294 0 0 0 100 3 0 0 0 103 9 22 1 1 1 0 300 0 0 0 100 4 0 0 7 99 5 26 0 1 0 0 273 0 0 0 100 5 34 0 49 304 116 20 0 1 1 0 9 0 0 0 100 6 0 0 0 92 2 50 1 0 1 0 1105 0 0 0 99 7 0 0 0 85 1 6 0 1 0 0 2 0 0 0 100 April 1, 2026 at 07:00:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 110 0 0 1 0 300 0 0 0 100 1 2 0 14 11 1 2 2 0 0 0 377 1 0 0 99 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 110 52 104 0 0 0 0 300 0 0 0 100 4 0 0 7 12 4 6 0 0 0 0 261 0 0 0 100 5 0 0 7 227 110 18 0 0 0 0 10 0 0 0 100 6 0 0 0 12 2 38 1 1 0 0 1082 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 112 0 0 2 0 300 0 0 0 100 1 0 0 14 8 1 2 0 0 0 0 266 0 0 0 100 2 0 0 0 12 2 6 0 0 0 0 294 0 0 0 100 3 0 0 0 110 52 104 0 0 1 0 300 0 0 0 100 4 0 0 7 16 3 14 0 1 0 0 260 0 0 0 100 5 0 0 7 225 110 14 0 0 0 0 8 0 0 0 100 6 0 0 0 12 2 36 1 0 0 0 1081 0 0 0 99 7 0 0 0 11 2 4 0 0 0 0 3 0 0 0 100 April 1, 2026 at 07:00:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3740 0 315 2398 207 1293 33 191 205 78 3789 2 2 0 95 1 4504 0 210 317 28 1313 34 174 216 70 3942 4 2 0 95 2 35054 0 30 320 3 996 28 126 156 55 4752 8 9 0 83 3 763 0 17 561 46 1025 21 109 223 52 4430 2 1 0 97 4 10591 0 213 540 44 1116 24 121 240 69 4379 3 3 0 94 5 7949 0 31 759 112 849 18 87 181 55 4116 3 2 0 95 6 1125 0 29 332 7 1088 15 148 190 98 4885 1 2 0 97 7 887 0 13 209 5 899 26 112 168 49 2828 3 1 0 96 April 1, 2026 at 07:00:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2309 201 113 0 0 6 0 300 0 1 0 99 1 34 0 0 134 56 118 0 1 6 0 9 0 0 0 100 2 0 0 0 23 2 6 0 1 0 0 294 0 0 0 100 3 0 0 7 24 2 6 1 1 0 0 300 0 0 0 100 4 4 0 14 22 4 4 0 0 0 0 269 0 0 0 100 5 0 0 7 226 103 4 0 0 0 0 0 0 0 0 100 6 0 0 7 28 4 40 1 0 1 0 1362 0 0 0 99 7 0 0 0 24 1 4 0 0 0 0 2 0 0 0 100 April 1, 2026 at 07:00:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2373 201 122 0 3 4 0 300 0 1 0 99 1 0 0 462 128 54 118 0 0 3 0 15 0 1 0 99 2 0 0 0 90 5 10 0 1 1 0 300 0 0 0 100 3 0 0 0 87 3 6 0 0 2 0 300 0 0 0 100 4 0 0 14 97 6 20 0 0 1 0 280 0 0 0 100 5 0 0 7 291 109 4 0 0 2 0 0 0 0 0 100 6 0 0 7 98 5 54 2 0 2 0 1365 0 1 0 99 7 0 0 0 86 1 6 0 2 1 0 0 0 0 0 100 April 1, 2026 at 07:00:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 110 0 0 0 0 300 0 0 0 100 1 0 0 0 108 50 100 0 0 0 0 0 0 0 0 100 2 0 0 0 20 7 16 0 1 0 0 302 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 4 0 0 14 10 2 4 0 1 0 0 266 0 0 0 100 5 0 0 7 214 103 4 0 0 0 0 0 0 0 0 100 6 1 0 7 19 4 50 0 1 0 0 1351 0 0 0 99 7 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 April 1, 2026 at 07:00:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6442 0 183 2410 202 1236 34 164 186 75 4848 2 3 0 94 1 7369 0 64 355 27 894 23 127 119 60 3587 3 2 0 95 2 1592 0 6 500 10 842 13 106 86 45 2791 2 1 0 97 3 2561 0 213 271 4 807 27 121 124 64 3119 2 2 0 96 4 5951 0 30 231 28 724 17 101 149 48 5595 3 3 0 95 5 4249 0 142 462 104 705 23 91 118 64 4489 2 2 0 96 6 35303 0 203 277 6 961 25 111 102 70 5048 8 7 0 85 7 557 0 9 424 2 791 9 81 111 56 2743 2 1 0 97 April 1, 2026 at 07:00:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 63 0 20 2332 208 142 0 13 75 0 329 0 1 0 99 1 0 0 70 80 1 132 0 10 83 0 11 0 1 0 99 2 0 0 0 181 2 221 0 7 98 0 303 0 0 0 100 3 11 0 0 104 32 105 1 6 75 0 310 0 0 0 100 4 7 0 21 136 54 127 1 9 68 0 277 0 0 0 100 5 0 0 1 338 133 172 1 13 93 0 4 0 0 0 100 6 2 0 7 74 5 132 2 8 90 0 1377 0 0 0 100 7 0 0 0 77 1 114 0 10 74 0 15 0 0 0 100 April 1, 2026 at 07:00:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 47 2383 207 60 0 3 3 0 309 0 1 0 99 1 0 0 0 90 0 18 0 3 0 0 0 0 0 0 100 2 0 0 461 78 2 66 0 0 2 0 293 0 0 0 99 3 0 0 0 84 2 4 0 1 1 0 300 0 0 0 100 4 0 0 14 81 2 6 0 1 0 0 266 0 0 0 100 5 0 0 1 386 154 106 0 0 0 0 1 0 0 0 100 6 0 0 7 95 5 48 1 2 1 0 1355 0 0 0 100 7 0 0 0 79 0 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2316 206 128 0 1 1 0 310 0 0 0 100 1 1 0 0 15 1 14 0 2 0 0 13 0 0 0 100 2 6 0 0 14 3 8 0 0 0 0 300 0 0 0 100 3 2 0 0 9 1 4 0 1 1 0 311 0 0 0 100 4 0 0 14 13 2 14 0 0 0 0 289 0 0 0 100 5 1 0 7 320 159 106 0 1 1 0 1 0 0 0 100 6 1 0 7 30 7 60 1 1 3 0 1365 0 0 0 100 7 0 0 0 12 1 6 0 1 1 0 9 0 0 0 100 April 1, 2026 at 07:00:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5745 0 74 2441 211 1163 37 194 184 60 4363 2 3 0 94 1 4516 0 137 269 2 962 32 145 149 70 5122 3 2 0 95 2 5392 0 44 333 3 891 29 161 105 66 4070 4 2 0 94 3 4808 0 199 509 2 907 9 110 92 76 3335 3 2 0 95 4 35517 0 152 278 3 941 33 139 96 72 4552 8 7 0 86 5 1855 0 18 557 151 903 24 120 82 69 4605 2 1 0 97 6 724 0 28 400 9 737 20 115 94 55 4273 2 1 0 97 7 5530 0 200 408 2 801 14 95 136 57 3330 2 2 0 96 April 1, 2026 at 07:00:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2319 202 114 1 3 0 0 312 0 0 0 100 1 36 0 70 35 9 30 1 2 6 0 22 0 1 0 99 2 0 0 0 27 1 13 0 4 6 0 307 0 0 0 100 3 12 0 0 38 5 21 1 2 2 0 319 0 0 0 100 4 9 0 14 28 4 12 0 1 0 0 279 0 0 0 100 5 11 0 14 239 103 18 0 4 0 0 10 0 0 0 100 6 0 0 7 137 55 148 1 1 1 0 1375 0 0 0 100 7 22 0 0 32 5 12 0 2 0 0 26 0 0 0 100 April 1, 2026 at 07:00:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 50 2379 202 216 0 7 86 0 301 0 1 0 99 1 0 0 0 157 6 131 0 7 71 0 10 0 0 0 100 2 0 0 462 76 2 123 0 5 58 0 294 0 0 0 99 3 0 0 0 155 34 92 0 5 58 0 300 0 0 0 100 4 2 0 14 158 34 95 0 6 71 0 268 0 0 0 100 5 0 0 7 340 105 101 0 7 67 0 1 0 0 0 100 6 0 0 7 226 56 209 1 7 55 0 1350 0 0 0 99 7 0 0 0 138 1 118 0 11 61 0 21 0 0 0 100 April 1, 2026 at 07:00:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 108 0 0 3 0 300 0 0 0 100 1 0 0 0 17 5 10 0 0 0 0 8 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 16 2 12 0 0 1 0 300 0 0 0 100 4 0 0 14 7 2 2 0 0 0 0 266 0 0 0 100 5 0 0 7 225 104 18 0 0 0 0 9 0 0 0 100 6 0 0 7 115 54 140 1 0 1 0 1345 0 0 0 100 7 0 0 0 11 1 10 0 2 0 0 20 0 0 0 100 April 1, 2026 at 07:00:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2187 0 28 2359 202 297 1 41 43 31 1025 0 1 0 99 1 1527 0 125 152 9 139 3 21 22 19 1339 1 1 0 99 2 83 0 14 171 4 131 1 22 28 14 716 0 0 0 99 3 631 0 253 85 3 138 3 27 23 23 341 0 1 0 99 4 80 0 19 112 4 120 4 25 26 14 873 0 0 0 100 5 58 0 13 327 113 133 0 29 19 18 721 0 0 0 100 6 21 0 16 122 16 156 2 17 33 15 1663 0 1 0 99 7 4796 0 14 184 41 197 2 22 65 20 927 1 2 0 98 April 1, 2026 at 07:00:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 40051 0 330 2355 202 949 33 141 146 34 4513 9 9 0 82 1 4977 0 22 430 10 719 22 107 100 32 3429 3 2 0 95 2 3211 0 15 476 6 767 15 126 100 40 3418 3 1 0 96 3 2034 0 6 478 5 890 21 106 102 42 3620 2 1 0 97 4 2483 0 128 349 12 701 24 105 52 47 4157 3 1 0 96 5 410 0 9 731 134 850 18 101 57 39 3859 2 1 0 98 6 767 0 19 361 4 723 15 82 74 30 3530 1 1 0 98 7 1339 0 8 318 1 640 17 74 79 19 2845 1 1 0 98 April 1, 2026 at 07:00:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2373 202 14 0 0 2 0 300 0 1 0 99 1 0 0 462 17 1 2 0 0 2 0 0 0 0 0 100 2 0 0 0 83 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 82 1 2 0 0 0 0 0 0 0 0 100 4 2 0 14 83 3 6 0 1 0 0 566 0 0 0 100 5 0 0 7 489 153 210 0 0 0 0 0 0 0 0 100 6 0 0 7 89 4 40 1 0 0 0 1349 0 0 0 100 7 34 0 0 99 6 24 0 0 0 0 9 0 0 0 100 April 1, 2026 at 07:00:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 202 233 1 11 94 0 300 0 0 0 100 1 0 0 0 77 0 142 0 9 59 0 0 0 0 0 100 2 0 0 0 74 1 137 0 9 85 0 294 0 0 0 100 3 0 0 0 98 40 102 1 10 74 0 0 0 0 0 100 4 0 0 14 96 42 97 0 5 73 0 565 0 0 0 100 5 0 0 7 390 153 230 1 7 66 0 0 0 0 0 100 6 1 0 7 62 6 129 1 4 53 0 1343 0 0 0 100 7 0 0 0 82 6 137 0 6 47 0 11 0 0 0 100 April 1, 2026 at 07:00:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 106 0 0 0 0 300 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 6 0 1 1 0 566 0 0 0 100 5 0 0 7 323 154 114 0 0 0 0 1 0 0 0 100 6 0 0 7 15 4 40 1 0 0 0 1342 0 0 0 100 7 0 0 0 16 5 10 0 0 0 0 8 0 0 0 100 April 1, 2026 at 07:00:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10713 0 261 2404 203 1152 20 151 169 57 5611 3 4 0 94 1 6637 0 204 217 3 1017 22 118 123 71 4824 3 3 0 94 2 1774 0 146 454 4 882 26 116 85 72 4370 2 1 0 96 3 951 0 13 199 4 955 21 141 118 77 3476 2 1 0 97 4 4285 0 56 447 6 766 17 95 107 51 4126 4 2 0 94 5 4464 0 142 765 126 851 17 89 105 77 4065 3 2 0 96 6 34387 0 16 223 9 817 29 98 64 59 4332 8 6 0 86 7 647 0 24 439 40 711 11 87 127 45 2426 1 1 0 98 April 1, 2026 at 07:00:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2316 201 114 0 2 3 0 315 0 0 0 100 1 0 0 0 26 2 8 0 0 0 0 14 0 0 0 100 2 46 0 70 27 6 20 0 2 6 0 312 0 0 0 99 3 0 0 0 26 1 6 0 0 6 0 1 0 0 0 100 4 23 0 14 25 4 10 0 0 2 0 580 0 0 0 100 5 1 0 7 238 104 18 0 1 0 0 5 0 0 0 100 6 25 0 0 28 2 38 1 0 0 0 1105 0 0 0 99 7 0 0 7 135 52 122 0 3 0 0 270 0 0 0 100 April 1, 2026 at 07:01:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2363 202 110 0 0 0 0 302 0 1 0 99 1 0 0 0 68 1 8 0 4 0 0 0 0 0 0 100 2 0 0 35 71 6 15 0 1 3 0 302 0 1 0 99 3 0 0 350 17 1 6 0 0 3 0 0 0 0 0 100 4 0 0 14 65 3 4 0 0 1 0 566 0 0 0 100 5 0 0 7 272 103 8 0 1 0 0 0 0 0 0 100 6 0 0 0 67 2 38 1 1 0 0 1082 0 0 0 99 7 0 0 7 168 54 108 0 0 0 0 265 0 0 0 100 April 1, 2026 at 07:01:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2312 202 242 0 15 78 0 300 0 1 0 99 1 0 0 0 94 0 137 0 13 98 0 0 0 0 0 100 2 0 0 0 90 7 119 0 7 71 0 302 0 0 0 100 3 0 0 0 105 31 103 0 12 54 0 0 0 0 0 100 4 0 0 14 100 34 90 0 5 69 0 566 0 0 0 100 5 0 0 7 276 105 104 0 9 69 0 1 0 0 0 100 6 0 0 0 68 3 117 0 7 51 0 1082 0 0 0 99 7 0 0 7 178 52 210 0 10 48 0 260 0 0 0 100 April 1, 2026 at 07:01:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 45884 0 496 2374 206 1021 39 166 191 72 6238 9 11 0 80 1 9353 0 219 512 1 849 20 146 167 73 3579 3 2 0 94 2 1799 0 16 292 9 1049 22 126 154 80 5407 2 1 0 97 3 2308 0 26 349 2 952 17 126 109 57 3977 2 1 0 97 4 1207 0 32 405 3 723 11 99 79 57 3629 2 1 0 97 5 1060 0 25 364 104 736 21 117 117 52 3210 2 1 0 97 6 1204 0 10 358 2 736 21 88 61 45 3588 2 2 0 97 7 1269 0 15 482 52 738 12 76 114 42 2795 2 1 0 97 April 1, 2026 at 07:01:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2317 201 14 0 2 3 0 309 0 0 0 100 1 0 0 70 24 2 16 0 2 7 0 25 0 1 0 99 2 8 0 7 143 6 128 0 3 7 0 313 0 0 0 100 3 8 0 0 32 4 10 0 1 1 0 21 0 0 0 100 4 73 0 14 50 12 38 1 3 2 0 609 0 0 0 100 5 0 0 7 239 111 13 0 1 2 0 18 0 0 0 100 6 0 0 0 34 4 47 1 2 1 0 1104 0 0 0 99 7 0 0 7 136 55 122 0 1 0 0 270 0 0 0 100 April 1, 2026 at 07:01:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2378 202 10 0 0 1 0 302 0 1 0 99 1 0 0 42 79 1 8 0 1 2 0 24 0 1 0 99 2 0 0 462 127 1 122 0 1 2 0 294 0 0 0 100 3 0 0 7 83 1 4 0 1 0 0 0 0 0 0 100 4 0 0 14 92 8 14 0 0 1 0 574 0 0 0 100 5 0 0 7 288 104 6 0 0 0 0 0 0 0 0 100 6 0 0 0 86 2 36 1 0 0 0 1082 0 0 0 99 7 0 0 7 184 53 106 0 0 0 0 264 0 0 0 100 April 1, 2026 at 07:01:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 10 0 0 2 0 300 0 0 0 100 1 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 114 1 110 0 0 0 0 294 0 0 0 100 3 0 0 0 17 1 12 0 1 1 0 0 0 0 0 100 4 0 0 14 20 8 14 0 0 0 0 575 0 0 0 100 5 0 0 6 215 104 6 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 36 1 0 0 0 1082 0 0 0 100 7 0 0 7 109 52 106 0 1 0 0 260 0 0 0 100 April 1, 2026 at 07:01:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7722 0 169 2385 204 588 17 95 230 53 4073 2 3 0 96 1 3191 0 132 292 0 520 9 72 176 51 3611 1 2 0 97 2 350 0 22 388 2 616 11 89 89 49 2357 1 1 0 98 3 566 0 19 328 33 464 10 60 106 42 1478 1 1 0 99 4 961 0 25 285 41 445 7 63 115 43 2738 1 1 0 97 5 1033 0 202 590 144 597 5 71 122 45 1111 1 1 0 99 6 2679 0 24 317 2 468 4 54 90 38 2663 1 1 0 98 7 33923 0 18 304 12 486 11 51 136 35 2252 6 6 0 88 April 1, 2026 at 07:01:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1190 0 51 2363 204 770 36 136 68 14 3632 2 2 0 96 1 3001 0 2 519 48 784 27 108 75 12 2251 2 1 0 97 2 5628 0 26 444 3 701 30 102 116 13 2867 3 2 0 95 3 464 0 8 295 3 558 14 74 61 16 2139 1 1 0 98 4 997 0 14 358 9 628 13 72 61 15 2387 1 1 0 98 5 349 0 77 504 106 550 18 74 39 14 1667 1 1 0 98 6 1892 0 182 51 4 565 20 72 66 16 2825 1 1 0 98 7 576 0 7 76 3 540 27 85 38 14 2275 2 1 0 97 April 1, 2026 at 07:01:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 48 2384 209 28 0 0 3 0 313 0 1 0 99 1 0 0 0 282 50 208 0 0 0 0 12 0 0 0 100 2 0 0 462 23 1 12 0 0 2 0 294 0 0 0 100 3 0 0 0 86 2 8 0 1 0 0 0 0 0 0 100 4 3 0 14 88 3 22 0 1 2 0 586 0 0 0 100 5 0 0 1 294 109 4 0 0 0 0 0 0 0 0 100 6 0 0 0 84 2 40 1 1 0 0 1082 0 0 0 100 7 0 0 7 92 4 22 0 1 0 0 273 0 0 0 100 April 1, 2026 at 07:01:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2320 207 22 0 0 1 0 314 0 0 0 100 1 0 0 0 209 50 205 0 1 0 0 2 0 0 0 100 2 0 0 0 14 1 6 0 0 0 0 294 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 4 0 0 2 0 567 0 0 0 100 5 0 0 7 215 104 6 0 0 0 0 1 0 0 0 100 6 0 0 0 12 2 38 1 1 1 0 1082 0 0 0 100 7 1 0 7 11 2 6 0 0 0 0 261 0 0 0 100 April 1, 2026 at 07:01:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2319 208 22 0 0 1 0 311 0 0 0 100 1 0 0 0 210 50 206 0 0 0 0 0 0 0 0 100 2 0 0 0 10 1 2 0 0 0 0 293 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 4 0 0 14 14 3 8 2 0 3 0 565 0 0 0 100 5 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 38 0 0 0 0 1082 0 0 0 100 7 0 0 7 11 3 6 0 0 0 0 261 0 0 0 100 April 1, 2026 at 07:01:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5222 0 209 2417 211 1010 28 134 238 60 5077 3 3 0 94 1 11764 0 209 580 10 896 20 111 241 59 4580 3 3 0 94 2 3712 0 18 323 24 1168 18 136 224 71 4007 2 2 0 96 3 1831 0 136 322 47 905 15 127 166 69 3495 1 1 0 97 4 1215 0 217 363 47 935 18 108 199 77 3621 1 1 0 98 5 2127 0 35 560 106 783 10 93 116 53 2565 2 1 0 97 6 35381 0 20 339 4 915 21 89 138 50 4144 8 7 0 84 7 2748 0 31 239 5 813 9 93 166 46 3958 2 2 0 96 April 1, 2026 at 07:01:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2321 204 114 0 0 2 0 303 0 0 0 100 1 0 0 0 26 0 8 0 0 0 0 0 0 0 0 100 2 0 0 0 22 1 6 0 1 6 0 294 0 0 0 100 3 0 0 7 25 2 4 0 0 0 0 0 0 0 0 100 4 2 0 14 60 23 42 0 0 1 0 569 0 0 0 100 5 0 0 7 287 133 66 0 1 0 0 0 0 0 0 100 6 34 0 0 35 7 16 0 0 0 0 10 0 0 0 100 7 0 0 77 17 4 40 1 1 6 0 1352 0 1 0 99 April 1, 2026 at 07:01:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2381 202 121 0 1 2 0 300 0 1 0 99 1 0 0 0 93 1 16 1 0 1 0 12 0 0 0 100 2 0 0 462 18 2 4 0 0 3 0 294 0 0 0 100 3 0 0 0 85 2 4 0 0 1 0 0 0 0 0 100 4 0 0 14 89 5 16 0 0 2 0 589 0 0 0 100 5 0 0 7 394 160 104 0 0 2 0 0 0 0 0 100 6 0 0 0 97 7 18 0 0 2 0 8 0 0 0 100 7 0 0 49 94 6 60 0 2 2 0 1349 0 1 0 99 April 1, 2026 at 07:01:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 203 114 0 0 1 0 302 0 0 0 100 1 0 0 0 14 0 11 0 2 0 0 0 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 4 2 0 1 0 566 0 0 0 100 5 0 0 1 313 153 104 0 0 0 0 0 0 0 0 100 6 0 0 0 19 6 14 0 0 0 0 8 0 0 0 100 7 0 0 7 11 3 38 1 1 0 0 1338 0 0 0 100 April 1, 2026 at 07:01:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37745 0 390 2447 202 1015 35 153 203 74 5427 8 6 0 86 1 15879 0 29 367 2 848 21 111 184 75 4039 4 5 0 91 2 1255 0 20 210 2 1011 18 122 93 66 5180 2 2 0 97 3 1647 0 50 181 5 770 13 97 89 57 3278 2 2 0 96 4 1518 0 197 384 6 726 16 91 68 55 3160 2 1 0 97 5 813 0 17 667 132 803 14 88 61 46 2602 2 1 0 97 6 1761 0 135 345 8 712 16 101 91 51 2241 1 1 0 98 7 3488 0 29 330 25 786 15 80 165 43 5898 2 2 0 96 April 1, 2026 at 07:01:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 91 2317 202 158 1 11 97 0 308 0 1 0 99 1 0 0 7 103 2 142 0 12 60 0 12 0 0 0 100 2 0 0 0 74 2 100 0 5 59 0 304 0 0 0 100 3 1 0 7 107 28 117 0 11 91 0 12 0 0 0 100 4 38 0 14 106 36 100 0 7 65 0 578 0 0 0 100 5 0 0 7 271 103 91 0 7 74 0 11 0 0 0 100 6 29 0 0 146 4 162 0 10 45 0 9 0 0 0 100 7 25 0 7 179 55 234 1 9 75 0 1363 0 1 0 99 April 1, 2026 at 07:01:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 20 2338 201 10 0 2 4 0 300 0 1 0 99 1 0 0 231 18 0 12 0 0 5 0 0 0 0 0 100 2 0 0 0 45 2 6 0 1 0 0 294 0 0 0 100 3 0 0 0 44 0 6 0 1 0 0 0 0 0 0 100 4 0 0 14 57 10 18 0 0 2 0 576 0 0 0 100 5 0 0 1 250 104 6 0 0 0 0 1 0 0 0 100 6 0 0 0 144 1 104 0 0 0 0 0 0 0 0 100 7 0 0 7 147 53 138 0 0 0 0 1345 0 0 0 100 April 1, 2026 at 07:01:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 244 2307 202 37 0 2 1 0 302 0 1 0 99 1 0 0 0 106 26 72 0 1 1 0 12 0 0 0 100 2 0 0 0 45 3 6 0 0 0 0 299 0 0 0 100 3 0 0 0 40 0 2 0 1 0 0 11 0 0 0 100 4 0 0 14 59 9 26 2 0 1 0 595 0 0 0 100 5 0 0 1 253 109 4 0 0 0 0 0 0 0 0 100 6 0 0 0 143 1 106 0 0 0 0 0 0 0 0 100 7 0 0 7 84 18 80 1 0 1 0 1354 0 0 0 100 April 1, 2026 at 07:01:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4844 0 206 2418 204 1104 42 187 152 78 5726 3 3 0 94 1 40866 0 21 363 36 1016 41 167 143 69 5154 9 8 0 84 2 9362 0 51 446 9 932 37 143 155 48 4012 4 2 0 94 3 1860 0 30 427 3 823 26 113 136 66 4311 2 1 0 97 4 908 0 26 494 21 918 18 122 75 75 3796 1 1 0 98 5 2656 0 129 492 105 787 23 123 79 65 3271 3 1 0 96 6 1850 0 214 481 2 928 31 114 75 66 3294 3 2 0 96 7 1596 0 204 387 3 779 13 105 99 48 3689 1 2 0 97 April 1, 2026 at 07:01:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 21 2321 205 118 0 2 2 0 324 0 0 0 99 1 1 0 0 37 2 18 0 4 0 0 8 0 0 0 100 2 45 0 0 39 7 18 0 2 0 0 313 0 0 0 100 3 0 0 7 32 1 15 1 1 0 0 17 0 0 0 100 4 6 0 14 73 27 54 0 1 1 0 578 0 0 0 100 5 0 0 7 293 133 74 2 1 0 0 11 0 0 0 100 6 28 0 70 19 3 12 0 3 4 0 10 0 1 0 99 7 2 0 7 35 6 46 2 1 5 0 1368 0 0 0 99 April 1, 2026 at 07:01:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2382 202 231 0 7 65 0 300 0 1 0 99 1 0 0 0 155 1 142 0 11 58 0 0 0 0 0 100 2 0 0 0 156 8 139 0 8 65 0 303 0 0 0 100 3 0 0 0 188 39 142 0 5 76 0 0 0 0 0 100 4 0 0 14 177 44 119 0 8 89 0 566 0 0 0 100 5 0 0 1 447 154 230 0 11 77 0 1 0 0 0 100 6 0 0 42 123 2 101 0 8 74 0 0 0 1 0 99 7 2 0 469 69 3 137 1 9 57 0 1352 0 1 0 99 April 1, 2026 at 07:01:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 203 114 0 0 2 0 303 0 0 0 100 1 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 2 0 0 0 19 7 14 0 0 0 0 302 0 0 0 100 3 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 12 4 8 1 1 0 0 567 0 0 0 100 5 0 0 1 317 154 110 0 0 0 0 9 0 0 0 100 6 0 0 0 9 1 6 0 1 0 0 0 0 0 0 100 7 0 0 7 13 3 42 0 0 1 0 1363 0 0 0 100 April 1, 2026 at 07:01:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10845 0 70 2395 202 485 12 72 64 38 2230 3 2 0 95 1 7643 0 123 232 3 411 7 59 108 40 4075 2 2 0 96 2 4479 0 162 359 13 516 5 69 112 69 2879 1 1 0 97 3 681 0 18 254 2 409 4 70 68 52 1753 1 1 0 99 4 1340 0 43 180 6 442 11 73 49 48 2436 1 2 0 97 5 368 0 19 432 135 399 5 59 38 41 1113 0 1 0 99 6 576 0 17 226 3 347 7 47 40 43 962 0 1 0 99 7 1435 0 197 233 30 358 6 45 44 33 2950 1 1 0 97 April 1, 2026 at 07:01:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24637 0 109 2339 202 965 31 99 51 12 3306 6 6 0 88 1 396 0 0 417 4 733 18 75 44 6 2237 2 1 0 97 2 3788 0 3 387 8 545 17 52 64 17 2374 2 1 0 97 3 3473 0 2 316 1 530 11 51 113 13 1953 2 1 0 97 4 1436 0 203 50 8 702 18 71 40 19 2881 1 1 0 97 5 822 0 2 525 119 684 20 53 65 23 2124 1 1 0 98 6 1080 0 12 325 31 556 5 39 64 12 1859 1 1 0 98 7 1611 0 7 66 4 598 15 53 75 11 3897 2 1 0 97 April 1, 2026 at 07:01:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 48 2383 207 118 0 0 2 0 9 0 1 0 99 1 0 0 0 79 1 2 0 0 0 0 300 0 0 0 100 2 0 0 0 83 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 87 0 10 0 0 1 0 0 0 0 0 100 4 2 0 14 91 4 20 0 1 0 0 567 0 0 0 100 5 0 0 1 288 103 6 0 1 0 0 0 0 0 0 100 6 0 0 0 183 51 104 0 0 0 0 0 0 0 0 100 7 0 0 469 20 3 40 1 1 2 0 1347 0 1 0 99 April 1, 2026 at 07:01:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 208 223 0 9 104 0 11 0 1 0 99 1 0 0 0 65 1 115 0 11 60 0 300 0 0 0 100 2 0 0 0 66 2 111 0 9 64 0 294 0 0 0 100 3 0 0 0 99 29 122 0 8 88 0 0 0 0 0 100 4 0 0 14 83 34 88 1 7 70 0 566 0 0 0 100 5 0 0 7 252 103 84 0 5 75 0 0 0 0 0 100 6 0 0 0 152 51 196 0 8 62 0 0 0 0 0 100 7 0 0 7 63 3 140 1 10 69 0 1346 0 0 0 100 April 1, 2026 at 07:01:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2314 205 114 0 0 0 0 8 0 0 0 100 1 0 0 0 7 1 2 0 0 1 0 300 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 4 0 0 14 10 4 6 1 0 2 0 566 0 0 0 100 5 0 0 1 214 104 6 0 0 0 0 1 0 0 0 100 6 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 7 0 0 7 11 3 38 1 1 0 0 1344 0 0 0 100 April 1, 2026 at 07:01:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 720 0 94 2425 210 1209 28 161 85 42 5054 3 2 0 95 1 1990 0 8 549 3 838 20 103 85 38 4179 2 2 0 96 2 8053 0 416 440 5 948 16 117 170 82 5574 3 3 0 94 3 10681 0 270 328 3 876 24 113 150 64 4544 4 3 0 93 4 4366 0 42 515 6 878 16 92 177 78 3944 2 4 0 94 5 1458 0 21 496 115 902 23 126 109 68 3775 2 2 0 97 6 643 0 29 444 25 768 18 99 86 60 2240 1 1 0 98 7 36455 0 18 338 33 774 19 79 88 49 3539 9 5 0 86 April 1, 2026 at 07:01:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 14 2331 209 153 0 0 0 0 1356 0 1 0 99 1 0 0 0 25 2 6 0 1 1 0 302 0 0 0 100 2 0 0 0 23 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 19 0 0 0 0 0 0 0 0 0 0 100 4 3 0 14 22 3 6 0 1 1 0 565 0 0 0 100 5 0 0 7 230 105 10 0 0 0 0 1 0 0 0 100 6 0 0 70 18 1 16 0 1 4 0 0 0 0 0 100 7 0 0 7 121 50 108 0 1 5 0 0 0 0 0 100 April 1, 2026 at 07:01:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2383 205 148 1 1 0 0 1346 0 1 0 99 1 0 0 0 92 6 12 0 0 1 0 308 0 0 0 100 2 0 0 0 82 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 78 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 82 3 4 1 0 1 0 566 0 0 0 100 5 0 0 7 288 104 6 0 0 0 0 0 0 0 0 100 6 0 0 42 78 1 8 0 0 2 0 0 0 1 0 99 7 0 0 462 117 51 106 0 1 2 0 1 0 0 0 100 April 1, 2026 at 07:01:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 205 297 1 16 104 0 1345 0 1 0 99 1 0 0 0 87 6 145 0 9 52 0 308 0 0 0 100 2 0 0 0 72 2 132 0 9 49 0 294 0 0 0 100 3 0 0 0 88 35 99 0 8 66 0 0 0 0 0 100 4 0 0 14 93 38 101 1 9 78 0 566 0 0 0 100 5 0 0 7 239 105 45 0 5 30 0 1 0 0 0 100 6 0 0 0 50 1 89 0 10 61 0 0 0 0 0 100 7 0 0 0 161 52 203 0 6 65 0 22 0 0 0 100 April 1, 2026 at 07:01:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2405 0 280 2398 205 1339 46 174 98 57 6020 3 2 0 95 1 3745 0 29 582 20 855 22 124 99 64 3301 3 2 0 95 2 2096 0 6 334 3 810 24 117 128 49 4938 2 2 0 96 3 12143 0 309 447 1 790 14 81 180 58 5065 4 4 0 92 4 6701 0 161 439 4 879 19 108 172 74 5869 2 2 0 95 5 2081 0 35 629 107 850 28 123 99 74 3119 2 1 0 97 6 648 0 14 431 2 900 15 94 58 61 3283 1 1 0 98 7 34600 0 21 329 28 888 21 108 73 57 2793 7 7 0 86 April 1, 2026 at 07:01:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 63 0 98 2322 209 178 3 2 4 0 1388 0 1 0 99 1 0 0 7 136 52 126 0 2 6 0 328 0 0 0 100 2 0 0 0 31 4 10 0 1 1 0 310 0 0 0 100 3 0 0 0 30 3 8 0 2 1 0 26 0 0 0 100 4 25 0 14 34 7 14 0 1 1 0 577 0 0 0 100 5 11 0 7 249 115 25 0 3 2 0 22 0 0 0 100 6 2 0 0 34 4 18 1 1 1 0 20 0 0 0 100 7 0 0 0 27 2 10 0 3 0 0 9 0 0 0 100 April 1, 2026 at 07:01:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 56 2391 211 163 1 0 1 0 1365 0 1 0 99 1 0 0 462 72 25 60 0 1 2 0 300 0 0 0 100 2 0 0 7 84 2 6 0 1 0 0 294 0 0 0 100 3 0 0 0 132 26 54 0 1 0 0 0 0 0 0 100 4 0 0 14 83 3 4 1 0 1 0 566 0 0 0 100 5 0 0 7 288 104 6 0 0 0 0 0 0 0 0 100 6 0 0 0 83 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 79 0 2 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:01:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2319 209 152 0 1 0 0 1358 0 1 0 99 1 0 0 0 16 1 6 0 1 1 0 300 0 0 0 100 2 0 0 0 15 2 12 0 1 0 0 294 0 0 0 100 3 0 0 0 107 50 102 0 1 0 0 0 0 0 0 100 4 0 0 14 9 3 4 1 0 1 0 567 0 0 0 100 5 0 0 7 215 104 6 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35556 0 189 2438 214 1393 40 187 205 65 6515 8 8 0 84 1 2097 0 193 250 2 985 23 160 176 57 4110 2 2 0 96 2 902 0 9 495 4 938 13 125 144 67 2979 1 2 0 97 3 933 0 31 430 81 1040 18 103 159 44 2846 1 2 0 97 4 11260 0 336 289 35 863 15 102 268 54 5346 4 4 0 92 5 10785 0 64 813 105 967 19 109 223 61 3324 3 2 0 94 6 1313 0 8 323 1 1197 23 102 163 81 4374 2 1 0 97 7 1011 0 10 408 1 800 11 83 162 62 3833 2 1 0 98 April 1, 2026 at 07:01:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 69 0 98 2326 211 159 1 4 3 0 1412 1 1 0 98 1 28 0 0 39 1 22 0 2 7 0 310 0 0 0 100 2 2 0 0 36 3 22 0 1 2 0 303 0 0 0 100 3 0 0 0 27 1 13 0 2 1 0 5 0 0 0 100 4 6 0 21 25 2 12 0 2 0 0 285 0 0 0 100 5 2 0 7 338 158 117 0 2 1 0 314 0 0 0 100 6 48 0 0 34 5 16 0 0 0 0 19 0 0 0 100 7 0 0 0 30 3 10 0 1 0 0 14 0 0 0 100 April 1, 2026 at 07:01:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 56 2391 211 138 1 1 2 0 1365 0 1 0 99 1 0 0 462 22 2 14 0 0 5 0 311 0 0 0 100 2 0 0 0 85 2 6 0 1 0 0 294 0 0 0 100 3 0 0 0 81 0 2 0 0 0 0 0 0 0 0 100 4 2 0 14 86 2 14 0 1 0 0 268 0 0 0 100 5 0 0 7 408 165 121 1 1 2 0 309 0 0 0 100 6 0 0 0 86 1 20 0 1 1 0 23 0 0 0 100 7 0 0 0 109 1 30 0 2 1 0 1 0 0 0 100 April 1, 2026 at 07:01:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 209 56 0 1 1 0 1359 0 1 0 99 1 0 0 0 14 1 6 0 1 1 0 300 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 2 0 14 8 2 4 2 1 0 0 398 1 0 0 99 5 0 0 7 319 156 110 0 0 0 0 301 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2324 211 62 1 2 0 0 1360 0 1 0 99 1 0 0 0 15 1 6 0 1 0 0 300 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 9 2 6 0 1 0 0 266 0 0 0 100 5 0 0 7 324 157 118 0 1 0 0 302 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 108 1 102 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:01:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2962 0 273 2424 207 1474 37 186 224 81 5011 3 2 0 95 1 1122 0 4 298 4 1121 27 158 156 66 4086 2 1 0 97 2 766 0 5 261 8 1075 37 131 152 53 2963 2 1 0 97 3 13360 0 204 362 68 958 25 107 118 57 5154 4 5 0 91 4 11787 0 282 353 34 883 17 118 248 52 4470 4 3 0 93 5 5596 0 33 499 115 1012 20 136 195 62 3684 2 2 0 96 6 4707 0 31 446 12 903 11 94 220 58 4419 2 2 0 96 7 23894 0 29 269 4 914 18 110 153 58 4214 6 4 0 90 April 1, 2026 at 07:01:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 14 2334 210 155 0 1 0 0 1365 0 1 0 99 1 0 0 0 34 1 12 0 1 7 0 300 0 0 0 100 2 0 0 0 21 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 119 50 104 0 1 0 0 0 0 0 0 100 4 2 0 21 20 2 4 0 0 0 0 266 0 0 0 100 5 0 0 7 233 106 10 1 0 1 0 301 0 0 0 100 6 0 0 0 24 2 4 0 0 0 0 0 0 0 0 100 7 0 0 70 9 0 2 0 0 6 0 0 0 0 0 100 April 1, 2026 at 07:01:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 56 2388 209 165 1 1 2 0 1360 0 1 0 99 1 0 0 462 24 2 14 0 0 5 0 312 0 0 0 100 2 0 0 0 85 3 6 0 1 1 0 294 0 0 0 100 3 0 0 0 129 25 50 0 2 1 0 0 0 0 0 100 4 0 0 14 86 4 6 0 0 1 0 267 0 0 0 100 5 0 0 7 309 115 24 0 1 3 0 310 0 0 0 100 6 0 0 0 89 2 18 0 0 1 0 23 0 0 0 100 7 0 0 0 137 27 56 0 1 1 0 0 0 0 0 100 April 1, 2026 at 07:01:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 209 160 1 0 0 0 1362 0 1 0 99 1 0 0 0 10 1 2 0 0 0 0 300 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 13 0 10 0 0 0 0 0 0 0 0 100 4 0 0 14 8 2 2 1 0 0 0 266 0 0 0 100 5 0 0 7 217 105 8 0 0 0 0 300 0 0 0 100 6 0 0 0 9 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2459 0 385 2397 209 1233 33 205 127 77 5436 3 2 0 95 1 1567 0 24 645 27 1104 26 146 136 78 3705 2 2 0 97 2 1395 0 130 258 11 914 34 152 75 46 4015 2 1 0 97 3 1719 0 12 437 0 766 22 99 78 50 4253 2 1 0 97 4 1085 0 19 458 3 753 16 101 81 46 3519 2 1 0 96 5 10315 0 197 658 108 854 24 106 204 55 4299 2 3 0 94 6 7994 0 25 442 2 660 28 94 174 51 4646 3 2 0 94 7 37613 0 44 353 20 848 32 125 100 64 4092 10 7 0 83 April 1, 2026 at 07:01:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 98 2326 208 168 1 10 116 0 1373 0 1 0 99 1 40 0 0 96 6 139 1 9 61 0 317 0 0 0 100 2 0 0 0 188 52 229 0 12 65 0 309 0 0 0 99 3 18 0 0 105 32 100 0 10 84 0 12 0 0 0 100 4 28 0 14 199 33 230 0 9 66 0 276 0 0 0 100 5 0 0 7 279 105 102 1 5 62 0 318 0 0 0 100 6 0 0 7 77 1 114 0 10 71 0 2 0 0 0 100 7 0 0 0 63 0 85 0 5 65 0 18 0 0 0 100 April 1, 2026 at 07:01:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 32 2358 204 43 1 2 2 0 1344 0 1 0 99 1 0 0 350 30 9 24 0 1 3 0 311 0 0 0 100 2 0 0 0 257 51 200 0 1 0 0 294 0 0 0 100 3 0 0 0 61 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 71 2 14 0 1 0 0 266 0 0 0 100 5 0 0 2 275 106 18 0 1 0 0 301 0 0 0 100 6 0 0 0 63 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 59 0 2 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:01:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 140 2315 205 47 0 0 0 0 1345 0 1 0 99 1 0 0 0 42 6 20 1 0 0 0 319 0 0 0 100 2 0 0 0 232 52 210 0 0 0 0 299 0 0 0 100 3 0 0 0 27 0 2 0 1 0 0 11 0 0 0 100 4 0 0 14 25 2 2 1 0 0 0 266 0 0 0 100 5 0 0 7 256 116 24 0 0 2 0 311 0 0 0 100 6 0 0 0 34 1 18 0 0 0 0 23 0 0 0 100 7 0 0 0 27 0 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:01:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2328 0 173 2428 209 1089 32 162 98 78 6201 2 2 0 95 1 36456 0 210 222 13 999 27 150 112 67 4231 9 7 0 84 2 3492 0 34 676 32 984 26 121 90 46 3147 2 2 0 96 3 2495 0 212 181 2 899 26 131 101 84 5138 2 2 0 96 4 2441 0 39 207 5 992 25 126 123 51 3531 3 2 0 95 5 5802 0 18 619 116 734 21 94 154 58 3881 2 2 0 96 6 8462 0 139 245 3 923 27 115 169 56 4414 3 3 0 94 7 3085 0 23 406 2 821 11 92 120 50 3694 2 1 0 97 April 1, 2026 at 07:01:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 24 2330 209 127 2 3 4 0 1373 0 1 0 99 1 34 0 0 184 33 174 0 7 0 0 313 0 0 0 100 2 1 0 0 29 2 10 0 2 0 0 297 0 0 0 100 3 25 0 70 17 1 12 0 2 3 0 9 0 0 0 100 4 7 0 14 26 3 8 0 1 0 0 286 0 0 0 100 5 0 0 4 232 104 10 1 1 2 0 309 0 0 0 100 6 12 0 0 30 3 20 0 2 1 0 22 0 0 0 100 7 0 0 7 27 2 10 0 1 0 0 17 0 0 0 100 April 1, 2026 at 07:01:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 56 2375 203 164 0 11 81 0 1344 0 1 0 99 1 0 0 462 216 33 255 0 11 103 0 309 0 1 0 99 2 0 0 0 218 27 194 0 10 58 0 294 0 0 0 100 3 0 0 0 153 32 80 0 7 59 0 0 0 0 0 100 4 0 0 14 156 34 126 0 8 47 0 266 0 0 0 100 5 0 0 7 330 105 94 0 8 57 0 301 0 0 0 100 6 0 0 0 117 2 75 0 5 59 0 0 0 0 0 100 7 0 0 0 119 2 81 0 4 50 0 22 0 0 0 100 April 1, 2026 at 07:01:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2313 204 58 1 1 0 0 1345 0 1 0 99 1 0 0 0 114 6 110 0 2 0 0 308 0 0 0 100 2 0 0 0 121 51 112 0 0 0 0 294 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 4 1 0 0 0 266 0 0 0 100 5 0 0 7 219 105 12 0 0 0 0 309 0 0 0 100 6 0 0 0 13 2 8 0 0 1 0 0 0 0 0 100 7 0 0 0 10 0 8 0 1 0 0 18 0 0 0 100 April 1, 2026 at 07:01:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30369 0 64 2401 205 579 14 89 95 52 3577 6 5 0 89 1 575 0 6 393 11 556 6 69 57 54 1784 1 1 0 99 2 280 0 14 363 48 485 6 57 43 33 2098 0 1 0 98 3 345 0 37 222 1 323 7 54 38 34 1447 1 1 0 99 4 505 0 33 218 6 344 10 55 38 33 1180 0 0 0 99 5 61 0 15 424 113 283 6 46 50 25 1479 1 1 0 99 6 9669 0 425 190 8 388 4 48 128 50 5715 3 3 0 94 7 4873 0 34 261 2 319 4 51 70 45 1779 2 1 0 97 April 1, 2026 at 07:01:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5349 0 222 2341 207 745 26 78 66 25 3137 2 4 0 94 1 1122 0 15 77 3 662 16 79 65 18 2917 1 1 0 98 2 254 0 2 279 2 502 13 45 27 17 1516 2 0 0 98 3 860 0 70 53 3 530 14 49 56 11 1960 2 1 0 97 4 570 0 14 65 4 474 14 48 24 11 1797 1 1 0 98 5 773 0 1 267 104 529 13 47 29 8 2074 2 1 0 98 6 3062 0 2 156 52 589 12 58 84 12 2021 1 1 0 98 7 5489 0 29 114 2 386 8 35 77 8 1648 2 1 0 97 April 1, 2026 at 07:01:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 49 2384 206 144 1 1 2 0 1091 0 1 0 99 1 0 0 469 22 3 12 0 2 2 0 563 0 0 0 100 2 0 0 0 85 1 8 0 3 0 0 294 0 0 0 100 3 0 0 0 82 0 4 0 2 0 0 0 0 0 0 100 4 2 0 14 89 2 10 0 0 0 0 266 0 0 0 100 5 0 0 7 290 105 8 0 0 0 0 300 0 0 0 100 6 0 0 0 186 52 108 0 1 0 0 0 0 0 0 100 7 0 0 0 78 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2325 209 256 1 8 99 0 1093 0 1 0 99 1 0 0 7 61 3 105 0 7 54 0 560 0 0 0 100 2 0 0 0 74 1 133 0 9 80 0 294 0 0 0 100 3 0 0 0 73 30 78 0 6 74 0 0 0 0 0 100 4 0 0 14 80 32 120 1 9 70 0 266 0 0 0 100 5 0 0 1 266 105 105 0 10 79 0 300 0 0 0 100 6 0 0 0 157 52 199 0 7 58 0 0 0 0 0 100 7 0 0 0 46 0 78 0 4 38 0 0 0 0 0 100 April 1, 2026 at 07:01:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2316 206 82 0 1 0 0 1090 0 1 0 99 1 0 0 7 75 3 70 0 1 0 0 560 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 4 0 0 0 0 266 0 0 0 100 5 0 0 7 227 106 18 0 0 1 0 302 0 0 0 100 6 0 0 0 112 52 108 0 0 0 0 0 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5583 0 84 2491 211 1246 51 233 151 72 4394 3 3 0 94 1 3421 0 35 697 9 1202 46 177 113 52 4799 4 2 0 95 2 1903 0 27 520 3 912 28 147 98 65 5355 2 1 0 96 3 3106 0 215 471 2 838 27 119 122 67 4188 3 2 0 94 4 1547 0 134 546 6 1085 28 120 87 68 6121 2 2 0 96 5 33997 0 19 404 113 986 36 144 90 47 4263 8 6 0 86 6 7935 0 12 312 47 1066 39 142 190 47 4607 3 3 0 94 7 6708 0 313 396 8 796 26 119 102 58 2957 2 2 0 96 April 1, 2026 at 07:01:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 77 2306 201 116 0 1 6 0 0 0 1 0 99 1 34 0 7 38 9 22 0 0 9 0 572 0 0 0 100 2 0 0 0 21 1 6 0 1 0 0 294 0 0 0 100 3 0 0 7 20 0 2 0 1 0 0 0 0 0 0 100 4 2 0 14 25 4 36 1 0 1 0 1352 0 0 0 100 5 0 0 7 236 105 16 0 0 1 0 301 0 0 0 100 6 0 0 0 24 1 6 0 0 1 0 0 0 0 0 100 7 0 0 0 122 52 106 0 1 1 0 1 0 0 0 100 April 1, 2026 at 07:02:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2372 202 110 0 0 2 0 2 0 1 0 99 1 1 0 469 29 8 20 0 0 3 0 569 0 0 0 99 2 0 0 0 80 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 80 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 86 4 40 2 1 1 0 1351 0 0 0 100 5 0 0 7 295 104 14 0 0 0 0 300 0 0 0 100 6 0 0 0 81 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 182 52 104 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:02:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 200 218 0 10 95 0 0 0 0 0 100 1 0 0 7 89 9 152 0 14 75 0 567 0 0 0 100 2 0 0 0 69 1 123 0 12 83 0 294 0 0 0 100 3 0 0 0 78 32 79 0 6 64 0 0 0 0 0 100 4 0 0 14 84 36 150 1 9 49 0 1352 0 0 0 99 5 0 0 7 270 105 104 0 5 67 0 301 0 0 0 100 6 0 0 0 54 2 95 0 8 68 0 1 0 0 0 100 7 0 0 0 157 52 200 0 8 85 0 1 0 0 0 100 April 1, 2026 at 07:02:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 42755 0 573 2370 201 1178 46 210 170 66 6003 10 9 0 81 1 9181 0 48 467 11 1158 50 188 167 53 4819 4 2 0 94 2 2029 0 18 315 13 1041 24 146 111 84 5024 3 2 0 95 3 1940 0 25 533 19 1008 20 138 123 67 3566 1 2 0 97 4 2694 0 31 475 6 938 26 136 97 63 6204 3 2 0 95 5 1545 0 32 701 106 889 27 136 118 44 4035 2 2 0 96 6 529 0 22 401 1 753 17 106 76 43 2604 2 1 0 97 7 4065 0 121 304 24 826 24 108 137 43 3825 2 2 0 96 April 1, 2026 at 07:02:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 91 2307 201 116 0 2 6 0 21 0 1 0 99 1 0 0 7 38 5 24 0 0 9 0 591 0 0 0 100 2 11 0 0 34 4 14 0 2 1 0 316 0 0 0 100 3 52 0 0 86 31 65 0 3 1 0 25 0 0 0 100 4 2 0 0 86 31 96 1 2 2 0 1119 0 0 0 100 5 30 0 21 253 113 32 0 1 4 0 593 0 0 0 100 6 3 0 7 37 4 28 1 3 1 0 22 0 0 0 100 7 6 0 0 29 3 10 0 2 1 0 10 0 0 0 100 April 1, 2026 at 07:02:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2370 200 108 0 0 2 0 0 0 1 0 99 1 0 0 469 18 3 8 0 0 3 0 564 0 0 0 100 2 0 0 0 80 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 92 7 16 0 1 0 0 11 0 0 0 100 4 0 0 0 188 53 136 1 1 0 0 1090 0 0 0 99 5 0 0 16 296 105 16 1 0 2 0 566 0 0 0 100 6 0 0 0 87 1 14 0 1 0 0 0 0 0 0 100 7 0 0 6 81 1 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2302 200 120 0 4 0 0 0 0 0 0 100 1 0 0 7 12 3 6 0 0 0 0 560 0 0 0 100 2 0 0 0 7 1 4 0 1 0 0 294 0 0 0 100 3 0 0 0 16 5 10 0 0 0 0 8 0 0 0 100 4 0 0 0 51 23 72 0 0 0 0 1091 0 0 0 100 5 0 0 15 219 106 12 0 1 0 0 567 0 0 0 100 6 0 0 0 71 31 68 0 2 0 0 0 0 0 0 100 7 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4594 0 140 2330 200 459 0 54 284 32 1586 1 3 0 97 1 100 0 39 236 8 408 0 38 97 23 930 0 1 0 99 2 35 0 2 170 3 290 0 30 102 21 580 0 0 0 100 3 42 0 21 236 74 322 0 34 1763 14 326 0 1 0 99 4 23 0 11 230 68 373 2 31 2038 21 1309 0 1 0 99 5 146 0 35 366 108 267 2 25 1890 18 2254 0 1 0 99 6 50 0 8 234 37 342 1 33 98 17 263 0 0 0 100 7 26 0 4 145 1 247 2 26 238 12 428 0 1 0 99 April 1, 2026 at 07:02:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2315 201 58 0 2 0 0 0 0 0 0 100 1 0 0 63 215 50 211 0 2 5 0 581 0 1 0 99 2 0 0 19 22 2 12 1 2 5 0 294 0 0 0 100 3 0 0 0 18 0 2 0 1 0 0 0 0 0 0 100 4 0 0 0 23 3 34 1 0 0 0 765 0 0 0 100 5 0 0 15 227 106 10 0 0 0 0 567 0 0 0 100 6 0 0 0 22 2 6 0 0 0 0 0 0 0 0 100 7 0 0 0 24 3 6 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2383 203 102 2 1 0 0 35 0 1 0 99 1 0 0 42 211 47 141 0 1 2 0 592 0 1 0 99 2 0 0 456 25 2 176 0 0 2 0 625 0 0 0 99 3 0 0 0 82 2 6 0 1 0 0 2 0 0 0 100 4 0 0 0 82 3 38 0 1 0 0 749 0 0 0 100 5 0 0 21 296 114 8 1 0 0 0 566 0 0 0 100 6 0 0 0 85 1 18 0 1 0 0 5 0 0 0 100 7 0 0 0 134 27 60 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 201 112 0 0 0 0 6 0 0 0 100 1 0 0 7 54 23 48 0 0 0 0 582 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 747 0 0 0 100 5 0 0 21 217 106 10 0 0 0 0 567 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 7 0 0 0 109 51 104 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:02:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 200 112 0 0 0 0 0 0 0 0 100 1 0 0 7 54 23 46 0 0 1 0 578 0 0 0 100 2 0 0 0 14 1 14 0 1 0 0 294 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 747 0 0 0 100 5 0 0 21 216 105 8 1 0 2 0 567 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 110 52 104 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:02:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 200 160 1 16 81 0 5 0 0 0 100 1 0 0 7 193 23 239 0 9 57 0 580 0 0 0 100 2 0 0 0 74 1 128 1 7 66 0 297 0 0 0 100 3 0 0 0 72 33 92 0 10 42 0 0 0 0 0 100 4 0 0 0 81 37 138 0 7 55 0 748 0 0 0 100 5 0 0 21 274 110 108 2 8 74 0 566 0 0 0 100 6 0 0 0 64 1 113 2 6 54 0 3 0 0 0 100 7 0 0 0 157 53 199 1 7 57 0 22 0 0 0 100 April 1, 2026 at 07:02:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 4 0 0 0 0 0 0 0 0 100 1 0 0 7 155 23 152 0 0 0 0 579 0 0 0 100 2 0 0 0 10 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 746 0 0 0 100 5 0 0 21 215 105 8 1 0 0 0 567 0 0 0 100 6 0 0 0 12 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 104 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 203 32 1 0 2 0 31 0 0 0 99 1 0 0 7 210 50 206 0 1 1 0 579 0 0 0 100 2 0 0 0 16 2 10 0 0 1 0 307 0 0 0 100 3 0 0 0 12 1 4 0 0 2 0 0 0 0 0 100 4 0 0 0 16 5 36 1 0 1 0 748 0 0 0 100 5 0 0 21 226 114 8 0 0 1 0 565 0 0 0 100 6 0 0 0 17 2 16 0 0 1 0 6 0 0 0 100 7 0 0 0 60 26 54 0 1 1 0 0 0 0 0 100 April 1, 2026 at 07:02:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 200 6 0 0 0 0 0 0 0 0 100 1 0 0 7 255 73 252 0 0 0 0 579 0 0 0 100 2 0 0 0 11 1 2 0 0 0 0 293 0 0 0 100 3 0 0 0 12 1 8 0 1 1 0 2 0 0 0 100 4 0 0 0 11 3 34 0 0 0 0 748 0 0 0 100 5 0 0 21 216 105 8 1 0 0 0 566 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 77 0 2 0 0 0 0 0 0 100 1 0 0 7 188 73 179 0 0 0 0 579 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 746 0 0 0 100 5 0 0 21 215 105 8 0 0 0 0 567 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 200 113 0 0 3 0 0 0 0 0 100 1 0 0 7 152 73 146 0 0 0 0 578 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 14 1 10 0 0 2 0 2 0 0 0 100 4 0 0 0 14 4 40 0 1 0 0 748 0 0 0 100 5 0 0 21 216 105 10 1 0 0 0 565 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 112 0 0 0 0 0 0 0 0 100 1 0 0 7 153 73 146 0 0 0 0 580 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 9 0 2 0 0 1 0 0 0 0 0 100 4 0 0 0 12 3 36 1 1 1 0 746 0 0 0 100 5 0 0 21 217 106 10 0 0 0 0 568 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 122 1 0 0 0 15 0 0 0 100 1 0 0 7 154 73 146 0 0 0 0 578 0 0 0 100 2 2 0 0 14 2 12 0 0 0 0 310 0 0 0 100 3 0 0 0 10 1 4 0 1 0 0 13 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 747 0 0 0 100 5 0 0 21 222 111 8 1 0 0 0 565 0 0 0 100 6 0 0 0 21 4 18 0 0 0 0 17 0 0 0 100 7 0 0 0 11 1 8 0 2 0 0 0 0 0 0 100 April 1, 2026 at 07:02:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 110 0 0 1 0 0 0 0 0 100 1 0 0 7 55 24 48 0 0 0 0 580 0 0 0 100 2 0 0 0 106 49 100 0 1 0 0 294 0 0 0 100 3 0 0 0 10 0 4 0 0 3 0 0 0 0 0 100 4 0 0 0 11 3 34 0 0 0 0 748 0 0 0 100 5 0 0 21 217 106 10 0 0 0 0 567 0 0 0 100 6 0 0 0 9 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 110 0 0 0 0 0 0 0 0 100 1 0 0 7 53 23 46 0 0 0 0 578 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 294 0 0 0 100 3 0 0 0 13 1 8 0 0 0 0 2 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 747 0 0 0 100 5 0 0 21 215 105 8 1 0 0 0 566 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 6 0 1 0 0 1 0 0 0 100 April 1, 2026 at 07:02:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 112 0 0 1 0 0 0 0 0 100 1 0 0 7 53 23 46 0 0 0 0 580 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 294 0 0 0 100 3 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 4 0 0 0 16 4 38 1 0 0 0 746 0 0 0 100 5 0 0 21 218 106 12 0 0 0 0 568 0 0 0 100 6 0 0 0 10 1 8 0 1 0 0 0 0 0 0 100 7 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:02:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 112 0 0 1 0 1 0 0 0 100 1 0 0 7 36 15 30 0 1 0 0 569 0 0 0 100 2 0 0 0 125 59 120 0 1 0 0 303 0 0 0 100 3 0 0 0 11 1 4 0 0 0 0 2 0 0 0 100 4 0 0 0 12 3 36 0 1 0 0 747 0 0 0 100 5 0 0 21 220 106 14 1 0 0 0 574 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 6 1 0 0 0 18 0 0 0 100 April 1, 2026 at 07:02:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 202 127 0 0 1 0 10 0 0 0 100 1 0 0 7 13 4 6 0 0 1 0 559 0 0 0 100 2 0 0 0 101 46 98 0 1 1 0 326 0 0 0 100 3 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 4 0 0 0 17 5 38 1 0 3 0 749 0 0 0 100 5 0 0 15 226 113 10 0 1 3 0 567 0 0 0 100 6 0 0 0 18 2 20 0 1 1 0 23 0 0 0 100 7 0 0 0 64 28 60 0 2 1 0 0 0 0 0 100 April 1, 2026 at 07:02:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 108 0 0 0 0 0 0 0 0 100 1 0 0 7 13 3 6 0 0 0 0 558 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 2 0 0 0 100 4 0 0 0 11 3 34 0 0 0 0 747 0 0 0 100 5 0 0 21 215 105 8 1 0 0 0 565 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 109 51 102 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 110 0 0 0 0 0 0 0 0 100 1 0 0 7 13 3 6 0 0 1 0 560 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 746 0 0 0 100 5 0 0 21 215 105 8 0 0 1 0 566 0 0 0 100 6 0 0 0 12 1 8 0 0 0 0 0 0 0 0 100 7 0 0 0 110 51 106 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 201 128 0 1 2 0 1 0 0 0 100 1 0 0 7 13 3 6 0 0 0 0 558 0 0 0 100 2 0 0 0 47 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 9 1 6 0 0 0 0 2 0 0 0 100 4 0 0 0 14 4 38 1 0 0 0 747 0 0 0 100 5 0 0 15 216 105 8 1 0 0 0 566 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 109 51 106 0 1 1 0 0 0 0 0 100 April 1, 2026 at 07:02:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 108 0 0 0 0 0 0 0 0 100 1 0 0 7 13 3 6 0 0 0 0 560 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 4 0 0 0 11 3 34 0 0 0 0 748 0 0 0 100 5 0 0 21 217 106 10 0 0 0 0 567 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 109 51 102 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 121 1 0 0 0 12 0 0 0 100 1 0 0 7 14 3 8 0 1 0 0 558 0 0 0 100 2 0 0 0 53 21 50 0 0 0 0 326 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 2 0 0 0 100 4 0 0 0 12 3 34 1 0 1 0 746 0 0 0 100 5 0 0 21 226 114 8 1 0 0 0 566 0 0 0 100 6 0 0 0 15 1 18 0 1 0 0 5 0 0 0 100 7 1 0 0 112 51 112 0 2 0 0 19 0 0 0 100 April 1, 2026 at 07:02:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2303 200 108 0 0 0 0 0 0 0 0 100 1 0 0 7 14 3 8 0 1 0 0 560 0 0 0 100 2 0 0 0 48 21 44 0 1 0 0 314 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 11 3 34 1 0 0 0 747 0 0 0 100 5 0 0 15 217 106 10 0 0 0 0 568 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 107 51 104 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 109 0 0 0 0 0 0 0 0 100 1 0 0 7 12 3 6 0 0 0 0 558 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 2 0 0 0 100 4 0 0 0 11 3 34 0 0 0 0 748 0 0 0 100 5 0 0 21 216 105 8 1 0 0 0 565 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 7 0 0 0 111 52 104 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:02:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 200 111 0 0 1 0 0 0 0 0 100 1 0 0 7 12 3 6 0 0 0 0 559 0 0 0 100 2 0 0 0 51 21 46 0 1 0 0 314 0 0 0 100 3 0 0 0 10 0 6 0 1 0 0 0 0 0 0 100 4 0 0 0 15 4 38 1 0 1 0 747 0 0 0 100 5 0 0 21 217 106 10 0 0 0 0 568 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 112 53 106 0 0 0 0 22 0 0 0 100 April 1, 2026 at 07:02:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 110 0 0 0 0 0 0 0 0 100 1 0 0 7 13 3 6 0 0 0 0 559 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 12 1 8 0 0 1 0 2 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 746 0 0 0 100 5 0 0 21 215 105 8 1 0 0 0 567 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 123 1 1 1 0 14 0 0 0 100 1 0 0 7 67 30 60 0 1 1 0 559 0 0 0 100 2 1 0 0 56 23 52 0 0 1 0 330 0 0 0 100 3 0 0 0 9 1 2 0 1 1 0 11 0 0 0 100 4 0 0 0 15 5 36 0 0 1 0 748 0 0 0 100 5 0 0 21 222 112 8 0 0 1 0 565 0 0 0 100 6 0 0 0 21 4 16 0 0 1 0 16 0 0 0 100 7 0 0 0 62 26 56 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:02:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 112 0 0 1 0 1 0 0 0 100 1 0 0 7 113 53 106 0 0 1 0 558 0 0 0 100 2 0 0 0 50 22 44 0 0 0 0 338 0 0 0 100 3 0 0 0 13 1 6 0 0 1 0 2 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 747 0 0 0 100 5 0 0 21 216 105 8 1 0 1 0 567 0 0 0 100 6 0 0 0 9 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2303 200 111 0 0 0 0 0 0 0 0 100 1 0 0 7 111 53 106 0 0 0 0 560 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 7 0 2 0 1 2 0 0 0 0 0 100 4 0 0 0 15 3 44 1 1 0 0 748 0 0 0 100 5 0 0 15 215 105 8 0 0 0 0 565 0 0 0 100 6 0 0 0 8 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 108 0 0 0 0 0 0 0 0 100 1 0 0 7 113 53 106 0 0 0 0 559 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 10 1 6 0 0 0 0 2 0 0 0 100 4 0 0 0 14 4 38 0 0 0 0 747 0 0 0 100 5 0 0 21 216 105 8 1 0 1 0 567 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 108 0 0 0 0 0 0 0 0 100 1 0 0 7 113 53 106 0 0 2 0 559 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 14 3 36 1 0 0 0 746 0 0 0 100 5 0 0 21 218 106 12 0 1 1 0 567 0 0 0 100 6 0 0 0 9 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 126 1 0 0 0 20 0 0 0 100 1 0 0 7 113 53 106 0 0 0 0 559 0 0 0 100 2 0 0 0 52 21 50 0 0 0 0 325 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 4 0 0 0 12 3 36 1 1 0 0 747 0 0 0 100 5 0 0 21 226 113 10 1 0 0 0 565 0 0 0 100 6 0 0 0 15 1 14 0 1 0 0 11 0 0 0 100 7 0 0 0 13 1 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 200 108 0 0 0 0 0 0 0 0 100 1 0 0 7 112 53 106 0 0 0 0 558 0 0 0 100 2 0 0 0 47 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 10 3 34 0 0 1 0 747 0 0 0 100 5 2 0 15 219 106 10 2 0 0 0 708 1 0 0 99 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 110 0 0 0 0 0 0 0 0 100 1 0 0 7 113 53 106 0 0 0 0 559 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 315 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 2 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 748 0 0 0 100 5 0 0 21 215 105 8 0 0 0 0 565 0 0 0 100 6 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 6 0 1 0 0 1 0 0 0 100 April 1, 2026 at 07:02:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 130 0 1 1 0 0 0 0 0 100 1 0 0 7 113 53 106 0 0 0 0 560 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 4 0 0 0 14 4 38 0 0 0 0 747 0 0 0 100 5 0 0 21 217 106 10 0 0 0 0 568 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 8 0 1 0 0 1 0 0 0 100 April 1, 2026 at 07:02:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 201 112 0 0 0 0 1 0 0 0 100 1 0 0 7 112 53 106 0 0 1 0 558 0 0 0 100 2 0 0 0 47 21 42 0 0 0 0 314 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 746 0 0 0 100 5 0 0 15 216 105 8 1 0 0 0 565 0 0 0 100 6 0 0 0 8 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 126 2 1 0 0 9 0 0 0 100 1 0 0 7 116 54 110 0 1 1 0 559 0 0 0 100 2 0 0 0 54 22 50 0 0 1 0 326 0 0 0 100 3 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 4 0 0 0 16 5 36 1 0 2 0 749 0 0 0 100 5 0 0 21 230 116 18 0 1 1 0 579 0 0 0 100 6 0 0 0 15 2 14 0 0 1 0 12 0 0 0 100 7 0 0 0 14 2 6 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:02:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2306 201 110 0 0 0 0 0 0 0 0 100 1 0 0 7 119 53 116 0 0 0 0 559 0 0 0 100 2 0 0 0 45 20 40 0 0 0 0 313 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 4 0 0 0 10 3 34 0 0 0 0 746 0 0 0 100 5 0 0 15 215 105 8 1 0 1 0 565 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2302 201 110 0 0 0 0 0 0 0 0 100 1 0 0 7 112 53 106 0 0 0 0 560 0 0 0 100 2 0 0 0 9 2 2 0 0 0 0 294 0 0 0 100 3 0 0 0 44 19 40 0 1 0 0 20 0 0 0 100 4 0 0 0 11 3 34 1 0 0 0 747 0 0 0 100 5 0 0 15 215 105 8 0 0 0 0 567 0 0 0 100 6 0 0 0 8 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 201 108 0 0 0 0 0 0 0 0 100 1 0 0 7 115 53 108 0 0 0 0 558 0 0 0 100 2 0 0 0 11 1 8 0 1 0 0 294 0 0 0 100 3 0 0 0 50 21 46 0 0 0 0 22 0 0 0 100 4 0 0 0 15 4 38 1 0 0 0 747 0 0 0 100 5 0 0 21 218 106 10 1 0 0 0 567 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2304 201 108 0 0 0 0 0 0 0 0 100 1 0 0 7 112 53 106 0 0 0 0 560 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 3 0 0 0 46 20 42 0 1 0 0 20 0 0 0 100 4 0 0 0 10 3 34 0 0 0 0 747 0 0 0 100 5 0 0 15 216 106 10 0 0 1 0 566 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 201 110 0 0 0 0 0 0 0 0 100 1 0 0 7 112 53 106 0 0 0 0 559 0 0 0 100 2 0 0 0 13 2 12 0 0 0 0 311 0 0 0 100 3 0 0 0 48 21 44 0 1 0 0 33 0 0 0 100 4 0 0 0 11 3 34 1 0 0 0 747 0 0 0 100 5 0 0 15 234 115 22 1 0 3 0 576 0 0 0 100 6 0 0 0 15 1 18 0 0 0 0 23 0 0 0 100 7 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2306 203 120 0 1 1 0 0 0 0 0 100 1 0 0 7 114 54 108 0 1 0 0 558 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 294 0 0 0 100 3 0 0 0 50 20 46 0 1 3 0 20 0 0 0 100 4 0 0 0 13 4 40 0 2 1 0 747 0 0 0 100 5 0 0 16 218 107 12 0 0 0 0 568 0 0 0 100 6 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 202 112 0 0 0 0 0 0 0 0 100 1 0 0 7 112 53 106 0 0 0 0 560 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 49 21 44 0 0 0 0 22 0 0 0 100 4 0 0 0 12 3 36 1 1 0 0 747 0 0 0 100 5 0 0 15 218 106 10 1 0 0 0 566 0 0 0 100 6 0 0 0 9 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:02:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 202 110 0 0 0 0 0 0 0 0 100 1 0 0 7 112 53 106 0 0 0 0 559 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 47 20 44 0 0 0 0 20 0 0 0 100 4 0 0 0 14 4 38 1 0 0 0 748 0 0 0 100 5 0 0 15 217 106 10 0 0 0 0 567 0 0 0 100 6 0 0 0 8 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 22 0 0 0 100 April 1, 2026 at 07:02:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 110 0 0 0 0 0 0 0 0 100 1 0 0 7 113 53 108 0 1 0 0 559 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 48 21 42 0 0 0 0 22 0 0 0 100 4 0 0 0 13 3 36 0 0 0 0 746 0 0 0 100 5 0 0 21 220 106 16 1 1 0 0 575 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 9 0 4 0 0 0 0 18 0 0 0 100 April 1, 2026 at 07:02:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 201 119 0 0 2 0 0 0 0 0 100 1 0 0 7 114 54 106 0 0 1 0 559 0 0 0 100 2 0 0 0 14 2 10 0 0 1 0 303 0 0 0 100 3 0 0 0 48 21 40 0 0 1 0 20 0 0 0 100 4 0 0 0 16 5 36 1 0 1 0 748 0 0 0 100 5 0 0 21 236 115 26 0 0 5 0 585 0 0 0 100 6 0 0 0 15 2 14 0 1 0 0 11 0 0 0 100 7 0 0 0 11 1 4 0 0 2 0 0 0 0 0 100 April 1, 2026 at 07:02:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 202 110 0 0 0 0 0 0 0 0 100 1 0 0 7 112 53 106 0 0 0 0 559 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 47 21 42 0 0 0 0 22 0 0 0 100 4 0 0 0 10 3 36 0 1 1 0 747 0 0 0 100 5 0 0 15 218 106 10 1 0 2 0 566 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 111 0 0 0 0 0 0 0 0 100 1 0 0 7 112 53 106 0 0 0 0 558 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 46 20 40 0 0 0 0 20 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 747 0 0 0 100 5 0 0 21 217 105 10 0 0 0 0 566 0 0 0 100 6 0 0 0 11 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 202 110 0 0 0 0 0 0 0 0 100 1 0 0 7 113 53 106 0 0 0 0 560 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 49 21 46 0 0 0 0 22 0 0 0 100 4 0 0 0 14 4 38 1 0 0 0 748 0 0 0 100 5 0 0 15 215 105 8 1 0 0 0 566 0 0 0 100 6 0 0 0 10 1 8 0 1 0 0 0 0 0 0 100 7 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 202 111 0 0 0 0 0 0 0 0 100 1 0 0 7 111 53 106 0 0 0 0 558 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 4 0 0 0 10 3 34 0 0 0 0 747 0 0 0 100 5 0 0 15 217 106 10 0 0 1 0 568 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:02:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 202 130 0 1 0 0 0 0 0 0 100 1 0 0 7 112 53 106 0 0 1 0 560 0 0 0 100 2 0 0 0 11 1 10 0 0 0 0 305 0 0 0 100 3 0 0 0 47 21 42 0 0 0 0 22 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 746 0 0 0 100 5 0 0 15 236 115 26 1 0 2 0 586 0 0 0 100 6 0 0 0 12 1 14 0 1 0 0 11 0 0 0 100 7 0 0 0 10 0 6 0 0 2 0 0 0 0 0 100 April 1, 2026 at 07:02:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 202 91 0 3 0 0 0 0 0 0 100 1 0 0 7 114 53 108 0 1 0 0 559 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 294 0 0 0 100 3 0 0 0 46 20 40 0 0 0 0 20 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 748 0 0 0 100 5 0 0 21 220 106 12 0 1 0 0 567 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 30 0 24 0 1 1 0 0 0 0 0 100 April 1, 2026 at 07:03:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 202 112 0 0 0 0 0 0 0 0 100 1 0 0 7 112 53 106 0 0 0 0 558 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 47 21 42 0 0 0 0 22 0 0 0 100 4 0 0 0 10 3 34 0 0 0 0 747 0 0 0 100 5 0 0 15 215 105 8 1 0 1 0 566 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 1 0 0 0 100 April 1, 2026 at 07:03:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 202 112 0 0 0 0 0 0 0 0 100 1 0 0 7 112 53 106 0 0 0 0 559 0 0 0 100 2 0 0 0 12 1 8 0 0 0 0 294 0 0 0 100 3 0 0 0 47 20 44 0 0 0 0 20 0 0 0 100 4 0 0 0 14 4 38 1 0 0 0 746 0 0 0 100 5 0 0 15 217 106 10 0 0 0 0 568 0 0 0 100 6 0 0 0 8 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:03:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 110 0 0 0 0 0 0 0 0 100 1 0 0 7 113 53 106 0 0 0 0 560 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 294 0 0 0 100 3 0 0 0 50 21 48 0 1 0 0 22 0 0 0 100 4 0 0 0 11 3 36 0 1 0 0 747 0 0 0 100 5 0 0 21 216 105 8 1 0 0 0 565 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 119 0 1 0 0 0 0 0 0 100 1 0 0 7 62 28 54 0 1 1 0 559 0 0 0 100 2 0 0 0 16 3 12 0 0 1 0 305 0 0 0 100 3 0 0 0 48 21 40 0 0 1 0 20 0 0 0 100 4 0 0 0 16 5 36 1 0 2 0 749 0 0 0 100 5 0 0 21 235 116 22 0 0 1 0 578 0 0 0 100 6 0 0 0 19 2 19 0 0 1 0 20 0 0 0 100 7 0 0 0 64 27 56 0 1 1 0 0 0 0 0 100 April 1, 2026 at 07:03:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 202 116 0 0 0 0 0 0 0 0 100 1 0 0 7 12 3 6 0 0 0 0 559 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 52 21 48 0 0 0 0 22 0 0 0 100 4 0 0 0 11 3 36 1 1 0 0 747 0 0 0 100 5 0 0 15 215 105 8 1 0 0 0 565 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 110 0 0 0 0 0 0 0 0 100 1 0 0 7 13 3 6 0 0 0 0 559 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 48 20 42 0 0 1 0 20 0 0 0 100 4 0 0 0 13 3 40 0 2 1 0 746 0 0 0 100 5 0 0 21 215 105 8 0 0 0 0 566 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 202 110 0 0 0 0 0 0 0 0 100 1 0 0 7 12 3 6 0 0 0 0 559 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 49 21 46 0 0 0 0 22 0 0 0 100 4 0 0 0 15 4 38 1 0 1 0 747 0 0 0 100 5 0 0 15 216 105 8 1 0 0 0 566 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 105 50 102 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:03:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2305 202 110 0 0 0 0 0 0 0 0 100 1 0 0 7 12 3 6 0 0 0 0 559 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 46 20 40 0 0 0 0 20 0 0 0 100 4 0 0 0 13 3 36 1 0 0 0 748 0 0 0 100 5 0 0 15 219 107 14 0 1 1 0 568 0 0 0 100 6 0 0 0 8 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 203 116 0 0 0 0 2 0 0 0 100 1 0 0 7 13 3 6 0 0 0 0 559 0 0 0 100 2 0 0 0 13 1 10 0 0 0 0 304 0 0 0 100 3 0 0 0 49 21 42 0 0 0 0 22 0 0 0 100 4 0 0 0 12 3 34 0 0 0 0 746 0 0 0 100 5 0 0 21 235 114 22 2 0 1 0 575 0 0 0 100 6 0 0 0 17 1 20 0 1 0 0 24 0 0 0 100 7 0 0 0 109 50 104 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:03:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 203 115 0 0 0 0 6 0 0 0 100 1 0 0 7 12 3 8 0 0 0 0 560 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 45 20 40 0 0 0 0 20 0 0 0 100 4 0 0 0 12 3 34 1 0 0 0 747 0 0 0 100 5 0 0 15 217 106 10 0 0 0 0 568 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 106 50 104 0 1 0 0 1 0 0 0 100 April 1, 2026 at 07:03:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 202 112 0 0 0 0 0 0 0 0 100 1 0 0 7 12 3 6 0 0 0 0 560 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 3 0 0 0 47 21 42 0 0 0 0 22 0 0 0 100 4 0 0 0 11 3 36 1 1 0 0 748 0 0 0 100 5 0 0 15 220 107 12 1 0 2 0 567 0 0 0 100 6 0 0 0 10 1 6 0 0 1 0 0 0 0 0 100 7 0 0 0 109 51 104 0 1 0 0 1 0 0 0 100 April 1, 2026 at 07:03:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 10 2317 203 426 7 5 10 0 35 0 0 0 100 1 4 0 7 32 3 40 0 1 148 0 717 0 0 0 100 2 0 0 0 17 1 21 1 2 0 0 341 0 0 0 100 3 0 0 0 38 15 34 0 0 0 0 21 0 0 0 100 4 2 0 0 20 4 48 0 0 0 0 800 0 0 0 99 5 589 0 21 1095 965 125 26 5 483 0 739 0 1 0 99 6 1287 0 1 24 1 31 1 2 0 0 97 0 0 0 100 7 0 0 0 224 52 330 0 2 146 0 23 0 0 0 100 April 1, 2026 at 07:03:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 202 110 0 0 0 0 0 0 0 0 100 1 1 0 7 19 5 14 0 0 0 0 571 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 297 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 0 14 3 36 1 1 1 0 747 0 0 0 100 5 0 0 15 235 119 22 2 0 0 0 589 0 0 0 100 6 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 7 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2312 202 463 7 2 14 0 16 0 1 0 99 1 0 0 7 34 7 24 0 1 1 0 577 0 0 0 100 2 0 0 0 15 2 12 0 0 1 0 307 0 0 0 100 3 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 4 0 0 0 18 5 40 1 0 1 0 749 0 0 0 100 5 657 0 21 1143 1005 126 22 1 660 0 655 0 1 0 99 6 0 0 0 22 2 26 1 1 285 0 145 0 0 0 100 7 0 0 0 264 51 411 0 1 145 0 0 0 0 0 100 April 1, 2026 at 07:03:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2306 202 144 0 1 0 0 0 0 0 0 100 1 0 0 7 20 3 14 0 0 0 0 561 0 0 0 100 2 0 0 0 9 1 6 0 0 0 0 300 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 0 12 3 36 0 0 0 0 746 0 0 0 100 5 0 0 15 313 199 10 1 0 11 0 566 0 0 0 100 6 1 0 0 26 3 32 0 0 1 0 60 0 0 0 100 7 0 0 0 118 50 126 0 1 9 0 0 0 0 0 100