April 1, 2026 at 06:54:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 724 0 48 2267 131 6001 65 319 1660 12 4285 8 5 0 87 1 834 0 58 285 14 6441 21 392 1606 5 13081 8 7 0 85 2 841 0 219 247 24 6527 18 328 1587 11 10809 2 4 0 94 3 886 0 156 433 252 5012 14 251 1592 12 8913 5 5 0 90 4 935 0 121 711 253 5285 15 212 1519 9 13241 3 4 0 93 5 1003 0 52 6736 6545 3353 15 261 2987 4 6284 3 6 0 91 6 730 0 305 192 8 6558 16 288 1425 9 14166 5 4 0 92 7 942 0 41 229 16 5592 19 341 1709 9 4835 2 4 0 94 April 1, 2026 at 06:54:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6765 0 39 2171 104 1265 3 113 2053 84 3914 2 23 0 75 1 2064 0 41 323 50 669 0 112 197 74 1475 0 1 0 98 2 3561 0 40 298 62 193 8 16 117 4 2507 12 7 0 81 3 9474 0 38 224 22 623 0 117 869 78 3101 1 3 0 96 4 7961 0 40 277 19 933 2 113 1713 97 4031 2 8 0 90 5 3874 0 20 268 24 811 1 105 721 115 2275 1 3 0 96 6 6127 0 62 214 2 527 1 91 277 87 1756 1 1 0 98 7 5246 0 47 229 66 105 6 13 144 4 3193 13 5 0 83 April 1, 2026 at 06:54:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 117 0 0 2 0 294 0 0 0 100 1 0 0 0 16 3 8 0 0 0 0 301 0 0 0 100 2 0 0 17 305 151 104 0 1 0 0 267 0 0 0 100 3 0 0 0 13 4 8 0 0 0 0 313 0 0 0 100 4 31 0 0 8 2 32 0 1 0 0 1064 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 7 0 0 10 214 105 8 0 0 0 0 259 0 0 0 100 April 1, 2026 at 06:54:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 103 292 7 57 1007 15 296 0 14 0 86 1 0 0 0 93 2 218 7 50 652 9 300 0 14 0 86 2 0 0 19 307 112 231 6 52 653 10 267 0 14 0 86 3 0 0 0 249 156 223 7 51 684 8 298 0 14 0 86 4 27 0 0 237 155 229 7 55 589 4 1045 0 14 0 86 5 0 0 0 403 3 857 0 98 628 9 0 0 1 0 99 6 0 0 0 115 13 236 8 56 608 8 1 0 14 0 86 7 0 0 8 453 131 535 0 78 597 3 260 0 1 0 99 April 1, 2026 at 06:54:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 390 0 75 1196 4 294 0 1 0 99 1 0 0 0 102 1 254 0 76 440 5 300 0 1 0 99 2 0 0 16 300 102 252 0 71 500 3 266 0 1 0 99 3 0 0 0 269 168 269 0 70 644 4 300 0 1 0 99 4 0 0 0 278 176 290 0 73 687 4 1042 0 1 0 99 5 0 0 0 367 1 786 0 81 627 2 0 0 1 0 99 6 0 0 0 200 50 365 0 74 536 4 0 0 1 0 99 7 0 0 12 390 105 431 0 69 561 3 259 0 1 0 99 April 1, 2026 at 06:54:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 387 0 77 1136 12 296 0 1 0 99 1 0 0 0 112 3 257 0 70 521 7 301 0 0 0 99 2 0 0 17 291 102 249 1 67 649 6 266 0 1 0 99 3 0 0 0 271 172 260 0 64 782 5 301 0 1 0 99 4 0 0 0 268 167 285 0 66 731 10 1042 0 1 0 99 5 0 0 0 344 2 738 0 69 747 7 0 0 1 0 99 6 0 0 0 187 42 338 1 77 580 3 0 0 1 0 99 7 0 0 10 409 115 458 1 71 782 6 260 0 1 0 99 April 1, 2026 at 06:54:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3866 0 7 2259 109 945 126 112 617 16 2094 8 3 0 89 1 3145 0 8 284 10 900 121 127 418 14 2789 4 2 0 94 2 1183 0 269 410 122 564 41 84 371 14 2200 11 1 0 87 3 3407 0 14 393 73 958 171 134 456 24 2847 6 2 0 92 4 1787 0 0 301 80 631 38 89 533 17 2999 7 2 0 92 5 6395 0 1 376 10 915 164 110 465 19 2174 8 5 0 87 6 4031 0 2 306 2 1091 129 125 405 8 2279 6 2 0 92 7 1516 0 8 499 121 654 73 89 375 4 1378 10 1 0 88 April 1, 2026 at 06:54:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2116 105 116 0 1 1 0 304 0 0 0 100 1 0 0 7 19 4 18 0 2 0 0 625 0 0 0 100 2 17 0 17 319 154 120 0 0 0 0 23 0 0 0 100 3 8 0 14 18 2 14 0 1 4 0 607 0 0 0 100 4 2 0 0 13 2 36 1 1 0 0 1134 0 0 0 100 5 0 0 0 11 2 4 0 1 0 0 1 0 0 0 100 6 2 0 0 12 1 6 0 0 1 0 8 0 0 0 100 7 0 0 3 217 104 12 0 1 0 0 27 0 0 0 100 April 1, 2026 at 06:54:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 101 308 2 29 438 0 294 0 1 0 99 1 0 0 7 99 4 203 0 20 412 0 560 0 0 0 100 2 0 0 3 406 157 320 1 20 369 0 10 0 1 0 99 3 0 0 14 158 50 207 1 17 356 0 564 0 0 0 99 4 6 0 0 135 49 197 2 21 405 0 1122 0 0 0 99 5 0 0 0 88 0 185 1 29 458 0 0 0 0 0 100 6 0 0 0 98 2 193 1 26 373 0 0 0 0 0 100 7 0 0 3 338 104 290 0 32 374 0 0 0 0 0 100 April 1, 2026 at 06:54:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 110 0 0 6 0 296 0 0 0 100 1 0 0 7 12 4 8 1 0 0 0 559 0 0 0 100 2 0 0 3 314 155 110 0 0 0 0 8 0 0 0 100 3 0 0 14 15 2 12 0 0 2 0 565 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1120 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 7 0 0 3 217 104 14 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:54:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 506 0 7 2115 101 252 3 23 34 6 620 0 2 0 98 1 198 0 36 74 6 141 1 31 21 9 791 0 1 0 99 2 172 0 3 341 142 197 4 24 17 14 310 0 0 0 99 3 108 0 14 61 3 85 0 22 28 9 756 0 0 0 100 4 79 0 0 87 18 134 1 12 23 6 1323 0 0 0 99 5 4520 0 9 60 3 105 1 22 83 9 1237 1 1 0 98 6 840 0 2 68 1 110 4 17 55 5 544 1 0 0 99 7 493 0 11 266 105 112 3 13 38 5 371 0 0 0 100 April 1, 2026 at 06:54:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 104 130 0 0 2 0 296 0 0 0 99 1 0 0 7 29 4 26 0 2 0 0 573 0 0 0 100 2 40 0 11 230 108 24 0 3 2 0 8 0 0 0 100 3 0 0 14 20 3 20 0 2 4 0 579 0 0 0 100 4 0 0 0 115 53 136 1 1 0 0 1041 0 0 0 100 5 0 0 0 19 9 4 0 1 0 0 0 0 0 0 100 6 0 0 0 18 3 8 0 0 0 0 0 0 0 0 100 7 0 0 2 232 106 30 0 1 0 0 16 0 0 0 100 April 1, 2026 at 06:54:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 101 118 0 1 5 0 294 0 1 0 99 1 0 0 7 28 3 6 0 0 0 0 606 0 0 0 100 2 0 0 122 223 108 16 0 1 1 0 5 0 0 0 100 3 0 0 14 32 4 14 0 3 0 0 571 0 0 0 100 4 4 0 0 126 52 132 1 0 0 0 1047 0 0 0 100 5 0 0 0 23 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 27 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 238 104 14 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:54:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2108 103 120 0 0 4 0 296 0 0 0 100 1 0 0 7 13 3 8 1 0 0 0 560 0 0 0 100 2 0 0 3 215 104 8 0 0 1 0 2 0 0 0 100 3 0 0 14 22 7 18 0 0 1 0 574 0 0 0 100 4 0 0 0 17 5 36 1 0 0 0 1042 0 0 0 100 5 0 0 0 106 48 104 0 1 0 0 21 0 0 0 100 6 0 0 0 13 2 6 0 0 0 0 1 0 0 0 100 7 0 0 3 218 105 10 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:54:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 195 0 0 2159 104 1376 30 137 13 0 5868 3 1 0 96 1 216 0 7 632 15 1138 14 102 14 2 5755 3 1 0 96 2 144 0 158 535 104 951 15 75 11 0 5731 3 1 0 96 3 299 0 14 463 10 931 11 60 7 0 6037 3 1 0 97 4 141 0 0 173 3 1056 11 59 3 0 6483 2 1 0 97 5 184 0 0 442 37 773 12 37 25 0 5801 3 1 0 96 6 141 0 0 383 3 735 7 41 3 1 5692 2 1 0 97 7 47 0 2 444 108 759 3 36 24 0 6117 2 1 0 97 April 1, 2026 at 06:54:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2118 107 142 0 1 5 0 311 0 0 0 100 1 0 0 7 122 57 118 0 1 1 0 567 0 0 0 100 2 0 0 7 211 103 2 0 0 1 0 0 0 0 0 100 3 0 0 14 14 3 10 0 0 1 0 580 0 0 0 100 4 0 0 0 12 3 32 1 0 1 0 1046 0 0 0 100 5 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 6 0 0 0 17 4 6 0 0 1 0 11 0 0 0 100 7 0 0 7 220 104 14 0 0 1 0 1 0 0 0 100 April 1, 2026 at 06:54:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2134 105 160 0 7 5 4 351 0 0 0 99 1 5 0 7 146 58 137 0 2 2 3 639 0 0 0 100 2 3274 0 117 233 102 64 3 4 8 13 1263 1 1 0 98 3 108 0 14 64 4 100 0 12 16 13 786 0 0 0 100 4 41 0 0 47 3 84 1 8 7 9 1181 0 0 0 100 5 59 0 2 50 6 54 0 7 9 4 158 0 0 0 100 6 6 0 0 37 1 28 0 5 2 2 64 0 0 0 100 7 6 0 3 245 104 43 1 4 2 4 104 0 0 0 100 April 1, 2026 at 06:54:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 106 124 1 0 3 0 301 0 0 0 100 1 0 0 7 112 54 108 1 0 0 0 559 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 14 12 3 10 0 0 1 0 576 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1131 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 7 0 0 3 217 103 12 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:54:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 109 313 0 19 253 0 618 0 1 0 99 1 0 0 7 187 54 285 0 14 280 0 560 0 0 0 100 2 0 0 3 286 102 180 0 18 262 0 0 0 0 0 100 3 0 0 14 125 41 173 0 15 213 0 579 0 0 0 100 4 0 0 0 114 41 195 0 16 269 0 1129 0 0 0 100 5 0 0 0 74 1 146 0 12 211 0 1 0 0 0 100 6 0 0 0 78 2 142 0 16 172 0 2 0 0 0 100 7 0 0 3 301 103 186 0 16 199 0 0 0 0 0 100 April 1, 2026 at 06:54:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 116 0 0 1 0 296 0 0 0 100 1 0 0 7 113 54 108 1 0 0 0 561 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 14 10 2 8 0 0 2 0 578 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1129 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 1 0 0 19 6 12 0 0 0 0 6 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2119 103 284 2 20 6 0 1570 0 0 0 99 1 61 0 7 126 39 249 2 19 4 0 2017 0 0 0 99 2 11 0 60 239 103 84 1 9 9 0 925 1 0 0 99 3 0 0 14 99 18 312 0 16 2 0 1904 0 0 0 99 4 357 0 0 69 2 216 4 22 2 0 2547 1 0 0 99 5 260 0 0 38 0 69 7 8 2 3 1742 2 1 0 98 6 310 0 0 59 5 246 1 20 3 3 1533 0 0 0 99 7 148 0 2 251 103 173 4 19 2 1 1460 0 0 0 99 April 1, 2026 at 06:55:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 123 0 0 6 0 296 0 0 0 100 1 17 0 7 21 5 22 1 0 0 0 592 0 0 0 100 2 0 0 17 220 107 18 0 1 0 0 17 0 0 0 100 3 4 0 14 117 52 118 1 0 0 0 625 0 0 0 100 4 0 0 0 13 2 36 1 2 0 0 1147 0 0 0 100 5 0 0 0 28 10 18 0 0 0 0 13 0 0 0 100 6 0 0 0 16 3 8 0 1 0 0 11 0 0 0 100 7 0 0 3 223 103 16 0 1 1 0 1 0 0 0 100 April 1, 2026 at 06:55:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2111 101 131 0 4 8 0 309 0 1 0 99 1 0 0 7 21 4 21 0 3 10 0 581 0 0 0 100 2 0 0 3 236 110 35 2 3 5 0 29 0 0 0 100 3 0 0 14 123 52 127 0 1 12 0 613 0 0 0 100 4 0 0 8 16 2 38 2 0 9 0 1134 0 1 0 99 5 0 0 0 21 1 28 0 6 6 1 161 0 0 0 100 6 0 0 0 22 2 24 0 3 9 0 9 0 0 0 100 7 0 0 3 225 105 21 0 5 5 0 12 0 0 0 100 April 1, 2026 at 06:55:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 260 0 17 173 0 296 0 1 0 99 1 0 0 14 68 5 124 1 13 131 0 561 0 0 0 100 2 0 0 3 263 103 105 0 7 115 0 1 0 0 0 100 3 0 0 14 194 80 219 0 12 142 0 567 0 0 0 100 4 0 0 0 75 30 126 0 11 159 0 1050 0 0 0 100 5 0 0 0 53 0 100 0 10 152 0 0 0 0 0 100 6 0 0 0 58 2 104 0 11 133 0 1 0 0 0 100 7 0 0 3 289 109 145 0 10 114 0 9 0 0 0 100 April 1, 2026 at 06:55:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2106 101 121 0 0 2 0 295 0 1 0 99 1 0 0 7 31 4 10 0 0 0 0 559 0 0 0 100 2 0 0 2 234 105 10 0 1 0 0 8 0 0 0 100 3 0 0 14 125 53 106 0 0 1 0 568 0 0 0 100 4 0 0 0 25 2 32 1 0 0 0 1046 0 0 0 100 5 0 0 0 22 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 25 1 4 0 0 0 0 0 0 0 0 100 7 2 0 5 245 109 24 0 0 0 0 9 0 0 0 100 April 1, 2026 at 06:55:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 102 124 0 1 4 0 296 0 0 0 100 1 0 0 7 17 5 10 1 0 1 0 563 0 0 0 100 2 0 0 7 210 102 2 0 0 1 0 1 0 0 0 100 3 0 0 14 114 54 106 1 0 2 0 564 0 0 0 100 4 0 0 0 14 3 34 1 0 1 0 1049 0 0 0 100 5 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 6 0 0 0 12 2 2 0 0 1 0 0 0 0 0 100 7 0 0 7 237 114 26 0 0 1 0 19 0 0 0 100 April 1, 2026 at 06:55:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 50 0 0 2160 102 1258 31 115 13 0 6425 3 1 0 95 1 24 0 8 336 6 1094 25 93 6 0 6930 3 1 0 96 2 22 0 171 297 105 962 19 104 11 0 6454 2 1 0 97 3 15 0 14 583 50 922 16 63 11 0 5849 3 1 0 97 4 28 0 0 462 4 805 11 53 8 0 6195 2 1 0 97 5 3 0 0 157 12 860 13 50 12 0 6324 2 1 0 97 6 26 0 0 483 3 855 11 36 5 0 5199 2 1 0 98 7 9 0 3 541 111 955 12 47 4 0 5514 2 1 0 97 April 1, 2026 at 06:55:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 118 0 0 3 0 296 0 0 0 100 1 0 0 7 13 4 8 1 0 0 0 559 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 14 110 53 108 0 0 1 0 571 0 0 0 100 4 0 0 0 16 6 40 0 0 0 0 1052 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 217 103 12 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 292 0 22 254 0 294 0 1 0 99 1 8 0 7 78 4 149 0 15 241 0 604 0 0 0 100 2 0 0 3 277 102 157 0 15 235 0 2 0 0 0 100 3 9 0 14 136 52 165 1 13 263 0 604 0 0 0 99 4 0 0 0 201 82 298 1 26 253 0 1051 0 0 0 99 5 0 0 0 72 0 141 0 18 211 0 0 0 0 0 100 6 0 0 0 77 1 143 0 12 237 0 0 0 0 0 100 7 0 0 3 287 103 175 0 19 265 0 0 0 0 0 100 April 1, 2026 at 06:55:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 118 0 0 2 0 296 0 0 0 100 1 0 0 7 12 4 8 1 0 0 0 559 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 1 0 0 0 100 3 0 0 14 10 3 8 1 0 1 0 575 0 0 0 100 4 1 0 0 117 56 140 1 0 1 0 1051 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 7 0 0 3 217 103 12 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 2123 101 156 0 7 17 8 373 0 0 0 99 1 2 0 7 34 4 25 0 8 2 1 606 0 0 0 100 2 23 0 2 241 103 33 0 2 1 3 100 0 0 0 100 3 3287 0 129 38 3 71 3 3 10 16 1836 1 1 0 98 4 133 0 0 173 61 223 2 11 8 13 1523 0 0 0 99 5 41 0 1 46 0 54 0 6 8 5 146 0 0 0 100 6 21 0 0 40 2 38 0 6 9 4 120 0 0 0 100 7 7 0 4 245 103 38 0 4 10 3 70 0 0 0 100 April 1, 2026 at 06:55:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 121 0 0 4 0 296 0 0 0 100 1 0 0 8 27 9 28 1 0 0 0 585 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 14 14 3 16 0 0 3 0 575 0 0 0 100 4 0 0 0 110 53 134 0 0 0 0 1132 0 0 0 100 5 0 0 0 24 8 16 0 0 0 0 10 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 214 103 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 295 0 0 2116 104 268 1 30 8 7 2280 1 1 0 98 1 251 0 7 113 19 350 4 32 8 2 2037 1 0 0 99 2 2 0 45 271 102 311 3 26 8 0 1524 0 0 0 99 3 105 0 14 62 3 177 5 22 2 0 1977 1 0 0 99 4 217 0 0 80 8 305 3 25 1 1 2893 1 0 0 99 5 99 0 0 145 34 308 1 32 5 0 1814 1 0 0 99 6 96 0 0 120 1 293 3 24 8 0 1175 0 0 0 99 7 174 0 3 276 103 248 2 19 10 3 1233 1 0 0 99 April 1, 2026 at 06:55:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 266 0 12 191 0 312 0 1 0 99 1 0 0 7 170 54 211 1 7 90 0 566 0 0 0 100 2 0 0 17 280 105 144 0 9 145 0 7 0 0 0 100 3 4 0 14 100 37 126 1 12 69 0 613 0 0 0 100 4 0 0 0 110 39 188 0 11 158 0 1152 0 0 0 100 5 0 0 0 63 2 114 0 10 150 0 32 0 0 0 100 6 0 0 0 75 5 125 0 15 124 0 7 0 0 0 100 7 12 0 3 279 104 135 0 11 151 0 11 0 0 0 100 April 1, 2026 at 06:55:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2111 101 132 0 3 21 0 302 0 1 0 99 1 0 0 7 123 54 127 0 6 7 1 647 0 0 0 100 2 0 0 3 220 101 16 1 2 6 0 36 0 0 0 100 3 0 0 14 17 3 17 0 4 11 0 584 0 0 0 100 4 0 0 0 40 11 80 3 4 11 1 1248 0 0 0 99 5 0 0 14 15 1 11 0 2 4 0 8 0 0 0 100 6 0 0 7 22 1 20 0 1 3 0 13 0 0 0 100 7 0 0 3 222 104 13 0 3 5 0 3 0 0 0 100 April 1, 2026 at 06:55:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 114 0 4 1 0 299 0 0 0 100 1 0 0 7 116 55 108 1 0 1 0 560 0 0 0 100 2 0 0 3 209 101 2 0 1 1 0 0 0 0 0 100 3 0 0 14 12 4 6 0 0 1 0 572 0 0 0 100 4 0 0 0 37 14 54 1 0 2 0 1066 0 0 0 100 5 0 0 0 19 2 11 0 2 1 0 1 0 0 0 100 6 0 0 0 20 3 8 0 1 1 0 0 0 0 0 100 7 0 0 10 222 104 16 0 1 1 0 1 0 0 0 100 April 1, 2026 at 06:55:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2106 101 124 0 1 1 0 294 0 0 0 100 1 0 0 7 135 55 120 0 0 0 0 580 0 0 0 100 2 0 0 3 226 103 4 0 0 0 0 5 0 0 0 100 3 0 0 14 31 4 16 0 0 1 0 577 0 0 0 100 4 0 0 0 37 8 44 1 0 0 0 1058 0 0 0 100 5 0 0 0 42 8 16 0 0 0 0 10 0 0 0 100 6 0 0 0 25 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 237 103 16 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 102 116 0 0 2 0 296 0 0 0 100 1 0 0 7 113 54 108 1 0 0 0 561 0 0 0 100 2 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 3 0 0 14 10 3 6 1 0 0 0 567 0 0 0 100 4 0 0 0 26 10 48 0 0 0 0 1064 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 213 103 6 0 0 0 0 3 0 0 0 100 April 1, 2026 at 06:55:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 2162 102 1422 28 145 83 0 5574 4 2 0 95 1 10 0 7 749 52 1278 16 92 72 0 6205 3 1 0 96 2 3 0 157 753 106 1114 9 72 70 0 5021 3 1 0 97 3 11 0 14 529 37 1016 14 64 47 0 5733 2 1 0 97 4 19 0 0 310 44 939 11 61 71 1 7463 3 1 0 96 5 26 0 0 176 1 1007 10 59 75 0 4609 2 1 0 97 6 25 0 0 429 1 794 6 43 63 0 7482 3 1 0 97 7 6 0 3 385 103 901 7 48 49 0 6554 2 1 0 97 April 1, 2026 at 06:55:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 103 76 0 3 4 0 296 0 0 0 100 1 0 0 7 59 26 54 1 2 0 0 560 0 0 0 100 2 0 0 4 316 131 110 0 4 0 0 5 0 0 0 100 3 0 0 14 10 3 8 0 0 1 0 572 0 0 0 100 4 0 0 0 10 2 34 1 0 0 0 1049 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 7 0 0 2 217 103 12 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 1 0 294 0 0 0 100 1 0 0 7 12 4 8 0 0 0 0 560 0 0 0 100 2 0 0 4 315 155 112 0 0 0 0 9 0 0 0 100 3 0 0 14 14 5 12 0 0 1 0 577 0 0 0 100 4 0 0 0 11 3 34 1 0 0 0 1048 0 0 0 100 5 0 0 0 7 0 4 0 0 0 0 3 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 2 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 123 0 0 1 0 296 0 0 0 100 1 0 0 8 18 4 18 1 0 0 0 579 0 0 0 100 2 0 0 5 312 154 108 0 0 0 0 5 0 0 0 100 3 0 0 14 15 3 16 1 0 2 0 587 0 0 0 100 4 0 0 0 8 2 32 0 0 0 0 1050 0 0 0 100 5 0 0 0 25 9 16 0 0 1 0 10 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 1 220 103 14 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 116 0 0 1 0 295 0 0 0 100 1 0 0 7 12 4 8 0 0 0 0 560 0 0 0 100 2 0 0 5 324 159 124 0 1 0 0 330 0 0 0 100 3 0 0 14 18 7 16 0 0 0 0 586 0 0 0 100 4 0 0 0 12 3 36 1 0 0 0 1051 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 6 0 0 0 11 1 8 0 0 0 0 5 0 0 0 100 7 0 0 1 218 103 14 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:55:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 417 0 29 301 0 296 0 1 0 99 1 0 0 7 121 4 231 1 22 255 0 560 0 0 0 100 2 0 0 3 321 104 254 0 24 290 0 1 0 0 0 100 3 0 0 14 251 120 269 0 20 184 0 576 0 0 0 100 4 0 0 0 169 70 299 1 23 290 0 1050 0 1 0 99 5 0 0 0 104 1 207 0 23 213 0 1 0 0 0 100 6 0 0 0 96 2 185 0 20 175 0 1 0 0 0 100 7 4 0 3 289 109 231 0 22 282 0 7 0 0 0 100 April 1, 2026 at 06:55:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 726 0 113 2112 102 188 0 12 8 13 447 0 1 0 99 1 720 0 7 51 4 60 1 6 7 11 1555 1 0 0 99 2 60 0 2 244 101 55 0 10 9 8 115 0 0 0 100 3 17 0 15 147 55 149 0 5 5 2 716 0 0 0 100 4 1944 0 0 48 2 77 3 7 4 11 1433 0 1 0 99 5 19 0 0 37 0 44 0 5 4 7 73 0 0 0 100 6 34 0 0 41 1 43 0 5 2 7 98 0 0 0 100 7 36 0 4 256 110 46 0 3 3 3 84 0 0 0 100 April 1, 2026 at 06:55:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 122 0 1 2 0 296 0 0 0 100 1 0 0 7 17 6 12 1 1 1 0 559 0 0 0 100 2 0 0 3 208 101 2 0 0 1 0 0 0 0 0 100 3 0 0 14 113 54 108 1 0 2 0 577 0 0 0 100 4 0 0 0 11 3 32 1 0 1 0 1134 0 0 0 100 5 0 0 0 11 2 6 0 0 1 0 3 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 7 0 0 3 232 110 26 0 0 1 0 10 0 0 0 100 April 1, 2026 at 06:55:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 118 0 0 3 0 295 0 0 0 100 1 0 0 7 16 4 20 0 0 0 0 583 0 0 0 100 2 0 0 3 207 101 2 0 0 0 0 1 0 0 0 100 3 0 0 14 116 54 118 0 0 1 0 589 0 0 0 100 4 0 0 0 8 2 32 0 0 0 0 1133 0 0 0 100 5 0 0 0 25 10 18 0 1 0 0 10 0 0 0 100 6 0 0 0 11 1 8 0 0 0 0 5 0 0 0 100 7 0 0 3 227 109 20 0 0 0 0 325 0 0 0 100 April 1, 2026 at 06:55:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 118 0 0 1 0 296 0 0 0 100 1 0 0 7 13 4 8 1 0 0 0 561 0 0 0 100 2 0 0 3 223 107 18 0 0 0 0 10 0 0 0 100 3 0 0 14 110 53 108 0 0 1 0 576 0 0 0 100 4 0 0 0 10 2 34 1 0 1 0 1133 0 0 0 100 5 0 0 0 10 3 4 0 0 0 0 1 0 0 0 100 6 0 0 0 9 1 5 0 1 0 0 0 0 0 0 100 7 0 0 3 216 103 12 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2107 103 136 0 1 5 0 299 0 0 0 100 1 3 0 7 14 5 10 0 0 0 0 564 0 0 0 100 2 0 0 3 217 106 10 0 0 0 0 6 0 0 0 100 3 0 0 14 110 53 108 0 0 1 0 578 0 0 0 100 4 0 0 0 10 2 34 1 0 4 0 1134 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 24 0 0 13 2 12 0 0 0 0 5 0 0 0 100 7 0 0 3 214 103 8 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:55:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 0 0 6 0 296 0 0 0 100 1 3 0 7 12 4 8 1 0 0 0 563 0 0 0 100 2 0 0 3 214 105 8 0 0 0 0 5 0 0 0 100 3 0 0 14 110 53 108 1 0 1 0 574 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1124 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 5 0 294 0 0 0 100 1 0 0 7 13 4 10 0 1 0 0 559 0 0 0 100 2 0 0 3 226 110 20 0 0 0 0 331 0 0 0 100 3 0 0 14 112 54 110 0 0 3 0 578 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1125 0 0 0 100 5 0 0 0 7 0 4 0 0 0 0 3 0 0 0 100 6 0 0 0 11 1 8 0 0 0 0 5 0 0 0 100 7 0 0 3 213 103 8 0 0 0 0 2 0 0 0 100 April 1, 2026 at 06:55:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 122 0 0 4 0 299 0 0 0 100 1 0 0 7 24 5 26 1 0 0 0 584 0 0 0 100 2 0 0 3 209 102 4 0 1 0 0 0 0 0 0 100 3 0 0 14 119 55 122 0 0 2 0 591 0 0 0 100 4 0 0 0 9 2 32 1 0 1 0 1126 0 0 0 100 5 0 0 0 23 8 18 0 1 1 0 10 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 224 108 16 0 0 0 0 6 0 0 0 100 April 1, 2026 at 06:55:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 4 0 294 0 0 0 100 1 0 0 7 12 4 8 0 0 0 0 559 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 1 0 0 0 100 3 0 0 14 110 53 108 0 0 2 0 576 0 0 0 100 4 0 0 0 10 2 34 1 0 0 0 1127 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 224 109 18 0 0 0 0 10 0 0 0 100 April 1, 2026 at 06:55:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 120 0 0 2 0 296 0 0 0 100 1 0 0 7 13 4 8 1 0 0 0 561 0 0 0 100 2 0 0 3 213 102 8 0 0 0 0 1 0 0 0 100 3 0 0 14 110 53 108 1 0 4 0 581 0 0 0 100 4 0 0 0 10 2 34 1 0 0 0 1126 0 0 0 100 5 0 0 0 7 1 4 0 0 0 0 21 0 0 0 100 6 0 0 0 13 2 12 0 1 0 0 1 0 0 0 100 7 0 0 3 220 107 14 0 0 0 0 5 0 0 0 100 April 1, 2026 at 06:55:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 102 285 3 16 3 0 1760 0 0 0 99 1 109 0 7 53 6 111 1 13 3 0 1784 0 0 0 99 2 19 0 45 239 102 153 5 18 1 0 1143 1 0 0 99 3 387 0 14 150 53 268 1 14 2 1 2243 1 0 0 99 4 187 0 0 30 2 90 2 5 2 2 2706 1 1 0 98 5 67 0 0 51 1 204 5 16 0 0 1323 0 0 0 99 6 233 0 0 55 1 163 3 20 4 3 1466 0 0 0 100 7 3 0 3 263 111 92 2 11 5 0 876 1 0 0 99 April 1, 2026 at 06:55:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 124 0 2 10 0 306 0 0 0 100 1 0 0 7 24 7 14 2 0 1 0 568 0 0 0 100 2 0 0 21 226 108 18 0 1 1 0 19 0 0 0 100 3 5 0 14 114 54 106 0 0 7 0 560 0 0 0 100 4 0 0 0 15 3 35 1 1 1 0 1146 0 0 0 100 5 0 0 0 15 2 8 0 0 1 0 17 0 0 0 100 6 12 0 0 14 2 4 0 0 1 0 10 0 0 0 100 7 0 0 7 219 104 12 0 1 1 0 16 0 0 0 100 April 1, 2026 at 06:55:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 120 0 0 2 0 295 0 0 0 100 1 0 0 7 18 4 20 0 0 0 0 571 0 0 0 100 2 0 0 3 219 107 12 1 0 0 0 9 0 0 0 100 3 0 0 14 117 54 118 0 0 0 0 575 0 0 0 100 4 0 0 0 11 2 38 1 1 0 0 1136 0 0 0 100 5 0 0 0 21 8 12 0 0 0 0 16 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 216 103 8 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 118 0 0 2 0 296 0 0 0 100 1 0 0 7 14 5 10 1 0 0 0 561 0 0 0 100 2 0 0 3 225 110 18 0 0 0 0 14 0 0 0 100 3 0 0 14 109 53 106 1 0 1 0 568 0 0 0 100 4 0 0 0 13 2 36 1 0 1 0 1140 0 0 0 100 5 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2115 102 327 1 27 174 0 384 0 1 0 99 1 0 0 7 86 4 135 0 9 93 0 562 0 0 0 100 2 0 0 10 306 109 181 0 12 122 0 40 0 0 0 100 3 0 0 22 226 91 267 0 12 166 0 578 0 1 0 99 4 0 0 0 95 39 149 0 12 156 0 1155 0 0 0 99 5 0 0 0 73 0 138 0 12 154 0 94 0 0 0 100 6 0 0 0 77 1 141 1 13 119 0 12 0 0 0 100 7 0 0 3 283 103 145 1 20 128 0 23 0 0 0 100 April 1, 2026 at 06:55:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 119 0 1 5 0 296 0 0 0 100 1 0 0 7 19 6 12 1 0 0 0 561 0 0 0 100 2 0 0 3 232 112 22 0 0 0 0 15 0 0 0 100 3 0 0 21 110 53 108 0 1 3 0 562 0 0 0 100 4 0 0 0 10 2 32 1 0 1 0 1052 0 0 0 100 5 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 16 3 10 0 1 0 0 4 0 0 0 100 7 0 0 3 215 103 10 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:55:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2106 101 131 0 1 2 0 295 0 0 0 100 1 0 0 7 29 4 8 0 0 0 0 559 0 0 0 100 2 0 0 3 243 111 20 1 0 0 0 17 0 0 0 100 3 0 0 14 127 53 108 0 0 0 0 564 0 0 0 100 4 0 0 0 26 2 34 1 1 0 0 1046 0 0 0 100 5 0 0 0 23 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 25 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 231 103 6 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:55:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 102 120 0 0 1 0 296 0 0 0 100 1 0 0 7 23 6 20 1 0 0 0 577 0 0 0 100 2 0 0 3 220 107 12 0 0 0 0 10 0 0 0 100 3 1 0 14 114 53 114 1 0 0 0 591 0 0 0 100 4 0 0 0 10 2 32 1 0 0 0 1047 0 0 0 100 5 0 0 0 19 7 12 0 0 1 0 12 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 215 103 8 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 211 0 13 5 0 727 0 0 0 99 1 0 0 7 56 4 89 1 10 2 0 924 0 0 0 100 2 0 0 17 279 116 107 1 9 0 0 753 0 0 0 99 3 1 0 14 143 54 170 1 7 2 0 948 0 0 0 100 4 4 0 0 33 2 82 0 1 2 0 1688 0 0 0 99 5 0 0 0 70 1 124 2 8 1 0 310 0 0 0 99 6 12 0 0 46 2 72 0 4 2 0 393 0 0 0 100 7 2 0 3 238 103 47 0 2 3 0 155 0 0 0 100 April 1, 2026 at 06:55:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 2160 102 1385 32 137 216 0 6219 3 1 0 96 1 71 0 7 171 4 1112 18 109 215 0 7072 2 1 0 97 2 24 0 143 346 104 1074 20 90 216 0 5170 2 1 0 97 3 14 0 14 225 54 959 18 77 177 0 6302 3 1 0 97 4 26 0 0 177 45 1101 18 64 220 0 6038 2 1 0 97 5 17 0 0 146 4 880 6 46 228 0 6276 2 1 0 97 6 23 0 0 466 47 1259 16 64 261 0 5143 2 1 0 97 7 32 0 3 357 104 994 12 61 202 0 4595 2 1 0 97 April 1, 2026 at 06:55:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 100 113 0 1 6 0 4 0 0 0 100 1 0 0 7 22 4 23 0 2 12 0 554 0 0 0 100 2 0 0 3 211 102 8 0 1 1 0 303 0 0 0 100 3 0 0 14 15 5 17 0 1 3 0 591 0 0 0 100 4 158 0 0 12 2 35 2 2 1 0 1206 0 0 0 99 5 0 0 0 9 0 10 0 3 3 0 10 0 0 0 100 6 0 0 0 126 58 127 0 1 3 0 11 0 0 0 100 7 0 0 3 215 104 11 0 1 0 0 1 0 0 0 100 April 1, 2026 at 06:55:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 2174 149 169 0 9 3 8 148 0 0 0 100 1 40 0 7 60 5 59 1 3 3 8 652 0 0 0 100 2 6 0 7 239 102 24 0 2 3 2 353 0 0 0 100 3 4 0 14 34 4 12 1 1 6 0 602 0 0 0 100 4 3109 0 121 29 3 79 1 0 10 13 2237 1 1 0 98 5 90 0 0 44 1 52 1 9 5 13 187 0 0 0 100 6 31 0 3 157 9 159 0 8 6 10 99 0 0 0 100 7 51 0 7 248 104 44 0 5 2 6 84 0 0 0 100 April 1, 2026 at 06:55:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 151 112 0 0 0 0 1 0 0 0 100 1 0 0 7 25 4 26 0 0 3 0 575 0 0 0 100 2 0 0 3 213 102 10 0 0 0 0 300 0 0 0 100 3 0 0 14 16 4 16 1 0 3 0 578 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1131 0 0 0 100 5 0 0 0 27 11 18 0 0 1 0 21 0 0 0 100 6 0 0 0 117 5 112 0 0 0 0 5 0 0 0 100 7 0 0 3 214 103 8 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 112 0 0 0 0 11 0 0 0 100 1 0 0 7 21 4 18 0 0 3 0 557 0 0 0 100 2 0 0 3 209 102 2 1 0 0 0 300 0 0 0 100 3 0 0 14 9 3 6 0 0 1 0 567 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1129 0 0 0 100 5 0 0 0 23 7 20 0 0 0 0 12 0 0 0 100 6 0 0 0 117 4 112 0 1 0 0 332 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 0 2159 150 199 0 13 9 0 667 0 0 0 99 1 250 0 7 40 4 107 2 8 10 1 1177 0 0 0 100 2 0 0 16 228 102 43 2 5 0 0 681 0 0 0 100 3 54 0 14 18 3 56 1 6 4 0 941 0 0 0 100 4 20 0 0 22 2 101 2 8 1 0 1575 0 0 0 99 5 320 0 1 35 7 122 3 7 2 1 804 1 0 0 99 6 147 0 0 134 3 147 1 4 5 0 452 1 0 0 99 7 20 0 4 233 103 60 5 13 4 0 516 0 0 0 99 April 1, 2026 at 06:55:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2124 107 265 3 12 2 0 622 1 1 0 99 1 1 0 7 149 51 183 2 16 6 0 1379 0 0 0 99 2 0 0 45 240 103 71 4 10 0 0 1121 0 0 0 100 3 5 0 14 58 8 165 3 13 0 0 1207 0 0 0 100 4 0 0 0 45 2 117 1 9 0 0 1954 0 0 0 99 5 102 0 0 55 4 115 6 10 4 0 1657 1 0 0 99 6 52 0 0 52 2 101 3 11 2 0 919 0 0 0 100 7 1 0 3 241 103 100 3 9 1 0 866 0 0 0 100 April 1, 2026 at 06:55:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 104 0 0 0 0 0 0 0 0 100 1 0 0 7 120 54 116 0 0 3 0 554 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 300 0 0 0 100 3 0 0 14 21 9 16 0 0 0 0 275 0 0 0 100 4 0 0 0 9 2 32 1 0 1 0 1137 0 0 0 100 5 0 0 0 10 1 4 0 0 1 0 301 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 109 156 2 2 6 0 126 0 0 0 99 1 0 0 21 137 55 142 0 3 13 0 581 0 0 0 100 2 0 0 11 224 104 19 1 5 11 0 303 0 1 0 99 3 0 0 14 33 6 40 0 5 11 0 305 0 0 0 100 4 2 0 0 24 3 51 0 4 6 0 1072 0 0 0 100 5 0 0 0 36 11 33 0 6 14 0 312 0 0 0 100 6 0 0 7 20 2 20 0 5 10 0 24 0 0 0 100 7 0 0 3 225 103 28 0 5 9 2 94 0 0 0 100 April 1, 2026 at 06:55:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 108 126 0 0 1 0 11 0 0 0 100 1 0 0 7 121 53 117 0 1 4 0 554 0 0 0 100 2 0 0 3 211 103 4 0 0 0 0 301 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 4 0 0 0 15 2 38 1 0 2 0 1050 0 0 0 100 5 0 0 0 14 3 8 0 0 1 0 302 0 0 0 100 6 0 0 0 14 2 8 0 0 0 0 1 0 0 0 100 7 0 0 10 212 103 6 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:55:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 109 230 0 18 136 0 17 0 1 0 99 1 0 0 119 107 12 172 1 18 137 0 554 0 0 0 100 2 0 0 3 335 109 161 0 15 112 0 301 0 0 0 100 3 0 0 14 179 70 186 1 13 157 0 290 0 0 0 99 4 0 0 0 110 33 151 1 7 116 0 1047 0 0 0 100 5 0 0 0 88 3 130 0 9 115 0 329 0 0 0 100 6 0 0 0 82 3 115 0 8 137 0 1 0 0 0 100 7 0 0 3 294 106 132 0 8 139 0 3 0 0 0 100 April 1, 2026 at 06:55:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 2 2121 108 128 0 0 0 0 19 0 0 0 100 1 0 0 14 21 4 16 0 0 1 0 555 0 0 0 100 2 0 0 3 211 102 4 0 1 0 0 300 0 0 0 100 3 0 0 14 108 51 106 0 0 0 0 284 0 0 0 100 4 0 0 0 15 2 40 0 0 0 0 1048 0 0 0 100 5 0 0 0 11 2 6 0 0 5 0 297 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 7 0 0 3 215 104 6 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:55:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2190 137 1187 31 119 24 0 7602 3 1 0 95 1 7 0 7 713 17 1216 12 71 13 0 5596 3 1 0 97 2 4 0 157 434 104 902 13 71 9 0 6956 2 1 0 97 3 25 0 14 255 9 1163 16 76 14 0 6719 2 1 0 97 4 6 0 0 141 3 968 10 40 13 0 8173 2 1 0 97 5 48 0 0 151 4 967 11 57 12 0 6518 2 1 0 97 6 11 0 0 142 2 934 15 55 15 0 6346 3 1 0 96 7 6 0 3 646 108 813 7 31 9 0 4269 2 1 0 97 April 1, 2026 at 06:55:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 151 110 0 0 0 0 1 0 0 0 100 1 0 0 7 134 8 136 0 0 4 0 584 0 0 0 100 2 0 0 3 210 103 4 0 0 0 0 300 0 0 0 100 3 0 0 14 9 1 10 0 0 0 0 278 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1049 0 0 0 100 5 0 0 0 27 10 22 0 0 9 0 309 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 10 0 0 0 100 7 0 0 3 214 103 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2650 0 116 2115 108 104 2 6 5 8 447 0 1 0 98 1 108 0 7 113 10 147 1 11 23 18 728 0 0 0 100 2 643 0 3 297 115 103 1 11 9 8 1269 1 0 0 99 3 45 0 14 47 2 50 1 10 2 5 391 0 0 0 100 4 8 0 0 99 31 123 0 9 6 1 1205 0 0 0 100 5 47 0 0 43 2 46 0 4 10 2 388 0 0 0 100 6 5 0 0 38 2 29 0 3 0 1 69 0 0 0 100 7 6 0 3 238 105 27 0 3 4 4 73 0 0 0 100 April 1, 2026 at 06:55:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 100 318 0 22 291 0 3 0 1 0 99 1 0 0 7 110 9 192 1 15 297 0 566 0 0 0 99 2 0 0 3 283 103 158 0 15 222 0 300 0 0 0 100 3 0 0 14 111 38 170 0 19 203 0 266 0 0 0 100 4 0 0 0 217 89 283 1 18 271 0 1129 0 1 0 99 5 0 0 0 90 2 170 0 13 255 0 295 0 0 0 100 6 0 0 0 89 1 172 0 16 209 0 10 0 0 0 100 7 0 0 3 287 107 154 0 14 200 0 5 0 0 0 100 April 1, 2026 at 06:55:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 110 0 0 0 0 2 0 0 0 100 1 0 0 7 21 5 18 0 1 3 0 878 0 0 0 100 2 0 0 3 213 103 6 1 1 0 0 300 0 0 0 100 3 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 4 0 0 0 109 52 132 1 0 1 0 1130 0 0 0 100 5 0 0 0 12 2 10 0 0 5 0 311 0 0 0 100 6 0 0 0 20 5 16 0 0 0 0 7 0 0 0 100 7 0 0 3 212 103 6 0 1 0 0 10 0 0 0 100 April 1, 2026 at 06:56:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 0 0 100 1 0 0 7 12 4 8 0 0 3 0 553 0 0 0 100 2 0 0 3 216 102 10 0 1 0 0 300 0 0 0 100 3 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 4 0 0 0 112 52 134 1 1 1 0 1131 0 0 0 100 5 0 0 0 12 2 13 0 1 1 0 11 0 0 0 100 6 0 0 0 21 7 16 0 0 0 0 6 0 0 0 100 7 0 0 3 215 104 13 0 1 8 0 340 0 0 0 100 April 1, 2026 at 06:56:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 333 0 0 2119 102 311 1 22 4 2 1733 1 1 0 99 1 0 0 7 90 4 252 4 23 4 0 1991 0 0 0 99 2 5 0 59 244 103 268 1 17 1 0 1782 0 0 0 99 3 112 0 14 55 1 209 1 19 3 1 1753 1 0 0 99 4 351 0 0 88 10 288 2 19 0 0 2758 1 0 0 99 5 218 0 0 127 46 132 2 8 2 2 1270 1 1 0 98 6 0 0 0 60 15 94 0 8 6 0 688 1 0 0 99 7 20 0 3 274 104 279 3 17 4 0 1624 0 0 0 99 April 1, 2026 at 06:56:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 0 0 100 1 0 0 7 12 4 8 0 0 6 0 554 0 0 0 100 2 0 0 3 219 103 14 0 0 0 0 304 0 0 0 100 3 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 4 0 0 0 26 10 50 1 0 1 0 1150 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 113 52 106 0 0 0 0 1 0 0 0 100 7 0 0 3 213 104 7 0 0 0 0 274 0 0 0 100 April 1, 2026 at 06:56:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2118 104 264 0 19 195 0 306 0 1 0 99 1 0 0 7 86 5 151 0 18 158 0 567 0 0 0 100 2 0 0 3 280 103 126 1 14 111 0 301 0 0 0 100 3 0 0 21 94 30 135 1 16 116 0 421 0 0 0 100 4 0 0 0 112 40 163 1 16 161 0 1088 0 0 0 99 5 0 0 0 78 1 133 0 11 144 0 26 0 0 0 100 6 0 0 9 97 13 152 0 15 160 0 1 0 1 0 99 7 0 0 3 354 144 208 0 11 126 0 44 0 0 0 100 April 1, 2026 at 06:56:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 113 0 1 3 0 302 0 0 0 100 1 0 0 7 14 4 8 0 0 2 0 553 0 0 0 100 2 0 0 3 218 102 10 0 0 0 0 300 0 0 0 100 3 0 0 14 8 1 4 0 1 0 0 266 0 0 0 100 4 0 0 7 25 9 48 0 1 0 0 1054 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 14 1 6 0 0 0 0 0 0 0 0 100 7 0 0 3 314 152 112 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:56:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2110 102 121 0 1 3 0 302 0 1 0 99 1 0 0 7 35 6 12 1 0 1 0 554 0 0 0 100 2 0 0 7 233 102 10 0 0 1 0 300 0 0 0 100 3 0 0 14 25 2 2 1 0 1 0 266 0 0 0 100 4 0 0 0 43 9 46 1 0 1 0 1056 0 0 0 100 5 0 0 0 31 4 8 0 0 1 0 2 0 0 0 100 6 0 0 0 27 2 2 0 0 1 0 0 0 0 0 100 7 0 0 7 328 153 106 0 0 1 0 1 0 0 0 100 April 1, 2026 at 06:56:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 144 1 1 5 0 313 0 0 0 99 1 0 0 7 18 4 20 0 0 6 0 577 0 0 0 100 2 0 0 3 217 102 10 0 0 0 0 300 0 0 0 100 3 0 0 14 6 1 2 0 0 0 0 265 0 0 0 100 4 0 0 0 32 10 58 2 0 0 0 1075 0 0 0 100 5 0 0 0 19 8 8 0 0 0 0 1 0 0 0 100 6 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 7 0 0 3 316 152 110 0 0 0 0 3 0 0 0 100 April 1, 2026 at 06:56:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2160 105 1208 31 115 22 0 6812 4 1 0 95 1 2 0 7 659 8 1192 23 75 16 0 4890 3 1 0 97 2 6 0 171 549 103 1048 15 56 12 0 7154 2 1 0 97 3 31 0 14 272 3 962 11 70 10 0 6130 2 1 0 97 4 20 0 0 385 35 1134 13 64 18 0 7149 3 1 0 96 5 4 0 0 185 6 984 20 60 24 0 5658 3 1 0 96 6 2 0 0 146 3 830 16 52 12 0 6048 2 1 0 97 7 9 0 3 578 118 786 11 32 13 1 7414 2 1 0 97 April 1, 2026 at 06:56:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 261 0 19 244 0 303 0 1 0 99 1 0 0 7 96 10 173 0 11 225 0 560 0 0 0 100 2 0 0 3 287 102 157 0 13 174 0 300 0 0 0 100 3 0 0 14 105 35 160 0 15 252 0 266 0 0 0 100 4 0 0 0 122 47 174 2 14 242 0 1048 0 1 0 99 5 0 0 0 158 40 240 0 19 267 0 0 0 0 0 100 6 0 0 0 63 0 124 0 14 217 0 0 0 0 0 100 7 0 0 3 273 104 130 0 10 183 0 10 0 0 0 100 April 1, 2026 at 06:56:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 108 0 0 6 0 305 0 0 0 100 1 0 0 7 21 8 16 2 0 1 0 558 0 0 0 100 2 0 0 3 218 102 12 0 0 0 0 300 0 0 0 100 3 0 0 14 9 1 10 0 1 0 0 266 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1046 0 0 0 100 5 0 0 0 112 53 108 0 0 0 0 5 0 0 0 100 6 0 0 0 9 1 4 0 1 0 0 1 0 0 0 100 7 0 0 3 214 104 8 0 0 0 0 10 0 0 0 100 April 1, 2026 at 06:56:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 108 0 0 5 0 300 0 0 0 100 1 0 0 7 20 8 16 0 0 2 0 559 0 0 0 100 2 0 0 3 216 102 10 0 0 0 0 300 0 0 0 100 3 0 0 14 7 1 4 1 0 0 0 266 0 0 0 100 4 0 0 0 9 2 34 0 1 0 0 1047 0 0 0 100 5 0 0 0 108 51 104 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 3 214 104 8 0 0 0 0 10 0 0 0 100 April 1, 2026 at 06:56:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 640 0 0 2130 105 165 1 11 15 6 1207 1 1 0 98 1 7 0 7 136 47 138 0 5 7 3 979 0 0 0 100 2 4 0 3 243 102 29 1 5 1 4 344 0 0 0 100 3 738 0 128 24 1 56 0 6 3 12 446 0 0 0 99 4 135 0 0 64 4 115 1 10 12 14 1316 0 0 0 100 5 21 0 0 84 22 84 0 6 7 7 125 0 0 0 100 6 1941 0 2 46 0 50 2 8 11 9 391 0 1 0 99 7 10 0 3 243 104 41 0 8 9 5 70 0 0 0 100 April 1, 2026 at 06:56:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 110 0 0 2 0 302 0 0 0 100 1 0 0 7 114 55 110 0 0 2 0 557 0 0 0 100 2 0 0 3 220 104 14 0 0 0 0 301 0 0 0 100 3 3 0 14 6 1 6 0 2 0 0 273 0 0 0 100 4 0 0 0 25 8 50 1 1 1 0 1145 0 0 0 100 5 0 0 0 13 2 12 0 2 0 0 9 0 0 0 100 6 0 0 0 13 2 170 0 1 0 0 334 0 0 0 100 7 0 0 3 216 104 12 0 0 0 0 21 0 0 0 100 April 1, 2026 at 06:56:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2126 106 335 7 27 7 0 1833 1 1 0 99 1 0 0 7 188 45 438 1 27 5 0 2120 1 0 0 99 2 0 0 59 322 112 279 1 18 3 0 1348 1 0 0 99 3 19 0 14 67 1 293 0 19 5 0 1391 1 0 0 99 4 86 0 0 100 6 263 8 16 3 0 2562 1 0 0 99 5 17 0 0 67 2 213 3 15 4 0 1128 1 0 0 99 6 775 0 0 97 1 359 3 25 9 3 1895 1 0 0 99 7 276 0 5 242 105 70 2 6 3 3 1525 1 0 0 98 April 1, 2026 at 06:56:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 16 0 0 5 0 310 0 0 0 100 1 0 0 7 112 54 108 0 0 2 0 554 0 0 0 100 2 0 0 3 317 103 112 0 0 0 0 300 0 0 0 100 3 0 0 14 6 1 2 1 0 0 0 266 0 0 0 100 4 0 0 0 11 2 32 1 0 0 0 1137 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 107 45 0 5 10 0 351 0 0 0 99 1 0 0 7 130 56 130 0 6 13 0 584 0 0 0 100 2 0 0 3 337 107 138 1 8 16 0 318 0 0 0 100 3 0 0 14 16 3 12 0 4 8 0 269 0 0 0 100 4 0 0 14 22 4 50 2 4 9 0 1143 0 0 0 100 5 2 0 0 23 3 19 0 4 10 0 33 0 0 0 100 6 0 0 8 18 1 12 0 3 6 0 0 0 1 0 99 7 0 0 3 222 104 18 0 2 2 0 146 0 0 0 100 April 1, 2026 at 06:56:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 48 0 1 3 0 311 0 0 0 99 1 0 0 7 120 54 120 0 0 4 0 575 0 0 0 100 2 0 0 3 336 111 130 0 0 0 0 314 0 0 0 100 3 0 0 14 10 3 6 0 0 0 0 269 0 0 0 100 4 0 0 0 16 2 42 1 1 0 0 1064 0 0 0 100 5 0 0 7 14 6 6 0 1 0 0 0 0 0 0 100 6 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 7 0 0 3 218 103 12 0 0 2 0 3 0 0 0 100 April 1, 2026 at 06:56:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2106 101 11 0 0 4 0 300 0 0 0 100 1 0 0 7 131 55 110 1 0 1 0 556 0 0 0 100 2 0 0 3 348 110 128 0 0 0 0 310 0 0 0 100 3 0 0 14 25 3 6 0 0 0 0 271 0 0 0 100 4 0 0 0 24 2 32 0 0 0 0 1048 0 0 0 100 5 0 0 0 28 1 8 0 0 0 0 3 0 0 0 100 6 0 0 0 23 0 2 0 0 0 0 0 0 0 0 100 7 0 0 3 227 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 102 153 0 13 226 0 298 0 1 0 99 1 0 0 7 183 54 262 0 12 237 0 555 0 0 0 100 2 0 0 3 413 108 295 1 13 138 0 308 0 0 0 100 3 0 0 14 103 41 139 1 12 188 0 265 0 0 0 100 4 0 0 0 118 42 172 1 12 167 0 1047 0 0 0 99 5 0 0 0 77 1 144 0 9 187 0 0 0 0 0 100 6 0 0 0 65 0 117 0 11 140 0 0 0 0 0 100 7 0 0 3 286 103 149 0 9 108 0 0 0 0 0 100 April 1, 2026 at 06:56:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 49 0 0 2151 102 1187 27 128 20 0 7600 3 1 0 96 1 17 0 0 360 23 1232 34 107 19 0 6536 3 1 0 96 2 43 0 173 502 109 1209 22 100 20 0 5999 3 1 0 96 3 49 0 0 407 6 985 20 70 17 1 6476 3 1 0 96 4 9 0 14 390 5 692 12 55 5 0 6238 2 1 0 97 5 15 0 0 500 30 958 16 53 10 0 4977 3 1 0 97 6 48 0 7 163 2 860 12 58 11 0 6581 2 1 0 97 7 3 0 1 494 104 674 11 49 11 0 5891 2 1 0 97 April 1, 2026 at 06:56:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 108 0 0 1 0 303 0 0 0 100 1 0 0 0 10 2 6 0 0 2 0 304 0 0 0 100 2 1 0 3 230 109 24 0 0 0 0 307 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 34 1 0 0 0 1314 0 0 0 100 5 0 0 0 84 39 78 0 0 0 0 0 0 0 0 100 6 0 0 7 35 14 32 0 1 0 0 260 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 124 0 0 2 0 310 0 0 0 100 1 0 0 0 17 3 18 0 0 2 0 326 0 0 0 100 2 0 0 3 235 110 28 0 0 0 0 310 0 0 0 100 3 0 0 0 12 2 10 0 1 0 0 8 0 0 0 100 4 0 0 14 13 3 42 1 0 0 0 1326 0 0 0 100 5 0 0 0 14 7 4 0 0 0 0 0 0 0 0 100 6 0 0 7 111 52 106 1 0 0 0 260 0 0 0 100 7 0 0 3 216 104 10 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:56:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 110 0 0 3 0 303 0 0 0 100 1 0 0 0 12 2 8 0 1 0 0 304 0 0 0 100 2 0 0 3 233 109 28 0 0 0 0 310 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 14 12 3 42 0 1 0 0 1314 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 112 53 108 0 0 0 0 261 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 641 0 6 2135 103 300 1 25 302 8 1223 1 1 0 98 1 23 0 0 126 3 212 0 22 252 4 414 0 0 0 100 2 762 0 117 329 110 274 1 18 216 16 808 0 1 0 99 3 113 0 0 141 40 201 0 21 221 8 186 0 0 0 100 4 1940 0 15 140 40 238 4 25 208 11 1726 0 1 0 99 5 22 0 0 102 2 176 0 19 232 7 92 0 0 0 100 6 10 0 7 150 23 220 0 19 283 3 329 0 0 0 100 7 1 0 3 369 133 240 0 15 233 2 15 0 0 0 100 April 1, 2026 at 06:56:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 122 0 0 3 0 315 0 0 0 100 1 0 0 0 10 2 6 0 0 2 0 304 0 0 0 100 2 0 0 3 218 103 12 0 0 0 0 300 0 0 0 100 3 0 0 0 7 0 4 0 0 0 0 18 0 0 0 100 4 0 0 14 11 3 36 1 0 0 0 1400 0 0 0 100 5 0 0 0 12 1 12 0 1 0 0 0 0 0 0 100 6 0 0 7 12 3 8 0 0 0 0 261 0 0 0 100 7 0 0 3 309 152 104 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 326 0 0 2128 106 194 4 25 7 2 1841 1 1 0 99 1 2 0 0 143 18 252 3 19 12 0 1763 0 0 0 99 2 426 0 63 270 104 248 3 18 3 1 1888 1 0 0 99 3 1 0 0 53 4 105 3 13 4 0 978 1 0 0 99 4 216 0 28 40 4 119 2 5 4 1 3249 2 1 0 98 5 189 0 0 81 6 181 8 14 5 0 1438 1 0 0 99 6 74 0 7 71 3 146 6 19 7 0 1358 1 0 0 99 7 0 0 7 345 139 220 1 14 1 0 1087 0 0 0 100 April 1, 2026 at 06:56:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 24 0 0 2 0 316 0 0 0 100 1 1 0 0 56 3 54 0 1 2 0 314 0 0 0 100 2 0 0 3 278 105 74 0 2 0 0 301 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 13 3 42 1 0 0 0 1415 0 0 0 100 5 0 0 0 27 13 14 0 0 0 0 7 0 0 0 100 6 0 0 7 18 5 16 0 1 0 0 270 0 0 0 100 7 0 0 3 312 150 108 0 3 0 0 0 0 0 0 100 April 1, 2026 at 06:56:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 125 1 8 18 1 447 0 1 0 99 1 0 0 0 108 44 107 0 2 7 0 348 0 0 0 100 2 0 0 3 250 105 43 2 6 3 0 321 0 0 0 100 3 0 0 7 17 1 18 0 5 12 0 13 0 0 0 100 4 0 0 22 25 4 52 2 3 10 0 1410 0 1 0 99 5 0 0 0 23 8 6 0 1 6 0 0 0 0 0 100 6 0 0 7 47 13 50 0 5 11 0 303 0 0 0 100 7 0 0 10 243 110 41 0 5 3 0 9 0 0 0 100 April 1, 2026 at 06:56:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 103 185 1 17 208 0 302 0 1 0 99 1 0 0 0 101 12 168 1 10 152 0 294 0 0 0 100 2 0 0 2 286 105 139 1 12 173 0 300 0 0 0 100 3 0 0 0 171 32 205 0 15 140 0 0 0 0 0 100 4 0 0 14 88 35 131 2 10 173 0 1316 0 0 0 99 5 0 0 0 70 1 126 1 11 140 0 0 0 0 0 100 6 0 0 7 82 10 136 0 12 127 0 267 0 0 0 100 7 0 0 5 352 140 208 1 11 155 0 0 0 0 0 100 April 1, 2026 at 06:56:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2108 101 11 0 0 1 0 300 0 1 0 99 1 0 0 0 27 2 6 0 1 5 0 296 0 0 0 100 2 0 0 2 235 103 12 0 0 0 0 300 0 0 0 100 3 0 0 0 127 48 106 0 1 0 0 5 0 0 0 100 4 0 0 14 24 3 34 0 0 0 0 1314 0 0 0 100 5 0 0 0 24 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 40 9 20 1 1 0 0 270 0 0 0 100 7 0 0 5 326 108 104 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:56:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 101 12 0 1 1 0 300 0 0 0 100 1 0 0 0 9 1 4 0 1 0 0 294 0 0 0 100 2 0 0 2 220 103 12 0 0 0 0 300 0 0 0 100 3 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 4 0 0 14 10 3 34 1 0 1 0 1314 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 23 8 18 0 0 0 0 266 0 0 0 100 7 0 0 5 310 103 102 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2170 110 1316 24 133 22 0 7374 3 1 0 96 1 29 0 0 348 17 1389 29 115 14 0 6005 3 1 0 96 2 1 0 171 509 111 1314 23 89 12 0 6406 2 1 0 97 3 17 0 0 325 27 1116 19 79 24 0 6368 3 1 0 96 4 2 0 14 370 4 724 13 37 10 0 7735 2 1 0 97 5 10 0 0 400 6 780 10 39 9 0 5611 2 1 0 97 6 5 0 7 150 9 816 9 56 5 0 6747 2 1 0 97 7 1 0 3 400 105 721 8 45 17 0 5107 2 1 0 97 April 1, 2026 at 06:56:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 126 0 0 5 0 311 0 0 0 100 1 0 0 0 108 51 104 0 0 5 0 304 0 0 0 100 2 0 0 3 214 104 6 0 0 0 0 301 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 34 1 0 0 0 1314 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 13 3 10 0 0 0 0 264 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1356 0 113 2127 108 333 1 24 313 11 1276 1 1 0 98 1 101 0 0 206 28 350 0 27 220 17 482 0 0 0 100 2 48 0 4 390 130 296 0 23 265 6 443 0 0 0 99 3 1948 0 1 166 45 256 2 25 297 11 407 0 1 0 99 4 32 0 14 160 47 244 0 29 237 6 1408 0 1 0 99 5 12 0 0 123 2 215 0 18 232 7 121 0 0 0 100 6 9 0 7 108 4 177 1 18 235 4 312 0 0 0 100 7 6 0 2 316 103 197 0 25 201 3 56 0 0 0 100 April 1, 2026 at 06:56:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 106 118 0 0 4 0 307 0 0 0 100 1 0 0 0 17 1 14 0 1 3 0 307 0 0 0 100 2 0 0 4 316 155 112 0 0 0 0 304 0 0 0 100 3 0 0 0 12 1 10 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 34 1 0 0 0 1400 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 12 3 8 0 0 0 0 261 0 0 0 100 7 0 0 2 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 124 0 1 2 0 625 0 0 0 100 1 0 0 0 20 3 14 0 0 3 0 306 0 0 0 100 2 0 0 4 311 152 108 1 0 1 0 305 0 0 0 100 3 0 0 0 15 4 10 0 0 1 0 4 0 0 0 100 4 0 0 14 12 4 34 2 0 2 0 1397 0 0 0 100 5 0 0 0 10 2 4 0 0 1 0 0 0 0 0 100 6 0 0 7 11 3 4 0 0 1 0 260 0 0 0 100 7 0 0 2 211 103 4 0 0 1 0 1 0 0 0 100 April 1, 2026 at 06:56:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 131 0 0 0 0 312 0 0 0 100 1 0 0 0 21 1 22 0 0 4 0 324 0 0 0 100 2 0 0 4 309 152 106 0 0 0 0 303 0 0 0 100 3 0 0 0 24 8 18 0 1 1 0 10 0 0 0 100 4 0 0 14 15 3 46 1 1 1 0 1409 0 0 0 100 5 0 0 0 16 9 4 0 0 1 0 0 0 0 0 100 6 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 7 0 0 2 213 102 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 341 0 5 2133 110 465 1 24 12 0 2247 1 1 0 98 1 87 0 0 66 2 202 5 11 3 0 1249 1 0 0 98 2 10 0 59 315 126 280 4 23 1 0 1555 1 0 0 99 3 147 0 0 66 7 95 0 12 4 3 1213 1 0 0 99 4 139 0 14 116 29 274 6 19 4 0 2742 0 0 0 99 5 141 0 0 68 1 277 9 15 3 1 1594 0 0 0 99 6 164 0 7 73 2 248 4 17 0 2 2399 1 0 0 99 7 0 0 3 259 103 237 1 18 1 0 1202 0 0 0 100 April 1, 2026 at 06:56:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 239 0 13 175 0 295 0 1 0 99 1 0 0 0 115 7 197 0 12 168 0 303 0 0 0 100 2 0 0 3 274 104 133 0 10 134 0 300 0 0 0 100 3 0 0 0 107 39 143 1 11 111 0 24 0 0 0 100 4 4 0 14 203 91 247 1 11 142 0 1405 0 1 0 99 5 0 0 0 71 1 133 0 14 148 0 0 0 0 0 100 6 0 0 7 63 2 114 0 13 106 0 260 0 0 0 100 7 0 0 3 272 102 132 0 11 138 0 0 0 0 0 100 April 1, 2026 at 06:56:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2113 103 134 0 8 20 0 319 0 1 0 99 1 0 0 0 41 7 45 1 7 11 0 348 0 0 0 100 2 0 0 1 225 103 23 1 1 3 0 331 0 0 0 100 3 0 0 0 15 1 13 0 3 8 0 19 0 0 0 100 4 0 0 14 115 53 139 2 2 9 0 1403 0 0 0 100 5 0 0 0 32 5 34 0 5 12 0 12 0 0 0 100 6 0 0 7 20 3 22 0 3 7 1 411 0 0 0 100 7 0 0 14 219 102 17 1 1 5 0 0 0 1 0 99 April 1, 2026 at 06:56:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 115 0 1 3 0 302 0 0 0 100 1 0 0 7 19 2 14 0 1 4 0 294 0 0 0 100 2 0 0 3 213 104 6 0 0 0 0 300 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 110 53 134 1 0 1 0 1318 0 0 0 100 5 0 0 0 23 7 18 0 0 0 0 6 0 0 0 100 6 0 0 7 12 2 8 0 1 0 0 260 0 0 0 100 7 0 0 3 211 102 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:56:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2116 106 134 0 0 5 0 311 0 0 0 100 1 0 0 0 41 2 24 0 0 2 0 316 0 0 0 100 2 0 0 3 228 103 6 0 1 0 0 300 0 0 0 100 3 0 0 0 23 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 128 53 142 0 0 0 0 1340 0 0 0 99 5 0 0 0 43 13 18 0 0 0 0 7 0 0 0 100 6 0 0 7 26 2 6 1 0 0 0 260 0 0 0 100 7 0 0 3 228 102 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 114 1 0 5 0 303 0 0 0 100 1 0 0 0 17 1 10 0 0 1 0 294 0 0 0 100 2 0 0 3 213 104 6 0 0 0 0 301 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 4 0 0 14 50 23 72 1 0 0 0 1315 0 0 0 100 5 0 0 0 27 9 18 0 1 0 0 6 0 0 0 100 6 0 0 7 74 32 70 0 2 0 0 266 0 0 0 100 7 0 0 3 222 104 18 0 2 1 0 9 0 0 0 100 April 1, 2026 at 06:56:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 36 0 1 2172 107 1254 42 120 25 0 7456 3 1 0 95 1 33 0 0 576 14 992 18 80 15 0 6170 3 1 0 96 2 5 0 172 540 106 1213 15 82 14 0 6482 2 1 0 97 3 14 0 0 328 3 936 17 63 11 0 5985 3 1 0 96 4 32 0 14 158 6 977 21 58 20 0 7233 3 1 0 96 5 8 0 0 426 3 1079 15 49 12 0 5533 2 1 0 97 6 16 0 7 386 34 604 5 32 3 0 6142 2 1 0 98 7 23 0 2 375 110 950 16 55 13 0 6523 2 1 0 97 April 1, 2026 at 06:56:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 4 0 305 0 0 0 100 1 0 0 0 107 51 102 0 0 7 0 294 0 0 0 100 2 0 0 3 212 104 6 0 0 0 0 301 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 4 0 0 14 14 3 36 0 0 0 0 1314 0 0 0 100 5 0 0 0 16 5 12 0 0 0 0 5 0 0 0 100 6 0 0 7 12 3 8 0 0 0 0 261 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 140 0 2 4 0 301 0 0 0 100 1 0 0 0 115 54 108 0 0 4 0 296 0 0 0 100 2 0 0 7 215 105 8 0 0 1 0 305 0 0 0 100 3 0 0 0 11 2 4 0 0 1 0 10 0 0 0 100 4 0 0 14 14 4 36 1 0 1 0 1313 0 0 0 100 5 0 0 0 21 7 14 0 0 1 0 7 0 0 0 100 6 0 0 7 12 3 4 1 0 1 0 260 0 0 0 100 7 0 0 7 214 103 6 0 0 1 0 1 0 0 0 100 April 1, 2026 at 06:56:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 105 141 0 0 3 0 310 0 0 0 100 1 0 0 0 116 51 120 0 1 2 0 314 0 0 0 100 2 0 0 2 210 103 4 0 0 0 0 300 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 10 0 0 0 100 4 0 0 14 15 3 42 1 0 0 0 1326 0 0 0 100 5 0 0 0 24 13 12 0 0 1 0 5 0 0 0 100 6 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 7 0 0 4 212 102 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 2125 102 162 0 8 12 5 445 0 0 0 100 1 20 0 0 139 52 135 0 5 10 4 379 0 0 0 100 2 9 0 3 239 105 34 1 8 4 4 400 0 0 0 100 3 3263 0 115 40 1 64 3 5 12 12 1268 1 1 0 98 4 104 0 14 66 8 116 2 6 9 13 1473 0 0 0 99 5 77 0 3 58 8 61 0 6 5 8 453 0 0 0 100 6 8 0 7 37 2 30 0 5 4 3 323 0 0 0 100 7 9 0 3 241 102 34 0 4 3 1 63 0 0 0 100 April 1, 2026 at 06:56:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 102 256 0 24 306 0 300 0 1 0 99 1 0 0 0 204 52 298 0 17 199 0 294 0 0 0 100 2 0 0 3 295 104 241 0 14 250 0 301 0 0 0 100 3 0 0 0 136 51 194 0 21 194 0 20 0 0 0 100 4 0 0 14 146 58 198 1 18 289 0 1408 0 1 0 99 5 0 0 0 98 1 183 0 14 196 0 0 0 0 0 100 6 0 0 7 85 2 154 0 11 195 0 260 0 0 0 100 7 0 0 3 297 102 184 0 12 284 0 0 0 0 0 100 April 1, 2026 at 06:56:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 267 0 0 2120 104 112 2 10 4 2 1994 2 1 0 98 1 1 0 0 161 32 308 8 19 7 0 1728 0 0 0 99 2 286 0 45 251 103 116 5 9 4 0 1537 1 0 0 98 3 5 0 0 98 23 197 3 15 1 1 1285 0 0 0 100 4 1 0 14 57 8 182 5 15 4 0 2731 0 0 0 99 5 12 0 0 30 1 56 3 8 5 0 890 1 0 0 99 6 449 0 7 64 4 186 10 19 12 2 1775 0 0 0 99 7 139 0 3 242 102 90 2 11 2 1 1358 0 0 0 99 April 1, 2026 at 06:56:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 20 0 2 4 0 305 0 0 0 100 1 0 0 0 113 1 110 0 1 5 0 301 0 0 0 100 2 0 0 17 214 103 14 0 1 0 0 309 0 0 0 100 3 0 0 0 122 56 116 0 1 1 0 22 0 0 0 100 4 0 0 0 15 2 34 2 1 0 0 1138 0 0 0 100 5 17 0 14 12 3 8 0 1 0 0 277 0 0 0 100 6 0 0 7 13 2 8 0 0 0 0 270 0 0 0 100 7 0 0 3 213 102 4 0 0 0 0 9 0 0 0 100 April 1, 2026 at 06:56:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2120 106 65 0 4 9 0 316 0 1 0 99 1 0 0 0 134 14 138 0 2 9 0 334 0 0 0 100 2 0 0 3 229 104 29 1 8 6 0 319 0 0 0 100 3 0 0 0 125 50 128 0 9 11 0 46 0 0 0 100 4 0 0 0 25 3 62 3 6 12 1 1165 0 0 0 100 5 0 0 14 25 10 21 2 5 10 0 272 0 0 0 100 6 0 0 14 21 3 24 0 2 7 2 410 0 0 0 100 7 0 0 17 222 103 16 1 3 3 0 17 0 0 0 100 April 1, 2026 at 06:56:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 117 0 1 2 0 299 0 0 0 100 1 0 0 0 115 53 110 0 0 3 0 295 0 0 0 100 2 0 0 3 217 106 10 0 0 0 0 301 0 0 0 100 3 0 0 0 32 12 24 0 0 0 0 18 0 0 0 100 4 0 0 0 12 2 34 1 0 0 0 1050 0 0 0 100 5 0 0 14 8 1 6 0 1 0 0 266 0 0 0 100 6 0 0 7 16 3 12 0 1 0 0 261 0 0 0 100 7 0 0 10 213 102 6 0 1 0 0 3 0 0 0 100 April 1, 2026 at 06:56:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2114 103 245 0 10 187 0 303 0 1 0 99 1 0 0 0 191 53 238 0 14 140 0 296 0 0 0 100 2 0 0 3 304 105 158 0 11 120 0 301 0 0 0 100 3 0 0 0 130 43 150 0 10 140 0 12 0 0 0 100 4 0 0 0 104 35 126 0 7 134 0 1048 0 0 0 100 5 0 0 14 82 2 126 0 8 116 0 287 0 0 0 100 6 0 0 7 74 3 103 1 6 142 0 261 0 0 0 100 7 0 0 3 294 104 144 0 11 147 0 1 0 0 0 100 April 1, 2026 at 06:56:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 128 0 1 1 0 307 0 0 0 100 1 0 0 0 110 52 104 0 0 1 0 294 0 0 0 100 2 0 0 3 214 104 6 0 0 0 0 300 0 0 0 100 3 0 0 0 26 8 22 1 0 0 0 29 0 0 0 100 4 0 0 0 10 2 32 1 0 0 0 1048 0 0 0 100 5 0 0 14 8 1 6 0 0 0 0 269 0 0 0 100 6 0 0 7 15 3 10 0 1 1 0 261 0 0 0 100 7 0 0 3 211 102 4 0 1 2 0 0 0 0 0 100 April 1, 2026 at 06:56:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 0 2163 103 1348 30 105 17 0 6162 3 1 0 96 1 16 0 0 578 40 1209 15 90 10 0 7127 3 1 0 96 2 53 0 185 426 109 1203 22 77 9 0 6035 3 1 0 96 3 1 0 0 258 9 904 22 62 8 0 6602 3 1 0 96 4 10 0 0 457 7 935 11 56 15 0 5574 3 1 0 96 5 19 0 14 335 13 897 8 43 8 0 6101 2 1 0 97 6 24 0 7 394 4 729 7 28 17 1 7276 2 1 0 97 7 25 0 3 318 104 910 11 44 28 0 7057 2 1 0 97 April 1, 2026 at 06:56:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 133 0 1 5 0 317 0 0 0 100 1 0 0 0 21 2 20 0 0 2 0 317 0 0 0 100 2 0 0 3 220 108 14 0 0 0 0 305 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 14 2 42 1 0 0 0 1070 0 0 0 100 5 0 0 14 120 61 108 0 0 0 0 268 0 0 0 100 6 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 7 0 0 3 212 102 4 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:56:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 755 0 113 2112 103 150 0 13 10 11 476 0 1 0 99 1 68 0 0 57 4 85 0 9 12 14 432 0 0 0 100 2 85 0 5 268 112 72 0 8 6 7 494 0 0 0 100 3 43 0 0 37 0 44 0 8 5 5 114 0 0 0 100 4 11 0 0 38 2 72 1 8 6 5 1144 0 0 0 100 5 635 0 14 114 39 110 1 3 3 8 1172 1 0 0 99 6 1914 0 7 73 2 74 3 7 5 6 611 0 1 0 99 7 16 0 3 263 115 62 0 7 10 4 61 0 0 0 100 April 1, 2026 at 06:56:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 104 268 0 23 263 0 300 0 1 0 99 1 0 0 0 166 40 239 0 14 173 0 294 0 0 0 100 2 0 0 3 313 108 204 0 22 242 0 310 0 0 0 100 3 0 0 0 130 48 176 0 12 189 0 0 0 0 0 100 4 0 0 0 128 51 196 0 13 263 0 1154 0 1 0 99 5 0 0 14 85 1 167 0 10 207 0 266 0 0 0 100 6 0 0 7 101 2 173 0 13 227 0 260 0 0 0 100 7 0 0 3 313 113 200 0 17 209 0 0 0 0 0 100 April 1, 2026 at 06:56:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 118 0 0 1 0 301 0 0 0 100 1 0 0 0 111 53 106 0 0 2 0 296 0 0 0 100 2 0 0 3 229 111 22 1 0 0 0 632 0 0 0 100 3 0 0 0 7 0 4 0 0 0 0 5 0 0 0 100 4 0 0 0 14 3 40 1 0 0 0 1144 0 0 0 100 5 0 0 14 7 1 4 1 0 0 0 266 0 0 0 100 6 0 0 7 12 3 6 0 0 0 0 261 0 0 0 100 7 0 0 3 210 102 4 0 0 0 0 3 0 0 0 100 April 1, 2026 at 06:57:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 2 0 300 0 0 0 100 1 0 0 0 109 52 104 0 0 2 0 294 0 0 0 100 2 0 0 3 214 104 8 0 0 0 0 300 0 0 0 100 3 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 4 0 0 0 17 6 40 1 0 0 0 1137 0 0 0 100 5 0 0 14 9 2 8 0 1 0 0 277 0 0 0 100 6 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 167 0 0 2124 105 303 0 16 3 3 1876 1 1 0 99 1 514 0 0 174 39 322 4 17 16 1 1838 1 0 0 98 2 109 0 45 358 117 379 6 28 3 0 2033 1 0 0 99 3 39 0 0 76 7 202 1 22 2 0 1297 0 0 0 99 4 1 0 0 46 8 93 5 9 1 0 1820 1 0 0 98 5 124 0 14 73 8 179 3 21 1 1 2265 1 0 0 98 6 37 0 7 64 3 191 2 14 7 0 1735 1 0 0 99 7 45 0 3 265 103 299 1 17 0 0 1495 0 0 0 99 April 1, 2026 at 06:57:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 2108 102 124 0 1 2 0 323 0 0 0 100 1 0 0 0 16 2 14 0 1 4 0 302 0 0 0 100 2 0 0 17 214 105 8 0 0 0 0 301 0 0 0 100 3 0 0 0 123 57 118 0 0 0 0 17 0 0 0 100 4 0 0 0 13 2 34 0 0 0 0 1138 0 0 0 100 5 4 0 14 10 1 8 0 0 0 0 272 0 0 0 100 6 0 0 7 16 3 12 0 0 0 0 281 0 0 0 100 7 0 0 3 214 102 4 0 0 0 0 18 0 0 0 100 April 1, 2026 at 06:57:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2117 103 197 0 21 240 0 388 0 1 0 99 1 0 0 0 102 5 179 0 16 135 0 312 0 0 0 100 2 0 0 3 307 105 187 1 12 142 0 319 0 0 0 100 3 0 0 0 239 71 291 0 27 127 0 38 0 0 0 100 4 0 0 0 206 68 272 1 19 168 0 1149 0 1 0 99 5 0 0 14 88 1 164 1 12 167 0 304 0 0 0 99 6 0 0 14 87 5 145 0 12 150 0 267 0 0 0 100 7 0 0 13 283 103 148 0 12 222 0 76 0 1 0 99 April 1, 2026 at 06:57:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 13 0 2 1 0 302 0 0 0 100 1 0 0 0 13 3 6 0 0 2 0 294 0 0 0 100 2 0 0 3 213 104 6 0 0 0 0 300 0 0 0 100 3 0 0 0 83 1 74 0 0 0 0 0 0 0 0 100 4 0 0 0 113 47 135 1 3 1 0 1053 0 0 0 100 5 0 0 14 22 6 22 0 2 0 0 267 0 0 0 100 6 0 0 7 52 10 47 0 3 0 0 270 0 0 0 100 7 0 0 3 211 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2111 103 21 0 1 2 0 301 0 0 0 100 1 0 0 0 32 4 8 0 1 5 0 296 0 0 0 100 2 0 0 7 229 104 6 0 0 1 0 300 0 0 0 100 3 0 0 0 32 1 8 0 1 1 0 0 0 0 0 100 4 0 0 0 131 38 134 1 2 1 0 1047 0 0 0 100 5 0 0 14 36 7 14 0 1 1 0 271 0 0 0 100 6 0 0 7 132 21 106 1 1 1 0 269 0 0 0 100 7 0 0 7 228 103 4 0 0 1 0 1 0 0 0 100 April 1, 2026 at 06:57:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 104 86 0 1 2 0 306 0 0 0 99 1 0 0 0 15 2 14 0 0 4 0 314 0 0 0 100 2 0 0 3 213 104 6 0 0 0 0 300 0 0 0 100 3 0 0 0 14 0 8 0 0 0 0 0 0 0 0 100 4 0 0 0 61 2 86 0 0 0 0 1058 0 0 0 100 5 0 0 14 19 7 12 0 0 0 0 266 0 0 0 100 6 0 0 7 128 60 124 0 0 0 0 271 0 0 0 100 7 0 0 3 215 103 8 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:57:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2156 103 1251 30 122 20 0 7670 3 1 0 96 1 2 0 0 368 5 1153 16 85 11 0 6294 2 1 0 97 2 0 0 157 348 105 1088 23 91 6 0 6208 2 1 0 97 3 0 0 0 146 1 953 16 64 8 0 5818 2 1 0 97 4 3 0 0 178 3 916 15 63 9 0 7248 3 1 0 96 5 2 0 14 155 4 855 15 62 10 0 6666 2 1 0 97 6 0 0 7 337 52 914 17 40 8 0 5718 2 1 0 97 7 59 0 3 517 110 775 16 53 22 0 5361 2 1 0 97 April 1, 2026 at 06:57:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 106 300 0 19 242 0 314 0 1 0 99 1 0 0 0 207 51 318 0 22 193 0 294 0 0 0 100 2 0 0 3 286 104 164 0 11 226 0 300 0 0 0 100 3 0 0 0 124 45 210 0 21 279 0 1 0 0 0 100 4 0 0 0 117 47 207 1 19 228 0 1049 0 1 0 99 5 0 0 14 97 2 186 0 12 214 0 276 0 0 0 100 6 0 0 7 97 3 177 0 13 237 0 260 0 0 0 100 7 0 0 3 295 104 174 0 16 224 0 0 0 0 0 100 April 1, 2026 at 06:57:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2140 108 172 0 9 13 3 406 0 0 0 99 1 40 0 0 153 53 145 0 3 7 4 395 0 0 0 100 2 14 0 3 238 104 31 0 5 5 3 354 0 0 0 100 3 5 0 0 34 2 24 0 3 3 3 61 0 0 0 100 4 3263 0 117 44 2 102 4 2 7 17 2294 1 1 0 97 5 79 0 14 54 1 81 0 10 10 12 448 0 0 0 100 6 67 0 9 50 3 68 1 11 6 12 412 0 0 0 100 7 18 0 3 242 102 48 0 6 4 5 84 0 0 0 100 April 1, 2026 at 06:57:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 106 122 0 1 2 0 307 0 0 0 100 1 0 0 0 99 45 92 0 1 1 0 297 0 0 0 100 2 0 0 3 229 112 24 0 1 0 0 300 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 4 0 0 0 100 4 0 0 0 9 2 32 1 0 1 0 1133 0 0 0 100 5 0 0 14 13 1 14 0 0 0 0 276 0 0 0 100 6 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2132 113 151 0 0 6 0 643 0 0 0 99 1 0 0 0 20 4 22 0 0 1 0 322 0 0 0 100 2 0 0 3 312 153 108 1 0 0 0 303 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 12 2 40 0 0 0 0 1143 0 0 0 100 5 0 0 14 12 6 6 1 0 0 0 276 0 0 0 100 6 0 0 7 10 2 6 0 1 0 0 260 0 0 0 100 7 0 0 3 214 102 8 0 0 0 0 2 0 0 0 100 April 1, 2026 at 06:57:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 118 0 0 4 0 300 0 0 0 100 1 0 0 0 11 3 6 0 0 5 0 296 0 0 0 100 2 0 0 3 312 154 108 0 0 0 0 301 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 9 2 32 1 0 0 0 1131 0 0 0 100 5 0 0 14 17 2 20 0 0 0 0 285 0 0 0 100 6 0 0 7 13 3 10 0 0 0 0 263 0 0 0 100 7 0 0 3 223 108 18 0 0 0 0 11 0 0 0 100 April 1, 2026 at 06:57:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 179 0 0 2121 104 363 5 22 7 2 1941 1 1 0 98 1 3 0 0 38 4 75 1 7 3 0 942 2 0 0 98 2 36 0 45 358 110 442 8 35 7 1 2356 1 0 0 99 3 299 0 0 157 41 264 1 13 4 1 1531 1 0 0 99 4 331 0 4 124 8 353 4 29 2 0 3027 1 1 0 99 5 5 0 14 105 4 354 7 33 7 0 2072 0 0 0 99 6 32 0 7 131 4 323 5 20 1 0 1809 0 0 0 99 7 112 0 3 284 108 257 2 22 4 0 1601 0 0 0 99 April 1, 2026 at 06:57:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 124 1 1 7 0 320 0 0 0 100 1 0 0 0 14 3 8 0 0 2 0 297 0 0 0 100 2 0 0 17 213 104 8 0 0 3 0 314 0 0 0 100 3 16 0 0 8 0 2 0 1 0 0 14 0 0 0 100 4 0 0 0 116 53 140 1 2 1 0 1144 0 0 0 100 5 5 0 14 12 3 8 0 0 0 0 273 0 0 0 100 6 0 0 7 16 3 12 0 1 0 0 277 0 0 0 100 7 0 0 3 217 103 6 0 0 0 0 2 0 0 0 100 April 1, 2026 at 06:57:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2129 109 166 0 9 21 1 414 0 1 0 99 1 0 0 0 29 4 33 1 3 6 2 391 0 0 0 100 2 0 0 3 224 104 16 1 3 5 0 311 0 0 0 100 3 0 0 9 17 1 15 0 3 11 0 7 0 1 0 99 4 0 0 7 117 53 151 0 7 16 0 1138 0 0 0 100 5 0 0 14 25 2 26 2 2 7 0 291 0 0 0 100 6 0 0 21 17 3 17 0 4 15 0 261 0 0 0 100 7 0 0 3 218 103 12 0 3 9 0 15 0 0 0 100 April 1, 2026 at 06:57:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 128 0 0 3 0 302 0 0 0 100 1 1 0 0 19 3 18 0 0 0 0 307 0 0 0 100 2 0 0 3 228 111 22 0 0 0 0 310 0 0 0 100 3 0 0 0 9 1 2 1 1 0 0 3 0 0 0 100 4 1 0 0 121 54 146 1 0 1 0 1068 0 0 0 100 5 1 0 21 29 10 26 0 2 1 0 280 0 0 0 100 6 0 0 7 13 2 8 0 1 0 0 260 0 0 0 100 7 0 0 3 213 102 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2108 102 116 0 1 3 0 296 0 0 0 100 1 0 0 0 28 3 6 0 0 1 0 296 0 0 0 100 2 0 0 3 245 112 22 0 0 0 0 310 0 0 0 100 3 0 0 0 23 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 107 42 112 1 0 0 0 1051 0 0 0 100 5 0 0 14 49 12 29 0 2 0 0 268 0 0 0 100 6 0 0 7 31 3 12 1 2 0 0 260 0 0 0 100 7 0 0 3 225 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 102 265 0 14 217 0 300 0 1 0 99 1 0 0 0 104 3 200 0 20 131 0 295 0 0 0 100 2 0 0 3 294 111 164 0 21 202 0 306 0 0 0 100 3 0 0 0 112 42 146 0 13 144 0 0 0 0 0 100 4 0 0 0 121 44 208 1 9 116 0 1048 0 0 0 99 5 0 0 14 91 1 178 0 14 191 0 266 0 0 0 100 6 0 0 14 171 52 234 0 11 156 0 260 0 0 0 100 7 0 0 3 275 102 137 0 15 123 0 0 0 0 0 100 April 1, 2026 at 06:57:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 2157 104 1101 32 128 28 0 6906 3 1 0 96 1 0 0 0 247 3 984 33 89 21 0 7030 3 1 0 96 2 1 0 143 348 112 947 24 92 12 0 5330 3 1 0 96 3 19 0 0 449 0 812 15 56 19 0 5204 2 1 0 97 4 0 0 0 398 2 1074 13 62 15 0 6393 2 1 0 97 5 1 0 14 427 6 782 10 49 17 0 5520 2 1 0 97 6 1 0 7 381 50 1014 11 51 7 0 4870 2 1 0 97 7 3 0 3 479 102 718 9 44 6 0 5915 2 1 0 97 April 1, 2026 at 06:57:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 107 157 2 7 4 0 881 0 0 0 99 1 0 0 0 18 4 42 2 7 10 0 851 0 0 0 100 2 0 0 17 301 146 154 3 7 2 0 383 0 0 0 100 3 0 0 0 22 1 30 0 3 1 0 498 0 0 0 100 4 0 0 0 26 4 169 1 5 1 0 1861 0 0 0 99 5 1 0 14 30 2 48 0 3 0 0 604 0 0 0 100 6 0 0 7 23 7 95 0 1 0 0 440 0 0 0 100 7 0 0 3 213 102 56 1 3 4 0 228 0 0 0 100 April 1, 2026 at 06:57:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 115 0 0 7 0 301 0 0 0 100 1 0 0 0 20 5 16 0 0 1 0 313 0 0 0 100 2 0 0 3 311 153 108 0 0 0 0 3 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 25 3 54 1 0 0 0 1362 0 0 0 100 5 0 0 14 28 10 26 0 0 0 0 283 0 0 0 100 6 0 0 7 26 9 20 1 0 0 0 270 0 0 0 100 7 0 0 3 213 102 6 0 0 0 0 10 0 0 0 100 April 1, 2026 at 06:57:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 108 0 1 1 0 302 0 0 0 100 1 0 0 0 8 1 4 0 0 2 0 297 0 0 0 100 2 0 0 3 300 147 94 0 2 0 0 1 0 0 0 100 3 0 0 0 20 7 16 0 1 0 0 0 0 0 0 100 4 0 0 0 22 4 44 1 0 0 0 1348 0 0 0 100 5 0 0 14 11 1 12 0 0 0 0 265 0 0 0 100 6 0 0 7 27 10 24 0 0 0 0 272 0 0 0 100 7 0 0 3 210 102 4 0 0 0 0 10 0 0 0 100 April 1, 2026 at 06:57:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 274 0 18 316 1 298 0 1 0 99 1 0 0 0 97 2 182 0 14 209 0 296 0 0 0 100 2 0 0 3 280 105 146 0 16 247 0 1 0 0 0 100 3 0 0 0 136 48 187 2 10 233 0 24 0 0 0 100 4 0 0 0 132 42 198 2 14 257 0 1348 0 1 0 99 5 0 0 14 149 32 233 1 19 141 0 268 0 0 0 100 6 0 0 7 109 20 175 0 13 226 0 267 0 0 0 100 7 0 0 3 283 103 157 0 14 206 0 11 0 0 0 100 April 1, 2026 at 06:57:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 116 0 0 3 0 308 0 0 0 100 1 0 0 0 7 1 2 0 0 3 0 294 0 0 0 100 2 0 0 3 212 104 6 0 0 0 0 0 0 0 0 100 3 0 0 0 7 0 4 0 0 0 0 18 0 0 0 100 4 0 0 0 29 7 54 1 0 1 0 1355 0 0 0 100 5 0 0 14 12 1 12 0 0 0 0 266 0 0 0 100 6 0 0 7 115 54 112 0 0 0 0 582 0 0 0 100 7 0 0 3 212 102 8 0 0 0 0 15 0 0 0 100 April 1, 2026 at 06:57:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 763 0 120 2108 102 205 0 14 16 17 519 0 1 0 99 1 68 0 0 67 7 81 0 5 11 13 409 0 0 0 100 2 29 0 10 245 104 38 0 6 8 4 126 0 0 0 100 3 48 0 0 49 1 45 0 8 4 3 101 0 0 0 100 4 10 0 0 62 10 74 0 5 3 2 1437 0 0 0 100 5 635 0 14 52 5 52 1 4 4 7 1202 1 1 0 99 6 1945 0 7 152 50 147 3 8 10 9 627 0 1 0 99 7 14 0 7 244 103 45 0 6 6 9 98 0 0 0 100 April 1, 2026 at 06:57:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 87 0 1 1 0 303 0 0 0 100 1 0 0 0 43 15 42 0 1 0 0 308 0 0 0 100 2 0 0 3 213 104 8 0 0 0 0 3 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 4 0 0 0 43 13 66 2 0 0 0 1458 0 0 0 100 5 0 0 14 20 10 12 0 0 0 0 278 0 0 0 100 6 0 0 7 44 5 38 0 1 0 0 260 0 0 0 100 7 0 0 3 278 134 74 0 1 1 0 10 0 0 0 100 April 1, 2026 at 06:57:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 112 0 0 3 0 299 0 0 0 100 1 0 0 0 10 2 6 0 0 0 0 299 0 0 0 100 2 0 0 3 212 104 6 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 37 11 58 2 0 1 0 1444 0 0 0 100 5 0 0 14 12 1 10 1 0 0 0 266 0 0 0 100 6 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 7 0 0 3 309 151 106 0 1 0 0 10 0 0 0 100 April 1, 2026 at 06:57:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 122 0 0 4 0 305 0 0 0 100 1 0 0 0 11 1 10 0 0 3 0 297 0 0 0 100 2 0 0 3 212 104 6 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 25 5 48 1 0 2 0 1751 0 0 0 100 5 0 0 14 12 3 12 0 0 0 0 270 0 0 0 100 6 0 0 7 11 2 8 0 0 0 0 260 0 0 0 100 7 0 0 3 318 152 118 0 0 0 0 15 0 0 0 100 April 1, 2026 at 06:57:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 116 0 0 3 0 305 0 0 0 100 1 0 0 0 9 2 4 0 0 2 0 296 0 0 0 100 2 0 0 3 212 104 6 0 0 0 0 0 0 0 0 100 3 19 0 0 7 1 2 0 0 0 0 5 0 0 0 100 4 0 0 0 19 3 42 1 0 0 0 1431 0 0 0 100 5 0 0 14 6 1 4 0 0 0 0 266 0 0 0 100 6 0 0 7 14 4 10 1 1 0 0 266 0 0 0 100 7 0 0 3 308 151 104 0 0 0 0 10 0 0 0 100 April 1, 2026 at 06:57:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 107 120 0 0 4 0 308 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 295 0 0 0 100 2 0 0 3 212 104 6 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 18 3 42 0 0 0 0 1427 0 0 0 100 5 0 0 14 6 1 4 0 0 0 0 266 0 0 0 100 6 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 7 0 0 3 314 151 112 0 0 0 0 10 0 0 0 100 April 1, 2026 at 06:57:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 110 135 0 0 2 0 309 0 0 0 100 1 0 0 0 20 5 18 0 0 5 0 314 0 0 0 100 2 0 0 3 213 104 8 0 0 0 0 3 0 0 0 100 3 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 4 0 0 0 26 3 54 2 0 1 0 1439 0 0 0 100 5 0 0 14 16 7 12 1 0 0 0 278 0 0 0 100 6 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 7 0 0 3 316 151 112 0 0 0 0 10 0 0 0 100 April 1, 2026 at 06:57:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 112 0 0 2 0 624 0 0 0 100 1 0 0 0 8 1 4 0 0 4 0 297 0 0 0 100 2 0 0 3 214 105 8 0 0 0 0 1 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 36 10 60 1 0 1 0 1437 0 0 0 100 5 0 0 14 6 1 4 0 0 0 0 266 0 0 0 100 6 0 0 7 12 3 8 0 0 0 0 261 0 0 0 100 7 0 0 3 309 151 108 0 0 0 0 15 0 0 0 100 April 1, 2026 at 06:57:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 122 0 1 2 0 300 0 0 0 100 1 0 0 0 12 2 10 0 0 1 0 296 0 0 0 100 2 0 0 3 214 105 8 0 0 0 0 1 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 28 7 52 1 0 1 0 1431 0 0 0 100 5 0 0 14 11 3 10 0 0 1 0 288 0 0 0 100 6 0 0 7 13 3 10 1 0 0 0 260 0 0 0 100 7 0 0 3 315 153 112 0 1 0 0 11 0 0 0 100 April 1, 2026 at 06:57:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 110 0 0 4 0 300 0 0 0 100 1 0 0 0 8 1 4 0 1 2 0 294 0 0 0 100 2 0 0 3 212 104 6 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 30 9 54 0 0 0 0 1434 0 0 0 100 5 0 0 14 6 1 4 0 0 0 0 266 0 0 0 100 6 0 0 7 12 3 8 0 0 0 0 261 0 0 0 100 7 0 0 3 308 151 104 0 0 0 0 10 0 0 0 100 April 1, 2026 at 06:57:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 70 0 0 2125 103 292 2 21 2 0 1705 1 1 0 99 1 311 0 33 52 4 87 5 12 3 1 1679 2 0 0 98 2 481 0 45 269 105 269 3 24 3 5 1355 1 0 0 99 3 186 0 0 41 1 79 0 6 1 3 1265 1 0 0 99 4 0 0 0 122 11 269 10 17 1 0 2765 1 0 0 99 5 40 0 14 84 3 190 2 12 2 0 2201 1 0 0 99 6 0 0 7 61 4 244 5 16 1 0 1291 1 0 0 99 7 0 0 3 361 151 264 2 17 1 0 1227 1 0 0 99 April 1, 2026 at 06:57:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2108 102 124 0 2 3 0 334 0 0 0 100 1 0 0 0 121 51 122 0 0 4 0 328 0 0 0 100 2 0 0 17 214 104 10 0 0 2 0 22 0 0 0 100 3 0 0 0 30 9 24 0 0 0 0 21 0 0 0 100 4 0 0 0 29 5 55 1 2 1 0 1460 0 0 0 100 5 5 0 14 21 11 10 0 1 1 0 284 0 0 0 100 6 0 0 7 21 6 15 0 1 0 0 303 0 0 0 100 7 0 0 3 219 102 16 0 1 0 0 9 0 0 0 100 April 1, 2026 at 06:57:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 112 0 0 4 0 302 0 0 0 100 1 0 0 0 116 52 114 0 0 1 0 302 0 0 0 100 2 0 0 3 212 104 6 0 0 0 0 0 0 0 0 100 3 0 0 0 26 10 20 0 0 0 0 14 0 0 0 100 4 0 0 0 18 3 42 0 0 0 0 1438 0 0 0 100 5 0 0 14 11 3 10 0 0 0 0 270 0 0 0 100 6 0 0 7 10 2 6 1 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 237 0 13 167 0 298 0 1 0 99 1 0 0 0 190 52 272 0 15 202 0 295 0 0 0 100 2 0 0 3 274 104 135 0 11 146 0 0 0 0 0 100 3 0 0 0 118 46 161 0 13 196 0 10 0 0 0 100 4 0 0 0 128 41 210 1 14 162 0 1438 0 0 0 99 5 0 0 14 89 1 175 0 14 120 0 265 0 0 0 100 6 0 0 7 64 2 116 0 7 154 0 260 0 0 0 100 7 0 0 3 279 103 145 0 11 140 0 0 0 0 0 100 April 1, 2026 at 06:57:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 0 0 4 0 300 0 0 0 100 1 0 0 0 114 52 110 0 0 2 0 296 0 0 0 100 2 0 0 3 214 104 8 0 1 0 0 0 0 0 0 100 3 0 0 0 19 7 14 0 0 0 0 7 0 0 0 100 4 0 0 0 18 3 40 2 1 0 0 1439 0 0 0 100 5 0 0 14 6 1 4 1 0 0 0 266 0 0 0 100 6 0 0 7 12 3 8 0 1 0 0 261 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2125 108 154 0 8 17 1 415 0 1 0 99 1 0 0 14 126 52 130 0 6 14 0 307 0 0 0 100 2 1 0 3 224 103 18 0 2 2 0 20 0 0 0 100 3 0 0 0 24 3 24 2 3 11 0 31 0 0 0 100 4 0 0 0 23 4 43 1 3 3 0 1369 0 0 0 100 5 0 0 14 16 1 11 0 1 5 0 284 0 0 0 100 6 0 0 7 21 2 27 0 1 6 1 346 0 0 0 100 7 0 0 11 217 102 20 0 4 17 0 7 0 1 0 99 April 1, 2026 at 06:57:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 110 153 1 0 3 0 329 0 0 0 100 1 0 0 7 124 55 118 0 0 3 0 313 0 0 0 100 2 0 0 3 215 104 8 0 0 0 0 4 0 0 0 100 3 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 17 4 44 0 0 0 0 1360 0 0 0 100 5 0 0 14 13 7 4 0 0 1 0 286 0 0 0 100 6 0 0 7 11 2 6 1 0 0 0 260 0 0 0 100 7 0 0 3 213 102 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2130 113 145 0 0 2 0 316 0 0 0 99 1 0 0 0 134 51 114 0 0 0 0 297 0 0 0 100 2 0 0 3 232 106 10 0 0 0 0 6 0 0 0 100 3 0 0 0 22 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 29 4 36 1 0 0 0 1350 0 0 0 100 5 0 0 14 22 1 4 1 0 0 0 266 0 0 0 100 6 0 0 7 28 3 8 0 0 0 0 261 0 0 0 100 7 0 0 3 225 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2126 109 134 0 0 5 0 307 0 1 0 99 1 0 0 0 119 52 118 0 0 1 0 296 0 0 0 100 2 0 0 3 215 105 8 0 0 0 0 2 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 16 4 38 2 0 0 0 1348 0 0 0 100 5 0 0 14 8 1 6 0 0 0 0 266 0 0 0 100 6 0 0 7 14 3 10 0 0 0 0 261 0 0 0 100 7 0 0 3 215 104 8 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:57:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2161 107 1366 22 115 22 0 6369 3 1 0 96 1 2 0 0 523 4 1037 24 92 11 0 6203 3 1 0 96 2 1 0 157 571 106 1031 20 67 9 1 6195 3 1 0 96 3 2 0 0 237 1 822 14 54 24 0 6768 3 1 0 96 4 1 0 0 597 52 1068 13 53 12 0 6604 2 1 0 97 5 0 0 14 174 1 851 12 59 16 0 6245 3 1 0 96 6 17 0 7 358 3 962 9 48 26 0 6277 2 1 0 98 7 0 0 3 545 102 703 8 39 9 0 5146 2 0 0 98 April 1, 2026 at 06:57:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 128 0 1 1 0 305 0 0 0 100 1 0 0 0 14 3 6 0 1 1 0 296 0 0 0 100 2 0 0 7 219 105 16 0 1 1 0 2 0 0 0 100 3 0 0 0 10 1 2 0 0 1 0 10 0 0 0 100 4 0 0 0 116 55 136 1 0 1 0 1348 0 0 0 100 5 0 0 14 9 2 4 0 0 1 0 266 0 0 0 100 6 0 0 7 12 3 4 1 0 1 0 260 0 0 0 100 7 0 0 7 212 103 4 0 0 1 0 1 0 0 0 100 April 1, 2026 at 06:57:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 760 0 113 2130 112 228 0 10 14 16 517 0 1 0 99 1 107 0 0 48 1 53 0 6 13 8 389 0 0 0 100 2 16 0 3 247 105 47 0 5 5 4 99 0 0 0 100 3 2563 0 4 52 1 65 3 6 18 12 1251 1 1 0 98 4 38 0 0 152 55 192 0 8 3 8 1597 0 0 0 99 5 20 0 14 45 9 46 1 7 8 6 378 0 0 0 100 6 8 0 7 36 2 27 0 5 9 0 328 0 0 0 100 7 2 0 3 236 102 19 0 3 3 1 45 0 0 0 100 April 1, 2026 at 06:57:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 109 128 0 0 4 0 308 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 296 0 0 0 100 2 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 3 0 0 0 7 0 2 1 0 0 0 10 0 0 0 100 4 0 0 0 114 54 136 2 0 0 0 1432 0 0 0 100 5 0 0 14 6 1 4 0 0 0 0 266 0 0 0 100 6 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 7 0 0 3 210 102 4 0 0 0 0 3 0 0 0 100 April 1, 2026 at 06:57:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 291 0 20 269 0 624 0 1 0 99 1 0 0 0 105 1 209 0 18 177 0 299 0 0 0 100 2 0 0 3 274 103 154 0 10 245 0 0 0 0 0 100 3 0 0 0 104 42 147 0 10 182 0 10 0 0 0 100 4 0 0 0 220 97 335 1 12 274 0 1431 0 1 0 99 5 0 0 14 89 5 175 0 15 290 0 273 0 0 0 100 6 0 0 7 94 2 187 0 10 251 0 260 0 0 0 100 7 0 0 3 305 103 200 0 15 202 0 0 0 0 0 100 April 1, 2026 at 06:57:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 116 0 0 9 0 300 0 0 0 100 1 0 0 0 9 2 4 0 0 2 0 296 0 0 0 100 2 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 10 0 0 0 100 4 0 0 0 76 35 98 0 0 0 0 1433 0 0 0 100 5 0 0 14 52 23 52 0 2 0 0 271 0 0 0 100 6 0 0 7 12 3 6 1 0 0 0 261 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 105 241 3 19 6 0 1495 1 0 0 99 1 306 0 0 176 48 322 1 26 5 5 1750 0 0 0 99 2 418 0 59 318 104 402 2 25 9 0 1973 1 0 0 99 3 76 0 0 118 1 244 12 15 4 1 2119 1 0 0 99 4 158 0 0 44 5 119 13 15 7 4 2861 1 0 0 98 5 5 0 14 107 6 299 6 29 6 0 1418 1 0 0 99 6 68 0 7 74 6 228 4 19 7 0 1846 0 0 0 99 7 3 0 3 263 102 252 4 23 3 0 1420 1 0 0 99 April 1, 2026 at 06:57:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 105 140 0 0 4 0 314 0 0 0 100 1 1 0 0 114 52 114 0 0 2 0 316 0 0 0 100 2 0 0 3 212 103 4 0 0 1 0 0 0 0 0 100 3 0 0 0 7 1 2 0 1 0 0 0 0 0 0 100 4 0 0 0 22 5 50 2 2 0 0 1451 0 0 0 100 5 0 0 14 20 8 16 0 1 0 0 266 0 0 0 100 6 0 0 7 31 12 28 0 1 1 0 274 0 0 0 100 7 0 0 3 213 102 8 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:57:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2113 102 135 0 3 14 1 370 0 1 0 99 1 0 0 14 40 10 43 1 3 10 0 322 0 0 0 100 2 0 0 3 304 144 103 0 4 11 0 15 0 0 0 100 3 0 0 0 15 1 9 0 1 2 0 29 0 0 0 100 4 0 0 0 23 5 53 0 3 14 0 1367 0 0 0 100 5 0 0 14 39 10 40 0 2 6 0 279 0 0 0 100 6 0 0 7 29 6 28 0 2 9 0 298 0 0 0 100 7 0 0 10 219 102 18 0 6 9 0 86 0 0 0 100 April 1, 2026 at 06:57:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 103 249 0 11 200 0 298 0 1 0 99 1 0 0 0 85 2 163 0 10 172 0 296 0 0 0 100 2 0 0 3 376 153 236 0 14 135 0 2 0 0 0 100 3 0 0 0 96 34 131 0 9 145 0 0 0 0 0 100 4 0 0 0 109 37 182 1 11 132 0 1348 0 0 0 99 5 0 0 14 89 9 156 0 11 157 0 297 0 0 0 100 6 0 0 7 73 3 134 1 10 140 0 261 0 0 0 100 7 0 0 10 289 103 161 0 9 139 0 1 0 0 0 100 April 1, 2026 at 06:57:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2112 103 129 0 1 5 0 308 0 1 0 99 1 0 0 0 24 1 2 0 0 4 0 294 0 0 0 100 2 0 0 3 329 154 110 0 0 0 0 2 0 0 0 100 3 0 0 0 23 0 4 0 0 0 0 18 0 0 0 100 4 0 0 0 29 4 36 1 0 0 0 1348 0 0 0 100 5 0 0 14 46 10 30 1 0 0 0 277 0 0 0 100 6 0 0 7 28 3 8 0 0 0 0 261 0 0 0 100 7 0 0 3 227 102 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 103 126 0 1 2 0 300 0 0 0 99 1 0 0 0 13 3 6 0 0 5 0 297 0 0 0 100 2 0 0 3 311 153 106 0 0 1 0 3 0 0 0 100 3 0 0 0 9 1 2 0 0 1 0 3 0 0 0 100 4 0 0 0 17 5 36 2 0 1 0 1349 0 0 0 100 5 0 0 14 29 9 28 0 0 1 0 278 0 0 0 100 6 0 0 7 12 3 4 0 0 1 0 260 0 0 0 100 7 0 0 3 212 103 4 0 0 1 0 1 0 0 0 100 April 1, 2026 at 06:57:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2158 105 1207 26 110 16 0 7278 3 1 0 96 1 1 0 0 464 3 972 15 77 13 0 6139 3 1 0 96 2 0 0 157 496 117 971 10 66 8 0 6116 3 1 0 97 3 46 0 0 330 3 930 14 66 13 0 6803 2 1 0 97 4 0 0 0 184 29 765 10 53 5 0 8656 2 1 0 97 5 0 0 14 213 28 990 16 55 15 0 6794 3 1 0 96 6 0 0 7 537 2 1076 13 49 6 0 4694 2 1 0 98 7 20 0 3 700 103 946 5 31 15 0 3537 2 1 0 98 April 1, 2026 at 06:57:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 110 0 0 4 0 301 0 0 0 100 1 0 0 0 9 2 4 0 0 2 0 296 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 16 1 12 0 0 0 0 11 0 0 0 100 4 0 0 0 114 54 138 1 0 0 0 1351 0 0 0 100 5 0 0 14 29 9 28 0 0 0 0 276 0 0 0 100 6 0 0 7 10 2 6 1 0 0 0 260 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:57:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 53 0 7 2131 102 353 0 34 305 6 449 0 1 0 99 1 9 0 0 126 1 207 0 18 229 3 362 0 0 0 100 2 12 0 3 311 104 180 0 25 246 3 115 0 0 0 100 3 6 0 0 160 42 218 0 22 222 3 82 0 0 0 100 4 3276 0 113 154 53 306 4 28 225 18 2690 1 2 0 97 5 105 0 14 236 48 377 1 30 218 15 383 0 0 0 99 6 41 0 9 136 2 247 0 24 285 8 417 0 0 0 100 7 7 0 3 297 102 209 0 20 249 2 86 0 0 0 100 April 1, 2026 at 06:57:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 112 0 0 2 0 298 0 0 0 100 1 0 0 0 9 2 4 0 0 0 0 296 0 0 0 100 2 0 0 3 209 102 4 0 0 0 0 0 0 0 0 100 3 0 0 0 14 0 10 0 0 0 0 10 0 0 0 100 4 0 0 0 13 4 36 1 0 0 0 1431 0 0 0 100 5 0 0 14 120 58 118 0 0 0 0 273 0 0 0 100 6 0 0 7 12 3 8 0 1 0 0 261 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 122 0 0 3 0 307 0 0 0 100 1 0 0 0 7 1 2 0 0 4 0 294 0 0 0 100 2 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 3 0 0 0 16 0 14 0 0 0 0 15 0 0 0 100 4 0 0 0 13 4 36 1 0 1 0 1431 0 0 0 100 5 0 0 14 97 43 96 0 0 1 0 593 0 0 0 100 6 0 0 7 35 14 32 0 1 0 0 260 0 0 0 100 7 0 0 3 212 103 6 0 0 0 0 4 0 0 0 100 April 1, 2026 at 06:58:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 136 0 0 2 0 319 0 0 0 100 1 0 0 0 15 2 18 0 0 4 0 325 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 16 1 12 0 0 0 0 11 0 0 0 100 4 1 0 0 18 4 46 2 0 0 0 1446 0 0 0 100 5 0 0 14 22 9 12 0 0 0 0 266 0 0 0 100 6 0 0 7 111 52 108 1 1 0 0 260 0 0 0 100 7 0 0 3 212 102 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 469 0 0 2122 104 248 1 18 13 1 1880 1 1 0 99 1 57 0 0 46 2 153 3 13 0 0 1378 0 0 0 100 2 1 0 44 254 110 125 5 13 2 0 1010 2 0 0 98 3 0 0 0 56 1 136 5 16 1 0 1193 0 0 0 100 4 0 0 0 53 5 298 3 22 1 0 2672 0 0 0 99 5 219 0 14 27 2 30 6 8 1 1 2026 1 1 0 98 6 20 0 7 56 11 105 0 14 5 0 1190 1 0 0 99 7 252 0 4 341 143 409 3 20 4 2 1224 0 0 0 99 April 1, 2026 at 06:58:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 267 0 11 213 0 302 0 1 0 99 1 0 0 0 74 2 138 0 14 150 0 296 0 0 0 100 2 0 0 2 278 108 130 1 13 124 0 9 0 0 0 100 3 0 0 0 121 35 181 0 17 172 0 0 0 0 0 100 4 0 0 0 110 39 157 1 7 98 0 1437 0 0 0 99 5 0 0 14 70 2 136 0 9 130 0 266 0 0 0 100 6 0 0 7 74 3 150 0 17 135 0 261 0 0 0 100 7 0 0 4 383 152 252 0 11 149 0 1 0 0 0 100 April 1, 2026 at 06:58:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2122 107 128 1 5 8 0 336 0 0 0 99 1 1 0 0 28 2 30 1 7 10 0 318 0 0 0 100 2 0 0 4 301 142 110 0 10 19 0 39 0 0 0 100 3 0 0 7 28 2 30 0 6 8 0 92 0 0 0 100 4 0 0 0 30 5 57 1 1 5 0 1362 0 0 0 100 5 0 0 14 15 2 14 0 4 8 0 277 0 0 0 100 6 0 0 7 19 3 15 0 1 12 0 264 0 0 0 100 7 0 0 10 251 115 53 0 3 9 0 76 0 1 0 99 April 1, 2026 at 06:58:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 109 137 0 2 2 0 311 0 0 0 100 1 0 0 0 14 3 4 0 0 5 0 296 0 0 0 100 2 0 0 7 310 151 102 0 0 1 0 0 0 0 0 100 3 0 0 0 20 2 10 0 0 1 0 0 0 0 0 100 4 0 0 7 17 5 38 1 1 1 0 1347 0 0 0 100 5 0 0 14 14 3 8 0 1 1 0 266 0 0 0 100 6 0 0 7 13 3 4 1 0 1 0 260 0 0 0 100 7 0 0 7 214 103 6 0 0 1 0 4 0 0 0 100 April 1, 2026 at 06:58:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2129 111 152 0 0 0 0 321 0 1 0 99 1 23 0 0 31 2 12 0 0 1 0 316 0 0 0 100 2 0 0 5 323 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 29 3 6 0 0 0 0 6 0 0 0 100 4 0 0 0 35 4 46 1 1 0 0 1359 0 0 0 100 5 0 0 21 31 8 8 1 1 0 0 266 0 0 0 100 6 0 0 7 27 2 6 0 0 0 0 260 0 0 0 100 7 0 0 1 235 102 12 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2123 111 144 0 0 2 0 311 0 0 0 99 1 0 0 0 11 2 6 0 1 4 0 299 0 0 0 100 2 0 0 4 307 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 15 4 36 2 0 0 0 1345 0 0 0 100 5 0 0 14 12 2 8 0 0 0 0 266 0 0 0 100 6 0 0 7 11 2 6 0 0 0 0 260 0 0 0 100 7 0 0 2 216 102 10 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 25 0 0 2172 107 1302 37 121 23 0 7519 3 1 0 96 1 20 0 0 583 2 1136 24 88 19 0 6096 3 1 0 96 2 8 0 171 487 118 961 15 71 20 0 7510 2 1 0 97 3 1 0 0 375 37 909 17 64 13 0 7697 3 1 0 96 4 16 0 0 380 10 873 13 60 13 0 7458 3 1 0 96 5 54 0 14 502 2 938 20 58 15 0 5607 3 1 0 96 6 36 0 7 487 2 969 14 46 16 0 6049 2 1 0 97 7 1 0 3 711 103 1091 15 41 8 0 4347 2 1 0 97 April 1, 2026 at 06:58:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 116 0 0 2 0 303 0 0 0 100 1 0 0 0 11 3 6 0 0 1 0 296 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 7 0 0 0 100 4 0 0 0 113 54 136 1 0 1 0 1348 0 0 0 100 5 0 0 14 10 2 10 0 0 0 0 286 0 0 0 100 6 0 0 7 12 3 6 1 0 0 0 261 0 0 0 100 7 0 0 3 215 102 10 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 2 2124 101 168 0 10 17 6 445 0 0 0 100 1 34 0 0 38 2 31 0 5 10 3 392 0 0 0 100 2 9 0 3 231 102 23 0 5 6 5 53 0 0 0 100 3 633 0 0 46 7 41 1 6 4 5 889 1 0 0 99 4 5 0 0 146 57 168 2 6 3 3 1531 0 0 0 99 5 2640 0 128 35 2 72 2 2 3 15 710 0 1 0 99 6 73 0 7 49 2 69 0 8 8 12 413 0 0 0 100 7 97 0 3 260 103 80 0 10 5 12 123 0 0 0 100 April 1, 2026 at 06:58:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 137 0 0 3 0 310 0 0 0 100 1 0 0 0 15 3 16 0 0 5 0 317 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 18 6 14 0 0 0 0 6 0 0 0 100 4 0 0 0 116 53 142 2 0 0 0 1442 0 0 0 100 5 0 0 14 18 10 10 1 0 1 0 275 0 0 0 100 6 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 7 0 0 3 212 102 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 104 124 0 0 4 0 307 0 0 0 100 1 0 0 0 11 3 6 0 0 0 0 296 0 0 0 100 2 0 0 3 214 104 10 0 0 0 0 6 0 0 0 100 3 0 0 0 20 6 16 0 2 1 0 330 0 0 0 100 4 0 0 0 110 53 134 0 0 0 0 1431 0 0 0 100 5 0 0 14 14 4 14 0 0 0 0 282 0 0 0 100 6 0 0 7 14 3 172 0 0 0 0 593 0 0 0 100 7 0 0 3 219 103 16 0 0 0 0 5 0 0 0 100 April 1, 2026 at 06:58:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 105 317 1 20 305 0 306 0 1 0 99 1 0 0 0 91 3 190 0 19 289 0 299 0 0 0 100 2 0 0 3 303 103 206 0 25 222 0 1 0 0 0 100 3 0 0 0 121 39 179 0 26 243 0 0 0 0 0 100 4 0 0 0 234 95 314 1 19 259 0 1435 0 1 0 99 5 0 0 14 103 4 200 0 17 162 0 297 0 0 0 100 6 0 0 7 86 3 174 1 19 244 0 261 0 0 0 100 7 0 0 3 292 103 173 0 14 248 0 1 0 0 0 100 April 1, 2026 at 06:58:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 83 0 0 2163 139 320 6 22 7 0 2588 1 1 0 98 1 450 0 0 153 3 221 4 22 12 1 1333 1 0 0 99 2 249 0 85 273 103 256 4 25 0 0 1787 1 0 0 99 3 5 0 0 61 1 187 4 17 0 0 1601 0 0 0 99 4 0 0 0 107 19 201 4 11 3 0 2943 0 0 0 99 5 15 0 14 73 3 163 2 18 0 0 1661 1 0 0 99 6 138 0 7 59 2 151 1 9 3 0 1673 1 0 0 99 7 203 0 3 299 107 286 5 21 3 0 1428 1 0 0 99 April 1, 2026 at 06:58:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 160 140 1 2 6 0 311 0 0 0 100 1 0 0 0 114 4 106 0 0 2 0 296 0 0 0 100 2 0 0 3 208 102 2 0 0 1 0 0 0 0 0 100 3 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 4 0 0 0 15 4 36 2 0 1 0 1440 0 0 0 100 5 0 0 14 15 4 9 1 1 1 0 266 0 0 0 100 6 0 0 7 11 3 4 0 0 1 0 260 0 0 0 100 7 0 0 3 217 103 12 0 0 1 0 1 0 0 0 100 April 1, 2026 at 06:58:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2139 126 136 0 4 17 0 331 0 1 0 99 1 0 0 0 129 20 139 0 9 13 0 401 0 0 0 100 2 0 0 4 251 115 44 0 3 0 0 22 0 0 0 100 3 0 0 14 13 1 17 0 5 7 1 80 0 0 0 100 4 1 0 7 36 8 62 1 3 4 0 1384 0 0 0 99 5 0 0 14 29 9 20 0 5 10 0 281 0 0 0 100 6 0 0 7 23 3 24 0 4 7 0 284 0 0 0 100 7 0 0 2 228 103 23 0 1 7 0 4 0 0 0 100 April 1, 2026 at 06:58:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 112 0 0 3 0 302 0 0 0 100 1 0 0 0 113 53 106 0 0 3 0 296 0 0 0 100 2 0 0 3 210 102 4 0 0 0 0 3 0 0 0 100 3 0 0 0 8 0 3 0 1 0 0 0 0 0 0 100 4 0 0 0 28 10 52 0 0 0 0 1360 0 0 0 100 5 0 0 21 11 3 10 0 1 0 0 266 0 0 0 100 6 0 0 7 13 3 8 1 0 0 0 260 0 0 0 100 7 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 101 279 0 12 185 0 299 0 1 0 99 1 0 0 0 196 52 251 0 14 99 0 294 0 0 0 100 2 0 0 3 300 102 157 0 14 158 0 0 0 0 0 100 3 0 0 112 103 37 153 0 14 122 0 0 0 0 0 100 4 0 0 0 131 44 163 1 8 137 0 1357 0 0 0 99 5 0 0 14 101 5 153 0 12 97 0 271 0 0 0 100 6 0 0 7 78 2 115 0 7 119 0 260 0 0 0 100 7 0 0 3 282 102 118 0 9 150 0 0 0 0 0 100 April 1, 2026 at 06:58:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 118 0 0 5 0 302 0 0 0 100 1 0 0 0 112 53 106 0 0 1 0 296 0 0 0 100 2 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 3 0 0 7 7 0 2 0 0 0 0 0 0 0 0 100 4 0 0 0 28 10 50 2 1 0 0 1355 0 0 0 100 5 0 0 14 12 3 8 1 0 0 0 266 0 0 0 100 6 0 0 7 13 3 6 0 0 0 0 261 0 0 0 100 7 0 0 3 214 102 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:58:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 7 2174 117 1302 35 134 18 0 7359 3 1 0 96 1 3 0 0 305 32 1178 26 95 15 0 6524 3 1 0 97 2 0 0 171 509 102 1101 22 78 20 0 6511 3 1 0 96 3 19 0 0 186 1 992 24 72 17 0 6783 3 1 0 96 4 11 0 0 468 9 942 13 46 10 0 6726 2 1 0 97 5 5 0 0 441 6 797 13 40 14 1 6344 2 1 0 97 6 1 0 0 406 3 844 6 39 9 0 6013 2 1 0 97 7 6 0 17 494 109 886 10 49 17 0 4791 3 1 0 97 April 1, 2026 at 06:58:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 109 125 1 0 4 0 574 0 0 0 100 1 0 0 0 116 53 116 0 0 2 0 317 0 0 0 100 2 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 3 0 0 0 27 0 24 0 1 0 0 0 0 0 0 100 4 0 0 0 16 3 44 0 0 0 0 1361 0 0 0 100 5 0 0 0 23 11 14 0 1 1 0 0 0 0 0 100 6 0 0 0 8 0 4 0 0 0 0 10 0 0 0 100 7 0 0 17 213 103 8 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:58:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 146 0 0 2143 109 195 1 14 17 11 502 0 1 0 99 1 659 0 4 148 52 163 1 13 6 12 1257 1 0 0 99 2 20 0 3 252 103 51 0 10 4 5 161 0 0 0 100 3 32 0 0 52 0 51 0 6 2 6 107 0 0 0 100 4 5 0 7 36 3 56 1 4 4 2 1747 0 0 0 100 5 4 0 0 38 2 26 0 3 1 5 38 0 0 0 100 6 12 0 0 49 5 43 0 3 2 1 78 0 0 0 100 7 2633 0 130 231 104 54 2 5 7 10 670 0 1 0 99 April 1, 2026 at 06:58:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 107 321 0 20 312 0 310 0 1 0 99 1 0 0 0 164 29 261 0 25 277 0 296 0 0 0 100 2 0 0 3 351 126 242 0 28 209 0 1 0 0 0 100 3 0 0 0 121 47 194 0 19 241 0 0 0 0 0 100 4 0 0 7 142 54 197 2 21 301 0 1691 0 1 0 99 5 0 0 0 129 2 267 0 22 228 0 0 0 0 0 100 6 0 0 0 79 1 157 0 20 219 0 11 0 0 0 100 7 0 0 17 292 104 188 0 20 198 0 267 0 0 0 100 April 1, 2026 at 06:58:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 128 0 0 5 0 632 0 0 0 100 1 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 2 0 0 3 308 151 106 0 0 0 0 5 0 0 0 100 3 0 0 0 13 2 12 0 0 0 0 22 0 0 0 100 4 0 0 7 14 5 38 1 0 0 0 1691 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 10 0 6 0 1 0 0 10 0 0 0 100 7 0 0 17 216 104 14 1 1 0 0 267 0 0 0 100 April 1, 2026 at 06:58:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 134 0 2 3 0 302 0 0 0 100 1 0 0 0 15 4 6 0 0 1 0 296 0 0 0 100 2 0 0 7 307 151 102 0 0 1 0 0 0 0 0 100 3 0 0 0 23 8 14 0 0 1 0 11 0 0 0 100 4 0 0 7 18 6 38 2 0 1 0 1693 0 0 0 100 5 0 0 0 14 3 8 0 0 1 0 3 0 0 0 100 6 0 0 0 10 1 2 0 0 1 0 10 0 0 0 100 7 0 0 21 214 104 8 0 1 1 0 267 0 0 0 100 April 1, 2026 at 06:58:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2124 104 471 2 21 1 0 1654 1 1 0 99 1 4 0 0 68 4 223 3 23 8 0 1727 0 0 0 99 2 44 0 60 335 151 383 3 17 0 0 1242 0 0 0 99 3 215 0 0 28 2 36 3 6 4 2 1606 1 0 0 98 4 281 0 0 49 6 174 2 11 4 2 2485 2 1 0 98 5 387 0 7 62 9 193 1 20 3 5 1525 0 0 0 99 6 1 0 4 65 2 204 2 19 7 0 1505 1 0 0 99 7 101 0 16 248 103 77 2 14 5 1 1439 1 0 0 99 April 1, 2026 at 06:58:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 116 0 0 3 0 301 0 0 0 100 1 0 0 0 12 3 8 0 1 1 0 296 0 0 0 100 2 0 0 4 307 151 104 0 1 0 0 0 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 11 3 34 1 0 0 0 1438 0 0 0 100 5 0 0 7 13 4 10 0 0 0 0 260 0 0 0 100 6 0 0 0 28 10 22 0 0 0 0 12 0 0 0 100 7 0 0 16 210 103 6 0 0 0 0 269 0 0 0 100 April 1, 2026 at 06:58:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 101 275 0 18 164 2 432 0 1 0 99 1 0 0 9 101 2 198 0 20 167 0 309 0 1 0 99 2 0 0 18 384 151 293 0 20 170 0 19 0 0 0 99 3 0 0 0 114 42 170 1 18 124 0 18 0 0 0 100 4 0 0 0 137 50 195 1 17 145 0 1369 0 0 0 99 5 0 0 7 100 5 182 0 15 107 0 267 0 0 0 100 6 0 0 0 95 6 169 0 15 191 0 38 0 0 0 100 7 0 0 23 282 104 149 0 15 149 1 305 0 0 0 100 April 1, 2026 at 06:58:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 101 117 0 2 4 0 299 0 0 0 100 1 0 0 0 12 3 6 0 0 1 0 296 0 0 0 100 2 0 0 4 309 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 22 8 44 1 0 0 0 1354 0 0 0 100 5 0 0 7 14 4 10 1 0 0 0 260 0 0 0 100 6 0 0 0 12 1 4 0 1 0 0 1 0 0 0 100 7 0 0 16 212 103 6 1 0 0 0 266 0 0 0 100 April 1, 2026 at 06:58:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2108 102 123 0 0 2 0 306 0 0 0 99 1 0 0 0 27 2 8 0 2 1 0 294 0 0 0 100 2 0 0 3 322 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 25 1 2 0 0 0 0 0 0 0 0 100 4 0 0 0 47 12 54 1 1 0 0 1361 0 0 0 100 5 0 0 7 30 4 12 0 1 0 0 260 0 0 0 100 6 0 0 0 23 0 0 0 0 0 0 0 0 0 0 100 7 0 0 17 231 106 10 0 0 0 0 269 0 0 0 100 April 1, 2026 at 06:58:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 140 0 0 1 0 319 0 0 0 100 1 0 0 0 18 3 20 0 0 5 0 311 0 0 0 100 2 0 0 4 308 151 104 0 0 0 0 1 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 3 0 0 0 100 4 0 0 0 36 12 60 2 0 0 0 1370 0 0 0 100 5 0 0 7 29 13 18 0 1 0 0 259 0 0 0 100 6 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 7 0 0 16 218 105 12 0 0 0 0 269 0 0 0 100 April 1, 2026 at 06:58:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39 0 0 2159 102 1309 36 125 24 0 7186 3 1 0 95 1 42 0 0 535 3 939 18 78 21 0 6302 3 1 0 96 2 18 0 171 403 128 1203 24 104 23 0 5429 3 1 0 97 3 2 0 0 241 4 858 9 63 22 0 7174 2 1 0 97 4 4 0 0 402 13 965 17 62 19 1 6649 3 1 0 96 5 3 0 7 497 20 975 13 45 18 0 6056 2 1 0 97 6 18 0 0 359 2 802 12 37 7 0 5814 2 1 0 97 7 2 0 17 381 107 862 9 37 18 0 5870 2 1 0 97 April 1, 2026 at 06:58:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 101 346 0 34 383 0 300 0 1 0 99 1 0 0 0 113 3 221 0 25 277 0 296 0 0 0 100 2 0 0 3 279 103 199 0 18 273 0 1 0 0 0 100 3 0 0 0 134 48 195 0 20 240 0 0 0 0 0 100 4 0 0 0 161 52 249 1 23 223 0 1345 0 1 0 99 5 0 0 7 244 55 381 1 22 260 0 281 0 0 0 100 6 0 0 0 108 5 201 0 26 189 0 6 0 0 0 100 7 0 0 17 287 104 183 1 23 314 0 277 0 0 0 100 April 1, 2026 at 06:58:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2127 103 129 0 1 8 1 358 0 0 0 100 1 3271 0 113 35 2 62 3 3 11 11 1557 1 1 0 98 2 145 0 3 257 102 83 0 8 8 15 148 0 0 0 100 3 32 0 2 35 0 44 0 10 5 6 157 0 0 0 100 4 36 0 0 45 4 72 1 7 9 5 1550 0 0 0 100 5 8 0 7 144 54 139 0 5 2 2 336 0 0 0 100 6 4 0 0 50 5 50 0 6 4 2 97 0 0 0 100 7 5 0 17 236 104 24 0 5 0 2 317 0 0 0 100 April 1, 2026 at 06:58:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 118 0 1 6 0 300 0 0 0 100 1 0 0 0 16 5 8 0 0 2 0 297 0 0 0 100 2 0 0 7 209 102 2 0 0 1 0 0 0 0 0 100 3 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 4 0 0 0 17 5 36 2 0 1 0 1431 0 0 0 100 5 0 0 7 114 54 108 0 0 1 0 260 0 0 0 100 6 0 0 0 23 7 12 1 0 1 0 9 0 0 0 100 7 0 0 21 214 104 10 0 0 1 0 280 0 0 0 100 April 1, 2026 at 06:58:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 123 1 0 2 0 311 0 0 0 100 1 0 0 0 19 4 16 0 0 2 0 311 0 0 0 100 2 0 0 3 210 102 6 0 1 0 0 3 0 0 0 100 3 0 0 0 13 3 10 0 0 0 0 5 0 0 0 100 4 0 0 0 22 4 50 1 0 0 0 1445 0 0 0 100 5 0 0 7 125 61 118 0 1 1 0 271 0 0 0 100 6 0 0 0 21 6 14 0 1 0 0 328 0 0 0 100 7 0 0 17 212 103 8 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:58:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 116 0 0 6 0 300 0 0 0 100 1 0 0 0 11 3 6 0 0 3 0 296 0 0 0 100 2 0 0 3 211 102 4 0 0 0 0 0 0 0 0 100 3 0 0 0 14 4 10 0 1 0 0 5 0 0 0 100 4 0 0 0 12 4 36 0 0 0 0 1432 0 0 0 100 5 0 0 7 112 53 108 1 0 0 0 260 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 17 210 103 6 1 0 0 0 276 0 0 0 100 April 1, 2026 at 06:58:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 114 0 0 2117 103 328 3 26 7 0 2457 1 1 0 98 1 159 0 0 137 26 267 2 24 2 1 1694 1 0 0 99 2 162 0 44 239 102 67 1 9 1 2 1283 1 0 0 99 3 136 0 0 112 5 309 2 28 5 0 1698 1 0 0 99 4 368 0 14 81 4 274 4 28 2 2 3326 1 1 0 99 5 5 0 7 115 32 214 3 13 5 1 1313 1 0 0 99 6 0 0 0 69 1 204 4 19 0 0 1553 0 0 0 99 7 0 0 18 285 104 200 2 25 6 0 1548 1 0 0 99 April 1, 2026 at 06:58:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 2110 101 122 1 0 7 0 314 0 0 0 100 1 0 0 0 114 53 108 0 1 5 0 307 0 0 0 100 2 0 0 17 209 102 4 0 0 1 0 10 0 0 0 100 3 0 0 0 15 0 12 0 2 0 0 3 0 0 0 100 4 0 0 0 30 10 52 2 0 1 0 1450 0 0 0 100 5 0 0 7 17 4 14 0 0 0 0 269 0 0 0 100 6 0 0 0 11 1 4 0 1 0 0 1 0 0 0 100 7 4 0 17 213 103 8 0 0 0 0 270 0 0 0 100 April 1, 2026 at 06:58:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 104 136 0 7 13 1 325 0 1 0 99 1 0 0 0 120 52 113 0 4 8 0 306 0 0 0 100 2 0 0 13 221 102 18 1 3 11 0 15 0 0 0 100 3 0 0 0 14 0 15 0 2 15 0 0 0 1 0 99 4 0 0 7 53 13 96 2 6 7 2 1529 0 0 0 99 5 0 0 7 32 5 31 0 3 0 0 294 0 0 0 100 6 0 0 0 14 0 7 0 1 4 0 0 0 0 0 100 7 0 0 17 223 104 25 0 1 6 0 298 0 0 0 100 April 1, 2026 at 06:58:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 119 0 1 3 0 303 0 0 0 100 1 0 0 0 119 53 116 0 0 6 0 309 0 0 0 100 2 0 0 3 214 102 4 0 0 0 0 3 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 41 14 66 1 1 0 0 1369 0 0 0 100 5 0 0 7 30 11 20 1 0 0 0 277 0 0 0 100 6 0 0 7 10 1 6 0 1 0 0 0 0 0 0 100 7 1 0 17 215 104 10 1 1 0 0 293 0 0 0 100 April 1, 2026 at 06:58:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2114 104 123 0 0 5 0 303 0 1 0 99 1 0 0 0 126 52 104 0 0 5 0 294 0 0 0 100 2 0 0 3 226 103 4 0 0 0 0 1 0 0 0 100 3 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 46 10 56 0 0 0 0 1357 0 0 0 100 5 0 0 7 27 3 8 0 0 0 0 260 0 0 0 100 6 0 0 0 25 0 4 0 0 0 0 0 0 0 0 100 7 0 0 17 226 103 6 0 1 0 0 266 0 0 0 100 April 1, 2026 at 06:58:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 102 288 0 17 192 0 304 0 1 0 99 1 0 0 0 111 17 178 1 12 146 0 298 0 0 0 100 2 0 0 3 369 140 264 0 18 193 0 1 0 0 0 100 3 0 0 0 115 43 160 0 18 130 0 0 0 0 0 100 4 0 0 0 150 54 207 3 17 161 0 1358 0 1 0 99 5 0 0 7 108 3 210 0 11 161 0 260 0 0 0 100 6 0 0 0 90 1 175 0 20 146 0 1 0 0 0 100 7 0 0 17 283 104 157 0 17 147 0 267 0 0 0 100 April 1, 2026 at 06:58:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 3 2153 104 1191 29 123 16 0 6610 3 1 0 95 1 0 0 0 463 4 1162 22 102 27 0 7000 3 1 0 96 2 33 0 171 377 145 1073 15 82 22 0 7152 2 1 0 97 3 0 0 0 282 7 944 10 66 19 0 6406 2 1 0 97 4 26 0 0 192 12 1168 19 73 23 0 7275 3 1 0 96 5 2 0 7 438 4 816 6 52 9 0 6271 2 1 0 98 6 3 0 0 362 1 670 11 33 3 0 6109 2 1 0 97 7 21 0 17 645 105 845 14 47 13 0 4727 2 1 0 97 April 1, 2026 at 06:58:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 122 0 1 4 0 306 0 0 0 100 1 0 0 0 13 4 6 0 0 3 0 296 0 0 0 100 2 0 0 3 308 151 102 0 0 1 0 0 0 0 0 100 3 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 4 0 0 0 23 9 44 1 0 1 0 1352 0 0 0 100 5 0 0 7 15 4 10 1 1 1 0 260 0 0 0 100 6 0 0 0 13 1 10 0 1 1 0 0 0 0 0 100 7 0 0 17 212 104 8 0 0 1 0 277 0 0 0 100 April 1, 2026 at 06:58:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 116 0 0 1 0 302 0 0 0 100 1 0 0 0 18 4 14 0 0 1 0 310 0 0 0 100 2 0 0 3 310 153 106 0 0 0 0 2 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 4 0 0 0 32 11 58 1 0 1 0 1368 0 0 0 100 5 0 0 7 26 10 22 1 0 0 0 274 0 0 0 100 6 0 0 0 12 1 8 0 0 1 0 3 0 0 0 100 7 0 0 17 217 103 18 0 1 0 0 276 0 0 0 100 April 1, 2026 at 06:58:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 112 0 0 4 0 298 0 0 0 100 1 0 0 0 11 3 6 0 0 1 0 296 0 0 0 100 2 0 0 3 308 152 104 0 0 0 0 1 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 22 8 44 2 0 1 0 1353 0 0 0 100 5 0 0 7 11 3 8 0 0 0 0 260 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 17 210 103 6 0 0 0 0 276 0 0 0 100 April 1, 2026 at 06:58:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 2132 101 375 0 39 336 4 415 0 1 0 99 1 1355 0 115 130 2 261 1 31 196 10 1267 1 1 0 98 2 126 0 5 448 153 365 0 28 236 11 151 0 0 0 99 3 1934 0 0 176 43 267 2 28 269 11 444 0 1 0 99 4 53 0 2 190 53 283 2 26 250 9 1872 0 1 0 99 5 10 0 7 135 4 235 0 28 244 6 323 0 0 0 100 6 10 0 0 115 0 208 0 35 266 3 62 0 0 0 100 7 1 0 15 315 103 207 1 20 233 2 305 0 0 0 99 April 1, 2026 at 06:58:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 116 0 0 6 0 304 0 0 0 100 1 0 0 0 12 3 10 0 1 5 0 296 0 0 0 100 2 0 0 3 311 153 108 0 0 0 0 4 0 0 0 100 3 0 0 0 14 4 10 0 1 0 0 5 0 0 0 100 4 0 0 0 13 4 36 1 0 0 0 1431 0 0 0 100 5 0 0 7 11 3 8 1 0 0 0 260 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 7 0 0 17 210 103 6 0 0 0 0 276 0 0 0 100 April 1, 2026 at 06:58:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 221 0 0 2121 102 294 4 24 5 0 1717 1 1 0 98 1 187 0 13 79 5 195 3 23 4 1 2104 1 0 0 99 2 90 0 45 357 151 233 3 17 1 0 1459 1 0 0 99 3 20 0 0 61 5 141 3 24 3 0 1281 0 0 0 99 4 0 0 0 63 4 179 2 18 6 0 2386 1 0 0 99 5 274 0 21 45 3 104 2 14 0 2 1667 1 0 0 99 6 94 0 0 77 1 235 1 21 5 0 1519 1 0 0 99 7 0 0 17 258 103 253 4 21 4 0 1697 0 0 0 99 April 1, 2026 at 06:58:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 130 0 1 6 0 304 0 0 0 100 1 0 0 0 38 12 40 0 2 4 0 320 0 0 0 100 2 0 0 3 311 152 108 0 2 1 0 0 0 0 0 100 3 0 0 0 11 1 8 0 3 3 0 0 0 0 0 100 4 0 0 0 26 5 58 2 3 2 0 1448 0 0 0 100 5 0 0 7 28 10 25 0 3 3 0 277 0 0 0 100 6 0 0 0 15 2 16 0 2 4 0 3 0 0 0 100 7 4 0 17 217 104 16 0 3 0 0 268 0 0 0 100 April 1, 2026 at 06:58:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 106 156 1 2 15 0 406 0 1 0 99 1 0 0 8 38 11 36 0 4 13 0 318 0 1 0 99 2 0 0 10 322 152 125 0 5 10 0 36 0 0 0 100 3 0 0 0 15 0 14 1 5 11 0 14 0 0 0 100 4 0 0 0 23 4 47 1 2 2 0 1417 0 0 0 100 5 0 0 7 19 2 21 0 5 11 0 260 0 0 0 100 6 0 0 0 16 0 12 0 1 4 0 6 0 0 0 100 7 0 0 24 224 104 25 2 3 3 0 293 0 0 0 100 April 1, 2026 at 06:58:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2127 111 288 0 18 210 0 314 0 1 0 99 1 0 0 0 95 3 175 0 11 151 0 299 0 0 0 100 2 0 0 3 365 152 219 0 13 101 0 1 0 0 0 100 3 0 0 0 93 36 132 0 17 155 0 24 0 0 0 100 4 0 0 0 109 39 175 1 16 120 0 1348 0 0 0 99 5 4 0 7 80 7 137 1 17 130 0 290 0 0 0 100 6 0 0 0 82 2 152 0 16 132 0 1 0 0 0 100 7 0 0 17 271 105 121 0 13 82 0 300 0 0 0 100 April 1, 2026 at 06:58:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2122 109 139 0 0 4 0 316 0 0 0 99 1 0 0 7 27 2 6 0 1 0 0 294 0 0 0 100 2 0 0 4 329 154 108 0 0 0 0 3 0 0 0 100 3 0 0 0 24 0 4 0 0 0 0 18 0 0 0 100 4 0 0 0 30 4 36 0 0 0 0 1336 0 0 0 100 5 20 0 7 34 3 18 0 0 0 0 265 0 0 0 100 6 0 0 0 24 0 2 0 1 0 0 0 0 0 0 100 7 22 0 16 228 104 6 0 0 2 0 271 0 0 0 100 April 1, 2026 at 06:58:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 108 134 0 1 2 0 310 0 0 0 100 1 0 0 0 18 4 8 0 1 2 0 296 0 0 0 100 2 0 0 7 312 152 104 0 0 1 0 1 0 0 0 100 3 0 0 7 10 1 2 0 1 1 0 0 0 0 0 100 4 0 0 0 19 5 36 2 0 1 0 1334 0 0 0 100 5 0 0 7 16 3 8 0 0 1 0 260 0 0 0 100 6 0 0 0 14 1 8 0 1 1 0 0 0 0 0 100 7 0 0 21 214 104 6 0 0 1 0 267 0 0 0 100 April 1, 2026 at 06:58:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 2179 115 1364 23 119 27 0 7152 3 1 0 96 1 11 0 0 457 5 1226 27 104 20 0 6058 3 1 0 96 2 13 0 171 451 142 1203 19 95 20 0 7209 3 1 0 96 3 2 0 0 301 2 1030 12 61 14 0 5394 2 1 0 97 4 17 0 0 380 4 655 10 37 9 0 7190 2 1 0 97 5 11 0 7 144 20 963 9 55 13 0 6913 2 1 0 97 6 43 0 0 447 4 862 10 38 21 0 5308 2 1 0 97 7 12 0 17 399 104 932 21 40 18 0 6146 3 1 0 96 April 1, 2026 at 06:58:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 74 0 1 5 0 314 0 0 0 100 1 0 0 0 11 3 6 0 0 7 0 296 0 0 0 100 2 0 0 3 216 102 10 0 1 0 0 0 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 10 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 5 0 0 7 56 23 80 2 1 0 0 1299 0 0 0 100 6 0 0 0 53 2 46 0 1 0 0 0 0 0 0 100 7 0 0 17 268 130 70 0 2 0 0 266 0 0 0 100 April 1, 2026 at 06:58:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 733 0 113 2135 119 387 0 35 255 5 466 0 1 0 99 1 101 0 0 200 27 383 0 37 252 12 449 0 0 0 99 2 55 0 5 335 102 233 0 29 226 5 99 0 0 0 100 3 638 0 0 157 53 215 1 23 201 5 942 1 1 0 98 4 1919 0 0 183 52 240 2 27 268 10 683 0 1 0 99 5 42 0 7 133 3 273 1 22 224 4 1495 0 1 0 99 6 15 0 0 127 0 226 0 21 226 3 81 0 0 0 100 7 5 0 17 370 117 252 0 23 254 3 338 0 0 0 100 April 1, 2026 at 06:58:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 116 0 0 3 0 301 0 0 0 100 1 0 0 0 111 53 106 0 0 3 0 296 0 0 0 100 2 0 0 3 214 101 8 0 0 0 0 0 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 10 0 0 0 100 4 0 0 0 13 4 6 1 0 0 0 300 0 0 0 100 5 0 0 7 12 3 38 1 0 0 0 1383 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 7 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 107 122 0 0 1 0 627 0 0 0 100 1 0 0 0 110 52 106 0 1 1 0 294 0 0 0 100 2 0 0 3 216 101 12 0 0 0 0 5 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 10 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 300 0 0 0 100 5 0 0 7 13 4 40 0 0 0 0 1384 0 0 0 100 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 17 215 105 12 1 0 0 0 270 0 0 0 100 April 1, 2026 at 06:59:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 117 0 0 4 0 300 0 0 0 100 1 0 0 0 124 53 128 0 0 2 0 312 0 0 0 100 2 0 0 3 214 101 8 0 0 0 0 0 0 0 0 100 3 0 0 0 6 0 2 0 0 0 0 10 0 0 0 100 4 0 0 0 16 4 14 0 0 0 0 312 0 0 0 100 5 0 0 7 27 10 50 2 0 0 0 1400 0 0 0 99 6 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 7 0 0 17 225 109 20 0 0 0 0 277 0 0 0 100 April 1, 2026 at 06:59:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 118 0 7 2118 103 283 6 24 6 2 2257 1 1 0 98 1 117 0 0 178 39 371 4 27 5 1 2047 1 0 0 99 2 165 0 45 326 115 331 6 25 0 1 1713 0 0 0 99 3 25 0 0 87 1 255 4 20 1 0 1826 1 0 0 99 4 4 0 0 65 4 180 7 22 4 0 1853 1 0 0 99 5 76 0 7 74 3 271 8 23 10 0 3427 1 1 0 99 6 271 0 8 64 0 265 13 25 1 1 1995 1 0 0 99 7 127 0 17 275 107 255 5 24 4 2 2120 1 0 0 99 April 1, 2026 at 06:59:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 271 0 16 140 0 300 0 1 0 99 1 0 0 0 118 11 199 1 16 132 0 312 0 0 0 100 2 0 0 17 390 151 269 0 14 144 0 14 0 0 0 100 3 0 0 0 113 44 153 0 11 162 0 13 0 0 0 100 4 0 0 0 123 46 173 1 13 99 0 314 0 0 0 100 5 0 0 7 88 3 190 0 11 127 0 1404 0 1 0 99 6 0 0 0 79 2 145 0 17 126 0 2 0 0 0 100 7 5 0 17 277 106 132 0 8 151 0 277 0 0 0 100 April 1, 2026 at 06:59:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2112 102 127 0 5 7 0 324 0 0 0 99 1 1 0 7 38 11 41 1 5 13 0 337 0 0 0 100 2 0 0 3 328 151 128 0 3 10 0 16 0 0 0 100 3 0 0 0 18 0 18 1 2 6 0 9 0 0 0 100 4 0 0 9 27 5 21 3 3 9 0 306 0 1 0 99 5 0 0 7 27 5 57 1 5 11 0 1330 0 0 0 99 6 0 0 7 16 0 13 0 4 12 0 11 0 0 0 100 7 0 0 17 221 103 22 1 3 6 0 421 0 0 0 100 April 1, 2026 at 06:59:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 123 0 1 2 0 303 0 0 0 100 1 0 0 7 17 4 8 0 0 7 0 296 0 0 0 100 2 0 0 3 313 150 108 0 0 1 0 0 0 0 0 100 3 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 4 0 0 0 15 5 6 0 0 1 0 300 0 0 0 100 5 0 0 7 27 10 50 2 0 1 0 1308 0 0 0 99 6 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 7 0 0 17 212 104 6 0 0 1 0 267 0 0 0 100 April 1, 2026 at 06:59:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2111 103 123 0 0 2 0 301 0 1 0 99 1 0 0 0 39 4 18 1 0 1 0 311 0 0 0 100 2 0 0 3 329 150 110 0 1 0 0 0 0 0 0 100 3 0 0 0 27 0 8 0 0 0 0 0 0 0 0 100 4 0 0 0 32 4 14 0 0 0 0 312 0 0 0 100 5 0 0 7 51 16 58 1 0 1 0 1321 0 0 0 100 6 0 0 0 30 3 10 0 1 0 0 4 0 0 0 100 7 0 0 17 228 103 8 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 102 114 0 0 5 0 301 0 0 0 99 1 0 0 0 12 3 6 0 0 5 0 296 0 0 0 100 2 0 0 3 313 150 108 0 0 0 0 0 0 0 0 100 3 0 0 0 10 1 2 0 1 1 0 0 0 0 0 100 4 0 0 0 15 4 6 1 0 0 0 300 0 0 0 100 5 0 0 7 24 6 56 1 1 0 0 1307 0 0 0 100 6 0 0 0 25 8 18 0 0 0 0 10 0 0 0 100 7 0 0 17 210 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 0 2161 105 1532 32 147 116 0 7204 3 2 0 96 1 3 0 0 207 3 1219 32 113 67 0 6768 3 1 0 96 2 23 0 157 657 145 1051 14 79 69 0 6932 2 1 0 97 3 50 0 0 364 23 1120 17 84 74 0 6287 3 1 0 96 4 2 0 0 502 30 1084 11 68 66 0 5783 2 1 0 97 5 2 0 7 450 10 813 8 45 60 0 6211 2 1 0 97 6 12 0 0 494 12 1035 10 53 63 0 5220 3 1 0 97 7 0 0 17 573 107 869 11 54 107 0 6753 2 1 0 97 April 1, 2026 at 06:59:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 152 114 0 2 4 0 310 0 0 0 100 1 0 0 0 16 3 10 0 1 4 0 296 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 300 0 0 0 100 5 0 0 7 12 3 8 1 0 0 0 260 0 0 0 100 6 0 0 0 16 2 48 0 2 0 0 1049 0 0 0 100 7 0 0 17 316 107 112 0 0 0 0 271 0 0 0 100 April 1, 2026 at 06:59:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 636 0 0 2167 145 147 1 10 9 7 1237 1 1 0 98 1 10 0 0 55 8 42 0 6 6 0 359 0 0 0 100 2 2639 0 116 231 102 62 2 2 5 12 431 0 1 0 99 3 78 0 0 43 0 51 0 13 8 7 139 0 0 0 100 4 36 0 1 44 4 46 0 6 6 8 422 0 0 0 100 5 59 0 7 47 2 61 0 5 7 12 378 0 0 0 100 6 46 0 0 46 1 81 1 4 1 4 1212 0 0 0 100 7 6 0 17 340 109 132 1 5 4 5 327 0 0 0 100 April 1, 2026 at 06:59:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 116 0 0 2 0 300 0 0 0 100 1 0 0 0 26 3 28 0 1 3 0 312 0 0 0 100 2 0 0 3 304 150 100 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 17 4 14 1 0 0 0 312 0 0 0 100 5 0 0 7 24 9 20 0 1 0 0 277 0 0 0 100 6 0 0 0 13 2 38 1 0 1 0 1131 0 0 0 100 7 0 0 17 221 107 14 0 0 0 0 271 0 0 0 100 April 1, 2026 at 06:59:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 116 0 0 8 0 305 0 0 0 100 1 0 0 0 21 4 16 0 0 2 0 310 0 0 0 100 2 0 0 3 307 151 104 0 0 0 0 4 0 0 0 100 3 0 0 0 13 3 10 0 0 0 0 5 0 0 0 100 4 0 0 0 15 5 10 0 0 0 0 306 0 0 0 100 5 0 0 7 11 3 8 0 0 0 0 263 0 0 0 100 6 0 0 0 14 2 42 0 0 0 0 1143 0 0 0 100 7 0 0 17 235 112 30 1 0 0 0 599 0 0 0 100 April 1, 2026 at 06:59:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 364 0 25 287 0 299 0 1 0 99 1 0 0 0 130 3 245 0 17 245 0 296 0 0 0 100 2 0 0 3 372 151 306 0 16 200 0 1 0 0 0 100 3 0 0 0 144 55 219 1 21 247 1 10 0 0 0 100 4 0 0 0 153 52 197 0 19 206 0 300 0 0 0 100 5 0 0 7 103 3 199 1 14 228 1 284 0 0 0 100 6 0 0 0 104 3 228 1 15 247 1 1133 0 1 0 99 7 0 0 17 297 104 186 0 19 244 0 267 0 0 0 100 April 1, 2026 at 06:59:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 362 0 0 2121 103 473 3 33 5 2 2564 1 1 0 98 1 369 0 0 113 3 322 7 19 4 2 2188 1 0 0 98 2 93 0 45 348 144 287 5 25 7 2 1484 1 0 0 99 3 0 0 0 72 7 295 2 20 6 0 1887 1 0 0 99 4 0 0 0 88 8 233 2 19 3 0 2034 1 0 0 99 5 0 0 7 57 2 229 7 14 1 0 1873 1 0 0 99 6 0 0 0 99 1 318 3 28 4 0 2856 1 0 0 99 7 183 0 17 248 103 134 2 10 0 3 1665 1 0 0 99 April 1, 2026 at 06:59:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 126 0 1 4 0 308 0 0 0 100 1 0 0 0 33 7 26 0 1 8 0 303 0 0 0 100 2 16 0 21 210 102 2 0 1 1 0 10 0 0 0 100 3 0 0 0 12 1 4 0 0 1 0 2 0 0 0 100 4 0 0 0 57 24 44 1 1 1 0 310 0 0 0 100 5 0 0 7 17 4 10 0 0 1 0 272 0 0 0 100 6 0 0 0 79 33 100 1 1 1 0 1132 0 0 0 100 7 4 0 21 216 104 10 0 0 1 0 270 0 0 0 100 April 1, 2026 at 06:59:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2124 109 160 2 2 11 0 111 0 1 0 99 1 0 0 9 45 6 52 2 8 11 0 411 0 0 0 100 2 0 0 3 221 102 23 0 5 6 0 325 0 0 0 100 3 0 0 0 23 3 23 0 1 9 0 14 0 0 0 100 4 0 0 9 25 4 26 0 2 9 0 312 0 1 0 99 5 0 0 7 34 10 33 0 6 10 0 298 0 0 0 100 6 0 0 0 122 51 151 0 4 8 0 1174 0 0 0 100 7 0 0 17 218 103 15 1 5 16 0 266 0 0 0 100 April 1, 2026 at 06:59:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 109 0 1 0 0 0 0 0 0 100 1 0 0 0 23 3 16 0 0 0 0 296 0 0 0 100 2 0 0 10 211 103 6 0 1 1 0 307 0 0 0 100 3 0 0 0 23 8 16 0 0 0 0 11 0 0 0 100 4 0 0 0 14 4 8 0 0 0 0 303 0 0 0 100 5 0 0 7 10 2 6 1 0 0 0 260 0 0 0 100 6 0 0 0 113 52 136 1 0 1 0 1042 0 0 0 100 7 0 0 17 210 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2109 101 290 0 19 181 0 0 0 1 0 99 1 0 0 0 121 4 191 0 18 172 0 299 0 0 0 100 2 0 0 3 304 102 171 0 15 130 0 300 0 0 0 100 3 0 0 0 144 46 193 0 12 130 0 11 0 0 0 100 4 0 0 0 138 45 146 0 19 168 0 301 0 0 0 100 5 0 0 7 85 2 125 0 10 137 0 263 0 0 0 100 6 0 0 0 190 46 276 1 14 133 0 1040 0 1 0 99 7 0 0 17 318 108 193 0 22 185 0 266 0 0 0 100 April 1, 2026 at 06:59:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2108 102 110 0 2 0 0 0 0 0 0 100 1 0 0 0 119 52 114 0 1 3 0 297 0 0 0 100 2 0 0 3 209 102 2 0 0 5 0 301 0 0 0 100 3 0 0 0 20 6 14 0 0 0 0 9 0 0 0 100 4 0 0 0 16 4 10 1 1 0 0 300 0 0 0 100 5 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 6 0 0 0 12 2 36 0 1 0 0 1039 0 0 0 100 7 0 0 17 212 104 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2130 102 773 10 71 13 0 3701 2 1 0 97 1 0 0 0 435 52 739 11 52 11 0 3269 1 1 0 98 2 0 0 87 490 105 555 9 49 12 0 3260 1 1 0 98 3 0 0 0 271 10 503 8 32 4 0 3349 1 0 0 98 4 0 0 0 256 5 471 9 37 14 0 3304 2 0 0 98 5 1 0 7 285 3 563 6 35 12 0 3207 1 1 0 98 6 0 0 0 222 1 512 5 31 7 0 4604 2 1 0 98 7 34 0 17 382 103 297 2 15 7 0 3597 1 0 0 98 April 1, 2026 at 06:59:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2135 107 639 17 69 5 0 3207 1 1 0 98 1 2 0 0 369 40 573 13 39 6 0 2040 1 0 0 98 2 0 0 73 261 106 481 12 51 14 0 3355 1 0 0 98 3 0 0 0 36 6 538 12 41 8 0 2916 1 0 0 98 4 0 0 0 214 8 412 5 21 2 0 3228 1 0 0 99 5 0 0 7 203 13 345 4 20 4 0 3439 1 0 0 99 6 0 0 0 30 3 444 7 29 15 0 3614 1 1 0 98 7 1 0 17 297 104 334 6 22 7 0 3431 2 0 0 98 April 1, 2026 at 06:59:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 114 0 0 0 0 4 0 0 0 100 1 0 0 0 117 52 112 0 0 5 0 294 0 0 0 100 2 0 0 3 210 103 4 0 0 7 0 303 0 0 0 100 3 0 0 0 18 6 14 0 0 0 0 10 0 0 0 100 4 0 0 0 18 4 14 0 0 0 0 300 0 0 0 100 5 0 0 7 9 2 6 0 0 0 0 260 0 0 0 100 6 0 0 0 15 3 40 1 0 0 0 1050 0 0 0 100 7 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 328 0 23 300 0 0 0 1 0 99 1 0 0 0 204 53 292 0 19 233 0 296 0 0 0 100 2 0 0 3 297 103 199 0 19 257 0 299 0 0 0 100 3 0 0 0 152 47 227 0 19 245 0 10 0 0 0 100 4 0 0 0 107 46 178 1 18 220 0 303 0 0 0 100 5 0 0 7 84 2 167 0 19 266 0 260 0 0 0 100 6 0 0 0 100 4 232 0 18 263 0 1052 0 1 0 99 7 0 0 17 292 104 181 0 17 263 0 267 0 0 0 100 April 1, 2026 at 06:59:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 0 2126 102 163 0 7 7 9 172 0 0 0 100 1 641 0 0 148 52 148 1 7 7 4 1216 1 0 0 99 2 18 0 3 238 103 41 0 9 11 2 386 0 0 0 100 3 724 0 116 32 4 59 0 5 5 9 159 0 0 0 99 4 131 0 0 58 4 77 0 8 3 13 432 0 0 0 100 5 38 0 11 39 2 37 0 5 2 6 357 0 0 0 100 6 14 0 0 45 3 67 1 3 5 2 1123 0 0 0 100 7 1916 0 17 243 103 40 3 4 1 5 620 0 1 0 99 April 1, 2026 at 06:59:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 118 0 1 0 0 3 0 0 0 100 1 0 0 0 123 55 118 0 0 6 0 297 0 0 0 100 2 0 0 3 208 102 2 0 0 4 0 311 0 0 0 100 3 0 0 0 16 5 8 0 0 1 0 324 0 0 0 100 4 0 0 0 20 5 14 0 0 1 0 300 0 0 0 100 5 0 0 7 11 3 6 1 0 1 0 260 0 0 0 100 6 0 0 0 21 5 46 1 0 1 0 1144 0 0 0 100 7 0 0 17 219 106 14 0 0 1 0 272 0 0 0 100 April 1, 2026 at 06:59:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 662 0 0 2114 101 344 4 15 8 2 1651 0 1 0 99 1 3 0 0 177 54 283 1 15 9 0 1591 0 0 0 99 2 88 0 45 284 103 285 6 16 5 0 2275 1 0 0 98 3 1 0 0 50 1 234 1 16 3 0 1534 1 0 0 99 4 0 0 0 44 4 75 3 11 3 0 1325 0 0 0 99 5 258 0 7 63 10 110 4 15 10 0 1517 1 0 0 98 6 193 0 0 58 1 132 5 10 5 3 2414 1 0 0 98 7 0 0 17 311 110 240 5 14 2 0 1653 1 0 0 99 April 1, 2026 at 06:59:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 112 1 0 0 0 13 0 0 0 100 1 0 0 0 122 53 116 0 1 6 0 297 0 0 0 100 2 0 0 17 208 102 2 0 0 2 0 304 0 0 0 100 3 12 0 0 10 1 2 0 0 0 0 10 0 0 0 100 4 0 0 0 23 4 16 2 0 0 0 310 0 0 0 100 5 0 0 7 21 6 16 0 0 0 0 270 0 0 0 100 6 0 0 0 16 2 40 0 0 0 0 1134 0 0 0 100 7 5 0 17 228 110 20 0 0 0 0 282 0 0 0 100 April 1, 2026 at 06:59:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 271 0 13 166 0 0 0 1 0 99 1 0 0 0 183 52 255 0 15 178 0 294 0 0 0 100 2 0 0 3 275 102 139 0 11 131 0 300 0 0 0 100 3 0 0 0 103 36 153 0 14 158 0 0 0 0 0 100 4 0 0 0 107 40 146 0 12 166 0 304 0 0 0 100 5 0 0 7 67 2 131 0 13 132 0 260 0 0 0 100 6 0 0 0 74 1 163 1 18 122 0 1128 0 0 0 100 7 0 0 17 294 111 157 1 13 156 0 275 0 0 0 100 April 1, 2026 at 06:59:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2112 102 122 0 3 6 0 19 0 1 0 99 1 0 0 0 128 53 126 0 3 16 0 371 0 0 0 100 2 1 0 3 218 102 13 0 2 8 0 329 0 0 0 100 3 0 0 8 14 0 15 0 5 10 0 76 0 1 0 99 4 0 0 0 22 5 22 0 4 8 0 304 0 0 0 100 5 0 0 7 29 8 26 1 3 5 0 269 0 0 0 100 6 2 0 0 32 4 60 2 1 6 0 1076 0 0 0 99 7 0 0 17 226 106 34 1 8 16 0 295 0 0 0 100 April 1, 2026 at 06:59:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 115 0 1 0 0 0 0 0 0 100 1 0 0 7 118 52 114 0 1 2 0 294 0 0 0 100 2 0 0 3 211 103 4 0 0 1 0 300 0 0 0 100 3 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 19 4 14 0 0 0 0 300 0 0 0 100 5 0 0 7 22 8 18 0 0 0 0 269 0 0 0 100 6 0 0 0 12 1 34 1 0 0 0 1038 0 0 0 100 7 0 0 17 212 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2105 101 116 0 0 0 0 0 0 0 0 100 1 0 0 0 143 53 126 0 0 4 0 316 0 0 0 100 2 0 0 3 225 102 4 0 1 4 0 300 0 0 0 100 3 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 39 4 20 2 0 0 0 312 0 0 0 100 5 0 0 7 54 17 30 0 0 0 0 276 0 0 0 100 6 0 0 0 30 3 38 1 0 0 0 1041 0 0 0 100 7 0 0 17 228 103 6 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 102 114 0 0 0 0 4 0 0 0 100 1 0 0 0 118 52 112 0 0 2 0 294 0 0 0 100 2 0 0 3 211 103 4 0 0 4 0 301 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 0 13 4 6 0 0 0 0 300 0 0 0 100 5 0 0 7 25 9 22 0 0 0 0 270 0 0 0 100 6 0 0 0 12 2 36 0 0 0 0 1039 0 0 0 100 7 0 0 17 210 103 4 1 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 0 2168 105 1501 43 153 238 0 6548 3 2 0 95 1 15 0 0 609 29 1322 25 115 249 0 6588 2 1 0 96 2 2 0 171 572 107 1205 31 109 247 0 6531 3 1 0 96 3 16 0 0 354 55 1129 22 100 238 1 6438 3 1 0 96 4 12 0 0 414 55 867 12 70 277 0 7163 2 1 0 97 5 12 0 7 463 8 1114 15 84 250 0 6615 2 1 0 97 6 5 0 0 486 12 1167 13 83 247 0 7159 3 1 0 96 7 4 0 17 633 117 1275 17 82 260 1 4744 3 1 0 96 April 1, 2026 at 06:59:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 108 0 0 0 0 1 0 0 0 100 1 0 0 0 117 52 114 0 0 3 0 294 0 0 0 100 2 0 0 3 209 102 4 0 0 6 0 308 0 0 0 100 3 0 0 0 19 7 14 0 0 0 0 9 0 0 0 100 4 0 0 0 16 5 10 0 1 1 0 301 0 0 0 100 5 0 0 7 12 2 16 0 1 0 0 260 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 1039 0 0 0 100 7 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 46 0 0 2124 101 175 0 7 14 8 133 0 0 0 100 1 12 0 0 148 54 129 0 5 7 1 343 0 0 0 100 2 1357 0 121 234 102 66 1 6 14 13 1286 1 1 0 98 3 74 0 0 54 6 47 0 7 7 8 102 0 0 0 100 4 58 0 2 55 7 54 1 6 7 9 433 0 0 0 100 5 1936 0 7 51 3 55 2 7 4 10 615 0 1 0 99 6 23 0 0 43 2 75 1 8 9 7 1246 0 0 0 100 7 6 0 21 241 104 40 0 5 7 3 352 0 0 0 100 April 1, 2026 at 06:59:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 0 0 0 0 100 1 0 0 0 122 52 122 0 0 0 0 314 0 0 0 100 2 0 0 3 209 102 4 0 0 2 0 311 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 4 0 0 0 100 4 0 0 0 16 4 14 0 0 0 0 313 0 0 0 100 5 0 0 7 31 10 26 0 0 1 0 270 0 0 0 100 6 0 0 0 12 2 36 1 0 0 0 1123 0 0 0 100 7 0 0 17 212 103 8 1 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 122 0 0 0 0 11 0 0 0 100 1 0 0 0 119 53 114 0 0 7 0 296 0 0 0 100 2 0 0 3 212 102 12 0 0 5 0 316 0 0 0 100 3 0 0 0 16 5 10 0 0 0 0 321 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 300 0 0 0 100 5 0 0 7 13 3 10 1 0 0 0 261 0 0 0 100 6 0 0 0 12 1 38 1 2 0 0 1123 0 0 0 100 7 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 108 229 0 10 93 0 10 0 1 0 99 1 0 0 0 166 53 209 0 7 93 0 294 0 0 0 100 2 0 0 3 262 102 110 0 6 67 0 312 0 0 0 100 3 0 0 0 81 28 123 1 8 42 0 24 0 0 0 100 4 0 0 0 92 31 112 0 8 82 0 304 0 0 0 100 5 0 0 7 64 2 120 0 5 72 0 260 0 0 0 100 6 0 0 0 63 1 141 1 8 88 0 1121 0 0 0 100 7 0 0 17 255 103 104 0 7 94 0 266 0 0 0 100 April 1, 2026 at 06:59:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 410 0 0 2126 105 225 5 16 3 1 1740 1 1 0 99 1 81 0 0 201 48 347 6 16 6 0 1775 1 0 0 99 2 19 0 75 390 107 371 3 20 8 0 1589 1 0 0 99 3 413 0 0 43 1 144 2 10 1 1 1660 1 0 0 98 4 22 0 0 60 5 125 2 16 3 0 1580 0 0 0 99 5 84 0 7 37 2 58 2 4 8 0 1111 1 0 0 98 6 86 0 0 56 2 152 12 16 1 0 2516 0 0 0 99 7 7 0 15 292 103 262 1 16 1 0 1334 0 0 0 100 April 1, 2026 at 06:59:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 10 0 0 1 0 0 0 0 0 100 1 0 0 0 68 25 62 0 3 4 0 294 0 0 0 100 2 0 0 4 308 104 101 0 3 8 0 301 0 0 0 100 3 0 0 0 56 25 52 0 1 0 0 0 0 0 0 100 4 0 0 0 16 5 8 0 0 0 0 301 0 0 0 100 5 0 0 7 21 8 18 0 0 0 0 270 0 0 0 100 6 0 0 0 9 1 34 0 0 0 0 1129 0 0 0 100 7 0 0 16 209 103 4 1 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2118 105 43 0 5 13 0 22 0 1 0 99 1 0 0 0 32 3 39 0 3 15 1 404 0 0 0 100 2 0 0 4 323 103 125 1 1 5 1 389 0 0 0 100 3 0 0 7 118 51 118 0 5 10 0 22 0 0 0 100 4 1 0 0 29 5 34 1 5 9 0 344 0 0 0 100 5 0 0 16 44 16 43 1 6 12 0 290 0 1 0 99 6 0 0 7 21 2 45 1 3 5 0 1041 0 0 0 100 7 0 0 16 218 103 13 0 3 6 0 300 0 0 0 100 April 1, 2026 at 06:59:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 110 31 1 0 0 0 15 0 0 0 100 1 0 0 0 21 2 14 0 0 2 0 294 0 0 0 100 2 0 0 4 315 103 116 0 1 8 0 305 0 0 0 100 3 0 0 7 108 50 102 0 0 0 0 0 0 0 0 100 4 0 0 0 13 4 6 0 0 0 0 300 0 0 0 100 5 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 6 0 0 0 11 1 34 1 0 1 0 1040 0 0 0 100 7 0 0 16 210 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2126 110 210 0 25 178 0 12 0 1 0 99 1 0 0 0 103 3 157 0 18 143 0 296 0 0 0 100 2 0 0 4 408 103 273 0 13 147 0 301 0 0 0 100 3 0 0 0 222 91 255 0 15 109 0 0 0 0 0 100 4 0 0 0 144 48 169 2 12 187 0 308 0 0 0 100 5 0 0 7 94 3 144 0 17 170 0 260 0 0 0 100 6 0 0 0 107 2 203 1 20 165 0 1040 0 0 0 99 7 0 0 16 302 104 163 1 12 174 0 267 0 0 0 100 April 1, 2026 at 06:59:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 106 18 0 0 0 0 9 0 0 0 100 1 0 0 0 18 2 14 0 0 7 0 294 0 0 0 100 2 0 0 4 308 102 106 0 0 6 0 299 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 0 17 6 10 0 0 0 0 302 0 0 0 100 5 0 0 7 10 2 8 0 1 0 0 260 0 0 0 100 6 0 0 0 11 1 32 1 0 0 0 1038 0 0 0 100 7 0 0 16 210 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 0 2167 108 1162 32 115 10 0 6086 3 1 0 96 1 0 0 0 185 4 949 20 89 15 0 6683 2 1 0 97 2 7 0 157 466 103 944 14 65 19 0 6802 3 1 0 97 3 2 0 0 169 16 890 17 51 16 0 5432 2 1 0 97 4 4 0 0 588 43 1054 11 49 6 0 4438 3 1 0 97 5 0 0 7 411 4 765 12 48 11 0 4548 2 1 0 97 6 2 0 0 249 5 863 10 37 3 0 6905 2 1 0 97 7 1 0 17 400 104 774 10 43 16 0 5157 2 1 0 97 April 1, 2026 at 06:59:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 0 0 0 0 0 0 100 1 0 0 0 22 2 24 0 0 9 0 317 0 0 0 100 2 0 0 3 208 102 5 0 0 4 0 293 0 0 0 100 3 0 0 0 7 0 3 0 1 0 0 15 0 0 0 100 4 0 0 0 121 54 122 0 0 0 0 312 0 0 0 100 5 0 0 7 27 11 20 0 0 1 0 270 0 0 0 100 6 0 0 0 22 7 46 1 0 0 0 1046 0 0 0 100 7 0 0 17 212 103 8 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 651 0 0 2123 101 149 1 8 10 9 921 1 1 0 98 1 7 0 0 49 3 47 0 5 8 6 362 0 0 0 100 2 764 0 117 235 101 57 0 3 7 12 188 0 0 0 99 3 99 0 0 51 1 71 0 11 12 9 457 0 0 0 100 4 26 0 3 74 16 67 1 7 5 4 427 0 0 0 100 5 32 0 7 123 42 127 0 7 0 4 392 0 0 0 100 6 1916 0 0 55 6 82 3 7 6 11 1461 0 1 0 99 7 18 0 17 237 104 36 1 6 9 7 322 0 0 0 100 April 1, 2026 at 06:59:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 101 333 0 29 278 0 0 0 1 0 99 1 0 0 0 97 2 182 0 14 265 0 294 0 0 0 100 2 0 0 3 292 101 184 0 20 290 0 0 0 0 0 100 3 0 0 0 131 40 221 0 24 240 0 314 0 0 0 100 4 0 0 0 135 44 211 0 22 271 0 304 0 0 0 100 5 0 0 7 208 53 317 0 22 251 0 261 0 0 0 100 6 0 0 0 109 7 228 0 20 271 0 1130 0 1 0 99 7 0 0 17 298 104 189 0 20 205 0 269 0 0 0 100 April 1, 2026 at 06:59:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 108 0 0 0 0 0 0 0 0 100 1 0 0 0 19 3 14 0 0 9 0 296 0 0 0 100 2 0 0 3 213 104 8 0 0 0 0 5 0 0 0 100 3 0 0 0 10 1 10 0 0 3 0 311 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 300 0 0 0 100 5 0 0 7 113 53 110 1 0 0 0 261 0 0 0 100 6 0 0 0 14 2 40 1 2 0 0 1122 0 0 0 100 7 0 0 17 217 106 12 1 0 0 0 586 0 0 0 100 April 1, 2026 at 06:59:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 0 0 0 0 0 0 0 100 1 0 0 0 17 2 12 0 0 12 0 294 0 0 0 100 2 0 0 3 214 105 8 0 0 0 0 5 0 0 0 100 3 0 0 0 8 1 4 0 0 17 0 311 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 300 0 0 0 100 5 0 0 7 109 52 106 0 0 0 0 260 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 1122 0 0 0 100 7 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:59:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 124 0 0 2154 135 368 3 25 3 0 1647 0 1 0 99 1 150 0 0 84 4 107 2 9 8 0 1762 1 0 0 99 2 10 0 73 301 110 208 7 21 4 0 1759 1 0 0 98 3 493 0 14 84 3 213 3 15 7 1 2214 1 0 0 99 4 8 0 0 93 5 232 4 21 0 1 1873 0 0 0 99 5 46 0 7 105 21 193 3 16 9 0 1626 1 0 0 99 6 3 0 0 99 4 231 5 22 6 0 2336 1 0 0 99 7 78 0 17 369 110 325 5 25 5 0 1521 1 0 0 99 April 1, 2026 at 06:59:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2155 151 126 0 1 0 0 6 0 0 0 100 1 0 0 0 19 3 14 0 0 6 0 295 0 0 0 100 2 0 0 3 221 107 16 0 0 0 0 10 0 0 0 100 3 0 0 0 7 1 2 0 0 1 0 301 0 0 0 100 4 0 0 0 14 4 6 0 0 0 0 300 0 0 0 100 5 0 0 7 14 4 12 0 0 0 0 264 0 0 0 100 6 0 0 0 9 1 34 0 0 0 0 1127 0 0 0 100 7 0 0 17 310 103 106 0 0 1 0 266 0 0 0 100 April 1, 2026 at 06:59:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2126 112 225 0 22 189 0 6 0 1 0 99 1 0 0 14 174 35 233 0 24 175 0 321 0 0 0 99 2 0 0 3 382 121 264 0 18 157 0 47 0 0 0 100 3 0 0 12 118 41 199 0 16 187 1 406 0 0 0 100 4 0 0 0 113 41 180 0 17 205 0 377 0 0 0 100 5 1 0 7 81 4 138 2 9 135 0 312 0 0 0 100 6 0 0 0 81 3 179 1 14 191 0 1045 0 0 0 99 7 0 0 17 322 105 204 0 17 150 0 267 0 0 0 100 April 1, 2026 at 06:59:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 64 0 0 1 0 10 0 0 0 100 1 0 0 0 46 4 39 0 4 4 0 294 0 0 0 100 2 0 0 3 281 120 71 0 6 0 0 10 0 0 0 100 3 0 0 7 21 4 16 0 3 9 0 320 0 0 0 100 4 0 0 0 80 37 74 0 1 0 0 300 0 0 0 100 5 0 0 7 12 4 6 0 0 0 0 260 0 0 0 100 6 0 0 0 10 1 3 0 0 0 0 258 0 0 0 100 7 0 0 17 214 103 8 0 1 0 0 266 0 0 0 100 April 1, 2026 at 06:59:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 104 92 0 3 0 0 0 0 0 0 100 1 0 0 112 81 32 75 0 1 9 0 296 0 0 0 100 2 0 0 7 259 108 33 0 4 2 0 8 0 0 0 100 3 0 0 0 58 12 33 0 5 11 0 301 0 0 0 100 4 0 0 0 50 12 22 1 2 1 0 300 0 0 0 100 5 0 0 7 32 5 10 0 0 1 0 266 0 0 0 100 6 0 0 0 26 1 31 1 0 1 0 780 0 0 0 100 7 0 0 21 230 104 6 1 0 1 0 267 0 0 0 100 April 1, 2026 at 06:59:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 0 0 0 0 0 0 100 1 0 0 7 124 52 124 0 0 4 0 314 0 0 0 100 2 0 0 3 224 109 18 0 0 0 0 14 0 0 0 100 3 0 0 0 8 1 2 0 0 4 0 301 0 0 0 100 4 0 0 0 17 4 14 0 0 0 0 312 0 0 0 100 5 0 0 7 32 13 24 0 0 0 0 275 0 0 0 100 6 0 0 0 11 1 34 1 0 1 0 1040 0 0 0 100 7 0 0 17 215 104 10 0 0 0 0 267 0 0 0 100 April 1, 2026 at 06:59:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 0 2177 125 1265 38 125 12 0 5874 3 1 0 96 1 0 0 0 648 20 1222 29 95 10 0 4712 3 1 0 97 2 23 0 171 464 110 865 17 88 17 0 6924 3 1 0 96 3 15 0 0 458 2 800 15 44 13 0 5871 2 1 0 97 4 3 0 0 340 4 840 15 50 24 0 7190 3 1 0 96 5 2 0 0 295 8 911 11 57 3 1 5608 2 1 0 97 6 1 0 7 290 9 930 15 52 2 0 6240 2 1 0 97 7 17 0 17 579 103 677 7 33 17 0 5480 2 1 0 97 April 1, 2026 at 06:59:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 112 343 0 35 269 0 0 0 1 0 99 1 0 0 0 95 3 193 0 27 285 0 294 0 0 0 100 2 0 0 3 298 101 196 0 18 275 0 3 0 0 0 100 3 0 0 0 120 39 176 0 20 196 0 311 0 0 0 100 4 0 0 0 126 41 199 0 25 245 0 301 0 0 0 100 5 0 0 0 130 7 241 0 26 217 0 10 0 0 0 100 6 0 0 7 196 42 315 1 26 281 0 1299 0 1 0 99 7 0 0 17 280 103 180 0 25 235 0 266 0 0 0 100 April 1, 2026 at 06:59:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2545 0 0 2122 101 155 3 6 4 11 1173 1 1 0 98 1 36 0 0 43 3 43 0 3 13 10 359 0 0 0 100 2 736 0 118 227 101 58 0 6 10 11 194 0 0 0 99 3 108 0 1 52 1 87 0 13 11 13 494 0 0 0 100 4 52 0 0 58 4 78 1 9 4 20 448 0 0 0 100 5 14 0 0 56 4 59 1 6 3 5 78 0 0 0 100 6 3 0 7 146 55 164 1 3 1 1 1373 0 0 0 100 7 14 0 17 239 105 29 0 2 2 2 350 0 0 0 100 April 1, 2026 at 07:00:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 0 0 0 0 0 0 0 100 1 0 0 0 9 2 4 0 0 2 0 294 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 4 0 308 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 300 0 0 0 100 5 0 0 0 24 4 20 0 0 0 0 5 0 0 0 100 6 0 0 7 115 53 144 1 1 0 0 1385 0 0 0 100 7 0 0 17 211 104 6 1 0 0 0 267 0 0 0 100 April 1, 2026 at 07:00:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 0 0 0 0 100 1 0 0 0 19 3 22 0 0 5 0 327 0 0 0 100 2 0 0 7 207 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 5 0 312 0 0 0 100 4 0 0 0 18 4 16 0 0 0 0 315 0 0 0 100 5 0 0 0 53 18 42 1 1 0 0 339 0 0 0 100 6 0 0 7 30 9 54 1 0 0 0 1389 0 0 0 100 7 0 0 21 317 152 118 0 2 0 0 270 0 0 0 100 April 1, 2026 at 07:00:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 106 0 0 0 0 0 0 0 0 100 1 0 0 0 9 2 4 0 0 4 0 294 0 0 0 100 2 0 0 2 208 102 2 0 0 0 0 1 0 0 0 100 3 0 0 0 8 1 4 0 0 7 0 309 0 0 0 100 4 0 0 0 12 4 6 0 0 0 0 300 0 0 0 100 5 0 0 0 14 0 10 0 0 0 0 0 0 0 0 100 6 2 0 7 25 9 50 1 0 0 0 1389 0 0 0 100 7 0 0 18 307 152 104 0 0 0 0 266 0 0 0 100 April 1, 2026 at 07:00:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 333 0 0 2124 102 310 9 23 7 1 1794 1 1 0 98 1 239 0 0 152 37 244 5 25 7 0 1814 0 0 0 99 2 1 0 59 332 103 377 3 34 11 0 1665 1 0 0 99 3 175 0 0 108 2 354 4 21 6 0 1952 1 0 0 99 4 102 0 0 112 5 253 8 25 1 0 2120 0 0 0 99 5 3 0 0 131 2 482 7 30 1 0 1891 1 0 0 99 6 3 0 7 65 7 149 11 11 0 0 2316 1 0 0 98 7 40 0 17 296 125 274 3 17 1 0 1828 1 0 0 99 April 1, 2026 at 07:00:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 112 0 0 1 0 1 0 0 0 100 1 0 0 0 112 52 114 0 1 0 0 294 0 0 0 100 2 0 0 3 206 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 302 0 0 0 100 4 0 0 0 14 4 6 0 0 0 0 300 0 0 0 100 5 0 0 0 14 0 10 0 0 0 0 0 0 0 0 100 6 0 0 7 29 10 50 1 0 0 0 1396 0 0 0 100 7 0 0 17 209 103 4 1 0 0 0 266 0 0 0 100 April 1, 2026 at 07:00:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 131 0 6 4 0 19 0 0 0 100 1 0 0 10 125 54 127 0 6 20 0 323 0 0 0 100 2 0 0 3 215 101 8 0 3 10 0 12 0 0 0 100 3 0 0 0 18 2 13 0 2 5 0 440 0 0 0 100 4 0 0 0 30 7 30 0 0 10 0 315 0 0 0 100 5 0 0 9 26 1 22 1 3 8 0 1 0 1 0 99 6 0 0 21 39 12 69 2 7 19 0 1408 0 0 0 99 7 0 0 17 222 104 21 0 4 11 0 313 0 0 0 100 April 1, 2026 at 07:00:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 113 0 1 0 0 0 0 0 0 100 1 0 0 0 120 52 118 0 2 2 0 306 0 0 0 100 2 0 0 10 213 102 12 0 2 0 0 1 0 0 0 100 3 0 0 0 8 1 2 0 0 2 0 302 0 0 0 100 4 0 0 0 36 13 32 0 0 0 0 324 0 0 0 100 5 0 0 0 30 7 24 0 0 0 0 20 0 0 0 100 6 0 0 7 16 3 38 1 0 0 0 1301 0 0 0 100 7 0 0 17 214 103 8 0 1 0 0 266 0 0 0 100 April 1, 2026 at 07:00:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2109 103 119 0 0 0 0 2 0 0 0 99 1 0 0 0 128 53 106 0 0 3 0 296 0 0 0 100 2 0 0 3 231 101 10 0 0 0 0 0 0 0 0 100 3 0 0 0 23 1 2 0 0 2 0 301 0 0 0 100 4 0 0 0 41 10 18 1 0 0 0 309 0 0 0 100 5 0 0 0 30 0 10 0 0 0 0 0 0 0 0 100 6 0 0 7 29 3 38 1 0 1 0 1298 0 0 0 100 7 0 0 17 225 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 07:00:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2114 102 357 0 21 203 0 4 0 1 0 99 1 0 0 0 208 52 314 0 25 181 0 294 0 0 0 100 2 0 0 3 297 101 202 0 14 136 0 0 0 0 0 100 3 0 0 0 140 59 190 0 21 173 0 297 0 0 0 100 4 0 0 0 183 71 243 0 20 180 0 314 0 0 0 100 5 0 0 0 117 1 216 0 17 163 0 0 0 0 0 100 6 0 0 7 97 3 212 0 14 197 0 1298 0 0 0 99 7 0 0 17 278 103 178 1 19 140 0 266 0 0 0 100 April 1, 2026 at 07:00:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 0 2151 105 1271 27 118 16 0 7043 4 1 0 95 1 54 0 0 307 40 1308 23 97 6 0 6950 3 1 0 96 2 18 0 171 600 104 1073 12 81 13 0 6124 2 1 0 97 3 1 0 0 490 6 897 11 51 8 0 6533 2 1 0 97 4 13 0 0 164 16 859 8 51 6 0 8083 2 1 0 97 5 1 0 0 188 1 1015 17 48 6 0 5488 2 1 0 97 6 6 0 7 353 4 918 8 49 6 0 6735 2 1 0 97 7 25 0 17 507 106 730 9 27 11 0 5769 3 1 0 97 April 1, 2026 at 07:00:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 109 0 1 0 0 0 0 0 0 100 1 0 0 0 111 53 106 0 0 7 0 295 0 0 0 100 2 0 0 3 211 101 8 0 0 0 0 21 0 0 0 100 3 0 0 0 23 7 26 0 1 3 0 307 0 0 0 100 4 0 0 0 21 6 12 0 1 0 0 303 0 0 0 100 5 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 6 0 0 7 13 3 38 1 0 0 0 1298 0 0 0 100 7 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 07:00:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 116 0 0 0 0 0 0 0 0 100 1 0 0 0 121 55 118 0 0 4 0 313 0 0 0 100 2 0 0 3 207 101 2 0 0 0 0 10 0 0 0 100 3 0 0 0 22 8 16 0 0 3 0 311 0 0 0 100 4 0 0 0 20 5 16 2 0 0 0 315 0 0 0 100 5 0 0 0 21 9 14 0 0 0 0 13 0 0 0 100 6 0 0 7 15 4 42 0 0 0 0 1303 0 0 0 100 7 0 0 17 212 103 8 0 0 0 0 266 0 0 0 100 April 1, 2026 at 07:00:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 0 0 0 0 100 1 0 0 0 111 53 106 0 0 1 0 296 0 0 0 100 2 0 0 3 211 103 6 0 0 0 0 11 0 0 0 100 3 0 0 0 21 5 20 0 1 6 0 308 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 5 0 0 0 11 2 8 0 0 0 0 6 0 0 0 100 6 0 0 7 18 4 204 2 0 2 0 1629 0 0 0 99 7 0 0 17 210 103 6 0 0 0 0 267 0 0 0 100 April 1, 2026 at 07:00:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 666 0 0 2129 101 327 1 27 317 14 965 1 1 0 98 1 30 0 0 187 41 262 0 25 209 5 432 0 0 0 99 2 8 0 3 418 115 316 0 24 196 2 89 0 0 0 100 3 10 0 0 180 45 252 1 18 202 1 721 0 0 0 100 4 5 0 0 161 43 234 1 21 235 2 370 0 0 0 100 5 2666 0 115 122 4 258 2 20 248 12 455 0 1 0 98 6 85 0 7 129 6 246 2 14 298 5 1435 0 1 0 99 7 57 0 18 312 104 196 2 23 227 8 344 0 0 0 99 April 1, 2026 at 07:00:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 10 0 0 0 0 1 0 0 0 100 1 0 0 0 109 52 104 0 0 0 0 294 0 0 0 100 2 0 0 3 315 101 112 0 0 0 0 20 0 0 0 100 3 0 0 0 7 1 2 0 0 6 0 299 0 0 0 100 4 0 0 0 10 3 4 0 0 0 0 300 0 0 0 100 5 0 0 0 25 9 20 1 0 0 0 10 0 0 0 100 6 0 0 7 12 3 38 0 0 0 0 1384 0 0 0 100 7 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 07:00:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2122 103 294 1 17 5 0 1470 1 1 0 99 1 241 0 0 90 26 200 0 14 11 1 1416 1 0 0 99 2 0 0 63 318 102 257 0 23 5 0 1170 1 0 0 99 3 391 0 0 111 29 211 0 16 13 1 2038 1 0 0 99 4 27 0 14 74 4 251 1 16 5 1 1832 0 0 0 99 5 0 0 0 55 7 116 0 15 3 0 1197 1 0 0 99 6 0 0 7 64 5 244 1 17 3 0 2669 1 0 0 99 7 270 0 7 237 104 98 0 10 2 4 1604 1 0 0 99 April 1, 2026 at 07:00:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 110 133 0 0 2 0 14 0 0 0 100 1 0 0 0 14 2 14 0 0 2 0 314 0 0 0 100 2 0 0 3 214 101 8 0 0 0 0 0 0 0 0 100 3 0 0 0 112 51 110 0 0 3 0 301 0 0 0 100 4 0 0 14 16 4 14 0 0 0 0 577 0 0 0 100 5 0 0 0 25 9 18 0 0 0 0 10 0 0 0 100 6 0 0 7 14 3 40 1 0 1 0 1390 0 0 0 100 7 0 0 3 214 103 8 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:00:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2124 109 160 0 4 13 1 111 0 0 0 99 1 0 0 0 26 3 30 3 2 14 0 324 0 0 0 100 2 0 0 8 225 101 25 0 2 9 0 27 0 0 0 100 3 0 0 0 118 51 126 0 7 13 0 319 0 0 0 100 4 0 0 14 23 5 25 0 4 11 0 585 0 0 0 100 5 0 0 0 15 1 13 0 6 7 0 66 0 0 0 100 6 0 0 7 19 3 45 1 4 10 0 1388 0 0 0 100 7 0 0 14 219 102 13 0 4 6 0 0 0 1 0 99 April 1, 2026 at 07:00:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 109 304 0 21 173 0 10 0 1 0 99 1 0 0 0 81 2 144 0 14 140 0 294 0 0 0 100 2 0 0 3 284 101 182 0 14 158 0 0 0 0 0 100 3 0 0 7 226 93 285 0 20 167 0 300 0 0 0 100 4 0 0 14 106 45 140 1 13 103 0 566 0 0 0 100 5 0 0 0 89 2 170 0 12 123 0 1 0 0 0 100 6 0 0 7 85 4 191 1 19 133 0 1300 0 0 0 99 7 0 0 3 287 103 154 0 12 145 0 0 0 0 0 100 April 1, 2026 at 07:00:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2117 107 125 0 0 0 0 9 0 0 0 99 1 0 0 0 36 7 16 0 0 4 0 304 0 0 0 100 2 0 0 3 233 102 10 0 0 0 0 1 0 0 0 100 3 0 0 0 132 51 112 0 0 3 0 300 0 0 0 100 4 0 0 14 27 4 6 1 0 0 0 566 0 0 0 100 5 0 0 0 24 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 31 4 40 1 1 0 0 1299 0 0 0 100 7 0 0 3 225 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2123 109 124 0 0 0 0 13 0 0 0 100 1 0 0 0 10 2 4 0 0 3 0 294 0 0 0 100 2 0 0 3 215 101 8 0 0 0 0 0 0 0 0 100 3 0 0 0 108 51 104 0 0 2 0 300 0 0 0 100 4 0 0 14 12 4 8 0 0 0 0 569 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 14 3 38 1 0 1 0 1299 0 0 0 100 7 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 34 0 0 2180 121 1149 29 130 17 0 7641 3 1 0 96 1 39 0 0 524 15 993 23 90 10 0 6897 3 1 0 96 2 30 0 171 711 101 1018 23 88 6 0 5034 2 1 0 97 3 12 0 0 471 29 1110 19 70 15 0 5510 2 1 0 97 4 0 0 14 193 5 1006 29 75 10 0 6996 3 1 0 96 5 27 0 0 296 12 891 14 68 10 0 5546 2 1 0 97 6 33 0 7 191 5 893 13 55 10 1 6506 3 1 0 96 7 2 0 3 417 102 665 11 46 5 0 6102 2 1 0 97 April 1, 2026 at 07:00:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 118 0 0 0 0 0 0 0 0 100 1 0 0 0 119 57 114 0 0 6 0 300 0 0 0 100 2 0 0 3 211 103 4 0 0 0 0 11 0 0 0 100 3 0 0 0 15 1 10 0 1 0 0 0 0 0 0 100 4 0 0 14 13 5 8 1 0 4 0 866 0 0 0 100 5 0 0 0 12 3 6 0 1 0 0 1 0 0 0 100 6 0 0 7 15 4 38 1 0 0 0 1298 0 0 0 100 7 0 0 3 211 103 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 646 0 0 2129 101 307 2 30 303 11 958 1 1 0 98 1 11 0 0 228 41 305 1 30 245 1 386 0 0 0 100 2 26 0 3 390 118 311 1 34 238 6 114 0 0 0 100 3 4 0 0 158 44 210 2 20 243 3 75 0 0 0 100 4 2637 0 129 151 46 217 4 15 260 9 1281 0 1 0 98 5 143 0 0 131 0 270 1 27 269 17 168 0 1 0 99 6 30 0 9 120 4 252 2 33 284 5 1452 0 1 0 99 7 12 0 3 313 103 235 1 23 216 1 82 0 0 0 100 April 1, 2026 at 07:00:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 20 0 0 0 0 10 0 0 0 100 1 0 0 0 117 56 112 0 0 2 0 299 0 0 0 100 2 0 0 3 306 101 102 0 0 0 0 10 0 0 0 100 3 0 0 0 11 1 8 0 1 1 0 18 0 0 0 100 4 0 0 14 14 5 10 0 1 3 0 864 0 0 0 100 5 0 0 0 12 0 10 0 2 0 0 0 0 0 0 100 6 0 0 7 15 4 40 1 0 1 0 1384 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 24 0 0 0 0 3 0 0 0 100 1 0 0 0 127 60 122 0 0 6 0 626 0 0 0 100 2 0 0 3 305 101 100 0 0 1 0 0 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 4 0 0 14 16 7 10 0 0 5 0 870 0 0 0 100 5 0 0 0 13 1 8 0 1 1 0 1 0 0 0 100 6 0 0 7 20 4 48 2 1 1 0 1387 0 0 0 100 7 0 0 3 211 103 4 0 0 1 0 1 0 0 0 100 April 1, 2026 at 07:00:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 109 30 0 0 0 0 11 0 0 0 100 1 0 0 0 116 47 118 0 3 3 0 320 0 0 0 100 2 0 0 3 306 106 100 0 3 0 0 10 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 17 5 18 1 0 5 0 879 0 0 0 100 5 0 0 0 26 8 20 0 0 0 0 11 0 0 0 100 6 0 0 7 16 4 42 1 0 0 0 1385 0 0 0 100 7 0 0 3 212 102 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 87 0 0 2143 124 371 2 22 2 2 1313 1 1 0 99 1 361 0 0 190 30 330 5 22 6 0 2086 1 0 0 98 2 134 0 46 408 105 561 1 26 10 2 1843 1 0 0 99 3 1 0 0 80 1 184 0 13 5 0 1103 1 0 0 99 4 1 0 14 41 5 92 1 9 8 0 1678 1 0 0 99 5 0 0 0 75 0 271 1 13 1 0 1215 0 0 0 99 6 7 0 7 60 5 143 1 13 0 0 2658 0 0 0 99 7 432 0 2 256 102 198 1 17 7 3 1238 1 0 0 99 April 1, 2026 at 07:00:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2167 156 284 0 20 144 0 17 0 1 0 99 1 0 0 0 186 3 260 0 19 195 0 304 0 0 0 100 2 0 0 17 283 101 157 0 15 140 0 4 0 0 0 100 3 0 0 0 115 40 160 0 12 134 0 1 0 0 0 100 4 4 0 14 118 48 148 0 10 132 0 886 0 0 0 100 5 0 0 0 87 0 165 0 17 150 0 11 0 0 0 100 6 0 0 7 86 3 188 1 14 138 0 1398 0 0 0 99 7 16 0 3 288 102 161 0 10 149 0 12 0 0 0 100 April 1, 2026 at 07:00:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2161 151 138 0 5 6 0 22 0 1 0 99 1 0 0 0 123 3 128 0 7 11 0 450 0 0 0 100 2 0 0 1 219 101 19 1 7 11 0 17 0 0 0 100 3 0 0 7 17 1 12 0 2 5 0 19 0 0 0 100 4 0 0 14 35 12 40 2 1 10 0 895 0 0 0 100 5 0 0 0 18 1 12 0 4 6 0 23 0 0 0 100 6 0 0 7 27 4 53 2 3 2 0 1410 0 0 0 100 7 0 0 14 218 102 13 0 4 9 0 0 0 1 0 99 April 1, 2026 at 07:00:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2157 152 137 0 2 0 0 0 0 0 0 100 1 0 0 0 111 2 104 0 0 2 0 294 0 0 0 100 2 0 0 3 228 111 20 0 0 0 0 12 0 0 0 100 3 0 0 7 10 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 15 5 8 1 0 6 0 869 0 0 0 100 5 0 0 0 13 1 8 1 0 0 0 4 0 0 0 100 6 0 0 7 16 4 38 1 0 1 0 1301 0 0 0 100 7 0 0 3 213 102 6 0 2 1 0 0 0 0 0 100 April 1, 2026 at 07:00:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2141 135 89 0 0 0 0 2 0 0 0 100 1 0 0 0 136 17 122 0 5 5 0 319 0 0 0 100 2 0 0 3 266 111 46 0 3 0 0 10 0 0 0 100 3 0 0 0 25 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 34 5 18 1 1 2 0 879 0 0 0 100 5 0 0 0 42 9 18 0 0 1 0 10 0 0 0 100 6 0 0 7 28 3 38 0 0 0 0 1299 0 0 0 100 7 0 0 3 233 102 10 0 2 0 0 0 0 0 0 100 April 1, 2026 at 07:00:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 101 16 0 0 0 0 3 0 0 0 100 1 0 0 0 110 52 104 0 0 0 0 294 0 0 0 100 2 0 0 3 323 109 116 0 0 0 0 14 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 13 5 8 0 0 4 0 866 0 0 0 100 5 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 6 0 0 7 14 3 38 1 0 0 0 1297 0 0 0 100 7 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2159 104 1217 31 132 24 0 6942 3 1 0 96 1 14 0 0 678 51 1198 27 108 21 0 6429 3 1 0 96 2 35 0 171 679 110 986 16 81 7 0 7193 3 1 0 96 3 0 0 0 528 1 918 16 70 5 0 5587 2 1 0 97 4 18 0 14 150 6 978 25 73 21 0 8075 3 1 0 96 5 42 0 0 288 1 844 19 64 18 0 5640 3 1 0 96 6 4 0 7 374 4 695 12 42 15 0 6657 2 1 0 97 7 27 0 3 431 105 1038 15 65 15 0 4419 3 1 0 97 April 1, 2026 at 07:00:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 122 0 0 0 0 7 0 0 0 100 1 0 0 0 109 52 104 0 0 5 0 294 0 0 0 100 2 0 0 3 212 103 4 0 0 0 0 0 0 0 0 100 3 0 0 0 13 2 12 0 1 0 0 0 0 0 0 100 4 0 0 14 12 5 8 1 0 9 0 879 0 0 0 100 5 0 0 0 13 2 8 0 0 0 0 11 0 0 0 100 6 0 0 7 13 3 38 1 0 0 0 1298 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 635 0 0 2139 108 126 1 6 8 5 924 1 1 0 98 1 2640 0 114 139 37 165 2 7 7 12 713 1 1 0 99 2 120 0 7 292 118 115 0 8 10 16 172 0 0 0 100 3 28 0 3 45 2 57 0 10 10 12 143 0 0 0 100 4 57 0 14 54 6 55 1 9 7 4 998 0 0 0 100 5 10 0 0 41 1 40 0 7 7 2 102 0 0 0 100 6 6 0 7 44 4 69 0 6 2 3 1367 0 0 0 100 7 2 0 7 235 104 14 0 1 1 0 13 0 0 0 100 April 1, 2026 at 07:00:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 24 0 0 0 0 5 0 0 0 100 1 0 0 0 115 28 116 0 1 4 0 317 0 0 0 100 2 0 0 3 307 126 102 0 2 0 0 0 0 0 0 100 3 0 0 0 15 1 12 1 0 0 0 1 0 0 0 100 4 0 0 14 16 5 16 0 0 2 0 881 0 0 0 100 5 0 0 0 29 12 20 0 0 0 0 20 0 0 0 100 6 0 0 7 13 3 38 1 0 0 0 1384 0 0 0 100 7 0 0 3 215 103 8 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:00:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 109 36 1 0 0 0 334 0 0 0 100 1 0 0 0 111 53 107 0 0 1 0 288 0 0 0 100 2 0 0 3 311 103 107 0 1 0 0 17 0 0 0 100 3 0 0 0 10 0 4 0 0 1 0 3 0 0 0 100 4 0 0 14 16 5 18 0 1 3 0 872 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 7 14 3 38 2 0 0 0 1380 0 0 0 100 7 0 0 3 211 102 6 0 0 0 0 5 0 0 0 100 April 1, 2026 at 07:00:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 101 293 0 24 329 0 0 0 1 0 99 1 0 0 0 183 51 275 0 18 279 0 0 0 0 0 100 2 0 0 3 327 103 243 0 25 213 0 294 0 0 0 100 3 0 0 0 121 40 186 0 22 189 0 0 0 0 0 100 4 0 0 14 123 52 203 1 24 316 0 864 0 0 0 99 5 0 0 0 105 2 205 0 16 189 0 11 0 0 0 100 6 0 0 7 105 3 236 1 23 349 0 1382 0 1 0 99 7 0 0 3 286 102 166 0 20 212 0 0 0 0 0 100 April 1, 2026 at 07:00:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 280 0 0 2113 100 122 5 6 3 1 1834 2 1 0 98 1 5 0 0 170 44 293 3 15 0 0 1218 0 0 0 100 2 291 0 45 239 104 172 5 16 9 1 1518 1 0 0 99 3 220 0 0 64 7 168 7 14 1 0 1319 0 0 0 99 4 32 0 14 72 10 125 5 13 6 0 2092 0 0 0 99 5 0 0 0 74 1 203 5 20 8 0 1682 1 0 0 99 6 5 0 7 43 4 129 5 10 3 0 2317 1 0 0 98 7 155 0 3 245 102 125 8 15 2 0 1281 0 0 0 99 April 1, 2026 at 07:00:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 112 0 0 1 0 0 0 0 0 100 1 0 0 0 108 51 104 0 0 0 0 4 0 0 0 100 2 0 0 3 210 103 4 0 0 5 0 294 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 4 0 14 14 5 8 0 0 8 0 866 0 0 0 100 5 0 0 0 29 10 24 0 0 2 0 11 0 0 0 100 6 0 0 7 15 3 42 1 1 1 0 1388 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 112 134 0 5 3 0 29 0 0 0 99 1 0 0 9 122 40 124 0 5 11 0 25 0 1 0 99 2 0 0 3 222 103 18 0 4 9 0 325 0 0 0 100 3 0 0 0 17 0 15 0 6 10 0 7 0 0 0 100 4 1 0 14 26 5 31 1 2 10 0 1060 0 0 0 100 5 0 0 0 52 17 52 0 1 10 0 55 0 0 0 100 6 0 0 28 22 3 56 3 5 9 0 1396 0 0 0 99 7 0 0 3 223 102 17 0 4 7 0 14 0 0 0 100 April 1, 2026 at 07:00:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 159 130 0 1 0 0 11 0 0 0 100 1 0 0 0 111 1 104 0 1 0 0 0 0 0 0 100 2 0 0 3 214 104 6 0 0 4 0 295 0 0 0 100 3 0 0 0 8 0 2 0 0 0 0 3 0 0 0 100 4 0 0 14 13 5 10 0 0 3 0 866 0 0 0 100 5 0 0 0 16 3 9 0 2 0 0 1 0 0 0 100 6 0 0 7 22 4 45 1 2 0 0 1301 0 0 0 100 7 0 0 10 214 102 12 0 2 0 0 0 0 0 0 100 April 1, 2026 at 07:00:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2148 117 256 0 15 170 0 9 0 1 0 99 1 20 0 0 177 43 202 0 10 136 0 7 0 0 0 100 2 0 0 3 306 104 172 0 13 122 0 295 0 0 0 100 3 0 0 0 108 34 123 0 10 106 0 0 0 0 0 100 4 0 0 14 118 40 126 1 13 176 0 873 0 0 0 100 5 0 0 0 113 3 169 0 14 119 0 1 0 0 0 100 6 0 0 119 88 4 197 1 17 157 0 1303 0 1 0 99 7 19 0 3 313 104 167 0 9 119 0 6 0 0 0 100 April 1, 2026 at 07:00:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 120 0 0 0 0 10 0 0 0 100 1 0 0 0 109 51 104 0 1 0 0 0 0 0 0 100 2 0 0 3 211 103 4 0 0 2 0 294 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 14 13 5 8 1 0 6 0 864 0 0 0 100 5 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 6 0 0 14 17 4 42 0 0 0 0 1293 0 0 0 100 7 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 0 2186 111 1360 47 169 20 0 6880 4 1 0 95 1 21 0 0 516 41 1139 25 106 14 0 5780 3 1 0 96 2 13 0 171 567 103 935 17 82 25 0 6946 3 1 0 96 3 1 0 0 209 1 1194 16 84 15 0 5727 2 1 0 97 4 4 0 14 136 6 996 25 86 18 0 8338 3 1 0 96 5 2 0 0 183 1 784 13 66 14 0 6372 2 1 0 97 6 5 0 7 531 16 1001 18 51 20 0 6867 2 1 0 96 7 1 0 3 567 107 642 7 39 13 0 4939 2 1 0 97 April 1, 2026 at 07:00:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 104 46 0 2 0 0 0 0 0 0 100 1 0 0 0 40 13 48 0 2 0 0 23 0 0 0 100 2 0 0 3 212 103 8 0 0 5 0 305 0 0 0 100 3 0 0 0 19 7 12 0 0 0 0 7 0 0 0 100 4 0 0 14 45 4 46 0 1 1 0 887 0 0 0 100 5 0 0 0 29 9 18 0 0 0 0 10 0 0 0 100 6 0 0 7 93 22 115 1 2 0 0 1304 0 0 0 100 7 0 0 3 260 124 49 0 2 0 0 0 0 0 0 100 April 1, 2026 at 07:00:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 0 0 0 0 0 0 0 100 1 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 2 0 0 3 210 103 4 0 0 5 0 294 0 0 0 100 3 0 0 0 20 7 14 0 0 0 0 9 0 0 0 100 4 0 0 14 13 5 10 1 0 6 0 865 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 3 0 0 0 100 6 0 0 7 26 5 52 1 1 0 0 1307 0 0 0 100 7 0 0 3 212 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 303 0 25 343 0 0 0 1 0 99 1 0 0 0 112 12 195 0 19 210 0 0 0 0 0 100 2 0 0 3 327 103 265 0 20 253 0 314 0 0 0 100 3 0 0 0 140 52 194 1 19 230 0 7 0 0 0 100 4 0 0 14 209 91 281 1 23 248 0 867 0 0 0 100 5 0 0 0 121 0 249 0 27 253 0 0 0 0 0 100 6 0 0 7 107 3 229 1 21 202 0 1299 0 0 0 99 7 0 0 3 312 104 222 1 22 254 0 0 0 0 0 100 April 1, 2026 at 07:00:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2122 100 141 0 9 6 3 86 0 0 0 100 1 15 0 0 34 1 24 0 5 2 3 63 0 0 0 100 2 1362 0 123 241 103 72 1 2 17 12 1307 1 1 0 98 3 116 0 0 68 5 87 1 9 8 14 494 0 0 0 100 4 53 0 16 149 55 154 0 10 9 6 984 0 0 0 100 5 25 0 0 38 1 31 0 5 4 2 119 0 0 0 100 6 5 0 7 53 6 71 2 3 2 4 1365 0 0 0 100 7 1915 0 3 244 103 39 2 5 7 4 327 0 1 0 99 April 1, 2026 at 07:00:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 109 122 0 0 0 0 12 0 0 0 100 1 0 0 0 10 2 6 0 1 0 0 3 0 0 0 100 2 0 0 3 211 103 6 0 0 1 0 304 0 0 0 100 3 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 4 0 0 14 112 55 108 0 0 0 0 878 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 7 21 3 46 1 0 0 0 1386 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 637 0 0 2124 109 501 0 34 1 1 2034 1 1 0 98 1 23 0 0 132 1 414 0 29 8 1 1802 1 0 0 99 2 207 0 45 260 104 166 3 11 5 1 1708 1 0 0 99 3 142 0 0 45 1 153 0 18 2 0 1644 1 0 0 99 4 9 0 14 191 56 425 1 25 3 0 2423 1 0 0 99 5 5 0 0 43 10 48 1 6 10 0 770 1 0 0 98 6 24 0 7 98 4 248 2 21 3 0 2775 0 0 0 99 7 45 0 3 288 104 256 0 17 3 0 1194 0 0 0 100 April 1, 2026 at 07:00:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2106 100 14 0 0 0 0 9 0 0 0 100 1 1 0 0 13 2 6 0 0 0 0 19 0 0 0 100 2 1 0 17 215 103 10 0 3 2 0 315 0 0 0 100 3 0 0 0 14 2 8 0 1 0 0 28 0 0 0 100 4 6 0 14 117 55 112 1 2 5 0 870 0 0 0 100 5 1 0 0 36 10 32 1 1 1 0 24 0 0 0 100 6 4 0 7 28 5 52 0 2 0 0 1394 0 0 0 100 7 2 0 3 319 104 114 0 2 0 0 17 0 0 0 100 April 1, 2026 at 07:00:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 100 169 0 25 245 1 82 0 1 0 99 1 0 0 14 80 1 160 0 17 162 0 9 0 0 0 100 2 0 0 3 297 103 171 1 17 148 0 324 0 0 0 100 3 0 0 7 114 35 199 0 26 180 0 12 0 0 0 100 4 0 0 14 226 91 270 0 25 170 1 939 0 0 0 100 5 0 0 9 118 9 219 0 25 198 0 34 0 1 0 99 6 0 0 7 83 6 167 4 16 132 0 1435 0 0 0 99 7 0 0 3 385 104 258 0 17 171 0 20 0 0 0 100 April 1, 2026 at 07:00:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 33 0 1 0 0 10 0 0 0 100 1 0 0 0 15 3 6 0 0 0 0 1 0 0 0 100 2 0 0 3 210 102 4 0 1 9 0 294 0 0 0 100 3 0 0 7 14 2 8 0 0 0 0 18 0 0 0 100 4 0 0 14 39 10 32 0 3 7 0 868 0 0 0 100 5 0 0 0 84 38 78 0 1 0 0 0 0 0 0 100 6 0 0 7 25 4 46 1 0 1 0 1303 0 0 0 100 7 0 0 3 325 117 118 0 3 0 0 9 0 0 0 100 April 1, 2026 at 07:00:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2115 104 25 0 1 0 0 8 0 0 0 100 1 0 0 0 32 3 8 0 1 1 0 4 0 0 0 100 2 0 0 7 226 102 6 0 0 8 0 295 0 0 0 100 3 0 0 0 29 2 4 0 0 1 0 0 0 0 0 100 4 0 0 14 32 6 8 1 0 11 0 864 0 0 0 100 5 0 0 0 89 26 63 0 6 1 0 2 0 0 0 100 6 0 0 7 91 28 96 1 5 2 0 1300 0 0 0 100 7 0 0 7 339 116 116 0 3 1 0 14 0 0 0 100 April 1, 2026 at 07:00:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 100 96 0 1 0 0 0 0 0 0 100 1 0 0 0 18 3 14 0 0 0 0 17 0 0 0 100 2 0 0 3 209 102 2 0 0 4 0 294 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 18 5 16 1 0 4 0 878 0 0 0 100 5 0 0 0 22 8 16 0 0 0 0 14 0 0 0 100 6 0 0 7 43 14 66 0 0 0 0 1300 0 0 0 100 7 0 0 3 320 147 114 1 1 0 0 10 0 0 0 100 April 1, 2026 at 07:00:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2159 104 1352 40 133 23 0 7076 3 1 0 96 1 0 0 0 494 4 1228 30 108 18 1 6799 3 1 0 96 2 0 0 171 540 102 899 8 60 19 0 7340 3 1 0 96 3 1 0 0 252 2 1077 17 70 10 0 7443 3 1 0 96 4 2 0 14 264 5 949 14 62 10 0 7834 3 1 0 96 5 0 0 0 118 1 1067 12 68 19 0 6467 3 1 0 97 6 1 0 7 252 3 912 15 48 11 0 6631 2 1 0 97 7 0 0 3 577 157 1036 15 57 12 0 5593 2 1 0 97 April 1, 2026 at 07:00:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 102 317 1 29 293 0 1 0 1 0 99 1 0 0 0 125 11 235 0 25 242 0 0 0 0 0 100 2 0 0 3 310 103 236 1 25 225 0 304 0 0 0 100 3 0 0 0 199 91 327 0 21 228 0 0 0 0 0 100 4 0 0 14 126 55 209 0 22 275 0 874 0 0 0 100 5 0 0 0 104 1 214 0 19 258 0 0 0 0 0 100 6 0 0 7 103 8 214 2 19 222 0 1306 0 0 0 99 7 0 0 3 290 104 222 0 17 197 0 0 0 0 0 100 April 1, 2026 at 07:00:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 0 0 5 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 209 102 4 0 0 2 0 304 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 4 0 0 14 13 5 8 1 0 1 0 865 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 3 0 0 0 100 6 0 0 7 24 9 50 0 1 0 0 1306 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 8 1 4 0 0 0 0 3 0 0 0 100 2 0 0 3 211 102 6 0 0 5 0 304 0 0 0 100 3 0 0 0 110 51 108 0 1 0 0 0 0 0 0 100 4 0 0 14 13 5 8 1 0 5 0 864 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 7 28 10 52 1 0 1 0 1311 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2124 102 153 0 7 5 7 101 0 0 0 99 1 1926 0 0 47 1 57 2 9 10 8 410 0 1 0 99 2 1370 0 117 231 102 64 1 8 21 13 1298 1 1 0 98 3 108 0 0 152 51 168 0 10 10 8 120 0 0 0 100 4 44 0 17 50 5 65 0 5 9 6 1008 0 0 0 100 5 14 0 0 58 11 51 0 7 4 1 113 0 0 0 100 6 3 0 7 48 9 63 2 3 1 1 1667 0 0 0 99 7 12 0 3 234 103 18 0 6 1 2 44 0 0 0 100 April 1, 2026 at 07:01:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 1 0 0 0 100 1 0 0 0 18 6 12 0 0 0 0 7 0 0 0 100 2 0 0 3 212 104 6 0 0 2 0 295 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 4 0 0 14 12 5 8 0 0 5 0 885 0 0 0 100 5 0 0 0 7 0 4 0 0 0 0 3 0 0 0 100 6 0 0 7 15 4 38 1 0 0 0 1386 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 219 0 0 2115 100 163 6 9 7 1 1243 2 1 0 98 1 62 0 0 87 9 249 6 27 1 1 1570 1 0 0 99 2 0 0 45 282 103 325 1 23 2 0 1890 0 0 0 99 3 535 0 0 170 46 466 3 22 5 4 1783 0 0 0 99 4 45 0 14 75 8 231 1 21 7 0 2256 1 0 0 99 5 328 0 0 38 4 49 2 5 1 2 1663 1 0 0 98 6 18 0 7 71 5 343 0 16 0 0 2858 0 0 0 99 7 3 0 3 284 104 277 4 19 0 0 1459 0 0 0 99 April 1, 2026 at 07:01:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 130 0 0 0 0 25 0 0 0 100 1 0 0 0 16 3 6 0 0 0 0 12 0 0 0 100 2 0 0 17 214 102 10 0 0 5 0 316 0 0 0 100 3 17 0 0 16 1 12 0 1 0 0 12 0 0 0 100 4 5 0 14 14 4 9 1 0 0 0 576 0 0 0 100 5 0 0 0 52 21 45 0 1 1 0 305 0 0 0 100 6 0 0 7 90 38 116 1 2 1 0 1408 0 0 0 100 7 0 0 3 216 103 10 0 1 0 0 3 0 0 0 100 April 1, 2026 at 07:01:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2129 111 171 0 7 13 0 48 0 1 0 99 1 1 0 0 21 2 18 2 2 7 2 84 0 0 0 100 2 0 0 2 221 102 22 1 2 9 0 324 0 0 0 100 3 0 0 0 22 2 24 0 6 15 0 29 0 0 0 100 4 0 0 14 21 5 17 0 3 8 0 572 0 0 0 100 5 0 0 0 20 3 19 0 6 22 0 293 0 0 0 100 6 0 0 7 124 54 144 2 2 4 0 1403 0 0 0 99 7 0 0 12 224 105 19 0 2 7 0 69 0 1 0 99 April 1, 2026 at 07:01:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 127 0 1 1 0 1 0 0 0 100 1 0 0 7 16 2 18 0 1 0 0 14 0 0 0 100 2 0 0 3 210 102 2 0 0 6 0 294 0 0 0 100 3 0 0 0 16 2 14 0 0 0 0 0 0 0 0 100 4 0 0 14 15 4 14 0 0 0 0 577 0 0 0 100 5 0 0 0 39 16 28 0 0 3 0 337 0 0 0 100 6 0 0 7 116 54 140 1 0 0 0 1304 0 0 0 100 7 0 0 3 216 103 10 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:01:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2111 102 121 0 0 0 0 5 0 1 0 99 1 0 0 0 29 2 6 0 0 0 0 1 0 0 0 100 2 0 0 10 225 102 4 0 1 5 0 294 0 0 0 100 3 0 0 0 32 2 12 0 0 0 0 1 0 0 0 100 4 0 0 14 28 4 6 1 0 0 0 566 0 0 0 100 5 0 0 0 46 11 26 0 0 5 0 308 0 0 0 100 6 0 0 7 134 54 142 1 1 0 0 1308 0 0 0 100 7 0 0 3 229 103 6 0 1 0 0 11 0 0 0 100 April 1, 2026 at 07:01:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 100 278 0 19 182 0 0 0 1 0 99 1 0 0 0 68 1 134 0 13 152 0 0 0 0 0 100 2 0 0 3 283 102 155 0 15 159 0 294 0 0 0 100 3 0 0 0 100 36 175 0 19 146 0 24 0 0 0 100 4 0 0 14 114 37 153 1 13 170 0 566 0 0 0 100 5 0 0 0 93 7 166 0 9 150 0 313 0 0 0 100 6 0 0 7 170 54 249 1 8 169 0 1300 0 0 0 99 7 0 0 3 279 103 141 0 14 135 0 0 0 0 0 100 April 1, 2026 at 07:01:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 2121 103 384 4 24 3 0 1434 1 1 0 99 1 0 0 0 132 1 219 7 18 5 0 1349 1 0 0 99 2 1 0 44 289 102 175 1 11 3 0 1633 0 0 0 99 3 0 0 0 94 1 157 2 11 2 0 1346 0 0 0 99 4 0 0 14 162 4 291 2 10 5 0 1106 0 0 0 99 5 1 0 0 103 10 169 2 11 8 0 2187 1 0 0 99 6 1 0 7 152 17 281 3 18 4 0 2321 1 0 0 99 7 0 0 4 380 139 266 1 9 5 0 1336 1 0 0 99 April 1, 2026 at 07:01:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2146 103 919 22 102 15 1 5651 3 1 0 96 1 5 0 0 423 53 1082 17 78 12 0 3931 2 1 0 97 2 2 0 129 547 103 763 13 70 9 0 5326 2 1 0 97 3 5 0 0 291 2 679 5 45 12 0 4181 2 0 0 98 4 1 0 14 146 5 856 18 63 11 0 4448 2 1 0 98 5 0 0 0 370 3 651 6 31 9 0 5825 2 1 0 98 6 1 0 7 191 4 603 8 32 4 0 6921 1 1 0 98 7 2 0 3 253 105 830 10 55 6 0 4765 2 1 0 97 April 1, 2026 at 07:01:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 35 0 0 2123 100 163 0 9 9 8 92 0 0 0 100 1 272 0 0 152 57 147 1 3 2 5 874 1 0 0 99 2 730 0 118 228 102 55 0 6 4 10 486 0 0 0 99 3 99 0 0 52 1 63 0 7 9 14 165 0 0 0 100 4 14 0 14 47 5 66 0 8 2 10 401 0 0 0 100 5 1929 0 3 63 11 71 3 8 12 12 996 0 1 0 99 6 23 0 7 38 3 65 0 5 3 6 1360 0 0 0 100 7 4 0 3 236 103 24 0 5 4 1 23 0 0 0 100 April 1, 2026 at 07:01:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2104 100 124 0 0 0 0 55 0 0 0 100 1 365 0 0 22 8 15 0 0 1 0 44 0 0 0 100 2 0 0 4 307 151 104 0 1 1 0 295 0 0 0 100 3 8 0 0 16 2 14 0 0 1 0 3 0 0 0 100 4 33 0 14 10 3 8 1 0 0 0 270 0 0 0 100 5 5 0 0 16 3 18 0 1 3 0 616 0 0 0 100 6 0 0 7 17 3 46 1 1 1 0 1388 0 0 0 100 7 0 0 2 212 103 6 0 0 0 0 2 0 0 0 100 April 1, 2026 at 07:01:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 100 334 0 22 275 0 0 0 1 0 99 1 0 0 0 99 7 195 0 22 250 0 9 0 0 0 100 2 0 0 3 320 113 207 0 13 249 0 295 0 0 0 100 3 0 0 0 213 84 327 0 16 237 0 23 0 0 0 100 4 0 0 14 131 48 185 0 16 232 0 270 0 0 0 100 5 0 0 0 106 3 211 0 17 281 0 605 0 0 0 100 6 0 0 7 104 6 226 2 16 234 0 1406 0 1 0 99 7 0 0 3 311 104 226 0 22 230 0 1 0 0 0 100 April 1, 2026 at 07:01:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 16 5 10 0 0 0 0 324 0 0 0 100 2 0 0 3 208 102 2 0 0 7 0 294 0 0 0 100 3 0 0 0 108 51 104 0 0 0 0 10 0 0 0 100 4 0 0 14 10 3 8 0 0 0 0 271 0 0 0 100 5 0 0 0 20 6 20 0 0 4 0 610 0 0 0 100 6 0 0 7 13 3 38 1 0 0 0 1383 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 160 0 0 2113 100 477 0 28 2 0 1661 0 1 0 99 1 230 0 0 48 2 121 0 12 8 0 926 1 0 0 98 2 144 0 49 282 102 314 2 20 9 0 2244 1 0 0 99 3 0 0 0 159 52 335 0 17 6 0 1236 1 0 0 99 4 0 0 14 75 4 230 0 17 7 0 1847 0 0 0 99 5 122 0 0 96 15 219 1 18 10 1 1792 1 0 0 99 6 64 0 7 73 4 302 0 14 1 0 2945 0 0 0 99 7 389 0 7 258 105 113 2 10 3 2 1727 1 0 0 98 April 1, 2026 at 07:01:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 126 0 1 0 0 12 0 0 0 100 1 0 0 0 22 2 19 0 1 0 0 27 0 0 0 100 2 0 0 17 209 102 4 0 0 4 0 295 0 0 0 100 3 0 0 0 21 3 16 0 0 0 0 8 0 0 0 100 4 5 0 14 17 4 14 1 1 1 0 292 0 0 0 100 5 0 0 0 141 66 132 0 1 2 0 631 0 0 0 100 6 0 0 7 15 3 38 1 0 0 0 1388 0 0 0 100 7 12 0 3 219 104 10 0 0 0 0 13 0 0 0 100 April 1, 2026 at 07:01:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 1 0 0 3 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 208 102 2 0 0 2 0 294 0 0 0 100 3 0 0 0 25 8 20 0 1 0 0 10 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 266 0 0 0 100 5 0 0 0 112 53 108 0 0 5 0 602 0 0 0 100 6 0 0 7 14 3 38 2 0 0 0 1390 0 0 0 100 7 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2116 101 309 0 24 222 0 38 0 1 0 99 1 0 0 0 97 9 155 0 16 143 0 34 0 0 0 100 2 0 0 3 291 102 168 0 19 159 1 360 0 0 0 100 3 0 0 0 131 45 241 0 16 157 0 47 0 0 0 100 4 0 0 14 130 41 171 1 13 164 0 294 0 0 0 100 5 0 0 0 189 53 263 0 11 181 0 612 0 0 0 100 6 0 0 16 86 3 192 1 17 178 0 1308 0 1 0 99 7 0 0 10 288 103 155 0 11 117 0 67 0 0 0 100 April 1, 2026 at 07:01:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 100 117 0 2 0 0 0 0 0 0 100 1 0 0 0 26 8 16 1 0 0 0 7 0 0 0 100 2 0 0 3 209 102 4 0 0 5 0 294 0 0 0 100 3 0 0 0 13 1 10 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 4 0 0 0 0 266 0 0 0 100 5 0 0 0 117 54 110 1 0 4 0 608 0 0 0 100 6 0 0 7 15 4 40 0 1 0 0 1299 0 0 0 100 7 0 0 3 214 103 6 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:01:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2104 100 115 0 0 0 0 0 0 0 0 100 1 0 0 0 44 10 24 0 1 0 0 15 0 0 0 100 2 0 0 3 224 102 2 0 0 3 0 294 0 0 0 100 3 0 0 0 23 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 25 3 4 1 0 0 0 266 0 0 0 100 5 0 0 0 102 40 82 0 0 1 0 590 0 0 0 100 6 0 0 7 54 15 64 1 1 0 0 1302 0 0 0 100 7 0 0 3 228 103 6 0 0 0 0 3 0 0 0 100 April 1, 2026 at 07:01:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 100 121 0 0 0 0 0 0 0 0 100 1 0 0 0 27 8 26 0 0 0 0 30 0 0 0 100 2 0 0 3 209 102 2 0 0 3 0 294 0 0 0 100 3 0 0 0 14 1 10 0 0 0 0 0 0 0 0 100 4 0 0 14 13 3 12 0 0 0 0 278 0 0 0 100 5 0 0 0 32 12 24 1 0 6 0 619 0 0 0 100 6 0 0 7 114 53 138 2 0 0 0 1298 0 0 0 100 7 0 0 3 215 103 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 2157 104 1165 30 105 23 0 7434 3 1 0 95 1 0 0 0 286 9 1175 19 91 11 0 5838 3 1 0 97 2 2 0 157 487 109 978 18 70 19 0 6681 2 1 0 97 3 0 0 0 347 4 948 16 55 8 0 5144 2 1 0 97 4 14 0 14 271 48 872 14 52 8 0 6816 2 1 0 97 5 0 0 0 283 4 992 15 58 12 0 5000 2 1 0 97 6 2 0 7 240 12 1029 14 55 14 0 6810 3 1 0 96 7 6 0 3 658 108 828 11 44 10 0 5086 2 1 0 97 April 1, 2026 at 07:01:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 338 0 22 254 0 5 0 1 0 99 1 0 0 0 97 2 196 0 21 284 0 0 0 0 0 100 2 0 0 3 308 104 219 1 21 251 0 295 0 0 0 100 3 0 0 0 149 54 246 0 26 272 0 0 0 0 0 100 4 0 0 14 261 109 302 1 17 203 0 269 0 0 0 100 5 0 0 0 118 4 228 1 21 248 0 629 0 0 0 99 6 0 0 7 107 4 248 0 22 249 0 1303 0 1 0 99 7 0 0 3 284 103 235 0 23 262 0 1 0 0 0 100 April 1, 2026 at 07:01:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 1 2135 105 168 0 8 7 6 128 0 1 0 99 1 721 0 114 23 1 48 0 9 8 8 150 0 0 0 100 2 143 0 3 261 106 78 1 8 7 12 456 0 0 0 100 3 1952 0 0 58 1 81 1 10 11 13 424 0 1 0 99 4 645 0 14 141 54 135 2 5 7 7 1167 1 0 0 99 5 14 0 0 40 2 40 0 4 8 5 661 0 0 0 100 6 9 0 7 39 3 63 1 3 8 5 1432 0 0 0 99 7 7 0 3 232 102 18 0 4 2 2 96 0 0 0 100 April 1, 2026 at 07:01:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 106 132 0 1 0 0 11 0 0 0 100 1 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 2 0 0 3 210 103 4 0 0 6 0 294 0 0 0 100 3 0 0 0 15 2 10 0 0 1 0 0 0 0 0 100 4 0 0 14 110 54 104 0 0 1 0 266 0 0 0 100 5 0 0 0 16 4 14 1 0 4 0 613 0 0 0 100 6 0 0 7 15 4 38 2 0 1 0 1386 0 0 0 100 7 0 0 3 213 104 6 0 0 1 0 2 0 0 0 100 April 1, 2026 at 07:01:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 125 0 0 1 0 324 0 0 0 100 1 0 0 0 14 2 14 0 0 0 0 21 0 0 0 100 2 0 0 3 210 103 4 0 0 1 0 294 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 112 53 112 0 0 0 0 278 0 0 0 100 5 0 0 0 30 10 28 0 0 4 0 623 0 0 0 100 6 0 0 7 19 5 46 1 0 0 0 1387 0 0 0 100 7 0 0 3 212 102 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 210 103 4 0 0 4 0 294 0 0 0 100 3 0 0 0 15 2 12 0 0 0 0 1 0 0 0 100 4 0 0 14 108 53 104 0 0 0 0 266 0 0 0 100 5 0 0 0 14 3 12 1 0 2 0 603 0 0 0 100 6 0 0 7 28 10 52 1 0 0 0 1391 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 220 0 0 2125 106 426 1 41 163 3 1665 0 1 0 99 1 26 0 0 135 21 205 2 21 139 0 879 1 0 0 99 2 60 0 59 367 120 391 5 44 134 0 2233 1 1 0 98 3 29 0 0 143 37 431 3 35 154 0 1606 0 0 0 99 4 82 0 14 171 48 355 3 37 132 1 1522 1 0 0 98 5 469 0 0 133 4 398 2 37 118 6 2266 1 1 0 99 6 160 0 7 166 7 362 3 38 153 2 2823 1 1 0 99 7 65 0 3 349 102 457 3 42 132 0 1416 0 0 0 99 April 1, 2026 at 07:01:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 118 0 0 0 0 9 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 152 104 0 0 3 0 294 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 15 3 10 0 1 0 0 266 0 0 0 100 5 0 0 0 13 3 10 0 1 1 0 600 0 0 0 100 6 0 0 7 17 5 40 2 1 0 0 1391 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 859 0 7 2211 110 598 61 60 111 15 1795 3 1 0 96 1 2031 0 7 224 29 523 27 50 142 11 2735 6 1 0 94 2 2399 0 207 358 115 269 22 47 141 13 2280 4 2 0 94 3 1043 0 7 202 8 296 30 50 128 9 1232 5 1 0 94 4 1011 0 68 180 5 320 28 49 133 18 1490 3 1 0 96 5 6008 0 11 146 11 332 11 38 163 9 2241 5 1 0 94 6 2097 0 8 169 4 456 32 42 122 23 3247 5 1 0 94 7 1654 0 2 347 103 272 21 25 153 12 2050 4 1 0 96 April 1, 2026 at 07:01:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 118 0 0 0 0 0 0 0 0 100 1 0 0 7 119 53 116 0 0 0 0 17 0 0 0 100 2 0 0 3 213 103 4 0 0 2 0 294 0 0 0 100 3 34 0 0 25 9 20 0 0 0 0 13 0 0 0 100 4 0 0 14 21 2 20 0 0 0 0 278 0 0 0 100 5 0 0 0 34 12 30 1 1 3 0 617 0 0 0 100 6 4 0 7 18 4 38 1 0 0 0 1392 0 0 0 100 7 0 0 3 214 102 6 0 0 0 0 3 0 0 0 100 April 1, 2026 at 07:01:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2102 100 109 0 0 0 0 0 0 0 0 100 1 0 0 0 112 51 104 0 0 0 0 0 0 0 0 100 2 0 0 3 213 104 6 0 0 5 0 295 0 0 0 100 3 0 0 0 20 7 14 0 0 0 0 10 0 0 0 100 4 0 0 14 16 2 10 1 0 0 0 266 0 0 0 100 5 0 0 0 15 4 10 0 0 5 0 602 0 0 0 100 6 0 0 7 14 3 38 1 0 1 0 1391 0 0 0 100 7 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 100 197 0 4 54 0 0 0 1 0 99 1 0 0 0 137 51 160 0 3 52 0 0 0 0 0 100 2 0 0 3 255 104 92 0 4 67 0 295 0 0 0 100 3 0 0 0 67 32 80 0 8 39 0 9 0 0 0 100 4 0 0 14 88 26 109 0 7 65 0 266 0 0 0 100 5 0 0 0 58 4 93 0 9 57 0 606 0 0 0 100 6 0 0 7 64 6 135 2 9 61 0 1410 0 0 0 100 7 0 0 3 260 103 102 0 4 55 0 1 0 0 0 100 April 1, 2026 at 07:01:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 526 0 23 2117 101 208 6 22 34 9 227 1 1 0 98 1 82 0 22 152 51 207 2 16 248 16 275 0 1 0 99 2 31 0 13 274 106 115 0 27 38 8 432 0 0 0 100 3 20 0 7 51 8 73 1 10 3331 4 101 0 1 0 99 4 48 0 27 47 3 75 1 11 3824 3 344 0 1 0 99 5 1130 0 2 50 4 92 2 24 3301 15 883 0 1 0 99 6 47 0 13 60 4 117 3 23 33 11 1520 0 0 0 99 7 10 0 12 259 103 83 1 16 48 9 107 0 0 0 100 April 1, 2026 at 07:01:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 42 2108 101 79 0 2 6 3 12 0 1 0 99 1 29 0 0 125 52 119 0 1 2 6 9 0 0 0 100 2 6 0 7 227 104 16 0 0 6 0 316 0 0 0 100 3 1 0 7 29 4 19 0 2 2 1 13 0 0 0 100 4 1 0 14 30 3 22 0 1 3 2 279 0 0 0 100 5 0 0 0 31 5 18 1 0 6 1 608 0 0 0 100 6 134 0 7 28 4 44 1 0 7 1 1095 0 0 0 99 7 292 0 14 276 103 74 0 6 6 1 121 0 0 0 100 April 1, 2026 at 07:01:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 43 2154 100 66 0 1 2 0 0 0 1 0 99 1 0 0 0 130 31 74 0 1 0 0 23 0 0 0 100 2 0 0 345 219 103 6 0 0 7 0 294 0 0 0 100 3 0 0 7 65 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 74 2 18 1 0 0 0 276 0 0 0 100 5 0 0 0 85 11 22 0 1 7 0 610 0 0 0 100 6 0 0 7 68 3 38 0 0 0 0 1019 0 0 0 100 7 0 0 5 369 121 106 0 2 0 0 0 0 0 0 100 April 1, 2026 at 07:01:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 113 0 1 0 0 0 0 0 0 100 1 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 2 0 0 2 211 103 6 0 0 5 0 294 0 0 0 100 3 0 0 7 10 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 13 2 6 0 0 0 0 266 0 0 0 100 5 0 0 0 15 4 12 0 0 3 0 598 0 0 0 100 6 0 0 7 16 4 40 2 0 0 0 1021 0 0 0 100 7 0 0 4 309 151 104 0 1 0 0 11 0 0 0 100 April 1, 2026 at 07:01:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 2 211 103 8 0 0 5 0 294 0 0 0 100 3 0 0 0 13 2 8 0 0 0 0 0 0 0 0 100 4 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 5 0 0 0 13 3 12 0 0 6 0 601 0 0 0 100 6 0 0 7 12 3 38 0 0 0 0 1015 0 0 0 100 7 0 0 4 310 151 109 0 1 1 0 0 0 0 0 100 April 1, 2026 at 07:01:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 506 0 2 2125 119 118 0 3 34 0 135 0 0 0 99 1 346 0 2 19 1 18 0 2 28 0 187 0 0 0 100 2 1 0 2 215 103 8 0 1 2 0 297 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 9 2 10 0 0 0 0 273 0 0 0 100 5 1 0 0 49 21 42 1 1 7 0 651 0 0 0 100 6 3 0 7 20 4 50 1 1 15 0 1086 0 1 0 99 7 839 0 6 322 134 118 0 5 64 0 637 0 1 0 99 April 1, 2026 at 07:01:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 150 108 0 0 0 0 0 0 0 0 100 1 0 0 0 12 1 8 0 0 0 0 0 0 0 0 100 2 0 0 3 210 103 4 0 0 6 0 294 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 7 2 2 1 0 0 0 266 0 0 0 100 5 0 0 0 54 24 52 0 0 1 0 610 0 0 0 100 6 0 0 7 13 3 38 1 0 0 0 1015 0 0 0 100 7 0 0 3 316 102 110 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2144 140 111 0 1 0 0 0 0 0 0 100 1 0 0 0 28 11 24 0 1 0 0 0 0 0 0 100 2 0 0 3 214 103 12 0 0 7 0 305 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 1 0 14 11 2 10 1 0 0 0 321 0 0 0 100 5 0 0 0 71 32 64 0 0 2 0 647 0 0 0 100 6 0 0 7 13 3 38 1 0 0 0 1007 0 0 0 100 7 0 0 3 297 102 90 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 1 0 0 0 0 0 100 1 0 0 0 111 51 108 0 0 0 0 0 0 0 0 100 2 0 0 3 212 104 10 0 0 5 0 295 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 4 0 0 14 6 2 2 1 0 0 0 266 0 0 0 100 5 0 0 0 52 23 48 0 0 1 0 621 0 0 0 100 6 0 0 7 13 3 38 1 0 1 0 1006 0 0 0 100 7 0 0 3 211 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 100 265 0 12 120 0 0 0 1 0 99 1 0 0 0 115 14 190 0 14 76 0 0 0 0 0 100 2 0 0 3 364 140 237 0 12 120 0 295 0 0 0 100 3 0 0 0 112 55 153 0 11 72 0 0 0 0 0 100 4 0 0 14 110 55 176 0 11 110 0 266 0 0 0 100 5 0 0 0 135 26 207 1 11 117 0 626 0 0 0 100 6 0 0 7 76 4 162 1 14 97 0 1010 0 0 0 100 7 0 0 3 293 103 168 0 7 105 0 1 0 0 0 100 April 1, 2026 at 07:01:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 310 152 108 0 0 2 0 299 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 7 2 4 0 0 0 0 269 0 0 0 100 5 0 0 0 60 27 54 0 0 4 0 619 0 0 0 100 6 0 0 7 13 3 38 1 0 1 0 1006 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 120 0 1 0 0 0 0 0 0 100 1 0 0 0 11 2 4 0 1 1 0 0 0 0 0 100 2 0 0 3 310 152 110 0 1 4 0 294 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 4 0 0 14 8 3 2 0 0 1 0 266 0 0 0 100 5 0 0 0 56 25 50 0 0 10 0 625 0 0 0 100 6 0 0 7 14 4 36 2 0 1 0 1007 0 0 0 100 7 0 0 3 211 103 4 0 0 1 0 1 0 0 0 100 April 1, 2026 at 07:01:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 325 154 126 0 0 6 0 304 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 10 2 10 1 0 0 0 278 0 0 0 100 5 0 0 0 65 31 64 0 0 2 0 638 0 0 0 100 6 0 0 7 12 3 38 0 0 0 0 1007 0 0 0 100 7 0 0 3 212 102 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 152 106 0 0 7 0 294 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 55 24 50 1 0 4 0 631 0 0 0 100 6 0 0 7 13 3 38 1 0 0 0 1008 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 313 153 110 0 0 2 0 295 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 4 0 0 14 10 3 8 0 1 0 0 266 0 0 0 100 5 0 0 0 53 23 50 0 0 4 0 617 0 0 0 100 6 0 0 7 14 3 40 1 0 0 0 1006 0 0 0 100 7 0 0 3 212 102 8 0 0 3 0 0 0 0 0 100 April 1, 2026 at 07:01:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 152 104 0 0 3 0 294 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 8 2 4 0 0 1 0 266 0 0 0 100 5 0 0 0 55 24 52 0 1 2 0 623 0 0 0 100 6 0 0 7 15 4 40 1 1 0 0 1008 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 152 104 0 0 1 0 294 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 1 0 0 0 265 0 0 0 100 5 0 0 0 52 23 48 0 0 2 0 619 0 0 0 100 6 0 0 7 13 3 38 1 0 1 0 1008 0 0 0 100 7 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 123 0 1 1 0 0 0 0 0 100 1 0 0 0 9 2 4 0 1 0 0 0 0 0 0 100 2 0 0 3 323 155 124 0 1 2 0 313 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 12 3 12 0 0 0 0 277 0 0 0 100 5 0 0 0 67 30 60 1 0 2 0 632 0 0 0 100 6 0 0 7 16 4 42 1 1 3 0 1007 0 0 0 100 7 0 0 3 214 103 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:01:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 312 154 108 0 0 3 0 296 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 7 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 52 23 48 0 0 6 0 621 0 0 0 100 6 0 0 7 16 4 42 0 1 1 0 1011 0 0 0 100 7 0 0 3 211 102 6 0 2 0 0 11 0 0 0 100 April 1, 2026 at 07:01:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 311 153 109 0 0 4 0 282 0 0 0 100 3 0 0 0 10 2 5 0 1 0 0 42 0 0 0 100 4 0 0 14 9 3 6 0 0 1 0 266 0 0 0 100 5 0 0 0 55 24 52 0 0 3 0 682 0 0 0 100 6 0 0 7 19 5 44 2 0 1 0 1029 0 0 0 100 7 0 0 3 214 103 10 0 0 2 0 1 0 0 0 100 April 1, 2026 at 07:01:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 128 0 1 0 0 9 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 8 1 0 3 0 312 0 0 0 100 4 0 0 14 6 2 2 1 0 0 0 266 0 0 0 100 5 0 0 0 52 23 48 0 0 1 0 594 0 0 0 100 6 0 0 7 12 3 38 0 0 0 0 1007 0 0 0 100 7 0 0 3 211 102 4 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:01:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 120 0 1 0 0 0 0 0 0 100 1 0 0 0 11 2 4 0 1 1 0 0 0 0 0 100 2 0 0 7 307 151 102 0 0 1 0 0 0 0 0 100 3 0 0 0 12 3 4 0 0 3 0 294 0 0 0 100 4 0 0 14 9 3 2 0 0 1 0 265 0 0 0 100 5 0 0 0 58 25 50 1 0 2 0 616 0 0 0 100 6 0 0 0 14 3 32 1 0 2 0 748 0 0 0 100 7 0 0 14 214 104 8 0 1 1 0 260 0 0 0 100 April 1, 2026 at 07:01:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 117 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 317 153 116 0 0 0 0 25 0 0 0 100 3 0 0 0 9 2 5 0 0 2 0 276 0 0 0 100 4 0 0 14 11 2 11 0 1 1 0 301 0 0 0 100 5 0 0 0 65 31 58 0 0 7 0 663 0 0 0 100 6 0 0 0 9 1 34 0 0 0 0 749 0 0 0 100 7 0 0 10 215 104 8 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:01:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 1 0 0 0 0 0 100 1 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 2 0 559 0 0 0 100 5 0 0 0 56 26 50 0 0 2 0 568 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 747 0 0 0 100 7 0 0 10 212 104 6 1 0 0 0 259 0 0 0 100 April 1, 2026 at 07:01:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 3 308 151 106 0 1 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 8 1 0 0 0 561 0 0 0 100 5 0 0 0 52 23 48 0 0 1 0 631 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 748 0 0 0 100 7 0 0 10 214 104 10 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:01:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 2 0 559 0 0 0 100 5 0 0 0 55 24 50 1 0 1 0 631 0 0 0 100 6 0 0 0 11 2 36 0 1 0 0 750 0 0 0 100 7 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 310 151 108 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 0 0 560 0 0 0 100 5 0 0 0 54 24 50 0 0 1 0 600 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 748 0 0 0 100 7 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 311 151 110 0 0 0 0 11 0 0 0 100 3 0 0 0 9 1 6 0 1 1 0 0 0 0 0 100 4 0 0 14 12 3 12 0 0 2 0 572 0 0 0 100 5 0 0 0 73 34 66 0 0 4 0 649 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 747 0 0 0 100 7 0 0 10 215 104 10 1 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 152 104 0 0 0 0 1 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 4 1 0 0 0 559 0 0 0 100 5 0 0 0 52 23 48 0 0 3 0 605 0 0 0 100 6 0 0 0 9 1 34 0 0 0 0 749 0 0 0 100 7 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 1 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 152 104 0 0 0 0 1 0 0 0 100 3 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 8 0 0 4 0 560 0 0 0 100 5 0 0 0 55 24 50 1 0 1 0 638 0 0 0 100 6 0 0 0 12 2 36 1 0 1 0 748 0 0 0 100 7 0 0 10 216 105 12 0 0 0 0 260 0 0 0 100 April 1, 2026 at 07:02:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 1 1 0 0 0 0 0 100 4 0 0 14 10 3 12 0 1 2 0 560 0 0 0 100 5 0 0 0 54 24 50 0 0 5 0 603 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 747 0 0 0 100 7 0 0 10 213 104 6 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 1 0 0 0 0 0 0 100 1 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 1 0 0 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 4 0 0 14 10 4 6 0 0 7 0 561 0 0 0 100 5 0 0 0 56 25 50 0 0 4 0 622 0 0 0 100 6 0 0 0 10 2 32 0 0 1 0 749 0 0 0 100 7 0 0 10 214 105 8 1 0 1 0 260 0 0 0 100 April 1, 2026 at 07:02:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 121 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 312 151 114 0 0 0 0 14 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 17 3 16 1 0 4 0 570 0 0 0 100 5 0 0 0 68 32 58 0 0 5 0 637 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 748 0 0 0 100 7 0 0 10 216 104 10 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 1 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 10 3 6 0 0 3 0 560 0 0 0 100 5 0 0 0 56 24 52 1 1 5 0 621 0 0 0 100 6 0 0 0 11 2 36 0 0 0 0 754 0 0 0 100 7 0 0 10 213 104 8 0 1 0 0 270 0 0 0 100 April 1, 2026 at 07:02:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 152 104 0 0 0 0 1 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 8 0 0 2 0 560 0 0 0 100 5 0 0 0 52 23 48 0 0 6 0 619 0 0 0 100 6 0 0 0 10 1 34 1 0 1 0 747 0 0 0 100 7 0 0 10 214 104 10 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 2 0 561 0 0 0 100 5 0 0 0 54 24 50 0 0 2 0 623 0 0 0 100 6 0 0 0 12 2 36 1 1 0 0 749 0 0 0 100 7 0 0 10 213 104 6 1 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 4 1 0 2 0 559 0 0 0 100 5 0 0 0 52 23 48 0 0 2 0 620 0 0 0 100 6 0 0 0 9 1 34 0 0 0 0 749 0 0 0 100 7 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 319 153 120 0 0 0 0 20 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 12 3 12 0 0 0 0 572 0 0 0 100 5 0 0 0 67 32 58 1 0 4 0 633 0 0 0 100 6 0 0 0 10 1 34 1 0 1 0 747 0 0 0 100 7 0 0 10 216 104 12 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 2 0 0 3 312 153 110 0 1 1 0 1 0 0 0 100 3 0 0 0 8 1 6 0 1 0 0 2 0 0 0 100 4 0 0 14 8 3 4 0 0 4 0 561 0 0 0 100 5 0 0 0 55 24 52 0 0 2 0 627 0 0 0 100 6 0 0 0 14 2 200 1 0 0 0 1082 0 0 0 100 7 0 0 10 213 104 8 0 0 0 0 260 0 0 0 100 April 1, 2026 at 07:02:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 313 153 110 0 0 0 0 2 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 8 0 0 4 0 559 0 0 0 100 5 0 0 0 54 24 50 0 0 1 0 622 0 0 0 100 6 0 0 0 13 3 38 0 0 0 0 769 0 0 0 100 7 0 0 10 218 105 14 1 1 0 0 260 0 0 0 100 April 1, 2026 at 07:02:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 4 1 0 1 0 560 0 0 0 100 5 0 0 0 52 23 48 0 0 1 0 613 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 749 0 0 0 100 7 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 118 0 1 1 0 0 0 0 0 100 1 0 0 0 11 2 4 0 1 1 0 0 0 0 0 100 2 0 0 7 307 151 102 0 0 1 0 0 0 0 0 100 3 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 4 0 0 14 11 4 4 0 0 7 0 560 0 0 0 100 5 0 0 0 59 25 50 1 0 4 0 629 0 0 0 100 6 0 0 0 11 2 32 0 0 1 0 747 0 0 0 100 7 0 0 14 218 105 10 0 0 1 0 260 0 0 0 100 April 1, 2026 at 07:02:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 119 0 0 1 0 0 0 0 0 100 1 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 2 0 0 3 318 153 118 0 0 0 0 18 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 12 3 14 0 0 7 0 572 0 0 0 100 5 0 0 0 61 28 58 0 0 4 0 632 0 0 0 100 6 0 0 0 10 1 34 1 0 1 0 748 0 0 0 100 7 0 0 10 215 104 10 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 152 104 0 0 0 0 1 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 1 0 560 0 0 0 100 5 0 0 0 54 24 50 0 0 2 0 619 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 749 0 0 0 100 7 0 0 10 213 104 6 1 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 3 308 151 106 0 1 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 11 4 10 1 0 0 0 560 0 0 0 100 5 0 0 0 52 23 48 0 0 4 0 630 0 0 0 100 6 0 0 0 9 1 34 0 0 0 0 747 0 0 0 100 7 0 0 10 214 104 10 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 116 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 151 104 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 4 0 0 14 8 3 4 0 0 4 0 561 0 0 0 100 5 0 0 0 55 24 50 1 0 3 0 624 0 0 0 100 6 0 0 0 12 2 34 1 0 0 0 750 0 0 0 100 7 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 8 3 6 0 0 4 0 559 0 0 0 100 5 0 0 0 52 23 48 0 0 1 0 628 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 748 0 0 0 100 7 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 117 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 319 153 120 0 0 0 0 21 0 0 0 100 3 0 0 0 11 1 6 0 0 2 0 0 0 0 0 100 4 0 0 14 12 3 12 0 0 3 0 571 0 0 0 100 5 0 0 0 65 30 56 0 0 1 0 629 0 0 0 100 6 0 0 0 9 1 34 0 0 0 0 747 0 0 0 100 7 0 0 10 215 104 8 1 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 152 104 0 0 0 0 1 0 0 0 100 3 0 0 0 9 1 4 0 0 1 0 0 0 0 0 100 4 0 0 14 10 3 11 1 1 1 0 538 0 0 0 100 5 0 0 0 53 23 48 0 0 5 0 708 0 0 0 100 6 2 0 0 13 2 37 1 1 1 0 786 0 0 0 100 7 0 0 10 213 104 8 0 1 0 0 270 0 0 0 100 April 1, 2026 at 07:02:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 152 104 0 0 0 0 1 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 5 0 0 0 55 24 50 1 0 4 0 561 0 0 0 100 6 0 0 0 14 3 38 1 1 1 0 1043 0 0 0 100 7 0 0 10 216 105 12 0 0 0 0 260 0 0 0 100 April 1, 2026 at 07:02:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 120 0 0 2 0 9 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 6 0 0 0 0 18 0 0 0 100 4 0 0 14 10 2 8 0 0 1 0 266 0 0 0 100 5 0 0 0 48 21 45 0 0 0 0 538 0 0 0 100 6 0 0 0 11 2 36 0 0 1 0 1042 0 0 0 100 7 0 0 10 212 104 6 0 0 0 0 259 0 0 0 100 April 1, 2026 at 07:02:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 118 0 1 0 0 0 0 0 0 100 1 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 2 0 0 3 308 152 104 0 0 1 0 1 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 4 0 0 14 10 3 4 0 0 1 0 266 0 0 0 100 5 0 0 0 22 6 23 0 1 6 0 643 0 0 0 100 6 0 0 0 13 3 36 1 0 4 0 1042 0 0 0 100 7 0 0 10 253 124 48 1 1 1 0 280 0 0 0 100 April 1, 2026 at 07:02:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 316 153 114 0 0 0 0 17 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 10 2 10 1 0 0 0 278 0 0 0 100 5 0 0 0 23 8 20 0 0 4 0 615 0 0 0 100 6 0 0 0 12 2 36 1 0 1 0 1042 0 0 0 100 7 0 0 10 255 124 50 0 0 0 0 279 0 0 0 100 April 1, 2026 at 07:02:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 17 4 12 1 0 1 0 600 0 0 0 100 6 0 0 0 12 2 38 0 1 4 0 1042 0 0 0 100 7 0 0 10 253 124 48 0 1 0 0 279 0 0 0 100 April 1, 2026 at 07:02:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 10 0 0 2 0 597 0 0 0 100 6 0 0 0 12 2 36 1 0 8 0 1042 0 0 0 100 7 0 0 10 258 124 54 0 0 2 0 279 0 0 0 100 April 1, 2026 at 07:02:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 16 5 12 0 0 4 0 605 0 0 0 100 6 0 0 0 14 3 36 1 0 2 0 1044 0 0 0 100 7 0 0 10 252 124 46 1 0 0 0 279 0 0 0 100 April 1, 2026 at 07:02:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 126 0 1 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 1 0 0 0 265 0 0 0 100 5 0 0 0 12 3 8 0 0 4 0 622 0 0 0 100 6 0 0 0 11 2 37 0 0 0 0 1008 0 0 0 100 7 0 0 10 255 124 49 0 1 4 0 317 0 0 0 100 April 1, 2026 at 07:02:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 117 0 0 0 0 0 0 0 0 100 1 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 2 0 0 3 313 151 116 0 0 0 0 16 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 1 0 14 10 2 10 0 0 0 0 277 0 0 0 100 5 1 0 0 29 11 22 1 0 2 0 588 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 747 0 0 0 100 7 0 0 10 257 125 50 0 0 3 0 573 0 0 0 100 April 1, 2026 at 07:02:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 152 104 0 0 0 0 1 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 12 3 10 0 0 4 0 600 0 0 0 100 6 0 0 0 9 1 34 0 0 0 0 749 0 0 0 100 7 0 0 10 254 125 48 0 0 6 0 573 0 0 0 100 April 1, 2026 at 07:02:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 116 0 0 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 2 0 0 3 310 153 106 0 0 0 0 2 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 5 0 0 0 14 4 10 0 0 7 0 605 0 0 0 100 6 0 0 0 14 3 36 1 0 0 0 770 0 0 0 100 7 0 0 10 259 126 56 1 0 3 0 573 0 0 0 100 April 1, 2026 at 07:02:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 2 0 0 3 308 151 106 0 1 2 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 7 2 2 1 0 0 0 266 0 0 0 100 5 0 0 0 12 3 10 0 0 6 0 597 0 0 0 100 6 0 0 0 9 1 34 0 0 0 0 749 0 0 0 100 7 0 0 10 254 125 50 0 0 7 0 574 0 0 0 100 April 1, 2026 at 07:02:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 116 0 1 0 0 0 0 0 0 100 1 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 1 0 0 0 0 0 100 3 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 4 0 0 14 8 3 2 0 0 1 0 266 0 0 0 100 5 0 0 0 17 5 10 1 0 7 0 612 0 0 0 100 6 0 0 0 10 2 32 1 0 1 0 747 0 0 0 100 7 0 0 10 254 125 50 0 0 4 0 574 0 0 0 100 April 1, 2026 at 07:02:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 116 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 1 0 3 319 153 122 0 0 0 0 28 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 10 2 10 0 0 0 0 278 0 0 0 100 5 0 0 0 25 9 20 0 0 4 0 595 0 0 0 100 6 0 0 0 11 1 34 2 0 1 0 748 0 0 0 100 7 0 0 10 257 125 52 0 0 3 0 573 0 0 0 100 April 1, 2026 at 07:02:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 308 151 104 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 1 1 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 16 5 16 0 0 4 0 604 0 0 0 100 6 0 0 0 11 2 36 0 1 0 0 754 0 0 0 100 7 0 0 10 256 125 50 1 1 6 0 584 0 0 0 100 April 1, 2026 at 07:02:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 1 0 0 0 24 0 0 0 100 4 0 0 14 10 3 6 1 0 0 0 266 0 0 0 100 5 0 0 0 12 3 10 0 0 4 0 600 0 0 0 100 6 0 0 0 10 1 34 1 0 1 0 748 0 0 0 100 7 0 0 10 256 125 52 0 0 9 0 573 0 0 0 100 April 1, 2026 at 07:02:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 1 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 3 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 4 0 0 14 6 2 2 0 0 0 0 266 0 0 0 100 5 0 0 0 15 4 14 1 1 5 0 607 0 0 0 100 6 0 0 0 12 2 34 1 0 1 0 748 0 0 0 100 7 0 0 10 254 125 50 0 0 17 0 573 0 0 0 100 April 1, 2026 at 07:02:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 4 306 151 102 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 14 8 2 6 0 1 0 0 266 0 0 0 100 5 0 0 0 12 3 10 0 0 1 0 594 0 0 0 100 6 0 0 0 9 1 34 0 0 0 0 749 0 0 0 100 7 0 0 9 254 125 48 0 0 5 0 572 0 0 0 100 April 1, 2026 at 07:02:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 117 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 4 313 151 114 0 0 0 0 16 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 11 2 10 1 0 0 0 325 0 0 0 100 5 0 0 0 33 14 28 1 0 5 0 617 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 747 0 0 0 100 7 0 0 9 257 125 50 1 0 4 0 574 0 0 0 100 April 1, 2026 at 07:02:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 114 0 0 1 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 4 308 152 104 0 0 0 0 1 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 10 2 6 0 0 1 0 266 0 0 0 100 5 0 0 0 12 3 10 0 0 6 0 601 0 0 0 100 6 0 0 0 10 1 34 1 0 0 0 748 0 0 0 100 7 0 0 9 254 125 48 0 0 5 0 572 0 0 0 100 April 1, 2026 at 07:02:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 0 0 5 308 152 104 0 0 0 0 1 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 14 11 3 8 0 0 0 0 266 0 0 0 100 5 0 0 0 20 4 20 1 1 8 0 601 0 0 0 100 6 0 0 0 11 2 36 0 1 0 0 749 0 0 0 100 7 0 0 8 258 126 54 0 0 1 0 575 0 0 0 100 April 1, 2026 at 07:02:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 118 0 0 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 2 1296 0 6 317 151 118 1 0 0 0 112 0 0 0 100 3 0 0 0 9 1 8 0 2 0 0 27 0 0 0 100 4 0 0 15 15 2 20 1 0 0 1 292 0 0 0 100 5 13 0 0 76 52 38 1 0 6 0 754 0 0 0 99 6 1 0 0 16 1 48 1 2 1 0 833 0 0 0 100 7 0 0 9 239 115 34 0 0 7 0 569 0 0 0 100 April 1, 2026 at 07:02:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 142 0 1 1 0 0 0 0 0 100 1 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 2 1282 0 7 322 152 124 1 0 3 0 51 0 0 0 100 3 0 0 0 14 2 6 0 1 1 0 4 0 0 0 100 4 0 0 14 13 3 6 0 0 1 0 272 0 0 0 100 5 0 0 0 109 89 22 0 0 24 0 612 0 0 0 100 6 0 0 0 13 2 36 1 1 1 0 749 0 0 0 100 7 0 0 14 232 106 36 1 0 17 0 553 0 0 0 100