April 1, 2026 at 06:54:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 694 0 51 2295 133 7351 75 427 1759 8 7382 11 6 0 83 1 1080 0 88 295 15 6143 20 323 1425 5 13239 3 4 0 93 2 1242 0 65 201 13 6520 20 348 1549 5 12215 5 4 0 91 3 919 0 97 450 252 5013 13 224 1418 9 8820 2 4 0 94 4 729 0 122 539 258 4921 12 230 1398 5 11502 6 5 0 90 5 917 0 77 7144 6933 3326 14 268 3120 5 6451 2 8 0 89 6 835 0 62 191 7 7422 16 343 1585 6 12736 7 4 0 89 7 731 0 70 300 11 6437 22 307 1615 3 6588 2 4 0 94 April 1, 2026 at 06:54:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6283 0 32 2151 102 1233 2 130 1934 84 2533 2 3 0 95 1 9342 0 52 226 2 771 6 148 841 90 2849 1 16 0 83 2 4381 0 30 225 6 661 1 112 723 68 2382 1 21 0 78 3 7953 0 31 325 28 686 1 101 357 104 2449 2 6 0 93 4 3438 0 62 319 89 242 9 29 110 22 2807 12 6 0 82 5 4217 0 27 235 35 1095 1 87 1192 89 1413 1 1 0 98 6 5018 0 60 258 67 151 8 18 138 4 3085 12 6 0 82 7 4294 0 30 317 40 688 0 116 432 77 1396 1 1 0 98 April 1, 2026 at 06:54:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2107 102 150 0 4 1 0 1064 0 1 0 99 1 0 0 0 102 47 96 0 2 0 0 0 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 14 4 8 0 0 0 0 302 0 0 0 100 4 0 0 17 217 107 12 0 1 0 0 859 0 0 0 100 5 0 0 0 7 1 2 0 1 0 0 0 0 0 0 100 6 0 0 10 213 103 8 0 0 0 0 259 0 0 0 100 7 0 0 0 15 3 9 0 2 0 0 0 0 0 0 100 April 1, 2026 at 06:54:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 0 2111 102 756 0 77 788 2 1049 0 2 0 98 1 0 0 0 98 9 211 7 52 495 5 0 0 14 0 86 2 0 0 0 83 1 183 7 46 402 2 0 0 14 0 86 3 0 0 0 429 187 556 0 67 484 4 300 0 1 0 99 4 0 0 18 438 254 210 8 58 642 2 861 0 14 0 86 5 0 0 0 78 0 194 7 55 358 4 0 0 14 0 86 6 0 0 9 290 104 200 8 50 507 5 259 0 14 0 86 7 0 0 0 77 0 201 7 44 481 5 0 0 14 0 86 April 1, 2026 at 06:55:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 103 761 0 78 1288 11 1042 0 1 0 99 1 0 0 0 160 8 357 6 67 758 6 0 0 1 0 99 2 0 0 0 101 1 246 1 56 568 5 0 0 0 0 100 3 0 0 0 465 199 574 1 80 762 9 301 0 1 0 99 4 0 0 17 498 285 296 0 62 1123 9 860 0 1 0 99 5 0 0 0 104 0 245 1 62 624 7 0 0 1 0 99 6 0 0 10 302 103 247 1 60 662 5 259 0 1 0 99 7 0 0 0 100 0 261 1 65 638 8 0 0 1 0 99 April 1, 2026 at 06:55:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 693 0 75 1018 11 1044 0 1 0 99 1 0 0 0 290 52 519 0 80 428 1 1 0 1 0 99 2 0 0 0 107 0 266 0 73 383 6 0 0 0 0 100 3 0 0 0 412 176 535 0 78 627 8 300 0 1 0 99 4 0 0 17 489 276 300 0 72 764 9 860 0 1 0 99 5 0 0 0 105 0 238 0 75 344 7 0 0 0 0 100 6 0 0 10 309 104 282 0 60 594 6 260 0 1 0 99 7 0 0 0 103 2 255 1 62 357 4 1 0 0 0 100 April 1, 2026 at 06:55:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3300 0 14 2133 103 761 8 103 515 41 2079 3 4 0 93 1 4055 0 7 274 21 707 12 95 475 34 1604 1 2 0 97 2 2771 0 11 209 5 620 2 93 423 42 1062 1 4 0 95 3 749 0 15 304 99 767 1 97 468 30 2033 0 1 0 98 4 320 0 49 494 214 642 8 98 460 27 1506 0 1 0 99 5 139 0 6 224 42 455 2 66 229 25 406 0 1 0 99 6 374 0 12 359 104 472 4 69 311 21 692 0 1 0 99 7 2408 0 2 165 5 447 7 67 362 20 733 2 1 0 97 April 1, 2026 at 06:55:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 152 1 1 0 0 1127 0 1 0 99 1 16 0 0 24 6 14 0 1 1 0 8 0 0 0 100 2 0 0 0 15 1 18 0 1 1 0 0 0 0 0 100 3 0 0 0 13 3 4 0 0 1 0 300 0 0 0 100 4 0 0 24 221 108 14 0 1 1 0 861 0 0 0 100 5 0 0 0 110 52 102 0 0 1 0 0 0 0 0 100 6 0 0 10 214 103 6 0 0 1 0 259 0 0 0 100 7 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:55:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2109 102 263 1 9 64 0 1123 0 1 0 99 1 0 0 0 64 6 99 0 4 41 0 9 0 0 0 100 2 0 0 0 53 1 92 0 5 44 0 0 0 0 0 100 3 0 0 0 75 33 103 0 4 31 0 300 0 0 0 100 4 0 0 17 290 138 138 0 6 58 0 860 0 0 0 100 5 0 0 0 157 51 202 0 4 49 0 0 0 0 0 100 6 0 0 10 254 103 93 0 5 34 0 306 0 0 0 100 7 0 0 0 52 0 93 0 3 54 0 0 0 0 0 100 April 1, 2026 at 06:55:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 64 1 1 0 0 1123 0 1 0 99 1 0 0 0 56 24 48 0 1 0 0 8 0 0 0 100 2 0 0 0 56 23 50 0 4 0 0 0 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 4 0 0 17 216 106 8 0 0 0 0 859 0 0 0 100 5 0 0 0 108 10 102 0 6 0 0 0 0 0 0 100 6 0 0 10 211 103 6 0 0 0 0 260 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 9 2117 103 111 1 11 3 4 1186 0 1 0 99 1 24 0 15 99 5 107 0 12 8 6 66 0 0 0 100 2 286 0 0 33 1 50 7 13 15 3 134 0 0 0 100 3 11 0 0 27 3 25 3 5 4 0 311 0 0 0 100 4 7 0 17 232 107 40 0 7 11 9 906 0 0 0 100 5 16 0 7 121 54 123 2 7 6 2 19 0 0 0 100 6 7 0 12 222 103 27 0 5 2 2 290 0 0 0 100 7 15 0 0 15 1 21 0 6 3 3 26 0 0 0 100 April 1, 2026 at 06:55:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 56 1 0 0 0 1082 0 1 0 99 1 0 0 0 89 4 79 0 7 0 0 0 0 0 0 100 2 0 0 0 10 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 14 3 10 0 0 0 0 308 0 0 0 100 4 0 0 17 228 109 30 0 0 0 0 880 0 0 0 100 5 0 0 0 82 37 68 0 4 0 0 0 0 0 0 100 6 0 0 17 256 108 51 0 6 0 0 260 0 0 0 100 7 0 0 0 39 14 32 0 1 1 0 0 0 0 0 100 April 1, 2026 at 06:55:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 38 1 0 0 0 1063 0 1 0 99 1 0 0 7 17 0 11 0 1 0 0 0 0 0 0 100 2 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 14 4 8 0 0 0 0 301 0 0 0 100 4 0 0 17 214 106 8 0 0 0 0 859 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 10 315 103 108 0 0 0 0 259 0 0 0 100 7 0 0 0 107 50 104 0 2 0 0 0 0 0 0 100 April 1, 2026 at 06:55:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 105 48 0 0 0 0 1065 0 0 0 99 1 0 0 7 20 0 16 0 2 0 0 0 0 0 0 100 2 0 0 0 8 0 4 0 2 0 0 0 0 0 0 100 3 0 0 0 15 3 12 0 2 0 0 300 0 0 0 100 4 0 0 17 216 106 12 0 1 1 0 860 0 0 0 100 5 0 0 0 12 1 8 0 1 0 0 0 0 0 0 100 6 0 0 10 318 103 116 0 2 2 0 259 0 0 0 100 7 0 0 0 111 52 106 0 0 1 0 1 0 0 0 100 April 1, 2026 at 06:55:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 38 1 0 0 0 1077 0 1 0 99 1 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 301 0 0 0 100 4 0 0 17 215 107 10 0 0 0 0 860 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 10 315 103 110 0 0 0 0 259 0 1 0 99 7 0 0 0 106 50 102 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:55:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 104 0 0 2157 107 627 15 59 23 4 2356 3 1 0 96 1 519 0 0 302 15 564 11 38 41 8 1299 2 1 0 97 2 4854 0 9 208 2 537 16 39 69 10 1661 5 1 0 94 3 985 0 1 227 5 440 4 22 47 11 2021 2 1 0 98 4 289 0 185 328 108 458 9 29 18 3 2057 4 1 0 96 5 29 0 0 116 5 431 6 21 16 1 1232 5 0 0 95 6 197 0 10 375 107 474 4 28 15 5 1284 2 0 0 97 7 124 0 0 253 32 374 5 16 25 3 1137 1 0 0 99 April 1, 2026 at 06:55:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 103 174 1 2 0 0 1159 0 1 0 99 1 0 0 0 30 4 18 0 2 0 0 7 0 0 0 100 2 0 0 0 105 47 100 0 3 0 0 8 0 0 0 100 3 35 0 0 28 9 19 0 1 0 0 317 0 0 0 100 4 0 0 31 225 108 28 0 0 0 0 877 0 0 0 100 5 0 0 0 27 10 18 0 0 0 0 40 0 0 0 100 6 0 0 10 214 103 8 0 0 0 0 260 0 0 0 100 7 0 0 0 22 2 18 0 0 1 0 14 0 0 0 100 April 1, 2026 at 06:55:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2110 103 154 0 0 0 0 1136 0 0 0 99 1 0 0 0 12 1 2 0 1 1 0 0 0 0 0 100 2 0 0 0 108 51 100 0 0 1 0 0 0 0 0 100 3 0 0 0 25 9 16 0 0 1 0 309 0 0 0 100 4 0 0 21 219 108 14 0 1 1 0 861 0 0 0 100 5 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 6 0 0 14 212 103 6 0 0 1 0 263 0 0 0 100 7 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:55:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 102 251 1 5 69 0 1132 0 1 0 99 1 0 0 0 61 0 109 0 7 72 0 0 0 0 0 100 2 0 0 0 152 50 192 0 8 54 0 0 0 0 0 100 3 0 0 0 97 42 131 0 5 50 0 309 0 0 0 100 4 0 0 17 294 143 148 1 7 51 0 859 0 0 0 100 5 0 0 0 70 1 131 0 9 63 0 0 0 0 0 100 6 0 0 10 256 103 95 0 8 56 0 260 0 0 0 100 7 0 0 0 46 1 80 0 3 40 0 0 0 0 0 100 April 1, 2026 at 06:55:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 16 2112 103 168 1 8 6 5 1164 0 1 0 99 1 6 0 0 19 0 18 0 5 7 0 36 0 0 0 100 2 287 0 2 118 50 124 2 7 12 4 120 0 0 0 100 3 13 0 0 35 8 35 0 3 4 3 371 0 0 0 100 4 13 0 17 234 109 43 1 6 5 6 891 0 0 0 100 5 2 0 0 22 4 20 2 4 2 1 21 0 0 0 100 6 34 0 17 229 103 42 0 8 3 6 318 0 0 0 100 7 5 0 7 19 1 11 0 2 3 0 14 0 0 0 100 April 1, 2026 at 06:55:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 102 151 0 2 1 0 1081 0 1 0 99 1 0 0 0 12 0 4 0 2 0 0 0 0 0 0 100 2 0 0 0 111 50 104 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 4 0 0 17 220 109 14 0 0 0 0 860 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 10 212 103 6 0 0 0 0 260 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 103 169 1 0 0 0 1088 0 1 0 99 1 0 0 0 10 0 2 0 1 0 0 0 0 0 0 100 2 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 4 0 0 17 224 108 26 0 0 0 0 874 0 0 0 100 5 0 0 0 24 11 10 0 0 1 0 13 0 0 0 100 6 0 0 10 212 103 6 0 0 0 0 259 0 0 0 100 7 0 0 0 15 2 10 0 0 0 0 1 0 0 0 100 April 1, 2026 at 06:55:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 102 148 1 0 1 0 1074 0 1 0 99 1 0 0 0 12 0 6 0 0 0 0 0 0 0 0 100 2 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 301 0 0 0 100 4 0 0 17 219 108 12 1 0 0 0 860 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 10 212 103 6 0 0 0 0 259 0 1 0 99 7 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 April 1, 2026 at 06:55:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 103 158 0 2 0 0 1078 0 1 0 99 1 0 0 0 101 46 98 0 1 0 0 0 0 0 0 100 2 0 0 0 21 5 14 0 1 1 0 0 0 0 0 100 3 0 0 0 9 1 6 0 0 0 0 300 0 0 0 100 4 0 0 17 220 109 16 0 0 1 0 862 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 10 214 104 10 0 0 0 0 259 0 0 0 100 7 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2951 0 8 2215 102 1666 13 28 44 3 4664 12 2 0 87 1 884 0 1 262 31 886 14 24 46 3 3686 11 1 0 88 2 2698 0 1 367 1 1129 8 38 52 4 3338 5 1 0 93 3 729 0 0 225 22 1437 10 38 39 9 3481 2 1 0 97 4 188 0 576 328 108 1186 12 25 33 5 4854 15 1 0 84 5 84 0 0 168 4 1133 6 24 22 3 2664 2 1 0 98 6 67 0 10 578 103 1160 7 24 21 2 3173 4 1 0 95 7 44 0 0 241 2 892 3 16 12 1 3031 4 1 0 96 April 1, 2026 at 06:55:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 63 0 0 2385 107 2476 26 46 58 0 9696 26 2 0 72 1 26 0 0 414 15 3332 18 64 44 0 6914 9 2 0 90 2 20 0 0 267 7 3071 24 46 47 0 8797 30 1 0 69 3 21 0 0 270 11 3122 24 43 39 0 8101 29 1 0 70 4 5 0 1418 577 127 2533 6 32 40 0 7472 7 2 0 91 5 5 0 0 239 3 2375 19 34 40 0 7939 18 1 0 80 6 4 0 3 632 106 2673 9 30 15 1 6245 5 1 0 94 7 7 0 7 308 2 1884 11 34 50 0 6307 4 1 0 95 April 1, 2026 at 06:55:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2385 105 3122 34 76 38 0 6742 11 2 0 87 1 7 0 0 274 6 3057 23 65 40 0 8525 14 2 0 84 2 10 0 0 407 5 2966 18 51 43 0 6841 6 1 0 92 3 19 0 0 267 12 2400 21 47 51 0 7973 21 1 0 77 4 7 0 1417 541 113 1810 22 27 47 0 7779 21 2 0 77 5 5 0 14 579 29 1822 24 29 65 0 8553 30 1 0 69 6 15 0 3 438 105 2254 17 41 30 0 6442 16 1 0 83 7 12 0 7 256 12 3422 18 48 23 0 6878 6 1 0 92 April 1, 2026 at 06:55:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 0 2374 104 2597 25 55 49 0 7910 17 2 0 81 1 3 0 0 476 7 2737 24 50 21 0 7700 17 2 0 81 2 7 0 0 462 7 2445 19 42 61 0 7964 27 1 0 72 3 4 0 0 583 18 2184 18 42 20 0 5893 6 1 0 92 4 8 0 1402 438 108 2421 15 34 38 0 6759 11 2 0 87 5 7 0 14 273 21 3433 15 52 32 0 6635 4 1 0 95 6 8 0 3 454 109 1717 18 33 46 0 7369 21 1 0 78 7 4 0 7 324 6 2620 24 41 39 1 7986 22 1 0 76 April 1, 2026 at 06:55:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2376 104 3310 12 74 77 0 6364 3 2 0 95 1 7 0 0 250 6 3013 17 56 95 0 9027 12 2 0 86 2 7 0 0 418 13 2993 20 46 41 0 7414 15 2 0 83 3 1 0 0 335 26 2535 12 55 78 0 7846 26 1 0 73 4 7 0 1404 285 127 2636 21 55 66 0 6991 21 2 0 78 5 5 0 14 384 7 1792 25 45 107 2 7347 36 1 0 63 6 10 0 4 502 136 3010 17 50 63 0 6242 4 2 0 94 7 0 0 7 633 4 2630 17 38 85 0 6468 12 1 0 86 April 1, 2026 at 06:55:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2375 105 2430 26 55 13 0 6393 24 2 0 74 1 2 0 0 270 4 2639 16 60 24 0 7092 5 2 0 93 2 5 0 0 252 4 2250 26 49 19 0 6206 11 1 0 88 3 5 0 0 389 12 2036 19 25 35 0 6753 12 1 0 86 4 3 0 1417 246 108 2818 18 39 19 0 5955 10 2 0 88 5 12 0 0 256 12 1963 26 28 19 0 6885 44 1 0 55 6 1 0 17 559 103 2596 16 35 28 0 5576 9 1 0 89 7 4 0 7 368 34 2045 11 28 31 0 6085 10 1 0 89 April 1, 2026 at 06:55:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2381 105 2283 35 57 72 0 9570 37 2 0 61 1 5 0 7 474 6 2914 20 70 43 0 8385 6 2 0 93 2 1 0 0 454 12 2278 18 52 21 0 6665 5 1 0 94 3 1 0 0 258 12 3086 19 55 34 0 6062 6 1 0 93 4 17 0 1402 398 110 1799 28 31 51 0 9350 39 1 0 59 5 3 0 0 247 9 2724 20 38 68 1 7113 17 1 0 82 6 5 0 17 584 109 2981 12 36 34 0 7219 10 1 0 89 7 2 0 0 264 9 3328 16 36 37 0 7676 8 1 0 90 April 1, 2026 at 06:55:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2408 136 2686 16 54 37 0 6539 9 2 0 90 1 9 0 7 289 11 2416 17 45 33 0 8952 19 2 0 79 2 6 0 0 243 0 3474 10 43 27 0 6006 6 2 0 92 3 9 0 0 233 2 3717 21 41 38 0 7342 10 2 0 89 4 1 0 1406 243 105 2062 23 35 56 0 7976 23 2 0 76 5 6 0 0 350 11 1892 21 19 68 0 9362 35 1 0 64 6 3 0 15 653 106 2030 12 22 30 0 6310 13 1 0 86 7 2 0 0 460 13 2250 12 23 42 0 6580 12 1 0 87 April 1, 2026 at 06:55:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2394 115 2691 19 72 34 0 7308 8 2 0 90 1 8 0 7 600 13 2363 20 46 28 0 7656 17 2 0 81 2 0 0 0 263 5 3187 23 61 41 1 8375 11 2 0 88 3 2 0 0 259 6 2295 26 42 32 0 7434 25 1 0 74 4 2 0 1417 362 106 2094 17 36 28 0 6400 12 2 0 86 5 2 0 0 487 2 2046 9 29 43 0 5850 12 1 0 87 6 9 0 17 494 125 3171 17 32 41 2 7354 12 1 0 87 7 4 0 0 252 7 2768 19 28 36 0 6814 29 1 0 70 April 1, 2026 at 06:55:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2380 108 2804 18 73 65 0 6550 8 2 0 90 1 1 0 7 344 7 2930 25 59 81 0 7986 18 2 0 81 2 0 0 0 545 29 2500 17 59 75 0 8018 9 2 0 90 3 3 0 0 283 33 2794 19 45 46 0 7079 16 1 0 83 4 4 0 1389 277 128 3199 15 44 99 0 6973 15 2 0 83 5 4 0 0 412 5 2429 23 53 76 0 6874 28 1 0 71 6 0 0 17 517 106 2626 9 47 84 0 6616 5 1 0 94 7 12 0 0 398 1 2309 20 40 127 0 8833 30 1 0 68 April 1, 2026 at 06:55:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2375 102 2461 20 62 15 1 5886 18 2 0 81 1 1 0 0 286 3 2284 32 42 48 0 7798 46 1 0 53 2 4 0 0 385 26 2770 20 55 29 0 8854 8 2 0 90 3 4 0 0 396 6 2904 27 59 24 0 6585 11 1 0 88 4 2 0 1416 513 122 2277 14 34 39 0 6007 10 2 0 88 5 1 0 0 471 5 1910 17 26 30 0 5907 16 1 0 82 6 9 0 17 724 112 2980 21 43 26 0 6868 8 1 0 91 7 4 0 7 302 6 2854 19 26 27 1 7356 13 1 0 86 April 1, 2026 at 06:55:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2367 102 2660 22 58 36 0 6821 17 2 0 82 1 2 0 0 432 6 3090 20 49 35 0 7591 16 2 0 82 2 0 0 0 248 12 3286 10 50 29 0 8188 6 2 0 92 3 0 0 0 246 3 2675 21 41 45 0 7500 24 1 0 74 4 0 0 1404 339 109 2242 20 32 44 0 7830 22 2 0 77 5 2 0 0 488 6 1345 14 23 36 0 6657 19 1 0 80 6 7 0 3 567 115 1939 14 25 29 0 5986 17 1 0 82 7 0 0 7 553 23 2292 11 32 26 0 6264 4 1 0 95 April 1, 2026 at 06:55:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 14 2379 107 2598 35 59 28 0 7932 32 2 0 66 1 0 0 0 489 9 2877 18 55 38 0 6486 11 2 0 88 2 0 0 0 378 12 2173 23 58 36 1 8390 7 2 0 92 3 0 0 0 463 15 2545 23 50 41 1 6240 6 1 0 93 4 21 0 1417 305 110 2752 22 44 27 0 6424 10 2 0 88 5 6 0 0 457 15 2583 22 31 40 0 6219 25 1 0 74 6 2 0 3 470 117 2585 18 34 32 0 7674 19 1 0 80 7 1 0 7 601 8 2102 17 29 26 0 6499 16 1 0 82 April 1, 2026 at 06:55:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2381 104 2677 25 50 59 0 9277 29 2 0 69 1 0 0 0 330 6 3581 19 58 37 0 6605 9 2 0 89 2 0 0 0 569 8 2440 17 40 38 0 9526 17 2 0 82 3 1 0 0 746 41 2761 13 47 22 0 6059 7 1 0 91 4 1 0 1421 376 105 3028 25 49 43 0 8472 31 2 0 67 5 0 0 0 310 6 2378 22 42 50 0 7371 19 1 0 80 6 0 0 7 455 102 2283 19 31 38 0 6419 9 1 0 90 7 1 0 7 323 5 1835 14 25 25 0 6312 6 1 0 93 April 1, 2026 at 06:55:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 14 2399 120 3482 28 111 100 0 7335 7 2 0 91 1 0 0 0 462 9 2758 28 80 90 0 6420 10 2 0 88 2 3 0 0 288 23 1941 32 59 86 0 10671 33 2 0 66 3 0 0 0 286 29 2783 24 62 83 0 7175 18 1 0 80 4 0 0 1417 395 128 2306 21 60 78 0 6810 23 2 0 76 5 0 0 0 592 1 2159 15 44 78 0 6039 12 1 0 87 6 2 0 3 615 104 2403 16 44 68 0 5618 13 1 0 86 7 8 0 7 377 6 3261 20 48 59 2 7359 10 1 0 88 April 1, 2026 at 06:55:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 17 2374 105 2827 23 49 19 0 6113 18 2 0 80 1 0 0 14 276 9 3064 17 44 18 0 6950 6 2 0 92 2 0 0 0 337 15 2552 19 40 22 0 7771 11 2 0 87 3 3 0 0 492 18 1842 19 23 44 0 7742 22 1 0 76 4 0 0 1402 370 118 3145 25 44 32 0 6745 19 2 0 79 5 2 0 0 241 4 2121 21 22 23 0 6556 30 1 0 69 6 1 0 3 562 109 2248 18 39 25 0 6273 8 1 0 90 7 0 0 0 372 6 2163 17 22 30 0 6022 13 1 0 86 April 1, 2026 at 06:55:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2375 106 2191 29 53 45 0 8008 32 2 0 66 1 1 0 21 411 7 2428 18 62 38 0 6599 7 1 0 92 2 0 0 0 408 33 2815 17 51 18 0 6966 10 1 0 89 3 0 0 0 249 8 2721 18 36 30 0 6258 10 1 0 89 4 0 0 1418 331 112 2707 10 29 31 0 7405 7 2 0 91 5 1 0 0 243 2 2194 21 29 43 0 7139 28 1 0 71 6 0 0 3 454 104 2579 15 30 15 0 5988 14 1 0 85 7 0 0 0 444 6 1945 15 24 27 0 5791 18 1 0 80 April 1, 2026 at 06:55:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2378 106 2562 28 51 39 0 8240 16 2 0 82 1 0 0 21 274 7 2825 20 37 42 0 8403 26 2 0 72 2 1 0 0 277 12 2660 23 54 38 0 7994 10 2 0 89 3 0 0 0 698 6 2656 20 42 45 0 6732 11 1 0 88 4 0 0 1416 408 119 2576 18 35 40 0 7206 15 2 0 83 5 1 0 0 432 15 2026 25 29 62 0 8592 26 1 0 73 6 0 0 3 502 105 2612 14 42 35 0 6503 10 1 0 89 7 0 0 0 264 12 3500 19 36 54 0 7897 14 1 0 85 April 1, 2026 at 06:55:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2390 112 3585 16 55 21 0 6781 8 2 0 90 1 5 0 21 282 19 3487 15 44 46 0 8826 16 2 0 82 2 0 0 0 836 11 1963 15 31 30 0 6436 4 1 0 94 3 1 0 0 363 4 2504 21 28 46 0 7936 26 1 0 72 4 0 0 1418 365 105 2004 22 31 69 0 8660 25 2 0 73 5 1 0 0 446 14 1965 7 32 26 0 5355 4 1 0 95 6 1 0 3 447 102 2747 22 25 32 0 7720 25 1 0 74 7 1 0 0 272 6 2264 15 26 32 0 7289 18 1 0 81 April 1, 2026 at 06:55:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 9 2381 104 2755 29 70 100 0 8270 19 2 0 79 1 1 0 21 490 17 3089 23 83 101 0 6927 4 2 0 94 2 0 0 0 348 9 2241 25 52 101 0 7777 25 2 0 74 3 2 0 0 497 32 3379 17 56 108 1 6975 13 2 0 86 4 0 0 1417 493 141 3698 20 64 90 0 8178 4 2 0 93 5 2 0 0 508 2 1811 27 42 114 0 7633 33 1 0 66 6 1 0 3 684 107 2324 25 44 55 0 7073 22 1 0 77 7 0 0 0 462 7 2470 14 42 64 0 6230 8 1 0 91 April 1, 2026 at 06:55:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2382 112 2356 32 57 17 0 6649 22 2 0 76 1 2 0 7 378 11 2318 22 40 22 0 6217 24 1 0 75 2 2 0 14 259 11 2487 19 40 21 0 7020 23 1 0 75 3 0 0 0 519 11 1880 19 39 21 0 5087 11 1 0 88 4 5 0 1403 535 120 1896 15 35 20 0 7108 11 2 0 88 5 4 0 0 255 4 3152 15 32 22 0 7022 18 1 0 81 6 3 0 3 459 105 2449 11 28 33 1 5634 4 1 0 94 7 0 0 0 485 8 1977 11 23 19 0 5672 12 1 0 87 April 1, 2026 at 06:55:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2384 103 2966 31 57 59 0 8955 25 2 0 73 1 3 0 7 283 14 2983 25 52 43 0 9530 24 2 0 74 2 1 0 0 256 3 2541 25 51 64 0 9985 34 2 0 65 3 0 0 14 517 9 3064 14 50 22 0 7760 10 2 0 89 4 2 0 1417 252 113 2562 14 47 25 1 6920 5 2 0 93 5 0 0 0 240 8 2702 14 44 51 0 6432 8 1 0 91 6 0 0 3 495 126 2312 19 45 40 0 7250 17 1 0 82 7 2 0 0 364 1 2833 13 37 25 0 6334 4 1 0 94 April 1, 2026 at 06:55:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2379 105 2281 22 70 35 0 7821 22 2 0 77 1 7 0 0 429 17 2361 29 57 29 0 6112 11 1 0 88 2 6 0 7 416 13 2734 19 50 37 0 7312 17 2 0 82 3 0 0 0 601 14 2535 19 37 45 0 7742 14 1 0 85 4 2 0 1431 411 114 2789 24 56 26 0 7699 8 2 0 90 5 8 0 0 497 9 2739 18 35 54 1 6440 8 1 0 91 6 4 0 3 471 109 2711 18 37 63 0 8560 25 1 0 73 7 0 0 0 514 5 2379 22 36 41 0 7641 22 1 0 77 April 1, 2026 at 06:55:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2369 101 3266 22 66 45 0 7027 12 2 0 86 1 9 0 0 255 5 2533 21 48 39 0 6404 10 1 0 89 2 21 0 7 401 7 2281 15 28 45 0 6869 17 1 0 82 3 3 0 0 343 16 2598 19 35 35 0 8769 22 1 0 76 4 5 0 1393 573 116 1735 21 39 30 0 8170 25 2 0 74 5 0 0 14 255 13 2637 12 41 22 0 6319 5 1 0 94 6 0 0 7 596 103 2650 23 26 32 0 7574 24 1 0 75 7 14 0 0 455 18 1953 15 33 20 0 5863 10 1 0 89 April 1, 2026 at 06:55:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2375 106 3424 24 90 126 0 7197 14 2 0 84 1 1 0 0 277 10 3135 25 89 135 0 7014 4 2 0 94 2 0 0 7 264 16 3396 18 75 91 0 8141 14 2 0 85 3 0 0 0 455 53 1984 26 62 105 0 8980 33 1 0 66 4 0 0 1388 447 164 2686 22 63 103 0 8373 16 2 0 82 5 0 0 14 430 9 2903 23 59 110 0 5929 17 1 0 81 6 2 0 3 433 103 2131 16 49 133 0 6743 10 1 0 89 7 2 0 0 417 3 2616 24 52 102 0 6207 21 1 0 78 April 1, 2026 at 06:55:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2375 109 2218 19 49 14 0 5566 14 2 0 84 1 5 0 0 376 12 2567 31 56 14 0 6646 20 1 0 78 2 2 0 7 248 7 2194 28 43 44 0 6943 30 1 0 69 3 1 0 0 285 22 2101 16 51 28 0 5699 4 1 0 95 4 0 0 1404 378 110 2237 16 46 33 1 6358 4 2 0 95 5 0 0 0 353 13 1761 28 23 31 0 7084 38 1 0 61 6 0 0 17 454 112 2889 9 35 54 0 6767 10 1 0 88 7 3 0 0 392 5 2325 8 28 21 0 4933 4 1 0 95 April 1, 2026 at 06:55:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 22 2380 102 3030 27 54 33 0 6803 12 2 0 86 1 0 0 0 359 6 2838 16 43 46 0 7754 18 2 0 81 2 0 0 0 265 1 2446 28 31 82 0 10337 46 1 0 52 3 0 0 7 453 7 2671 21 50 45 0 8442 8 1 0 90 4 0 0 1417 719 111 2261 19 39 48 0 8996 28 2 0 70 5 5 0 0 337 7 2804 13 29 35 0 6304 4 1 0 94 6 3 0 17 532 105 3337 10 25 39 0 7735 7 1 0 91 7 1 0 0 455 34 2233 7 26 23 0 5886 5 1 0 94 April 1, 2026 at 06:55:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 56 0 0 2364 109 2959 23 71 24 0 6184 10 2 0 88 1 70 0 0 403 6 2826 21 48 36 0 6948 14 2 0 84 2 9 0 0 236 1 1625 24 40 48 0 9015 40 1 0 59 3 80 0 7 355 13 2145 22 44 36 1 7566 16 1 0 82 4 54 0 1276 255 113 2444 17 42 39 0 7588 16 2 0 82 5 162 0 0 269 21 2663 9 41 25 1 5840 6 1 0 93 6 69 0 17 655 111 2194 12 27 30 0 6225 7 1 0 92 7 2 0 0 506 8 2003 11 19 43 0 5443 10 1 0 89 April 1, 2026 at 06:55:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 151 132 0 4 0 0 13 0 0 0 100 1 0 0 0 14 2 4 0 0 1 0 13 0 0 0 100 2 0 0 0 12 0 6 0 2 0 0 13 0 0 0 100 3 0 0 7 126 12 120 2 4 0 0 866 0 0 0 100 4 0 0 17 213 103 34 0 0 0 0 1148 0 0 0 100 5 0 0 0 20 1 14 0 1 0 0 299 0 0 0 99 6 0 0 17 220 104 10 0 1 0 0 270 0 0 0 100 7 0 0 0 14 2 6 0 1 0 0 1 0 0 0 100 April 1, 2026 at 06:55:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 110 210 0 8 62 0 10 0 0 0 99 1 0 0 0 164 51 209 0 8 55 0 0 0 0 0 100 2 0 0 0 52 0 98 0 5 48 0 0 0 0 0 100 3 0 0 7 95 39 101 0 6 47 0 862 0 0 0 100 4 0 0 3 287 136 159 1 5 54 0 1136 0 0 0 100 5 0 0 0 73 1 126 0 4 41 0 294 0 0 0 100 6 0 0 17 252 103 86 1 4 52 0 266 0 0 0 100 7 0 0 0 54 1 99 0 3 36 0 0 0 0 0 100 April 1, 2026 at 06:55:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 108 122 0 0 0 0 19 0 0 0 100 1 0 0 0 112 52 108 0 0 0 0 3 0 0 0 100 2 0 0 0 8 0 4 0 0 0 0 3 0 0 0 100 3 0 0 7 17 6 14 0 0 0 0 860 0 0 0 100 4 0 0 3 211 103 34 1 0 1 0 1137 0 0 0 100 5 0 0 0 16 1 12 0 0 0 0 297 0 0 0 100 6 0 0 17 210 103 6 0 0 0 0 267 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 11 2128 107 150 0 7 5 8 77 0 0 0 99 1 13 0 2 134 52 134 0 5 5 2 45 0 0 0 100 2 283 0 18 21 2 21 2 5 11 1 102 0 0 0 100 3 5 0 15 37 7 45 1 6 0 7 920 0 0 0 100 4 7 0 13 219 103 40 1 4 3 0 1160 0 0 0 100 5 26 0 9 44 4 41 0 7 7 9 325 0 0 0 100 6 8 0 20 230 105 20 1 2 0 2 299 0 0 0 100 7 4 0 7 27 1 31 0 2 2 1 43 0 0 0 100 April 1, 2026 at 06:55:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 1 0 0 0 3 0 0 0 100 1 1 0 0 120 54 114 0 1 0 0 8 0 0 0 100 2 0 0 0 15 1 8 0 0 0 0 1 0 0 0 100 3 0 0 14 21 5 22 2 3 0 0 860 0 0 0 100 4 0 0 3 215 104 38 1 0 0 0 1080 0 0 0 100 5 0 0 0 34 11 24 0 1 0 0 308 0 0 0 100 6 0 0 17 210 103 4 0 0 0 0 266 0 0 0 100 7 0 0 0 24 5 24 0 0 0 0 19 0 0 0 100 April 1, 2026 at 06:55:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 100 111 0 1 0 0 0 0 0 0 100 1 0 0 0 117 53 104 0 0 1 0 0 0 0 0 100 2 0 0 0 11 1 2 0 0 1 0 0 0 0 0 100 3 0 0 7 25 7 16 0 0 1 0 862 0 0 0 100 4 0 0 7 215 103 34 1 1 1 0 1075 0 0 0 100 5 0 0 0 20 2 10 0 0 1 0 294 0 0 0 100 6 0 0 21 214 103 4 1 0 1 0 266 0 0 0 100 7 0 0 0 15 3 4 0 0 1 0 1 0 0 0 100 April 1, 2026 at 06:55:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 102 114 0 0 0 0 1 0 0 0 100 1 0 0 0 113 52 108 0 0 0 0 0 0 0 0 100 2 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 3 0 0 7 22 5 20 0 0 1 0 858 0 0 0 100 4 0 0 3 211 103 32 1 0 0 0 1076 0 0 0 100 5 0 0 0 18 1 16 0 0 1 0 294 0 0 0 100 6 0 0 17 210 103 4 0 0 0 0 266 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 0 0 100 1 0 0 0 113 53 108 0 0 0 0 0 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 7 19 6 16 0 0 0 0 862 0 0 0 100 4 0 0 3 210 103 34 0 1 0 0 1075 0 0 0 100 5 0 0 0 15 1 10 0 0 0 0 294 0 0 0 100 6 0 0 17 209 103 4 0 0 0 0 266 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:55:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2602 0 8 2122 103 270 3 20 20 5 929 2 1 0 97 1 410 0 1 218 51 314 5 20 20 7 794 1 0 0 99 2 2587 0 1 103 1 184 3 19 50 1 883 2 1 0 98 3 592 0 7 90 5 136 3 11 22 4 1292 1 0 0 98 4 90 0 59 271 104 167 3 12 20 4 2378 1 0 0 98 5 221 0 0 82 4 116 0 7 11 1 811 1 0 0 99 6 42 0 17 291 103 155 1 10 10 3 642 0 0 0 100 7 105 0 0 50 1 67 1 11 5 1 259 1 0 0 99 April 1, 2026 at 06:55:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 281 0 0 2219 105 653 40 66 23 0 3359 35 1 0 64 1 218 0 0 324 9 617 27 55 27 0 3060 28 1 0 72 2 354 0 0 402 26 703 16 52 22 2 2551 17 1 0 82 3 106 0 7 327 10 649 14 48 17 2 2880 19 1 0 81 4 378 0 591 446 112 519 22 45 19 3 5138 17 1 0 82 5 233 0 0 352 17 598 26 44 15 2 3265 32 1 0 67 6 276 0 46 396 104 370 18 28 17 0 4284 30 1 0 70 7 783 0 0 290 6 477 18 24 34 2 3717 19 1 0 81 April 1, 2026 at 06:55:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 96 0 0 2217 104 757 29 79 8 0 3206 13 1 0 86 1 149 0 0 266 14 614 28 60 11 0 4131 35 1 0 64 2 71 0 0 388 10 648 19 60 10 0 2992 17 1 0 82 3 229 0 7 224 6 579 35 48 15 0 5042 41 1 0 59 4 44 0 592 393 122 585 22 46 28 0 4995 34 1 0 65 5 18 0 0 364 5 617 8 38 10 0 2798 9 0 0 91 6 280 0 17 471 106 484 17 41 12 0 4089 29 1 0 70 7 69 0 0 329 12 583 18 30 12 0 3679 23 1 0 76 April 1, 2026 at 06:55:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 68 0 0 2221 105 991 15 97 114 0 3012 12 1 0 87 1 26 0 0 289 6 767 27 82 93 0 3554 24 1 0 76 2 63 0 0 176 7 685 34 63 94 2 4782 36 1 0 63 3 125 0 7 319 61 784 20 82 39 0 3864 20 1 0 79 4 5 0 591 513 171 712 14 75 43 0 3063 8 1 0 91 5 104 0 0 308 4 704 16 61 50 0 5145 21 1 0 78 6 230 0 16 544 107 716 12 79 123 0 3597 13 1 0 86 7 84 0 0 157 8 606 42 54 97 2 4267 64 1 0 35 April 1, 2026 at 06:56:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2229 104 794 26 74 20 0 3166 15 1 0 84 1 36 0 0 430 21 708 16 60 9 0 2497 8 1 0 91 2 107 0 0 367 22 581 22 64 14 1 3862 25 1 0 74 3 61 0 7 330 9 575 26 54 26 0 4019 22 1 0 77 4 80 0 634 486 107 648 12 60 11 0 3615 16 1 0 83 5 96 0 0 243 7 481 36 39 15 1 4294 57 1 0 43 6 90 0 17 497 108 558 22 44 21 0 5459 24 1 0 76 7 156 0 0 243 4 553 23 38 19 0 4153 31 1 0 68 April 1, 2026 at 06:56:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 24 0 21 2219 102 722 32 79 14 0 3562 27 1 0 72 1 58 0 0 386 20 721 25 70 17 0 3647 24 1 0 75 2 11 0 0 283 6 602 29 62 13 1 3387 27 1 0 72 3 8 0 7 397 21 620 13 57 17 0 3398 14 1 0 86 4 32 0 600 461 108 569 24 41 19 1 3672 20 1 0 79 5 81 0 0 344 10 510 21 33 16 0 3825 28 1 0 72 6 105 0 17 507 113 502 19 43 14 0 4919 27 1 0 72 7 88 0 0 195 5 576 21 40 22 3 4581 31 1 0 68 April 1, 2026 at 06:56:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 0 2242 109 810 28 82 15 0 3129 21 1 0 78 1 89 0 0 315 4 554 24 49 21 0 4337 43 1 0 56 2 111 0 0 233 11 579 24 62 16 0 4583 31 1 0 68 3 7 0 7 303 6 557 23 50 25 0 3754 30 1 0 69 4 8 0 605 421 123 602 19 47 19 0 4116 24 1 0 76 5 3 0 0 448 23 640 8 50 16 0 2814 7 1 0 92 6 117 0 17 574 112 671 12 53 15 0 4342 11 1 0 88 7 39 0 0 214 2 475 25 41 18 1 4466 32 1 0 68 April 1, 2026 at 06:56:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2246 112 667 28 69 25 1 3656 20 1 0 78 1 2 0 0 357 9 652 26 61 19 0 3251 29 1 0 70 2 8 0 0 291 4 609 31 47 23 1 4197 42 1 0 58 3 6 0 7 322 6 584 20 49 23 3 4347 17 1 0 82 4 4 0 649 559 124 618 10 51 22 2 3874 12 1 0 87 5 27 0 0 371 12 660 12 55 20 2 3737 12 1 0 87 6 4 0 15 476 109 504 32 39 19 1 4570 45 1 0 55 7 3 0 0 290 11 638 16 55 22 1 4990 21 1 0 78 April 1, 2026 at 06:56:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 14 2265 123 935 33 100 117 0 3519 22 1 0 77 1 0 0 0 374 7 727 25 89 72 2 3889 18 1 0 81 2 131 0 0 425 7 787 17 83 83 1 3600 14 1 0 86 3 4 0 0 282 31 688 21 93 85 0 3542 34 1 0 66 4 1 0 688 455 137 619 29 66 36 0 3560 31 1 0 68 5 3 0 7 446 7 749 5 73 61 0 3005 8 1 0 91 6 4 0 5 453 108 548 22 46 55 0 4721 28 1 0 71 7 3 0 0 228 8 569 29 38 50 0 6225 44 1 0 55 April 1, 2026 at 06:56:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 17 2260 125 919 29 97 14 0 4404 9 1 0 89 1 0 0 0 368 5 583 22 69 19 0 3758 19 1 0 80 2 4 0 0 440 9 688 18 57 11 0 3836 16 1 0 84 3 63 0 0 400 16 756 19 73 17 0 3226 12 1 0 87 4 6 0 658 429 107 537 17 59 18 0 4684 21 1 0 79 5 4 0 0 212 4 501 26 39 20 2 4610 40 1 0 60 6 1 0 12 445 112 534 27 45 12 1 3631 43 0 0 57 7 44 0 0 224 4 438 27 31 15 0 4568 40 1 0 60 April 1, 2026 at 06:56:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 14 2256 108 881 30 82 25 0 5278 18 1 0 81 1 6 0 0 212 4 737 29 82 24 0 5267 31 1 0 68 2 5 0 0 317 9 689 24 61 21 1 4228 23 1 0 77 3 4 0 0 473 15 802 13 78 6 1 3664 11 1 0 88 4 8 0 718 572 122 768 14 75 10 0 3657 7 1 0 92 5 4 0 0 388 14 689 15 52 19 0 4408 21 1 0 78 6 5 0 10 512 106 542 31 52 24 1 4414 40 1 0 59 7 14 0 0 256 7 498 32 39 23 1 5059 47 1 0 52 April 1, 2026 at 06:56:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2247 110 863 25 85 12 0 5166 15 1 0 83 1 0 0 0 414 10 621 22 69 18 0 4544 26 1 0 74 2 0 0 0 473 21 837 12 72 12 0 3286 7 1 0 92 3 11 0 0 320 6 708 30 61 10 0 3442 27 1 0 72 4 0 0 756 389 113 653 23 56 17 0 5605 20 1 0 79 5 42 0 0 249 12 554 41 47 22 0 4660 56 1 0 44 6 45 0 5 498 112 593 19 45 15 0 4458 26 1 0 74 7 0 0 0 264 5 604 21 53 21 0 4050 21 1 0 78 April 1, 2026 at 06:56:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2247 116 846 23 77 7 0 4428 22 1 0 76 1 3 0 21 367 8 708 16 68 15 0 4344 17 1 0 82 2 0 0 0 376 18 654 21 62 18 1 3408 9 1 0 90 3 20 0 0 267 7 474 38 43 21 1 4563 60 1 0 40 4 34 0 690 487 109 578 9 42 16 0 4178 9 1 0 91 5 0 0 0 327 4 600 17 48 11 0 3846 23 1 0 76 6 42 0 3 413 109 551 25 46 10 0 4327 34 1 0 65 7 2 0 0 356 8 579 19 51 14 0 3752 24 0 0 76 April 1, 2026 at 06:56:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2278 122 1067 31 118 87 0 5454 15 1 0 83 1 3 0 21 564 28 923 15 95 48 0 4404 9 1 0 90 2 2 0 0 358 11 746 33 78 51 1 5646 29 1 0 70 3 0 0 0 310 33 686 40 70 36 0 4853 48 1 0 51 4 1 0 831 561 139 778 23 83 52 0 4845 24 1 0 75 5 1 0 0 361 4 814 26 79 90 0 4038 29 1 0 71 6 3 0 1 628 105 717 15 68 48 0 3497 13 1 0 86 7 0 0 0 261 4 766 25 79 51 0 4598 32 1 0 68 April 1, 2026 at 06:56:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2240 107 861 22 83 19 0 4460 10 1 0 89 1 0 0 21 450 14 696 10 58 13 0 3703 9 1 0 91 2 3 0 0 338 4 647 17 66 20 0 3512 19 1 0 80 3 21 0 0 195 9 612 30 59 29 1 4654 43 1 0 57 4 0 0 716 450 107 568 20 34 19 0 5317 27 1 0 72 5 1 0 0 254 12 561 28 48 15 0 4035 44 1 0 56 6 0 0 3 563 124 631 20 42 9 0 3992 18 1 0 81 7 0 0 0 330 1 486 23 41 13 0 3871 29 0 0 70 April 1, 2026 at 06:56:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 18 2250 105 914 27 96 16 0 4320 20 1 0 78 1 2 0 21 401 14 893 19 80 8 0 5637 13 1 0 86 2 0 0 0 366 19 654 22 62 20 1 5706 33 1 0 66 3 1 0 0 342 12 881 21 73 20 0 4857 20 1 0 80 4 1 0 814 606 115 834 15 68 16 0 3762 17 1 0 82 5 0 0 0 248 5 662 41 59 15 0 5683 50 1 0 49 6 0 0 5 514 108 706 22 53 22 0 5415 32 1 0 67 7 0 0 0 394 6 619 17 52 26 1 5013 14 1 0 86 April 1, 2026 at 06:56:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2277 113 1128 29 92 7 0 3728 7 1 0 91 1 2 0 7 467 12 779 16 73 18 0 4801 18 1 0 81 2 1 0 14 218 8 840 34 71 30 0 6046 44 1 0 55 3 1 0 0 367 11 793 18 59 24 0 4522 22 1 0 78 4 1 0 871 511 118 742 28 65 15 0 4778 26 1 0 73 5 0 0 0 359 12 635 36 48 21 0 5038 42 1 0 58 6 1 0 3 625 107 684 21 64 23 0 5132 16 1 0 84 7 16 0 0 373 9 638 22 40 29 1 6759 24 1 0 75 April 1, 2026 at 06:56:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2257 118 926 29 96 20 1 5712 24 1 0 75 1 0 0 7 497 12 927 23 90 21 0 4268 15 1 0 84 2 0 0 0 476 21 912 19 80 15 0 5070 10 1 0 89 3 2 0 14 381 6 724 20 67 18 0 4729 20 1 0 79 4 0 0 815 542 113 820 16 66 21 1 4500 21 1 0 78 5 0 0 0 371 3 645 24 64 25 0 5194 18 1 0 81 6 0 0 3 549 105 643 29 46 19 0 4991 43 1 0 56 7 0 0 0 307 8 575 26 49 18 0 5420 46 1 0 53 April 1, 2026 at 06:56:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2293 113 1123 33 124 55 0 5660 17 2 0 81 1 0 0 7 443 10 1182 29 110 69 0 6109 19 1 0 80 2 0 0 0 504 10 978 22 93 86 0 5978 23 1 0 76 3 0 0 0 538 55 1111 22 114 60 0 4781 13 1 0 86 4 0 0 1011 693 131 966 7 94 49 0 4547 10 1 0 89 5 0 0 0 433 2 816 34 83 39 0 6055 35 1 0 65 6 0 0 2 448 104 912 41 74 69 0 5793 43 1 0 57 7 0 0 0 206 1 745 30 64 46 1 6728 40 1 0 59 April 1, 2026 at 06:56:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2287 118 1147 32 97 18 0 6294 26 1 0 72 1 0 0 7 548 14 1069 25 89 18 1 6101 12 1 0 87 2 0 0 0 536 8 1059 26 80 23 0 6300 21 1 0 78 3 0 0 0 338 6 838 36 66 28 0 6315 40 1 0 59 4 0 0 1026 474 113 873 25 52 23 0 6777 35 1 0 63 5 0 0 0 416 1 849 30 54 15 0 6592 26 1 0 73 6 0 0 3 663 108 909 17 66 17 0 5431 21 1 0 78 7 0 0 0 518 9 947 16 66 19 0 4872 17 1 0 82 April 1, 2026 at 06:56:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2331 117 1306 37 132 16 0 6499 15 2 0 84 1 0 0 0 419 8 1262 27 134 22 0 6932 21 1 0 77 2 0 0 0 461 6 1147 30 127 21 0 5805 18 1 0 81 3 0 0 0 644 28 1225 23 109 24 0 7076 18 1 0 81 4 0 0 1234 316 112 830 52 70 16 0 7790 60 1 0 38 5 0 0 14 468 8 1018 23 91 32 0 6601 18 1 0 81 6 0 0 3 586 104 965 27 79 24 0 6879 27 1 0 72 7 0 0 0 488 3 942 24 81 17 0 6310 21 1 0 78 April 1, 2026 at 06:56:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2374 114 1764 57 223 35 0 9052 29 2 0 69 1 3 0 7 326 10 1713 56 224 23 0 9683 24 2 0 74 2 0 0 0 416 6 1580 58 172 30 0 9730 49 1 0 50 3 1 0 0 280 15 1815 45 196 26 0 10485 23 2 0 76 4 4 0 1348 583 114 1593 32 163 31 0 8957 13 2 0 85 5 2 0 0 329 20 1503 34 146 32 0 8518 19 1 0 80 6 6 0 17 496 111 1467 31 130 30 0 8321 18 1 0 81 7 0 0 0 465 7 1383 31 110 37 0 9617 24 1 0 75 April 1, 2026 at 06:56:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 105 0 0 2180 151 329 6 32 4 0 640 2 0 0 98 1 33 0 7 124 8 345 6 31 11 1 1818 1 0 0 99 2 85 0 0 40 1 216 9 21 7 0 622 1 0 0 99 3 0 0 0 36 4 221 6 19 4 0 1798 1 0 0 99 4 18 0 101 216 105 129 3 21 5 1 873 3 0 0 97 5 22 0 0 23 1 128 3 14 4 0 888 1 0 0 99 6 7 0 17 234 104 146 3 20 6 0 777 3 0 0 97 7 36 0 0 32 2 101 6 13 1 0 759 4 0 0 96 April 1, 2026 at 06:56:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2128 109 279 0 9 97 0 10 0 0 0 100 1 0 0 7 200 57 264 1 5 53 0 1153 0 0 0 99 2 0 0 0 56 0 102 0 7 54 0 0 0 0 0 100 3 0 0 0 100 45 148 1 10 71 0 1134 0 0 0 100 4 0 0 3 317 148 162 0 8 64 0 0 0 0 0 100 5 0 0 0 59 0 114 0 11 49 0 0 0 0 0 100 6 0 0 17 295 103 188 1 10 63 0 268 0 0 0 100 7 0 0 0 78 0 144 0 8 72 0 0 0 0 0 100 April 1, 2026 at 06:56:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 124 0 0 0 0 9 0 0 0 100 1 0 0 7 123 58 118 0 0 0 0 1154 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 38 0 1 0 0 1136 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 1 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 17 207 102 2 0 0 0 0 266 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 128 0 0 0 0 15 0 0 0 100 1 0 0 7 124 58 120 0 1 1 0 1157 0 0 0 100 2 0 0 0 6 0 2 0 1 0 0 3 0 0 0 100 3 0 0 0 18 3 42 1 0 1 0 1144 0 0 0 100 4 0 0 3 214 104 8 0 1 1 0 1 0 0 0 100 5 0 0 0 7 0 6 0 2 4 0 3 0 0 0 100 6 0 0 17 214 104 12 0 1 0 0 271 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38 0 18 2166 151 151 4 12 5 7 36 0 1 0 99 1 19 0 19 138 10 141 1 9 10 3 1210 0 0 0 99 2 293 0 0 39 2 31 0 5 9 4 120 0 0 0 100 3 5 0 9 42 5 75 1 7 2 1 1143 0 0 0 100 4 3 0 7 241 106 34 1 4 0 2 39 0 0 0 100 5 1 0 11 35 11 20 1 9 2 4 32 0 0 0 100 6 5 0 25 229 104 23 0 4 2 2 309 0 0 0 100 7 4 0 8 23 0 28 2 7 2 2 22 0 0 0 99 April 1, 2026 at 06:56:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 108 127 0 2 0 0 4 0 0 0 100 1 0 0 7 130 52 118 1 2 1 0 1153 0 0 0 100 2 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 3 0 0 0 16 3 36 1 0 1 0 1078 0 0 0 100 4 0 0 7 211 103 2 0 0 1 0 0 0 0 0 100 5 0 0 0 11 1 2 0 1 1 0 0 0 0 0 100 6 0 0 28 212 103 6 1 1 1 0 268 0 0 0 100 7 0 0 0 11 2 2 0 0 1 0 1 0 0 0 100 April 1, 2026 at 06:56:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 100 125 0 2 2 0 0 0 0 0 100 1 0 0 7 130 58 128 0 1 0 0 1153 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 14 3 36 1 0 0 0 1075 0 0 0 100 4 0 0 3 210 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 17 211 102 6 0 1 0 0 266 0 0 0 100 7 0 0 0 10 1 4 0 0 1 0 0 0 0 0 100 April 1, 2026 at 06:56:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 7 126 58 122 0 1 1 0 1152 0 0 0 100 2 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 3 0 0 0 10 2 34 0 0 0 0 1075 0 0 0 100 4 0 0 3 211 103 4 0 1 1 0 0 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 0 0 17 210 103 4 0 0 0 0 268 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 7 124 58 118 1 0 0 0 1153 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 36 1 0 0 0 1076 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 9 3 2 0 0 0 0 1 0 0 0 100 6 0 0 17 207 102 2 0 0 0 0 266 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 06:56:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 830 0 0 2229 105 1002 43 132 36 9 4220 9 1 0 90 1 229 0 7 332 19 862 34 104 36 8 5627 13 1 0 86 2 4890 0 9 326 23 829 25 83 48 8 5164 19 2 0 80 3 961 0 1 248 3 862 21 93 30 18 5961 10 1 0 89 4 361 0 493 414 104 713 23 83 18 4 4001 9 1 0 90 5 81 0 0 255 12 648 21 75 28 4 4402 7 1 0 93 6 100 0 3 467 108 696 15 75 23 4 4021 11 1 0 88 7 163 0 14 180 10 799 17 82 29 4 3884 9 1 0 90 April 1, 2026 at 06:56:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 268 1 1 0 0 331 0 0 0 100 1 0 0 7 23 7 18 0 0 0 0 1157 0 0 0 100 2 34 0 0 121 57 114 0 0 0 0 11 0 0 0 100 3 0 0 0 13 4 38 0 0 1 0 1133 0 0 0 100 4 3 0 3 220 104 16 0 2 0 0 8 0 0 0 100 5 0 0 0 8 0 4 0 1 1 0 3 0 0 0 100 6 0 0 3 208 101 2 0 1 0 0 0 0 0 0 100 7 0 0 14 9 2 4 1 1 0 0 266 0 0 0 100 April 1, 2026 at 06:56:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 197 0 5 76 0 0 0 0 0 100 1 0 0 7 65 7 103 0 5 42 0 1153 0 0 0 100 2 0 0 0 174 56 223 0 10 72 0 10 0 0 0 100 3 0 0 0 100 37 147 1 11 48 0 1137 0 0 0 100 4 0 0 3 290 135 92 0 5 39 0 0 0 0 0 100 5 0 0 0 60 1 108 0 5 42 0 2 0 0 0 100 6 0 0 3 271 102 127 0 4 52 0 2 0 0 0 100 7 0 0 14 60 2 115 0 8 58 0 266 0 0 0 100 April 1, 2026 at 06:56:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 120 0 1 3 0 0 0 0 0 100 1 0 0 7 21 7 18 0 1 0 0 1154 0 0 0 100 2 0 0 0 117 56 112 0 0 0 0 9 0 0 0 100 3 0 0 0 13 3 36 1 0 1 0 1133 0 0 0 100 4 0 0 3 219 104 12 0 0 0 0 1 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 7 1 4 0 0 2 0 266 0 0 0 100 April 1, 2026 at 06:56:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 17 2105 100 135 0 8 2 4 36 0 1 0 99 1 9 0 7 41 8 43 2 5 9 1 1201 0 0 0 100 2 296 0 2 134 56 137 1 9 18 7 140 0 0 0 100 3 6 0 2 28 6 63 2 6 0 2 1189 0 0 0 100 4 9 0 3 235 105 29 0 2 4 3 24 0 0 0 100 5 27 0 7 27 3 32 0 5 3 7 39 0 0 0 99 6 2 0 10 221 103 18 0 3 4 3 34 0 0 0 100 7 4 0 16 18 2 24 2 3 3 1 284 0 0 0 100 April 1, 2026 at 06:56:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 117 0 0 1 0 1 0 0 0 100 1 0 0 14 32 10 28 0 1 0 0 1158 0 0 0 100 2 0 0 0 108 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 16 3 40 0 0 0 0 1083 0 0 0 100 4 0 0 3 225 104 22 0 0 0 0 12 0 0 0 100 5 0 0 0 16 6 6 0 0 0 0 11 0 0 0 100 6 0 0 3 222 104 18 0 0 0 0 19 0 0 0 100 7 0 0 14 12 1 4 1 0 0 0 266 0 0 0 100 April 1, 2026 at 06:56:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 100 117 0 1 0 0 0 0 0 0 100 1 0 0 7 33 8 24 0 0 1 0 1154 0 0 0 100 2 0 0 0 108 51 100 0 0 1 0 0 0 0 0 100 3 0 0 0 17 5 38 1 0 1 0 1077 0 0 0 100 4 0 0 3 218 103 10 0 0 1 0 0 0 0 0 100 5 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 6 0 0 3 210 102 2 0 0 1 0 2 0 0 0 100 7 0 0 14 10 3 4 0 0 1 0 267 0 0 0 100 April 1, 2026 at 06:56:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 7 27 8 24 0 0 0 0 1152 0 0 0 100 2 0 0 0 109 50 106 0 1 2 0 0 0 0 0 100 3 0 0 0 14 3 38 1 0 1 0 1075 0 0 0 100 4 0 0 3 218 103 10 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 209 101 2 0 0 0 0 0 0 0 0 100 7 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:56:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 104 0 0 0 0 0 0 0 0 100 1 0 0 7 23 7 18 2 0 0 0 1153 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 12 3 36 1 0 0 0 1077 0 0 0 100 4 0 0 4 217 103 10 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 2 209 102 2 0 0 0 0 2 0 0 0 100 7 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:56:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 124 0 0 2212 103 1156 10 15 24 8 2278 6 1 0 92 1 213 0 7 311 11 694 8 15 39 8 2651 8 1 0 91 2 2731 0 9 313 28 794 11 13 64 35 2135 14 6 0 80 3 627 0 0 337 12 556 5 28 71 18 3409 2 1 0 97 4 333 0 662 436 105 720 8 23 47 16 1781 11 1 0 88 5 146 0 0 366 9 639 6 13 13 11 1268 9 1 0 91 6 70 0 3 393 101 542 4 14 63 13 1963 1 1 0 98 7 90 0 14 262 1 325 5 10 14 6 900 5 0 0 94 April 1, 2026 at 06:56:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 175 0 0 2347 113 1176 17 28 48 0 3281 16 2 0 82 1 5 0 7 339 18 1918 10 24 50 0 5188 10 2 0 88 2 90 0 0 588 8 1057 8 16 30 1 3386 9 1 0 90 3 218 0 0 611 14 1216 18 20 7 1 3593 16 1 0 83 4 208 0 1416 669 115 1258 19 14 8 0 2455 20 1 0 79 5 324 0 19 467 25 1365 12 20 14 2 2853 21 1 0 78 6 101 0 3 725 114 1071 11 19 34 0 3336 12 1 0 87 7 95 0 14 404 9 1418 14 14 13 1 3427 17 1 0 82 April 1, 2026 at 06:56:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2349 119 1222 14 17 6 0 2879 18 2 0 80 1 35 0 7 577 33 1071 9 18 3 0 2915 16 1 0 83 2 3 0 0 567 7 1363 14 13 5 0 3094 21 1 0 78 3 13 0 0 592 17 1089 6 18 63 0 4589 8 1 0 91 4 3 0 1416 463 107 1817 10 14 60 0 3643 12 2 0 87 5 4 0 0 697 7 1056 9 5 27 0 2518 15 1 0 84 6 1 0 4 707 104 822 7 4 47 0 3163 7 1 0 92 7 12 0 14 583 9 1229 16 6 4 0 2744 21 1 0 78 April 1, 2026 at 06:56:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 0 2358 110 1260 26 45 41 0 3060 16 2 0 82 1 8 0 7 563 22 1542 15 37 61 0 3762 16 1 0 82 2 3 0 0 333 18 1871 15 41 90 1 4419 13 1 0 86 3 7 0 0 545 36 1139 17 37 91 1 4744 9 1 0 90 4 6 0 1417 631 141 1356 12 27 84 0 3103 9 1 0 90 5 19 0 0 665 10 1338 16 41 51 1 2500 20 1 0 79 6 2 0 3 609 115 1262 15 42 38 0 2786 16 1 0 83 7 6 0 14 385 12 1432 26 30 70 0 3121 22 1 0 77 April 1, 2026 at 06:56:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2354 123 1162 11 36 49 0 3625 6 2 0 92 1 5 0 7 709 19 1210 13 23 5 0 2739 20 1 0 78 2 6 0 0 252 15 1898 13 17 45 1 4750 17 1 0 82 3 5 0 0 677 14 989 13 11 36 0 3504 9 1 0 90 4 9 0 1418 516 115 1215 23 19 6 0 3995 22 2 0 77 5 4 0 0 679 18 986 7 8 27 0 2688 11 1 0 88 6 7 0 3 686 120 1065 10 10 4 0 2184 17 1 0 82 7 12 0 14 522 13 1114 13 15 3 0 2359 18 1 0 81 April 1, 2026 at 06:56:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 2336 112 1221 16 14 3 0 2547 21 2 0 77 1 13 0 7 517 27 1398 14 17 4 0 2953 18 1 0 81 2 8 0 0 632 26 1090 13 5 3 0 2572 23 1 0 76 3 0 0 0 685 22 1048 12 14 8 0 3135 15 1 0 84 4 0 0 1417 672 113 905 5 12 56 0 4770 3 2 0 95 5 5 0 0 693 15 1126 10 4 6 0 2186 17 1 0 83 6 1 0 3 585 107 908 6 1 62 0 3240 8 1 0 91 7 0 0 14 335 4 1734 11 9 13 0 3858 13 1 0 86 April 1, 2026 at 06:56:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2374 129 1223 14 16 29 0 2915 18 2 0 81 1 16 0 7 678 19 1170 16 25 41 0 3457 14 1 0 85 2 10 0 0 541 29 1346 12 23 21 1 3317 15 1 0 84 3 15 0 0 621 21 1176 16 16 19 0 3221 22 1 0 77 4 13 0 1416 716 117 973 13 11 24 0 3587 10 1 0 89 5 11 0 0 669 25 1051 13 16 19 0 2481 17 1 0 82 6 1 0 4 499 102 1392 15 13 69 0 3952 9 1 0 90 7 7 0 14 349 12 1586 16 13 28 0 3499 16 1 0 83 April 1, 2026 at 06:56:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 149 0 10 2358 117 1356 15 58 71 11 2781 20 2 0 78 1 240 0 31 567 32 1225 20 41 77 12 3264 15 1 0 84 2 5445 0 16 634 20 1256 18 32 130 17 3091 20 2 0 78 3 1397 0 16 658 20 1193 16 39 88 14 3766 20 1 0 79 4 55 0 1326 668 113 1014 12 31 55 18 4466 8 2 0 90 5 80 0 12 459 40 1303 14 27 71 8 3075 18 1 0 81 6 351 0 10 436 102 2134 17 29 51 21 4282 14 2 0 84 7 108 0 29 672 4 941 7 25 55 15 3168 6 1 0 93 April 1, 2026 at 06:56:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2119 106 211 0 11 64 0 13 0 0 0 100 1 0 0 14 164 47 216 0 8 81 0 268 0 0 0 100 2 0 0 0 77 1 137 0 7 76 0 8 0 0 0 100 3 0 0 0 104 37 114 1 7 69 0 901 0 0 0 100 4 33 0 17 311 145 142 1 9 45 0 1153 0 0 0 99 5 0 0 0 73 7 117 0 2 76 0 10 0 0 0 100 6 0 0 3 274 101 132 0 6 49 0 1 0 0 0 100 7 0 0 14 67 2 116 0 8 32 0 281 0 0 0 100 April 1, 2026 at 06:56:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 101 117 0 0 0 0 0 0 0 0 100 1 0 0 7 116 53 108 0 1 0 0 307 0 0 0 100 2 0 0 0 12 2 8 0 1 0 0 2 0 0 0 100 3 0 0 0 18 3 14 0 0 0 0 894 0 0 0 100 4 4 0 4 228 111 48 0 0 0 0 1147 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 6 0 0 2 211 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 6 1 4 0 1 0 0 266 0 0 0 100 April 1, 2026 at 06:56:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2105 101 116 0 0 0 0 0 0 0 0 100 1 0 0 7 114 53 106 1 0 0 0 260 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 18 3 14 0 0 0 0 894 0 0 0 100 4 0 0 3 225 110 46 1 0 0 0 1143 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 6 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 6 1 4 0 1 0 0 266 0 0 0 100 April 1, 2026 at 06:56:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 125 1 1 0 0 16 0 0 0 100 1 0 0 7 112 53 106 0 0 0 0 260 0 0 0 100 2 0 0 0 10 2 8 0 1 0 0 2 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 894 0 0 0 100 4 0 0 3 228 112 50 1 0 0 0 1147 0 0 0 100 5 0 0 0 22 7 18 0 1 0 0 18 0 0 0 100 6 0 0 3 208 101 4 0 1 0 0 13 0 0 0 100 7 0 0 14 10 1 6 1 0 0 0 267 0 0 0 100 April 1, 2026 at 06:56:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 208 0 15 2124 102 257 4 33 28 8 322 0 1 0 99 1 49 0 7 148 9 181 2 24 39 3 648 0 1 0 99 2 3228 0 32 119 21 151 1 26 96 5 852 1 1 0 99 3 1245 0 0 129 11 230 6 24 62 12 1414 1 0 0 99 4 2885 0 60 329 130 220 4 15 12 12 1589 1 1 0 98 5 294 0 3 112 38 116 3 17 15 8 405 4 0 0 96 6 109 0 10 288 101 133 3 17 17 9 777 2 1 0 97 7 123 0 16 84 3 148 3 21 19 11 664 2 0 0 97 April 1, 2026 at 06:56:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 222 0 7 75 0 0 0 1 0 99 1 0 0 7 69 2 116 0 7 46 0 263 0 0 0 100 2 0 0 0 61 5 98 0 8 57 0 3 0 0 0 100 3 33 0 7 109 40 119 0 6 72 0 901 0 0 0 100 4 0 0 3 295 142 122 0 4 60 0 1135 0 0 0 100 5 0 0 0 155 48 207 0 5 59 0 0 0 0 0 100 6 0 0 3 284 102 154 0 6 60 0 0 0 0 0 100 7 0 0 14 58 1 105 0 4 59 0 266 0 0 0 100 April 1, 2026 at 06:56:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 123 0 1 0 0 9 0 0 0 100 1 0 0 7 13 2 4 1 0 0 0 260 0 0 0 100 2 0 0 0 16 4 12 0 0 0 0 4 0 0 0 100 3 0 0 7 16 4 12 0 2 0 0 897 0 0 0 100 4 0 0 3 218 106 40 1 1 0 0 1137 0 0 0 100 5 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 6 0 0 3 208 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:56:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2119 107 126 0 0 0 0 10 0 0 0 100 1 0 0 7 11 2 4 0 0 0 0 260 0 0 0 100 2 0 0 0 14 3 10 0 0 0 0 2 0 0 0 100 3 0 0 0 19 4 14 0 0 1 0 916 0 0 0 100 4 0 0 3 217 106 38 1 0 1 0 1137 0 0 0 100 5 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 6 0 0 3 210 102 2 0 0 0 0 1 0 0 0 100 7 0 0 14 7 1 2 1 0 0 0 266 0 0 0 100 April 1, 2026 at 06:56:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1655 0 10 2158 106 536 5 75 48 41 917 2 1 0 97 1 2814 0 37 185 3 289 2 45 51 24 1120 1 1 0 98 2 26195 0 38 167 4 336 10 51 96 30 1653 6 19 0 74 3 3177 0 4 192 4 326 6 49 109 36 2180 1 1 0 97 4 7974 0 135 435 116 479 5 62 192 54 2941 1 2 0 97 5 255 0 5 279 90 479 4 64 52 50 911 0 0 0 99 6 144 0 16 409 110 362 1 51 33 35 1461 0 0 0 99 7 161 0 29 185 3 334 2 47 39 34 866 0 0 0 99 April 1, 2026 at 06:56:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 102 114 0 3 0 0 1 0 0 0 100 1 0 0 7 20 3 4 0 0 1 0 259 0 0 0 100 2 0 0 28 18 4 10 0 1 4 0 3 0 0 0 100 3 0 0 0 23 5 12 0 0 4 0 895 0 0 0 100 4 45 0 14 232 109 48 1 1 2 0 1058 0 0 0 99 5 0 0 0 88 38 72 0 0 1 0 0 0 0 0 100 6 0 0 7 240 114 28 0 1 1 0 0 0 0 0 100 7 0 0 14 19 2 8 0 3 1 0 266 0 0 0 100 April 1, 2026 at 06:56:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2149 104 214 0 7 56 0 2 0 1 0 99 1 0 0 7 89 2 88 1 7 36 0 263 0 0 0 100 2 0 0 21 88 1 100 0 8 39 0 0 0 0 0 100 3 0 0 231 97 34 112 0 9 59 0 894 0 0 0 100 4 0 0 3 324 140 136 1 7 51 0 1054 0 0 0 99 5 0 0 0 86 1 87 0 6 20 0 0 0 0 0 100 6 0 0 3 398 152 213 0 2 40 0 24 0 0 0 100 7 0 0 14 89 1 96 0 7 29 0 266 0 0 0 100 April 1, 2026 at 06:56:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 118 0 0 0 0 0 0 0 0 100 1 0 0 7 10 2 4 0 0 0 0 260 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 3 0 0 0 13 4 10 0 1 0 0 894 0 0 0 100 4 0 0 3 228 110 52 0 0 0 0 1054 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 14 7 1 2 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:56:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 118 0 0 0 0 6 0 0 0 100 1 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 14 4 8 1 0 0 0 893 0 0 0 100 4 0 0 3 226 111 48 1 0 2 0 1052 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 14 6 1 2 1 0 0 0 266 0 0 0 100 April 1, 2026 at 06:56:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 122 0 0 2 0 3 0 0 0 100 1 0 0 7 12 2 10 0 1 0 0 264 0 0 0 100 2 0 0 0 21 4 20 0 0 0 0 22 0 0 0 100 3 0 0 0 17 4 16 0 0 0 0 905 0 0 0 100 4 0 0 4 236 112 58 1 0 2 0 1061 0 0 0 100 5 0 0 0 14 9 0 0 0 0 0 0 0 0 0 100 6 0 0 2 313 151 112 0 0 0 0 14 0 0 0 100 7 0 0 14 12 1 12 1 0 1 0 274 0 0 0 100 April 1, 2026 at 06:56:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 120 0 1 1 0 2 0 0 0 100 1 0 0 7 13 3 6 1 0 0 0 261 0 0 0 100 2 3 0 0 11 2 6 0 0 0 0 5 0 0 0 100 3 0 0 0 13 4 8 0 0 0 0 894 0 0 0 100 4 0 0 4 228 110 50 1 0 1 0 1054 0 0 0 100 5 3 0 0 7 1 2 0 0 0 0 5 0 0 0 100 6 0 0 2 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:56:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 116 0 0 0 0 3 0 0 0 100 1 0 0 7 11 2 6 0 0 0 0 260 0 0 0 100 2 0 0 0 12 2 10 0 1 0 0 2 0 0 0 100 3 0 0 0 16 4 12 0 0 0 0 895 0 0 0 100 4 0 0 3 226 111 50 0 0 1 0 1049 0 0 0 100 5 0 0 0 9 0 8 0 0 1 0 0 0 0 0 100 6 0 0 3 308 151 102 0 0 0 0 0 0 0 0 100 7 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 120 0 0 0 0 6 0 0 0 100 1 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 14 4 8 1 0 0 0 894 0 0 0 100 4 0 0 3 232 112 56 1 0 0 0 1047 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 14 6 1 2 1 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 116 0 0 1 0 0 0 0 0 100 1 0 0 7 10 2 4 0 0 0 0 260 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 3 0 0 0 13 4 10 0 1 0 0 895 0 0 0 100 4 0 0 3 231 111 56 1 0 0 0 1049 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 311 153 104 0 0 0 0 2 0 0 0 100 7 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 134 0 0 0 0 17 0 0 0 100 1 1 0 7 43 11 42 1 1 0 0 305 0 0 0 100 2 0 0 0 9 1 6 0 0 0 0 15 0 0 0 100 3 0 0 0 21 5 24 0 0 0 0 911 0 0 0 100 4 2 0 3 219 107 44 0 0 0 0 1051 0 0 0 100 5 0 0 0 22 13 6 0 2 0 0 1 0 0 0 100 6 0 0 3 315 152 110 0 0 0 0 15 0 0 0 100 7 0 0 14 9 1 6 0 0 0 0 269 0 0 0 100 April 1, 2026 at 06:57:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 122 0 1 1 0 1 0 0 0 100 1 0 0 7 21 8 14 0 0 1 0 268 0 0 0 100 2 0 0 0 13 3 6 0 0 1 0 2 0 0 0 100 3 0 0 0 15 5 8 0 0 1 0 893 0 0 0 100 4 0 0 3 217 104 40 1 0 1 0 1040 0 0 0 100 5 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 1 0 0 0 0 0 100 7 0 0 14 7 2 2 0 0 1 0 266 0 0 0 100 April 1, 2026 at 06:57:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 2 2132 104 186 0 11 5 10 214 0 1 0 99 1 1926 0 7 62 7 76 2 8 4 10 666 0 1 0 99 2 8 0 0 36 1 26 0 4 4 1 58 0 0 0 100 3 7 0 0 42 4 41 1 4 11 4 965 0 0 0 100 4 26 0 3 249 105 75 1 5 5 3 1206 0 0 0 100 5 1 0 0 35 2 28 0 5 6 0 12 0 0 0 100 6 1359 0 116 244 109 67 1 6 16 9 257 1 1 0 99 7 142 0 14 133 43 154 1 8 7 16 401 0 0 0 100 April 1, 2026 at 06:57:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 0 0 0 0 100 1 0 0 7 22 8 16 0 0 0 0 269 0 0 0 100 2 0 0 0 10 2 8 0 1 0 0 2 0 0 0 100 3 0 0 0 14 4 8 0 0 0 0 894 0 0 0 100 4 0 0 3 211 104 34 0 0 0 0 1123 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 116 0 0 1 0 0 0 0 0 100 1 0 0 7 20 7 14 0 0 0 0 268 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 13 4 8 0 0 0 0 893 0 0 0 100 4 0 0 4 217 104 40 1 0 1 0 1122 0 0 0 100 5 0 0 0 9 2 6 0 1 0 0 1 0 0 0 100 6 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 120 0 0 0 0 3 0 0 0 100 1 0 0 7 44 14 38 1 0 0 0 288 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 3 1 0 0 17 4 16 0 0 0 0 906 0 0 0 100 4 0 0 4 218 104 42 1 0 0 0 1124 0 0 0 100 5 0 0 0 15 6 6 0 1 0 0 1 0 0 0 100 6 1 0 2 213 101 12 0 0 0 0 25 0 0 0 100 7 0 0 14 109 51 106 0 0 0 0 269 0 0 0 100 April 1, 2026 at 06:57:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 118 0 0 0 0 4 0 0 0 100 1 0 0 7 22 8 18 0 0 0 0 266 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 15 4 10 1 0 0 0 897 0 0 0 100 4 0 0 4 214 105 36 1 0 0 0 1123 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 106 51 102 1 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 122 0 1 3 0 0 0 0 0 100 1 0 0 7 22 8 17 0 1 1 0 268 0 0 0 100 2 0 0 0 13 3 10 0 0 1 0 2 0 0 0 100 3 0 0 0 15 5 10 0 0 1 0 894 0 0 0 100 4 0 0 3 218 105 42 0 0 1 0 1123 0 0 0 100 5 0 0 0 12 2 8 0 1 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 14 106 51 104 0 1 0 0 266 0 0 0 100 April 1, 2026 at 06:57:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 116 0 0 0 0 0 0 0 0 100 1 0 0 7 24 9 20 0 1 0 0 270 0 0 0 100 2 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 3 0 0 0 13 4 8 0 0 0 0 894 0 0 0 100 4 0 0 4 216 104 38 1 0 0 0 1125 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 6 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 112 0 0 0 0 0 0 0 0 100 1 0 0 7 21 7 14 1 0 0 0 268 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 916 0 0 0 100 4 0 0 4 212 104 36 1 1 1 0 1124 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 2 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 14 105 51 102 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 433 0 1 2124 111 350 1 17 15 3 436 3 1 0 96 1 276 0 7 127 11 206 0 12 9 3 618 0 0 0 99 2 286 0 0 118 19 182 0 12 11 1 342 2 1 0 97 3 86 0 0 87 8 139 1 11 12 1 1375 2 0 0 97 4 119 0 46 298 107 194 1 9 3 0 1673 0 0 0 99 5 70 0 0 125 46 147 0 9 4 0 448 0 0 0 100 6 93 0 2 259 105 82 0 5 3 1 259 0 0 0 99 7 89 0 14 137 25 223 1 7 6 1 752 0 0 0 99 April 1, 2026 at 06:57:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 122 0 1 0 0 1 0 0 0 100 1 0 0 7 24 8 14 0 0 1 0 268 0 0 0 100 2 0 0 0 114 53 106 0 0 1 0 2 0 0 0 100 3 0 0 0 16 5 8 0 0 1 0 894 0 0 0 100 4 0 0 7 215 103 38 0 0 1 0 1139 0 0 0 100 5 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 6 0 0 7 208 101 0 0 0 1 0 0 0 0 0 100 7 3 0 14 8 2 2 0 0 1 0 296 0 0 0 100 April 1, 2026 at 06:57:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 223 0 7 56 0 0 0 0 0 100 1 0 0 7 73 7 121 0 6 69 0 268 0 0 0 100 2 0 0 0 157 51 197 0 8 67 0 0 0 0 0 100 3 0 0 0 90 35 102 0 11 64 0 894 0 0 0 100 4 0 0 4 288 133 130 1 8 72 0 1138 0 0 0 100 5 0 0 0 64 3 111 0 9 39 0 1 0 0 0 100 6 0 0 2 258 101 106 0 8 60 0 0 0 0 0 100 7 0 0 14 63 1 118 0 8 48 0 266 0 0 0 100 April 1, 2026 at 06:57:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 0 0 0 0 0 0 100 1 0 0 7 21 7 16 1 1 0 0 268 0 0 0 100 2 0 0 0 112 52 108 0 0 0 0 2 0 0 0 100 3 0 0 0 13 4 8 0 0 0 0 893 0 0 0 100 4 0 0 4 216 103 38 1 0 0 0 1137 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 6 0 0 2 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1264 0 157 2181 102 700 3 117 294 90 3231 1 2 0 97 1 182 0 49 141 7 612 4 153 118 85 2844 0 1 0 99 2 743 0 21 350 28 569 6 95 125 65 2267 1 1 0 98 3 51 0 19 298 28 441 3 78 713 56 2885 0 1 0 98 4 8308 0 133 418 104 574 10 89 187 90 5357 1 3 0 96 5 1057 0 126 271 32 528 6 97 210 93 4840 1 1 0 98 6 150 0 19 512 102 692 2 161 91 111 3021 0 1 0 99 7 67 0 33 245 1 593 4 110 672 74 2734 0 1 0 99 April 1, 2026 at 06:57:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 7 2125 103 142 0 3 3 1 34 0 1 0 99 1 36 0 91 27 3 39 0 3 11 8 314 0 1 0 99 2 2 0 0 36 2 23 0 2 4 1 17 0 0 0 100 3 3 0 0 140 55 133 0 4 7 2 909 0 0 0 100 4 1 0 3 230 103 47 0 4 0 2 837 0 0 0 100 5 5 0 7 41 10 24 0 2 0 1 6 0 0 0 100 6 6 0 3 236 104 25 0 2 4 1 35 0 0 0 100 7 1 0 14 32 3 14 0 2 1 1 272 0 0 0 100 April 1, 2026 at 06:57:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2203 101 108 0 1 2 0 0 0 1 0 99 1 0 0 7 168 27 58 0 2 0 0 259 0 0 0 100 2 0 0 0 111 0 2 0 0 0 0 0 0 0 0 100 3 0 0 680 81 30 66 0 1 2 0 895 0 1 0 99 4 0 0 4 331 104 48 1 2 1 0 769 0 0 0 100 5 0 0 0 118 3 8 0 0 0 0 0 0 0 0 100 6 0 0 9 314 102 4 0 1 0 0 0 0 0 0 100 7 0 0 14 110 1 2 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2106 102 112 0 0 0 0 0 0 0 0 100 1 0 0 7 114 52 108 1 0 0 0 259 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 2 0 0 0 100 3 0 0 0 24 4 18 0 0 0 0 893 0 0 0 100 4 0 0 4 216 104 36 1 0 1 0 766 0 0 0 100 5 0 0 0 15 2 12 0 1 0 0 0 0 0 0 100 6 0 0 2 213 101 6 0 1 0 0 0 0 0 0 100 7 0 0 14 8 1 4 0 1 0 0 266 0 0 0 100 April 1, 2026 at 06:57:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 108 0 0 0 0 0 0 0 0 100 1 0 0 7 110 52 106 0 1 0 0 259 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 20 4 14 1 1 0 0 895 0 0 0 100 4 0 0 5 216 105 36 1 1 1 0 765 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 1 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 6 1 2 1 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7600 0 452 2398 101 692 5 108 1604 109 1607 1 3 0 96 1 5886 0 250 358 35 609 5 103 195 104 2248 1 2 0 97 2 5167 0 34 306 3 575 8 108 700 108 15213 2 4 0 93 3 1697 0 312 451 20 543 8 88 111 85 11529 1 3 0 96 4 3630 0 24 538 104 446 2 68 434 68 8067 1 2 0 97 5 7526 0 357 392 10 442 9 68 1527 74 2129 2 2 0 96 6 6325 0 137 634 102 471 3 74 427 99 9210 2 2 0 96 7 4363 0 384 311 1 423 2 68 1919 81 7394 2 2 0 96 April 1, 2026 at 06:57:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 103 130 0 1 0 0 10 0 0 0 100 1 0 0 7 25 4 16 0 0 0 0 269 0 0 0 100 2 0 0 42 14 2 10 0 1 3 0 0 0 0 0 100 3 0 0 0 88 37 74 0 0 3 0 894 0 0 0 100 4 0 0 4 259 123 76 1 1 1 0 1156 0 0 0 100 5 0 0 0 30 12 6 0 0 1 0 0 0 0 0 100 6 0 0 2 228 103 18 0 0 0 0 24 0 0 0 100 7 0 0 14 22 2 14 0 1 0 0 266 0 0 0 100 April 1, 2026 at 06:57:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2174 101 120 0 1 0 0 1 0 1 0 99 1 0 0 7 83 4 8 1 1 1 0 259 0 0 0 100 2 0 0 28 76 2 6 0 0 3 0 2 0 1 0 99 3 0 0 448 22 6 12 0 0 3 0 894 0 0 0 99 4 0 0 5 378 153 132 1 0 3 0 1139 0 0 0 99 5 0 0 0 79 3 4 0 0 1 0 0 0 0 0 100 6 0 0 1 275 101 0 0 0 1 0 0 0 0 0 100 7 0 0 14 75 2 2 0 0 1 0 266 0 0 0 100 April 1, 2026 at 06:57:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 106 816 1 121 1582 0 0 0 2 0 98 1 0 0 7 121 7 688 1 113 1543 0 259 0 2 0 98 2 0 0 0 215 23 664 1 88 1505 0 0 0 2 0 98 3 0 0 0 262 142 704 2 96 1415 2 895 0 2 0 98 4 0 0 4 450 254 660 0 107 1894 1 1138 0 2 0 98 5 0 0 0 234 2 557 2 88 1543 0 0 0 2 0 98 6 0 0 2 347 106 695 3 96 1599 0 0 0 2 0 98 7 0 0 14 145 1 652 0 92 1565 0 266 0 2 0 98 April 1, 2026 at 06:57:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 114 0 0 0 0 0 0 0 0 100 1 0 0 8 13 3 10 0 2 0 0 259 0 0 0 100 2 0 0 0 108 51 104 0 0 0 0 2 0 0 0 100 3 0 0 0 15 5 10 0 0 0 0 893 0 0 0 100 4 0 0 5 213 104 34 1 0 0 0 1138 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 1 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 6 1 2 1 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1573 0 17 2196 101 1091 7 71 132 40 4461 4 2 0 94 1 1580 0 32 150 3 1459 2 51 122 39 4109 4 1 0 95 2 1216 0 2 313 35 1813 3 44 82 29 4113 3 1 0 96 3 541 0 11 150 5 1455 5 42 95 15 4469 3 1 0 96 4 222 0 300 388 112 1043 5 39 93 19 5187 2 2 0 96 5 12763 0 12 245 10 1124 7 38 271 43 5871 6 4 0 90 6 1003 0 24 398 109 1382 2 48 95 48 3070 1 1 0 98 7 1431 0 21 189 2 659 4 42 66 37 4749 15 1 0 84 April 1, 2026 at 06:57:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 78 1 2 0 0 17 0 0 0 100 1 0 0 7 21 4 18 0 1 1 0 269 0 0 0 100 2 0 0 0 14 2 4 0 0 0 0 2 0 0 0 100 3 0 0 0 33 7 26 0 2 0 0 895 0 0 0 100 4 0 0 5 218 103 39 1 1 0 0 1132 0 0 0 100 5 0 0 7 22 11 8 0 2 0 0 0 0 0 0 100 6 36 0 1 330 136 127 0 3 0 0 26 0 0 0 100 7 10 0 14 66 28 60 0 2 1 0 352 0 0 0 100 April 1, 2026 at 06:57:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2104 100 115 0 2 1 0 0 0 0 0 100 1 0 0 7 29 3 8 1 1 0 0 263 0 0 0 100 2 0 0 0 24 1 4 0 0 0 0 2 0 0 0 100 3 0 0 0 37 5 18 1 0 0 0 894 0 0 0 100 4 0 0 5 228 104 34 1 0 0 0 1126 0 0 0 100 5 0 0 0 31 4 10 0 0 0 0 5 0 0 0 100 6 0 0 1 239 107 14 0 1 0 0 9 0 0 0 100 7 0 0 14 123 51 102 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2121 100 742 1 100 1854 1 0 0 2 0 98 1 0 0 7 154 15 519 0 70 1735 0 260 0 2 0 98 2 0 0 0 242 25 590 1 72 1812 0 3 0 2 0 98 3 0 0 0 192 117 531 0 71 1791 1 897 0 2 0 98 4 0 0 7 411 213 550 1 74 1728 0 1124 0 2 0 98 5 0 0 0 179 3 486 0 73 1751 1 2 0 2 0 98 6 0 0 0 374 107 717 1 82 1584 1 9 0 1 0 99 7 0 0 14 239 15 510 1 68 1666 0 266 0 2 0 98 April 1, 2026 at 06:57:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 105 388 0 1 2 0 439 0 0 0 99 1 3 0 7 65 3 89 2 1 3 0 827 0 0 0 99 2 3 0 0 162 51 188 1 2 0 0 638 0 0 0 99 3 1 0 0 105 5 172 0 0 0 0 1060 0 0 0 100 4 0 0 61 214 104 36 2 1 0 0 1123 0 0 0 99 5 12 0 0 137 3 240 1 2 0 0 376 0 0 0 100 6 1 0 1 237 109 20 3 0 3 0 442 4 0 0 96 7 0 0 14 17 1 8 1 0 0 0 276 0 0 0 100 April 1, 2026 at 06:57:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2151 101 1150 1 5 6 0 1796 1 1 0 98 1 22 0 7 209 42 434 2 3 3 0 3076 2 1 0 97 2 7 0 0 97 10 368 3 1 7 0 3065 2 1 0 97 3 10 0 0 342 9 740 4 8 3 0 2656 6 0 0 93 4 16 0 228 223 104 54 3 4 0 0 1164 1 1 0 99 5 55 0 0 87 1 675 3 4 2 0 690 1 0 0 99 6 16 0 2 255 107 469 4 4 4 0 1749 9 0 0 91 7 34 0 14 48 1 26 1 3 2 0 283 0 0 0 100 April 1, 2026 at 06:57:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 80 0 0 0 0 10 0 0 0 100 1 1 0 7 61 24 58 0 1 0 0 272 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 122 33 116 1 2 0 0 894 0 0 0 100 4 0 0 5 212 104 36 0 0 0 0 1126 0 0 0 100 5 0 0 0 18 8 6 0 0 0 0 2 0 0 0 100 6 0 0 1 226 107 22 0 0 0 0 29 0 0 0 100 7 0 0 14 12 2 6 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 108 0 1 1 0 1 0 0 0 100 1 0 0 7 17 4 8 0 1 1 0 260 0 0 0 100 2 0 0 0 13 3 6 0 0 1 0 2 0 0 0 100 3 0 0 0 124 55 116 0 0 1 0 894 0 0 0 100 4 0 0 7 213 104 36 1 1 0 0 1127 0 0 0 100 5 0 0 0 14 3 6 0 0 1 0 1 0 0 0 100 6 0 0 7 222 107 16 0 1 1 0 9 0 0 0 100 7 0 0 14 8 2 2 0 0 1 0 266 0 0 0 100 April 1, 2026 at 06:57:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 42 0 0 2136 108 612 0 88 1270 10 167 0 2 0 98 1 49 0 7 144 5 455 0 66 1365 10 390 0 1 0 98 2 62 0 0 177 1 392 0 71 1214 5 87 0 1 0 99 3 7 0 0 314 105 540 0 78 1257 4 951 0 1 0 99 4 6 0 6 454 189 487 1 58 1387 1 1186 0 2 0 98 5 12 0 0 227 30 469 0 57 1265 1 67 0 1 0 99 6 3444 0 114 356 108 573 3 67 1238 12 6860 2 2 0 96 7 90 0 16 157 1 466 6 59 1078 8 441 0 1 0 99 April 1, 2026 at 06:57:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 640 0 0 2165 113 20261 85 343 190 0 59039 18 12 0 70 1 102 0 7 471 7 19869 57 258 170 0 45768 15 10 0 75 2 151 0 0 349 8 21264 43 190 174 0 40504 15 9 0 76 3 315 0 0 227 11 20861 36 134 264 1 44331 15 10 0 75 4 108 0 3 662 110 20384 34 104 173 1 41945 12 9 0 79 5 563 0 0 1093 19 15574 26 90 129 0 35216 11 8 0 82 6 436 0 3 1246 120 13173 22 78 104 0 33229 10 7 0 83 7 68 0 14 1342 11 19246 25 80 231 0 44812 14 9 0 78 April 1, 2026 at 06:57:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 1 2115 106 6392 11 86 61 0 15465 5 4 0 91 1 6 0 7 31 8 6450 10 75 25 0 11397 4 3 0 93 2 9 0 0 99 25 6242 5 62 40 0 12574 4 3 0 93 3 20 0 0 34 9 5055 6 42 27 0 12837 3 3 0 94 4 15 0 4 238 109 9017 6 30 100 0 18922 5 4 0 91 5 2 0 0 26 4 3727 1 18 35 0 14033 4 3 0 93 6 4 0 2 216 104 2972 5 19 28 0 10370 3 2 0 95 7 23 0 14 94 22 10667 9 26 92 0 18073 6 4 0 90 April 1, 2026 at 06:57:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2134 126 68 0 1 0 0 10 0 0 0 100 1 0 0 7 19 4 14 1 0 0 0 272 0 0 0 100 2 0 0 0 74 7 68 0 1 0 0 11 0 0 0 100 3 0 0 0 19 4 18 0 2 0 0 894 0 0 0 100 4 0 0 3 218 103 12 0 0 0 0 0 0 0 0 100 5 0 0 0 19 11 36 1 1 0 0 1217 0 0 0 100 6 1 0 3 212 101 10 0 0 0 0 21 0 0 0 100 7 0 0 14 116 28 115 1 2 0 0 266 0 0 0 100 April 1, 2026 at 06:57:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 151 102 0 0 0 0 1 0 0 0 100 1 0 0 7 12 3 8 0 0 0 0 260 0 0 0 100 2 0 0 0 19 6 14 1 0 0 0 8 0 0 0 100 3 0 0 0 15 4 10 0 0 0 0 894 0 0 0 100 4 0 0 3 219 104 12 0 0 0 0 1 0 0 0 100 5 0 0 0 10 2 34 1 0 1 0 1215 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 107 1 104 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2163 151 393 0 41 797 0 0 0 1 0 99 1 0 0 7 128 3 261 0 37 816 0 260 0 1 0 99 2 0 0 0 143 9 277 1 40 759 0 12 0 1 0 99 3 0 0 0 151 72 392 0 52 864 0 893 0 1 0 99 4 0 0 3 339 173 313 0 44 850 0 0 0 1 0 99 5 0 0 0 132 2 309 1 41 762 0 1216 0 1 0 99 6 0 0 3 290 102 307 1 38 755 0 24 0 1 0 99 7 0 0 14 207 1 386 0 42 749 0 266 0 1 0 99 April 1, 2026 at 06:57:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 150 104 0 2 0 0 0 0 0 0 100 1 0 0 7 13 3 8 0 0 2 0 263 0 0 0 100 2 0 0 0 16 4 10 0 0 0 0 8 0 0 0 100 3 0 0 0 30 10 28 1 0 0 0 910 0 0 0 100 4 0 0 3 220 103 14 0 0 0 0 3 0 0 0 100 5 0 0 0 14 3 40 1 1 0 0 1217 0 0 0 100 6 0 0 3 208 101 2 0 0 2 0 3 0 0 0 100 7 0 0 14 109 1 108 0 0 1 0 271 0 0 0 100 April 1, 2026 at 06:57:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2197 116 1474 27 108 49 2 3868 2 2 0 96 1 98 0 7 391 11 1311 22 72 34 0 3159 2 1 0 97 2 6 0 0 290 28 1050 15 73 24 1 3586 2 1 0 97 3 8 0 0 396 9 948 7 43 43 0 3845 3 1 0 96 4 8 0 288 468 105 926 7 35 44 2 4089 2 1 0 97 5 13 0 0 227 2 431 6 10 51 0 4983 12 1 0 87 6 27 0 5 323 106 813 14 26 22 0 2984 6 1 0 93 7 4 0 38 270 4 1022 7 38 32 0 3201 3 1 0 96 April 1, 2026 at 06:57:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 109 122 0 0 0 0 24 0 0 0 100 1 0 0 7 20 3 16 0 0 0 0 272 0 0 0 100 2 0 0 0 113 43 108 0 2 0 0 0 0 0 0 100 3 0 0 0 34 12 30 0 2 0 0 895 0 0 0 100 4 0 0 3 214 103 6 0 0 0 0 0 0 0 0 100 5 0 0 7 24 9 44 1 3 0 0 1149 0 0 0 100 6 0 0 3 216 101 20 0 1 0 0 25 0 0 0 100 7 0 0 14 14 1 8 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2122 109 64 0 3 0 0 11 0 0 0 100 1 0 0 7 30 4 6 0 0 1 0 260 0 0 0 100 2 0 0 0 104 9 79 0 3 1 0 2 0 0 0 100 3 0 0 0 60 13 32 0 2 1 0 897 0 0 0 100 4 0 0 3 303 141 81 0 2 1 0 0 0 0 0 100 5 0 0 0 33 3 36 1 0 2 0 1131 0 0 0 100 6 0 0 3 225 101 2 0 0 1 0 0 0 0 0 100 7 0 0 14 32 2 14 1 2 1 0 266 0 0 0 100 April 1, 2026 at 06:57:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2142 109 638 1 92 2006 1 6 0 2 0 98 1 0 0 7 184 4 561 0 94 1903 0 260 0 2 0 98 2 0 0 0 276 37 542 0 80 1841 2 0 0 2 0 98 3 0 0 0 251 122 704 3 97 1655 1 897 0 1 0 99 4 0 0 3 435 227 655 0 106 1860 0 1 0 1 0 99 5 0 0 0 207 2 514 2 76 1804 0 1132 0 2 0 98 6 0 0 3 393 102 465 1 90 1576 0 0 0 2 0 98 7 0 0 21 205 1 466 2 71 1725 3 266 0 2 0 98 April 1, 2026 at 06:57:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2168 104 1265 4 8 11 0 2143 3 1 0 96 1 0 0 7 169 11 1008 1 11 6 0 1459 1 0 0 99 2 12 0 0 206 36 512 4 4 19 0 3624 2 1 0 96 3 0 0 0 247 9 976 4 10 17 0 3457 6 1 0 93 4 12 0 283 346 104 426 3 1 13 0 3483 2 1 0 96 5 0 0 0 78 6 76 3 4 0 0 1192 1 0 0 98 6 2 0 3 341 107 636 9 4 35 0 2936 11 0 0 89 7 0 0 14 54 1 10 0 1 1 0 276 0 0 0 100 April 1, 2026 at 06:57:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 108 0 0 0 0 2 0 0 0 100 1 0 0 7 31 9 30 1 1 0 0 269 0 0 0 100 2 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 3 0 0 0 20 4 14 0 1 0 0 894 0 0 0 100 4 0 0 3 214 105 6 0 1 0 0 1 0 0 0 100 5 0 0 0 13 3 36 0 0 0 0 1131 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 9 2 6 0 0 0 0 267 0 0 0 100 April 1, 2026 at 06:57:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 47 0 3 2131 103 192 0 11 15 16 150 0 1 0 99 1 51 0 7 65 10 75 0 9 5 8 387 0 0 0 100 2 7 0 0 135 51 129 0 4 3 6 55 0 0 0 100 3 5 0 0 45 4 31 0 4 3 2 911 0 0 0 100 4 16 0 3 236 106 17 0 2 1 0 54 0 0 0 100 5 3410 0 115 50 9 105 4 3 13 15 8086 2 2 0 97 6 110 0 3 260 101 82 0 11 15 13 215 0 0 0 100 7 16 0 14 45 1 56 0 4 5 5 385 0 0 0 100 April 1, 2026 at 06:57:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 0 0 0 0 0 0 100 1 0 0 7 28 9 22 0 0 0 0 269 0 0 0 100 2 0 0 0 112 50 112 0 1 0 0 0 0 0 0 100 3 0 0 0 23 4 18 1 0 0 0 895 0 0 0 100 4 0 0 3 213 105 6 0 0 0 0 1 0 0 0 100 5 0 0 0 10 2 34 1 0 0 0 1214 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 7 1 4 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:57:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 151 0 0 2150 103 10621 67 260 1479 0 24996 9 7 0 84 1 237 0 0 941 11 12670 35 199 1210 0 30220 8 7 0 85 2 20 0 7 690 35 12876 34 159 1494 0 26450 8 7 0 85 3 87 0 0 892 101 11898 20 139 1446 0 23385 7 6 0 87 4 20 0 3 831 198 7061 12 108 1214 0 15631 5 5 0 90 5 212 0 0 326 8 8915 13 111 1237 0 21007 8 6 0 86 6 73 0 3 1038 109 5761 8 98 1416 1 16673 5 5 0 90 7 446 0 14 409 4 10458 16 105 1245 0 23637 7 6 0 87 April 1, 2026 at 06:57:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 16 0 0 2156 107 17990 68 335 164 0 40700 13 9 0 77 1 31 0 0 77 10 17836 53 243 200 0 37535 13 8 0 79 2 15 0 0 65 20 19110 34 176 220 0 43119 13 8 0 79 3 24 0 7 55 12 14295 30 143 178 0 35653 11 7 0 82 4 94 0 3 254 111 14913 20 104 203 0 35616 12 7 0 81 5 13 0 0 43 10 14136 24 88 124 0 30424 10 6 0 84 6 4 0 3 259 115 12580 14 82 102 0 24058 8 5 0 87 7 35 0 14 56 12 12647 22 89 136 0 29477 10 6 0 84 April 1, 2026 at 06:57:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 116 0 0 0 0 1 0 0 0 100 1 0 0 0 11 0 2 0 1 0 0 0 0 0 0 100 2 0 0 2 21 7 18 0 1 0 0 7 0 0 0 100 3 0 0 7 14 5 10 0 0 0 0 581 0 0 0 100 4 0 0 3 218 107 10 0 0 0 0 598 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 1 0 0 0 100 7 0 0 14 113 53 138 1 1 0 0 1487 0 0 0 100 April 1, 2026 at 06:57:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 134 0 0 0 0 10 0 0 0 100 1 0 0 0 11 0 8 0 0 0 0 12 0 0 0 100 2 0 0 0 22 6 18 0 0 0 0 9 0 0 0 100 3 0 0 7 13 4 8 1 0 0 0 560 0 0 0 100 4 0 0 3 215 105 8 1 0 0 0 593 0 0 0 100 5 0 0 0 17 9 2 0 0 1 0 0 0 0 0 100 6 0 0 3 214 102 12 0 0 0 0 25 0 0 0 100 7 0 0 14 113 52 140 1 1 0 0 1485 0 0 0 100 April 1, 2026 at 06:57:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 125 0 2 0 0 4 0 0 0 100 1 0 0 0 57 24 48 0 1 1 0 0 0 0 0 100 2 0 0 0 23 7 16 0 1 1 0 9 0 0 0 100 3 0 0 7 18 6 12 0 0 1 0 560 0 0 0 100 4 0 0 7 222 108 14 0 0 1 0 600 0 0 0 100 5 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 6 0 0 7 210 102 2 0 0 1 0 0 0 0 0 100 7 0 0 14 65 29 86 1 0 1 0 1487 0 0 0 100 April 1, 2026 at 06:57:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 45 0 0 2185 106 1756 9 175 941 1 5070 2 2 0 96 1 0 0 12 427 22 1480 19 105 958 0 3123 5 2 0 92 2 0 0 14 412 8 1416 17 124 915 0 3161 4 2 0 94 3 13 0 7 494 81 1007 14 80 863 0 4069 7 2 0 92 4 6 0 291 620 183 1330 11 108 1028 0 4440 5 2 0 93 5 0 0 0 422 4 1309 9 79 980 0 2007 3 2 0 96 6 7 0 2 510 105 1233 11 88 954 1 3269 2 2 0 96 7 51 0 14 352 19 1063 8 63 772 1 4908 5 2 0 93 April 1, 2026 at 06:57:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 108 99 0 1 0 0 7 0 0 0 100 1 0 0 0 9 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 48 17 38 0 1 0 0 0 0 0 0 100 3 0 0 7 20 5 20 0 1 0 0 560 0 0 0 100 4 0 0 3 218 106 10 0 0 0 0 596 0 0 0 100 5 0 0 7 109 35 104 0 2 0 0 0 0 0 0 100 6 0 0 3 212 103 2 0 0 0 0 0 0 0 0 100 7 3 0 14 13 3 36 1 1 0 0 1405 0 0 0 100 April 1, 2026 at 06:57:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2118 107 128 0 0 0 0 6 0 0 0 100 1 0 0 0 26 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 31 5 12 0 0 0 0 560 0 0 0 100 4 0 0 3 230 105 6 1 0 0 0 594 0 0 0 100 5 0 0 0 127 52 106 0 0 0 0 1 0 0 0 100 6 0 0 3 230 104 8 0 1 0 0 5 0 0 0 100 7 0 0 14 25 2 36 0 1 0 0 1399 0 0 0 100 April 1, 2026 at 06:57:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2122 109 142 0 0 0 0 19 0 0 0 100 1 0 0 0 12 0 8 0 0 0 0 12 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 17 4 12 1 0 0 0 560 0 0 0 100 4 0 0 3 220 106 14 0 1 1 0 596 0 0 0 100 5 0 0 0 114 57 102 0 0 0 0 0 0 0 0 100 6 0 0 3 215 102 14 0 1 0 0 20 0 0 0 100 7 0 0 14 15 2 40 2 0 0 0 1412 0 0 0 100 April 1, 2026 at 06:57:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2176 108 1242 5 8 10 0 2593 3 1 0 96 1 3 0 0 183 0 847 3 10 0 0 853 1 0 0 99 2 23 0 0 401 0 732 3 3 5 0 2212 7 0 0 92 3 1 0 7 166 5 442 5 2 8 0 4193 2 1 0 97 4 0 0 297 231 106 42 0 3 0 0 618 0 0 0 100 5 4 0 0 234 42 709 4 5 12 0 3253 2 1 0 97 6 0 0 3 333 106 665 5 2 22 0 2368 10 1 0 90 7 1 0 14 81 9 72 3 4 0 0 1453 2 0 0 98 April 1, 2026 at 06:57:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2133 112 675 2 110 2314 1 1 0 3 0 97 1 0 0 0 305 8 737 2 97 1879 1 10 0 2 0 98 2 0 0 0 280 12 636 1 113 1938 2 0 0 2 0 98 3 0 0 7 278 140 516 2 98 1897 1 561 0 2 0 98 4 0 0 3 463 231 565 2 86 2083 1 596 0 2 0 98 5 0 0 0 281 1 610 2 84 2073 1 0 0 2 0 98 6 0 0 3 418 104 477 1 85 1898 0 0 0 2 0 98 7 0 0 14 254 28 542 2 94 1674 1 1401 0 2 0 98 April 1, 2026 at 06:58:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 0 0 0 0 100 1 0 0 0 66 29 60 0 1 0 0 9 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 3 0 0 7 13 4 10 0 0 0 0 560 0 0 0 100 4 0 0 3 214 105 6 1 0 0 0 595 0 0 0 100 5 0 0 0 11 1 4 0 1 0 0 0 0 0 0 100 6 0 0 3 215 103 12 0 1 0 0 1 0 0 0 100 7 0 0 14 63 29 88 0 0 0 0 1400 0 0 0 100 April 1, 2026 at 06:58:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 116 0 1 0 0 0 0 0 0 100 1 0 0 0 119 56 112 0 0 0 0 9 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 13 4 10 0 0 0 0 560 0 0 0 100 4 0 0 3 217 107 10 0 0 0 0 596 0 0 0 100 5 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 6 0 0 3 217 103 12 0 0 0 0 1 0 0 0 100 7 0 0 14 12 3 36 1 0 0 0 1402 0 0 0 100 April 1, 2026 at 06:58:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 136 0 0 0 0 18 0 0 0 100 1 0 0 0 130 58 130 0 1 0 0 28 0 0 0 100 2 0 0 0 14 4 10 0 0 0 0 14 0 0 0 100 3 0 0 7 16 4 14 1 0 0 0 634 0 0 0 100 4 0 0 3 215 105 8 0 0 0 0 594 0 0 0 100 5 0 0 0 15 9 2 0 0 0 0 0 0 0 0 100 6 1 0 3 214 102 12 0 0 0 0 20 0 0 0 100 7 0 0 14 17 3 44 2 0 0 0 1404 0 0 0 99 April 1, 2026 at 06:58:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 138 0 2 0 0 1 0 0 0 100 1 0 0 0 122 58 114 0 0 1 0 10 0 0 0 100 2 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 3 0 0 7 16 5 10 0 0 1 0 560 0 0 0 100 4 0 0 3 215 106 8 0 0 1 0 597 0 0 0 100 5 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 6 0 0 3 211 102 4 0 1 2 0 0 0 0 0 100 7 0 0 14 10 3 34 0 0 1 0 1401 0 0 0 100 April 1, 2026 at 06:58:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 118 0 0 1 0 0 0 0 0 100 1 0 0 0 122 56 118 0 1 2 0 9 0 0 0 100 2 0 0 0 13 3 6 0 0 0 0 5 0 0 0 100 3 0 0 7 19 6 18 0 0 0 0 561 0 0 0 100 4 0 0 3 215 105 8 1 0 0 0 593 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 14 11 2 40 1 0 0 0 1400 0 0 0 100 April 1, 2026 at 06:58:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 0 0 0 0 0 0 100 1 0 0 0 119 56 112 0 0 0 0 9 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 13 4 12 0 1 0 0 559 0 0 0 100 4 0 0 3 215 106 8 0 0 0 0 597 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 14 8 2 34 1 0 0 0 1400 0 0 0 100 April 1, 2026 at 06:58:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 118 0 0 0 0 6 0 0 0 100 1 0 0 0 128 58 124 0 0 0 0 17 0 0 0 100 2 0 0 0 12 2 10 0 1 0 0 11 0 0 0 100 3 0 0 7 18 5 16 1 0 0 0 637 0 0 0 100 4 0 0 3 213 105 6 0 0 0 0 594 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 14 14 3 40 2 0 0 0 1408 0 0 0 100 April 1, 2026 at 06:58:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 104 136 0 0 0 0 11 0 0 0 100 1 0 0 0 125 57 122 0 0 0 0 22 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 7 14 4 10 0 0 0 0 560 0 0 0 100 4 0 0 3 217 106 14 0 2 0 0 595 0 0 0 100 5 0 0 0 13 7 2 0 0 0 0 0 0 0 0 100 6 0 0 3 214 102 12 0 0 0 0 20 0 0 0 100 7 0 0 14 11 2 36 1 0 1 0 1400 0 0 0 100 April 1, 2026 at 06:58:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 114 0 0 0 0 0 0 0 0 100 1 3 0 0 121 57 114 0 0 0 0 14 0 0 0 100 2 0 0 0 11 3 4 0 0 0 0 5 0 0 0 100 3 0 0 7 13 4 10 0 0 0 0 560 0 0 0 100 4 3 0 3 218 107 10 1 0 0 0 600 0 0 0 100 5 20 0 0 9 2 4 0 0 0 0 5 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 14 7 2 34 0 0 0 0 1400 0 0 0 100 April 1, 2026 at 06:58:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 103 120 0 0 2 0 0 0 0 0 100 1 0 0 0 122 57 116 0 1 1 0 9 0 0 0 100 2 0 0 0 10 1 6 0 1 1 0 0 0 0 0 100 3 0 0 7 22 7 20 0 0 1 0 560 0 0 0 100 4 0 0 3 221 107 16 0 1 0 0 596 0 0 0 100 5 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 14 14 3 46 1 2 1 0 1391 0 0 0 100 April 1, 2026 at 06:58:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 118 0 0 0 0 6 0 0 0 100 1 0 0 0 110 50 106 0 0 0 0 20 0 0 0 100 2 0 0 0 29 11 26 0 1 0 0 9 0 0 0 100 3 0 0 7 17 5 16 1 0 0 0 635 0 0 0 100 4 0 0 3 213 105 6 0 0 0 0 595 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 3 210 102 4 0 1 0 0 1 0 0 0 100 7 0 0 14 13 3 40 2 0 0 0 1395 0 0 0 100 April 1, 2026 at 06:58:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 118 0 1 0 0 2 0 0 0 100 1 0 0 0 19 6 12 0 0 0 0 9 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 3 0 0 0 100 3 0 0 7 15 5 12 0 0 0 0 582 0 0 0 100 4 0 0 3 217 107 10 0 0 0 0 596 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 14 12 4 38 1 0 0 0 1393 0 0 0 100 April 1, 2026 at 06:58:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 786 0 0 2133 104 192 1 12 5 10 6565 1 1 0 98 1 725 0 114 40 6 55 0 4 6 4 171 0 0 0 99 2 105 0 0 140 43 149 0 10 2 11 125 0 0 0 100 3 1980 0 10 71 10 91 2 8 9 16 987 0 1 0 99 4 30 0 3 257 108 67 1 9 7 6 681 0 0 0 100 5 8 0 0 42 7 44 0 6 5 7 100 0 0 0 100 6 6 0 3 241 101 34 0 3 6 2 80 0 0 0 100 7 6 0 14 42 3 71 0 4 5 6 1452 0 0 0 100 April 1, 2026 at 06:58:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 120 0 1 0 0 1 0 0 0 100 1 0 0 0 21 7 12 0 0 1 0 9 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 7 16 5 10 0 0 1 0 561 0 0 0 100 4 0 0 7 318 157 110 0 0 1 0 597 0 0 0 100 5 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 6 0 0 7 210 101 2 0 0 1 0 0 0 0 0 100 7 0 0 14 18 4 44 1 1 1 0 1478 0 0 0 100 April 1, 2026 at 06:58:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 57 0 0 2113 102 240 1 11 2 0 429 0 0 0 99 1 27 0 0 75 7 125 1 6 17 0 1027 0 0 0 100 2 51 0 0 409 2 1016 0 4 2 0 7403 1 0 0 98 3 392 0 7 89 5 162 1 6 3 0 925 0 0 0 99 4 2 0 3 411 155 347 0 4 14 0 1560 0 0 0 99 5 19 0 0 21 2 23 2 3 57 0 1744 2 0 0 97 6 1 0 3 260 102 115 0 6 1 0 665 0 0 0 100 7 78 0 14 96 4 206 2 5 13 0 2581 0 1 0 99 April 1, 2026 at 06:58:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 139 0 0 2235 119 29004 174 598 414 0 69489 22 15 0 63 1 75 0 7 1132 14 24930 146 463 248 0 54282 19 12 0 69 2 64 0 0 591 12 28062 77 324 262 0 50694 17 11 0 72 3 32 0 0 122 13 26446 63 254 270 0 57871 17 11 0 71 4 75 0 3 600 118 15534 56 178 251 0 45814 16 9 0 75 5 38 0 0 793 13 19876 43 156 272 0 46947 14 9 0 76 6 48 0 3 638 116 20422 45 133 180 0 36794 11 8 0 81 7 49 0 14 665 10 17820 43 128 282 0 46988 15 10 0 76 April 1, 2026 at 06:58:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2166 144 2063 27 80 16 0 6098 2 2 0 96 1 6 0 7 28 2 2130 15 60 17 0 4114 2 1 0 98 2 23 0 0 40 5 2084 13 49 30 0 4971 2 1 0 97 3 1 0 0 19 0 1745 8 34 13 0 3862 1 1 0 98 4 0 0 3 315 111 1298 3 23 13 0 3079 1 1 0 98 5 0 0 10 21 3 1874 2 15 24 0 4971 1 1 0 98 6 0 0 3 220 103 1540 2 14 22 0 3700 1 1 0 98 7 1 0 14 21 8 1951 2 9 28 0 4154 1 1 0 98 April 1, 2026 at 06:58:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2164 154 152 1 0 0 0 1232 0 1 0 99 1 1 0 7 14 2 12 0 0 0 0 272 0 0 0 100 2 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 3 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 4 0 0 3 318 105 112 0 0 0 0 294 0 0 0 100 5 0 0 0 20 11 6 0 0 0 0 302 0 0 0 100 6 0 0 3 215 102 12 1 0 0 0 320 0 0 0 100 7 0 0 14 20 7 18 0 1 0 0 274 0 0 0 100 April 1, 2026 at 06:58:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2169 152 292 5 10 4 0 1973 0 1 0 99 1 2 0 7 20 2 9 2 0 6 0 853 3 0 0 97 2 48 0 0 142 0 265 1 6 1 0 455 0 0 0 100 3 0 0 0 91 0 171 1 6 0 0 316 0 0 0 100 4 0 0 45 386 106 248 0 3 1 0 459 0 0 0 100 5 0 0 0 60 2 89 1 6 4 0 831 0 0 0 99 6 0 0 3 280 102 136 0 3 0 0 547 0 0 0 100 7 0 0 14 90 8 142 0 3 3 0 735 0 0 0 99 April 1, 2026 at 06:58:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2200 108 2156 35 203 2156 1 4138 4 3 0 93 1 11 0 14 354 26 1393 14 134 2236 0 2788 6 4 0 90 2 0 0 0 563 16 1545 9 155 2721 2 3477 1 3 0 96 3 1 0 14 334 162 1582 17 180 2600 1 3520 2 3 0 95 4 0 0 265 537 263 1610 12 138 2538 2 2419 1 4 0 95 5 40 0 1 470 5 1149 15 128 2235 3 2844 5 3 0 92 6 27 0 3 487 111 1006 33 121 2036 1 3932 8 3 0 90 7 4 0 33 438 5 1348 10 122 2094 0 2726 2 3 0 94 April 1, 2026 at 06:58:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 154 1 0 0 0 1139 0 1 0 99 1 0 0 0 110 50 102 0 1 0 0 0 0 0 0 100 2 0 0 0 13 2 6 0 1 0 0 2 0 0 0 100 3 0 0 14 12 2 6 0 0 0 0 260 0 0 0 100 4 0 0 3 215 104 6 0 0 0 0 294 0 0 0 100 5 0 0 0 22 8 16 0 0 0 0 309 0 0 0 100 6 0 0 3 212 103 4 0 0 0 0 301 0 0 0 100 7 0 0 14 11 3 8 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:58:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 113 2110 102 156 1 1 0 0 1139 0 1 0 99 1 0 0 0 125 50 104 0 2 0 0 0 0 0 0 100 2 0 0 0 29 3 6 0 0 0 0 5 0 0 0 100 3 0 0 7 27 2 6 1 1 0 0 260 0 0 0 100 4 0 0 3 231 105 8 0 0 0 0 295 0 0 0 100 5 0 0 0 40 9 20 0 1 0 0 311 0 0 0 100 6 0 0 3 227 103 4 0 0 0 0 301 0 0 0 100 7 0 0 14 29 3 8 1 1 0 0 267 0 0 0 100 April 1, 2026 at 06:58:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 104 154 2 0 0 0 1144 0 1 0 99 1 0 0 7 119 50 125 2 2 0 0 14 0 0 0 100 2 0 0 0 11 1 4 0 1 0 0 3 0 0 0 100 3 0 0 7 10 2 4 0 0 0 0 260 0 0 0 100 4 0 0 3 214 104 8 0 0 0 0 294 0 0 0 100 5 0 0 0 30 14 16 0 0 1 0 309 0 0 0 100 6 0 0 3 215 102 12 1 0 0 0 320 0 0 0 100 7 0 0 14 11 2 8 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:58:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2171 104 962 4 11 5 0 3241 4 1 0 95 1 0 0 0 237 14 777 5 18 4 0 2479 2 1 0 98 2 0 0 0 316 6 612 8 12 10 0 2522 4 1 0 96 3 0 0 7 85 11 41 0 3 1 0 504 0 0 0 100 4 0 0 301 283 135 82 0 2 1 0 321 0 0 0 100 5 0 0 0 298 10 746 4 4 13 0 3775 4 1 0 95 6 0 0 7 387 103 647 7 5 48 0 2912 10 0 0 90 7 0 0 14 333 3 953 4 5 35 0 2411 4 0 0 95 April 1, 2026 at 06:58:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 103 684 1 91 1807 0 1138 0 2 0 98 1 0 0 0 293 40 532 0 73 1670 1 0 0 2 0 98 2 0 0 0 191 1 435 0 69 2030 0 0 0 2 0 98 3 0 0 7 182 111 453 0 76 1463 0 260 0 2 0 98 4 0 0 3 410 218 510 0 78 1969 0 294 0 2 0 98 5 0 0 0 190 8 421 0 64 1863 0 310 0 2 0 98 6 0 0 3 424 104 487 1 67 1658 0 324 0 2 0 98 7 0 0 14 181 2 411 0 69 1711 0 266 0 2 0 98 April 1, 2026 at 06:58:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 146 1 1 0 0 1138 0 1 0 99 1 0 0 0 72 31 64 0 1 0 0 0 0 0 0 100 2 0 0 0 54 22 48 0 1 0 0 5 0 0 0 100 3 0 0 8 9 2 6 8 1 0 0 260 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 294 0 0 0 100 5 0 0 0 21 8 16 0 0 0 0 311 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 300 0 0 0 100 7 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:58:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 148 1 0 0 0 1139 0 1 0 99 1 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 4 0 0 3 214 105 8 0 0 0 0 295 0 0 0 100 5 0 0 0 19 7 14 0 0 0 0 306 0 0 0 100 6 0 0 3 212 103 4 1 0 0 0 300 0 0 0 100 7 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 April 1, 2026 at 06:58:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 168 0 0 2209 110 16119 100 372 247 7 41346 13 9 0 78 1 44 0 0 760 9 15919 76 314 152 4 33382 12 7 0 81 2 114 0 0 445 21 13982 52 221 132 3 33318 10 7 0 84 3 2385 0 8 881 11 15092 53 151 252 3 35087 11 7 0 82 4 1639 0 118 470 113 12276 43 127 221 13 36761 13 7 0 80 5 248 0 0 333 28 10784 31 107 129 16 36189 10 6 0 84 6 85 0 7 508 108 13167 27 117 88 7 24342 9 6 0 86 7 51 0 14 425 12 12881 27 91 89 9 24131 7 5 0 87 April 1, 2026 at 06:58:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 45 0 0 2177 110 12045 60 324 171 0 31891 11 7 0 82 1 18 0 0 72 5 12129 51 248 179 0 28702 10 6 0 84 2 8 0 0 59 7 11330 51 186 155 0 26509 9 5 0 86 3 5 0 0 58 7 13181 27 116 127 0 25554 7 5 0 87 4 5 0 3 302 110 12366 19 97 84 0 24770 8 5 0 88 5 9 0 0 92 33 8881 14 82 131 0 21260 7 4 0 89 6 14 0 10 253 111 10728 23 90 177 0 22848 7 5 0 88 7 4 0 14 50 12 8527 15 53 91 0 20169 5 4 0 90 April 1, 2026 at 06:58:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 107 522 1 66 1243 1 1226 0 1 0 98 1 0 0 0 137 1 294 0 47 1069 0 0 0 1 0 99 2 0 0 0 121 3 253 0 42 1046 0 5 0 1 0 99 3 0 0 0 210 90 271 0 48 1003 0 5 0 1 0 99 4 0 0 3 383 177 286 0 46 1113 0 294 0 1 0 99 5 0 0 0 184 22 339 0 61 1089 0 303 0 1 0 99 6 0 0 10 395 131 344 0 44 1098 0 561 0 1 0 99 7 0 0 14 138 7 279 0 37 881 0 271 0 1 0 99 April 1, 2026 at 06:58:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 106 1462 21 67 36 1 4827 2 1 0 97 1 0 0 0 199 4 777 15 24 22 0 3315 7 1 0 92 2 43 0 0 378 15 920 4 39 23 0 4039 1 1 0 98 3 1 0 7 189 2 967 13 33 49 0 5015 3 1 0 95 4 0 0 288 562 104 1266 7 18 21 0 2693 1 1 0 98 5 0 0 10 154 6 908 6 13 36 0 2987 4 1 0 95 6 50 0 24 463 127 592 10 18 64 1 4442 10 1 0 89 7 2 0 14 181 6 1246 7 20 26 0 2706 3 1 0 97 April 1, 2026 at 06:58:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 108 160 1 0 0 0 1148 0 1 0 99 1 0 0 0 13 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 115 53 108 0 0 0 0 1 0 0 0 100 3 0 0 0 10 1 6 0 2 0 0 21 0 0 0 100 4 0 0 10 216 105 12 0 1 0 0 295 0 0 0 100 5 0 0 0 17 3 14 0 1 0 0 302 0 0 0 100 6 0 0 10 220 106 12 0 0 0 0 562 0 0 0 100 7 2 0 14 12 3 8 1 1 0 0 269 0 0 0 100 April 1, 2026 at 06:58:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2119 108 167 1 0 0 0 1148 0 1 0 99 1 0 0 0 28 1 4 0 1 0 0 3 0 0 0 100 2 2 0 0 134 52 118 0 1 0 0 19 0 0 0 100 3 0 0 0 27 0 12 0 1 0 0 20 0 0 0 100 4 0 0 3 236 104 18 0 0 0 0 309 0 0 0 100 5 0 0 0 32 9 4 0 0 1 0 300 0 0 0 100 6 0 0 10 244 110 22 0 0 0 0 573 0 0 0 100 7 0 0 14 30 2 10 0 0 0 0 270 0 0 0 100 April 1, 2026 at 06:58:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 102 150 0 1 1 0 1139 0 1 0 99 1 0 0 0 15 3 6 0 1 1 0 1 0 0 0 100 2 0 0 0 110 51 102 0 0 1 0 0 0 0 0 100 3 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 4 0 0 3 214 104 6 0 0 1 0 294 0 0 0 100 5 0 0 0 18 4 14 0 0 2 0 302 0 0 0 100 6 0 0 10 225 110 18 0 0 1 0 570 0 0 0 100 7 0 0 14 10 3 4 0 0 1 0 266 0 0 0 100 April 1, 2026 at 06:58:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5 0 0 2189 119 1456 6 112 2141 2 3899 2 3 0 95 1 0 0 0 322 4 1221 4 91 1900 2 1936 6 2 0 92 2 2 0 0 389 18 1459 2 88 1695 3 2919 1 3 0 96 3 0 0 0 310 122 1407 2 74 1848 1 2000 2 2 0 95 4 0 0 297 458 246 867 2 85 1974 0 723 1 2 0 98 5 0 0 0 355 16 943 1 79 1794 0 745 1 2 0 97 6 0 0 10 454 111 947 7 73 1670 1 3306 12 2 0 85 7 5 0 14 343 4 872 3 69 1527 0 3359 2 3 0 95 April 1, 2026 at 06:58:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 103 144 1 1 0 0 1137 0 1 0 99 1 0 0 0 112 50 104 0 1 0 0 0 0 0 0 100 2 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 214 104 6 0 0 0 0 294 0 0 0 100 5 0 0 0 24 9 18 0 0 0 0 311 0 0 0 100 6 0 0 10 215 104 6 1 0 0 0 560 0 0 0 100 7 0 0 14 9 3 6 0 0 0 0 267 0 0 0 100 April 1, 2026 at 06:58:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 150 0 0 0 0 1140 0 1 0 99 1 0 0 0 111 52 104 0 0 0 0 1 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 1 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 294 0 0 0 100 5 0 0 0 27 10 22 0 1 0 0 308 0 0 0 100 6 0 0 10 213 104 6 0 0 0 0 560 0 0 0 100 7 0 0 14 16 4 16 1 1 0 0 271 0 0 0 100 April 1, 2026 at 06:58:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 168 1 1 1 0 1138 0 1 0 99 1 0 0 0 109 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 16 3 14 0 0 0 0 17 0 0 0 100 3 0 0 0 11 0 12 0 0 0 0 13 0 0 0 100 4 0 0 3 217 104 16 0 0 0 0 306 0 0 0 100 5 0 0 0 30 16 18 0 0 0 0 311 0 0 0 100 6 0 0 10 212 104 6 0 0 0 0 560 0 0 0 100 7 0 0 14 12 2 8 0 0 1 0 266 0 0 0 100 April 1, 2026 at 06:58:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 146 1 0 0 0 1138 0 1 0 99 1 0 0 0 109 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 75 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 225 109 20 0 0 0 0 305 0 0 0 100 5 0 0 0 21 7 16 0 0 0 0 309 0 0 0 100 6 0 0 10 215 104 12 1 1 0 0 566 0 0 0 100 7 0 0 14 16 6 14 0 0 0 0 277 0 0 0 100 April 1, 2026 at 06:58:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 106 702 1 80 1348 2 1138 0 2 0 98 1 0 0 0 281 32 537 0 74 1057 2 0 0 1 0 99 2 0 0 0 192 16 384 0 68 1095 0 0 0 1 0 99 3 0 0 0 251 106 344 0 64 1276 0 1 0 1 0 99 4 0 0 3 410 203 415 1 56 1254 0 303 0 2 0 98 5 0 0 0 157 3 345 0 55 1195 1 302 0 1 0 99 6 0 0 10 355 104 351 0 63 1165 0 561 0 1 0 99 7 0 0 14 154 3 338 0 53 1112 0 267 0 1 0 99 April 1, 2026 at 06:58:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 152 0 0 0 0 1141 0 1 0 99 1 0 0 0 111 51 104 0 0 0 0 0 0 0 0 100 2 0 0 0 9 0 8 0 1 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 4 0 0 3 226 111 20 0 0 0 0 301 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 6 0 0 10 215 105 8 1 0 0 0 560 0 0 0 100 7 0 0 14 11 4 8 0 0 0 0 271 0 0 0 100 April 1, 2026 at 06:58:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 148 1 0 0 0 1134 0 1 0 99 1 0 0 0 109 51 102 0 0 0 0 0 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 226 111 20 0 0 0 0 304 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 302 0 0 0 100 6 0 0 10 214 105 8 0 0 0 0 562 0 0 0 100 7 0 0 14 10 3 6 1 0 0 0 267 0 0 0 100 April 1, 2026 at 06:58:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1618 0 0 2161 108 5869 36 114 49 12 21797 6 4 0 90 1 37 0 0 415 38 5246 18 74 90 5 11287 4 3 0 94 2 14 0 0 541 15 3246 11 43 63 3 9675 3 2 0 95 3 55 0 0 493 6 3841 11 52 43 2 8518 3 2 0 95 4 176 0 3 1223 110 3576 8 35 104 14 10348 5 2 0 93 5 2002 0 114 617 13 2979 12 34 35 10 8426 3 2 0 94 6 483 0 12 1265 106 5518 14 44 84 8 11754 3 2 0 94 7 105 0 14 331 6 2894 8 31 35 6 10417 2 1 0 96 April 1, 2026 at 06:58:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 64 0 14 2188 113 23858 102 432 355 0 62008 21 12 0 67 1 41 0 0 138 21 23620 76 358 260 0 50957 18 11 0 71 2 79 0 0 123 25 24537 62 263 257 0 53086 15 11 0 74 3 18 0 0 83 11 21585 43 204 224 0 43583 14 9 0 77 4 86 0 7 269 107 24194 28 146 334 0 52804 16 10 0 73 5 37 0 0 62 9 20314 22 110 169 0 42676 12 8 0 80 6 33 0 14 258 114 15465 26 98 183 0 36674 12 8 0 80 7 10 0 0 55 9 12107 21 89 197 0 32562 11 6 0 83 April 1, 2026 at 06:58:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2178 106 1654 14 106 1209 4 6456 3 3 0 94 1 0 0 10 372 14 1207 5 86 887 0 4172 3 2 0 95 2 2 0 0 603 15 1503 4 71 969 4 2537 4 2 0 94 3 36 0 0 486 103 1374 10 72 970 5 1961 1 2 0 97 4 0 0 297 698 224 1721 6 87 1252 3 2994 2 2 0 96 5 50 0 0 450 24 864 6 68 823 6 3582 8 2 0 90 6 5 0 3 478 104 1329 5 66 965 1 4726 3 2 0 95 7 0 0 7 238 1 1202 8 64 969 0 3343 8 2 0 90 April 1, 2026 at 06:58:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 14 2159 154 146 0 0 0 0 1404 0 1 0 99 1 0 0 7 14 1 8 0 3 0 0 0 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 25 7 16 0 0 0 0 9 0 0 0 100 4 0 0 3 229 104 23 0 5 0 0 294 0 0 0 100 5 0 0 0 11 1 2 0 0 0 0 2 0 0 0 100 6 0 0 3 303 103 96 0 2 0 0 601 0 0 0 100 7 0 0 7 16 3 12 0 1 0 0 260 0 0 0 100 April 1, 2026 at 06:58:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 126 2142 139 126 1 2 0 0 1401 0 1 0 99 1 0 0 0 65 17 43 0 3 0 0 1 0 0 0 100 2 0 0 0 24 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 35 7 14 0 0 0 0 7 0 0 0 100 4 0 0 3 238 105 12 0 0 0 0 294 0 0 0 100 5 0 0 0 24 1 4 0 1 0 0 1 0 0 0 100 6 0 0 3 328 103 104 1 0 0 0 599 0 0 0 100 7 0 0 7 28 2 6 1 1 0 0 260 0 0 0 100 April 1, 2026 at 06:58:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2120 109 141 2 2 0 0 1415 0 1 0 99 1 0 0 0 108 43 97 0 3 2 0 0 0 0 0 100 2 0 0 0 14 1 14 0 0 1 0 16 0 0 0 100 3 0 0 0 32 10 32 0 0 0 0 36 0 0 0 100 4 0 0 10 224 105 26 0 1 0 0 311 0 0 0 100 5 0 0 0 16 7 8 0 2 0 0 3 0 0 0 100 6 0 0 3 231 107 22 0 4 0 0 599 0 0 0 100 7 0 0 7 21 4 14 0 3 0 0 260 0 0 0 100 April 1, 2026 at 06:58:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2129 113 165 0 0 5 0 1645 2 1 0 98 1 0 0 0 122 51 108 0 2 0 0 0 0 0 0 100 2 0 0 0 28 1 36 0 1 0 0 232 0 0 0 100 3 0 0 0 64 2 112 0 1 0 0 159 0 0 0 100 4 0 0 31 266 106 110 0 1 1 0 458 0 0 0 100 5 0 0 0 50 0 75 1 2 0 0 76 0 0 0 100 6 0 0 3 235 103 40 0 1 0 0 618 0 0 0 100 7 0 0 7 13 2 6 0 1 0 0 559 0 0 0 100 April 1, 2026 at 06:58:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2183 109 931 10 120 2425 6 3394 9 3 0 88 1 0 0 0 374 4 878 9 100 1861 1 2527 4 2 0 94 2 0 0 0 355 21 1191 6 98 1854 1 1869 3 3 0 94 3 0 0 0 400 153 1200 6 96 2036 0 1974 6 3 0 91 4 8 0 284 559 270 1531 100 131 2229 2 3263 2 3 0 95 5 5 0 0 439 1 1219 3 83 2175 1 795 1 3 0 97 6 0 0 2 494 103 1572 3 99 1940 0 2742 1 3 0 96 7 0 0 7 301 22 541 2 97 1643 1 608 0 2 0 98 April 1, 2026 at 06:58:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1918 0 14 2143 134 125 3 7 9 5 1691 0 1 0 99 1 4 0 0 115 2 125 0 9 5 2 24 0 0 0 100 2 6 0 0 19 2 26 0 2 3 1 49 0 0 0 100 3 0 0 0 20 0 22 0 2 1 0 13 0 0 0 100 4 295 0 3 224 104 31 0 2 4 4 322 0 0 0 100 5 13 0 0 23 0 41 0 11 9 4 144 0 0 0 100 6 6 0 3 223 103 29 0 5 3 3 345 0 0 0 100 7 2 0 7 76 29 77 0 6 4 0 605 0 0 0 100 April 1, 2026 at 06:58:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 16 2185 160 179 1 4 1 6 1583 0 1 0 99 1 5 0 0 129 0 116 0 1 1 3 40 0 0 0 100 2 6 0 0 32 2 22 0 4 0 5 80 0 0 0 100 3 24 0 0 40 1 33 0 4 1 4 102 0 0 0 100 4 13 0 3 236 105 17 0 2 1 3 41 0 0 0 100 5 48 0 0 32 2 10 0 0 0 0 301 0 0 0 100 6 94 0 3 242 103 46 1 2 0 12 399 0 0 0 100 7 1202 0 120 27 4 38 2 1 0 9 7082 1 1 0 98 April 1, 2026 at 06:58:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2171 158 159 1 3 0 0 1495 0 1 0 99 1 0 0 0 105 3 96 0 1 0 0 0 0 0 0 100 2 0 0 0 22 5 21 0 2 0 0 18 0 0 0 100 3 0 0 0 20 0 18 0 1 1 0 13 0 0 0 100 4 0 0 3 219 103 18 0 1 0 0 10 0 0 0 100 5 0 0 0 16 7 6 0 2 0 0 294 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 300 0 0 0 100 7 0 0 7 13 3 10 0 0 0 0 559 0 0 0 100 April 1, 2026 at 06:58:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 160 0 14 2199 114 19748 118 416 232 0 49080 16 11 0 73 1 133 0 7 528 26 19579 86 333 281 0 49948 18 10 0 72 2 84 0 0 1165 23 21127 84 273 298 0 47021 15 10 0 75 3 52 0 0 613 9 22881 60 196 250 0 44574 15 9 0 76 4 56 0 7 1069 112 17215 43 129 215 0 44113 15 10 0 76 5 155 0 0 409 7 11946 31 99 138 0 34801 10 6 0 85 6 17 0 7 327 108 15731 33 106 109 0 36214 10 7 0 83 7 446 0 0 140 8 14253 23 79 95 0 25902 9 6 0 85 April 1, 2026 at 06:58:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 98 0 14 2161 112 6372 46 215 2028 0 14360 4 5 0 91 1 3 0 7 227 28 5625 24 152 1640 0 12187 4 4 0 91 2 111 0 0 212 14 5862 118 171 1639 0 11043 4 4 0 93 3 6 0 0 298 134 6179 24 139 1723 0 9085 3 4 0 93 4 13 0 3 384 243 2854 16 127 1835 0 9346 3 4 0 93 5 11 0 0 160 9 3723 10 118 1738 0 9635 3 3 0 94 6 9 0 3 339 103 5292 14 100 1706 0 10905 4 4 0 92 7 0 0 0 134 3 3402 7 114 1478 0 5352 2 3 0 95 April 1, 2026 at 06:58:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 103 150 2 1 0 0 1487 0 1 0 99 1 0 0 7 112 52 104 0 0 0 0 260 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 21 7 17 0 2 0 0 9 0 0 0 100 4 0 0 3 216 103 10 0 1 0 0 0 0 0 0 100 5 0 0 0 10 1 6 0 2 0 0 294 0 0 0 100 6 0 0 3 215 103 6 1 1 0 0 302 0 0 0 100 7 0 0 0 10 2 6 0 1 0 0 301 0 0 0 100 April 1, 2026 at 06:58:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 103 136 0 0 0 0 1486 0 1 0 99 1 0 0 7 111 52 104 0 0 0 0 260 0 0 0 100 2 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 3 1 0 0 33 10 26 1 1 0 0 12 0 0 0 100 4 0 0 3 212 103 6 0 1 0 0 0 0 0 0 100 5 0 0 0 16 3 12 0 0 0 0 299 0 0 0 100 6 0 0 3 210 102 4 0 1 0 0 300 0 0 0 100 7 0 0 0 12 3 8 0 0 0 0 304 0 0 0 100 April 1, 2026 at 06:58:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 103 140 1 0 0 0 1499 0 1 0 99 1 0 0 7 113 52 106 1 1 0 0 260 0 0 0 100 2 0 0 0 15 2 16 0 0 0 0 15 0 0 0 100 3 0 0 0 31 8 30 0 0 0 0 25 0 0 0 100 4 0 0 3 218 103 16 0 0 0 0 9 0 0 0 100 5 0 0 0 17 9 6 0 1 1 0 294 0 0 0 100 6 0 0 3 213 104 6 0 0 0 0 302 0 0 0 100 7 0 0 0 10 1 6 0 1 0 0 300 0 0 0 100 April 1, 2026 at 06:58:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 103 140 1 0 0 0 1487 0 1 0 99 1 0 0 7 112 52 106 0 1 1 0 260 0 0 0 100 2 0 0 0 10 2 6 0 1 0 0 0 0 0 0 100 3 0 0 0 23 6 18 0 1 0 0 9 0 0 0 100 4 0 0 3 215 104 8 0 1 0 0 1 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 294 0 0 0 100 6 0 0 3 213 103 6 0 2 0 0 300 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:58:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2114 104 259 1 12 139 0 1485 0 1 0 99 1 0 0 7 172 52 225 0 7 89 0 260 0 0 0 100 2 0 0 0 67 2 124 0 8 100 0 0 0 0 0 100 3 0 0 0 89 40 115 0 4 109 0 14 0 0 0 100 4 0 0 3 294 136 120 0 5 103 0 1 0 0 0 100 5 0 0 0 55 1 94 0 7 80 0 294 0 0 0 100 6 0 0 3 266 103 114 1 8 116 0 302 0 0 0 100 7 0 0 0 64 1 121 0 11 86 0 300 0 0 0 100 April 1, 2026 at 06:59:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 103 144 0 1 0 0 1483 0 1 0 99 1 0 0 7 85 38 76 0 1 0 0 260 0 0 0 100 2 0 0 0 46 19 42 0 1 0 0 3 0 0 0 100 3 0 0 0 25 8 24 0 1 0 0 10 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 10 1 4 0 0 0 0 294 0 0 0 100 6 0 0 3 213 103 4 0 0 0 0 301 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 300 0 0 0 100 April 1, 2026 at 06:59:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2109 104 148 1 1 0 0 1485 0 1 0 99 1 0 0 7 11 2 4 1 0 0 0 260 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 0 0 0 0 100 3 0 0 0 19 6 14 0 0 1 0 8 0 0 0 100 4 0 0 3 213 104 8 0 1 0 0 1 0 0 0 100 5 0 0 0 11 1 6 0 1 0 0 294 0 0 0 100 6 0 0 3 213 104 6 0 0 0 0 303 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 103 148 2 0 0 0 1483 0 1 0 99 1 0 0 7 11 2 4 0 0 0 0 260 0 0 0 100 2 0 0 0 118 54 118 0 1 0 0 17 0 0 0 100 3 0 0 0 25 7 26 0 0 0 0 23 0 0 0 100 4 1 0 3 215 103 14 0 0 0 0 12 0 0 0 100 5 0 0 0 15 7 4 0 0 0 0 294 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 300 0 0 0 100 7 0 0 0 10 1 6 0 1 0 0 300 0 0 0 100 April 1, 2026 at 06:59:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2111 104 148 0 1 0 0 1486 0 1 0 99 1 0 0 7 13 3 6 0 0 1 0 260 0 0 0 100 2 0 0 0 111 53 104 0 0 1 0 0 0 0 0 100 3 0 0 0 22 8 14 1 0 1 0 9 0 0 0 100 4 0 0 3 210 103 4 0 0 1 0 0 0 0 0 100 5 0 0 0 15 2 8 0 0 1 0 294 0 0 0 100 6 0 0 3 216 103 12 1 1 1 0 302 0 0 0 100 7 0 0 0 10 2 2 0 0 1 0 300 0 0 0 100 April 1, 2026 at 06:59:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 54 0 14 2185 114 20624 109 341 244 0 52077 17 12 0 72 1 358 0 0 543 8 20636 78 262 173 0 45929 14 10 0 76 2 104 0 7 949 19 18424 54 203 193 0 44122 14 9 0 76 3 39 0 0 763 13 15830 50 158 111 0 34813 12 8 0 80 4 72 0 3 776 114 10945 31 118 130 0 31021 11 6 0 83 5 79 0 0 1009 11 23495 26 88 196 0 55295 15 10 0 75 6 63 0 3 693 111 17213 25 97 136 0 35217 11 7 0 81 7 183 0 0 1357 15 15164 21 77 128 0 33215 10 7 0 83 April 1, 2026 at 06:59:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 14 2167 136 7296 24 129 96 0 18947 7 4 0 89 1 2 0 0 108 11 7339 13 105 38 0 13453 4 3 0 93 2 1 0 7 44 8 7810 17 89 48 0 16389 5 3 0 92 3 92 0 0 31 8 6607 5 50 82 0 17587 6 4 0 91 4 24 0 3 250 111 5505 13 56 50 0 14031 5 3 0 92 5 0 0 0 23 4 4964 8 24 54 0 12953 3 2 0 94 6 2 0 3 235 109 6807 11 33 132 0 19703 6 3 0 91 7 1 0 0 33 7 8847 10 26 65 0 13024 4 3 0 93 April 1, 2026 at 06:59:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2155 146 123 0 4 0 0 275 0 0 0 100 1 0 0 0 119 13 148 0 2 1 0 1221 0 0 0 100 2 0 0 7 17 5 10 0 0 0 0 261 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 13 3 8 0 0 0 0 2 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 595 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2117 108 124 0 0 0 0 275 0 0 0 100 1 0 0 0 120 51 142 1 1 1 0 1220 0 0 0 100 2 0 0 7 24 4 28 1 1 0 0 275 0 0 0 100 3 0 0 0 12 2 10 0 0 0 0 16 0 0 0 100 4 1 0 3 214 103 12 0 0 0 0 12 0 0 0 100 5 0 0 0 20 11 6 0 0 1 0 1 0 0 0 100 6 0 0 3 214 104 6 1 0 0 0 595 0 0 0 100 7 0 0 0 10 1 6 0 1 0 0 300 0 0 0 100 April 1, 2026 at 06:59:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 108 118 1 0 0 0 275 0 0 0 100 1 0 0 0 118 51 140 1 0 1 0 1221 0 0 0 100 2 0 0 7 15 5 10 0 0 0 0 261 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 1 0 0 0 100 5 0 0 0 9 1 6 0 1 0 0 0 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 594 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2119 109 585 0 67 1152 1 274 0 1 0 99 1 0 0 0 294 52 539 1 59 919 1 1228 0 1 0 99 2 0 0 14 193 10 393 0 54 1020 0 275 0 1 0 99 3 0 0 0 238 99 335 1 56 952 0 3 0 1 0 99 4 0 0 3 427 211 327 0 50 1114 0 4 0 1 0 99 5 0 0 0 167 1 362 0 62 974 0 2 0 1 0 99 6 0 0 3 347 106 303 0 55 817 1 623 0 1 0 99 7 0 0 0 133 3 283 0 41 913 1 300 0 1 0 99 April 1, 2026 at 06:59:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 103 114 0 0 0 0 266 0 1 0 99 1 0 0 0 119 51 142 0 1 2 0 1222 0 0 0 100 2 0 0 14 26 9 22 0 1 0 0 269 0 0 0 100 3 0 0 0 11 1 6 0 2 0 0 0 0 0 0 100 4 0 0 3 213 103 6 0 1 0 0 0 0 0 0 100 5 0 0 0 14 1 16 0 2 0 0 0 0 0 0 100 6 0 0 3 214 104 6 0 0 0 0 595 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 14 2111 104 118 0 0 1 0 276 0 1 0 99 1 0 0 0 117 51 140 1 0 0 0 1221 0 0 0 100 2 0 0 7 24 9 20 0 0 0 0 269 0 0 0 100 3 0 0 0 11 2 8 0 1 2 0 21 0 0 0 100 4 0 0 3 216 104 10 0 0 0 0 34 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 3 217 105 10 1 0 2 0 597 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 103 116 0 0 0 0 275 0 0 0 100 1 0 0 0 94 39 114 1 0 1 0 1215 0 0 0 100 2 0 0 7 56 23 56 1 1 0 0 287 0 0 0 100 3 0 0 0 13 1 14 0 0 0 0 13 0 0 0 100 4 0 0 3 215 103 14 0 0 0 0 12 0 0 0 100 5 0 0 0 19 6 10 0 0 0 0 18 0 0 0 100 6 0 0 3 212 103 6 0 1 0 0 594 0 0 0 100 7 0 0 0 12 2 8 0 1 0 0 301 0 0 0 100 April 1, 2026 at 06:59:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2105 103 112 1 1 0 0 267 0 0 0 100 1 0 0 0 21 2 40 0 1 1 0 1211 0 0 0 100 2 0 0 7 128 60 118 0 0 1 0 269 0 0 0 100 3 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 4 0 0 7 211 103 4 0 0 1 0 0 0 0 0 100 5 0 0 0 14 2 6 0 0 1 0 0 0 0 0 100 6 0 0 7 216 104 8 0 1 1 0 596 0 0 0 100 7 0 0 0 11 2 4 0 1 1 0 300 0 0 0 100 April 1, 2026 at 06:59:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3591 0 21 2915 105 1470 714 71 212 8 5739 76 4 0 20 1 3113 0 0 1166 9 2242 1057 91 148 8 7312 76 3 0 21 2 5463 0 7 1165 21 2211 1054 70 184 3 6712 76 4 0 20 3 3040 0 0 950 5 1736 845 89 155 5 5813 77 3 0 20 4 2076 0 1082 911 109 1494 694 108 153 9 6224 76 3 0 21 5 3530 0 0 942 13 1657 822 88 184 7 5534 77 3 0 20 6 7499 0 3 1165 115 1944 895 89 194 6 6151 76 4 0 20 7 4529 0 0 922 5 1673 789 90 187 10 6654 76 3 0 20 April 1, 2026 at 06:59:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 350 2267 137 273 98 16 7 0 1175 18 1 0 82 1 35 0 0 286 2 468 213 12 6 0 2094 19 1 0 81 2 2 0 7 248 2 362 178 13 15 0 1526 19 0 0 81 3 0 0 0 248 6 322 156 14 11 0 1095 17 0 0 82 4 4 0 227 479 117 346 116 23 11 0 1008 17 1 0 82 5 37 0 0 318 3 528 254 14 17 0 1106 18 0 0 81 6 4 0 3 525 105 491 245 10 16 0 1709 19 0 0 81 7 10 0 0 190 1 192 97 22 16 0 1720 17 0 0 82 April 1, 2026 at 06:59:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 14 2156 151 106 0 1 0 0 280 0 0 0 100 1 0 0 0 12 2 36 0 1 0 0 1232 0 0 0 100 2 0 0 7 11 3 10 0 2 0 0 261 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 3 330 109 124 0 0 0 0 9 0 0 0 100 5 0 0 0 12 2 6 0 1 0 0 2 0 0 0 100 6 0 0 3 214 104 6 0 0 0 0 594 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2154 151 108 0 0 0 0 266 0 0 0 100 1 0 0 0 12 2 34 1 0 0 0 1229 0 0 0 100 2 0 0 7 14 2 16 0 0 0 0 273 0 0 0 100 3 0 0 0 18 5 18 0 0 0 0 18 0 0 0 100 4 0 0 3 337 110 136 0 0 0 0 19 0 0 0 100 5 0 0 0 13 6 2 0 0 1 0 0 0 0 0 100 6 0 0 3 215 105 8 0 0 0 0 596 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2154 151 106 0 0 0 0 266 0 0 0 100 1 0 0 0 13 2 34 1 0 0 0 1229 0 0 0 100 2 0 0 7 11 2 6 1 1 0 0 259 0 0 0 100 3 0 0 0 14 2 10 0 1 0 0 0 0 0 0 100 4 0 0 3 332 110 126 0 0 0 0 10 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 3 213 104 6 0 0 0 0 594 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 300 0 0 0 100 April 1, 2026 at 06:59:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 21 2200 123 879 9 23 28 0 3467 9 1 0 90 1 29 0 0 245 19 1234 5 25 32 0 4156 2 1 0 97 2 1 0 0 173 14 1053 8 15 26 0 3104 4 1 0 95 3 40 0 0 149 4 995 11 17 76 0 4780 8 1 0 90 4 0 0 302 412 109 957 7 22 40 0 3029 3 1 0 96 5 2 0 9 315 3 640 7 10 66 0 4186 9 1 0 90 6 4 0 19 476 107 742 6 9 57 0 4194 6 1 0 92 7 2 0 0 343 3 867 5 10 9 0 1841 3 0 0 96 April 1, 2026 at 06:59:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2118 109 124 1 1 0 0 531 0 0 0 99 1 0 0 0 15 3 36 1 0 0 0 1135 0 0 0 100 2 0 0 0 107 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 4 0 0 3 222 103 14 0 0 0 0 0 0 0 0 100 5 0 0 7 10 1 4 0 2 0 0 0 0 0 0 100 6 0 0 3 219 105 10 0 1 0 0 595 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 133 2119 109 125 0 0 0 0 535 0 0 0 99 1 0 0 0 32 4 38 0 0 0 0 1139 0 0 0 100 2 0 0 0 123 51 102 0 0 0 0 1 0 0 0 100 3 0 0 0 27 3 6 0 0 0 0 1 0 0 0 100 4 0 0 3 238 104 16 0 0 0 0 1 0 0 0 100 5 0 0 0 29 0 12 0 1 0 0 0 0 0 0 100 6 0 0 3 236 106 12 0 1 0 0 596 0 0 0 100 7 0 0 0 23 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2117 108 124 0 1 0 0 531 0 0 0 99 1 0 0 0 13 2 34 1 0 0 0 1134 0 0 0 100 2 0 0 0 114 52 112 0 0 0 0 17 0 0 0 100 3 0 0 0 17 2 18 0 0 0 0 16 0 0 0 100 4 0 0 3 224 103 22 0 0 0 0 12 0 0 0 100 5 0 0 0 16 6 4 0 0 0 0 0 0 0 0 100 6 0 0 3 218 104 14 0 1 0 0 595 0 0 0 100 7 0 0 0 12 1 6 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2185 119 1403 6 10 15 0 3005 3 1 0 96 1 19 0 0 162 14 819 10 14 25 0 4010 9 1 0 90 2 1 0 0 266 28 501 6 10 5 0 3489 4 1 0 95 3 2 0 0 163 8 860 3 10 2 0 1032 1 0 0 99 4 0 0 283 306 107 438 0 3 7 0 662 0 0 0 99 5 1 0 0 58 1 14 0 4 1 0 15 0 0 0 100 6 4 0 3 367 105 394 9 3 23 0 2606 8 0 0 92 7 8 0 0 209 2 430 4 1 7 0 3768 2 1 0 97 April 1, 2026 at 06:59:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2132 109 967 0 125 2366 4 535 0 2 0 98 1 0 0 0 257 13 573 3 84 1884 0 1135 0 3 0 97 2 0 0 0 340 40 668 0 94 1983 0 1 0 2 0 98 3 0 0 0 382 162 519 0 97 2052 2 0 0 2 0 98 4 0 0 4 607 280 786 0 113 2367 5 1 0 2 0 98 5 0 0 0 261 0 582 0 92 1791 3 0 0 2 0 98 6 0 0 2 433 103 507 1 89 1895 1 594 0 2 0 98 7 0 0 0 222 2 510 0 94 1975 3 300 0 2 0 98 April 1, 2026 at 06:59:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2120 110 132 1 0 0 0 533 0 0 0 100 1 0 0 0 11 2 34 0 0 0 0 1134 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 5 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 3 219 104 14 0 0 0 0 596 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2119 109 130 0 0 0 0 535 0 0 0 99 1 0 0 0 12 2 34 1 0 0 0 1133 0 0 0 100 2 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 2 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 594 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 80 0 21 2182 112 9080 52 201 144 9 23576 8 6 0 86 1 65 0 0 228 11 10590 55 186 115 2 28347 8 5 0 87 2 354 0 0 1327 32 9267 34 113 148 1 21836 7 5 0 88 3 3459 0 113 272 6 6633 36 102 127 12 24086 9 5 0 86 4 172 0 3 848 112 6089 15 75 33 12 12143 4 3 0 93 5 48 0 0 446 16 5714 16 51 67 7 15916 4 4 0 92 6 262 0 6 1212 109 8392 10 55 88 6 16855 5 4 0 91 7 37 0 0 196 4 4649 11 45 61 2 10912 4 2 0 94 April 1, 2026 at 06:59:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 65 0 0 2165 107 16837 71 328 300 0 41355 15 9 0 77 1 36 0 14 89 9 16179 62 268 163 0 35196 13 8 0 80 2 7 0 7 76 14 18518 34 198 176 0 33603 12 7 0 81 3 28 0 0 80 11 17635 30 167 151 0 34034 11 7 0 82 4 22 0 2 260 112 17136 33 124 351 0 45381 14 8 0 78 5 14 0 0 75 24 12482 20 87 120 0 29334 9 6 0 85 6 24 0 4 261 115 12073 15 65 73 0 26351 6 5 0 89 7 23 0 0 45 6 9909 18 72 98 0 27002 9 6 0 85 April 1, 2026 at 06:59:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 100 565 0 66 1143 0 0 0 2 0 98 1 0 0 14 147 6 329 1 42 996 1 1484 0 2 0 98 2 0 0 7 169 8 353 0 41 808 0 267 0 1 0 99 3 0 0 0 253 107 314 0 47 920 1 5 0 1 0 99 4 0 0 3 435 215 419 0 49 958 0 0 0 1 0 99 5 0 0 0 264 51 449 0 43 836 1 6 0 1 0 99 6 0 0 3 344 104 302 0 40 836 1 597 0 1 0 99 7 0 0 0 138 2 291 0 43 825 0 300 0 1 0 99 April 1, 2026 at 06:59:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 1 0 0 0 0 0 0 100 1 0 0 14 14 3 38 1 1 0 0 1483 0 0 0 100 2 0 0 7 22 8 16 1 0 0 0 269 0 0 0 100 3 0 0 0 10 2 6 0 2 0 0 0 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 0 0 0 0 100 5 0 0 0 107 52 100 0 0 0 0 0 0 0 0 100 6 0 0 3 216 104 8 0 1 1 0 594 0 0 0 100 7 0 0 0 8 1 4 0 1 0 0 300 0 0 0 100 April 1, 2026 at 06:59:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 114 0 0 0 0 0 0 0 0 100 1 0 0 14 16 4 38 2 0 0 0 1482 0 0 0 100 2 0 0 7 22 8 16 1 0 0 0 269 0 0 0 100 3 0 0 0 17 4 10 0 1 0 0 24 0 0 0 100 4 0 0 3 215 105 10 0 1 0 0 1 0 0 0 100 5 0 0 0 106 50 102 0 0 0 0 1 0 0 0 100 6 0 0 3 216 105 8 1 0 0 0 597 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 300 0 0 0 100 April 1, 2026 at 06:59:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 14 13 4 38 0 0 0 0 1483 0 0 0 100 2 0 0 7 32 10 38 0 0 0 0 289 0 0 0 100 3 0 0 0 15 3 14 0 0 0 0 17 0 0 0 100 4 0 0 3 217 104 16 0 0 0 0 12 0 0 0 100 5 0 0 0 115 58 100 0 0 2 0 0 0 0 0 100 6 0 0 3 212 103 6 0 0 0 0 597 0 0 0 100 7 0 0 0 10 1 6 0 1 1 0 300 0 0 0 100 April 1, 2026 at 06:59:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 114 0 2 1 0 1 0 0 0 100 1 0 0 14 17 5 38 1 0 1 0 1477 0 0 0 100 2 0 0 7 27 11 20 0 0 1 0 275 0 0 0 100 3 0 0 0 15 3 4 0 0 1 0 1 0 0 0 100 4 0 0 7 217 104 10 0 0 1 0 0 0 0 0 100 5 0 0 0 112 52 104 0 1 1 0 5 0 0 0 100 6 0 0 7 220 104 10 0 2 1 0 596 0 0 0 100 7 0 0 0 10 2 2 0 0 1 0 300 0 0 0 100 April 1, 2026 at 06:59:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 114 0 0 2 0 0 0 0 0 100 1 0 0 14 15 4 40 1 0 0 0 1477 0 0 0 100 2 0 0 7 24 8 22 1 0 0 0 270 0 0 0 100 3 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 4 0 0 3 218 105 12 0 0 2 0 1 0 0 0 100 5 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 6 0 0 3 212 103 8 0 1 0 0 593 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 14 15 4 38 2 0 0 0 1477 0 0 0 100 2 0 0 7 20 8 18 0 1 0 0 269 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 0 0 0 0 100 5 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 6 0 0 3 214 104 6 1 0 0 0 597 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 112 0 0 2 0 0 0 0 0 100 1 0 0 14 13 4 38 1 0 0 0 1478 0 0 0 100 2 0 0 7 21 8 16 0 0 0 0 269 0 0 0 100 3 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 4 0 0 3 215 104 8 0 0 0 0 0 0 0 0 100 5 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 6 0 0 3 214 104 8 0 1 0 0 594 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 14 14 4 38 1 0 0 0 1477 0 0 0 100 2 0 0 7 31 12 32 0 0 0 0 288 0 0 0 100 3 0 0 0 13 1 14 0 0 0 0 13 0 0 0 100 4 0 0 3 217 104 16 0 0 0 0 12 0 0 0 100 5 0 0 0 112 57 100 0 0 0 0 0 0 0 0 100 6 0 0 3 216 104 8 0 0 0 0 596 0 0 0 100 7 0 0 0 11 1 8 0 2 0 0 300 0 0 0 100 April 1, 2026 at 06:59:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 0 2157 108 10334 74 263 135 0 25956 9 6 0 85 1 4 0 14 403 7 9291 48 171 176 0 25492 9 5 0 86 2 0 0 7 766 11 9267 45 139 83 0 25678 7 5 0 88 3 2 0 0 801 6 7160 21 92 77 0 14108 5 3 0 92 4 16 0 3 540 109 6001 20 66 59 0 15474 5 3 0 91 5 1 0 0 271 40 5110 20 60 64 0 13596 4 3 0 93 6 0 0 3 577 107 6298 17 60 66 0 13771 4 3 0 93 7 2 0 0 621 8 6218 10 54 44 0 11783 4 2 0 94 April 1, 2026 at 06:59:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2196 112 23023 101 557 729 0 55357 18 11 0 71 1 14 0 0 133 19 20213 108 527 648 1 48274 17 11 0 73 2 15 0 14 102 9 18702 73 453 612 1 42325 14 10 0 77 3 8 0 7 162 86 19842 78 312 729 0 38791 12 9 0 79 4 39 0 3 338 182 16638 35 233 759 0 36287 11 8 0 81 5 10 0 0 73 10 12142 41 210 680 0 31032 11 7 0 82 6 3 0 3 261 108 15473 33 188 650 0 32244 10 7 0 83 7 8 0 0 75 17 13028 28 178 614 0 27789 9 6 0 84 April 1, 2026 at 06:59:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 150 126 0 3 0 0 0 0 0 0 100 1 0 0 0 23 7 46 2 1 0 0 1220 0 0 0 100 2 0 0 14 121 4 114 1 0 0 0 267 0 0 0 100 3 0 0 7 12 3 8 0 1 0 0 260 0 0 0 100 4 0 0 3 214 103 8 0 1 0 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 213 104 6 0 0 0 0 594 0 0 0 100 7 0 0 0 10 1 4 0 1 1 0 300 0 0 0 100 April 1, 2026 at 06:59:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 150 102 0 0 0 0 0 0 0 0 100 1 0 0 0 22 7 44 1 0 0 0 1221 0 0 0 100 2 0 0 14 120 4 118 0 0 0 0 270 0 0 0 100 3 0 0 7 16 6 12 0 0 0 0 262 0 0 0 100 4 0 0 3 216 104 10 0 0 0 0 1 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 216 105 10 0 0 0 0 600 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2156 151 112 0 0 0 0 9 0 0 0 100 1 0 0 0 27 7 52 1 1 1 0 1222 0 0 0 100 2 0 0 14 121 2 124 0 0 0 0 279 0 0 0 100 3 0 0 7 18 6 20 0 0 0 0 277 0 0 0 100 4 0 0 3 219 103 18 0 0 0 0 12 0 0 0 100 5 0 0 0 15 7 6 0 0 0 0 18 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 593 0 0 0 100 7 0 0 0 10 1 6 0 1 0 0 300 0 0 0 100 April 1, 2026 at 06:59:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2154 150 106 0 2 0 0 3 0 0 0 100 1 0 0 0 28 9 48 1 1 1 0 1228 0 0 0 100 2 0 0 14 123 4 118 0 0 1 0 272 0 0 0 100 3 0 0 7 24 6 20 1 1 2 0 264 0 0 0 100 4 0 0 3 215 103 10 0 0 1 0 3 0 0 0 100 5 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 6 0 0 3 214 104 6 1 0 1 0 597 0 0 0 100 7 0 0 0 11 2 6 0 0 1 0 311 0 0 0 100 April 1, 2026 at 06:59:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 111 376 0 36 761 0 0 0 1 0 99 1 0 0 0 163 8 355 1 38 562 0 1222 0 1 0 99 2 0 0 14 130 2 231 0 27 580 0 266 0 1 0 99 3 0 0 7 151 72 263 0 32 668 0 260 0 1 0 99 4 0 0 3 372 179 241 0 32 677 0 1 0 1 0 99 5 0 0 0 108 1 226 0 27 540 0 0 0 1 0 99 6 0 0 3 412 141 363 0 35 588 0 593 0 1 0 99 7 0 0 0 137 2 278 0 39 509 0 300 0 1 0 99 April 1, 2026 at 06:59:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 21 7 44 0 0 1 0 1221 0 0 0 100 2 0 0 14 10 3 6 1 0 0 0 267 0 0 0 100 3 0 0 7 14 4 10 0 1 0 0 260 0 0 0 100 4 0 0 3 218 103 16 0 1 0 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 313 154 108 0 1 0 0 596 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 24 8 46 1 0 0 0 1221 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 12 4 8 0 0 0 0 260 0 0 0 100 4 0 0 3 218 104 12 0 0 0 0 0 0 0 0 100 5 0 0 0 10 2 6 0 1 0 0 1 0 0 0 100 6 0 0 3 313 154 106 0 0 0 0 596 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 22 7 44 1 0 0 0 1222 0 0 0 100 2 0 0 14 15 4 16 1 0 0 0 283 0 0 0 100 3 0 0 7 18 4 20 0 0 0 0 273 0 0 0 100 4 1 0 3 219 103 18 0 0 0 0 12 0 0 0 100 5 0 0 0 12 6 2 0 0 0 0 0 0 0 0 100 6 0 0 3 314 154 106 1 0 0 0 595 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1617 0 0 2550 111 1195 428 41 55 1 1975 33 2 0 64 1 261 0 0 406 11 733 330 39 20 0 2849 34 1 0 65 2 14 0 14 384 4 655 313 36 20 1 1644 34 1 0 65 3 0 0 7 338 9 648 291 42 24 0 1698 34 1 0 65 4 0 0 479 687 104 1136 531 35 41 0 2086 34 1 0 65 5 23 0 0 366 3 649 310 35 19 0 1356 34 1 0 65 6 0 0 3 629 140 679 299 27 20 0 1815 34 1 0 65 7 7 0 0 406 7 768 352 39 25 0 1912 34 1 0 65 April 1, 2026 at 06:59:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2927 107 1745 852 56 71 0 2571 70 2 0 27 1 138 0 0 825 4 1601 796 50 41 0 4218 71 2 0 27 2 4 0 14 726 10 1323 662 63 44 0 2903 72 2 0 27 3 5 0 7 657 8 1159 574 74 72 0 2838 71 2 0 27 4 2 0 758 881 115 1441 718 70 60 0 2680 71 2 0 27 5 217 0 0 853 13 1571 775 46 63 0 2804 71 2 0 27 6 99 0 3 1058 120 1663 788 57 55 0 3801 71 2 0 27 7 0 0 0 756 6 1359 669 66 44 0 2982 71 2 0 27 April 1, 2026 at 06:59:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 0 2113 105 88 0 5 0 0 29 0 0 0 100 1 0 0 0 71 29 92 2 2 1 0 1232 0 0 0 100 2 2 0 14 16 4 10 1 1 0 0 270 0 0 0 100 3 0 0 7 15 4 10 0 0 0 0 261 0 0 0 100 4 0 0 17 218 103 14 0 0 0 0 8 0 0 0 100 5 0 0 0 43 0 34 0 0 0 0 1 0 0 0 100 6 0 0 3 263 126 54 0 3 1 0 621 0 0 0 100 7 0 0 0 23 3 16 0 3 2 0 308 0 0 0 100 April 1, 2026 at 06:59:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 106 120 0 0 0 0 9 0 0 0 100 1 0 0 0 110 51 132 1 0 1 0 1224 0 0 0 100 2 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 16 6 12 0 0 0 0 282 0 0 0 100 4 0 0 3 214 104 8 0 0 0 0 1 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 3 220 105 16 1 1 0 0 597 0 0 0 100 7 0 0 0 17 2 12 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 118 0 0 0 0 9 0 0 0 100 1 0 0 0 109 51 134 0 0 0 0 1224 0 0 0 100 2 0 0 14 13 2 16 0 0 0 0 279 0 0 0 100 3 0 0 7 20 6 20 0 0 0 0 277 0 0 0 100 4 0 0 3 218 103 14 1 0 0 0 12 0 0 0 100 5 0 0 0 10 5 0 0 0 0 0 0 0 0 0 100 6 0 0 3 213 103 6 0 0 0 0 594 0 0 0 100 7 0 0 0 21 2 18 0 1 0 0 300 0 0 0 100 April 1, 2026 at 06:59:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2185 111 918 6 7 24 0 2201 6 1 0 93 1 27 0 0 416 40 1109 6 16 22 0 3387 5 1 0 94 2 2 0 14 279 7 1706 3 16 19 0 3100 1 1 0 98 3 0 0 7 171 8 496 7 12 32 0 3330 10 0 0 89 4 39 0 296 602 109 1085 4 10 29 0 2732 2 1 0 98 5 0 0 8 206 1 661 3 9 40 0 2744 2 1 0 97 6 0 0 21 542 109 890 5 12 106 2 4229 2 1 0 96 7 0 0 0 208 3 442 3 3 62 0 3722 2 1 0 97 April 1, 2026 at 06:59:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 714 0 132 2121 0 0 0 2 0 98 1 0 0 0 378 4 849 1 94 1894 0 1134 0 2 0 98 2 2 0 14 265 35 510 0 90 1576 1 266 0 2 0 98 3 0 0 7 349 151 530 1 94 1830 1 261 0 2 0 98 4 0 0 11 513 260 511 0 105 2038 0 6 0 2 0 98 5 0 0 0 199 0 448 2 72 1547 0 0 0 2 0 98 6 0 0 2 427 106 514 0 98 1801 1 617 0 2 0 98 7 0 0 0 249 9 525 0 86 1640 1 300 0 2 0 98 April 1, 2026 at 06:59:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2104 100 119 0 0 0 0 0 0 0 0 100 1 0 0 0 30 1 40 1 1 0 0 1130 0 0 0 100 2 0 0 14 124 52 104 1 0 0 0 266 0 0 0 100 3 0 0 7 28 4 8 0 0 0 0 260 0 0 0 100 4 0 0 3 242 108 18 0 0 0 0 5 0 0 0 100 5 0 0 0 26 2 6 0 1 0 0 2 0 0 0 100 6 0 0 3 232 104 6 1 0 0 0 597 0 0 0 100 7 0 0 0 25 2 4 0 0 0 0 300 0 0 0 100 April 1, 2026 at 06:59:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 10 1 32 0 0 0 0 1132 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 266 0 0 0 100 3 0 0 7 13 4 8 0 0 0 0 260 0 0 0 100 4 0 0 3 223 109 16 0 0 0 0 9 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 6 0 0 3 214 104 6 0 0 0 0 595 0 0 0 100 7 0 0 0 10 2 6 0 1 0 0 300 0 0 0 100 April 1, 2026 at 06:59:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 100 589 1 2 2 0 744 0 1 0 99 1 0 0 0 192 2 508 1 2 1 0 1883 0 0 0 99 2 0 0 14 258 54 438 1 2 0 0 618 0 0 0 99 3 0 0 7 42 4 34 0 0 0 0 293 0 0 0 100 4 0 0 115 233 108 27 4 0 12 0 771 7 0 0 93 5 2 0 0 108 12 142 1 2 1 0 838 1 0 0 99 6 5 0 3 333 104 203 3 1 1 0 2016 1 1 0 98 7 0 0 0 33 3 14 0 0 0 0 376 0 0 0 100 April 1, 2026 at 06:59:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2144 104 480 5 4 4 0 1096 6 1 0 93 1 0 0 0 59 2 93 2 7 0 0 1200 2 0 0 98 2 0 0 14 50 6 506 2 5 0 0 1274 4 0 0 96 3 0 0 7 149 49 138 1 3 0 0 277 0 0 0 100 4 8 0 185 215 105 672 1 0 4 0 1106 2 0 0 98 5 1 0 0 58 2 272 2 2 0 0 2279 1 1 0 98 6 2 0 3 325 109 284 2 1 4 0 2942 2 1 0 98 7 0 0 0 245 2 502 1 4 1 0 822 1 0 0 99 April 1, 2026 at 06:59:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2663 0 0 2135 100 660 3 82 1485 14 6795 1 3 0 96 1 50 0 0 200 2 422 1 55 1203 9 1252 0 2 0 98 2 6 0 14 193 2 379 0 44 1121 3 324 0 2 0 98 3 9 0 7 345 147 439 0 58 1228 2 326 0 2 0 98 4 2 0 3 473 219 395 0 63 1369 5 52 0 2 0 98 5 731 0 116 162 0 350 0 53 982 7 131 0 2 0 98 6 111 0 3 468 112 532 0 65 1005 16 785 0 1 0 99 7 56 0 0 184 6 382 0 66 1162 6 449 0 2 0 98 April 1, 2026 at 07:00:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 102 0 1 0 0 0 0 0 0 100 1 0 0 0 18 1 40 1 0 0 0 1218 0 0 0 100 2 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 3 0 0 7 16 5 12 0 0 0 0 260 0 0 0 100 4 0 0 3 224 107 22 0 3 0 0 0 0 0 0 100 5 0 0 0 98 46 94 0 1 0 0 0 0 0 0 100 6 0 0 3 232 111 22 1 1 0 0 604 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 April 1, 2026 at 07:00:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 106 0 0 0 0 0 0 0 0 100 1 0 0 0 18 1 40 1 0 1 0 1213 0 0 0 100 2 0 0 14 6 1 2 1 0 0 0 266 0 0 0 100 3 0 0 7 14 5 10 0 0 0 0 261 0 0 0 100 4 0 0 3 214 104 8 0 0 1 0 1 0 0 0 100 5 0 0 0 108 51 104 0 1 0 0 0 0 0 0 100 6 0 0 3 228 111 22 0 1 0 0 606 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 300 0 0 0 100 April 1, 2026 at 07:00:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 154 0 0 2194 117 21897 118 408 258 0 55065 18 12 0 70 1 105 0 0 1038 8 25568 79 300 303 0 56533 17 11 0 72 2 72 0 0 816 9 20496 59 261 251 0 44777 15 10 0 75 3 16 0 21 544 18 21552 39 167 187 0 38759 12 8 0 79 4 253 0 2 661 113 13082 41 117 195 0 39618 12 8 0 80 5 22 0 0 837 26 17637 37 110 258 0 38769 12 8 0 80 6 78 0 4 1056 113 20143 37 88 422 0 52330 15 10 0 75 7 120 0 0 270 13 14060 28 77 205 0 32018 13 7 0 80 April 1, 2026 at 07:00:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 0 2130 108 4012 17 86 47 0 7822 3 2 0 95 1 1 0 0 103 42 3625 14 67 35 0 7907 2 2 0 96 2 5 0 0 23 4 3025 16 48 39 0 8322 3 2 0 96 3 0 0 21 49 14 2492 13 40 26 0 6503 2 1 0 97 4 7 0 3 295 103 3381 9 31 58 0 8124 3 2 0 95 5 2 0 0 24 5 3472 9 23 19 0 4599 2 1 0 97 6 1 0 3 230 106 2036 5 18 28 0 6290 2 1 0 96 7 7 0 0 37 10 3814 3 19 104 0 10532 3 2 0 95 April 1, 2026 at 07:00:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 442 0 63 1258 1 0 0 2 0 98 1 0 0 0 250 7 452 1 49 935 0 1216 0 2 0 98 2 0 0 0 200 0 422 1 58 879 0 0 0 1 0 99 3 0 0 21 289 131 364 0 51 1061 0 526 0 1 0 99 4 0 0 3 519 228 483 0 56 1022 1 0 0 1 0 99 5 0 0 0 190 25 331 0 45 563 0 0 0 1 0 99 6 0 0 3 437 105 490 1 60 923 0 595 0 1 0 99 7 0 0 0 164 7 336 0 51 902 1 309 0 1 0 99 April 1, 2026 at 07:00:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 12 0 0 0 0 0 0 0 0 100 1 0 0 0 110 1 132 1 0 0 0 1218 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 21 10 4 8 0 0 0 0 527 0 0 0 100 4 0 0 3 212 102 6 0 0 0 0 0 0 0 0 100 5 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 6 0 0 3 217 106 12 0 1 0 0 595 0 0 0 100 7 0 0 0 21 8 16 0 0 0 0 311 0 0 0 100 April 1, 2026 at 07:00:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 12 0 0 0 0 0 0 0 0 100 1 0 0 0 111 1 134 1 1 0 0 1217 0 0 0 100 2 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 3 0 0 21 11 4 8 1 0 0 0 526 0 0 0 100 4 0 0 3 214 103 8 0 0 0 0 1 0 0 0 100 5 0 0 0 110 52 106 0 0 0 0 1 0 0 0 100 6 0 0 3 217 106 10 0 0 0 0 595 0 0 0 100 7 0 0 0 21 8 16 0 0 0 0 307 0 0 0 100 April 1, 2026 at 07:00:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 34 1 1 0 0 14 0 0 0 100 1 0 0 0 103 1 124 0 0 0 0 1217 0 0 0 100 2 0 0 0 8 0 2 0 0 2 0 0 0 0 0 100 3 0 0 21 13 4 14 0 1 1 0 525 0 0 0 100 4 0 0 3 221 104 20 0 0 0 0 17 0 0 0 100 5 0 0 0 116 60 102 0 0 0 0 0 0 0 0 100 6 0 0 3 217 106 10 0 0 0 0 596 0 0 0 100 7 0 0 0 26 7 26 0 1 0 0 321 0 0 0 100 April 1, 2026 at 07:00:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 102 112 0 0 0 0 1 0 0 0 100 1 2 0 0 12 2 36 1 0 0 0 1216 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 21 11 4 8 1 0 0 0 526 0 0 0 100 4 0 0 3 212 102 6 0 0 0 0 0 0 0 0 100 5 0 0 0 109 52 104 0 0 0 0 1 0 0 0 100 6 19 0 3 219 106 12 1 0 0 0 602 0 0 0 100 7 0 0 0 22 8 18 0 0 0 0 312 0 0 0 100 April 1, 2026 at 07:00:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 104 128 0 2 2 0 6 0 0 0 100 1 0 0 0 12 2 34 1 0 2 0 1212 0 0 0 100 2 0 0 0 15 4 14 0 0 4 0 6 0 0 0 100 3 0 0 21 12 4 10 0 0 1 0 526 0 0 0 100 4 0 0 4 218 103 16 0 1 1 0 0 0 0 0 100 5 0 0 0 110 52 106 0 0 0 0 0 0 0 0 100 6 0 0 2 219 107 12 0 0 0 0 597 0 0 0 100 7 0 0 0 23 8 20 0 2 0 0 309 0 0 0 100 April 1, 2026 at 07:00:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 114 0 0 0 0 1 0 0 0 100 1 0 0 0 9 1 34 0 1 0 0 1213 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 21 9 3 6 1 0 0 0 526 0 0 0 100 4 0 0 3 214 102 8 0 0 0 0 0 0 0 0 100 5 0 0 0 109 51 104 0 1 0 0 0 0 0 0 100 6 0 0 3 217 106 10 0 0 0 0 594 0 0 0 100 7 0 0 0 21 8 16 0 0 0 0 307 0 0 0 100 April 1, 2026 at 07:00:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 102 116 0 0 0 0 0 0 0 0 100 1 0 0 0 10 1 32 1 0 0 0 1212 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 21 12 5 10 0 0 0 0 549 0 0 0 100 4 0 0 3 214 103 8 0 0 0 0 1 0 0 0 100 5 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 6 0 0 3 219 107 12 0 0 0 0 597 0 0 0 100 7 0 0 0 19 7 14 0 0 0 0 309 0 0 0 100 April 1, 2026 at 07:00:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 131 1 0 2 0 17 0 0 0 100 1 0 0 0 10 1 34 1 0 0 0 1211 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 21 11 4 8 1 0 0 0 527 0 0 0 100 4 0 0 3 218 102 18 0 0 0 0 5 0 0 0 100 5 0 0 0 124 59 122 0 1 1 0 37 0 0 0 100 6 0 0 3 216 105 8 1 0 0 0 594 0 0 0 100 7 0 0 0 27 7 28 0 0 0 0 321 0 0 0 100 April 1, 2026 at 07:00:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 115 0 0 2183 112 23197 105 340 374 0 61953 20 13 0 67 1 17 0 0 252 7 21730 81 259 296 0 51309 18 10 0 72 2 25 0 0 511 6 18809 59 196 300 0 46632 15 9 0 76 3 6 0 0 190 15 20026 35 138 182 0 47433 15 9 0 76 4 10 0 21 429 111 17903 38 114 288 0 44577 14 8 0 77 5 23 0 7 853 19 25013 24 87 168 0 45118 13 10 0 77 6 44 0 7 434 121 12663 25 79 163 0 33932 11 7 0 82 7 15 0 0 317 16 18464 30 82 167 0 35036 11 8 0 82 April 1, 2026 at 07:00:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 49 0 0 2135 106 6409 43 194 999 1 18227 6 4 0 90 1 11 0 0 164 9 8399 22 164 930 3 15993 5 5 0 91 2 6 0 0 118 10 4825 14 135 991 0 9543 4 3 0 93 3 3 0 0 288 144 3850 11 124 1002 0 7768 3 3 0 94 4 1 0 17 425 225 6816 9 108 1031 0 13572 4 4 0 92 5 5 0 7 134 5 5909 16 115 915 1 11428 4 4 0 93 6 5 0 3 350 120 5563 64 114 1102 0 12221 4 3 0 92 7 1 0 0 105 5 2185 7 90 959 0 5586 2 2 0 96 April 1, 2026 at 07:00:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 108 0 2 0 0 594 0 0 0 100 1 0 0 0 23 2 44 1 0 0 0 1212 0 0 0 100 2 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 5 0 0 7 11 2 6 0 0 0 0 260 0 0 0 100 6 0 0 3 319 154 115 0 2 0 0 302 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 108 0 0 0 0 594 0 0 0 100 1 0 0 0 22 2 46 1 0 0 0 1211 0 0 0 100 2 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 5 0 0 7 12 3 6 1 0 0 0 261 0 0 0 100 6 0 0 3 316 154 108 1 0 0 0 301 0 0 0 100 7 0 0 0 10 1 6 0 2 0 0 0 0 0 0 100 April 1, 2026 at 07:00:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 104 112 0 0 1 0 593 0 0 0 100 1 0 0 0 27 4 52 1 1 0 0 1217 0 0 0 100 2 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 17 218 105 18 0 0 0 0 283 0 0 0 100 5 1 0 7 21 9 16 0 0 0 0 274 0 0 0 100 6 0 0 3 314 154 108 0 0 0 0 305 0 0 0 100 7 0 0 0 16 1 14 0 0 0 0 12 0 0 0 100 April 1, 2026 at 07:00:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2126 111 146 0 1 0 0 613 0 0 0 100 1 0 0 0 21 2 46 0 1 1 0 1215 0 0 0 100 2 0 0 0 14 2 10 0 2 0 0 8 0 0 0 100 3 0 0 0 8 0 6 0 0 0 0 7 0 0 0 100 4 0 0 17 210 103 6 1 0 0 0 269 0 0 0 100 5 0 0 7 12 3 8 0 1 0 0 264 0 0 0 100 6 0 0 3 311 153 104 0 0 0 0 300 0 0 0 100 7 0 0 0 9 1 4 0 1 2 0 0 0 0 0 100 April 1, 2026 at 07:00:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 109 297 0 12 197 0 601 0 1 0 99 1 0 0 0 93 2 189 1 13 113 0 1212 0 0 0 100 2 0 0 0 94 0 175 0 15 123 0 0 0 0 0 100 3 0 0 0 111 46 122 0 8 160 0 0 0 0 0 100 4 0 0 17 333 150 164 0 10 141 0 266 0 1 0 99 5 0 0 7 96 3 179 0 14 111 0 260 0 0 0 100 6 0 0 3 385 154 261 0 13 134 0 302 0 0 0 100 7 0 0 0 79 1 151 0 11 90 0 0 0 0 0 100 April 1, 2026 at 07:00:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 110 120 0 0 0 0 604 0 0 0 100 1 0 0 0 16 2 38 1 0 0 0 1212 0 0 0 100 2 0 0 0 15 0 10 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 17 208 103 4 0 0 0 0 266 0 0 0 100 5 0 0 7 9 2 4 1 0 0 0 260 0 0 0 100 6 0 0 3 314 154 108 1 1 0 0 301 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 110 120 0 0 0 0 603 0 0 0 100 1 0 0 0 18 2 42 1 1 2 0 1212 0 0 0 100 2 0 0 0 14 0 10 0 1 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 1 0 0 0 100 4 0 0 17 212 105 8 0 0 0 0 268 0 0 0 100 5 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 6 0 0 3 313 154 108 0 0 0 0 303 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 110 122 0 0 0 0 603 0 0 0 100 1 0 0 0 16 2 40 1 0 0 0 1212 0 0 0 100 2 0 0 0 13 0 8 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 1 0 0 0 100 4 0 0 17 217 103 20 1 1 1 0 286 0 0 0 100 5 0 0 7 25 11 16 0 0 1 0 269 0 0 0 100 6 0 0 3 311 153 104 0 0 0 0 300 0 0 0 100 7 0 0 0 14 1 14 0 0 0 0 10 0 0 0 100 April 1, 2026 at 07:00:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 9 0 3 3163 116 2006 968 81 39 2 4738 83 3 0 14 1 279 0 0 851 13 1545 750 82 51 0 4689 83 2 0 14 2 217 0 0 991 9 1827 900 63 55 0 4081 84 2 0 14 3 1076 0 0 901 11 1728 786 85 48 0 4011 83 2 0 14 4 10 0 1024 895 114 1408 704 84 48 0 3686 84 2 0 14 5 282 0 7 712 7 1186 583 80 68 0 3806 84 2 0 14 6 3 0 3 1053 120 1550 707 79 41 0 4079 84 2 0 14 7 278 0 4 869 7 1556 764 73 44 2 3491 84 2 0 14 April 1, 2026 at 07:00:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2439 106 636 288 25 18 0 1761 33 1 0 66 1 0 0 0 390 33 696 304 32 18 0 2591 33 1 0 66 2 0 0 0 252 3 381 190 29 15 0 910 32 1 0 67 3 0 0 0 388 14 778 369 33 24 0 1627 32 1 0 67 4 0 0 353 557 107 803 398 22 27 0 1813 32 1 0 68 5 11 0 7 175 2 224 120 24 12 0 1103 32 0 0 67 6 0 0 3 527 107 594 293 24 19 0 1517 33 1 0 66 7 0 0 0 232 3 339 167 26 13 0 876 32 0 0 68 April 1, 2026 at 07:00:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 105 118 0 0 0 0 593 0 0 0 100 1 0 0 0 120 53 140 1 0 0 0 1225 0 0 0 100 2 0 0 0 11 0 12 0 3 0 0 0 0 0 0 100 3 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 4 1 0 17 207 103 2 0 0 0 0 266 0 0 0 100 5 0 0 7 9 2 6 0 0 0 0 260 0 0 0 100 6 0 0 3 213 104 8 0 1 0 0 302 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 104 116 0 0 0 0 593 0 0 0 100 1 0 0 0 20 4 42 1 0 0 0 1227 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 21 8 16 0 0 0 0 8 0 0 0 100 4 0 0 17 207 103 4 0 1 0 0 266 0 0 0 100 5 0 0 7 14 4 10 1 0 0 0 262 0 0 0 100 6 0 0 3 214 104 8 0 0 0 0 302 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2113 104 120 0 0 0 0 595 0 0 0 100 1 0 0 0 16 2 38 1 0 1 0 1224 0 0 0 100 2 0 0 0 109 51 106 0 1 0 0 0 0 0 0 100 3 0 0 0 18 6 14 0 1 0 0 9 0 0 0 100 4 0 0 17 217 103 18 0 0 0 0 289 0 0 0 100 5 0 0 7 27 12 18 0 0 1 0 269 0 0 0 100 6 0 0 3 213 104 6 0 0 0 0 302 0 0 0 100 7 0 0 0 13 0 12 0 0 0 0 10 0 0 0 100 April 1, 2026 at 07:00:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2176 106 1656 6 14 16 0 4166 5 1 0 94 1 32 0 0 303 2 616 8 13 48 0 4972 3 1 0 96 2 2 0 24 348 27 953 2 10 17 0 2116 2 1 0 97 3 38 0 14 142 9 1131 3 14 33 0 2544 1 1 0 98 4 3 0 298 491 128 1125 5 13 54 0 3286 2 1 0 97 5 0 0 0 325 4 784 4 9 13 0 1474 3 0 0 97 6 0 0 2 456 104 628 6 7 58 0 3573 7 1 0 92 7 1 0 0 101 1 577 8 10 46 0 3470 8 1 0 90 April 1, 2026 at 07:00:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 105 1350 0 182 2009 4 595 0 2 0 98 1 0 0 0 394 38 840 1 140 2036 2 1131 0 2 0 98 2 0 0 0 314 1 704 1 128 1611 0 1 0 2 0 98 3 0 0 7 459 200 777 3 134 1959 1 273 0 2 0 98 4 0 0 24 506 313 770 1 149 2087 0 266 0 2 0 98 5 0 0 0 443 0 992 1 124 1825 2 1 0 2 0 98 6 0 0 3 510 103 731 0 152 2109 1 302 0 2 0 98 7 0 0 0 316 2 725 2 125 1627 1 0 0 2 0 98 April 1, 2026 at 07:00:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2111 104 121 0 1 0 0 594 0 0 0 99 1 0 0 0 133 53 140 1 1 0 0 1131 0 0 0 100 2 0 0 0 21 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 34 7 14 0 0 0 0 268 0 0 0 100 4 0 0 17 236 106 12 1 0 0 0 272 0 0 0 100 5 0 0 0 32 3 16 0 1 0 0 3 0 0 0 100 6 0 0 3 227 103 4 0 0 0 0 301 0 0 0 100 7 0 0 0 23 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 104 120 0 0 0 0 593 0 0 0 99 1 0 0 0 116 53 109 0 1 0 0 7 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 25 10 20 0 0 0 0 288 0 0 0 100 4 0 0 17 212 105 6 0 0 0 0 268 0 0 0 100 5 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 6 0 0 3 216 104 10 0 1 0 0 303 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2173 106 987 4 14 2 0 2614 1 1 0 98 1 6 0 0 256 6 495 6 9 13 0 3996 4 1 0 95 2 0 0 0 237 48 883 4 12 2 0 1039 1 0 0 99 3 0 0 7 318 10 664 5 5 14 0 1980 3 0 0 96 4 0 0 297 283 106 673 4 2 28 0 2702 8 1 0 91 5 0 0 0 124 10 136 1 3 0 0 195 0 0 0 100 6 2 0 3 419 103 436 5 7 8 0 3462 2 1 0 97 7 1 0 0 295 2 515 3 4 19 0 1975 8 0 0 92 April 1, 2026 at 07:00:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 110 132 0 1 0 0 602 0 0 0 100 1 0 0 0 16 4 38 0 0 1 0 1130 0 0 0 100 2 0 0 0 107 51 100 0 0 1 0 0 0 0 0 100 3 0 0 7 15 4 8 0 0 1 0 261 0 0 0 100 4 0 0 17 209 103 2 0 0 1 0 266 0 0 0 100 5 0 0 0 8 1 2 0 0 1 0 0 0 0 0 100 6 0 0 3 213 103 6 0 0 2 0 302 0 0 0 100 7 0 0 0 15 2 10 0 1 1 0 0 0 0 0 100 April 1, 2026 at 07:00:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 26 0 0 2159 113 1150 0 138 1327 9 784 0 2 0 98 1 7 0 0 343 40 676 2 107 1336 4 1217 0 1 0 99 2 967 0 1 262 11 557 1 110 1177 9 214 0 2 0 98 3 771 0 7 373 169 519 4 102 1448 12 6811 1 2 0 97 4 1680 0 129 541 231 500 2 98 1336 11 566 0 2 0 98 5 141 0 0 274 1 707 0 99 1218 16 125 0 2 0 98 6 15 0 4 452 102 546 0 108 1250 7 358 0 2 0 98 7 5 0 0 232 1 488 0 94 1104 4 40 0 2 0 98 April 1, 2026 at 07:00:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 111 130 0 0 0 0 604 0 0 0 100 1 0 0 0 116 53 140 1 0 0 0 1217 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 15 5 12 0 0 0 0 264 0 0 0 100 4 0 0 17 208 103 2 1 0 0 0 266 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 3 212 103 6 0 0 0 0 305 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 93 0 0 2150 110 6269 42 154 87 0 15959 5 4 0 91 1 9 0 0 564 42 6975 31 119 81 0 16072 5 3 0 92 2 179 0 0 418 0 5958 29 103 51 0 13938 5 3 0 92 3 233 0 7 484 3 4412 20 63 78 0 11588 3 2 0 94 4 85 0 17 842 113 4983 8 51 37 0 8585 4 2 0 94 5 26 0 0 280 4 5043 13 28 61 0 12685 6 2 0 92 6 116 0 3 923 104 4196 11 38 62 0 10268 3 2 0 94 7 62 0 0 691 2 3824 9 29 31 0 15809 4 2 0 94 April 1, 2026 at 07:00:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 81 0 0 2208 116 19369 118 410 285 0 47744 16 10 0 73 1 30 0 0 124 18 19792 65 313 242 0 45078 15 9 0 76 2 32 0 0 81 8 19079 61 246 178 0 38444 13 9 0 78 3 42 0 7 69 6 19203 40 178 298 0 42675 13 8 0 79 4 33 0 3 265 113 16624 27 117 233 0 42977 13 8 0 79 5 36 0 0 80 23 15766 37 119 199 0 32866 11 7 0 82 6 19 0 17 287 128 11550 21 92 141 0 28529 9 5 0 86 7 19 0 0 43 6 17636 17 80 159 0 35498 11 7 0 82 April 1, 2026 at 07:00:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 103 54 0 2 0 0 294 0 0 0 100 1 0 0 0 23 6 44 1 1 0 0 1517 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 51 2 44 1 0 0 0 260 0 0 0 100 4 0 0 3 216 102 6 0 2 0 0 0 0 0 0 100 5 0 0 0 112 48 107 0 4 0 0 1 0 0 0 100 6 0 0 17 234 111 27 0 5 1 0 573 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 110 896 1 110 1372 3 294 0 1 0 99 1 0 0 0 275 17 587 1 89 890 1 1519 0 1 0 99 2 0 0 0 214 0 485 1 93 811 2 0 0 1 0 99 3 0 0 7 304 144 417 0 79 1049 0 260 0 1 0 99 4 0 0 3 466 240 479 1 87 1130 1 0 0 2 0 98 5 0 0 0 274 19 552 1 68 1039 1 0 0 2 0 98 6 0 0 17 464 116 547 2 87 1016 1 602 0 1 0 98 7 0 0 0 196 1 422 1 81 812 1 0 0 1 0 99 April 1, 2026 at 07:00:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 116 0 0 0 0 294 0 0 0 100 1 0 0 0 113 53 136 0 0 0 0 1515 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 10 2 6 0 0 0 0 260 0 0 0 100 4 0 0 2 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 18 228 111 22 1 0 0 0 576 0 0 0 100 7 0 0 0 11 1 12 0 2 0 0 0 0 0 0 100 April 1, 2026 at 07:00:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 116 0 0 0 0 294 0 0 0 100 1 0 0 0 114 53 138 1 1 1 0 1519 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 7 10 2 6 0 1 0 0 260 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 6 0 0 17 226 111 20 1 0 0 0 576 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 146 0 1 0 0 303 0 0 0 100 1 0 0 0 125 55 150 2 0 0 0 1536 0 0 0 100 2 0 0 1 7 0 2 0 1 0 0 0 0 0 0 100 3 0 0 7 14 4 8 0 0 0 0 262 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 19 0 0 23 7 20 0 0 0 0 36 0 0 0 100 6 2 0 17 227 112 24 0 1 0 0 582 0 0 0 100 7 0 0 0 18 1 16 0 1 0 0 12 0 0 0 100 April 1, 2026 at 07:00:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 104 126 0 1 1 0 295 0 0 0 100 1 0 0 0 118 54 142 1 1 2 0 1509 0 0 0 99 2 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 3 0 0 7 15 4 8 1 0 1 0 261 0 0 0 100 4 0 0 3 207 102 0 0 0 1 0 0 0 0 0 100 5 0 0 0 8 1 2 0 0 1 0 0 0 0 0 100 6 0 0 17 228 112 22 0 0 1 0 576 0 0 0 100 7 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:00:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 103 122 0 1 1 0 294 0 0 0 100 1 0 0 0 114 53 138 0 0 2 0 1512 0 0 0 100 2 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 3 0 0 7 14 4 12 0 0 0 0 264 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 4 0 0 0 0 0 0 0 0 100 6 0 0 17 221 108 18 1 0 0 0 576 0 0 0 100 7 0 0 0 11 2 6 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:00:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 118 0 0 0 0 294 0 0 0 100 1 0 0 0 22 6 44 1 0 1 0 1512 0 0 0 100 2 0 0 0 102 47 102 0 2 1 0 0 0 0 0 100 3 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 17 228 112 22 1 0 0 0 579 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 116 0 0 0 0 294 0 0 0 100 1 0 0 0 14 3 36 1 0 0 0 1512 0 0 0 100 2 0 0 0 107 50 102 0 1 0 0 0 0 0 0 100 3 0 0 7 9 2 6 0 1 0 0 260 0 0 0 100 4 2 0 3 210 103 2 0 0 0 0 1 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 6 0 0 17 223 110 20 0 1 0 0 575 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:00:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2132 105 7109 29 104 127 0 16621 6 4 0 90 1 25 0 0 350 8 4685 28 85 82 0 16157 5 3 0 92 2 1 0 0 241 45 6336 26 75 53 0 22210 5 4 0 91 3 1 0 7 124 5 8273 11 50 49 0 9005 3 3 0 94 4 0 0 3 695 107 3826 8 37 64 0 9818 4 2 0 94 5 2 0 0 766 10 5173 8 26 111 0 13849 5 3 0 92 6 0 0 17 750 113 3406 11 30 34 0 8024 2 2 0 96 7 0 0 0 437 3 3755 5 27 56 0 12217 3 2 0 95 April 1, 2026 at 07:00:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2184 115 23289 101 439 315 0 58508 19 12 0 69 1 28 0 0 122 15 23536 85 368 245 0 50929 16 10 0 74 2 15 0 0 78 8 22363 70 255 221 0 45355 15 9 0 76 3 17 0 0 79 9 20084 44 195 195 0 43157 13 9 0 78 4 38 0 3 262 117 18658 35 146 180 0 40794 14 9 0 77 5 25 0 0 81 11 15511 37 129 186 0 33751 12 7 0 81 6 33 0 17 281 120 14071 32 108 197 0 37103 11 7 0 82 7 13 0 7 61 12 17685 33 93 230 0 41673 13 8 0 79 April 1, 2026 at 07:00:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 103 596 0 85 1295 1 294 0 1 0 99 1 0 0 0 363 15 662 1 81 946 1 1512 0 1 0 99 2 0 0 1 177 1 395 0 77 823 0 0 0 1 0 99 3 0 0 0 271 95 401 0 71 965 1 0 0 1 0 99 4 0 0 3 475 253 423 0 69 1167 3 0 0 2 0 98 5 0 0 0 215 0 469 0 66 903 0 0 0 1 0 99 6 0 0 17 385 108 399 0 69 896 0 276 0 1 0 99 7 0 0 7 115 43 509 0 84 1381 1 560 0 2 0 98 April 1, 2026 at 07:00:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 12 0 1 0 0 294 0 0 0 100 1 0 0 0 115 4 138 0 0 0 0 1514 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 17 221 109 16 0 0 0 0 276 0 0 0 100 7 0 0 7 114 55 110 0 0 0 0 560 0 0 0 100 April 1, 2026 at 07:00:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 56 0 0 0 0 294 0 0 0 100 1 0 0 0 72 6 92 1 1 0 0 1513 0 0 0 100 2 0 0 0 60 24 56 0 1 0 0 0 0 0 0 100 3 0 0 0 11 1 10 0 1 0 0 21 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 6 0 0 17 228 112 24 1 1 0 0 277 0 0 0 100 7 0 0 7 70 31 64 0 2 0 0 560 0 0 0 100 April 1, 2026 at 07:00:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 122 0 1 0 0 301 0 0 0 100 1 0 0 0 28 6 54 1 1 1 0 1537 0 0 0 100 2 0 0 0 117 53 116 0 0 0 0 9 0 0 0 100 3 1 0 0 14 1 10 0 0 0 0 4 0 0 0 100 4 0 0 3 207 102 2 0 0 0 0 0 0 0 0 100 5 0 0 1 20 6 20 0 1 1 0 16 0 0 0 100 6 0 0 17 220 108 14 0 0 0 0 282 0 0 0 100 7 0 0 7 23 5 22 1 0 0 0 571 0 0 0 100 April 1, 2026 at 07:00:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 110 0 3 0 0 295 0 0 0 100 1 0 0 0 29 5 46 1 1 1 0 1510 0 0 0 100 2 0 0 0 126 58 118 0 0 1 0 9 0 0 0 100 3 0 0 0 17 4 8 0 0 1 0 5 0 0 0 100 4 0 0 7 208 102 0 0 0 1 0 0 0 0 0 100 5 0 0 0 9 1 2 0 0 1 0 0 0 0 0 100 6 0 0 21 211 103 6 0 0 1 0 271 0 0 0 100 7 0 0 7 18 6 10 0 0 1 0 561 0 0 0 100 April 1, 2026 at 07:00:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 118 0 0 1 0 294 0 0 0 100 1 0 0 0 17 4 40 1 0 3 0 1512 0 0 0 100 2 0 0 0 126 57 120 1 0 0 0 9 0 0 0 100 3 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 4 0 0 3 210 103 4 0 0 2 0 0 0 0 0 100 5 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 6 0 0 17 208 102 4 0 1 0 0 266 0 0 0 100 7 0 0 7 15 5 10 1 0 0 0 560 0 0 0 100 April 1, 2026 at 07:00:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 1 0 294 0 0 0 100 1 0 0 0 15 4 38 0 0 0 0 1512 0 0 0 100 2 0 0 0 125 58 120 0 0 0 0 7 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 208 102 2 0 1 0 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 6 0 0 17 213 103 6 1 0 0 0 268 0 0 0 100 7 0 0 7 14 5 12 0 1 0 0 560 0 0 0 100 April 1, 2026 at 07:00:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 0 0 294 0 0 0 100 1 0 0 0 16 4 38 1 0 0 0 1514 0 0 0 100 2 0 0 0 125 58 120 0 0 0 0 10 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 1 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 1 0 0 0 100 6 0 0 17 209 103 4 0 0 0 0 267 0 0 0 100 7 0 0 7 15 5 10 1 0 0 0 560 0 0 0 100 April 1, 2026 at 07:00:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2282 103 520 140 30 24 0 1867 24 1 0 74 1 1074 0 0 363 4 691 319 21 24 1 2802 24 1 0 74 2 12 0 0 372 47 638 219 35 15 1 1775 25 1 0 75 3 3 0 0 181 9 218 107 31 14 0 868 25 0 0 75 4 541 0 311 433 106 491 243 30 36 0 1387 25 1 0 74 5 0 0 0 185 10 248 109 25 14 0 767 25 0 0 75 6 24 0 17 515 107 692 303 30 37 0 1544 25 1 0 74 7 2 0 7 331 6 599 265 21 18 0 1983 25 1 0 75 April 1, 2026 at 07:00:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2950 104 1552 788 66 65 0 3579 98 2 0 0 1 112 0 0 1053 10 2099 1044 69 76 0 6022 97 3 0 0 2 1 0 0 902 10 1603 810 65 58 0 4259 98 2 0 0 3 1 0 0 986 8 1879 947 63 70 0 3898 98 2 0 0 4 5 0 843 1060 109 1868 947 68 77 0 4617 98 2 0 0 5 6 0 0 679 10 1109 573 86 50 0 3779 98 2 0 0 6 474 0 17 1178 117 1966 986 70 121 0 3589 98 2 0 0 7 514 0 7 796 21 1369 727 85 52 0 4248 98 2 0 0 April 1, 2026 at 07:00:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2125 102 63 13 5 2 0 165 4 0 0 96 1 0 0 0 63 9 119 33 4 0 0 1736 5 0 0 95 2 0 0 0 116 46 111 5 5 0 0 344 5 0 0 94 3 0 0 0 35 1 32 12 4 2 0 145 4 0 0 96 4 0 0 31 231 104 56 23 4 1 0 210 5 0 0 95 5 0 0 0 48 5 60 9 6 0 0 105 4 0 0 96 6 0 0 17 237 104 51 20 4 0 0 353 4 0 0 96 7 6 0 7 127 10 136 16 7 0 0 678 5 0 0 95 April 1, 2026 at 07:01:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 6 0 0 0 0 0 0 0 0 100 1 0 0 0 14 3 36 1 0 0 0 1518 0 0 0 100 2 0 0 0 113 5 108 0 1 0 0 300 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 209 102 2 0 1 0 0 0 0 0 0 100 5 0 0 0 26 4 26 0 1 0 0 8 0 0 0 100 6 2 0 17 209 103 4 0 0 0 0 267 0 0 0 100 7 0 0 7 115 52 108 2 1 0 0 559 0 0 0 100 April 1, 2026 at 07:01:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 4 0 1 0 0 0 0 0 0 100 1 0 0 0 14 3 36 1 0 0 0 1520 0 0 0 100 2 0 0 0 113 3 108 0 0 0 0 300 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 1 0 0 0 100 5 0 0 0 29 6 24 0 0 1 0 9 0 0 0 100 6 0 0 17 214 104 12 1 2 1 0 269 0 0 0 100 7 0 0 7 112 54 108 0 0 0 0 561 0 0 0 100 April 1, 2026 at 07:01:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 115 40 0 1 0 0 3 0 0 0 100 1 1 0 0 20 3 50 1 0 1 0 1542 0 0 0 100 2 0 0 0 58 5 50 0 1 0 0 300 0 0 0 100 3 0 0 0 69 16 64 1 4 0 0 4 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 1 0 0 0 100 5 0 0 0 50 17 42 0 0 1 0 30 0 0 0 100 6 0 0 17 210 102 8 0 1 0 0 273 0 0 0 100 7 0 0 7 94 25 94 0 3 0 0 576 0 0 0 100 April 1, 2026 at 07:01:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3759 0 17 2498 114 809 378 58 95 15 3167 88 2 0 9 1 3062 0 2 479 7 855 395 42 99 12 3788 88 2 0 10 2 9276 0 8 621 8 1289 615 48 93 17 2502 89 2 0 9 3 5138 0 1 575 11 967 487 39 124 11 2867 88 2 0 10 4 4009 0 399 592 107 722 337 56 82 16 3192 88 2 0 10 5 7125 0 33 606 23 1046 514 45 106 12 2353 88 2 0 9 6 4913 0 16 831 111 1190 546 46 107 15 2132 88 3 0 9 7 4936 0 16 514 7 882 436 41 94 16 3353 88 2 0 10 April 1, 2026 at 07:01:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 315 0 7 2696 107 1095 559 94 391 1 2133 97 3 0 0 1 2 0 0 733 18 1277 631 83 490 1 3361 97 3 0 0 2 262 0 0 631 15 1168 566 94 437 1 1910 98 2 0 0 3 1098 0 0 924 165 1571 774 105 403 2 2635 98 2 0 0 4 18 0 563 901 262 1126 567 104 375 3 3071 98 2 0 0 5 1060 0 7 661 2 1202 597 90 378 1 2340 98 2 0 0 6 261 0 38 863 110 1121 575 101 399 0 1918 98 2 0 0 7 261 0 14 792 10 1534 750 110 461 0 3239 97 3 0 0 April 1, 2026 at 07:01:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 204 0 0 2632 107 1969 440 183 547 18 6623 68 3 0 29 1 45 0 17 489 5 2221 405 174 511 3 5438 67 3 0 30 2 6 0 0 458 9 1833 363 149 556 5 7297 74 3 0 24 3 595 0 0 838 180 1935 435 144 550 2 3777 63 2 0 34 4 0 0 655 844 299 2028 468 183 511 1 6060 67 3 0 30 5 21 0 0 477 8 1763 388 155 491 1 4447 67 2 0 31 6 38 0 9 715 109 1762 427 162 579 2 5248 68 2 0 30 7 8 0 14 784 17 2049 434 154 531 6 5234 64 2 0 34 April 1, 2026 at 07:01:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2115 105 366 1 42 460 0 0 0 1 0 99 1 0 0 7 229 29 441 0 49 261 0 553 0 0 0 99 2 0 0 0 156 4 365 0 37 301 0 1135 0 1 0 99 3 0 0 0 231 116 240 0 30 351 0 0 0 0 0 100 4 0 0 3 492 223 311 0 38 341 0 301 0 0 0 100 5 0 0 7 169 20 336 0 47 257 0 2 0 0 0 100 6 0 0 3 354 103 317 0 43 293 0 1 0 0 0 100 7 0 0 14 135 9 266 0 40 304 0 574 0 0 0 100 April 1, 2026 at 07:01:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 115 0 2 0 0 0 0 0 0 100 1 0 0 7 15 4 10 0 1 0 0 555 0 0 0 100 2 0 0 0 11 2 34 1 0 0 0 1130 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 3 212 103 6 0 1 1 0 300 0 0 0 100 5 0 0 0 131 60 124 0 3 1 0 15 0 0 0 100 6 0 0 3 218 101 18 0 4 0 0 25 0 0 0 100 7 0 0 14 39 11 36 0 1 0 0 588 0 0 0 100 April 1, 2026 at 07:01:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2106 102 121 0 1 0 0 5 0 0 0 100 1 1 0 7 34 4 12 1 2 0 0 555 0 0 0 100 2 1 0 0 27 2 36 1 1 0 0 1132 0 0 0 100 3 0 0 0 22 0 0 0 0 0 0 0 0 0 0 100 4 1 0 3 228 104 6 0 0 0 0 302 0 0 0 100 5 5 0 0 126 52 106 0 0 0 0 7 0 0 0 100 6 3 0 3 227 101 6 0 1 0 0 12 0 0 0 100 7 0 0 14 41 10 24 1 1 0 0 584 0 0 0 100 April 1, 2026 at 07:01:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 330 1 79 743 1 66 0 2 0 98 1 1 0 7 160 8 343 2 54 472 1 593 0 2 0 98 2 25 0 0 152 3 377 3 58 541 0 1168 0 2 0 98 3 1 0 0 274 152 296 1 56 634 1 58 0 2 0 98 4 0 0 4 660 251 581 0 62 723 1 388 0 1 0 99 5 0 0 0 289 54 513 2 65 538 0 78 0 1 0 99 6 0 0 2 361 102 356 3 63 408 0 872 0 2 0 98 7 9 0 14 132 12 284 1 63 356 0 1380 0 2 0 98 April 1, 2026 at 07:01:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 510 0 102 1047 0 0 0 1 0 99 1 0 0 7 206 11 436 0 83 495 0 562 0 1 0 99 2 0 0 0 192 1 475 0 84 521 0 1131 0 1 0 99 3 0 0 0 324 184 350 0 84 652 0 0 0 1 0 99 4 0 0 5 695 331 755 0 96 894 0 300 0 1 0 99 5 0 0 0 322 1 611 0 84 445 0 0 0 1 0 99 6 0 0 1 368 109 378 1 81 483 0 1 0 1 0 99 7 0 0 14 158 4 382 2 91 484 0 565 0 1 0 99 April 1, 2026 at 07:01:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 100 483 2 97 3618 3 0 0 2 0 98 1 0 0 7 235 11 482 0 82 2941 0 565 0 1 0 99 2 0 0 0 276 33 501 3 90 2183 1 414 0 1 0 99 3 0 0 0 345 195 358 1 83 3037 0 23 0 1 0 99 4 0 0 4 659 278 630 0 86 3594 0 301 0 1 0 99 5 0 0 0 238 6 517 1 86 2084 1 10 0 1 0 99 6 0 0 2 337 105 322 1 76 1722 1 2 0 1 0 99 7 0 0 14 164 11 395 1 78 2073 0 1283 0 1 0 99 April 1, 2026 at 07:01:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 544 0 73 2916 3 9 0 2 0 98 1 0 0 7 259 10 546 1 71 2106 0 562 0 1 0 99 2 0 0 0 231 22 462 0 71 1618 0 0 0 1 0 99 3 0 0 0 384 204 430 0 80 2675 0 0 0 1 0 99 4 0 0 4 684 292 645 0 90 2672 0 301 0 1 0 99 5 0 0 0 245 8 525 0 81 1789 0 35 0 1 0 99 6 0 0 2 356 101 343 1 58 1695 0 15 0 1 0 99 7 1 0 14 172 5 407 3 58 2324 0 1710 0 1 0 99 April 1, 2026 at 07:01:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 105 706 0 97 2736 3 45 0 2 0 98 1 4 0 7 432 49 803 0 75 1608 0 580 0 1 0 99 2 0 0 0 275 2 578 0 85 1761 0 4 0 1 0 99 3 3 0 0 443 208 505 0 79 2169 1 14 0 1 0 99 4 0 0 3 650 320 811 0 84 1847 0 300 0 1 0 99 5 0 0 0 329 3 680 0 77 1853 1 5 0 1 0 99 6 0 0 3 430 101 495 0 80 1304 0 0 0 1 0 99 7 0 0 14 252 7 565 1 74 2127 1 1707 0 1 0 99 April 1, 2026 at 07:01:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 7 141 65 138 0 1 0 0 569 0 0 0 100 2 0 0 0 8 1 4 0 0 1 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 1 0 1 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 300 0 0 0 100 5 0 0 0 8 1 4 0 0 1 0 0 0 0 0 100 6 0 0 3 209 101 4 0 0 0 0 3 0 0 0 100 7 0 0 14 16 5 42 2 0 0 0 1697 0 0 0 99 April 1, 2026 at 07:01:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2106 101 116 0 0 0 0 5 0 0 0 100 1 0 0 7 132 61 132 0 1 0 0 569 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 300 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 6 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 7 2 0 14 18 7 44 1 0 0 0 1709 0 0 0 100 April 1, 2026 at 07:01:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 7 132 60 128 0 0 0 0 563 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 214 105 10 0 2 0 0 301 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 14 14 5 40 1 0 0 0 1686 0 0 0 100 April 1, 2026 at 07:01:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 0 0 0 0 0 0 0 100 1 0 0 7 127 60 120 1 0 0 0 563 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 300 0 0 0 100 5 0 0 0 22 9 16 0 0 1 0 16 0 0 0 100 6 0 0 3 217 103 12 0 0 0 0 17 0 0 0 100 7 1 0 14 21 5 52 1 0 0 0 1698 0 0 0 100 April 1, 2026 at 07:01:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 7 126 60 122 0 0 0 0 563 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 215 105 8 0 0 1 0 301 0 0 0 100 5 0 0 0 11 1 8 0 1 2 0 1 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 14 15 5 40 2 0 0 0 1686 0 0 0 100 April 1, 2026 at 07:01:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 7 135 62 134 0 0 0 0 568 0 0 0 100 2 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 8 1 4 0 0 1 0 2 0 0 0 100 4 0 0 3 212 104 4 0 0 0 0 300 0 0 0 100 5 0 0 0 18 5 14 0 1 2 0 4 0 0 0 100 6 0 0 3 210 101 6 0 1 0 0 3 0 0 0 100 7 0 0 14 15 5 42 1 0 1 0 1689 0 0 0 100 April 1, 2026 at 07:01:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 7 126 60 120 0 0 0 0 563 0 0 0 100 2 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 211 104 4 0 0 0 0 300 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 3 0 0 0 100 6 0 0 3 210 102 4 0 0 0 0 2 0 0 0 100 7 0 0 14 14 5 40 1 0 0 0 1686 0 0 0 100 April 1, 2026 at 07:01:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 1 0 0 0 0 0 0 100 1 0 0 7 125 59 118 1 0 0 0 562 0 0 0 100 2 0 0 0 8 1 3 0 1 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 3 213 105 6 0 0 0 0 301 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 5 0 0 0 100 6 0 0 3 211 102 4 0 0 1 0 1 0 0 0 100 7 0 0 14 15 5 42 1 1 1 0 1686 0 0 0 100 April 1, 2026 at 07:01:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 0 0 0 0 0 0 0 100 1 0 0 7 115 54 110 0 1 0 0 555 0 0 0 100 2 0 0 0 17 6 13 0 0 0 0 9 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 214 105 8 0 0 0 0 301 0 0 0 100 5 0 0 0 25 10 14 0 0 0 0 10 0 0 0 100 6 0 0 3 211 101 12 0 1 0 0 20 0 0 0 100 7 0 0 14 22 5 52 2 1 0 0 1698 0 0 0 100 April 1, 2026 at 07:01:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 121 1 1 41 0 1675 2 1 0 97 1 25 0 7 203 55 246 0 5 1 0 1636 0 0 0 99 2 1 0 0 41 10 43 0 4 1 0 85 0 0 0 100 3 0 0 0 18 3 8 0 0 1 0 9 0 0 0 100 4 156 0 7 271 104 126 0 3 1 0 426 0 0 0 100 5 13 0 0 51 5 91 0 2 4 0 319 0 0 0 100 6 0 0 7 246 101 77 0 3 3 0 432 0 0 0 100 7 23 0 14 357 6 919 1 2 1 0 8702 1 1 0 98 April 1, 2026 at 07:01:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 39 0 14 2267 107 25159 167 666 637 1 62520 22 15 0 64 1 17 0 0 670 11 26622 123 546 584 0 57466 19 13 0 67 2 21 0 0 959 16 26022 108 437 504 0 53857 17 12 0 70 3 69 0 0 299 88 23873 80 313 499 1 53294 17 12 0 70 4 23 0 10 525 192 21020 63 258 508 0 44119 14 10 0 76 5 21 0 0 208 19 21918 43 225 469 0 43590 14 10 0 76 6 9 0 3 461 110 14691 48 206 379 0 38588 12 8 0 80 7 16 0 0 592 23 16974 47 191 489 0 42388 13 10 0 77 April 1, 2026 at 07:01:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 14 2119 104 3199 8 66 32 0 7651 2 2 0 96 1 6 0 0 37 9 2384 8 48 27 0 5561 2 1 0 97 2 22 0 0 25 5 2225 4 35 26 0 4936 2 2 0 97 3 10 0 0 21 5 2428 6 28 53 0 6593 2 2 0 96 4 0 0 10 322 118 2572 4 23 27 0 5881 2 1 0 97 5 2 0 0 31 7 2373 3 22 18 0 4732 2 1 0 97 6 1 0 3 284 137 2872 4 19 41 0 6439 2 1 0 97 7 0 0 0 28 6 2717 4 15 21 0 6891 2 1 0 97 April 1, 2026 at 07:01:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2104 101 6 0 0 0 0 266 0 0 0 100 1 0 0 0 20 6 14 0 0 0 0 302 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 4 0 0 10 314 106 108 0 0 0 0 559 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 2 0 0 0 100 6 0 0 3 309 152 102 0 0 0 0 1 0 0 0 100 7 0 0 0 13 4 38 1 0 0 0 1426 0 0 0 100 April 1, 2026 at 07:01:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 11 1 1 0 0 268 0 0 0 100 1 0 0 0 24 8 18 0 0 0 0 301 0 0 0 100 2 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 4 0 0 10 320 106 115 1 0 0 0 560 0 0 0 100 5 0 0 0 20 9 16 0 2 0 0 21 0 0 0 100 6 0 0 3 318 153 114 0 0 0 0 10 0 0 0 100 7 0 0 0 21 4 52 0 1 2 0 1439 0 0 0 100 April 1, 2026 at 07:01:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2102 101 6 1 0 0 0 266 0 0 0 100 1 0 0 0 29 10 22 0 0 0 0 305 0 0 0 100 2 0 0 0 18 2 12 0 0 0 0 2 0 0 0 100 3 0 0 0 8 1 6 0 1 0 0 3 0 0 0 100 4 0 0 10 317 107 110 0 0 0 0 561 0 0 0 100 5 0 0 0 9 1 4 0 1 0 0 1 0 0 0 100 6 0 0 3 308 151 102 0 1 0 0 0 0 0 0 100 7 0 0 0 14 4 38 1 0 0 0 1427 0 0 0 100 April 1, 2026 at 07:01:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2107 101 276 0 65 688 0 266 0 2 0 98 1 0 0 0 122 10 256 0 57 347 0 310 0 1 0 99 2 0 0 0 146 1 326 0 51 371 0 4 0 1 0 99 3 0 0 0 252 154 250 0 60 511 0 6 0 1 0 99 4 0 0 10 561 257 450 0 59 523 0 563 0 1 0 99 5 0 0 0 179 4 398 0 56 331 0 9 0 1 0 99 6 0 0 3 457 117 520 0 63 395 0 1 0 1 0 99 7 0 0 0 209 35 417 2 56 435 0 1426 0 1 0 98 April 1, 2026 at 07:01:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2150 141 560 1 103 1029 1 251 0 1 0 99 1 0 0 0 185 7 399 1 84 531 0 303 0 1 0 99 2 0 0 0 252 2 536 0 79 467 0 16 0 1 0 99 3 0 0 0 382 200 414 0 79 617 2 0 0 1 0 99 4 0 0 12 691 309 627 0 85 666 0 560 0 1 0 99 5 0 0 0 260 0 577 0 80 469 0 0 0 1 0 99 6 0 0 1 531 102 720 0 93 574 0 1 0 1 0 99 7 0 0 0 258 14 585 0 97 492 1 1426 0 1 0 99 April 1, 2026 at 07:01:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 150 124 0 1 0 0 0 0 0 0 100 1 0 0 0 23 7 16 0 0 0 0 300 0 0 0 100 2 0 0 14 15 2 12 0 0 0 0 266 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 23 0 0 0 100 4 0 0 10 316 107 110 0 0 0 0 561 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 6 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 0 16 4 40 1 1 0 0 1426 0 0 0 100 April 1, 2026 at 07:01:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2143 139 116 0 2 0 0 4 0 0 0 100 1 0 0 0 47 19 42 0 1 0 0 304 0 0 0 100 2 2 0 14 45 4 44 0 2 0 0 268 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 4 0 0 10 267 107 60 0 2 0 0 562 0 0 0 100 5 0 0 0 19 8 6 0 1 0 0 5 0 0 0 100 6 0 0 3 220 104 16 0 1 0 0 25 0 0 0 100 7 0 0 0 21 4 50 1 0 1 0 1437 0 0 0 100 April 1, 2026 at 07:01:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 0 2116 101 154 3 9 5 0 120 2 0 0 97 1 0 0 0 140 57 147 4 13 2 0 364 2 0 0 97 2 7 0 14 41 5 46 9 8 2 0 383 2 0 0 97 3 1871 0 7 30 4 207 25 6 2 2 690 2 1 0 97 4 0 0 38 221 106 32 6 7 2 0 509 2 0 0 97 5 14 0 0 33 5 33 0 4 1 0 46 2 0 0 98 6 2 0 3 216 101 15 8 4 3 0 163 2 0 0 97 7 8 0 0 46 5 116 30 12 3 1 1959 2 0 0 97 April 1, 2026 at 07:01:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 0 2321 105 393 245 24 12 0 1030 99 1 0 0 1 0 0 0 258 20 322 210 18 6 0 505 100 0 0 0 2 28 0 14 250 7 344 221 17 7 0 865 100 0 0 0 3 0 0 0 273 11 385 238 27 9 0 740 99 1 0 0 4 0 0 206 457 113 380 243 21 3 0 892 100 0 0 0 5 1 0 0 243 6 337 208 15 6 0 684 100 0 0 0 6 1 0 3 474 113 338 214 25 7 0 556 100 0 0 0 7 3 0 0 209 14 255 162 23 10 0 2148 99 1 0 0 April 1, 2026 at 07:01:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2294 110 411 249 21 5 0 1003 99 1 0 0 1 1 0 0 193 6 216 155 33 4 0 549 100 0 0 0 2 0 0 14 199 7 256 172 21 3 0 750 100 0 0 0 3 0 0 0 201 6 267 182 22 12 0 539 100 0 0 0 4 0 0 150 434 111 383 237 21 15 0 947 100 0 0 0 5 0 0 0 232 4 311 204 23 1 0 581 100 0 0 0 6 0 0 3 482 113 388 239 27 6 0 670 100 0 0 0 7 0 0 0 320 24 497 277 35 4 0 2473 99 1 0 0 April 1, 2026 at 07:01:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2327 108 446 263 23 6 0 1139 99 1 0 0 1 2 0 0 218 1 265 188 16 2 0 539 100 0 0 0 2 0 0 14 238 13 286 189 23 9 0 808 100 0 0 0 3 2 0 0 254 8 325 210 24 9 0 636 100 0 0 0 4 1 0 206 433 112 325 212 28 6 0 854 99 1 0 0 5 0 0 0 224 7 310 197 23 6 0 657 100 0 0 0 6 0 0 3 479 107 370 223 27 13 0 662 100 0 0 0 7 5 0 0 266 22 405 229 23 12 0 2375 99 1 0 0 April 1, 2026 at 07:01:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2295 105 398 241 25 6 0 1196 99 1 0 0 1 0 0 0 234 4 312 208 27 5 0 622 100 0 0 0 2 0 0 14 203 14 214 156 29 5 0 710 100 0 0 0 3 0 0 0 234 6 294 202 17 8 0 488 100 0 0 0 4 0 0 178 424 114 316 200 24 3 0 768 100 0 0 0 5 0 0 0 257 22 326 206 30 11 0 596 100 0 0 0 6 1 0 3 443 107 338 216 28 7 0 579 100 0 0 0 7 0 0 0 285 14 450 248 27 9 0 2480 99 1 0 0 April 1, 2026 at 07:01:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2253 105 281 178 30 5 0 500 99 1 0 0 1 0 0 0 303 11 447 269 22 8 0 1022 99 1 0 0 2 0 0 14 209 14 233 163 26 4 0 710 100 0 0 0 3 0 0 0 240 8 320 199 24 6 0 591 100 0 0 0 4 0 0 178 413 112 356 224 20 4 0 862 100 0 0 0 5 0 0 0 304 16 417 258 19 9 0 703 100 0 0 0 6 0 0 3 444 108 294 189 20 3 0 576 100 0 0 0 7 0 0 7 218 15 319 182 33 9 0 2447 99 1 0 0 April 1, 2026 at 07:01:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2222 101 157 128 13 5 0 285 99 1 0 0 1 0 0 0 250 18 321 195 20 6 0 833 99 1 0 0 2 0 0 14 258 8 381 236 22 3 0 933 100 0 0 0 3 0 0 0 232 7 328 200 21 6 0 651 100 0 0 0 4 0 0 192 419 113 319 202 24 3 0 790 100 0 0 0 5 0 0 0 250 6 344 218 20 7 0 675 100 0 0 0 6 0 0 3 472 114 348 213 18 6 0 692 100 0 0 0 7 8 0 0 204 20 241 153 19 9 0 2125 99 1 0 0 April 1, 2026 at 07:01:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2138 102 52 47 11 1 0 184 57 0 0 43 1 0 0 0 136 8 127 85 13 0 0 466 59 0 0 41 2 0 0 14 112 12 96 75 7 0 0 370 57 0 0 43 3 7 0 0 142 14 200 111 9 0 0 360 57 0 0 43 4 0 0 66 339 109 245 141 15 1 0 828 56 0 0 43 5 1 0 0 106 5 178 86 16 2 0 340 55 0 0 45 6 0 0 3 343 114 153 81 16 0 0 248 56 0 0 44 7 5 0 0 99 14 136 64 10 4 0 1909 56 0 0 44 April 1, 2026 at 07:01:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 8 0 0 0 0 20 0 0 0 100 1 0 0 0 32 5 28 0 2 0 0 315 0 0 0 100 2 3 0 14 13 2 8 1 2 0 0 282 0 0 0 100 3 6 0 0 10 1 4 0 1 2 0 11 0 0 0 100 4 0 0 24 230 110 33 0 1 0 0 280 0 0 0 100 5 0 0 0 9 0 4 0 2 0 0 10 0 0 0 100 6 0 0 3 313 102 104 0 1 2 0 10 0 0 0 100 7 0 0 0 121 55 144 2 1 0 0 1736 0 0 0 100 April 1, 2026 at 07:01:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 109 26 0 1 0 0 9 0 0 0 100 1 0 0 0 16 1 11 0 1 0 0 294 0 0 0 100 2 0 0 14 15 4 16 0 0 0 0 283 0 0 0 100 3 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 4 0 0 10 238 113 34 0 2 0 0 270 0 0 0 100 5 0 0 0 16 6 6 0 1 0 0 18 0 0 0 100 6 0 0 3 313 121 114 0 4 0 0 13 0 0 0 100 7 0 0 0 107 27 134 0 4 0 0 1744 0 0 0 100 April 1, 2026 at 07:01:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2152 150 104 0 2 0 0 0 0 0 0 100 1 0 0 0 27 5 20 0 1 1 0 300 0 0 0 100 2 0 0 14 10 3 4 0 0 1 0 266 0 0 0 100 3 0 0 0 11 3 4 0 0 1 0 3 0 0 0 100 4 0 0 10 232 113 26 0 0 1 0 271 0 0 0 100 5 0 0 0 14 2 9 0 2 1 0 3 0 0 0 100 6 0 0 3 308 101 102 0 1 1 0 0 0 0 0 100 7 0 0 0 19 6 40 1 0 1 0 1732 0 0 0 100 April 1, 2026 at 07:01:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2216 145 1137 9 20 45 0 2668 3 1 0 96 1 0 0 0 180 3 643 6 15 21 0 2314 7 1 0 92 2 0 0 14 392 8 1163 6 14 7 0 1910 1 1 0 99 3 38 0 6 173 1 1273 4 16 53 0 2898 3 1 0 96 4 1 0 290 253 113 617 9 9 17 1 2101 11 1 0 89 5 28 0 0 179 2 446 6 10 77 0 3464 2 1 0 97 6 2 0 3 427 102 719 3 7 70 0 2163 2 1 0 98 7 0 0 36 234 6 951 4 8 25 0 4109 2 1 0 97 April 1, 2026 at 07:01:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 7 2118 107 130 1 4 2 0 14 0 0 0 100 1 320 0 0 117 50 112 0 4 3 0 435 0 0 0 100 2 2 0 14 17 3 17 1 4 5 0 301 0 0 0 100 3 0 0 0 16 1 10 0 2 4 0 2 0 0 0 100 4 0 0 10 213 104 8 0 1 0 0 260 0 0 0 100 5 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 6 0 0 3 218 103 16 1 2 6 0 13 0 0 0 100 7 0 0 0 32 7 64 4 4 2 0 1654 0 0 0 100 April 1, 2026 at 07:01:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 112 2134 106 167 0 11 3 1 141 0 1 0 99 1 1600 0 0 62 1 36 1 8 3 5 204 0 0 0 99 2 23 0 14 164 55 150 0 5 6 6 638 0 0 0 100 3 739 0 114 39 0 49 0 7 6 15 151 0 0 0 100 4 140 0 10 268 104 65 0 9 7 10 397 0 0 0 100 5 17 0 1 52 3 26 0 3 0 4 66 0 0 0 100 6 751 0 3 251 102 30 1 3 3 5 6512 1 1 0 98 7 5 0 0 56 6 53 1 2 0 2 1800 0 0 0 100 April 1, 2026 at 07:01:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 23 5 16 0 0 0 0 8 0 0 0 100 2 0 0 14 122 56 124 0 0 0 0 576 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 2 0 0 0 100 4 0 0 10 212 104 6 0 0 0 0 260 0 0 0 100 5 0 0 0 13 6 2 0 0 0 0 0 0 0 0 100 6 0 0 3 221 104 16 0 0 0 0 18 0 0 0 100 7 0 0 0 23 5 52 0 0 0 0 1732 0 0 0 100 April 1, 2026 at 07:01:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 138 0 3 3 0 65 0 0 0 100 1 0 0 0 38 7 43 0 3 1 0 86 0 0 0 100 2 1 0 14 107 47 111 0 4 0 0 1409 0 0 0 100 3 0 0 0 29 9 28 1 2 1 0 813 0 0 0 100 4 0 0 10 221 104 28 1 1 1 0 332 0 0 0 100 5 0 0 0 16 2 18 0 1 0 0 79 0 0 0 100 6 0 0 3 213 102 8 0 0 0 0 89 0 0 0 100 7 0 0 0 18 5 42 1 1 0 0 1734 0 0 0 100 April 1, 2026 at 07:01:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 107 593 0 73 929 1 10 0 1 0 99 1 0 0 0 105 1 244 0 63 503 1 0 0 2 0 98 2 0 0 14 133 3 304 0 56 505 0 559 0 1 0 99 3 0 0 0 346 200 346 0 62 655 0 2 0 2 0 98 4 0 0 10 451 254 249 0 62 668 0 260 0 2 0 98 5 0 0 0 132 1 310 0 53 544 1 0 0 2 0 98 6 0 0 3 369 102 391 0 60 578 0 0 0 2 0 98 7 0 0 0 146 5 349 4 47 498 0 1720 0 2 0 98 April 1, 2026 at 07:01:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 911 0 125 1319 0 9 0 1 0 98 1 0 0 0 187 0 422 0 107 731 0 0 0 1 0 99 2 0 0 21 236 6 537 0 98 739 1 821 0 1 0 99 3 0 0 0 488 250 575 0 113 1007 0 0 0 1 0 99 4 0 0 4 593 300 481 1 103 1012 0 4 0 1 0 99 5 0 0 0 221 1 523 0 105 614 0 0 0 1 0 99 6 0 0 2 481 103 616 0 104 646 1 1 0 1 0 99 7 0 0 0 249 5 601 1 104 749 0 1722 0 1 0 99 April 1, 2026 at 07:01:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2123 106 604 0 60 745 1 9 0 1 0 99 1 0 0 0 151 0 320 0 43 474 0 0 0 1 0 99 2 0 0 21 166 5 359 0 41 385 0 820 0 0 0 100 3 0 0 0 272 124 321 1 47 525 0 23 0 1 0 99 4 0 0 3 547 264 386 0 44 542 0 1 0 1 0 99 5 0 0 0 146 1 314 0 49 344 0 0 0 0 0 100 6 0 0 3 380 103 378 0 40 491 0 1 0 0 0 100 7 0 0 0 166 5 382 1 45 506 0 1724 0 1 0 99 April 1, 2026 at 07:01:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2124 110 134 0 0 0 0 17 0 0 0 100 1 0 0 0 14 0 12 0 1 0 0 16 0 0 0 100 2 0 0 21 24 7 22 1 0 0 0 836 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 320 156 119 0 0 0 0 17 0 0 0 100 5 0 0 0 16 7 6 0 0 0 0 24 0 0 0 100 6 0 0 3 218 102 20 0 1 0 0 13 0 0 0 100 7 0 0 0 23 5 52 1 0 0 0 1731 0 0 0 100 April 1, 2026 at 07:01:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 108 128 1 1 0 0 12 0 0 0 100 1 0 0 0 18 1 12 0 0 1 0 2 0 0 0 100 2 0 0 21 16 6 12 0 0 1 0 823 0 0 0 100 3 0 0 0 13 3 6 0 0 2 0 6 0 0 0 100 4 0 0 7 310 152 104 0 0 1 0 6 0 0 0 100 5 0 0 0 12 3 4 0 0 1 0 5 0 0 0 100 6 0 0 7 211 102 4 0 1 1 0 11 0 0 0 100 7 0 0 0 20 6 40 2 0 1 0 1722 0 0 0 100 April 1, 2026 at 07:01:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 122 0 0 0 0 9 0 0 0 100 1 0 0 0 12 0 4 0 0 0 0 0 0 0 0 100 2 0 0 21 15 6 16 0 1 0 0 819 0 0 0 100 3 0 0 0 9 0 6 0 1 0 0 0 0 0 0 100 4 19 0 3 314 155 108 0 0 1 0 8 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 1 0 0 0 100 6 0 0 3 213 102 7 0 1 0 0 0 0 0 0 100 7 0 0 0 19 6 44 1 0 1 0 1727 0 0 0 100 April 1, 2026 at 07:01:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 106 124 0 1 0 0 9 0 0 0 100 1 0 0 0 10 0 4 0 1 0 0 0 0 0 0 100 2 0 0 21 15 5 12 1 0 0 0 820 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 3 307 152 100 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 215 102 6 0 0 0 0 0 0 0 0 100 7 0 0 0 16 5 42 0 1 0 0 1717 0 0 0 100 April 1, 2026 at 07:01:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 105 116 0 0 0 0 4 0 0 0 100 1 0 0 0 15 2 12 0 1 0 0 3 0 0 0 100 2 0 0 21 13 5 10 1 0 0 0 821 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 317 157 110 0 0 0 0 9 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 2 0 0 0 100 6 0 0 3 212 102 6 0 0 0 0 2 0 0 0 100 7 0 0 0 20 7 44 1 0 2 0 1718 0 0 0 100 April 1, 2026 at 07:01:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 1 0 0 0 0 0 100 1 0 0 0 22 6 16 0 0 0 0 9 0 0 0 100 2 1 0 21 18 5 22 0 0 0 0 853 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 3 309 152 104 0 1 0 0 0 0 0 0 100 5 0 0 0 16 8 4 0 1 0 0 0 0 0 0 100 6 0 0 3 223 103 18 0 0 0 0 17 0 0 0 100 7 0 0 0 26 6 52 2 0 1 0 1727 0 0 0 100 April 1, 2026 at 07:01:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 31 10 26 0 0 0 0 17 0 0 0 100 2 0 0 21 14 5 12 0 1 0 0 824 0 0 0 100 3 0 0 0 6 0 2 0 1 0 0 3 0 0 0 100 4 0 0 3 312 154 106 0 1 0 0 8 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 3 211 101 4 0 1 0 0 0 0 0 0 100 7 0 0 0 21 6 48 1 1 0 0 1715 0 0 0 100 April 1, 2026 at 07:01:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 0 22 6 16 0 0 0 0 9 0 0 0 100 2 0 0 21 19 6 16 2 0 2 0 820 0 0 0 100 3 0 0 0 10 1 8 0 0 1 0 2 0 0 0 100 4 0 0 3 308 152 102 0 0 1 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 1 0 0 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 18 6 44 1 0 0 0 1719 0 0 0 100 April 1, 2026 at 07:02:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 126 0 1 0 0 0 0 0 0 100 1 0 0 0 24 7 20 0 0 0 0 7 0 0 0 100 2 0 0 21 18 8 16 0 0 0 0 824 0 0 0 100 3 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 4 0 0 3 313 155 106 0 0 0 0 6 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 211 103 2 0 0 0 0 1 0 0 0 100 7 0 0 0 20 6 44 1 1 1 0 1715 0 0 0 100 April 1, 2026 at 07:02:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 1 1 0 0 0 0 0 100 1 0 0 0 24 6 22 0 1 0 0 9 0 0 0 100 2 0 0 21 12 5 10 0 0 0 0 820 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 2 0 0 0 100 4 0 0 3 283 140 74 0 0 0 0 1 0 0 0 100 5 0 0 0 34 14 30 0 1 0 0 0 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 1 0 0 0 100 7 0 0 0 20 6 44 1 0 0 0 1719 0 0 0 100 April 1, 2026 at 07:02:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 0 2114 100 4095 28 85 31 0 10080 3 3 0 94 1 55 0 0 777 11 4381 25 82 21 0 17356 5 3 0 92 2 37 0 21 1277 10 4485 12 40 70 0 11442 3 2 0 94 3 189 0 0 550 1 2468 6 37 22 0 5308 2 1 0 97 4 161 0 3 598 105 4064 11 24 77 0 9144 3 2 0 95 5 8 0 0 496 48 1311 11 18 60 0 5486 4 1 0 95 6 7 0 3 344 103 4839 8 22 62 0 11019 4 3 0 94 7 263 0 0 276 6 4730 8 26 5 0 8182 2 2 0 96 April 1, 2026 at 07:02:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 119 0 0 2203 116 23750 112 514 284 0 57927 19 13 0 68 1 17 0 0 117 7 26062 86 416 306 0 54109 19 12 0 68 2 94 0 14 111 21 22727 66 301 268 0 49944 16 10 0 74 3 43 0 0 96 14 19105 57 235 255 0 42511 15 10 0 75 4 9 0 7 271 114 19280 41 145 253 0 46173 13 9 0 78 5 29 0 0 89 19 18749 34 140 269 0 43156 13 8 0 78 6 37 0 14 289 117 22234 36 134 230 0 48005 15 10 0 75 7 25 0 0 57 14 15519 26 103 150 0 35667 11 8 0 81 April 1, 2026 at 07:02:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2122 107 461 0 58 770 2 6 0 2 0 98 1 0 0 0 217 1 470 0 58 416 1 0 0 1 0 99 2 0 0 14 240 54 421 0 50 409 1 560 0 1 0 99 3 0 0 0 261 151 254 0 61 407 0 0 0 1 0 99 4 0 0 3 462 254 273 0 55 458 1 4 0 1 0 99 5 0 0 0 141 2 316 0 54 395 1 1 0 1 0 99 6 0 0 10 355 104 333 0 56 454 0 261 0 1 0 99 7 0 0 0 144 6 357 1 54 490 2 1726 0 1 0 98 April 1, 2026 at 07:02:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 593 0 83 953 7 9 0 1 0 99 1 0 0 0 274 0 613 0 87 448 1 0 0 1 0 99 2 0 0 14 211 14 429 1 89 319 0 560 0 1 0 99 3 0 0 0 406 224 447 0 89 563 1 2 0 1 0 99 4 0 0 3 518 282 334 0 78 510 0 3 0 1 0 99 5 0 0 0 176 1 394 1 81 307 0 0 0 0 0 100 6 0 0 10 380 103 427 1 82 411 1 261 0 1 0 99 7 0 0 0 199 6 490 1 80 494 1 1726 0 1 0 99 April 1, 2026 at 07:02:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 106 337 0 17 410 0 9 0 1 0 99 1 0 0 0 126 0 245 0 12 274 0 0 0 0 0 100 2 0 0 14 97 3 193 1 15 244 0 559 0 0 0 100 3 0 0 0 250 118 259 0 15 275 0 0 0 0 0 100 4 0 0 3 360 175 173 0 13 239 0 7 0 0 0 100 5 0 0 0 88 3 169 0 12 196 0 2 0 0 0 100 6 0 0 10 301 103 193 1 16 224 0 260 0 0 0 100 7 0 0 0 101 7 220 1 15 183 0 1725 0 1 0 99 April 1, 2026 at 07:02:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 107 128 0 1 0 0 10 0 0 0 100 1 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 2 0 0 14 17 3 20 0 1 0 0 574 0 0 0 100 3 0 0 0 114 51 114 0 1 0 0 5 0 0 0 100 4 0 0 2 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 13 6 2 0 0 0 0 0 0 0 0 100 6 0 0 11 220 105 16 0 0 0 0 277 0 0 0 100 7 0 0 0 25 6 54 1 0 1 0 1738 0 0 0 100 April 1, 2026 at 07:02:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 122 1 0 0 0 10 0 0 0 100 1 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 2 0 0 14 17 6 14 0 0 0 0 567 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 3 214 105 8 0 0 0 0 9 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 6 0 0 0 100 6 0 0 10 211 103 8 0 2 0 0 271 0 0 0 100 7 0 0 0 19 6 44 1 0 0 0 1731 0 0 0 100 April 1, 2026 at 07:02:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 118 0 1 3 0 0 0 0 0 100 1 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 2 0 0 14 25 11 22 0 0 0 0 570 0 0 0 100 3 0 0 0 116 52 114 0 0 1 0 2 0 0 0 100 4 0 0 3 211 103 6 0 1 0 0 0 0 0 0 100 5 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 6 0 0 10 217 105 10 0 1 0 0 284 0 0 0 100 7 0 0 0 27 8 50 2 2 0 0 1726 0 0 0 100 April 1, 2026 at 07:02:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 108 0 0 0 0 0 0 0 0 100 1 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 2 0 0 14 25 9 20 2 0 0 0 568 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 0 0 3 213 104 6 0 1 0 0 2 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 214 104 8 1 1 0 0 261 0 0 0 100 7 0 0 0 20 7 46 0 0 0 0 1726 0 0 0 100 April 1, 2026 at 07:02:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 2 0 0 14 21 9 20 0 1 0 0 570 0 0 0 100 3 0 0 0 111 52 106 0 0 0 0 23 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 1 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 212 104 6 0 0 0 0 261 0 0 0 100 7 0 0 0 20 7 44 1 0 0 0 1726 0 0 0 100 April 1, 2026 at 07:02:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2166 103 133 43 14 5 0 192 19 1 0 80 1 2 0 0 74 1 69 33 11 4 0 242 19 1 0 80 2 4 0 14 169 13 222 68 14 5 0 920 20 0 0 80 3 0 0 0 155 33 310 86 13 3 0 539 19 0 0 80 4 2123 0 144 358 108 255 121 13 1 1 428 18 1 0 80 5 2 0 0 104 11 105 48 7 4 0 333 20 0 0 80 6 13 0 9 344 110 341 155 11 5 0 805 19 1 0 80 7 24 0 0 124 9 195 83 7 2 0 2155 20 0 0 80 April 1, 2026 at 07:02:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2349 115 471 285 18 4 0 757 99 1 0 0 1 0 0 0 196 4 203 153 21 10 0 531 100 0 0 0 2 3 0 14 248 20 286 186 24 12 0 1153 100 0 0 0 3 0 0 0 277 11 346 221 23 7 0 668 100 0 0 0 4 0 0 231 365 113 178 137 22 8 0 417 100 0 0 0 5 0 0 0 284 7 413 251 21 8 0 659 100 0 0 0 6 0 0 14 429 106 291 195 12 4 0 819 100 0 0 0 7 0 0 7 309 13 460 259 21 12 0 2453 99 1 0 0 April 1, 2026 at 07:02:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2333 110 428 255 20 14 0 744 99 1 0 0 1 0 0 0 237 0 308 206 15 3 0 854 100 0 0 0 2 0 0 14 215 5 264 181 21 4 0 1152 100 0 0 0 3 0 0 0 234 3 311 202 20 11 0 580 100 0 0 0 4 0 0 171 413 105 356 212 30 7 0 712 100 0 0 0 5 0 0 0 227 9 339 209 28 10 0 746 100 0 0 0 6 0 0 10 434 121 228 163 21 5 0 649 100 0 0 0 7 1 0 0 338 26 503 278 26 7 0 2460 99 1 0 0 April 1, 2026 at 07:02:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2244 111 230 162 25 4 0 777 99 1 0 0 1 3 0 0 239 10 328 207 20 5 0 594 100 0 0 0 2 0 0 14 336 16 544 322 23 8 0 1620 99 1 0 0 3 5 0 0 215 5 285 191 25 5 0 676 100 0 0 0 4 1 0 157 393 106 276 189 15 2 0 586 100 0 0 0 5 0 0 0 199 2 272 179 24 7 0 697 100 0 0 0 6 0 0 10 436 109 333 198 32 7 0 837 100 0 0 0 7 0 0 0 273 14 454 247 41 9 0 2103 99 1 0 0 April 1, 2026 at 07:02:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2220 105 188 133 21 3 0 802 99 1 0 0 1 0 0 0 191 1 242 151 25 5 0 549 100 0 0 0 2 0 0 14 291 13 446 264 21 8 0 992 100 0 0 0 3 0 0 0 230 7 305 193 27 6 0 899 100 0 0 0 4 0 0 185 440 111 357 226 25 4 0 759 100 0 0 0 5 0 0 0 261 17 322 204 31 7 0 662 100 0 0 0 6 0 0 10 467 115 397 245 22 13 0 1042 100 0 0 0 7 0 0 0 227 18 257 160 20 4 0 1835 100 0 0 0 April 1, 2026 at 07:02:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2209 105 167 129 19 5 0 652 99 1 0 0 1 0 0 0 255 7 367 230 19 3 0 634 100 0 0 0 2 0 0 21 311 29 479 279 25 14 0 1047 99 1 0 0 3 0 0 0 318 12 477 283 22 8 0 1110 100 0 0 0 4 0 0 157 433 109 330 212 24 3 0 776 99 1 0 0 5 0 0 0 205 16 235 156 31 5 0 634 100 0 0 0 6 0 0 10 435 109 310 195 31 1 0 792 100 0 0 0 7 0 0 0 226 8 287 184 23 9 0 1996 99 1 0 0 April 1, 2026 at 07:02:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2229 115 197 146 28 11 0 765 99 1 0 0 1 0 0 0 215 10 266 181 16 7 0 568 99 1 0 0 2 3 0 14 282 19 461 264 26 9 0 1140 100 0 0 0 3 0 0 0 266 4 377 244 23 13 0 1217 100 0 0 0 4 0 0 157 389 109 233 157 31 3 0 508 100 0 0 0 5 0 0 0 260 4 359 226 25 3 0 620 100 0 0 0 6 0 0 10 477 111 459 267 26 12 0 946 100 0 0 0 7 0 0 0 260 13 367 220 20 7 0 2147 99 1 0 0 April 1, 2026 at 07:02:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2189 128 258 89 11 6 0 609 38 0 0 61 1 0 0 0 78 3 96 54 8 1 0 220 41 0 0 59 2 1 0 0 111 28 106 42 6 0 0 143 42 0 0 58 3 0 0 14 47 2 43 37 5 0 0 664 39 0 0 61 4 7 0 18 251 103 41 41 6 2 0 107 48 0 0 51 5 0 0 0 34 1 31 26 5 2 0 99 39 0 0 61 6 2 0 9 299 107 142 72 9 0 0 567 41 0 0 59 7 2 0 0 95 5 155 67 5 3 0 1660 41 0 0 59 April 1, 2026 at 07:02:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 3 2126 102 158 0 9 8 5 473 0 1 0 99 1 1470 0 113 34 1 68 1 9 12 15 6615 1 1 0 98 2 151 0 0 168 58 194 0 11 7 15 152 0 0 0 100 3 20 0 14 40 2 47 0 7 6 6 716 0 0 0 100 4 7 0 3 235 102 29 0 4 3 4 101 0 0 0 100 5 6 0 0 31 0 15 0 3 4 3 46 0 0 0 100 6 9 0 10 248 107 46 0 7 3 4 380 0 0 0 100 7 1934 0 0 48 4 73 3 3 5 6 1746 0 1 0 99 April 1, 2026 at 07:02:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 102 116 0 0 0 0 300 0 0 0 100 1 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 2 0 0 0 121 58 116 0 0 0 0 9 0 0 0 100 3 0 0 14 10 3 6 1 0 0 0 561 0 0 0 100 4 0 0 3 209 103 2 0 0 0 0 1 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 215 105 8 1 0 0 0 262 0 0 0 100 7 0 0 0 21 4 48 1 0 1 0 1518 0 0 0 100 April 1, 2026 at 07:02:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 122 0 0 0 0 303 0 0 0 100 1 0 0 0 12 2 6 0 0 0 0 1 0 0 0 100 2 0 0 0 126 60 122 0 0 0 0 11 0 0 0 100 3 0 0 14 13 2 18 0 1 0 0 574 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 1 0 0 0 100 5 0 0 0 12 6 0 0 0 0 0 0 0 0 0 100 6 0 0 10 220 105 16 0 0 0 0 277 0 0 0 100 7 0 0 0 28 4 58 1 0 1 0 1525 0 0 0 99 April 1, 2026 at 07:02:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2184 119 806 5 10 33 1 3129 4 1 0 95 1 1 0 0 376 3 975 5 12 8 0 1913 4 1 0 96 2 0 0 1 289 30 709 8 18 13 0 2308 10 1 0 90 3 10 0 21 182 5 577 5 14 44 0 3238 2 2 0 97 4 3 0 283 431 105 1111 2 8 38 5 2535 4 1 0 95 5 0 0 26 306 10 885 6 10 7 0 1143 2 0 0 97 6 2 0 10 541 105 1360 5 4 57 9 3634 2 1 0 97 7 33 0 0 397 6 819 7 9 51 1 4763 4 1 0 95 April 1, 2026 at 07:02:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2127 117 506 0 63 979 0 300 0 1 0 99 1 0 0 0 309 36 559 0 53 561 0 0 0 1 0 99 2 0 0 0 112 10 247 0 54 536 0 8 0 1 0 99 3 4 0 14 284 151 315 0 53 625 0 577 0 2 0 98 4 0 0 4 446 250 244 1 59 711 0 0 0 2 0 98 5 0 0 0 134 1 291 1 62 481 0 1 0 1 0 99 6 0 0 9 334 104 309 0 46 578 0 260 0 2 0 98 7 0 0 7 104 5 267 1 56 486 0 1428 0 2 0 98 April 1, 2026 at 07:02:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2110 102 751 0 114 1454 3 0 0 2 0 98 1 0 0 0 423 51 797 0 128 766 3 300 0 1 0 99 2 0 0 0 235 9 502 1 109 799 1 14 0 1 0 99 3 0 0 14 436 193 557 1 109 965 1 563 0 1 0 99 4 0 0 3 583 304 472 0 106 1034 4 0 0 1 0 99 5 0 0 0 238 0 513 0 104 633 1 0 0 1 0 99 6 0 0 10 445 103 533 0 102 691 0 260 0 1 0 99 7 0 0 0 207 5 471 3 104 751 1 1426 0 1 0 99 April 1, 2026 at 07:02:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 102 489 0 43 657 1 1 0 1 0 99 1 0 0 0 176 2 343 0 37 390 0 300 0 0 0 100 2 0 0 0 163 7 324 0 34 385 1 10 0 0 0 99 3 0 0 14 244 115 305 0 45 458 0 560 0 1 0 99 4 0 0 3 420 222 290 0 44 521 0 0 0 1 0 99 5 0 0 7 157 7 312 0 35 307 0 2 0 0 0 100 6 0 0 10 430 148 404 1 39 403 2 260 0 1 0 99 7 0 0 0 118 4 284 1 44 498 0 1425 0 1 0 99 April 1, 2026 at 07:02:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 143 2 2 9 0 860 0 1 0 99 1 0 0 0 22 4 20 0 1 1 0 322 0 0 0 100 2 0 0 0 44 9 44 1 1 12 0 922 0 0 0 100 3 0 0 14 27 7 27 1 2 0 0 609 0 0 0 100 4 0 0 3 218 103 16 0 4 0 0 35 0 0 0 100 5 0 0 0 18 7 9 0 3 0 0 40 0 0 0 100 6 0 0 10 332 156 138 0 3 1 0 323 0 0 0 100 7 0 0 0 35 4 77 3 2 4 0 1509 0 0 0 100 April 1, 2026 at 07:02:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 270 0 1 0 0 331 0 0 0 100 1 0 0 0 13 2 8 0 0 0 0 300 0 0 0 100 2 0 0 0 17 2 12 0 0 0 0 2 0 0 0 100 3 0 0 14 11 4 8 0 0 0 0 560 0 0 0 100 4 0 0 3 208 102 4 0 1 0 0 2 0 0 0 100 5 0 0 0 19 7 14 0 0 0 0 7 0 0 0 100 6 0 0 10 290 142 81 1 1 0 0 260 0 0 0 100 7 0 0 0 44 15 72 1 1 0 0 1424 0 0 0 100 April 1, 2026 at 07:02:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 108 0 0 0 0 0 0 0 0 100 1 0 0 0 12 2 8 0 0 0 0 300 0 0 0 100 2 0 0 0 16 1 12 0 0 0 0 1 0 0 0 100 3 0 0 14 20 7 20 0 0 0 0 571 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 19 6 16 0 0 0 0 10 0 0 0 100 6 0 0 10 215 105 10 0 0 0 0 261 0 0 0 100 7 0 0 0 115 54 138 2 0 1 0 1426 0 0 0 100 April 1, 2026 at 07:02:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 110 0 0 0 0 0 0 0 0 100 1 0 0 0 12 2 6 0 0 0 0 300 0 0 0 100 2 0 0 0 13 1 8 0 1 0 0 0 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 561 0 0 0 100 4 0 0 2 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 17 6 14 0 1 0 0 9 0 0 0 100 6 0 0 11 212 104 6 0 0 0 0 261 0 0 0 100 7 0 0 0 122 54 146 1 1 0 0 1425 0 0 0 100 April 1, 2026 at 07:02:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 114 0 0 0 0 0 0 0 0 100 1 0 0 0 16 3 14 0 0 0 0 322 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 14 17 6 14 1 0 0 0 586 0 0 0 100 4 0 0 3 211 103 6 0 0 0 0 34 0 0 0 100 5 0 0 0 21 6 18 0 0 0 0 13 0 0 0 100 6 0 0 10 212 104 6 0 0 0 0 261 0 0 0 100 7 0 0 0 120 53 150 0 0 0 0 1433 0 0 0 100 April 1, 2026 at 07:02:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 118 0 0 0 0 1 0 0 0 100 1 0 0 0 31 11 26 0 0 0 0 314 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 3 0 0 0 100 3 2 0 14 21 5 26 0 0 0 0 581 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 0 12 5 4 0 0 0 0 4 0 0 0 100 6 0 0 10 221 105 16 1 0 0 0 279 0 0 0 100 7 0 0 0 119 53 146 1 0 0 0 1436 0 0 0 100 April 1, 2026 at 07:02:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2108 103 121 0 2 1 0 5 0 0 0 100 1 1 0 0 89 40 82 0 1 1 0 311 0 0 0 100 2 7 0 0 20 7 12 1 0 1 0 11 0 0 0 100 3 0 0 14 20 8 16 0 0 1 0 570 0 0 0 100 4 0 0 3 209 102 2 0 0 1 0 0 0 0 0 100 5 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 6 2 0 10 213 104 8 0 0 1 0 271 0 0 0 100 7 0 0 0 59 24 78 2 0 2 0 1426 0 0 0 100 April 1, 2026 at 07:02:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 116 0 0 3 0 0 0 0 0 100 1 0 0 0 124 58 118 0 0 0 0 309 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 14 10 2 12 0 1 1 0 559 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 11 3 4 0 0 0 0 1 0 0 0 100 6 0 0 10 213 104 8 0 0 1 0 260 0 0 0 100 7 0 0 0 15 3 40 0 0 2 0 1417 0 0 0 100 April 1, 2026 at 07:02:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2103 101 112 0 0 0 0 0 0 0 0 100 1 0 0 0 124 58 120 0 0 0 0 309 0 0 0 100 2 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 3 0 0 14 14 5 10 1 0 0 0 568 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 10 212 103 4 0 0 0 0 260 0 0 0 100 7 0 0 0 12 3 36 1 0 0 0 1417 0 0 0 100 April 1, 2026 at 07:02:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 102 116 0 0 0 0 1 0 0 0 100 1 0 0 0 124 58 120 0 0 0 0 309 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 560 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 6 0 0 10 211 103 4 1 0 0 0 260 0 0 0 100 7 0 0 0 16 3 40 1 0 0 0 1417 0 0 0 100 April 1, 2026 at 07:02:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 118 0 0 3 0 0 0 0 0 100 1 0 0 0 126 59 120 0 0 0 0 310 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 3 0 0 0 100 3 0 0 14 25 8 22 0 0 0 0 583 0 0 0 100 4 0 0 3 208 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 20 8 8 1 1 0 0 10 0 0 0 100 6 0 0 10 218 103 20 0 0 0 0 279 0 0 0 100 7 0 0 0 24 3 54 2 0 0 0 1427 0 0 0 100 April 1, 2026 at 07:02:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 112 0 0 0 0 0 0 0 0 100 1 0 0 0 112 52 108 0 1 0 0 300 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 561 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 3 0 0 19 7 14 0 0 0 0 14 0 0 0 100 6 0 0 10 211 103 6 0 1 0 0 271 0 0 0 100 7 0 0 0 11 3 36 0 0 0 0 1417 0 0 0 100 April 1, 2026 at 07:02:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 101 114 0 0 3 0 0 0 0 0 100 1 0 0 0 113 52 110 0 1 0 0 300 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 14 16 5 14 1 0 0 0 564 0 0 0 100 4 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 6 0 0 10 213 104 8 0 0 0 0 260 0 0 0 100 7 0 0 0 15 3 38 1 0 0 0 1418 0 0 0 100 April 1, 2026 at 07:02:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 112 0 0 0 0 0 0 0 0 100 1 0 0 0 114 52 110 0 0 0 0 300 0 0 0 100 2 0 0 0 13 2 10 0 2 1 0 0 0 0 0 100 3 0 0 14 7 2 4 0 0 0 0 559 0 0 0 100 4 0 0 3 207 102 0 0 0 0 0 0 0 0 0 100 5 0 0 0 17 6 12 0 0 0 0 9 0 0 0 100 6 0 0 10 213 104 6 1 0 0 0 261 0 0 0 100 7 0 0 0 13 3 36 1 0 0 0 1416 0 0 0 100 April 1, 2026 at 07:02:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 264 0 0 2129 101 8206 35 142 85 0 18742 6 5 0 89 1 15 0 0 740 38 9626 27 104 117 0 25700 7 5 0 88 2 12 0 0 476 6 9738 28 84 66 0 18634 6 4 0 90 3 120 0 14 819 10 5735 17 62 82 0 18668 6 4 0 90 4 27 0 3 906 106 8603 12 43 88 0 15498 7 4 0 89 5 52 0 0 434 12 5577 18 42 55 0 14363 5 3 0 91 6 16 0 10 471 108 8230 8 44 237 0 23193 7 4 0 89 7 80 0 0 628 5 6864 15 36 41 0 15983 4 3 0 92 April 1, 2026 at 07:02:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 100 0 0 2183 116 18538 79 304 230 0 44267 15 9 0 76 1 34 0 0 92 16 21086 52 252 166 0 40404 13 9 0 78 2 25 0 0 94 13 18489 46 195 188 0 37595 12 8 0 80 3 52 0 14 58 11 18960 34 140 190 0 38179 12 8 0 80 4 28 0 3 255 112 15112 25 97 334 0 42761 13 8 0 79 5 33 0 0 66 17 19413 22 93 254 0 42688 14 9 0 77 6 11 0 10 309 135 11825 18 82 129 0 27552 9 6 0 85 7 6 0 0 44 8 11687 21 71 162 0 31624 9 6 0 85 April 1, 2026 at 07:02:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 140 0 2 0 0 9 0 0 0 100 1 0 0 0 16 4 8 0 0 1 0 300 0 0 0 100 2 0 0 1 16 4 6 0 1 1 0 0 0 0 0 100 3 0 0 14 18 6 12 0 1 1 0 863 0 0 0 100 4 0 0 7 216 105 6 0 0 1 0 5 0 0 0 100 5 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 6 0 0 14 316 153 106 0 1 1 0 260 0 0 0 100 7 0 0 0 24 3 42 1 1 3 0 1126 0 0 0 100 April 1, 2026 at 07:02:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 107 764 2 76 756 3 9 0 1 0 99 1 0 0 0 113 5 262 0 66 436 1 300 0 1 0 99 2 0 0 0 201 13 418 1 62 499 0 0 0 1 0 99 3 0 0 14 295 152 335 0 63 476 1 859 0 1 0 99 4 0 0 3 451 250 253 2 63 445 0 0 0 1 0 99 5 0 0 0 93 1 216 1 58 354 0 1 0 1 0 99 6 0 0 10 387 141 350 1 62 382 0 260 0 1 0 99 7 0 0 0 107 2 271 1 61 413 0 1125 0 1 0 99 April 1, 2026 at 07:02:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 876 0 87 896 4 10 0 1 0 99 1 0 0 0 164 3 372 1 75 524 0 299 0 1 0 99 2 0 0 0 319 52 593 0 77 501 1 0 0 1 0 99 3 0 0 14 356 181 419 0 79 502 0 863 0 1 0 99 4 0 0 2 523 288 339 1 77 590 0 6 0 1 0 99 5 0 0 0 120 1 290 0 68 359 1 1 0 0 0 100 6 0 0 11 330 103 334 1 69 482 0 1343 0 1 0 99 7 0 0 0 136 1 325 1 75 425 1 44 0 1 0 99 April 1, 2026 at 07:02:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2126 109 405 0 26 329 0 14 0 1 0 99 1 0 0 0 116 5 217 1 17 206 0 300 0 0 0 100 2 0 0 0 117 6 213 2 22 192 0 0 0 0 0 100 3 0 0 14 156 73 199 2 17 253 0 862 0 0 0 99 4 0 0 1 338 170 165 1 20 260 0 0 0 0 0 100 5 0 0 0 91 11 161 1 16 186 0 2 0 0 0 100 6 0 0 12 285 104 183 2 16 129 0 1385 0 1 0 99 7 0 0 0 151 37 217 2 18 120 0 0 0 0 0 100 April 1, 2026 at 07:02:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2119 109 126 0 0 0 0 19 0 0 0 100 1 1 0 0 20 3 20 0 0 0 0 318 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 3 0 0 0 100 3 0 0 14 13 4 10 0 0 0 0 862 0 0 0 100 4 0 0 1 211 104 4 0 0 0 0 2 0 0 0 100 5 0 0 0 25 9 20 0 1 0 0 23 0 0 0 100 6 0 0 12 219 104 46 1 1 0 0 1403 0 0 0 100 7 0 0 0 119 51 113 1 0 0 0 1 0 0 0 100 April 1, 2026 at 07:02:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 106 112 0 0 0 0 8 0 0 0 100 1 0 0 0 14 3 10 0 0 0 0 300 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 3 0 0 14 13 3 10 0 0 0 0 860 0 0 0 100 4 0 0 1 211 102 8 0 1 0 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 12 215 104 38 1 0 0 0 1386 0 0 0 100 7 0 0 0 113 50 108 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2121 108 122 0 0 4 0 10 0 0 0 100 1 0 0 0 15 3 8 1 0 0 0 300 0 0 0 100 2 0 0 0 12 3 8 0 0 3 0 0 0 0 0 100 3 0 0 14 16 4 16 0 0 2 0 862 0 0 0 100 4 0 0 1 216 105 10 0 0 0 0 3 0 0 0 100 5 0 0 0 7 0 4 0 1 0 0 0 0 0 0 100 6 0 0 12 214 104 38 0 0 0 0 1386 0 0 0 100 7 0 0 0 113 50 108 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2117 107 114 0 0 0 0 9 0 0 0 100 1 0 0 0 15 3 12 0 0 0 0 301 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 3 0 0 14 12 3 8 1 0 0 0 861 0 0 0 100 4 0 0 1 211 104 4 0 0 0 0 3 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 12 218 105 40 2 0 0 0 1386 0 0 0 100 7 0 0 0 113 50 108 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:02:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 0 2182 113 209 64 16 1 0 451 36 1 0 63 1 7 0 0 112 7 110 68 15 2 0 881 37 0 0 63 2 0 0 0 110 6 121 58 16 0 0 280 37 0 0 63 3 1330 0 14 114 5 142 82 13 2 0 1322 36 1 0 63 4 0 0 141 305 106 421 126 23 1 0 923 36 1 0 63 5 2 0 0 134 3 197 102 16 7 0 344 37 0 0 63 6 12 0 12 312 105 160 72 9 4 0 1715 37 0 0 63 7 0 0 0 185 35 220 83 12 6 0 480 37 0 0 63 April 1, 2026 at 07:02:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2311 106 469 278 23 14 0 822 99 1 0 0 1 4 0 0 203 14 245 165 35 6 0 1017 100 0 0 0 2 0 0 0 240 3 388 236 21 16 0 869 100 0 0 0 3 3 0 14 181 3 216 157 20 13 0 1467 100 0 0 0 4 0 0 115 399 105 257 180 17 10 0 627 100 0 0 0 5 0 0 0 256 28 320 203 19 7 0 405 100 0 0 0 6 0 0 10 450 119 355 202 26 8 0 2019 99 1 0 0 7 0 0 0 308 10 536 312 19 22 0 907 99 1 0 0 April 1, 2026 at 07:02:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2280 105 286 194 19 12 0 694 99 1 0 0 1 0 0 0 210 12 209 150 25 4 0 749 100 0 0 0 2 0 0 0 297 13 380 229 20 8 0 710 100 0 0 0 3 2 0 14 220 13 240 168 19 5 0 1311 100 0 0 0 4 0 0 231 470 114 482 267 28 11 0 1036 99 1 0 0 5 0 0 0 257 10 329 207 26 11 0 702 100 0 0 0 6 0 0 14 454 111 356 212 21 7 0 2056 99 1 0 0 7 0 0 0 246 16 277 182 23 5 0 681 100 0 0 0 April 1, 2026 at 07:02:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2254 115 230 165 26 9 0 718 99 1 0 0 1 2 0 0 198 10 201 150 21 4 0 814 100 0 0 0 2 0 0 0 254 4 353 225 16 6 0 549 100 0 0 0 3 2 0 14 228 7 273 182 20 10 0 1520 100 0 0 0 4 0 0 185 384 117 224 159 18 6 0 437 100 0 0 0 5 0 0 0 286 8 516 290 33 8 0 1060 99 1 0 0 6 5 0 10 490 114 495 264 35 4 0 2407 99 1 0 0 7 0 0 0 254 4 368 230 23 10 0 678 100 0 0 0 April 1, 2026 at 07:02:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2309 107 348 223 21 9 0 619 99 1 0 0 1 0 0 0 206 16 220 154 17 12 0 797 100 0 0 0 2 0 0 7 295 9 437 265 21 7 0 1013 99 1 0 0 3 0 0 14 284 12 430 252 27 11 0 1729 100 0 0 0 4 0 0 171 448 107 413 247 22 8 0 818 99 1 0 0 5 0 0 0 259 11 336 217 18 4 0 656 100 0 0 0 6 0 0 10 412 112 291 179 25 6 0 2039 99 1 0 0 7 0 0 0 200 5 208 151 20 10 0 563 100 0 0 0 April 1, 2026 at 07:02:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2273 104 344 212 22 12 0 622 99 1 0 0 1 0 0 0 286 20 395 242 21 7 0 984 100 0 0 0 2 0 0 0 298 8 416 258 15 2 0 786 100 0 0 0 3 0 0 14 194 12 198 148 20 5 0 1446 100 0 0 0 4 0 0 171 437 115 314 208 24 3 0 791 99 1 0 0 5 0 0 0 249 11 344 209 21 9 0 791 100 0 0 0 6 0 0 10 410 108 269 162 24 5 0 1966 99 1 0 0 7 0 0 0 217 5 265 172 22 9 0 619 100 0 0 0 April 1, 2026 at 07:02:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2332 115 471 279 25 4 0 714 99 1 0 0 1 2 0 0 292 28 393 239 23 9 0 976 100 0 0 0 2 0 0 0 239 5 304 202 15 1 0 720 100 0 0 0 3 0 0 14 194 7 200 144 24 5 0 1429 100 0 0 0 4 0 0 199 405 112 302 201 19 1 0 760 100 0 0 0 5 3 0 0 222 15 217 158 21 10 0 533 100 0 0 0 6 0 0 10 393 112 242 142 22 4 0 1860 99 1 0 0 7 0 0 0 240 7 323 207 21 6 0 640 100 0 0 0 April 1, 2026 at 07:02:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2112 101 114 27 4 0 0 123 28 0 0 71 1 6 0 0 66 7 90 36 5 1 0 468 24 0 0 76 2 0 0 0 51 4 47 30 3 0 0 127 22 0 0 78 3 0 0 14 60 11 67 39 5 1 0 1074 29 0 0 71 4 0 0 17 234 104 38 14 7 0 0 60 22 0 0 78 5 0 0 0 31 1 16 17 3 0 0 45 29 0 0 71 6 0 0 10 236 104 65 23 2 2 0 1503 26 0 0 74 7 0 0 0 109 42 129 17 4 0 0 112 20 0 0 80 April 1, 2026 at 07:02:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 60 0 3 2124 101 162 0 8 10 6 161 0 0 0 99 1 26 0 0 52 3 54 0 8 4 4 432 0 0 0 100 2 6 0 0 39 2 40 0 6 5 5 56 0 0 0 100 3 6 0 14 35 3 27 0 4 2 2 907 0 0 0 100 4 1 0 1 252 111 38 0 4 4 0 39 0 0 0 100 5 3377 0 118 32 1 62 3 3 7 17 6850 2 1 0 97 6 119 0 12 258 104 116 1 8 8 13 1560 0 0 0 99 7 30 0 0 139 50 150 0 7 7 7 134 0 0 0 100 April 1, 2026 at 07:03:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 108 0 0 0 0 0 0 0 0 100 1 0 0 0 18 3 14 0 1 1 0 300 0 0 0 100 2 0 0 0 10 2 6 0 1 0 0 0 0 0 0 100 3 0 0 14 12 3 10 1 1 0 0 860 0 0 0 100 4 0 0 1 220 108 12 0 0 0 0 8 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 12 214 105 38 0 0 0 0 1480 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 114 0 0 0 0 2 0 0 0 100 1 0 0 0 17 3 10 1 0 0 0 300 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 14 11 3 8 0 1 0 0 860 0 0 0 100 4 0 0 1 229 112 24 0 1 0 0 14 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 12 216 105 38 2 0 0 0 1476 0 0 0 100 7 0 0 0 107 50 102 0 0 0 0 3 0 0 0 100 April 1, 2026 at 07:03:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 18 2171 101 1437 4 27 29 1 3363 3 1 0 95 1 0 0 14 357 34 1265 5 24 34 0 3099 1 1 0 97 2 2 0 0 133 1 886 9 17 41 3 2694 5 1 0 94 3 4 0 14 146 4 754 5 15 49 0 3892 2 1 0 97 4 3 0 283 506 111 1028 5 16 23 0 2152 3 1 0 96 5 49 0 0 166 13 803 5 14 40 1 2466 2 1 0 97 6 1 0 11 354 105 186 6 10 14 0 1313 14 1 0 85 7 31 0 7 253 20 787 4 15 8 0 3604 1 1 0 98 April 1, 2026 at 07:03:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 128 0 1 1 0 0 0 0 0 100 1 0 0 7 120 54 114 0 1 1 0 300 0 0 0 100 2 0 0 0 14 3 6 0 0 1 0 0 0 0 0 100 3 0 0 14 16 5 8 0 0 1 0 861 0 0 0 100 4 0 0 3 216 104 6 0 0 1 0 2 0 0 0 100 5 0 0 0 25 8 18 0 1 1 0 9 0 0 0 100 6 0 0 3 208 101 0 0 0 1 0 0 0 0 0 100 7 0 0 7 15 5 40 0 1 0 0 1385 0 0 0 100 April 1, 2026 at 07:03:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 112 2108 100 492 0 60 918 2 0 0 2 0 98 1 0 0 0 260 53 428 0 56 500 0 300 0 2 0 98 2 0 0 0 181 2 376 0 53 549 0 0 0 2 0 98 3 0 0 14 259 151 246 0 61 690 0 859 0 2 0 98 4 0 0 3 459 252 236 0 55 600 1 0 0 2 0 98 5 0 0 0 201 8 393 0 61 452 0 10 0 1 0 99 6 0 0 3 302 101 225 0 48 627 0 0 0 2 0 98 7 0 0 7 150 4 333 1 51 545 1 1383 0 1 0 99 April 1, 2026 at 07:03:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 755 1 132 1435 0 0 0 2 0 98 1 0 0 7 302 32 604 2 91 828 3 300 0 1 0 99 2 0 0 0 279 1 612 1 100 625 0 0 0 1 0 99 3 0 0 7 369 197 422 2 113 783 1 603 0 1 0 99 4 0 0 11 591 300 474 1 98 940 4 259 0 1 0 99 5 0 0 0 282 7 607 1 103 704 0 6 0 1 0 99 6 0 0 2 422 101 486 0 108 770 1 0 0 1 0 99 7 0 0 7 261 20 589 3 96 813 1 1383 0 1 0 99 April 1, 2026 at 07:03:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2141 128 505 1 53 742 2 161 0 1 0 99 1 0 0 0 165 4 336 0 40 351 0 339 0 1 0 99 2 0 0 0 177 1 372 0 46 429 0 14 0 0 0 100 3 0 0 0 246 117 290 0 49 506 1 1458 0 1 0 99 4 0 0 17 441 221 282 0 41 523 0 1109 0 1 0 99 5 0 0 0 201 9 399 0 40 388 2 57 0 1 0 99 6 0 0 3 430 126 390 0 42 393 0 14 0 0 0 99 7 0 0 7 145 5 392 0 43 390 1 1447 0 1 0 99 April 1, 2026 at 07:03:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2114 105 122 1 0 0 0 8 0 0 0 100 1 0 0 0 20 3 20 0 1 0 0 312 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 13 2 12 0 1 0 0 594 0 0 0 100 4 0 0 17 212 105 8 0 0 0 0 268 0 0 0 100 5 0 0 0 25 10 18 0 0 0 0 10 0 0 0 100 6 0 0 3 312 151 110 0 0 0 0 20 0 0 0 100 7 0 0 7 16 3 40 2 1 0 0 1382 0 0 0 100 April 1, 2026 at 07:03:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 122 0 0 0 0 10 0 0 0 100 1 0 0 0 17 3 14 0 0 0 0 301 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 9 2 4 0 0 0 0 595 0 0 0 100 4 0 0 17 210 104 4 1 0 0 0 266 0 0 0 100 5 1 0 0 13 3 8 0 0 0 0 6 0 0 0 100 6 0 0 3 308 151 102 0 1 0 0 11 0 0 0 100 7 0 0 7 19 7 44 1 0 0 0 1387 0 0 0 100 April 1, 2026 at 07:03:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2120 108 130 0 0 1 0 9 0 0 0 100 1 0 0 0 19 4 13 1 2 0 0 300 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 16 3 14 0 1 2 0 593 0 0 0 100 4 0 0 17 216 106 14 0 2 1 0 268 0 0 0 100 5 0 0 0 15 3 12 0 1 1 0 0 0 0 0 100 6 0 0 3 310 152 104 0 0 0 0 0 0 0 0 100 7 0 0 7 13 4 40 0 1 0 0 1383 0 0 0 100 April 1, 2026 at 07:03:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2118 107 126 0 1 0 0 34 0 0 0 100 1 0 0 0 18 3 16 0 1 0 0 316 0 0 0 100 2 0 0 0 10 0 2 0 1 0 0 1 0 0 0 100 3 0 0 0 12 3 6 0 0 0 0 594 0 0 0 100 4 0 0 17 209 104 4 0 0 0 0 266 0 0 0 100 5 0 0 0 13 2 8 0 0 1 0 1 0 0 0 100 6 0 0 3 312 152 106 0 1 1 0 1 0 0 0 100 7 0 0 7 17 6 56 1 1 0 0 1407 0 0 0 100 April 1, 2026 at 07:03:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 112 0 0 0 0 2 0 0 0 100 1 0 0 0 20 4 18 0 0 0 0 323 0 0 0 100 2 0 0 0 7 0 4 0 0 0 0 6 0 0 0 100 3 0 0 0 12 3 8 0 0 1 0 598 0 0 0 100 4 0 0 17 212 105 8 0 0 1 0 271 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 6 0 0 3 309 152 102 0 0 0 0 1 0 0 0 100 7 0 0 7 31 12 56 2 0 0 0 1400 0 0 0 100 April 1, 2026 at 07:03:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 120 0 0 0 0 9 0 0 0 100 1 0 0 0 22 4 22 0 1 0 0 311 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 593 0 0 0 100 4 2 0 17 215 105 8 1 0 0 0 271 0 0 0 100 5 19 0 0 25 10 18 0 1 0 0 22 0 0 0 100 6 0 0 3 316 151 116 0 0 0 0 30 0 0 0 100 7 0 0 7 30 11 56 0 1 0 0 1388 0 0 0 100 April 1, 2026 at 07:03:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 130 0 1 1 0 0 0 0 0 100 1 0 0 0 19 5 10 1 0 1 0 300 0 0 0 100 2 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 3 0 0 0 16 5 8 0 0 1 0 596 0 0 0 100 4 0 0 21 212 105 6 0 0 1 0 268 0 0 0 100 5 0 0 0 12 1 4 0 0 1 0 0 0 0 0 100 6 0 0 7 308 151 100 0 0 1 0 0 0 0 0 100 7 0 0 7 29 10 50 2 0 2 0 1385 0 0 0 100 April 1, 2026 at 07:03:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 2 0 0 0 0 0 100 1 0 0 0 16 4 10 0 0 0 0 300 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 14 3 12 0 0 0 0 594 0 0 0 100 4 0 0 17 210 104 8 0 1 0 0 266 0 0 0 100 5 0 0 0 14 2 10 0 0 2 0 1 0 0 0 100 6 0 0 3 310 152 104 0 0 0 0 1 0 0 0 100 7 0 0 7 28 12 54 0 0 0 0 1393 0 0 0 100 April 1, 2026 at 07:03:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 1 0 0 0 0 0 100 1 0 0 0 17 4 14 0 1 0 0 300 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 593 0 0 0 100 4 0 0 17 211 105 6 0 0 0 0 268 0 0 0 100 5 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 7 22 8 46 2 0 0 0 1385 0 0 0 100 April 1, 2026 at 07:03:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 142 1 2 0 0 1118 0 0 0 99 1 0 0 0 19 4 18 0 1 1 0 302 0 0 0 100 2 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 3 0 0 0 13 3 10 0 1 0 0 597 0 0 0 100 4 0 0 17 211 104 6 1 0 0 0 269 0 0 0 100 5 0 0 0 11 1 4 0 0 0 0 1 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 7 31 13 26 0 0 0 0 279 0 0 0 100 April 1, 2026 at 07:03:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 144 0 0 0 0 1118 0 1 0 99 1 1 0 0 24 4 22 1 2 0 0 313 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 11 3 6 0 0 0 0 594 0 0 0 100 4 0 0 17 212 105 8 0 0 0 0 268 0 0 0 100 5 0 0 0 21 8 18 0 2 1 0 17 0 0 0 100 6 0 0 3 317 153 112 0 0 0 0 17 0 0 0 100 7 0 0 7 30 11 24 1 0 0 0 273 0 0 0 100 April 1, 2026 at 07:03:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 142 1 1 0 0 1116 0 1 0 99 1 0 0 0 16 3 10 0 0 0 0 300 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 13 3 8 0 1 0 0 594 0 0 0 100 4 0 0 17 210 104 4 0 0 0 0 266 0 0 0 100 5 0 0 0 14 3 10 0 1 0 0 2 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 7 26 11 22 0 0 0 0 275 0 0 0 100 April 1, 2026 at 07:03:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 142 1 0 0 0 1117 0 0 0 99 1 0 0 0 16 3 10 0 0 0 0 300 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 13 3 12 0 1 0 0 594 0 0 0 100 4 0 0 17 211 105 6 0 0 0 0 268 0 0 0 100 5 0 0 0 14 2 10 0 0 0 0 0 0 0 0 100 6 0 0 3 308 151 102 0 1 0 0 0 0 0 0 100 7 0 0 7 21 8 16 1 0 0 0 269 0 0 0 100 April 1, 2026 at 07:03:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 343 0 0 2133 108 10206 44 166 121 0 31066 10 7 0 83 1 132 0 0 372 9 11600 35 120 124 0 27006 9 6 0 85 2 0 0 0 347 3 12280 24 92 169 0 25147 10 5 0 84 3 209 0 0 824 7 13021 15 72 132 0 26252 8 5 0 87 4 10 0 19 1400 111 10826 15 65 81 0 23388 7 5 0 88 5 9 0 0 597 8 8949 16 40 136 0 22536 7 4 0 88 6 129 0 3 672 130 9062 13 44 71 0 24413 7 5 0 89 7 59 0 7 357 12 9951 11 39 43 0 21862 5 4 0 90 April 1, 2026 at 07:03:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 57 0 0 2137 108 15056 41 292 282 0 39084 14 9 0 77 1 60 0 0 109 34 16031 34 236 194 0 34305 11 7 0 81 2 17 0 0 80 9 17683 26 175 106 0 35703 10 7 0 83 3 6 0 0 39 6 15296 21 122 227 0 37199 10 7 0 83 4 19 0 3 273 120 12457 20 97 148 0 29405 10 6 0 84 5 2 0 0 48 11 13991 9 76 184 0 26305 9 5 0 86 6 10 0 17 251 111 11653 8 71 139 0 27849 9 5 0 86 7 22 0 7 33 8 11279 10 57 158 0 25904 8 5 0 86 April 1, 2026 at 07:03:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 56 0 2 0 0 0 0 0 0 100 1 0 0 0 128 58 154 1 0 0 0 1441 0 0 0 99 2 0 0 0 86 8 76 0 0 0 0 10 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 213 103 6 0 1 0 0 300 0 0 0 100 5 0 0 0 26 10 14 1 0 0 0 16 0 0 0 100 6 0 0 17 214 103 14 0 0 0 0 278 0 0 0 100 7 0 0 7 18 2 18 0 1 0 0 260 0 0 0 100 April 1, 2026 at 07:03:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 1 0 0 0 0 0 0 100 1 0 0 0 117 55 138 1 0 1 0 1426 0 0 0 100 2 0 0 0 20 7 14 0 0 1 0 9 0 0 0 100 3 0 0 0 12 3 4 0 0 1 0 295 0 0 0 100 4 0 0 3 213 104 6 0 1 1 0 302 0 0 0 100 5 0 0 0 13 4 6 0 0 1 0 1 0 0 0 100 6 0 0 17 210 103 4 0 0 1 0 266 0 0 0 100 7 0 0 7 10 3 4 0 0 1 0 260 0 0 0 100 April 1, 2026 at 07:03:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 588 0 63 804 1 0 0 1 0 99 1 0 0 0 261 43 486 1 62 458 0 1429 0 2 0 98 2 0 0 0 176 18 362 1 67 472 0 4 0 1 0 99 3 0 0 0 259 152 274 0 62 476 0 299 0 1 0 99 4 0 0 3 462 253 265 0 60 528 0 300 0 1 0 99 5 0 0 0 184 4 395 0 54 332 0 1 0 1 0 99 6 0 0 17 299 103 233 0 58 350 0 266 0 1 0 99 7 0 0 7 143 2 312 1 54 339 0 260 0 1 0 99 April 1, 2026 at 07:03:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 729 1 85 815 1 3 0 1 0 99 1 0 0 6 218 23 438 2 80 359 0 1136 0 1 0 99 2 0 0 0 229 29 459 1 80 391 1 0 0 1 0 99 3 0 0 0 313 184 331 0 85 448 0 304 0 1 0 99 4 0 0 3 506 278 353 1 87 601 0 847 0 1 0 99 5 0 0 0 206 2 440 1 79 289 0 0 0 0 0 100 6 0 0 12 328 104 309 2 77 375 0 16 0 1 0 99 7 0 0 7 183 4 398 0 74 292 0 259 0 1 0 99 April 1, 2026 at 07:03:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 427 0 34 427 0 5 0 1 0 99 1 0 0 14 126 9 240 0 25 271 0 572 0 0 0 100 2 0 0 0 199 50 300 0 27 246 0 1 0 0 0 100 3 0 0 0 171 76 195 0 23 316 0 297 0 0 0 100 4 0 0 3 382 183 222 1 18 328 0 1432 0 1 0 99 5 0 0 0 127 3 248 0 26 159 0 8 0 0 0 100 6 0 0 3 309 111 190 0 24 184 0 13 0 0 0 100 7 0 0 7 124 2 254 0 19 222 0 260 0 0 0 100 April 1, 2026 at 07:03:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 118 0 0 2 0 0 0 0 0 100 1 0 0 14 21 4 22 2 1 2 0 577 0 0 0 100 2 0 0 0 106 50 102 0 0 0 0 0 0 0 0 100 3 0 0 0 7 1 2 0 0 0 0 294 0 0 0 100 4 0 0 3 231 111 55 1 0 0 0 1438 0 0 0 100 5 0 0 0 20 8 14 0 0 1 0 14 0 0 0 100 6 0 0 3 219 104 14 0 0 0 0 17 0 0 0 100 7 0 0 7 11 2 6 0 0 0 0 260 0 0 0 100 April 1, 2026 at 07:03:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 14 19 6 16 0 0 1 0 570 0 0 0 100 2 0 0 0 109 51 106 0 1 0 0 2 0 0 0 100 3 0 0 0 8 1 4 0 1 0 0 294 0 0 0 100 4 0 0 3 224 108 46 1 0 0 0 1429 0 0 0 99 5 0 0 0 14 4 10 0 1 0 0 6 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 7 8 2 4 0 0 0 0 260 0 0 0 100 April 1, 2026 at 07:03:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 2 0 0 0 0 0 100 1 0 0 14 14 4 10 1 1 0 0 567 0 0 0 100 2 0 0 0 110 51 108 0 0 1 0 1 0 0 0 100 3 0 0 0 15 3 12 0 0 1 0 298 0 0 0 100 4 0 0 3 217 105 40 1 0 1 0 1428 0 0 0 100 5 0 0 0 22 8 18 0 0 0 0 10 0 0 0 100 6 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 7 0 0 7 9 2 4 1 0 0 0 260 0 0 0 100 April 1, 2026 at 07:03:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2232 109 536 240 21 15 0 972 48 1 0 51 1 1931 0 14 219 10 343 174 20 10 1 2500 48 1 0 51 2 6 0 0 170 30 170 72 22 3 2 304 48 0 0 52 3 2 0 0 148 7 173 99 18 4 0 679 48 0 0 52 4 2 0 199 323 106 165 102 22 10 0 885 48 0 0 51 5 1 0 0 196 14 298 140 16 8 0 590 48 0 0 52 6 5 0 3 379 105 277 143 21 7 0 596 48 0 0 52 7 209 0 7 121 2 124 86 10 6 0 930 48 0 0 51 April 1, 2026 at 07:03:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2345 110 464 264 29 16 0 567 99 1 0 0 1 2 0 14 325 12 430 258 17 9 0 1303 100 0 0 0 2 0 0 0 238 4 303 197 18 10 0 741 100 0 0 0 3 0 0 0 310 9 475 255 24 18 0 2331 99 1 0 0 4 0 0 325 450 112 362 228 23 9 0 1134 99 1 0 0 5 0 0 0 289 18 353 224 23 13 0 682 100 0 0 0 6 0 0 3 502 114 364 223 26 9 0 727 100 0 0 0 7 0 0 7 221 12 230 161 27 5 0 882 100 0 0 0 April 1, 2026 at 07:03:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2301 103 316 205 18 14 0 559 99 1 0 0 1 1 0 14 310 24 465 274 27 15 0 1395 100 0 0 0 2 0 0 0 287 11 441 256 28 21 0 764 100 0 0 0 3 0 0 0 255 6 415 234 22 17 0 2031 99 1 0 0 4 0 0 268 455 110 385 246 16 12 0 1400 100 0 0 0 5 0 0 1 210 17 204 146 24 10 0 679 100 0 0 0 6 1 0 4 434 109 263 172 23 11 0 617 100 0 0 0 7 0 0 7 304 21 395 244 25 23 0 977 100 0 0 0 April 1, 2026 at 07:03:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2309 103 416 241 20 20 0 793 99 1 0 0 1 0 0 0 252 8 359 213 30 14 0 1021 100 0 0 0 2 0 0 0 308 13 379 234 33 12 0 820 100 0 0 0 3 0 0 14 339 11 526 286 28 11 0 2205 99 1 0 0 4 0 0 301 423 118 302 195 14 8 0 1208 99 1 0 0 5 0 0 0 262 6 329 206 23 11 0 572 100 0 0 0 6 5 0 7 495 104 376 239 14 14 0 890 100 0 0 0 7 0 0 7 252 16 271 183 23 19 0 1027 100 0 0 0 April 1, 2026 at 07:03:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 0 2317 114 465 256 26 22 0 745 99 1 0 0 1 0 0 0 275 15 330 217 21 9 0 1052 100 0 0 0 2 0 0 0 231 4 272 189 16 10 0 630 100 0 0 0 3 0 0 14 236 4 375 220 13 19 0 2081 99 1 0 0 4 0 0 213 413 114 351 198 31 10 0 1381 100 0 0 0 5 0 0 0 249 22 335 207 29 11 0 804 100 0 0 0 6 0 0 3 517 109 508 297 32 13 0 896 100 0 0 0 7 0 0 7 194 5 200 150 23 7 0 918 100 0 0 0 April 1, 2026 at 07:03:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2296 109 451 258 27 27 0 688 99 1 0 0 1 0 0 0 302 11 453 285 28 22 0 1257 99 1 0 0 2 0 0 0 281 8 383 238 17 14 0 813 100 0 0 0 3 0 0 14 287 8 428 249 23 9 0 2230 99 1 0 0 4 0 0 255 482 115 397 248 25 15 0 1206 100 0 0 0 5 0 0 0 220 16 227 159 23 14 0 666 100 0 0 0 6 0 0 3 412 107 215 157 19 12 0 673 100 0 0 0 7 0 0 7 217 11 223 161 18 9 0 823 100 0 0 0 April 1, 2026 at 07:03:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2278 106 297 198 16 11 0 503 99 1 0 0 1 0 0 0 233 10 302 191 23 11 0 940 100 0 0 0 2 0 0 0 178 2 192 142 15 6 0 615 100 0 0 0 3 0 0 14 268 6 402 245 17 3 0 1161 100 0 0 0 4 3 0 199 368 110 229 137 24 8 0 2190 99 1 0 0 5 3 0 0 248 12 334 211 18 9 0 697 100 0 0 0 6 0 0 3 509 122 372 233 22 10 0 665 100 0 0 0 7 0 0 7 240 18 300 202 17 8 0 802 100 0 0 0 April 1, 2026 at 07:03:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 0 2114 104 183 13 8 2 0 208 6 0 0 94 1 0 0 0 35 5 30 10 3 0 0 401 13 0 0 87 2 0 0 0 17 2 11 5 1 0 0 45 11 0 0 89 3 0 0 14 27 2 25 6 4 0 0 355 10 0 0 90 4 0 0 17 227 106 52 6 2 0 0 1774 13 0 0 87 5 1 0 0 32 8 20 7 2 1 0 90 12 0 0 88 6 0 0 3 223 102 11 7 2 1 0 47 13 0 0 87 7 0 0 7 126 53 148 9 3 0 0 324 6 0 0 94 April 1, 2026 at 07:03:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 112 0 0 0 0 0 0 0 0 100 1 0 0 0 19 6 12 0 0 0 0 305 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 2 0 14 21 8 18 1 0 0 0 273 0 0 0 100 4 0 0 3 216 105 38 1 1 1 0 1726 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 3 210 102 2 0 0 0 0 0 0 0 0 100 7 0 0 7 108 52 106 0 1 0 0 260 0 0 0 100 April 1, 2026 at 07:03:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 114 0 0 0 0 0 0 0 0 100 1 0 0 0 16 4 12 0 2 0 0 300 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 0 0 0 0 100 3 0 0 14 20 7 20 0 0 0 0 275 0 0 0 100 4 0 0 2 218 106 40 1 0 1 0 1730 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 25 0 0 0 100 6 0 0 4 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 7 110 52 104 0 0 0 0 260 0 0 0 100 April 1, 2026 at 07:03:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 0 2123 100 92 0 3 6 5 94 0 0 0 100 1 40 0 0 58 6 70 0 7 3 11 454 0 0 0 100 2 1924 0 0 98 1 110 2 11 9 11 393 0 1 0 99 3 1468 0 129 44 9 74 1 7 14 12 6830 1 1 0 98 4 132 0 3 259 105 103 0 10 14 15 1963 0 0 0 99 5 18 0 0 43 1 47 0 6 3 7 94 0 0 0 100 6 11 0 6 237 103 27 0 6 6 5 45 0 0 0 100 7 26 0 7 139 52 135 1 4 1 5 310 0 0 0 100 April 1, 2026 at 07:03:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 7 2179 104 859 13 28 24 0 3121 2 1 0 97 1 0 0 0 367 40 866 8 18 33 0 2840 3 1 0 96 2 10 0 9 358 2 1315 5 16 21 0 2726 1 2 0 97 3 4 0 28 209 6 824 8 15 46 0 2740 7 1 0 92 4 0 0 310 669 111 1294 4 4 12 0 4384 6 1 0 93 5 29 0 0 255 3 426 9 10 51 4 3018 14 1 0 85 6 39 0 11 564 104 940 8 11 53 3 3995 11 1 0 88 7 3 0 0 310 18 858 9 15 31 0 2924 9 1 0 90 April 1, 2026 at 07:03:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 103 131 1 0 0 0 277 0 0 0 100 1 0 0 0 122 54 116 0 0 0 0 312 0 0 0 100 2 0 0 0 15 1 14 0 0 0 0 0 0 0 0 100 3 0 0 14 9 1 8 0 2 0 0 266 0 0 0 100 4 0 0 3 218 105 40 1 0 0 0 1714 0 0 0 99 5 0 0 0 28 10 18 0 1 0 0 18 0 0 0 100 6 0 0 3 218 102 14 0 1 0 0 29 0 0 0 100 7 0 0 7 24 7 20 0 1 0 0 7 0 0 0 100 April 1, 2026 at 07:03:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2103 102 125 0 2 0 0 259 0 1 0 99 1 0 0 0 133 55 108 0 0 1 0 300 0 0 0 100 2 0 0 0 35 2 14 0 1 1 0 0 0 0 0 100 3 0 0 14 30 3 6 1 0 1 0 267 0 0 0 100 4 0 0 3 234 106 40 1 0 1 0 1720 0 0 0 100 5 0 0 0 27 3 4 0 0 1 0 2 0 0 0 100 6 0 0 3 225 102 2 0 0 1 0 0 0 0 0 100 7 0 0 0 39 7 16 0 1 1 0 9 0 0 0 100 April 1, 2026 at 07:03:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2110 102 654 0 76 941 0 260 0 1 0 99 1 0 0 0 243 18 425 0 53 666 0 300 0 2 0 98 2 0 0 0 209 38 423 0 60 494 0 430 0 2 0 98 3 0 0 14 247 153 248 0 61 697 1 267 0 2 0 98 4 0 0 3 458 254 248 1 65 658 1 1286 0 1 0 99 5 0 0 0 134 3 298 0 63 459 0 4 0 2 0 98 6 0 0 3 301 102 235 0 55 480 0 0 0 1 0 99 7 0 0 0 103 6 244 0 63 587 0 9 0 2 0 98 April 1, 2026 at 07:03:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2116 103 893 3 114 1342 0 802 0 2 0 98 1 0 0 0 329 5 642 5 102 846 1 372 0 1 0 99 2 0 0 0 284 35 592 5 97 799 0 1134 0 1 0 99 3 0 0 14 362 185 416 3 113 750 0 603 0 1 0 99 4 0 0 4 579 301 428 3 87 931 0 1057 0 1 0 99 5 0 0 0 242 21 527 2 89 759 0 513 0 1 0 99 6 0 0 2 366 104 411 3 87 785 0 45 0 1 0 99 7 0 0 0 203 5 424 0 90 697 0 57 0 1 0 99 April 1, 2026 at 07:03:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2115 103 558 2 54 801 1 1382 0 1 0 99 1 0 0 0 196 4 407 0 51 458 0 300 0 1 0 99 2 0 0 0 157 0 321 0 39 405 1 0 0 0 0 100 3 0 0 14 260 121 289 0 36 457 0 266 0 1 0 99 4 0 0 3 449 220 280 0 37 519 1 594 0 1 0 99 5 0 0 0 171 8 348 1 38 322 0 2 0 0 0 100 6 0 0 3 425 139 372 0 49 491 0 7 0 1 0 99 7 0 0 0 143 1 298 1 44 464 0 1 0 0 0 100 April 1, 2026 at 07:03:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 148 1 0 0 0 1382 0 1 0 99 1 0 0 0 20 4 18 0 1 0 0 312 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 4 0 0 3 216 105 10 0 0 0 0 596 0 0 0 100 5 0 0 0 26 10 18 0 0 0 0 23 0 0 0 100 6 1 0 3 327 158 126 0 0 0 0 22 0 0 0 100 7 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 146 2 0 0 0 1382 0 1 0 99 1 0 0 0 15 4 10 0 0 0 0 300 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 4 0 0 3 215 104 8 0 0 0 0 595 0 0 0 100 5 0 0 0 8 1 4 0 1 0 0 1 0 0 0 100 6 0 0 3 322 158 116 0 1 0 0 9 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 160 1 1 0 0 1391 0 1 0 99 1 0 0 0 18 4 12 1 0 0 0 304 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 11 3 10 0 0 0 0 266 0 0 0 100 4 0 0 3 219 105 16 0 1 0 0 620 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 6 0 0 3 323 156 120 0 0 0 0 17 0 0 0 100 7 0 0 0 16 3 16 0 1 0 0 14 0 0 0 100 April 1, 2026 at 07:03:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 148 0 1 0 0 1383 0 1 0 99 1 0 0 0 25 8 20 0 0 0 0 309 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 9 2 6 1 0 0 0 266 0 0 0 100 4 0 0 3 214 104 10 0 1 1 0 597 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 5 0 0 0 100 6 0 0 3 312 153 108 0 0 0 0 7 0 0 0 100 7 0 0 0 14 4 8 0 0 0 0 9 0 0 0 100 April 1, 2026 at 07:03:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2113 104 166 1 1 0 0 1379 0 1 0 99 1 2 0 0 33 13 28 0 0 0 0 336 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 19 0 14 11 3 8 0 0 0 0 271 0 0 0 100 4 0 0 3 215 105 8 0 0 0 0 595 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 5 0 0 0 100 6 0 0 3 313 154 106 0 0 0 0 2 0 0 0 100 7 0 0 0 9 1 4 0 1 0 0 1 0 0 0 100 April 1, 2026 at 07:03:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 103 152 2 0 0 0 1376 0 1 0 99 1 0 0 0 32 10 32 0 1 0 0 321 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 4 0 0 3 214 104 8 0 0 0 0 595 0 0 0 100 5 0 0 0 18 7 12 0 0 0 0 14 0 0 0 100 6 0 0 3 319 154 114 0 0 0 0 17 0 0 0 100 7 0 0 0 8 0 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2110 103 152 0 0 0 0 1377 0 1 0 99 1 0 0 0 28 10 18 1 0 1 0 308 0 0 0 100 2 0 0 0 10 1 0 0 0 1 0 0 0 0 0 100 3 0 0 14 14 4 10 0 0 1 0 268 0 0 0 100 4 0 0 7 216 105 8 0 0 1 0 596 0 0 0 100 5 0 0 0 16 5 8 0 0 1 0 5 0 0 0 100 6 0 0 7 310 152 102 0 0 1 0 0 0 0 0 100 7 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:03:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 110 1 1 1 0 1377 0 1 0 99 1 0 0 0 30 10 22 0 0 0 0 310 0 0 0 100 2 0 0 0 6 0 4 0 2 0 0 0 0 0 0 100 3 0 0 14 13 3 10 1 0 1 0 266 0 0 0 100 4 0 0 3 216 104 12 0 0 0 0 593 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 2 0 0 0 100 6 0 0 3 313 136 106 0 2 0 0 0 0 0 0 100 7 0 0 0 38 16 34 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:03:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 103 48 1 0 0 0 1376 0 1 0 99 1 0 0 0 35 13 26 1 0 0 0 317 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 14 9 2 8 0 1 0 0 266 0 0 0 100 4 0 0 3 216 105 10 0 0 0 0 599 0 0 0 100 5 0 0 0 12 3 8 0 0 0 0 9 0 0 0 100 6 0 0 3 310 102 106 0 1 0 0 2 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2111 103 102 0 1 0 0 1378 0 1 0 99 1 0 0 0 27 10 22 0 0 0 0 309 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 4 0 0 3 213 104 6 0 0 0 0 594 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 3 253 102 44 0 0 0 0 0 0 0 0 100 7 0 0 0 108 51 103 0 1 0 0 1 0 0 0 100 April 1, 2026 at 07:03:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2109 103 154 1 0 2 0 1377 0 1 0 99 1 0 0 0 32 10 28 1 0 0 0 321 0 0 0 100 2 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 3 1 0 14 13 2 12 1 0 2 0 290 0 0 0 100 4 0 0 3 217 105 10 0 0 0 0 597 0 0 0 100 5 0 0 0 25 10 16 0 0 1 0 19 0 0 0 100 6 0 0 3 215 102 14 0 0 0 0 13 0 0 0 100 7 0 0 0 108 50 104 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2107 103 148 1 0 0 0 1376 0 1 0 99 1 0 0 0 27 10 20 0 0 0 0 309 0 0 0 100 2 0 0 0 6 0 2 0 0 0 0 0 0 0 0 100 3 0 0 14 10 2 8 0 0 0 0 266 0 0 0 100 4 0 0 3 215 104 10 0 1 0 0 593 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 6 0 0 3 209 102 2 0 0 0 0 0 0 0 0 100 7 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:03:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 156 0 7 2185 106 12992 91 402 161 0 34537 14 8 0 78 1 29 0 0 204 16 14845 62 285 181 0 34843 11 7 0 81 2 11 0 0 327 2 15781 44 226 91 0 28658 9 7 0 84 3 6 0 14 444 15 12943 50 152 132 0 27115 8 6 0 86 4 130 0 3 693 113 11337 36 136 136 0 30404 10 6 0 85 5 275 0 0 606 9 10614 23 84 140 0 27188 9 6 0 85 6 231 0 3 863 111 10279 24 75 100 0 25455 7 5 0 88 7 74 0 0 481 26 9630 24 82 91 0 21777 7 4 0 89 April 1, 2026 at 07:04:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 31 0 0 2136 107 10944 32 212 115 0 29650 10 7 0 83 1 11 0 7 67 9 17562 31 175 179 0 35784 11 7 0 82 2 33 0 0 85 8 15277 17 136 118 0 30556 9 7 0 84 3 15 0 14 38 9 13574 16 98 99 0 26016 8 6 0 87 4 4 0 3 249 118 10477 10 76 84 0 22640 7 4 0 89 5 30 0 0 104 37 10298 12 66 221 0 28174 9 6 0 85 6 14 0 3 244 108 10118 12 50 134 0 26215 9 5 0 86 7 8 0 0 40 5 11410 10 47 245 0 26372 9 5 0 85 April 1, 2026 at 07:04:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 8 0 2 0 0 1 0 0 0 100 1 0 0 7 21 5 14 2 2 1 0 560 0 0 0 100 2 0 0 0 85 1 106 1 2 0 0 1126 0 0 0 100 3 0 0 14 42 19 40 0 1 0 0 266 0 0 0 100 4 0 0 3 212 104 6 0 0 0 0 296 0 0 0 100 5 0 0 0 122 41 116 0 2 0 0 12 0 0 0 100 6 0 0 3 216 104 9 0 2 0 0 301 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:04:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 8 0 0 1 0 0 0 0 0 100 1 0 0 7 24 5 20 0 0 0 0 571 0 0 0 100 2 0 0 0 10 1 34 1 0 0 0 1126 0 0 0 100 3 0 0 14 109 25 106 1 3 0 0 267 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 294 0 0 0 100 5 1 0 0 133 41 128 0 1 1 0 25 0 0 0 100 6 0 0 3 221 105 19 0 2 0 0 317 0 0 0 100 7 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:04:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 10 0 2 0 0 0 0 0 0 100 1 0 0 7 21 6 12 0 0 1 0 560 0 0 0 100 2 0 0 0 11 2 34 0 0 1 0 1126 0 0 0 100 3 0 0 14 114 4 112 0 1 1 0 267 0 0 0 100 4 0 0 3 212 104 6 0 0 1 0 296 0 0 0 100 5 0 0 0 133 64 126 0 0 1 0 19 0 0 0 100 6 0 0 3 216 103 7 0 1 1 0 300 0 0 0 100 7 0 0 0 11 2 4 0 1 1 0 0 0 0 0 100 April 1, 2026 at 07:04:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2112 100 435 0 66 795 0 3 0 2 0 98 1 0 0 7 227 5 479 0 59 363 0 560 0 1 0 99 2 0 0 0 140 1 359 1 53 523 0 1126 0 2 0 98 3 0 0 14 349 152 375 0 59 498 0 266 0 1 0 99 4 0 0 3 503 256 348 0 72 539 1 294 0 1 0 99 5 0 0 0 253 58 450 0 66 462 0 14 0 1 0 99 6 0 0 3 299 103 222 0 48 317 0 300 0 1 0 99 7 0 0 0 102 1 252 0 57 388 0 0 0 1 0 99 April 1, 2026 at 07:04:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 497 0 77 735 3 0 0 1 0 99 1 0 0 7 265 5 571 2 64 521 1 564 0 1 0 99 2 0 0 0 160 1 403 2 59 422 1 1129 0 1 0 99 3 0 0 14 293 176 390 0 68 439 0 266 0 1 0 99 4 0 0 4 544 277 381 0 63 482 0 298 0 1 0 99 5 0 0 0 277 59 501 0 68 470 1 20 0 1 0 99 6 0 0 2 322 103 296 0 63 347 0 306 0 1 0 99 7 0 0 0 108 1 259 0 72 238 1 0 0 0 0 100 April 1, 2026 at 07:04:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 100 320 0 21 361 0 0 0 1 0 99 1 0 0 7 159 5 301 0 20 240 1 559 0 0 0 100 2 0 0 0 104 1 240 1 21 234 0 1126 0 1 0 99 3 0 0 14 143 69 217 0 18 311 0 266 0 0 0 100 4 0 0 3 356 180 210 0 18 342 0 294 0 1 0 99 5 0 0 0 207 57 294 0 14 221 0 10 0 0 0 100 6 0 0 3 289 103 180 0 20 199 0 300 0 0 0 100 7 0 0 0 81 2 161 0 14 190 0 1 0 0 0 100 April 1, 2026 at 07:04:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 0 0 7 30 5 28 0 0 0 0 572 0 0 0 100 2 0 0 0 8 1 32 1 0 1 0 1125 0 0 0 100 3 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 4 0 0 3 213 104 8 0 0 0 0 296 0 0 0 100 5 0 0 0 141 68 132 1 1 1 0 32 0 0 0 100 6 0 0 3 218 103 18 0 1 0 0 313 0 0 0 100 7 0 0 0 11 1 8 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:04:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 0 0 0 0 0 0 100 1 0 0 7 26 5 22 0 0 0 0 561 0 0 0 100 2 0 0 0 7 1 32 0 0 0 0 1127 0 0 0 100 3 0 0 14 8 2 4 1 0 0 0 266 0 0 0 100 4 0 0 3 210 103 4 0 0 0 0 294 0 0 0 100 5 0 0 0 119 57 114 0 0 0 0 10 0 0 0 100 6 0 0 3 211 103 4 0 0 0 0 300 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1580 0 0 2225 108 296 137 17 8 1 766 56 1 0 43 1 31 0 7 142 6 160 92 22 6 0 1101 56 0 0 43 2 3 0 0 160 5 338 170 24 9 0 1118 56 1 0 43 3 257 0 14 137 5 202 103 21 15 0 2051 56 1 0 43 4 4 0 157 391 111 303 158 24 8 0 723 56 1 0 43 5 0 0 0 268 30 409 179 24 20 0 774 56 0 0 43 6 0 0 3 325 113 90 61 20 3 0 734 56 0 0 43 7 20 0 7 177 8 220 127 17 5 0 568 56 0 0 44 April 1, 2026 at 07:04:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2287 116 307 200 29 7 0 657 99 1 0 0 1 0 0 7 216 14 254 162 24 8 0 1223 100 0 0 0 2 0 0 0 260 5 374 226 25 6 0 818 100 0 0 0 3 1 0 14 279 4 466 267 25 14 0 2263 99 1 0 0 4 0 0 213 402 108 334 213 17 12 0 1149 99 1 0 0 5 0 0 0 262 11 355 223 22 19 0 695 100 0 0 0 6 0 0 3 419 111 248 174 25 5 0 1166 100 0 0 0 7 0 0 0 257 7 342 217 24 11 0 751 100 0 0 0 April 1, 2026 at 07:04:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2345 112 418 247 28 16 0 774 99 1 0 0 1 0 0 7 203 14 192 141 22 6 0 1266 100 0 0 0 2 0 0 0 268 18 358 215 29 11 0 696 100 0 0 0 3 0 0 14 254 15 340 195 31 9 0 2431 99 1 0 0 4 0 0 269 384 115 223 161 18 7 0 960 100 0 0 0 5 0 0 0 268 7 348 219 23 11 0 762 100 0 0 0 6 0 0 3 434 112 225 164 18 5 0 657 100 0 0 0 7 0 0 0 300 7 417 249 27 17 0 1103 100 0 0 0 April 1, 2026 at 07:04:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2241 101 220 158 18 3 0 702 99 1 0 0 1 0 0 7 267 8 442 255 16 12 0 1558 99 1 0 0 2 0 0 0 211 6 332 202 20 12 0 835 100 0 0 0 3 5 0 14 232 12 287 175 32 6 0 2113 99 1 0 0 4 1 0 185 391 111 232 161 32 5 0 843 100 0 0 0 5 0 0 0 250 19 339 212 27 10 0 642 100 0 0 0 6 0 0 3 440 117 279 179 23 7 0 675 100 0 0 0 7 0 0 0 286 9 385 238 23 8 0 1060 100 0 0 0 April 1, 2026 at 07:04:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2305 111 351 216 29 10 0 731 99 1 0 0 1 0 0 7 296 17 427 258 26 9 0 1439 100 0 0 0 2 0 0 0 242 6 318 204 20 12 0 886 100 0 0 0 3 0 0 14 264 4 387 233 17 13 0 2043 99 1 0 0 4 0 0 259 379 113 199 151 19 5 0 989 100 0 0 0 5 0 0 0 218 11 210 152 19 3 0 644 100 0 0 0 6 0 0 7 421 108 258 166 28 1 0 735 100 0 0 0 7 0 0 0 279 12 407 242 28 9 0 1158 100 0 0 0 April 1, 2026 at 07:04:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2324 112 387 241 18 3 0 785 99 1 0 0 1 0 0 7 211 14 249 163 23 6 0 1258 100 0 0 0 2 0 0 0 187 5 181 132 29 2 0 839 100 0 0 0 3 0 0 14 216 8 273 165 22 5 0 1910 99 1 0 0 4 0 0 269 455 109 449 252 28 10 0 1125 99 1 0 0 5 0 0 0 257 12 331 205 33 16 0 1000 99 1 0 0 6 0 0 3 451 110 328 202 34 11 0 795 100 0 0 0 7 0 0 0 284 7 393 240 29 12 0 917 100 0 0 0 April 1, 2026 at 07:04:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 0 2285 107 362 219 17 18 0 567 99 1 0 0 1 0 0 7 235 11 295 191 27 11 0 962 100 0 0 0 2 3 0 0 140 2 108 99 25 3 0 1128 100 0 0 0 3 0 0 14 163 17 159 112 18 1 0 1781 100 0 0 0 4 0 0 185 506 119 452 262 28 14 0 968 99 1 0 0 5 2 0 0 214 17 260 175 20 13 0 634 100 0 0 0 6 0 0 3 382 108 189 141 17 9 0 469 100 0 0 0 7 0 0 7 234 6 321 210 19 5 0 651 100 0 0 0 April 1, 2026 at 07:04:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2116 105 113 0 5 0 0 158 2 0 0 98 1 0 0 7 27 5 29 1 3 1 0 327 1 0 0 99 2 0 0 0 31 4 47 1 5 0 0 928 1 0 0 98 3 0 0 14 13 2 45 1 2 0 0 1434 3 0 0 97 4 0 0 17 306 147 99 4 1 0 0 49 6 0 0 94 5 0 0 0 24 5 21 1 6 0 0 67 1 0 0 99 6 7 0 3 215 102 9 1 3 2 0 44 0 0 0 100 7 0 0 0 20 3 41 0 3 0 0 92 0 0 0 100 April 1, 2026 at 07:04:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 102 0 0 0 0 0 0 0 0 100 1 1 0 7 18 4 18 0 0 0 0 272 0 0 0 100 2 0 0 0 20 3 14 1 1 0 0 893 0 0 0 100 3 2 0 14 13 3 39 1 2 0 0 1398 0 0 0 100 4 0 0 3 316 155 110 0 0 0 0 7 0 0 0 100 5 0 0 0 13 7 2 0 0 0 0 0 0 0 0 100 6 0 0 3 212 101 10 0 0 0 0 21 0 0 0 100 7 0 0 0 31 9 32 0 0 0 0 19 0 0 0 100 April 1, 2026 at 07:04:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 100 0 0 0 0 0 0 0 0 100 1 0 0 7 15 4 10 0 0 0 0 260 0 0 0 100 2 0 0 0 19 3 15 0 1 0 0 895 0 0 0 100 3 0 0 14 16 3 40 1 2 0 0 1398 0 0 0 100 4 0 0 3 309 152 104 0 1 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 3 207 101 0 0 0 0 0 0 0 0 0 100 7 0 0 0 19 7 14 0 0 0 0 9 0 0 0 100 April 1, 2026 at 07:04:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 0 2126 101 149 0 9 9 7 134 0 0 0 100 1 11 0 7 41 4 34 0 5 3 2 330 0 0 0 100 2 5 0 0 47 3 39 0 5 0 4 947 0 0 0 100 3 58 0 14 54 3 101 2 8 8 12 1584 0 0 0 100 4 2 0 1 346 157 139 0 3 3 1 38 0 0 0 100 5 3377 0 114 33 1 71 3 3 10 19 6844 2 1 0 97 6 79 0 7 244 101 58 0 9 11 14 161 0 0 0 100 7 66 0 0 70 11 82 0 9 12 7 168 0 0 0 100 April 1, 2026 at 07:04:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 93 0 36 2128 103 239 8 39 36 12 211 0 1 0 99 1 7 0 7 61 5 74 5 21 1434 2 314 0 1 0 99 2 18 0 16 88 20 108 2 9 964 3 983 0 1 0 99 3 1 0 20 48 2 69 2 7 1949 1 1138 0 1 0 99 4 13 0 17 255 109 52 0 10 1643 1 69 0 1 0 99 5 1907 0 33 177 55 223 12 32 105 9 548 1 1 0 98 6 48 0 18 279 103 137 3 34 96 8 258 0 0 0 100 7 59 0 19 90 7 174 2 33 51 14 361 0 2 0 98 April 1, 2026 at 07:04:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 56 2110 101 119 0 3 7 2 14 0 1 0 99 1 31 0 14 34 4 38 0 7 9 9 272 0 0 0 100 2 7 0 0 78 23 74 1 0 2 5 935 0 0 0 100 3 2 0 14 20 2 42 0 2 2 1 1025 0 0 0 100 4 0 0 3 243 104 22 0 2 1 1 41 0 0 0 100 5 6 0 16 35 7 30 2 4 1 1 31 0 0 0 100 6 6 0 3 317 147 108 0 4 0 3 14 0 0 0 100 7 8 0 0 26 3 14 0 0 2 1 10 0 0 0 100 April 1, 2026 at 07:04:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2172 100 122 1 1 2 0 20 0 1 0 99 1 0 0 462 29 4 22 0 2 2 0 267 0 0 0 100 2 0 0 0 129 23 50 0 0 0 0 914 0 0 0 100 3 0 0 21 81 2 36 1 1 1 0 1013 0 0 0 99 4 0 0 3 290 102 12 0 0 0 0 0 0 0 0 100 5 0 0 1 94 11 6 0 0 0 0 0 0 0 0 100 6 0 0 3 380 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 90 3 16 0 0 0 0 16 0 0 0 100 April 1, 2026 at 07:04:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 1 0 0 0 0 0 0 100 1 0 0 7 17 5 10 0 0 1 0 259 0 0 0 100 2 0 0 0 57 24 50 0 0 1 0 914 0 0 0 100 3 0 0 14 15 4 38 2 0 1 0 1015 0 0 0 100 4 0 0 3 219 103 14 0 1 1 0 2 0 0 0 100 5 0 0 0 11 3 4 0 0 1 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 1 0 0 0 0 0 100 7 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:04:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 102 0 0 0 0 1 0 0 0 100 1 0 0 7 15 4 8 1 0 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 10 3 40 0 1 0 0 1014 0 0 0 100 4 0 0 3 218 102 14 0 0 0 0 0 0 0 0 100 5 0 0 0 14 3 8 1 0 0 0 24 0 0 0 100 6 0 0 3 309 151 104 0 1 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2100 100 106 0 0 0 0 3 0 0 0 100 1 0 0 7 15 4 12 0 0 0 0 262 0 0 0 100 2 0 0 0 56 23 50 1 0 0 0 915 0 0 0 100 3 0 0 14 9 2 34 2 0 1 0 1015 0 0 0 100 4 0 0 2 220 103 14 0 0 0 0 2 0 0 0 100 5 0 0 0 14 5 4 0 0 0 0 0 0 0 0 100 6 0 0 4 309 151 102 0 1 0 0 0 0 0 0 100 7 0 0 0 12 1 10 0 1 0 0 5 0 0 0 100 April 1, 2026 at 07:04:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 0 0 0 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 7 2 34 0 0 0 0 1014 0 0 0 100 4 0 0 3 216 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 12 4 6 0 0 0 0 1 0 0 0 100 6 0 0 3 307 151 102 0 1 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 118 1 0 0 0 14 0 0 0 100 1 0 0 7 18 4 16 0 0 0 0 270 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 9 2 34 2 0 0 0 1014 0 0 0 100 4 0 0 3 221 103 17 0 0 0 0 2 0 0 0 100 5 0 0 0 15 8 4 0 0 0 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 24 3 28 0 0 0 0 16 0 0 0 100 April 1, 2026 at 07:04:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 101 270 0 0 0 0 337 0 0 0 100 1 0 0 7 18 5 10 1 0 0 0 260 0 0 0 100 2 0 0 0 57 24 54 0 1 0 0 929 0 0 0 100 3 0 0 14 13 3 40 1 1 0 0 1022 0 0 0 100 4 0 0 3 217 102 14 0 1 0 0 2 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 10 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 100 0 0 0 0 0 0 0 0 100 1 0 0 7 14 4 10 0 0 0 0 259 0 0 0 100 2 0 0 0 57 23 52 1 0 0 0 915 0 0 0 100 3 0 0 14 14 5 42 0 0 0 0 1018 0 0 0 100 4 0 0 3 220 103 16 0 0 0 0 2 0 0 0 100 5 0 0 0 10 2 6 0 0 0 0 1 0 0 0 100 6 1 0 3 309 152 102 0 0 0 0 2 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 101 104 0 1 0 0 1 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 10 2 36 1 1 1 0 1014 0 0 0 100 4 0 0 3 217 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 13 2 14 0 1 0 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 104 0 0 0 0 1 0 0 0 100 1 0 0 7 16 5 10 0 0 0 0 280 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 11 3 36 2 0 0 0 1017 0 0 0 100 4 0 0 3 218 103 12 0 0 0 0 2 0 0 0 100 5 0 0 0 12 2 8 0 0 0 0 1 0 0 0 100 6 0 0 3 311 152 108 0 1 0 0 1 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 127 2 1 0 0 22 0 0 0 100 1 0 0 7 21 4 23 1 2 1 0 285 0 0 0 100 2 0 0 0 56 23 50 0 0 0 0 913 0 0 0 100 3 0 0 14 7 2 34 0 0 0 0 1014 0 0 0 100 4 0 0 3 216 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 22 12 12 0 1 1 0 9 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 8 0 0 0 0 1 0 0 0 100 April 1, 2026 at 07:04:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 1 0 0 0 0 0 0 100 1 0 0 7 17 5 10 0 0 1 0 259 0 0 0 100 2 0 0 0 58 24 50 1 0 1 0 915 0 0 0 100 3 0 0 14 12 4 36 1 0 1 0 1014 0 0 0 100 4 0 0 3 218 103 12 0 0 1 0 2 0 0 0 100 5 0 0 0 11 3 4 0 0 1 0 0 0 0 0 100 6 0 0 3 312 151 106 0 0 1 0 0 0 0 0 100 7 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:04:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 1 0 0 0 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 913 0 0 0 100 3 0 0 14 11 3 38 1 0 0 0 1014 0 0 0 100 4 0 0 3 218 102 14 0 0 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 3 309 151 102 0 0 1 0 0 0 0 0 100 7 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:04:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 915 0 0 0 100 3 0 0 14 8 2 34 1 0 0 0 1014 0 0 0 100 4 0 0 3 218 103 12 0 0 0 0 2 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 0 0 1 0 0 0 100 1 0 0 7 16 4 10 1 1 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 8 2 34 1 0 1 0 1015 0 0 0 100 4 0 0 3 216 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 6 0 0 3 307 151 102 0 1 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 0 2108 102 120 1 0 0 0 22 0 0 0 100 1 0 0 7 19 4 16 0 0 0 0 270 0 0 0 100 2 0 0 0 57 23 52 1 1 0 0 914 0 0 0 100 3 0 0 14 8 2 34 1 0 0 0 1014 0 0 0 100 4 0 0 3 219 103 16 0 1 0 0 2 0 0 0 100 5 0 0 0 21 10 12 0 0 1 0 11 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 7 2 34 0 0 0 0 1013 0 0 0 100 4 0 0 3 216 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 104 0 0 0 0 0 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 57 23 52 0 0 0 0 914 0 0 0 100 3 0 0 14 11 3 36 2 1 1 0 1014 0 0 0 100 4 0 0 3 220 103 16 0 1 0 0 2 0 0 0 100 5 0 0 0 10 2 6 0 1 0 0 0 0 0 0 100 6 0 0 3 309 151 104 0 1 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 108 0 0 1 0 2 0 0 0 100 1 0 0 7 15 4 8 1 0 0 0 259 0 0 0 100 2 0 0 0 55 23 52 0 1 0 0 914 0 0 0 100 3 0 0 14 8 2 34 1 0 0 0 1014 0 0 0 100 4 0 0 3 216 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 13 2 10 0 0 1 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 102 0 0 0 0 1 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 56 23 50 1 0 0 0 914 0 0 0 100 3 0 0 14 7 2 34 0 0 0 0 1014 0 0 0 100 4 0 0 3 218 103 14 0 0 0 0 2 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 3 309 152 102 0 0 0 0 1 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 103 126 1 0 0 0 33 0 0 0 100 1 0 0 7 17 4 16 0 1 0 0 270 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 8 2 34 1 0 1 0 1015 0 0 0 100 4 0 0 3 217 102 12 0 0 0 0 0 0 0 0 100 5 0 0 0 22 9 14 0 0 0 0 11 0 0 0 100 6 0 0 3 311 151 108 0 1 0 0 18 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 100 106 0 0 0 0 0 0 0 0 100 1 0 0 7 18 5 10 0 0 1 0 259 0 0 0 100 2 0 0 0 58 24 50 0 0 1 0 914 0 0 0 100 3 0 0 14 14 4 36 2 0 1 0 1015 0 0 0 100 4 0 0 7 219 103 12 0 0 1 0 2 0 0 0 100 5 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 6 0 0 7 312 151 104 0 0 2 0 0 0 0 0 100 7 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:04:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 102 0 0 0 0 1 0 0 0 100 1 0 0 7 15 4 8 1 0 0 0 259 0 0 0 100 2 0 0 0 56 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 8 2 36 1 1 0 0 1013 0 0 0 100 4 0 0 3 219 103 14 0 0 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 3 309 151 104 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 56 23 52 1 1 0 0 914 0 0 0 100 3 0 0 14 8 2 34 1 0 0 0 1014 0 0 0 100 4 0 0 2 218 103 12 0 0 0 0 2 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 4 309 151 102 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 1 1 0 0 0 0 0 100 April 1, 2026 at 07:04:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 104 0 0 1 0 0 0 0 0 100 1 0 0 7 15 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 7 2 34 0 0 0 0 1015 0 0 0 100 4 0 0 3 216 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 6 0 0 3 307 151 102 0 1 0 0 0 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 122 2 0 0 0 21 0 0 0 100 1 0 0 7 17 4 14 0 0 0 0 270 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 9 2 34 2 0 0 0 1014 0 0 0 100 4 0 0 3 219 103 14 0 0 0 0 2 0 0 0 100 5 0 0 0 22 11 12 0 0 2 0 11 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 6 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:04:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 104 0 0 1 0 1 0 0 0 100 1 0 0 7 15 4 8 1 0 0 0 259 0 0 0 100 2 0 0 0 55 23 52 0 1 0 0 914 0 0 0 100 3 0 0 14 9 2 34 1 0 0 0 1013 0 0 0 100 4 0 0 3 216 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 14 1 10 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:04:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 102 0 0 0 0 0 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 57 23 52 1 0 0 0 914 0 0 0 100 3 0 0 14 7 2 34 0 0 0 0 1015 0 0 0 100 4 0 0 3 221 104 16 0 0 0 0 2 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 3 309 151 104 0 0 0 0 0 0 0 0 100 7 0 0 0 12 1 8 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 102 0 0 0 0 1 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 915 0 0 0 100 3 0 0 14 8 2 36 1 1 0 0 1013 0 0 0 100 4 0 0 3 216 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 122 0 1 0 0 1 0 0 0 100 1 0 0 7 16 5 10 0 0 0 0 280 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 9 2 34 2 0 1 0 1015 0 0 0 100 4 0 0 3 218 103 12 0 0 0 0 2 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 3 309 152 104 0 1 0 0 1 0 0 0 100 7 0 0 0 9 1 4 0 0 2 0 0 0 0 0 100 April 1, 2026 at 07:04:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 120 1 0 0 0 20 0 0 0 100 1 0 0 7 18 4 18 1 2 0 0 270 0 0 0 100 2 0 0 0 56 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 7 2 34 0 0 0 0 1014 0 0 0 100 4 0 0 3 217 102 12 0 0 0 0 0 0 0 0 100 5 0 0 0 21 10 12 0 0 1 0 9 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 4 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:04:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 106 0 1 0 0 0 0 0 0 100 1 0 0 7 17 5 10 0 0 1 0 259 0 0 0 100 2 0 0 0 59 24 50 1 0 1 0 914 0 0 0 100 3 0 0 14 12 4 36 1 0 2 0 1014 0 0 0 100 4 0 0 3 218 103 12 0 0 1 0 2 0 0 0 100 5 0 0 0 11 3 4 0 0 1 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 1 0 0 0 0 0 100 7 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:04:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 100 0 0 0 0 0 0 0 0 100 1 0 0 7 17 4 12 0 1 0 0 259 0 0 0 100 2 0 0 0 57 23 54 0 1 0 0 914 0 0 0 100 3 0 0 14 9 2 34 1 0 0 0 1014 0 0 0 100 4 0 0 3 218 103 12 0 1 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 3 309 151 104 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:04:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 0 0 0 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 57 23 52 0 0 0 0 913 0 0 0 100 3 0 0 14 9 2 38 1 2 0 0 1014 0 0 0 100 4 0 0 3 218 103 12 0 0 0 0 2 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 102 0 0 0 0 1 0 0 0 100 1 0 0 7 15 4 10 1 0 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 8 2 34 1 0 1 0 1015 0 0 0 100 4 0 0 3 216 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 1 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 102 122 1 0 0 0 21 0 0 0 100 1 0 0 7 18 4 16 0 0 0 0 276 0 0 0 100 2 0 0 0 56 23 50 1 0 0 0 914 0 0 0 100 3 1 0 14 10 2 36 1 0 1 0 1039 0 0 0 100 4 0 0 3 220 103 14 0 1 0 0 2 0 0 0 100 5 0 0 0 23 9 14 0 0 0 0 11 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 100 0 0 0 0 0 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 8 2 34 1 0 0 0 1014 0 0 0 100 4 0 0 3 218 102 12 0 0 0 0 0 0 0 0 100 5 0 0 0 12 3 8 0 1 0 0 1 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 8 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:04:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 102 0 0 0 0 0 0 0 0 100 1 0 0 7 17 5 12 0 0 0 0 259 0 0 0 100 2 0 0 0 55 23 50 0 0 0 0 914 0 0 0 100 3 0 0 14 9 2 34 1 0 1 0 1013 0 0 0 100 4 0 0 3 218 103 12 0 0 0 0 2 0 0 0 100 5 0 0 0 9 2 6 0 1 0 0 0 0 0 0 100 6 0 0 3 309 151 104 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 104 108 0 0 0 0 3 0 0 0 100 1 0 0 7 15 4 10 1 0 0 0 259 0 0 0 100 2 0 0 0 55 23 48 0 0 0 0 914 0 0 0 100 3 0 0 14 8 2 34 1 0 0 0 1015 0 0 0 100 4 0 0 3 216 102 11 0 1 0 0 0 0 0 0 100 5 0 0 0 13 2 8 0 0 0 0 0 0 0 0 100 6 0 0 3 307 151 100 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 108 0 0 0 0 2 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 54 23 48 1 1 0 0 914 0 0 0 100 3 0 0 14 7 2 34 0 0 0 0 1013 0 0 0 100 4 0 0 3 217 103 10 0 0 0 0 2 0 0 0 100 5 0 0 0 13 2 6 0 1 0 0 0 0 0 0 100 6 0 0 3 311 152 106 0 2 0 0 1 0 0 0 100 7 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:05:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 128 1 0 0 0 23 0 0 0 100 1 0 0 7 17 4 16 0 1 0 0 270 0 0 0 100 2 0 0 0 53 23 48 0 0 0 0 915 0 0 0 100 3 0 0 14 9 2 34 2 0 1 0 1014 0 0 0 100 4 0 0 3 211 102 6 0 1 0 0 0 0 0 0 100 5 1 0 0 18 7 10 0 0 0 0 11 0 0 0 100 6 0 0 3 309 152 102 0 0 0 0 0 0 0 0 100 7 0 0 0 13 1 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2105 100 114 0 1 2 0 0 0 0 0 100 1 0 0 7 18 5 10 0 0 1 0 259 0 0 0 100 2 0 0 0 56 24 48 0 0 1 0 912 0 0 0 100 3 0 0 14 13 4 36 1 0 1 0 1016 0 0 0 100 4 0 0 7 213 103 6 0 0 1 0 2 0 0 0 100 5 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 6 0 0 7 310 152 102 0 0 1 0 0 0 0 0 100 7 0 0 0 14 2 10 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:05:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 124 0 1 2 0 0 0 0 0 100 1 0 0 7 18 5 14 1 0 0 0 259 0 0 0 100 2 0 0 0 53 23 48 0 0 0 0 914 0 0 0 100 3 0 0 14 7 2 34 0 0 0 0 1013 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 311 152 106 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 112 0 0 0 0 1 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 54 23 48 1 0 0 0 915 0 0 0 100 3 0 0 14 8 2 34 1 0 0 0 1015 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 2 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 6 0 0 3 309 152 102 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 7 15 4 10 0 1 0 0 259 0 0 0 100 2 0 0 0 53 23 48 0 0 0 0 914 0 0 0 100 3 0 0 14 8 2 34 1 0 0 0 1013 0 0 0 100 4 0 0 3 210 102 6 0 1 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 3 309 152 102 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 102 125 1 0 0 0 11 0 0 0 100 1 0 0 7 20 4 18 0 1 0 0 271 0 0 0 100 2 0 0 0 54 23 50 0 1 0 0 914 0 0 0 100 3 0 0 14 8 2 34 1 0 0 0 1015 0 0 0 100 4 0 0 3 214 103 8 0 0 0 0 2 0 0 0 100 5 0 0 0 18 7 14 0 1 0 0 15 0 0 0 100 6 0 0 3 312 152 108 0 1 0 0 9 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2102 100 108 0 0 0 0 0 0 0 0 100 1 0 0 7 15 4 10 1 0 0 0 259 0 0 0 100 2 0 0 0 53 23 48 0 0 0 0 913 0 0 0 100 3 0 0 14 8 2 34 1 0 0 0 1014 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 1 0 0 0 100 6 0 0 3 309 152 102 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 116 0 1 1 0 0 0 0 0 100 1 0 0 7 21 6 16 0 0 0 0 259 0 0 0 100 2 0 0 0 59 24 54 1 1 1 0 914 0 0 0 100 3 0 0 14 9 2 38 0 2 2 0 1013 0 0 0 100 4 0 0 3 215 104 10 0 1 0 0 2 0 0 0 100 5 0 0 0 11 3 6 0 0 0 0 25 0 0 0 100 6 0 0 3 313 153 108 0 1 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 1 0 0 0 0 0 0 100 April 1, 2026 at 07:05:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 1 0 0 1 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 53 23 48 0 0 0 0 914 0 0 0 100 3 0 0 14 9 2 34 2 0 0 0 1014 0 0 0 100 4 0 0 3 212 102 6 0 0 0 0 0 0 0 0 100 5 0 0 0 8 0 6 0 1 0 0 0 0 0 0 100 6 0 0 3 311 153 104 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 110 0 0 0 0 1 0 0 0 100 1 0 0 7 16 5 12 0 1 0 0 280 0 0 0 100 2 0 0 0 53 23 48 0 0 0 0 914 0 0 0 100 3 0 0 14 8 2 34 1 0 0 0 1014 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 2 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 313 154 106 0 0 0 0 1 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 116 0 0 0 0 9 0 0 0 100 1 0 0 7 20 4 18 1 0 0 0 279 0 0 0 100 2 0 0 0 53 23 48 0 0 0 0 914 0 0 0 100 3 0 0 14 7 2 34 0 0 0 0 1015 0 0 0 100 4 0 0 3 211 102 6 0 0 0 0 0 0 0 0 100 5 0 0 0 24 8 18 0 1 3 0 10 0 0 0 100 6 0 0 3 320 153 126 0 1 1 0 30 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 116 0 0 2 0 0 0 0 0 100 1 0 0 7 17 5 10 0 0 1 0 259 0 0 0 100 2 0 0 0 56 24 48 1 0 1 0 914 0 0 0 100 3 0 0 14 12 4 36 1 0 3 0 1014 0 0 0 100 4 0 0 3 212 103 6 0 0 1 0 2 0 0 0 100 5 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 6 0 0 3 316 153 110 0 0 4 0 0 0 0 0 100 7 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:05:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 7 17 5 12 0 0 0 0 259 0 0 0 100 2 0 0 0 53 23 48 0 0 0 0 914 0 0 0 100 3 0 0 14 9 2 34 2 0 0 0 1015 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 313 153 108 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 108 0 0 0 0 0 0 0 0 100 1 0 0 7 14 4 10 0 0 0 0 259 0 0 0 100 2 0 0 0 51 22 46 0 0 0 0 615 0 0 0 100 3 0 0 14 8 2 36 0 1 0 0 1313 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 2 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 313 153 106 0 0 1 0 0 0 0 0 100 7 0 0 0 9 1 6 0 1 1 0 0 0 0 0 100 April 1, 2026 at 07:05:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 1 0 0 0 0 0 0 100 1 0 0 7 15 4 8 1 0 0 0 259 0 0 0 100 2 0 0 0 49 21 44 0 0 0 0 613 0 0 0 100 3 0 0 14 10 3 36 1 0 0 0 1315 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 6 0 0 3 311 153 104 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 6 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:05:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 0 0 0 0 0 0 0 100 1 0 0 7 20 4 20 0 0 0 0 272 0 0 0 100 2 0 0 0 14 3 6 1 0 0 0 593 0 0 0 100 3 0 0 14 49 22 76 1 1 0 0 1334 0 0 0 100 4 0 0 3 213 103 8 0 0 0 0 2 0 0 0 100 5 0 0 0 23 9 14 0 0 0 0 18 0 0 0 100 6 0 0 3 315 153 112 0 0 0 0 12 0 0 0 100 7 0 0 0 10 1 6 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 110 0 0 0 0 0 0 0 0 100 1 0 0 7 14 4 8 0 0 0 0 259 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 594 0 0 0 100 3 0 0 14 50 23 76 1 0 0 0 1333 0 0 0 100 4 0 0 3 210 102 6 0 1 0 0 0 0 0 0 100 5 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 6 0 0 3 311 153 104 0 0 0 0 0 0 0 0 100 7 0 0 0 11 1 6 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:05:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 124 0 1 1 0 0 0 0 0 100 1 0 0 7 17 5 14 0 0 0 0 259 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 595 0 0 0 100 3 0 0 14 50 23 76 1 0 0 0 1334 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 2 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 313 153 108 0 0 0 0 0 0 0 0 100 7 0 0 0 9 1 4 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:05:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 1 0 0 0 100 1 0 0 7 15 4 8 1 0 0 0 259 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 593 0 0 0 100 3 0 0 14 49 23 76 0 0 0 0 1335 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 311 153 104 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 114 0 0 0 0 1 0 0 0 100 1 0 0 7 17 5 12 0 1 0 0 260 0 0 0 100 2 0 0 0 12 2 6 1 0 0 0 594 0 0 0 100 3 0 0 14 50 23 76 1 0 0 0 1333 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 2 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 313 154 106 0 0 0 0 1 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 114 0 0 0 0 0 0 0 0 100 1 0 0 7 27 6 30 0 1 2 0 280 0 0 0 100 2 0 0 0 12 2 10 0 1 0 0 594 0 0 0 100 3 0 0 14 51 23 76 2 0 0 0 1334 0 0 0 100 4 0 0 3 212 102 6 0 0 0 0 0 0 0 0 100 5 0 0 0 16 6 6 0 0 0 0 11 0 0 0 100 6 1 0 3 315 153 112 0 0 0 0 11 0 0 0 100 7 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2104 100 112 0 1 0 0 0 0 0 0 100 1 0 0 7 17 5 10 0 0 1 0 259 0 0 0 100 2 0 0 0 13 3 6 0 0 1 0 594 0 0 0 100 3 0 0 14 53 25 78 0 0 1 0 1335 0 0 0 100 4 0 0 3 212 103 6 0 0 1 0 2 0 0 0 100 5 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 6 0 0 3 311 153 104 0 0 1 0 0 0 0 0 100 7 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 April 1, 2026 at 07:05:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 110 0 0 0 0 0 0 0 0 100 1 0 0 7 18 5 12 1 0 0 0 259 0 0 0 100 2 0 0 0 13 2 8 0 0 0 0 593 0 0 0 100 3 0 0 14 51 23 78 1 1 1 0 1334 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 6 0 0 3 313 153 108 0 0 0 0 0 0 0 0 100 7 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 100 124 0 0 0 0 0 0 0 0 100 1 1288 0 10 25 4 24 1 0 1 0 289 0 0 0 100 2 1 0 0 14 2 12 1 2 0 0 622 0 0 0 100 3 4 0 14 29 7 56 1 1 0 0 1350 0 0 0 100 4 0 0 3 214 103 10 0 1 0 0 2 0 0 0 100 5 37 0 0 101 83 38 3 1 6 0 248 0 0 0 100 6 0 0 3 322 153 126 1 3 0 0 97 0 0 0 100 7 0 0 0 12 1 12 0 0 3 0 0 0 0 0 100 April 1, 2026 at 07:05:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2115 100 3312 0 2 108 0 0 0 1 0 99 1 0 0 7 284 4 626 1 1 1043 0 2240 0 2 0 98 2 0 0 0 12 2 8 0 0 1 0 593 0 0 0 100 3 0 0 14 10 3 38 0 0 0 0 1315 0 0 0 100 4 0 0 2 210 102 4 0 0 0 0 0 0 0 0 100 5 2562 0 0 8647 8625 218 60 2 5772 0 86 0 4 0 96 6 0 0 4 314 154 108 0 0 0 0 3 0 0 0 100 7 0 0 0 379 1 2129 3 2 2294 0 2 0 4 0 96 April 1, 2026 at 07:05:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2106 101 119 0 0 0 0 0 0 0 0 100 1 0 0 7 34 7 38 0 0 0 0 312 0 0 0 100 2 0 0 0 12 2 8 0 0 0 0 594 0 0 0 100 3 2 0 14 14 3 44 2 0 1 0 1328 0 0 0 100 4 0 0 3 216 103 11 0 0 0 0 2 0 0 0 100 5 0 0 0 33 22 8 0 3 1 0 0 0 0 0 100 6 0 0 3 316 153 114 0 0 0 0 12 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 237 0 1 5 0 0 0 0 0 100 1 0 0 7 36 6 42 1 0 14 0 348 0 0 0 100 2 0 0 0 14 3 10 0 0 0 0 595 0 0 0 100 3 0 0 14 10 3 38 0 0 0 0 1315 0 0 0 100 4 0 0 3 210 102 4 0 0 0 0 0 0 0 0 100 5 0 0 0 290 278 8 0 1 83 0 1 0 0 0 100 6 0 0 3 312 153 106 0 0 0 0 3 0 0 0 100 7 0 0 0 54 0 96 0 0 34 0 0 0 0 0 100 April 1, 2026 at 07:05:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2111 101 340 0 3 43 0 0 0 0 0 100 1 0 0 7 100 8 166 0 3 72 0 385 0 0 0 100 2 0 0 0 51 2 85 1 9 25 0 595 0 0 0 100 3 0 0 14 87 39 138 1 7 44 0 1321 0 0 0 100 4 0 0 3 305 137 124 0 8 48 0 2 0 0 0 100 5 0 0 0 472 419 93 0 6 188 0 1 0 0 0 100 6 0 0 3 362 153 206 0 2 59 0 3 0 0 0 100 7 0 0 0 100 0 190 0 4 112 0 0 0 0 0 100 April 1, 2026 at 07:05:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2110 102 186 0 1 2 0 1 0 0 0 100 1 0 0 7 36 6 44 1 0 0 0 348 0 0 0 100 2 0 0 0 10 2 6 0 0 0 0 595 0 0 0 100 3 0 0 14 11 3 38 1 0 0 0 1315 0 0 0 100 4 0 0 3 210 103 4 0 1 0 0 0 0 0 0 100 5 0 0 0 96 81 14 0 0 8 0 0 0 0 0 100 6 0 0 3 312 152 104 0 0 0 0 3 0 0 0 100 7 0 0 0 36 0 54 0 0 8 0 0 0 0 0 100 April 1, 2026 at 07:05:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2109 103 121 0 2 0 0 1 0 0 0 100 1 0 0 0 26 5 24 0 1 0 0 58 0 0 0 100 2 0 0 7 12 3 10 0 1 0 0 853 0 0 0 100 3 0 0 14 11 3 38 1 0 0 0 1316 0 0 0 100 4 0 0 3 212 103 6 0 0 0 0 2 0 0 0 100 5 0 0 0 24 14 4 0 1 0 0 0 0 0 0 100 6 0 0 3 315 153 112 0 1 0 0 4 0 0 0 100 7 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 April 1, 2026 at 07:05:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2108 101 233 0 0 5 0 0 0 0 0 100 1 0 0 0 44 7 54 1 0 17 0 108 0 0 0 100 2 0 0 7 13 4 10 0 0 0 0 853 0 0 0 100 3 2 0 14 14 3 44 1 0 0 0 1327 0 0 0 100 4 0 0 3 210 102 4 0 1 0 0 0 0 0 0 100 5 0 0 0 315 305 4 0 1 99 0 0 0 0 0 100 6 0 0 3 315 152 112 0 0 0 0 12 0 0 0 100 7 0 0 0 55 0 96 0 1 49 0 0 0 0 0 100 April 1, 2026 at 07:05:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 0 2107 101 150 0 0 0 0 0 0 0 0 100 1 1 0 0 35 7 36 0 0 1 0 63 0 0 0 100 2 0 0 7 16 5 10 1 0 1 0 853 0 0 0 100 3 0 0 14 16 5 42 1 0 1 0 1318 0 0 0 100 4 0 0 3 212 103 6 0 0 1 0 2 0 0 0 100 5 0 0 0 134 123 2 0 0 13 0 0 0 0 0 100 6 0 0 3 313 152 108 0 0 1 0 5 0 0 0 100 7 0 0 0 23 1 32 0 1 13 0 0 0 0 0 100