Max level shown:
1 PHV ALLOCATION SUCCESSFUL
2 PHV Allocation
3 +-----------+-------+-----------------+--------------------------------------------------------+
4 |Container |Gress |Container Slice |Field Slice |
5 +-----------+-------+-----------------+--------------------------------------------------------+
6 |B0 |I | |ingress::$tmp6 |
7 | | | | |
8 |MB0 |I |[0] |ingress::hdr.inner_ipv4.ttl[0] |
9 | | |[7:1] |ingress::hdr.inner_ipv4.ttl[7:1] |
10 | | |[0] |ingress::hdr.inner_ipv6.hop_limit[0] |
11 | | |[7:1] |ingress::hdr.inner_ipv6.hop_limit[7:1] |
12 | | | | |
13 |DB0 |I | |ingress::hdr.inner_ipv6.src_addr[23:16] ARA |
14 | | | | |
15 |B1 |I |[0] |ingress::hdr.udp.checksum.$deparse_original_csum |
16 | | |[1] |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |
17 | | |[2] |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |
18 | | |[3] |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |
19 | | |[4] |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |
20 | | |[5] |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |
21 | | |[6] |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |
22 | | |[7] |ingress::meta.service_routed |
23 | | | | |
24 |MB1 |I |[3:0] |ingress::ig_intr_md_for_dprsr.mirror_type |
25 | | | | |
26 |... | | | |
27 | | | | |
28 |B2 |I |[0] |ingress::hdr.ipv4.ttl[0] |
29 | | |[7:1] |ingress::hdr.ipv4.ttl[7:1] |
30 | | |[0] |ingress::hdr.ipv6.hop_limit[0] |
31 | | |[7:1] |ingress::hdr.ipv6.hop_limit[7:1] |
32 | | | | |
33 |MB2 |I | |ingress::hdr.inner_ipv4.protocol |
34 | | | |ingress::hdr.inner_ipv6.next_hdr |
35 | | | | |
36 |... | | | |
37 | | | | |
38 |B3 |I |[0] |ingress::meta.bridge_hdr.is_mcast_routed |
39 | | |[1] |ingress::meta.bridge_hdr.nat_egress_hit |
40 | | |[6:2] |ingress::meta.bridge_hdr.reserved |
41 | | |[7] |ingress::meta.bridge_hdr.__pad_0 |
42 | | |[7] |ingress::meta.nat_egress_hit |
43 | | |[1] |ingress::meta.uplink_ingress |
44 | | | | |
45 |MB3 |I | |ingress::hdr.ipv4.protocol |
46 | | | |ingress::hdr.ipv6.next_hdr |
47 | | | | |
48 |... | | | |
49 | | | | |
50 |B4 |E |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |
51 | | |[1] |egress::eg_intr_md.egress_port.$valid |
52 | | |[2] |egress::eg_intr_md_for_dprsr.drop_ctl.$valid |
53 | | |[3] |egress::hdr.ethernet.$valid |
54 | | |[4] |egress::hdr.vlan.$valid |
55 | | |[5] |egress::hdr.ipv4.$valid |
56 | | |[6] |egress::hdr.udp.$valid |
57 | | |[7] |egress::hdr.geneve.$valid |
58 | | | | |
59 |B5 |I |[0] |ingress::meta.route_ttl_is_1[0] |
60 | | |[7:1] |ingress::meta.route_ttl_is_1[7:1] |
61 | | | |ingress::meta.nat_ingress_tgt[23:16] |
62 | | | | |
63 |B6 |I | |ingress::meta.drop_reason |
64 | | | | |
65 |... | | | |
66 | | | | |
67 |B8 |I | |ingress::hdr.inner_ipv6.dst_addr[23:16] |
68 | | |[4:0] |ingress::hdr.inner_ipv4.frag_offset[12:8] |
69 | | |[7:5] |ingress::hdr.inner_ipv4.flags |
70 | | | | |
71 |B9 |I | |ingress::hdr.inner_ipv6.src_addr[23:16] |
72 | | | |ingress::hdr.inner_ipv6.src_addr[23:16] ARA |
73 | | |[0] |ingress::l3_router_fwd.is_hit ARA |
74 | | | | |
75 |B10 |I | |ingress::hdr.ipv6.dst_addr[23:16] |
76 | | |[4:0] |ingress::hdr.ipv4.frag_offset[12:8] |
77 | | |[7:5] |ingress::hdr.ipv4.flags |
78 | | | | |
79 |B11 |I | |ingress::hdr.ipv6.src_addr[23:16] |
80 | | | | |
81 |MB4 |E |[2:0] |egress::eg_intr_md_for_dprsr.drop_ctl |
82 | | | | |
83 |... | | | |
84 | | | | |
85 |MB5 |E |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select |
86 | | | | |
87 |... | | | |
88 | | | | |
89 |B12 |E | |egress::meta.drop_reason |
90 | | | | |
91 |... | | | |
92 | | | | |
93 |MB8 |I | |ingress::hdr.ethernet.src_mac[7:0] |
94 | | | | |
95 |... | | | |
96 | | | | |
97 |MB9 |I | |ingress::hdr.inner_ipv6.dst_addr[31:24] |
98 | | | |ingress::hdr.inner_ipv4.frag_offset[7:0] |
99 | | | | |
100 |... | | | |
101 | | | | |
102 |MB10 |I | |ingress::hdr.inner_ipv6.src_addr[31:24] |
103 | | | | |
104 |... | | | |
105 | | | | |
106 |MB11 |I | |ingress::hdr.ipv6.src_addr[31:24] |
107 | | | |ingress::hdr.ipv4.frag_offset[7:0] |
108 | | | | |
109 |... | | | |
110 | | | | |
111 |B24 |I | |ingress::hdr.ipv6.dst_addr[31:24] |
112 | | | | |
113 |B25 |I | |ingress::meta.nat_ingress_csum[15:8] |
114 | | | | |
115 |... | | | |
116 | | | | |
117 |B28 |I | |ingress::meta.nat_ingress_tgt[31:24] |
118 | | | | |
119 |... | | | |
120 | | | | |
121 |MB12 |E |[0] |egress::is_link_local_ipv6_mcast_0 |
122 | | | | |
123 |... | | | |
124 | | | | |
125 |H0 |I | |ingress::meta.icmp_csum |
126 | | | | |
127 |MH0 |E |[0] |egress::hdr.inner_eth.$valid |
128 | | |[1] |egress::hdr.inner_ipv4.$valid |
129 | | |[2] |egress::hdr.inner_tcp.$valid |
130 | | |[3] |egress::hdr.inner_udp.$valid |
131 | | |[4] |egress::hdr.inner_ipv6.$valid |
132 | | |[5] |egress::hdr.geneve_opts.oxg_ext_tag.$valid |
133 | | |[6] |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |
134 | | |[7] |egress::hdr.geneve_opts.oxg_mcast.$valid |
135 | | |[8] |egress::hdr.geneve_opts.oxg_mss_tag.$valid |
136 | | |[9] |egress::hdr.geneve_opts.oxg_mss.$valid |
137 | | |[10] |egress::hdr.ipv6.$valid |
138 | | | | |
139 |... | | | |
140 | | | | |
141 |H1 |I | |ingress::meta.body_checksum |
142 | | | | |
143 |MH1 |I |[7:0] |ingress::l3_router_fwd.slot[7:0] |
144 | | |[15:8] |ingress::l3_router_fwd.slot[15:8] |
145 | | | | |
146 |... | | | |
147 | | | | |
148 |H2 |I | |ingress::hdr.inner_ipv4.total_len |
149 | | | |ingress::hdr.inner_ipv6.payload_len |
150 | | | | |
151 |MH2 |I |[8:0] |ingress::ig_intr_md.ingress_port |
152 | | | | |
153 |... | | | |
154 | | | | |
155 |H3 |I | |ingress::hdr.ipv4.total_len |
156 | | | |ingress::hdr.ipv6.payload_len |
157 | | | | |
158 |MH3 |E |[8:0] |egress::eg_intr_md.egress_port |
159 | | | | |
160 |... | | | |
161 | | | | |
162 |H4 |I |[0] |ingress::meta.ipv4_checksum_err |
163 | | |[3:1] |ingress::ig_intr_md_for_dprsr.drop_ctl |
164 | | |[13:4] |ingress::meta.pkt_type |
165 | | |[14] |ingress::meta.dropped |
166 | | |[15] |ingress::meta.icmp_recalc |
167 | | | | |
168 |H5 |I | |ingress::meta.l4_length |
169 | | | | |
170 |H6 |I | |ingress::hdr.inner_udp.hdr_length |
171 | | | |ingress::hdr.inner_icmp.data[15:0] |
172 | | | |ingress::hdr.icmp.data[15:0] |
173 | | |[7:0] |ingress::hdr.inner_tcp.flags |
174 | | |[11:8] |ingress::hdr.inner_tcp.res |
175 | | |[15:12] |ingress::hdr.inner_tcp.data_offset |
176 | | |[7:0] |ingress::hdr.tcp.flags |
177 | | |[11:8] |ingress::hdr.tcp.res |
178 | | |[15:12] |ingress::hdr.tcp.data_offset |
179 | | | | |
180 |H7 |I | |ingress::hdr.udp.hdr_length |
181 | | | | |
182 |H8 |I |[7:0] |ingress::l3_router_fwd.idx[7:0] |
183 | | |[15:8] |ingress::l3_router_fwd.idx[15:8] |
184 | | | | |
185 |H9 |I |[8:0] |ingress::hdr.sidecar.sc_egress[8:0] |
186 | | |[15:9] |ingress::hdr.sidecar.sc_egress[15:9] |
187 | | | | |
188 |H10 |I |[8:0] |ingress::hdr.sidecar.sc_ingress[8:0] |
189 | | |[15:9] |ingress::hdr.sidecar.sc_ingress[15:9] |
190 | | | | |
191 |H11 |I |[8:0] |ingress::ig_intr_md_for_tm.ucast_egress_port |
192 | | |[9] |ingress::meta.encap_needed |
193 | | |[10] |ingress::meta.resolve_nexthop |
194 | | |[11] |ingress::meta.nexthop_is_v6 |
195 | | | | |
196 |MH4 |I | |ingress::hdr.inner_eth.src_mac[15:0] |
197 | | | | |
198 |DH4 |I | |ingress::hdr.inner_eth.ether_type ARA |
199 | | | | |
200 |MH5 |I | |ingress::hdr.sidecar.sc_ether_type |
201 | | | | |
202 |DH5 |I |[7:0] |ingress::hdr.inner_ipv4.diffserv ARA |
203 | | |[11:8] |ingress::hdr.inner_ipv4.ihl ARA |
204 | | |[15:12] |ingress::hdr.inner_ipv4.version ARA |
205 | | | | |
206 |MH6 |I | |ingress::hdr.ethernet.ether_type |
207 | | | | |
208 |... | | | |
209 | | | | |
210 |MH7 |I | |ingress::hdr.vlan.ether_type |
211 | | | | |
212 |... | | | |
213 | | | | |
214 |H12 |I |[11:0] |ingress::hdr.vlan.vlan_id |
215 | | |[12] |ingress::hdr.vlan.dei |
216 | | |[15:13] |ingress::hdr.vlan.pcp |
217 | | | | |
218 |H13 |I | |ingress::hdr.sidecar.sc_payload[127:112] |
219 | | | | |
220 |H14 |I | |ingress::hdr.sidecar.sc_payload[95:80] |
221 | | | | |
222 |H15 |I |[7:0] |ingress::hdr.ipv4.diffserv |
223 | | |[11:8] |ingress::hdr.ipv4.ihl |
224 | | |[15:12] |ingress::hdr.ipv4.version |
225 | | | | |
226 |H16 |I | |ingress::meta.nexthop[127:112] ARA |
227 | | | |ingress::hdr.inner_eth.ether_type |
228 | | | |ingress::hdr.inner_eth.ether_type ARA |
229 | | | | |
230 |... | | | |
231 | | | | |
232 |H20 |I | |ingress::meta.nexthop[95:80] ARA |
233 | | |[7:0] |ingress::hdr.inner_ipv4.diffserv |
234 | | |[7:0] |ingress::hdr.inner_ipv4.diffserv ARA |
235 | | |[11:8] |ingress::hdr.inner_ipv4.ihl |
236 | | |[11:8] |ingress::hdr.inner_ipv4.ihl ARA |
237 | | |[15:12] |ingress::hdr.inner_ipv4.version |
238 | | |[15:12] |ingress::hdr.inner_ipv4.version ARA |
239 | | | | |
240 |... | | | |
241 | | | | |
242 |MH8 |I | |ingress::hdr.inner_ipv6.dst_addr[15:0] |
243 | | | |ingress::hdr.inner_ipv4.identification |
244 | | | | |
245 |DH8 |I | |ingress::hdr.udp.dst_port ARA |
246 | | | | |
247 |MH9 |I | |ingress::hdr.inner_ipv6.src_addr[15:0] |
248 | | | |ingress::hdr.inner_ipv4.hdr_checksum |
249 | | | | |
250 |DH9 |I | |ingress::hdr.inner_eth.dst_mac[47:32] ARA |
251 | | | | |
252 |MH10 |I | |ingress::hdr.ipv6.src_addr[15:0] |
253 | | | |ingress::hdr.ipv4.identification |
254 | | | | |
255 |... | | | |
256 | | | | |
257 |MH11 |I | |ingress::hdr.inner_icmp.data[31:16] |
258 | | | |ingress::hdr.icmp.data[31:16] |
259 | | | |ingress::hdr.inner_tcp.window |
260 | | | |ingress::hdr.tcp.window |
261 | | | |ingress::hdr.inner_udp.dst_port |
262 | | | | |
263 |... | | | |
264 | | | | |
265 |H24 |I | |ingress::hdr.ipv6.dst_addr[15:0] |
266 | | | |ingress::hdr.ipv4.hdr_checksum |
267 | | | | |
268 |H25 |I | |ingress::hdr.udp.dst_port |
269 | | | |ingress::hdr.udp.dst_port ARA |
270 | | | |ingress::meta.nexthop[79:64] ARA |
271 | | | | |
272 |H26 |I | |ingress::hdr.sidecar.sc_payload[79:64] |
273 | | | | |
274 |H27 |I | |ingress::hdr.inner_eth.dst_mac[47:32] |
275 | | | |ingress::hdr.inner_eth.dst_mac[47:32] ARA |
276 | | |[7:0] |ingress::l3_router_fwd.slots ARA |
277 | | | | |
278 |H28 |I | |ingress::meta.nat_ingress_tgt[15:0] |
279 | | | | |
280 |H29 |I | |ingress::meta.l4_dst_port |
281 | | | | |
282 |H30 |I | |ingress::meta.nat_inner_mac[47:32] |
283 | | | | |
284 |H31 |I | |ingress::meta.l4_src_port |
285 | | | | |
286 |... | | | |
287 | | | | |
288 |MH12 |I | |ingress::hdr.inner_udp.src_port |
289 | | | |ingress::hdr.inner_tcp.urgent_ptr |
290 | | | |ingress::hdr.tcp.urgent_ptr |
291 | | |[7:0] |ingress::hdr.inner_icmp.code |
292 | | |[15:8] |ingress::hdr.inner_icmp.type |
293 | | | |ingress::hdr.icmp.hdr_checksum |
294 | | | | |
295 |DH12 |I | |ingress::hdr.udp.checksum ARA |
296 | | | | |
297 |MH13 |I | |ingress::hdr.udp.src_port |
298 | | | | |
299 |... | | | |
300 | | | | |
301 |MH14 |I | |ingress::hdr.inner_tcp.checksum |
302 | | | |ingress::hdr.tcp.checksum |
303 | | | |ingress::hdr.inner_udp.checksum |
304 | | | |ingress::hdr.inner_icmp.hdr_checksum |
305 | | | | |
306 |... | | | |
307 | | | | |
308 |MH15 |I | |ingress::hdr.ethernet.src_mac[47:32] |
309 | | | | |
310 |... | | | |
311 | | | | |
312 |H36 |I |[7:0] |ingress::hdr.icmp.code |
313 | | |[15:8] |ingress::hdr.icmp.type |
314 | | | | |
315 |H37 |I | |ingress::hdr.udp.checksum |
316 | | | |ingress::hdr.udp.checksum ARA |
317 | | | |ingress::meta.nexthop[111:96] ARA |
318 | | | | |
319 |H38 |I | |ingress::hdr.sidecar.sc_payload[111:96] |
320 | | | | |
321 |... | | | |
322 | | | | |
323 |MH16 |I |[7:0] |ingress::hdr.ethernet.dst_mac[39:32] |
324 | | |[15:8] |ingress::hdr.ethernet.dst_mac[47:40] |
325 | | | | |
326 |... | | | |
327 | | | | |
328 |MH17 |I |[8:0] |ingress::meta.bridge_hdr.ingress_port |
329 | | |[15:9] |ingress::meta.bridge_hdr.__pad_1 |
330 | | | | |
331 |... | | | |
332 | | | | |
333 |MH18 |I |[7:0] |ingress::hdr.sidecar.sc_pad |
334 | | |[15:8] |ingress::hdr.sidecar.sc_code |
335 | | | | |
336 |... | | | |
337 | | | | |
338 |H48 |I |[7:0] |ingress::meta.orig_src_mac[39:32] |
339 | | |[15:8] |ingress::meta.orig_src_mac[47:40] |
340 | | | | |
341 |... | | | |
342 | | | | |
343 |MH20 |E | |egress::hdr.ethernet.src_mac[47:32] |
344 | | | | |
345 |... | | | |
346 | | | | |
347 |W0 |I |[0] |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |
348 | | |[1] |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |
349 | | |[2] |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |
350 | | |[3] |ingress::meta.bridge_hdr.$valid |
351 | | |[4] |ingress::hdr.ethernet.$valid |
352 | | |[5] |ingress::hdr.sidecar.$valid |
353 | | |[6] |ingress::hdr.vlan.$valid |
354 | | |[7] |ingress::hdr.ipv4.$valid |
355 | | |[8] |ingress::hdr.icmp.$valid |
356 | | |[9] |ingress::hdr.tcp.$valid |
357 | | |[10] |ingress::hdr.udp.$valid |
358 | | |[11] |ingress::hdr.geneve.$valid |
359 | | |[12] |ingress::hdr.inner_eth.$valid |
360 | | |[13] |ingress::hdr.inner_ipv4.$valid |
361 | | |[14] |ingress::hdr.inner_tcp.$valid |
362 | | |[15] |ingress::hdr.inner_udp.$valid |
363 | | |[16] |ingress::hdr.inner_icmp.$valid |
364 | | |[17] |ingress::hdr.inner_ipv6.$valid |
365 | | |[18] |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |
366 | | |[19] |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |
367 | | |[20] |ingress::hdr.geneve_opts.oxg_mcast.$valid |
368 | | |[21] |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |
369 | | |[22] |ingress::hdr.geneve_opts.oxg_mss.$valid |
370 | | |[23] |ingress::hdr.ipv6.$valid |
371 | | |[24] |ingress::hdr.arp.$valid |
372 | | |[25] |ingress::meta.is_switch_address |
373 | | |[26] |ingress::meta.is_mcast |
374 | | |[27] |ingress::meta.is_link_local_mcastv6 |
375 | | |[28] |ingress::meta.nat_ingress_hit |
376 | | | | |
377 |MW0 |I | |ingress::hdr.inner_ipv4.dst_addr |
378 | | |[15:0] |ingress::hdr.inner_ipv6.dst_addr[111:96] |
379 | | |[31:16] |ingress::hdr.inner_ipv6.dst_addr[127:112] |
380 | | | | |
381 |DW0 |I | |ingress::hdr.inner_eth.src_mac[47:16] ARA |
382 | | | | |
383 |W1 |I |[4:0] |ingress::hdr.geneve_opts.oxg_ext_tag.opt_len |
384 | | |[7:5] |ingress::hdr.geneve_opts.oxg_ext_tag.reserved |
385 | | |[14:8] |ingress::hdr.geneve_opts.oxg_ext_tag.type |
386 | | |[15] |ingress::hdr.geneve_opts.oxg_ext_tag.crit |
387 | | |[31:16] |ingress::hdr.geneve_opts.oxg_ext_tag.class |
388 | | | | |
389 |MW1 |I | |ingress::hdr.ipv4.dst_addr |
390 | | |[15:0] |ingress::hdr.ipv6.dst_addr[111:96] |
391 | | |[31:16] |ingress::hdr.ipv6.dst_addr[127:112] |
392 | | | | |
393 |DW1 |I | |ingress::hdr.inner_eth.dst_mac[31:0] ARA |
394 | | | | |
395 |W2 |I | |ingress::meta.orig_src_ipv4 |
396 | | |[7:0] |ingress::l3_router_fwd.ecmp_hash |
397 | | | | |
398 |MW2 |I | |ingress::hdr.inner_ipv4.src_addr |
399 | | |[15:0] |ingress::hdr.inner_ipv6.src_addr[111:96] |
400 | | |[31:16] |ingress::hdr.inner_ipv6.src_addr[127:112] |
401 | | | | |
402 |... | | | |
403 | | | | |
404 |W3 |I |[15:0] |ingress::meta.nat_ingress_tgt[111:96] |
405 | | |[31:16] |ingress::meta.nat_ingress_tgt[127:112] |
406 | | |[7:0] |$tmp9 |
407 | | | | |
408 |MW3 |I | |ingress::hdr.ipv4.src_addr |
409 | | |[15:0] |ingress::hdr.ipv6.src_addr[111:96] |
410 | | |[31:16] |ingress::hdr.ipv6.src_addr[127:112] |
411 | | | | |
412 |... | | | |
413 | | | | |
414 |W4 |I |[7:0] |ingress::hdr.geneve.reserved2 |
415 | | |[31:8] |ingress::hdr.geneve.vni |
416 | | | | |
417 |W5 |I | |ingress::hdr.inner_eth.src_mac[47:16] |
418 | | | |ingress::hdr.inner_eth.src_mac[47:16] ARA |
419 | | | |ingress::meta.nexthop[31:0] ARA |
420 | | | | |
421 |W6 |I |[31:8] |ingress::meta.nat_geneve_vni |
422 | | |[7:0] |ingress::meta.nat_ingress_csum[7:0] |
423 | | | | |
424 |W7 |I | |ingress::hdr.inner_eth.dst_mac[31:0] |
425 | | | |ingress::hdr.inner_eth.dst_mac[31:0] ARA |
426 | | | |ingress::meta.nexthop[63:32] ARA |
427 | | | | |
428 |W8 |I | |ingress::meta.nat_inner_mac[31:0] |
429 | | |[7:0] |$tmp10 |
430 | | | | |
431 |W9 |I | |ingress::hdr.sidecar.sc_payload[31:0] |
432 | | | | |
433 |W10 |I | |ingress::hdr.sidecar.sc_payload[63:32] |
434 | | | | |
435 |W11 |E |[17] |egress::meta.bridge_hdr.nat_egress_hit |
436 | | | | |
437 |MW4 |I | |ingress::hdr.inner_ipv6.dst_addr[63:32] |
438 | | | | |
439 |... | | | |
440 | | | | |
441 |MW5 |I | |ingress::hdr.inner_ipv6.src_addr[63:32] |
442 | | | | |
443 |... | | | |
444 | | | | |
445 |MW6 |I | |ingress::hdr.ipv6.src_addr[63:32] |
446 | | | | |
447 |... | | | |
448 | | | | |
449 |MW7 |I |[15:0] |ingress::hdr.inner_tcp.dst_port |
450 | | |[31:16] |ingress::hdr.inner_tcp.src_port |
451 | | |[15:0] |ingress::hdr.tcp.dst_port |
452 | | |[31:16] |ingress::hdr.tcp.src_port |
453 | | | | |
454 |... | | | |
455 | | | | |
456 |W12 |I | |ingress::hdr.ipv6.dst_addr[63:32] |
457 | | | | |
458 |W13 |I |[19:0] |ingress::hdr.inner_ipv6.flow_label |
459 | | |[27:20] |ingress::hdr.inner_ipv6.traffic_class |
460 | | |[31:28] |ingress::hdr.inner_ipv6.version |
461 | | | | |
462 |W14 |I | |ingress::meta.nat_ingress_tgt[63:32] |
463 | | | | |
464 |W15 |I |[19:0] |ingress::hdr.ipv6.flow_label |
465 | | |[27:20] |ingress::hdr.ipv6.traffic_class |
466 | | |[31:28] |ingress::hdr.ipv6.version |
467 | | | | |
468 |W16 |E | |egress::hdr.ipv6.dst_addr[31:0] |
469 | | | | |
470 |W17 |E | |egress::hdr.ipv6.dst_addr[63:32] |
471 | | | | |
472 |W18 |E | |egress::hdr.ipv6.dst_addr[95:64] |
473 | | | | |
474 |W19 |I | |ingress::meta.orig_dst_ipv4 |
475 | | | | |
476 |... | | | |
477 | | | | |
478 |MW8 |I | |ingress::hdr.inner_ipv6.dst_addr[95:64] |
479 | | | | |
480 |... | | | |
481 | | | | |
482 |MW9 |I | |ingress::hdr.inner_ipv6.src_addr[95:64] |
483 | | | | |
484 |... | | | |
485 | | | | |
486 |MW10 |I | |ingress::hdr.ipv6.src_addr[95:64] |
487 | | | | |
488 |... | | | |
489 | | | | |
490 |MW11 |I |[23:0] |ingress::hdr.ethernet.dst_mac[23:0] |
491 | | |[31:24] |ingress::hdr.ethernet.dst_mac[31:24] |
492 | | | | |
493 |... | | | |
494 | | | | |
495 |W24 |I | |ingress::hdr.ipv6.dst_addr[95:64] |
496 | | | | |
497 |W25 |I |[15:0] |ingress::hdr.geneve.protocol |
498 | | |[21:16] |ingress::hdr.geneve.reserved |
499 | | |[22] |ingress::hdr.geneve.crit |
500 | | |[23] |ingress::hdr.geneve.ctrl |
501 | | |[29:24] |ingress::hdr.geneve.opt_len |
502 | | |[31:30] |ingress::hdr.geneve.version |
503 | | | | |
504 |W26 |I | |ingress::meta.nat_ingress_tgt[95:64] |
505 | | | | |
506 |W27 |I |[23:0] |ingress::meta.orig_src_mac[23:0] |
507 | | |[31:24] |ingress::meta.orig_src_mac[31:24] |
508 | | | | |
509 |... | | | |
510 | | | | |
511 |MW12 |I | |ingress::hdr.inner_tcp.ack_no |
512 | | | |ingress::hdr.tcp.ack_no |
513 | | | | |
514 |... | | | |
515 | | | | |
516 |MW13 |I | |ingress::hdr.inner_tcp.seq_no |
517 | | | |ingress::hdr.tcp.seq_no |
518 | | | | |
519 |... | | | |
520 | | | | |
521 |MW14 |E |[15:0] |egress::hdr.ipv6.dst_addr[111:96] |
522 | | |[31:16] |egress::hdr.ipv6.dst_addr[127:112] |
523 | | | | |
524 |... | | | |
525 | | | | |
526 |MW15 |E | |egress::hdr.ethernet.src_mac[31:0] |
527 | | | | |
528 |... | | | |
529 | | | | |
530 +-----------+-------+-----------------+--------------------------------------------------------+
531 
532 
533 POV Allocation (ingress):
534 +-----------+-----------------+--------------------------------------------------------+
535 |Container |Container Slice |Field Slice |
536 +-----------+-----------------+--------------------------------------------------------+
537 |B1 |[0] |ingress::hdr.udp.checksum.$deparse_original_csum |
538 | |[1] |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |
539 | |[2] |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |
540 | |[3] |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |
541 | |[4] |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |
542 | |[5] |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |
543 | |[6] |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |
544 +-----------+-----------------+--------------------------------------------------------+
545 |W0 |[0] |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |
546 | |[1] |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |
547 | |[2] |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |
548 | |[3] |ingress::meta.bridge_hdr.$valid |
549 | |[4] |ingress::hdr.ethernet.$valid |
550 | |[5] |ingress::hdr.sidecar.$valid |
551 | |[6] |ingress::hdr.vlan.$valid |
552 | |[7] |ingress::hdr.ipv4.$valid |
553 | |[8] |ingress::hdr.icmp.$valid |
554 | |[9] |ingress::hdr.tcp.$valid |
555 | |[10] |ingress::hdr.udp.$valid |
556 | |[11] |ingress::hdr.geneve.$valid |
557 | |[12] |ingress::hdr.inner_eth.$valid |
558 | |[13] |ingress::hdr.inner_ipv4.$valid |
559 | |[14] |ingress::hdr.inner_tcp.$valid |
560 | |[15] |ingress::hdr.inner_udp.$valid |
561 | |[16] |ingress::hdr.inner_icmp.$valid |
562 | |[17] |ingress::hdr.inner_ipv6.$valid |
563 | |[18] |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |
564 | |[19] |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |
565 | |[20] |ingress::hdr.geneve_opts.oxg_mcast.$valid |
566 | |[21] |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |
567 | |[22] |ingress::hdr.geneve_opts.oxg_mss.$valid |
568 | |[23] |ingress::hdr.ipv6.$valid |
569 | |[24] |ingress::hdr.arp.$valid |
570 +-----------+-----------------+--------------------------------------------------------+
571 | |Total Bits Used |32 / 128 ( 25 %) |
572 | |Pack Density |32 / 40 ( 80 %) |
573 +-----------+-----------------+--------------------------------------------------------+
574 
575 POV Allocation (egress):
576 +-----------+-----------------+------------------------------------------------------+
577 |Container |Container Slice |Field Slice |
578 +-----------+-----------------+------------------------------------------------------+
579 |MH0 |[0] |egress::hdr.inner_eth.$valid |
580 | |[1] |egress::hdr.inner_ipv4.$valid |
581 | |[2] |egress::hdr.inner_tcp.$valid |
582 | |[3] |egress::hdr.inner_udp.$valid |
583 | |[4] |egress::hdr.inner_ipv6.$valid |
584 | |[5] |egress::hdr.geneve_opts.oxg_ext_tag.$valid |
585 | |[6] |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |
586 | |[7] |egress::hdr.geneve_opts.oxg_mcast.$valid |
587 | |[8] |egress::hdr.geneve_opts.oxg_mss_tag.$valid |
588 | |[9] |egress::hdr.geneve_opts.oxg_mss.$valid |
589 | |[10] |egress::hdr.ipv6.$valid |
590 +-----------+-----------------+------------------------------------------------------+
591 |B4 |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |
592 | |[1] |egress::eg_intr_md.egress_port.$valid |
593 | |[2] |egress::eg_intr_md_for_dprsr.drop_ctl.$valid |
594 | |[3] |egress::hdr.ethernet.$valid |
595 | |[4] |egress::hdr.vlan.$valid |
596 | |[5] |egress::hdr.ipv4.$valid |
597 | |[6] |egress::hdr.udp.$valid |
598 | |[7] |egress::hdr.geneve.$valid |
599 +-----------+-----------------+------------------------------------------------------+
600 | |Total Bits Used |19 / 128 ( 14.8 %) |
601 | |Pack Density |19 / 24 ( 79.2 %) |
602 +-----------+-----------------+------------------------------------------------------+
603 
604 +--------------------------------------------------------+------------+-----------+----------------+-----------------+
605 |Field Slice |Live Range |Container |Container Type |Container Slice |
606 +--------------------------------------------------------+------------+-----------+----------------+-----------------+
607 |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |[-1r, 14w] |W0 |W |[0] |
608 |ingress::ig_intr_md.ingress_port |[-1r, 14w] |MH2 |MH |[8:0] |
609 |ingress::meta.dropped |[-1r, 14w] |H4 |H |[14] |
610 |ingress::meta.ipv4_checksum_err |[-1r, 14w] |H4 |H |[0] |
611 |ingress::meta.is_switch_address |[-1r, 14w] |W0 |W |[25] |
612 |ingress::meta.is_mcast |[-1r, 14w] |W0 |W |[26] |
613 |ingress::meta.is_link_local_mcastv6 |[-1r, 14w] |W0 |W |[27] |
614 |ingress::meta.service_routed |[-1r, 14w] |B1 |B |[7] |
615 |ingress::meta.nat_egress_hit |[-1r, 14w] |B3 |B |[7] |
616 |ingress::meta.nat_ingress_hit |[-1r, 14w] |W0 |W |[28] |
617 |ingress::meta.uplink_ingress |[-1r, 14w] |B3 |B |[1] |
618 |ingress::meta.encap_needed |[-1r, 14w] |H11 |H |[9] |
619 |ingress::meta.resolve_nexthop |[-1r, 14w] |H11 |H |[10] |
620 |ingress::meta.route_ttl_is_1[0] |[-1r, 14w] |B5 |B |[0] |
621 |ingress::meta.route_ttl_is_1[7:1] |[-1r, 14w] |B5 |B |[7:1] |
622 |ingress::meta.nexthop_is_v6 |[-1r, 14w] |H11 |H |[11] |
623 |ingress::meta.nexthop[127:112] |[6w, 12r] |H16 |H | |
624 |ingress::meta.nexthop[95:80] |[6w, 12r] |H20 |H | |
625 |ingress::meta.nexthop[79:64] |[7w, 12r] |H25 |H | |
626 |ingress::meta.nexthop[111:96] |[7w, 12r] |H37 |H | |
627 |ingress::meta.nexthop[31:0] |[5w, 12r] |W5 |W | |
628 |ingress::meta.nexthop[63:32] |[5w, 12r] |W7 |W | |
629 |ingress::meta.pkt_type |[-1r, 14w] |H4 |H |[13:4] |
630 |ingress::meta.drop_reason |[-1r, 14w] |B6 |B | |
631 |ingress::meta.l4_src_port |[-1r, 14w] |H31 |H | |
632 |ingress::meta.l4_dst_port |[-1r, 14w] |H29 |H | |
633 |ingress::meta.nat_ingress_tgt[23:16] |[-1r, 14w] |B5 |B | |
634 |ingress::meta.nat_ingress_tgt[31:24] |[-1r, 14w] |B28 |B | |
635 |ingress::meta.nat_ingress_tgt[15:0] |[-1r, 14w] |H28 |H | |
636 |ingress::meta.nat_ingress_tgt[111:96] |[-1r, 14w] |W3 |W |[15:0] |
637 |ingress::meta.nat_ingress_tgt[127:112] |[-1r, 14w] |W3 |W |[31:16] |
638 |ingress::meta.nat_ingress_tgt[63:32] |[-1r, 14w] |W14 |W | |
639 |ingress::meta.nat_ingress_tgt[95:64] |[-1r, 14w] |W26 |W | |
640 |ingress::meta.nat_inner_mac[47:32] |[-1r, 14w] |H30 |H | |
641 |ingress::meta.nat_inner_mac[31:0] |[-1r, 14w] |W8 |W | |
642 |ingress::meta.nat_geneve_vni |[-1r, 14w] |W6 |W |[31:8] |
643 |ingress::meta.icmp_recalc |[-1r, 14w] |H4 |H |[15] |
644 |ingress::meta.icmp_csum |[-1r, 14w] |H0 |H | |
645 |ingress::meta.body_checksum |[-1r, 14w] |H1 |H | |
646 |ingress::meta.l4_length |[-1r, 14w] |H5 |H | |
647 |ingress::meta.orig_src_mac[39:32] |[-1r, 14w] |H48 |H |[7:0] |
648 |ingress::meta.orig_src_mac[47:40] |[-1r, 14w] |H48 |H |[15:8] |
649 |ingress::meta.orig_src_mac[23:0] |[-1r, 14w] |W27 |W |[23:0] |
650 |ingress::meta.orig_src_mac[31:24] |[-1r, 14w] |W27 |W |[31:24] |
651 |ingress::meta.orig_src_ipv4 |[-1r, 14w] |W2 |W | |
652 |ingress::meta.orig_dst_ipv4 |[-1r, 14w] |W19 |W | |
653 |ingress::meta.bridge_hdr.__pad_0 |[-1r, 14w] |B3 |B |[7] |
654 |ingress::meta.bridge_hdr.reserved |[-1r, 14w] |B3 |B |[6:2] |
655 |ingress::meta.bridge_hdr.nat_egress_hit |[-1r, 14w] |B3 |B |[1] |
656 |ingress::meta.bridge_hdr.is_mcast_routed |[-1r, 14w] |B3 |B |[0] |
657 |ingress::meta.bridge_hdr.__pad_1 |[-1r, 14w] |MH17 |MH |[15:9] |
658 |ingress::meta.bridge_hdr.ingress_port |[-1r, 14w] |MH17 |MH |[8:0] |
659 |ingress::meta.nat_ingress_csum[15:8] |[-1r, 14w] |B25 |B | |
660 |ingress::meta.nat_ingress_csum[7:0] |[-1r, 14w] |W6 |W |[7:0] |
661 |ingress::hdr.ethernet.dst_mac[39:32] |[-1r, 14w] |MH16 |MH |[7:0] |
662 |ingress::hdr.ethernet.dst_mac[47:40] |[-1r, 14w] |MH16 |MH |[15:8] |
663 |ingress::hdr.ethernet.dst_mac[23:0] |[-1r, 14w] |MW11 |MW |[23:0] |
664 |ingress::hdr.ethernet.dst_mac[31:24] |[-1r, 14w] |MW11 |MW |[31:24] |
665 |ingress::hdr.ethernet.src_mac[7:0] |[-1r, 14w] |MB8 |MB | |
666 |ingress::hdr.ethernet.src_mac[47:32] |[-1r, 14w] |MH15 |MH | |
667 |ingress::hdr.ethernet.ether_type |[-1r, 14w] |MH6 |MH | |
668 |ingress::hdr.sidecar.sc_code |[-1r, 14w] |MH18 |MH |[15:8] |
669 |ingress::hdr.sidecar.sc_pad |[-1r, 14w] |MH18 |MH |[7:0] |
670 |ingress::hdr.sidecar.sc_ingress[8:0] |[-1r, 14w] |H10 |H |[8:0] |
671 |ingress::hdr.sidecar.sc_ingress[15:9] |[-1r, 14w] |H10 |H |[15:9] |
672 |ingress::hdr.sidecar.sc_egress[8:0] |[-1r, 14w] |H9 |H |[8:0] |
673 |ingress::hdr.sidecar.sc_egress[15:9] |[-1r, 14w] |H9 |H |[15:9] |
674 |ingress::hdr.sidecar.sc_ether_type |[-1r, 14w] |MH5 |MH | |
675 |ingress::hdr.sidecar.sc_payload[127:112] |[-1r, 14w] |H13 |H | |
676 |ingress::hdr.sidecar.sc_payload[95:80] |[-1r, 14w] |H14 |H | |
677 |ingress::hdr.sidecar.sc_payload[79:64] |[-1r, 14w] |H26 |H | |
678 |ingress::hdr.sidecar.sc_payload[111:96] |[-1r, 14w] |H38 |H | |
679 |ingress::hdr.sidecar.sc_payload[31:0] |[-1r, 14w] |W9 |W | |
680 |ingress::hdr.sidecar.sc_payload[63:32] |[-1r, 14w] |W10 |W | |
681 |ingress::hdr.vlan.pcp |[-1r, 14w] |H12 |H |[15:13] |
682 |ingress::hdr.vlan.dei |[-1r, 14w] |H12 |H |[12] |
683 |ingress::hdr.vlan.vlan_id |[-1r, 14w] |H12 |H |[11:0] |
684 |ingress::hdr.vlan.ether_type |[-1r, 14w] |MH7 |MH | |
685 |ingress::hdr.ipv4.version |[-1r, 14w] |H15 |H |[15:12] |
686 |ingress::hdr.ipv4.ihl |[-1r, 14w] |H15 |H |[11:8] |
687 |ingress::hdr.ipv4.diffserv |[-1r, 14w] |H15 |H |[7:0] |
688 |ingress::hdr.ipv4.total_len |[-1r, 14w] |H3 |H | |
689 |ingress::hdr.ipv4.identification |[-1r, 14w] |MH10 |MH | |
690 |ingress::hdr.ipv4.flags |[-1r, 14w] |B10 |B |[7:5] |
691 |ingress::hdr.ipv4.frag_offset[7:0] |[-1r, 14w] |MB11 |MB | |
692 |ingress::hdr.ipv4.frag_offset[12:8] |[-1r, 14w] |B10 |B |[4:0] |
693 |ingress::hdr.ipv4.ttl[0] |[-1r, 14w] |B2 |B |[0] |
694 |ingress::hdr.ipv4.ttl[7:1] |[-1r, 14w] |B2 |B |[7:1] |
695 |ingress::hdr.ipv4.protocol |[-1r, 14w] |MB3 |MB | |
696 |ingress::hdr.ipv4.hdr_checksum |[-1r, 14w] |H24 |H | |
697 |ingress::hdr.ipv4.src_addr |[-1r, 14w] |MW3 |MW | |
698 |ingress::hdr.ipv4.dst_addr |[-1r, 14w] |MW1 |MW | |
699 |ingress::hdr.icmp.type |[-1r, 14w] |H36 |H |[15:8] |
700 |ingress::hdr.icmp.code |[-1r, 14w] |H36 |H |[7:0] |
701 |ingress::hdr.icmp.hdr_checksum |[-1r, 14w] |MH12 |MH | |
702 |ingress::hdr.icmp.data[31:16] |[-1r, 14w] |MH11 |MH | |
703 |ingress::hdr.icmp.data[15:0] |[-1r, 14w] |H6 |H | |
704 |ingress::hdr.tcp.src_port |[-1r, 14w] |MW7 |MW |[31:16] |
705 |ingress::hdr.tcp.dst_port |[-1r, 14w] |MW7 |MW |[15:0] |
706 |ingress::hdr.tcp.seq_no |[-1r, 14w] |MW13 |MW | |
707 |ingress::hdr.tcp.ack_no |[-1r, 14w] |MW12 |MW | |
708 |ingress::hdr.tcp.data_offset |[-1r, 14w] |H6 |H |[15:12] |
709 |ingress::hdr.tcp.res |[-1r, 14w] |H6 |H |[11:8] |
710 |ingress::hdr.tcp.flags |[-1r, 14w] |H6 |H |[7:0] |
711 |ingress::hdr.tcp.window |[-1r, 14w] |MH11 |MH | |
712 |ingress::hdr.tcp.checksum |[-1r, 14w] |MH14 |MH | |
713 |ingress::hdr.tcp.urgent_ptr |[-1r, 14w] |MH12 |MH | |
714 |ingress::hdr.udp.src_port |[-1r, 14w] |MH13 |MH | |
715 |ingress::hdr.udp.dst_port |[7w, 12r] |DH8 |DH | |
716 |ingress::hdr.udp.dst_port |[-1w, 7r] |H25 |H | |
717 |ingress::hdr.udp.dst_port |[12w, 14r] |H25 |H | |
718 |ingress::hdr.udp.hdr_length |[-1r, 14w] |H7 |H | |
719 |ingress::hdr.udp.checksum |[7w, 12r] |DH12 |DH | |
720 |ingress::hdr.udp.checksum |[-1w, 7r] |H37 |H | |
721 |ingress::hdr.udp.checksum |[12w, 14r] |H37 |H | |
722 |ingress::hdr.geneve.version |[-1r, 14w] |W25 |W |[31:30] |
723 |ingress::hdr.geneve.opt_len |[-1r, 14w] |W25 |W |[29:24] |
724 |ingress::hdr.geneve.ctrl |[-1r, 14w] |W25 |W |[23] |
725 |ingress::hdr.geneve.crit |[-1r, 14w] |W25 |W |[22] |
726 |ingress::hdr.geneve.reserved |[-1r, 14w] |W25 |W |[21:16] |
727 |ingress::hdr.geneve.protocol |[-1r, 14w] |W25 |W |[15:0] |
728 |ingress::hdr.geneve.vni |[-1r, 14w] |W4 |W |[31:8] |
729 |ingress::hdr.geneve.reserved2 |[-1r, 14w] |W4 |W |[7:0] |
730 |ingress::hdr.inner_eth.dst_mac[47:32] |[5w, 9r] |DH9 |DH | |
731 |ingress::hdr.inner_eth.dst_mac[31:0] |[5w, 12r] |DW1 |DW | |
732 |ingress::hdr.inner_eth.dst_mac[47:32] |[-1w, 5r] |H27 |H | |
733 |ingress::hdr.inner_eth.dst_mac[47:32] |[9w, 14r] |H27 |H | |
734 |ingress::hdr.inner_eth.dst_mac[31:0] |[-1w, 5r] |W7 |W | |
735 |ingress::hdr.inner_eth.dst_mac[31:0] |[12w, 14r] |W7 |W | |
736 |ingress::hdr.inner_eth.src_mac[47:16] |[5w, 12r] |DW0 |DW | |
737 |ingress::hdr.inner_eth.src_mac[15:0] |[-1r, 14w] |MH4 |MH | |
738 |ingress::hdr.inner_eth.src_mac[47:16] |[-1w, 5r] |W5 |W | |
739 |ingress::hdr.inner_eth.src_mac[47:16] |[12w, 14r] |W5 |W | |
740 |ingress::hdr.inner_eth.ether_type |[6w, 12r] |DH4 |DH | |
741 |ingress::hdr.inner_eth.ether_type |[-1w, 6r] |H16 |H | |
742 |ingress::hdr.inner_eth.ether_type |[12w, 14r] |H16 |H | |
743 |ingress::hdr.inner_ipv4.version |[6w, 12r] |DH5 |DH |[15:12] |
744 |ingress::hdr.inner_ipv4.version |[-1w, 6r] |H20 |H |[15:12] |
745 |ingress::hdr.inner_ipv4.version |[12w, 14r] |H20 |H |[15:12] |
746 |ingress::hdr.inner_ipv4.ihl |[6w, 12r] |DH5 |DH |[11:8] |
747 |ingress::hdr.inner_ipv4.ihl |[-1w, 6r] |H20 |H |[11:8] |
748 |ingress::hdr.inner_ipv4.ihl |[12w, 14r] |H20 |H |[11:8] |
749 |ingress::hdr.inner_ipv4.diffserv |[6w, 12r] |DH5 |DH |[7:0] |
750 |ingress::hdr.inner_ipv4.diffserv |[-1w, 6r] |H20 |H |[7:0] |
751 |ingress::hdr.inner_ipv4.diffserv |[12w, 14r] |H20 |H |[7:0] |
752 |ingress::hdr.inner_ipv4.total_len |[-1r, 14w] |H2 |H | |
753 |ingress::hdr.inner_ipv4.identification |[-1r, 14w] |MH8 |MH | |
754 |ingress::hdr.inner_ipv4.flags |[-1r, 14w] |B8 |B |[7:5] |
755 |ingress::hdr.inner_ipv4.frag_offset[7:0] |[-1r, 14w] |MB9 |MB | |
756 |ingress::hdr.inner_ipv4.frag_offset[12:8] |[-1r, 14w] |B8 |B |[4:0] |
757 |ingress::hdr.inner_ipv4.ttl[0] |[-1r, 14w] |MB0 |MB |[0] |
758 |ingress::hdr.inner_ipv4.ttl[7:1] |[-1r, 14w] |MB0 |MB |[7:1] |
759 |ingress::hdr.inner_ipv4.protocol |[-1r, 14w] |MB2 |MB | |
760 |ingress::hdr.inner_ipv4.hdr_checksum |[-1r, 14w] |MH9 |MH | |
761 |ingress::hdr.inner_ipv4.src_addr |[-1r, 14w] |MW2 |MW | |
762 |ingress::hdr.inner_ipv4.dst_addr |[-1r, 14w] |MW0 |MW | |
763 |ingress::hdr.inner_tcp.src_port |[-1r, 14w] |MW7 |MW |[31:16] |
764 |ingress::hdr.inner_tcp.dst_port |[-1r, 14w] |MW7 |MW |[15:0] |
765 |ingress::hdr.inner_tcp.seq_no |[-1r, 14w] |MW13 |MW | |
766 |ingress::hdr.inner_tcp.ack_no |[-1r, 14w] |MW12 |MW | |
767 |ingress::hdr.inner_tcp.data_offset |[-1r, 14w] |H6 |H |[15:12] |
768 |ingress::hdr.inner_tcp.res |[-1r, 14w] |H6 |H |[11:8] |
769 |ingress::hdr.inner_tcp.flags |[-1r, 14w] |H6 |H |[7:0] |
770 |ingress::hdr.inner_tcp.window |[-1r, 14w] |MH11 |MH | |
771 |ingress::hdr.inner_tcp.checksum |[-1r, 14w] |MH14 |MH | |
772 |ingress::hdr.inner_tcp.urgent_ptr |[-1r, 14w] |MH12 |MH | |
773 |ingress::hdr.inner_udp.src_port |[-1r, 14w] |MH12 |MH | |
774 |ingress::hdr.inner_udp.dst_port |[-1r, 14w] |MH11 |MH | |
775 |ingress::hdr.inner_udp.hdr_length |[-1r, 14w] |H6 |H | |
776 |ingress::hdr.inner_udp.checksum |[-1r, 14w] |MH14 |MH | |
777 |ingress::hdr.inner_icmp.type |[-1r, 14w] |MH12 |MH |[15:8] |
778 |ingress::hdr.inner_icmp.code |[-1r, 14w] |MH12 |MH |[7:0] |
779 |ingress::hdr.inner_icmp.hdr_checksum |[-1r, 14w] |MH14 |MH | |
780 |ingress::hdr.inner_icmp.data[31:16] |[-1r, 14w] |MH11 |MH | |
781 |ingress::hdr.inner_icmp.data[15:0] |[-1r, 14w] |H6 |H | |
782 |ingress::hdr.inner_ipv6.version |[-1r, 14w] |W13 |W |[31:28] |
783 |ingress::hdr.inner_ipv6.traffic_class |[-1r, 14w] |W13 |W |[27:20] |
784 |ingress::hdr.inner_ipv6.flow_label |[-1r, 14w] |W13 |W |[19:0] |
785 |ingress::hdr.inner_ipv6.payload_len |[-1r, 14w] |H2 |H | |
786 |ingress::hdr.inner_ipv6.next_hdr |[-1r, 14w] |MB2 |MB | |
787 |ingress::hdr.inner_ipv6.hop_limit[0] |[-1r, 14w] |MB0 |MB |[0] |
788 |ingress::hdr.inner_ipv6.hop_limit[7:1] |[-1r, 14w] |MB0 |MB |[7:1] |
789 |ingress::hdr.inner_ipv6.src_addr[23:16] |[6w, 8r] |DB0 |DB | |
790 |ingress::hdr.inner_ipv6.src_addr[31:24] |[-1r, 14w] |MB10 |MB | |
791 |ingress::hdr.inner_ipv6.src_addr[15:0] |[-1r, 14w] |MH9 |MH | |
792 |ingress::hdr.inner_ipv6.src_addr[111:96] |[-1r, 14w] |MW2 |MW |[15:0] |
793 |ingress::hdr.inner_ipv6.src_addr[127:112] |[-1r, 14w] |MW2 |MW |[31:16] |
794 |ingress::hdr.inner_ipv6.src_addr[63:32] |[-1r, 14w] |MW5 |MW | |
795 |ingress::hdr.inner_ipv6.src_addr[95:64] |[-1r, 14w] |MW9 |MW | |
796 |ingress::hdr.inner_ipv6.src_addr[23:16] |[-1w, 6r] |B9 |B | |
797 |ingress::hdr.inner_ipv6.src_addr[23:16] |[8w, 14r] |B9 |B | |
798 |ingress::hdr.inner_ipv6.dst_addr[31:24] |[-1r, 14w] |MB9 |MB | |
799 |ingress::hdr.inner_ipv6.dst_addr[15:0] |[-1r, 14w] |MH8 |MH | |
800 |ingress::hdr.inner_ipv6.dst_addr[111:96] |[-1r, 14w] |MW0 |MW |[15:0] |
801 |ingress::hdr.inner_ipv6.dst_addr[127:112] |[-1r, 14w] |MW0 |MW |[31:16] |
802 |ingress::hdr.inner_ipv6.dst_addr[63:32] |[-1r, 14w] |MW4 |MW | |
803 |ingress::hdr.inner_ipv6.dst_addr[95:64] |[-1r, 14w] |MW8 |MW | |
804 |ingress::hdr.inner_ipv6.dst_addr[23:16] |[-1r, 14w] |B8 |B | |
805 |ingress::hdr.geneve_opts.oxg_ext_tag.class |[-1r, 14w] |W1 |W |[31:16] |
806 |ingress::hdr.geneve_opts.oxg_ext_tag.crit |[-1r, 14w] |W1 |W |[15] |
807 |ingress::hdr.geneve_opts.oxg_ext_tag.type |[-1r, 14w] |W1 |W |[14:8] |
808 |ingress::hdr.geneve_opts.oxg_ext_tag.reserved |[-1r, 14w] |W1 |W |[7:5] |
809 |ingress::hdr.geneve_opts.oxg_ext_tag.opt_len |[-1r, 14w] |W1 |W |[4:0] |
810 |ingress::hdr.ipv6.version |[-1r, 14w] |W15 |W |[31:28] |
811 |ingress::hdr.ipv6.traffic_class |[-1r, 14w] |W15 |W |[27:20] |
812 |ingress::hdr.ipv6.flow_label |[-1r, 14w] |W15 |W |[19:0] |
813 |ingress::hdr.ipv6.payload_len |[-1r, 14w] |H3 |H | |
814 |ingress::hdr.ipv6.next_hdr |[-1r, 14w] |MB3 |MB | |
815 |ingress::hdr.ipv6.hop_limit[0] |[-1r, 14w] |B2 |B |[0] |
816 |ingress::hdr.ipv6.hop_limit[7:1] |[-1r, 14w] |B2 |B |[7:1] |
817 |ingress::hdr.ipv6.src_addr[31:24] |[-1r, 14w] |MB11 |MB | |
818 |ingress::hdr.ipv6.src_addr[15:0] |[-1r, 14w] |MH10 |MH | |
819 |ingress::hdr.ipv6.src_addr[111:96] |[-1r, 14w] |MW3 |MW |[15:0] |
820 |ingress::hdr.ipv6.src_addr[127:112] |[-1r, 14w] |MW3 |MW |[31:16] |
821 |ingress::hdr.ipv6.src_addr[63:32] |[-1r, 14w] |MW6 |MW | |
822 |ingress::hdr.ipv6.src_addr[95:64] |[-1r, 14w] |MW10 |MW | |
823 |ingress::hdr.ipv6.src_addr[23:16] |[-1r, 14w] |B11 |B | |
824 |ingress::hdr.ipv6.dst_addr[111:96] |[-1r, 14w] |MW1 |MW |[15:0] |
825 |ingress::hdr.ipv6.dst_addr[127:112] |[-1r, 14w] |MW1 |MW |[31:16] |
826 |ingress::hdr.ipv6.dst_addr[23:16] |[-1r, 14w] |B10 |B | |
827 |ingress::hdr.ipv6.dst_addr[31:24] |[-1r, 14w] |B24 |B | |
828 |ingress::hdr.ipv6.dst_addr[15:0] |[-1r, 14w] |H24 |H | |
829 |ingress::hdr.ipv6.dst_addr[63:32] |[-1r, 14w] |W12 |W | |
830 |ingress::hdr.ipv6.dst_addr[95:64] |[-1r, 14w] |W24 |W | |
831 |ingress::ig_intr_md_for_tm.ucast_egress_port |[-1r, 14w] |H11 |H |[8:0] |
832 |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |[-1r, 14w] |W0 |W |[1] |
833 |$tmp9 |[-1r, 14w] |W3 |W |[7:0] |
834 |ingress::l3_router_fwd.is_hit |[6w, 8r] |B9 |B |[0] |
835 |ingress::l3_router_fwd.ecmp_hash |[-1r, 14w] |W2 |W |[7:0] |
836 |ingress::l3_router_fwd.idx[7:0] |[-1r, 14w] |H8 |H |[7:0] |
837 |ingress::l3_router_fwd.idx[15:8] |[-1r, 14w] |H8 |H |[15:8] |
838 |ingress::l3_router_fwd.slots |[5w, 9r] |H27 |H |[7:0] |
839 |ingress::l3_router_fwd.slot[7:0] |[-1r, 14w] |MH1 |MH |[7:0] |
840 |ingress::l3_router_fwd.slot[15:8] |[-1r, 14w] |MH1 |MH |[15:8] |
841 |$tmp10 |[-1r, 14w] |W8 |W |[7:0] |
842 |ingress::ig_intr_md_for_dprsr.drop_ctl |[-1r, 14w] |H4 |H |[3:1] |
843 |ingress::ig_intr_md_for_dprsr.mirror_type |[-1r, 14w] |MB1 |MB |[3:0] |
844 |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |[-1r, 14w] |W0 |W |[2] |
845 |ingress::hdr.udp.checksum.$deparse_original_csum |[-1r, 14w] |B1 |B |[0] |
846 |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |[-1r, 14w] |B1 |B |[1] |
847 |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |[-1r, 14w] |B1 |B |[2] |
848 |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |[-1r, 14w] |B1 |B |[3] |
849 |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |[-1r, 14w] |B1 |B |[4] |
850 |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |[-1r, 14w] |B1 |B |[5] |
851 |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |[-1r, 14w] |B1 |B |[6] |
852 |ingress::$tmp6 |[-1r, 14w] |B0 |B | |
853 |egress::eg_intr_md_for_dprsr.drop_ctl |[-1r, 14w] |MB4 |MB |[2:0] |
854 |egress::eg_intr_md_for_dprsr.mirror_io_select |[-1r, 14w] |MB5 |MB |[0] |
855 |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |[-1r, 14w] |B4 |B |[0] |
856 |egress::eg_intr_md.egress_port |[-1r, 14w] |MH3 |MH |[8:0] |
857 |egress::eg_intr_md.egress_port.$valid |[-1r, 14w] |B4 |B |[1] |
858 |egress::meta.bridge_hdr.nat_egress_hit |[-1r, 14w] |W11 |W |[17] |
859 |egress::hdr.ethernet.src_mac[47:32] |[-1r, 14w] |MH20 |MH | |
860 |egress::hdr.ethernet.src_mac[31:0] |[-1r, 14w] |MW15 |MW | |
861 |egress::hdr.ipv6.dst_addr[111:96] |[-1r, 14w] |MW14 |MW |[15:0] |
862 |egress::hdr.ipv6.dst_addr[127:112] |[-1r, 14w] |MW14 |MW |[31:16] |
863 |egress::hdr.ipv6.dst_addr[31:0] |[-1r, 14w] |W16 |W | |
864 |egress::hdr.ipv6.dst_addr[63:32] |[-1r, 14w] |W17 |W | |
865 |egress::hdr.ipv6.dst_addr[95:64] |[-1r, 14w] |W18 |W | |
866 |egress::is_link_local_ipv6_mcast_0 |[-1r, 14w] |MB12 |MB |[0] |
867 |egress::meta.drop_reason |[-1r, 14w] |B12 |B | |
868 |egress::eg_intr_md_for_dprsr.drop_ctl.$valid |[-1r, 14w] |B4 |B |[2] |
869 |ingress::meta.bridge_hdr.$valid |[-1r, 14w] |W0 |W |[3] |
870 |ingress::hdr.ethernet.$valid |[-1r, 14w] |W0 |W |[4] |
871 |ingress::hdr.sidecar.$valid |[-1r, 14w] |W0 |W |[5] |
872 |ingress::hdr.vlan.$valid |[-1r, 14w] |W0 |W |[6] |
873 |ingress::hdr.ipv4.$valid |[-1r, 14w] |W0 |W |[7] |
874 |ingress::hdr.icmp.$valid |[-1r, 14w] |W0 |W |[8] |
875 |ingress::hdr.tcp.$valid |[-1r, 14w] |W0 |W |[9] |
876 |ingress::hdr.udp.$valid |[-1r, 14w] |W0 |W |[10] |
877 |ingress::hdr.geneve.$valid |[-1r, 14w] |W0 |W |[11] |
878 |ingress::hdr.inner_eth.$valid |[-1r, 14w] |W0 |W |[12] |
879 |ingress::hdr.inner_ipv4.$valid |[-1r, 14w] |W0 |W |[13] |
880 |ingress::hdr.inner_tcp.$valid |[-1r, 14w] |W0 |W |[14] |
881 |ingress::hdr.inner_udp.$valid |[-1r, 14w] |W0 |W |[15] |
882 |ingress::hdr.inner_icmp.$valid |[-1r, 14w] |W0 |W |[16] |
883 |ingress::hdr.inner_ipv6.$valid |[-1r, 14w] |W0 |W |[17] |
884 |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |[-1r, 14w] |W0 |W |[18] |
885 |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |[-1r, 14w] |W0 |W |[19] |
886 |ingress::hdr.geneve_opts.oxg_mcast.$valid |[-1r, 14w] |W0 |W |[20] |
887 |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |[-1r, 14w] |W0 |W |[21] |
888 |ingress::hdr.geneve_opts.oxg_mss.$valid |[-1r, 14w] |W0 |W |[22] |
889 |ingress::hdr.ipv6.$valid |[-1r, 14w] |W0 |W |[23] |
890 |ingress::hdr.arp.$valid |[-1r, 14w] |W0 |W |[24] |
891 |egress::hdr.ethernet.$valid |[-1r, 14w] |B4 |B |[3] |
892 |egress::hdr.vlan.$valid |[-1r, 14w] |B4 |B |[4] |
893 |egress::hdr.ipv4.$valid |[-1r, 14w] |B4 |B |[5] |
894 |egress::hdr.udp.$valid |[-1r, 14w] |B4 |B |[6] |
895 |egress::hdr.geneve.$valid |[-1r, 14w] |B4 |B |[7] |
896 |egress::hdr.inner_eth.$valid |[-1r, 14w] |MH0 |MH |[0] |
897 |egress::hdr.inner_ipv4.$valid |[-1r, 14w] |MH0 |MH |[1] |
898 |egress::hdr.inner_tcp.$valid |[-1r, 14w] |MH0 |MH |[2] |
899 |egress::hdr.inner_udp.$valid |[-1r, 14w] |MH0 |MH |[3] |
900 |egress::hdr.inner_ipv6.$valid |[-1r, 14w] |MH0 |MH |[4] |
901 |egress::hdr.geneve_opts.oxg_ext_tag.$valid |[-1r, 14w] |MH0 |MH |[5] |
902 |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |[-1r, 14w] |MH0 |MH |[6] |
903 |egress::hdr.geneve_opts.oxg_mcast.$valid |[-1r, 14w] |MH0 |MH |[7] |
904 |egress::hdr.geneve_opts.oxg_mss_tag.$valid |[-1r, 14w] |MH0 |MH |[8] |
905 |egress::hdr.geneve_opts.oxg_mss.$valid |[-1r, 14w] |MH0 |MH |[9] |
906 |egress::hdr.ipv6.$valid |[-1r, 14w] |MH0 |MH |[10] |
907 +--------------------------------------------------------+------------+-----------+----------------+-----------------+
908 
909 
910 
911 
912 
913 PHV Allocation State
914 
915 MAU Groups:
916 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
917 | Container Set | Containers Used | Bits Used | Bits Used on Ingress | Bits Used on Egress | Bits Allocated | Bits Allocated on Ingress | Bits Allocated on Egress | Available Bits |
918 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
919 | B0-11 | 11 ( 91.7 %) | 88 ( 91.7 %) | 80 ( 83.3 %) | 8 ( 8.33 %) | 131 ( 136 %) | 123 ( 128 %) | 8 ( 8.33 %) | 96 |
920 | MB0-3 | 4 ( 100 %) | 28 ( 87.5 %) | 28 ( 87.5 %) | 0 ( 0 %) | 52 ( 162 %) | 52 ( 162 %) | 0 ( 0 %) | 32 |
921 | DB0-3 | 1 ( 25 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 32 |
922 | | | | | | | | | |
923 | Usage for Group 1 | 16 ( 80 %) | 124 ( 77.5 %) | 116 ( 72.5 %) | 8 ( 5 %) | 191 ( 119 %) | 183 ( 114 %) | 8 ( 5 %) | 160 |
924 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
925 | B12-23 | 1 ( 8.33 %) | 8 ( 8.33 %) | 0 ( 0 %) | 8 ( 8.33 %) | 8 ( 8.33 %) | 0 ( 0 %) | 8 ( 8.33 %) | 96 |
926 | MB4-7 | 2 ( 50 %) | 4 ( 12.5 %) | 0 ( 0 %) | 4 ( 12.5 %) | 4 ( 12.5 %) | 0 ( 0 %) | 4 ( 12.5 %) | 32 |
927 | DB4-7 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
928 | | | | | | | | | |
929 | Usage for Group 2 | 3 ( 15 %) | 12 ( 7.5 %) | 0 ( 0 %) | 12 ( 7.5 %) | 12 ( 7.5 %) | 0 ( 0 %) | 12 ( 7.5 %) | 160 |
930 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
931 | B24-35 | 3 ( 25 %) | 24 ( 25 %) | 24 ( 25 %) | 0 ( 0 %) | 24 ( 25 %) | 24 ( 25 %) | 0 ( 0 %) | 96 |
932 | MB8-11 | 4 ( 100 %) | 32 ( 100 %) | 32 ( 100 %) | 0 ( 0 %) | 48 ( 150 %) | 48 ( 150 %) | 0 ( 0 %) | 32 |
933 | DB8-11 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
934 | | | | | | | | | |
935 | Usage for Group 3 | 7 ( 35 %) | 56 ( 35 %) | 56 ( 35 %) | 0 ( 0 %) | 72 ( 45 %) | 72 ( 45 %) | 0 ( 0 %) | 160 |
936 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
937 | B36-47 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 96 |
938 | MB12-15 | 1 ( 25 %) | 1 ( 3.12 %) | 0 ( 0 %) | 1 ( 3.12 %) | 1 ( 3.12 %) | 0 ( 0 %) | 1 ( 3.12 %) | 32 |
939 | DB12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
940 | | | | | | | | | |
941 | Usage for Group 4 | 1 ( 5 %) | 1 ( 0.625%) | 0 ( 0 %) | 1 ( 0.625%) | 1 ( 0.625%) | 0 ( 0 %) | 1 ( 0.625%) | 160 |
942 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
943 | H0-11 | 12 ( 100 %) | 188 ( 97.9 %) | 188 ( 97.9 %) | 0 ( 0 %) | 284 ( 148 %) | 284 ( 148 %) | 0 ( 0 %) | 192 |
944 | MH0-3 | 4 ( 100 %) | 45 ( 70.3 %) | 25 ( 39.1 %) | 20 ( 31.2 %) | 45 ( 70.3 %) | 25 ( 39.1 %) | 20 ( 31.2 %) | 64 |
945 | DH0-3 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
946 | | | | | | | | | |
947 | Usage for Group 5 | 16 ( 80 %) | 233 ( 72.8 %) | 213 ( 66.6 %) | 20 ( 6.25 %) | 329 ( 103 %) | 309 ( 96.6 %) | 20 ( 6.25 %) | 320 |
948 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
949 | H12-23 | 6 ( 50 %) | 96 ( 50 %) | 96 ( 50 %) | 0 ( 0 %) | 160 ( 83.3 %) | 160 ( 83.3 %) | 0 ( 0 %) | 192 |
950 | MH4-7 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 |
951 | DH4-7 | 2 ( 50 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 64 |
952 | | | | | | | | | |
953 | Usage for Group 6 | 12 ( 60 %) | 192 ( 60 %) | 192 ( 60 %) | 0 ( 0 %) | 256 ( 80 %) | 256 ( 80 %) | 0 ( 0 %) | 320 |
954 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
955 | H24-35 | 8 ( 66.7 %) | 128 ( 66.7 %) | 128 ( 66.7 %) | 0 ( 0 %) | 200 ( 104 %) | 200 ( 104 %) | 0 ( 0 %) | 192 |
956 | MH8-11 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 176 ( 275 %) | 176 ( 275 %) | 0 ( 0 %) | 64 |
957 | DH8-11 | 2 ( 50 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 64 |
958 | | | | | | | | | |
959 | Usage for Group 7 | 14 ( 70 %) | 224 ( 70 %) | 224 ( 70 %) | 0 ( 0 %) | 408 ( 128 %) | 408 ( 128 %) | 0 ( 0 %) | 320 |
960 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
961 | H36-47 | 3 ( 25 %) | 48 ( 25 %) | 48 ( 25 %) | 0 ( 0 %) | 80 ( 41.7 %) | 80 ( 41.7 %) | 0 ( 0 %) | 192 |
962 | MH12-15 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 176 ( 275 %) | 176 ( 275 %) | 0 ( 0 %) | 64 |
963 | DH12-15 | 1 ( 25 %) | 16 ( 25 %) | 16 ( 25 %) | 0 ( 0 %) | 16 ( 25 %) | 16 ( 25 %) | 0 ( 0 %) | 64 |
964 | | | | | | | | | |
965 | Usage for Group 8 | 8 ( 40 %) | 128 ( 40 %) | 128 ( 40 %) | 0 ( 0 %) | 272 ( 85 %) | 272 ( 85 %) | 0 ( 0 %) | 320 |
966 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
967 | H48-59 | 1 ( 8.33 %) | 16 ( 8.33 %) | 16 ( 8.33 %) | 0 ( 0 %) | 16 ( 8.33 %) | 16 ( 8.33 %) | 0 ( 0 %) | 192 |
968 | MH16-19 | 3 ( 75 %) | 48 ( 75 %) | 48 ( 75 %) | 0 ( 0 %) | 48 ( 75 %) | 48 ( 75 %) | 0 ( 0 %) | 64 |
969 | DH16-19 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
970 | | | | | | | | | |
971 | Usage for Group 9 | 4 ( 20 %) | 64 ( 20 %) | 64 ( 20 %) | 0 ( 0 %) | 64 ( 20 %) | 64 ( 20 %) | 0 ( 0 %) | 320 |
972 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
973 | H60-71 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 192 |
974 | MH20-23 | 1 ( 25 %) | 16 ( 25 %) | 0 ( 0 %) | 16 ( 25 %) | 16 ( 25 %) | 0 ( 0 %) | 16 ( 25 %) | 64 |
975 | DH20-23 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
976 | | | | | | | | | |
977 | Usage for Group 10 | 1 ( 5 %) | 16 ( 5 %) | 0 ( 0 %) | 16 ( 5 %) | 16 ( 5 %) | 0 ( 0 %) | 16 ( 5 %) | 320 |
978 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
979 | W0-11 | 12 ( 100 %) | 350 ( 91.1 %) | 349 ( 90.9 %) | 1 ( 0.26 %) | 502 ( 131 %) | 501 ( 130 %) | 1 ( 0.26 %) | 384 |
980 | MW0-3 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 256 ( 200 %) | 256 ( 200 %) | 0 ( 0 %) | 128 |
981 | DW0-3 | 2 ( 50 %) | 64 ( 50 %) | 64 ( 50 %) | 0 ( 0 %) | 64 ( 50 %) | 64 ( 50 %) | 0 ( 0 %) | 128 |
982 | | | | | | | | | |
983 | Usage for Group 11 | 18 ( 90 %) | 542 ( 84.7 %) | 541 ( 84.5 %) | 1 ( 0.156%) | 822 ( 128 %) | 821 ( 128 %) | 1 ( 0.156%) | 640 |
984 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
985 | W12-23 | 8 ( 66.7 %) | 256 ( 66.7 %) | 160 ( 41.7 %) | 96 ( 25 %) | 256 ( 66.7 %) | 160 ( 41.7 %) | 96 ( 25 %) | 384 |
986 | MW4-7 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 160 ( 125 %) | 160 ( 125 %) | 0 ( 0 %) | 128 |
987 | DW4-7 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 |
988 | | | | | | | | | |
989 | Usage for Group 12 | 12 ( 60 %) | 384 ( 60 %) | 288 ( 45 %) | 96 ( 15 %) | 416 ( 65 %) | 320 ( 50 %) | 96 ( 15 %) | 640 |
990 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
991 | W24-35 | 4 ( 33.3 %) | 128 ( 33.3 %) | 128 ( 33.3 %) | 0 ( 0 %) | 128 ( 33.3 %) | 128 ( 33.3 %) | 0 ( 0 %) | 384 |
992 | MW8-11 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 |
993 | DW8-11 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 |
994 | | | | | | | | | |
995 | Usage for Group 13 | 8 ( 40 %) | 256 ( 40 %) | 256 ( 40 %) | 0 ( 0 %) | 256 ( 40 %) | 256 ( 40 %) | 0 ( 0 %) | 640 |
996 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
997 | W36-47 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 384 |
998 | MW12-15 | 4 ( 100 %) | 128 ( 100 %) | 64 ( 50 %) | 64 ( 50 %) | 192 ( 150 %) | 128 ( 100 %) | 64 ( 50 %) | 128 |
999 | DW12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 |
1000 | | | | | | | | | |
1001 | Usage for Group 14 | 4 ( 20 %) | 128 ( 20 %) | 64 ( 10 %) | 64 ( 10 %) | 192 ( 30 %) | 128 ( 20 %) | 64 ( 10 %) | 640 |
1002 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1003 | Usage for 8b | 27 ( 33.8 %) | 193 ( 30.2 %) | 172 ( 26.9 %) | 21 ( 3.28 %) | 276 ( 43.1 %) | 255 ( 39.8 %) | 21 ( 3.28 %) | 640 |
1004 | Usage for 16b | 55 ( 45.8 %) | 857 ( 44.6 %) | 821 ( 42.8 %) | 36 ( 1.88 %) | 1345 ( 70.1 %) | 1309 ( 68.2 %) | 36 ( 1.88 %) | 1920 |
1005 | Usage for 32b | 42 ( 52.5 %) | 1310 ( 51.2 %) | 1149 ( 44.9 %) | 161 ( 6.29 %) | 1686 ( 65.9 %) | 1525 ( 59.6 %) | 161 ( 6.29 %) | 2560 |
1006 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1007 | Usage for dark | 8 ( 14.3 %) | 152 ( 14.8 %) | 152 ( 14.8 %) | 0 ( 0 %) | 152 ( 14.8 %) | 152 ( 14.8 %) | 0 ( 0 %) | 1024 |
1008 | Usage for mocha | 47 ( 83.9 %) | 878 ( 85.7 %) | 773 ( 75.5 %) | 105 ( 10.3 %) | 1366 ( 133 %) | 1261 ( 123 %) | 105 ( 10.3 %) | 1024 |
1009 | Usage for normal | 69 ( 41.1 %) | 1330 ( 43.3 %) | 1217 ( 39.6 %) | 113 ( 3.68 %) | 1789 ( 58.2 %) | 1676 ( 54.6 %) | 113 ( 3.68 %) | 3072 |
1010 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1011 | Overall PHV Usage | 124 ( 44.3 %) | 2360 ( 46.1 %) | 2142 ( 41.8 %) | 218 ( 4.26 %) | 3307 ( 64.6 %) | 3089 ( 60.3 %) | 218 ( 4.26 %) | 5120 |
1012 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1013 
1014 
1015 
1016