Max level shown:
1 PHV ALLOCATION SUCCESSFUL
2 PHV Allocation
3 +-----------+-------+-----------------+--------------------------------------------------------+
4 |Container |Gress |Container Slice |Field Slice |
5 +-----------+-------+-----------------+--------------------------------------------------------+
6 |B0 |I | |ingress::$tmp6 |
7 | | | | |
8 |MB0 |I |[0] |ingress::hdr.inner_ipv4.ttl[0] |
9 | | |[7:1] |ingress::hdr.inner_ipv4.ttl[7:1] |
10 | | |[0] |ingress::hdr.inner_ipv6.hop_limit[0] |
11 | | |[7:1] |ingress::hdr.inner_ipv6.hop_limit[7:1] |
12 | | | | |
13 |... | | | |
14 | | | | |
15 |B1 |I |[0] |ingress::hdr.inner_ipv6.$valid |
16 | | |[1] |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |
17 | | |[2] |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |
18 | | |[3] |ingress::hdr.geneve_opts.oxg_mcast.$valid |
19 | | |[4] |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |
20 | | |[5] |ingress::hdr.geneve_opts.oxg_mss.$valid |
21 | | |[6] |ingress::hdr.ipv6.$valid |
22 | | |[7] |ingress::hdr.arp.$valid |
23 | | | | |
24 |MB1 |I |[3:0] |ingress::ig_intr_md_for_dprsr.mirror_type |
25 | | | | |
26 |... | | | |
27 | | | | |
28 |B2 |I |[0] |ingress::hdr.vlan.$valid |
29 | | |[1] |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |
30 | | |[2] |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |
31 | | |[5:3] |ingress::ig_intr_md_for_dprsr.drop_ctl |
32 | | |[6] |ingress::meta.resolve_nexthop |
33 | | |[7] |ingress::meta.nexthop_is_v6 |
34 | | | | |
35 |MB2 |I | |ingress::hdr.inner_ipv4.protocol |
36 | | | |ingress::hdr.inner_ipv6.next_hdr |
37 | | | | |
38 |... | | | |
39 | | | | |
40 |B3 |I |[0] |ingress::hdr.udp.checksum.$deparse_original_csum |
41 | | |[1] |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |
42 | | |[2] |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |
43 | | |[3] |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |
44 | | |[4] |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |
45 | | |[5] |ingress::meta.is_link_local_mcastv6 |
46 | | |[6] |ingress::meta.is_switch_address |
47 | | |[7] |ingress::meta.is_mcast |
48 | | | | |
49 |MB3 |I | |ingress::hdr.ipv4.protocol |
50 | | | |ingress::hdr.ipv6.next_hdr |
51 | | | | |
52 |... | | | |
53 | | | | |
54 |B4 |E |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |
55 | | |[1] |egress::eg_intr_md.egress_port.$valid |
56 | | |[2] |egress::eg_intr_md_for_dprsr.drop_ctl.$valid |
57 | | |[3] |egress::hdr.ethernet.$valid |
58 | | |[4] |egress::hdr.vlan.$valid |
59 | | |[5] |egress::hdr.ipv4.$valid |
60 | | |[6] |egress::hdr.udp.$valid |
61 | | |[7] |egress::hdr.geneve.$valid |
62 | | | | |
63 |B5 |I |[0] |ingress::meta.route_ttl_is_1[0] |
64 | | |[7:1] |ingress::meta.route_ttl_is_1[7:1] |
65 | | | | |
66 |B6 |I | |$tmp9 |
67 | | | |$tmp10 |
68 | | | | |
69 |B7 |I | |ingress::l3_router_fwd.ecmp_hash |
70 | | | | |
71 |B8 |I |[0] |ingress::hdr.ipv4.ttl[0] |
72 | | |[7:1] |ingress::hdr.ipv4.ttl[7:1] |
73 | | |[0] |ingress::hdr.ipv6.hop_limit[0] |
74 | | |[7:1] |ingress::hdr.ipv6.hop_limit[7:1] |
75 | | | | |
76 |B9 |I |[0] |ingress::meta.bridge_hdr.is_mcast_routed |
77 | | |[1] |ingress::meta.bridge_hdr.nat_egress_hit |
78 | | |[6:2] |ingress::meta.bridge_hdr.reserved |
79 | | |[7] |ingress::meta.bridge_hdr.__pad_0 |
80 | | |[7] |ingress::meta.nat_egress_hit |
81 | | |[1] |ingress::meta.uplink_ingress |
82 | | | | |
83 |B10 |I | |ingress::meta.nat_ingress_csum[15:8] |
84 | | | | |
85 |B11 |E | |egress::meta.drop_reason |
86 | | | | |
87 |MB4 |E |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select |
88 | | | | |
89 |... | | | |
90 | | | | |
91 |MB8 |I | |ingress::hdr.ethernet.src_mac[7:0] |
92 | | | |ingress::hdr.ethernet.src_mac[7:0] ARA |
93 | | | |ingress::l3_router_fwd.slots ARA |
94 | | | | |
95 |DB8 |I | |ingress::hdr.ethernet.src_mac[7:0] ARA |
96 | | | | |
97 |MB9 |E |[0] |egress::is_link_local_ipv6_mcast_0 |
98 | | | | |
99 |... | | | |
100 | | | | |
101 |H0 |I | |ingress::meta.icmp_csum |
102 | | | | |
103 |MH0 |E |[0] |egress::hdr.inner_eth.$valid |
104 | | |[1] |egress::hdr.inner_ipv4.$valid |
105 | | |[2] |egress::hdr.inner_tcp.$valid |
106 | | |[3] |egress::hdr.inner_udp.$valid |
107 | | |[4] |egress::hdr.inner_ipv6.$valid |
108 | | |[5] |egress::hdr.geneve_opts.oxg_ext_tag.$valid |
109 | | |[6] |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |
110 | | |[7] |egress::hdr.geneve_opts.oxg_mcast.$valid |
111 | | |[8] |egress::hdr.geneve_opts.oxg_mss_tag.$valid |
112 | | |[9] |egress::hdr.geneve_opts.oxg_mss.$valid |
113 | | |[10] |egress::hdr.ipv6.$valid |
114 | | | | |
115 |... | | | |
116 | | | | |
117 |H1 |I | |ingress::meta.body_checksum |
118 | | | | |
119 |MH1 |I |[8:0] |ingress::ig_intr_md.ingress_port |
120 | | | | |
121 |... | | | |
122 | | | | |
123 |H2 |I |[0] |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |
124 | | |[1] |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |
125 | | |[2] |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |
126 | | |[3] |ingress::meta.bridge_hdr.$valid |
127 | | |[4] |ingress::hdr.ethernet.$valid |
128 | | |[5] |ingress::hdr.sidecar.$valid |
129 | | |[6] |ingress::hdr.ipv4.$valid |
130 | | |[7] |ingress::hdr.icmp.$valid |
131 | | |[8] |ingress::hdr.tcp.$valid |
132 | | |[9] |ingress::hdr.udp.$valid |
133 | | |[10] |ingress::hdr.geneve.$valid |
134 | | |[11] |ingress::hdr.inner_eth.$valid |
135 | | |[12] |ingress::hdr.inner_ipv4.$valid |
136 | | |[13] |ingress::hdr.inner_tcp.$valid |
137 | | |[14] |ingress::hdr.inner_udp.$valid |
138 | | |[15] |ingress::hdr.inner_icmp.$valid |
139 | | | | |
140 |MH2 |E |[8:0] |egress::eg_intr_md.egress_port |
141 | | | | |
142 |... | | | |
143 | | | | |
144 |H3 |I | |ingress::hdr.inner_ipv4.total_len |
145 | | | |ingress::hdr.inner_ipv6.payload_len |
146 | | | | |
147 |MH3 |E |[2:0] |egress::eg_intr_md_for_dprsr.drop_ctl |
148 | | | | |
149 |... | | | |
150 | | | | |
151 |H4 |I |[0] |ingress::meta.ipv4_checksum_err |
152 | | |[8:1] |ingress::meta.drop_reason |
153 | | |[9] |ingress::meta.dropped |
154 | | |[10] |ingress::meta.service_routed |
155 | | |[11] |ingress::meta.icmp_recalc |
156 | | | | |
157 |H5 |I | |ingress::hdr.ipv4.total_len |
158 | | | |ingress::hdr.ipv6.payload_len |
159 | | | | |
160 |H6 |I | |ingress::meta.l4_length |
161 | | | | |
162 |H7 |I | |ingress::hdr.inner_udp.hdr_length |
163 | | | |ingress::hdr.inner_icmp.data[15:0] |
164 | | | |ingress::hdr.icmp.data[15:0] |
165 | | |[7:0] |ingress::hdr.inner_tcp.flags |
166 | | |[11:8] |ingress::hdr.inner_tcp.res |
167 | | |[15:12] |ingress::hdr.inner_tcp.data_offset |
168 | | |[7:0] |ingress::hdr.tcp.flags |
169 | | |[11:8] |ingress::hdr.tcp.res |
170 | | |[15:12] |ingress::hdr.tcp.data_offset |
171 | | | | |
172 |H8 |I | |ingress::hdr.udp.hdr_length |
173 | | | | |
174 |H9 |I |[8:0] |ingress::hdr.sidecar.sc_egress[8:0] |
175 | | |[15:9] |ingress::hdr.sidecar.sc_egress[15:9] |
176 | | | | |
177 |H10 |I |[8:0] |ingress::hdr.sidecar.sc_ingress[8:0] |
178 | | |[15:9] |ingress::hdr.sidecar.sc_ingress[15:9] |
179 | | | | |
180 |H11 |I |[8:0] |ingress::ig_intr_md_for_tm.ucast_egress_port |
181 | | |[9] |ingress::l3_router_fwd.is_hit |
182 | | |[10] |ingress::meta.encap_needed |
183 | | |[11] |ingress::meta.nat_ingress_hit |
184 | | | | |
185 |MH4 |I |[7:0] |ingress::l3_router_fwd.slot[7:0] |
186 | | |[15:8] |ingress::l3_router_fwd.slot[15:8] |
187 | | | | |
188 |DH4 |I | |ingress::hdr.inner_eth.ether_type ARA |
189 | | | | |
190 |MH5 |I | |ingress::hdr.inner_eth.src_mac[15:0] |
191 | | | | |
192 |DH5 |I | |ingress::hdr.inner_eth.dst_mac[47:32] ARA |
193 | | | | |
194 |MH6 |I | |ingress::hdr.sidecar.sc_ether_type |
195 | | | | |
196 |... | | | |
197 | | | | |
198 |MH7 |I | |ingress::hdr.ethernet.ether_type |
199 | | | | |
200 |... | | | |
201 | | | | |
202 |H12 |I |[7:0] |ingress::l3_router_fwd.idx[7:0] |
203 | | |[15:8] |ingress::l3_router_fwd.idx[15:8] |
204 | | | | |
205 |H13 |I |[11:0] |ingress::hdr.vlan.vlan_id |
206 | | |[12] |ingress::hdr.vlan.dei |
207 | | |[15:13] |ingress::hdr.vlan.pcp |
208 | | | | |
209 |H14 |I | |ingress::hdr.sidecar.sc_payload[127:112] |
210 | | | | |
211 |H15 |I | |ingress::hdr.vlan.ether_type |
212 | | | | |
213 |H16 |I | |ingress::meta.nexthop[127:112] ARA |
214 | | | |ingress::hdr.inner_eth.ether_type |
215 | | | |ingress::hdr.inner_eth.ether_type ARA |
216 | | | | |
217 |H17 |I |[7:0] |ingress::hdr.inner_ipv4.diffserv |
218 | | |[11:8] |ingress::hdr.inner_ipv4.ihl |
219 | | |[15:12] |ingress::hdr.inner_ipv4.version |
220 | | | | |
221 |H18 |I |[7:0] |ingress::hdr.ipv4.diffserv |
222 | | |[11:8] |ingress::hdr.ipv4.ihl |
223 | | |[15:12] |ingress::hdr.ipv4.version |
224 | | | | |
225 |H19 |I | |ingress::hdr.inner_eth.dst_mac[47:32] |
226 | | | |ingress::hdr.inner_eth.dst_mac[47:32] ARA |
227 | | | |ingress::meta.nexthop[111:96] ARA |
228 | | | | |
229 |H20 |I | |ingress::meta.nat_inner_mac[47:32] |
230 | | | | |
231 |H21 |I | |ingress::hdr.sidecar.sc_payload[111:96] |
232 | | | | |
233 |... | | | |
234 | | | | |
235 |MH8 |I | |ingress::hdr.inner_icmp.data[31:16] |
236 | | | |ingress::hdr.icmp.data[31:16] |
237 | | | |ingress::hdr.inner_tcp.window |
238 | | | |ingress::hdr.tcp.window |
239 | | | |ingress::hdr.inner_udp.dst_port |
240 | | | | |
241 |... | | | |
242 | | | | |
243 |MH9 |I | |ingress::hdr.udp.dst_port |
244 | | | | |
245 |... | | | |
246 | | | | |
247 |MH10 |I | |ingress::hdr.inner_udp.src_port |
248 | | | |ingress::hdr.inner_tcp.urgent_ptr |
249 | | | |ingress::hdr.tcp.urgent_ptr |
250 | | |[7:0] |ingress::hdr.inner_icmp.code |
251 | | |[15:8] |ingress::hdr.inner_icmp.type |
252 | | | | |
253 |... | | | |
254 | | | | |
255 |MH11 |I | |ingress::hdr.udp.src_port |
256 | | | | |
257 |... | | | |
258 | | | | |
259 |H24 |I | |ingress::meta.l4_dst_port |
260 | | | | |
261 |H25 |I |[7:0] |ingress::hdr.icmp.code |
262 | | |[15:8] |ingress::hdr.icmp.type |
263 | | | | |
264 |... | | | |
265 | | | | |
266 |H28 |I | |ingress::meta.l4_src_port |
267 | | | | |
268 |... | | | |
269 | | | | |
270 |MH12 |I | |ingress::hdr.inner_tcp.checksum |
271 | | | |ingress::hdr.tcp.checksum |
272 | | | |ingress::hdr.inner_udp.checksum |
273 | | | |ingress::hdr.inner_icmp.hdr_checksum |
274 | | | |ingress::hdr.icmp.hdr_checksum |
275 | | | | |
276 |... | | | |
277 | | | | |
278 |MH13 |I | |ingress::hdr.ethernet.src_mac[47:32] |
279 | | | | |
280 |... | | | |
281 | | | | |
282 |MH14 |I |[7:0] |ingress::hdr.ethernet.dst_mac[39:32] |
283 | | |[15:8] |ingress::hdr.ethernet.dst_mac[47:40] |
284 | | | | |
285 |... | | | |
286 | | | | |
287 |MH15 |I | |ingress::hdr.udp.checksum |
288 | | | | |
289 |... | | | |
290 | | | | |
291 |H36 |I |[7:0] |ingress::meta.orig_src_mac[39:32] |
292 | | |[15:8] |ingress::meta.orig_src_mac[47:40] |
293 | | | | |
294 |... | | | |
295 | | | | |
296 |MH16 |I | |ingress::hdr.inner_ipv4.hdr_checksum |
297 | | | | |
298 |... | | | |
299 | | | | |
300 |MH17 |I | |ingress::hdr.ipv4.hdr_checksum |
301 | | | | |
302 |... | | | |
303 | | | | |
304 |MH18 |I |[8:0] |ingress::meta.bridge_hdr.ingress_port |
305 | | |[15:9] |ingress::meta.bridge_hdr.__pad_1 |
306 | | | | |
307 |... | | | |
308 | | | | |
309 |MH19 |I |[7:0] |ingress::hdr.sidecar.sc_pad |
310 | | |[15:8] |ingress::hdr.sidecar.sc_code |
311 | | | | |
312 |... | | | |
313 | | | | |
314 |MH20 |E | |egress::hdr.ethernet.src_mac[47:32] |
315 | | | | |
316 |... | | | |
317 | | | | |
318 |MH21 |I |[9:0] |ingress::meta.pkt_type |
319 | | | | |
320 |... | | | |
321 | | | | |
322 |W0 |I |[19:0] |ingress::hdr.inner_ipv6.flow_label |
323 | | |[27:20] |ingress::hdr.inner_ipv6.traffic_class |
324 | | |[31:28] |ingress::hdr.inner_ipv6.version |
325 | | |[12:0] |ingress::hdr.inner_ipv4.frag_offset |
326 | | |[15:13] |ingress::hdr.inner_ipv4.flags |
327 | | |[31:16] |ingress::hdr.inner_ipv4.identification |
328 | | | | |
329 |MW0 |I | |ingress::hdr.inner_ipv4.dst_addr |
330 | | |[15:0] |ingress::hdr.inner_ipv6.dst_addr[111:96] |
331 | | |[31:16] |ingress::hdr.inner_ipv6.dst_addr[127:112] |
332 | | | | |
333 |DW0 |I | |ingress::hdr.inner_eth.dst_mac[31:0] ARA |
334 | | | | |
335 |W1 |I |[4:0] |ingress::hdr.geneve_opts.oxg_ext_tag.opt_len |
336 | | |[7:5] |ingress::hdr.geneve_opts.oxg_ext_tag.reserved |
337 | | |[14:8] |ingress::hdr.geneve_opts.oxg_ext_tag.type |
338 | | |[15] |ingress::hdr.geneve_opts.oxg_ext_tag.crit |
339 | | |[31:16] |ingress::hdr.geneve_opts.oxg_ext_tag.class |
340 | | | | |
341 |MW1 |I | |ingress::hdr.ipv4.dst_addr |
342 | | |[15:0] |ingress::hdr.ipv6.dst_addr[111:96] |
343 | | |[31:16] |ingress::hdr.ipv6.dst_addr[127:112] |
344 | | | | |
345 |... | | | |
346 | | | | |
347 |W2 |I | |ingress::meta.orig_src_ipv4 |
348 | | | | |
349 |MW2 |I | |ingress::hdr.inner_ipv4.src_addr |
350 | | |[15:0] |ingress::hdr.inner_ipv6.src_addr[111:96] |
351 | | |[31:16] |ingress::hdr.inner_ipv6.src_addr[127:112] |
352 | | | | |
353 |... | | | |
354 | | | | |
355 |W3 |I |[15:0] |ingress::meta.nat_ingress_tgt[111:96] |
356 | | |[31:16] |ingress::meta.nat_ingress_tgt[127:112] |
357 | | | | |
358 |MW3 |I | |ingress::hdr.ipv4.src_addr |
359 | | |[15:0] |ingress::hdr.ipv6.src_addr[111:96] |
360 | | |[31:16] |ingress::hdr.ipv6.src_addr[127:112] |
361 | | | | |
362 |... | | | |
363 | | | | |
364 |W4 |I |[19:0] |ingress::hdr.ipv6.flow_label |
365 | | |[27:20] |ingress::hdr.ipv6.traffic_class |
366 | | |[31:28] |ingress::hdr.ipv6.version |
367 | | |[12:0] |ingress::hdr.ipv4.frag_offset |
368 | | |[15:13] |ingress::hdr.ipv4.flags |
369 | | |[31:16] |ingress::hdr.ipv4.identification |
370 | | | | |
371 |W5 |I | |ingress::hdr.inner_tcp.seq_no |
372 | | | |ingress::hdr.tcp.seq_no |
373 | | | | |
374 |W6 |E |[15:0] |egress::hdr.ipv6.dst_addr[111:96] |
375 | | |[31:16] |egress::hdr.ipv6.dst_addr[127:112] |
376 | | | | |
377 |W7 |I | |ingress::meta.nat_inner_mac[31:0] |
378 | | | | |
379 |W8 |I | |ingress::hdr.inner_eth.dst_mac[31:0] |
380 | | | |ingress::hdr.inner_eth.dst_mac[31:0] ARA |
381 | | | |ingress::meta.nexthop[31:0] ARA |
382 | | | | |
383 |W9 |I | |ingress::hdr.sidecar.sc_payload[31:0] |
384 | | | | |
385 |W10 |E | |egress::hdr.ethernet.src_mac[31:0] |
386 | | | | |
387 |W11 |E | |egress::hdr.ipv6.dst_addr[31:0] |
388 | | | | |
389 |MW4 |I | |ingress::hdr.inner_ipv6.dst_addr[31:0] |
390 | | | | |
391 |... | | | |
392 | | | | |
393 |MW5 |I | |ingress::hdr.inner_ipv6.src_addr[31:0] |
394 | | | | |
395 |... | | | |
396 | | | | |
397 |MW6 |I | |ingress::hdr.ipv6.src_addr[31:0] |
398 | | | | |
399 |... | | | |
400 | | | | |
401 |MW7 |I |[15:0] |ingress::hdr.inner_tcp.dst_port |
402 | | |[31:16] |ingress::hdr.inner_tcp.src_port |
403 | | |[15:0] |ingress::hdr.tcp.dst_port |
404 | | |[31:16] |ingress::hdr.tcp.src_port |
405 | | | | |
406 |... | | | |
407 | | | | |
408 |W12 |I | |ingress::hdr.ipv6.dst_addr[31:0] |
409 | | | | |
410 |W13 |I |[15:0] |ingress::hdr.geneve.protocol |
411 | | |[21:16] |ingress::hdr.geneve.reserved |
412 | | |[22] |ingress::hdr.geneve.crit |
413 | | |[23] |ingress::hdr.geneve.ctrl |
414 | | |[29:24] |ingress::hdr.geneve.opt_len |
415 | | |[31:30] |ingress::hdr.geneve.version |
416 | | | | |
417 |W14 |I | |ingress::meta.nat_ingress_tgt[31:0] |
418 | | | | |
419 |W15 |I | |ingress::hdr.sidecar.sc_payload[95:64] |
420 | | | | |
421 |W16 |I | |ingress::meta.nexthop[95:64] |
422 | | | | |
423 |W17 |E | |egress::hdr.ipv6.dst_addr[63:32] |
424 | | | | |
425 |W18 |E | |egress::hdr.ipv6.dst_addr[95:64] |
426 | | | | |
427 |W19 |I | |ingress::meta.orig_dst_ipv4 |
428 | | | | |
429 |W20 |E |[17] |egress::meta.bridge_hdr.nat_egress_hit |
430 | | | | |
431 |... | | | |
432 | | | | |
433 |MW8 |I | |ingress::hdr.inner_ipv6.dst_addr[63:32] |
434 | | | | |
435 |... | | | |
436 | | | | |
437 |MW9 |I | |ingress::hdr.inner_ipv6.src_addr[63:32] |
438 | | | | |
439 |... | | | |
440 | | | | |
441 |MW10 |I | |ingress::hdr.ipv6.src_addr[63:32] |
442 | | | | |
443 |... | | | |
444 | | | | |
445 |MW11 |I |[23:0] |ingress::hdr.ethernet.dst_mac[23:0] |
446 | | |[31:24] |ingress::hdr.ethernet.dst_mac[31:24] |
447 | | | | |
448 |... | | | |
449 | | | | |
450 |W24 |I | |ingress::hdr.ipv6.dst_addr[63:32] |
451 | | | | |
452 |W25 |I |[7:0] |ingress::hdr.geneve.reserved2 |
453 | | |[31:8] |ingress::hdr.geneve.vni |
454 | | | | |
455 |W26 |I | |ingress::meta.nat_ingress_tgt[63:32] |
456 | | | | |
457 |W27 |I |[23:0] |ingress::meta.orig_src_mac[23:0] |
458 | | |[31:24] |ingress::meta.orig_src_mac[31:24] |
459 | | | | |
460 |W28 |I |[31:8] |ingress::meta.nat_geneve_vni |
461 | | |[7:0] |ingress::meta.nat_ingress_csum[7:0] |
462 | | | | |
463 |... | | | |
464 | | | | |
465 |MW12 |I | |ingress::hdr.inner_ipv6.dst_addr[95:64] |
466 | | | | |
467 |DW12 |I | |ingress::hdr.inner_eth.src_mac[47:16] ARA |
468 | | | | |
469 |MW13 |I | |ingress::hdr.inner_ipv6.src_addr[95:64] |
470 | | | | |
471 |... | | | |
472 | | | | |
473 |MW14 |I | |ingress::hdr.ipv6.src_addr[95:64] |
474 | | | | |
475 |... | | | |
476 | | | | |
477 |MW15 |I | |ingress::hdr.inner_tcp.ack_no |
478 | | | |ingress::hdr.tcp.ack_no |
479 | | | | |
480 |... | | | |
481 | | | | |
482 |W36 |I | |ingress::hdr.ipv6.dst_addr[95:64] |
483 | | | | |
484 |W37 |I | |ingress::hdr.inner_eth.src_mac[47:16] |
485 | | | |ingress::hdr.inner_eth.src_mac[47:16] ARA |
486 | | | |ingress::meta.nexthop[63:32] ARA |
487 | | | | |
488 |W38 |I | |ingress::meta.nat_ingress_tgt[95:64] |
489 | | | | |
490 |W39 |I | |ingress::hdr.sidecar.sc_payload[63:32] |
491 | | | | |
492 |... | | | |
493 | | | | |
494 +-----------+-------+-----------------+--------------------------------------------------------+
495 
496 
497 POV Allocation (ingress):
498 +-----------+-----------------+--------------------------------------------------------+
499 |Container |Container Slice |Field Slice |
500 +-----------+-----------------+--------------------------------------------------------+
501 |B1 |[0] |ingress::hdr.inner_ipv6.$valid |
502 | |[1] |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |
503 | |[2] |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |
504 | |[3] |ingress::hdr.geneve_opts.oxg_mcast.$valid |
505 | |[4] |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |
506 | |[5] |ingress::hdr.geneve_opts.oxg_mss.$valid |
507 | |[6] |ingress::hdr.ipv6.$valid |
508 | |[7] |ingress::hdr.arp.$valid |
509 +-----------+-----------------+--------------------------------------------------------+
510 |B2 |[0] |ingress::hdr.vlan.$valid |
511 | |[1] |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |
512 | |[2] |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |
513 +-----------+-----------------+--------------------------------------------------------+
514 |B3 |[0] |ingress::hdr.udp.checksum.$deparse_original_csum |
515 | |[1] |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |
516 | |[2] |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |
517 | |[3] |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |
518 | |[4] |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |
519 +-----------+-----------------+--------------------------------------------------------+
520 |H2 |[0] |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |
521 | |[1] |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |
522 | |[2] |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |
523 | |[3] |ingress::meta.bridge_hdr.$valid |
524 | |[4] |ingress::hdr.ethernet.$valid |
525 | |[5] |ingress::hdr.sidecar.$valid |
526 | |[6] |ingress::hdr.ipv4.$valid |
527 | |[7] |ingress::hdr.icmp.$valid |
528 | |[8] |ingress::hdr.tcp.$valid |
529 | |[9] |ingress::hdr.udp.$valid |
530 | |[10] |ingress::hdr.geneve.$valid |
531 | |[11] |ingress::hdr.inner_eth.$valid |
532 | |[12] |ingress::hdr.inner_ipv4.$valid |
533 | |[13] |ingress::hdr.inner_tcp.$valid |
534 | |[14] |ingress::hdr.inner_udp.$valid |
535 | |[15] |ingress::hdr.inner_icmp.$valid |
536 +-----------+-----------------+--------------------------------------------------------+
537 | |Total Bits Used |32 / 128 ( 25 %) |
538 | |Pack Density |32 / 40 ( 80 %) |
539 +-----------+-----------------+--------------------------------------------------------+
540 
541 POV Allocation (egress):
542 +-----------+-----------------+------------------------------------------------------+
543 |Container |Container Slice |Field Slice |
544 +-----------+-----------------+------------------------------------------------------+
545 |MH0 |[0] |egress::hdr.inner_eth.$valid |
546 | |[1] |egress::hdr.inner_ipv4.$valid |
547 | |[2] |egress::hdr.inner_tcp.$valid |
548 | |[3] |egress::hdr.inner_udp.$valid |
549 | |[4] |egress::hdr.inner_ipv6.$valid |
550 | |[5] |egress::hdr.geneve_opts.oxg_ext_tag.$valid |
551 | |[6] |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |
552 | |[7] |egress::hdr.geneve_opts.oxg_mcast.$valid |
553 | |[8] |egress::hdr.geneve_opts.oxg_mss_tag.$valid |
554 | |[9] |egress::hdr.geneve_opts.oxg_mss.$valid |
555 | |[10] |egress::hdr.ipv6.$valid |
556 +-----------+-----------------+------------------------------------------------------+
557 |B4 |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |
558 | |[1] |egress::eg_intr_md.egress_port.$valid |
559 | |[2] |egress::eg_intr_md_for_dprsr.drop_ctl.$valid |
560 | |[3] |egress::hdr.ethernet.$valid |
561 | |[4] |egress::hdr.vlan.$valid |
562 | |[5] |egress::hdr.ipv4.$valid |
563 | |[6] |egress::hdr.udp.$valid |
564 | |[7] |egress::hdr.geneve.$valid |
565 +-----------+-----------------+------------------------------------------------------+
566 | |Total Bits Used |19 / 128 ( 14.8 %) |
567 | |Pack Density |19 / 24 ( 79.2 %) |
568 +-----------+-----------------+------------------------------------------------------+
569 
570 +--------------------------------------------------------+------------+-----------+----------------+-----------------+
571 |Field Slice |Live Range |Container |Container Type |Container Slice |
572 +--------------------------------------------------------+------------+-----------+----------------+-----------------+
573 |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |[-1r, 14w] |H2 |H |[0] |
574 |ingress::ig_intr_md.ingress_port |[-1r, 14w] |MH1 |MH |[8:0] |
575 |ingress::meta.dropped |[-1r, 14w] |H4 |H |[9] |
576 |ingress::meta.ipv4_checksum_err |[-1r, 14w] |H4 |H |[0] |
577 |ingress::meta.is_switch_address |[-1r, 14w] |B3 |B |[6] |
578 |ingress::meta.is_mcast |[-1r, 14w] |B3 |B |[7] |
579 |ingress::meta.is_link_local_mcastv6 |[-1r, 14w] |B3 |B |[5] |
580 |ingress::meta.service_routed |[-1r, 14w] |H4 |H |[10] |
581 |ingress::meta.nat_egress_hit |[-1r, 14w] |B9 |B |[7] |
582 |ingress::meta.nat_ingress_hit |[-1r, 14w] |H11 |H |[11] |
583 |ingress::meta.uplink_ingress |[-1r, 14w] |B9 |B |[1] |
584 |ingress::meta.encap_needed |[-1r, 14w] |H11 |H |[10] |
585 |ingress::meta.resolve_nexthop |[-1r, 14w] |B2 |B |[6] |
586 |ingress::meta.route_ttl_is_1[0] |[-1r, 14w] |B5 |B |[0] |
587 |ingress::meta.route_ttl_is_1[7:1] |[-1r, 14w] |B5 |B |[7:1] |
588 |ingress::meta.nexthop_is_v6 |[-1r, 14w] |B2 |B |[7] |
589 |ingress::meta.nexthop[127:112] |[6w, 12r] |H16 |H | |
590 |ingress::meta.nexthop[111:96] |[5w, 12r] |H19 |H | |
591 |ingress::meta.nexthop[31:0] |[5w, 12r] |W8 |W | |
592 |ingress::meta.nexthop[95:64] |[-1r, 14w] |W16 |W | |
593 |ingress::meta.nexthop[63:32] |[5w, 12r] |W37 |W | |
594 |ingress::meta.pkt_type |[-1r, 14w] |MH21 |MH |[9:0] |
595 |ingress::meta.drop_reason |[-1r, 14w] |H4 |H |[8:1] |
596 |ingress::meta.l4_src_port |[-1r, 14w] |H28 |H | |
597 |ingress::meta.l4_dst_port |[-1r, 14w] |H24 |H | |
598 |ingress::meta.nat_ingress_tgt[111:96] |[-1r, 14w] |W3 |W |[15:0] |
599 |ingress::meta.nat_ingress_tgt[127:112] |[-1r, 14w] |W3 |W |[31:16] |
600 |ingress::meta.nat_ingress_tgt[31:0] |[-1r, 14w] |W14 |W | |
601 |ingress::meta.nat_ingress_tgt[63:32] |[-1r, 14w] |W26 |W | |
602 |ingress::meta.nat_ingress_tgt[95:64] |[-1r, 14w] |W38 |W | |
603 |ingress::meta.nat_inner_mac[47:32] |[-1r, 14w] |H20 |H | |
604 |ingress::meta.nat_inner_mac[31:0] |[-1r, 14w] |W7 |W | |
605 |ingress::meta.nat_geneve_vni |[-1r, 14w] |W28 |W |[31:8] |
606 |ingress::meta.icmp_recalc |[-1r, 14w] |H4 |H |[11] |
607 |ingress::meta.icmp_csum |[-1r, 14w] |H0 |H | |
608 |ingress::meta.body_checksum |[-1r, 14w] |H1 |H | |
609 |ingress::meta.l4_length |[-1r, 14w] |H6 |H | |
610 |ingress::meta.orig_src_mac[39:32] |[-1r, 14w] |H36 |H |[7:0] |
611 |ingress::meta.orig_src_mac[47:40] |[-1r, 14w] |H36 |H |[15:8] |
612 |ingress::meta.orig_src_mac[23:0] |[-1r, 14w] |W27 |W |[23:0] |
613 |ingress::meta.orig_src_mac[31:24] |[-1r, 14w] |W27 |W |[31:24] |
614 |ingress::meta.orig_src_ipv4 |[-1r, 14w] |W2 |W | |
615 |ingress::meta.orig_dst_ipv4 |[-1r, 14w] |W19 |W | |
616 |ingress::meta.bridge_hdr.__pad_0 |[-1r, 14w] |B9 |B |[7] |
617 |ingress::meta.bridge_hdr.reserved |[-1r, 14w] |B9 |B |[6:2] |
618 |ingress::meta.bridge_hdr.nat_egress_hit |[-1r, 14w] |B9 |B |[1] |
619 |ingress::meta.bridge_hdr.is_mcast_routed |[-1r, 14w] |B9 |B |[0] |
620 |ingress::meta.bridge_hdr.__pad_1 |[-1r, 14w] |MH18 |MH |[15:9] |
621 |ingress::meta.bridge_hdr.ingress_port |[-1r, 14w] |MH18 |MH |[8:0] |
622 |ingress::meta.nat_ingress_csum[15:8] |[-1r, 14w] |B10 |B | |
623 |ingress::meta.nat_ingress_csum[7:0] |[-1r, 14w] |W28 |W |[7:0] |
624 |ingress::hdr.ethernet.dst_mac[39:32] |[-1r, 14w] |MH14 |MH |[7:0] |
625 |ingress::hdr.ethernet.dst_mac[47:40] |[-1r, 14w] |MH14 |MH |[15:8] |
626 |ingress::hdr.ethernet.dst_mac[23:0] |[-1r, 14w] |MW11 |MW |[23:0] |
627 |ingress::hdr.ethernet.dst_mac[31:24] |[-1r, 14w] |MW11 |MW |[31:24] |
628 |ingress::hdr.ethernet.src_mac[7:0] |[0w, 9r] |DB8 |DB | |
629 |ingress::hdr.ethernet.src_mac[7:0] |[-1w, 0r] |MB8 |MB | |
630 |ingress::hdr.ethernet.src_mac[7:0] |[9w, 14r] |MB8 |MB | |
631 |ingress::hdr.ethernet.src_mac[47:32] |[-1r, 14w] |MH13 |MH | |
632 |ingress::hdr.ethernet.ether_type |[-1r, 14w] |MH7 |MH | |
633 |ingress::hdr.sidecar.sc_code |[-1r, 14w] |MH19 |MH |[15:8] |
634 |ingress::hdr.sidecar.sc_pad |[-1r, 14w] |MH19 |MH |[7:0] |
635 |ingress::hdr.sidecar.sc_ingress[8:0] |[-1r, 14w] |H10 |H |[8:0] |
636 |ingress::hdr.sidecar.sc_ingress[15:9] |[-1r, 14w] |H10 |H |[15:9] |
637 |ingress::hdr.sidecar.sc_egress[8:0] |[-1r, 14w] |H9 |H |[8:0] |
638 |ingress::hdr.sidecar.sc_egress[15:9] |[-1r, 14w] |H9 |H |[15:9] |
639 |ingress::hdr.sidecar.sc_ether_type |[-1r, 14w] |MH6 |MH | |
640 |ingress::hdr.sidecar.sc_payload[127:112] |[-1r, 14w] |H14 |H | |
641 |ingress::hdr.sidecar.sc_payload[111:96] |[-1r, 14w] |H21 |H | |
642 |ingress::hdr.sidecar.sc_payload[31:0] |[-1r, 14w] |W9 |W | |
643 |ingress::hdr.sidecar.sc_payload[95:64] |[-1r, 14w] |W15 |W | |
644 |ingress::hdr.sidecar.sc_payload[63:32] |[-1r, 14w] |W39 |W | |
645 |ingress::hdr.vlan.pcp |[-1r, 14w] |H13 |H |[15:13] |
646 |ingress::hdr.vlan.dei |[-1r, 14w] |H13 |H |[12] |
647 |ingress::hdr.vlan.vlan_id |[-1r, 14w] |H13 |H |[11:0] |
648 |ingress::hdr.vlan.ether_type |[-1r, 14w] |H15 |H | |
649 |ingress::hdr.ipv4.version |[-1r, 14w] |H18 |H |[15:12] |
650 |ingress::hdr.ipv4.ihl |[-1r, 14w] |H18 |H |[11:8] |
651 |ingress::hdr.ipv4.diffserv |[-1r, 14w] |H18 |H |[7:0] |
652 |ingress::hdr.ipv4.total_len |[-1r, 14w] |H5 |H | |
653 |ingress::hdr.ipv4.identification |[-1r, 14w] |W4 |W |[31:16] |
654 |ingress::hdr.ipv4.flags |[-1r, 14w] |W4 |W |[15:13] |
655 |ingress::hdr.ipv4.frag_offset |[-1r, 14w] |W4 |W |[12:0] |
656 |ingress::hdr.ipv4.ttl[0] |[-1r, 14w] |B8 |B |[0] |
657 |ingress::hdr.ipv4.ttl[7:1] |[-1r, 14w] |B8 |B |[7:1] |
658 |ingress::hdr.ipv4.protocol |[-1r, 14w] |MB3 |MB | |
659 |ingress::hdr.ipv4.hdr_checksum |[-1r, 14w] |MH17 |MH | |
660 |ingress::hdr.ipv4.src_addr |[-1r, 14w] |MW3 |MW | |
661 |ingress::hdr.ipv4.dst_addr |[-1r, 14w] |MW1 |MW | |
662 |ingress::hdr.icmp.type |[-1r, 14w] |H25 |H |[15:8] |
663 |ingress::hdr.icmp.code |[-1r, 14w] |H25 |H |[7:0] |
664 |ingress::hdr.icmp.hdr_checksum |[-1r, 14w] |MH12 |MH | |
665 |ingress::hdr.icmp.data[31:16] |[-1r, 14w] |MH8 |MH | |
666 |ingress::hdr.icmp.data[15:0] |[-1r, 14w] |H7 |H | |
667 |ingress::hdr.tcp.src_port |[-1r, 14w] |MW7 |MW |[31:16] |
668 |ingress::hdr.tcp.dst_port |[-1r, 14w] |MW7 |MW |[15:0] |
669 |ingress::hdr.tcp.seq_no |[-1r, 14w] |W5 |W | |
670 |ingress::hdr.tcp.ack_no |[-1r, 14w] |MW15 |MW | |
671 |ingress::hdr.tcp.data_offset |[-1r, 14w] |H7 |H |[15:12] |
672 |ingress::hdr.tcp.res |[-1r, 14w] |H7 |H |[11:8] |
673 |ingress::hdr.tcp.flags |[-1r, 14w] |H7 |H |[7:0] |
674 |ingress::hdr.tcp.window |[-1r, 14w] |MH8 |MH | |
675 |ingress::hdr.tcp.checksum |[-1r, 14w] |MH12 |MH | |
676 |ingress::hdr.tcp.urgent_ptr |[-1r, 14w] |MH10 |MH | |
677 |ingress::hdr.udp.src_port |[-1r, 14w] |MH11 |MH | |
678 |ingress::hdr.udp.dst_port |[-1r, 14w] |MH9 |MH | |
679 |ingress::hdr.udp.hdr_length |[-1r, 14w] |H8 |H | |
680 |ingress::hdr.udp.checksum |[-1r, 14w] |MH15 |MH | |
681 |ingress::hdr.geneve.version |[-1r, 14w] |W13 |W |[31:30] |
682 |ingress::hdr.geneve.opt_len |[-1r, 14w] |W13 |W |[29:24] |
683 |ingress::hdr.geneve.ctrl |[-1r, 14w] |W13 |W |[23] |
684 |ingress::hdr.geneve.crit |[-1r, 14w] |W13 |W |[22] |
685 |ingress::hdr.geneve.reserved |[-1r, 14w] |W13 |W |[21:16] |
686 |ingress::hdr.geneve.protocol |[-1r, 14w] |W13 |W |[15:0] |
687 |ingress::hdr.geneve.vni |[-1r, 14w] |W25 |W |[31:8] |
688 |ingress::hdr.geneve.reserved2 |[-1r, 14w] |W25 |W |[7:0] |
689 |ingress::hdr.inner_eth.dst_mac[47:32] |[5w, 12r] |DH5 |DH | |
690 |ingress::hdr.inner_eth.dst_mac[31:0] |[5w, 12r] |DW0 |DW | |
691 |ingress::hdr.inner_eth.dst_mac[47:32] |[-1w, 5r] |H19 |H | |
692 |ingress::hdr.inner_eth.dst_mac[47:32] |[12w, 14r] |H19 |H | |
693 |ingress::hdr.inner_eth.dst_mac[31:0] |[-1w, 5r] |W8 |W | |
694 |ingress::hdr.inner_eth.dst_mac[31:0] |[12w, 14r] |W8 |W | |
695 |ingress::hdr.inner_eth.src_mac[47:16] |[5w, 12r] |DW12 |DW | |
696 |ingress::hdr.inner_eth.src_mac[15:0] |[-1r, 14w] |MH5 |MH | |
697 |ingress::hdr.inner_eth.src_mac[47:16] |[-1w, 5r] |W37 |W | |
698 |ingress::hdr.inner_eth.src_mac[47:16] |[12w, 14r] |W37 |W | |
699 |ingress::hdr.inner_eth.ether_type |[6w, 12r] |DH4 |DH | |
700 |ingress::hdr.inner_eth.ether_type |[-1w, 6r] |H16 |H | |
701 |ingress::hdr.inner_eth.ether_type |[12w, 14r] |H16 |H | |
702 |ingress::hdr.inner_ipv4.version |[-1r, 14w] |H17 |H |[15:12] |
703 |ingress::hdr.inner_ipv4.ihl |[-1r, 14w] |H17 |H |[11:8] |
704 |ingress::hdr.inner_ipv4.diffserv |[-1r, 14w] |H17 |H |[7:0] |
705 |ingress::hdr.inner_ipv4.total_len |[-1r, 14w] |H3 |H | |
706 |ingress::hdr.inner_ipv4.identification |[-1r, 14w] |W0 |W |[31:16] |
707 |ingress::hdr.inner_ipv4.flags |[-1r, 14w] |W0 |W |[15:13] |
708 |ingress::hdr.inner_ipv4.frag_offset |[-1r, 14w] |W0 |W |[12:0] |
709 |ingress::hdr.inner_ipv4.ttl[0] |[-1r, 14w] |MB0 |MB |[0] |
710 |ingress::hdr.inner_ipv4.ttl[7:1] |[-1r, 14w] |MB0 |MB |[7:1] |
711 |ingress::hdr.inner_ipv4.protocol |[-1r, 14w] |MB2 |MB | |
712 |ingress::hdr.inner_ipv4.hdr_checksum |[-1r, 14w] |MH16 |MH | |
713 |ingress::hdr.inner_ipv4.src_addr |[-1r, 14w] |MW2 |MW | |
714 |ingress::hdr.inner_ipv4.dst_addr |[-1r, 14w] |MW0 |MW | |
715 |ingress::hdr.inner_tcp.src_port |[-1r, 14w] |MW7 |MW |[31:16] |
716 |ingress::hdr.inner_tcp.dst_port |[-1r, 14w] |MW7 |MW |[15:0] |
717 |ingress::hdr.inner_tcp.seq_no |[-1r, 14w] |W5 |W | |
718 |ingress::hdr.inner_tcp.ack_no |[-1r, 14w] |MW15 |MW | |
719 |ingress::hdr.inner_tcp.data_offset |[-1r, 14w] |H7 |H |[15:12] |
720 |ingress::hdr.inner_tcp.res |[-1r, 14w] |H7 |H |[11:8] |
721 |ingress::hdr.inner_tcp.flags |[-1r, 14w] |H7 |H |[7:0] |
722 |ingress::hdr.inner_tcp.window |[-1r, 14w] |MH8 |MH | |
723 |ingress::hdr.inner_tcp.checksum |[-1r, 14w] |MH12 |MH | |
724 |ingress::hdr.inner_tcp.urgent_ptr |[-1r, 14w] |MH10 |MH | |
725 |ingress::hdr.inner_udp.src_port |[-1r, 14w] |MH10 |MH | |
726 |ingress::hdr.inner_udp.dst_port |[-1r, 14w] |MH8 |MH | |
727 |ingress::hdr.inner_udp.hdr_length |[-1r, 14w] |H7 |H | |
728 |ingress::hdr.inner_udp.checksum |[-1r, 14w] |MH12 |MH | |
729 |ingress::hdr.inner_icmp.type |[-1r, 14w] |MH10 |MH |[15:8] |
730 |ingress::hdr.inner_icmp.code |[-1r, 14w] |MH10 |MH |[7:0] |
731 |ingress::hdr.inner_icmp.hdr_checksum |[-1r, 14w] |MH12 |MH | |
732 |ingress::hdr.inner_icmp.data[31:16] |[-1r, 14w] |MH8 |MH | |
733 |ingress::hdr.inner_icmp.data[15:0] |[-1r, 14w] |H7 |H | |
734 |ingress::hdr.inner_ipv6.version |[-1r, 14w] |W0 |W |[31:28] |
735 |ingress::hdr.inner_ipv6.traffic_class |[-1r, 14w] |W0 |W |[27:20] |
736 |ingress::hdr.inner_ipv6.flow_label |[-1r, 14w] |W0 |W |[19:0] |
737 |ingress::hdr.inner_ipv6.payload_len |[-1r, 14w] |H3 |H | |
738 |ingress::hdr.inner_ipv6.next_hdr |[-1r, 14w] |MB2 |MB | |
739 |ingress::hdr.inner_ipv6.hop_limit[0] |[-1r, 14w] |MB0 |MB |[0] |
740 |ingress::hdr.inner_ipv6.hop_limit[7:1] |[-1r, 14w] |MB0 |MB |[7:1] |
741 |ingress::hdr.inner_ipv6.src_addr[111:96] |[-1r, 14w] |MW2 |MW |[15:0] |
742 |ingress::hdr.inner_ipv6.src_addr[127:112] |[-1r, 14w] |MW2 |MW |[31:16] |
743 |ingress::hdr.inner_ipv6.src_addr[31:0] |[-1r, 14w] |MW5 |MW | |
744 |ingress::hdr.inner_ipv6.src_addr[63:32] |[-1r, 14w] |MW9 |MW | |
745 |ingress::hdr.inner_ipv6.src_addr[95:64] |[-1r, 14w] |MW13 |MW | |
746 |ingress::hdr.inner_ipv6.dst_addr[111:96] |[-1r, 14w] |MW0 |MW |[15:0] |
747 |ingress::hdr.inner_ipv6.dst_addr[127:112] |[-1r, 14w] |MW0 |MW |[31:16] |
748 |ingress::hdr.inner_ipv6.dst_addr[31:0] |[-1r, 14w] |MW4 |MW | |
749 |ingress::hdr.inner_ipv6.dst_addr[63:32] |[-1r, 14w] |MW8 |MW | |
750 |ingress::hdr.inner_ipv6.dst_addr[95:64] |[-1r, 14w] |MW12 |MW | |
751 |ingress::hdr.geneve_opts.oxg_ext_tag.class |[-1r, 14w] |W1 |W |[31:16] |
752 |ingress::hdr.geneve_opts.oxg_ext_tag.crit |[-1r, 14w] |W1 |W |[15] |
753 |ingress::hdr.geneve_opts.oxg_ext_tag.type |[-1r, 14w] |W1 |W |[14:8] |
754 |ingress::hdr.geneve_opts.oxg_ext_tag.reserved |[-1r, 14w] |W1 |W |[7:5] |
755 |ingress::hdr.geneve_opts.oxg_ext_tag.opt_len |[-1r, 14w] |W1 |W |[4:0] |
756 |ingress::hdr.ipv6.version |[-1r, 14w] |W4 |W |[31:28] |
757 |ingress::hdr.ipv6.traffic_class |[-1r, 14w] |W4 |W |[27:20] |
758 |ingress::hdr.ipv6.flow_label |[-1r, 14w] |W4 |W |[19:0] |
759 |ingress::hdr.ipv6.payload_len |[-1r, 14w] |H5 |H | |
760 |ingress::hdr.ipv6.next_hdr |[-1r, 14w] |MB3 |MB | |
761 |ingress::hdr.ipv6.hop_limit[0] |[-1r, 14w] |B8 |B |[0] |
762 |ingress::hdr.ipv6.hop_limit[7:1] |[-1r, 14w] |B8 |B |[7:1] |
763 |ingress::hdr.ipv6.src_addr[111:96] |[-1r, 14w] |MW3 |MW |[15:0] |
764 |ingress::hdr.ipv6.src_addr[127:112] |[-1r, 14w] |MW3 |MW |[31:16] |
765 |ingress::hdr.ipv6.src_addr[31:0] |[-1r, 14w] |MW6 |MW | |
766 |ingress::hdr.ipv6.src_addr[63:32] |[-1r, 14w] |MW10 |MW | |
767 |ingress::hdr.ipv6.src_addr[95:64] |[-1r, 14w] |MW14 |MW | |
768 |ingress::hdr.ipv6.dst_addr[111:96] |[-1r, 14w] |MW1 |MW |[15:0] |
769 |ingress::hdr.ipv6.dst_addr[127:112] |[-1r, 14w] |MW1 |MW |[31:16] |
770 |ingress::hdr.ipv6.dst_addr[31:0] |[-1r, 14w] |W12 |W | |
771 |ingress::hdr.ipv6.dst_addr[63:32] |[-1r, 14w] |W24 |W | |
772 |ingress::hdr.ipv6.dst_addr[95:64] |[-1r, 14w] |W36 |W | |
773 |ingress::ig_intr_md_for_tm.ucast_egress_port |[-1r, 14w] |H11 |H |[8:0] |
774 |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |[-1r, 14w] |H2 |H |[1] |
775 |$tmp9 |[-1r, 14w] |B6 |B | |
776 |ingress::l3_router_fwd.is_hit |[-1r, 14w] |H11 |H |[9] |
777 |ingress::l3_router_fwd.ecmp_hash |[-1r, 14w] |B7 |B | |
778 |ingress::l3_router_fwd.idx[7:0] |[-1r, 14w] |H12 |H |[7:0] |
779 |ingress::l3_router_fwd.idx[15:8] |[-1r, 14w] |H12 |H |[15:8] |
780 |ingress::l3_router_fwd.slots |[0w, 9r] |MB8 |MB | |
781 |ingress::l3_router_fwd.slot[7:0] |[-1r, 14w] |MH4 |MH |[7:0] |
782 |ingress::l3_router_fwd.slot[15:8] |[-1r, 14w] |MH4 |MH |[15:8] |
783 |$tmp10 |[-1r, 14w] |B6 |B | |
784 |ingress::ig_intr_md_for_dprsr.drop_ctl |[-1r, 14w] |B2 |B |[5:3] |
785 |ingress::ig_intr_md_for_dprsr.mirror_type |[-1r, 14w] |MB1 |MB |[3:0] |
786 |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |[-1r, 14w] |H2 |H |[2] |
787 |ingress::hdr.udp.checksum.$deparse_original_csum |[-1r, 14w] |B3 |B |[0] |
788 |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |[-1r, 14w] |B3 |B |[1] |
789 |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |[-1r, 14w] |B3 |B |[2] |
790 |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |[-1r, 14w] |B3 |B |[3] |
791 |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |[-1r, 14w] |B3 |B |[4] |
792 |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |[-1r, 14w] |B2 |B |[1] |
793 |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |[-1r, 14w] |B2 |B |[2] |
794 |ingress::$tmp6 |[-1r, 14w] |B0 |B | |
795 |egress::eg_intr_md_for_dprsr.drop_ctl |[-1r, 14w] |MH3 |MH |[2:0] |
796 |egress::eg_intr_md_for_dprsr.mirror_io_select |[-1r, 14w] |MB4 |MB |[0] |
797 |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |[-1r, 14w] |B4 |B |[0] |
798 |egress::eg_intr_md.egress_port |[-1r, 14w] |MH2 |MH |[8:0] |
799 |egress::eg_intr_md.egress_port.$valid |[-1r, 14w] |B4 |B |[1] |
800 |egress::meta.bridge_hdr.nat_egress_hit |[-1r, 14w] |W20 |W |[17] |
801 |egress::hdr.ethernet.src_mac[47:32] |[-1r, 14w] |MH20 |MH | |
802 |egress::hdr.ethernet.src_mac[31:0] |[-1r, 14w] |W10 |W | |
803 |egress::hdr.ipv6.dst_addr[111:96] |[-1r, 14w] |W6 |W |[15:0] |
804 |egress::hdr.ipv6.dst_addr[127:112] |[-1r, 14w] |W6 |W |[31:16] |
805 |egress::hdr.ipv6.dst_addr[31:0] |[-1r, 14w] |W11 |W | |
806 |egress::hdr.ipv6.dst_addr[63:32] |[-1r, 14w] |W17 |W | |
807 |egress::hdr.ipv6.dst_addr[95:64] |[-1r, 14w] |W18 |W | |
808 |egress::is_link_local_ipv6_mcast_0 |[-1r, 14w] |MB9 |MB |[0] |
809 |egress::meta.drop_reason |[-1r, 14w] |B11 |B | |
810 |egress::eg_intr_md_for_dprsr.drop_ctl.$valid |[-1r, 14w] |B4 |B |[2] |
811 |ingress::meta.bridge_hdr.$valid |[-1r, 14w] |H2 |H |[3] |
812 |ingress::hdr.ethernet.$valid |[-1r, 14w] |H2 |H |[4] |
813 |ingress::hdr.sidecar.$valid |[-1r, 14w] |H2 |H |[5] |
814 |ingress::hdr.vlan.$valid |[-1r, 14w] |B2 |B |[0] |
815 |ingress::hdr.ipv4.$valid |[-1r, 14w] |H2 |H |[6] |
816 |ingress::hdr.icmp.$valid |[-1r, 14w] |H2 |H |[7] |
817 |ingress::hdr.tcp.$valid |[-1r, 14w] |H2 |H |[8] |
818 |ingress::hdr.udp.$valid |[-1r, 14w] |H2 |H |[9] |
819 |ingress::hdr.geneve.$valid |[-1r, 14w] |H2 |H |[10] |
820 |ingress::hdr.inner_eth.$valid |[-1r, 14w] |H2 |H |[11] |
821 |ingress::hdr.inner_ipv4.$valid |[-1r, 14w] |H2 |H |[12] |
822 |ingress::hdr.inner_tcp.$valid |[-1r, 14w] |H2 |H |[13] |
823 |ingress::hdr.inner_udp.$valid |[-1r, 14w] |H2 |H |[14] |
824 |ingress::hdr.inner_icmp.$valid |[-1r, 14w] |H2 |H |[15] |
825 |ingress::hdr.inner_ipv6.$valid |[-1r, 14w] |B1 |B |[0] |
826 |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |[-1r, 14w] |B1 |B |[1] |
827 |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |[-1r, 14w] |B1 |B |[2] |
828 |ingress::hdr.geneve_opts.oxg_mcast.$valid |[-1r, 14w] |B1 |B |[3] |
829 |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |[-1r, 14w] |B1 |B |[4] |
830 |ingress::hdr.geneve_opts.oxg_mss.$valid |[-1r, 14w] |B1 |B |[5] |
831 |ingress::hdr.ipv6.$valid |[-1r, 14w] |B1 |B |[6] |
832 |ingress::hdr.arp.$valid |[-1r, 14w] |B1 |B |[7] |
833 |egress::hdr.ethernet.$valid |[-1r, 14w] |B4 |B |[3] |
834 |egress::hdr.vlan.$valid |[-1r, 14w] |B4 |B |[4] |
835 |egress::hdr.ipv4.$valid |[-1r, 14w] |B4 |B |[5] |
836 |egress::hdr.udp.$valid |[-1r, 14w] |B4 |B |[6] |
837 |egress::hdr.geneve.$valid |[-1r, 14w] |B4 |B |[7] |
838 |egress::hdr.inner_eth.$valid |[-1r, 14w] |MH0 |MH |[0] |
839 |egress::hdr.inner_ipv4.$valid |[-1r, 14w] |MH0 |MH |[1] |
840 |egress::hdr.inner_tcp.$valid |[-1r, 14w] |MH0 |MH |[2] |
841 |egress::hdr.inner_udp.$valid |[-1r, 14w] |MH0 |MH |[3] |
842 |egress::hdr.inner_ipv6.$valid |[-1r, 14w] |MH0 |MH |[4] |
843 |egress::hdr.geneve_opts.oxg_ext_tag.$valid |[-1r, 14w] |MH0 |MH |[5] |
844 |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |[-1r, 14w] |MH0 |MH |[6] |
845 |egress::hdr.geneve_opts.oxg_mcast.$valid |[-1r, 14w] |MH0 |MH |[7] |
846 |egress::hdr.geneve_opts.oxg_mss_tag.$valid |[-1r, 14w] |MH0 |MH |[8] |
847 |egress::hdr.geneve_opts.oxg_mss.$valid |[-1r, 14w] |MH0 |MH |[9] |
848 |egress::hdr.ipv6.$valid |[-1r, 14w] |MH0 |MH |[10] |
849 +--------------------------------------------------------+------------+-----------+----------------+-----------------+
850 
851 
852 
853 
854 
855 PHV Allocation State
856 
857 MAU Groups:
858 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
859 | Container Set | Containers Used | Bits Used | Bits Used on Ingress | Bits Used on Egress | Bits Allocated | Bits Allocated on Ingress | Bits Allocated on Egress | Available Bits |
860 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
861 | B0-11 | 12 ( 100 %) | 96 ( 100 %) | 80 ( 83.3 %) | 16 ( 16.7 %) | 114 ( 119 %) | 98 ( 102 %) | 16 ( 16.7 %) | 96 |
862 | MB0-3 | 4 ( 100 %) | 28 ( 87.5 %) | 28 ( 87.5 %) | 0 ( 0 %) | 52 ( 162 %) | 52 ( 162 %) | 0 ( 0 %) | 32 |
863 | DB0-3 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
864 | | | | | | | | | |
865 | Usage for Group 1 | 16 ( 80 %) | 124 ( 77.5 %) | 108 ( 67.5 %) | 16 ( 10 %) | 166 ( 104 %) | 150 ( 93.8 %) | 16 ( 10 %) | 160 |
866 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
867 | B12-23 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 96 |
868 | MB4-7 | 1 ( 25 %) | 1 ( 3.12 %) | 0 ( 0 %) | 1 ( 3.12 %) | 1 ( 3.12 %) | 0 ( 0 %) | 1 ( 3.12 %) | 32 |
869 | DB4-7 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
870 | | | | | | | | | |
871 | Usage for Group 2 | 1 ( 5 %) | 1 ( 0.625%) | 0 ( 0 %) | 1 ( 0.625%) | 1 ( 0.625%) | 0 ( 0 %) | 1 ( 0.625%) | 160 |
872 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
873 | B24-35 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 96 |
874 | MB8-11 | 2 ( 50 %) | 9 ( 28.1 %) | 8 ( 25 %) | 1 ( 3.12 %) | 25 ( 78.1 %) | 24 ( 75 %) | 1 ( 3.12 %) | 32 |
875 | DB8-11 | 1 ( 25 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 32 |
876 | | | | | | | | | |
877 | Usage for Group 3 | 3 ( 15 %) | 17 ( 10.6 %) | 16 ( 10 %) | 1 ( 0.625%) | 33 ( 20.6 %) | 32 ( 20 %) | 1 ( 0.625%) | 160 |
878 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
879 | B36-47 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 96 |
880 | MB12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
881 | DB12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
882 | | | | | | | | | |
883 | Usage for Group 4 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 160 |
884 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
885 | H0-11 | 12 ( 100 %) | 184 ( 95.8 %) | 184 ( 95.8 %) | 0 ( 0 %) | 280 ( 146 %) | 280 ( 146 %) | 0 ( 0 %) | 192 |
886 | MH0-3 | 4 ( 100 %) | 32 ( 50 %) | 9 ( 14.1 %) | 23 ( 35.9 %) | 32 ( 50 %) | 9 ( 14.1 %) | 23 ( 35.9 %) | 64 |
887 | DH0-3 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
888 | | | | | | | | | |
889 | Usage for Group 5 | 16 ( 80 %) | 216 ( 67.5 %) | 193 ( 60.3 %) | 23 ( 7.19 %) | 312 ( 97.5 %) | 289 ( 90.3 %) | 23 ( 7.19 %) | 320 |
890 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
891 | H12-23 | 10 ( 83.3 %) | 160 ( 83.3 %) | 160 ( 83.3 %) | 0 ( 0 %) | 224 ( 117 %) | 224 ( 117 %) | 0 ( 0 %) | 192 |
892 | MH4-7 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 |
893 | DH4-7 | 2 ( 50 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 64 |
894 | | | | | | | | | |
895 | Usage for Group 6 | 16 ( 80 %) | 256 ( 80 %) | 256 ( 80 %) | 0 ( 0 %) | 320 ( 100 %) | 320 ( 100 %) | 0 ( 0 %) | 320 |
896 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
897 | H24-35 | 3 ( 25 %) | 48 ( 25 %) | 48 ( 25 %) | 0 ( 0 %) | 48 ( 25 %) | 48 ( 25 %) | 0 ( 0 %) | 192 |
898 | MH8-11 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 176 ( 275 %) | 176 ( 275 %) | 0 ( 0 %) | 64 |
899 | DH8-11 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
900 | | | | | | | | | |
901 | Usage for Group 7 | 7 ( 35 %) | 112 ( 35 %) | 112 ( 35 %) | 0 ( 0 %) | 224 ( 70 %) | 224 ( 70 %) | 0 ( 0 %) | 320 |
902 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
903 | H36-47 | 1 ( 8.33 %) | 16 ( 8.33 %) | 16 ( 8.33 %) | 0 ( 0 %) | 16 ( 8.33 %) | 16 ( 8.33 %) | 0 ( 0 %) | 192 |
904 | MH12-15 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 128 ( 200 %) | 128 ( 200 %) | 0 ( 0 %) | 64 |
905 | DH12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
906 | | | | | | | | | |
907 | Usage for Group 8 | 5 ( 25 %) | 80 ( 25 %) | 80 ( 25 %) | 0 ( 0 %) | 144 ( 45 %) | 144 ( 45 %) | 0 ( 0 %) | 320 |
908 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
909 | H48-59 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 192 |
910 | MH16-19 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 |
911 | DH16-19 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
912 | | | | | | | | | |
913 | Usage for Group 9 | 4 ( 20 %) | 64 ( 20 %) | 64 ( 20 %) | 0 ( 0 %) | 64 ( 20 %) | 64 ( 20 %) | 0 ( 0 %) | 320 |
914 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
915 | H60-71 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 192 |
916 | MH20-23 | 2 ( 50 %) | 26 ( 40.6 %) | 10 ( 15.6 %) | 16 ( 25 %) | 26 ( 40.6 %) | 10 ( 15.6 %) | 16 ( 25 %) | 64 |
917 | DH20-23 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
918 | | | | | | | | | |
919 | Usage for Group 10 | 2 ( 10 %) | 26 ( 8.12 %) | 10 ( 3.12 %) | 16 ( 5 %) | 26 ( 8.12 %) | 10 ( 3.12 %) | 16 ( 5 %) | 320 |
920 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
921 | W0-11 | 12 ( 100 %) | 384 ( 100 %) | 288 ( 75 %) | 96 ( 25 %) | 544 ( 142 %) | 448 ( 117 %) | 96 ( 25 %) | 384 |
922 | MW0-3 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 256 ( 200 %) | 256 ( 200 %) | 0 ( 0 %) | 128 |
923 | DW0-3 | 1 ( 25 %) | 32 ( 25 %) | 32 ( 25 %) | 0 ( 0 %) | 32 ( 25 %) | 32 ( 25 %) | 0 ( 0 %) | 128 |
924 | | | | | | | | | |
925 | Usage for Group 11 | 17 ( 85 %) | 544 ( 85 %) | 448 ( 70 %) | 96 ( 15 %) | 832 ( 130 %) | 736 ( 115 %) | 96 ( 15 %) | 640 |
926 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
927 | W12-23 | 9 ( 75 %) | 257 ( 66.9 %) | 192 ( 50 %) | 65 ( 16.9 %) | 257 ( 66.9 %) | 192 ( 50 %) | 65 ( 16.9 %) | 384 |
928 | MW4-7 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 160 ( 125 %) | 160 ( 125 %) | 0 ( 0 %) | 128 |
929 | DW4-7 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 |
930 | | | | | | | | | |
931 | Usage for Group 12 | 13 ( 65 %) | 385 ( 60.2 %) | 320 ( 50 %) | 65 ( 10.2 %) | 417 ( 65.2 %) | 352 ( 55 %) | 65 ( 10.2 %) | 640 |
932 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
933 | W24-35 | 5 ( 41.7 %) | 160 ( 41.7 %) | 160 ( 41.7 %) | 0 ( 0 %) | 160 ( 41.7 %) | 160 ( 41.7 %) | 0 ( 0 %) | 384 |
934 | MW8-11 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 |
935 | DW8-11 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 |
936 | | | | | | | | | |
937 | Usage for Group 13 | 9 ( 45 %) | 288 ( 45 %) | 288 ( 45 %) | 0 ( 0 %) | 288 ( 45 %) | 288 ( 45 %) | 0 ( 0 %) | 640 |
938 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
939 | W36-47 | 4 ( 33.3 %) | 128 ( 33.3 %) | 128 ( 33.3 %) | 0 ( 0 %) | 192 ( 50 %) | 192 ( 50 %) | 0 ( 0 %) | 384 |
940 | MW12-15 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 160 ( 125 %) | 160 ( 125 %) | 0 ( 0 %) | 128 |
941 | DW12-15 | 1 ( 25 %) | 32 ( 25 %) | 32 ( 25 %) | 0 ( 0 %) | 32 ( 25 %) | 32 ( 25 %) | 0 ( 0 %) | 128 |
942 | | | | | | | | | |
943 | Usage for Group 14 | 9 ( 45 %) | 288 ( 45 %) | 288 ( 45 %) | 0 ( 0 %) | 384 ( 60 %) | 384 ( 60 %) | 0 ( 0 %) | 640 |
944 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
945 | Usage for 8b | 20 ( 25 %) | 142 ( 22.2 %) | 124 ( 19.4 %) | 18 ( 2.81 %) | 200 ( 31.2 %) | 182 ( 28.4 %) | 18 ( 2.81 %) | 640 |
946 | Usage for 16b | 50 ( 41.7 %) | 754 ( 39.3 %) | 715 ( 37.2 %) | 39 ( 2.03 %) | 1090 ( 56.8 %) | 1051 ( 54.7 %) | 39 ( 2.03 %) | 1920 |
947 | Usage for 32b | 48 ( 60 %) | 1505 ( 58.8 %) | 1344 ( 52.5 %) | 161 ( 6.29 %) | 1921 ( 75 %) | 1760 ( 68.8 %) | 161 ( 6.29 %) | 2560 |
948 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
949 | Usage for dark | 5 ( 8.93 %) | 104 ( 10.2 %) | 104 ( 10.2 %) | 0 ( 0 %) | 104 ( 10.2 %) | 104 ( 10.2 %) | 0 ( 0 %) | 1024 |
950 | Usage for mocha | 45 ( 80.4 %) | 864 ( 84.4 %) | 823 ( 80.4 %) | 41 ( 4 %) | 1272 ( 124 %) | 1231 ( 120 %) | 41 ( 4 %) | 1024 |
951 | Usage for normal | 68 ( 40.5 %) | 1433 ( 46.6 %) | 1256 ( 40.9 %) | 177 ( 5.76 %) | 1835 ( 59.7 %) | 1658 ( 54 %) | 177 ( 5.76 %) | 3072 |
952 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
953 | Overall PHV Usage | 118 ( 42.1 %) | 2401 ( 46.9 %) | 2183 ( 42.6 %) | 218 ( 4.26 %) | 3211 ( 62.7 %) | 2993 ( 58.5 %) | 218 ( 4.26 %) | 5120 |
954 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
955 
956 
957 
958