April 15, 2026 at 06:11:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 803 0 174 2362 131 9390 67 481 2574 14 9099 2 8 0 91 1 1733 0 247 418 18 8551 26 514 2246 9 15837 9 6 0 85 2 1661 0 274 400 17 7563 18 496 2642 10 14566 2 7 0 91 3 2076 0 129 686 347 5548 15 466 2227 12 13291 7 4 0 89 4 2156 0 112 729 342 7225 17 493 2255 8 16990 4 4 0 92 5 1587 0 165 8651 8385 4947 32 462 3610 9 14001 8 7 0 84 6 762 0 52 391 16 6669 19 481 2245 3 15551 2 7 0 91 7 806 0 65 392 21 8671 19 305 2244 5 7241 1 5 0 94 April 15, 2026 at 06:11:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5035 0 55 2560 162 182 7 15 560 5 3664 13 27 0 61 1 5783 0 368 330 7 504 3 96 349 46 7030 11 4 0 86 2 5669 0 364 423 24 519 2 63 822 52 5408 7 3 0 89 3 4983 0 30 178 20 519 2 80 527 52 3690 4 3 0 93 4 3446 0 67 371 92 454 3 88 475 35 2335 8 4 0 88 5 5344 0 20 318 18 547 0 70 593 45 2531 1 3 0 96 6 3791 0 36 319 23 452 0 85 222 40 1542 0 1 0 98 7 9862 0 400 362 4 387 1 66 532 38 6028 5 4 0 92 April 15, 2026 at 06:11:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2372 202 988 5 160 3063 0 561 0 10 0 90 1 31 0 0 112 10 889 5 151 2483 1 1064 0 9 0 90 2 0 0 73 116 23 708 9 138 2424 1 1 0 10 0 90 3 0 0 48 579 456 1391 1 196 2183 3 300 0 6 0 94 4 0 0 14 755 581 784 4 135 2376 2 258 0 10 0 90 5 0 0 0 234 3 1845 1 233 1887 1 0 0 2 0 98 6 0 0 0 91 4 772 10 124 2447 2 1 0 10 0 90 7 0 0 0 93 7 964 5 157 2233 0 324 0 7 0 92 April 15, 2026 at 06:11:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 202 104 0 0 2 0 560 0 0 0 100 1 27 0 0 114 53 138 0 1 0 0 1047 0 0 0 100 2 0 0 0 17 1 10 0 0 0 0 2 0 0 0 100 3 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 10 2 4 0 0 1 0 294 0 0 0 100 April 15, 2026 at 06:11:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 20 2305 202 110 0 0 2 0 578 0 0 0 100 1 0 0 0 13 3 36 0 0 0 0 1042 0 0 0 100 2 0 0 0 120 49 122 0 1 0 0 13 0 0 0 100 3 1 0 0 22 3 28 0 1 0 0 321 0 0 0 100 4 0 0 8 214 104 6 0 0 0 0 258 0 0 0 100 5 0 0 0 11 4 2 0 1 0 0 0 0 0 0 100 6 0 0 0 17 3 14 0 0 0 0 17 0 0 0 100 7 0 0 0 12 2 8 0 1 4 0 304 0 0 0 100 April 15, 2026 at 06:11:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 202 110 0 0 3 0 560 0 0 0 100 1 0 0 0 14 3 36 0 0 2 0 1042 0 0 0 100 2 0 0 0 118 52 111 0 1 1 0 2 0 0 0 100 3 0 0 0 14 3 6 0 0 1 0 300 0 0 0 100 4 7 0 17 220 105 16 0 1 3 0 262 0 0 0 100 5 0 0 0 18 3 8 0 0 1 0 6 0 0 0 100 6 0 0 0 17 4 10 0 1 0 0 6 0 0 0 100 7 0 0 0 12 3 4 0 0 3 0 296 0 0 0 100 April 15, 2026 at 06:11:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12612 0 780 3257 207 15273 2992 3878 47733 381 88703 15 37 0 48 1 15157 0 0 1570 14 15050 3114 3954 42767 369 89979 16 34 0 49 2 13354 0 0 1295 29 14426 2664 4081 46597 364 79036 15 35 0 50 3 16889 0 7 2147 245 19428 4134 4975 30117 361 105473 17 33 0 50 4 59596 0 24 1733 300 16303 3362 4606 38699 381 95451 18 40 0 42 5 16339 0 2 1497 9 15770 3264 4234 41832 367 95993 15 36 0 48 6 16165 0 0 1613 12 16388 3123 4147 40611 410 91122 16 35 0 49 7 16160 0 0 1558 9 16188 3296 4494 38221 358 99165 16 34 0 50 April 15, 2026 at 06:11:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1135 0 1419 4338 216 30975 4665 4641 21686 258 162041 37 63 0 0 1 624 0 9 2266 18 31837 4423 4623 23316 150 160366 35 64 0 0 2 1127 0 102 2369 26 30534 4718 4709 21853 156 166563 37 62 0 1 3 1138 0 9 3265 789 32640 5331 4908 24195 114 167282 38 62 0 0 4 1819 0 40 3197 838 34586 4777 5199 21694 171 170353 37 62 0 1 5 1166 0 859 2058 11 33144 4305 4735 23534 96 166981 36 63 0 1 6 854 0 0 2162 12 32434 4293 4851 20973 194 160533 38 62 0 1 7 840 0 931 1977 11 28607 4170 4455 25570 114 154170 37 62 0 1 April 15, 2026 at 06:11:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 295 0 1431 3962 211 31277 4131 4671 20736 123 160651 39 60 0 1 1 398 0 7 1849 14 28975 4006 4655 19399 141 157831 39 61 0 1 2 427 0 0 1985 15 33973 4308 5370 17827 137 175705 38 61 0 1 3 154 0 63 3040 783 39401 5181 5874 18727 74 200467 37 62 0 1 4 212 0 4 2801 828 34791 4328 5558 18291 105 173889 37 62 0 1 5 106 0 0 2065 23 36199 4599 5829 16973 160 182439 39 60 0 1 6 162 0 0 1818 19 34826 3830 5152 20259 133 177320 38 62 0 1 7 153 0 0 1874 25 32123 4009 5115 18804 96 167605 38 61 0 1 April 15, 2026 at 06:11:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1429 4303 227 35556 5281 5173 22303 76 162889 37 63 0 0 1 2 0 0 2393 33 36975 5564 5683 20242 60 172327 38 61 0 0 2 0 0 7 2250 35 34782 5322 5427 19959 81 167809 36 64 0 1 3 1 0 0 3044 856 36210 5283 5588 16860 98 163976 36 64 0 1 4 0 0 4 3347 908 36397 5454 5583 19990 88 172266 38 62 0 0 5 0 0 0 2129 33 38488 5108 5734 17560 109 175331 37 62 0 1 6 0 0 2 2355 33 37476 5544 5767 18251 106 178404 36 63 0 1 7 0 0 0 2311 29 37364 5167 5726 19372 124 177398 38 62 0 0 April 15, 2026 at 06:11:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1665 4171 224 30977 4501 5027 18795 38 154928 34 65 0 1 1 0 0 0 2208 30 35398 4896 5367 18529 44 168401 36 63 0 1 2 3 0 7 2334 21 37277 5034 5523 17638 46 172946 37 62 0 1 3 0 0 371 3207 763 38612 5556 5533 18548 35 176015 34 65 0 1 4 0 0 7 3021 761 34662 4959 5308 15999 57 167432 34 65 0 1 5 0 0 0 2248 30 34707 5038 5187 20320 39 162189 36 63 0 1 6 0 0 14 2235 29 33140 4973 4982 18821 51 161506 35 64 0 1 7 0 0 112 2452 33 33217 5251 4892 21984 32 164505 39 60 0 1 April 15, 2026 at 06:11:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 1418 4342 228 36167 5308 5309 18732 49 163551 36 63 0 0 1 0 0 0 2429 20 35652 5262 5475 20992 39 169669 36 64 0 0 2 0 0 349 2292 27 37219 5325 5535 17552 73 169873 38 62 0 0 3 0 0 13 3237 773 40630 5708 5498 19104 69 170018 36 64 0 0 4 0 0 10 3171 787 34942 4918 4933 23135 56 156865 41 59 0 0 5 0 0 0 2413 34 41375 5275 5493 20685 47 177664 36 63 0 1 6 0 0 14 2211 26 35373 5044 4991 22353 42 157026 37 63 0 0 7 0 0 0 2251 31 35268 4965 4950 19417 27 158745 37 62 0 0 April 15, 2026 at 06:11:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 955 3461 219 25375 2826 3394 18710 28 101617 23 43 0 34 1 9 0 0 1375 22 24249 2566 3518 15726 46 101709 23 45 0 32 2 0 0 0 1314 19 23653 2614 3223 17722 85 94371 24 44 0 31 3 0 0 0 1870 626 20466 2568 3014 15791 62 85694 23 45 0 32 4 4 0 10 1910 696 22224 2234 2753 15362 57 92759 24 44 0 32 5 0 0 0 1156 7 20725 2280 2735 17145 80 87074 26 43 0 31 6 1 0 14 1302 22 23298 2536 3253 14706 52 98385 25 42 0 32 7 4 0 0 1196 11 21037 2366 3085 15250 100 91481 26 42 0 32 April 15, 2026 at 06:11:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2315 201 457 2 51 1347 0 853 0 1 0 99 1 0 0 0 117 9 373 0 42 1283 29 10 0 1 0 99 2 0 0 0 164 4 368 0 41 1542 49 927 0 1 0 99 3 0 0 0 145 69 288 0 41 1545 16 22 0 1 0 99 4 0 0 10 351 172 274 0 47 1255 15 260 0 1 0 99 5 0 0 0 108 2 230 0 35 1309 1 2 0 1 0 99 6 0 0 14 165 1 365 0 43 1421 25 308 0 1 0 99 7 0 0 0 251 14 421 0 43 1420 33 303 0 1 0 99 April 15, 2026 at 06:11:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 128 2 4 1 0 16 0 0 0 100 1 0 0 0 26 8 26 0 2 0 0 18 0 0 0 100 2 0 0 0 24 5 46 1 2 5 0 1791 0 0 0 100 3 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 4 0 0 14 215 103 6 0 1 0 0 259 0 0 0 100 5 0 0 0 17 7 8 0 1 1 0 0 0 0 0 100 6 0 0 14 7 1 2 0 0 0 0 266 0 0 0 100 7 0 0 0 117 4 114 0 0 1 0 309 0 0 0 100 April 15, 2026 at 06:11:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 114 0 0 1 0 3 0 0 0 100 1 0 0 0 28 9 18 0 2 1 0 9 0 0 0 100 2 0 0 0 18 5 40 1 1 7 0 1783 0 0 0 100 3 0 0 0 14 3 8 0 0 1 0 4 0 0 0 100 4 0 0 14 214 103 4 0 0 1 0 259 0 0 0 100 5 0 0 0 10 2 2 0 0 1 0 2 0 0 0 100 6 0 0 14 10 3 4 0 0 1 0 267 0 0 0 100 7 0 0 0 112 3 106 0 1 1 0 305 0 0 0 100 April 15, 2026 at 06:11:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 115 0 272 2331 202 2490 36 148 157 11 7351 6 3 0 91 1 77 0 0 201 6 2515 33 145 121 9 6613 4 2 0 94 2 37 0 7 105 5 2597 30 130 99 7 8177 3 7 0 90 3 45 0 13 482 1 1888 18 72 131 6 5897 5 2 0 93 4 46 0 14 499 105 2076 17 79 181 3 7218 7 3 0 90 5 43555 0 7 98 2 2180 27 73 148 17 6801 7 7 0 86 6 136 0 15 358 8 1879 12 57 187 16 7501 8 3 0 89 7 65 0 0 504 4 1700 9 63 117 6 4957 4 2 0 94 April 15, 2026 at 06:11:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 1463 2513 202 13783 352 1353 5323 20 36471 27 22 0 51 1 19 0 0 482 15 14028 438 1341 5412 22 36235 28 18 0 54 2 27 0 0 434 9 13438 346 1143 5670 13 37491 26 18 0 56 3 35 0 0 770 313 13486 356 1053 5195 21 35835 27 17 0 56 4 23 0 66 880 402 12240 230 917 5226 10 33146 28 19 0 53 5 38 0 0 399 9 13610 635 918 5622 12 36048 27 16 0 58 6 30 0 7 432 3 10947 245 798 5277 23 33365 32 20 0 49 7 23 0 2 401 18 11439 199 783 4834 19 29949 24 17 0 59 April 15, 2026 at 06:11:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 1417 2551 202 14684 437 1643 6898 13 36915 24 22 0 55 1 13 0 14 501 12 13991 471 1399 6286 19 36151 26 19 0 55 2 10 0 7 472 10 13332 576 1331 6260 11 36982 31 21 0 48 3 17 0 0 939 448 12963 390 1245 6838 22 35876 27 20 0 53 4 6 0 10 1095 558 12224 357 1084 6342 21 33234 29 20 0 51 5 6 0 27 417 10 12014 247 943 6396 26 31869 28 20 0 52 6 6 0 0 518 8 11565 394 953 5509 20 32585 30 18 0 52 7 7 0 0 360 6 11755 183 931 6883 17 28631 20 18 0 61 April 15, 2026 at 06:11:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 1416 2529 205 14314 453 1568 6908 8 35804 23 21 0 56 1 14 0 0 466 15 14100 441 1407 6261 8 36752 27 20 0 53 2 14 0 0 452 6 13526 415 1292 6567 15 34472 25 21 0 54 3 7 0 0 875 388 12963 737 1146 6142 22 36824 31 20 0 49 4 14 0 17 1004 494 12347 296 1033 6692 5 32669 26 20 0 54 5 5 0 7 452 17 11350 380 929 5956 17 31887 30 20 0 50 6 33 0 7 473 13 12041 531 954 6180 19 34511 28 19 0 53 7 15 0 3 413 13 11195 244 923 6059 18 29546 24 19 0 57 April 15, 2026 at 06:11:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 1432 2516 203 13598 470 1473 6536 17 34718 28 21 0 52 1 17 0 0 434 13 13828 530 1373 6621 6 34483 25 20 0 56 2 8 0 0 508 9 13395 656 1208 6879 20 34366 28 19 0 53 3 7 0 0 755 337 12118 322 1046 6990 17 32880 26 20 0 54 4 7 0 3 939 437 11411 248 925 6296 19 29886 25 20 0 55 5 16 0 0 453 13 11678 369 879 6658 18 30999 27 18 0 54 6 8 0 7 408 10 11514 257 848 5919 16 30524 26 19 0 55 7 9 0 0 443 6 10755 418 850 5975 21 31250 31 19 0 50 April 15, 2026 at 06:11:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 1431 2543 207 13658 388 1416 6762 22 33575 26 21 0 53 1 11 0 7 431 13 13648 331 1320 6833 30 32349 22 20 0 58 2 10 0 0 424 7 12408 318 1059 6613 15 30952 24 21 0 55 3 6 0 0 711 320 12135 280 959 6533 32 34070 29 21 0 51 4 8 0 3 913 419 11760 245 910 6597 23 30729 26 20 0 54 5 8 0 0 446 15 11358 320 897 5853 25 30249 30 19 0 51 6 6 0 0 439 9 11024 373 846 5892 25 30702 30 19 0 51 7 10 0 0 415 15 11681 563 856 6248 19 29894 26 16 0 57 April 15, 2026 at 06:11:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 8 0 1435 2529 208 13196 435 1403 6067 18 34092 24 23 0 54 1 12 0 0 435 11 13707 406 1324 6599 21 35124 24 20 0 55 2 13 0 39 406 10 12953 321 1117 6695 24 34613 25 20 0 55 3 13 0 0 822 369 12901 464 1069 5997 20 35206 27 18 0 54 4 6 0 14 1033 463 12046 488 929 5729 28 35229 31 19 0 50 5 7 0 0 433 7 11909 251 864 5844 15 32574 26 20 0 55 6 11 0 0 429 6 11597 458 854 5689 16 32441 29 19 0 52 7 9 0 0 408 8 10513 237 803 5885 24 29722 27 19 0 54 April 15, 2026 at 06:12:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 1431 2542 207 13938 490 1550 6537 21 35108 23 20 0 57 1 16 0 0 433 18 14188 424 1380 6706 20 35047 23 20 0 56 2 8 0 0 496 9 13482 503 1247 6520 17 35656 26 20 0 55 3 11 0 0 752 316 13506 675 1182 6763 22 37580 27 20 0 53 4 5 0 10 923 414 11443 301 960 6291 22 31903 28 21 0 51 5 2 0 0 423 6 11056 255 866 6322 18 31754 29 21 0 50 6 7 0 0 412 10 11138 275 870 6236 27 30638 26 19 0 56 7 5 0 0 532 6 10968 456 839 6154 27 32220 32 19 0 50 April 15, 2026 at 06:12:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2343 0 1284 2549 209 11893 376 1300 6281 18 33681 22 26 0 52 1 1468 0 23 443 21 12205 341 1246 6762 14 31130 20 17 0 62 2 969 0 4 376 11 12098 281 1085 6353 13 29579 19 16 0 64 3 654 0 26 674 300 10873 253 940 6163 19 28312 23 17 0 60 4 787 0 26 935 407 10932 469 807 6218 22 30723 26 16 0 58 5 987 0 22 434 18 9987 237 767 5941 30 28558 27 18 0 55 6 1830 0 3 405 8 10480 429 778 6070 17 30768 30 17 0 53 7 1916 0 51 353 8 9777 176 761 6413 10 24250 19 18 0 63 April 15, 2026 at 06:12:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2458 0 68 2589 202 1204 16 211 3225 13 2396 0 5 0 94 1 4026 0 199 311 11 800 15 150 8276 3 7990 1 14 0 85 2 3233 0 118 432 44 1160 16 182 2712 8 5057 1 11 0 88 3 4718 0 66 518 192 857 8 145 9288 2 1657 1 8 0 91 4 5126 0 44 773 294 891 10 189 3241 7 1344 1 6 0 94 5 5336 0 103 421 23 831 12 167 2897 10 4505 1 9 0 90 6 3419 0 18 608 6 871 6 153 3087 8 3020 0 5 0 95 7 3719 0 1207 283 2 747 9 162 8625 6 4259 1 10 0 89 April 15, 2026 at 06:12:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4307 0 149 2509 204 581 1 78 65 56 2925 1 2 0 97 1 823 0 284 343 4 327 1 51 109 48 3241 1 1 0 98 2 2674 0 762 429 23 390 1 42 152 41 2676 1 3 0 97 3 1568 0 123 374 32 422 8 66 136 51 3703 1 3 0 96 4 2690 0 382 568 104 377 2 55 151 45 3890 1 2 0 97 5 6521 0 8 331 23 456 0 74 577 56 3846 1 4 0 96 6 5387 0 35 276 3 339 0 53 489 44 5346 2 2 0 97 7 2525 0 18 275 1 302 0 55 147 39 1638 0 1 0 99 April 15, 2026 at 06:12:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2308 202 146 1 1 0 0 1332 0 1 0 99 1 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 10 1 6 0 0 2 0 0 0 0 0 100 3 0 0 0 116 53 108 0 0 1 0 301 0 0 0 100 4 0 0 7 212 103 2 0 0 0 0 0 0 0 0 100 5 0 0 0 13 2 8 0 0 4 0 301 0 0 0 100 6 0 0 7 14 3 8 0 0 4 0 553 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 April 15, 2026 at 06:12:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2355 202 144 1 0 0 0 1305 0 1 0 99 1 0 0 0 57 0 0 0 0 0 0 0 0 0 0 100 2 0 0 336 14 1 8 0 0 2 0 0 0 0 0 100 3 0 0 21 167 52 116 0 0 2 0 300 0 0 0 99 4 0 0 7 265 104 4 0 0 0 0 1 0 0 0 100 5 0 0 0 63 2 6 0 0 2 0 300 0 0 0 100 6 0 0 7 60 2 4 0 0 2 0 553 0 0 0 100 7 0 0 0 59 1 2 0 0 0 0 0 0 0 0 100 April 15, 2026 at 06:12:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 202 154 0 0 0 0 1318 0 1 0 99 1 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 2 0 0 0 16 1 20 0 0 0 0 16 0 0 0 100 3 0 0 0 123 54 122 0 0 0 0 313 0 0 0 100 4 0 0 7 214 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 19 8 8 0 0 5 0 295 0 0 0 100 6 0 0 7 11 3 6 0 0 6 0 553 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 April 15, 2026 at 06:12:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 18 2363 250 722 5 79 611 0 1202 0 2 0 98 1 0 0 0 148 1 404 1 77 605 0 0 0 4 0 96 2 0 0 1 36 1 124 0 12 21152 0 0 0 11 0 89 3 0 0 0 125 70 173 2 12 17730 0 300 0 6 0 94 4 0 0 2 284 167 121 0 10 20876 0 1 0 11 0 89 5 0 0 0 42 3 186 1 15 17956 0 302 0 6 0 94 6 0 0 7 41 2 143 0 15 17430 0 551 0 6 0 94 7 0 0 0 41 1 160 0 19 17387 0 106 0 6 0 94 April 15, 2026 at 06:12:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7206 0 735 3238 245 11499 1524 3650 7130 68 42839 12 35 0 53 1 7295 0 0 1334 20 11812 1581 3784 7066 72 44123 13 34 0 54 2 9288 0 1 1438 25 10774 1435 3414 6310 87 40779 13 34 0 54 3 10998 0 130 1611 440 11990 1736 3765 7590 122 44276 13 45 0 43 4 8482 0 10 2036 525 11895 1632 3682 7796 65 43398 13 33 0 54 5 9324 0 3 1034 25 10484 1461 3460 7398 64 39662 12 36 0 52 6 11851 0 18 1300 33 11294 1645 3623 7457 82 41849 14 33 0 53 7 7068 0 0 1497 67 12234 1884 3786 7260 54 44256 12 34 0 54 April 15, 2026 at 06:12:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 275 0 1424 3573 229 19916 2016 6077 23251 113 71925 25 70 0 5 1 268 0 0 1383 33 19062 1688 5811 22572 89 70623 23 71 0 6 2 56 0 0 1425 37 20456 1707 6166 22531 85 77443 21 72 0 7 3 25 0 0 2103 800 18737 1578 5923 21635 92 71381 21 72 0 7 4 32 0 106 2217 908 16606 1573 5369 19567 50 63506 22 72 0 6 5 6 0 16 1421 28 18416 1687 5903 21704 87 69786 22 71 0 8 6 505 0 0 1475 33 17546 1780 5464 22224 57 68625 23 70 0 7 7 397 0 0 2015 129 22327 2700 6442 21582 72 76139 21 70 0 9 April 15, 2026 at 06:12:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 930 0 1416 3528 241 20094 1845 6238 20203 43 75260 23 70 0 6 1 3 0 0 1367 35 19043 1588 5978 20991 105 71683 24 70 0 7 2 0 0 0 1424 38 20891 1683 6434 23117 51 79277 23 70 0 7 3 0 0 0 2154 827 20111 1688 6310 21960 61 76485 23 70 0 7 4 548 0 3 2469 943 20857 1839 6222 22332 115 75344 25 68 0 7 5 642 0 7 1438 50 20043 1753 6403 21277 56 76479 22 70 0 8 6 0 0 0 1317 32 17100 1502 5638 18841 55 68510 23 70 0 7 7 1735 0 14 2165 145 23676 2934 6931 22984 91 81615 23 68 0 9 April 15, 2026 at 06:12:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 105 0 1426 3666 235 19060 1978 5937 20022 65 70567 24 70 0 6 1 24 0 0 1606 34 20619 2023 6371 21029 76 76739 23 70 0 7 2 96 0 14 1599 39 20738 1991 6459 21005 90 75607 22 70 0 7 3 2 0 6 2448 911 20201 2053 6298 21663 95 76156 23 69 0 7 4 0 0 2 2558 1003 19587 1880 6187 21218 123 75070 22 71 0 7 5 32 0 0 1475 38 19342 1801 5984 20785 57 72058 23 70 0 7 6 0 0 52 1528 29 19460 1964 6113 22465 90 73932 22 70 0 8 7 0 0 0 2071 132 21693 2855 6532 20557 90 75680 23 68 0 9 April 15, 2026 at 06:12:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 1112 3263 228 13669 1346 4236 16137 60 50686 18 57 0 26 1 96 0 0 1144 30 14724 1288 4440 17774 54 54045 17 56 0 27 2 0 0 14 1206 29 14446 1322 4480 17066 46 53913 17 57 0 26 3 129 0 0 1974 778 14296 1479 4455 18982 81 51203 17 54 0 29 4 234 0 2 2249 883 17612 1706 5047 18146 62 61324 18 54 0 29 5 101 0 375 1271 37 16229 1499 4657 17797 30 56713 18 54 0 28 6 95 0 0 1341 38 15880 1530 4644 18667 98 54490 18 54 0 28 7 148 0 0 1629 119 18807 2196 5157 18993 58 59409 15 55 0 30 April 15, 2026 at 06:12:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2323 203 603 2 79 1924 44 1736 0 2 0 98 1 0 0 0 194 2 436 0 54 1988 39 303 0 1 0 99 2 0 0 0 185 1 401 0 54 1975 40 0 0 1 0 99 3 0 0 0 127 94 592 0 81 2250 33 2 0 1 0 99 4 0 0 3 323 199 464 0 75 1986 48 3 0 1 0 99 5 5 0 14 261 53 464 0 53 1618 12 313 0 1 0 99 6 9 0 0 193 3 414 1 51 1797 34 31 0 1 0 99 7 0 0 7 122 9 634 0 69 1828 46 277 0 1 0 99 April 15, 2026 at 06:12:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 58 2 1 3 0 1736 0 1 0 99 1 0 0 0 96 1 90 0 2 0 0 300 0 0 0 100 2 0 0 0 13 3 8 0 0 0 0 2 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 7 217 102 4 0 0 0 0 0 0 0 0 100 5 0 0 14 112 53 108 0 0 0 0 266 0 0 0 100 6 0 0 0 12 1 10 0 1 0 0 0 0 0 0 100 7 0 0 7 21 7 16 0 1 0 0 268 0 0 0 100 April 15, 2026 at 06:12:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 46 1 0 0 0 1736 0 1 0 99 1 0 0 0 109 1 102 1 0 0 0 301 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 215 103 4 0 0 0 0 1 0 0 0 100 5 0 0 14 110 53 106 0 0 0 0 266 0 0 0 100 6 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 7 0 0 7 25 8 22 0 1 0 0 269 0 0 0 100 April 15, 2026 at 06:12:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 409 0 280 2415 203 6480 442 1722 391 6 47958 5 8 0 88 1 216 0 11 1150 3 6019 321 1482 303 8 45297 4 10 0 86 2 1265 0 32 1255 5 5811 276 1335 255 14 44705 4 6 0 90 3 5412 0 1 1159 1 5590 258 1239 271 15 45714 4 7 0 89 4 168 0 7 1298 102 5508 259 1203 247 15 44398 4 6 0 91 5 1549 0 26 905 52 5545 256 1194 276 8 44811 4 6 0 90 6 175 0 0 1011 4 5304 213 1082 242 9 43653 4 6 0 90 7 120 0 15 982 14 4860 211 1067 263 9 42651 4 6 0 90 April 15, 2026 at 06:12:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 289 0 1426 2915 211 33796 1921 10716 8388 33 239036 24 43 0 33 1 217 0 30 841 13 36801 2255 10404 9092 44 252822 25 41 0 35 2 156 0 0 777 11 31132 1546 9404 9104 37 239027 22 41 0 37 3 131 0 2 1276 426 30994 1439 9134 8367 34 236059 22 42 0 37 4 167 0 2 1361 533 30589 1450 8724 9292 40 238869 21 40 0 39 5 155 0 0 810 8 30445 1404 8445 8224 34 237162 22 40 0 38 6 154 0 0 718 9 30032 1512 8275 8546 35 233988 21 39 0 40 7 130 0 142 746 7 28761 1240 7979 8471 47 233480 22 40 0 38 April 15, 2026 at 06:12:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 114 0 1417 2745 209 41221 1515 12314 9764 33 250809 24 42 0 34 1 129 0 21 646 11 38546 1552 11557 10135 33 249646 24 42 0 34 2 95 0 0 592 11 34248 1111 10801 9427 26 238714 23 42 0 35 3 74 0 7 1242 551 35689 1274 10575 9638 29 247675 24 41 0 36 4 72 0 3 1296 654 32485 981 10050 9676 42 234553 22 42 0 36 5 93 0 7 607 11 33248 960 10053 8804 26 236034 22 41 0 37 6 58 0 0 610 11 34378 1181 10032 9377 31 235383 21 40 0 38 7 82 0 0 586 11 32625 972 9700 9320 30 236212 21 40 0 38 April 15, 2026 at 06:12:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 89 0 1421 2861 207 39456 1741 12602 10729 24 248164 24 42 0 34 1 68 0 0 692 10 36719 1448 11948 10986 21 246644 24 42 0 34 2 81 0 7 664 8 35161 1293 11291 10714 32 239740 23 42 0 35 3 96 0 0 1444 721 34941 1231 10971 10719 27 243648 23 40 0 37 4 58 0 21 1576 827 34937 1163 10546 9933 25 247147 23 40 0 37 5 57 0 0 700 11 34176 1050 10353 10109 24 239194 21 40 0 39 6 73 0 0 642 7 34427 1278 10111 10418 25 241674 22 39 0 39 7 45 0 7 707 17 34048 1127 9867 9873 35 237463 22 39 0 38 April 15, 2026 at 06:12:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 65 0 1417 2847 214 38783 1768 12190 9250 27 244474 24 42 0 34 1 97 0 0 806 10 36732 1827 11693 9258 14 247913 23 41 0 36 2 48 0 0 730 14 35107 1585 11037 9063 16 241962 24 42 0 34 3 58 0 0 1383 702 33294 1199 10298 9517 32 234398 22 42 0 35 4 73 0 3 1576 804 33226 1213 10021 9118 26 242376 22 40 0 38 5 56 0 0 731 17 32413 1112 9770 9038 31 239085 22 40 0 38 6 41 0 7 643 6 32914 1239 9780 9095 31 237039 22 40 0 38 7 39 0 14 630 11 31696 1069 9573 9542 31 236290 22 40 0 38 April 15, 2026 at 06:12:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 29 0 731 2534 208 18779 538 6234 7297 2 118049 11 24 0 65 1 14 0 10 444 6 18775 641 5993 6952 14 122202 12 23 0 65 2 36 0 0 464 8 18979 656 5823 7171 21 120662 12 22 0 66 3 18 0 0 772 429 17424 463 5451 7190 11 115411 11 23 0 66 4 39 0 3 993 550 16894 457 5274 6927 9 115242 11 23 0 66 5 31 0 0 413 14 16889 392 5257 6930 15 115644 10 22 0 67 6 32 0 0 370 11 17509 485 5072 7009 21 117475 11 22 0 68 7 24 0 14 391 5 18824 430 5104 6942 8 121420 12 22 0 67 April 15, 2026 at 06:12:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2310 202 14 0 1 2 0 310 0 0 0 100 1 0 0 7 18 3 10 0 1 8 0 560 0 0 0 100 2 0 0 0 27 8 17 0 1 1 0 17 0 0 0 100 3 0 0 0 119 1 110 0 1 1 0 5 0 0 0 100 4 0 0 7 233 111 50 1 0 1 0 1148 0 0 0 100 5 0 0 0 102 45 94 0 2 2 0 8 0 0 0 100 6 0 0 0 23 6 14 0 1 5 0 309 0 0 0 100 7 0 0 14 17 2 6 0 2 1 0 266 0 0 0 100 April 15, 2026 at 06:12:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2303 201 6 0 1 0 0 300 0 0 0 100 1 0 0 7 19 2 16 1 2 2 0 553 0 0 0 100 2 0 0 0 23 7 22 0 1 0 0 9 0 0 0 100 3 0 0 0 64 1 56 0 0 0 0 1 0 0 0 100 4 0 0 1 215 103 32 1 0 0 0 1145 0 0 0 100 5 0 0 0 155 52 151 0 2 0 0 0 0 0 0 100 6 0 0 0 12 3 8 1 1 3 0 300 0 0 0 100 7 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 8 0 1 0 0 302 0 0 0 100 1 0 0 7 20 2 18 0 1 1 0 553 0 0 0 100 2 0 0 0 26 7 16 1 1 0 0 9 0 0 0 100 3 0 0 0 10 0 8 0 1 0 0 0 0 0 0 100 4 0 0 7 213 103 32 1 0 0 0 1145 0 0 0 100 5 0 0 0 210 52 204 0 0 0 0 0 0 0 0 100 6 0 0 0 15 4 8 0 0 9 0 301 0 0 0 100 7 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5616 0 111 2633 216 266 0 44 815 8 2606 1 3 0 96 1 1317 0 36 107 2 146 1 27 90 6 1036 1 1 0 99 2 26 0 21 60 5 104 0 20 920 8 111 0 1 0 98 3 14 0 12 47 0 60 1 11 975 1 70 0 0 0 99 4 21 0 21 384 104 310 2 19 280 9 1969 1 2 0 97 5 9810 0 7 339 48 407 1 51 1134 6 2051 2 6 0 93 6 12865 0 330 103 4 544 2 49 825 8 27403 2 16 0 82 7 11477 0 90 184 7 225 3 48 699 12 4176 1 4 0 95 April 15, 2026 at 06:12:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 49 2348 231 643 1 93 1724 3 328 0 3 0 97 1 24 0 7 189 5 869 0 98 1646 8 603 0 2 0 98 2 2 0 0 286 1 613 0 88 1569 3 47 0 1 0 99 3 27 0 0 247 140 553 0 75 1746 6 126 0 2 0 98 4 5 0 14 411 229 529 0 85 1559 3 857 0 2 0 97 5 135 0 0 233 17 475 1 76 1613 1 43 0 2 0 98 6 364 0 0 221 5 460 0 56 1556 2 375 0 2 0 98 7 1 0 21 209 2 461 0 80 1491 3 278 0 2 0 98 April 15, 2026 at 06:12:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 56 2355 201 112 0 2 2 0 300 0 1 0 99 1 0 0 350 32 4 18 1 2 6 0 552 0 1 0 99 2 0 0 0 64 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 164 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 312 123 74 1 0 0 0 784 0 0 0 100 5 0 0 0 70 2 12 0 1 0 0 0 0 0 0 100 6 0 0 0 67 2 4 0 0 5 0 300 0 0 0 100 7 0 0 14 68 3 10 0 1 0 0 267 0 0 0 100 April 15, 2026 at 06:12:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 118 0 0 0 0 302 0 0 0 100 1 0 0 14 18 5 14 0 1 3 0 553 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 107 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 222 107 38 1 0 0 0 757 0 0 0 100 5 0 0 0 44 18 38 0 1 0 0 17 0 0 0 100 6 0 0 0 10 1 2 1 0 1 0 304 0 0 0 100 7 0 0 14 7 1 4 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:12:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 116 0 0 0 0 300 0 0 0 100 1 0 0 7 16 4 12 0 0 2 0 551 0 0 0 100 2 0 0 0 11 1 6 0 1 0 0 0 0 0 0 100 3 0 0 0 107 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 213 103 32 1 0 0 0 753 0 0 0 100 5 0 0 0 54 22 50 0 1 1 0 20 0 0 0 100 6 0 0 0 8 1 2 0 0 4 0 298 0 0 0 100 7 0 0 14 9 2 6 0 0 0 0 267 0 0 0 100 April 15, 2026 at 06:12:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 204 120 0 0 0 0 324 0 0 0 100 1 0 0 7 14 4 10 0 0 7 0 552 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 108 51 102 0 0 0 0 1 0 0 0 100 4 0 0 7 212 103 32 0 0 0 0 755 0 0 0 100 5 0 0 0 52 22 46 0 0 0 0 20 0 0 0 100 6 0 0 0 9 1 4 0 1 6 0 301 0 0 0 100 7 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 116 0 0 0 0 300 0 0 0 100 1 0 0 7 31 7 30 1 0 6 0 575 0 0 0 100 2 0 0 0 10 1 8 0 1 0 0 0 0 0 0 100 3 0 0 1 114 50 116 0 0 0 0 19 0 0 0 100 4 0 0 7 217 103 40 1 1 0 0 766 0 0 0 100 5 0 0 0 68 32 54 0 0 2 0 21 0 0 0 100 6 0 0 0 9 1 4 0 0 2 0 298 0 0 0 100 7 0 0 14 11 1 6 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 116 0 0 1 0 302 0 0 0 100 1 0 0 7 19 6 12 0 0 2 0 553 0 0 0 100 2 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 3 0 0 0 110 51 102 0 0 1 0 0 0 0 0 100 4 0 0 7 213 103 32 0 0 1 0 753 0 0 0 100 5 0 0 0 56 23 48 0 0 1 0 20 0 0 0 100 6 0 0 0 15 3 8 1 2 1 0 301 0 0 0 100 7 0 0 14 9 2 4 0 1 1 0 266 0 0 0 100 April 15, 2026 at 06:12:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 114 0 0 1 0 300 0 0 0 100 1 0 0 7 14 4 10 0 0 1 0 552 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 213 103 32 1 0 0 0 755 0 0 0 100 5 0 0 0 51 22 44 0 0 0 0 20 0 0 0 100 6 0 0 0 8 1 4 0 1 4 0 301 0 0 0 100 7 0 0 14 10 1 8 0 0 1 0 266 0 0 0 100 April 15, 2026 at 06:12:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 202 114 0 0 0 0 302 0 0 0 100 1 0 0 7 13 4 10 0 0 4 0 551 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 1 212 103 32 0 0 0 0 753 0 0 0 100 5 0 0 0 49 22 44 0 0 0 0 20 0 0 0 100 6 0 0 0 7 1 2 0 0 5 0 299 0 0 0 100 7 0 0 14 5 1 4 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:12:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2336 216 158 0 3 1 0 316 0 0 0 100 1 0 0 7 15 4 12 1 1 6 0 553 0 0 0 100 2 0 0 0 11 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 215 104 34 1 0 0 0 755 0 0 0 100 5 0 0 0 23 7 14 0 1 0 0 4 0 0 0 100 6 0 0 0 8 1 2 0 0 2 0 302 0 0 0 100 7 0 0 14 8 1 4 0 0 2 0 266 0 0 0 100 April 15, 2026 at 06:12:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2352 222 158 0 0 0 0 322 0 0 0 100 1 0 0 7 30 7 32 0 1 3 0 570 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 109 50 106 0 0 0 0 11 0 0 0 100 4 0 0 7 217 103 40 1 0 0 0 766 0 0 0 100 5 0 0 0 18 7 10 0 0 1 0 0 0 0 0 100 6 0 0 0 11 1 6 1 0 2 0 298 0 0 0 100 7 0 0 14 10 1 6 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2346 221 153 0 0 0 0 320 0 0 0 100 1 0 0 7 15 4 10 0 0 8 0 551 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 212 103 32 0 0 0 0 754 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 300 0 0 0 100 7 0 0 14 11 3 8 0 0 0 0 267 0 0 0 100 April 15, 2026 at 06:12:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2346 222 156 0 0 2 0 322 0 0 0 99 1 0 0 7 18 4 16 0 0 6 0 552 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 213 103 32 1 0 0 0 754 0 0 0 100 5 0 0 0 10 2 6 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 4 0 300 0 0 0 100 7 1 0 14 7 1 2 0 0 0 0 289 0 0 0 100 April 15, 2026 at 06:12:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2346 221 154 0 0 0 0 320 0 0 0 100 1 0 0 7 18 4 12 1 0 2 0 553 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 107 50 102 0 1 0 0 0 0 0 0 100 4 0 0 7 213 103 32 1 0 0 0 753 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 6 0 300 0 0 0 100 7 1 0 14 8 2 6 0 1 0 0 267 0 0 0 100 April 15, 2026 at 06:12:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2351 223 156 0 0 0 0 323 0 0 0 100 1 0 0 7 13 4 10 0 0 8 0 552 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 4 0 0 2 212 103 32 1 0 1 0 754 0 0 0 100 5 0 0 0 9 2 6 0 1 0 0 0 0 0 0 100 6 0 0 0 9 1 2 1 0 3 0 301 0 0 0 100 7 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2347 221 158 0 0 0 0 320 0 0 0 100 1 0 0 7 30 8 32 0 0 3 0 571 0 0 0 100 2 0 0 0 11 2 8 0 0 0 0 9 0 0 0 100 3 0 0 0 111 50 110 0 0 0 0 12 0 0 0 100 4 1 0 1 222 103 52 0 1 0 0 782 0 0 0 100 5 0 0 0 20 11 10 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 2 0 296 0 0 0 100 7 0 0 14 9 1 6 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2344 222 156 0 0 1 0 322 0 0 0 99 1 0 0 7 15 5 10 0 0 2 0 551 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 3 0 0 0 109 51 102 0 0 1 0 0 0 0 0 100 4 0 0 2 220 103 42 1 0 1 0 755 0 0 0 100 5 0 0 0 13 3 6 0 0 1 0 0 0 0 0 100 6 0 0 0 11 3 6 0 1 2 0 303 0 0 0 100 7 0 0 14 7 2 2 0 0 1 0 266 0 0 0 100 April 15, 2026 at 06:12:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2345 221 154 0 0 0 0 320 0 0 0 100 1 0 0 7 14 4 10 1 0 1 0 553 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 212 103 32 1 0 1 0 753 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 4 0 1 5 0 298 0 0 0 100 7 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2348 222 156 0 0 0 0 322 0 0 0 100 1 0 0 7 13 4 10 0 0 3 0 551 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 213 103 34 0 0 1 0 755 0 0 0 100 5 0 0 0 12 2 12 0 1 1 0 0 0 0 0 100 6 0 0 0 8 1 2 1 0 5 0 302 0 0 0 100 7 0 0 14 6 1 6 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:12:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2345 221 154 0 0 0 0 320 0 0 0 100 1 0 0 7 15 5 12 0 0 5 0 554 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 214 104 34 1 0 0 0 754 0 0 0 100 5 0 0 0 17 2 16 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 1 0 300 0 0 0 100 7 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2346 222 156 0 0 0 0 322 0 0 0 99 1 0 0 8 26 7 26 0 0 0 0 569 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 112 50 112 0 0 0 0 16 0 0 0 100 4 0 0 2 217 103 40 1 0 0 0 764 0 0 0 100 5 0 0 0 20 9 8 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 3 0 299 0 0 0 100 7 0 0 14 8 1 6 0 1 1 0 266 0 0 0 100 April 15, 2026 at 06:12:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2345 221 152 0 0 0 0 320 0 0 0 100 1 0 0 7 14 4 10 1 0 5 0 551 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 212 103 32 0 0 0 0 755 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 12 1 10 0 1 3 0 301 0 0 0 100 7 0 0 14 7 2 6 0 1 0 0 267 0 0 0 100 April 15, 2026 at 06:12:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2348 222 156 0 0 0 0 322 0 0 0 100 1 0 0 7 13 4 10 0 0 0 0 553 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 212 103 32 1 0 0 0 753 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 6 1 1 5 0 301 0 0 0 100 7 0 0 14 10 1 10 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:12:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2345 221 152 0 0 0 0 320 0 0 0 100 1 0 0 7 13 4 10 0 0 9 0 552 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 111 53 106 0 0 0 0 3 0 0 0 100 4 0 0 2 212 103 32 1 0 1 0 754 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 1 0 299 0 0 0 100 7 0 0 14 7 2 6 0 1 0 0 267 0 0 0 100 April 15, 2026 at 06:12:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2345 223 158 0 0 1 0 323 0 0 0 100 1 0 0 7 14 4 12 0 1 1 0 573 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 4 0 0 2 211 103 32 0 0 0 0 755 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 4 0 1 4 0 299 0 0 0 100 7 0 0 14 11 1 10 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2349 221 176 0 1 0 0 320 0 0 0 100 1 0 0 7 23 5 26 1 0 1 0 565 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 114 52 112 0 0 0 0 17 0 0 0 100 4 0 0 2 216 103 40 1 0 1 0 766 0 0 0 100 5 0 0 0 21 12 8 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 4 0 1 2 0 301 0 0 0 100 7 0 0 14 12 1 8 0 0 2 0 266 0 0 0 100 April 15, 2026 at 06:12:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2346 222 158 0 0 1 0 322 0 0 0 100 1 0 0 7 15 5 10 0 0 5 0 551 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 3 0 0 0 109 51 102 0 0 1 0 0 0 0 0 100 4 0 0 2 211 103 32 0 0 2 0 753 0 0 0 100 5 0 0 0 13 3 4 0 0 1 0 0 0 0 0 100 6 0 0 0 12 3 4 1 0 4 0 302 0 0 0 100 7 0 0 14 8 2 6 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:12:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2345 221 154 0 0 0 0 320 0 0 0 100 1 0 0 7 16 5 14 0 1 1 0 554 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 212 103 32 1 0 0 0 755 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 4 0 1 5 0 299 0 0 0 100 7 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2344 222 158 0 0 2 0 322 0 0 0 100 1 0 0 7 16 4 12 0 0 8 0 551 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 102 0 1 0 0 0 0 0 0 100 4 0 0 2 212 103 32 1 0 0 0 753 0 0 0 100 5 0 0 0 10 2 6 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 4 0 301 0 0 0 100 7 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2347 221 152 0 0 0 0 320 0 0 0 100 1 0 0 7 14 4 10 1 0 6 0 553 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 213 104 34 0 0 0 0 756 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 5 0 299 0 0 0 100 7 0 0 14 5 1 4 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:12:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2348 222 158 0 0 0 0 322 0 0 0 100 1 0 0 7 29 7 32 0 0 4 0 573 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 108 50 108 0 0 0 0 12 0 0 0 100 4 0 0 3 216 103 40 1 0 0 0 765 0 0 0 100 5 0 0 0 21 8 10 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 6 1 2 1 0 301 0 0 0 100 7 0 0 14 9 1 4 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2345 221 152 0 0 0 0 320 0 0 0 100 1 0 0 7 15 5 12 0 0 1 0 552 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 212 103 32 1 0 0 0 754 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 4 0 0 1 0 299 0 0 0 100 7 0 0 14 8 2 8 0 2 0 0 267 0 0 0 100 April 15, 2026 at 06:12:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2344 222 154 0 0 0 0 322 0 0 0 100 1 0 0 7 13 4 10 0 0 4 0 553 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 211 103 32 0 0 0 0 754 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 2 6 0 1 5 0 326 0 0 0 100 7 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:12:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2345 221 154 0 0 1 0 320 0 0 0 100 1 0 0 7 14 4 10 1 0 7 0 551 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 212 103 32 1 0 1 0 754 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 4 0 1 4 0 297 0 0 0 100 7 0 0 14 12 2 8 0 0 0 0 267 0 0 0 100 April 15, 2026 at 06:13:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2350 223 172 0 1 2 0 323 0 0 0 100 1 0 0 7 13 4 10 0 0 4 0 552 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 4 0 0 2 212 103 32 1 0 0 0 754 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 4 1 0 6 0 302 0 0 0 100 7 0 0 14 10 2 8 0 0 1 0 266 0 0 0 100 April 15, 2026 at 06:13:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2345 221 154 0 0 0 0 320 0 0 0 100 1 0 0 7 28 7 30 0 0 8 0 571 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 108 50 106 0 0 0 0 11 0 0 0 100 4 0 0 3 215 103 40 0 0 0 0 766 0 0 0 100 5 0 0 0 16 7 10 0 1 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 2 0 298 0 0 0 100 7 0 0 14 9 1 4 0 0 1 0 266 0 0 0 100 April 15, 2026 at 06:13:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2348 222 158 0 0 1 0 322 0 0 0 100 1 0 0 7 16 5 12 0 1 7 0 552 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 3 0 0 0 109 51 102 0 0 1 0 0 0 0 0 100 4 0 0 2 212 103 32 1 0 1 0 753 0 0 0 100 5 0 0 0 11 3 4 0 0 1 0 0 0 0 0 100 6 0 0 0 11 3 4 0 0 3 0 301 0 0 0 100 7 0 0 14 7 2 4 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:13:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2345 221 152 0 0 0 0 320 0 0 0 100 1 0 0 7 16 4 12 1 0 6 0 552 0 0 0 100 2 0 0 0 10 1 8 0 1 2 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 212 103 32 1 0 0 0 755 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 7 0 301 0 0 0 100 7 0 0 14 5 1 4 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:13:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2346 222 154 0 1 0 0 322 0 0 0 100 1 0 0 7 19 4 14 0 2 7 0 551 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 211 103 32 0 0 0 0 753 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 1 0 5 0 299 0 0 0 100 7 0 0 14 5 1 2 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2343 221 152 0 0 0 0 320 0 0 0 100 1 0 0 7 15 5 12 0 0 7 0 553 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 3 0 0 0 107 50 104 0 1 0 0 0 0 0 0 100 4 0 0 2 214 104 34 1 0 0 0 755 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 2 0 299 0 0 0 100 7 0 0 14 5 1 4 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:13:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2347 221 158 0 0 0 0 322 0 0 0 100 1 0 0 7 25 7 24 0 0 1 0 569 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 113 50 114 0 0 0 0 14 0 0 0 100 4 0 0 3 219 103 48 0 1 0 0 766 0 0 0 100 5 0 0 0 17 8 8 0 0 2 0 0 0 0 0 100 6 0 0 0 7 1 4 0 1 0 0 300 0 0 0 100 7 0 0 14 10 1 6 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2347 221 152 0 0 0 0 320 0 0 0 100 1 0 0 7 14 4 10 1 0 3 0 552 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 212 103 32 1 0 0 0 754 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 2 0 300 0 0 0 100 7 0 0 14 9 2 8 0 0 0 0 267 0 0 0 100 April 15, 2026 at 06:13:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2346 222 160 0 2 1 0 322 0 0 0 100 1 0 0 7 14 4 10 0 0 2 0 552 0 0 0 100 2 0 0 0 11 3 6 0 0 1 0 0 0 0 0 100 3 0 0 0 108 51 106 0 2 0 0 0 0 0 0 100 4 0 0 2 220 103 43 1 2 0 0 753 0 0 0 100 5 0 0 0 10 2 6 0 1 1 0 0 0 0 0 100 6 0 0 0 8 1 2 1 0 4 0 300 0 0 0 100 7 0 0 14 9 3 6 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2343 221 156 0 0 2 0 320 0 0 0 99 1 0 0 7 11 3 8 0 0 4 0 552 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 4 0 0 2 220 104 42 1 0 0 0 755 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 4 0 300 0 0 0 100 7 0 0 14 8 2 6 0 0 0 0 267 0 0 0 100 April 15, 2026 at 06:13:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2349 223 156 0 0 0 0 323 0 0 0 100 1 0 0 7 13 4 10 0 0 2 0 572 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 107 51 102 0 0 0 0 1 0 0 0 100 4 0 0 2 214 104 34 1 0 0 0 753 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 2 0 300 0 0 0 100 7 0 0 14 5 1 4 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:13:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2349 221 158 0 0 0 0 320 0 0 0 100 1 0 0 7 21 4 24 1 0 4 0 566 0 0 0 100 2 0 0 0 11 2 8 0 0 0 0 9 0 0 0 100 3 0 0 0 114 52 110 0 0 0 0 16 0 0 0 100 4 0 0 2 221 104 48 0 0 0 0 784 0 0 0 100 5 0 0 0 20 9 14 0 1 2 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 3 0 300 0 0 0 100 7 0 0 14 9 1 6 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2346 222 158 0 0 1 0 322 0 0 0 100 1 0 0 7 13 4 8 0 0 3 0 552 0 0 0 100 2 0 0 0 9 2 2 0 0 1 0 0 0 0 0 100 3 0 0 0 109 51 102 0 0 1 0 0 0 0 0 100 4 0 0 2 214 104 36 1 1 1 0 754 0 0 0 100 5 0 0 0 17 3 12 0 0 2 0 0 0 0 0 100 6 0 0 0 12 3 4 1 0 3 0 301 0 0 0 100 7 0 0 14 7 2 2 0 0 1 0 266 0 0 0 100 April 15, 2026 at 06:13:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2335 216 142 0 0 0 0 315 0 0 0 100 1 0 0 7 22 8 20 0 1 1 0 558 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 213 104 34 0 0 1 0 754 0 0 0 100 5 0 0 0 9 2 6 0 1 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 4 0 300 0 0 0 100 7 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2306 202 114 0 0 0 0 302 0 0 0 100 1 0 0 7 51 23 48 0 0 2 0 572 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 2 214 104 34 1 0 0 0 753 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 6 0 1 2 0 300 0 0 0 100 7 0 0 14 6 1 4 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2305 201 116 0 0 0 0 300 0 0 0 100 1 0 0 7 52 23 48 1 0 1 0 571 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 100 0 0 0 0 0 0 0 0 100 4 0 0 3 216 105 36 1 0 0 0 756 0 0 0 100 5 0 0 0 9 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 6 0 1 1 0 300 0 0 0 100 7 0 0 14 8 1 6 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:13:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3 2308 202 116 0 0 0 0 302 0 0 0 100 1 0 0 7 67 26 70 0 0 2 0 594 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 108 50 106 0 0 0 0 11 0 0 0 100 4 0 0 3 217 104 42 0 0 0 0 764 0 0 0 100 5 0 0 0 20 9 8 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 1 0 4 0 300 0 0 0 100 7 0 0 14 10 2 8 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:13:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2307 202 116 0 0 2 0 300 0 0 0 100 1 8 0 7 57 25 218 0 3 1 0 911 0 0 0 100 2 0 0 0 8 1 4 0 1 0 0 3 0 0 0 100 3 0 0 0 108 51 104 0 0 0 0 6 0 0 0 100 4 0 0 2 217 105 38 1 1 0 0 759 0 0 0 100 5 0 0 0 12 4 4 0 0 0 0 0 0 0 0 100 6 0 0 0 7 1 2 0 0 3 0 300 0 0 0 100 7 0 0 14 12 2 12 0 1 4 0 268 0 0 0 100 April 15, 2026 at 06:13:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 128 0 1 0 0 302 0 0 0 100 1 0 0 7 52 23 48 0 0 2 0 571 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 214 104 34 0 0 0 0 755 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 3 0 299 0 0 0 100 7 0 0 14 9 1 6 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 112 0 0 0 0 300 0 0 0 100 1 0 0 7 53 23 48 1 0 4 0 572 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 215 104 34 1 0 0 0 755 0 0 0 100 5 0 0 0 10 2 6 0 1 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 2 0 301 0 0 0 100 7 0 0 14 8 2 4 0 0 0 0 267 0 0 0 100 April 15, 2026 at 06:13:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 203 120 0 0 0 0 303 0 0 0 100 1 0 0 7 53 23 50 0 1 2 0 573 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 108 51 104 0 1 0 0 1 0 0 0 100 4 0 0 7 214 104 34 0 0 0 0 755 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 1 0 0 0 300 0 0 0 100 7 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 116 0 0 0 0 300 0 0 0 100 1 0 0 7 66 26 70 0 0 4 0 590 0 0 0 100 2 0 0 0 12 1 6 0 1 0 0 0 0 0 0 100 3 0 0 0 109 50 106 0 0 0 0 12 0 0 0 100 4 0 0 7 219 104 42 1 0 1 0 765 0 0 0 100 5 0 0 0 16 6 10 0 1 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 1 0 300 0 0 0 100 7 0 0 14 10 1 4 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 116 0 0 1 0 302 0 0 0 100 1 0 0 7 52 23 46 0 0 1 0 570 0 0 0 100 2 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 3 0 0 0 110 51 102 0 0 1 0 0 0 0 0 100 4 0 0 7 214 104 34 0 0 1 0 755 0 0 0 100 5 0 0 0 12 3 6 0 1 0 0 0 0 0 0 100 6 0 0 0 12 3 4 0 0 6 0 301 0 0 0 100 7 0 0 14 9 2 2 0 0 1 0 266 0 0 0 100 April 15, 2026 at 06:13:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 114 0 0 0 0 300 0 0 0 100 1 0 0 7 15 4 8 1 0 5 0 552 0 0 0 100 2 0 0 0 49 20 44 0 1 0 0 20 0 0 0 100 3 0 0 0 107 50 102 0 1 0 0 0 0 0 0 100 4 0 0 7 215 104 34 1 0 0 0 755 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 4 0 1 7 0 300 0 0 0 100 7 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 116 0 0 0 0 302 0 0 0 100 1 0 0 7 12 3 8 0 0 7 0 552 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 3 0 0 0 109 50 102 0 0 0 0 0 0 0 0 100 4 0 0 7 216 104 36 1 1 1 0 756 0 0 0 100 5 0 0 0 10 2 6 0 1 0 0 0 0 0 0 100 6 0 0 0 9 1 2 1 0 4 0 299 0 0 0 100 7 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 112 0 0 0 0 300 0 0 0 100 1 0 0 7 12 3 8 0 0 4 0 553 0 0 0 100 2 0 0 0 49 21 44 0 1 0 0 20 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 216 105 36 0 0 0 0 756 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 302 0 0 0 100 7 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 118 0 0 0 0 302 0 0 0 100 1 0 0 7 27 7 26 0 0 2 0 570 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 3 0 0 0 112 50 112 0 0 0 0 13 0 0 0 100 4 0 0 7 224 104 48 1 0 0 0 767 0 0 0 100 5 0 0 0 17 6 10 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 4 0 298 0 0 0 100 7 0 0 14 9 1 4 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 112 0 0 0 0 300 0 0 0 100 1 0 0 7 13 3 8 1 0 7 0 551 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 217 104 36 1 0 3 0 754 0 0 0 100 5 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 6 0 0 0 10 1 6 0 1 1 0 300 0 0 0 100 7 0 0 14 8 2 4 0 0 0 0 267 0 0 0 100 April 15, 2026 at 06:13:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 116 0 0 0 0 302 0 0 0 100 1 0 0 7 12 3 8 0 0 2 0 553 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 214 104 34 0 0 0 0 755 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 1 0 2 0 301 0 0 0 100 7 0 0 14 6 1 4 0 1 0 0 266 0 0 0 100 April 15, 2026 at 06:13:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 114 0 1 0 0 300 0 0 0 100 1 0 0 7 12 3 8 0 0 4 0 552 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 3 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 4 0 0 7 215 104 34 1 0 0 0 755 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 10 1 4 0 0 2 0 299 0 0 0 100 7 0 0 14 10 2 8 0 1 0 0 267 0 0 0 100 April 15, 2026 at 06:13:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 120 0 0 0 0 303 0 0 0 100 1 0 0 7 14 4 10 0 0 0 0 573 0 0 0 100 2 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 3 0 0 0 110 52 106 0 1 0 0 2 0 0 0 100 4 0 0 7 214 104 34 0 0 0 0 756 0 0 0 100 5 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 1 0 300 0 0 0 100 7 0 0 14 13 1 14 0 0 0 0 266 0 0 0 100 April 15, 2026 at 06:13:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2318 202 480 10 8 20 0 318 0 1 0 99 1 1314 0 9 60 4 84 2 1 203 0 859 0 1 0 99 2 1 0 0 46 18 44 0 2 0 0 50 0 0 0 100 3 653 0 0 123 52 126 0 1 1 0 155 0 0 0 100 4 0 0 8 232 104 66 1 2 1 0 863 0 0 0 100 5 0 0 0 1061 1044 238 71 9 568 0 31 0 1 0 99 6 0 0 0 9 1 4 0 0 1 0 280 0 0 0 100 7 0 0 14 144 2 322 0 0 127 0 284 0 0 0 100 April 15, 2026 at 06:13:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 137 0 2 3 0 302 0 0 0 100 1 1 0 7 20 6 16 0 0 5 0 565 0 0 0 100 2 0 0 0 10 2 2 0 0 1 0 0 0 0 0 100 3 0 0 0 111 51 104 0 0 1 0 0 0 0 0 100 4 0 0 7 220 104 46 0 1 2 0 785 0 0 0 100 5 0 0 0 28 17 8 0 1 0 0 0 0 0 0 100 6 0 0 0 14 3 4 1 0 5 0 320 0 0 0 100 7 0 0 14 11 2 4 0 0 1 0 266 0 0 0 100 April 15, 2026 at 06:13:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 127 0 0 2 0 300 0 0 0 100 1 0 0 7 20 3 20 0 1 6 0 553 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 0 0 0 0 100 4 12 0 7 230 106 54 2 0 0 0 804 0 0 0 100 5 0 0 0 51 39 10 0 1 7 0 5 0 0 0 100 6 0 0 0 8 1 2 0 0 3 0 299 0 0 0 100 7 0 0 14 10 1 8 0 0 1 0 266 0 0 0 100