April 27, 2026 at 06:25:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1706 0 121 2485 139 10070 85 761 2538 54 13301 5 8 0 87 1 1236 0 104 370 14 7384 24 520 2187 86 15205 2 8 0 91 2 1612 0 179 453 16 6920 28 450 2094 48 13367 6 5 0 89 3 1454 0 163 694 362 8540 19 561 2222 82 17374 4 5 0 91 4 1249 0 385 650 356 5081 15 406 1966 55 8633 4 6 0 90 5 2025 0 71 7831 7495 5435 28 429 3771 64 12760 14 7 0 79 6 1233 0 63 316 18 8961 16 474 1933 78 19237 2 5 0 94 7 1175 0 604 254 24 6687 37 331 2151 13 7390 1 5 0 93 April 27, 2026 at 06:25:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 5248 0 730 2266 161 366 8 37 535 28 4655 14 9 0 77 1 7257 0 42 421 8 595 10 90 665 45 6788 10 3 0 87 2 4353 0 56 278 68 371 6 76 574 32 2741 12 4 0 84 3 3636 0 70 354 23 576 1 108 394 42 2751 1 21 0 78 4 7178 0 36 318 26 529 1 108 496 44 3645 2 4 0 94 5 6991 0 35 247 57 625 0 100 575 57 2246 1 3 0 96 6 4269 0 59 466 3 472 1 91 404 60 3868 2 2 0 96 7 5347 0 39 469 10 488 3 90 761 49 5745 7 3 0 90 April 27, 2026 at 06:25:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2374 228 790 4 118 2255 0 300 0 8 0 92 1 31 0 0 181 5 870 3 128 2451 0 1067 0 8 0 92 2 0 0 14 314 105 491 3 96 2230 0 259 0 9 0 91 3 0 0 0 496 451 481 5 86 2294 1 320 0 9 0 91 4 0 0 0 542 466 439 5 70 2273 0 0 0 9 0 91 5 0 0 2 116 0 623 4 117 2461 0 0 0 9 0 91 6 0 0 21 118 2 1901 3 256 2428 0 50 0 3 0 97 7 0 0 0 135 2 894 11 162 2410 0 518 0 6 0 94 April 27, 2026 at 06:25:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 212 107 0 3 0 0 300 0 1 0 99 1 27 0 0 96 42 122 0 2 0 0 1048 0 0 0 100 2 0 0 14 229 104 20 0 0 0 0 259 0 0 0 100 3 0 0 0 13 3 6 0 0 4 0 299 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 2 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 18 1 10 0 0 0 0 0 0 0 0 100 7 0 0 14 8 2 4 0 0 5 0 561 0 0 0 100 April 27, 2026 at 06:25:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 202 112 0 0 2 0 300 0 0 0 100 1 1 0 0 121 54 146 0 0 0 0 1054 0 0 0 99 2 0 0 14 217 104 10 0 1 0 0 277 0 0 0 100 3 0 0 0 8 1 2 0 0 4 0 300 0 0 0 100 4 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 13 1 10 0 0 0 0 0 0 0 0 100 6 0 0 0 18 2 12 0 0 0 0 1 0 0 0 100 7 0 0 14 8 2 4 0 0 3 0 559 0 0 0 100 April 27, 2026 at 06:25:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 106 0 1 1 0 300 0 0 0 100 1 0 0 0 29 9 50 0 1 1 0 1044 0 0 0 100 2 0 0 14 307 148 98 0 2 1 0 259 0 0 0 100 3 0 0 0 13 3 4 0 0 1 0 303 0 0 0 100 4 0 0 0 13 4 4 0 0 1 0 3 0 0 0 100 5 0 0 2 15 3 6 0 1 1 0 4 0 0 0 100 6 0 0 1 24 3 20 0 3 0 1 5 0 0 0 100 7 7 0 14 15 3 12 0 2 8 0 565 0 0 0 100 April 27, 2026 at 06:25:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15601 0 737 3683 208 18974 4238 4176 24081 470 110880 18 35 0 47 1 13672 0 2 1712 32 15573 3496 3513 34169 488 96537 17 33 0 49 2 9621 0 15 1605 117 14275 3101 3154 47031 386 89560 17 36 0 48 3 56861 0 8 1880 286 16908 3934 3897 31620 394 108792 19 39 0 42 4 18130 0 9 2007 279 16256 3547 3871 30447 508 97847 17 36 0 46 5 14056 0 1 1892 23 17285 3750 3747 31458 403 101509 18 34 0 48 6 14792 0 1 1828 5 16637 3828 3736 29455 409 98352 18 32 0 50 7 16984 0 17 1584 18 16709 3622 3849 31317 376 98426 16 36 0 48 April 27, 2026 at 06:25:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1989 0 1410 4465 222 32291 4886 5316 28029 96 167756 35 64 0 1 1 442 0 7 2460 27 31882 4989 5528 25017 123 162892 39 59 0 1 2 721 0 10 2616 119 31650 4670 5286 31719 115 160891 34 65 0 1 3 597 0 7 3253 674 34714 5657 5355 35286 109 170807 37 62 0 1 4 851 0 0 3052 676 31277 4881 5299 30575 136 160342 36 63 0 1 5 199 0 12 2524 39 36664 5146 6299 26827 58 177584 32 66 0 2 6 189 0 7 2347 15 34074 4681 5412 36764 91 165817 33 66 0 1 7 875 0 2082 2073 24 33547 4641 5676 25891 84 173101 36 62 0 2 April 27, 2026 at 06:25:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 1420 3817 216 34683 3953 5354 19659 114 169288 36 63 0 1 1 8 0 42 2011 38 35133 4522 5617 19534 76 172765 39 61 0 1 2 1 0 10 2343 121 37786 4995 5762 18914 108 180699 37 61 0 1 3 3 0 0 2748 691 35827 4821 5631 22730 124 171759 37 62 0 1 4 0 0 0 2650 664 35850 4708 5595 15830 124 183059 36 64 0 1 5 3 0 0 1821 25 31759 3850 5094 20716 115 159249 37 62 0 1 6 4 0 0 2001 25 34590 4199 5533 19013 143 173870 36 63 0 1 7 2 0 14 2244 14 35372 5260 5552 19462 160 170577 40 59 0 1 April 27, 2026 at 06:25:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 1430 4098 226 33700 5003 4809 16566 54 155942 37 62 0 1 1 100 0 7 2025 30 34660 4719 4865 18032 94 155248 36 63 0 1 2 1 0 3 2383 127 38237 5157 5454 15994 78 174598 36 64 0 1 3 3 0 0 2800 717 36792 4972 4980 19626 66 167680 36 63 0 0 4 1 0 0 2873 718 35440 5095 4631 20184 95 159595 39 60 0 0 5 33 0 0 2201 34 36713 4868 5140 19565 108 165554 36 63 0 1 6 1 0 0 1985 19 31914 4727 4703 20002 96 151311 36 63 0 1 7 3 0 0 2178 32 32989 4936 4645 19738 79 154252 39 60 0 1 April 27, 2026 at 06:25:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 3520 3919 224 32666 4082 5001 15876 148 158024 33 67 0 1 1 9 0 56 2218 20 30143 3881 4394 21524 88 146365 37 62 0 0 2 33 0 34 2539 124 33873 4403 4699 18176 79 159130 37 62 0 1 3 0 0 28 3049 662 33192 4637 4577 20257 63 153696 37 62 0 0 4 2 0 0 3172 649 34147 5142 4969 16853 75 171899 38 61 0 1 5 0 0 690 2440 34 35139 4821 5100 16922 141 166875 34 65 0 1 6 0 0 47 2271 22 32054 4064 4647 17972 103 155297 36 63 0 0 7 24 0 36 2354 21 31427 4530 4527 17934 77 152554 36 63 0 0 April 27, 2026 at 06:25:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 1696 4198 218 31756 4991 4649 19098 64 150781 35 64 0 1 1 26 0 7 2328 26 35839 5519 4707 19381 56 156609 37 63 0 0 2 33 0 3 2665 125 38074 5884 5121 19566 82 165159 34 65 0 1 3 10 0 0 2921 754 35248 5003 4565 18372 25 151755 38 62 0 1 4 1 0 0 3161 757 34675 6009 4894 22911 45 161109 38 62 0 1 5 0 0 7 2524 33 34606 5785 4918 20299 103 163685 36 64 0 1 6 35 0 6 2409 32 32700 5592 4623 23135 55 157216 36 63 0 1 7 0 0 14 2375 25 33422 5316 4484 22358 29 152382 38 62 0 1 April 27, 2026 at 06:25:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 612 0 1038 3510 218 22211 3343 3154 14795 22 100945 28 43 0 29 1 120 0 21 1434 19 22057 3446 3093 15200 16 107386 29 42 0 29 2 679 0 4 1539 132 19065 2815 3063 12300 47 95498 26 44 0 30 3 821 0 0 1972 542 23542 3183 3440 13095 54 108113 25 45 0 30 4 659 0 3 1907 569 22898 3139 3427 15506 48 104961 25 45 0 30 5 983 0 0 1439 13 23719 3087 3498 15378 24 107348 27 43 0 30 6 638 0 0 1436 19 22168 2959 3289 12550 50 101378 24 46 0 30 7 897 0 0 1377 17 22797 2983 3211 14971 33 102243 26 43 0 31 April 27, 2026 at 06:25:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 202 144 1 3 2 0 1189 0 1 0 99 1 0 0 21 14 4 12 3 2 3 0 841 0 0 0 99 2 0 0 7 208 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 27 10 20 0 0 0 0 32 0 0 0 100 4 0 0 0 18 2 6 0 0 0 0 0 0 0 0 100 5 0 0 0 12 2 4 0 0 0 0 0 0 0 0 100 6 0 0 0 114 53 106 0 0 0 0 300 0 0 0 100 7 0 0 0 11 2 6 0 1 0 0 295 0 0 0 100 April 27, 2026 at 06:25:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 146 1 0 0 0 1186 0 1 0 99 1 0 0 21 18 4 16 0 1 1 0 828 0 0 0 100 2 0 0 7 208 101 0 0 0 0 0 0 0 0 0 100 3 0 0 0 22 8 16 0 0 0 0 10 0 0 0 100 4 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 114 53 108 0 0 0 0 301 0 0 0 100 7 0 0 0 10 2 4 0 0 4 0 294 0 0 0 100 April 27, 2026 at 06:25:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 203 152 1 1 0 0 1187 0 1 0 99 1 0 0 21 14 5 8 0 0 6 0 825 0 0 0 100 2 0 0 7 208 101 0 0 0 1 0 0 0 0 0 100 3 0 0 0 23 8 14 0 0 1 0 10 0 0 0 100 4 0 0 0 11 3 2 0 0 1 0 1 0 0 0 100 5 0 0 0 11 2 4 0 0 1 0 3 0 0 0 100 6 0 0 0 113 53 106 0 0 1 0 300 0 0 0 100 7 0 0 0 17 5 10 0 0 2 0 298 0 0 0 100 April 27, 2026 at 06:25:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 155 0 217 2378 204 2016 115 160 836 6 7215 5 4 0 92 1 60 0 21 373 5 1950 155 153 770 3 6432 5 3 0 92 2 112 0 7 566 103 1725 27 123 640 8 4152 4 3 0 93 3 41096 0 0 150 37 1490 27 103 798 4 4451 6 8 0 86 4 2574 0 19 242 30 1260 28 88 732 21 5191 6 4 0 89 5 79 0 25 267 9 1360 18 84 455 11 3849 4 3 0 92 6 81 0 8 142 40 1682 16 104 831 10 4351 3 8 0 89 7 76 0 0 406 12 1477 18 82 709 3 4307 2 3 0 95 April 27, 2026 at 06:25:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 1416 2514 211 14263 358 1437 6059 27 34976 22 20 0 58 1 25 0 35 532 10 14081 436 1341 5550 17 34822 24 19 0 57 2 21 0 84 683 117 12499 406 1150 5721 26 36194 27 20 0 53 3 20 0 7 767 343 11975 271 1030 5588 19 32636 27 21 0 52 4 22 0 0 761 345 11403 243 917 5628 28 33216 31 22 0 47 5 11 0 7 423 11 10739 228 874 5853 34 30153 28 21 0 51 6 24 0 0 463 7 12171 554 884 5694 30 32760 28 17 0 55 7 18 0 0 410 13 10931 408 815 5551 24 30688 28 18 0 54 April 27, 2026 at 06:25:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 1424 2545 216 14341 484 1661 6313 15 35652 26 20 0 54 1 13 0 0 435 7 14090 452 1458 6659 17 35521 24 19 0 57 2 19 0 3 669 111 13884 536 1331 5930 13 37769 27 18 0 55 3 9 0 14 860 428 12585 347 1157 6532 15 34461 28 20 0 52 4 16 0 0 831 431 11577 299 1033 6173 24 31558 28 20 0 52 5 11 0 7 447 9 11787 308 968 5872 18 32617 28 18 0 54 6 11 0 0 442 6 12261 463 987 5769 17 32678 27 16 0 57 7 14 0 0 437 21 10840 254 884 5679 11 30342 28 19 0 53 April 27, 2026 at 06:25:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 1418 2601 214 14906 677 1632 6804 11 36862 26 19 0 55 1 12 0 0 477 10 13326 430 1349 6197 8 33177 25 20 0 56 2 11 0 3 625 110 12774 364 1226 6537 13 32518 24 20 0 56 3 8 0 29 781 361 11556 309 1008 6631 19 33720 29 21 0 50 4 9 0 0 743 360 11855 276 1010 6614 9 33172 26 19 0 55 5 5 0 14 510 16 12618 543 1047 6801 16 34131 28 17 0 55 6 11 0 7 464 10 11340 351 939 6480 10 32506 28 18 0 54 7 7 0 0 404 9 10626 247 846 6263 21 29707 29 19 0 52 April 27, 2026 at 06:25:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 1423 2616 214 13592 517 1467 6299 6 34373 27 21 0 52 1 10 0 0 483 9 13301 398 1291 6648 6 33997 26 20 0 54 2 13 0 4 696 112 13750 693 1252 6532 9 34027 27 19 0 54 3 15 0 0 814 330 12537 520 1122 6548 14 31291 26 19 0 56 4 8 0 0 802 330 11315 274 948 6399 17 31767 29 21 0 50 5 6 0 14 438 12 11182 254 908 6073 11 29812 27 20 0 53 6 8 0 0 518 14 11605 538 935 5893 10 33579 30 19 0 51 7 11 0 221 395 8 11094 226 851 6330 8 27904 24 19 0 57 April 27, 2026 at 06:25:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 1425 2535 211 13043 417 1406 6540 13 31579 25 21 0 55 1 20 0 0 474 17 13590 554 1325 6170 10 33049 25 18 0 56 2 14 0 3 675 106 12888 778 1185 6380 9 33362 29 20 0 51 3 19 0 0 779 338 12064 285 1036 6295 13 29116 25 19 0 56 4 12 0 0 729 341 11287 250 900 5877 13 29649 27 19 0 53 5 21 0 0 425 22 10783 313 865 5686 13 30523 31 20 0 50 6 12 0 14 427 16 10730 223 894 6075 16 29101 24 20 0 56 7 4 0 0 433 7 10338 301 770 5758 10 28454 29 19 0 52 April 27, 2026 at 06:25:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 1440 2563 208 13620 508 1538 6419 15 35646 28 22 0 51 1 16 0 4 532 15 13770 567 1386 5979 10 35303 25 21 0 55 2 17 0 4 706 108 12812 508 1142 6347 23 33487 28 20 0 52 3 10 0 0 831 334 12946 556 1133 6796 17 33693 25 19 0 56 4 10 0 0 747 345 11862 275 977 6781 8 32288 25 20 0 55 5 5 0 0 436 8 11289 296 910 6204 16 33087 29 21 0 50 6 11 0 14 462 17 11450 346 901 5867 21 31720 28 18 0 54 7 7 0 0 401 7 10827 235 862 6098 11 28937 26 20 0 55 April 27, 2026 at 06:25:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 1416 2562 210 13980 461 1563 6724 15 35754 24 21 0 55 1 10 0 7 415 9 13638 404 1405 6296 18 34764 24 21 0 55 2 12 0 3 664 115 12020 369 1156 5786 13 34632 32 22 0 46 3 9 0 0 829 310 13260 720 1080 6672 14 36970 29 20 0 51 4 5 0 0 700 309 12345 272 996 6327 10 33012 23 20 0 57 5 7 0 8 489 7 11587 381 928 6274 8 32232 29 19 0 52 6 5 0 6 385 8 12333 257 935 6411 8 31503 23 19 0 58 7 9 0 0 448 15 10993 526 890 6316 12 30897 28 20 0 53 April 27, 2026 at 06:25:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 14 0 1422 2586 214 13976 486 1424 6100 9 33115 22 20 0 58 1 9 0 0 495 11 13499 589 1284 5731 14 35605 26 20 0 54 2 7 0 35 608 110 12149 334 1104 6072 11 32116 28 20 0 52 3 7 0 7 752 307 11789 318 954 5900 12 31520 29 20 0 50 4 8 0 0 765 317 11961 599 892 5859 19 33244 30 19 0 51 5 12 0 0 404 7 10839 227 877 5765 15 28872 25 19 0 56 6 6 0 14 496 13 11781 458 901 5565 13 32266 28 18 0 54 7 9 0 0 391 5 10273 290 824 5552 22 28113 27 19 0 54 April 27, 2026 at 06:25:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 105 2334 201 1386 29 193 2612 7 2036 2 3 0 96 1 0 0 0 201 3 1495 27 193 2265 8 2574 2 2 0 96 2 1 0 7 367 103 1307 22 163 2609 9 1784 1 2 0 96 3 0 0 7 210 141 1468 11 171 2312 9 1978 1 2 0 97 4 4 0 0 191 143 1141 23 146 2331 11 2033 2 3 0 95 5 5 0 0 194 7 1167 12 128 2091 5 2047 1 2 0 97 6 0 0 14 299 53 1288 22 161 2051 5 3591 2 2 0 96 7 0 0 0 179 6 1080 13 136 2059 5 1718 2 2 0 96 April 27, 2026 at 06:25:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 128 0 0 0 0 11 0 0 0 100 1 0 0 0 20 2 22 0 1 0 0 324 0 0 0 100 2 0 0 7 218 103 16 0 1 0 0 3 0 0 0 100 3 0 0 7 13 2 8 0 0 0 0 263 0 0 0 100 4 0 0 0 13 3 6 0 1 0 0 1 0 0 0 100 5 0 0 0 33 15 18 0 1 10 0 312 0 0 0 100 6 0 0 14 114 54 140 1 0 4 0 1754 0 0 0 100 7 0 0 0 24 4 22 0 0 0 0 16 0 0 0 100 April 27, 2026 at 06:25:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 110 0 0 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 1 0 0 300 0 0 0 100 2 0 0 7 224 109 16 0 0 0 0 10 0 0 0 100 3 0 0 7 11 2 4 0 0 0 0 260 0 0 0 100 4 0 0 0 10 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 12 2 6 0 0 8 0 296 0 0 0 100 6 0 0 14 113 54 138 1 0 3 0 1753 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:25:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 110 0 0 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 0 0 0 300 0 0 0 100 2 0 0 7 224 108 16 0 1 0 0 9 0 0 0 100 3 15 0 7 11 2 10 0 1 0 0 303 0 0 0 100 4 0 0 0 9 2 2 0 0 0 0 0 0 0 0 100 5 0 0 0 10 1 4 0 0 6 0 294 0 0 0 100 6 0 0 14 24 9 46 1 0 6 0 1751 0 0 0 100 7 0 0 0 101 47 96 0 1 0 0 0 0 0 0 100 April 27, 2026 at 06:25:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1298 0 39 2372 203 374 2 61 699 14 564 0 2 0 97 1 89 0 2 172 2 200 0 37 4328 7 389 0 3 0 97 2 958 0 28 366 111 428 4 57 785 4 3003 0 4 0 95 3 17 0 21 280 36 428 1 43 794 11 1026 1 3 0 96 4 10112 0 190 260 35 398 10 61 5624 5 2573 2 10 0 88 5 14435 0 357 226 21 611 10 98 4471 10 23664 2 24 0 74 6 11056 0 85 286 6 426 0 84 1258 11 5582 1 7 0 92 7 4946 0 74 571 49 469 1 89 968 5 1607 1 3 0 96 April 27, 2026 at 06:25:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3581 0 343 2545 201 745 0 115 1212 60 1288 0 3 0 97 1 8338 0 257 292 1 589 0 86 990 60 5812 2 4 0 94 2 2742 0 25 699 153 809 0 102 786 79 3927 1 2 0 97 3 730 0 14 423 76 598 0 91 800 45 2536 0 1 0 98 4 3434 0 447 458 70 539 0 85 914 52 3735 1 2 0 97 5 1284 0 13 353 21 684 1 97 736 46 2909 1 2 0 98 6 970 0 34 379 4 646 1 81 737 33 4309 1 2 0 97 7 5510 0 271 484 4 558 0 83 812 42 2715 1 3 0 96 April 27, 2026 at 06:25:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 70 2309 203 134 0 0 6 0 12 0 1 0 99 1 0 0 7 35 3 24 0 3 6 0 313 0 0 0 100 2 0 0 7 328 154 112 0 3 0 0 0 0 0 0 100 3 0 0 7 23 3 10 0 2 0 0 259 0 0 0 100 4 0 0 0 27 2 16 0 1 1 0 15 0 0 0 100 5 0 0 0 37 11 18 0 1 2 0 296 0 0 0 100 6 0 0 14 24 4 38 1 0 6 0 1633 0 0 0 100 7 0 0 7 28 3 10 0 0 1 0 0 0 0 0 100 April 27, 2026 at 06:25:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2354 201 116 0 1 6 0 1 0 1 0 99 1 0 0 336 19 1 14 0 1 7 0 300 0 0 0 100 2 0 0 7 362 152 102 0 0 0 0 0 0 0 0 100 3 0 0 7 63 3 6 0 0 0 0 259 0 0 0 100 4 0 0 0 60 1 2 0 0 0 0 0 0 0 0 100 5 0 0 0 62 2 6 0 0 3 0 294 0 0 0 100 6 0 0 14 63 4 38 0 0 2 0 1621 0 0 0 100 7 0 0 0 61 1 4 0 1 0 0 0 0 0 0 100 April 27, 2026 at 06:25:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2350 200 114 0 0 2 0 0 0 1 0 99 1 0 0 336 16 1 10 0 0 2 0 300 0 0 0 100 2 0 0 7 361 152 102 0 0 0 0 0 0 0 0 100 3 0 0 7 68 6 12 0 0 0 0 282 0 0 0 100 4 0 0 0 60 2 2 0 0 0 0 1 0 0 0 100 5 0 0 0 67 4 8 0 0 7 0 296 0 0 0 100 6 0 0 14 64 4 38 1 0 11 0 1620 0 0 0 100 7 0 0 0 60 1 4 0 1 0 0 0 0 0 0 100 April 27, 2026 at 06:25:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2318 200 149 0 12 19762 0 0 0 7 0 93 1 0 0 0 30 2 45 0 4 20558 0 9 0 10 0 90 2 0 0 7 344 124 405 0 58 567 0 318 0 1 0 99 3 0 0 7 110 58 111 0 12 19738 0 259 0 6 0 94 4 0 0 0 51 31 29 0 1 21652 0 0 0 10 0 90 5 0 0 0 42 3 75 1 9 19840 0 294 0 6 0 94 6 0 0 14 47 7 100 1 8 18243 0 1598 0 7 0 93 7 0 0 0 108 4 410 0 65 460 0 0 0 1 0 99 April 27, 2026 at 06:25:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7878 0 606 3140 212 9472 1561 2888 5742 92 33974 10 29 0 60 1 10221 0 3 1103 15 10628 1884 2977 8383 93 35231 11 30 0 59 2 6954 0 5 1501 117 10376 1833 3056 7035 99 35333 11 29 0 61 3 7040 0 9 1713 346 9134 1539 2851 7278 78 33066 10 29 0 61 4 7600 0 0 1846 409 11101 2047 3151 8099 95 35942 9 30 0 60 5 10614 0 1 1113 14 9490 1710 2895 6386 63 34930 10 30 0 60 6 10001 0 16 1094 18 9319 1683 2760 6705 77 34072 10 32 0 58 7 9927 0 8 1685 43 10721 1955 2998 6682 90 37305 11 29 0 60 April 27, 2026 at 06:25:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 133 0 1387 10356 247 21099 2813 6487 22609 157 73972 24 70 0 6 1 96 0 8327 7054 39 20733 2598 6518 19571 186 74053 22 72 0 6 2 515 0 3694 7934 143 21163 2802 6515 20087 176 75561 21 73 0 7 3 84 0 0 9136 804 21601 3014 6713 23016 154 76714 22 71 0 6 4 1 0 779 9525 945 23480 3788 6898 21799 166 75295 21 71 0 8 5 423 0 4178 7726 52 21939 2950 6675 21484 181 77744 22 70 0 8 6 171 0 6759 7176 34 19179 2493 5831 20623 154 68430 21 72 0 7 7 404 0 21333 4876 38 16112 2254 4788 21436 84 57840 18 75 0 7 April 27, 2026 at 06:25:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 322 0 1400 4296 235 20338 1750 5938 20795 116 72420 22 70 0 8 1 192 0 0 2279 27 20414 1853 6140 21052 138 74179 23 70 0 7 2 65 0 4 2435 131 20425 1853 6031 20186 105 75803 22 71 0 7 3 152 0 0 2965 826 18955 1745 5679 19269 151 71817 23 70 0 7 4 65 0 14 3399 902 24059 2584 6581 22100 142 78761 22 69 0 8 5 33 0 5759 1432 34 20191 1891 5796 20388 149 73407 23 69 0 8 6 146 0 0 2243 38 20043 1807 6079 20223 132 76823 22 69 0 9 7 57 0 0 2285 38 19615 1836 5995 20773 128 74132 22 69 0 9 April 27, 2026 at 06:25:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 176 0 1417 3350 220 18272 1545 5304 19279 77 66754 22 72 0 6 1 50 0 0 1333 32 19120 1667 5788 19921 85 70217 22 71 0 7 2 136 0 10 1473 129 18525 1500 5540 20023 134 71929 22 71 0 7 3 738 0 0 2088 800 20984 1811 5960 22979 92 74254 23 69 0 8 4 32 0 14 2706 894 24028 2533 6374 21212 137 79116 22 69 0 9 5 9 0 7 1375 35 19472 1615 5562 20851 146 71808 22 70 0 8 6 113 0 0 1418 28 20702 1903 6115 22407 153 77199 21 69 0 9 7 41 0 0 1317 37 17670 1589 5443 20229 91 69484 22 70 0 8 April 27, 2026 at 06:25:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 1319 3280 223 18094 1475 5698 20859 77 65403 20 66 0 14 1 2 0 0 1290 27 18632 1434 5478 20863 62 66349 21 66 0 13 2 11 0 3 1413 129 18591 1437 5502 21273 90 66346 20 67 0 13 3 241 0 0 2097 847 19408 1560 5665 21654 78 70588 21 67 0 12 4 41 0 0 2441 920 20324 2148 5797 18438 78 66469 19 67 0 14 5 5 0 0 1353 29 19988 1588 5771 20425 49 72355 21 64 0 15 6 6 0 21 1300 33 19345 1520 5495 18808 52 69504 22 64 0 14 7 2 0 0 1306 27 17654 1577 5400 20366 50 66449 20 65 0 14 April 27, 2026 at 06:25:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2344 204 1432 3 216 3000 19 1453 0 2 0 98 1 0 0 0 45 1 1075 2 195 3320 4 2 0 2 0 98 2 0 0 7 362 102 859 1 178 3233 17 4 0 2 0 98 3 0 0 0 226 188 922 0 171 3559 20 19 0 2 0 98 4 0 0 0 231 189 884 1 179 3547 8 297 0 2 0 98 5 0 0 0 291 50 983 2 153 3135 19 0 0 1 0 99 6 4 0 21 154 5 793 1 133 3469 10 874 0 1 0 98 7 0 0 0 183 2 870 1 177 3339 14 3 0 1 0 99 April 27, 2026 at 06:25:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 148 1 0 0 0 1450 0 1 0 99 1 0 0 0 8 0 2 0 1 0 0 0 0 0 0 100 2 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 3 0 0 0 32 10 30 0 1 0 0 28 0 0 0 100 4 0 0 0 19 3 18 0 1 4 0 310 0 0 0 100 5 0 0 0 114 55 100 0 0 0 0 0 0 0 0 100 6 0 0 21 17 5 18 0 0 2 0 838 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:25:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 206 152 0 1 0 0 1455 0 1 0 99 1 0 0 0 20 0 16 0 2 0 0 1 0 0 0 100 2 0 0 7 210 101 4 0 0 0 0 1 0 0 0 100 3 0 0 0 22 7 16 0 0 0 0 9 0 0 0 100 4 0 0 0 11 3 4 0 0 6 0 294 0 0 0 100 5 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 6 1 0 21 17 7 14 0 0 1 0 829 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:25:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 219 0 64 2328 203 1269 46 249 53 16 7778 1 2 0 97 1 242 0 9 56 1 1008 43 210 57 12 7159 1 4 0 95 2 135 0 14 557 101 839 28 167 39 5 5698 1 1 0 98 3 99 0 0 370 12 899 26 133 40 10 5780 1 1 0 98 4 121 0 5 303 3 700 20 138 60 3 5727 1 1 0 98 5 127 0 0 385 50 878 14 132 28 9 5854 1 1 0 98 6 84 0 21 294 5 686 22 127 60 3 6470 1 1 0 98 7 7825 0 8 306 1 807 19 122 63 17 5901 1 2 0 97 April 27, 2026 at 06:25:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 335 0 1419 2875 207 34140 1847 10971 6870 17 242262 23 43 0 34 1 256 0 0 766 11 34897 1908 10187 7088 22 240885 24 41 0 35 2 223 0 3 1450 109 32522 1615 9648 7048 19 239343 22 41 0 37 3 226 0 7 1666 367 31393 1611 9079 7049 27 236514 22 40 0 38 4 225 0 3 1698 369 31624 1525 8897 7063 20 247487 23 39 0 38 5 218 0 0 1102 7 30404 1416 8461 6993 24 238479 22 39 0 39 6 193 0 7 1315 14 31198 1485 8626 7249 28 239666 22 38 0 40 7 172 0 11 1193 13 28982 1219 7987 7132 19 230047 21 39 0 40 April 27, 2026 at 06:25:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 147 0 1427 2799 207 37149 1308 12250 10141 23 244806 23 43 0 34 1 80 0 1 711 12 35222 1237 11391 9301 21 243653 23 42 0 34 2 86 0 231 843 115 37792 1351 11234 10401 30 254344 24 40 0 36 3 75 0 4 1156 465 38476 1183 10995 9480 33 258469 24 38 0 38 4 108 0 14 1146 471 34284 994 10353 9620 27 245860 22 39 0 39 5 61 0 0 669 10 34318 997 10143 9650 20 248924 23 39 0 38 6 66 0 0 668 12 34277 958 9983 8953 22 244728 21 38 0 40 7 69 0 0 683 12 33315 926 9831 9128 33 237635 23 40 0 37 April 27, 2026 at 06:25:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 103 0 1416 2897 205 36999 1928 11825 9581 20 239985 23 44 0 33 1 59 0 7 739 12 36803 1582 11396 9395 19 241735 23 43 0 34 2 59 0 4 888 114 35223 1418 10833 9757 17 241154 22 43 0 35 3 75 0 0 1293 684 32693 1260 10256 9930 23 233622 23 42 0 35 4 67 0 21 1437 695 32899 1190 9975 9288 18 236338 22 42 0 37 5 53 0 0 780 21 34137 1289 9939 9340 13 237992 22 40 0 38 6 76 0 0 735 8 31879 1229 9527 9268 32 231340 22 42 0 36 7 51 0 0 776 12 34196 1503 9544 9501 22 236780 22 40 0 38 April 27, 2026 at 06:25:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 92 0 1416 2732 210 37524 1397 12185 10000 18 242159 23 42 0 35 1 55 0 0 635 10 35653 1167 11549 9486 19 242089 23 42 0 35 2 84 0 3 935 113 37902 1359 11379 9981 19 252709 25 40 0 36 3 74 0 0 1252 619 36198 1206 10537 9758 18 243983 24 40 0 36 4 54 0 21 1289 628 34373 1024 10190 10020 24 238460 23 40 0 37 5 37 0 0 665 6 33399 978 10123 9661 13 234968 22 40 0 38 6 60 0 0 580 9 34461 1026 9899 9655 17 246135 22 38 0 40 7 76 0 0 611 9 33018 986 9722 9723 18 239530 21 39 0 40 April 27, 2026 at 06:25:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 66 0 899 2577 208 23091 700 7654 7520 20 143682 14 28 0 58 1 54 0 0 515 6 23490 832 7382 7634 20 147123 14 27 0 59 2 23 0 4 690 125 22301 692 6946 7621 22 144086 14 28 0 58 3 20 0 0 875 478 23853 756 6827 7939 26 148794 15 26 0 59 4 25 0 33 892 487 20323 525 6354 7350 28 141637 14 27 0 59 5 24 0 0 455 11 21829 657 6442 7467 24 143038 14 27 0 59 6 21 0 0 456 10 20348 530 6164 7502 24 136713 13 27 0 60 7 14 0 0 468 3 19769 439 5958 7427 18 136723 13 27 0 60 April 27, 2026 at 06:25:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2314 204 122 0 0 3 0 306 0 0 0 100 1 0 0 0 14 1 9 0 2 0 0 8 0 0 0 100 2 0 0 7 315 153 106 0 0 0 0 305 0 0 0 100 3 0 0 0 19 4 14 0 0 0 0 8 0 0 0 100 4 0 0 21 23 7 46 1 1 1 0 1685 0 0 0 100 5 0 0 0 17 1 12 0 1 1 0 1 0 0 0 100 6 0 0 0 16 3 8 0 0 0 0 309 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 1 0 0 0 100 April 27, 2026 at 06:25:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 114 0 0 2 0 294 0 0 0 100 1 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 2 0 0 7 314 154 106 0 0 0 0 300 0 0 0 100 3 0 0 0 19 6 14 0 0 0 0 9 0 0 0 100 4 0 0 21 15 6 40 1 0 1 0 1676 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:25:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 116 0 0 3 0 294 0 0 0 100 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 7 312 153 104 0 0 1 0 302 0 0 0 100 3 0 0 0 19 6 14 0 0 0 0 9 0 0 0 100 4 0 0 21 25 8 52 1 0 0 0 1694 0 0 0 100 5 0 0 0 24 8 12 0 0 1 0 11 0 0 0 100 6 0 0 0 19 3 22 0 2 0 0 318 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 1 0 0 0 100 April 27, 2026 at 06:26:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13275 0 357 2366 202 590 4 44 1510 4 27435 2 16 0 82 1 11068 0 72 194 1 231 0 52 1245 10 3920 1 4 0 95 2 5628 0 88 672 141 259 1 52 369 7 2079 1 2 0 97 3 1323 0 27 149 18 199 5 24 98 7 514 0 0 0 99 4 15 0 37 70 6 138 2 8 418 4 2202 0 1 0 99 5 16 0 9 89 19 109 2 15 13 9 108 0 1 0 99 6 16 0 11 163 2 285 2 25 248 8 1085 1 2 0 98 7 9817 0 13 204 0 322 2 63 1076 11 2079 2 5 0 93 April 27, 2026 at 06:26:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 45 2325 203 880 3 151 2392 5 318 0 3 0 96 1 2 0 0 168 0 1378 1 170 1996 4 12 0 2 0 98 2 4 0 3 507 106 777 2 125 1848 7 377 0 3 0 97 3 28 0 18 447 248 1068 1 150 2052 13 63 0 2 0 98 4 2 0 21 344 231 857 4 145 2183 6 1379 0 3 0 97 5 24 0 0 324 12 825 2 124 2051 5 96 0 3 0 97 6 142 0 0 289 7 756 1 107 1769 7 356 0 3 0 97 7 358 0 0 327 1 726 2 113 1825 8 120 0 3 0 97 April 27, 2026 at 06:26:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 49 2377 219 151 0 4 17 0 294 0 1 0 99 1 0 0 343 29 0 60 0 4 8 0 0 0 0 0 100 2 0 0 7 287 104 38 0 3 8 0 300 0 0 0 100 3 0 0 7 81 14 48 0 0 15 0 0 0 0 0 100 4 0 0 21 149 50 120 1 2 7 0 1289 0 1 0 99 5 0 0 0 124 23 72 0 0 8 0 20 0 0 0 100 6 0 0 0 81 3 32 0 2 10 0 301 0 0 0 100 7 0 0 0 114 0 66 0 2 9 0 0 0 0 0 100 April 27, 2026 at 06:26:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 21 1 0 7 0 294 0 0 0 100 1 0 0 0 110 51 104 0 1 1 0 0 0 0 0 100 2 0 0 7 215 104 6 1 0 2 0 299 0 0 0 100 3 0 0 0 14 2 6 0 0 1 0 0 0 0 0 100 4 0 0 21 15 6 38 1 0 1 0 1281 0 0 0 100 5 0 0 0 50 22 42 0 0 1 0 20 0 0 0 100 6 0 0 0 16 5 8 0 0 1 0 303 0 0 0 100 7 0 0 0 112 1 106 0 1 0 0 0 0 0 0 100 April 27, 2026 at 06:26:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 24 0 0 0 0 306 0 0 0 100 1 0 0 0 108 50 102 0 1 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 0 0 299 0 0 0 100 3 0 0 0 14 1 16 0 0 0 0 14 0 0 0 100 4 0 0 21 21 7 46 0 0 0 0 1294 0 0 0 100 5 0 0 0 56 29 42 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 107 0 102 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 16 0 0 2 0 294 0 0 0 100 1 0 0 0 110 50 104 0 0 1 0 0 0 0 0 100 2 0 0 7 216 104 12 0 1 1 0 299 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 4 0 0 21 13 5 38 1 0 1 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 18 0 0 4 0 297 0 0 0 100 1 0 0 0 109 50 104 0 0 0 0 0 0 0 0 100 2 0 0 7 217 104 10 0 0 1 0 300 0 0 0 100 3 2 0 0 14 1 14 0 1 1 0 3 0 0 0 100 4 0 0 21 18 6 46 1 0 2 0 1287 0 1 0 99 5 0 0 0 53 24 44 0 0 0 0 21 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 14 0 0 2 0 294 0 0 0 100 1 0 0 0 108 50 102 0 1 0 0 0 0 0 0 100 2 0 0 7 215 104 6 1 0 2 0 300 0 0 0 100 3 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 14 5 40 0 0 0 0 1281 0 0 0 100 5 0 0 0 49 21 44 0 1 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 107 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 14 0 0 0 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 216 105 8 0 0 3 0 301 0 0 0 100 3 0 0 0 11 1 6 0 1 0 0 0 0 0 0 100 4 0 0 21 14 5 38 1 0 0 0 1282 0 0 0 100 5 0 0 0 51 22 46 0 1 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 22 0 1 2 0 306 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 0 0 300 0 0 0 100 3 0 0 0 11 1 8 0 0 0 0 8 0 0 0 100 4 1 0 21 24 7 54 0 0 0 0 1321 0 0 0 100 5 0 0 0 57 25 45 0 1 1 0 20 0 0 0 100 6 0 0 0 13 3 8 0 1 0 0 302 0 0 0 100 7 0 0 0 107 0 102 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 16 0 0 3 0 294 0 0 0 100 1 0 0 0 110 51 104 0 0 0 0 1 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 300 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 1 0 21 15 5 40 1 0 0 0 1280 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 16 0 0 3 0 294 0 0 0 100 1 0 0 0 109 50 104 0 0 0 0 0 0 0 0 100 2 0 0 7 216 104 8 1 0 2 0 303 0 0 0 100 3 0 0 0 17 3 14 0 0 0 0 2 0 0 0 100 4 0 0 21 16 6 42 1 0 0 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 14 3 8 0 1 0 0 302 0 0 0 100 7 0 0 0 107 0 102 0 1 0 0 0 0 0 0 100 April 27, 2026 at 06:26:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 34 0 1 3 0 294 0 0 0 100 1 0 0 0 112 51 108 0 0 0 0 9 0 0 0 100 2 0 0 7 216 104 10 0 0 2 0 315 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 12 5 38 0 0 0 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 301 0 0 0 100 7 0 0 0 108 0 102 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2301 201 14 0 0 3 0 293 0 0 0 99 1 0 0 0 109 51 100 0 0 1 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 300 0 0 0 100 3 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 4 0 0 21 15 6 38 1 0 2 0 1282 0 0 0 100 5 0 0 0 50 22 44 0 1 0 0 20 0 0 0 100 6 0 0 0 16 5 8 0 0 1 0 303 0 0 0 100 7 0 0 0 112 1 104 0 0 1 0 0 0 0 0 100 April 27, 2026 at 06:26:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 30 0 0 3 0 304 0 0 0 100 1 0 0 0 111 50 108 0 1 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 2 0 302 0 0 0 100 3 1 0 0 13 1 14 0 0 0 0 12 0 0 0 100 4 0 0 21 25 8 50 1 0 0 0 1295 0 0 0 100 5 0 0 0 59 30 46 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 107 0 102 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 16 0 0 2 0 294 0 0 0 100 1 0 0 0 115 50 112 0 0 0 0 0 0 0 0 100 2 0 0 7 215 104 6 1 0 3 0 298 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 12 5 38 0 0 0 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 14 0 0 7 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 300 0 0 0 100 3 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 4 0 0 21 16 6 42 1 0 0 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 14 0 0 1 0 294 0 0 0 100 1 0 0 0 110 50 104 0 1 1 0 0 0 0 0 100 2 0 0 7 217 104 12 0 1 1 0 300 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 13 5 38 1 0 0 0 1280 0 0 0 100 5 0 0 0 49 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 16 0 0 1 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 223 105 18 0 0 1 0 301 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 4 0 0 21 12 5 38 0 0 0 0 1282 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2307 201 26 0 0 2 0 304 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 215 104 6 1 0 1 0 300 0 0 0 100 3 0 0 0 17 3 14 0 0 0 0 19 0 0 0 100 4 0 0 22 18 5 48 1 0 0 0 1290 0 0 0 100 5 0 0 0 54 27 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 107 0 102 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 14 0 0 0 0 294 0 0 0 100 1 0 0 0 110 51 104 0 0 0 0 1 0 0 0 100 2 0 0 7 216 104 8 0 0 2 0 300 0 0 0 100 3 0 0 0 13 1 12 0 1 0 0 0 0 0 0 100 4 0 0 21 15 5 40 1 0 1 0 1281 0 0 0 100 5 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 16 0 0 1 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 3 0 300 0 0 0 100 3 0 0 0 22 4 20 0 0 0 0 23 0 0 0 100 4 0 0 21 16 6 42 1 0 1 0 1280 0 0 0 100 5 0 0 0 50 22 44 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 14 0 0 1 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 2 0 300 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 19 8 44 1 0 0 0 1284 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 300 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 14 0 0 4 0 294 0 0 0 100 1 0 0 0 109 51 100 0 0 1 0 0 0 0 0 100 2 0 0 7 215 104 6 1 0 3 0 300 0 0 0 100 3 0 0 0 13 2 6 0 0 1 0 0 0 0 0 100 4 0 0 21 19 6 48 0 1 1 0 1281 0 0 0 100 5 0 0 0 50 22 42 0 0 1 0 20 0 0 0 100 6 0 0 0 16 5 8 0 0 1 0 303 0 0 0 100 7 0 0 0 112 1 106 0 1 0 0 0 0 0 0 100 April 27, 2026 at 06:26:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 26 0 0 3 0 306 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 302 0 0 0 100 3 0 0 0 17 1 18 0 0 0 0 15 0 0 0 100 4 0 0 21 21 7 48 1 0 1 0 1294 0 0 0 100 5 0 0 0 56 26 44 0 1 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 107 0 102 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 14 0 0 2 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 0 0 298 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 15 5 40 1 0 0 0 1281 0 0 0 100 5 0 0 0 46 20 40 0 0 0 0 19 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 301 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 14 0 0 6 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 2 0 300 0 0 0 100 3 0 0 0 13 2 10 0 0 0 0 1 0 0 0 100 4 0 0 21 15 6 42 0 0 0 0 1282 0 0 0 100 5 0 0 0 52 23 44 0 1 1 0 20 0 0 0 100 6 0 0 0 11 2 6 0 1 1 0 300 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 14 0 0 2 0 294 0 0 0 100 1 0 0 0 108 50 102 0 1 0 0 0 0 0 0 100 2 0 0 7 215 104 6 1 0 0 0 300 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 15 5 40 1 0 0 0 1280 0 0 0 100 5 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 6 0 0 0 14 3 8 0 0 0 0 302 0 0 0 100 7 0 0 0 108 0 102 0 1 0 0 0 0 0 0 100 April 27, 2026 at 06:26:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 16 0 0 1 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 216 105 8 0 0 2 0 302 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 12 5 38 0 0 0 0 1282 0 0 0 100 5 0 0 0 50 22 44 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 106 0 100 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 38 0 1 1 0 306 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 0 0 299 0 0 0 100 3 0 0 0 21 3 20 0 0 0 0 18 0 0 0 100 4 0 0 21 15 5 42 1 0 1 0 1289 0 0 0 100 5 0 0 0 52 25 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 109 0 104 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 30 0 1 6 0 294 0 0 0 100 1 0 0 0 111 51 106 0 1 0 0 1 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 300 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 13 5 38 1 0 0 0 1281 0 0 0 100 5 0 0 0 57 21 50 0 1 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 84 0 76 0 2 0 0 0 0 0 0 100 April 27, 2026 at 06:26:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 112 0 0 2 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 215 104 6 1 0 2 0 300 0 0 0 100 3 0 0 0 15 3 12 0 0 0 0 2 0 0 0 100 4 0 0 21 15 6 42 0 0 0 0 1280 0 0 0 100 5 0 0 0 50 22 44 0 0 0 0 44 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 114 0 0 3 0 294 0 0 0 100 1 0 0 0 112 50 106 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 2 0 300 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 13 5 38 1 0 0 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 301 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 116 0 1 1 0 294 0 0 0 100 1 0 0 0 111 51 102 0 0 1 0 0 0 0 0 100 2 0 0 7 215 104 8 0 1 4 0 300 0 0 0 100 3 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 4 0 0 21 15 6 38 1 0 1 0 1281 0 0 0 100 5 0 0 0 50 22 42 0 0 1 0 20 0 0 0 100 6 0 0 0 16 5 8 0 0 1 0 303 0 0 0 100 7 0 0 0 12 1 2 0 0 1 0 0 0 0 0 100 April 27, 2026 at 06:26:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 124 0 0 3 0 306 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 3 0 300 0 0 0 100 3 0 0 0 22 3 22 0 0 0 0 20 0 0 0 100 4 0 0 21 16 5 44 0 0 0 0 1289 0 0 0 100 5 0 0 0 59 28 46 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 299 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 112 0 0 2 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 217 104 8 1 1 1 0 300 0 0 0 100 3 0 0 0 10 1 6 0 1 0 0 0 0 0 0 100 4 0 0 21 13 5 38 1 0 0 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 114 0 0 5 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 2 0 302 0 0 0 100 3 0 0 0 20 1 22 0 0 0 0 0 0 0 0 100 4 0 0 21 16 6 42 1 0 0 0 1282 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 114 0 0 2 0 294 0 0 0 100 1 0 0 0 108 50 100 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 299 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 12 5 38 0 0 0 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 112 0 0 4 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 216 105 8 0 0 1 0 300 0 0 0 100 3 0 0 0 13 2 8 0 0 1 0 1 0 0 0 100 4 0 0 21 19 5 50 2 1 1 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 203 128 0 0 8 0 306 0 0 0 100 1 0 0 0 110 51 104 0 0 0 0 0 0 0 0 100 2 0 0 7 217 105 8 1 0 0 0 300 0 0 0 100 3 0 0 0 19 4 15 0 0 1 0 13 0 0 0 100 4 0 0 21 21 5 57 0 2 1 0 1296 0 0 0 100 5 0 0 0 61 27 52 0 2 1 0 20 0 0 0 100 6 0 0 0 13 3 8 0 1 0 0 302 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 112 0 0 1 0 294 0 0 0 100 1 0 0 0 110 51 104 0 0 0 0 1 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 302 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 17 5 42 1 0 0 0 1280 0 0 0 100 5 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 114 0 0 3 0 294 0 0 0 100 1 0 0 0 109 50 100 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 298 0 0 0 100 3 0 0 0 17 4 14 0 0 0 0 23 0 0 0 100 4 0 0 21 15 6 42 0 0 0 0 1281 0 0 0 100 5 0 0 0 52 22 46 0 0 0 0 20 0 0 0 100 6 0 0 0 15 3 12 0 1 0 0 302 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 114 0 0 1 0 294 0 0 0 100 1 0 0 0 112 51 108 0 0 0 0 9 0 0 0 100 2 0 0 7 216 104 10 0 0 0 0 318 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 15 6 40 1 0 0 0 1283 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 14 3 8 0 0 0 0 301 0 0 0 100 7 0 0 0 10 0 8 0 1 0 0 0 0 0 0 100 April 27, 2026 at 06:26:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 114 0 0 4 0 294 0 0 0 100 1 0 0 0 109 51 100 0 0 1 0 0 0 0 0 100 2 0 0 7 215 104 6 1 0 2 0 300 0 0 0 100 3 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 4 0 0 21 15 6 38 1 0 1 0 1280 0 0 0 100 5 0 0 0 50 22 44 0 1 0 0 20 0 0 0 100 6 0 0 0 16 5 8 0 0 1 0 303 0 0 0 100 7 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 April 27, 2026 at 06:26:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 124 0 0 1 0 306 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 301 0 0 0 100 3 0 0 0 15 1 16 0 0 0 0 14 0 0 0 100 4 0 0 22 20 7 46 0 0 0 0 1294 0 0 0 100 5 0 0 0 53 26 42 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 13 0 6 0 0 1 0 0 0 0 0 100 April 27, 2026 at 06:26:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 130 0 1 5 0 294 0 0 0 100 1 0 0 0 108 50 100 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 0 0 299 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 13 5 38 1 0 0 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 8 0 2 0 0 1 0 0 0 0 0 100 April 27, 2026 at 06:26:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 112 0 0 1 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 300 0 0 0 100 3 0 0 0 13 2 10 0 0 0 0 1 0 0 0 100 4 0 0 21 16 6 42 1 0 0 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 116 0 0 0 0 294 0 0 0 100 1 0 0 0 109 50 104 0 2 0 0 0 0 0 0 100 2 0 0 7 215 104 6 1 0 0 0 300 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 15 5 40 1 0 1 0 1282 0 0 0 100 5 0 0 0 50 21 44 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 114 0 0 4 0 294 0 0 0 100 1 0 0 0 112 50 106 0 0 0 0 0 0 0 0 100 2 0 0 7 216 105 8 0 0 0 0 301 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 13 5 38 1 0 0 0 1281 0 0 0 100 5 0 0 0 50 22 44 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2301 201 120 0 0 2 0 296 0 0 0 99 1 0 0 0 111 50 106 0 1 0 0 9 0 0 0 100 2 0 0 7 214 104 6 0 0 0 0 300 0 0 0 100 3 0 0 0 22 3 22 0 0 0 0 21 0 0 0 100 4 0 0 21 16 5 46 0 0 0 0 1292 0 0 0 100 5 0 0 0 58 29 42 0 0 1 0 20 0 0 0 100 6 0 0 0 14 3 9 0 0 0 0 302 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 7 2309 201 116 0 1 4 0 301 0 0 0 100 1 0 0 0 114 51 110 0 1 0 0 5 0 0 0 100 2 0 0 7 220 106 14 0 1 2 0 304 0 0 0 100 3 0 0 0 12 2 8 0 1 0 0 2 0 0 0 100 4 3 0 21 16 6 202 1 1 0 0 1614 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 112 0 0 2 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 217 104 8 1 0 1 0 300 0 0 0 100 3 0 0 0 16 3 14 0 1 0 0 2 0 0 0 100 4 0 0 21 15 6 42 0 0 0 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2301 201 112 0 0 2 0 293 0 0 0 99 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 300 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 14 5 38 2 0 0 0 1282 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 301 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 120 0 0 5 0 294 0 0 0 100 1 0 0 0 109 51 100 0 0 1 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 4 0 300 0 0 0 100 3 0 0 0 15 2 8 0 0 1 0 0 0 0 0 100 4 0 0 21 15 6 38 1 0 1 0 1282 0 0 0 100 5 0 0 0 50 22 42 0 0 1 0 20 0 0 0 100 6 0 0 0 16 5 8 0 0 1 0 303 0 0 0 100 7 0 0 0 10 1 0 0 0 1 0 0 0 0 0 100 April 27, 2026 at 06:26:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 118 0 0 2 0 294 0 0 0 100 1 0 0 0 112 50 110 0 0 0 0 13 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 301 0 0 0 100 3 0 0 0 22 3 24 0 0 0 0 25 0 0 0 100 4 0 0 21 19 5 50 0 1 0 0 1288 0 0 0 100 5 0 0 0 59 30 46 0 0 1 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 10 0 4 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 112 0 0 3 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 215 104 6 1 0 2 0 299 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 15 5 40 1 0 1 0 1283 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 112 0 0 1 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 300 0 0 0 100 3 0 0 0 11 1 8 0 0 0 0 0 0 0 0 100 4 0 0 21 18 6 44 1 0 0 0 1282 0 0 0 100 5 0 0 0 49 21 44 0 1 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 114 0 0 3 0 294 0 0 0 100 1 0 0 0 108 50 100 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 0 0 300 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 13 5 38 1 0 0 0 1282 0 0 0 100 5 0 0 0 50 21 44 0 1 0 0 20 0 0 0 100 6 0 0 0 16 3 14 0 1 0 0 301 0 0 0 100 7 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 114 0 0 2 0 294 0 0 0 100 1 0 0 0 108 50 102 0 0 0 0 0 0 0 0 100 2 0 0 7 216 105 8 0 0 4 0 301 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 13 5 38 1 0 1 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:26:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 110 0 2 3 0 294 0 0 0 100 1 0 0 0 112 50 110 0 0 0 0 11 0 0 0 100 2 0 0 7 215 104 6 1 0 4 0 300 0 0 0 100 3 0 0 0 20 4 16 0 0 0 0 17 0 0 0 100 4 0 0 21 19 5 50 1 0 0 0 1295 0 0 0 100 5 0 0 0 57 25 46 0 1 0 0 20 0 0 0 100 6 0 0 0 14 3 8 0 0 2 0 302 0 0 0 100 7 0 0 0 12 0 14 0 1 0 0 0 0 0 0 100 April 27, 2026 at 06:27:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 132 0 1 6 0 294 0 0 0 100 1 0 0 0 110 51 104 0 0 0 0 1 0 0 0 100 2 0 0 7 214 104 6 0 0 2 0 301 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 14 5 40 0 0 0 0 1283 0 0 0 100 5 0 0 0 49 21 44 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 8 0 2 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:27:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 114 0 0 2 0 294 0 0 0 100 1 0 0 0 108 50 100 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 2 0 299 0 0 0 100 3 0 0 0 17 4 14 0 0 0 0 23 0 0 0 100 4 0 0 21 17 6 42 2 0 1 0 1281 0 0 0 100 5 0 0 0 50 22 44 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:27:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 116 0 0 4 0 294 0 0 0 100 1 0 0 0 109 50 104 0 1 1 0 0 0 0 0 100 2 0 0 7 215 104 8 0 1 1 0 301 0 0 0 100 3 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 4 0 0 21 14 5 40 1 0 0 0 1288 0 0 0 100 5 0 0 0 55 28 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 301 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:27:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 118 0 1 6 0 294 0 0 0 100 1 0 0 0 109 51 100 0 0 1 0 0 0 0 0 100 2 0 0 7 217 104 8 1 0 2 0 300 0 0 0 100 3 0 0 0 16 2 14 0 1 1 0 0 0 0 0 100 4 0 0 21 18 7 40 0 0 1 0 1284 0 0 0 100 5 0 0 0 51 22 42 0 0 1 0 20 0 0 0 100 6 0 0 0 16 5 8 0 0 1 0 303 0 0 0 100 7 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 April 27, 2026 at 06:27:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 114 0 0 3 0 294 0 0 0 100 1 0 0 0 112 50 110 0 0 0 0 12 0 0 0 100 2 0 0 7 214 104 6 0 0 1 0 299 0 0 0 100 3 0 0 0 14 1 14 0 0 0 0 20 0 0 0 100 4 0 0 21 24 7 52 1 0 1 0 1292 0 0 0 100 5 0 0 0 54 27 42 0 0 0 0 20 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 7 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:27:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 118 0 0 1 0 294 0 0 0 100 1 0 0 0 108 50 100 0 0 0 0 0 0 0 0 100 2 0 0 7 214 104 6 0 0 2 0 300 0 0 0 100 3 0 0 0 14 1 10 0 0 0 0 0 0 0 0 100 4 0 0 21 14 5 38 2 0 0 0 1281 0 0 0 100 5 0 0 0 48 21 42 0 0 0 0 20 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:27:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 415 1 2 8 0 297 0 0 0 100 1 0 0 0 114 50 110 1 0 0 0 13 0 0 0 100 2 0 0 8 219 104 14 0 0 0 0 313 0 0 0 100 3 679 0 1 44 1 73 3 1 303 1 497 0 1 0 99 4 1301 0 23 41 6 87 0 5 0 1 1436 0 1 0 99 5 2 0 6 1024 991 49 0 3 569 0 54 0 0 0 100 6 0 0 0 13 2 9 0 2 0 0 304 0 0 0 100 7 0 0 0 142 0 270 0 0 135 0 0 0 0 0 100 April 27, 2026 at 06:27:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 116 0 0 2 0 294 0 0 0 100 1 0 0 0 109 50 102 0 0 0 0 3 0 0 0 100 2 0 0 7 217 104 6 1 0 1 0 300 0 0 0 100 3 0 0 0 14 2 6 0 0 0 0 1 0 0 0 100 4 1 0 21 32 9 58 2 1 0 0 1322 0 0 0 100 5 0 0 0 24 14 6 0 1 0 0 0 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 302 0 0 0 100 7 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 April 27, 2026 at 06:27:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 123 0 0 0 0 294 0 0 0 100 1 0 0 0 110 50 106 0 0 0 0 6 0 0 0 100 2 0 0 7 214 104 6 0 0 2 0 300 0 0 0 100 3 0 0 0 11 1 8 0 0 0 0 2 0 0 0 100 4 1 0 21 29 7 62 0 0 0 0 1333 0 0 0 100 5 0 0 0 55 42 10 0 1 2 0 1 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 300 0 0 0 100 7 0 0 0 9 0 6 0 0 1 0 0 0 0 0 100