April 27, 2026 at 06:25:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1188 0 101 2593 126 6432 75 298 1644 11 4723 3 5 0 92 1 792 0 116 375 20 5785 21 286 1557 14 10598 11 4 0 85 2 900 0 422 259 13 6559 20 388 1476 14 15027 5 6 0 89 3 886 0 75 535 243 4674 15 228 1453 10 8749 2 3 0 95 4 794 0 161 419 238 5579 14 250 1514 13 9757 7 6 0 88 5 561 0 31 6938 6729 3982 19 223 2896 10 9905 5 6 0 89 6 881 0 265 250 8 5887 13 421 1515 13 11207 2 4 0 94 7 891 0 37 289 20 6055 22 311 1652 14 6037 2 4 0 94 April 27, 2026 at 06:25:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10023 0 73 2309 159 848 48 155 2295 72 2866 10 25 0 66 1 2924 0 12 449 10 976 22 180 3234 62 3090 2 8 0 90 2 11157 0 61 404 3 1433 165 187 4527 71 2137 4 5 0 91 3 5904 0 21 500 159 962 31 188 3547 88 2821 5 4 0 92 4 2115 0 71 615 229 810 22 173 3756 52 1917 2 4 0 94 5 6197 0 18 342 25 987 38 175 4226 60 3457 5 5 0 90 6 2839 0 45 296 3 1126 12 176 3781 86 2589 2 3 0 95 7 3997 0 31 294 7 1022 25 111 3225 41 3526 4 22 0 73 April 27, 2026 at 06:25:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2300 201 110 0 1 0 0 266 0 0 0 99 1 0 0 0 11 1 6 0 1 0 0 0 0 0 0 100 2 0 0 0 114 1 106 0 0 0 0 1 0 0 0 100 3 0 0 0 21 4 24 0 3 0 0 320 0 0 0 100 4 0 0 14 211 103 4 0 0 0 0 259 0 0 0 100 5 30 0 0 13 3 36 0 1 0 0 1065 0 0 0 100 6 0 0 0 8 1 4 0 0 0 0 294 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:25:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2323 201 256 8 62 741 12 266 0 14 0 86 1 0 0 0 297 25 602 6 61 465 6 0 0 11 0 89 2 0 0 0 133 14 246 7 55 407 7 0 0 14 0 86 3 0 0 0 398 157 588 0 97 661 9 408 0 1 0 99 4 0 0 14 444 257 194 8 56 528 3 259 0 14 0 86 5 27 0 0 145 7 398 1 90 651 3 1046 0 4 0 96 6 0 0 0 88 2 193 8 53 349 5 294 0 14 0 86 7 0 0 0 83 1 202 7 53 382 10 300 0 14 0 86 April 27, 2026 at 06:25:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 202 376 1 72 1213 6 266 0 1 0 99 1 0 0 0 293 1 591 0 67 572 4 0 0 1 0 99 2 0 0 0 102 3 255 0 65 564 4 1 0 1 0 99 3 0 0 0 394 180 562 1 75 704 6 303 0 1 0 99 4 0 0 14 535 279 307 1 80 831 4 259 0 1 0 99 5 0 0 0 123 10 322 0 64 751 5 1043 0 1 0 99 6 0 0 0 148 26 290 0 72 531 2 294 0 1 0 99 7 0 0 0 101 1 254 0 69 493 5 300 0 0 0 99 April 27, 2026 at 06:25:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2308 202 497 0 67 1238 25 266 0 1 0 99 1 0 0 0 283 2 599 0 75 522 10 1 0 1 0 99 2 0 0 0 118 2 286 0 78 557 18 0 0 1 0 99 3 0 0 0 366 171 519 0 68 729 12 296 0 1 0 99 4 0 0 14 478 271 262 0 64 752 10 259 0 1 0 99 5 0 0 0 116 3 316 0 64 588 13 1041 0 1 0 99 6 0 0 0 212 52 372 0 74 543 13 297 0 1 0 99 7 0 0 0 109 2 263 0 66 514 12 300 0 1 0 99 April 27, 2026 at 06:25:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2507 0 287 2403 208 1066 116 144 678 27 2219 9 2 0 89 1 3491 0 14 365 5 1022 75 138 430 19 2335 5 2 0 93 2 5318 0 1 212 4 922 127 136 452 17 2857 6 5 0 89 3 4984 0 0 304 80 1064 143 158 592 18 2372 7 2 0 91 4 3088 0 14 474 175 618 56 85 412 26 1827 12 4 0 84 5 4169 0 8 311 15 888 123 121 538 19 3175 6 2 0 92 6 902 0 0 278 6 569 43 74 401 22 1825 7 1 0 91 7 790 0 0 311 36 649 69 83 383 16 1751 11 1 0 88 April 27, 2026 at 06:25:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 21 2311 204 116 0 3 1 0 8 0 0 0 100 1 2 0 14 102 46 96 0 1 1 0 302 0 0 0 100 2 2 0 0 14 2 9 0 3 0 0 27 0 0 0 100 3 17 0 0 31 6 30 0 3 0 0 264 0 0 0 100 4 2 0 7 221 103 10 0 0 1 0 24 0 0 0 100 5 0 0 7 20 4 42 1 1 0 0 1435 0 0 0 100 6 1 0 1 16 3 10 0 1 0 0 297 0 0 0 100 7 0 0 0 21 4 11 0 2 0 0 300 0 0 0 100 April 27, 2026 at 06:25:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 201 351 0 34 468 0 0 0 1 0 99 1 0 0 14 137 2 287 0 29 445 0 266 0 0 0 100 2 0 0 0 201 50 294 0 28 416 0 0 0 0 0 100 3 0 0 0 197 61 296 1 29 419 0 301 0 1 0 99 4 0 0 7 350 154 196 0 28 458 0 0 0 0 0 100 5 7 0 7 108 4 240 1 25 391 0 1383 0 1 0 99 6 0 0 0 108 2 210 0 20 388 0 294 0 1 0 99 7 0 0 0 106 1 216 0 29 385 0 299 0 0 0 99 April 27, 2026 at 06:25:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 201 12 0 1 0 0 0 0 0 0 100 1 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 2 0 0 0 105 27 100 0 4 0 0 0 0 0 0 100 3 0 0 0 53 11 46 1 2 1 0 310 0 0 0 100 4 0 0 1 253 122 42 0 2 0 0 0 0 0 0 100 5 0 0 7 43 4 70 1 1 0 0 1382 0 0 0 100 6 0 0 0 12 3 8 0 0 1 0 296 0 0 0 100 7 0 0 0 10 1 2 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:25:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 415 0 14 2320 202 192 4 26 34 5 286 1 1 0 98 1 2252 0 21 84 3 148 3 19 49 6 822 0 1 0 98 2 104 0 17 150 48 186 3 23 32 5 316 0 1 0 99 3 288 0 3 83 11 115 0 14 39 2 1162 0 0 0 99 4 562 0 14 240 102 55 1 15 39 1 351 0 0 0 100 5 2964 0 15 137 9 230 3 28 53 13 1832 1 1 0 98 6 268 0 8 51 3 95 1 21 29 8 658 0 0 0 100 7 78 0 4 51 1 111 6 26 25 13 462 0 0 0 100 April 27, 2026 at 06:25:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 201 114 0 1 2 0 0 0 1 0 99 1 0 0 14 20 2 16 0 5 2 0 266 0 0 0 100 2 0 0 0 119 51 118 0 3 0 0 23 0 0 0 100 3 0 0 0 21 4 14 0 1 0 0 308 0 0 0 100 4 0 0 14 217 103 2 0 0 0 0 0 0 0 0 100 5 46 0 7 38 17 50 1 1 1 0 1310 0 0 0 100 6 0 0 0 26 5 20 0 0 0 0 306 0 0 0 100 7 0 0 0 22 2 14 0 1 0 0 312 0 0 0 100 April 27, 2026 at 06:25:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2327 203 26 0 1 0 0 0 0 1 0 99 1 0 0 133 112 28 108 0 4 2 0 268 0 0 0 100 2 0 0 0 77 2 54 0 4 0 0 0 0 0 0 100 3 0 0 0 83 26 64 0 3 2 0 318 0 0 0 100 4 0 0 7 230 102 4 0 2 1 0 0 0 0 0 100 5 4 0 7 46 10 52 1 1 0 0 1351 0 0 0 100 6 0 0 0 35 2 11 0 2 0 0 294 0 0 0 100 7 0 0 0 26 1 4 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:25:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 201 112 0 0 2 0 0 0 0 0 100 1 0 0 14 12 3 6 0 0 0 0 267 0 0 0 100 2 0 0 0 13 1 6 0 0 0 0 0 0 0 0 100 3 0 0 0 120 52 118 0 1 1 0 292 0 0 0 100 4 0 0 7 212 102 0 0 0 0 0 0 0 0 0 100 5 0 0 7 31 9 54 1 1 1 0 1315 0 0 0 100 6 0 0 0 18 3 14 0 0 0 0 296 0 0 0 100 7 0 0 0 12 2 4 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:25:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 199 0 174 2327 202 1199 20 119 17 1 7266 4 1 0 95 1 158 0 14 484 5 867 11 72 6 2 7079 2 1 0 97 2 182 0 0 181 3 955 28 93 8 0 6003 3 1 0 96 3 122 0 0 209 41 1005 17 80 11 0 6307 3 1 0 96 4 121 0 1 591 104 949 8 53 4 0 4702 2 1 0 97 5 181 0 7 209 17 1155 10 49 6 0 7896 2 1 0 97 6 109 0 0 248 13 853 13 45 28 0 6131 3 1 0 96 7 99 0 0 310 2 1129 13 42 13 2 3850 2 1 0 97 April 27, 2026 at 06:25:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 115 0 2 0 0 3 0 0 0 100 1 0 0 14 16 6 10 0 0 1 0 269 0 0 0 100 2 0 0 0 11 2 2 0 0 1 0 3 0 0 0 100 3 0 0 0 16 3 10 0 0 1 0 191 0 0 0 100 4 0 0 7 213 103 2 0 0 1 0 1 0 0 0 100 5 1 0 7 24 7 44 1 0 1 0 1314 0 0 0 100 6 0 0 0 115 54 108 0 0 1 0 297 0 0 0 100 7 0 0 0 20 6 12 0 0 1 0 308 0 0 0 100 April 27, 2026 at 06:25:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 114 0 0 1 0 0 0 0 0 100 1 0 0 14 14 5 10 0 0 0 0 271 0 0 0 100 2 0 0 0 14 1 12 0 0 0 0 22 0 0 0 100 3 0 0 0 17 2 12 0 0 1 0 307 0 0 0 100 4 0 0 7 212 103 2 0 0 0 0 1 0 0 0 100 5 0 0 11 32 14 50 1 2 0 0 1315 0 0 0 100 6 0 0 0 118 52 116 0 1 0 0 304 0 0 0 100 7 0 0 0 24 4 24 0 3 0 0 313 0 0 0 100 April 27, 2026 at 06:25:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 120 0 2 0 0 0 0 0 0 100 1 0 0 14 12 4 10 0 1 0 0 267 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 18 2 16 0 2 0 0 331 0 0 0 100 4 0 0 7 210 102 0 0 0 0 0 0 0 0 0 100 5 0 0 7 24 8 46 1 0 0 0 1313 0 0 0 100 6 0 0 0 13 3 6 0 0 0 0 296 0 0 0 100 7 0 0 0 110 51 104 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:25:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 197 0 12 237 0 0 0 1 0 99 1 0 0 14 84 5 156 1 14 188 0 271 0 0 0 100 2 0 0 0 78 1 150 0 17 191 0 5 0 0 0 100 3 0 0 0 232 52 299 0 20 193 0 307 0 0 0 100 4 0 0 7 318 143 144 0 18 207 0 0 0 0 0 100 5 0 0 7 94 11 193 0 18 275 0 1632 0 0 0 99 6 0 0 0 94 2 183 1 14 191 0 294 0 0 0 100 7 0 0 0 179 42 249 0 16 171 0 303 0 0 0 100 April 27, 2026 at 06:25:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 98 0 1 0 0 0 0 0 0 100 1 0 0 14 13 3 16 0 1 0 0 266 0 0 0 100 2 0 0 0 16 0 10 0 1 0 0 0 0 0 0 100 3 0 0 0 15 2 10 0 0 0 0 308 0 0 0 100 4 0 0 7 210 102 0 0 0 0 0 0 0 0 0 100 5 0 0 7 14 4 38 1 0 0 0 1308 0 0 0 100 6 0 0 0 14 4 8 0 0 2 0 297 0 0 0 100 7 1 0 0 120 55 114 1 3 0 0 305 0 0 0 100 April 27, 2026 at 06:25:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 112 0 2 0 0 4 0 0 0 100 1 0 0 14 111 52 108 0 2 0 0 268 0 0 0 100 2 0 0 0 12 0 8 0 1 0 0 3 0 0 0 100 3 0 0 0 20 2 20 0 3 1 0 346 0 0 0 100 4 0 0 7 210 102 0 0 0 0 0 0 0 0 0 100 5 0 0 7 16 4 44 1 1 0 0 1312 0 0 0 100 6 0 0 0 12 2 8 0 0 0 0 297 0 0 0 100 7 31 0 0 28 10 22 0 0 0 0 321 0 0 0 100 April 27, 2026 at 06:25:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 14 0 1 0 0 0 0 0 0 100 1 0 0 14 21 5 14 0 2 0 0 267 0 0 0 100 2 0 0 0 90 19 91 0 7 0 0 21 0 0 0 100 3 0 0 0 55 14 50 0 3 1 0 323 0 1 0 99 4 0 0 7 286 120 76 0 5 0 0 0 0 0 0 100 5 0 0 7 21 12 38 0 0 0 0 1308 0 0 0 100 6 0 0 0 24 5 20 0 0 1 0 306 0 0 0 100 7 0 0 0 25 5 22 1 0 0 0 317 0 0 0 100 April 27, 2026 at 06:25:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 12 0 0 0 0 0 0 0 0 100 1 0 0 14 14 4 10 1 1 0 0 268 0 0 0 100 2 0 0 0 112 28 109 0 4 0 0 5 0 0 0 100 3 0 0 0 86 9 82 0 4 1 0 295 0 0 0 100 4 0 0 7 245 118 38 0 2 0 0 0 0 0 0 100 5 0 0 7 21 6 44 1 0 1 0 1310 0 0 0 100 6 0 0 0 11 2 4 1 0 1 0 294 0 0 0 100 7 0 0 0 21 7 14 0 0 0 0 623 0 0 0 100 April 27, 2026 at 06:25:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 12 0 0 2 0 0 0 0 0 100 1 0 0 14 14 3 12 0 2 0 0 266 0 0 0 100 2 0 0 0 80 3 74 0 1 1 0 0 0 0 0 100 3 0 0 0 47 16 44 1 3 3 0 315 0 0 0 100 4 0 0 7 310 136 104 0 3 0 0 0 0 0 0 100 5 0 0 7 22 8 48 0 0 1 0 1313 0 0 0 100 6 0 0 0 17 4 14 0 0 1 0 297 0 0 0 100 7 0 0 0 9 1 2 1 0 0 0 300 0 0 0 100 April 27, 2026 at 06:25:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 10 0 0 0 0 0 0 0 0 100 1 0 0 14 118 54 115 0 3 0 0 274 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 3 20 0 0 116 6 112 0 1 0 0 310 0 0 0 100 4 0 0 7 214 103 4 0 0 0 0 1 0 0 0 100 5 0 0 7 25 9 48 1 0 1 0 1315 0 0 0 100 6 20 0 0 14 4 8 0 0 2 0 300 0 0 0 100 7 3 0 0 10 2 4 0 0 0 0 305 0 0 0 100 April 27, 2026 at 06:25:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 18 0 0 1 0 3 0 0 0 100 1 0 0 14 22 6 14 0 1 1 0 267 0 0 0 100 2 0 0 0 97 33 90 0 3 1 0 3 0 0 0 100 3 0 0 0 109 16 102 0 3 5 0 343 0 0 0 100 4 0 0 7 220 105 10 0 1 1 0 0 0 0 0 100 5 0 0 7 31 10 56 1 1 2 0 1316 0 0 0 100 6 1 0 0 20 6 16 0 0 2 0 301 0 0 0 100 7 0 0 0 19 2 13 0 2 0 0 307 0 0 0 100 April 27, 2026 at 06:25:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 110 0 0 0 0 0 0 0 0 100 1 0 0 14 14 4 10 1 1 0 0 271 0 0 0 100 2 0 0 0 17 1 18 0 0 0 0 27 0 0 0 100 3 0 0 0 18 2 16 0 2 2 0 283 0 0 0 100 4 0 0 7 312 153 105 0 1 0 0 1 0 0 0 100 5 0 0 7 28 11 48 1 0 0 0 1302 0 0 0 100 6 0 0 0 35 10 32 1 0 1 0 629 0 0 0 100 7 0 0 0 17 2 14 0 0 1 0 313 0 0 0 100 April 27, 2026 at 06:25:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 14 0 1 0 0 0 0 0 0 100 1 0 0 14 15 3 12 0 2 0 0 266 0 0 0 100 2 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 114 22 108 1 2 0 0 333 0 0 0 100 4 0 0 7 306 132 96 0 2 0 0 0 0 0 0 100 5 0 0 7 23 9 48 0 0 0 0 1307 0 0 0 100 6 0 0 0 12 3 8 0 1 0 0 296 0 0 0 100 7 0 0 0 10 1 4 1 0 0 0 300 0 0 0 100 April 27, 2026 at 06:25:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 20 0 0 1 0 0 0 0 0 100 1 0 0 14 110 43 104 0 3 0 0 268 0 0 0 100 2 0 0 0 14 3 12 0 2 1 0 0 0 0 0 100 3 0 0 0 89 3 84 0 2 0 0 283 0 0 0 100 4 0 0 7 232 111 22 0 2 0 0 0 0 0 0 100 5 8 0 7 30 8 56 1 1 1 0 1349 0 0 0 100 6 9 0 0 15 3 12 0 0 0 0 322 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:25:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 108 0 1 0 0 0 0 0 0 100 1 0 0 14 12 3 8 0 0 0 0 267 0 0 0 100 2 0 0 0 106 49 100 0 1 0 0 0 0 0 0 100 3 0 0 0 16 3 14 0 2 1 0 318 0 0 0 100 4 0 0 7 212 103 2 0 0 0 0 0 0 0 0 100 5 0 0 7 26 8 50 1 0 1 0 1306 0 0 0 100 6 0 0 0 12 3 6 0 0 1 0 296 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:25:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 14 0 1 0 0 4 0 0 0 100 1 0 0 14 16 4 10 1 1 0 0 271 0 0 0 100 2 0 0 0 109 31 106 0 6 0 0 10 0 0 0 100 3 0 0 0 63 5 56 0 4 1 0 312 0 0 0 100 4 0 0 7 258 115 46 0 5 0 0 14 0 0 0 100 5 4 0 7 47 18 72 1 2 1 0 1646 0 0 0 99 6 0 0 0 13 2 10 1 1 0 0 298 0 0 0 100 7 0 0 0 13 1 10 0 0 0 0 306 0 0 0 100 April 27, 2026 at 06:25:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 94 0 1 2 0 0 0 0 0 100 1 0 0 14 10 2 6 0 0 0 0 266 0 0 0 100 2 0 0 0 111 39 110 0 1 0 0 21 0 0 0 100 3 0 0 0 13 2 8 1 0 2 0 310 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 10 0 0 0 100 5 0 0 7 53 23 72 0 2 1 0 1301 0 0 0 100 6 0 0 0 26 6 22 0 0 0 0 307 0 0 0 100 7 1 0 0 26 6 22 1 0 0 0 318 0 0 0 100 April 27, 2026 at 06:25:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 112 0 2 0 0 1 0 0 0 100 1 0 0 14 15 4 12 0 1 0 0 269 0 0 0 100 2 0 0 0 103 48 94 0 0 0 0 0 0 0 0 100 3 0 0 0 15 4 12 0 1 1 0 313 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 12 0 0 0 100 5 0 0 7 25 6 52 1 1 1 0 1301 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 7 0 0 0 19 6 14 1 1 0 0 308 0 0 0 100 April 27, 2026 at 06:25:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 104 0 1 0 0 0 0 0 0 100 1 0 0 14 15 4 10 0 0 0 0 269 0 0 0 100 2 0 0 0 10 1 8 0 1 1 0 0 0 0 0 100 3 0 0 0 112 52 107 0 1 1 0 329 0 0 0 100 4 0 0 7 213 102 6 0 1 0 0 11 0 0 0 100 5 0 0 7 18 5 42 1 0 0 0 1304 0 0 0 100 6 0 0 0 14 3 10 0 0 2 0 296 0 0 0 100 7 0 0 0 18 5 12 0 1 0 0 305 0 0 0 100 April 27, 2026 at 06:26:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 732 0 120 2306 200 72 0 11 3 12 149 0 1 0 99 1 695 0 14 49 5 54 2 5 4 11 1217 1 0 0 99 2 1973 0 4 58 1 65 2 9 8 10 430 0 1 0 99 3 38 0 0 147 35 158 0 11 6 8 403 0 0 0 100 4 36 0 7 338 119 130 0 8 6 4 159 0 0 0 100 5 19 0 7 60 7 101 0 6 12 7 1416 0 0 0 99 6 4 0 0 41 3 33 1 6 0 2 351 0 0 0 100 7 2 0 0 43 7 26 0 2 3 0 637 0 0 0 100 April 27, 2026 at 06:26:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 201 106 0 0 2 0 3 0 0 0 100 1 0 0 14 32 12 30 0 2 1 0 266 0 0 0 100 2 0 0 0 9 1 2 0 0 1 0 3 0 0 0 100 3 0 0 0 109 3 100 1 1 2 0 282 0 0 0 100 4 0 0 7 212 102 2 0 0 1 0 10 0 0 0 100 5 0 0 7 47 17 69 1 2 0 0 1404 0 0 0 100 6 0 0 0 18 6 10 0 0 1 0 298 0 0 0 100 7 0 0 0 11 2 2 1 0 1 0 300 0 0 0 100 April 27, 2026 at 06:26:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 114 0 1 0 0 0 0 0 0 100 1 0 0 14 110 52 107 0 1 0 0 266 0 0 0 100 2 0 0 0 15 1 12 0 0 0 0 14 0 0 0 100 3 0 0 0 13 2 8 0 0 2 0 295 0 0 0 100 4 0 0 7 214 103 4 0 0 0 0 11 0 0 0 100 5 0 0 7 34 19 48 1 0 1 0 1388 0 0 0 100 6 0 0 0 21 5 16 0 0 0 0 311 0 0 0 100 7 0 0 0 22 2 22 0 3 0 0 312 0 0 0 100 April 27, 2026 at 06:26:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 12 0 1 0 0 0 0 0 0 100 1 0 0 14 110 4 106 0 2 0 0 266 0 0 0 100 2 0 0 0 7 0 2 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 10 0 0 0 100 5 0 0 7 28 9 52 1 0 2 0 1390 0 0 0 100 6 0 0 0 12 3 6 0 0 1 0 296 0 0 0 100 7 0 0 0 109 49 102 0 2 0 0 300 0 0 0 100 April 27, 2026 at 06:26:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 108 0 2 2 0 0 0 0 0 100 1 0 0 14 17 3 10 1 0 0 0 266 0 0 0 100 2 0 0 0 11 1 8 0 0 0 0 5 0 0 0 100 3 0 0 0 12 2 8 0 0 3 0 293 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 10 0 0 0 100 5 0 0 7 34 11 58 1 0 2 0 1710 0 0 0 100 6 0 0 0 13 2 8 1 0 1 0 294 0 0 0 100 7 0 0 0 111 50 107 0 2 0 0 302 0 0 0 100 April 27, 2026 at 06:26:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 112 0 2 0 0 0 0 0 0 100 1 0 0 14 107 50 102 0 1 0 0 266 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 1 0 0 0 100 3 0 0 0 12 2 6 1 0 1 0 298 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 10 0 0 0 100 5 0 0 7 16 5 40 1 0 0 0 1383 0 0 0 100 6 0 0 0 14 3 8 0 1 0 0 296 0 0 0 100 7 0 0 0 21 7 12 1 0 0 0 306 0 0 0 100 April 27, 2026 at 06:26:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 121 0 35 2315 202 339 5 26 7 0 1975 1 1 0 99 1 287 0 14 147 53 230 5 11 3 2 1770 1 0 0 99 2 342 0 0 27 0 31 2 7 2 2 1324 1 0 0 98 3 20 0 0 49 3 135 2 10 2 0 1136 0 0 0 99 4 0 0 7 244 102 175 2 13 0 0 1415 0 0 0 100 5 374 0 7 59 6 294 3 16 6 1 2939 1 0 0 99 6 32 0 0 58 3 373 2 22 0 0 1804 0 0 0 99 7 7 0 0 65 9 250 3 17 0 0 1427 0 0 0 100 April 27, 2026 at 06:26:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2304 200 112 0 2 0 0 12 0 0 0 100 1 0 0 14 68 31 62 0 1 0 0 313 0 0 0 100 2 0 0 1 30 5 26 0 0 0 0 22 0 0 0 100 3 0 0 0 19 2 16 0 2 2 0 310 0 0 0 100 4 0 0 7 213 102 2 0 1 0 0 15 0 0 0 100 5 0 0 7 31 10 50 1 2 0 0 1418 0 0 0 100 6 0 0 1 23 3 20 0 1 0 0 327 0 0 0 100 7 0 0 0 64 24 60 0 1 0 0 312 0 0 0 100 April 27, 2026 at 06:26:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 200 27 0 4 3 0 21 0 1 0 99 1 0 0 14 33 4 38 1 5 14 0 294 0 0 0 100 2 1 0 0 32 8 32 0 4 10 0 41 0 0 0 100 3 0 0 0 128 3 133 0 4 11 0 463 0 0 0 100 4 0 0 7 223 103 18 0 1 11 0 28 0 0 0 100 5 0 0 7 27 6 47 0 3 2 0 1400 0 0 0 100 6 0 0 7 16 2 9 1 0 4 0 294 0 0 0 100 7 0 0 8 118 50 123 1 7 16 0 301 0 1 0 99 April 27, 2026 at 06:26:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 201 173 0 16 168 0 0 0 1 0 99 1 0 0 14 73 4 130 0 11 120 0 266 0 0 0 100 2 0 0 0 55 2 96 1 9 168 0 216 0 0 0 100 3 0 0 0 200 77 232 1 12 138 0 306 0 0 0 100 4 0 0 7 365 132 225 1 10 130 0 671 0 0 0 100 5 1 0 7 86 14 128 2 6 104 0 432 0 0 0 100 6 0 0 0 66 3 109 0 11 101 0 296 0 0 0 100 7 0 0 7 65 1 116 1 10 146 0 300 0 0 0 100 April 27, 2026 at 06:26:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2302 200 45 0 2 0 0 0 0 1 0 99 1 0 0 14 30 4 10 0 1 0 0 271 0 0 0 100 2 0 0 0 24 1 2 0 0 0 0 1 0 0 0 100 3 0 0 0 103 3 80 0 0 2 0 272 0 0 0 100 4 0 0 7 233 104 38 1 0 1 0 1058 0 0 0 100 5 0 0 7 152 60 135 0 2 0 0 284 0 0 0 100 6 1 0 0 28 3 6 0 0 1 0 295 0 0 0 100 7 0 0 0 26 1 4 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:26:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 200 118 0 0 0 0 4 0 0 0 100 1 0 0 14 13 3 4 0 0 1 0 266 0 0 0 100 2 0 0 0 9 1 0 0 0 1 0 0 0 0 0 100 3 0 0 0 14 3 6 0 0 2 0 319 0 0 0 100 4 0 0 7 214 103 32 1 0 2 0 1049 0 0 0 100 5 0 0 7 132 62 126 0 0 1 0 274 0 0 0 100 6 0 0 0 18 5 10 0 1 1 0 300 0 0 0 100 7 0 0 0 11 2 2 0 0 1 0 300 0 0 0 100 April 27, 2026 at 06:26:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 51 0 171 2328 200 1255 41 147 18 0 7221 3 1 0 95 1 45 0 14 525 8 1148 27 107 9 0 6001 3 1 0 96 2 9 0 0 224 1 1126 25 105 12 0 6137 2 1 0 97 3 8 0 0 342 2 909 18 66 10 0 5970 2 1 0 97 4 1 0 3 595 104 1008 9 59 10 0 6854 2 1 0 96 5 6 0 7 558 67 1009 10 49 8 0 6599 2 1 0 97 6 4 0 0 369 3 655 9 31 15 0 6152 2 1 0 97 7 41 0 0 273 1 945 15 44 6 0 4707 2 1 0 97 April 27, 2026 at 06:26:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 116 0 2 0 0 0 0 0 0 100 1 0 0 14 10 3 4 0 0 0 0 266 0 0 0 100 2 0 0 0 103 48 96 0 1 0 0 1 0 0 0 100 3 0 0 0 15 4 11 0 1 1 0 184 0 0 0 100 4 0 0 7 214 103 34 1 0 0 0 1059 0 0 0 100 5 0 0 7 39 11 32 0 1 0 0 266 0 0 0 100 6 0 0 0 13 3 6 1 0 0 0 296 0 0 0 100 7 0 0 0 9 1 2 1 0 0 0 300 0 0 0 100 April 27, 2026 at 06:26:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 7 2327 200 308 0 26 297 5 92 0 1 0 99 1 4 0 14 92 2 149 0 17 216 3 312 0 0 0 100 2 3 0 0 105 2 170 0 18 188 1 55 0 0 0 100 3 2624 0 115 236 89 318 3 20 222 13 900 0 1 0 98 4 106 0 7 351 142 241 1 25 216 16 1221 0 1 0 99 5 73 0 10 125 8 213 1 26 169 11 385 0 0 0 100 6 23 0 0 126 2 227 0 21 273 11 376 0 0 0 100 7 640 0 0 106 2 172 1 22 212 5 1203 1 1 0 99 April 27, 2026 at 06:26:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 30 0 1 0 0 0 0 0 0 100 1 0 0 14 8 2 6 0 1 0 0 266 0 0 0 100 2 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 3 0 0 0 37 4 29 0 2 2 0 185 0 0 0 100 4 0 0 7 317 124 138 1 4 1 0 1145 0 0 0 100 5 0 0 7 84 35 80 0 2 0 0 265 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 296 0 0 0 100 7 0 0 0 10 1 4 0 1 0 0 300 0 0 0 100 April 27, 2026 at 06:26:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 106 0 1 0 0 4 0 0 0 100 1 0 0 14 8 2 4 1 0 0 0 266 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 6 0 0 0 100 3 0 0 0 19 2 14 0 0 0 0 304 0 0 0 100 4 0 0 7 318 153 143 1 1 1 0 1143 0 0 0 100 5 0 0 7 43 14 42 0 1 0 0 594 0 0 0 100 6 0 0 0 16 3 11 1 2 1 0 298 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:26:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 15 0 2 0 0 0 0 0 0 100 1 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 2 0 0 0 23 4 20 0 0 0 0 14 0 0 0 100 3 0 0 0 20 2 16 0 0 0 0 297 0 0 0 100 4 0 0 7 318 108 138 1 1 0 0 1142 0 0 0 100 5 0 0 7 25 12 10 0 1 1 0 270 0 0 0 100 6 0 0 2 118 52 118 0 1 0 0 319 0 0 0 100 7 0 0 0 17 1 12 1 0 0 0 312 0 0 0 100 April 27, 2026 at 06:26:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 101 0 49 2307 200 369 5 37 7 1 1636 0 1 0 99 1 69 0 14 57 2 212 1 25 4 0 1307 0 0 0 99 2 15 0 0 40 0 130 4 17 8 0 1290 0 0 0 99 3 43 0 0 55 2 99 7 16 2 0 1732 0 0 0 99 4 412 0 7 257 109 197 6 15 8 0 2512 1 0 0 99 5 42 0 7 64 5 145 0 20 2 1 1485 0 0 0 99 6 339 0 0 129 52 128 3 7 6 1 1543 1 0 0 98 7 57 0 0 45 1 231 6 27 5 0 1704 0 0 0 99 April 27, 2026 at 06:26:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2318 204 260 0 25 198 0 28 0 1 0 99 1 4 0 14 66 3 113 0 13 115 0 324 0 0 0 100 2 0 0 0 80 2 149 0 16 104 0 7 0 0 0 100 3 0 0 0 113 37 147 1 16 172 0 309 0 0 0 100 4 0 0 7 294 137 144 2 13 147 0 1141 0 0 0 99 5 0 0 7 89 6 158 0 13 139 0 261 0 0 0 100 6 0 0 0 169 33 215 0 16 130 0 302 0 0 0 100 7 0 0 0 122 19 181 1 13 97 0 316 0 0 0 100 April 27, 2026 at 06:26:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2329 208 93 1 3 6 1 168 0 1 0 99 1 0 0 14 17 2 24 1 7 13 0 291 0 0 0 100 2 0 0 0 22 1 25 0 6 9 0 30 0 0 0 100 3 0 0 0 27 3 22 0 2 10 0 243 0 0 0 100 4 0 0 7 225 103 49 1 6 9 0 1166 0 0 0 100 5 0 0 7 74 29 68 0 5 10 0 296 0 0 0 100 6 0 0 9 126 30 133 1 9 15 0 301 0 1 0 99 7 0 0 14 14 1 7 0 2 5 0 300 0 0 0 100 April 27, 2026 at 06:26:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 19 0 1 1 0 0 0 0 0 100 1 0 0 21 14 4 8 0 1 1 0 266 0 0 0 100 2 0 0 0 32 12 20 0 0 1 0 15 0 0 0 100 3 0 0 0 22 3 14 0 0 3 0 412 0 0 0 100 4 0 0 7 214 103 34 0 0 1 0 1052 0 0 0 100 5 0 0 7 24 6 18 0 0 1 0 260 0 0 0 100 6 0 0 0 115 6 102 1 0 6 0 297 0 0 0 100 7 0 0 0 112 50 104 1 3 0 0 300 0 0 0 100 April 27, 2026 at 06:26:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2308 201 115 0 0 0 0 1 0 1 0 99 1 0 0 14 27 2 6 0 0 0 0 266 0 0 0 100 2 0 0 0 49 10 30 0 1 0 0 20 0 0 0 100 3 0 0 0 36 2 16 0 0 2 0 307 0 0 0 100 4 0 0 7 233 104 34 1 0 0 0 1046 0 0 0 100 5 0 0 7 46 11 20 0 2 1 0 260 0 0 0 100 6 0 0 0 32 2 16 0 0 1 0 317 0 0 0 100 7 0 0 0 130 51 112 0 0 0 0 310 0 0 0 100 April 27, 2026 at 06:26:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2302 200 98 0 3 0 0 0 0 0 0 100 1 0 0 14 10 2 6 0 0 0 0 266 0 0 0 100 2 0 0 0 24 8 18 0 0 0 0 14 0 0 0 100 3 0 0 0 32 4 26 1 3 1 0 267 0 0 0 100 4 0 0 7 287 139 108 1 1 0 0 1047 0 0 0 100 5 0 0 7 15 4 8 0 0 0 0 260 0 0 0 100 6 0 0 0 17 3 12 0 2 0 0 296 0 0 0 100 7 0 0 0 35 12 24 0 1 0 0 300 0 0 0 100 April 27, 2026 at 06:26:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 109 0 143 2328 200 1337 29 143 106 0 6733 3 2 0 95 1 32 0 14 638 4 1283 17 101 72 0 6138 3 1 0 96 2 15 0 0 251 11 996 22 85 86 0 6126 3 1 0 96 3 12 0 0 474 27 1068 11 68 83 0 6533 2 1 0 97 4 67 0 4 605 135 1154 17 82 105 0 6701 3 1 0 96 5 6 0 7 581 40 1008 10 55 76 0 5391 2 1 0 97 6 16 0 0 307 2 935 14 61 90 0 7382 2 1 0 97 7 46 0 0 292 2 866 11 60 83 0 5529 3 1 0 97 April 27, 2026 at 06:26:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2308 201 108 0 2 0 0 0 0 0 0 100 1 0 0 14 12 3 4 0 0 0 0 266 0 0 0 100 2 1 0 0 26 7 18 0 2 0 0 7 0 0 0 100 3 0 0 0 17 2 8 0 0 0 0 167 0 0 0 100 4 0 0 7 214 103 32 0 0 0 0 1046 0 0 0 100 5 0 0 7 21 4 14 0 1 0 0 270 0 0 0 100 6 0 0 0 116 53 106 1 0 0 0 296 0 0 0 100 7 0 0 0 13 1 6 1 1 0 0 300 0 0 0 100 April 27, 2026 at 06:26:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 6 2320 201 45 0 10 7 6 61 0 0 0 99 1 5 0 14 34 2 28 0 4 3 4 326 0 0 0 100 2 1340 0 113 143 7 164 1 6 4 10 985 1 1 0 98 3 127 0 0 53 2 68 0 7 4 13 554 0 0 0 100 4 19 0 1 259 107 89 1 6 8 9 1216 0 0 0 100 5 1955 0 9 57 4 62 2 9 8 11 652 0 1 0 99 6 19 0 0 138 52 149 0 7 12 8 398 0 0 0 100 7 7 0 0 32 1 30 0 5 9 6 359 0 0 0 100 April 27, 2026 at 06:26:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 200 12 0 0 3 0 0 0 0 0 100 1 1 0 14 11 3 8 0 1 1 0 282 0 0 0 100 2 0 0 0 127 7 124 0 1 0 0 14 0 0 0 100 3 0 0 0 12 2 10 0 1 0 0 199 0 0 0 100 4 0 0 7 213 103 32 1 0 1 0 1133 0 0 0 100 5 0 0 7 29 12 16 0 0 0 0 270 0 0 0 100 6 0 0 1 117 53 116 0 0 0 0 317 0 0 0 100 7 0 0 0 15 1 12 0 0 1 0 310 0 0 0 100 April 27, 2026 at 06:26:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 95 0 2 0 0 0 0 0 0 100 1 1 0 14 8 2 4 1 0 0 0 268 0 0 0 100 2 0 0 0 27 8 18 0 0 0 0 10 0 0 0 100 3 0 0 0 16 2 12 1 1 1 0 304 0 0 0 100 4 0 0 7 213 103 32 1 0 0 0 1128 0 0 0 100 5 0 0 7 23 4 22 0 1 0 0 274 0 0 0 100 6 0 0 0 113 50 105 1 3 0 0 294 0 0 0 100 7 0 0 0 19 4 10 0 3 0 0 301 0 0 0 100 April 27, 2026 at 06:26:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 200 256 0 24 247 0 2 0 1 0 99 1 0 0 14 100 10 175 1 16 220 0 266 0 0 0 100 2 0 0 0 200 31 297 0 30 298 0 329 0 0 0 99 3 0 0 0 140 57 185 0 19 231 0 299 0 0 0 100 4 0 0 7 322 149 187 0 21 245 0 1134 0 1 0 99 5 0 0 7 86 3 159 0 16 180 0 270 0 0 0 100 6 0 0 0 85 3 167 0 17 258 0 296 0 0 0 100 7 0 0 0 125 1 209 1 22 176 0 300 0 0 0 100 April 27, 2026 at 06:26:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 133 0 46 2308 200 341 1 34 6 0 1526 1 1 0 99 1 286 0 14 74 4 251 0 26 1 0 2057 1 0 0 99 2 256 0 7 138 9 142 0 8 0 1 1360 1 0 0 98 3 393 0 0 52 3 129 1 14 10 0 1427 1 0 0 99 4 1 0 2 281 103 374 1 26 4 0 2601 1 0 0 99 5 20 0 7 95 5 363 1 22 2 0 1729 0 0 0 99 6 1 0 0 61 4 225 1 21 0 0 1740 0 0 0 99 7 1 0 0 67 1 282 0 19 2 0 1958 0 0 0 99 April 27, 2026 at 06:26:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 201 31 0 4 0 0 9 0 0 0 100 1 0 0 0 131 13 118 0 1 1 0 18 0 0 0 100 2 4 0 14 15 2 4 0 1 1 0 266 0 0 0 100 3 0 0 0 18 3 9 0 0 2 0 184 0 0 0 100 4 0 0 7 223 103 44 1 1 1 0 1158 0 0 0 100 5 0 0 7 18 5 10 0 1 1 0 276 0 0 0 100 6 0 0 0 118 54 110 0 1 1 0 314 0 0 0 100 7 0 0 0 16 2 10 0 2 1 0 306 0 0 0 100 April 27, 2026 at 06:26:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 110 0 0 0 0 0 0 0 0 100 1 0 0 0 22 8 16 0 0 0 0 7 0 0 0 100 2 0 0 14 15 4 10 1 0 0 0 273 0 0 0 100 3 0 0 0 16 2 16 0 1 0 0 294 0 0 0 100 4 0 0 7 217 105 36 1 0 0 0 1139 0 0 0 100 5 0 0 7 23 12 15 0 1 0 0 260 0 0 0 100 6 0 0 0 114 50 110 1 1 0 0 316 0 0 0 100 7 0 0 0 16 1 14 0 0 0 0 312 0 0 0 100 April 27, 2026 at 06:26:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2324 208 142 0 8 14 0 24 0 1 0 99 1 0 0 7 29 4 27 1 4 10 0 27 0 0 0 100 2 0 0 14 21 4 17 0 4 3 0 286 0 0 0 100 3 0 0 8 23 2 22 1 5 9 0 136 0 1 0 99 4 2 0 7 234 103 61 3 3 6 0 1279 0 0 0 99 5 0 0 7 120 52 119 0 5 11 1 338 0 0 0 100 6 0 0 0 24 3 18 0 1 2 0 387 0 0 0 100 7 0 0 0 23 2 19 1 0 7 0 315 0 0 0 100 April 27, 2026 at 06:26:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2324 206 302 0 18 177 0 9 0 1 0 99 1 0 0 7 83 1 153 0 17 169 0 0 0 0 0 100 2 0 0 14 79 1 152 0 19 160 0 266 0 0 0 100 3 0 0 0 116 47 151 0 11 146 0 2 0 0 0 100 4 0 0 7 345 151 195 1 13 151 0 1387 0 0 0 99 5 0 0 7 103 8 166 0 15 139 0 260 0 0 0 100 6 0 0 0 171 46 240 0 18 189 0 294 0 0 0 100 7 0 0 0 82 1 154 0 9 149 0 300 0 0 0 100 April 27, 2026 at 06:26:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2318 208 121 0 1 0 0 13 0 1 0 99 1 0 0 0 28 1 4 0 0 0 0 0 0 0 0 100 2 0 0 14 23 1 4 0 1 0 0 266 0 0 0 100 3 0 0 0 37 3 16 0 1 0 0 4 0 0 0 100 4 0 0 7 233 105 36 1 0 2 0 1364 0 0 0 100 5 0 0 7 130 54 112 0 1 0 0 263 0 0 0 100 6 0 0 0 33 3 10 0 1 1 0 296 0 0 0 100 7 0 0 0 25 1 4 0 0 0 0 301 0 0 0 100 April 27, 2026 at 06:26:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2324 210 124 0 1 0 0 14 0 0 0 100 1 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 8 1 2 1 0 0 0 266 0 0 0 100 3 0 0 0 20 2 14 0 0 0 0 2 0 0 0 100 4 0 0 7 225 105 46 1 0 0 0 1318 0 0 0 100 5 0 0 7 114 54 108 0 0 0 0 260 0 0 0 100 6 0 0 0 14 2 4 1 0 0 0 294 0 0 0 100 7 0 0 0 13 1 9 0 3 0 0 300 0 0 0 100 April 27, 2026 at 06:26:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 175 2337 201 1367 44 136 33 0 6670 3 1 0 95 1 37 0 0 550 36 1021 23 92 15 0 5857 3 1 0 96 2 33 0 14 155 3 997 35 84 25 0 6298 3 1 0 96 3 21 0 0 495 8 1084 27 75 14 0 5534 3 1 0 97 4 32 0 7 585 105 964 11 50 13 0 7567 2 1 0 96 5 4 0 7 352 15 798 12 43 16 0 7239 2 1 0 97 6 38 0 0 337 4 758 8 32 8 0 6664 2 1 0 97 7 15 0 0 455 2 949 20 47 5 0 4893 2 1 0 97 April 27, 2026 at 06:26:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 116 0 1 0 0 0 0 0 0 100 1 0 0 0 13 3 10 0 1 0 0 0 0 0 0 100 2 0 0 14 109 52 106 0 0 0 0 276 0 0 0 100 3 0 0 0 19 6 14 0 1 0 0 6 0 0 0 100 4 0 0 7 218 105 39 1 2 2 0 1361 0 0 0 100 5 0 0 7 15 5 10 0 1 0 0 261 0 0 0 100 6 0 0 0 16 2 10 0 2 2 0 294 0 0 0 100 7 0 0 0 12 2 6 0 1 0 0 300 0 0 0 100 April 27, 2026 at 06:26:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 200 217 1 24 241 0 0 0 1 0 99 1 0 0 0 141 36 207 0 18 201 0 0 0 0 0 100 2 0 0 14 108 14 186 0 19 244 0 276 0 0 0 100 3 0 0 0 123 47 172 0 24 219 0 7 0 0 0 100 4 0 0 7 394 147 252 0 21 231 0 1361 0 1 0 99 5 0 0 7 100 4 184 0 20 220 1 260 0 0 0 100 6 0 0 0 95 4 171 0 19 260 2 320 0 0 0 100 7 0 0 0 92 2 172 0 11 183 0 300 0 0 0 100 April 27, 2026 at 06:26:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 104 0 1 0 0 0 0 0 0 100 1 0 0 0 110 52 104 0 0 0 0 1 0 0 0 100 2 0 0 14 10 2 6 1 0 0 0 277 0 0 0 100 3 0 0 0 24 8 20 1 1 0 0 13 0 0 0 100 4 0 0 7 230 105 50 2 1 4 0 1360 0 0 0 100 5 0 0 7 19 6 16 0 0 0 0 300 0 0 0 100 6 5 0 0 16 3 8 1 0 1 0 295 0 0 0 100 7 0 0 0 12 2 8 0 1 0 0 303 0 0 0 100 April 27, 2026 at 06:26:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 653 0 7 2337 206 170 2 7 4 11 953 1 1 0 98 1 14 0 0 48 5 39 0 6 5 3 96 0 0 0 100 2 9 0 14 133 49 131 0 6 5 2 354 0 0 0 100 3 725 0 120 33 5 50 0 4 5 11 522 0 0 0 99 4 2063 0 7 274 104 121 3 13 17 11 1946 0 1 0 99 5 24 0 8 43 5 41 0 7 7 6 359 0 0 0 100 6 11 0 0 48 5 37 0 6 7 1 377 0 0 0 100 7 7 0 0 41 3 22 1 2 5 2 355 0 0 0 100 April 27, 2026 at 06:26:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 206 122 0 2 1 0 7 0 0 0 100 1 0 0 0 11 1 4 0 1 0 0 0 0 0 0 100 2 0 0 14 110 52 106 0 0 0 0 277 0 0 0 100 3 0 0 0 18 0 20 0 2 0 0 23 0 0 0 100 4 0 0 7 226 105 46 1 0 1 0 1408 0 0 0 100 5 0 0 7 23 12 8 0 0 1 0 260 0 0 0 100 6 0 0 1 22 4 18 0 0 0 0 304 0 0 0 100 7 0 0 0 19 2 20 0 2 3 0 312 0 0 0 100 April 27, 2026 at 06:26:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 82 0 63 2315 202 398 5 32 5 0 2288 1 1 0 98 1 156 0 0 87 2 230 1 21 6 0 1662 1 0 0 99 2 142 0 14 115 4 303 3 30 6 0 1692 0 0 0 99 3 144 0 0 84 7 348 5 23 3 0 1685 1 0 0 99 4 63 0 7 364 146 332 5 23 8 0 2657 1 0 0 99 5 355 0 7 55 6 127 1 5 4 1 1762 1 0 0 98 6 151 0 0 69 3 264 3 24 6 0 1598 1 0 0 99 7 1 0 0 59 2 206 1 28 12 0 1980 1 0 0 99 April 27, 2026 at 06:26:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 159 0 16 169 0 0 0 1 0 99 1 0 0 0 61 1 113 0 11 138 0 0 0 0 0 100 2 0 0 14 67 1 122 1 9 121 0 266 0 0 0 100 3 0 0 0 104 38 141 0 13 121 0 4 0 0 0 100 4 0 0 7 410 145 264 1 12 161 0 1408 0 1 0 99 5 0 0 7 194 53 268 0 18 154 0 269 0 0 0 100 6 0 0 0 84 3 152 1 15 187 0 294 0 0 0 100 7 0 0 0 84 2 156 0 9 185 0 303 0 0 0 100 April 27, 2026 at 06:26:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 201 120 0 6 5 0 36 0 1 0 99 1 0 0 0 26 2 23 0 5 5 0 145 0 0 0 100 2 1 0 14 24 1 27 1 4 12 0 291 0 0 0 100 3 1 0 0 19 1 14 1 4 5 0 14 0 0 0 100 4 0 0 7 248 111 69 1 2 7 0 1399 0 0 0 100 5 0 0 17 46 16 46 0 2 13 0 279 0 1 0 99 6 0 0 0 115 46 112 1 3 6 0 319 0 0 0 100 7 0 0 14 23 2 22 1 6 10 0 323 0 0 0 100 April 27, 2026 at 06:26:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 105 0 2 0 0 1 0 0 0 100 1 0 0 0 12 2 4 0 0 0 0 0 0 0 0 100 2 0 0 14 9 1 4 0 1 0 0 266 0 0 0 100 3 0 0 0 16 2 18 0 2 0 0 3 0 0 0 100 4 0 0 7 246 113 62 1 0 1 0 1352 0 0 0 99 5 0 0 7 114 52 106 0 2 0 0 260 0 0 0 100 6 0 0 0 14 3 8 0 1 1 0 295 0 0 0 100 7 0 0 0 13 2 6 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:26:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2311 202 120 1 3 0 0 8 0 1 0 99 1 0 0 7 26 1 4 0 1 0 0 0 0 0 0 100 2 0 0 14 23 1 2 0 0 0 0 266 0 0 0 100 3 0 0 0 130 49 117 0 2 1 0 18 0 0 0 100 4 21 0 7 240 107 40 0 0 1 0 1338 0 0 0 100 5 0 0 7 52 17 20 0 1 0 0 269 0 0 0 100 6 0 0 0 40 5 24 0 2 0 0 319 0 0 0 100 7 0 0 0 43 3 28 2 3 1 0 306 0 0 0 100 April 27, 2026 at 06:26:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2302 200 91 0 3 0 0 0 0 0 0 100 1 0 0 0 21 4 14 0 3 0 0 0 0 0 0 100 2 0 0 14 10 1 4 1 1 0 0 266 0 0 0 100 3 0 0 0 109 40 102 0 3 0 0 0 0 0 0 100 4 0 0 7 223 104 46 2 1 2 0 1332 0 0 0 99 5 0 0 7 26 10 20 0 0 0 0 269 0 0 0 100 6 0 0 0 16 2 8 1 1 0 0 294 0 0 0 100 7 0 0 0 26 9 14 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:26:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 161 2340 204 1110 29 108 18 0 6468 3 1 0 96 1 10 0 0 412 7 1084 24 77 17 0 5719 3 1 0 96 2 3 0 14 139 1 1129 31 102 16 0 6220 2 1 0 97 3 3 0 0 363 2 869 18 65 16 0 5551 3 1 0 96 4 15 0 7 742 105 1007 19 64 12 1 6929 2 1 0 96 5 9 0 7 500 47 1093 13 50 12 0 5086 2 1 0 97 6 1 0 0 356 4 799 9 50 16 0 5296 2 1 0 97 7 36 0 0 328 3 556 5 23 17 0 6440 2 1 0 97 April 27, 2026 at 06:26:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 104 0 1 0 0 21 0 0 0 100 1 0 0 0 29 11 24 0 0 0 0 14 0 0 0 100 2 0 0 14 12 4 11 0 2 0 0 267 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 4 0 0 7 217 104 36 1 0 1 0 1326 0 0 0 99 5 0 0 7 14 4 10 0 0 0 0 264 0 0 0 100 6 0 0 0 120 51 114 0 1 1 0 295 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:26:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 7 2323 200 142 0 12 8 6 109 0 0 0 99 1 5 0 0 57 12 43 0 3 4 3 64 0 0 0 100 2 2 0 14 53 13 38 0 3 2 1 341 0 0 0 100 3 3254 0 115 35 1 52 3 2 9 12 1264 1 1 0 98 4 135 0 7 256 104 94 0 7 13 10 1627 0 1 0 99 5 42 0 9 133 45 138 0 10 5 6 399 0 0 0 100 6 34 0 0 79 4 91 0 8 18 5 448 0 0 0 100 7 11 0 0 38 2 29 0 4 7 3 372 0 0 0 100 April 27, 2026 at 06:26:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 134 1 2 0 0 20 0 0 0 100 1 0 0 0 21 7 14 0 0 0 0 5 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 0 11 0 12 0 1 0 0 12 0 0 0 100 4 0 0 7 218 105 38 1 0 2 0 1373 0 0 0 99 5 0 0 7 23 10 10 0 1 1 0 260 0 0 0 100 6 0 0 0 117 51 116 1 1 1 0 314 0 0 0 100 7 0 0 0 12 1 8 0 2 0 0 300 0 0 0 100 April 27, 2026 at 06:26:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 112 0 1 0 0 10 0 0 0 100 1 0 0 0 22 7 16 0 0 0 0 323 0 0 0 100 2 0 0 14 14 4 10 1 0 0 0 272 0 0 0 100 3 0 0 0 12 0 8 0 1 0 0 5 0 0 0 100 4 0 0 7 225 107 48 2 0 1 0 1446 0 0 0 99 5 0 0 7 12 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 106 50 100 0 0 1 0 294 0 0 0 100 7 0 0 0 15 3 10 1 1 0 0 303 0 0 0 100 April 27, 2026 at 06:26:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 201 293 0 17 232 0 11 0 1 0 99 1 0 0 0 87 4 161 0 18 187 0 0 0 0 0 100 2 0 0 14 76 1 151 0 15 245 0 266 0 0 0 100 3 0 0 0 99 38 146 0 11 225 0 0 0 0 0 100 4 0 0 7 314 147 155 0 9 228 0 1440 0 0 0 99 5 0 0 7 93 3 172 0 9 207 0 260 0 0 0 100 6 0 0 0 83 3 155 0 15 237 0 294 0 0 0 100 7 0 0 0 177 50 254 0 13 235 0 300 0 0 0 100 April 27, 2026 at 06:26:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 48 0 63 2322 207 382 7 32 4 0 1695 1 1 0 99 1 69 0 0 167 41 309 4 23 8 0 1516 1 0 0 99 2 124 0 14 89 2 264 4 24 14 0 1874 1 0 0 99 3 146 0 0 84 1 221 6 21 3 0 1834 1 0 0 98 4 327 0 11 272 106 298 6 20 7 0 3349 1 1 0 99 5 136 0 7 108 3 284 8 18 8 1 1860 0 0 0 99 6 197 0 0 53 4 76 1 8 6 0 1546 1 0 0 99 7 40 0 0 88 7 200 11 22 9 0 1553 1 0 0 99 April 27, 2026 at 06:26:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2322 209 128 0 2 0 0 11 0 0 0 100 1 0 0 0 112 53 106 0 0 0 0 0 0 0 0 100 2 0 0 14 9 1 6 0 1 0 0 269 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 218 104 36 1 0 1 0 1451 0 0 0 100 5 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 11 2 4 1 0 1 0 294 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:26:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2321 206 150 0 7 11 0 100 0 0 0 99 1 0 0 7 81 31 81 0 4 6 0 24 0 0 0 100 2 0 0 14 22 2 14 2 2 4 0 287 0 0 0 100 3 1 0 0 35 5 44 0 7 4 0 53 0 0 0 100 4 0 0 7 223 104 54 3 4 14 0 1363 0 0 0 100 5 1 0 7 34 10 38 0 8 11 0 353 0 0 0 100 6 0 0 10 24 2 21 0 2 7 0 315 0 1 0 99 7 0 0 14 69 24 66 1 5 9 0 312 0 0 0 100 April 27, 2026 at 06:26:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 114 0 2 0 0 6 0 0 0 100 1 0 0 7 18 3 10 0 0 0 0 1 0 0 0 100 2 0 0 14 8 1 4 0 1 0 0 266 0 0 0 100 3 0 0 0 19 6 12 0 0 0 0 6 0 0 0 100 4 0 0 7 221 105 38 1 0 3 0 1321 0 0 0 100 5 0 0 7 30 9 186 0 1 0 0 592 0 0 0 100 6 0 0 0 110 49 104 0 4 0 0 294 0 0 0 100 7 3 0 0 17 2 13 0 4 0 0 313 0 0 0 100 April 27, 2026 at 06:26:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2309 201 205 0 15 180 0 0 0 1 0 99 1 0 0 0 84 3 121 0 13 132 0 0 0 0 0 100 2 0 0 21 80 2 117 0 11 105 0 268 0 0 0 100 3 0 0 0 124 34 154 0 13 144 0 14 0 0 0 100 4 0 0 7 311 131 143 1 7 136 0 1355 0 1 0 99 5 0 0 7 118 13 159 0 10 152 0 260 0 0 0 100 6 0 0 0 188 41 225 0 13 132 0 294 0 0 0 100 7 0 0 0 83 2 112 0 12 98 0 300 0 0 0 100 April 27, 2026 at 06:27:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 200 80 0 1 0 0 0 0 0 0 100 1 0 0 0 15 4 8 0 0 0 0 1 0 0 0 100 2 0 0 14 12 2 6 0 0 0 0 267 0 0 0 100 3 0 0 0 26 9 20 0 0 0 0 15 0 0 0 100 4 0 0 7 216 104 36 0 0 0 0 1347 0 0 0 100 5 0 0 7 23 7 20 0 1 0 0 285 0 0 0 100 6 2 0 0 127 40 124 1 5 2 0 295 0 0 0 100 7 0 0 0 37 12 28 0 1 0 0 299 0 0 0 100 April 27, 2026 at 06:27:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 175 2331 200 1363 33 129 17 0 6625 3 1 0 96 1 18 0 0 384 10 989 19 90 6 0 6695 2 1 0 97 2 6 0 14 327 24 1149 23 99 11 0 6537 3 1 0 96 3 16 0 0 510 9 988 21 61 9 0 4605 3 1 0 97 4 4 0 7 692 106 973 18 63 11 0 7444 3 1 0 96 5 24 0 7 470 19 879 13 44 15 0 5150 2 1 0 97 6 2 0 0 183 6 846 15 63 7 0 7561 3 1 0 97 7 0 0 0 393 6 707 17 46 7 0 4615 2 1 0 97 April 27, 2026 at 06:27:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 126 0 1 0 0 11 0 0 0 100 1 0 0 0 22 8 16 0 0 0 0 6 0 0 0 100 2 0 0 14 102 49 98 1 0 0 0 266 0 0 0 100 3 0 0 0 19 2 21 0 1 0 0 22 0 0 0 100 4 0 0 7 217 105 38 0 0 1 0 1369 0 0 0 100 5 0 0 7 26 14 10 0 0 0 0 263 0 0 0 100 6 0 0 0 17 2 16 0 0 0 0 317 0 0 0 100 7 0 0 0 14 1 10 0 1 0 0 301 0 0 0 100 April 27, 2026 at 06:27:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 124 0 2 0 0 0 0 0 0 100 1 0 0 0 20 7 14 0 0 0 0 5 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 268 0 0 0 100 3 0 0 0 107 50 102 0 0 0 0 10 0 0 0 100 4 0 0 7 216 104 36 1 0 3 0 1327 0 0 0 100 5 0 0 7 15 5 10 0 0 0 0 266 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 294 0 0 0 100 7 0 0 0 13 1 7 0 2 1 0 300 0 0 0 100 April 27, 2026 at 06:27:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 200 323 0 25 251 0 0 0 1 0 99 1 0 0 0 91 7 162 0 23 196 0 5 0 0 0 100 2 0 0 14 78 1 157 0 19 251 0 266 0 0 0 100 3 0 0 0 220 92 281 0 13 254 0 10 0 0 0 100 4 0 0 7 327 147 176 2 15 299 0 1334 0 1 0 99 5 0 0 7 86 3 159 0 14 186 0 260 0 0 0 100 6 0 0 0 85 2 160 1 17 201 0 294 0 0 0 100 7 0 0 0 91 1 176 0 19 261 0 300 0 0 0 100 April 27, 2026 at 06:27:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 110 0 2 0 0 0 0 0 0 100 1 0 0 0 21 7 16 0 0 0 0 324 0 0 0 100 2 0 0 14 20 6 18 1 0 0 0 277 0 0 0 100 3 0 0 0 105 48 102 0 1 0 0 15 0 0 0 100 4 0 0 7 217 104 38 1 0 2 0 1376 0 0 0 100 5 0 0 7 18 6 12 0 0 0 0 266 0 0 0 100 6 0 0 0 11 2 4 0 0 1 0 294 0 0 0 100 7 0 0 0 14 3 9 1 2 0 0 300 0 0 0 100 April 27, 2026 at 06:27:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 116 0 3 0 0 2 0 0 0 100 1 0 0 0 109 50 102 0 2 0 0 0 0 0 0 100 2 0 0 14 28 10 20 1 0 0 0 277 0 0 0 100 3 0 0 0 9 0 8 0 1 0 0 10 0 0 0 100 4 0 0 7 215 104 36 0 0 0 0 1331 0 0 0 100 5 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 7 0 0 0 13 2 7 0 2 0 0 303 0 0 0 100 April 27, 2026 at 06:27:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 20 0 7 2336 207 205 0 11 11 12 136 0 0 0 99 1 715 0 116 60 18 83 0 12 12 10 186 0 0 0 99 2 95 0 14 121 38 147 0 12 11 17 426 0 0 0 100 3 64 0 0 56 0 73 0 13 4 7 196 0 0 0 100 4 5 0 7 242 104 58 1 3 9 4 1487 0 0 0 99 5 7 0 7 51 13 33 0 4 2 3 331 0 0 0 100 6 2558 0 0 49 2 46 3 4 7 8 1470 1 1 0 98 7 10 0 0 43 1 32 0 3 4 4 367 0 0 0 100 April 27, 2026 at 06:27:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2312 204 120 0 2 0 0 6 0 0 0 100 1 0 0 0 15 4 10 0 1 0 0 0 0 0 0 100 2 0 0 14 107 51 102 0 0 0 0 266 0 0 0 100 3 0 0 0 11 0 6 0 1 0 0 10 0 0 0 100 4 0 0 7 217 104 36 2 0 1 0 1415 0 0 0 99 5 0 0 7 14 4 8 0 0 0 0 261 0 0 0 100 6 0 0 0 12 2 4 1 0 0 0 294 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:27:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 206 122 0 2 1 0 326 0 0 0 99 1 0 0 0 19 5 16 0 0 0 0 4 0 0 0 100 2 0 0 14 109 52 106 0 0 0 0 268 0 0 0 100 3 0 0 0 14 0 12 0 0 0 0 15 0 0 0 100 4 0 0 7 219 103 46 1 1 1 0 1448 0 0 0 100 5 0 0 7 18 4 14 0 1 1 0 261 0 0 0 100 6 0 0 0 11 2 6 0 0 2 0 294 0 0 0 100 7 0 0 0 9 1 2 1 0 0 0 300 0 0 0 100 April 27, 2026 at 06:27:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 100 0 2 0 0 0 0 0 0 100 1 0 0 0 30 11 24 0 0 0 0 12 0 0 0 100 2 0 0 14 109 52 102 1 0 0 0 267 0 0 0 100 3 0 0 0 11 1 6 0 1 0 0 11 0 0 0 100 4 0 0 7 222 105 46 0 0 2 0 1482 0 0 0 99 5 0 0 7 23 4 22 0 3 0 0 279 0 0 0 100 6 0 0 0 12 3 6 0 0 2 0 295 0 0 0 100 7 0 0 0 13 1 8 0 3 0 0 300 0 0 0 100 April 27, 2026 at 06:27:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 100 0 2 0 0 1 0 0 0 100 1 0 0 0 31 10 21 0 1 1 0 10 0 0 0 100 2 3 0 14 12 4 6 0 0 1 0 273 0 0 0 100 3 0 0 0 29 10 20 0 1 1 0 10 0 0 0 100 4 0 0 7 216 104 36 1 0 1 0 1395 0 0 0 99 5 0 0 7 18 6 12 0 0 1 0 264 0 0 0 100 6 0 0 0 15 4 6 0 0 1 0 295 0 0 0 100 7 3 0 0 113 43 108 0 1 1 0 311 0 0 0 100 April 27, 2026 at 06:27:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 126 0 1 0 0 11 0 0 0 100 1 0 0 0 22 7 14 1 0 0 0 5 0 0 0 100 2 0 0 14 10 1 8 0 2 0 0 266 0 0 0 100 3 0 0 0 12 0 12 0 0 0 0 22 0 0 0 100 4 0 0 7 218 105 38 1 0 2 0 1444 0 0 0 99 5 0 0 7 23 11 10 0 1 0 0 260 0 0 0 100 6 0 0 0 20 2 24 1 1 2 0 317 0 0 0 100 7 0 0 0 110 51 104 0 0 1 0 300 0 0 0 100 April 27, 2026 at 06:27:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 46 0 1 0 0 10 0 0 0 100 1 0 0 0 25 7 17 0 1 0 0 326 0 0 0 100 2 0 0 14 81 2 74 0 0 0 0 268 0 0 0 100 3 0 0 0 14 0 10 0 1 0 0 15 0 0 0 100 4 0 0 7 217 104 36 2 0 4 0 1420 0 0 0 99 5 0 0 7 19 9 6 0 0 0 0 260 0 0 0 100 6 0 0 0 12 2 6 0 0 0 0 294 0 0 0 100 7 0 0 0 116 51 114 1 3 0 0 301 0 0 0 100 April 27, 2026 at 06:27:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 206 122 1 2 0 0 6 0 0 0 100 1 0 0 0 13 3 8 0 0 0 0 0 0 0 0 100 2 0 0 14 7 1 4 1 0 0 0 266 0 0 0 100 3 0 0 0 9 0 8 0 1 0 0 10 0 0 0 100 4 0 0 7 215 104 36 0 0 4 0 1418 0 0 0 100 5 0 0 7 13 3 8 0 0 0 0 260 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 294 0 0 0 100 7 0 0 0 109 51 103 0 1 0 0 300 0 0 0 100 April 27, 2026 at 06:27:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2320 207 132 0 2 1 0 11 0 0 0 100 1 0 0 0 107 49 100 0 1 0 0 0 0 0 0 100 2 0 0 14 12 4 10 0 1 0 0 268 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 10 0 0 0 100 4 0 0 7 217 104 38 1 0 2 0 1448 0 0 0 100 5 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 12 2 6 0 1 1 0 294 0 0 0 100 7 0 0 0 14 2 6 0 0 1 0 300 0 0 0 100 April 27, 2026 at 06:27:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2320 208 128 0 1 1 0 11 0 0 0 100 1 0 0 0 14 4 8 0 0 0 0 0 0 0 0 100 2 0 0 14 102 49 98 0 1 0 0 266 0 0 0 100 3 0 0 0 7 0 2 0 0 0 0 10 0 0 0 100 4 0 0 7 216 104 36 1 0 3 0 1414 0 0 0 100 5 0 0 7 12 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 12 2 4 1 0 0 0 294 0 0 0 100 7 0 0 0 18 3 15 0 2 1 0 303 0 0 0 100 April 27, 2026 at 06:27:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 12 0 63 2321 206 383 4 24 2 0 1360 0 1 0 99 1 3 0 0 167 40 253 2 20 3 0 1309 0 0 0 99 2 17 0 14 55 7 75 7 13 1 0 949 2 0 0 98 3 2 0 0 111 12 247 8 17 4 0 1440 0 0 0 99 4 390 0 7 274 104 232 2 15 4 3 3002 1 1 0 99 5 264 0 7 57 11 108 4 18 2 3 1815 1 0 0 99 6 106 0 0 68 4 162 3 14 5 1 1477 0 0 0 99 7 234 0 0 43 2 79 3 16 2 1 1673 1 0 0 99 April 27, 2026 at 06:27:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2316 206 122 0 1 0 0 9 0 0 0 100 1 0 0 0 12 3 6 0 0 0 0 0 0 0 0 100 2 0 0 14 6 1 2 1 0 0 0 266 0 0 0 100 3 0 0 0 102 48 94 0 0 0 0 0 0 0 0 100 4 0 0 7 220 106 42 1 1 3 0 1444 0 0 0 100 5 0 0 7 15 4 10 0 1 0 0 260 0 0 0 100 6 0 0 0 12 2 4 0 0 0 0 294 0 0 0 100 7 0 0 0 14 1 10 0 1 0 0 300 0 0 0 100 April 27, 2026 at 06:27:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2325 209 269 0 18 180 0 11 0 1 0 99 1 0 0 0 74 4 133 0 8 179 0 0 0 0 0 100 2 0 0 14 50 2 88 0 7 134 0 268 0 0 0 100 3 0 0 0 89 30 125 0 9 140 0 0 0 0 0 100 4 0 0 7 406 134 267 1 16 195 0 1433 0 1 0 99 5 0 0 7 73 3 133 0 7 109 0 260 0 0 0 100 6 0 0 0 68 2 118 0 8 132 0 294 0 0 0 100 7 0 0 0 85 1 147 0 8 142 0 300 0 0 0 100 April 27, 2026 at 06:27:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2318 207 122 0 0 0 0 11 0 0 0 100 1 0 0 0 114 54 108 0 0 0 0 1 0 0 0 100 2 0 0 14 9 2 4 0 0 0 0 267 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 4 0 0 7 221 104 40 1 0 2 0 1440 0 0 0 100 5 0 0 7 20 7 16 0 0 0 0 286 0 0 0 100 6 0 0 0 17 3 11 1 2 0 0 295 0 0 0 100 7 0 0 0 9 1 4 0 0 0 0 303 0 0 0 100 April 27, 2026 at 06:27:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 16 2316 205 150 1 3 12 1 91 0 1 0 99 1 0 0 0 115 47 112 1 5 8 0 18 0 0 0 100 2 0 0 35 39 11 44 0 7 11 0 292 0 0 0 100 3 0 0 0 37 8 32 0 1 4 0 43 0 0 0 100 4 0 0 7 224 104 49 1 7 17 0 1477 0 0 0 100 5 0 0 7 23 4 19 1 4 9 1 343 0 0 0 100 6 0 0 0 22 4 13 0 2 8 0 306 0 0 0 100 7 0 0 0 26 2 21 1 2 10 0 315 0 0 0 100 April 27, 2026 at 06:27:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 203 130 0 1 0 0 12 0 0 0 100 1 0 0 0 14 3 6 0 0 0 0 0 0 0 0 100 2 0 0 14 112 51 107 1 2 0 0 266 0 0 0 100 3 0 0 7 29 8 28 0 1 0 0 25 0 0 0 100 4 0 0 7 219 105 38 1 0 3 0 1317 0 0 0 100 5 0 0 7 26 10 12 0 1 1 0 263 0 0 0 100 6 0 0 0 17 2 16 0 0 0 0 317 0 0 0 100 7 0 0 0 20 1 12 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:27:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2322 201 118 0 1 0 0 1 0 0 0 100 1 0 0 0 36 6 14 0 0 0 0 5 0 0 0 100 2 0 0 126 110 52 107 0 0 0 0 268 0 0 0 100 3 0 0 0 37 6 14 0 0 0 0 6 0 0 0 100 4 0 0 7 233 104 38 1 1 1 0 1330 0 0 0 100 5 0 0 7 28 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 26 2 4 0 0 1 0 294 0 0 0 100 7 0 0 0 26 1 4 0 1 0 0 300 0 0 0 100 April 27, 2026 at 06:27:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 200 112 0 2 0 0 0 0 0 0 100 1 0 0 0 14 3 8 0 0 0 0 0 0 0 0 100 2 0 0 21 109 51 106 0 0 0 0 266 0 0 0 100 3 0 0 0 21 6 16 0 0 0 0 9 0 0 0 100 4 0 0 7 218 104 38 1 0 3 0 1357 0 0 0 100 5 0 0 7 13 3 8 0 0 0 0 260 0 0 0 100 6 0 0 0 18 4 10 1 0 3 0 318 0 0 0 100 7 0 0 0 17 1 10 0 1 0 0 299 0 0 0 100 April 27, 2026 at 06:27:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 23 0 175 2339 201 1297 41 139 30 0 6401 3 1 0 96 1 26 0 0 337 7 907 16 101 19 0 6348 3 1 0 96 2 4 0 14 288 23 1122 28 103 29 0 6796 3 1 0 96 3 1 0 0 483 7 877 14 64 15 0 6829 2 1 0 97 4 22 0 7 618 128 1108 11 56 24 0 7031 2 1 0 97 5 77 0 7 262 4 928 15 62 15 0 6436 3 1 0 96 6 11 0 0 373 3 651 8 40 11 0 6472 2 1 0 98 7 14 0 0 173 5 1082 24 64 34 0 5658 2 1 0 97 April 27, 2026 at 06:27:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 110 0 1 0 0 1 0 0 0 100 1 0 0 0 14 3 8 0 0 0 0 3 0 0 0 100 2 0 0 14 7 1 4 0 1 0 0 266 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 4 0 0 7 314 152 106 0 0 2 0 318 0 0 0 100 5 0 0 7 14 4 38 1 0 0 0 1312 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 304 0 0 0 100 7 0 0 0 25 8 18 0 1 0 0 310 0 0 0 100 April 27, 2026 at 06:27:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 7 2330 202 156 1 6 6 1 169 0 1 0 99 1 7 0 0 42 4 39 0 4 7 5 67 0 0 0 100 2 1342 0 128 24 2 43 2 4 10 9 1258 1 1 0 98 3 127 0 0 59 2 74 0 10 8 9 187 0 0 0 100 4 1938 0 7 353 152 164 2 11 6 14 694 0 1 0 99 5 54 0 11 61 13 84 2 9 7 10 1393 0 0 0 100 6 9 0 0 41 2 34 0 4 6 2 383 0 0 0 100 7 10 0 0 59 8 51 0 4 6 3 367 0 0 0 100 April 27, 2026 at 06:27:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 110 0 1 0 0 0 0 0 0 100 1 0 0 0 15 4 8 0 0 0 0 1 0 0 0 100 2 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 216 103 4 1 0 2 0 280 0 0 0 100 5 0 0 7 116 54 138 1 1 1 0 1399 0 0 0 100 6 0 0 0 16 3 12 1 2 1 0 304 0 0 0 100 7 0 0 0 22 5 18 0 0 0 0 305 0 0 0 100 April 27, 2026 at 06:27:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 200 301 0 19 241 0 5 0 1 0 99 1 0 0 0 88 3 163 0 15 190 0 0 0 0 0 100 2 0 0 14 95 4 196 0 24 258 0 272 0 0 0 100 3 0 0 0 111 44 168 0 20 239 0 4 0 0 0 100 4 0 0 7 312 145 134 0 21 236 0 319 0 0 0 100 5 0 0 7 86 4 195 1 21 199 0 1396 0 1 0 99 6 0 0 0 71 5 126 0 18 249 0 304 0 0 0 100 7 0 0 0 199 53 292 1 16 278 0 629 0 0 0 100 April 27, 2026 at 06:27:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 114 0 2 1 0 0 0 0 0 100 1 0 0 0 110 51 106 0 1 0 0 0 0 0 0 100 2 0 0 14 16 6 12 0 0 0 0 272 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 4 0 0 7 213 103 4 0 0 1 0 300 0 0 0 100 5 0 0 7 16 5 42 1 1 0 0 1397 0 0 0 100 6 0 0 0 13 3 8 0 0 1 0 305 0 0 0 100 7 0 0 0 17 2 12 0 1 0 0 300 0 0 0 100 April 27, 2026 at 06:27:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 77 2310 201 342 7 23 3 0 1067 1 1 0 98 1 2 0 0 150 40 253 3 20 1 0 1309 1 0 0 99 2 6 0 14 56 6 140 6 14 4 0 1392 1 0 0 99 3 229 0 0 126 2 281 3 21 3 1 1681 1 0 0 99 4 232 0 7 255 104 172 5 21 2 0 1687 1 0 0 99 5 1 0 7 44 5 79 1 14 1 0 1217 1 0 0 99 6 47 0 0 65 5 169 3 20 5 0 2567 1 0 0 99 7 310 0 0 63 2 168 0 11 3 0 1711 1 0 0 99 April 27, 2026 at 06:27:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2324 210 142 0 0 0 0 36 0 0 0 100 1 0 0 0 112 53 106 0 0 0 0 0 0 0 0 100 2 0 0 14 11 2 2 1 0 0 0 266 0 0 0 100 3 0 0 0 12 0 10 0 0 0 0 12 0 0 0 100 4 0 0 7 217 104 8 1 0 1 0 288 0 0 0 100 5 0 0 7 19 10 6 0 0 0 0 260 0 0 0 100 6 0 0 0 25 3 56 2 3 2 0 1448 0 0 0 100 7 0 0 0 11 1 4 0 0 0 0 299 0 0 0 100 April 27, 2026 at 06:27:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2326 209 79 1 6 14 0 47 0 1 0 99 1 0 0 0 90 18 86 1 4 3 0 71 0 0 0 100 2 0 0 14 27 4 36 0 6 10 2 381 0 0 0 100 3 0 0 0 15 0 12 0 3 7 0 29 0 0 0 100 4 0 0 14 221 103 11 0 2 4 0 276 0 0 0 100 5 0 0 7 22 5 19 0 5 12 0 260 0 0 0 100 6 0 0 9 130 36 158 2 7 14 0 1436 0 1 0 99 7 0 0 0 25 1 31 1 7 15 1 313 0 0 0 100 April 27, 2026 at 06:27:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2321 206 278 0 15 174 0 9 0 1 0 99 1 0 0 0 77 5 136 0 9 136 0 1 0 0 0 100 2 0 0 14 67 1 120 0 8 110 0 266 0 0 0 100 3 0 0 0 91 30 128 0 11 159 0 0 0 0 0 100 4 0 0 7 305 132 132 0 6 156 0 308 0 0 0 100 5 0 0 14 166 53 220 0 11 96 0 260 0 0 0 100 6 0 0 0 63 3 131 1 7 143 0 1344 0 0 0 99 7 0 0 0 77 1 131 0 13 145 0 300 0 0 0 100 April 27, 2026 at 06:27:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2318 207 129 0 1 0 0 7 0 0 0 99 1 0 0 0 33 5 10 0 0 0 0 5 0 0 0 100 2 0 0 14 24 2 4 0 0 0 0 268 0 0 0 100 3 0 0 0 22 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 229 103 4 0 0 1 0 326 0 0 0 100 5 0 0 7 130 53 108 0 0 0 0 260 0 0 0 100 6 0 0 0 32 4 38 2 0 1 0 1342 0 0 0 100 7 0 0 0 27 1 4 0 1 0 0 300 0 0 0 100 April 27, 2026 at 06:27:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2328 212 138 0 1 0 0 20 0 0 0 100 1 0 0 0 14 3 8 0 1 0 0 3 0 0 0 100 2 0 0 14 8 1 2 1 0 0 0 266 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 214 103 4 0 0 2 0 290 0 0 0 100 5 0 0 7 112 53 106 0 0 0 0 260 0 0 0 100 6 0 0 0 19 3 42 1 1 0 0 1343 0 0 0 100 7 0 0 0 16 1 10 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:27:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 175 2344 205 1285 32 121 22 0 7007 3 1 0 95 1 2 0 0 292 5 832 22 84 14 0 6636 3 1 0 96 2 19 0 14 378 3 1040 23 82 15 0 6471 2 1 0 97 3 7 0 0 176 1 1076 19 80 17 0 5917 2 1 0 97 4 1 0 7 540 104 988 17 66 16 0 6564 3 1 0 96 5 19 0 7 276 43 1016 19 55 6 0 5998 3 1 0 96 6 5 0 0 473 8 1064 14 47 10 0 7266 2 1 0 97 7 2 0 0 161 16 994 13 51 18 0 6409 2 1 0 97 April 27, 2026 at 06:27:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 114 0 3 0 0 0 0 0 0 100 1 0 0 0 25 4 22 0 4 1 0 0 0 0 0 100 2 0 0 14 104 2 98 0 0 1 0 266 0 0 0 100 3 0 0 0 18 5 14 0 0 1 0 24 0 0 0 100 4 0 0 7 216 104 6 0 0 2 0 288 0 0 0 100 5 0 0 7 22 8 16 0 1 1 0 272 0 0 0 100 6 0 0 0 16 4 38 1 0 1 0 1341 0 0 0 100 7 0 0 0 13 2 8 0 1 0 0 301 0 0 0 100 April 27, 2026 at 06:27:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 349 0 17 301 0 0 0 1 0 99 1 0 0 0 196 45 273 0 19 194 0 0 0 0 0 100 2 0 0 14 93 4 183 0 17 259 0 268 0 0 0 100 3 0 0 0 131 47 187 0 13 249 0 15 0 0 0 100 4 0 0 7 309 147 176 0 14 273 0 286 0 0 0 100 5 0 0 7 94 7 166 0 11 234 0 266 0 0 0 100 6 0 0 0 88 4 198 1 18 179 0 1342 0 1 0 99 7 0 0 0 86 1 163 0 11 204 0 300 0 0 0 100 April 27, 2026 at 06:27:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 112 0 1 0 0 0 0 0 0 100 1 0 0 0 15 2 10 0 2 0 0 0 0 0 0 100 2 0 0 14 111 53 106 1 0 0 0 267 0 0 0 100 3 0 0 0 10 1 4 0 0 0 0 11 0 0 0 100 4 0 0 7 218 104 10 1 0 1 0 332 0 0 0 100 5 0 0 7 23 8 20 0 0 0 0 306 0 0 0 100 6 0 0 0 15 4 38 1 0 0 0 1342 0 0 0 100 7 0 0 0 8 1 2 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:27:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 32 0 7 2324 202 159 0 11 14 7 101 0 0 0 99 1 5 0 0 40 3 27 0 3 8 3 59 0 0 0 100 2 642 0 14 93 30 89 1 3 9 8 1162 1 0 0 99 3 8 0 0 88 27 83 0 4 2 4 78 0 0 0 100 4 2646 0 120 258 108 88 2 5 9 18 769 0 1 0 99 5 123 0 7 69 9 93 1 14 7 11 786 0 0 0 100 6 29 0 0 56 5 98 1 9 12 9 1480 0 0 0 100 7 10 0 2 38 2 24 1 2 5 6 361 0 0 0 100 April 27, 2026 at 06:27:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 116 0 1 0 0 0 0 0 0 100 1 0 0 0 13 2 6 0 0 0 0 0 0 0 0 100 2 0 0 14 10 2 8 0 1 1 0 266 0 0 0 100 3 0 0 0 111 50 112 0 0 0 0 22 0 0 0 100 4 0 0 7 221 107 12 0 0 1 0 305 0 0 0 100 5 0 0 7 24 11 16 0 1 0 0 281 0 0 0 100 6 0 0 0 21 6 42 1 1 1 0 1428 0 0 0 100 7 0 0 0 17 1 16 0 1 0 0 309 0 0 0 100 April 27, 2026 at 06:27:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 356 0 49 2307 201 250 3 15 3 4 806 2 1 0 98 1 271 0 0 62 3 269 6 26 6 3 2213 1 0 0 99 2 16 0 14 76 4 280 3 26 3 1 1626 1 0 0 99 3 29 0 0 180 50 350 0 23 6 1 1518 0 0 0 99 4 59 0 7 290 108 229 3 21 7 0 1802 0 0 0 99 5 83 0 7 56 3 173 2 18 0 1 1470 1 0 0 99 6 272 0 0 97 9 280 3 21 12 2 3137 1 0 0 99 7 45 0 0 73 3 206 2 22 12 0 1896 0 0 0 99 April 27, 2026 at 06:27:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2319 206 176 0 14 149 0 5 0 1 0 99 1 0 0 0 89 2 157 0 10 91 0 0 0 0 0 100 2 5 0 14 106 2 162 1 13 115 0 268 0 0 0 100 3 0 0 0 216 86 261 0 21 154 0 0 0 0 0 100 4 0 0 7 383 146 196 1 16 159 0 346 0 0 0 100 5 0 0 7 75 4 135 0 10 145 0 260 0 0 0 100 6 0 0 0 73 3 159 0 14 153 0 1141 0 1 0 99 7 0 0 0 73 2 124 1 10 108 0 593 0 0 0 100 April 27, 2026 at 06:27:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2321 207 57 0 4 10 0 38 0 1 0 99 1 0 0 0 24 2 23 1 4 8 0 10 0 0 0 100 2 0 0 14 67 20 72 0 6 6 0 419 0 0 0 100 3 0 0 0 119 11 120 0 8 8 0 50 0 0 0 100 4 0 0 14 225 103 25 1 9 14 0 279 0 0 0 100 5 0 0 7 74 25 65 0 6 4 0 271 0 0 0 100 6 0 0 8 19 2 45 2 2 13 0 1138 0 1 0 99 7 0 0 0 33 6 26 2 2 3 0 616 0 0 0 100 April 27, 2026 at 06:27:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 109 0 2 1 0 1 0 0 0 100 1 0 0 0 12 2 4 0 0 0 0 0 0 0 0 100 2 0 0 14 20 3 14 0 1 0 0 269 0 0 0 100 3 0 0 0 71 31 64 0 1 0 0 4 0 0 0 100 4 0 0 7 257 122 50 0 3 0 0 322 0 0 0 100 5 0 0 14 15 2 10 0 1 0 0 260 0 0 0 100 6 0 0 0 12 2 34 1 0 0 0 1050 0 0 0 100 7 0 0 0 42 15 37 0 4 2 0 610 0 0 0 100 April 27, 2026 at 06:27:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2305 201 105 0 1 0 0 0 0 0 0 100 1 0 0 0 27 2 4 0 0 0 0 0 0 0 0 100 2 0 0 14 32 2 12 0 0 0 0 268 0 0 0 100 3 0 0 0 36 4 18 0 0 0 0 20 0 0 0 100 4 0 0 7 329 151 107 0 3 3 0 303 0 0 0 100 5 0 0 7 40 8 16 0 0 1 0 280 0 0 0 100 6 0 0 0 26 2 36 0 0 0 0 1048 0 0 0 100 7 0 0 0 62 13 44 0 3 1 0 614 0 0 0 100 April 27, 2026 at 06:27:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 201 111 0 5 0 0 0 0 0 0 100 1 0 0 0 15 2 12 0 1 0 0 0 0 0 0 100 2 0 0 14 15 1 10 1 0 0 0 266 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 311 105 100 0 2 2 0 279 0 0 0 100 5 0 0 7 17 5 12 0 1 0 0 261 0 0 0 100 6 0 0 0 12 2 34 1 0 0 0 1047 0 0 0 100 7 0 0 0 28 8 18 1 0 1 0 604 0 0 0 100 April 27, 2026 at 06:27:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 38 0 161 2329 201 1301 29 135 22 0 6926 3 1 0 96 1 14 0 0 314 3 1048 22 105 22 0 6828 3 1 0 96 2 24 0 14 386 4 1085 17 69 22 0 6796 2 1 0 97 3 18 0 0 549 6 1077 9 60 14 0 6191 3 1 0 96 4 6 0 7 519 105 940 11 55 14 0 5473 3 1 0 96 5 10 0 7 283 35 1028 10 54 11 0 6225 2 1 0 97 6 7 0 0 251 3 859 13 47 8 0 6500 2 1 0 97 7 25 0 0 144 11 801 16 41 9 0 6250 3 1 0 97 April 27, 2026 at 06:27:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 108 0 1 0 0 0 0 0 0 100 1 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 2 0 0 14 16 2 12 0 0 0 0 267 0 0 0 100 3 0 0 0 106 1 100 0 1 0 0 11 0 0 0 100 4 0 0 7 217 105 8 0 0 1 0 215 0 0 0 100 5 0 0 7 11 3 6 0 0 0 0 261 0 0 0 100 6 0 0 0 11 2 34 1 0 2 0 1046 0 0 0 100 7 0 0 0 23 7 16 0 1 0 0 599 0 0 0 100 April 27, 2026 at 06:27:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 107 0 0 1 0 1 0 0 0 100 1 0 0 0 94 44 84 0 0 1 0 0 0 0 0 100 2 0 0 14 38 11 36 0 1 1 0 271 0 0 0 100 3 0 0 0 11 1 6 0 1 1 0 13 0 0 0 100 4 0 0 7 221 106 14 0 1 1 0 303 0 0 0 100 5 0 0 7 11 3 4 0 0 1 0 260 0 0 0 100 6 0 0 0 17 4 36 2 0 2 0 1048 0 0 0 100 7 0 0 0 36 12 27 0 2 0 0 609 0 0 0 100 April 27, 2026 at 06:27:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 116 0 1 0 0 0 0 0 0 100 1 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 2 0 0 14 115 51 112 1 0 0 0 266 0 0 0 100 3 0 0 0 12 0 14 0 1 0 0 20 0 0 0 100 4 0 0 7 222 105 16 0 0 0 0 307 0 0 0 100 5 0 0 7 21 9 14 0 0 0 0 281 0 0 0 100 6 0 0 0 12 3 36 0 0 0 0 1048 0 0 0 100 7 0 0 0 31 8 28 1 0 0 0 607 0 0 0 100 April 27, 2026 at 06:27:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 108 0 1 0 0 2 0 0 0 100 1 0 0 0 12 2 8 0 0 0 0 5 0 0 0 100 2 0 0 14 118 53 114 0 0 0 0 268 0 0 0 100 3 0 0 0 12 0 8 0 2 0 0 10 0 0 0 100 4 0 0 7 220 106 10 1 0 2 0 307 0 0 0 100 5 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 11 2 34 1 0 0 0 1048 0 0 0 100 7 0 0 0 25 8 18 1 0 1 0 925 0 0 0 100 April 27, 2026 at 06:27:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 186 0 22 233 0 0 0 1 0 99 1 0 0 0 87 2 157 0 16 201 0 0 0 0 0 100 2 0 0 14 176 29 247 0 26 214 0 266 0 0 0 99 3 0 0 0 173 41 247 1 23 160 0 10 0 0 0 100 4 0 0 7 365 160 217 0 22 296 0 308 0 0 0 99 5 0 0 7 79 2 150 0 16 208 0 260 0 0 0 100 6 0 0 0 87 2 192 1 20 196 0 1047 0 0 0 99 7 0 0 0 101 7 189 0 19 215 0 599 0 0 0 100 April 27, 2026 at 06:27:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 204 114 0 0 0 0 6 0 0 0 100 1 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 2 0 0 14 110 53 107 0 2 0 0 268 0 0 0 100 3 0 0 0 9 0 8 0 0 0 0 43 0 0 0 100 4 0 0 7 220 105 10 0 0 2 0 324 0 0 0 100 5 0 0 7 15 2 14 0 3 2 0 260 0 0 0 100 6 0 0 0 11 2 34 1 0 0 0 1046 0 0 0 100 7 1 0 0 19 6 12 0 0 1 0 607 0 0 0 100 April 27, 2026 at 06:27:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 10 2325 211 66 0 1 0 0 15 0 0 0 100 1 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 2 0 0 14 79 4 73 1 3 0 0 269 0 0 0 100 3 0 0 0 10 0 4 0 0 0 0 13 0 0 0 100 4 0 0 7 218 105 8 0 0 0 0 323 0 0 0 100 5 0 0 7 22 6 14 0 2 0 0 260 0 0 0 100 6 0 0 0 101 46 125 1 2 0 0 1048 0 0 0 100 7 0 0 0 16 3 8 1 0 0 0 595 0 0 0 100 April 27, 2026 at 06:27:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2314 206 124 0 4 0 0 326 0 0 0 100 1 0 0 0 47 19 42 0 1 0 0 5 0 0 0 100 2 0 0 14 16 5 12 0 1 0 0 268 0 0 0 100 3 0 0 0 11 0 12 0 0 0 0 20 0 0 0 100 4 0 0 1 225 105 16 1 3 0 0 292 0 0 0 100 5 0 0 7 27 9 22 0 3 1 0 282 0 0 0 100 6 0 0 0 59 26 82 0 1 1 0 1047 0 0 0 100 7 0 0 0 33 7 30 1 2 0 0 609 0 0 0 100 April 27, 2026 at 06:27:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 201 112 0 2 1 0 2 0 0 0 100 1 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 266 0 0 0 100 3 0 0 0 11 0 8 0 2 0 0 10 0 0 0 100 4 0 0 7 217 105 8 0 0 1 0 316 0 0 0 100 5 0 0 7 11 3 6 0 0 0 0 261 0 0 0 100 6 0 0 0 15 2 40 1 0 1 0 1046 0 0 0 100 7 0 0 0 23 7 16 0 0 1 0 604 0 0 0 100 April 27, 2026 at 06:27:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 711 0 120 2309 202 135 0 13 8 10 156 0 1 0 99 1 113 0 0 56 2 73 0 8 3 16 141 0 0 0 100 2 649 0 14 73 13 90 1 16 6 9 1218 1 0 0 99 3 51 0 1 154 41 161 0 10 3 6 140 0 0 0 100 4 52 0 7 251 106 45 0 7 5 3 423 0 0 0 100 5 1917 0 7 43 2 45 2 6 3 6 591 0 1 0 99 6 16 0 0 36 2 54 1 3 12 4 1111 0 0 0 100 7 15 0 0 52 8 43 0 6 7 1 673 0 0 0 100 April 27, 2026 at 06:28:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 113 0 2 0 0 0 0 0 0 100 1 0 0 0 14 3 8 0 1 0 0 0 0 0 0 100 2 0 0 14 15 5 12 1 0 0 0 267 0 0 0 100 3 0 0 0 113 1 108 0 1 0 0 11 0 0 0 100 4 0 0 7 213 103 4 0 0 2 0 314 0 0 0 100 5 0 0 7 13 4 8 0 0 0 0 282 0 0 0 100 6 0 0 0 14 2 42 0 0 0 0 1127 0 0 0 100 7 0 0 0 26 9 18 1 0 1 0 602 0 0 0 100 April 27, 2026 at 06:28:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 204 128 0 1 1 0 5 0 0 0 100 1 0 0 0 96 44 88 0 0 1 0 5 0 0 0 100 2 0 0 14 30 12 28 0 1 1 0 271 0 0 0 100 3 0 0 0 14 1 6 0 0 1 0 13 0 0 0 100 4 0 0 7 214 103 4 1 0 1 0 324 0 0 0 100 5 0 0 7 12 3 4 0 0 1 0 260 0 0 0 100 6 0 0 0 19 4 42 1 0 1 0 1127 0 0 0 100 7 0 0 0 35 12 22 2 0 2 0 928 0 0 0 100 April 27, 2026 at 06:28:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 206 117 0 0 0 0 6 0 0 0 100 1 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 266 0 0 0 100 3 1 0 0 15 0 15 0 0 0 0 22 0 0 0 100 4 0 0 7 217 105 8 0 0 0 0 281 0 0 0 100 5 0 0 7 21 8 14 1 0 1 0 280 0 0 0 100 6 0 0 0 11 2 34 1 0 0 0 1124 0 0 0 100 7 0 0 0 26 4 28 0 2 0 0 604 0 0 0 100 April 27, 2026 at 06:28:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 205 94 0 2 1 0 5 0 0 0 100 1 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 2 0 0 14 43 15 34 0 2 0 0 268 0 0 0 100 3 0 0 0 7 0 4 0 1 0 0 10 0 0 0 100 4 0 0 7 213 103 4 0 0 1 0 290 0 0 0 100 5 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 14 2 36 1 0 0 0 1126 0 0 0 100 7 0 0 0 114 40 109 0 4 0 0 593 0 0 0 100 April 27, 2026 at 06:28:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2316 207 140 0 3 2 0 6 0 0 0 100 1 0 0 0 103 48 98 0 2 0 0 0 0 0 0 100 2 0 0 14 8 1 4 1 0 0 0 266 0 0 0 100 3 0 0 0 15 2 14 0 1 0 0 10 0 0 0 100 4 0 0 7 214 103 6 0 0 1 0 279 0 0 0 100 5 0 0 7 12 4 6 0 0 0 0 260 0 0 0 100 6 0 0 0 10 2 34 0 0 1 0 1124 0 0 0 100 7 0 0 0 21 5 12 1 2 0 0 596 0 0 0 100 April 27, 2026 at 06:28:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 95 0 49 2322 206 478 11 31 4 1 1547 0 1 0 99 1 323 0 0 106 3 232 14 20 1 0 1776 1 0 0 99 2 207 0 14 78 2 206 4 14 1 2 1668 1 0 0 99 3 93 0 0 156 50 224 3 17 1 2 1539 1 0 0 99 4 178 0 7 287 106 226 4 24 4 1 2363 1 0 0 98 5 30 0 7 93 8 218 6 20 2 0 1472 1 0 0 99 6 0 0 0 59 2 235 1 11 0 0 2634 0 0 0 99 7 4 0 0 80 4 152 5 16 6 0 1746 1 0 0 99 April 27, 2026 at 06:28:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2323 211 138 0 2 1 0 33 0 0 0 99 1 0 0 0 14 2 6 0 1 0 0 0 0 0 0 100 2 3 0 14 11 1 8 0 1 0 0 283 0 0 0 100 3 0 0 0 111 50 106 0 1 0 0 12 0 0 0 100 4 0 0 7 217 103 8 0 1 2 0 290 0 0 0 100 5 0 0 7 20 4 14 0 2 0 0 277 0 0 0 100 6 16 0 0 14 2 36 1 1 1 0 1146 0 0 0 100 7 0 0 0 16 3 10 0 2 0 0 595 0 0 0 100 April 27, 2026 at 06:28:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 207 130 0 2 0 0 9 0 0 0 100 1 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 2 0 0 14 13 2 10 0 1 0 0 268 0 0 0 100 3 0 0 0 108 48 108 0 2 0 0 12 0 0 0 100 4 0 0 7 217 105 10 0 1 1 0 331 0 0 0 100 5 0 0 7 24 10 14 0 0 1 0 283 0 0 0 100 6 0 0 0 11 2 34 1 0 2 0 1137 0 0 0 100 7 0 0 0 24 5 22 0 0 1 0 603 0 0 0 100 April 27, 2026 at 06:28:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2319 208 126 0 2 0 0 7 0 0 0 100 1 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 2 0 0 14 13 2 8 1 1 0 0 266 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 311 152 104 0 0 1 0 316 0 0 0 100 5 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 10 2 34 0 0 0 0 1136 0 0 0 100 7 0 0 0 14 4 8 1 0 1 0 596 0 0 0 100 April 27, 2026 at 06:28:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2328 210 303 1 21 183 0 35 0 1 0 99 1 0 0 8 96 2 171 0 16 143 0 7 0 1 0 99 2 0 0 14 85 2 157 0 12 125 1 345 0 0 0 100 3 0 0 0 124 38 181 0 20 152 0 14 0 0 0 100 4 0 0 7 420 152 235 1 15 112 0 326 0 0 0 100 5 0 0 7 74 3 125 0 9 141 0 275 0 0 0 100 6 0 0 0 85 3 179 1 15 187 0 1244 0 0 0 99 7 0 0 0 85 3 145 1 11 155 0 607 0 0 0 100 April 27, 2026 at 06:28:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2326 211 133 0 1 0 0 12 0 0 0 99 1 0 0 7 108 50 100 0 1 0 0 0 0 0 0 100 2 0 0 14 14 4 10 0 1 0 0 267 0 0 0 100 3 0 0 0 14 2 6 0 0 0 0 1 0 0 0 100 4 0 0 7 224 105 20 0 1 2 0 308 0 0 0 100 5 0 0 7 16 3 10 0 0 0 0 279 0 0 0 100 6 0 0 0 13 2 36 1 0 1 0 1054 0 0 0 100 7 0 0 0 17 3 11 0 2 1 0 593 0 0 0 100 April 27, 2026 at 06:28:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 120 2327 212 140 0 1 1 0 20 0 1 0 99 1 0 0 0 35 3 8 0 1 1 0 0 0 0 0 100 2 0 0 14 126 52 108 0 1 1 0 271 0 0 0 100 3 0 0 0 24 1 0 0 0 1 0 0 0 0 0 100 4 0 0 7 229 103 4 0 0 2 0 294 0 0 0 100 5 0 0 7 27 3 4 0 0 1 0 260 0 0 0 100 6 0 0 0 33 4 39 1 2 1 0 1049 0 0 0 100 7 0 0 0 31 4 6 0 0 1 0 594 0 0 0 100 April 27, 2026 at 06:28:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2317 208 130 0 1 0 0 8 0 0 0 99 1 0 0 0 13 3 6 0 0 0 0 0 0 0 0 100 2 0 0 14 107 51 102 1 0 0 0 266 0 0 0 100 3 0 0 0 12 0 10 0 0 0 0 12 0 0 0 100 4 0 0 7 218 104 8 0 0 1 0 298 0 0 0 100 5 0 0 7 26 9 22 0 1 2 0 281 0 0 0 100 6 0 0 0 12 2 36 1 1 0 0 1047 0 0 0 100 7 0 0 0 27 4 28 1 1 3 0 602 0 0 0 100 April 27, 2026 at 06:28:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 172 2349 209 1244 20 119 22 0 6564 3 1 0 96 1 2 0 0 477 10 1117 19 99 7 0 6787 3 1 0 96 2 4 0 14 288 42 1185 20 96 16 0 6057 3 1 0 96 3 14 0 0 444 1 945 12 61 7 0 6174 2 1 0 97 4 1 0 2 510 106 968 19 64 17 0 6734 2 1 0 97 5 2 0 7 465 3 861 10 35 16 0 6586 2 1 0 97 6 4 0 0 201 3 945 13 44 17 0 7265 3 1 0 96 7 1 0 0 255 4 884 13 49 12 0 5950 3 1 0 97 April 27, 2026 at 06:28:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 200 263 0 18 272 0 0 0 1 0 99 1 0 0 0 208 55 309 0 17 173 0 5 0 0 0 100 2 0 0 14 93 2 181 0 19 265 0 266 0 0 0 100 3 0 0 0 138 52 180 0 22 254 0 3 0 0 0 100 4 0 0 7 319 152 196 0 16 231 0 221 0 0 0 100 5 0 0 7 87 2 167 0 20 213 0 260 0 0 0 100 6 0 0 0 95 2 211 0 27 214 0 1046 0 0 0 99 7 0 0 0 91 3 164 0 9 163 0 596 0 0 0 100 April 27, 2026 at 06:28:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 114 0 2 0 0 0 0 0 0 100 1 0 0 0 125 59 120 0 0 0 0 10 0 0 0 100 2 0 0 14 8 2 4 0 0 0 0 268 0 0 0 100 3 0 0 0 16 4 10 0 0 0 0 6 0 0 0 100 4 0 0 7 216 103 8 1 0 1 0 322 0 0 0 100 5 0 0 7 11 3 6 0 0 0 0 261 0 0 0 100 6 0 0 0 19 2 44 1 1 0 0 1048 0 0 0 100 7 0 0 0 12 3 6 0 0 2 0 594 0 0 0 100 April 27, 2026 at 06:28:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 110 0 1 0 0 1 0 0 0 100 1 0 0 0 125 59 121 0 1 0 0 10 0 0 0 100 2 0 0 14 7 1 2 1 0 0 0 266 0 0 0 100 3 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 214 103 6 0 0 1 0 316 0 0 0 100 5 0 0 7 9 2 4 0 0 0 0 260 0 0 0 100 6 0 0 0 18 2 40 1 0 1 0 1046 0 0 0 100 7 0 0 0 20 4 14 1 1 0 0 598 0 0 0 100 April 27, 2026 at 06:28:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 4 2321 200 156 0 10 7 5 100 0 0 0 100 1 731 0 115 118 45 140 0 2 4 14 498 0 0 0 99 2 70 0 14 73 15 99 0 11 7 13 433 0 0 0 100 3 67 0 3 44 2 56 0 7 9 8 126 0 0 0 100 4 2567 0 2 255 103 58 3 8 16 9 1604 1 1 0 98 5 6 0 7 53 9 55 0 9 2 4 347 0 0 0 100 6 13 0 0 50 4 78 1 5 6 5 1128 0 0 0 100 7 5 0 0 53 5 41 1 3 4 2 662 0 0 0 100 April 27, 2026 at 06:28:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 8 2302 200 112 0 1 0 0 0 0 0 0 100 1 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 2 0 0 14 108 52 104 0 0 0 0 266 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 4 0 0 7 214 103 5 0 0 0 0 214 0 0 0 100 5 0 0 7 13 3 9 0 2 0 0 261 0 0 0 100 6 0 0 0 24 6 50 0 0 1 0 1137 0 0 0 100 7 0 0 0 13 3 6 0 0 0 0 594 0 0 0 100 April 27, 2026 at 06:28:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 91 0 49 2311 200 222 3 25 1 0 1818 1 1 0 99 1 2 0 0 69 3 167 8 21 8 0 1541 1 0 0 99 2 317 0 28 145 51 242 4 12 5 2 1414 1 0 0 98 3 340 0 0 51 1 121 1 15 3 0 1705 1 0 0 99 4 3 0 7 266 105 142 2 17 5 0 1746 0 0 0 99 5 60 0 7 60 3 256 5 26 3 0 1722 1 0 0 99 6 139 0 0 82 8 149 5 12 2 1 2595 1 1 0 98 7 0 0 0 60 4 116 3 12 1 0 2200 1 0 0 99 April 27, 2026 at 06:28:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 201 112 0 2 0 0 11 0 0 0 100 1 0 0 0 110 50 98 0 0 0 0 0 0 0 0 100 2 4 0 14 22 5 20 1 1 0 0 275 0 0 0 100 3 0 0 0 11 1 4 0 0 0 0 2 0 0 0 100 4 0 0 7 222 106 10 0 0 0 0 291 0 0 0 100 5 0 0 7 36 12 32 0 1 0 0 297 0 0 0 100 6 1 0 0 15 2 36 1 1 1 0 1148 0 0 0 100 7 0 0 0 21 4 15 1 3 0 0 609 0 0 0 100 April 27, 2026 at 06:28:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 200 118 1 10 17 0 35 0 1 0 99 1 0 0 0 23 3 15 0 3 8 0 80 0 0 0 100 2 0 0 14 119 47 114 0 4 4 0 347 0 0 0 100 3 0 0 7 23 4 16 0 5 7 0 11 0 0 0 100 4 0 0 7 238 109 38 0 2 8 0 350 0 0 0 100 5 0 0 16 44 12 51 1 6 17 0 287 0 1 0 99 6 0 0 7 30 4 55 0 3 11 0 1151 0 0 0 99 7 0 0 0 27 4 17 1 2 4 0 617 0 0 0 100 April 27, 2026 at 06:28:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 201 17 0 1 0 0 1 0 0 0 100 1 0 0 0 13 2 4 0 0 0 0 0 0 0 0 100 2 0 0 14 10 2 6 0 1 0 0 266 0 0 0 100 3 0 0 0 28 7 26 0 0 0 0 21 0 0 0 100 4 0 0 14 309 137 100 0 6 3 0 288 0 0 0 100 5 0 0 7 118 20 110 0 7 1 0 282 0 0 0 100 6 0 0 0 32 8 58 1 1 0 0 1052 0 0 0 100 7 0 0 0 32 5 29 0 3 0 0 603 0 0 0 100 April 27, 2026 at 06:28:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2312 205 27 0 1 0 0 9 0 1 0 99 1 0 0 0 45 6 24 0 4 0 0 0 0 0 0 100 2 0 0 14 26 3 6 0 0 0 0 268 0 0 0 100 3 0 0 0 34 6 12 0 0 0 0 9 0 0 0 100 4 0 0 7 232 103 6 1 0 1 0 323 0 0 0 100 5 0 0 7 126 10 106 0 5 0 0 260 0 0 0 100 6 0 0 0 109 41 112 1 1 0 0 1049 0 0 0 100 7 0 0 0 36 3 14 0 0 1 0 596 0 0 0 100 April 27, 2026 at 06:28:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 200 125 0 12 156 0 0 0 1 0 99 1 0 0 0 126 5 191 0 13 137 0 0 0 0 0 100 2 0 0 14 122 17 178 1 13 127 0 266 0 0 0 100 3 0 0 0 129 43 159 0 12 147 0 11 0 0 0 100 4 0 0 7 303 138 148 0 15 121 0 235 0 0 0 100 5 0 0 7 142 25 190 0 13 111 0 260 0 0 0 100 6 0 0 0 99 13 186 1 10 117 0 1052 0 0 0 99 7 0 0 0 82 3 129 1 10 71 0 595 0 0 0 100 April 27, 2026 at 06:28:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 171 2335 205 1283 26 122 13 0 6134 4 1 0 95 1 5 0 0 191 4 1005 17 96 12 0 6747 3 1 0 96 2 4 0 14 237 15 1159 19 86 14 0 7336 3 1 0 96 3 34 0 0 482 14 1198 14 72 17 1 5246 3 1 0 96 4 10 0 3 699 107 1031 10 55 16 0 6747 2 1 0 97 5 1 0 7 305 4 650 6 31 0 0 8068 2 1 0 97 6 77 0 0 477 39 850 12 33 18 0 6171 3 1 0 96 7 9 0 0 299 3 1000 12 30 24 0 6255 3 1 0 96 April 27, 2026 at 06:28:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 104 0 3 0 0 11 0 0 0 100 1 0 0 0 16 3 12 0 2 0 0 0 0 0 0 100 2 0 0 14 14 3 8 0 0 0 0 266 0 0 0 100 3 0 0 0 20 5 12 0 1 0 0 0 0 0 0 100 4 0 0 7 293 103 85 0 1 0 0 212 0 0 0 100 5 0 0 7 12 3 4 0 0 0 0 259 0 0 0 100 6 0 0 0 14 2 36 1 0 0 0 1049 0 0 0 100 7 0 0 0 27 6 20 1 0 1 0 598 0 0 0 100 April 27, 2026 at 06:28:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 17 0 7 2321 200 152 0 9 10 1 93 0 0 0 99 1 707 0 113 119 6 137 0 5 8 8 156 0 0 0 99 2 2057 0 14 73 3 98 3 16 13 13 774 0 1 0 99 3 27 0 1 41 0 41 0 8 8 4 97 0 0 0 100 4 11 0 7 247 103 44 0 6 9 4 424 0 0 0 100 5 645 0 7 50 11 47 1 7 4 6 1205 1 0 0 99 6 11 0 0 38 2 57 1 4 3 2 1100 0 0 0 100 7 4 0 0 66 8 58 0 3 4 2 670 0 0 0 100 April 27, 2026 at 06:28:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 108 0 0 0 0 10 0 0 0 100 1 0 0 0 16 3 18 0 2 0 0 0 0 0 0 100 2 0 0 14 108 2 104 0 0 0 0 266 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 214 103 4 1 0 1 0 317 0 0 0 100 5 0 0 7 11 3 6 0 0 0 0 261 0 0 0 100 6 0 0 0 13 3 36 1 0 0 0 1136 0 0 0 100 7 0 0 0 31 8 24 1 0 0 0 601 0 0 0 100 April 27, 2026 at 06:28:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 200 279 0 18 310 0 12 0 1 0 99 1 0 0 0 101 3 188 0 16 196 0 0 0 0 0 100 2 0 0 14 192 3 281 0 17 217 0 268 0 0 0 100 3 0 0 0 133 45 174 0 17 211 0 0 0 0 0 100 4 0 0 7 327 147 175 0 17 256 0 247 0 0 0 100 5 0 0 7 81 2 145 0 18 163 0 260 0 0 0 100 6 0 0 0 88 4 195 1 17 249 0 1140 0 1 0 99 7 0 0 0 119 11 202 2 18 170 0 925 0 0 0 100 April 27, 2026 at 06:28:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2317 207 123 0 1 0 0 11 0 0 0 100 1 0 0 0 16 3 12 0 1 0 0 13 0 0 0 100 2 0 0 14 15 3 14 0 1 0 0 267 0 0 0 100 3 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 4 0 0 7 213 103 4 0 0 2 0 364 0 0 0 100 5 0 0 7 111 3 106 0 0 0 0 261 0 0 0 100 6 0 0 0 13 3 38 0 0 0 0 1132 0 0 0 100 7 0 0 0 18 2 12 0 0 1 0 593 0 0 0 100 April 27, 2026 at 06:28:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 285 0 49 2321 205 281 7 29 3 0 2060 1 1 0 98 1 133 0 0 107 13 272 2 23 6 1 1628 0 0 0 99 2 5 0 14 74 5 169 4 14 7 0 1208 1 0 0 99 3 94 0 0 66 2 284 2 17 7 0 1528 0 0 0 99 4 20 0 7 257 104 134 1 8 5 0 1710 1 0 0 99 5 373 0 7 143 3 191 3 7 3 5 1662 1 0 0 99 6 213 0 0 106 6 346 5 25 13 2 2521 1 0 0 99 7 64 0 0 73 4 176 1 14 5 0 1987 1 0 0 99 April 27, 2026 at 06:28:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 201 110 0 2 0 0 12 0 0 0 100 1 12 0 0 114 52 106 0 1 0 0 13 0 0 0 100 2 5 0 14 19 4 18 0 3 0 0 276 0 0 0 100 3 0 0 0 14 0 12 0 1 0 0 23 0 0 0 100 4 0 0 7 217 103 4 0 0 1 0 249 0 0 0 100 5 0 0 7 23 8 16 0 0 1 0 282 0 0 0 100 6 0 0 0 19 4 41 1 2 1 0 1143 0 0 0 100 7 0 0 0 47 9 46 2 0 1 0 620 0 0 0 100 April 27, 2026 at 06:28:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 13 2308 200 113 0 3 8 1 75 0 1 0 99 1 0 0 0 23 3 22 1 5 10 0 28 0 0 0 100 2 0 0 14 117 51 116 0 2 6 0 294 0 0 0 100 3 0 0 0 21 0 15 1 1 1 0 12 0 0 0 100 4 0 0 9 233 105 38 1 6 10 0 297 0 0 0 100 5 0 0 7 19 2 17 0 4 7 0 335 0 0 0 100 6 0 0 14 20 2 45 1 1 5 0 1150 0 0 0 99 7 1 0 0 46 9 51 1 7 17 0 646 0 0 0 100 April 27, 2026 at 06:28:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 200 188 0 11 172 0 3 0 1 0 99 1 0 0 0 80 4 140 0 12 120 0 0 0 0 0 100 2 0 0 14 86 3 153 0 9 131 0 266 0 0 0 100 3 0 0 0 114 33 156 0 13 120 0 0 0 0 0 100 4 0 0 7 408 161 229 0 14 162 0 287 0 0 0 100 5 0 0 7 128 24 187 0 12 108 0 260 0 0 0 100 6 0 0 7 72 2 153 1 5 125 0 1051 0 0 0 99 7 0 0 0 90 12 140 0 6 138 0 605 0 0 0 100 April 27, 2026 at 06:28:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2303 200 20 0 2 0 0 3 0 1 0 99 1 0 0 0 30 3 6 0 0 0 0 0 0 0 0 100 2 0 0 14 27 3 6 1 0 0 0 268 0 0 0 100 3 0 0 0 29 3 6 0 0 0 0 6 0 0 0 100 4 0 0 7 325 103 98 0 0 1 0 321 0 0 0 100 5 21 0 7 30 4 8 0 0 0 0 266 0 0 0 100 6 0 0 7 29 2 36 0 0 0 0 1050 0 0 0 100 7 0 0 0 153 60 130 0 1 0 0 605 0 0 0 100 April 27, 2026 at 06:28:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 104 0 0 0 0 1 0 0 0 100 1 0 0 0 17 3 12 0 2 0 0 0 0 0 0 100 2 0 0 14 10 2 4 0 0 0 0 266 0 0 0 100 3 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 4 0 0 7 215 103 4 0 0 0 0 269 0 0 0 100 5 0 0 7 12 2 8 0 2 1 0 260 0 0 0 100 6 0 0 0 18 2 40 1 1 1 0 1047 0 0 0 100 7 0 0 0 134 59 126 1 0 0 0 600 0 0 0 100 April 27, 2026 at 06:28:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 77 2317 200 653 11 59 14 0 3206 2 1 0 98 1 15 0 0 344 3 545 4 38 9 0 2804 2 0 0 98 2 2 0 14 233 4 415 13 36 9 0 3582 2 0 0 98 3 6 0 0 293 3 552 12 38 13 0 2549 1 0 0 98 4 0 0 7 511 103 588 11 32 5 0 2609 1 0 0 99 5 2 0 7 263 9 473 6 23 8 0 2559 1 0 0 98 6 4 0 0 208 2 406 5 20 3 0 4573 1 1 0 98 7 3 0 0 308 40 507 5 21 5 0 4442 1 0 0 99 April 27, 2026 at 06:28:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 105 2321 203 681 22 67 11 0 4378 2 1 0 98 1 2 0 0 264 2 463 10 41 7 0 2738 1 0 0 99 2 24 0 14 219 4 448 6 40 11 0 3457 2 0 0 98 3 3 0 0 275 4 489 9 33 3 0 2280 1 0 0 98 4 8 0 7 469 105 577 9 34 4 0 2038 1 0 0 98 5 12 0 7 182 9 485 13 34 10 0 3220 1 0 0 98 6 8 0 0 132 47 575 12 25 8 0 3998 1 1 0 98 7 6 0 0 34 3 320 7 28 3 0 2894 1 0 0 99 April 27, 2026 at 06:28:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 9 2326 201 319 0 34 306 9 436 0 1 0 99 1 37 0 0 123 1 206 0 22 239 13 134 0 0 0 100 2 6 0 14 142 4 216 2 21 198 1 329 0 0 0 100 3 4 0 0 152 41 213 0 28 246 2 40 0 0 0 100 4 5 0 7 328 144 181 0 15 239 4 59 0 0 0 100 5 3242 0 127 122 9 227 3 23 233 9 1539 1 1 0 97 6 120 0 0 151 13 280 2 33 188 12 1196 0 1 0 99 7 53 0 0 221 43 331 1 32 211 16 745 0 0 0 99 April 27, 2026 at 06:28:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 46 0 4 0 0 294 0 0 0 100 1 0 0 0 9 1 4 0 0 0 0 3 0 0 0 100 2 0 0 14 24 4 20 1 1 0 0 278 0 0 0 100 3 0 0 0 14 4 8 0 0 0 0 1 0 0 0 100 4 0 0 7 217 103 8 0 0 0 0 9 0 0 0 100 5 0 0 7 35 12 30 1 1 1 0 311 0 0 0 100 6 0 0 0 73 33 96 0 1 0 0 1133 0 0 0 100 7 0 0 0 112 21 106 0 4 0 0 589 0 0 0 100 April 27, 2026 at 06:28:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 108 1 3 1 0 294 0 0 0 100 1 0 0 0 12 2 4 0 1 1 0 0 0 0 0 100 2 0 0 14 22 4 16 0 1 1 0 278 0 0 0 100 3 0 0 0 12 3 4 0 0 1 0 0 0 0 0 100 4 0 0 7 216 104 8 0 0 1 0 4 0 0 0 100 5 0 0 7 21 7 15 0 2 0 0 266 0 0 0 100 6 0 0 0 16 4 36 1 0 1 0 1131 0 0 0 100 7 0 0 0 115 52 104 2 0 1 0 605 0 0 0 100 April 27, 2026 at 06:28:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2316 205 126 0 2 2 0 302 0 0 0 100 1 0 0 0 109 51 104 0 2 0 0 1 0 0 0 100 2 0 0 14 17 2 14 0 0 0 0 276 0 0 0 100 3 0 0 0 15 2 14 0 0 0 0 12 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 7 29 13 20 0 0 3 0 603 0 0 0 100 6 0 0 0 13 2 38 1 0 0 0 1136 0 0 0 100 7 0 0 0 28 4 28 0 1 2 0 532 0 0 0 100 April 27, 2026 at 06:28:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 127 0 49 2318 206 452 7 33 11 1 1780 1 1 0 99 1 195 0 0 159 51 297 3 17 2 3 1525 1 0 0 99 2 301 0 14 85 3 184 5 18 4 2 1829 1 0 0 99 3 75 0 0 78 2 218 4 22 5 2 1659 0 0 0 99 4 103 0 7 276 102 211 4 20 0 1 1917 1 0 0 99 5 53 0 7 81 2 194 7 26 5 1 1666 1 0 0 99 6 0 0 0 54 2 168 6 18 2 0 2486 1 0 0 99 7 217 0 0 64 2 203 4 23 11 1 1912 1 0 0 99 April 27, 2026 at 06:28:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2327 210 235 1 8 146 0 316 0 1 0 99 1 0 0 0 172 50 228 0 10 106 0 19 0 0 0 100 2 5 0 14 88 4 152 0 12 142 0 275 0 0 0 100 3 18 0 0 120 36 170 1 14 98 0 18 0 0 0 100 4 0 0 7 306 137 114 0 9 109 0 15 0 0 0 100 5 0 0 7 62 2 116 0 10 123 0 261 0 0 0 100 6 0 0 0 89 2 195 1 14 130 0 1136 0 0 0 99 7 0 0 0 80 3 138 1 9 115 0 706 0 0 0 100 April 27, 2026 at 06:28:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2328 212 32 1 1 1 0 307 0 0 0 100 1 0 0 0 12 1 10 0 1 0 0 0 0 0 0 100 2 0 0 14 114 24 108 0 7 0 0 268 0 0 0 100 3 0 0 0 100 25 90 0 7 0 0 0 0 0 0 100 4 0 0 7 225 108 20 0 1 0 0 3 0 0 0 100 5 0 0 7 16 3 11 0 1 0 0 261 0 0 0 100 6 0 0 0 11 2 34 1 0 0 0 1137 0 0 0 100 7 0 0 0 13 3 6 1 0 0 0 615 0 0 0 100 April 27, 2026 at 06:28:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2316 204 141 0 3 17 0 331 0 1 0 99 1 0 0 0 19 1 17 0 6 11 0 3 0 0 0 100 2 0 0 14 29 2 33 0 5 8 0 288 0 0 0 100 3 0 0 0 36 9 37 0 1 4 0 162 0 0 0 100 4 0 0 14 317 151 110 0 2 4 0 14 0 0 0 100 5 1 0 7 18 2 17 0 5 14 0 276 0 0 0 100 6 0 0 0 23 2 45 2 1 4 0 1063 0 0 0 100 7 0 0 9 22 2 16 1 4 13 0 614 0 1 0 99 April 27, 2026 at 06:28:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2302 201 113 0 2 4 0 293 0 0 0 99 1 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 19 3 14 1 0 0 0 268 0 0 0 100 3 1 0 0 28 8 28 0 1 0 0 21 0 0 0 100 4 0 0 14 312 151 102 0 0 0 0 1 0 0 0 100 5 0 0 7 24 9 18 0 1 0 0 280 0 0 0 100 6 0 0 0 11 2 34 0 0 0 0 1047 0 0 0 100 7 0 0 0 28 4 24 0 2 3 0 647 0 0 0 100 April 27, 2026 at 06:28:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2308 201 109 0 2 0 0 294 0 1 0 99 1 0 0 0 25 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 29 2 8 0 1 0 0 266 0 0 0 100 3 0 0 0 52 8 36 0 4 0 0 6 0 0 0 100 4 0 0 7 234 104 8 0 0 0 0 5 0 0 0 100 5 0 0 7 127 53 106 0 0 0 0 261 0 0 0 100 6 0 0 0 28 2 34 1 0 0 0 1048 0 0 0 100 7 0 0 0 27 2 4 0 0 0 0 610 0 0 0 100 April 27, 2026 at 06:28:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2312 201 152 1 12 88 0 294 0 1 0 99 1 0 0 0 62 1 101 0 11 47 0 3 0 0 0 100 2 0 0 14 63 4 107 0 6 58 0 268 0 0 0 100 3 0 0 0 219 62 250 0 12 51 0 13 0 0 0 100 4 0 0 7 287 132 99 0 11 73 0 0 0 0 0 100 5 0 0 7 120 30 153 0 8 47 0 260 0 0 0 100 6 0 0 0 68 2 149 1 8 73 0 1047 0 0 0 100 7 0 0 0 74 5 126 1 11 59 0 601 0 0 0 100 April 27, 2026 at 06:28:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 161 2321 202 1271 20 110 19 0 7719 3 1 0 96 1 6 0 0 653 1 1226 16 73 5 0 4774 3 1 0 97 2 5 0 14 502 5 953 8 68 6 0 6470 2 1 0 97 3 2 0 0 463 9 874 15 61 18 0 6019 3 1 0 97 4 4 0 7 341 117 1098 8 65 19 0 5901 3 1 0 97 5 5 0 7 430 37 923 8 46 13 0 6645 3 1 0 97 6 5 0 0 460 7 986 7 40 8 0 5709 2 1 0 97 7 3 0 0 123 3 938 9 39 9 0 6893 3 1 0 97 April 27, 2026 at 06:28:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 105 0 1 1 0 294 0 0 0 99 1 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 2 0 0 14 16 5 10 1 0 1 0 278 0 0 0 100 3 0 0 0 18 2 10 0 0 1 0 0 0 0 0 100 4 0 0 7 219 102 12 0 1 1 0 0 0 0 0 100 5 0 0 7 109 52 104 0 0 1 0 260 0 0 0 100 6 1 0 0 28 8 49 1 2 0 0 1054 0 0 0 100 7 0 0 0 12 3 4 0 0 1 0 609 0 0 0 100 April 27, 2026 at 06:28:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 106 0 1 0 0 294 0 0 0 100 1 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 2 0 0 14 11 3 8 0 0 0 0 276 0 0 0 100 3 0 0 0 24 2 24 0 0 0 0 12 0 0 0 100 4 0 0 7 223 104 16 0 0 0 0 5 0 0 0 100 5 0 0 7 121 59 114 0 0 1 0 281 0 0 0 100 6 0 0 0 24 6 46 1 1 1 0 1051 0 0 0 100 7 0 0 0 20 3 22 0 1 1 0 592 0 0 0 100 April 27, 2026 at 06:28:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 104 1 1 0 0 294 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 13 4 12 0 1 0 0 278 0 0 0 100 3 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 4 0 0 7 213 102 4 0 0 0 0 0 0 0 0 100 5 0 0 7 109 52 104 0 0 0 0 260 0 0 0 100 6 0 0 0 22 7 44 1 0 0 0 1053 0 0 0 100 7 0 0 0 16 3 8 1 1 0 0 604 0 0 0 100 April 27, 2026 at 06:28:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2326 208 310 0 33 264 0 306 0 1 0 99 1 0 0 0 88 1 169 0 23 209 0 0 0 0 0 100 2 0 0 14 95 3 191 0 25 227 0 279 0 0 0 100 3 0 0 0 144 44 213 0 23 226 0 5 0 0 0 100 4 0 0 7 326 148 164 0 23 255 0 5 0 0 0 100 5 0 0 7 119 14 204 0 20 193 0 260 0 0 0 100 6 0 0 0 171 43 308 2 29 222 0 1391 0 1 0 99 7 0 0 0 76 2 143 1 21 189 0 548 0 0 0 100 April 27, 2026 at 06:28:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2320 208 118 0 1 0 0 305 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 14 4 10 1 0 0 0 278 0 0 0 100 3 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 7 113 53 108 0 0 0 0 261 0 0 0 100 6 0 0 0 12 2 38 0 1 1 0 1047 0 0 0 100 7 0 0 0 15 2 10 0 1 2 0 611 0 0 0 100 April 27, 2026 at 06:28:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2320 208 114 0 1 0 0 308 0 0 0 100 1 0 0 0 12 1 8 0 2 0 0 0 0 0 0 100 2 0 0 14 13 3 12 0 0 0 0 301 0 0 0 100 3 0 0 0 16 1 12 0 1 0 0 0 0 0 0 100 4 0 0 7 218 105 8 0 0 0 0 3 0 0 0 100 5 0 0 7 109 52 104 0 0 0 0 260 0 0 0 100 6 0 0 0 13 2 36 1 0 0 0 1049 0 0 0 100 7 0 0 0 12 2 6 0 1 2 0 578 0 0 0 100 April 27, 2026 at 06:28:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2316 206 64 1 1 0 0 300 0 0 0 100 1 0 0 0 109 26 102 0 2 0 0 0 0 0 0 100 2 0 0 14 13 4 10 0 0 0 0 278 0 0 0 100 3 0 0 0 25 2 26 0 2 0 0 13 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 7 71 32 64 0 1 1 0 274 0 0 0 100 6 0 0 0 12 2 38 0 1 0 0 1048 0 0 0 100 7 0 0 0 23 4 22 1 1 0 0 619 0 0 0 100 April 27, 2026 at 06:28:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 731 0 124 2313 204 84 0 6 10 11 818 0 1 0 99 1 708 0 0 150 1 161 1 9 8 12 999 1 0 0 99 2 25 0 16 43 3 59 0 11 10 7 415 0 0 0 100 3 11 0 0 158 52 160 0 8 4 5 90 0 0 0 100 4 57 0 7 246 105 36 0 5 2 4 100 0 0 0 100 5 1935 0 7 45 4 202 2 3 2 7 927 0 1 0 99 6 7 0 0 36 3 60 1 2 4 2 1189 0 0 0 100 7 7 0 0 55 7 54 2 4 3 3 740 0 0 0 100 April 27, 2026 at 06:28:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 60 0 0 2 0 297 0 0 0 100 1 0 0 0 52 1 44 0 0 0 0 0 0 0 0 100 2 0 0 14 17 5 16 1 0 1 0 281 0 0 0 100 3 0 0 0 69 24 66 0 2 0 0 0 0 0 0 100 4 0 0 7 271 130 65 0 2 0 0 4 0 0 0 100 5 0 0 7 10 2 8 0 1 0 0 260 0 0 0 100 6 0 0 0 12 2 36 1 0 0 0 1130 0 0 0 100 7 0 0 0 27 8 22 0 1 1 0 609 0 0 0 100 April 27, 2026 at 06:29:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 7 2308 202 122 0 3 0 0 302 0 0 0 100 1 19 0 0 10 2 4 0 0 0 0 5 0 0 0 100 2 0 0 14 15 5 12 0 0 0 0 278 0 0 0 100 3 0 0 0 24 3 20 0 1 0 0 1 0 0 0 100 4 0 0 7 309 151 102 0 0 0 0 0 0 0 0 100 5 0 0 7 11 3 6 0 0 0 0 281 0 0 0 100 6 0 0 0 13 3 38 1 1 1 0 1125 0 0 0 100 7 0 0 0 28 9 20 0 0 2 0 603 0 0 0 100 April 27, 2026 at 06:29:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 94 1 1 1 0 294 0 0 0 100 1 0 0 0 11 2 4 0 1 1 0 0 0 0 0 100 2 0 0 14 15 5 10 0 0 1 0 278 0 0 0 100 3 0 0 0 36 5 26 0 2 1 0 0 0 0 0 100 4 0 0 7 309 148 100 0 2 1 0 0 0 0 0 100 5 0 0 7 13 4 6 0 0 1 0 261 0 0 0 100 6 0 0 0 17 4 39 0 1 0 0 1127 0 0 0 100 7 0 0 0 21 7 12 1 0 1 0 619 0 0 0 100 April 27, 2026 at 06:29:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2318 206 125 1 2 0 0 303 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 11 3 8 0 0 0 0 276 0 0 0 100 3 1 0 0 25 1 26 0 1 0 0 16 0 0 0 100 4 0 0 7 310 151 104 0 1 0 0 0 0 0 0 100 5 0 0 7 32 12 24 0 2 1 0 279 0 0 0 100 6 0 0 0 13 2 38 1 1 0 0 1135 0 0 0 100 7 0 0 0 21 5 16 1 1 0 0 877 0 0 0 100 April 27, 2026 at 06:29:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2312 205 110 0 1 1 0 299 0 0 0 99 1 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 2 0 0 14 17 4 15 1 3 0 0 278 0 0 0 100 3 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 4 0 0 7 310 151 104 0 1 0 0 0 0 0 0 100 5 0 0 7 12 2 6 0 1 0 0 260 0 0 0 100 6 0 0 0 11 2 34 1 0 0 0 1125 0 0 0 100 7 0 0 0 11 2 4 1 0 1 0 628 0 0 0 100 April 27, 2026 at 06:29:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2322 208 118 0 2 2 0 304 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 22 4 22 0 3 2 0 279 0 0 0 100 3 0 0 0 20 1 18 0 1 0 0 0 0 0 0 100 4 0 0 7 217 103 4 0 0 0 0 1 0 0 0 100 5 0 0 7 110 52 106 0 0 0 0 260 0 0 0 100 6 0 0 0 12 2 36 1 0 2 0 1124 0 0 0 100 7 0 0 0 10 2 4 0 0 0 0 625 0 0 0 100 April 27, 2026 at 06:29:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2320 209 42 2 1 0 0 305 0 0 0 100 1 0 0 0 9 1 4 0 1 0 0 3 0 0 0 100 2 0 0 14 120 17 116 0 4 0 0 278 0 0 0 100 3 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 7 92 42 84 0 2 0 0 262 0 0 0 100 6 0 0 0 14 3 40 0 2 0 0 1125 0 0 0 100 7 0 0 0 11 2 4 1 0 0 0 590 0 0 0 100 April 27, 2026 at 06:29:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 63 2315 204 322 1 23 3 0 1855 0 1 0 99 1 3 0 0 33 1 56 4 10 1 0 610 1 0 0 99 2 519 0 16 106 3 199 10 21 3 1 2451 1 0 0 98 3 132 0 0 91 2 202 4 21 5 1 1721 0 0 0 99 4 0 0 7 285 107 196 4 17 3 0 1539 0 0 0 99 5 135 0 7 49 4 113 0 6 2 1 1598 1 0 0 99 6 25 0 0 76 7 156 3 14 3 0 2186 1 0 0 98 7 3 0 0 172 47 286 7 20 6 0 2375 1 0 0 99 April 27, 2026 at 06:29:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 108 0 2 0 0 294 0 0 0 100 1 0 0 0 105 49 100 0 1 0 0 0 0 0 0 100 2 0 0 14 21 3 14 1 0 0 0 268 0 0 0 100 3 0 0 0 23 3 24 1 2 0 0 12 0 0 0 100 4 0 0 7 213 102 4 0 0 0 0 0 0 0 0 100 5 0 0 7 40 16 32 1 1 0 0 279 0 0 0 100 6 1 0 0 17 2 48 1 2 0 0 1158 0 0 0 100 7 0 0 0 15 3 6 0 0 0 0 577 0 0 0 100 April 27, 2026 at 06:29:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2303 201 14 0 1 0 0 295 0 0 0 100 1 0 0 0 103 18 96 0 2 0 0 0 0 0 0 100 2 0 0 14 16 2 12 0 0 0 0 266 0 0 0 100 3 0 0 0 110 35 104 0 1 0 0 0 0 0 0 100 4 0 0 1 216 104 6 0 0 0 0 3 0 0 0 100 5 0 0 7 22 9 18 0 0 0 0 270 0 0 0 100 6 0 0 0 13 2 40 0 3 1 0 1136 0 0 0 100 7 0 0 0 9 2 4 0 0 0 0 565 0 0 0 100 April 27, 2026 at 06:29:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 201 227 2 14 163 0 294 0 1 0 99 1 0 0 0 69 1 121 0 10 110 0 0 0 0 0 100 2 0 0 14 90 4 161 0 11 116 0 271 0 0 0 100 3 0 0 0 139 46 172 0 13 168 0 0 0 0 0 100 4 0 0 7 398 178 237 0 17 148 0 0 0 0 0 100 5 0 0 7 91 12 153 1 13 133 0 277 0 0 0 100 6 0 0 0 82 2 178 2 16 137 0 1137 0 0 0 99 7 0 0 0 84 3 153 1 12 137 0 615 0 0 0 100 April 27, 2026 at 06:29:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2314 202 42 0 11 16 0 393 0 0 0 99 1 0 0 7 26 2 25 0 7 3 0 16 0 0 0 100 2 0 0 14 28 3 31 0 5 6 0 293 0 0 0 100 3 0 0 0 140 59 138 0 2 8 1 91 0 0 0 100 4 0 0 14 316 103 104 0 2 1 0 9 0 0 0 100 5 0 0 16 31 6 32 0 5 13 0 294 0 1 0 99 6 0 0 0 30 4 53 3 4 10 0 1089 0 0 0 100 7 0 0 0 28 4 27 3 2 7 0 586 0 0 0 100 April 27, 2026 at 06:29:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 201 20 0 2 0 0 294 0 0 0 100 1 0 0 0 18 3 6 0 1 1 0 0 0 0 0 100 2 0 0 21 114 5 108 1 3 1 0 268 0 0 0 100 3 0 0 0 121 55 114 0 3 1 0 9 0 0 0 100 4 0 0 7 213 102 2 0 0 1 0 0 0 0 0 100 5 0 0 7 12 3 4 0 0 1 0 260 0 0 0 100 6 0 0 0 17 4 36 1 0 1 0 1049 0 0 0 100 7 0 0 0 13 3 4 0 0 2 0 640 0 0 0 100 April 27, 2026 at 06:29:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2308 202 123 0 0 2 0 295 0 1 0 99 1 0 0 0 25 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 38 5 16 0 0 0 0 272 0 0 0 100 3 0 0 0 143 58 126 2 0 0 0 21 0 0 0 100 4 0 0 7 227 102 2 0 0 0 0 0 0 0 0 100 5 0 0 7 44 12 18 0 0 0 0 270 0 0 0 100 6 0 0 0 33 2 46 1 1 0 0 1069 0 0 0 100 7 0 0 0 35 2 16 0 1 0 0 579 0 0 0 100 April 27, 2026 at 06:29:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 112 1 1 1 0 294 0 0 0 99 1 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 11 3 8 0 1 0 0 268 0 0 0 100 3 0 0 0 125 59 118 0 0 0 0 10 0 0 0 100 4 0 0 7 212 102 2 0 0 0 0 0 0 0 0 100 5 0 0 7 12 3 6 0 0 0 0 261 0 0 0 100 6 0 0 0 17 2 38 1 1 0 0 1048 0 0 0 100 7 0 0 0 18 2 12 1 0 0 0 596 0 0 0 100 April 27, 2026 at 06:29:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 13 0 161 2341 202 1125 25 117 11 0 7275 3 1 0 96 1 4 0 0 159 2 927 19 87 11 0 6682 3 1 0 96 2 10 0 14 253 34 1133 26 81 11 0 4968 3 1 0 96 3 0 0 0 494 17 866 10 51 5 0 5525 3 1 0 97 4 0 0 7 395 105 1004 21 65 4 0 5173 2 1 0 97 5 0 0 7 359 3 763 13 40 12 0 5547 2 1 0 97 6 0 0 0 147 7 926 6 48 5 0 5517 2 1 0 97 7 1 0 0 262 10 594 8 25 8 0 6995 2 1 0 98 April 27, 2026 at 06:29:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2301 201 114 0 1 0 0 293 0 0 0 99 1 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 2 0 0 14 12 3 10 0 1 0 0 278 0 0 0 100 3 0 0 0 111 52 106 0 0 0 0 3 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 7 11 3 6 0 0 0 0 260 0 0 0 100 6 0 0 0 24 8 48 1 0 1 0 1059 0 0 0 100 7 0 0 0 17 2 10 0 1 1 0 614 0 0 0 100 April 27, 2026 at 06:29:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 644 0 7 2329 202 68 1 7 10 4 1221 1 1 0 98 1 9 0 0 37 2 28 0 5 4 3 75 0 0 0 100 2 3 0 14 47 5 33 3 1 2 1 337 0 0 0 100 3 2621 0 116 136 27 159 2 9 10 12 430 0 1 0 99 4 148 0 7 330 127 149 0 13 13 13 146 0 0 0 100 5 24 0 9 37 2 44 0 9 13 7 418 0 0 0 100 6 21 0 0 49 5 78 1 4 4 2 1240 0 0 0 100 7 8 0 0 43 2 43 0 9 7 2 687 0 0 0 100 April 27, 2026 at 06:29:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 118 1 0 0 0 297 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 17 5 14 0 0 0 0 282 0 0 0 100 3 0 0 0 15 2 16 0 1 0 0 11 0 0 0 100 4 0 0 7 309 151 102 0 0 0 0 0 0 0 0 100 5 0 0 7 28 11 18 0 1 0 0 269 0 0 0 100 6 2 0 0 26 7 52 2 0 0 0 1155 0 0 0 100 7 0 0 0 14 2 6 1 0 2 0 591 0 0 0 100 April 27, 2026 at 06:29:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 114 0 2 0 0 294 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 14 15 2 14 0 0 0 0 276 0 0 0 100 3 0 0 0 20 6 16 0 0 0 0 7 0 0 0 100 4 0 0 7 309 151 102 0 0 0 0 0 0 0 0 100 5 0 0 7 14 3 10 0 0 0 0 265 0 0 0 100 6 0 0 0 17 5 40 0 0 0 0 1455 0 0 0 100 7 0 0 0 12 2 6 0 1 0 0 598 0 0 0 100 April 27, 2026 at 06:29:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 201 296 0 26 331 0 297 0 1 0 99 1 0 0 0 92 2 172 0 17 208 0 1 0 0 0 100 2 0 0 14 97 3 188 0 23 239 0 278 0 0 0 100 3 0 0 0 166 55 225 0 25 242 0 10 0 0 0 100 4 0 0 7 442 196 282 0 23 222 0 0 0 0 0 100 5 0 0 7 92 3 179 0 20 249 0 260 0 0 0 100 6 0 0 0 109 2 249 1 23 221 0 1130 0 1 0 99 7 0 0 0 114 2 215 1 18 227 0 629 0 0 0 100 April 27, 2026 at 06:29:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 346 0 77 2310 202 271 6 27 10 1 1674 0 1 0 99 1 82 0 0 60 1 159 8 24 5 0 1347 0 0 0 99 2 149 0 14 75 3 215 5 19 0 0 2295 1 0 0 98 3 0 0 0 52 5 145 2 17 1 0 1136 1 0 0 99 4 51 0 7 364 151 256 6 21 11 0 1323 1 0 0 99 5 30 0 7 60 5 132 7 17 2 0 1118 2 0 0 98 6 166 0 0 109 9 310 4 24 12 0 2851 1 0 0 99 7 324 0 0 55 3 127 3 12 3 3 2131 1 0 0 98 April 27, 2026 at 06:29:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 118 1 2 0 0 294 0 0 0 100 1 0 0 0 13 2 2 0 0 1 0 0 0 0 0 100 2 0 0 14 18 4 14 0 0 1 0 268 0 0 0 100 3 0 0 0 14 3 4 0 0 1 0 0 0 0 0 100 4 0 0 7 309 151 102 0 0 1 0 0 0 0 0 100 5 0 0 7 25 10 18 0 0 1 0 270 0 0 0 100 6 0 0 0 15 4 36 1 0 1 0 1138 0 0 0 100 7 0 0 0 14 3 4 1 0 2 0 605 0 0 0 100 April 27, 2026 at 06:29:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2306 202 142 1 5 22 0 380 0 1 0 99 1 0 0 7 25 3 23 0 5 9 0 6 0 0 0 100 2 1 0 14 26 2 25 0 2 5 0 299 0 0 0 100 3 0 0 0 27 2 27 1 3 10 0 28 0 0 0 100 4 0 0 7 325 152 123 0 4 5 0 19 0 0 0 100 5 0 0 7 55 19 52 0 4 14 0 319 0 0 0 100 6 0 0 0 31 3 63 2 4 7 0 1089 0 0 0 100 7 0 0 9 23 2 24 1 4 12 0 638 0 1 0 99 April 27, 2026 at 06:29:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 201 23 0 3 1 0 294 0 0 0 100 1 0 0 0 12 1 4 0 1 0 0 0 0 0 0 100 2 0 0 21 11 3 8 0 1 0 0 268 0 0 0 100 3 0 0 0 16 2 4 0 0 1 0 0 0 0 0 100 4 0 0 7 307 102 98 0 2 0 0 0 0 0 0 100 5 0 0 7 96 45 88 0 0 0 0 269 0 0 0 100 6 0 0 0 15 3 38 0 1 0 0 1047 0 0 0 100 7 0 0 0 36 14 30 0 1 0 0 618 0 0 0 100 April 27, 2026 at 06:29:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2314 201 328 0 28 252 0 294 0 1 0 99 1 0 0 0 129 2 218 0 19 171 0 0 0 0 0 100 2 0 0 14 131 5 209 1 18 183 0 269 0 0 0 100 3 0 0 0 163 66 183 0 22 150 0 0 0 0 0 100 4 0 0 7 391 169 221 0 18 161 0 0 0 0 0 100 5 0 0 7 116 8 178 0 20 139 0 270 0 0 0 100 6 0 0 0 113 2 243 1 18 171 0 1047 0 1 0 99 7 0 0 0 202 52 311 0 22 163 0 586 0 0 0 100 April 27, 2026 at 06:29:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 116 1 2 2 0 294 0 0 0 99 1 0 0 0 103 47 94 0 1 0 0 0 0 0 0 100 2 0 0 14 21 5 20 0 1 0 0 268 0 0 0 100 3 0 0 0 10 1 4 0 0 0 0 3 0 0 0 100 4 0 0 7 214 103 4 0 0 0 0 0 0 0 0 100 5 0 0 7 36 14 30 0 0 0 0 277 0 0 0 100 6 0 0 0 15 2 38 0 1 0 0 1047 0 0 0 100 7 0 0 0 15 3 6 1 0 0 0 574 0 0 0 100 April 27, 2026 at 06:29:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 175 2336 203 1163 27 111 40 0 7245 4 1 0 95 1 18 0 0 587 29 1020 19 73 18 0 6181 2 1 0 97 2 10 0 14 304 26 1122 19 89 16 0 7056 3 1 0 96 3 12 0 7 442 5 923 14 57 11 0 6204 2 1 0 97 4 1 0 7 667 105 881 11 43 11 0 6580 2 1 0 97 5 3 0 0 442 8 1105 16 59 24 0 5059 3 1 0 97 6 16 0 0 373 3 768 10 38 25 0 7774 3 1 0 96 7 4 0 0 420 3 1005 16 46 18 0 5829 2 1 0 97 April 27, 2026 at 06:29:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 201 122 0 2 0 0 294 0 0 0 100 1 0 0 0 105 49 100 0 2 0 0 0 0 0 0 100 2 0 0 14 25 7 22 0 0 0 0 304 0 0 0 100 3 0 0 7 18 3 20 0 0 0 0 290 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 24 8 14 0 1 1 0 9 0 0 0 100 6 0 0 0 16 2 44 1 0 0 0 1067 0 0 0 100 7 0 0 0 13 2 6 0 0 1 0 602 0 0 0 100 April 27, 2026 at 06:29:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 110 0 1 1 0 294 0 0 0 100 1 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 2 0 0 14 22 6 20 1 0 0 0 271 0 0 0 100 3 0 0 7 18 6 14 0 0 0 0 276 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 6 0 0 0 15 2 38 1 1 0 0 1048 0 0 0 100 7 0 0 0 10 2 6 0 0 3 0 600 0 0 0 100 April 27, 2026 at 06:29:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 327 1 23 272 0 294 0 1 0 99 1 0 0 0 199 51 284 0 17 218 0 0 0 0 0 100 2 1 0 14 93 8 179 0 20 233 0 273 0 0 0 100 3 0 0 7 118 53 196 0 18 248 0 270 0 0 0 100 4 0 0 7 333 153 228 0 25 212 0 0 0 0 0 100 5 0 0 0 108 1 215 0 22 210 0 1 0 0 0 100 6 0 0 0 88 2 275 1 22 277 0 1046 0 1 0 99 7 0 0 0 113 2 221 1 20 234 0 609 0 0 0 100 April 27, 2026 at 06:29:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 43 0 8 2327 203 159 0 9 8 4 408 0 0 0 99 1 6 0 0 139 53 132 0 4 5 2 53 0 0 0 100 2 4 0 14 50 8 42 0 2 0 2 634 0 0 0 100 3 4 0 7 41 6 33 0 3 1 3 324 0 0 0 100 4 3261 0 120 242 103 71 3 4 2 16 1262 1 1 0 98 5 133 0 0 54 2 80 0 10 11 16 150 0 0 0 100 6 19 0 0 57 7 95 1 9 7 9 1292 0 0 0 99 7 10 0 0 49 2 49 1 8 3 3 692 0 0 0 100 April 27, 2026 at 06:29:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2307 201 106 0 2 1 0 294 0 0 0 100 1 0 0 0 91 43 82 0 0 1 0 0 0 0 0 100 2 0 0 14 31 10 28 0 2 1 0 268 0 0 0 100 3 0 0 7 18 4 12 0 2 1 0 270 0 0 0 100 4 0 0 1 215 103 6 0 1 1 0 0 0 0 0 100 5 0 0 0 7 1 0 0 0 1 0 0 0 0 0 100 6 0 0 0 28 10 56 0 4 0 0 1136 0 0 0 100 7 0 0 0 12 3 4 0 0 2 0 631 0 0 0 100 April 27, 2026 at 06:29:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 180 0 69 2308 202 387 2 23 4 0 2028 0 1 0 99 1 101 0 0 70 2 252 2 30 3 1 1534 0 0 0 99 2 157 0 14 77 7 222 3 14 4 2 1774 1 0 0 99 3 121 0 7 86 3 304 3 24 2 1 2587 1 0 0 98 4 1 0 7 270 103 156 2 17 14 0 1362 1 0 0 98 5 280 0 0 158 39 393 1 26 5 1 1734 1 0 0 99 6 5 0 0 57 5 130 3 14 6 1 2141 1 0 0 99 7 276 0 0 124 18 255 1 30 5 0 2193 1 0 0 99 April 27, 2026 at 06:29:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 112 1 1 0 0 294 0 0 0 100 1 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 2 0 0 14 29 9 26 2 0 0 0 277 0 0 0 100 3 0 0 7 13 4 8 0 0 0 0 261 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 13 2 34 1 0 0 0 1136 0 0 0 100 7 0 0 0 16 2 8 1 1 1 0 575 0 0 0 100 April 27, 2026 at 06:29:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2316 201 326 0 14 223 0 383 0 1 0 99 1 0 0 0 194 52 297 0 14 145 0 75 0 0 0 100 2 0 0 21 109 7 207 0 12 147 0 298 0 0 0 100 3 0 0 7 175 62 225 0 20 202 0 306 0 0 0 100 4 0 0 7 376 169 228 0 14 131 0 8 0 0 0 100 5 0 0 0 108 0 201 0 12 134 0 20 0 0 0 100 6 0 0 8 141 3 284 1 19 135 0 1057 0 1 0 99 7 0 0 7 122 3 220 1 16 160 0 676 0 0 0 100 April 27, 2026 at 06:29:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 201 117 0 2 1 0 295 0 0 0 100 1 0 0 0 111 51 105 0 1 0 0 3 0 0 0 100 2 0 0 14 11 3 6 0 0 0 0 268 0 0 0 100 3 0 0 7 12 3 6 0 0 0 0 259 0 0 0 100 4 0 0 7 238 114 28 0 0 0 0 16 0 0 0 100 5 0 0 0 11 1 4 0 1 0 0 1 0 0 0 100 6 0 0 0 19 4 40 1 0 0 0 1052 0 0 0 100 7 0 0 0 13 2 6 0 0 2 0 619 0 0 0 100 April 27, 2026 at 06:29:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2308 202 119 0 2 0 0 295 0 0 0 100 1 0 0 0 127 51 106 0 1 0 0 0 0 0 0 100 2 0 0 14 24 2 4 0 0 0 0 266 0 0 0 100 3 0 0 7 29 3 8 0 0 0 0 260 0 0 0 100 4 0 0 7 242 109 18 0 1 0 0 9 0 0 0 100 5 0 0 0 28 0 4 0 2 0 0 0 0 0 0 100 6 0 0 0 31 4 40 1 1 0 0 1052 0 0 0 100 7 0 0 0 26 2 4 0 0 0 0 600 0 0 0 100 April 27, 2026 at 06:29:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 120 1 0 0 0 294 0 0 0 99 1 0 0 0 107 50 98 0 0 0 0 0 0 0 0 100 2 0 0 14 16 5 12 0 1 0 0 268 0 0 0 100 3 0 0 7 17 3 16 0 0 0 0 272 0 0 0 100 4 0 0 7 226 109 16 0 0 0 0 9 0 0 0 100 5 0 0 0 24 7 16 0 0 2 0 21 0 0 0 100 6 0 0 0 26 5 52 0 1 0 0 1058 0 0 0 100 7 0 0 0 15 2 6 1 0 0 0 569 0 0 0 100 April 27, 2026 at 06:29:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 11 0 175 2343 206 1356 34 137 38 0 6931 3 1 0 96 1 5 0 7 216 5 1109 25 117 29 0 6367 3 1 0 96 2 34 0 0 339 28 1244 20 83 26 0 6265 3 1 0 96 3 0 0 21 461 5 907 13 56 15 0 6494 2 1 0 97 4 37 0 7 470 112 976 17 64 17 0 5562 3 1 0 97 5 1 0 0 364 16 841 6 36 18 0 5681 2 1 0 97 6 19 0 0 336 7 975 12 46 31 0 5404 3 1 0 96 7 7 0 0 320 4 717 8 27 11 0 6757 2 1 0 98 April 27, 2026 at 06:29:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 201 319 0 24 356 0 294 0 1 0 99 1 0 0 0 113 5 210 1 23 247 0 5 0 0 0 100 2 0 0 0 88 2 175 0 23 234 0 2 0 0 0 100 3 0 0 21 132 48 180 1 17 250 0 537 0 0 0 100 4 0 0 7 345 148 201 0 19 208 0 0 0 0 0 100 5 0 0 0 176 48 258 0 24 209 0 0 0 0 0 100 6 0 0 0 105 4 252 1 16 303 0 1071 0 1 0 99 7 0 0 0 111 2 215 0 23 217 0 557 0 0 0 100 April 27, 2026 at 06:29:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 7 0 7 2327 202 141 0 7 10 2 365 0 0 0 99 1 675 0 113 40 12 43 0 7 3 1 97 0 0 0 99 2 2018 0 0 54 2 61 2 9 7 9 488 0 1 0 99 3 41 0 21 148 53 163 0 13 7 9 642 0 0 0 100 4 41 0 7 253 105 54 0 9 5 7 177 0 0 0 100 5 644 0 3 46 0 52 1 7 13 6 955 1 0 0 99 6 30 0 0 45 4 83 1 10 7 6 1208 0 0 0 100 7 43 0 0 45 4 48 0 9 9 3 704 0 0 0 100 April 27, 2026 at 06:29:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 145 1 5 5 0 525 0 0 0 100 1 0 0 0 98 45 88 0 1 1 0 6 0 0 0 100 2 0 0 0 29 11 24 0 1 1 0 2 0 0 0 100 3 0 0 21 12 4 8 0 0 1 0 537 0 0 0 100 4 0 0 7 215 104 6 0 0 1 0 0 0 0 0 100 5 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 6 0 0 0 18 4 10 1 3 1 0 892 0 0 0 100 7 0 0 0 17 5 6 1 0 2 0 560 0 0 0 100 April 27, 2026 at 06:29:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 150 0 1 1 0 1420 0 1 0 99 1 0 0 0 21 7 14 0 0 0 0 327 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 3 0 0 21 25 5 30 0 1 0 0 552 0 0 0 100 4 0 0 7 215 104 6 0 0 0 0 0 0 0 0 100 5 0 0 0 21 7 14 0 0 2 0 21 0 0 0 100 6 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 25 5 24 0 0 1 0 606 0 0 0 100 April 27, 2026 at 06:29:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 142 1 1 0 0 1415 0 1 0 99 1 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 106 50 100 0 1 0 0 2 0 0 0 100 3 0 0 21 19 7 13 1 0 0 0 530 0 0 0 100 4 0 0 7 216 104 8 0 1 0 0 10 0 0 0 100 5 0 0 0 7 0 2 0 1 0 0 0 0 0 0 100 6 0 0 0 11 1 4 0 0 1 0 0 0 0 0 100 7 0 0 0 17 4 12 1 3 0 0 604 0 0 0 100 April 27, 2026 at 06:29:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 117 0 61 2308 202 488 6 39 5 2 3133 1 1 0 98 1 1 0 0 155 23 410 3 30 0 0 1908 1 0 0 99 2 0 0 0 184 29 372 3 22 6 0 1748 1 0 0 99 3 162 0 21 78 8 254 6 25 3 1 2317 1 0 0 99 4 291 0 1 291 104 259 3 23 1 1 1777 1 0 0 99 5 27 0 0 79 1 268 5 31 1 0 1857 1 0 0 99 6 99 0 0 54 3 87 1 9 4 0 1231 1 0 0 99 7 237 0 0 73 5 196 5 21 3 2 2362 1 0 0 99 April 27, 2026 at 06:29:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 202 146 1 1 2 0 1422 0 1 0 99 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 2 0 0 0 100 3 0 0 21 35 14 30 0 0 0 0 542 0 0 0 100 4 0 0 7 216 104 8 0 0 0 0 3 0 0 0 100 5 0 0 0 16 1 12 0 1 0 0 4 0 0 0 100 6 0 0 0 9 1 4 0 0 0 0 0 0 0 0 100 7 0 0 0 13 2 4 1 0 0 0 535 0 0 0 100 April 27, 2026 at 06:29:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2316 203 178 1 7 17 2 1439 0 1 0 99 1 0 0 0 33 5 34 0 6 9 0 32 0 0 0 100 2 0 0 0 118 51 112 1 1 1 0 29 0 0 0 100 3 0 0 21 17 4 16 0 4 17 0 527 0 0 0 100 4 0 0 16 235 108 27 0 3 13 0 22 0 1 0 99 5 0 0 14 22 1 23 0 7 8 0 25 0 0 0 100 6 0 0 0 18 1 13 0 2 2 0 74 0 0 0 100 7 0 0 7 22 3 16 0 3 8 0 621 0 0 0 100 April 27, 2026 at 06:29:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 139 1 2 1 0 1332 0 1 0 99 1 0 0 7 28 8 20 0 2 0 0 9 0 0 0 100 2 0 0 0 22 5 11 0 1 0 0 2 0 0 0 100 3 0 0 21 111 50 114 0 2 0 0 539 0 0 0 100 4 0 0 7 223 104 12 0 3 0 0 0 0 0 0 100 5 0 0 0 23 8 12 0 1 0 0 21 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 26 4 23 1 2 0 0 647 0 0 0 100 April 27, 2026 at 06:29:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2308 202 139 0 2 0 0 1332 0 1 0 99 1 0 0 0 45 10 22 0 0 0 0 11 0 0 0 100 2 0 0 0 25 1 4 0 1 0 0 0 0 0 0 100 3 0 0 21 126 52 106 1 1 0 0 525 0 0 0 100 4 0 0 7 237 103 12 0 0 0 0 0 0 0 0 100 5 0 0 0 31 1 10 0 0 0 0 1 0 0 0 100 6 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 31 3 10 0 2 1 0 629 0 0 0 100 April 27, 2026 at 06:29:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2313 202 290 2 24 203 0 1332 0 1 0 99 1 0 0 0 171 47 240 0 15 131 0 10 0 0 0 100 2 0 0 0 87 9 146 0 15 145 0 2 0 0 0 100 3 0 0 21 109 42 123 0 12 144 0 526 0 0 0 100 4 0 0 7 313 142 138 0 10 83 0 0 0 0 0 100 5 0 0 0 85 0 165 0 11 121 0 0 0 0 0 100 6 0 0 0 89 2 166 0 17 140 0 0 0 0 0 100 7 0 0 0 87 5 150 1 22 168 0 626 0 0 0 100 April 27, 2026 at 06:29:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 10 0 161 2343 205 1064 33 108 17 0 7851 3 1 0 95 1 8 0 0 220 48 1122 16 97 19 0 5997 3 1 0 96 2 2 0 0 144 7 845 14 79 18 1 6406 3 1 0 97 3 0 0 21 486 14 974 15 70 17 0 5391 2 1 0 97 4 1 0 7 651 107 931 10 58 24 0 4835 2 1 0 97 5 0 0 0 350 6 761 14 46 8 0 5229 2 1 0 97 6 4 0 0 289 6 929 13 45 12 0 4705 2 1 0 97 7 6 0 0 499 5 931 9 44 21 0 5749 2 1 0 97 April 27, 2026 at 06:29:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 53 1 4 1 0 1332 0 1 0 99 1 0 0 0 107 3 98 0 0 1 0 0 0 0 0 100 2 0 0 0 13 3 6 0 0 1 0 12 0 0 0 100 3 0 0 21 13 4 8 0 0 1 0 526 0 0 0 100 4 0 0 7 230 107 20 0 1 1 0 5 0 0 0 100 5 0 0 0 106 50 100 0 0 1 0 0 0 0 0 100 6 0 0 0 18 3 12 0 0 1 0 1 0 0 0 100 7 0 0 0 14 3 4 1 0 1 0 604 0 0 0 100 April 27, 2026 at 06:29:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 142 0 1 1 0 1342 0 1 0 99 1 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 10 0 0 0 100 3 0 0 21 18 6 16 1 0 0 0 530 0 0 0 100 4 0 0 7 227 106 18 0 0 0 0 4 0 0 0 100 5 0 0 0 117 56 112 0 0 1 0 13 0 0 0 100 6 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 29 5 34 0 4 0 0 602 0 0 0 100 April 27, 2026 at 06:29:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 108 2 1 0 0 1333 0 1 0 99 1 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 12 0 0 0 100 3 0 0 21 15 6 12 0 0 0 0 531 0 0 0 100 4 0 0 7 231 108 22 0 0 0 0 6 0 0 0 100 5 0 0 0 37 14 28 0 1 0 0 0 0 0 0 100 6 0 0 0 12 3 8 0 1 0 0 0 0 0 0 100 7 0 0 0 112 36 106 1 3 1 0 599 0 0 0 100 April 27, 2026 at 06:29:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 12 2313 203 317 1 24 290 0 1332 0 1 0 99 1 0 0 0 92 2 171 0 15 220 0 0 0 0 0 100 2 0 0 0 99 2 185 0 24 191 0 10 0 0 0 100 3 0 0 21 139 50 178 0 16 267 0 535 0 0 0 100 4 0 0 7 362 155 201 1 17 192 0 323 0 0 0 99 5 0 0 0 106 1 210 0 20 239 0 1 0 0 0 100 6 0 0 0 196 50 298 0 19 247 0 0 0 0 0 100 7 0 0 0 156 4 268 0 25 207 0 532 0 0 0 100 April 27, 2026 at 06:29:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 136 1 1 3 0 1332 0 1 0 99 1 0 0 0 12 2 6 0 1 0 0 0 0 0 0 100 2 0 0 0 16 5 8 0 0 0 0 2 0 0 0 100 3 0 0 21 106 50 104 1 1 0 0 529 0 0 0 100 4 0 0 7 221 103 12 0 0 0 0 0 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 4 0 0 0 100 6 0 0 0 11 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 32 9 24 2 2 1 0 609 0 0 0 100 April 27, 2026 at 06:29:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 51 0 2 2 0 1334 0 1 0 99 1 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 1 8 0 0 0 0 38 0 0 0 100 3 0 0 21 110 36 104 1 2 0 0 531 0 0 0 100 4 0 0 7 224 104 16 0 0 0 0 3 0 0 0 100 5 0 0 0 7 1 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 121 26 114 0 1 1 0 613 0 0 0 100 April 27, 2026 at 06:29:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 149 4 3 0 0 1347 0 1 0 99 1 0 0 0 12 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 12 2 8 0 1 0 0 12 0 0 0 100 3 0 0 21 13 4 10 0 0 0 0 528 0 0 0 100 4 0 0 7 229 107 20 0 0 0 0 5 0 0 0 100 5 0 0 0 20 8 12 0 1 0 0 21 0 0 0 100 6 0 0 0 12 1 10 0 1 0 0 4 0 0 0 100 7 0 0 0 116 52 110 1 2 0 0 633 0 0 0 100 April 27, 2026 at 06:29:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 28 0 7 2328 204 203 0 11 11 10 1563 0 1 0 99 1 4 0 0 93 28 86 0 7 2 3 65 0 0 0 100 2 6 0 0 48 5 40 0 7 0 3 74 0 0 0 100 3 25 0 21 89 24 93 0 5 2 6 626 0 0 0 100 4 3248 0 120 262 110 82 3 2 6 14 1601 1 1 0 98 5 103 0 0 53 1 68 0 11 17 14 160 0 0 0 100 6 31 0 1 43 2 55 0 8 12 7 100 0 0 0 100 7 65 0 0 60 6 65 0 10 5 6 696 0 0 0 100 April 27, 2026 at 06:29:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2319 207 154 1 1 0 0 1422 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 12 2 8 0 0 0 0 12 0 0 0 100 3 0 0 21 117 54 118 0 1 0 0 525 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 17 3 12 1 2 2 0 600 0 0 0 100 April 27, 2026 at 06:30:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2322 209 162 1 2 0 0 1422 0 1 0 99 1 19 0 0 27 10 20 0 1 0 0 6 0 0 0 100 2 0 0 0 91 42 86 0 1 0 0 1 0 0 0 100 3 0 0 21 17 4 12 1 0 0 0 531 0 0 0 100 4 0 0 7 214 103 6 0 1 0 0 0 0 0 0 100 5 0 0 0 7 0 2 0 0 0 0 3 0 0 0 100 6 2 0 0 12 3 6 0 0 0 0 6 0 0 0 100 7 0 0 0 20 6 12 0 1 2 0 624 0 0 0 100 April 27, 2026 at 06:30:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2316 207 155 1 1 1 0 1416 0 1 0 99 1 0 0 0 14 3 4 0 0 1 0 0 0 0 0 100 2 0 0 0 111 52 106 0 0 1 0 12 0 0 0 100 3 0 0 21 14 5 8 0 0 1 0 527 0 0 0 100 4 0 0 7 215 103 6 0 0 1 0 0 0 0 0 100 5 0 0 0 9 1 2 0 1 1 0 0 0 0 0 100 6 0 0 0 12 3 4 0 0 1 0 1 0 0 0 100 7 0 0 0 20 4 11 1 3 0 0 628 0 0 0 100 April 27, 2026 at 06:30:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2320 208 170 1 1 1 0 1748 0 1 0 99 1 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 105 49 101 0 2 0 0 10 0 0 0 100 3 0 0 21 20 5 20 0 0 0 0 534 0 0 0 100 4 0 0 7 218 105 10 0 0 0 0 3 0 0 0 100 5 0 0 0 15 6 8 0 0 1 0 12 0 0 0 100 6 0 0 0 23 5 20 0 1 0 0 15 0 0 0 100 7 0 0 0 16 2 8 0 1 1 0 610 0 0 0 100 April 27, 2026 at 06:30:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 202 142 0 1 1 0 1411 0 1 0 99 1 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 12 0 0 0 100 3 0 0 21 9 3 6 0 0 0 0 527 0 0 0 100 4 0 0 7 220 106 10 1 0 0 0 4 0 0 0 100 5 0 0 0 9 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 107 46 99 0 2 0 0 0 0 0 0 100 7 0 0 0 23 7 16 1 1 1 0 619 0 0 0 100 April 27, 2026 at 06:30:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 144 2 1 0 0 1410 0 1 0 99 1 0 0 0 11 2 6 0 0 0 0 0 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 10 0 0 0 100 3 0 0 21 13 3 12 1 0 1 0 526 0 0 0 100 4 0 0 7 223 108 14 0 0 0 0 6 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 15 3 10 0 1 0 0 0 0 0 0 100 7 0 0 0 112 50 107 0 4 1 0 619 0 0 0 100 April 27, 2026 at 06:30:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 142 1 2 0 0 1410 0 1 0 99 1 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 3 0 0 21 9 3 8 0 0 0 0 528 0 0 0 100 4 0 0 7 231 111 20 0 0 0 0 12 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 4 0 0 0 100 6 0 0 0 108 50 100 0 1 0 0 0 0 0 0 100 7 0 0 0 16 3 10 1 2 0 0 564 0 0 0 100 April 27, 2026 at 06:30:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 480 0 62 2318 207 417 1 20 9 1 2892 2 1 0 98 1 44 0 0 132 28 273 1 23 5 2 1401 0 0 0 99 2 155 0 0 139 24 260 2 14 2 1 1637 0 0 0 99 3 61 0 21 98 6 270 4 25 5 0 2223 0 0 0 99 4 4 0 7 284 108 177 4 18 0 0 1180 1 0 0 99 5 123 0 0 66 1 256 5 18 3 0 1774 1 0 0 98 6 172 0 0 48 1 68 0 4 1 2 1271 1 0 0 99 7 0 0 0 89 5 179 9 20 6 0 1791 1 0 0 99 April 27, 2026 at 06:30:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2316 206 164 1 2 1 0 1459 0 1 0 99 1 0 0 0 22 5 18 0 1 1 0 10 0 0 0 100 2 0 0 0 15 2 8 1 0 0 0 18 0 0 0 100 3 19 0 21 115 54 112 0 0 0 0 536 0 0 0 100 4 0 0 7 218 103 6 0 1 1 0 12 0 0 0 100 5 0 0 0 23 9 6 1 0 2 0 23 0 0 0 100 6 0 0 0 24 4 24 0 0 0 0 21 0 0 0 100 7 0 0 0 27 2 20 1 2 0 0 581 0 0 0 100 April 27, 2026 at 06:30:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 202 142 0 1 0 0 1423 0 1 0 99 1 0 0 0 20 7 14 0 0 0 0 8 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 21 109 53 106 1 0 0 0 525 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 4 0 1 0 0 1 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 15 2 8 0 1 0 0 584 0 0 0 100 April 27, 2026 at 06:30:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 8 2312 203 301 2 13 137 0 1421 0 1 0 99 1 0 0 0 88 7 150 0 12 116 0 8 0 0 0 100 2 0 0 0 70 2 130 0 10 121 0 2 0 0 0 100 3 0 0 21 205 92 228 0 12 184 0 527 0 0 0 100 4 0 0 7 314 140 153 0 13 126 0 0 0 0 0 100 5 0 0 0 73 0 136 0 12 122 0 0 0 0 0 100 6 0 0 0 69 1 132 0 11 139 0 0 0 0 0 100 7 0 0 0 90 2 163 1 12 118 0 582 0 0 0 100 April 27, 2026 at 06:30:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 203 160 1 4 10 0 1361 0 1 0 99 1 0 0 14 53 15 54 1 3 7 0 38 0 0 0 100 2 0 0 0 24 2 28 1 5 8 0 28 0 0 0 100 3 0 0 21 125 50 125 0 4 4 0 564 0 0 0 100 4 0 0 7 232 107 29 0 2 14 0 12 0 0 0 100 5 0 0 0 19 1 15 0 4 5 0 28 0 0 0 100 6 0 0 9 22 2 16 0 4 4 0 1 0 1 0 99 7 0 0 10 22 3 20 0 2 9 0 728 0 0 0 100 April 27, 2026 at 06:30:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2327 210 168 1 4 3 0 1344 0 1 0 99 1 0 0 0 22 5 8 1 0 1 0 3 0 0 0 100 2 0 0 0 13 3 4 0 0 1 0 2 0 0 0 100 3 0 0 21 15 5 10 0 0 1 0 529 0 0 0 100 4 0 0 7 312 151 104 0 2 1 0 0 0 0 0 100 5 0 0 0 11 1 0 0 0 1 0 0 0 0 0 100 6 0 0 0 16 4 6 0 0 1 0 2 0 0 0 100 7 0 0 0 18 3 9 1 2 2 0 606 0 0 0 100 April 27, 2026 at 06:30:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2318 208 167 0 1 3 0 1352 0 1 0 99 1 0 0 0 35 4 14 0 2 0 0 5 0 0 0 100 2 0 0 0 28 1 10 0 1 0 0 0 0 0 0 100 3 0 0 21 26 3 8 1 0 0 0 527 0 0 0 100 4 0 0 7 324 103 98 0 0 0 0 0 0 0 0 100 5 0 0 0 37 7 15 0 1 1 0 14 0 0 0 100 6 0 0 0 30 2 8 0 0 0 0 12 0 0 0 100 7 0 0 0 37 2 18 0 1 5 0 598 0 0 0 100 April 27, 2026 at 06:30:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 209 152 2 0 1 0 1341 0 1 0 99 1 0 0 0 111 52 102 0 0 0 0 1 0 0 0 100 2 0 0 0 20 3 18 0 2 0 0 2 0 0 0 100 3 0 0 21 10 3 6 0 0 0 0 525 0 0 0 100 4 0 0 7 214 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 13 1 6 0 2 0 0 0 0 0 0 100 7 0 0 0 20 2 12 1 0 0 0 605 0 0 0 100 April 27, 2026 at 06:30:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 158 2355 209 1220 36 133 15 0 7935 3 1 0 95 1 15 0 0 311 4 1079 29 108 11 0 5216 3 1 0 97 2 1 0 0 384 35 1275 24 103 8 0 5106 3 1 0 96 3 3 0 21 437 5 1171 21 74 21 0 4988 3 1 0 96 4 0 0 2 576 106 633 9 30 4 0 6485 2 1 0 97 5 0 0 0 127 1 935 14 53 10 0 5849 2 1 0 97 6 1 0 0 205 6 888 12 55 15 0 5596 2 1 0 97 7 3 0 0 138 8 683 8 43 13 0 6329 2 1 0 97 April 27, 2026 at 06:30:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 40 0 2 0 0 1332 0 1 0 99 1 0 0 0 28 10 20 0 0 0 0 11 0 0 0 100 2 0 0 0 16 3 8 1 0 0 0 12 0 0 0 100 3 0 0 21 15 4 14 0 1 0 0 527 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 6 0 0 0 110 19 104 0 2 0 0 3 0 0 0 100 7 0 0 0 119 34 112 0 2 1 0 511 0 0 0 100 April 27, 2026 at 06:30:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 30 0 7 2328 204 165 1 7 5 3 1526 0 1 0 99 1 5 0 0 47 9 28 0 4 2 0 68 0 0 0 100 2 2628 0 113 31 1 53 2 4 5 11 431 0 1 0 99 3 709 0 21 49 3 63 2 10 10 11 1510 1 0 0 99 4 31 0 9 250 103 54 0 9 7 8 113 0 0 0 100 5 62 0 0 42 2 51 0 10 9 5 97 0 0 0 100 6 26 0 0 52 2 56 0 6 4 6 115 0 0 0 100 7 8 0 0 146 50 129 1 7 6 0 646 0 0 0 100 April 27, 2026 at 06:30:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 150 1 2 3 0 1428 0 1 0 99 1 0 0 0 29 11 25 0 2 0 0 7 0 0 0 100 2 0 0 0 13 2 8 0 0 0 0 22 0 0 0 100 3 0 0 21 12 4 10 0 0 0 0 526 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 119 57 104 0 2 0 0 15 0 0 0 100 6 0 0 0 15 1 16 0 0 0 0 18 0 0 0 100 7 0 0 0 15 2 8 1 0 0 0 619 0 0 0 100 April 27, 2026 at 06:30:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 203 143 2 1 2 0 1415 0 1 0 99 1 0 0 0 125 58 120 0 1 0 0 329 0 0 0 100 2 0 0 0 11 1 8 0 1 0 0 15 0 0 0 100 3 0 0 21 9 3 6 0 0 0 0 526 0 0 0 100 4 0 0 7 217 104 10 0 0 0 0 3 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 6 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 18 3 16 0 2 0 0 607 0 0 0 100 April 27, 2026 at 06:30:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 203 298 1 21 307 0 1415 0 1 0 99 1 0 0 0 127 6 221 0 24 232 0 0 0 0 0 100 2 0 0 0 101 7 180 0 17 264 0 12 0 0 0 100 3 0 0 21 170 74 259 0 20 244 0 527 0 0 0 100 4 0 0 7 331 150 189 0 16 200 0 6 0 0 0 100 5 0 0 0 87 0 169 0 15 227 0 0 0 0 0 100 6 0 0 0 124 10 208 0 24 249 0 1 0 0 0 100 7 0 0 0 121 6 215 0 12 170 0 597 0 0 0 100 April 27, 2026 at 06:30:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 159 0 49 2309 203 119 2 9 1 0 3124 1 1 0 98 1 49 0 0 174 5 345 4 19 2 0 1441 0 0 0 99 2 0 0 0 67 2 151 0 12 1 0 1273 0 0 0 99 3 4 0 21 112 26 239 2 14 0 0 1814 0 0 0 99 4 69 0 7 307 131 184 0 16 5 0 1150 1 0 0 99 5 71 0 0 83 6 255 3 19 7 0 1386 0 0 0 99 6 285 0 0 46 2 124 3 12 5 0 930 1 0 0 99 7 465 0 0 58 4 183 1 16 2 1 2260 1 0 0 99 April 27, 2026 at 06:30:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 35 2311 202 154 1 3 3 0 1443 0 1 0 99 1 0 0 0 28 3 16 0 3 4 0 1 0 0 0 100 2 0 0 0 19 4 8 0 0 2 0 20 0 0 0 100 3 5 0 21 18 4 10 0 1 1 0 528 0 0 0 100 4 0 0 7 219 103 6 0 0 2 0 17 0 0 0 100 5 0 0 0 121 54 112 1 1 1 0 11 0 0 0 100 6 0 0 0 29 8 22 0 1 1 0 18 0 0 0 100 7 0 0 0 23 4 12 1 1 2 0 587 0 0 0 100 April 27, 2026 at 06:30:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 15 2315 204 139 1 3 12 0 983 0 1 0 99 1 0 0 7 30 1 29 0 5 8 0 21 0 0 0 100 2 0 0 0 22 2 21 1 3 4 0 100 0 0 0 100 3 0 0 21 25 4 28 0 4 7 0 548 0 0 0 100 4 0 0 7 220 103 12 0 3 15 0 73 0 0 0 100 5 0 0 0 132 58 157 0 3 12 0 409 0 0 0 100 6 0 0 0 47 10 53 1 7 17 0 62 0 0 0 100 7 0 0 14 20 2 14 0 4 6 0 592 0 0 0 100 April 27, 2026 at 06:30:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 201 106 0 0 1 0 294 0 0 0 100 1 0 0 0 20 1 12 0 0 0 0 0 0 0 0 100 2 0 0 7 13 3 8 0 1 0 0 2 0 0 0 100 3 0 0 21 26 11 24 0 1 1 0 533 0 0 0 100 4 0 0 7 214 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 113 52 135 1 1 0 0 1039 0 0 0 100 6 0 0 0 14 3 4 0 0 0 0 0 0 0 0 100 7 0 0 0 14 2 7 1 1 0 0 626 0 0 0 100 April 27, 2026 at 06:30:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2312 201 261 0 18 236 0 294 0 1 0 99 1 0 0 0 192 36 268 0 14 119 0 0 0 0 0 100 2 0 0 0 98 2 153 0 14 145 0 0 0 0 0 100 3 0 0 21 165 55 180 1 18 201 0 535 0 0 0 100 4 0 0 7 349 147 181 0 19 158 0 0 0 0 0 100 5 0 0 0 104 2 202 0 16 139 0 1038 0 0 0 100 6 0 0 0 129 11 195 0 15 216 0 26 0 0 0 100 7 0 0 0 106 2 160 0 9 151 0 588 0 0 0 100 April 27, 2026 at 06:30:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 13 2305 201 16 1 1 2 0 297 0 0 0 100 1 0 0 0 106 1 98 0 0 0 0 0 0 0 0 100 2 0 0 0 110 50 102 0 2 0 0 2 0 0 0 100 3 0 0 21 32 13 30 0 1 0 0 536 0 0 0 100 4 0 0 1 216 103 6 0 0 0 0 0 0 0 0 100 5 0 0 0 13 1 40 1 1 0 0 1037 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 14 2 8 1 2 0 0 598 0 0 0 100 April 27, 2026 at 06:30:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 15 0 171 2335 202 1169 36 124 20 0 7267 3 1 0 95 1 46 0 0 239 7 1024 21 98 13 0 7062 3 1 0 96 2 4 0 0 306 2 968 18 83 7 0 5609 3 1 0 96 3 0 0 21 418 56 1253 20 77 20 0 6044 2 1 0 97 4 0 0 3 460 104 909 8 70 11 0 6079 3 1 0 96 5 0 0 0 448 1 861 10 37 10 0 7072 2 1 0 97 6 1 0 0 211 5 1072 11 51 9 0 5710 2 1 0 97 7 0 0 0 220 3 921 15 42 18 0 7552 2 1 0 97 April 27, 2026 at 06:30:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 201 62 0 2 1 0 306 0 0 0 100 1 0 0 0 74 18 67 0 3 0 0 0 0 0 0 100 2 0 0 0 111 37 104 0 2 0 0 12 0 0 0 100 3 1 0 21 16 5 10 1 0 0 0 554 0 0 0 100 4 0 0 7 214 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 37 12 56 1 3 0 0 1052 0 0 0 100 6 0 0 0 16 2 14 0 0 0 0 14 0 0 0 100 7 0 0 0 30 7 21 0 2 1 0 520 0 0 0 100 April 27, 2026 at 06:30:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 8 0 1 1 0 294 0 0 0 100 1 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 2 0 0 0 111 52 106 0 0 0 0 10 0 0 0 100 3 0 0 21 9 3 6 0 0 0 0 526 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 118 4 140 0 0 0 0 1041 0 0 0 100 6 0 0 0 12 1 12 0 2 0 0 0 0 0 0 100 7 0 0 0 19 6 12 1 0 2 0 600 0 0 0 100 April 27, 2026 at 06:30:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 201 281 1 20 292 0 294 0 1 0 99 1 0 0 0 104 1 195 0 21 229 0 1 0 0 0 100 2 0 0 0 185 53 271 0 21 280 0 12 0 0 0 100 3 0 0 21 124 42 191 0 17 211 0 526 0 0 0 100 4 0 0 7 330 141 185 0 18 214 0 0 0 0 0 100 5 0 0 0 104 3 204 1 15 231 0 1041 0 1 0 99 6 0 0 0 96 1 188 0 17 232 0 0 0 0 0 100 7 0 0 0 105 6 196 1 13 211 0 617 0 0 0 100 April 27, 2026 at 06:30:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 10 0 1 1 0 294 0 0 0 100 1 0 0 0 117 50 110 0 2 0 0 0 0 0 0 100 2 0 0 0 113 4 106 0 2 0 0 13 0 0 0 100 3 0 0 21 15 4 14 0 1 0 0 532 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 17 5 40 1 0 0 0 1045 0 0 0 100 6 0 0 0 13 2 8 0 1 0 0 4 0 0 0 100 7 0 0 0 36 12 36 0 2 2 0 977 0 0 0 100 April 27, 2026 at 06:30:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 123 0 1 1 0 297 0 0 0 99 1 0 0 0 102 43 90 0 0 1 0 0 0 0 0 100 2 0 0 0 46 19 40 0 1 1 0 11 0 0 0 100 3 0 0 21 11 4 6 1 0 1 0 526 0 0 0 100 4 0 0 7 213 103 4 0 0 1 0 0 0 0 0 100 5 0 0 0 11 2 32 1 0 1 0 1038 0 0 0 100 6 0 0 0 18 4 13 0 3 0 0 2 0 0 0 100 7 0 0 0 14 3 6 0 0 3 0 599 0 0 0 100 April 27, 2026 at 06:30:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 85 0 7 2328 202 128 0 17 21 14 529 0 0 0 99 1 49 0 1 76 11 92 0 10 3 12 150 0 0 0 100 2 80 0 0 113 14 115 0 11 5 8 131 0 0 0 100 3 9 0 21 45 3 51 0 10 4 3 642 0 0 0 100 4 4 0 7 239 103 24 0 2 3 5 43 0 0 0 100 5 2 0 0 47 10 59 1 3 1 0 1194 0 0 0 100 6 1923 0 0 127 26 122 2 9 4 5 318 0 1 0 99 7 1346 0 117 60 14 93 1 4 11 17 1645 1 1 0 98 April 27, 2026 at 06:30:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 201 12 1 1 0 0 294 0 0 0 100 1 0 0 0 121 35 119 0 3 0 0 0 0 0 0 100 2 0 0 0 89 23 84 0 4 0 0 7 0 0 0 100 3 0 0 21 15 4 12 0 1 0 0 535 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 8 1 32 0 0 0 0 1121 0 0 0 100 6 0 0 0 36 1 26 0 0 0 0 0 0 0 0 100 7 0 0 0 12 2 3 2 0 0 0 573 0 0 0 100 April 27, 2026 at 06:30:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 201 100 0 0 0 0 294 0 0 0 100 1 0 0 0 118 50 112 0 2 0 0 0 0 0 0 100 2 0 0 0 28 8 26 0 1 1 0 326 0 0 0 100 3 0 0 21 14 3 16 0 1 0 0 541 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 14 2 40 1 0 1 0 1122 0 0 0 100 6 0 0 0 12 1 8 0 2 0 0 0 0 0 0 100 7 0 0 0 18 4 16 0 1 1 0 622 0 0 0 100 April 27, 2026 at 06:30:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 201 6 0 1 0 0 294 0 0 0 100 1 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 2 0 0 0 12 3 4 0 0 0 0 2 0 0 0 100 3 0 0 21 12 4 10 1 0 0 0 536 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 12 2 34 1 0 1 0 1121 0 0 0 100 6 0 0 0 110 49 106 0 1 0 0 3 0 0 0 100 7 0 0 0 127 12 120 0 2 1 0 614 0 0 0 100 April 27, 2026 at 06:30:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 19 0 7 2311 203 57 0 2 1 0 303 0 0 0 100 1 0 0 0 19 2 16 0 2 0 0 0 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 3 2 0 21 16 5 16 0 1 0 0 531 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 9 1 32 1 0 0 0 1117 0 0 0 100 6 0 0 0 107 32 100 0 2 0 0 1 0 0 0 100 7 0 0 0 85 9 74 0 1 0 0 603 0 0 0 100 April 27, 2026 at 06:30:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 201 114 1 0 0 0 307 0 0 0 100 1 0 0 0 117 51 111 0 1 0 0 0 0 0 0 100 2 0 0 0 14 3 8 0 1 0 0 2 0 0 0 100 3 0 0 21 22 6 24 0 0 0 0 546 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 23 10 42 0 0 2 0 1130 0 0 0 100 6 0 0 0 14 1 16 0 1 0 0 14 0 0 0 100 7 0 0 0 26 7 20 1 1 0 0 606 0 0 0 100 April 27, 2026 at 06:30:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 16 0 2 0 0 294 0 0 0 100 1 0 0 0 115 2 108 0 0 0 0 3 0 0 0 100 2 0 0 0 114 52 111 0 2 0 0 2 0 0 0 100 3 0 0 21 19 5 20 0 3 0 0 541 0 0 0 100 4 0 0 7 213 103 4 0 0 0 0 0 0 0 0 100 5 0 0 0 18 5 42 1 1 0 0 1121 0 0 0 100 6 0 0 0 11 2 4 0 1 0 0 0 0 0 0 100 7 0 0 0 27 9 22 1 1 3 0 931 0 0 0 100 April 27, 2026 at 06:30:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 60 0 1 0 0 294 0 0 0 100 1 0 0 0 19 2 14 0 1 1 0 0 0 0 0 100 2 0 0 0 122 33 116 0 1 3 0 8 0 0 0 100 3 0 0 21 69 28 64 1 2 0 0 536 0 0 0 100 4 0 0 7 212 102 4 0 1 0 0 0 0 0 0 100 5 0 0 0 15 2 40 2 0 6 0 1116 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 10 2 6 0 0 3 0 551 0 0 0 100 April 27, 2026 at 06:30:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 201 102 0 2 1 0 294 0 0 0 100 1 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 2 0 0 0 123 57 118 0 1 0 0 11 0 0 0 100 3 0 0 21 15 5 12 0 0 0 0 536 0 0 0 100 4 0 0 7 217 103 10 0 0 0 0 9 0 0 0 100 5 0 0 0 15 3 42 0 1 1 0 1134 0 0 0 100 6 0 0 0 15 3 12 0 2 0 0 4 0 0 0 100 7 0 0 0 14 4 8 0 0 1 0 613 0 0 0 100 April 27, 2026 at 06:30:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 21 1 3 1 0 297 0 0 0 100 1 0 0 0 18 2 10 0 0 1 0 0 0 0 0 100 2 0 0 0 118 8 108 0 1 1 0 10 0 0 0 100 3 0 0 21 14 5 8 0 0 1 0 527 0 0 0 100 4 0 0 7 211 102 2 0 0 1 0 0 0 0 0 100 5 0 0 0 13 3 34 1 0 1 0 1117 0 0 0 100 6 0 0 0 108 50 98 0 0 1 0 1 0 0 0 100 7 0 0 0 18 5 10 1 1 2 0 625 0 0 0 100 April 27, 2026 at 06:30:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 222 0 62 2314 204 333 5 22 7 2 1766 0 1 0 99 1 382 0 0 84 6 198 0 15 4 2 1649 1 0 0 99 2 194 0 0 140 12 294 3 25 5 1 1552 0 0 0 99 3 150 0 21 55 4 93 1 9 0 0 1739 1 0 0 99 4 10 0 1 237 103 40 2 8 1 1 623 1 0 0 99 5 0 0 0 73 9 210 2 13 2 0 2224 0 0 0 99 6 1 0 0 57 4 149 1 13 3 0 913 1 0 0 99 7 106 0 0 171 42 233 5 15 5 0 2487 1 0 0 98 April 27, 2026 at 06:30:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2313 206 120 0 2 1 0 311 0 0 0 99 1 0 0 0 19 1 12 0 1 0 0 17 0 0 0 100 2 16 0 0 17 4 8 0 0 1 0 16 0 0 0 100 3 4 0 21 43 17 38 1 2 0 0 545 0 0 0 100 4 0 0 7 283 136 76 0 2 0 0 10 0 0 0 100 5 0 0 0 16 2 38 1 2 0 0 1129 0 0 0 100 6 0 0 0 18 1 12 0 1 0 0 13 0 0 0 100 7 0 0 0 20 5 13 0 0 1 0 518 0 0 0 100 April 27, 2026 at 06:30:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 201 239 0 15 167 0 294 0 1 0 99 1 0 0 0 78 2 136 0 10 119 0 0 0 0 0 100 2 0 0 0 71 1 132 0 18 152 0 0 0 0 0 100 3 0 0 21 114 39 153 0 18 157 0 527 0 0 0 100 4 0 0 7 400 186 257 0 16 145 0 0 0 0 0 100 5 0 0 0 89 3 199 0 15 180 0 1129 0 0 0 99 6 0 0 0 80 1 150 0 10 179 0 0 0 0 0 100 7 0 0 0 96 8 167 0 14 119 0 638 0 0 0 100 April 27, 2026 at 06:30:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 100 1 1 0 0 294 0 0 0 100 1 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 2 0 0 0 21 4 12 0 1 0 0 2 0 0 0 100 3 0 0 21 103 49 102 0 1 0 0 528 0 0 0 100 4 0 0 7 219 105 8 0 1 0 0 0 0 0 0 100 5 0 0 0 11 2 34 1 0 0 0 1129 0 0 0 100 6 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 37 11 32 1 2 0 0 662 0 0 0 100 April 27, 2026 at 06:30:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2312 202 133 0 7 10 0 305 0 1 0 99 1 0 0 0 30 1 31 0 7 8 0 16 0 0 0 100 2 1 0 0 21 1 12 0 2 0 0 21 0 0 0 100 3 0 0 21 129 54 135 0 3 5 1 634 0 0 0 100 4 0 0 7 219 102 11 0 3 8 0 66 0 0 0 100 5 0 0 6 29 3 58 1 6 11 0 1058 0 1 0 99 6 0 0 0 20 2 20 0 4 9 0 15 0 0 0 100 7 0 0 20 45 12 44 1 3 12 0 640 0 0 0 100 April 27, 2026 at 06:30:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 201 33 0 4 0 0 307 0 0 0 100 1 0 0 0 21 2 12 0 0 0 0 1 0 0 0 100 2 0 0 0 16 4 10 0 0 0 0 8 0 0 0 100 3 0 0 21 134 63 130 2 0 0 0 537 0 0 0 100 4 0 0 7 212 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 122 11 138 0 0 0 0 1051 0 0 0 100 6 0 0 0 16 2 16 0 0 0 0 13 0 0 0 100 7 0 0 0 17 2 8 1 0 0 0 603 0 0 0 100 April 27, 2026 at 06:30:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2305 201 109 0 0 0 0 294 0 0 0 99 1 0 0 0 38 1 20 0 2 0 0 0 0 0 0 100 2 0 0 0 28 3 6 0 0 0 0 5 0 0 0 100 3 0 0 21 139 60 120 0 0 0 0 535 0 0 0 100 4 0 0 7 227 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 33 3 42 1 2 0 0 1041 0 0 0 100 6 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 26 2 4 0 0 1 0 570 0 0 0 100 April 27, 2026 at 06:30:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2306 202 114 1 2 2 0 294 0 0 0 100 1 0 0 0 19 1 12 0 0 0 0 0 0 0 0 100 2 0 0 0 16 2 16 0 1 0 0 2 0 0 0 100 3 0 0 21 125 59 120 0 1 0 0 535 0 0 0 100 4 0 0 7 212 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 16 2 9 1 0 2 0 791 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 15 2 8 1 1 0 0 627 0 0 0 100 April 27, 2026 at 06:30:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 22 0 172 2334 202 1253 36 146 18 0 6876 4 1 0 95 1 33 0 0 660 47 1155 12 96 20 0 6270 3 1 0 96 2 9 0 0 142 6 1069 30 91 20 0 6613 3 1 0 96 3 23 0 21 174 13 1235 13 79 12 0 5869 2 1 0 97 4 16 0 2 669 102 861 13 58 4 0 4883 2 1 0 97 5 1 0 0 136 1 694 10 40 6 0 6372 2 1 0 98 6 13 0 0 310 2 672 6 38 5 0 6180 2 1 0 97 7 20 0 0 190 3 916 13 59 13 0 6880 2 1 0 97 April 27, 2026 at 06:30:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2318 206 111 0 1 2 0 301 0 0 0 100 1 0 0 0 21 3 10 0 0 1 0 0 0 0 0 100 2 0 0 0 17 4 8 0 0 1 0 5 0 0 0 100 3 0 0 21 22 5 20 1 1 1 0 526 0 0 0 100 4 0 0 7 213 103 2 0 0 1 0 0 0 0 0 100 5 0 0 0 107 50 132 1 1 1 0 1038 0 0 0 100 6 0 0 0 19 5 11 0 2 0 0 1 0 0 0 100 7 0 0 0 22 5 9 1 1 4 0 594 0 0 0 100 April 27, 2026 at 06:30:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2323 211 140 1 1 1 0 323 0 0 0 99 1 0 0 0 16 1 10 0 0 0 0 0 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 21 21 4 22 0 1 0 0 546 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 126 62 144 1 0 1 0 1057 0 0 0 100 6 0 0 0 24 5 20 0 1 0 0 20 0 0 0 100 7 0 0 0 18 2 14 0 3 1 0 601 0 0 0 100 April 27, 2026 at 06:30:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2312 205 18 1 1 0 0 299 0 0 0 100 1 0 0 0 15 1 10 0 0 0 0 0 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 3 0 0 21 11 4 10 0 0 0 0 536 0 0 0 100 4 0 0 1 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 14 4 40 1 1 1 0 1037 0 0 0 100 6 0 0 0 107 49 100 0 1 0 0 0 0 0 0 100 7 0 0 0 107 2 100 1 1 2 0 578 0 0 0 100 April 27, 2026 at 06:30:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 719 0 120 2326 209 364 0 38 307 7 805 0 1 0 99 1 101 0 0 131 1 240 0 23 256 17 165 0 0 0 100 2 18 0 0 121 1 219 0 27 252 6 88 0 0 0 100 3 64 0 24 159 42 221 0 27 216 4 654 0 0 0 100 4 15 0 7 358 142 232 0 29 220 5 102 0 0 0 100 5 639 0 0 237 53 365 2 27 255 6 1947 1 1 0 98 6 1918 0 0 128 3 204 2 26 231 4 338 0 1 0 99 7 14 0 0 125 2 223 0 27 281 1 558 0 0 0 100 April 27, 2026 at 06:30:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 108 0 2 1 0 294 0 0 0 100 1 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 2 0 0 0 18 2 12 0 0 0 0 2 0 0 0 100 3 0 0 21 27 8 26 1 1 0 0 531 0 0 0 100 4 0 0 7 212 102 4 0 1 0 0 10 0 0 0 100 5 0 0 0 111 52 134 1 0 0 0 1123 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 13 3 6 1 0 0 0 642 0 0 0 100 April 27, 2026 at 06:30:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 68 0 46 2311 202 393 5 24 5 1 1631 1 0 0 99 1 228 0 0 42 1 131 0 11 6 4 1158 1 0 0 98 2 85 0 0 83 4 199 1 18 1 2 1348 0 0 0 99 3 94 0 21 96 12 253 4 19 4 0 2459 1 0 0 98 4 449 0 14 295 103 212 4 24 7 0 2094 1 0 0 99 5 12 0 0 159 50 273 3 18 9 1 2576 1 0 0 99 6 40 0 0 74 2 235 1 17 1 0 1484 0 0 0 99 7 3 0 0 43 2 119 2 19 3 0 1947 1 0 0 99 April 27, 2026 at 06:30:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2304 201 126 1 2 1 0 320 0 0 0 99 1 0 0 0 27 6 18 0 2 0 0 7 0 0 0 100 2 0 0 0 25 2 16 0 2 0 0 11 0 0 0 100 3 4 0 21 25 5 22 0 0 0 0 532 0 0 0 100 4 0 0 7 316 106 109 0 2 0 0 22 0 0 0 100 5 0 0 0 31 12 46 1 1 0 0 1144 0 0 0 100 6 0 0 0 16 1 14 0 0 0 0 14 0 0 0 100 7 0 0 0 18 2 11 1 0 0 0 531 0 0 0 100 April 27, 2026 at 06:30:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2313 201 143 1 9 18 0 315 0 1 0 99 1 0 0 0 118 1 115 1 0 1 0 27 0 0 0 100 2 0 0 0 24 1 14 0 2 6 0 0 0 0 0 100 3 0 0 21 25 4 27 0 1 4 1 599 0 0 0 100 4 0 0 7 246 111 44 3 8 10 0 133 0 0 0 100 5 0 0 0 27 4 222 1 5 12 0 1509 0 0 0 99 6 0 0 10 20 2 22 0 3 12 0 6 0 1 0 99 7 0 0 14 29 3 29 0 7 7 0 677 0 0 0 100 April 27, 2026 at 06:30:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2321 207 262 0 15 167 0 303 0 1 0 99 1 0 0 0 71 3 127 0 13 134 0 0 0 0 0 100 2 0 0 0 71 2 119 0 9 145 0 2 0 0 0 100 3 0 0 21 102 39 124 1 12 137 0 525 0 0 0 100 4 0 0 7 319 138 140 0 10 97 0 0 0 0 0 100 5 0 0 0 74 2 167 0 14 124 0 1043 0 0 0 100 6 0 0 0 79 3 148 0 14 135 0 2 0 0 0 100 7 0 0 0 190 5 259 0 13 161 0 517 0 0 0 100 April 27, 2026 at 06:31:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2319 208 58 0 2 2 0 304 0 0 0 99 1 0 0 0 128 36 106 0 3 0 0 1 0 0 0 100 2 0 0 0 34 2 12 0 0 0 0 1 0 0 0 100 3 0 0 21 29 5 10 0 0 0 0 528 0 0 0 100 4 0 0 7 229 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 33 2 42 1 0 1 0 1040 0 0 0 100 6 0 0 0 35 6 12 0 0 0 0 8 0 0 0 100 7 0 0 0 101 5 76 0 1 2 0 616 0 0 0 100 April 27, 2026 at 06:31:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2315 207 110 1 0 2 0 304 0 0 0 99 1 0 0 0 107 3 97 0 1 1 0 0 0 0 0 100 2 0 0 0 34 8 24 0 1 1 0 2 0 0 0 100 3 0 0 21 19 7 14 0 1 1 0 525 0 0 0 100 4 0 0 7 213 102 4 0 0 1 0 3 0 0 0 100 5 0 0 0 16 3 36 1 1 2 0 1039 0 0 0 100 6 0 0 0 18 3 13 0 3 2 0 1 0 0 0 100 7 0 0 0 15 3 4 1 0 4 0 649 0 0 0 100 April 27, 2026 at 06:31:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2334 212 320 1 12 8 0 803 0 1 0 99 1 0 0 0 81 1 156 2 13 2 0 626 1 0 0 99 2 0 0 0 74 1 113 2 8 1 0 747 0 0 0 100 3 13 0 21 180 54 244 4 12 4 0 1307 0 0 0 99 4 0 0 7 245 103 64 0 1 0 0 1020 0 0 0 100 5 0 0 0 64 9 121 3 5 3 0 2092 0 0 0 99 6 0 0 0 73 5 121 0 9 0 0 485 0 0 0 99 7 13 0 0 44 2 65 1 4 3 0 977 0 0 0 100 April 27, 2026 at 06:31:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 161 2336 204 1190 33 119 25 0 6319 3 1 0 96 1 22 0 0 367 3 830 21 81 12 0 5110 3 1 0 97 2 24 0 0 142 8 1063 25 92 24 0 4761 2 1 0 97 3 1 0 21 275 55 980 22 75 6 0 5703 2 1 0 97 4 6 0 7 410 103 718 14 63 8 1 5418 2 1 0 97 5 43 0 0 388 3 755 12 35 15 0 5370 2 1 0 97 6 66 0 0 397 3 903 18 46 5 0 5160 2 1 0 97 7 14 0 0 139 4 569 14 30 8 0 6218 2 0 0 97 April 27, 2026 at 06:31:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 201 324 1 27 296 0 294 0 1 0 99 1 0 0 0 85 1 162 0 18 220 0 0 0 0 0 100 2 0 0 0 95 6 180 1 26 227 0 6 0 0 0 100 3 0 0 21 158 57 206 0 30 274 0 826 0 0 0 100 4 0 0 7 393 181 267 0 27 237 0 0 0 0 0 100 5 0 0 0 119 3 263 0 25 255 0 1051 0 0 0 99 6 0 0 0 111 1 225 0 21 277 0 0 0 0 0 100 7 0 0 0 106 4 207 0 22 248 0 338 0 0 0 100 April 27, 2026 at 06:31:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 106 1 1 1 0 294 0 0 0 100 1 0 0 0 10 1 4 0 0 0 0 1 0 0 0 100 2 0 0 0 18 6 12 0 0 0 0 7 0 0 0 100 3 0 0 21 14 5 10 1 0 0 0 826 0 0 0 100 4 0 0 7 309 151 102 0 0 0 0 0 0 0 0 100 5 0 0 0 12 2 36 1 0 0 0 1049 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 16 3 13 0 3 3 0 299 0 0 0 100 April 27, 2026 at 06:31:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2309 202 36 0 2 1 0 295 0 0 0 100 1 0 0 0 13 1 6 0 1 0 0 0 0 0 0 100 2 0 0 0 21 7 16 0 0 0 0 10 0 0 0 100 3 0 0 21 18 5 15 0 2 0 0 830 0 0 0 100 4 0 0 1 227 109 15 0 1 0 0 0 0 0 0 100 5 0 0 0 82 36 106 0 2 0 0 1052 0 0 0 100 6 0 0 0 13 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 105 12 100 0 6 1 0 343 0 0 0 100 April 27, 2026 at 06:31:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 7 2304 201 130 0 2 0 0 313 0 0 0 99 1 0 0 0 48 19 42 0 1 0 0 5 0 0 0 100 2 0 0 0 34 12 28 1 1 1 0 334 0 0 0 100 3 0 0 21 23 5 19 1 3 0 0 825 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 29 12 46 1 0 0 0 1063 0 0 0 100 6 0 0 0 19 1 24 0 1 0 0 14 0 0 0 100 7 0 0 0 71 2 62 1 0 2 0 250 0 0 0 100 April 27, 2026 at 06:31:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 113 0 2 4 0 297 0 0 0 100 1 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 2 1 0 0 122 58 116 0 0 0 0 15 0 0 0 100 3 0 0 21 14 5 10 0 0 0 0 826 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 22 5 46 1 1 0 0 1076 0 0 0 100 6 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 12 3 8 0 1 1 0 327 0 0 0 100 April 27, 2026 at 06:31:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 201 112 1 2 4 0 294 0 0 0 100 1 0 0 0 12 1 8 0 2 0 0 0 0 0 0 100 2 0 0 0 119 56 114 0 0 0 0 7 0 0 0 100 3 0 0 21 15 5 12 1 0 0 0 826 0 0 0 100 4 0 0 7 214 103 6 0 0 1 0 0 0 0 0 100 5 0 0 0 16 2 42 1 0 2 0 1050 0 0 0 100 6 0 0 0 16 2 12 0 0 0 0 24 0 0 0 100 7 0 0 0 10 1 2 0 0 2 0 269 0 0 0 100 April 27, 2026 at 06:31:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 700 0 7 2306 201 23 1 4 3 0 445 0 1 0 99 1 0 0 0 106 2 99 0 1 3 0 17 0 0 0 100 2 0 0 0 117 52 112 0 2 2 0 6 0 0 0 100 3 0 0 21 32 9 30 0 5 1 0 827 0 0 0 100 4 0 0 7 220 104 18 0 3 2 0 9 0 0 0 100 5 0 0 0 14 2 46 0 3 1 0 1069 0 0 0 100 6 0 0 0 18 2 17 0 1 4 0 1 0 0 0 100 7 0 0 0 16 3 11 1 1 1 0 412 0 0 0 100 April 27, 2026 at 06:31:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1853 0 7 2332 205 61 3 9 7 6 1045 1 1 0 98 1 727 0 114 123 21 154 0 10 9 12 474 0 0 0 99 2 138 0 0 118 35 126 0 9 12 13 467 0 0 0 100 3 33 0 24 46 6 44 1 6 10 5 930 0 0 0 100 4 9 0 7 281 104 66 0 13 1 5 96 0 0 0 100 5 6 0 0 38 3 54 1 5 1 1 1220 0 0 0 100 6 1 0 0 32 3 12 0 2 1 1 41 0 0 0 100 7 28 0 0 40 4 28 0 5 1 5 385 0 0 0 100 April 27, 2026 at 06:31:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2321 209 134 0 1 0 0 25 0 0 0 100 1 0 0 0 15 2 10 0 2 1 0 297 0 0 0 100 2 0 0 0 62 28 56 0 1 0 0 0 0 0 0 100 3 0 0 21 12 4 10 0 0 0 0 826 0 0 0 100 4 0 0 7 219 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 28 10 50 1 0 1 0 1148 0 0 0 100 6 0 0 0 24 4 22 0 0 0 0 15 0 0 0 100 7 0 0 0 57 24 52 0 1 2 0 304 0 0 0 100 April 27, 2026 at 06:31:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 205 112 0 1 0 0 5 0 0 0 100 1 0 0 0 12 2 4 1 0 1 0 294 0 0 0 100 2 21 0 0 12 3 6 0 0 0 0 7 0 0 0 100 3 0 0 21 12 4 8 1 0 0 0 826 0 0 0 100 4 19 0 7 221 103 12 0 0 0 0 5 0 0 0 100 5 2 0 0 15 4 40 0 0 0 0 1140 0 0 0 100 6 0 0 0 14 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 109 51 104 0 2 2 0 300 0 0 0 100 April 27, 2026 at 06:31:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 204 114 0 2 1 0 5 0 0 0 100 1 0 0 0 108 50 104 0 1 0 0 297 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 0 0 0 0 100 3 0 0 21 13 4 10 0 0 0 0 826 0 0 0 100 4 0 0 7 222 103 14 0 0 0 0 0 0 0 0 100 5 0 0 0 17 3 44 1 0 3 0 1125 0 0 0 100 6 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 20 4 12 1 2 0 0 298 0 0 0 100 April 27, 2026 at 06:31:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 203 110 0 1 0 0 323 0 0 0 100 1 0 0 0 112 52 108 0 0 0 0 299 0 0 0 100 2 0 0 0 20 6 16 0 0 0 0 10 0 0 0 100 3 0 0 21 11 4 8 1 0 0 0 826 0 0 0 100 4 0 0 7 219 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 14 3 38 1 0 0 0 1126 0 0 0 100 6 0 0 0 14 1 10 0 0 0 0 0 0 0 0 100 7 0 0 0 13 1 6 0 1 1 0 304 0 0 0 100 April 27, 2026 at 06:31:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 106 0 1 0 0 1 0 0 0 100 1 0 0 0 110 52 104 0 0 1 0 294 0 0 0 100 2 0 0 0 22 7 16 1 0 0 0 10 0 0 0 100 3 0 0 21 12 4 10 0 0 0 0 829 0 0 0 100 4 0 0 7 219 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 18 5 44 1 1 1 0 1128 0 0 0 100 6 0 0 0 15 1 10 0 1 0 0 0 0 0 0 100 7 0 0 0 9 1 2 0 0 0 0 302 0 0 0 100 April 27, 2026 at 06:31:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 112 0 1 0 0 13 0 0 0 100 1 0 0 0 66 29 60 1 1 1 0 297 0 0 0 100 2 0 0 0 25 9 18 0 0 0 0 12 0 0 0 100 3 0 0 21 13 4 10 1 0 0 0 826 0 0 0 100 4 0 0 7 219 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 29 13 48 0 0 0 0 1139 0 0 0 100 6 0 0 0 16 1 16 0 0 0 0 16 0 0 0 100 7 0 0 0 59 24 55 0 2 2 0 304 0 0 0 100 April 27, 2026 at 06:31:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 21 2308 200 128 1 5 1 0 213 0 0 0 99 1 408 0 0 139 50 230 0 5 6 3 868 0 0 0 100 2 432 0 6 38 8 118 0 10 6 1 600 0 0 0 99 3 0 0 21 24 4 143 0 9 2 0 1211 0 0 0 99 4 0 0 7 229 102 30 0 3 1 0 374 0 0 0 100 5 193 0 0 26 4 62 1 3 3 3 1817 1 0 0 99 6 6 0 0 29 1 89 0 3 0 0 308 0 0 0 100 7 0 0 0 26 2 95 0 5 1 0 688 0 0 0 100 April 27, 2026 at 06:31:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 63 2310 201 352 2 25 168 0 1004 0 1 0 99 1 12 0 0 214 51 349 2 12 136 0 1507 0 0 0 99 2 0 0 0 112 6 191 2 14 151 0 990 0 0 0 99 3 4 0 21 140 40 248 4 20 103 0 1657 0 0 0 99 4 0 0 7 362 139 291 3 19 168 0 893 0 0 0 99 5 26 0 0 106 3 209 2 14 138 0 2151 1 0 0 99 6 0 0 0 114 1 221 3 17 131 0 952 0 0 0 100 7 0 0 0 115 6 192 3 16 128 0 588 1 0 0 99 April 27, 2026 at 06:31:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 104 0 2 0 0 0 0 0 0 100 1 0 0 0 103 47 96 0 2 0 0 295 0 0 0 100 2 0 0 0 12 2 4 0 0 0 0 1 0 0 0 100 3 0 0 21 25 11 22 0 0 0 0 834 0 0 0 100 4 0 0 7 219 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 13 3 36 0 0 0 0 1129 0 0 0 100 6 0 0 0 12 3 6 0 0 0 0 2 0 0 0 100 7 0 0 0 21 7 15 0 2 1 0 334 0 0 0 100 April 27, 2026 at 06:31:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 109 0 3 1 0 0 0 0 0 100 1 0 0 0 92 42 82 1 1 1 0 294 0 0 0 100 2 0 0 0 29 10 24 0 2 1 0 2 0 0 0 100 3 0 0 21 36 15 28 2 0 1 0 839 0 0 0 100 4 0 0 7 220 102 12 0 0 1 0 3 0 0 0 100 5 0 0 0 15 4 36 1 0 1 0 1128 0 0 0 100 6 0 0 0 19 3 13 0 2 0 0 1 0 0 0 100 7 0 0 0 12 3 2 0 0 2 0 296 0 0 0 100 April 27, 2026 at 06:31:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 122 1 2 1 0 14 0 0 0 100 1 0 0 0 107 50 102 0 1 0 0 294 0 0 0 100 2 0 0 0 16 1 8 0 1 0 0 3 0 0 0 100 3 0 0 21 31 13 28 0 0 0 0 836 0 0 0 100 4 0 0 7 219 102 10 0 0 0 0 0 0 0 0 100 5 0 0 0 28 12 48 1 0 1 0 1142 0 0 0 100 6 0 0 0 25 4 22 0 0 0 0 15 0 0 0 100 7 0 0 0 11 1 6 0 1 1 0 304 0 0 0 100 April 27, 2026 at 06:31:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2310 201 116 0 6 7 0 19 0 1 0 99 1 0 0 0 123 50 127 0 5 12 1 391 0 0 0 100 2 0 0 8 23 3 23 0 4 15 0 3 0 1 0 99 3 0 0 21 36 10 37 1 6 14 0 846 0 0 0 100 4 0 0 14 225 102 19 0 6 9 0 2 0 0 0 100 5 0 0 0 25 3 55 1 3 3 1 1226 0 0 0 100 6 0 0 0 20 1 15 1 3 6 0 15 0 0 0 100 7 2 0 0 45 12 38 2 1 5 0 330 0 0 0 100 April 27, 2026 at 06:31:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 200 209 0 10 67 0 0 0 0 0 100 1 0 0 0 63 2 107 0 9 43 0 294 0 0 0 100 2 0 0 0 56 1 92 0 10 44 0 0 0 0 0 100 3 0 0 21 188 83 201 0 5 71 0 826 0 0 0 100 4 0 0 7 290 131 95 0 3 38 0 0 0 0 0 100 5 0 0 0 73 4 150 1 4 58 0 1041 0 0 0 100 6 0 0 7 62 1 105 0 8 42 0 0 0 0 0 100 7 0 0 0 74 8 116 0 8 47 0 311 0 0 0 100 April 27, 2026 at 06:31:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2306 200 107 0 1 1 0 0 0 1 0 99 1 0 0 0 28 2 6 1 1 0 0 294 0 0 0 100 2 0 0 0 27 2 4 0 0 0 0 2 0 0 0 100 3 0 0 21 129 53 107 1 1 0 0 826 0 0 0 100 4 0 0 7 238 103 14 0 1 0 0 0 0 0 0 100 5 0 0 0 28 3 34 0 0 0 0 1037 0 0 0 100 6 0 0 0 28 1 6 0 1 0 0 0 0 0 0 100 7 0 0 0 44 9 22 0 0 0 0 314 0 0 0 100 April 27, 2026 at 06:31:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2304 201 104 0 1 0 0 1 0 0 0 100 1 0 0 0 12 2 4 0 0 0 0 294 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 3 0 0 21 15 4 10 0 1 0 0 827 0 0 0 100 4 0 0 7 320 151 113 0 1 0 0 3 0 0 0 100 5 0 0 0 15 3 38 1 1 0 0 1039 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 7 0 0 0 24 8 18 0 0 1 0 309 0 0 0 100 April 27, 2026 at 06:31:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 161 2334 202 1185 36 135 10 0 7572 3 1 0 96 1 22 0 0 399 31 1021 23 91 12 0 6304 3 1 0 96 2 2 0 0 167 4 1014 25 101 11 0 6102 2 1 0 97 3 25 0 21 245 8 801 21 71 12 0 7786 3 1 0 97 4 31 0 7 651 104 888 17 71 15 0 6227 2 1 0 97 5 13 0 0 310 30 1188 20 70 17 0 6057 2 1 0 97 6 20 0 0 241 3 880 11 44 18 0 5244 3 1 0 97 7 20 0 0 253 9 755 11 53 7 0 4643 2 0 0 97 April 27, 2026 at 06:31:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2302 200 110 0 2 1 0 0 0 0 0 100 1 0 0 0 116 52 116 0 2 0 0 294 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 3 0 0 21 31 11 28 0 2 0 0 838 0 0 0 100 4 0 0 7 212 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 15 3 38 1 0 1 0 1042 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 10 0 0 0 100 7 0 0 0 8 1 2 0 0 1 0 324 0 0 0 100 April 27, 2026 at 06:31:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1031 0 336 2315 200 350 4 51 244 13 218 0 1 0 99 1 72 0 0 258 50 297 3 38 276 4 399 0 0 0 100 2 60 0 0 164 3 198 1 31 212 3 114 0 0 0 100 3 104 0 21 183 48 224 6 30 210 9 977 1 0 0 99 4 1924 0 10 418 147 258 2 38 265 7 330 0 1 0 99 5 38 0 0 164 3 262 1 24 249 9 1114 0 1 0 99 6 234 0 0 154 3 214 2 27 256 9 898 0 0 0 99 7 12 0 0 177 3 254 0 34 243 3 382 0 0 0 100 April 27, 2026 at 06:31:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 112 0 2 0 0 0 0 0 0 100 1 0 0 0 109 50 105 0 2 0 0 295 0 0 0 100 2 0 0 0 15 2 12 0 1 0 0 1 0 0 0 100 3 0 0 21 13 5 10 0 0 0 0 828 0 0 0 100 4 0 0 7 219 106 10 0 0 0 0 10 0 0 0 100 5 0 0 0 11 2 34 1 0 0 0 1123 0 0 0 100 6 0 0 0 13 3 8 0 0 0 0 11 0 0 0 100 7 0 0 0 14 3 6 0 1 0 0 303 0 0 0 100 April 27, 2026 at 06:31:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 116 0 2 0 0 0 0 0 0 100 1 0 0 0 96 44 86 0 0 1 0 297 0 0 0 100 2 0 0 0 38 11 36 1 1 1 0 7 0 0 0 100 3 0 0 21 16 6 10 1 0 1 0 826 0 0 0 100 4 0 0 7 222 107 12 0 0 1 0 323 0 0 0 100 5 0 0 0 24 7 48 2 1 1 0 1131 0 0 0 100 6 0 0 0 15 4 8 0 0 1 0 11 0 0 0 100 7 0 0 0 12 2 2 1 0 2 0 300 0 0 0 100 April 27, 2026 at 06:31:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 118 0 0 0 0 13 0 0 0 100 1 0 0 0 11 2 6 0 0 0 0 297 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 1 0 0 0 100 3 0 0 21 17 6 16 0 0 0 0 830 0 0 0 100 4 0 0 7 211 102 2 0 0 0 0 0 0 0 0 100 5 0 0 0 36 16 52 1 0 2 0 1140 0 0 0 100 6 0 0 0 21 2 24 0 1 0 0 26 0 0 0 100 7 0 0 0 11 1 6 0 1 1 0 303 0 0 0 100 April 27, 2026 at 06:31:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 201 0 63 2311 204 388 0 14 1 4 1550 1 1 0 98 1 51 0 0 60 2 162 3 10 5 1 1706 1 0 0 99 2 1 0 0 56 12 74 0 9 7 0 870 2 0 0 98 3 5 0 21 138 47 213 1 13 0 0 1957 0 0 0 99 4 2 0 7 308 103 333 1 22 2 0 1432 1 0 0 99 5 0 0 0 62 4 164 0 14 3 0 2320 0 0 0 99 6 297 0 0 70 2 322 3 16 2 0 1366 1 0 0 99 7 614 0 0 127 2 332 1 14 4 4 1636 1 0 0 99 April 27, 2026 at 06:31:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2323 206 349 0 28 205 0 8 0 1 0 99 1 0 0 0 82 2 150 0 19 153 0 294 0 0 0 100 2 0 0 0 87 1 164 0 15 218 0 0 0 0 0 100 3 0 0 21 240 99 315 1 17 176 0 1790 0 1 0 99 4 0 0 7 337 146 185 0 20 195 0 0 0 0 0 100 5 0 0 0 102 2 188 1 21 159 0 163 0 0 0 100 6 0 0 0 81 1 157 0 22 145 0 0 0 0 0 100 7 0 0 0 88 2 167 0 18 131 0 300 0 0 0 100 April 27, 2026 at 06:31:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2318 206 136 0 3 4 1 111 0 1 0 99 1 0 0 14 18 2 18 0 4 10 0 305 0 0 0 100 2 0 0 0 26 2 22 0 5 9 0 20 0 0 0 100 3 2 0 28 130 57 170 2 9 17 2 2049 0 0 0 99 4 0 0 7 218 102 9 0 2 5 1 14 0 0 0 100 5 0 0 0 15 1 9 0 1 5 0 1 0 0 0 100 6 0 0 8 19 1 21 1 5 13 0 2 0 1 0 99 7 0 0 0 32 6 27 1 0 3 0 313 0 0 0 100 April 27, 2026 at 06:31:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 201 113 0 1 0 0 2 0 0 0 100 1 0 0 0 16 2 6 0 0 0 0 297 0 0 0 100 2 0 0 0 10 1 4 0 1 0 0 0 0 0 0 100 3 0 0 21 33 13 56 1 1 0 0 1867 0 0 0 100 4 0 0 14 296 143 92 0 3 0 0 0 0 0 0 100 5 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 15 1 10 0 1 1 0 0 0 0 0 100 7 0 0 0 30 10 24 0 1 1 0 321 0 0 0 100 April 27, 2026 at 06:31:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2303 200 123 0 1 0 0 12 0 0 0 100 1 0 0 0 32 3 10 1 2 1 0 294 0 0 0 100 2 0 0 0 26 2 6 0 1 0 0 2 0 0 0 100 3 0 0 21 35 7 46 1 0 0 0 1869 0 0 0 100 4 0 0 7 328 150 104 0 2 0 0 0 0 0 0 100 5 0 0 0 36 7 14 1 0 1 0 15 0 0 0 100 6 0 0 0 38 4 18 0 0 1 0 14 0 0 0 100 7 0 0 0 43 8 18 0 0 1 0 300 0 0 0 100 April 27, 2026 at 06:31:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 14 2308 203 126 0 2 1 0 15 0 0 0 100 1 3 0 0 19 5 14 0 4 1 0 306 0 0 0 100 2 1 0 0 109 50 104 0 2 0 0 1 0 0 0 100 3 1 0 21 23 6 50 1 2 1 0 1867 0 0 0 100 4 0 0 7 218 104 10 0 1 0 0 4 0 0 0 100 5 1 0 0 13 2 8 0 1 0 0 2 0 0 0 100 6 1 0 0 12 2 6 0 1 1 0 1 0 0 0 100 7 0 0 0 28 10 20 0 0 1 0 311 0 0 0 100 April 27, 2026 at 06:31:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 18 0 175 2337 200 1343 31 137 26 0 6539 3 1 0 95 1 13 0 0 302 25 1187 21 97 22 1 6421 3 1 0 96 2 8 0 0 280 16 1310 17 78 21 0 5514 3 1 0 96 3 8 0 21 258 7 952 14 62 9 0 8090 3 1 0 96 4 0 0 7 667 109 856 3 39 13 0 5337 2 1 0 98 5 0 0 0 291 6 1077 14 52 13 0 5420 3 1 0 97 6 16 0 0 159 3 779 6 27 7 0 7044 2 1 0 97 7 25 0 0 327 8 750 9 28 5 0 5960 2 1 0 97 April 27, 2026 at 06:31:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 18 0 1 0 0 0 0 0 0 100 1 0 0 0 101 45 96 0 3 2 0 295 0 0 0 100 2 0 0 0 11 2 4 0 0 0 0 1 0 0 0 100 3 0 0 21 125 15 150 2 1 0 0 1867 0 0 0 99 4 0 0 7 219 104 14 0 1 0 0 19 0 0 0 100 5 0 0 0 16 4 12 0 0 0 0 23 0 0 0 100 6 0 0 0 12 2 6 0 1 0 0 1 0 0 0 100 7 0 0 0 10 2 4 0 0 1 0 371 0 0 0 100 April 27, 2026 at 06:31:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 61 0 7 2318 200 164 0 16 14 11 186 0 1 0 99 1 8 0 0 46 3 35 1 6 5 3 388 0 0 0 100 2 11 0 0 43 3 39 0 6 7 1 74 0 0 0 100 3 718 0 134 150 56 215 1 7 6 10 2023 0 1 0 99 4 104 0 7 249 104 43 0 4 4 11 86 0 0 0 100 5 9 0 0 51 8 41 0 5 1 3 56 0 0 0 100 6 7 0 3 45 7 31 0 2 3 4 67 0 0 0 100 7 2579 0 0 41 2 39 3 8 9 5 1532 1 1 0 98 April 27, 2026 at 06:31:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 28 0 1 0 0 14 0 0 0 100 1 0 0 0 14 2 6 0 0 0 0 294 0 0 0 100 2 0 0 0 10 1 10 0 2 0 0 0 0 0 0 100 3 0 0 21 95 7 120 1 3 1 0 1950 0 0 0 99 4 0 0 7 220 104 8 0 1 0 0 10 0 0 0 100 5 0 0 0 131 52 124 0 4 0 0 16 0 0 0 100 6 0 0 0 31 9 30 0 3 0 0 18 0 0 0 100 7 0 0 0 11 1 6 0 1 0 0 300 0 0 0 100 April 27, 2026 at 06:31:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2310 202 118 0 0 0 0 6 0 0 0 100 1 0 0 0 15 3 12 0 0 0 0 303 0 0 0 100 2 0 0 0 12 2 6 0 0 0 0 2 0 0 0 100 3 0 0 21 17 6 44 1 1 0 0 1947 0 0 0 100 4 0 0 7 214 103 6 0 0 0 0 10 0 0 0 100 5 0 0 0 120 56 116 0 0 1 0 330 0 0 0 100 6 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 7 0 0 0 9 1 2 1 0 1 0 303 0 0 0 100 April 27, 2026 at 06:31:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2315 203 329 0 24 326 0 4 0 1 0 99 1 0 0 0 100 2 193 0 23 193 0 294 0 0 0 100 2 0 0 0 91 1 182 0 18 225 0 0 0 0 0 100 3 0 0 21 121 47 180 3 18 201 0 1947 0 1 0 99 4 0 0 7 320 145 219 0 19 262 0 10 0 0 0 100 5 0 0 0 197 51 296 0 20 257 0 0 0 0 0 100 6 0 0 0 99 1 209 0 19 236 0 0 0 0 0 100 7 0 0 0 95 1 184 0 22 222 0 302 0 0 0 100 April 27, 2026 at 06:31:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 309 0 63 2324 207 356 15 25 2 5 1466 1 1 0 98 1 48 0 0 134 39 283 3 23 3 0 1685 0 0 0 99 2 242 0 0 104 2 339 6 16 8 0 2149 1 0 0 98 3 260 0 21 114 7 303 3 22 3 1 3613 1 1 0 98 4 143 0 7 286 104 254 0 25 5 1 1726 1 0 0 99 5 50 0 0 91 14 134 0 9 1 1 814 1 0 0 98 6 33 0 0 57 1 149 0 13 1 0 1476 0 0 0 99 7 93 0 0 77 2 206 1 18 2 1 1684 1 0 0 99 April 27, 2026 at 06:31:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 48 0 2 0 0 5 0 0 0 100 1 0 0 0 72 15 62 0 2 1 0 294 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 3 0 0 21 40 13 66 2 0 0 0 1967 0 0 0 99 4 0 0 7 215 103 6 0 1 0 0 0 0 0 0 100 5 0 0 0 7 0 2 0 1 1 0 0 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 114 39 109 0 5 0 0 308 0 0 0 100 April 27, 2026 at 06:31:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 201 135 2 5 15 0 28 0 1 0 99 1 0 0 0 117 49 118 0 4 3 0 319 0 0 0 100 2 0 0 0 17 2 24 0 2 16 0 17 0 0 0 100 3 0 0 21 47 11 86 1 1 11 1 2124 0 0 0 100 4 0 0 7 229 105 32 0 7 19 0 29 0 0 0 100 5 0 0 7 32 8 27 0 5 4 0 19 0 0 0 100 6 1 0 0 29 3 30 0 2 7 0 43 0 0 0 100 7 0 0 8 25 4 16 1 4 10 0 279 0 1 0 99 April 27, 2026 at 06:31:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 200 27 0 2 0 0 0 0 0 0 100 1 0 0 0 90 5 82 0 3 0 0 294 0 0 0 100 2 0 0 0 87 37 80 0 2 0 0 3 0 0 0 100 3 0 0 21 46 16 72 2 1 0 0 1868 0 0 0 99 4 0 0 7 216 104 6 0 0 0 0 1 0 0 0 100 5 0 0 0 18 1 8 0 1 0 0 1 0 0 0 100 6 0 0 7 33 10 32 0 2 0 0 14 0 0 0 100 7 0 0 0 14 2 6 0 1 1 0 319 0 0 0 100 April 27, 2026 at 06:31:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2307 200 273 0 16 167 0 0 0 1 0 99 1 0 0 0 116 2 180 1 10 125 0 294 0 0 0 100 2 0 0 0 87 2 128 0 12 142 0 2 0 0 0 100 3 0 0 21 235 59 264 1 14 164 0 1861 0 1 0 99 4 0 0 7 372 146 212 0 13 158 0 3 0 0 0 100 5 0 0 0 94 0 147 0 10 133 0 0 0 0 0 100 6 0 0 0 119 10 170 0 8 137 0 8 0 0 0 100 7 0 0 0 104 2 169 0 15 122 0 294 0 0 0 100 April 27, 2026 at 06:31:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2303 200 110 0 1 0 0 0 0 0 0 100 1 0 0 0 15 3 10 0 0 1 0 299 0 0 0 100 2 0 0 0 15 2 8 0 1 0 0 1 0 0 0 100 3 0 0 21 45 6 68 1 1 0 0 1864 0 0 0 100 4 0 0 7 295 105 84 0 2 0 0 3 0 0 0 100 5 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 30 11 24 0 1 0 0 15 0 0 0 100 7 0 0 0 12 2 4 0 0 0 0 304 0 0 0 100 April 27, 2026 at 06:31:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 182 2330 201 1462 33 134 17 0 7980 3 2 0 95 1 11 0 0 638 36 1077 19 86 25 0 6684 3 1 0 96 2 32 0 0 257 12 922 24 92 17 0 6323 3 1 0 96 3 7 0 7 376 9 935 13 44 22 0 7846 2 1 0 97 4 9 0 21 377 107 1087 16 66 8 0 5803 2 1 0 97 5 1 0 0 121 4 751 10 53 8 0 5528 2 1 0 97 6 19 0 0 172 12 1073 14 50 14 1 5433 3 1 0 96 7 18 0 0 371 5 999 10 46 7 0 6327 3 1 0 97 April 27, 2026 at 06:31:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 116 0 1 1 0 14 0 0 0 100 1 0 0 0 15 2 14 0 1 1 0 294 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 3 0 0 7 23 4 48 1 0 0 0 1597 0 0 0 100 4 0 0 21 216 105 10 0 0 0 0 277 0 0 0 100 5 0 0 0 31 14 22 0 1 1 0 24 0 0 0 100 6 0 0 0 19 3 16 0 0 0 0 10 0 0 0 100 7 0 0 0 13 2 8 0 0 1 0 303 0 0 0 100 April 27, 2026 at 06:31:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 99 0 7 2322 201 167 0 18 10 11 143 0 0 0 99 1 16 0 0 48 3 52 1 9 10 5 433 0 0 0 100 2 5 0 0 137 52 129 0 7 2 3 53 0 0 0 100 3 7 0 7 52 4 71 2 7 5 2 1683 0 0 0 100 4 5 0 20 245 107 31 1 3 3 2 349 0 0 0 100 5 2622 0 113 52 8 72 3 4 8 13 425 0 1 0 99 6 66 0 0 56 2 68 0 14 6 13 117 0 0 0 100 7 660 0 2 41 2 44 1 10 7 8 1251 1 0 0 99 April 27, 2026 at 06:31:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 200 219 0 25 319 0 0 0 1 0 99 1 0 0 0 115 2 213 0 25 245 0 294 0 0 0 100 2 0 0 0 185 44 279 0 19 240 0 0 0 0 0 100 3 0 0 7 140 45 214 0 24 192 0 1685 0 1 0 99 4 0 0 21 349 146 205 0 23 237 0 276 0 0 0 100 5 0 0 0 98 4 192 0 19 243 0 5 0 0 0 100 6 0 0 0 204 10 302 1 25 277 0 24 0 0 0 100 7 0 0 0 110 2 211 0 24 212 0 300 0 0 0 100 April 27, 2026 at 06:31:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 87 0 4 0 0 5 0 0 0 100 1 0 0 0 10 2 6 0 1 2 0 294 0 0 0 100 2 0 0 0 13 2 6 0 0 0 0 2 0 0 0 100 3 0 0 7 26 5 52 1 1 1 0 1684 0 0 0 100 4 0 0 21 216 104 12 0 0 0 0 281 0 0 0 100 5 0 0 0 22 7 14 0 0 0 0 329 0 0 0 100 6 0 0 0 32 0 24 0 2 0 0 0 0 0 0 100 7 0 0 0 116 53 106 1 1 0 0 306 0 0 0 100 April 27, 2026 at 06:31:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 205 108 0 1 0 0 6 0 0 0 100 1 0 0 0 109 49 105 0 4 1 0 294 0 0 0 100 2 0 0 0 12 3 8 0 1 0 0 0 0 0 0 100 3 0 0 7 22 4 46 1 0 1 0 1678 0 0 0 100 4 0 0 21 217 105 10 0 0 0 0 277 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 12 3 6 0 0 0 0 294 0 0 0 100 April 27, 2026 at 06:31:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 63 2310 202 225 1 14 0 0 1363 0 0 0 99 1 0 0 0 164 5 283 1 22 0 0 1565 0 0 0 99 2 222 0 0 82 20 133 1 9 4 1 1330 1 0 0 99 3 586 0 10 74 4 189 1 13 3 0 2967 2 1 0 98 4 30 0 21 289 107 197 6 18 4 1 1766 1 0 0 99 5 3 0 0 62 9 104 7 13 7 0 752 1 0 0 99 6 96 0 14 109 34 221 0 13 6 1 1229 0 0 0 100 7 66 0 0 74 4 201 6 12 2 0 1868 1 0 0 99 April 27, 2026 at 06:31:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 10 0 0 0 0 2 0 0 0 100 1 0 0 0 107 2 100 0 0 0 0 295 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 3 0 0 0 100 3 0 0 7 42 13 64 1 0 1 0 1700 0 0 0 100 4 0 0 21 219 105 10 1 0 0 0 268 0 0 0 100 5 0 0 0 12 2 6 0 1 0 0 1 0 0 0 100 6 0 0 0 107 49 102 0 2 0 0 0 0 0 0 100 7 0 0 0 18 5 14 0 1 1 0 308 0 0 0 100 April 27, 2026 at 06:31:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2322 203 291 0 23 167 0 29 0 1 0 99 1 0 0 8 98 2 187 0 18 127 0 304 0 1 0 99 2 0 0 7 91 2 176 0 25 169 1 89 0 0 0 100 3 0 0 14 132 46 201 1 25 156 0 1726 0 0 0 99 4 0 0 21 337 143 179 0 17 180 0 294 0 0 0 100 5 0 0 0 80 1 138 0 10 155 0 3 0 0 0 100 6 0 0 0 73 0 135 0 15 125 0 1 0 0 0 100 7 0 0 0 204 54 274 2 17 116 1 383 0 0 0 100 April 27, 2026 at 06:32:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 206 117 0 2 0 0 9 0 0 0 99 1 0 0 0 106 48 96 0 1 0 0 294 0 0 0 100 2 0 0 0 17 5 12 0 1 0 0 2 0 0 0 100 3 0 0 7 26 5 50 0 0 0 0 1603 0 0 0 100 4 0 0 28 214 104 8 0 1 0 0 266 0 0 0 100 5 0 0 0 11 1 4 0 0 0 0 1 0 0 0 100 6 0 0 0 17 1 15 0 3 0 0 1 0 0 0 100 7 0 0 0 17 5 8 0 0 0 0 321 0 0 0 100 April 27, 2026 at 06:32:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2317 207 124 0 2 0 0 8 0 0 0 100 1 0 0 0 33 3 4 1 0 2 0 294 0 0 0 100 2 0 0 0 127 52 104 0 0 1 0 2 0 0 0 100 3 0 0 7 41 5 46 2 0 1 0 1595 0 0 0 100 4 0 0 21 231 104 8 0 1 1 0 266 0 0 0 100 5 0 0 0 31 4 8 0 1 1 0 6 0 0 0 100 6 0 0 0 29 2 4 0 0 1 0 1 0 0 0 100 7 0 0 0 31 4 8 0 1 3 0 299 0 0 0 100 April 27, 2026 at 06:32:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2319 209 132 0 0 0 0 27 0 0 0 99 1 0 0 0 12 2 4 0 0 1 0 294 0 0 0 100 2 0 0 0 109 51 103 0 1 0 0 0 0 0 0 100 3 0 0 7 33 5 59 2 1 2 0 1596 0 0 0 100 4 0 0 21 214 104 6 1 0 0 0 266 0 0 0 100 5 0 0 0 21 8 10 0 0 0 0 14 0 0 0 100 6 2 0 0 14 0 14 0 0 0 0 17 0 0 0 100 7 0 0 0 16 3 10 0 1 2 0 300 0 0 0 100 April 27, 2026 at 06:32:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 161 2341 209 1241 22 118 13 0 6321 3 1 0 96 1 33 0 0 487 11 1087 12 68 9 0 5404 2 1 0 97 2 40 0 0 179 26 781 14 53 6 0 7334 3 1 0 96 3 5 0 7 329 5 1017 14 55 4 0 7810 3 1 0 96 4 1 0 21 493 108 967 16 58 11 0 6343 2 1 0 97 5 13 0 0 246 10 1077 7 59 14 0 4943 2 1 0 97 6 19 0 0 439 5 872 12 36 7 0 5068 2 1 0 97 7 20 0 0 342 4 842 11 41 11 0 5764 3 1 0 96 April 27, 2026 at 06:32:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 200 328 0 22 253 0 0 0 1 0 99 1 0 0 0 105 8 196 0 16 284 0 302 0 0 0 100 2 0 0 0 96 1 199 0 20 203 0 20 0 0 0 100 3 0 0 7 124 41 207 1 19 287 0 1597 0 1 0 99 4 0 0 21 343 143 216 0 17 231 0 266 0 0 0 100 5 0 0 0 174 50 247 0 14 242 0 0 0 0 0 100 6 0 0 0 91 1 172 0 12 245 1 1 0 0 0 100 7 0 0 0 98 4 171 0 13 195 1 303 0 0 0 100 April 27, 2026 at 06:32:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 37 0 7 2324 201 134 0 9 12 4 124 0 1 0 99 1 9 0 0 49 7 44 1 6 8 5 362 0 0 0 100 2 10 0 0 40 2 37 0 6 6 3 109 0 0 0 100 3 1340 0 121 35 4 96 2 5 6 13 2571 1 1 0 98 4 116 0 21 262 104 80 0 9 6 13 463 0 0 0 100 5 17 0 3 137 50 139 0 9 3 5 86 0 0 0 100 6 40 0 0 39 3 34 0 4 3 2 78 0 0 0 100 7 1928 0 0 50 3 47 2 6 3 6 646 0 1 0 99 April 27, 2026 at 06:32:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 106 0 1 1 0 1 0 0 0 100 1 0 0 0 20 6 18 0 2 1 0 299 0 0 0 100 2 0 0 0 10 1 4 0 0 0 0 10 0 0 0 100 3 0 0 7 14 4 38 1 0 0 0 1683 0 0 0 100 4 0 0 21 222 104 14 1 0 0 0 266 0 0 0 100 5 0 0 0 106 50 100 0 0 0 0 0 0 0 0 100 6 0 0 0 10 0 4 0 1 0 0 0 0 0 0 100 7 0 0 0 13 3 6 0 0 0 0 300 0 0 0 100 April 27, 2026 at 06:32:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 112 0 1 0 0 17 0 0 0 100 1 0 0 0 30 10 22 0 0 0 0 622 0 0 0 100 2 0 0 0 12 2 10 0 2 0 0 2 0 0 0 100 3 0 0 7 21 4 50 1 3 1 0 1682 0 0 0 100 4 0 0 21 223 104 14 0 0 0 0 266 0 0 0 100 5 0 0 0 78 36 72 0 1 0 0 20 0 0 0 100 6 0 0 0 15 2 8 0 0 0 0 13 0 0 0 100 7 0 0 0 62 26 56 1 1 2 0 303 0 0 0 100 April 27, 2026 at 06:32:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 8 0 1 0 0 5 0 0 0 100 1 0 0 0 12 2 8 0 1 0 0 308 0 0 0 100 2 0 0 0 13 1 8 0 0 0 0 23 0 0 0 100 3 0 0 7 134 13 156 1 0 0 0 1695 0 0 0 99 4 0 0 21 221 104 14 0 0 0 0 266 0 0 0 100 5 0 0 0 8 1 4 0 1 0 0 1 0 0 0 100 6 0 0 0 11 2 6 0 0 0 0 4 0 0 0 100 7 0 0 0 112 53 107 0 0 0 0 306 0 0 0 100 April 27, 2026 at 06:32:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 51 0 63 2306 200 99 1 13 4 0 404 2 0 0 98 1 51 0 0 118 23 375 3 28 4 0 1600 1 0 0 99 2 0 0 0 55 2 104 0 11 3 0 1213 0 0 0 100 3 97 0 7 95 9 209 1 11 5 0 2884 1 0 0 98 4 2 0 21 312 105 321 4 19 3 0 1803 0 0 0 99 5 122 0 0 65 1 151 2 14 1 1 1513 1 0 0 99 6 0 0 0 45 4 111 0 11 0 0 1134 0 0 0 100 7 588 0 0 201 31 297 2 21 11 0 1827 1 0 0 98 April 27, 2026 at 06:32:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2316 207 80 0 4 0 0 9 0 0 0 100 1 0 0 0 14 2 6 0 1 0 0 294 0 0 0 100 2 0 0 0 53 22 44 0 1 0 0 2 0 0 0 100 3 0 0 7 24 5 48 1 2 0 0 1684 0 0 0 99 4 6 0 21 221 105 20 1 1 0 0 277 0 0 0 100 5 0 0 0 12 3 6 0 0 0 0 19 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 118 33 108 0 3 2 0 311 0 0 0 100 April 27, 2026 at 06:32:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2319 206 128 0 6 15 0 50 0 1 0 99 1 0 0 0 44 12 48 2 6 12 0 317 0 0 0 100 2 0 0 0 26 3 22 0 3 6 0 40 0 0 0 100 3 0 0 14 120 5 150 0 5 9 2 1838 0 0 0 99 4 0 0 21 228 107 26 0 7 14 0 282 0 0 0 100 5 0 0 0 16 1 4 0 2 6 0 0 0 0 0 100 6 0 0 9 20 2 15 0 5 7 0 8 0 1 0 99 7 0 0 0 29 3 22 1 4 10 0 270 0 0 0 100 April 27, 2026 at 06:32:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 123 0 2 0 0 12 0 0 0 100 1 0 0 0 116 53 106 0 0 0 0 294 0 0 0 100 2 0 0 0 13 1 6 0 1 0 0 0 0 0 0 100 3 0 0 7 18 4 42 1 0 0 0 1602 0 0 0 100 4 0 0 28 233 112 28 0 1 0 0 279 0 0 0 100 5 0 0 0 29 10 22 0 1 0 0 17 0 0 0 100 6 0 0 0 12 0 10 0 0 0 0 13 0 0 0 100 7 0 0 0 22 2 16 0 0 1 0 331 0 0 0 100 April 27, 2026 at 06:32:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2309 202 107 0 1 0 0 5 0 1 0 99 1 0 0 0 131 53 109 1 1 0 0 297 0 0 0 100 2 0 0 0 27 2 4 0 0 0 0 2 0 0 0 100 3 0 0 7 34 5 40 2 0 1 0 1596 0 0 0 100 4 0 0 21 251 113 26 0 0 0 0 277 0 0 0 100 5 0 0 0 24 0 2 0 0 0 0 0 0 0 0 100 6 0 0 0 26 0 10 0 1 0 0 0 0 0 0 100 7 0 0 0 38 2 18 0 1 2 0 300 0 0 0 100 April 27, 2026 at 06:32:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2309 200 289 0 22 165 0 0 0 1 0 99 1 0 0 0 195 54 285 0 16 187 0 294 0 0 0 100 2 0 0 0 82 1 148 0 14 142 0 0 0 0 0 100 3 0 0 7 123 50 166 1 11 134 0 1597 0 1 0 99 4 0 0 21 352 155 216 1 14 179 0 275 0 0 0 100 5 0 0 0 76 0 149 0 10 138 0 0 0 0 0 100 6 0 0 0 69 1 128 0 11 156 0 1 0 0 0 100 7 0 0 0 126 2 208 0 19 163 0 300 0 0 0 100 April 27, 2026 at 06:32:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 161 2338 204 1061 36 115 14 0 7245 3 1 0 96 1 0 0 0 541 17 1213 24 99 12 0 5801 3 1 0 96 2 0 0 0 277 26 997 18 89 8 0 6773 2 1 0 97 3 9 0 7 481 4 892 15 53 9 0 7736 2 1 0 97 4 0 0 21 626 110 957 18 67 11 0 5355 3 1 0 96 5 6 0 0 119 0 814 11 47 16 0 6052 2 1 0 97 6 10 0 0 436 0 801 12 38 10 0 4979 2 1 0 98 7 0 0 0 360 3 1142 21 59 11 0 5290 2 1 0 97 April 27, 2026 at 06:32:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 108 0 2 0 0 1 0 0 0 100 1 0 0 0 126 8 118 0 1 2 0 302 0 0 0 100 2 0 0 0 11 1 6 0 0 0 0 20 0 0 0 100 3 0 0 7 19 5 46 0 2 1 0 1598 0 0 0 100 4 0 0 21 215 105 6 0 0 0 0 266 0 0 0 100 5 0 0 0 8 1 0 0 0 0 0 0 0 0 0 100 6 0 0 0 15 1 10 0 1 0 0 0 0 0 0 100 7 0 0 0 12 3 6 0 0 1 0 297 0 0 0 100 April 27, 2026 at 06:32:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 638 0 7 2319 200 117 1 10 8 4 937 1 1 0 98 1 743 0 114 92 11 122 1 12 5 10 503 0 0 0 99 2 92 0 0 75 11 89 0 11 7 13 171 0 0 0 100 3 21 0 8 137 16 164 2 8 5 3 1743 0 0 0 99 4 1967 0 21 255 104 63 2 8 10 11 679 0 1 0 99 5 20 0 0 49 8 46 0 2 5 6 67 0 0 0 100 6 7 0 0 40 2 34 0 3 3 5 73 0 0 0 100 7 5 0 0 35 3 18 0 2 3 0 307 0 0 0 100 April 27, 2026 at 06:32:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 44 0 0 0 0 0 0 0 0 100 1 0 0 0 60 9 54 0 2 0 0 305 0 0 0 100 2 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 3 0 0 7 116 37 139 1 3 0 0 1681 0 0 0 100 4 0 0 21 252 121 44 1 2 0 0 269 0 0 0 100 5 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 6 0 0 0 12 0 8 0 0 0 0 0 0 0 0 100 7 0 0 0 14 3 8 0 1 2 0 313 0 0 0 100 April 27, 2026 at 06:32:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 200 346 1 28 313 0 2 0 1 0 99 1 0 0 0 122 7 223 0 26 269 0 621 0 0 0 100 2 0 0 0 102 2 203 0 26 201 0 2 0 0 0 100 3 0 0 7 225 94 298 1 18 255 0 1685 0 1 0 99 4 0 0 21 342 144 219 0 23 269 0 266 0 0 0 100 5 0 0 0 86 0 180 0 21 252 0 0 0 0 0 100 6 0 0 0 94 1 190 0 21 308 0 0 0 0 0 100 7 0 0 0 90 3 164 1 21 245 0 297 0 0 0 100 April 27, 2026 at 06:32:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 100 0 2 0 0 0 0 0 0 100 1 0 0 0 34 8 30 0 1 0 0 303 0 0 0 100 2 0 0 0 14 3 10 0 0 0 0 22 0 0 0 100 3 0 0 7 116 55 140 1 0 0 0 1681 0 0 0 100 4 0 0 21 213 104 6 0 0 0 0 266 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 15 4 8 0 0 0 0 327 0 0 0 100 April 27, 2026 at 06:32:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 118 0 63 2307 201 272 2 22 7 0 1200 1 1 0 98 1 0 0 0 114 8 131 5 7 4 0 1105 1 0 0 99 2 78 0 0 132 22 282 1 16 4 0 1717 0 0 0 99 3 221 0 7 106 29 185 3 12 3 0 2996 1 1 0 98 4 267 0 23 277 105 209 3 17 9 0 2121 1 0 0 99 5 333 0 0 93 5 272 6 20 7 1 2014 1 0 0 99 6 0 0 0 73 3 168 0 18 1 0 1334 0 0 0 100 7 64 0 0 69 4 245 1 17 2 0 1677 0 0 0 99 April 27, 2026 at 06:32:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2318 210 142 1 0 0 0 30 0 0 0 99 1 0 0 0 22 2 14 0 0 0 0 297 0 0 0 100 2 0 0 0 65 28 58 0 2 0 0 1 0 0 0 100 3 0 0 7 19 4 46 1 1 0 0 1688 0 0 0 100 4 4 0 21 217 104 8 1 0 0 0 279 0 0 0 100 5 0 0 0 35 13 20 0 1 0 0 23 0 0 0 100 6 0 0 1 20 0 22 0 1 1 0 32 0 0 0 100 7 0 0 0 67 28 60 0 1 4 0 309 0 0 0 100 April 27, 2026 at 06:32:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2334 211 148 0 8 10 1 134 0 1 0 99 1 0 0 9 32 2 32 0 4 7 0 311 0 1 0 99 2 0 0 14 21 2 19 0 2 3 0 16 0 0 0 100 3 0 0 7 31 5 58 3 4 2 0 1801 0 0 0 99 4 0 0 21 225 104 23 1 5 8 0 278 0 0 0 100 5 0 0 0 16 0 17 0 4 10 0 13 0 0 0 100 6 0 0 0 13 0 13 0 3 12 0 1 0 0 0 100 7 0 0 7 121 53 118 1 3 13 0 297 0 0 0 100 April 27, 2026 at 06:32:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2308 201 179 0 17 177 0 0 0 1 0 99 1 0 0 0 184 20 251 0 20 173 0 294 0 0 0 100 2 0 0 0 142 17 211 0 19 158 0 0 0 0 0 100 3 0 0 7 116 39 174 1 14 162 0 1600 0 1 0 99 4 0 0 21 343 146 209 1 16 138 0 275 0 0 0 100 5 0 0 0 69 2 128 0 13 186 0 0 0 0 0 100 6 0 0 0 77 0 138 0 13 113 0 0 0 0 0 100 7 0 0 0 110 19 161 0 14 122 0 300 0 0 0 100 April 27, 2026 at 06:32:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2301 200 84 0 2 0 0 0 0 1 0 99 1 0 0 0 36 2 14 1 2 0 0 294 0 0 0 100 2 0 0 0 55 13 32 0 2 0 0 2 0 0 0 100 3 0 0 7 30 4 38 1 0 0 0 1597 0 0 0 100 4 0 0 21 241 110 18 0 0 0 0 275 0 0 0 100 5 0 0 0 28 3 6 0 0 0 0 3 0 0 0 100 6 0 0 0 28 0 8 0 0 0 0 0 0 0 0 100 7 0 0 0 129 42 107 0 2 0 0 306 0 0 0 100 April 27, 2026 at 06:32:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 201 106 0 2 0 0 1 0 0 0 100 1 0 0 0 114 49 106 0 1 0 0 294 0 0 0 100 2 0 0 0 15 2 8 0 1 0 0 1 0 0 0 100 3 0 0 7 16 4 38 1 0 0 0 1597 0 0 0 100 4 0 0 21 231 112 22 1 0 0 0 279 0 0 0 100 5 0 0 0 18 3 14 0 2 0 0 7 0 0 0 100 6 0 0 0 9 1 0 0 0 0 0 0 0 0 0 100 7 0 0 0 15 4 8 0 1 1 0 294 0 0 0 100 April 27, 2026 at 06:32:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 172 2329 201 1167 24 107 17 0 6854 3 1 0 96 1 18 0 0 295 7 1054 20 90 15 0 5850 3 1 0 96 2 32 0 0 356 32 1069 22 79 11 0 6152 2 1 0 97 3 15 0 7 499 10 960 15 57 15 0 7127 3 1 0 96 4 38 0 16 734 112 1011 13 41 13 0 5885 3 1 0 96 5 2 0 0 303 16 1000 11 54 8 0 5458 2 1 0 97 6 0 0 0 239 0 941 4 43 11 0 5462 2 1 0 97 7 1 0 0 222 3 874 11 47 8 0 5626 2 1 0 97 April 27, 2026 at 06:32:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 110 0 1 0 0 0 0 0 0 100 1 0 0 0 116 53 108 0 0 0 0 295 0 0 0 100 2 0 0 0 11 2 2 0 0 0 0 0 0 0 0 100 3 0 0 7 29 11 52 1 0 1 0 1607 0 0 0 100 4 0 0 21 216 105 8 1 1 0 0 276 0 0 0 100 5 0 0 0 10 2 2 0 0 0 0 1 0 0 0 100 6 0 0 0 14 1 10 0 1 0 0 3 0 0 0 100 7 0 0 0 15 3 7 1 1 1 0 290 0 0 0 100 April 27, 2026 at 06:32:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 21 0 7 2327 201 408 0 39 287 10 124 0 1 0 99 1 75 0 0 229 52 322 2 33 179 8 370 0 0 0 100 2 22 0 0 132 2 229 0 34 272 7 77 0 0 0 100 3 636 0 7 176 49 257 2 29 288 3 2486 1 1 0 98 4 22 0 21 362 146 245 0 27 252 3 345 0 1 0 99 5 2621 0 114 106 0 222 2 31 206 13 431 0 1 0 98 6 81 0 0 130 1 244 0 39 259 14 197 0 0 0 100 7 22 0 1 130 4 234 1 32 235 7 405 0 0 0 100 April 27, 2026 at 06:32:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 201 114 0 2 0 0 1 0 0 0 100 1 0 0 0 110 52 104 0 0 0 0 294 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 3 0 0 7 26 10 50 1 0 0 0 1690 0 0 0 100 4 0 0 21 214 104 8 0 0 0 0 276 0 0 0 100 5 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 6 0 0 0 21 4 16 0 0 0 0 3 0 0 0 100 7 0 0 0 16 3 10 0 1 0 0 300 0 0 0 100 April 27, 2026 at 06:32:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2301 200 113 0 1 1 0 0 0 0 0 100 1 0 0 0 96 44 88 0 0 1 0 296 0 0 0 100 2 0 0 0 31 11 28 0 1 1 0 7 0 0 0 100 3 0 0 7 31 11 54 2 0 2 0 2010 0 0 0 99 4 0 0 21 216 105 10 0 0 1 0 270 0 0 0 100 5 0 0 0 8 1 0 0 0 1 0 0 0 0 0 100 6 0 0 0 17 2 13 0 2 0 0 1 0 0 0 100 7 0 0 0 16 4 6 0 0 4 0 308 0 0 0 100 April 27, 2026 at 06:32:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 201 120 0 1 0 0 13 0 0 0 100 1 0 0 0 18 6 12 0 0 1 0 299 0 0 0 100 2 0 0 0 108 51 102 0 0 0 0 0 0 0 0 100 3 0 0 7 15 4 40 1 0 0 0 1680 0 0 0 100 4 0 0 21 215 104 8 1 0 0 0 276 0 0 0 100 5 0 0 0 19 7 12 0 0 1 0 14 0 0 0 100 6 0 0 0 16 2 8 0 0 0 0 13 0 0 0 100 7 0 0 0 18 3 13 1 2 0 0 295 0 0 0 100 April 27, 2026 at 06:32:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 137 0 49 2309 201 375 10 27 3 0 1647 1 1 0 99 1 342 0 0 122 10 286 6 23 8 2 2380 1 0 0 99 2 261 0 0 171 38 325 3 25 12 1 1066 1 0 0 99 3 39 0 7 136 11 424 8 22 11 0 3499 1 1 0 99 4 37 0 21 381 111 451 7 25 3 1 1828 1 0 0 99 5 13 0 0 40 0 114 1 11 0 0 1428 1 0 0 99 6 74 0 0 129 0 396 1 25 5 1 1256 1 0 0 99 7 0 0 0 54 3 147 2 11 1 0 1625 1 0 0 99 April 27, 2026 at 06:32:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2310 200 282 0 18 226 0 12 0 1 0 99 1 0 0 0 138 32 195 0 8 156 0 294 0 0 0 100 2 0 0 0 91 7 156 0 17 145 0 9 0 0 0 100 3 0 0 7 135 51 185 0 12 142 0 1686 0 0 0 99 4 3 0 21 318 138 152 0 15 121 0 272 0 0 0 100 5 0 0 0 83 2 143 0 8 74 0 13 0 0 0 100 6 0 0 0 82 6 139 0 12 152 0 15 0 0 0 100 7 0 0 0 73 3 132 0 11 123 0 315 0 0 0 100 April 27, 2026 at 06:32:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 4 2306 200 111 0 5 10 0 5 0 1 0 99 1 0 0 0 106 42 104 0 10 14 0 312 0 0 0 100 2 0 0 0 46 12 52 0 9 13 0 103 0 0 0 100 3 0 0 14 21 4 43 1 3 1 0 1686 0 0 0 100 4 0 0 25 230 106 26 1 1 10 0 280 0 1 0 99 5 0 0 14 14 0 12 1 5 2 0 3 0 0 0 100 6 0 0 0 35 8 42 0 5 12 0 112 0 0 0 100 7 0 0 0 22 3 22 1 6 6 0 332 0 0 0 100 April 27, 2026 at 06:32:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 56 0 1 0 0 1 0 0 0 100 1 0 0 0 13 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 10 1 2 0 0 0 0 0 0 0 0 100 3 0 0 7 117 53 139 1 2 0 0 1602 0 0 0 100 4 0 0 28 219 105 12 1 3 0 0 266 0 0 0 100 5 0 0 0 66 1 56 0 3 0 0 0 0 0 0 100 6 0 0 0 17 2 10 0 0 0 0 0 0 0 0 100 7 0 0 0 32 9 23 1 1 1 0 309 0 0 0 100 April 27, 2026 at 06:32:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2303 200 122 0 1 1 0 13 0 0 0 100 1 0 0 0 33 5 10 1 0 0 0 300 0 0 0 100 2 0 0 0 26 2 4 0 0 0 0 2 0 0 0 100 3 0 0 7 32 4 40 2 0 0 0 1595 0 0 0 100 4 0 0 21 233 104 8 0 1 0 0 265 0 0 0 100 5 0 0 0 46 11 20 0 0 1 0 10 0 0 0 100 6 0 0 0 126 47 116 0 2 0 0 17 0 0 0 100 7 0 0 0 45 9 25 0 2 0 0 307 0 0 0 100 April 27, 2026 at 06:32:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 203 125 0 4 1 0 8 0 0 0 100 1 0 0 0 15 3 8 0 2 1 0 305 0 0 0 100 2 0 0 0 11 2 4 0 0 1 0 0 0 0 0 100 3 0 0 7 16 5 40 0 0 1 0 1599 0 0 0 100 4 0 0 21 215 104 6 0 0 1 0 266 0 0 0 100 5 0 0 7 15 3 10 0 2 0 0 5 0 0 0 100 6 0 0 0 110 51 103 0 1 0 0 0 0 0 0 100 7 0 0 0 45 16 36 1 1 3 0 324 0 0 0 100 April 27, 2026 at 06:32:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 157 2333 201 1425 37 142 80 0 6781 3 1 0 96 1 0 0 0 474 5 1124 24 121 73 0 6623 3 1 0 96 2 16 0 0 218 2 1096 19 106 56 0 6714 3 1 0 96 3 17 0 7 235 30 1086 16 71 72 0 8689 3 1 0 96 4 3 0 17 612 130 736 11 59 63 0 6752 2 1 0 97 5 1 0 0 239 1 1043 15 73 67 0 5748 2 1 0 97 6 1 0 0 627 46 1125 12 75 73 0 4841 2 1 0 97 7 14 0 0 201 16 1031 13 60 48 0 5207 3 1 0 96 April 27, 2026 at 06:32:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2312 205 23 0 2 1 0 6 0 0 0 100 1 0 0 0 113 2 110 0 3 0 0 294 0 0 0 100 2 0 0 0 104 48 100 0 2 0 0 1 0 0 0 100 3 0 0 7 16 5 40 1 0 0 0 1598 0 0 0 100 4 0 0 21 217 105 10 1 0 0 0 275 0 0 0 100 5 0 0 0 10 1 8 0 1 0 0 18 0 0 0 100 6 0 0 0 16 1 6 0 0 0 0 1 0 0 0 100 7 0 0 0 15 4 9 0 0 1 0 321 0 0 0 100 April 27, 2026 at 06:32:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 6 0 7 2330 204 53 0 5 5 3 53 0 0 0 100 1 2 0 0 137 6 115 1 4 5 0 386 0 0 0 100 2 3252 0 121 122 44 143 3 3 10 12 1259 1 1 0 98 3 122 0 7 84 13 145 2 12 17 19 1817 0 0 0 99 4 37 0 24 247 103 55 0 10 14 10 397 0 0 0 100 5 12 0 0 44 2 44 0 5 7 2 98 0 0 0 100 6 4 0 0 42 2 34 0 10 6 2 70 0 0 0 100 7 58 0 0 45 4 42 1 7 10 4 385 0 0 0 100 April 27, 2026 at 06:32:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2313 205 134 0 1 0 0 19 0 0 0 100 1 0 0 0 15 2 6 0 0 0 0 294 0 0 0 100 2 0 0 0 14 1 12 0 1 0 0 0 0 0 0 100 3 0 0 7 115 54 141 1 1 1 0 1683 0 0 0 100 4 0 0 21 211 103 4 0 0 0 0 266 0 0 0 100 5 0 0 0 23 10 12 0 0 1 0 14 0 0 0 100 6 0 0 0 17 2 16 0 0 0 0 16 0 0 0 100 7 0 0 0 16 3 12 0 1 1 0 311 0 0 0 100 April 27, 2026 at 06:32:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2325 211 132 1 2 0 0 336 0 0 0 100 1 0 0 0 11 2 4 0 0 1 0 294 0 0 0 100 2 0 0 0 18 4 14 0 3 1 0 3 0 0 0 100 3 0 0 7 23 6 50 1 1 1 0 1684 0 0 0 100 4 0 0 21 309 150 102 0 2 0 0 266 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 3 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 15 3 12 0 0 0 0 310 0 0 0 100 April 27, 2026 at 06:32:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2311 201 306 0 24 285 0 0 0 1 0 99 1 0 0 0 100 4 190 0 16 214 0 298 0 0 0 100 2 0 0 0 96 4 186 0 24 281 0 0 0 0 0 100 3 0 0 7 251 97 328 1 25 236 0 1685 0 1 0 99 4 0 0 21 334 145 203 1 19 230 0 269 0 0 0 100 5 0 0 0 93 1 182 0 17 189 0 0 0 0 0 100 6 0 0 0 92 0 181 0 21 228 0 0 0 0 0 100 7 0 0 0 85 3 167 0 22 265 0 310 0 0 0 100 April 27, 2026 at 06:32:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 3 0 46 2305 201 238 4 16 5 0 893 1 0 0 98 1 33 0 0 104 11 219 2 13 5 0 1593 0 0 0 99 2 18 0 0 87 2 196 5 20 4 0 1606 1 0 0 99 3 1 0 7 157 50 452 5 20 3 0 3077 1 0 0 99 4 245 0 16 249 103 90 1 11 1 0 1749 2 0 0 98 5 370 0 0 109 1 344 11 27 11 0 1814 1 0 0 99 6 198 0 0 85 0 242 2 19 6 1 1548 1 0 0 99 7 0 0 0 78 3 272 5 19 2 0 1751 0 0 0 99 April 27, 2026 at 06:32:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2305 201 60 0 2 0 0 11 0 0 0 100 1 0 0 0 60 23 50 0 2 2 0 295 0 0 0 100 2 0 0 0 15 2 4 0 1 0 0 1 0 0 0 100 3 0 0 7 17 4 40 1 0 0 0 1687 0 0 0 100 4 6 0 21 231 109 22 0 0 1 0 284 0 0 0 100 5 1 0 0 122 30 120 0 5 0 0 10 0 0 0 100 6 0 0 0 13 2 4 0 1 0 0 11 0 0 0 100 7 0 0 0 19 3 15 0 3 2 0 302 0 0 0 100 April 27, 2026 at 06:32:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 200 60 0 5 13 0 38 0 1 0 99 1 0 0 0 22 2 18 2 2 4 0 314 0 0 0 100 2 0 0 7 16 2 9 0 3 10 0 2 0 0 0 100 3 0 0 7 25 4 59 1 1 6 1 1840 0 0 0 100 4 0 0 21 243 111 45 0 3 5 0 310 0 0 0 100 5 0 0 9 137 50 134 1 6 4 0 18 0 1 0 99 6 0 0 7 46 9 42 1 6 8 0 33 0 0 0 100 7 0 0 0 78 3 77 0 6 16 0 318 0 0 0 100 April 27, 2026 at 06:32:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 77 0 1 0 0 3 0 0 0 100 1 0 0 0 14 3 6 0 0 1 0 294 0 0 0 100 2 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 3 0 0 14 19 5 46 1 3 0 0 1598 0 0 0 100 4 0 0 21 240 116 28 1 0 0 0 282 0 0 0 100 5 0 0 0 122 39 115 0 5 0 0 1 0 0 0 100 6 0 0 0 38 12 28 0 1 0 0 3 0 0 0 100 7 0 0 0 19 4 16 0 1 3 0 298 0 0 0 100 April 27, 2026 at 06:32:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2310 201 291 0 21 214 0 0 0 1 0 99 1 0 0 0 176 38 233 1 17 150 0 294 0 0 0 100 2 0 0 0 96 2 142 0 15 131 0 2 0 0 0 100 3 0 0 7 153 43 226 2 14 177 0 1597 0 1 0 99 4 0 0 21 340 146 168 0 12 151 0 275 0 0 0 100 5 0 0 0 122 4 190 0 12 129 0 0 0 0 0 100 6 0 0 0 127 12 175 0 11 147 0 6 0 0 0 100 7 0 0 0 114 3 168 1 14 140 0 268 0 0 0 100 April 27, 2026 at 06:32:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2307 202 110 0 2 0 0 1 0 0 0 100 1 0 0 0 111 52 104 0 0 0 0 294 0 0 0 100 2 0 0 0 16 2 8 0 1 0 0 1 0 0 0 100 3 0 0 7 16 5 40 0 0 0 0 1598 0 0 0 100 4 0 0 21 224 109 16 0 0 0 0 272 0 0 0 100 5 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 14 3 6 0 0 0 0 328 0 0 0 100 April 27, 2026 at 06:32:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 33 0 143 2330 200 1209 40 126 27 0 6859 3 1 0 95 1 2 0 0 455 44 1130 26 92 19 0 6227 3 1 0 96 2 3 0 0 199 8 892 18 79 11 0 6910 3 1 0 97 3 2 0 7 556 5 1061 19 61 12 0 6754 2 1 0 97 4 2 0 18 324 111 719 9 55 12 0 6501 2 1 0 97 5 3 0 0 148 6 902 18 75 14 0 5714 3 1 0 97 6 0 0 0 148 4 973 23 56 18 0 4845 2 1 0 97 7 0 0 0 193 4 967 12 55 18 0 5020 3 1 0 97 April 27, 2026 at 06:32:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2304 200 116 0 4 0 0 23 0 0 0 100 1 0 0 0 14 2 6 0 1 0 0 294 0 0 0 100 2 0 0 0 16 2 10 0 1 0 0 0 0 0 0 100 3 0 0 7 29 8 54 1 2 0 0 1602 0 0 0 100 4 0 0 21 216 104 4 1 0 0 0 266 0 0 0 100 5 0 0 0 43 14 22 0 4 0 0 13 0 0 0 100 6 0 0 0 106 45 106 0 3 0 0 14 0 0 0 100 7 0 0 0 17 3 9 0 1 0 0 292 0 0 0 100 April 27, 2026 at 06:32:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2622 0 116 2308 202 125 2 10 7 15 449 0 1 0 98 1 88 0 0 48 2 58 1 11 12 13 444 0 0 0 100 2 63 0 2 44 3 49 0 5 5 7 89 0 0 0 100 3 46 0 7 116 13 159 1 9 10 7 1770 0 0 0 99 4 648 0 17 255 104 67 1 9 8 8 1228 1 1 0 99 5 10 0 0 39 1 39 0 9 3 3 86 0 0 0 100 6 10 0 0 134 49 125 0 9 3 2 71 0 0 0 100 7 24 0 0 53 8 48 0 7 1 2 371 0 0 0 100 April 27, 2026 at 06:32:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2312 200 312 0 34 293 0 20 0 1 0 99 1 0 0 0 116 2 230 0 19 282 0 294 0 0 0 100 2 0 0 0 112 1 225 0 25 269 0 0 0 0 0 100 3 0 0 0 178 64 344 1 28 235 0 1431 0 1 0 99 4 0 0 28 347 159 230 0 23 314 0 526 0 0 0 99 5 0 0 0 172 39 275 0 19 223 0 0 0 0 0 100 6 0 0 0 98 1 191 0 20 202 0 0 0 0 0 100 7 0 0 0 106 5 185 1 20 266 0 300 0 0 0 100 April 27, 2026 at 06:32:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 16 0 2 0 0 13 0 0 0 100 1 0 0 0 12 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 3 0 0 0 100 3 0 0 0 123 9 143 2 3 0 0 1501 0 0 0 100 4 0 0 28 219 105 12 0 2 0 0 526 0 0 0 100 5 0 0 0 96 44 88 0 2 0 0 0 0 0 0 100 6 0 0 0 21 6 14 0 2 0 0 1 0 0 0 100 7 0 0 0 14 3 11 0 3 2 0 306 0 0 0 100 April 27, 2026 at 06:32:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 114 0 0 0 0 13 0 0 0 100 1 0 0 0 12 3 6 0 0 0 0 294 0 0 0 100 2 0 0 0 19 5 14 0 1 0 0 6 0 0 0 100 3 0 0 0 12 3 35 0 0 0 0 1667 0 0 0 100 4 0 0 28 215 105 8 1 0 0 0 526 0 0 0 100 5 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 110 52 105 0 0 1 0 304 0 0 0 100 April 27, 2026 at 06:32:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 60 2310 201 340 8 25 3 0 1654 1 1 0 99 1 153 0 0 66 6 101 8 16 3 0 1768 0 0 0 99 2 3 0 0 105 8 297 8 20 2 0 1316 0 0 0 99 3 1 0 0 99 2 242 12 23 3 0 2816 1 0 0 99 4 0 0 23 301 105 249 5 20 1 0 2154 0 0 0 99 5 153 0 0 55 8 117 1 15 0 0 1617 1 0 0 99 6 262 0 14 47 2 81 2 10 0 0 1324 2 0 0 98 7 83 0 0 157 48 205 2 13 3 0 1509 1 0 0 99 April 27, 2026 at 06:32:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2307 201 108 0 1 0 0 3 0 0 0 100 1 0 0 0 114 51 108 0 1 0 0 308 0 0 0 100 2 17 0 0 17 3 10 0 2 0 0 10 0 0 0 100 3 0 0 0 35 10 58 1 3 1 0 1443 0 0 0 100 4 5 0 28 226 107 18 0 1 1 0 535 0 0 0 100 5 0 0 0 32 10 186 0 1 0 0 343 0 0 0 100 6 0 0 0 14 2 6 0 1 2 0 13 0 0 0 100 7 0 0 0 18 3 13 0 1 2 0 299 0 0 0 100 April 27, 2026 at 06:32:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 200 270 0 20 200 0 0 0 1 0 99 1 0 0 0 95 3 173 0 11 143 0 294 0 0 0 100 2 0 0 0 84 2 150 0 11 157 0 2 0 0 0 100 3 0 0 0 155 53 248 1 16 183 0 1437 0 1 0 99 4 0 0 28 422 194 270 0 16 152 0 527 0 0 0 100 5 0 0 0 84 2 153 0 12 154 0 1 0 0 0 100 6 0 0 0 84 0 155 0 12 133 0 0 0 0 0 100 7 0 0 0 74 2 130 1 12 165 0 300 0 0 0 100 April 27, 2026 at 06:33:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2314 202 130 2 5 11 0 84 0 1 0 99 1 0 0 0 43 10 45 0 10 12 0 319 0 0 0 100 2 0 0 0 19 2 14 0 2 3 0 17 0 0 0 100 3 0 0 7 30 5 64 3 3 4 1 1447 0 0 0 100 4 0 0 28 323 154 123 1 4 9 0 548 0 0 0 100 5 0 0 8 21 1 18 0 5 9 0 1 0 1 0 99 6 0 0 0 23 1 26 0 6 7 0 5 0 0 0 100 7 1 0 0 23 3 17 0 2 7 0 342 0 0 0 100 April 27, 2026 at 06:33:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2302 200 117 0 3 0 0 0 0 0 0 100 1 0 0 0 28 9 16 1 0 1 0 303 0 0 0 100 2 0 0 0 19 6 10 0 0 1 0 4 0 0 0 100 3 0 0 0 17 3 36 2 1 2 0 1337 0 0 0 100 4 0 0 35 313 154 110 0 1 1 0 527 0 0 0 100 5 0 0 0 11 2 2 0 0 1 0 0 0 0 0 100 6 0 0 0 14 2 4 0 0 1 0 1 0 0 0 100 7 0 0 0 16 3 8 0 1 1 0 300 0 0 0 100 April 27, 2026 at 06:33:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2302 200 123 0 0 0 0 13 0 0 0 99 1 0 0 0 44 10 20 0 0 0 0 305 0 0 0 100 2 0 0 0 35 5 12 1 0 0 0 7 0 0 0 100 3 0 0 0 30 2 39 1 1 1 0 1337 0 0 0 100 4 0 0 28 333 155 115 0 1 0 0 528 0 0 0 100 5 0 0 0 43 11 14 0 1 0 0 14 0 0 0 100 6 0 0 0 27 0 14 0 1 0 0 14 0 0 0 100 7 0 0 0 33 2 12 0 3 0 0 300 0 0 0 100 April 27, 2026 at 06:33:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 200 110 0 5 1 0 0 0 0 0 100 1 0 0 0 116 53 112 0 2 0 0 309 0 0 0 100 2 0 0 0 19 4 14 0 3 0 0 6 0 0 0 100 3 0 0 0 13 3 36 0 0 0 0 1339 0 0 0 100 4 0 0 28 228 110 18 0 1 0 0 526 0 0 0 100 5 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 35 4 26 1 3 0 0 277 0 0 0 100 April 27, 2026 at 06:33:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 4 0 175 2339 201 1361 29 133 260 0 6708 3 2 0 95 1 18 0 0 443 3 1348 18 107 213 0 6079 2 1 0 97 2 20 0 0 470 8 1207 15 96 264 0 5546 2 1 0 97 3 0 0 0 413 46 1142 15 76 257 0 7221 2 1 0 96 4 0 0 28 462 191 1196 11 74 246 0 7233 3 1 0 96 5 1 0 0 205 2 961 9 61 256 0 6268 2 1 0 97 6 0 0 0 207 3 1323 14 80 225 0 5040 2 1 0 96 7 10 0 0 265 2 1203 11 72 280 0 6361 2 1 0 97 April 27, 2026 at 06:33:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 106 0 2 0 0 0 0 0 0 100 1 0 0 0 99 45 90 1 1 0 0 294 0 0 0 100 2 0 0 0 17 4 13 0 3 0 0 2 0 0 0 100 3 0 0 0 11 2 34 1 0 0 0 1336 0 0 0 100 4 0 0 28 232 110 20 0 1 0 0 532 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 20 6 13 0 2 1 0 299 0 0 0 100 April 27, 2026 at 06:33:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 112 0 2 0 0 1 0 0 0 100 1 0 0 0 12 2 6 0 0 1 0 294 0 0 0 100 2 0 0 0 14 3 10 0 2 1 0 0 0 0 0 100 3 0 0 0 51 22 74 0 1 1 0 1337 0 0 0 100 4 0 0 28 280 137 79 0 2 0 0 531 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 11 2 4 0 0 0 0 5 0 0 0 100 7 0 0 0 16 3 8 0 1 2 0 304 0 0 0 100 April 27, 2026 at 06:33:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2298 200 114 0 1 0 0 12 0 0 0 99 1 0 0 0 12 2 4 0 0 2 0 294 0 0 0 100 2 0 0 0 13 2 8 0 0 0 0 5 0 0 0 100 3 0 0 0 14 2 40 1 1 0 0 1336 0 0 0 100 4 0 0 28 328 161 126 0 1 0 0 537 0 0 0 100 5 0 0 0 24 7 22 0 2 1 0 24 0 0 0 100 6 0 0 0 18 4 12 0 0 0 0 15 0 0 0 100 7 0 0 0 17 3 10 1 1 0 0 295 0 0 0 100 April 27, 2026 at 06:33:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 7 2305 201 98 0 2 0 0 5 0 0 0 100 1 0 0 0 12 2 8 0 1 0 0 308 0 0 0 100 2 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 25 8 48 1 0 0 0 1350 0 0 0 100 4 0 0 28 232 110 20 1 1 0 0 845 0 0 0 100 5 0 0 0 112 50 106 0 1 0 0 11 0 0 0 100 6 0 0 0 10 1 6 0 0 0 0 9 0 0 0 100 7 0 0 0 24 3 19 0 4 0 0 308 0 0 0 100 April 27, 2026 at 06:33:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 200 4 0 1 0 0 0 0 0 0 100 1 0 0 0 16 2 12 1 1 2 0 294 0 0 0 100 2 0 0 0 14 3 8 0 0 0 0 2 0 0 0 100 3 0 0 0 25 7 46 1 0 0 0 1341 0 0 0 100 4 0 0 28 219 105 18 0 2 0 0 527 0 0 0 100 5 0 0 0 110 51 106 0 0 0 0 10 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 121 3 115 0 1 2 0 302 0 0 0 100 April 27, 2026 at 06:33:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 8 0 0 0 0 1 0 0 0 100 1 0 0 0 19 3 12 0 2 1 0 294 0 0 0 100 2 0 0 0 11 2 6 0 0 0 0 1 0 0 0 100 3 0 0 0 14 3 36 1 0 0 0 1339 0 0 0 100 4 0 0 28 231 111 26 0 0 1 0 548 0 0 0 100 5 0 0 0 48 16 46 0 3 1 0 60 0 0 0 100 6 0 0 0 81 36 78 0 3 0 0 5 0 0 0 100 7 0 0 0 113 4 108 0 5 1 0 299 0 0 0 100 April 27, 2026 at 06:33:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 200 92 0 2 0 0 0 0 0 0 100 1 0 0 0 24 4 16 0 1 1 0 294 0 0 0 100 2 0 0 0 12 3 4 0 0 1 0 2 0 0 0 100 3 0 0 0 13 3 34 1 0 1 0 1337 0 0 0 100 4 0 0 28 223 109 18 0 0 1 0 533 0 0 0 100 5 0 0 0 15 5 6 0 0 1 0 11 0 0 0 100 6 0 0 0 36 14 26 0 1 1 0 5 0 0 0 100 7 0 0 0 110 42 100 1 1 2 0 300 0 0 0 100 April 27, 2026 at 06:33:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 113 0 7 2324 201 188 0 14 10 13 254 0 0 0 99 1 41 0 0 112 29 120 0 10 8 6 442 0 0 0 100 2 57 0 0 87 24 94 0 10 9 2 112 0 0 0 100 3 412 0 115 23 2 69 1 5 6 9 1509 0 0 0 99 4 8 0 28 253 108 53 1 5 5 6 932 0 0 0 100 5 3 0 0 53 11 30 1 1 3 2 61 0 0 0 100 6 5 0 0 39 1 33 0 3 3 2 85 0 0 0 100 7 2855 0 0 80 9 96 3 7 12 12 1536 1 1 0 98 April 27, 2026 at 06:33:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 38 0 3 0 0 0 0 0 0 100 1 0 0 0 20 2 14 1 0 1 0 297 0 0 0 100 2 0 0 0 93 42 86 0 2 0 0 2 0 0 0 100 3 0 0 0 14 3 36 2 0 0 0 1421 0 0 0 100 4 0 0 28 214 105 8 0 0 0 0 525 0 0 0 100 5 0 0 0 9 1 4 0 0 0 0 10 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 131 19 124 0 3 2 0 311 0 0 0 100 April 27, 2026 at 06:33:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 104 0 3 0 0 0 0 0 0 100 1 0 0 0 116 48 114 0 2 4 0 294 0 0 0 100 2 19 0 0 14 3 8 0 0 1 0 5 0 0 0 100 3 0 0 0 12 2 36 1 0 0 0 1416 0 0 0 100 4 0 0 28 214 105 8 0 0 0 0 526 0 0 0 100 5 21 0 0 16 3 14 0 2 2 0 15 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 25 9 18 0 0 0 0 299 0 0 0 100 April 27, 2026 at 06:33:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 22 0 1 1 0 0 0 0 0 100 1 0 0 0 87 4 82 0 2 0 0 294 0 0 0 100 2 0 0 0 29 9 22 0 2 0 0 2 0 0 0 100 3 0 0 0 12 2 36 0 1 0 0 1416 0 0 0 100 4 0 0 28 215 105 10 0 1 0 0 526 0 0 0 100 5 0 0 0 112 43 106 0 4 0 0 11 0 0 0 100 6 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 22 7 14 1 0 1 0 305 0 0 0 100 April 27, 2026 at 06:33:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 108 0 1 0 0 1 0 0 0 100 1 0 0 0 15 2 8 0 1 0 0 294 0 0 0 100 2 0 0 0 13 1 10 0 2 0 0 0 0 0 0 100 3 0 0 0 12 2 34 1 0 0 0 1416 0 0 0 100 4 0 0 28 226 109 20 1 0 0 0 534 0 0 0 100 5 0 0 0 110 51 104 0 0 0 0 10 0 0 0 100 6 0 0 0 8 0 4 0 0 0 0 5 0 0 0 100 7 0 0 0 21 5 14 0 1 1 0 626 0 0 0 100 April 27, 2026 at 06:33:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 120 0 3 0 0 13 0 0 0 100 1 0 0 0 17 3 12 1 2 1 0 294 0 0 0 100 2 0 0 0 13 2 6 0 0 0 0 5 0 0 0 100 3 0 0 0 13 2 36 2 0 0 0 1416 0 0 0 100 4 0 0 28 227 111 22 0 0 0 0 536 0 0 0 100 5 0 0 0 78 37 68 0 1 0 0 24 0 0 0 100 6 0 0 0 13 1 14 0 0 0 0 14 0 0 0 100 7 0 0 0 58 24 50 0 1 2 0 302 0 0 0 100 April 27, 2026 at 06:33:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 108 0 2 0 0 0 0 0 0 100 1 0 0 0 119 4 112 0 1 2 0 297 0 0 0 100 2 0 0 0 12 1 6 0 1 0 0 0 0 0 0 100 3 0 0 0 12 2 36 1 1 0 0 1416 0 0 0 100 4 0 0 28 229 112 20 0 0 0 0 535 0 0 0 100 5 0 0 0 11 2 6 0 0 0 0 11 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 10 2 4 0 0 1 0 297 0 0 0 100 April 27, 2026 at 06:33:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 200 108 0 0 0 0 0 0 0 0 100 1 0 0 0 116 52 110 0 0 1 0 294 0 0 0 100 2 0 0 0 16 4 12 0 1 0 0 2 0 0 0 100 3 0 0 0 13 2 36 0 0 0 0 1416 0 0 0 100 4 0 0 28 227 111 22 0 1 0 0 532 0 0 0 100 5 0 0 0 11 1 6 0 1 0 0 10 0 0 0 100 6 0 0 0 10 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 13 2 6 1 1 2 0 297 0 0 0 100 April 27, 2026 at 06:33:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 337 0 62 2309 203 309 3 27 2 1 1789 1 1 0 98 1 517 0 0 60 4 124 3 23 4 1 1338 2 0 0 98 2 11 0 0 226 51 474 7 41 6 0 1947 1 0 0 99 3 41 0 0 117 4 380 4 38 7 0 3378 1 0 0 99 4 37 0 22 327 107 436 10 35 3 0 2310 1 0 0 99 5 0 0 0 123 1 371 5 33 0 0 2042 0 0 0 99 6 40 0 0 65 4 161 6 18 8 0 1688 1 0 0 99 7 0 0 0 88 9 194 6 21 0 0 1584 1 0 0 99 April 27, 2026 at 06:33:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 107 0 1 1 0 0 0 0 0 100 1 0 0 0 14 3 4 1 0 1 0 294 0 0 0 100 2 0 0 0 110 52 102 0 0 1 0 2 0 0 0 100 3 0 0 0 18 4 38 2 1 1 0 1429 0 0 0 100 4 0 0 28 216 105 8 0 0 1 0 527 0 0 0 100 5 0 0 0 16 2 11 0 3 0 0 0 0 0 0 100 6 0 0 0 12 2 6 0 1 1 0 1 0 0 0 100 7 0 0 0 24 9 16 0 0 3 0 315 0 0 0 100 April 27, 2026 at 06:33:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 50 1 1 0 0 13 0 0 0 100 1 0 0 0 11 2 4 0 0 0 0 294 0 0 0 100 2 0 0 0 17 2 9 0 2 0 0 0 0 0 0 100 3 0 0 0 93 40 116 1 1 0 0 1431 0 0 0 100 4 0 0 28 214 105 8 0 0 0 0 525 0 0 0 100 5 0 0 0 123 21 115 0 1 1 0 13 0 0 0 100 6 0 0 0 19 2 14 0 0 0 0 13 0 0 0 100 7 0 0 0 34 12 26 0 0 2 0 312 0 0 0 100 April 27, 2026 at 06:33:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 110 0 1 0 0 5 0 0 0 100 1 0 0 0 11 2 8 0 2 0 0 305 0 0 0 100 2 0 0 0 15 3 8 0 0 0 0 5 0 0 0 100 3 0 0 0 12 3 36 0 0 0 0 1429 0 0 0 100 4 0 0 28 214 105 8 0 0 0 0 527 0 0 0 100 5 0 0 0 110 52 104 0 0 0 0 1 0 0 0 100 6 0 0 0 10 0 4 0 1 0 0 0 0 0 0 100 7 0 0 0 28 10 22 1 0 1 0 305 0 0 0 100 April 27, 2026 at 06:33:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2316 201 261 2 28 140 1 36 0 1 0 99 1 0 0 0 92 3 170 0 16 107 0 304 0 0 0 100 2 0 0 8 80 3 136 0 15 119 1 73 0 1 0 99 3 0 0 7 135 37 223 1 23 166 1 1416 0 1 0 99 4 0 0 28 318 141 165 1 13 162 0 560 0 0 0 100 5 0 0 0 167 49 228 0 14 172 0 19 0 0 0 100 6 0 0 0 93 1 154 0 18 115 0 30 0 0 0 100 7 0 0 0 86 6 153 0 16 185 0 341 0 0 0 100 April 27, 2026 at 06:33:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 105 0 3 0 0 0 0 0 0 100 1 0 0 7 14 2 6 1 1 0 0 294 0 0 0 100 2 0 0 0 19 5 12 0 2 0 0 2 0 0 0 100 3 0 0 0 64 25 80 2 2 0 0 1339 0 0 0 100 4 0 0 28 283 135 76 0 2 0 0 535 0 0 0 100 5 0 0 0 11 1 4 0 0 0 0 0 0 0 0 100 6 0 0 0 8 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 19 2 12 0 2 1 0 306 0 0 0 100 April 27, 2026 at 06:33:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 119 2306 201 113 0 1 0 0 1 0 0 0 100 1 0 0 0 36 5 12 0 0 1 0 297 0 0 0 100 2 0 0 0 31 3 12 0 3 0 0 0 0 0 0 100 3 0 0 0 26 2 34 0 0 0 0 1338 0 0 0 100 4 0 0 28 338 158 118 0 1 0 0 534 0 0 0 100 5 0 0 0 24 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 24 1 0 0 0 0 0 0 0 0 0 100 7 0 0 0 27 2 4 0 0 1 0 297 0 0 0 100 April 27, 2026 at 06:33:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 14 2305 200 140 0 3 0 0 13 0 0 0 100 1 0 0 0 14 2 6 0 1 0 0 294 0 0 0 100 2 0 0 0 19 6 10 0 0 0 0 2 0 0 0 100 3 0 0 0 109 49 134 1 1 0 0 1342 0 0 0 100 4 1 0 28 241 116 30 1 0 0 0 583 0 0 0 100 5 0 0 0 24 10 12 0 0 0 0 14 0 0 0 100 6 0 0 0 15 1 14 0 0 0 0 14 0 0 0 100 7 0 0 0 17 2 8 1 0 1 0 297 0 0 0 100 April 27, 2026 at 06:33:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 2 0 175 2340 203 1305 38 135 15 0 6352 3 1 0 95 1 1 0 0 348 7 1146 25 99 14 0 6508 3 1 0 96 2 1 0 0 478 4 931 13 63 13 0 7090 3 1 0 97 3 1 0 0 549 11 1175 15 57 11 0 6737 3 1 0 96 4 13 0 28 751 110 988 10 49 10 0 5755 2 1 0 96 5 0 0 0 270 8 988 13 40 10 0 6075 2 1 0 97 6 1 0 0 449 41 839 7 37 12 0 5895 3 1 0 97 7 1 0 0 204 3 736 8 38 11 0 7111 2 1 0 97 April 27, 2026 at 06:33:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2314 201 309 0 30 278 0 10 0 1 0 99 1 0 0 0 93 2 203 1 19 267 0 294 0 0 0 100 2 0 0 0 118 5 218 1 23 248 0 5 0 0 0 100 3 0 0 0 154 50 263 2 26 297 0 1340 0 1 0 99 4 0 0 28 342 154 212 0 22 281 0 528 0 1 0 99 5 0 0 0 95 5 172 0 17 215 0 5 0 0 0 100 6 0 0 0 214 50 342 0 21 210 0 0 0 0 0 100 7 0 0 0 95 2 175 0 23 185 0 300 0 0 0 100 April 27, 2026 at 06:33:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 80 0 1 0 0 11 0 0 0 100 1 0 0 0 15 1 10 0 0 0 0 294 0 0 0 100 2 0 0 0 125 41 118 0 2 0 0 7 0 0 0 100 3 0 0 0 14 3 38 1 1 0 0 1340 0 0 0 100 4 0 0 28 216 106 10 1 0 0 0 525 0 0 0 100 5 0 0 0 16 5 10 0 0 0 0 6 0 0 0 100 6 0 0 0 41 16 32 0 1 0 0 1 0 0 0 100 7 0 0 0 14 2 8 0 1 1 0 300 0 0 0 100 April 27, 2026 at 06:33:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2302 200 105 0 1 1 0 10 0 0 0 100 1 0 0 0 13 2 4 0 1 1 0 294 0 0 0 100 2 0 0 0 122 52 120 0 1 1 0 2 0 0 0 100 3 0 0 0 16 4 36 1 0 1 0 1339 0 0 0 100 4 0 0 28 216 106 10 0 0 1 0 526 0 0 0 100 5 0 0 0 25 7 19 1 3 0 0 6 0 0 0 100 6 0 0 0 13 3 4 0 0 1 0 2 0 0 0 100 7 0 0 0 14 3 4 1 0 3 0 306 0 0 0 100 April 27, 2026 at 06:33:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 44 0 7 2324 201 62 0 8 5 5 99 0 0 0 99 1 6 0 0 47 8 42 0 5 4 2 358 0 0 0 100 2 4 0 0 84 4 63 0 3 2 0 60 0 0 0 100 3 2621 0 115 34 3 90 2 2 7 11 1859 1 1 0 98 4 109 0 28 255 106 61 0 6 17 7 695 0 0 0 100 5 662 0 1 158 32 163 1 11 4 8 1292 1 0 0 99 6 33 0 0 105 30 111 0 11 3 5 158 0 0 0 100 7 20 0 0 40 2 36 0 5 6 2 384 0 0 0 100 April 27, 2026 at 06:33:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 201 8 0 0 0 0 10 0 0 0 100 1 0 0 0 23 8 16 1 0 2 0 304 0 0 0 100 2 0 0 0 19 2 14 0 0 0 0 2 0 0 0 100 3 0 0 0 19 4 46 2 1 0 0 1423 0 0 0 100 4 0 0 22 216 106 10 0 0 0 0 526 0 0 0 100 5 0 0 0 103 1 98 0 1 0 0 0 0 0 0 100 6 0 0 0 106 48 100 0 2 0 0 3 0 0 0 100 7 0 0 0 14 4 10 0 1 0 0 306 0 0 0 100 April 27, 2026 at 06:33:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 417 0 76 2308 201 376 2 16 7 1 1788 1 1 0 98 1 7 0 0 43 4 81 1 7 11 1 1034 2 0 0 98 2 91 0 0 115 3 255 1 24 4 0 1493 0 0 0 99 3 72 0 0 75 3 265 3 17 1 0 3363 1 1 0 98 4 53 0 28 293 111 319 5 20 6 0 2017 0 0 0 99 5 33 0 0 105 2 310 0 12 11 0 1776 1 0 0 99 6 250 0 0 71 0 275 1 23 3 0 1517 0 0 0 99 7 170 0 0 156 52 182 0 7 2 1 1573 1 0 0 99 April 27, 2026 at 06:33:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 200 98 0 1 0 0 0 0 0 0 100 1 0 0 0 22 7 14 0 0 2 0 300 0 0 0 100 2 0 0 0 19 2 12 0 1 0 0 2 0 0 0 100 3 0 0 0 13 3 38 1 1 1 0 1428 0 0 0 100 4 0 0 28 216 106 10 0 0 0 0 526 0 0 0 100 5 0 0 0 13 1 8 0 2 0 0 0 0 0 0 100 6 0 0 0 9 1 0 0 0 0 0 0 0 0 0 100 7 0 0 0 112 52 104 1 0 3 0 298 0 0 0 100 April 27, 2026 at 06:33:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1925 0 231 2333 202 346 10 49 141 9 2326 5 2 0 93 1 6461 0 32 169 22 316 8 47 171 17 2166 7 2 0 91 2 2659 0 17 202 14 369 32 47 146 11 2414 4 1 0 94 3 526 0 0 196 3 399 49 49 96 12 3066 5 1 0 94 4 1780 0 24 387 107 313 12 40 94 15 2280 3 1 0 97 5 1187 0 0 276 8 427 45 41 81 11 1499 2 1 0 97 6 824 0 7 156 2 295 11 36 87 13 1427 4 0 0 96 7 1422 0 0 198 22 536 65 35 122 14 2045 5 1 0 95 April 27, 2026 at 06:33:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2309 202 117 0 2 0 0 279 0 1 0 99 1 0 0 0 11 1 2 1 0 1 0 294 0 0 0 100 2 0 0 0 116 48 108 0 3 0 0 2 0 0 0 100 3 3 0 3 30 7 48 2 2 0 0 1427 0 0 0 100 4 0 0 21 217 105 10 0 1 0 0 263 0 0 0 100 5 0 0 0 22 8 16 0 0 1 0 14 0 0 0 100 6 0 0 0 21 3 16 0 1 0 0 15 0 0 0 100 7 38 0 0 27 8 18 0 0 2 0 303 0 0 0 100 April 27, 2026 at 06:33:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2308 205 125 0 2 1 0 271 0 0 0 100 1 0 0 0 15 2 6 0 2 0 0 305 0 0 0 100 2 0 0 0 113 53 106 0 1 0 0 0 0 0 0 100 3 0 0 0 19 5 42 1 0 1 0 1429 0 0 0 100 4 0 0 13 223 106 16 0 1 0 0 263 0 0 0 100 5 0 0 0 16 2 12 0 3 0 0 1 0 0 0 100 6 0 0 0 10 1 2 0 0 1 0 0 0 0 0 100 7 0 0 0 25 9 20 0 1 2 0 312 0 0 0 100 April 27, 2026 at 06:33:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 28 2308 202 269 1 20 223 0 266 0 1 0 99 1 0 0 0 88 1 163 0 14 95 0 294 0 0 0 100 2 0 0 0 109 12 174 1 13 139 0 2 0 0 0 100 3 0 0 0 133 42 204 1 13 136 0 1426 0 1 0 99 4 0 0 13 322 144 162 0 17 158 0 260 0 0 0 100 5 0 0 0 179 2 249 0 13 168 0 0 0 0 0 100 6 0 0 0 82 0 148 0 12 122 0 0 0 0 0 100 7 0 0 0 82 8 142 1 11 164 0 304 0 0 0 100 April 27, 2026 at 06:33:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 60 0 50 2313 201 200 4 19 3394 5 428 0 1 0 99 1 1127 0 12 52 1 100 1 12 3741 11 599 0 1 0 99 2 33 0 1 62 3 106 1 25 34 8 129 0 0 0 100 3 20 0 6 65 4 120 1 21 34 10 1284 0 0 0 99 4 32 0 35 263 107 78 3 14 4046 6 419 0 2 0 98 5 15 0 10 161 4 190 1 17 96 10 125 0 0 0 100 6 24 0 9 50 3 93 2 21 22 9 119 0 0 0 100 7 577 0 1 68 12 115 6 22 31 12 571 1 1 0 99 April 27, 2026 at 06:33:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 27 0 63 2307 202 127 0 2 5 5 283 0 1 0 99 1 6 0 0 114 43 106 1 0 8 3 312 0 0 0 100 2 134 0 0 50 11 41 0 3 3 2 26 0 0 0 100 3 286 0 0 34 6 51 3 2 9 3 1160 0 0 0 100 4 1 0 14 229 105 16 0 1 2 1 266 0 0 0 100 5 6 0 7 27 2 19 0 1 2 1 32 0 0 0 100 6 0 0 7 28 3 20 0 3 2 1 10 0 0 0 100 7 15 0 0 28 4 19 0 2 3 1 312 0 0 0 100 April 27, 2026 at 06:33:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2355 202 118 0 0 2 0 277 0 1 0 99 1 0 0 343 14 1 8 0 1 3 0 294 0 0 0 100 2 0 0 0 169 51 110 0 0 0 0 0 0 0 0 100 3 0 0 0 67 3 38 1 0 0 0 1055 0 0 0 100 4 0 0 14 272 105 10 0 0 0 0 259 0 0 0 100 5 0 0 1 76 9 14 0 1 1 0 14 0 0 0 100 6 0 0 0 65 0 12 0 0 0 0 13 0 0 0 100 7 0 0 7 69 2 12 0 3 1 0 300 0 0 0 100 April 27, 2026 at 06:33:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 42 2305 202 112 1 2 0 0 266 0 1 0 99 1 0 0 0 11 1 2 0 0 0 0 294 0 0 0 100 2 0 0 0 121 52 112 0 0 0 0 2 0 0 0 100 3 0 0 0 15 3 36 0 0 1 0 1055 0 0 0 100 4 0 0 14 219 105 8 0 0 0 0 259 0 0 0 100 5 0 0 0 17 1 10 0 0 0 0 0 0 0 0 100 6 0 0 0 11 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 17 2 6 1 0 0 0 295 0 0 0 100 April 27, 2026 at 06:33:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2304 202 108 0 2 0 0 266 0 0 0 100 1 0 0 0 9 1 2 0 0 0 0 294 0 0 0 100 2 0 0 0 118 50 116 0 1 0 0 0 0 0 0 100 3 0 0 0 14 3 38 1 0 0 0 1055 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 0 8 1 2 0 0 0 0 0 0 0 0 100 6 0 0 0 12 2 4 0 0 0 0 1 0 0 0 100 7 0 0 0 13 2 9 0 1 3 0 310 0 0 0 100 April 27, 2026 at 06:33:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 1 0 21 2308 202 117 0 2 0 0 283 0 1 0 99 1 0 0 0 52 22 44 1 1 1 0 294 0 0 0 100 2 2 0 0 81 4 80 0 2 37 0 104 0 0 0 100 3 858 0 1 25 4 54 1 5 63 0 1772 0 1 0 99 4 505 0 15 220 105 14 0 1 23 0 394 0 0 0 100 5 327 0 1 32 10 22 1 4 11 0 110 0 0 0 100 6 0 0 0 14 0 12 0 1 0 0 14 0 0 0 100 7 0 0 0 30 11 24 0 0 2 0 304 0 0 0 100 April 27, 2026 at 06:33:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 21 2302 203 92 0 2 0 0 266 0 0 0 99 1 0 0 0 9 1 2 0 0 0 0 294 0 0 0 100 2 0 0 0 28 8 18 0 1 0 0 0 0 0 0 100 3 0 0 0 13 3 38 1 1 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 0 35 4 28 0 2 0 0 0 0 0 0 100 6 0 0 0 89 40 84 0 1 1 0 0 0 0 0 100 7 0 0 0 55 22 52 0 3 1 0 325 0 0 0 100 April 27, 2026 at 06:33:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 20 2307 202 59 1 2 0 0 16 0 0 0 100 1 0 0 0 8 1 2 0 0 1 0 294 0 0 0 100 2 0 0 0 13 2 10 0 1 0 0 13 0 0 0 100 3 0 0 0 17 3 48 0 1 0 0 1060 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 1 27 7 16 1 2 0 0 251 0 0 0 100 6 0 0 0 63 24 60 0 1 0 0 19 0 0 0 100 7 0 0 0 155 50 148 1 3 1 0 323 0 0 0 100 April 27, 2026 at 06:33:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 104 0 1 0 0 0 0 0 0 100 1 0 0 0 14 3 10 0 2 1 0 294 0 0 0 100 2 0 0 0 9 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 13 3 36 1 0 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 19 3 16 0 2 0 0 267 0 0 0 100 6 0 0 0 12 1 6 0 1 0 0 1 0 0 0 100 7 0 0 0 148 70 138 0 0 0 0 321 0 0 0 100 April 27, 2026 at 06:33:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2309 202 157 0 5 52 0 0 0 0 0 100 1 0 0 0 157 51 199 1 5 113 0 294 0 0 0 100 2 0 0 0 64 2 110 0 4 100 0 2 0 0 0 100 3 0 0 0 83 29 136 2 5 90 0 1047 0 0 0 100 4 0 0 14 271 132 76 0 4 101 0 259 0 0 0 100 5 0 0 14 63 2 112 0 8 49 0 266 0 0 0 100 6 0 0 0 69 0 124 0 6 100 0 0 0 0 0 100 7 0 0 0 88 22 120 0 5 98 0 312 0 0 0 100 April 27, 2026 at 06:33:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 201 102 0 1 0 0 0 0 0 0 100 1 0 0 0 107 51 102 0 0 0 0 294 0 0 0 100 2 0 0 0 16 2 12 0 1 0 0 6 0 0 0 100 3 0 0 0 17 4 42 1 0 0 0 1052 0 0 0 100 4 0 0 8 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 20 5 14 0 0 0 0 266 0 0 0 100 6 0 0 0 11 1 4 1 0 0 0 4 0 0 0 100 7 0 0 0 49 22 46 0 1 0 0 321 0 0 0 100 April 27, 2026 at 06:33:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 201 112 0 2 1 0 0 0 0 0 100 1 0 0 0 92 43 82 0 0 2 0 294 0 0 0 100 2 0 0 0 30 11 24 0 1 1 0 2 0 0 0 100 3 0 0 0 18 4 38 0 1 1 0 1047 0 0 0 100 4 0 0 14 222 105 19 0 3 0 0 259 0 0 0 100 5 0 0 14 13 3 4 1 0 1 0 266 0 0 0 100 6 0 0 0 10 2 2 0 0 1 0 1 0 0 0 100 7 0 0 0 53 23 44 1 0 1 0 325 0 0 0 100 April 27, 2026 at 06:33:52 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 202 110 0 1 0 0 0 0 0 0 100 1 0 0 0 8 1 4 0 1 2 0 294 0 0 0 100 2 0 0 0 72 30 68 1 1 0 0 9 0 0 0 100 3 0 0 0 16 2 44 2 0 0 0 1055 0 0 0 100 4 0 0 8 219 105 10 0 0 1 0 259 0 0 0 100 5 0 0 14 15 8 6 0 1 1 0 266 0 0 0 100 6 0 0 0 11 0 14 0 2 0 0 20 0 0 0 100 7 0 0 0 99 45 96 0 2 0 0 324 0 0 0 100 April 27, 2026 at 06:33:53 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2306 202 112 0 2 0 0 1 0 0 0 100 1 0 0 0 107 50 102 1 1 0 0 294 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 3 0 0 0 10 2 34 1 0 0 0 1048 0 0 0 100 4 0 0 8 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 8 2 6 0 0 0 0 266 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 55 23 47 0 2 0 0 314 0 0 0 100 April 27, 2026 at 06:33:54 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 116 0 1 0 0 0 0 0 0 100 1 0 0 0 110 52 104 0 0 1 0 294 0 0 0 100 2 0 0 0 10 1 10 0 1 1 0 0 0 0 0 100 3 0 0 0 14 2 38 1 1 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 9 0 4 0 0 0 0 0 0 0 0 100 7 0 0 0 55 22 52 0 1 0 0 316 0 0 0 100 April 27, 2026 at 06:33:55 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2304 201 122 0 2 1 0 0 0 0 0 100 1 0 0 0 109 52 104 0 0 0 0 294 0 0 0 100 2 0 0 0 9 2 4 0 0 0 0 2 0 0 0 100 3 0 0 0 11 2 34 1 0 0 0 1047 0 0 0 100 4 0 0 8 215 105 8 0 0 0 0 260 0 0 0 100 5 0 0 14 8 2 6 1 1 0 0 266 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 54 22 48 1 1 0 0 320 0 0 0 100 April 27, 2026 at 06:33:56 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 108 0 1 0 0 1 0 0 0 100 1 0 0 0 110 52 104 0 0 0 0 294 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 10 2 34 0 0 0 0 1046 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 7 0 0 0 55 22 48 0 1 0 0 326 0 0 0 100 April 27, 2026 at 06:33:57 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 112 0 1 0 0 0 0 0 0 100 1 0 0 0 112 52 106 1 1 0 0 294 0 0 0 100 2 1 0 0 21 4 18 0 0 0 0 20 0 0 0 100 3 0 0 0 18 2 44 3 0 0 0 1057 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 15 8 4 0 0 0 0 265 0 0 0 100 6 0 0 0 11 0 8 0 1 0 0 11 0 0 0 100 7 0 0 0 54 22 50 0 1 0 0 316 0 0 0 100 April 27, 2026 at 06:33:58 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 112 0 1 0 0 2 0 0 0 100 1 0 0 0 113 52 108 0 0 0 0 295 0 0 0 100 2 0 0 0 15 1 10 0 2 0 0 0 0 0 0 100 3 0 0 0 11 2 36 1 1 0 0 1047 0 0 0 100 4 0 0 14 218 106 10 0 0 0 0 261 0 0 0 100 5 0 0 14 10 3 6 0 0 0 0 267 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 53 23 48 0 0 1 0 328 0 0 0 100 April 27, 2026 at 06:33:59 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 202 110 0 1 0 0 0 0 0 0 100 1 0 0 0 110 52 104 0 0 2 0 294 0 0 0 100 2 0 0 0 15 3 14 0 1 1 0 3 0 0 0 100 3 0 0 0 11 2 36 0 0 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 9 2 4 1 0 0 0 266 0 0 0 100 6 0 0 0 11 0 6 0 1 0 0 0 0 0 0 100 7 0 0 0 52 22 46 1 0 0 0 316 0 0 0 100 April 27, 2026 at 06:34:00 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 108 0 2 0 0 0 0 0 0 100 1 0 0 0 110 52 104 0 0 0 0 294 0 0 0 100 2 0 0 0 16 4 10 0 0 0 0 3 0 0 0 100 3 0 0 0 14 3 38 1 1 1 0 1048 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 14 1 6 0 1 0 0 1 0 0 0 100 7 0 0 0 52 23 46 0 0 0 0 345 0 0 0 100 April 27, 2026 at 06:34:01 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 109 0 1 1 0 0 0 0 0 100 1 0 0 0 95 44 84 1 0 1 0 294 0 0 0 100 2 0 0 0 29 11 24 0 1 1 0 2 0 0 0 100 3 0 0 0 15 3 36 1 0 1 0 1047 0 0 0 100 4 0 0 14 217 105 10 0 1 1 0 259 0 0 0 100 5 0 0 14 10 3 4 0 0 1 0 266 0 0 0 100 6 0 0 0 15 2 7 0 2 0 0 1 0 0 0 100 7 0 0 0 53 23 44 0 0 4 0 324 0 0 0 100 April 27, 2026 at 06:34:02 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 114 0 3 0 0 0 0 0 0 100 1 0 0 0 64 28 60 0 3 0 0 294 0 0 0 100 2 0 0 0 65 25 64 0 1 0 0 20 0 0 0 100 3 1 0 0 20 2 48 1 0 0 0 1057 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 16 8 4 0 0 0 0 266 0 0 0 100 6 0 0 0 14 0 10 0 1 0 0 11 0 0 0 100 7 0 0 0 53 22 46 0 0 1 0 315 0 0 0 100 April 27, 2026 at 06:34:03 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 108 0 1 0 0 0 0 0 0 100 1 0 0 0 110 52 104 0 0 0 0 294 0 0 0 100 2 0 0 0 12 2 4 0 0 0 0 2 0 0 0 100 3 0 0 0 15 2 40 1 2 1 0 1048 0 0 0 100 4 0 0 14 220 105 16 0 0 0 0 259 0 0 0 100 5 0 0 14 8 2 6 1 1 0 0 266 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 50 22 44 1 0 0 0 317 0 0 0 100 April 27, 2026 at 06:34:04 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 99 0 1 0 0 0 0 0 0 100 1 0 0 0 27 9 18 0 1 0 0 294 0 0 0 100 2 0 0 0 13 2 10 0 1 0 0 1 0 0 0 100 3 0 0 0 111 45 134 0 1 0 0 1046 0 0 0 100 4 0 0 14 218 105 10 0 0 0 0 259 0 0 0 100 5 0 0 14 9 2 8 0 2 0 0 266 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 50 22 44 0 0 1 0 328 0 0 0 100 April 27, 2026 at 06:34:05 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 201 106 0 1 0 0 0 0 0 0 100 1 0 0 0 14 2 8 1 1 0 0 294 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 3 0 0 0 111 52 134 2 0 0 0 1047 0 0 0 100 4 0 0 8 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 49 22 46 0 1 0 0 318 0 0 0 100 April 27, 2026 at 06:34:06 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2306 202 110 0 1 0 0 1 0 0 0 100 1 0 0 0 10 2 6 0 1 1 0 294 0 0 0 100 2 0 0 0 7 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 105 50 128 0 0 0 0 1049 0 0 0 100 4 0 0 8 222 107 15 0 2 0 0 259 0 0 0 100 5 0 0 14 9 2 6 0 0 0 0 266 0 0 0 100 6 0 0 0 6 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 51 22 46 0 1 2 0 320 0 0 0 100 April 27, 2026 at 06:34:07 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 108 0 1 0 0 0 0 0 0 100 1 0 0 0 12 2 4 0 0 0 0 294 0 0 0 100 2 0 0 0 22 4 20 0 0 0 0 30 0 0 0 100 3 0 0 0 20 2 51 1 3 0 0 1057 0 0 0 100 4 0 0 14 314 154 106 0 0 0 0 259 0 0 0 100 5 0 0 14 16 9 4 0 0 0 0 266 0 0 0 100 6 0 0 0 13 0 12 0 0 0 0 5 0 0 0 100 7 0 0 0 57 22 54 1 3 2 0 314 0 0 0 100 April 27, 2026 at 06:34:08 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 76 0 1 0 0 0 0 0 0 100 1 0 0 0 15 2 7 0 1 1 0 294 0 0 0 100 2 0 0 0 8 1 4 0 1 0 0 0 0 0 0 100 3 0 0 0 39 3 58 1 0 0 0 1048 0 0 0 100 4 0 0 14 247 118 38 0 2 0 0 259 0 0 0 100 5 0 0 14 79 37 74 1 1 0 0 267 0 0 0 100 6 0 0 0 13 3 8 0 1 0 0 1 0 0 0 100 7 0 0 0 54 22 50 0 2 1 0 328 0 0 0 100 April 27, 2026 at 06:34:09 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 110 0 2 0 0 0 0 0 0 100 1 0 0 0 18 2 11 1 2 1 0 294 0 0 0 100 2 0 0 0 11 2 10 0 1 0 0 2 0 0 0 100 3 0 0 0 13 2 34 1 0 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 12 2 10 0 2 0 0 266 0 0 0 100 6 0 0 0 109 51 104 0 1 0 0 24 0 0 0 100 7 0 0 0 68 22 58 0 0 2 0 318 0 0 0 100 April 27, 2026 at 06:34:10 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 37 0 3 2 0 0 0 0 0 100 1 0 0 0 14 2 6 0 1 0 0 294 0 0 0 100 2 0 0 0 11 2 6 0 1 0 0 1 0 0 0 100 3 0 0 0 13 3 36 1 0 0 0 1047 0 0 0 100 4 0 0 14 220 106 14 0 0 0 0 268 0 0 0 100 5 0 0 14 111 4 108 1 3 0 0 284 0 0 0 100 6 0 0 0 89 39 80 0 1 0 0 1 0 0 0 100 7 0 0 0 50 22 46 0 1 0 0 319 0 0 0 100 April 27, 2026 at 06:34:11 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 97 0 0 1 0 0 0 0 0 100 1 0 0 0 28 10 22 0 1 2 0 294 0 0 0 100 2 0 0 0 14 4 6 0 0 1 0 2 0 0 0 100 3 0 0 0 13 3 34 1 0 1 0 1049 0 0 0 100 4 0 0 14 216 105 8 0 0 1 0 259 0 0 0 100 5 0 0 14 105 3 98 0 0 1 0 266 0 0 0 100 6 0 0 0 11 2 2 0 0 1 0 1 0 0 0 100 7 0 0 0 58 23 51 1 2 3 0 319 0 0 0 100 April 27, 2026 at 06:34:12 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 97 0 3 0 0 0 0 0 0 100 1 0 0 0 25 6 16 0 1 1 0 294 0 0 0 100 2 0 0 0 21 2 22 0 2 1 0 24 0 0 0 100 3 0 0 0 15 2 46 0 1 0 0 1057 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 21 11 4 1 0 1 0 266 0 0 0 100 6 0 0 0 19 1 18 0 2 0 0 9 0 0 0 100 7 0 0 0 152 67 147 0 1 0 0 326 0 0 0 100 April 27, 2026 at 06:34:13 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 43 0 1 0 0 0 0 0 0 100 1 0 0 0 11 1 4 1 1 0 0 294 0 0 0 100 2 0 0 0 15 2 8 0 1 1 0 2 0 0 0 100 3 0 0 0 13 2 36 2 1 1 0 1048 0 0 0 100 4 0 0 14 217 105 10 0 1 0 0 259 0 0 0 100 5 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 71 0 64 0 1 0 0 0 0 0 0 100 7 0 0 0 152 72 146 0 2 3 0 320 0 0 0 100 April 27, 2026 at 06:34:14 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 112 0 1 0 0 0 0 0 0 100 1 0 0 0 15 4 10 0 1 0 0 294 0 0 0 100 2 0 0 0 10 1 8 0 1 0 0 0 0 0 0 100 3 0 0 0 11 2 34 1 0 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 8 2 4 0 0 0 0 265 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 150 70 141 0 1 1 0 318 0 0 0 100 April 27, 2026 at 06:34:15 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 112 0 2 0 0 0 0 0 0 100 1 0 0 0 109 50 102 0 2 1 0 294 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 2 0 0 0 100 3 0 0 0 11 2 38 0 2 0 0 1047 0 0 0 100 4 0 0 14 218 105 10 0 0 0 0 259 0 0 0 100 5 0 0 14 9 2 6 0 1 0 0 266 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 53 22 44 1 0 0 0 312 0 0 0 100 April 27, 2026 at 06:34:16 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 111 0 4 0 0 1 0 0 0 100 1 0 0 0 96 44 88 0 1 0 0 294 0 0 0 100 2 0 0 0 28 6 20 0 3 0 0 0 0 0 0 100 3 0 0 0 14 2 36 1 0 2 0 1046 0 0 0 100 4 0 0 14 217 105 14 0 1 0 0 259 0 0 0 100 5 0 0 14 9 2 6 1 1 0 0 266 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 50 22 44 0 0 2 0 326 0 0 0 100 April 27, 2026 at 06:34:17 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 112 0 2 0 0 0 0 0 0 100 1 0 0 0 65 29 58 1 1 1 0 294 0 0 0 100 2 1 0 0 14 2 10 0 0 0 0 11 0 0 0 100 3 0 0 0 16 2 44 1 0 0 0 1062 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 21 9 10 0 2 0 0 266 0 0 0 100 6 0 0 0 21 3 18 0 0 0 0 20 0 0 0 100 7 0 0 0 101 45 97 0 1 1 0 324 0 0 0 100 April 27, 2026 at 06:34:18 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 43 0 3 0 0 0 0 0 0 100 1 0 0 0 15 2 6 0 1 1 0 294 0 0 0 100 2 0 0 0 9 1 2 0 0 0 0 0 0 0 0 100 3 0 0 0 11 2 36 1 1 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 109 3 102 0 0 0 0 267 0 0 0 100 6 0 0 0 11 0 8 0 3 0 0 0 0 0 0 100 7 0 0 0 119 56 111 0 0 1 0 316 0 0 0 100 April 27, 2026 at 06:34:19 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 203 116 0 0 0 0 0 0 0 0 100 1 0 0 0 9 1 4 0 1 0 0 294 0 0 0 100 2 0 0 0 11 2 10 0 1 0 0 2 0 0 0 100 3 0 0 0 12 2 34 1 0 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 108 0 102 0 0 1 0 0 0 0 0 100 7 0 0 0 53 22 48 1 1 0 0 320 0 0 0 100 April 27, 2026 at 06:34:20 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 201 113 0 0 0 0 0 0 0 0 100 1 0 0 0 11 2 4 0 1 1 0 294 0 0 0 100 2 0 0 0 10 2 6 0 1 0 0 1 0 0 0 100 3 0 0 0 11 3 36 0 0 0 0 1047 0 0 0 100 4 0 0 8 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 7 2 4 1 0 0 0 266 0 0 0 100 6 0 0 0 103 1 98 0 1 0 0 1 0 0 0 100 7 0 0 0 53 23 48 0 1 1 0 343 0 0 0 100 April 27, 2026 at 06:34:21 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 128 0 1 0 0 0 0 0 0 100 1 0 0 0 93 43 82 1 0 2 0 294 0 0 0 100 2 0 0 0 31 12 26 0 1 1 0 2 0 0 0 100 3 0 0 0 14 3 34 2 0 1 0 1048 0 0 0 100 4 0 0 14 216 105 8 0 0 1 0 259 0 0 0 100 5 0 0 14 10 3 4 0 0 1 0 266 0 0 0 100 6 0 0 0 12 3 4 0 0 1 0 2 0 0 0 100 7 0 0 0 54 23 46 0 1 3 0 316 0 0 0 100 April 27, 2026 at 06:34:22 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 201 114 0 0 0 0 0 0 0 0 100 1 0 0 0 8 1 4 0 1 1 0 294 0 0 0 100 2 0 0 0 114 52 114 0 0 0 0 5 0 0 0 100 3 0 0 0 16 2 46 1 0 1 0 1059 0 0 0 100 4 0 0 8 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 15 8 4 0 0 1 0 266 0 0 0 100 6 0 0 0 17 2 16 0 0 0 0 28 0 0 0 100 7 0 0 0 56 22 50 0 1 1 0 322 0 0 0 100 April 27, 2026 at 06:34:23 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 201 106 0 1 0 0 0 0 0 0 100 1 0 0 0 7 1 2 0 0 2 0 294 0 0 0 100 2 0 0 0 107 51 100 0 0 0 0 2 0 0 0 100 3 0 0 0 14 4 40 0 1 0 0 1046 0 0 0 100 4 0 0 8 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 7 2 6 0 1 0 0 266 0 0 0 100 6 0 0 0 9 0 6 0 2 0 0 0 0 0 0 100 7 0 0 0 52 22 44 1 0 1 0 318 0 0 0 100 April 27, 2026 at 06:34:24 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 17 0 2 0 0 0 0 0 0 100 1 0 0 0 14 1 10 0 2 0 0 294 0 0 0 100 2 0 0 0 13 2 12 0 3 0 0 0 0 0 0 100 3 0 0 0 109 46 130 1 5 1 0 1048 0 0 0 100 4 0 0 14 217 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 8 2 4 1 0 0 0 266 0 0 0 100 6 0 0 0 102 3 92 0 4 0 0 0 0 0 0 100 7 0 0 0 57 25 52 0 1 1 0 324 0 0 0 100 April 27, 2026 at 06:34:25 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 201 4 0 1 0 0 0 0 0 0 100 1 0 0 0 116 1 110 1 1 0 0 294 0 0 0 100 2 0 0 0 12 3 8 0 1 0 0 3 0 0 0 100 3 0 0 0 12 2 36 1 0 0 0 1046 0 0 0 100 4 0 0 8 217 105 10 0 1 0 0 259 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 149 72 145 0 1 1 0 320 0 0 0 100 April 27, 2026 at 06:34:26 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 202 8 0 0 0 0 1 0 0 0 100 1 0 0 0 112 1 104 0 0 1 0 294 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 13 2 34 1 0 0 0 1048 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 10 0 8 0 3 0 0 0 0 0 0 100 7 0 0 0 150 72 144 0 0 2 0 321 0 0 0 100 April 27, 2026 at 06:34:27 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 201 12 0 1 1 0 0 0 0 0 100 1 0 0 0 16 1 10 0 1 1 0 294 0 0 0 100 2 0 0 0 24 5 22 0 0 0 0 29 0 0 0 100 3 0 0 0 16 2 46 1 1 0 0 1059 0 0 0 100 4 0 0 14 220 105 12 0 0 1 0 259 0 0 0 100 5 1 0 14 17 9 4 1 0 0 0 311 0 0 0 100 6 0 0 0 112 0 110 0 0 0 0 5 0 0 0 100 7 0 0 0 154 72 148 1 0 2 0 319 0 0 0 100 April 27, 2026 at 06:34:28 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 10 0 1 0 0 0 0 0 0 100 1 0 0 0 16 1 10 0 0 2 0 294 0 0 0 100 2 0 0 0 11 2 4 0 0 0 0 0 0 0 0 100 3 0 0 0 10 2 34 0 0 0 0 1047 0 0 0 100 4 0 0 14 218 105 10 0 0 0 0 259 0 0 0 100 5 0 0 14 11 3 12 0 2 0 0 267 0 0 0 100 6 0 0 0 102 0 94 0 0 0 0 0 0 0 0 100 7 0 0 0 150 72 144 0 0 1 0 320 0 0 0 100 April 27, 2026 at 06:34:29 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 5 2305 202 106 0 0 0 0 0 0 0 0 100 1 0 0 0 17 1 10 1 0 1 0 294 0 0 0 100 2 0 0 0 12 3 10 0 0 0 0 2 0 0 0 100 3 0 0 0 11 2 34 2 0 0 0 1046 0 0 0 100 4 0 0 8 215 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 7 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 150 72 146 0 1 1 0 318 0 0 0 100 April 27, 2026 at 06:34:30 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 104 0 3 0 0 0 0 0 0 100 1 0 0 0 113 49 108 0 1 0 0 294 0 0 0 100 2 0 0 0 12 3 6 0 0 0 0 1 0 0 0 100 3 0 0 0 12 3 36 0 0 1 0 1049 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 14 2 12 1 2 0 0 266 0 0 0 100 6 0 0 0 14 1 10 0 1 0 0 1 0 0 0 100 7 0 0 0 52 23 44 0 0 1 0 318 0 0 0 100 April 27, 2026 at 06:34:31 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2303 200 29 0 2 0 0 0 0 0 0 100 1 0 0 0 117 16 112 0 2 1 0 294 0 0 0 100 2 0 0 0 89 39 80 0 2 1 0 2 0 0 0 100 3 0 0 0 14 3 34 1 0 1 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 1 0 259 0 0 0 100 5 0 0 14 17 3 8 0 0 1 0 266 0 0 0 100 6 0 0 0 12 2 4 0 0 2 0 1 0 0 0 100 7 0 0 0 56 23 50 1 1 3 0 322 0 0 0 100 April 27, 2026 at 06:34:32 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 112 0 1 0 0 0 0 0 0 100 1 0 0 0 116 51 110 0 1 1 0 294 0 0 0 100 2 0 0 0 19 2 16 0 1 0 0 21 0 0 0 100 3 0 0 0 17 2 46 1 1 0 0 1059 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 18 11 4 0 0 0 0 266 0 0 0 100 6 0 0 0 17 2 14 0 0 0 0 10 0 0 0 100 7 0 0 0 54 22 48 0 0 1 0 320 0 0 0 100 April 27, 2026 at 06:34:33 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2305 201 100 0 1 0 0 0 0 0 0 100 1 0 0 0 115 50 106 1 0 0 0 294 0 0 0 100 2 0 0 0 14 3 10 0 2 0 0 2 0 0 0 100 3 0 0 0 17 3 42 1 2 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 8 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 8 1 2 0 0 0 0 1 0 0 0 100 7 0 0 0 57 22 52 0 0 1 0 318 0 0 0 100 April 27, 2026 at 06:34:34 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 202 16 0 1 0 0 0 0 0 0 100 1 0 0 0 15 1 10 0 0 0 0 294 0 0 0 100 2 0 0 0 108 51 106 0 0 0 0 0 0 0 0 100 3 0 0 0 109 3 130 1 0 0 0 1047 0 0 0 100 4 0 0 8 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 8 2 4 1 0 0 0 266 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 56 22 53 0 2 3 0 322 0 0 0 100 April 27, 2026 at 06:34:35 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2304 201 102 0 0 0 0 0 0 0 0 100 1 0 0 0 16 1 10 0 0 0 0 294 0 0 0 100 2 0 0 0 109 52 104 0 0 0 0 2 0 0 0 100 3 0 0 0 12 3 36 1 0 0 0 1047 0 0 0 100 4 0 0 8 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 7 2 6 0 1 0 0 266 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 52 22 46 1 1 1 0 318 0 0 0 100 April 27, 2026 at 06:34:36 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2306 202 106 0 1 0 0 1 0 0 0 100 1 0 0 0 16 1 10 0 0 1 0 294 0 0 0 100 2 0 0 0 107 51 102 0 0 0 0 0 0 0 0 100 3 0 0 0 11 3 36 0 0 0 0 1047 0 0 0 100 4 0 0 8 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 7 2 4 0 0 0 0 266 0 0 0 100 6 0 0 0 5 0 2 0 1 0 0 0 0 0 0 100 7 0 0 0 56 22 52 0 1 1 0 324 0 0 0 100 April 27, 2026 at 06:34:37 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2304 201 106 0 1 1 0 0 0 0 0 100 1 0 0 0 17 1 12 1 1 1 0 294 0 0 0 100 2 0 0 0 111 50 108 0 0 0 0 7 0 0 0 100 3 0 0 0 25 4 54 2 3 1 0 1059 0 0 0 100 4 0 0 13 219 106 12 0 1 0 0 259 0 0 0 100 5 0 0 14 14 8 4 0 0 0 0 266 0 0 0 100 6 0 0 0 17 2 14 0 0 0 0 26 0 0 0 100 7 0 0 0 59 22 50 0 0 2 0 318 0 0 0 100 April 27, 2026 at 06:34:38 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 203 68 0 2 0 0 0 0 0 0 100 1 0 0 0 18 2 14 0 2 1 0 294 0 0 0 100 2 0 0 0 10 2 4 0 0 1 0 0 0 0 0 100 3 0 0 0 62 4 84 1 2 1 0 1047 0 0 0 100 4 0 0 14 317 155 109 0 1 1 0 259 0 0 0 100 5 0 0 14 13 3 8 1 2 0 0 267 0 0 0 100 6 0 0 0 8 1 2 0 0 1 0 0 0 0 0 100 7 0 0 0 54 23 47 0 1 2 0 322 0 0 0 100 April 27, 2026 at 06:34:39 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 203 14 0 1 0 0 0 0 0 0 100 1 0 0 0 11 1 6 0 2 1 0 294 0 0 0 100 2 0 0 0 11 2 8 0 0 0 0 2 0 0 0 100 3 0 0 0 116 22 136 0 4 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 107 30 102 0 5 0 0 266 0 0 0 100 6 0 0 0 11 2 6 0 1 0 0 0 0 0 0 100 7 0 0 0 55 22 48 1 0 3 0 318 0 0 0 100 April 27, 2026 at 06:34:40 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 90 0 0 1 0 0 0 0 0 100 1 0 0 0 10 2 4 0 0 0 0 294 0 0 0 100 2 0 0 0 10 2 4 0 0 0 0 1 0 0 0 100 3 0 0 0 21 3 46 1 2 0 0 1048 0 0 0 100 4 0 0 14 222 107 16 0 0 0 0 295 0 0 0 100 5 0 0 14 109 44 106 0 1 0 0 284 0 0 0 100 6 0 0 0 29 8 20 0 2 0 0 1 0 0 0 100 7 0 0 0 54 22 48 0 0 1 0 340 0 0 0 100 April 27, 2026 at 06:34:41 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 117 0 3 2 0 0 0 0 0 100 1 0 0 0 15 3 6 1 1 1 0 294 0 0 0 100 2 0 0 0 14 4 6 0 0 1 0 3 0 0 0 100 3 0 0 0 16 3 34 2 0 2 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 1 0 259 0 0 0 100 5 0 0 14 103 44 96 0 2 1 0 266 0 0 0 100 6 0 0 0 12 2 2 0 0 1 0 1 0 0 0 100 7 0 0 0 56 23 49 0 3 0 0 318 0 0 0 100 April 27, 2026 at 06:34:42 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 132 0 2 0 0 0 0 0 0 100 1 0 0 0 106 50 98 0 0 0 0 294 0 0 0 100 2 0 0 0 25 5 24 0 1 1 0 19 0 0 0 100 3 0 0 0 19 2 48 0 1 1 0 1058 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 16 9 2 1 0 0 0 266 0 0 0 100 6 0 0 0 9 0 8 0 1 0 0 11 0 0 0 100 7 0 0 0 56 22 48 0 1 2 0 317 0 0 0 100 April 27, 2026 at 06:34:43 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 112 0 2 0 0 0 0 0 0 100 1 0 0 0 12 2 6 0 1 1 0 294 0 0 0 100 2 0 0 0 110 52 104 0 0 0 0 2 0 0 0 100 3 0 0 0 16 2 38 1 1 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 51 22 44 1 0 0 0 322 0 0 0 100 April 27, 2026 at 06:34:44 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 203 112 0 2 0 0 0 0 0 0 100 1 0 0 0 14 2 10 0 2 0 0 294 0 0 0 100 2 0 0 0 109 51 106 0 0 0 0 0 0 0 0 100 3 0 0 0 14 2 34 1 0 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 50 22 44 0 0 1 0 323 0 0 0 100 April 27, 2026 at 06:34:45 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 15 0 1 0 0 0 0 0 0 100 1 0 0 0 113 14 104 1 1 1 0 294 0 0 0 100 2 0 0 0 111 41 106 0 4 0 0 3 0 0 0 100 3 0 0 0 15 2 40 1 2 0 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 6 1 2 0 0 0 0 266 0 0 0 100 6 0 0 0 6 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 51 22 44 0 0 2 0 318 0 0 0 100 April 27, 2026 at 06:34:46 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2308 203 114 0 1 0 0 1 0 0 0 100 1 0 0 0 108 51 102 0 0 1 0 294 0 0 0 100 2 0 0 0 12 2 6 0 0 1 0 0 0 0 0 100 3 0 0 0 13 2 38 1 1 1 0 1047 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 6 1 2 1 0 0 0 266 0 0 0 100 6 0 0 0 7 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 54 22 48 0 1 1 0 320 0 0 0 100 April 27, 2026 at 06:34:47 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2306 202 112 0 2 0 0 0 0 0 0 100 1 0 0 0 63 28 56 0 1 0 0 294 0 0 0 100 2 1 0 0 25 5 24 0 0 0 0 23 0 0 0 100 3 0 0 0 16 2 46 1 1 1 0 1058 0 0 0 100 4 0 0 14 216 105 8 0 0 0 0 259 0 0 0 100 5 0 0 14 19 8 8 0 2 1 0 266 0 0 0 100 6 0 0 0 8 0 6 0 0 0 0 11 0 0 0 100 7 0 0 0 102 45 92 1 1 3 0 323 0 0 0 100 April 27, 2026 at 06:34:48 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2305 202 107 0 1 0 0 0 0 0 0 100 1 0 0 0 12 3 8 0 1 1 0 294 0 0 0 100 2 0 0 0 13 2 10 0 2 0 0 0 0 0 0 100 3 0 0 0 12 2 36 0 0 0 0 1047 0 0 0 100 4 0 0 8 217 105 10 0 1 0 0 259 0 0 0 100 5 0 0 14 105 2 102 0 2 0 0 267 0 0 0 100 6 0 0 0 5 0 0 0 0 0 0 0 0 0 0 100 7 0 0 0 49 22 44 0 0 1 0 318 0 0 0 100 April 27, 2026 at 06:34:49 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 7 2307 203 17 0 0 0 0 0 0 0 0 100 1 0 0 0 110 2 102 1 2 0 0 294 0 0 0 100 2 0 0 0 21 6 16 0 1 0 0 3 0 0 0 100 3 0 0 0 103 47 124 2 1 0 0 1047 0 0 0 100 4 0 0 14 220 107 14 0 1 0 0 259 0 0 0 100 5 0 0 14 8 1 6 0 1 0 0 266 0 0 0 100 6 0 0 0 8 0 4 0 1 0 0 0 0 0 0 100 7 0 0 0 51 22 44 1 0 3 0 318 0 0 0 100 April 27, 2026 at 06:34:50 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2306 202 85 0 0 0 0 1 0 0 0 100 1 0 0 1 38 1 32 0 0 0 0 305 0 0 0 100 2 1286 0 1 22 3 18 1 0 0 0 22 0 0 0 100 3 0 0 0 23 5 58 1 3 0 0 1089 0 0 0 100 4 0 0 8 247 119 38 0 1 0 0 258 0 0 0 100 5 0 0 14 130 86 78 1 4 0 0 266 0 0 0 100 6 20 0 0 25 1 30 2 0 0 0 246 0 0 0 100 7 1 0 0 37 13 40 0 2 3 0 389 0 0 0 100 April 27, 2026 at 06:34:51 PM UTC CPU minf mjf xcal intr ithr csw icsw migr smtx srw syscl usr sys wt idl 0 0 0 6 2306 202 149 0 2 1 0 0 0 0 0 100 1 0 0 0 13 2 2 0 0 1 0 294 0 0 0 100 2 0 0 0 16 4 12 0 0 1 0 4 0 0 0 100 3 0 0 0 20 5 42 0 1 1 0 1054 0 0 0 100 4 0 0 8 216 105 8 0 0 1 0 259 0 0 0 100 5 0 0 14 117 103 10 0 1 17 0 266 0 0 0 100 6 73 0 0 120 49 126 0 3 2 0 63 0 0 0 100 7 0 0 0 30 3 40 1 1 10 0 307 0 0 0 100