| 1 | PHV ALLOCATION SUCCESSFUL | ||
| 2 | PHV Allocation | ||
| 3 | +-----------+-------+-----------------+--------------------------------------------------------+ | ||
| 4 | |Container |Gress |Container Slice |Field Slice | | ||
| 5 | +-----------+-------+-----------------+--------------------------------------------------------+ | ||
| 6 | |B0 |I | |ingress::$tmp7 | | ||
| 7 | | | | | | | ||
| 8 | |MB0 |I |[0] |ingress::hdr.inner_ipv4.ttl[0] | | ||
| 9 | | | |[7:1] |ingress::hdr.inner_ipv4.ttl[7:1] | | ||
| 10 | | | | |ingress::hdr.inner_ipv6.hop_limit | | ||
| 11 | | | | | | | ||
| 12 | |DB0 |I | |ingress::hdr.geneve.vni[23:16] ARA | | ||
| 13 | | | | | | | ||
| 14 | |B1 |I |[0] |ingress::hdr.inner_ipv6.$valid | | ||
| 15 | | | |[1] |ingress::hdr.geneve_opts.oxg_ext_tag.$valid | | ||
| 16 | | | |[2] |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid | | ||
| 17 | | | |[3] |ingress::hdr.geneve_opts.oxg_mcast.$valid | | ||
| 18 | | | |[4] |ingress::hdr.geneve_opts.oxg_mss_tag.$valid | | ||
| 19 | | | |[5] |ingress::hdr.geneve_opts.oxg_mss.$valid | | ||
| 20 | | | |[6] |ingress::hdr.ipv6.$valid | | ||
| 21 | | | |[7] |ingress::hdr.arp.$valid | | ||
| 22 | | | | | | | ||
| 23 | |MB1 |I |[3:0] |ingress::ig_intr_md_for_dprsr.mirror_type | | ||
| 24 | | | | | | | ||
| 25 | |... | | | | | ||
| 26 | | | | | | | ||
| 27 | |B2 |I |[0] |ingress::hdr.vlan.$valid | | ||
| 28 | | | |[1] |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum | | ||
| 29 | | | |[2] |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 | | ||
| 30 | | | |[5:3] |ingress::ig_intr_md_for_dprsr.drop_ctl | | ||
| 31 | | | |[6] |ingress::meta.resolve_nexthop | | ||
| 32 | | | |[7] |ingress::meta.nexthop_is_v6 | | ||
| 33 | | | | | | | ||
| 34 | |MB2 |I | |ingress::hdr.inner_ipv4.protocol | | ||
| 35 | | | | |ingress::hdr.inner_ipv6.next_hdr | | ||
| 36 | | | | | | | ||
| 37 | |... | | | | | ||
| 38 | | | | | | | ||
| 39 | |B3 |I |[0] |ingress::hdr.udp.checksum.$deparse_original_csum | | ||
| 40 | | | |[1] |ingress::hdr.udp.checksum.$deparse_updated_csum_0 | | ||
| 41 | | | |[2] |ingress::hdr.udp.checksum.$deparse_updated_csum_1 | | ||
| 42 | | | |[3] |ingress::hdr.udp.checksum.$deparse_updated_csum_2 | | ||
| 43 | | | |[4] |ingress::hdr.udp.checksum.$deparse_updated_csum_3 | | ||
| 44 | | | |[5] |ingress::meta.is_link_local_mcastv6 | | ||
| 45 | | | |[6] |ingress::meta.is_switch_address | | ||
| 46 | | | |[7] |ingress::meta.is_mcast | | ||
| 47 | | | | | | | ||
| 48 | |MB3 |I | |ingress::hdr.ipv4.protocol | | ||
| 49 | | | | |ingress::hdr.ipv6.next_hdr | | ||
| 50 | | | | | | | ||
| 51 | |... | | | | | ||
| 52 | | | | | | | ||
| 53 | |B4 |E |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid | | ||
| 54 | | | |[1] |egress::eg_intr_md.egress_port.$valid | | ||
| 55 | | | |[2] |egress::eg_intr_md_for_dprsr.drop_ctl.$valid | | ||
| 56 | | | |[3] |egress::hdr.ethernet.$valid | | ||
| 57 | | | |[4] |egress::hdr.vlan.$valid | | ||
| 58 | | | |[5] |egress::hdr.ipv4.$valid | | ||
| 59 | | | |[6] |egress::hdr.udp.$valid | | ||
| 60 | | | |[7] |egress::hdr.geneve.$valid | | ||
| 61 | | | | | | | ||
| 62 | |B5 |I |[0] |ingress::meta.route_ttl_is_1[0] | | ||
| 63 | | | |[7:1] |ingress::meta.route_ttl_is_1[7:1] | | ||
| 64 | | | |[0] |$tmp12 | | ||
| 65 | | | | |ingress::meta.nat_geneve_vni[23:16] | | ||
| 66 | | | | | | | ||
| 67 | |B6 |I |[0] |ingress::meta.skip_ttl_check | | ||
| 68 | | | | | | | ||
| 69 | |... | | | | | ||
| 70 | | | | | | | ||
| 71 | |B8 |I |[0] |ingress::hdr.ipv4.ttl[0] | | ||
| 72 | | | |[7:1] |ingress::hdr.ipv4.ttl[7:1] | | ||
| 73 | | | | |ingress::hdr.ipv6.hop_limit | | ||
| 74 | | | | | | | ||
| 75 | |B9 |I |[0] |ingress::meta.bridge_hdr.is_mcast_routed | | ||
| 76 | | | |[1] |ingress::meta.bridge_hdr.nat_egress_hit | | ||
| 77 | | | |[6:2] |ingress::meta.bridge_hdr.reserved | | ||
| 78 | | | |[7] |ingress::meta.bridge_hdr.__pad_0 | | ||
| 79 | | | |[7] |ingress::meta.nat_egress_hit | | ||
| 80 | | | |[1] |ingress::meta.uplink_ingress | | ||
| 81 | | | | | | | ||
| 82 | |B10 |I | |ingress::hdr.geneve.vni[23:16] | | ||
| 83 | | | | |ingress::hdr.geneve.vni[23:16] ARA | | ||
| 84 | | | | |ingress::meta.nexthop[87:80] ARA | | ||
| 85 | | | | | | | ||
| 86 | |B11 |I | |ingress::hdr.sidecar.sc_payload[87:80] | | ||
| 87 | | | | | | | ||
| 88 | |MB4 |I | |ingress::hdr.ethernet.src_mac[7:0] | | ||
| 89 | | | | |ingress::hdr.ethernet.src_mac[7:0] ARA | | ||
| 90 | | | | |ingress::l3_router_fwd.slots ARA | | ||
| 91 | | | | | | | ||
| 92 | |DB4 |I |[3:0] |ingress::hdr.inner_ipv4.ihl ARA | | ||
| 93 | | | |[7:4] |ingress::hdr.inner_ipv4.version ARA | | ||
| 94 | | | | | | | ||
| 95 | |MB5 |I | |ingress::hdr.geneve.reserved2 | | ||
| 96 | | | | | | | ||
| 97 | |DB5 |I | |ingress::hdr.ethernet.src_mac[7:0] ARA | | ||
| 98 | | | | | | | ||
| 99 | |MB6 |I | |ingress::hdr.inner_ipv4.diffserv | | ||
| 100 | | | | | | | ||
| 101 | |... | | | | | ||
| 102 | | | | | | | ||
| 103 | |MB7 |I | |ingress::hdr.ipv4.diffserv | | ||
| 104 | | | | | | | ||
| 105 | |... | | | | | ||
| 106 | | | | | | | ||
| 107 | |B12 |I | |ingress::hdr.sidecar.sc_payload[95:88] | | ||
| 108 | | | | | | | ||
| 109 | |B13 |I |[3:0] |ingress::hdr.ipv4.ihl | | ||
| 110 | | | |[7:4] |ingress::hdr.ipv4.version | | ||
| 111 | | | | | | | ||
| 112 | |B14 |E | |egress::meta.drop_reason | | ||
| 113 | | | | | | | ||
| 114 | |... | | | | | ||
| 115 | | | | | | | ||
| 116 | |B16 |I | |ingress::meta.nexthop[95:88] ARA | | ||
| 117 | | | |[3:0] |ingress::hdr.inner_ipv4.ihl | | ||
| 118 | | | |[3:0] |ingress::hdr.inner_ipv4.ihl ARA | | ||
| 119 | | | |[7:4] |ingress::hdr.inner_ipv4.version | | ||
| 120 | | | |[7:4] |ingress::hdr.inner_ipv4.version ARA | | ||
| 121 | | | | | | | ||
| 122 | |... | | | | | ||
| 123 | | | | | | | ||
| 124 | |MB8 |E |[0] |egress::is_link_local_ipv6_mcast_0 | | ||
| 125 | | | | | | | ||
| 126 | |... | | | | | ||
| 127 | | | | | | | ||
| 128 | |H0 |I | |ingress::meta.icmp_csum | | ||
| 129 | | | | | | | ||
| 130 | |MH0 |E |[0] |egress::hdr.inner_eth.$valid | | ||
| 131 | | | |[1] |egress::hdr.inner_ipv4.$valid | | ||
| 132 | | | |[2] |egress::hdr.inner_tcp.$valid | | ||
| 133 | | | |[3] |egress::hdr.inner_udp.$valid | | ||
| 134 | | | |[4] |egress::hdr.inner_ipv6.$valid | | ||
| 135 | | | |[5] |egress::hdr.geneve_opts.oxg_ext_tag.$valid | | ||
| 136 | | | |[6] |egress::hdr.geneve_opts.oxg_mcast_tag.$valid | | ||
| 137 | | | |[7] |egress::hdr.geneve_opts.oxg_mcast.$valid | | ||
| 138 | | | |[8] |egress::hdr.geneve_opts.oxg_mss_tag.$valid | | ||
| 139 | | | |[9] |egress::hdr.geneve_opts.oxg_mss.$valid | | ||
| 140 | | | |[10] |egress::hdr.ipv6.$valid | | ||
| 141 | | | | | | | ||
| 142 | |DH0 |I | |ingress::hdr.inner_udp.hdr_length ARA | | ||
| 143 | | | | | | | ||
| 144 | |H1 |I | |ingress::meta.body_checksum | | ||
| 145 | | | | | | | ||
| 146 | |MH1 |E |[8:0] |egress::eg_intr_md.egress_port | | ||
| 147 | | | | | | | ||
| 148 | |... | | | | | ||
| 149 | | | | | | | ||
| 150 | |H2 |I |[0] |ingress::ig_intr_md_for_dprsr.mirror_type.$valid | | ||
| 151 | | | |[1] |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid | | ||
| 152 | | | |[2] |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid | | ||
| 153 | | | |[3] |ingress::meta.bridge_hdr.$valid | | ||
| 154 | | | |[4] |ingress::hdr.ethernet.$valid | | ||
| 155 | | | |[5] |ingress::hdr.sidecar.$valid | | ||
| 156 | | | |[6] |ingress::hdr.ipv4.$valid | | ||
| 157 | | | |[7] |ingress::hdr.icmp.$valid | | ||
| 158 | | | |[8] |ingress::hdr.tcp.$valid | | ||
| 159 | | | |[9] |ingress::hdr.udp.$valid | | ||
| 160 | | | |[10] |ingress::hdr.geneve.$valid | | ||
| 161 | | | |[11] |ingress::hdr.inner_eth.$valid | | ||
| 162 | | | |[12] |ingress::hdr.inner_ipv4.$valid | | ||
| 163 | | | |[13] |ingress::hdr.inner_tcp.$valid | | ||
| 164 | | | |[14] |ingress::hdr.inner_udp.$valid | | ||
| 165 | | | |[15] |ingress::hdr.inner_icmp.$valid | | ||
| 166 | | | | | | | ||
| 167 | |MH2 |E |[2:0] |egress::eg_intr_md_for_dprsr.drop_ctl | | ||
| 168 | | | | | | | ||
| 169 | |... | | | | | ||
| 170 | | | | | | | ||
| 171 | |H3 |I | |ingress::hdr.inner_ipv4.total_len | | ||
| 172 | | | | |ingress::hdr.inner_ipv6.payload_len | | ||
| 173 | | | | | | | ||
| 174 | |MH3 |E |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select | | ||
| 175 | | | | | | | ||
| 176 | |... | | | | | ||
| 177 | | | | | | | ||
| 178 | |H4 |I |[0] |ingress::meta.ipv4_checksum_err | | ||
| 179 | | | |[8:1] |ingress::meta.drop_reason | | ||
| 180 | | | |[9] |ingress::meta.dropped | | ||
| 181 | | | |[10] |ingress::l3_router_fwd.is_hit | | ||
| 182 | | | |[11] |ingress::meta.service_routed | | ||
| 183 | | | |[12] |ingress::meta.icmp_recalc | | ||
| 184 | | | |[13] |ingress::meta.nat_ingress_hit | | ||
| 185 | | | | | | | ||
| 186 | |H5 |I | |ingress::hdr.ipv4.total_len | | ||
| 187 | | | | |ingress::hdr.ipv6.payload_len | | ||
| 188 | | | | | | | ||
| 189 | |H6 |I | |ingress::meta.l4_length | | ||
| 190 | | | | | | | ||
| 191 | |H7 |I | |ingress::hdr.inner_udp.hdr_length | | ||
| 192 | | | | |ingress::hdr.inner_udp.hdr_length ARA | | ||
| 193 | | | | |ingress::meta.nexthop[127:112] ARA | | ||
| 194 | | | | | | | ||
| 195 | |H8 |I | |ingress::hdr.udp.hdr_length | | ||
| 196 | | | | | | | ||
| 197 | |H9 |I |[11:0] |ingress::hdr.vlan.vlan_id | | ||
| 198 | | | |[12] |ingress::hdr.vlan.dei | | ||
| 199 | | | |[15:13] |ingress::hdr.vlan.pcp | | ||
| 200 | | | | | | | ||
| 201 | |H10 |I | |ingress::hdr.sidecar.sc_payload[127:112] | | ||
| 202 | | | | | | | ||
| 203 | |H11 |I |[7:0] |ingress::hdr.inner_icmp.code | | ||
| 204 | | | |[15:8] |ingress::hdr.inner_icmp.type | | ||
| 205 | | | |[7:0] |ingress::hdr.icmp.code | | ||
| 206 | | | |[15:8] |ingress::hdr.icmp.type | | ||
| 207 | | | | | | | ||
| 208 | |MH4 |I |[7:0] |ingress::l3_router_fwd.slot[7:0] | | ||
| 209 | | | |[15:8] |ingress::l3_router_fwd.slot[15:8] | | ||
| 210 | | | | | | | ||
| 211 | |DH4 |I | |ingress::hdr.geneve.vni[15:0] ARA | | ||
| 212 | | | | | | | ||
| 213 | |MH5 |I |[8:0] |ingress::ig_intr_md.ingress_port | | ||
| 214 | | | | | | | ||
| 215 | |DH5 |I | |ingress::hdr.inner_eth.dst_mac[47:32] ARA | | ||
| 216 | | | | | | | ||
| 217 | |MH6 |I |[8:0] |ingress::ig_intr_md_for_tm.ucast_egress_port | | ||
| 218 | | | | | | | ||
| 219 | |... | | | | | ||
| 220 | | | | | | | ||
| 221 | |MH7 |I | |ingress::hdr.inner_eth.src_mac[15:0] | | ||
| 222 | | | | | | | ||
| 223 | |... | | | | | ||
| 224 | | | | | | | ||
| 225 | |H12 |I |[7:0] |ingress::l3_router_fwd.idx[7:0] | | ||
| 226 | | | |[15:8] |ingress::l3_router_fwd.idx[15:8] | | ||
| 227 | | | | | | | ||
| 228 | |H13 |I |[8:0] |ingress::hdr.sidecar.sc_egress[8:0] | | ||
| 229 | | | |[15:9] |ingress::hdr.sidecar.sc_egress[15:9] | | ||
| 230 | | | | | | | ||
| 231 | |H14 |I |[8:0] |ingress::hdr.sidecar.sc_ingress[8:0] | | ||
| 232 | | | |[15:9] |ingress::hdr.sidecar.sc_ingress[15:9] | | ||
| 233 | | | | | | | ||
| 234 | |H15 |I | |ingress::hdr.geneve.vni[15:0] | | ||
| 235 | | | | |ingress::hdr.geneve.vni[15:0] ARA | | ||
| 236 | | | | |ingress::meta.nexthop[79:64] ARA | | ||
| 237 | | | | | | | ||
| 238 | |H16 |I | |ingress::meta.nat_geneve_vni[15:0] | | ||
| 239 | | | | | | | ||
| 240 | |H17 |I | |ingress::hdr.sidecar.sc_payload[79:64] | | ||
| 241 | | | | | | | ||
| 242 | |H18 |I | |ingress::hdr.inner_eth.dst_mac[47:32] | | ||
| 243 | | | | |ingress::hdr.inner_eth.dst_mac[47:32] ARA | | ||
| 244 | | | | |ingress::meta.nexthop[111:96] ARA | | ||
| 245 | | | | | | | ||
| 246 | |H19 |I | |ingress::hdr.sidecar.sc_payload[111:96] | | ||
| 247 | | | | | | | ||
| 248 | |H20 |I | |ingress::meta.nat_inner_mac[47:32] | | ||
| 249 | | | | | | | ||
| 250 | |H21 |I | |ingress::meta.l4_src_port | | ||
| 251 | | | | | | | ||
| 252 | |... | | | | | ||
| 253 | | | | | | | ||
| 254 | |MH8 |I | |ingress::hdr.sidecar.sc_ether_type | | ||
| 255 | | | | | | | ||
| 256 | |... | | | | | ||
| 257 | | | | | | | ||
| 258 | |MH9 |I | |ingress::hdr.ethernet.ether_type | | ||
| 259 | | | | | | | ||
| 260 | |... | | | | | ||
| 261 | | | | | | | ||
| 262 | |MH10 |I | |ingress::hdr.vlan.ether_type | | ||
| 263 | | | | | | | ||
| 264 | |... | | | | | ||
| 265 | | | | | | | ||
| 266 | |MH11 |I | |ingress::hdr.inner_eth.ether_type | | ||
| 267 | | | | | | | ||
| 268 | |... | | | | | ||
| 269 | | | | | | | ||
| 270 | |MH12 |I | |ingress::hdr.ethernet.src_mac[47:32] | | ||
| 271 | | | | | | | ||
| 272 | |... | | | | | ||
| 273 | | | | | | | ||
| 274 | |MH13 |I |[7:0] |ingress::hdr.ethernet.dst_mac[39:32] | | ||
| 275 | | | |[15:8] |ingress::hdr.ethernet.dst_mac[47:40] | | ||
| 276 | | | | | | | ||
| 277 | |... | | | | | ||
| 278 | | | | | | | ||
| 279 | |MH14 |I | |ingress::hdr.inner_udp.checksum | | ||
| 280 | | | | |ingress::hdr.inner_icmp.hdr_checksum | | ||
| 281 | | | | |ingress::hdr.icmp.hdr_checksum | | ||
| 282 | | | | | | | ||
| 283 | |... | | | | | ||
| 284 | | | | | | | ||
| 285 | |MH15 |I | |ingress::hdr.udp.checksum | | ||
| 286 | | | | | | | ||
| 287 | |... | | | | | ||
| 288 | | | | | | | ||
| 289 | |H36 |I |[7:0] |ingress::meta.orig_src_mac[39:32] | | ||
| 290 | | | |[15:8] |ingress::meta.orig_src_mac[47:40] | | ||
| 291 | | | | | | | ||
| 292 | |... | | | | | ||
| 293 | | | | | | | ||
| 294 | |MH16 |I | |ingress::hdr.inner_ipv4.hdr_checksum | | ||
| 295 | | | | | | | ||
| 296 | |... | | | | | ||
| 297 | | | | | | | ||
| 298 | |MH17 |I | |ingress::hdr.ipv4.hdr_checksum | | ||
| 299 | | | | | | | ||
| 300 | |... | | | | | ||
| 301 | | | | | | | ||
| 302 | |MH18 |I |[8:0] |ingress::meta.bridge_hdr.ingress_port | | ||
| 303 | | | |[15:9] |ingress::meta.bridge_hdr.__pad_1 | | ||
| 304 | | | | | | | ||
| 305 | |... | | | | | ||
| 306 | | | | | | | ||
| 307 | |MH19 |I |[7:0] |ingress::hdr.sidecar.sc_pad | | ||
| 308 | | | |[15:8] |ingress::hdr.sidecar.sc_code | | ||
| 309 | | | | | | | ||
| 310 | |... | | | | | ||
| 311 | | | | | | | ||
| 312 | |MH20 |E | |egress::hdr.ethernet.src_mac[47:32] | | ||
| 313 | | | | | | | ||
| 314 | |... | | | | | ||
| 315 | | | | | | | ||
| 316 | |W0 |I |[15:0] |ingress::hdr.inner_tcp.window | | ||
| 317 | | | |[23:16] |ingress::hdr.inner_tcp.flags | | ||
| 318 | | | |[27:24] |ingress::hdr.inner_tcp.res | | ||
| 319 | | | |[31:28] |ingress::hdr.inner_tcp.data_offset | | ||
| 320 | | | |[15:0] |ingress::hdr.tcp.window | | ||
| 321 | | | |[23:16] |ingress::hdr.tcp.flags | | ||
| 322 | | | |[27:24] |ingress::hdr.tcp.res | | ||
| 323 | | | |[31:28] |ingress::hdr.tcp.data_offset | | ||
| 324 | | | | | | | ||
| 325 | |MW0 |I | |ingress::hdr.inner_ipv4.dst_addr | | ||
| 326 | | | |[15:0] |ingress::hdr.inner_ipv6.dst_addr[111:96] | | ||
| 327 | | | |[31:16] |ingress::hdr.inner_ipv6.dst_addr[127:112] | | ||
| 328 | | | | | | | ||
| 329 | |DW0 |I | |ingress::hdr.inner_eth.src_mac[47:16] ARA | | ||
| 330 | | | | | | | ||
| 331 | |W1 |I |[4:0] |ingress::hdr.geneve_opts.oxg_ext_tag.opt_len | | ||
| 332 | | | |[7:5] |ingress::hdr.geneve_opts.oxg_ext_tag.reserved | | ||
| 333 | | | |[14:8] |ingress::hdr.geneve_opts.oxg_ext_tag.type | | ||
| 334 | | | |[15] |ingress::hdr.geneve_opts.oxg_ext_tag.crit | | ||
| 335 | | | |[31:16] |ingress::hdr.geneve_opts.oxg_ext_tag.class | | ||
| 336 | | | | | | | ||
| 337 | |MW1 |I | |ingress::hdr.ipv4.dst_addr | | ||
| 338 | | | |[15:0] |ingress::hdr.ipv6.dst_addr[111:96] | | ||
| 339 | | | |[31:16] |ingress::hdr.ipv6.dst_addr[127:112] | | ||
| 340 | | | | | | | ||
| 341 | |DW1 |I | |ingress::hdr.inner_eth.dst_mac[31:0] ARA | | ||
| 342 | | | | | | | ||
| 343 | |W2 |I | |ingress::meta.orig_src_ipv4 | | ||
| 344 | | | |[7:0] |ingress::l3_router_fwd.ecmp_hash | | ||
| 345 | | | | | | | ||
| 346 | |MW2 |I | |ingress::hdr.inner_ipv4.src_addr | | ||
| 347 | | | |[15:0] |ingress::hdr.inner_ipv6.src_addr[111:96] | | ||
| 348 | | | |[31:16] |ingress::hdr.inner_ipv6.src_addr[127:112] | | ||
| 349 | | | | | | | ||
| 350 | |... | | | | | ||
| 351 | | | | | | | ||
| 352 | |W3 |I |[15:0] |ingress::meta.nat_ingress_tgt[111:96] | | ||
| 353 | | | |[31:16] |ingress::meta.nat_ingress_tgt[127:112] | | ||
| 354 | | | |[7:0] |$tmp10 | | ||
| 355 | | | | | | | ||
| 356 | |MW3 |I | |ingress::hdr.ipv4.src_addr | | ||
| 357 | | | |[15:0] |ingress::hdr.ipv6.src_addr[111:96] | | ||
| 358 | | | |[31:16] |ingress::hdr.ipv6.src_addr[127:112] | | ||
| 359 | | | | | | | ||
| 360 | |... | | | | | ||
| 361 | | | | | | | ||
| 362 | |W4 |I |[15:0] |ingress::hdr.geneve.protocol | | ||
| 363 | | | |[21:16] |ingress::hdr.geneve.reserved | | ||
| 364 | | | |[22] |ingress::hdr.geneve.crit | | ||
| 365 | | | |[23] |ingress::hdr.geneve.ctrl | | ||
| 366 | | | |[29:24] |ingress::hdr.geneve.opt_len | | ||
| 367 | | | |[31:30] |ingress::hdr.geneve.version | | ||
| 368 | | | | | | | ||
| 369 | |W5 |I | |ingress::hdr.inner_eth.src_mac[47:16] | | ||
| 370 | | | | |ingress::hdr.inner_eth.src_mac[47:16] ARA | | ||
| 371 | | | | |ingress::meta.nexthop[31:0] ARA | | ||
| 372 | | | | | | | ||
| 373 | |W6 |E |[15:0] |egress::hdr.ipv6.dst_addr[111:96] | | ||
| 374 | | | |[31:16] |egress::hdr.ipv6.dst_addr[127:112] | | ||
| 375 | | | | | | | ||
| 376 | |W7 |I | |ingress::meta.nat_inner_mac[31:0] | | ||
| 377 | | | |[7:0] |$tmp11 | | ||
| 378 | | | | | | | ||
| 379 | |W8 |I | |ingress::hdr.inner_eth.dst_mac[31:0] | | ||
| 380 | | | | |ingress::hdr.inner_eth.dst_mac[31:0] ARA | | ||
| 381 | | | | |ingress::meta.nexthop[63:32] ARA | | ||
| 382 | | | | | | | ||
| 383 | |W9 |I | |ingress::hdr.sidecar.sc_payload[31:0] | | ||
| 384 | | | | | | | ||
| 385 | |W10 |I | |ingress::hdr.sidecar.sc_payload[63:32] | | ||
| 386 | | | | | | | ||
| 387 | |W11 |I |[15:0] |ingress::meta.nat_ingress_csum | | ||
| 388 | | | |[25:16] |ingress::meta.pkt_type | | ||
| 389 | | | |[26] |ingress::meta.encap_needed | | ||
| 390 | | | | | | | ||
| 391 | |MW4 |I | |ingress::hdr.inner_ipv6.dst_addr[31:0] | | ||
| 392 | | | | | | | ||
| 393 | |... | | | | | ||
| 394 | | | | | | | ||
| 395 | |MW5 |I | |ingress::hdr.inner_ipv6.src_addr[31:0] | | ||
| 396 | | | | | | | ||
| 397 | |... | | | | | ||
| 398 | | | | | | | ||
| 399 | |MW6 |I | |ingress::hdr.ipv6.src_addr[31:0] | | ||
| 400 | | | | | | | ||
| 401 | |... | | | | | ||
| 402 | | | | | | | ||
| 403 | |MW7 |I |[15:0] |ingress::hdr.inner_icmp.data[15:0] | | ||
| 404 | | | |[31:16] |ingress::hdr.inner_icmp.data[31:16] | | ||
| 405 | | | |[15:0] |ingress::hdr.icmp.data[15:0] | | ||
| 406 | | | |[31:16] |ingress::hdr.icmp.data[31:16] | | ||
| 407 | | | |[15:0] |ingress::hdr.inner_udp.dst_port | | ||
| 408 | | | |[31:16] |ingress::hdr.inner_udp.src_port | | ||
| 409 | | | |[15:0] |ingress::hdr.inner_tcp.urgent_ptr | | ||
| 410 | | | |[31:16] |ingress::hdr.inner_tcp.checksum | | ||
| 411 | | | |[15:0] |ingress::hdr.tcp.urgent_ptr | | ||
| 412 | | | |[31:16] |ingress::hdr.tcp.checksum | | ||
| 413 | | | | | | | ||
| 414 | |... | | | | | ||
| 415 | | | | | | | ||
| 416 | |W12 |I | |ingress::hdr.ipv6.dst_addr[31:0] | | ||
| 417 | | | |[12:0] |ingress::hdr.ipv4.frag_offset | | ||
| 418 | | | |[15:13] |ingress::hdr.ipv4.flags | | ||
| 419 | | | |[31:16] |ingress::hdr.ipv4.identification | | ||
| 420 | | | | | | | ||
| 421 | |W13 |I |[12:0] |ingress::hdr.inner_ipv4.frag_offset | | ||
| 422 | | | |[15:13] |ingress::hdr.inner_ipv4.flags | | ||
| 423 | | | |[31:16] |ingress::hdr.inner_ipv4.identification | | ||
| 424 | | | |[19:0] |ingress::hdr.inner_ipv6.flow_label | | ||
| 425 | | | |[27:20] |ingress::hdr.inner_ipv6.traffic_class | | ||
| 426 | | | |[31:28] |ingress::hdr.inner_ipv6.version | | ||
| 427 | | | | | | | ||
| 428 | |W14 |I | |ingress::meta.nat_ingress_tgt[31:0] | | ||
| 429 | | | | | | | ||
| 430 | |W15 |I |[15:0] |ingress::meta.l4_dst_port | | ||
| 431 | | | | | | | ||
| 432 | |W16 |I |[19:0] |ingress::hdr.ipv6.flow_label | | ||
| 433 | | | |[27:20] |ingress::hdr.ipv6.traffic_class | | ||
| 434 | | | |[31:28] |ingress::hdr.ipv6.version | | ||
| 435 | | | | | | | ||
| 436 | |W17 |I |[15:0] |ingress::hdr.udp.dst_port | | ||
| 437 | | | |[31:16] |ingress::hdr.udp.src_port | | ||
| 438 | | | | | | | ||
| 439 | |W18 |E | |egress::hdr.ethernet.src_mac[31:0] | | ||
| 440 | | | | | | | ||
| 441 | |W19 |E | |egress::hdr.ipv6.dst_addr[31:0] | | ||
| 442 | | | | | | | ||
| 443 | |W20 |E | |egress::hdr.ipv6.dst_addr[63:32] | | ||
| 444 | | | | | | | ||
| 445 | |W21 |E | |egress::hdr.ipv6.dst_addr[95:64] | | ||
| 446 | | | | | | | ||
| 447 | |W22 |I | |ingress::meta.orig_dst_ipv4 | | ||
| 448 | | | | | | | ||
| 449 | |W23 |E |[17] |egress::meta.bridge_hdr.nat_egress_hit | | ||
| 450 | | | | | | | ||
| 451 | |MW8 |I | |ingress::hdr.inner_ipv6.dst_addr[63:32] | | ||
| 452 | | | | | | | ||
| 453 | |... | | | | | ||
| 454 | | | | | | | ||
| 455 | |MW9 |I | |ingress::hdr.inner_ipv6.src_addr[63:32] | | ||
| 456 | | | | | | | ||
| 457 | |... | | | | | ||
| 458 | | | | | | | ||
| 459 | |MW10 |I | |ingress::hdr.ipv6.src_addr[63:32] | | ||
| 460 | | | | | | | ||
| 461 | |... | | | | | ||
| 462 | | | | | | | ||
| 463 | |MW11 |I |[15:0] |ingress::hdr.inner_tcp.dst_port | | ||
| 464 | | | |[31:16] |ingress::hdr.inner_tcp.src_port | | ||
| 465 | | | |[15:0] |ingress::hdr.tcp.dst_port | | ||
| 466 | | | |[31:16] |ingress::hdr.tcp.src_port | | ||
| 467 | | | | | | | ||
| 468 | |... | | | | | ||
| 469 | | | | | | | ||
| 470 | |W24 |I | |ingress::hdr.ipv6.dst_addr[63:32] | | ||
| 471 | | | | | | | ||
| 472 | |W25 |I | |ingress::hdr.inner_tcp.ack_no | | ||
| 473 | | | | |ingress::hdr.tcp.ack_no | | ||
| 474 | | | | | | | ||
| 475 | |W26 |I | |ingress::meta.nat_ingress_tgt[63:32] | | ||
| 476 | | | | | | | ||
| 477 | |... | | | | | ||
| 478 | | | | | | | ||
| 479 | |MW12 |I | |ingress::hdr.inner_ipv6.dst_addr[95:64] | | ||
| 480 | | | | | | | ||
| 481 | |... | | | | | ||
| 482 | | | | | | | ||
| 483 | |MW13 |I | |ingress::hdr.inner_ipv6.src_addr[95:64] | | ||
| 484 | | | | | | | ||
| 485 | |... | | | | | ||
| 486 | | | | | | | ||
| 487 | |MW14 |I | |ingress::hdr.ipv6.src_addr[95:64] | | ||
| 488 | | | | | | | ||
| 489 | |... | | | | | ||
| 490 | | | | | | | ||
| 491 | |MW15 |I |[23:0] |ingress::hdr.ethernet.dst_mac[23:0] | | ||
| 492 | | | |[31:24] |ingress::hdr.ethernet.dst_mac[31:24] | | ||
| 493 | | | | | | | ||
| 494 | |... | | | | | ||
| 495 | | | | | | | ||
| 496 | |W36 |I | |ingress::hdr.ipv6.dst_addr[95:64] | | ||
| 497 | | | | | | | ||
| 498 | |W37 |I | |ingress::hdr.inner_tcp.seq_no | | ||
| 499 | | | | |ingress::hdr.tcp.seq_no | | ||
| 500 | | | | | | | ||
| 501 | |W38 |I | |ingress::meta.nat_ingress_tgt[95:64] | | ||
| 502 | | | | | | | ||
| 503 | |W39 |I |[23:0] |ingress::meta.orig_src_mac[23:0] | | ||
| 504 | | | |[31:24] |ingress::meta.orig_src_mac[31:24] | | ||
| 505 | | | | | | | ||
| 506 | |... | | | | | ||
| 507 | | | | | | | ||
| 508 | +-----------+-------+-----------------+--------------------------------------------------------+ | ||
| 509 | |||
| 510 | |||
| 511 | POV Allocation (ingress): | ||
| 512 | +-----------+-----------------+--------------------------------------------------------+ | ||
| 513 | |Container |Container Slice |Field Slice | | ||
| 514 | +-----------+-----------------+--------------------------------------------------------+ | ||
| 515 | |B1 |[0] |ingress::hdr.inner_ipv6.$valid | | ||
| 516 | | |[1] |ingress::hdr.geneve_opts.oxg_ext_tag.$valid | | ||
| 517 | | |[2] |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid | | ||
| 518 | | |[3] |ingress::hdr.geneve_opts.oxg_mcast.$valid | | ||
| 519 | | |[4] |ingress::hdr.geneve_opts.oxg_mss_tag.$valid | | ||
| 520 | | |[5] |ingress::hdr.geneve_opts.oxg_mss.$valid | | ||
| 521 | | |[6] |ingress::hdr.ipv6.$valid | | ||
| 522 | | |[7] |ingress::hdr.arp.$valid | | ||
| 523 | +-----------+-----------------+--------------------------------------------------------+ | ||
| 524 | |B2 |[0] |ingress::hdr.vlan.$valid | | ||
| 525 | | |[1] |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum | | ||
| 526 | | |[2] |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 | | ||
| 527 | +-----------+-----------------+--------------------------------------------------------+ | ||
| 528 | |B3 |[0] |ingress::hdr.udp.checksum.$deparse_original_csum | | ||
| 529 | | |[1] |ingress::hdr.udp.checksum.$deparse_updated_csum_0 | | ||
| 530 | | |[2] |ingress::hdr.udp.checksum.$deparse_updated_csum_1 | | ||
| 531 | | |[3] |ingress::hdr.udp.checksum.$deparse_updated_csum_2 | | ||
| 532 | | |[4] |ingress::hdr.udp.checksum.$deparse_updated_csum_3 | | ||
| 533 | +-----------+-----------------+--------------------------------------------------------+ | ||
| 534 | |H2 |[0] |ingress::ig_intr_md_for_dprsr.mirror_type.$valid | | ||
| 535 | | |[1] |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid | | ||
| 536 | | |[2] |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid | | ||
| 537 | | |[3] |ingress::meta.bridge_hdr.$valid | | ||
| 538 | | |[4] |ingress::hdr.ethernet.$valid | | ||
| 539 | | |[5] |ingress::hdr.sidecar.$valid | | ||
| 540 | | |[6] |ingress::hdr.ipv4.$valid | | ||
| 541 | | |[7] |ingress::hdr.icmp.$valid | | ||
| 542 | | |[8] |ingress::hdr.tcp.$valid | | ||
| 543 | | |[9] |ingress::hdr.udp.$valid | | ||
| 544 | | |[10] |ingress::hdr.geneve.$valid | | ||
| 545 | | |[11] |ingress::hdr.inner_eth.$valid | | ||
| 546 | | |[12] |ingress::hdr.inner_ipv4.$valid | | ||
| 547 | | |[13] |ingress::hdr.inner_tcp.$valid | | ||
| 548 | | |[14] |ingress::hdr.inner_udp.$valid | | ||
| 549 | | |[15] |ingress::hdr.inner_icmp.$valid | | ||
| 550 | +-----------+-----------------+--------------------------------------------------------+ | ||
| 551 | | |Total Bits Used |32 / 128 ( 25 %) | | ||
| 552 | | |Pack Density |32 / 40 ( 80 %) | | ||
| 553 | +-----------+-----------------+--------------------------------------------------------+ | ||
| 554 | |||
| 555 | POV Allocation (egress): | ||
| 556 | +-----------+-----------------+------------------------------------------------------+ | ||
| 557 | |Container |Container Slice |Field Slice | | ||
| 558 | +-----------+-----------------+------------------------------------------------------+ | ||
| 559 | |MH0 |[0] |egress::hdr.inner_eth.$valid | | ||
| 560 | | |[1] |egress::hdr.inner_ipv4.$valid | | ||
| 561 | | |[2] |egress::hdr.inner_tcp.$valid | | ||
| 562 | | |[3] |egress::hdr.inner_udp.$valid | | ||
| 563 | | |[4] |egress::hdr.inner_ipv6.$valid | | ||
| 564 | | |[5] |egress::hdr.geneve_opts.oxg_ext_tag.$valid | | ||
| 565 | | |[6] |egress::hdr.geneve_opts.oxg_mcast_tag.$valid | | ||
| 566 | | |[7] |egress::hdr.geneve_opts.oxg_mcast.$valid | | ||
| 567 | | |[8] |egress::hdr.geneve_opts.oxg_mss_tag.$valid | | ||
| 568 | | |[9] |egress::hdr.geneve_opts.oxg_mss.$valid | | ||
| 569 | | |[10] |egress::hdr.ipv6.$valid | | ||
| 570 | +-----------+-----------------+------------------------------------------------------+ | ||
| 571 | |B4 |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid | | ||
| 572 | | |[1] |egress::eg_intr_md.egress_port.$valid | | ||
| 573 | | |[2] |egress::eg_intr_md_for_dprsr.drop_ctl.$valid | | ||
| 574 | | |[3] |egress::hdr.ethernet.$valid | | ||
| 575 | | |[4] |egress::hdr.vlan.$valid | | ||
| 576 | | |[5] |egress::hdr.ipv4.$valid | | ||
| 577 | | |[6] |egress::hdr.udp.$valid | | ||
| 578 | | |[7] |egress::hdr.geneve.$valid | | ||
| 579 | +-----------+-----------------+------------------------------------------------------+ | ||
| 580 | | |Total Bits Used |19 / 128 ( 14.8 %) | | ||
| 581 | | |Pack Density |19 / 24 ( 79.2 %) | | ||
| 582 | +-----------+-----------------+------------------------------------------------------+ | ||
| 583 | |||
| 584 | +--------------------------------------------------------+------------+-----------+----------------+-----------------+ | ||
| 585 | |Field Slice |Live Range |Container |Container Type |Container Slice | | ||
| 586 | +--------------------------------------------------------+------------+-----------+----------------+-----------------+ | ||
| 587 | |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |[-1r, 14w] |H2 |H |[0] | | ||
| 588 | |ingress::ig_intr_md.ingress_port |[-1r, 14w] |MH5 |MH |[8:0] | | ||
| 589 | |ingress::meta.dropped |[-1r, 14w] |H4 |H |[9] | | ||
| 590 | |ingress::meta.ipv4_checksum_err |[-1r, 14w] |H4 |H |[0] | | ||
| 591 | |ingress::meta.is_switch_address |[-1r, 14w] |B3 |B |[6] | | ||
| 592 | |ingress::meta.is_mcast |[-1r, 14w] |B3 |B |[7] | | ||
| 593 | |ingress::meta.is_link_local_mcastv6 |[-1r, 14w] |B3 |B |[5] | | ||
| 594 | |ingress::meta.service_routed |[-1r, 14w] |H4 |H |[11] | | ||
| 595 | |ingress::meta.nat_egress_hit |[-1r, 14w] |B9 |B |[7] | | ||
| 596 | |ingress::meta.nat_ingress_hit |[-1r, 14w] |H4 |H |[13] | | ||
| 597 | |ingress::meta.uplink_ingress |[-1r, 14w] |B9 |B |[1] | | ||
| 598 | |ingress::meta.encap_needed |[-1r, 14w] |W11 |W |[26] | | ||
| 599 | |ingress::meta.resolve_nexthop |[-1r, 14w] |B2 |B |[6] | | ||
| 600 | |ingress::meta.route_ttl_is_1[0] |[-1r, 14w] |B5 |B |[0] | | ||
| 601 | |ingress::meta.route_ttl_is_1[7:1] |[-1r, 14w] |B5 |B |[7:1] | | ||
| 602 | |ingress::meta.skip_ttl_check |[-1r, 14w] |B6 |B |[0] | | ||
| 603 | |ingress::meta.nexthop_is_v6 |[-1r, 14w] |B2 |B |[7] | | ||
| 604 | |ingress::meta.nexthop[87:80] |[5w, 12r] |B10 |B | | | ||
| 605 | |ingress::meta.nexthop[95:88] |[6w, 12r] |B16 |B | | | ||
| 606 | |ingress::meta.nexthop[127:112] |[6w, 12r] |H7 |H | | | ||
| 607 | |ingress::meta.nexthop[79:64] |[5w, 12r] |H15 |H | | | ||
| 608 | |ingress::meta.nexthop[111:96] |[5w, 12r] |H18 |H | | | ||
| 609 | |ingress::meta.nexthop[31:0] |[5w, 12r] |W5 |W | | | ||
| 610 | |ingress::meta.nexthop[63:32] |[5w, 12r] |W8 |W | | | ||
| 611 | |ingress::meta.pkt_type |[-1r, 14w] |W11 |W |[25:16] | | ||
| 612 | |ingress::meta.drop_reason |[-1r, 14w] |H4 |H |[8:1] | | ||
| 613 | |ingress::meta.l4_src_port |[-1r, 14w] |H21 |H | | | ||
| 614 | |ingress::meta.l4_dst_port |[-1r, 14w] |W15 |W |[15:0] | | ||
| 615 | |ingress::meta.nat_ingress_tgt[111:96] |[-1r, 14w] |W3 |W |[15:0] | | ||
| 616 | |ingress::meta.nat_ingress_tgt[127:112] |[-1r, 14w] |W3 |W |[31:16] | | ||
| 617 | |ingress::meta.nat_ingress_tgt[31:0] |[-1r, 14w] |W14 |W | | | ||
| 618 | |ingress::meta.nat_ingress_tgt[63:32] |[-1r, 14w] |W26 |W | | | ||
| 619 | |ingress::meta.nat_ingress_tgt[95:64] |[-1r, 14w] |W38 |W | | | ||
| 620 | |ingress::meta.nat_inner_mac[47:32] |[-1r, 14w] |H20 |H | | | ||
| 621 | |ingress::meta.nat_inner_mac[31:0] |[-1r, 14w] |W7 |W | | | ||
| 622 | |ingress::meta.nat_geneve_vni[23:16] |[-1r, 14w] |B5 |B | | | ||
| 623 | |ingress::meta.nat_geneve_vni[15:0] |[-1r, 14w] |H16 |H | | | ||
| 624 | |ingress::meta.icmp_recalc |[-1r, 14w] |H4 |H |[12] | | ||
| 625 | |ingress::meta.icmp_csum |[-1r, 14w] |H0 |H | | | ||
| 626 | |ingress::meta.body_checksum |[-1r, 14w] |H1 |H | | | ||
| 627 | |ingress::meta.l4_length |[-1r, 14w] |H6 |H | | | ||
| 628 | |ingress::meta.orig_src_mac[39:32] |[-1r, 14w] |H36 |H |[7:0] | | ||
| 629 | |ingress::meta.orig_src_mac[47:40] |[-1r, 14w] |H36 |H |[15:8] | | ||
| 630 | |ingress::meta.orig_src_mac[23:0] |[-1r, 14w] |W39 |W |[23:0] | | ||
| 631 | |ingress::meta.orig_src_mac[31:24] |[-1r, 14w] |W39 |W |[31:24] | | ||
| 632 | |ingress::meta.orig_src_ipv4 |[-1r, 14w] |W2 |W | | | ||
| 633 | |ingress::meta.orig_dst_ipv4 |[-1r, 14w] |W22 |W | | | ||
| 634 | |ingress::meta.bridge_hdr.__pad_0 |[-1r, 14w] |B9 |B |[7] | | ||
| 635 | |ingress::meta.bridge_hdr.reserved |[-1r, 14w] |B9 |B |[6:2] | | ||
| 636 | |ingress::meta.bridge_hdr.nat_egress_hit |[-1r, 14w] |B9 |B |[1] | | ||
| 637 | |ingress::meta.bridge_hdr.is_mcast_routed |[-1r, 14w] |B9 |B |[0] | | ||
| 638 | |ingress::meta.bridge_hdr.__pad_1 |[-1r, 14w] |MH18 |MH |[15:9] | | ||
| 639 | |ingress::meta.bridge_hdr.ingress_port |[-1r, 14w] |MH18 |MH |[8:0] | | ||
| 640 | |ingress::meta.nat_ingress_csum |[-1r, 14w] |W11 |W |[15:0] | | ||
| 641 | |ingress::hdr.ethernet.dst_mac[39:32] |[-1r, 14w] |MH13 |MH |[7:0] | | ||
| 642 | |ingress::hdr.ethernet.dst_mac[47:40] |[-1r, 14w] |MH13 |MH |[15:8] | | ||
| 643 | |ingress::hdr.ethernet.dst_mac[23:0] |[-1r, 14w] |MW15 |MW |[23:0] | | ||
| 644 | |ingress::hdr.ethernet.dst_mac[31:24] |[-1r, 14w] |MW15 |MW |[31:24] | | ||
| 645 | |ingress::hdr.ethernet.src_mac[7:0] |[0w, 9r] |DB5 |DB | | | ||
| 646 | |ingress::hdr.ethernet.src_mac[7:0] |[-1w, 0r] |MB4 |MB | | | ||
| 647 | |ingress::hdr.ethernet.src_mac[7:0] |[9w, 14r] |MB4 |MB | | | ||
| 648 | |ingress::hdr.ethernet.src_mac[47:32] |[-1r, 14w] |MH12 |MH | | | ||
| 649 | |ingress::hdr.ethernet.ether_type |[-1r, 14w] |MH9 |MH | | | ||
| 650 | |ingress::hdr.sidecar.sc_code |[-1r, 14w] |MH19 |MH |[15:8] | | ||
| 651 | |ingress::hdr.sidecar.sc_pad |[-1r, 14w] |MH19 |MH |[7:0] | | ||
| 652 | |ingress::hdr.sidecar.sc_ingress[8:0] |[-1r, 14w] |H14 |H |[8:0] | | ||
| 653 | |ingress::hdr.sidecar.sc_ingress[15:9] |[-1r, 14w] |H14 |H |[15:9] | | ||
| 654 | |ingress::hdr.sidecar.sc_egress[8:0] |[-1r, 14w] |H13 |H |[8:0] | | ||
| 655 | |ingress::hdr.sidecar.sc_egress[15:9] |[-1r, 14w] |H13 |H |[15:9] | | ||
| 656 | |ingress::hdr.sidecar.sc_ether_type |[-1r, 14w] |MH8 |MH | | | ||
| 657 | |ingress::hdr.sidecar.sc_payload[87:80] |[-1r, 14w] |B11 |B | | | ||
| 658 | |ingress::hdr.sidecar.sc_payload[95:88] |[-1r, 14w] |B12 |B | | | ||
| 659 | |ingress::hdr.sidecar.sc_payload[127:112] |[-1r, 14w] |H10 |H | | | ||
| 660 | |ingress::hdr.sidecar.sc_payload[79:64] |[-1r, 14w] |H17 |H | | | ||
| 661 | |ingress::hdr.sidecar.sc_payload[111:96] |[-1r, 14w] |H19 |H | | | ||
| 662 | |ingress::hdr.sidecar.sc_payload[31:0] |[-1r, 14w] |W9 |W | | | ||
| 663 | |ingress::hdr.sidecar.sc_payload[63:32] |[-1r, 14w] |W10 |W | | | ||
| 664 | |ingress::hdr.vlan.pcp |[-1r, 14w] |H9 |H |[15:13] | | ||
| 665 | |ingress::hdr.vlan.dei |[-1r, 14w] |H9 |H |[12] | | ||
| 666 | |ingress::hdr.vlan.vlan_id |[-1r, 14w] |H9 |H |[11:0] | | ||
| 667 | |ingress::hdr.vlan.ether_type |[-1r, 14w] |MH10 |MH | | | ||
| 668 | |ingress::hdr.ipv4.version |[-1r, 14w] |B13 |B |[7:4] | | ||
| 669 | |ingress::hdr.ipv4.ihl |[-1r, 14w] |B13 |B |[3:0] | | ||
| 670 | |ingress::hdr.ipv4.diffserv |[-1r, 14w] |MB7 |MB | | | ||
| 671 | |ingress::hdr.ipv4.total_len |[-1r, 14w] |H5 |H | | | ||
| 672 | |ingress::hdr.ipv4.identification |[-1r, 14w] |W12 |W |[31:16] | | ||
| 673 | |ingress::hdr.ipv4.flags |[-1r, 14w] |W12 |W |[15:13] | | ||
| 674 | |ingress::hdr.ipv4.frag_offset |[-1r, 14w] |W12 |W |[12:0] | | ||
| 675 | |ingress::hdr.ipv4.ttl[0] |[-1r, 14w] |B8 |B |[0] | | ||
| 676 | |ingress::hdr.ipv4.ttl[7:1] |[-1r, 14w] |B8 |B |[7:1] | | ||
| 677 | |ingress::hdr.ipv4.protocol |[-1r, 14w] |MB3 |MB | | | ||
| 678 | |ingress::hdr.ipv4.hdr_checksum |[-1r, 14w] |MH17 |MH | | | ||
| 679 | |ingress::hdr.ipv4.src_addr |[-1r, 14w] |MW3 |MW | | | ||
| 680 | |ingress::hdr.ipv4.dst_addr |[-1r, 14w] |MW1 |MW | | | ||
| 681 | |ingress::hdr.icmp.type |[-1r, 14w] |H11 |H |[15:8] | | ||
| 682 | |ingress::hdr.icmp.code |[-1r, 14w] |H11 |H |[7:0] | | ||
| 683 | |ingress::hdr.icmp.hdr_checksum |[-1r, 14w] |MH14 |MH | | | ||
| 684 | |ingress::hdr.icmp.data[15:0] |[-1r, 14w] |MW7 |MW |[15:0] | | ||
| 685 | |ingress::hdr.icmp.data[31:16] |[-1r, 14w] |MW7 |MW |[31:16] | | ||
| 686 | |ingress::hdr.tcp.src_port |[-1r, 14w] |MW11 |MW |[31:16] | | ||
| 687 | |ingress::hdr.tcp.dst_port |[-1r, 14w] |MW11 |MW |[15:0] | | ||
| 688 | |ingress::hdr.tcp.seq_no |[-1r, 14w] |W37 |W | | | ||
| 689 | |ingress::hdr.tcp.ack_no |[-1r, 14w] |W25 |W | | | ||
| 690 | |ingress::hdr.tcp.data_offset |[-1r, 14w] |W0 |W |[31:28] | | ||
| 691 | |ingress::hdr.tcp.res |[-1r, 14w] |W0 |W |[27:24] | | ||
| 692 | |ingress::hdr.tcp.flags |[-1r, 14w] |W0 |W |[23:16] | | ||
| 693 | |ingress::hdr.tcp.window |[-1r, 14w] |W0 |W |[15:0] | | ||
| 694 | |ingress::hdr.tcp.checksum |[-1r, 14w] |MW7 |MW |[31:16] | | ||
| 695 | |ingress::hdr.tcp.urgent_ptr |[-1r, 14w] |MW7 |MW |[15:0] | | ||
| 696 | |ingress::hdr.udp.src_port |[-1r, 14w] |W17 |W |[31:16] | | ||
| 697 | |ingress::hdr.udp.dst_port |[-1r, 14w] |W17 |W |[15:0] | | ||
| 698 | |ingress::hdr.udp.hdr_length |[-1r, 14w] |H8 |H | | | ||
| 699 | |ingress::hdr.udp.checksum |[-1r, 14w] |MH15 |MH | | | ||
| 700 | |ingress::hdr.geneve.version |[-1r, 14w] |W4 |W |[31:30] | | ||
| 701 | |ingress::hdr.geneve.opt_len |[-1r, 14w] |W4 |W |[29:24] | | ||
| 702 | |ingress::hdr.geneve.ctrl |[-1r, 14w] |W4 |W |[23] | | ||
| 703 | |ingress::hdr.geneve.crit |[-1r, 14w] |W4 |W |[22] | | ||
| 704 | |ingress::hdr.geneve.reserved |[-1r, 14w] |W4 |W |[21:16] | | ||
| 705 | |ingress::hdr.geneve.protocol |[-1r, 14w] |W4 |W |[15:0] | | ||
| 706 | |ingress::hdr.geneve.vni[23:16] |[5w, 12r] |DB0 |DB | | | ||
| 707 | |ingress::hdr.geneve.vni[15:0] |[5w, 12r] |DH4 |DH | | | ||
| 708 | |ingress::hdr.geneve.vni[23:16] |[-1w, 5r] |B10 |B | | | ||
| 709 | |ingress::hdr.geneve.vni[23:16] |[12w, 14r] |B10 |B | | | ||
| 710 | |ingress::hdr.geneve.vni[15:0] |[-1w, 5r] |H15 |H | | | ||
| 711 | |ingress::hdr.geneve.vni[15:0] |[12w, 14r] |H15 |H | | | ||
| 712 | |ingress::hdr.geneve.reserved2 |[-1r, 14w] |MB5 |MB | | | ||
| 713 | |ingress::hdr.inner_eth.dst_mac[47:32] |[5w, 12r] |DH5 |DH | | | ||
| 714 | |ingress::hdr.inner_eth.dst_mac[31:0] |[5w, 12r] |DW1 |DW | | | ||
| 715 | |ingress::hdr.inner_eth.dst_mac[47:32] |[-1w, 5r] |H18 |H | | | ||
| 716 | |ingress::hdr.inner_eth.dst_mac[47:32] |[12w, 14r] |H18 |H | | | ||
| 717 | |ingress::hdr.inner_eth.dst_mac[31:0] |[-1w, 5r] |W8 |W | | | ||
| 718 | |ingress::hdr.inner_eth.dst_mac[31:0] |[12w, 14r] |W8 |W | | | ||
| 719 | |ingress::hdr.inner_eth.src_mac[47:16] |[5w, 12r] |DW0 |DW | | | ||
| 720 | |ingress::hdr.inner_eth.src_mac[15:0] |[-1r, 14w] |MH7 |MH | | | ||
| 721 | |ingress::hdr.inner_eth.src_mac[47:16] |[-1w, 5r] |W5 |W | | | ||
| 722 | |ingress::hdr.inner_eth.src_mac[47:16] |[12w, 14r] |W5 |W | | | ||
| 723 | |ingress::hdr.inner_eth.ether_type |[-1r, 14w] |MH11 |MH | | | ||
| 724 | |ingress::hdr.inner_ipv4.version |[6w, 12r] |DB4 |DB |[7:4] | | ||
| 725 | |ingress::hdr.inner_ipv4.version |[-1w, 6r] |B16 |B |[7:4] | | ||
| 726 | |ingress::hdr.inner_ipv4.version |[12w, 14r] |B16 |B |[7:4] | | ||
| 727 | |ingress::hdr.inner_ipv4.ihl |[6w, 12r] |DB4 |DB |[3:0] | | ||
| 728 | |ingress::hdr.inner_ipv4.ihl |[-1w, 6r] |B16 |B |[3:0] | | ||
| 729 | |ingress::hdr.inner_ipv4.ihl |[12w, 14r] |B16 |B |[3:0] | | ||
| 730 | |ingress::hdr.inner_ipv4.diffserv |[-1r, 14w] |MB6 |MB | | | ||
| 731 | |ingress::hdr.inner_ipv4.total_len |[-1r, 14w] |H3 |H | | | ||
| 732 | |ingress::hdr.inner_ipv4.identification |[-1r, 14w] |W13 |W |[31:16] | | ||
| 733 | |ingress::hdr.inner_ipv4.flags |[-1r, 14w] |W13 |W |[15:13] | | ||
| 734 | |ingress::hdr.inner_ipv4.frag_offset |[-1r, 14w] |W13 |W |[12:0] | | ||
| 735 | |ingress::hdr.inner_ipv4.ttl[0] |[-1r, 14w] |MB0 |MB |[0] | | ||
| 736 | |ingress::hdr.inner_ipv4.ttl[7:1] |[-1r, 14w] |MB0 |MB |[7:1] | | ||
| 737 | |ingress::hdr.inner_ipv4.protocol |[-1r, 14w] |MB2 |MB | | | ||
| 738 | |ingress::hdr.inner_ipv4.hdr_checksum |[-1r, 14w] |MH16 |MH | | | ||
| 739 | |ingress::hdr.inner_ipv4.src_addr |[-1r, 14w] |MW2 |MW | | | ||
| 740 | |ingress::hdr.inner_ipv4.dst_addr |[-1r, 14w] |MW0 |MW | | | ||
| 741 | |ingress::hdr.inner_tcp.src_port |[-1r, 14w] |MW11 |MW |[31:16] | | ||
| 742 | |ingress::hdr.inner_tcp.dst_port |[-1r, 14w] |MW11 |MW |[15:0] | | ||
| 743 | |ingress::hdr.inner_tcp.seq_no |[-1r, 14w] |W37 |W | | | ||
| 744 | |ingress::hdr.inner_tcp.ack_no |[-1r, 14w] |W25 |W | | | ||
| 745 | |ingress::hdr.inner_tcp.data_offset |[-1r, 14w] |W0 |W |[31:28] | | ||
| 746 | |ingress::hdr.inner_tcp.res |[-1r, 14w] |W0 |W |[27:24] | | ||
| 747 | |ingress::hdr.inner_tcp.flags |[-1r, 14w] |W0 |W |[23:16] | | ||
| 748 | |ingress::hdr.inner_tcp.window |[-1r, 14w] |W0 |W |[15:0] | | ||
| 749 | |ingress::hdr.inner_tcp.checksum |[-1r, 14w] |MW7 |MW |[31:16] | | ||
| 750 | |ingress::hdr.inner_tcp.urgent_ptr |[-1r, 14w] |MW7 |MW |[15:0] | | ||
| 751 | |ingress::hdr.inner_udp.src_port |[-1r, 14w] |MW7 |MW |[31:16] | | ||
| 752 | |ingress::hdr.inner_udp.dst_port |[-1r, 14w] |MW7 |MW |[15:0] | | ||
| 753 | |ingress::hdr.inner_udp.hdr_length |[6w, 12r] |DH0 |DH | | | ||
| 754 | |ingress::hdr.inner_udp.hdr_length |[-1w, 6r] |H7 |H | | | ||
| 755 | |ingress::hdr.inner_udp.hdr_length |[12w, 14r] |H7 |H | | | ||
| 756 | |ingress::hdr.inner_udp.checksum |[-1r, 14w] |MH14 |MH | | | ||
| 757 | |ingress::hdr.inner_icmp.type |[-1r, 14w] |H11 |H |[15:8] | | ||
| 758 | |ingress::hdr.inner_icmp.code |[-1r, 14w] |H11 |H |[7:0] | | ||
| 759 | |ingress::hdr.inner_icmp.hdr_checksum |[-1r, 14w] |MH14 |MH | | | ||
| 760 | |ingress::hdr.inner_icmp.data[15:0] |[-1r, 14w] |MW7 |MW |[15:0] | | ||
| 761 | |ingress::hdr.inner_icmp.data[31:16] |[-1r, 14w] |MW7 |MW |[31:16] | | ||
| 762 | |ingress::hdr.inner_ipv6.version |[-1r, 14w] |W13 |W |[31:28] | | ||
| 763 | |ingress::hdr.inner_ipv6.traffic_class |[-1r, 14w] |W13 |W |[27:20] | | ||
| 764 | |ingress::hdr.inner_ipv6.flow_label |[-1r, 14w] |W13 |W |[19:0] | | ||
| 765 | |ingress::hdr.inner_ipv6.payload_len |[-1r, 14w] |H3 |H | | | ||
| 766 | |ingress::hdr.inner_ipv6.next_hdr |[-1r, 14w] |MB2 |MB | | | ||
| 767 | |ingress::hdr.inner_ipv6.hop_limit |[-1r, 14w] |MB0 |MB | | | ||
| 768 | |ingress::hdr.inner_ipv6.src_addr[111:96] |[-1r, 14w] |MW2 |MW |[15:0] | | ||
| 769 | |ingress::hdr.inner_ipv6.src_addr[127:112] |[-1r, 14w] |MW2 |MW |[31:16] | | ||
| 770 | |ingress::hdr.inner_ipv6.src_addr[31:0] |[-1r, 14w] |MW5 |MW | | | ||
| 771 | |ingress::hdr.inner_ipv6.src_addr[63:32] |[-1r, 14w] |MW9 |MW | | | ||
| 772 | |ingress::hdr.inner_ipv6.src_addr[95:64] |[-1r, 14w] |MW13 |MW | | | ||
| 773 | |ingress::hdr.inner_ipv6.dst_addr[111:96] |[-1r, 14w] |MW0 |MW |[15:0] | | ||
| 774 | |ingress::hdr.inner_ipv6.dst_addr[127:112] |[-1r, 14w] |MW0 |MW |[31:16] | | ||
| 775 | |ingress::hdr.inner_ipv6.dst_addr[31:0] |[-1r, 14w] |MW4 |MW | | | ||
| 776 | |ingress::hdr.inner_ipv6.dst_addr[63:32] |[-1r, 14w] |MW8 |MW | | | ||
| 777 | |ingress::hdr.inner_ipv6.dst_addr[95:64] |[-1r, 14w] |MW12 |MW | | | ||
| 778 | |ingress::hdr.geneve_opts.oxg_ext_tag.class |[-1r, 14w] |W1 |W |[31:16] | | ||
| 779 | |ingress::hdr.geneve_opts.oxg_ext_tag.crit |[-1r, 14w] |W1 |W |[15] | | ||
| 780 | |ingress::hdr.geneve_opts.oxg_ext_tag.type |[-1r, 14w] |W1 |W |[14:8] | | ||
| 781 | |ingress::hdr.geneve_opts.oxg_ext_tag.reserved |[-1r, 14w] |W1 |W |[7:5] | | ||
| 782 | |ingress::hdr.geneve_opts.oxg_ext_tag.opt_len |[-1r, 14w] |W1 |W |[4:0] | | ||
| 783 | |ingress::hdr.ipv6.version |[-1r, 14w] |W16 |W |[31:28] | | ||
| 784 | |ingress::hdr.ipv6.traffic_class |[-1r, 14w] |W16 |W |[27:20] | | ||
| 785 | |ingress::hdr.ipv6.flow_label |[-1r, 14w] |W16 |W |[19:0] | | ||
| 786 | |ingress::hdr.ipv6.payload_len |[-1r, 14w] |H5 |H | | | ||
| 787 | |ingress::hdr.ipv6.next_hdr |[-1r, 14w] |MB3 |MB | | | ||
| 788 | |ingress::hdr.ipv6.hop_limit |[-1r, 14w] |B8 |B | | | ||
| 789 | |ingress::hdr.ipv6.src_addr[111:96] |[-1r, 14w] |MW3 |MW |[15:0] | | ||
| 790 | |ingress::hdr.ipv6.src_addr[127:112] |[-1r, 14w] |MW3 |MW |[31:16] | | ||
| 791 | |ingress::hdr.ipv6.src_addr[31:0] |[-1r, 14w] |MW6 |MW | | | ||
| 792 | |ingress::hdr.ipv6.src_addr[63:32] |[-1r, 14w] |MW10 |MW | | | ||
| 793 | |ingress::hdr.ipv6.src_addr[95:64] |[-1r, 14w] |MW14 |MW | | | ||
| 794 | |ingress::hdr.ipv6.dst_addr[111:96] |[-1r, 14w] |MW1 |MW |[15:0] | | ||
| 795 | |ingress::hdr.ipv6.dst_addr[127:112] |[-1r, 14w] |MW1 |MW |[31:16] | | ||
| 796 | |ingress::hdr.ipv6.dst_addr[31:0] |[-1r, 14w] |W12 |W | | | ||
| 797 | |ingress::hdr.ipv6.dst_addr[63:32] |[-1r, 14w] |W24 |W | | | ||
| 798 | |ingress::hdr.ipv6.dst_addr[95:64] |[-1r, 14w] |W36 |W | | | ||
| 799 | |ingress::ig_intr_md_for_tm.ucast_egress_port |[-1r, 14w] |MH6 |MH |[8:0] | | ||
| 800 | |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |[-1r, 14w] |H2 |H |[1] | | ||
| 801 | |$tmp10 |[-1r, 14w] |W3 |W |[7:0] | | ||
| 802 | |ingress::l3_router_fwd.is_hit |[-1r, 14w] |H4 |H |[10] | | ||
| 803 | |ingress::l3_router_fwd.ecmp_hash |[-1r, 14w] |W2 |W |[7:0] | | ||
| 804 | |ingress::l3_router_fwd.idx[7:0] |[-1r, 14w] |H12 |H |[7:0] | | ||
| 805 | |ingress::l3_router_fwd.idx[15:8] |[-1r, 14w] |H12 |H |[15:8] | | ||
| 806 | |ingress::l3_router_fwd.slots |[0w, 9r] |MB4 |MB | | | ||
| 807 | |ingress::l3_router_fwd.slot[7:0] |[-1r, 14w] |MH4 |MH |[7:0] | | ||
| 808 | |ingress::l3_router_fwd.slot[15:8] |[-1r, 14w] |MH4 |MH |[15:8] | | ||
| 809 | |$tmp11 |[-1r, 14w] |W7 |W |[7:0] | | ||
| 810 | |$tmp12 |[-1r, 14w] |B5 |B |[0] | | ||
| 811 | |ingress::ig_intr_md_for_dprsr.drop_ctl |[-1r, 14w] |B2 |B |[5:3] | | ||
| 812 | |ingress::ig_intr_md_for_dprsr.mirror_type |[-1r, 14w] |MB1 |MB |[3:0] | | ||
| 813 | |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |[-1r, 14w] |H2 |H |[2] | | ||
| 814 | |ingress::hdr.udp.checksum.$deparse_original_csum |[-1r, 14w] |B3 |B |[0] | | ||
| 815 | |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |[-1r, 14w] |B3 |B |[1] | | ||
| 816 | |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |[-1r, 14w] |B3 |B |[2] | | ||
| 817 | |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |[-1r, 14w] |B3 |B |[3] | | ||
| 818 | |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |[-1r, 14w] |B3 |B |[4] | | ||
| 819 | |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |[-1r, 14w] |B2 |B |[1] | | ||
| 820 | |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |[-1r, 14w] |B2 |B |[2] | | ||
| 821 | |ingress::$tmp7 |[-1r, 14w] |B0 |B | | | ||
| 822 | |egress::eg_intr_md_for_dprsr.drop_ctl |[-1r, 14w] |MH2 |MH |[2:0] | | ||
| 823 | |egress::eg_intr_md_for_dprsr.mirror_io_select |[-1r, 14w] |MH3 |MH |[0] | | ||
| 824 | |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |[-1r, 14w] |B4 |B |[0] | | ||
| 825 | |egress::eg_intr_md.egress_port |[-1r, 14w] |MH1 |MH |[8:0] | | ||
| 826 | |egress::eg_intr_md.egress_port.$valid |[-1r, 14w] |B4 |B |[1] | | ||
| 827 | |egress::meta.bridge_hdr.nat_egress_hit |[-1r, 14w] |W23 |W |[17] | | ||
| 828 | |egress::hdr.ethernet.src_mac[47:32] |[-1r, 14w] |MH20 |MH | | | ||
| 829 | |egress::hdr.ethernet.src_mac[31:0] |[-1r, 14w] |W18 |W | | | ||
| 830 | |egress::hdr.ipv6.dst_addr[111:96] |[-1r, 14w] |W6 |W |[15:0] | | ||
| 831 | |egress::hdr.ipv6.dst_addr[127:112] |[-1r, 14w] |W6 |W |[31:16] | | ||
| 832 | |egress::hdr.ipv6.dst_addr[31:0] |[-1r, 14w] |W19 |W | | | ||
| 833 | |egress::hdr.ipv6.dst_addr[63:32] |[-1r, 14w] |W20 |W | | | ||
| 834 | |egress::hdr.ipv6.dst_addr[95:64] |[-1r, 14w] |W21 |W | | | ||
| 835 | |egress::is_link_local_ipv6_mcast_0 |[-1r, 14w] |MB8 |MB |[0] | | ||
| 836 | |egress::meta.drop_reason |[-1r, 14w] |B14 |B | | | ||
| 837 | |egress::eg_intr_md_for_dprsr.drop_ctl.$valid |[-1r, 14w] |B4 |B |[2] | | ||
| 838 | |ingress::meta.bridge_hdr.$valid |[-1r, 14w] |H2 |H |[3] | | ||
| 839 | |ingress::hdr.ethernet.$valid |[-1r, 14w] |H2 |H |[4] | | ||
| 840 | |ingress::hdr.sidecar.$valid |[-1r, 14w] |H2 |H |[5] | | ||
| 841 | |ingress::hdr.vlan.$valid |[-1r, 14w] |B2 |B |[0] | | ||
| 842 | |ingress::hdr.ipv4.$valid |[-1r, 14w] |H2 |H |[6] | | ||
| 843 | |ingress::hdr.icmp.$valid |[-1r, 14w] |H2 |H |[7] | | ||
| 844 | |ingress::hdr.tcp.$valid |[-1r, 14w] |H2 |H |[8] | | ||
| 845 | |ingress::hdr.udp.$valid |[-1r, 14w] |H2 |H |[9] | | ||
| 846 | |ingress::hdr.geneve.$valid |[-1r, 14w] |H2 |H |[10] | | ||
| 847 | |ingress::hdr.inner_eth.$valid |[-1r, 14w] |H2 |H |[11] | | ||
| 848 | |ingress::hdr.inner_ipv4.$valid |[-1r, 14w] |H2 |H |[12] | | ||
| 849 | |ingress::hdr.inner_tcp.$valid |[-1r, 14w] |H2 |H |[13] | | ||
| 850 | |ingress::hdr.inner_udp.$valid |[-1r, 14w] |H2 |H |[14] | | ||
| 851 | |ingress::hdr.inner_icmp.$valid |[-1r, 14w] |H2 |H |[15] | | ||
| 852 | |ingress::hdr.inner_ipv6.$valid |[-1r, 14w] |B1 |B |[0] | | ||
| 853 | |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |[-1r, 14w] |B1 |B |[1] | | ||
| 854 | |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |[-1r, 14w] |B1 |B |[2] | | ||
| 855 | |ingress::hdr.geneve_opts.oxg_mcast.$valid |[-1r, 14w] |B1 |B |[3] | | ||
| 856 | |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |[-1r, 14w] |B1 |B |[4] | | ||
| 857 | |ingress::hdr.geneve_opts.oxg_mss.$valid |[-1r, 14w] |B1 |B |[5] | | ||
| 858 | |ingress::hdr.ipv6.$valid |[-1r, 14w] |B1 |B |[6] | | ||
| 859 | |ingress::hdr.arp.$valid |[-1r, 14w] |B1 |B |[7] | | ||
| 860 | |egress::hdr.ethernet.$valid |[-1r, 14w] |B4 |B |[3] | | ||
| 861 | |egress::hdr.vlan.$valid |[-1r, 14w] |B4 |B |[4] | | ||
| 862 | |egress::hdr.ipv4.$valid |[-1r, 14w] |B4 |B |[5] | | ||
| 863 | |egress::hdr.udp.$valid |[-1r, 14w] |B4 |B |[6] | | ||
| 864 | |egress::hdr.geneve.$valid |[-1r, 14w] |B4 |B |[7] | | ||
| 865 | |egress::hdr.inner_eth.$valid |[-1r, 14w] |MH0 |MH |[0] | | ||
| 866 | |egress::hdr.inner_ipv4.$valid |[-1r, 14w] |MH0 |MH |[1] | | ||
| 867 | |egress::hdr.inner_tcp.$valid |[-1r, 14w] |MH0 |MH |[2] | | ||
| 868 | |egress::hdr.inner_udp.$valid |[-1r, 14w] |MH0 |MH |[3] | | ||
| 869 | |egress::hdr.inner_ipv6.$valid |[-1r, 14w] |MH0 |MH |[4] | | ||
| 870 | |egress::hdr.geneve_opts.oxg_ext_tag.$valid |[-1r, 14w] |MH0 |MH |[5] | | ||
| 871 | |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |[-1r, 14w] |MH0 |MH |[6] | | ||
| 872 | |egress::hdr.geneve_opts.oxg_mcast.$valid |[-1r, 14w] |MH0 |MH |[7] | | ||
| 873 | |egress::hdr.geneve_opts.oxg_mss_tag.$valid |[-1r, 14w] |MH0 |MH |[8] | | ||
| 874 | |egress::hdr.geneve_opts.oxg_mss.$valid |[-1r, 14w] |MH0 |MH |[9] | | ||
| 875 | |egress::hdr.ipv6.$valid |[-1r, 14w] |MH0 |MH |[10] | | ||
| 876 | +--------------------------------------------------------+------------+-----------+----------------+-----------------+ | ||
| 877 | |||
| 878 | |||
| 879 | |||
| 880 | |||
| 881 | |||
| 882 | PHV Allocation State | ||
| 883 | |||
| 884 | MAU Groups: | ||
| 885 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 886 | | Container Set | Containers Used | Bits Used | Bits Used on Ingress | Bits Used on Egress | Bits Allocated | Bits Allocated on Ingress | Bits Allocated on Egress | Available Bits | | ||
| 887 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 888 | | B0-11 | 11 ( 91.7 %) | 81 ( 84.4 %) | 73 ( 76 %) | 8 ( 8.33 %) | 116 ( 121 %) | 108 ( 112 %) | 8 ( 8.33 %) | 96 | | ||
| 889 | | MB0-3 | 4 ( 100 %) | 28 ( 87.5 %) | 28 ( 87.5 %) | 0 ( 0 %) | 52 ( 162 %) | 52 ( 162 %) | 0 ( 0 %) | 32 | | ||
| 890 | | DB0-3 | 1 ( 25 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 32 | | ||
| 891 | | | | | | | | | | | | ||
| 892 | | Usage for Group 1 | 16 ( 80 %) | 117 ( 73.1 %) | 109 ( 68.1 %) | 8 ( 5 %) | 176 ( 110 %) | 168 ( 105 %) | 8 ( 5 %) | 160 | | ||
| 893 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 894 | | B12-23 | 4 ( 33.3 %) | 32 ( 33.3 %) | 24 ( 25 %) | 8 ( 8.33 %) | 48 ( 50 %) | 40 ( 41.7 %) | 8 ( 8.33 %) | 96 | | ||
| 895 | | MB4-7 | 4 ( 100 %) | 32 ( 100 %) | 32 ( 100 %) | 0 ( 0 %) | 48 ( 150 %) | 48 ( 150 %) | 0 ( 0 %) | 32 | | ||
| 896 | | DB4-7 | 2 ( 50 %) | 16 ( 50 %) | 16 ( 50 %) | 0 ( 0 %) | 16 ( 50 %) | 16 ( 50 %) | 0 ( 0 %) | 32 | | ||
| 897 | | | | | | | | | | | | ||
| 898 | | Usage for Group 2 | 10 ( 50 %) | 80 ( 50 %) | 72 ( 45 %) | 8 ( 5 %) | 112 ( 70 %) | 104 ( 65 %) | 8 ( 5 %) | 160 | | ||
| 899 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 900 | | B24-35 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 96 | | ||
| 901 | | MB8-11 | 1 ( 25 %) | 1 ( 3.12 %) | 0 ( 0 %) | 1 ( 3.12 %) | 1 ( 3.12 %) | 0 ( 0 %) | 1 ( 3.12 %) | 32 | | ||
| 902 | | DB8-11 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 | | ||
| 903 | | | | | | | | | | | | ||
| 904 | | Usage for Group 3 | 1 ( 5 %) | 1 ( 0.625%) | 0 ( 0 %) | 1 ( 0.625%) | 1 ( 0.625%) | 0 ( 0 %) | 1 ( 0.625%) | 160 | | ||
| 905 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 906 | | B36-47 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 96 | | ||
| 907 | | MB12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 | | ||
| 908 | | DB12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 | | ||
| 909 | | | | | | | | | | | | ||
| 910 | | Usage for Group 4 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 160 | | ||
| 911 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 912 | | H0-11 | 12 ( 100 %) | 190 ( 99 %) | 190 ( 99 %) | 0 ( 0 %) | 270 ( 141 %) | 270 ( 141 %) | 0 ( 0 %) | 192 | | ||
| 913 | | MH0-3 | 4 ( 100 %) | 24 ( 37.5 %) | 0 ( 0 %) | 24 ( 37.5 %) | 24 ( 37.5 %) | 0 ( 0 %) | 24 ( 37.5 %) | 64 | | ||
| 914 | | DH0-3 | 1 ( 25 %) | 16 ( 25 %) | 16 ( 25 %) | 0 ( 0 %) | 16 ( 25 %) | 16 ( 25 %) | 0 ( 0 %) | 64 | | ||
| 915 | | | | | | | | | | | | ||
| 916 | | Usage for Group 5 | 17 ( 85 %) | 230 ( 71.9 %) | 206 ( 64.4 %) | 24 ( 7.5 %) | 310 ( 96.9 %) | 286 ( 89.4 %) | 24 ( 7.5 %) | 320 | | ||
| 917 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 918 | | H12-23 | 10 ( 83.3 %) | 160 ( 83.3 %) | 160 ( 83.3 %) | 0 ( 0 %) | 224 ( 117 %) | 224 ( 117 %) | 0 ( 0 %) | 192 | | ||
| 919 | | MH4-7 | 4 ( 100 %) | 50 ( 78.1 %) | 50 ( 78.1 %) | 0 ( 0 %) | 50 ( 78.1 %) | 50 ( 78.1 %) | 0 ( 0 %) | 64 | | ||
| 920 | | DH4-7 | 2 ( 50 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 64 | | ||
| 921 | | | | | | | | | | | | ||
| 922 | | Usage for Group 6 | 16 ( 80 %) | 242 ( 75.6 %) | 242 ( 75.6 %) | 0 ( 0 %) | 306 ( 95.6 %) | 306 ( 95.6 %) | 0 ( 0 %) | 320 | | ||
| 923 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 924 | | H24-35 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 192 | | ||
| 925 | | MH8-11 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 | | ||
| 926 | | DH8-11 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 | | ||
| 927 | | | | | | | | | | | | ||
| 928 | | Usage for Group 7 | 4 ( 20 %) | 64 ( 20 %) | 64 ( 20 %) | 0 ( 0 %) | 64 ( 20 %) | 64 ( 20 %) | 0 ( 0 %) | 320 | | ||
| 929 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 930 | | H36-47 | 1 ( 8.33 %) | 16 ( 8.33 %) | 16 ( 8.33 %) | 0 ( 0 %) | 16 ( 8.33 %) | 16 ( 8.33 %) | 0 ( 0 %) | 192 | | ||
| 931 | | MH12-15 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 96 ( 150 %) | 96 ( 150 %) | 0 ( 0 %) | 64 | | ||
| 932 | | DH12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 | | ||
| 933 | | | | | | | | | | | | ||
| 934 | | Usage for Group 8 | 5 ( 25 %) | 80 ( 25 %) | 80 ( 25 %) | 0 ( 0 %) | 112 ( 35 %) | 112 ( 35 %) | 0 ( 0 %) | 320 | | ||
| 935 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 936 | | H48-59 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 192 | | ||
| 937 | | MH16-19 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 | | ||
| 938 | | DH16-19 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 | | ||
| 939 | | | | | | | | | | | | ||
| 940 | | Usage for Group 9 | 4 ( 20 %) | 64 ( 20 %) | 64 ( 20 %) | 0 ( 0 %) | 64 ( 20 %) | 64 ( 20 %) | 0 ( 0 %) | 320 | | ||
| 941 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 942 | | H60-71 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 192 | | ||
| 943 | | MH20-23 | 1 ( 25 %) | 16 ( 25 %) | 0 ( 0 %) | 16 ( 25 %) | 16 ( 25 %) | 0 ( 0 %) | 16 ( 25 %) | 64 | | ||
| 944 | | DH20-23 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 | | ||
| 945 | | | | | | | | | | | | ||
| 946 | | Usage for Group 10 | 1 ( 5 %) | 16 ( 5 %) | 0 ( 0 %) | 16 ( 5 %) | 16 ( 5 %) | 0 ( 0 %) | 16 ( 5 %) | 320 | | ||
| 947 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 948 | | W0-11 | 12 ( 100 %) | 379 ( 98.7 %) | 347 ( 90.4 %) | 32 ( 8.33 %) | 563 ( 147 %) | 531 ( 138 %) | 32 ( 8.33 %) | 384 | | ||
| 949 | | MW0-3 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 256 ( 200 %) | 256 ( 200 %) | 0 ( 0 %) | 128 | | ||
| 950 | | DW0-3 | 2 ( 50 %) | 64 ( 50 %) | 64 ( 50 %) | 0 ( 0 %) | 64 ( 50 %) | 64 ( 50 %) | 0 ( 0 %) | 128 | | ||
| 951 | | | | | | | | | | | | ||
| 952 | | Usage for Group 11 | 18 ( 90 %) | 571 ( 89.2 %) | 539 ( 84.2 %) | 32 ( 5 %) | 883 ( 138 %) | 851 ( 133 %) | 32 ( 5 %) | 640 | | ||
| 953 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 954 | | W12-23 | 12 ( 100 %) | 337 ( 87.8 %) | 208 ( 54.2 %) | 129 ( 33.6 %) | 401 ( 104 %) | 272 ( 70.8 %) | 129 ( 33.6 %) | 384 | | ||
| 955 | | MW4-7 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 256 ( 200 %) | 256 ( 200 %) | 0 ( 0 %) | 128 | | ||
| 956 | | DW4-7 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 | | ||
| 957 | | | | | | | | | | | | ||
| 958 | | Usage for Group 12 | 16 ( 80 %) | 465 ( 72.7 %) | 336 ( 52.5 %) | 129 ( 20.2 %) | 657 ( 103 %) | 528 ( 82.5 %) | 129 ( 20.2 %) | 640 | | ||
| 959 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 960 | | W24-35 | 3 ( 25 %) | 96 ( 25 %) | 96 ( 25 %) | 0 ( 0 %) | 128 ( 33.3 %) | 128 ( 33.3 %) | 0 ( 0 %) | 384 | | ||
| 961 | | MW8-11 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 160 ( 125 %) | 160 ( 125 %) | 0 ( 0 %) | 128 | | ||
| 962 | | DW8-11 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 | | ||
| 963 | | | | | | | | | | | | ||
| 964 | | Usage for Group 13 | 7 ( 35 %) | 224 ( 35 %) | 224 ( 35 %) | 0 ( 0 %) | 288 ( 45 %) | 288 ( 45 %) | 0 ( 0 %) | 640 | | ||
| 965 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 966 | | W36-47 | 4 ( 33.3 %) | 128 ( 33.3 %) | 128 ( 33.3 %) | 0 ( 0 %) | 160 ( 41.7 %) | 160 ( 41.7 %) | 0 ( 0 %) | 384 | | ||
| 967 | | MW12-15 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 | | ||
| 968 | | DW12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 | | ||
| 969 | | | | | | | | | | | | ||
| 970 | | Usage for Group 14 | 8 ( 40 %) | 256 ( 40 %) | 256 ( 40 %) | 0 ( 0 %) | 288 ( 45 %) | 288 ( 45 %) | 0 ( 0 %) | 640 | | ||
| 971 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 972 | | Usage for 8b | 27 ( 33.8 %) | 198 ( 30.9 %) | 181 ( 28.3 %) | 17 ( 2.66 %) | 289 ( 45.2 %) | 272 ( 42.5 %) | 17 ( 2.66 %) | 640 | | ||
| 973 | | Usage for 16b | 47 ( 39.2 %) | 696 ( 36.2 %) | 656 ( 34.2 %) | 40 ( 2.08 %) | 872 ( 45.4 %) | 832 ( 43.3 %) | 40 ( 2.08 %) | 1920 | | ||
| 974 | | Usage for 32b | 49 ( 61.2 %) | 1516 ( 59.2 %) | 1355 ( 52.9 %) | 161 ( 6.29 %) | 2116 ( 82.7 %) | 1955 ( 76.4 %) | 161 ( 6.29 %) | 2560 | | ||
| 975 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 976 | | Usage for dark | 8 ( 14.3 %) | 136 ( 13.3 %) | 136 ( 13.3 %) | 0 ( 0 %) | 136 ( 13.3 %) | 136 ( 13.3 %) | 0 ( 0 %) | 1024 | | ||
| 977 | | Usage for mocha | 46 ( 82.1 %) | 855 ( 83.5 %) | 814 ( 79.5 %) | 41 ( 4 %) | 1215 ( 119 %) | 1174 ( 115 %) | 41 ( 4 %) | 1024 | | ||
| 978 | | Usage for normal | 69 ( 41.1 %) | 1419 ( 46.2 %) | 1242 ( 40.4 %) | 177 ( 5.76 %) | 1926 ( 62.7 %) | 1749 ( 56.9 %) | 177 ( 5.76 %) | 3072 | | ||
| 979 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 980 | | Overall PHV Usage | 123 ( 43.9 %) | 2410 ( 47.1 %) | 2192 ( 42.8 %) | 218 ( 4.26 %) | 3277 ( 64 %) | 3059 ( 59.7 %) | 218 ( 4.26 %) | 5120 | | ||
| 981 | +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+ | ||
| 982 | |||
| 983 | |||
| 984 | |||
| 985 | |||