+---------------------------------------------------------------------+ | Log file: mau.resources.log | | Compiler version: 9.13.4 | | Created on: Wed Sep 9 14:58:22 2026 | | Run ID: fa139595d07b492a | +---------------------------------------------------------------------+ --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Exact Match Search Bus | Exact Match Result Bus | Tind Result Bus | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID | --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | 0 | 22 | 6 | 29 | 2 | 15 | 8 | 6 | 2 | 5 | 0 | 3 | 0 | 13 | 5 | 5 | 4 | 0 | 0 | 0 | 16 | | 1 | 15 | 57 | 70 | 0 | 9 | 32 | 8 | 16 | 5 | 0 | 4 | 0 | 9 | 4 | 7 | 100 | 0 | 0 | 0 | 13 | | 2 | 36 | 2 | 107 | 2 | 7 | 40 | 10 | 1 | 8 | 0 | 4 | 0 | 7 | 5 | 3 | 56 | 0 | 0 | 0 | 8 | | 3 | 11 | 24 | 18 | 2 | 4 | 18 | 9 | 24 | 2 | 0 | 4 | 0 | 3 | 2 | 3 | 52 | 0 | 0 | 0 | 5 | | 4 | 6 | 11 | 9 | 1 | 3 | 12 | 6 | 7 | 4 | 0 | 3 | 0 | 3 | 3 | 2 | 33 | 0 | 0 | 0 | 5 | | 5 | 16 | 0 | 29 | 1 | 9 | 7 | 4 | 0 | 5 | 0 | 2 | 0 | 9 | 4 | 9 | 13 | 0 | 0 | 0 | 12 | | 6 | 2 | 0 | 0 | 0 | 4 | 4 | 0 | 0 | 2 | 0 | 0 | 0 | 4 | 0 | 5 | 47 | 0 | 0 | 0 | 8 | | 7 | 10 | 44 | 1 | 0 | 8 | 10 | 6 | 18 | 10 | 0 | 3 | 0 | 8 | 0 | 9 | 16 | 0 | 0 | 0 | 11 | | 8 | 60 | 0 | 66 | 2 | 1 | 15 | 3 | 0 | 2 | 0 | 1 | 0 | 2 | 1 | 1 | 15 | 0 | 0 | 0 | 1 | | 9 | 2 | 7 | 0 | 0 | 2 | 1 | 0 | 2 | 4 | 0 | 0 | 0 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 3 | | 10 | 3 | 0 | 10 | 0 | 1 | 2 | 0 | 0 | 6 | 0 | 0 | 0 | 1 | 1 | 0 | 8 | 0 | 0 | 0 | 1 | | 11 | 51 | 20 | 26 | 2 | 8 | 12 | 7 | 22 | 5 | 0 | 2 | 0 | 8 | 4 | 5 | 16 | 0 | 0 | 0 | 11 | | 12 | 24 | 16 | 80 | 0 | 4 | 23 | 9 | 24 | 9 | 0 | 3 | 0 | 5 | 2 | 11 | 19 | 0 | 0 | 0 | 13 | | 13 | 3 | 16 | 40 | 0 | 1 | 13 | 3 | 21 | 5 | 0 | 1 | 0 | 1 | 1 | 5 | 38 | 0 | 0 | 0 | 6 | | 14 | 3 | 0 | 40 | 0 | 2 | 4 | 0 | 0 | 2 | 0 | 0 | 0 | 2 | 1 | 2 | 3 | 0 | 0 | 0 | 4 | | 15 | 4 | 0 | 80 | 0 | 0 | 21 | 5 | 0 | 5 | 0 | 1 | 0 | 1 | 1 | 1 | 22 | 0 | 0 | 0 | 2 | | 16 | 7 | 0 | 80 | 0 | 1 | 23 | 5 | 0 | 5 | 0 | 1 | 0 | 2 | 1 | 4 | 39 | 0 | 0 | 0 | 5 | | 17 | 3 | 0 | 0 | 0 | 1 | 2 | 0 | 0 | 3 | 0 | 0 | 0 | 1 | 0 | 4 | 17 | 0 | 0 | 0 | 4 | | 18 | 21 | 0 | 80 | 0 | 2 | 22 | 6 | 0 | 4 | 0 | 2 | 0 | 3 | 2 | 1 | 17 | 0 | 0 | 0 | 3 | | 19 | 9 | 0 | 36 | 3 | 5 | 10 | 8 | 0 | 3 | 0 | 4 | 0 | 4 | 4 | 5 | 6 | 0 | 0 | 0 | 6 | | | | | | | | | | | | | | | | | | | | | | | | Totals | 308 | 203 | 801 | 15 | 87 | 279 | 95 | 137 | 94 | 0 | 38 | 0 | 88 | 41 | 83 | 521 | 0 | 0 | 0 | 137 | --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Exact Match Search Bus | Exact Match Result Bus | Tind Result Bus | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID | -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | 0 | 17.19% | 9.09% | 6.97% | 33.33% | 93.75% | 10.00% | 12.50% | 8.33% | 15.62% | 0.00% | 75.00% | 0.00% | 81.25% | 31.25% | 31.25% | 3.12% | 0.00% | 0.00% | 0.00% | 100.00% | | 1 | 11.72% | 86.36% | 16.83% | 0.00% | 56.25% | 40.00% | 16.67% | 66.67% | 15.62% | 0.00% | 100.00% | 0.00% | 56.25% | 25.00% | 43.75% | 78.12% | 0.00% | 0.00% | 0.00% | 81.25% | | 2 | 28.12% | 3.03% | 25.72% | 33.33% | 43.75% | 50.00% | 20.83% | 4.17% | 25.00% | 0.00% | 100.00% | 0.00% | 43.75% | 31.25% | 18.75% | 43.75% | 0.00% | 0.00% | 0.00% | 50.00% | | 3 | 8.59% | 36.36% | 4.33% | 33.33% | 25.00% | 22.50% | 18.75% | 100.00% | 6.25% | 0.00% | 100.00% | 0.00% | 18.75% | 12.50% | 18.75% | 40.62% | 0.00% | 0.00% | 0.00% | 31.25% | | 4 | 4.69% | 16.67% | 2.16% | 16.67% | 18.75% | 15.00% | 12.50% | 29.17% | 12.50% | 0.00% | 75.00% | 0.00% | 18.75% | 18.75% | 12.50% | 25.78% | 0.00% | 0.00% | 0.00% | 31.25% | | 5 | 12.50% | 0.00% | 6.97% | 16.67% | 56.25% | 8.75% | 8.33% | 0.00% | 15.62% | 0.00% | 50.00% | 0.00% | 56.25% | 25.00% | 56.25% | 10.16% | 0.00% | 0.00% | 0.00% | 75.00% | | 6 | 1.56% | 0.00% | 0.00% | 0.00% | 25.00% | 5.00% | 0.00% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 25.00% | 0.00% | 31.25% | 36.72% | 0.00% | 0.00% | 0.00% | 50.00% | | 7 | 7.81% | 66.67% | 0.24% | 0.00% | 50.00% | 12.50% | 12.50% | 75.00% | 31.25% | 0.00% | 75.00% | 0.00% | 50.00% | 0.00% | 56.25% | 12.50% | 0.00% | 0.00% | 0.00% | 68.75% | | 8 | 46.88% | 0.00% | 15.87% | 33.33% | 6.25% | 18.75% | 6.25% | 0.00% | 6.25% | 0.00% | 25.00% | 0.00% | 12.50% | 6.25% | 6.25% | 11.72% | 0.00% | 0.00% | 0.00% | 6.25% | | 9 | 1.56% | 10.61% | 0.00% | 0.00% | 12.50% | 1.25% | 0.00% | 8.33% | 12.50% | 0.00% | 0.00% | 0.00% | 12.50% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 0.00% | 18.75% | | 10 | 2.34% | 0.00% | 2.40% | 0.00% | 6.25% | 2.50% | 0.00% | 0.00% | 18.75% | 0.00% | 0.00% | 0.00% | 6.25% | 6.25% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 6.25% | | 11 | 39.84% | 30.30% | 6.25% | 33.33% | 50.00% | 15.00% | 14.58% | 91.67% | 15.62% | 0.00% | 50.00% | 0.00% | 50.00% | 25.00% | 31.25% | 12.50% | 0.00% | 0.00% | 0.00% | 68.75% | | 12 | 18.75% | 24.24% | 19.23% | 0.00% | 25.00% | 28.75% | 18.75% | 100.00% | 28.12% | 0.00% | 75.00% | 0.00% | 31.25% | 12.50% | 68.75% | 14.84% | 0.00% | 0.00% | 0.00% | 81.25% | | 13 | 2.34% | 24.24% | 9.62% | 0.00% | 6.25% | 16.25% | 6.25% | 87.50% | 15.62% | 0.00% | 25.00% | 0.00% | 6.25% | 6.25% | 31.25% | 29.69% | 0.00% | 0.00% | 0.00% | 37.50% | | 14 | 2.34% | 0.00% | 9.62% | 0.00% | 12.50% | 5.00% | 0.00% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 12.50% | 6.25% | 12.50% | 2.34% | 0.00% | 0.00% | 0.00% | 25.00% | | 15 | 3.12% | 0.00% | 19.23% | 0.00% | 0.00% | 26.25% | 10.42% | 0.00% | 15.62% | 0.00% | 25.00% | 0.00% | 6.25% | 6.25% | 6.25% | 17.19% | 0.00% | 0.00% | 0.00% | 12.50% | | 16 | 5.47% | 0.00% | 19.23% | 0.00% | 6.25% | 28.75% | 10.42% | 0.00% | 15.62% | 0.00% | 25.00% | 0.00% | 12.50% | 6.25% | 25.00% | 30.47% | 0.00% | 0.00% | 0.00% | 31.25% | | 17 | 2.34% | 0.00% | 0.00% | 0.00% | 6.25% | 2.50% | 0.00% | 0.00% | 9.38% | 0.00% | 0.00% | 0.00% | 6.25% | 0.00% | 25.00% | 13.28% | 0.00% | 0.00% | 0.00% | 25.00% | | 18 | 16.41% | 0.00% | 19.23% | 0.00% | 12.50% | 27.50% | 12.50% | 0.00% | 12.50% | 0.00% | 50.00% | 0.00% | 18.75% | 12.50% | 6.25% | 13.28% | 0.00% | 0.00% | 0.00% | 18.75% | | 19 | 7.03% | 0.00% | 8.65% | 50.00% | 31.25% | 12.50% | 16.67% | 0.00% | 9.38% | 0.00% | 100.00% | 0.00% | 25.00% | 25.00% | 31.25% | 4.69% | 0.00% | 0.00% | 0.00% | 37.50% | | | | | | | | | | | | | | | | | | | | | | | | Average | 12.03% | 15.38% | 9.63% | 12.50% | 27.19% | 17.44% | 9.90% | 28.54% | 14.69% | 0.00% | 47.50% | 0.00% | 27.50% | 12.81% | 25.94% | 20.35% | 0.00% | 0.00% | 0.00% | 42.81% | -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Allocated Resource Usage -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | Table | Stage | Crossbar | Hash | Gateways | RAMs | TCAMs | Map | Action | VLIW | Exm | Exm | Tind | | Name | Number | Bytes | Bits | | | | RAMs | Data | Slots | Search | Result | Result | | | | | | | | | | Bus | | Bus | Bus | Bus | | | | | | | | | | Bytes | | | | | -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | IngressParser.$PORT_METADATA | -1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.filter.drop_mcast_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.filter.ipv4_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.filter.switch_ipv4_addr | 0 | 6 | 0 | 0 | 1 | 2 | 0 | 0 | 3 | 0 | 0 | 1 | | Ingress.filter.uplink_ports | 0 | 2 | 10 | 0 | 1 | 0 | 0 | 0 | 2 | 1 | 1 | 0 | | Ingress.packet_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | cond-78 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-79 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-80 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-81 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-82 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-83 | 0 | 6 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-84 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-85 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-86 | 0 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-87 | 0 | 8 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-90 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_filter_drop_bad_mac | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_filter_drop_bad_mac_0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_filter_drop_bad_mac_1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar203 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar203-gateway | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_sidecar2085 | 0 | 2 | 10 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar2085-gateway | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_sidecar2088 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar224 | 0 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar224-gateway | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_sidecar238 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar238-gateway | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | Egress.egress_filter.egress_filter | 1 | 2 | 10 | 0 | 1 | 0 | 0 | 1 | 2 | 1 | 1 | 0 | | Egress.mac_rewrite.ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Egress.mac_rewrite.mac_rewrite | 1 | 2 | 10 | 0 | 1 | 0 | 0 | 6 | 2 | 1 | 1 | 0 | | Egress.mac_rewrite.mac_rewrite$action | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Egress.mcast_egress.asic_id_to_port | 1 | 2 | 10 | 0 | 1 | 0 | 0 | 1 | 2 | 1 | 1 | 0 | | Egress.mcast_egress.mcast_tag_check | 1 | 20 | 0 | 0 | 1 | 4 | 0 | 0 | 1 | 0 | 0 | 1 | | Egress.mcast_egress.tbl_decap_ports | 1 | 2 | 40 | 0 | 4 | 0 | 0 | 34 | 3 | 1 | 1 | 0 | | Egress.mcast_egress.tbl_decap_ports$action | 1 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.attached_subnet_ingress.attached_subnets_v4 | 1 | 4 | 0 | 0 | 1 | 2 | 0 | 26 | 2 | 0 | 0 | 1 | | Ingress.attached_subnet_ingress.attached_subnets_v4$action | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.attached_subnet_ingress.attached_subnets_v4_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.attached_subnet_ingress.attached_subnets_v6 | 1 | 16 | 0 | 0 | 1 | 6 | 0 | 26 | 2 | 0 | 0 | 1 | | Ingress.attached_subnet_ingress.attached_subnets_v6$action | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.attached_subnet_ingress.attached_subnets_v6_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.filter.ipv6_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.filter.switch_ipv6_addr | 1 | 18 | 0 | 0 | 1 | 4 | 0 | 0 | 3 | 0 | 0 | 1 | | cond-140 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-141 | 1 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-142 | 1 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-148 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-149 | 1 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-88 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-89 | 1 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-91 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-92 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | tbl_sidecar2320 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | 0 | 0 | 1 | | tbl_sidecar2328 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar2338 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | Egress.drop_reason_ctr | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Egress.mcast_egress.port_bitmap_check | 2 | 1 | 10 | 0 | 1 | 0 | 0 | 4 | 9 | 1 | 1 | 0 | | Ingress.ingress_ctr | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.nat_ingress.icmp_dst_port | 2 | 2 | 0 | 0 | 1 | 1 | 0 | 0 | 2 | 0 | 0 | 1 | | Ingress.nat_ingress.ingress_ipv4_mcast | 2 | 7 | 40 | 0 | 4 | 0 | 0 | 26 | 2 | 1 | 1 | 0 | | Ingress.nat_ingress.ingress_ipv4_mcast$action | 2 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.nat_ingress.ingress_ipv6_mcast | 2 | 19 | 40 | 0 | 8 | 0 | 0 | 26 | 2 | 1 | 1 | 0 | | Ingress.nat_ingress.ingress_ipv6_mcast$action | 2 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.nat_ingress.mcast_ipv4_ingress_ctr | 2 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | | Ingress.nat_ingress.mcast_ipv6_ingress_ctr | 2 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | | cond-150 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-93 | 2 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-94 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-95 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-97 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-98 | 2 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | tbl_sidecar2084 | 2 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar2084-gateway | 2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_sidecar2344 | 2 | 1 | 8 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | Egress.drop_port_ctr | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Egress.mcast_ctr | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.nat_ingress.ingress_ipv4 | 3 | 8 | 0 | 0 | 1 | 4 | 0 | 26 | 2 | 0 | 0 | 1 | | Ingress.nat_ingress.ingress_ipv4$action | 3 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.nat_ingress.ingress_ipv6 | 3 | 20 | 0 | 0 | 0 | 20 | 0 | 26 | 2 | 0 | 0 | 0 | | Ingress.nat_ingress.ingress_ipv6$action | 3 | 0 | 0 | 0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.nat_ingress.ipv4_ingress_ctr | 3 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.nat_ingress.ipv6_ingress_ctr | 3 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | | cond-143 | 3 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-151 | 3 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-96 | 3 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | tbl_sidecar2052 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar2343 | 3 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar2343-gateway | 3 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_sidecar2347 | 3 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | Egress.link_local_mcast_ctr | 4 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Egress.mcast_egress.modify_hdr | 4 | 3 | 0 | 0 | 1 | 1 | 0 | 6 | 5 | 0 | 0 | 1 | | Egress.mcast_egress.modify_hdr$action | 4 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Egress.unicast_ctr | 4 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.nat_ingress.ingress_ipv4 | 4 | 8 | 0 | 0 | 0 | 6 | 0 | 26 | 2 | 0 | 0 | 0 | | Ingress.nat_ingress.ingress_ipv4$action | 4 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.nat_ingress.ipv4_ingress_ctr | 4 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | cond-152 | 4 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | egresshdr.inner_ipv4.hdr_checksum_encode_update_condition_5-gateway | 4 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | egresshdr.inner_ipv4.hdr_checksum_encode_update_condition_5_egress | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 1 | 0 | | tbl_sidecar2373 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar2382 | 4 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar2382-gateway | 4 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | Egress.external_mcast_ctr | 5 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Egress.underlay_mcast_ctr | 5 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.nat_ingress.CalculateIPv4Len.ipv4_set_len | 5 | 1 | 10 | 0 | 1 | 0 | 0 | 2 | 2 | 1 | 1 | 0 | | Ingress.nat_ingress.ingress_hit | 5 | 3 | 10 | 0 | 1 | 0 | 0 | 8 | 4 | 1 | 1 | 0 | | Ingress.nat_ingress.ingress_hit$action | 5 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | cond-102 | 5 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-139 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-144 | 5 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-145 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-146 | 5 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-147 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-153 | 5 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-154 | 5 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-99 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_sidecar1596 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar1598 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar1601 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar1611_0 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar1613_0 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar2175 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar2376 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar2379 | 5 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar751 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | cond-100 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-103 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-104 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-106 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_nat_ingress_CalculateIPv4Len_invert | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_nat_ingress_encap_ipv4 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 23 | 1 | 0 | 0 | 1 | | tbl_nat_ingress_encap_ipv4$action | 6 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | tbl_nat_ingress_encap_ipv6 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 23 | 1 | 0 | 0 | 1 | | tbl_nat_ingress_encap_ipv6$action | 6 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | tbl_sidecar1601_0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar1616 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | Ingress.mcast_ingress.mcast_ipv4_ssm_ctr | 7 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.mcast_ingress.mcast_ipv6_ssm_ctr | 7 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.mcast_ingress.mcast_source_filter_ipv4 | 7 | 8 | 0 | 0 | 1 | 4 | 0 | 1 | 2 | 0 | 0 | 1 | | Ingress.mcast_ingress.mcast_source_filter_ipv6 | 7 | 32 | 0 | 0 | 1 | 12 | 0 | 1 | 2 | 0 | 0 | 1 | | Ingress.services.service | 7 | 9 | 0 | 0 | 1 | 2 | 0 | 12 | 7 | 0 | 0 | 1 | | Ingress.services.service$action | 7 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.services.service_ctr | 7 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | cond-101 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-105 | 7 | 5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-107 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-108 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-109 | 7 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-110 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-111 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-112 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_mcast_ingress_drop_mcastv4_no_group | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_mcast_ingress_drop_mcastv6_no_group | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar1821 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar1830 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar410 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar737 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | Ingress.mcast_ingress.mcast_ipv6_ctr | 8 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | | Ingress.mcast_ingress.mcast_replication_ipv6 | 8 | 58 | 66 | 0 | 8 | 0 | 0 | 15 | 2 | 1 | 1 | 0 | | Ingress.mcast_ingress.mcast_replication_ipv6$action | 8 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | cond-113 | 8 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | mcast_ingress_mcast_replication_ipv6 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.mcast_ingress.mcast_tag_check | 9 | 7 | 0 | 0 | 1 | 2 | 0 | 0 | 5 | 0 | 0 | 1 | | cond-114 | 9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-115 | 9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | Ingress.nat_egress.nat_egress | 10 | 2 | 10 | 0 | 1 | 0 | 0 | 8 | 7 | 1 | 1 | 0 | | Ingress.nat_egress.nat_egress$action | 10 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | cond-116 | 10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | Ingress.l3_router.Router4.lookup_idx.index_ctr | 11 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.Router4.lookup_idx.lookup | 11 | 4 | 0 | 0 | 1 | 16 | 0 | 4 | 2 | 0 | 0 | 1 | | Ingress.l3_router.Router4.lookup_idx.lookup$action | 11 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.Router6.lookup_idx.index_ctr | 11 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.Router6.lookup_idx.lookup | 11 | 16 | 0 | 0 | 1 | 6 | 0 | 4 | 2 | 0 | 0 | 1 | | cond-117 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-118 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-119 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-120 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-126 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-127 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-128 | 11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | ingresshdr.icmp.hdr_checksum_encode_update_condition_4-gateway | 11 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | ingresshdr.icmp.hdr_checksum_encode_update_condition_4_ingress | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 1 | 0 | | ingresshdr.udp.checksum_encode_update_condition_3_ingress | 11 | 3 | 10 | 0 | 1 | 0 | 0 | 1 | 2 | 1 | 1 | 0 | | tbl_sidecar1244$precompute | 11 | 12 | 8 | 0 | 0 | 0 | 0 | 4 | 1 | 0 | 1 | 0 | | tbl_sidecar1341 | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar1398$precompute | 11 | 36 | 8 | 0 | 0 | 0 | 0 | 2 | 1 | 0 | 1 | 0 | | tbl_sidecar1481 | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | Ingress.l3_router.MulticastRouter4.ctr | 12 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.MulticastRouter4.tbl | 12 | 4 | 40 | 0 | 4 | 0 | 0 | 2 | 3 | 1 | 1 | 0 | | Ingress.l3_router.MulticastRouter6.ctr | 12 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.MulticastRouter6.tbl | 12 | 16 | 40 | 0 | 8 | 0 | 0 | 2 | 3 | 1 | 1 | 0 | | Ingress.l3_router.Router6.lookup_idx.index_ctr | 12 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.Router6.lookup_idx.lookup | 12 | 16 | 0 | 0 | 2 | 24 | 0 | 4 | 2 | 0 | 0 | 1 | | cond-121 | 12 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-122 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-124 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-129 | 12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_sidecar1244 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | 0 | 0 | 1 | | tbl_sidecar1268 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar1347 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar1352 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar1357 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar1359 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar1398 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | 0 | 0 | 1 | | tbl_sidecar1487 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar1492 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar1497 | 12 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | Ingress.l3_router.Router4.lookup_idx.select_route | 13 | 2 | 40 | 0 | 4 | 0 | 0 | 2 | 2 | 1 | 1 | 0 | | Ingress.l3_router.Router6.lookup_idx.index_ctr | 13 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.Router6.lookup_idx.lookup | 13 | 16 | 0 | 0 | 2 | 21 | 0 | 4 | 2 | 0 | 0 | 1 | | cond-123 | 13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_l3_router_MulticastRouter4_icmp_error | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 | | tbl_l3_router_MulticastRouter4_icmp_error$action | 13 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | tbl_l3_router_MulticastRouter4_icmp_error_0 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 | | tbl_l3_router_MulticastRouter4_icmp_error_0$action | 13 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | tbl_l3_router_MulticastRouter6_icmp_error | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 | | tbl_l3_router_MulticastRouter6_icmp_error$action | 13 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | tbl_l3_router_MulticastRouter6_icmp_error_0 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 | | tbl_l3_router_MulticastRouter6_icmp_error_0$action | 13 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.Router6.lookup_idx.select_route | 14 | 2 | 40 | 0 | 4 | 0 | 0 | 2 | 2 | 1 | 1 | 0 | | cond-130 | 14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-131 | 14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_sidecar1118 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar1409 | 14 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | Ingress.l3_router.Router4.lookup_idx.forward_ctr | 15 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.Router4.lookup_idx.route | 15 | 4 | 80 | 0 | 8 | 0 | 0 | 22 | 5 | 1 | 1 | 0 | | Ingress.l3_router.Router4.lookup_idx.route$action | 15 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | tbl_sidecar993 | 15 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | Ingress.l3_router.Router6.lookup_idx.forward_ctr | 16 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.Router6.lookup_idx.route | 16 | 4 | 80 | 0 | 8 | 0 | 0 | 22 | 3 | 1 | 1 | 0 | | Ingress.l3_router.Router6.lookup_idx.route$action | 16 | 0 | 0 | 0 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | cond-125 | 16 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_l3_router_Router4_icmp_error | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 | | tbl_l3_router_Router4_icmp_error$action | 16 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | tbl_l3_router_Router4_icmp_error_0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 | | tbl_l3_router_Router4_icmp_error_0$action | 16 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | tbl_sidecar1273 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar1275 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | cond-132 | 17 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_l3_router_Router6_icmp_error | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 | | tbl_l3_router_Router6_icmp_error$action | 17 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | tbl_l3_router_Router6_icmp_error_0 | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 | | tbl_l3_router_Router6_icmp_error_0$action | 17 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | tbl_sidecar1414 | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | | tbl_sidecar1418 | 17 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | Ingress.l3_router.Arp.ctr | 18 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.Arp.tbl | 18 | 4 | 40 | 0 | 4 | 0 | 0 | 8 | 3 | 1 | 1 | 0 | | Ingress.l3_router.Arp.tbl$action | 18 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.Ndp.ctr | 18 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | | Ingress.l3_router.Ndp.tbl | 18 | 16 | 40 | 0 | 8 | 0 | 0 | 9 | 3 | 1 | 1 | 0 | | Ingress.l3_router.Ndp.tbl$action | 18 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | cond-133 | 18 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | cond-134 | 18 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | Ingress.drop_port_ctr | 19 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.drop_reason_ctr | 19 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.egress_ctr | 19 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.mac_rewrite.ctr | 19 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | | Ingress.mac_rewrite.mac_rewrite | 19 | 2 | 10 | 0 | 1 | 0 | 0 | 6 | 2 | 1 | 1 | 0 | | Ingress.mac_rewrite.mac_rewrite$action | 19 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | | cond-135 | 19 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-136 | 19 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-137 | 19 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | | cond-138 | 19 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_sidecar2127 | 19 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar2127-gateway | 19 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | | tbl_sidecar2129 | 19 | 1 | 8 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar2131 | 19 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | | tbl_sidecar2136 | 19 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | | tbl_sidecar2138 | 19 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------