Max level shown:
1 +---------------------------------------------------------------------+
2 | Log file: mau.resources.log |
3 | Compiler version: 9.13.4 |
4 | Created on: Fri Oct 23 10:14:57 2026 |
5 | Run ID: d06c5cdb791a4bf0 |
6 +---------------------------------------------------------------------+
7 
8 
9 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
10 | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Exact Match Search Bus | Exact Match Result Bus | Tind Result Bus | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
11 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
12 | 0 | 59 | 27 | 42 | 2 | 11 | 17 | 8 | 14 | 6 | 0 | 4 | 0 | 11 | 3 | 7 | 55 | 0 | 0 | 0 | 12 |
13 | 1 | 9 | 24 | 19 | 2 | 6 | 19 | 9 | 24 | 2 | 0 | 4 | 0 | 5 | 2 | 2 | 50 | 0 | 0 | 0 | 6 |
14 | 2 | 0 | 8 | 0 | 0 | 0 | 6 | 2 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 25 | 0 | 0 | 0 | 1 |
15 | 3 | 7 | 0 | 20 | 0 | 3 | 3 | 0 | 0 | 4 | 0 | 0 | 0 | 3 | 2 | 2 | 11 | 0 | 0 | 0 | 4 |
16 | 4 | 4 | 0 | 0 | 0 | 3 | 4 | 0 | 0 | 2 | 0 | 0 | 0 | 3 | 0 | 3 | 54 | 0 | 0 | 0 | 5 |
17 | 5 | 6 | 10 | 1 | 0 | 2 | 4 | 2 | 2 | 7 | 0 | 1 | 0 | 2 | 0 | 3 | 18 | 0 | 0 | 0 | 3 |
18 | 6 | 3 | 0 | 10 | 0 | 3 | 2 | 0 | 0 | 6 | 0 | 0 | 0 | 3 | 1 | 0 | 10 | 0 | 0 | 0 | 3 |
19 | 7 | 6 | 20 | 10 | 0 | 4 | 12 | 7 | 22 | 4 | 0 | 2 | 0 | 4 | 2 | 4 | 9 | 0 | 0 | 0 | 7 |
20 | 8 | 4 | 16 | 40 | 0 | 2 | 8 | 3 | 24 | 2 | 0 | 1 | 0 | 2 | 1 | 2 | 6 | 0 | 0 | 0 | 3 |
21 | 9 | 0 | 16 | 0 | 0 | 0 | 4 | 3 | 21 | 2 | 0 | 1 | 0 | 0 | 0 | 2 | 3 | 0 | 0 | 0 | 2 |
22 | 10 | 6 | 0 | 80 | 0 | 2 | 29 | 5 | 0 | 5 | 0 | 1 | 0 | 3 | 2 | 1 | 25 | 0 | 0 | 0 | 3 |
23 | 11 | 3 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 4 | 0 | 0 | 0 | 1 | 0 | 5 | 29 | 0 | 0 | 0 | 5 |
24 | 12 | 2 | 0 | 40 | 0 | 0 | 25 | 5 | 0 | 2 | 0 | 1 | 0 | 1 | 1 | 0 | 22 | 0 | 0 | 0 | 1 |
25 | 13 | 3 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 3 | 0 | 0 | 0 | 1 | 0 | 4 | 29 | 0 | 0 | 0 | 4 |
26 | 14 | 21 | 0 | 80 | 0 | 2 | 22 | 6 | 0 | 4 | 0 | 2 | 0 | 3 | 2 | 1 | 25 | 0 | 0 | 0 | 3 |
27 | 15 | 4 | 0 | 10 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 1 |
28 | 16 | 9 | 0 | 36 | 3 | 5 | 10 | 8 | 0 | 2 | 0 | 4 | 0 | 4 | 4 | 3 | 6 | 0 | 0 | 0 | 5 |
29 | | | | | | | | | | | | | | | | | | | | | |
30 | Totals | 146 | 121 | 388 | 7 | 46 | 172 | 58 | 113 | 57 | 0 | 22 | 0 | 47 | 21 | 39 | 378 | 0 | 0 | 0 | 68 |
31 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
32 
33 
34 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
35 | Stage Number | Exact Match Input xbar | Ternary Match Input xbar | Hash Bit | Hash Dist Unit | Gateway | SRAM | Map RAM | TCAM | VLIW Instr | Meter ALU | Stats ALU | Stash | Exact Match Search Bus | Exact Match Result Bus | Tind Result Bus | Action Data Bus Bytes | 8-bit Action Slots | 16-bit Action Slots | 32-bit Action Slots | Logical TableID |
36 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
37 | 0 | 46.09% | 40.91% | 10.10% | 33.33% | 68.75% | 21.25% | 16.67% | 58.33% | 18.75% | 0.00% | 100.00% | 0.00% | 68.75% | 18.75% | 43.75% | 42.97% | 0.00% | 0.00% | 0.00% | 75.00% |
38 | 1 | 7.03% | 36.36% | 4.57% | 33.33% | 37.50% | 23.75% | 18.75% | 100.00% | 6.25% | 0.00% | 100.00% | 0.00% | 31.25% | 12.50% | 12.50% | 39.06% | 0.00% | 0.00% | 0.00% | 37.50% |
39 | 2 | 0.00% | 12.12% | 0.00% | 0.00% | 0.00% | 7.50% | 4.17% | 25.00% | 3.12% | 0.00% | 25.00% | 0.00% | 0.00% | 0.00% | 0.00% | 19.53% | 0.00% | 0.00% | 0.00% | 6.25% |
40 | 3 | 5.47% | 0.00% | 4.81% | 0.00% | 18.75% | 3.75% | 0.00% | 0.00% | 12.50% | 0.00% | 0.00% | 0.00% | 18.75% | 12.50% | 12.50% | 8.59% | 0.00% | 0.00% | 0.00% | 25.00% |
41 | 4 | 3.12% | 0.00% | 0.00% | 0.00% | 18.75% | 5.00% | 0.00% | 0.00% | 6.25% | 0.00% | 0.00% | 0.00% | 18.75% | 0.00% | 18.75% | 42.19% | 0.00% | 0.00% | 0.00% | 31.25% |
42 | 5 | 4.69% | 15.15% | 0.24% | 0.00% | 12.50% | 5.00% | 4.17% | 8.33% | 21.88% | 0.00% | 25.00% | 0.00% | 12.50% | 0.00% | 18.75% | 14.06% | 0.00% | 0.00% | 0.00% | 18.75% |
43 | 6 | 2.34% | 0.00% | 2.40% | 0.00% | 18.75% | 2.50% | 0.00% | 0.00% | 18.75% | 0.00% | 0.00% | 0.00% | 18.75% | 6.25% | 0.00% | 7.81% | 0.00% | 0.00% | 0.00% | 18.75% |
44 | 7 | 4.69% | 30.30% | 2.40% | 0.00% | 25.00% | 15.00% | 14.58% | 91.67% | 12.50% | 0.00% | 50.00% | 0.00% | 25.00% | 12.50% | 25.00% | 7.03% | 0.00% | 0.00% | 0.00% | 43.75% |
45 | 8 | 3.12% | 24.24% | 9.62% | 0.00% | 12.50% | 10.00% | 6.25% | 100.00% | 6.25% | 0.00% | 25.00% | 0.00% | 12.50% | 6.25% | 12.50% | 4.69% | 0.00% | 0.00% | 0.00% | 18.75% |
46 | 9 | 0.00% | 24.24% | 0.00% | 0.00% | 0.00% | 5.00% | 6.25% | 87.50% | 6.25% | 0.00% | 25.00% | 0.00% | 0.00% | 0.00% | 12.50% | 2.34% | 0.00% | 0.00% | 0.00% | 12.50% |
47 | 10 | 4.69% | 0.00% | 19.23% | 0.00% | 12.50% | 36.25% | 10.42% | 0.00% | 15.62% | 0.00% | 25.00% | 0.00% | 18.75% | 12.50% | 6.25% | 19.53% | 0.00% | 0.00% | 0.00% | 18.75% |
48 | 11 | 2.34% | 0.00% | 0.00% | 0.00% | 6.25% | 3.75% | 0.00% | 0.00% | 12.50% | 0.00% | 0.00% | 0.00% | 6.25% | 0.00% | 31.25% | 22.66% | 0.00% | 0.00% | 0.00% | 31.25% |
49 | 12 | 1.56% | 0.00% | 9.62% | 0.00% | 0.00% | 31.25% | 10.42% | 0.00% | 6.25% | 0.00% | 25.00% | 0.00% | 6.25% | 6.25% | 0.00% | 17.19% | 0.00% | 0.00% | 0.00% | 6.25% |
50 | 13 | 2.34% | 0.00% | 0.00% | 0.00% | 6.25% | 3.75% | 0.00% | 0.00% | 9.38% | 0.00% | 0.00% | 0.00% | 6.25% | 0.00% | 25.00% | 22.66% | 0.00% | 0.00% | 0.00% | 25.00% |
51 | 14 | 16.41% | 0.00% | 19.23% | 0.00% | 12.50% | 27.50% | 12.50% | 0.00% | 12.50% | 0.00% | 50.00% | 0.00% | 18.75% | 12.50% | 6.25% | 19.53% | 0.00% | 0.00% | 0.00% | 18.75% |
52 | 15 | 3.12% | 0.00% | 2.40% | 0.00% | 6.25% | 1.25% | 0.00% | 0.00% | 3.12% | 0.00% | 0.00% | 0.00% | 6.25% | 6.25% | 0.00% | 0.78% | 0.00% | 0.00% | 0.00% | 6.25% |
53 | 16 | 7.03% | 0.00% | 8.65% | 50.00% | 31.25% | 12.50% | 16.67% | 0.00% | 6.25% | 0.00% | 100.00% | 0.00% | 25.00% | 25.00% | 18.75% | 4.69% | 0.00% | 0.00% | 0.00% | 31.25% |
54 | | | | | | | | | | | | | | | | | | | | | |
55 | Average | 6.71% | 10.78% | 5.49% | 6.86% | 16.91% | 12.65% | 7.11% | 27.70% | 10.48% | 0.00% | 32.35% | 0.00% | 17.28% | 7.72% | 14.34% | 17.37% | 0.00% | 0.00% | 0.00% | 25.00% |
56 --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
57 
58 
59 Allocated Resource Usage
60 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------
61 | Table | Stage | Crossbar | Hash | Gateways | RAMs | TCAMs | Map | Action | VLIW | Exm | Exm | Tind |
62 | Name | Number | Bytes | Bits | | | | RAMs | Data | Slots | Search | Result | Result |
63 | | | | | | | | | Bus | | Bus | Bus | Bus |
64 | | | | | | | | | Bytes | | | | |
65 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------
66 | IngressParser.$PORT_METADATA | -1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
67 | Ingress.attached_subnet_ingress.attached_subnets_v4 | 0 | 4 | 0 | 0 | 1 | 2 | 0 | 25 | 2 | 0 | 0 | 1 |
68 | Ingress.attached_subnet_ingress.attached_subnets_v4$action | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
69 | Ingress.attached_subnet_ingress.attached_subnets_v4_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
70 | Ingress.attached_subnet_ingress.attached_subnets_v6 | 0 | 16 | 0 | 0 | 1 | 6 | 0 | 25 | 2 | 0 | 0 | 1 |
71 | Ingress.attached_subnet_ingress.attached_subnets_v6$action | 0 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
72 | Ingress.attached_subnet_ingress.attached_subnets_v6_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
73 | Ingress.filter.ipv4_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
74 | Ingress.filter.ipv6_ctr | 0 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
75 | Ingress.filter.switch_ipv4_addr | 0 | 6 | 0 | 0 | 1 | 2 | 0 | 0 | 3 | 0 | 0 | 1 |
76 | Ingress.filter.switch_ipv6_addr | 0 | 18 | 0 | 0 | 1 | 4 | 0 | 0 | 3 | 0 | 0 | 1 |
77 | Ingress.filter.uplink_ports | 0 | 2 | 10 | 0 | 1 | 0 | 0 | 0 | 2 | 1 | 1 | 0 |
78 | cond-42 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
79 | cond-43 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
80 | cond-44 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
81 | cond-45 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
82 | cond-46 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
83 | cond-47 | 0 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
84 | cond-48 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
85 | cond-49 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
86 | cond-50 | 0 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
87 | cond-51 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
88 | cond-52 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
89 | tbl_sidecar2094 | 0 | 13 | 16 | 0 | 0 | 0 | 0 | 2 | 1 | 0 | 1 | 0 |
90 | tbl_sidecar2102 | 0 | 37 | 16 | 0 | 0 | 0 | 0 | 2 | 1 | 0 | 1 | 0 |
91 | tbl_sidecar2145 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
92 | Ingress.ingress_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
93 | Ingress.nat_ingress.ingress_ipv4 | 1 | 8 | 0 | 0 | 1 | 4 | 0 | 25 | 2 | 0 | 0 | 1 |
94 | Ingress.nat_ingress.ingress_ipv4$action | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
95 | Ingress.nat_ingress.ingress_ipv6 | 1 | 20 | 0 | 0 | 1 | 20 | 0 | 25 | 2 | 0 | 0 | 1 |
96 | Ingress.nat_ingress.ingress_ipv6$action | 1 | 0 | 0 | 0 | 6 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
97 | Ingress.nat_ingress.ipv4_ingress_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
98 | Ingress.nat_ingress.ipv6_ingress_ctr | 1 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
99 | Ingress.packet_ctr | 1 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
100 | cond-53 | 1 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
101 | cond-54 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
102 | cond-55 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
103 | cond-56 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
104 | tbl_sidecar2141 | 1 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
105 | tbl_sidecar2141-gateway | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
106 | tbl_sidecar2142 | 1 | 2 | 10 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
107 | tbl_sidecar2142-gateway | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
108 | Ingress.nat_ingress.ingress_ipv4 | 2 | 8 | 0 | 0 | 0 | 6 | 0 | 25 | 2 | 0 | 0 | 0 |
109 | Ingress.nat_ingress.ingress_ipv4$action | 2 | 0 | 0 | 0 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
110 | Ingress.nat_ingress.ipv4_ingress_ctr | 2 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
111 | Ingress.nat_ingress.CalculateIPv4Len.ipv4_set_len | 3 | 1 | 10 | 0 | 1 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
112 | Ingress.nat_ingress.ingress_hit | 3 | 2 | 10 | 0 | 1 | 0 | 0 | 8 | 4 | 1 | 1 | 0 |
113 | Ingress.nat_ingress.ingress_hit$action | 3 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
114 | cond-57 | 3 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
115 | cond-60 | 3 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
116 | cond-82 | 3 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
117 | tbl_sidecar2236 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
118 | tbl_sidecar752 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
119 | cond-58 | 4 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
120 | cond-61 | 4 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
121 | cond-62 | 4 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
122 | tbl_nat_ingress_CalculateIPv4Len_invert | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
123 | tbl_nat_ingress_encap_ipv4 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 27 | 1 | 0 | 0 | 1 |
124 | tbl_nat_ingress_encap_ipv4$action | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
125 | tbl_nat_ingress_encap_ipv6 | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 27 | 1 | 0 | 0 | 1 |
126 | tbl_nat_ingress_encap_ipv6$action | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
127 | Ingress.services.service | 5 | 10 | 0 | 0 | 1 | 2 | 0 | 18 | 7 | 0 | 0 | 1 |
128 | Ingress.services.service$action | 5 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
129 | Ingress.services.service_ctr | 5 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
130 | cond-59 | 5 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
131 | cond-63 | 5 | 5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
132 | tbl_sidecar419 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
133 | tbl_sidecar738 | 5 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
134 | Ingress.nat_egress.nat_egress | 6 | 2 | 10 | 0 | 1 | 0 | 0 | 10 | 7 | 1 | 1 | 0 |
135 | Ingress.nat_egress.nat_egress$action | 6 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
136 | cond-64 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
137 | cond-65 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
138 | cond-66 | 6 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
139 | Ingress.l3_router.Router4.lookup_idx.index_ctr | 7 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 |
140 | Ingress.l3_router.Router4.lookup_idx.lookup | 7 | 4 | 0 | 0 | 1 | 16 | 0 | 4 | 2 | 0 | 0 | 1 |
141 | Ingress.l3_router.Router4.lookup_idx.lookup$action | 7 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
142 | Ingress.l3_router.Router6.lookup_idx.index_ctr | 7 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
143 | Ingress.l3_router.Router6.lookup_idx.lookup | 7 | 16 | 0 | 0 | 1 | 6 | 0 | 3 | 2 | 0 | 0 | 1 |
144 | cond-67 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
145 | cond-68 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
146 | cond-72 | 7 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
147 | ingresshdr.icmp.hdr_checksum_encode_update_condition_3-gateway | 7 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
148 | ingresshdr.icmp.hdr_checksum_encode_update_condition_3_ingress | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 1 | 0 |
149 | ingresshdr.udp.checksum_encode_update_condition_2_ingress | 7 | 3 | 10 | 0 | 1 | 0 | 0 | 1 | 2 | 1 | 1 | 0 |
150 | tbl_sidecar1241 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
151 | tbl_sidecar1380_0 | 7 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
152 | Ingress.l3_router.Router4.lookup_idx.select_route | 8 | 3 | 40 | 0 | 4 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
153 | Ingress.l3_router.Router6.lookup_idx.index_ctr | 8 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
154 | Ingress.l3_router.Router6.lookup_idx.lookup | 8 | 16 | 0 | 0 | 1 | 24 | 0 | 3 | 2 | 0 | 0 | 1 |
155 | cond-69 | 8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
156 | cond-70 | 8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
157 | tbl_sidecar1249 | 8 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
158 | Ingress.l3_router.Router6.lookup_idx.index_ctr | 9 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
159 | Ingress.l3_router.Router6.lookup_idx.lookup | 9 | 16 | 0 | 0 | 1 | 21 | 0 | 3 | 2 | 0 | 0 | 1 |
160 | tbl_sidecar1105 | 9 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
161 | Ingress.l3_router.Router4.lookup_idx.forward_ctr | 10 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 |
162 | Ingress.l3_router.Router4.lookup_idx.route | 10 | 2 | 40 | 0 | 4 | 0 | 0 | 22 | 5 | 1 | 1 | 0 |
163 | Ingress.l3_router.Router4.lookup_idx.route$action | 10 | 0 | 0 | 0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
164 | Ingress.l3_router.Router6.lookup_idx.select_route | 10 | 3 | 40 | 0 | 4 | 0 | 0 | 2 | 2 | 1 | 1 | 0 |
165 | cond-73 | 10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
166 | cond-74 | 10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
167 | tbl_sidecar1386 | 10 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
168 | cond-71 | 11 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
169 | tbl_l3_router_Router4_icmp_error | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 1 | 0 | 0 | 1 |
170 | tbl_l3_router_Router4_icmp_error$action | 11 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
171 | tbl_l3_router_Router4_icmp_error_0 | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 1 | 0 | 0 | 1 |
172 | tbl_l3_router_Router4_icmp_error_0$action | 11 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
173 | tbl_sidecar1254 | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
174 | tbl_sidecar1256 | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
175 | tbl_sidecar1256$action | 11 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
176 | tbl_sidecar987 | 11 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
177 | Ingress.l3_router.Router6.lookup_idx.forward_ctr | 12 | 0 | 0 | 0 | 5 | 0 | 5 | 0 | 0 | 0 | 0 | 0 |
178 | Ingress.l3_router.Router6.lookup_idx.route | 12 | 2 | 40 | 0 | 4 | 0 | 0 | 22 | 3 | 1 | 1 | 0 |
179 | Ingress.l3_router.Router6.lookup_idx.route$action | 12 | 0 | 0 | 0 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
180 | cond-75 | 13 | 3 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
181 | tbl_l3_router_Router6_icmp_error | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 1 | 0 | 0 | 1 |
182 | tbl_l3_router_Router6_icmp_error$action | 13 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
183 | tbl_l3_router_Router6_icmp_error_0 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 10 | 1 | 0 | 0 | 1 |
184 | tbl_l3_router_Router6_icmp_error_0$action | 13 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
185 | tbl_sidecar1391 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
186 | tbl_sidecar1395 | 13 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 | 0 | 0 | 1 |
187 | tbl_sidecar1395$action | 13 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
188 | Ingress.l3_router.Arp.ctr | 14 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
189 | Ingress.l3_router.Arp.tbl | 14 | 4 | 40 | 0 | 4 | 0 | 0 | 12 | 3 | 1 | 1 | 0 |
190 | Ingress.l3_router.Arp.tbl$action | 14 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
191 | Ingress.l3_router.Ndp.ctr | 14 | 0 | 0 | 0 | 3 | 0 | 3 | 0 | 0 | 0 | 0 | 0 |
192 | Ingress.l3_router.Ndp.tbl | 14 | 16 | 40 | 0 | 8 | 0 | 0 | 13 | 3 | 1 | 1 | 0 |
193 | Ingress.l3_router.Ndp.tbl$action | 14 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
194 | cond-76 | 14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
195 | cond-77 | 14 | 4 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
196 | Ingress.egress_filter.egress_filter | 15 | 2 | 10 | 0 | 1 | 0 | 0 | 1 | 2 | 1 | 1 | 0 |
197 | cond-78 | 15 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
198 | Ingress.drop_port_ctr | 16 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
199 | Ingress.drop_reason_ctr | 16 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
200 | Ingress.egress_ctr | 16 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
201 | Ingress.mac_rewrite.ctr | 16 | 0 | 0 | 0 | 2 | 0 | 2 | 0 | 0 | 0 | 0 | 0 |
202 | Ingress.mac_rewrite.mac_rewrite | 16 | 2 | 10 | 0 | 1 | 0 | 0 | 6 | 2 | 1 | 1 | 0 |
203 | Ingress.mac_rewrite.mac_rewrite$action | 16 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
204 | cond-79 | 16 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
205 | cond-80 | 16 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
206 | cond-81 | 16 | 2 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 |
207 | tbl_sidecar2192 | 16 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
208 | tbl_sidecar2192-gateway | 16 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
209 | tbl_sidecar2194 | 16 | 1 | 8 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
210 | tbl_sidecar2196 | 16 | 2 | 9 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 |
211 | tbl_sidecar2196-gateway | 16 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
212 | tbl_sidecar2200 | 16 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
213 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------
214