Max level shown:
1 PHV ALLOCATION SUCCESSFUL
2 PHV Allocation
3 +-----------+-------+-----------------+--------------------------------------------------------+
4 |Container |Gress |Container Slice |Field Slice |
5 +-----------+-------+-----------------+--------------------------------------------------------+
6 |B0 |I | |ingress::$tmp3 |
7 | | | | |
8 |MB0 |E |[0] |egress::hdr.geneve_opts.oxg_mss_tag.$valid |
9 | | |[1] |egress::hdr.geneve_opts.oxg_mss.$valid |
10 | | |[2] |egress::hdr.ipv6.$valid |
11 | | |[3] |egress::eg_intr_md_for_dprsr.mirror_io_select |
12 | | | | |
13 |DB0 |I | |ingress::hdr.geneve.vni[23:16] ARA |
14 | | | | |
15 |B1 |I |[0] |ingress::hdr.vlan.$valid |
16 | | |[1] |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |
17 | | |[2] |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |
18 | | |[3] |ingress::ig_intr_md_for_tm.bypass_egress |
19 | | |[6:4] |ingress::ig_intr_md_for_dprsr.drop_ctl |
20 | | |[7] |ingress::meta.encap_needed |
21 | | | | |
22 |MB1 |I | |ingress::meta.nat_geneve_vni[23:16] |
23 | | | | |
24 |... | | | |
25 | | | | |
26 |B2 |I |[0] |ingress::hdr.udp.checksum.$deparse_original_csum |
27 | | |[1] |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |
28 | | |[2] |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |
29 | | |[3] |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |
30 | | |[4] |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |
31 | | |[5] |ingress::meta.dropped |
32 | | |[6] |ingress::meta.service_routed |
33 | | |[7] |ingress::meta.nat_egress_hit |
34 | | | | |
35 |MB2 |I | |ingress::l3_router_Router4_fwd.nexthop6[31:24] |
36 | | | |ingress::l3_router_Router6_fwd.nexthop[31:24] |
37 | | | | |
38 |... | | | |
39 | | | | |
40 |B3 |I | |ingress::hdr.geneve.vni[23:16] |
41 | | | |ingress::hdr.geneve.vni[23:16] ARA |
42 | | | |ingress::meta.nexthop_ipv6[31:24] ARA |
43 | | | | |
44 |MB3 |I | |ingress::l3_router_Router4_fwd.nexthop[31:24] |
45 | | | |ingress::l3_router_Router6_fwd.slots |
46 | | | | |
47 |... | | | |
48 | | | | |
49 |B4 |I | |ingress::hdr.sidecar.sc_payload[31:24] |
50 | | | | |
51 |... | | | |
52 | | | | |
53 |B8 |I | |ingress::meta.nexthop_ipv4[31:24] |
54 | | | | |
55 |... | | | |
56 | | | | |
57 |MB4 |I | |ingress::hdr.inner_ipv4.ttl |
58 | | | |ingress::hdr.inner_ipv6.hop_limit |
59 | | | | |
60 |... | | | |
61 | | | | |
62 |MB5 |I |[3:0] |ingress::ig_intr_md_for_dprsr.mirror_type |
63 | | | | |
64 |... | | | |
65 | | | | |
66 |MB6 |I | |ingress::hdr.inner_ipv4.protocol |
67 | | | |ingress::hdr.inner_ipv6.next_hdr |
68 | | | | |
69 |... | | | |
70 | | | | |
71 |MB7 |I | |ingress::hdr.ipv4.protocol |
72 | | | |ingress::hdr.ipv6.next_hdr |
73 | | | | |
74 |... | | | |
75 | | | | |
76 |B12 |I | |ingress::hdr.ipv4.ttl |
77 | | | |ingress::hdr.ipv6.hop_limit |
78 | | | | |
79 |... | | | |
80 | | | | |
81 |MB8 |I | |ingress::hdr.geneve.reserved2 |
82 | | | |ingress::hdr.geneve.reserved2 ARA |
83 | | | |ingress::l3_router_Router4_fwd.nexthop6[7:0] ARA |
84 | | | | |
85 |DB8 |I | |ingress::hdr.geneve.reserved2 ARA |
86 | | | | |
87 |MB9 |I | |ingress::hdr.sidecar.sc_payload[7:0] |
88 | | | | |
89 |... | | | |
90 | | | | |
91 |MB10 |I | |ingress::meta.nexthop_ipv6[7:0] |
92 | | | | |
93 |... | | | |
94 | | | | |
95 |MB11 |I | |ingress::l3_router_Router6_fwd.nexthop[7:0] |
96 | | | |ingress::l3_router_Router4_fwd.nexthop[7:0] |
97 | | | | |
98 |... | | | |
99 | | | | |
100 |B24 |I | |ingress::meta.nexthop_ipv4[7:0] |
101 | | | | |
102 |... | | | |
103 | | | | |
104 |MB12 |I | |ingress::meta.drop_reason |
105 | | | | |
106 |... | | | |
107 | | | | |
108 |H0 |I |[7:0] |ingress::hdr.inner_tcp.flags |
109 | | |[11:8] |ingress::hdr.inner_tcp.res |
110 | | |[15:12] |ingress::hdr.inner_tcp.data_offset |
111 | | |[7:0] |ingress::hdr.tcp.flags |
112 | | |[11:8] |ingress::hdr.tcp.res |
113 | | |[15:12] |ingress::hdr.tcp.data_offset |
114 | | |[7:0] |ingress::hdr.inner_icmp.code |
115 | | |[15:8] |ingress::hdr.inner_icmp.type |
116 | | |[7:0] |ingress::hdr.icmp.code |
117 | | |[15:8] |ingress::hdr.icmp.type |
118 | | | | |
119 |MH0 |I | |ingress::meta.icmp_csum |
120 | | | | |
121 |DH0 |I |[8:0] |ingress::meta.bridge_hdr.ingress_port ARA |
122 | | | | |
123 |H1 |I |[7:0] |ingress::hdr.inner_ipv4.diffserv |
124 | | |[11:8] |ingress::hdr.inner_ipv4.ihl |
125 | | |[15:12] |ingress::hdr.inner_ipv4.version |
126 | | | | |
127 |MH1 |I | |ingress::meta.body_checksum |
128 | | | | |
129 |... | | | |
130 | | | | |
131 |H2 |I |[7:0] |ingress::hdr.ipv4.diffserv |
132 | | |[11:8] |ingress::hdr.ipv4.ihl |
133 | | |[15:12] |ingress::hdr.ipv4.version |
134 | | | | |
135 |MH2 |I | |ingress::hdr.ethernet.src_mac[15:0] |
136 | | | | |
137 |... | | | |
138 | | | | |
139 |H3 |I | |ingress::hdr.udp.checksum |
140 | | | | |
141 |MH3 |I | |ingress::hdr.inner_tcp.checksum |
142 | | | |ingress::hdr.tcp.checksum |
143 | | | |ingress::hdr.inner_icmp.data[15:0] |
144 | | | |ingress::hdr.icmp.data[15:0] |
145 | | | |ingress::hdr.inner_udp.checksum |
146 | | | | |
147 |... | | | |
148 | | | | |
149 |H4 |I |[15:9] |ingress::meta.bridge_hdr.__pad_0 |
150 | | |[8:0] |ingress::meta.bridge_hdr.ingress_port |
151 | | |[8:0] |ingress::meta.bridge_hdr.ingress_port ARA |
152 | | |[7:0] |ingress::l3_router_Router4_fwd.slots ARA |
153 | | | | |
154 |H5 |I |[7:0] |ingress::hdr.sidecar.sc_pad |
155 | | |[15:8] |ingress::hdr.sidecar.sc_code |
156 | | | | |
157 |H6 |I | |ingress::meta.nat_ingress_csum |
158 | | | | |
159 |... | | | |
160 | | | | |
161 |H8 |I | |ingress::meta.l4_src_port |
162 | | | | |
163 |... | | | |
164 | | | | |
165 |MH4 |I |[0] |ingress::meta.ipv4_checksum_err |
166 | | | | |
167 |DH4 |I | |ingress::hdr.inner_udp.hdr_length ARA |
168 | | | | |
169 |MH5 |E |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |
170 | | |[1] |egress::eg_intr_md.egress_port.$valid |
171 | | |[2] |egress::hdr.ethernet.$valid |
172 | | |[3] |egress::hdr.vlan.$valid |
173 | | |[4] |egress::hdr.ipv4.$valid |
174 | | |[5] |egress::hdr.icmp.$valid |
175 | | |[6] |egress::hdr.udp.$valid |
176 | | |[7] |egress::hdr.geneve.$valid |
177 | | |[8] |egress::hdr.inner_eth.$valid |
178 | | |[9] |egress::hdr.inner_ipv4.$valid |
179 | | |[10] |egress::hdr.inner_tcp.$valid |
180 | | |[11] |egress::hdr.inner_udp.$valid |
181 | | |[12] |egress::hdr.inner_ipv6.$valid |
182 | | |[13] |egress::hdr.geneve_opts.oxg_ext_tag.$valid |
183 | | |[14] |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |
184 | | |[15] |egress::hdr.geneve_opts.oxg_mcast.$valid |
185 | | | | |
186 |DH5 |I | |ingress::hdr.inner_eth.src_mac[15:0] ARA |
187 | | | | |
188 |MH6 |I |[7:0] |ingress::l3_router_Router4_fwd.slot[7:0] |
189 | | |[15:8] |ingress::l3_router_Router4_fwd.slot[15:8] |
190 | | |[7:0] |ingress::l3_router_Router6_fwd.slot[7:0] |
191 | | |[15:8] |ingress::l3_router_Router6_fwd.slot[15:8] |
192 | | | | |
193 |... | | | |
194 | | | | |
195 |MH7 |I | |ingress::meta.l4_dst_port |
196 | | | | |
197 |... | | | |
198 | | | | |
199 |H12 |I | |ingress::hdr.inner_ipv4.total_len |
200 | | | |ingress::hdr.inner_ipv6.payload_len |
201 | | | | |
202 |H13 |I | |ingress::hdr.ipv4.total_len |
203 | | | |ingress::hdr.ipv6.payload_len |
204 | | | | |
205 |H14 |I | |ingress::meta.l4_length |
206 | | | | |
207 |H15 |I | |ingress::hdr.inner_udp.hdr_length |
208 | | | |ingress::hdr.inner_udp.hdr_length ARA |
209 | | |[8:0] |ingress::l3_router_Router4_fwd.port ARA |
210 | | | | |
211 |H16 |I | |ingress::hdr.udp.hdr_length |
212 | | | | |
213 |H17 |I |[8:0] |ingress::ig_intr_md_for_tm.ucast_egress_port |
214 | | |[9] |ingress::l3_router_Router4_fwd.is_hit |
215 | | |[9] |ingress::l3_router_Router6_fwd.is_hit |
216 | | | | |
217 |H18 |I |[8:0] |ingress::hdr.sidecar.sc_egress[8:0] |
218 | | |[15:9] |ingress::hdr.sidecar.sc_egress[15:9] |
219 | | | | |
220 |H19 |I |[8:0] |ingress::hdr.sidecar.sc_ingress[8:0] |
221 | | |[15:9] |ingress::hdr.sidecar.sc_ingress[15:9] |
222 | | | | |
223 |H20 |I |[7:0] |ingress::l3_router_Router4_fwd.idx[7:0] |
224 | | |[15:8] |ingress::l3_router_Router4_fwd.idx[15:8] |
225 | | |[7:0] |ingress::l3_router_Router6_fwd.idx[7:0] |
226 | | |[15:8] |ingress::l3_router_Router6_fwd.idx[15:8] |
227 | | | | |
228 |H21 |I |[8:0] |ingress::ig_intr_md.ingress_port |
229 | | | | |
230 |H22 |I |[8:0] |ingress::l3_router_Router6_fwd.port ARA |
231 | | | |ingress::hdr.inner_eth.src_mac[15:0] |
232 | | | |ingress::hdr.inner_eth.src_mac[15:0] ARA |
233 | | | | |
234 |H23 |I |[11:0] |ingress::hdr.vlan.vlan_id |
235 | | |[12] |ingress::hdr.vlan.dei |
236 | | |[15:13] |ingress::hdr.vlan.pcp |
237 | | | | |
238 |MH8 |E |[8:0] |egress::eg_intr_md.egress_port |
239 | | | | |
240 |DH8 |I | |ingress::hdr.inner_eth.dst_mac[31:16] ARA |
241 | | | | |
242 |MH9 |I | |ingress::meta.nat_inner_mac[31:16] |
243 | | | | |
244 |DH9 |I | |ingress::hdr.inner_ipv4.hdr_checksum ARA |
245 | | | | |
246 |MH10 |I |[7:0] |ingress::meta.orig_src_mac[39:32] |
247 | | |[15:8] |ingress::meta.orig_src_mac[47:40] |
248 | | | | |
249 |DH10 |I | |ingress::hdr.ipv4.hdr_checksum ARA |
250 | | | | |
251 |MH11 |I | |ingress::meta.nat_inner_mac[47:32] |
252 | | | | |
253 |DH11 |I | |ingress::hdr.inner_eth.dst_mac[47:32] ARA |
254 | | | | |
255 |H24 |I | |ingress::hdr.inner_eth.dst_mac[31:16] |
256 | | | |ingress::hdr.inner_eth.dst_mac[31:16] ARA |
257 | | | |ingress::meta.nexthop_ipv6[111:96] ARA |
258 | | | | |
259 |H25 |I |[7:0] |ingress::hdr.ethernet.dst_mac[39:32] |
260 | | |[15:8] |ingress::hdr.ethernet.dst_mac[47:40] |
261 | | | | |
262 |H26 |I | |ingress::hdr.inner_ipv4.hdr_checksum |
263 | | | |ingress::hdr.inner_ipv4.hdr_checksum ARA |
264 | | | |ingress::l3_router_Router4_fwd.nexthop6[111:96] ARA |
265 | | | | |
266 |H27 |I | |ingress::hdr.ipv4.hdr_checksum |
267 | | | |ingress::hdr.ipv4.hdr_checksum ARA |
268 | | | |ingress::l3_router_Router6_fwd.nexthop[111:96] ARA |
269 | | | | |
270 |H28 |I | |ingress::hdr.inner_eth.dst_mac[47:32] |
271 | | | |ingress::hdr.inner_eth.dst_mac[47:32] ARA |
272 | | |[1:0] |ingress::l3_router_Router4_fwd.ecmp_hash[7:6] ARA |
273 | | | | |
274 |H29 |I | |ingress::hdr.sidecar.sc_payload[111:96] |
275 | | | | |
276 |... | | | |
277 | | | | |
278 |MH12 |I | |ingress::hdr.sidecar.sc_payload[127:112] |
279 | | | | |
280 |... | | | |
281 | | | | |
282 |MH13 |I | |ingress::meta.nexthop_ipv6[127:112] |
283 | | | | |
284 |... | | | |
285 | | | | |
286 |MH14 |I | |ingress::l3_router_Router4_fwd.nexthop6[127:112] |
287 | | | |ingress::l3_router_Router6_fwd.nexthop[127:112] |
288 | | | | |
289 |... | | | |
290 | | | | |
291 |MH15 |I | |ingress::hdr.inner_eth.src_mac[47:32] |
292 | | | | |
293 |... | | | |
294 | | | | |
295 |MH16 |I | |ingress::hdr.sidecar.sc_ether_type |
296 | | | | |
297 |... | | | |
298 | | | | |
299 |MH17 |I | |ingress::hdr.ethernet.ether_type |
300 | | | | |
301 |... | | | |
302 | | | | |
303 |MH18 |I | |ingress::hdr.vlan.ether_type |
304 | | | | |
305 |... | | | |
306 | | | | |
307 |MH19 |I | |ingress::hdr.inner_eth.ether_type |
308 | | | | |
309 |... | | | |
310 | | | | |
311 |MH20 |I | |ingress::hdr.inner_udp.dst_port |
312 | | | |ingress::hdr.inner_tcp.window |
313 | | | |ingress::hdr.tcp.window |
314 | | | |ingress::hdr.inner_icmp.data[31:16] |
315 | | | |ingress::hdr.icmp.data[31:16] |
316 | | | | |
317 |DH20 |I | |ingress::hdr.geneve.vni[15:0] ARA |
318 | | | | |
319 |MH21 |I | |ingress::hdr.udp.dst_port |
320 | | | | |
321 |DH21 |I | |ingress::hdr.inner_eth.src_mac[31:16] ARA |
322 | | | | |
323 |MH22 |I |[5:0] |ingress::hdr.inner_udp.src_port[5:0] |
324 | | |[15:6] |ingress::hdr.inner_udp.src_port[15:6] |
325 | | | |ingress::hdr.inner_tcp.urgent_ptr |
326 | | | |ingress::hdr.tcp.urgent_ptr |
327 | | | |ingress::hdr.inner_icmp.hdr_checksum |
328 | | | |ingress::hdr.icmp.hdr_checksum |
329 | | | | |
330 |DH22 |I | |ingress::hdr.inner_eth.dst_mac[15:0] ARA |
331 | | | | |
332 |MH23 |I |[5:0] |ingress::hdr.udp.src_port[5:0] |
333 | | |[15:6] |ingress::hdr.udp.src_port[15:6] |
334 | | | | |
335 |... | | | |
336 | | | | |
337 |H60 |I |[5:0] |ingress::meta.flow_hash[5:0] |
338 | | |[15:6] |ingress::meta.flow_hash[15:6] |
339 | | | | |
340 |H61 |I |[5:0] |ingress::l3_router_Router4_fwd.ecmp_hash[5:0] |
341 | | |[5:0] |ingress::l3_router_Router6_fwd.ecmp_hash[5:0] |
342 | | | |ingress::meta.nat_geneve_vni[15:0] |
343 | | | | |
344 |H62 |I | |ingress::hdr.geneve.vni[15:0] |
345 | | | |ingress::hdr.geneve.vni[15:0] ARA |
346 | | | |ingress::meta.nexthop_ipv6[23:8] ARA |
347 | | | | |
348 |H63 |I | |ingress::hdr.sidecar.sc_payload[23:8] |
349 | | | | |
350 |H64 |I | |ingress::l3_router_Router4_fwd.nexthop6[23:8] |
351 | | | |ingress::l3_router_Router6_fwd.nexthop[23:8] |
352 | | | |ingress::meta.nat_inner_mac[15:0] |
353 | | | | |
354 |H65 |I | |ingress::meta.nexthop_ipv4[23:8] |
355 | | | | |
356 |H66 |I | |ingress::l3_router_Router4_fwd.nexthop[23:8] ARA |
357 | | | |ingress::hdr.inner_eth.src_mac[31:16] |
358 | | | |ingress::hdr.inner_eth.src_mac[31:16] ARA |
359 | | | | |
360 |H67 |I | |ingress::hdr.inner_eth.dst_mac[15:0] |
361 | | | |ingress::hdr.inner_eth.dst_mac[15:0] ARA |
362 | | |[1:0] |ingress::l3_router_Router6_fwd.ecmp_hash[7:6] ARA |
363 | | | | |
364 |... | | | |
365 | | | | |
366 |W0 |I |[0] |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |
367 | | |[1] |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |
368 | | |[2] |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |
369 | | |[3] |ingress::ig_intr_md_for_tm.bypass_egress.$valid |
370 | | |[4] |ingress::meta.bridge_hdr.$valid |
371 | | |[5] |ingress::hdr.ethernet.$valid |
372 | | |[6] |ingress::hdr.sidecar.$valid |
373 | | |[7] |ingress::hdr.ipv4.$valid |
374 | | |[8] |ingress::hdr.icmp.$valid |
375 | | |[9] |ingress::hdr.tcp.$valid |
376 | | |[10] |ingress::hdr.udp.$valid |
377 | | |[11] |ingress::hdr.geneve.$valid |
378 | | |[12] |ingress::hdr.inner_eth.$valid |
379 | | |[13] |ingress::hdr.inner_ipv4.$valid |
380 | | |[14] |ingress::hdr.inner_tcp.$valid |
381 | | |[15] |ingress::hdr.inner_udp.$valid |
382 | | |[16] |ingress::hdr.inner_icmp.$valid |
383 | | |[17] |ingress::hdr.inner_ipv6.$valid |
384 | | |[18] |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |
385 | | |[19] |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |
386 | | |[20] |ingress::hdr.geneve_opts.oxg_mcast.$valid |
387 | | |[21] |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |
388 | | |[22] |ingress::hdr.geneve_opts.oxg_mss.$valid |
389 | | |[23] |ingress::hdr.ipv6.$valid |
390 | | |[24] |ingress::hdr.arp.$valid |
391 | | |[25] |ingress::meta.is_mcast |
392 | | |[26] |ingress::meta.icmp_recalc |
393 | | |[27] |ingress::meta.resolve_nexthop |
394 | | | | |
395 |MW0 |I | |ingress::meta.orig_src_ipv4 |
396 | | | | |
397 |... | | | |
398 | | | | |
399 |W1 |I |[4:0] |ingress::hdr.geneve_opts.oxg_ext_tag.opt_len |
400 | | |[7:5] |ingress::hdr.geneve_opts.oxg_ext_tag.reserved |
401 | | |[14:8] |ingress::hdr.geneve_opts.oxg_ext_tag.type |
402 | | |[15] |ingress::hdr.geneve_opts.oxg_ext_tag.crit |
403 | | |[31:16] |ingress::hdr.geneve_opts.oxg_ext_tag.class |
404 | | | | |
405 |MW1 |I | |ingress::hdr.inner_ipv4.dst_addr |
406 | | | |ingress::hdr.inner_ipv6.dst_addr[31:0] |
407 | | | | |
408 |... | | | |
409 | | | | |
410 |W2 |I | |ingress::hdr.ipv4.src_addr |
411 | | | |ingress::hdr.ipv6.dst_addr[31:0] |
412 | | | | |
413 |MW2 |I | |ingress::hdr.ipv4.dst_addr |
414 | | | |ingress::hdr.ipv6.src_addr[31:0] |
415 | | | | |
416 |... | | | |
417 | | | | |
418 |W3 |I |[15:0] |ingress::hdr.inner_tcp.dst_port |
419 | | |[31:16] |ingress::hdr.inner_tcp.src_port |
420 | | |[15:0] |ingress::hdr.tcp.dst_port |
421 | | |[31:16] |ingress::hdr.tcp.src_port |
422 | | | | |
423 |MW3 |I | |ingress::hdr.inner_ipv4.src_addr |
424 | | | |ingress::hdr.inner_ipv6.src_addr[31:0] |
425 | | | | |
426 |... | | | |
427 | | | | |
428 |W4 |I | |ingress::meta.nat_ingress_tgt[31:0] |
429 | | | | |
430 |W5 |I |[15:0] |ingress::hdr.geneve.protocol |
431 | | |[21:16] |ingress::hdr.geneve.reserved |
432 | | |[22] |ingress::hdr.geneve.crit |
433 | | |[23] |ingress::hdr.geneve.ctrl |
434 | | |[29:24] |ingress::hdr.geneve.opt_len |
435 | | |[31:30] |ingress::hdr.geneve.version |
436 | | | | |
437 |W6 |I | |ingress::hdr.ethernet.src_mac[47:16] |
438 | | | | |
439 |... | | | |
440 | | | | |
441 |W8 |I | |ingress::meta.orig_dst_ipv4 |
442 | | | | |
443 |... | | | |
444 | | | | |
445 |MW4 |I | |ingress::hdr.inner_ipv6.dst_addr[63:32] |
446 | | | | |
447 |... | | | |
448 | | | | |
449 |MW5 |I | |ingress::hdr.inner_ipv6.src_addr[63:32] |
450 | | | | |
451 |... | | | |
452 | | | | |
453 |MW6 |I | |ingress::hdr.ipv6.src_addr[63:32] |
454 | | | | |
455 |... | | | |
456 | | | | |
457 |MW7 |I | |ingress::meta.nat_ingress_tgt[63:32] |
458 | | | | |
459 |... | | | |
460 | | | | |
461 |W12 |I | |ingress::hdr.ipv6.dst_addr[63:32] |
462 | | |[12:0] |ingress::hdr.ipv4.frag_offset |
463 | | |[15:13] |ingress::hdr.ipv4.flags |
464 | | |[31:16] |ingress::hdr.ipv4.identification |
465 | | | | |
466 |W13 |I |[12:0] |ingress::hdr.inner_ipv4.frag_offset |
467 | | |[15:13] |ingress::hdr.inner_ipv4.flags |
468 | | |[31:16] |ingress::hdr.inner_ipv4.identification |
469 | | |[19:0] |ingress::hdr.inner_ipv6.flow_label |
470 | | |[27:20] |ingress::hdr.inner_ipv6.traffic_class |
471 | | |[31:28] |ingress::hdr.inner_ipv6.version |
472 | | | | |
473 |W14 |I |[19:0] |ingress::hdr.ipv6.flow_label |
474 | | |[27:20] |ingress::hdr.ipv6.traffic_class |
475 | | |[31:28] |ingress::hdr.ipv6.version |
476 | | | | |
477 |W15 |I |[23:0] |ingress::hdr.ethernet.dst_mac[23:0] |
478 | | |[31:24] |ingress::hdr.ethernet.dst_mac[31:24] |
479 | | | | |
480 |W16 |I |[23:0] |ingress::meta.orig_src_mac[23:0] |
481 | | |[31:24] |ingress::meta.orig_src_mac[31:24] |
482 | | | | |
483 |... | | | |
484 | | | | |
485 |MW8 |I | |ingress::hdr.inner_ipv6.dst_addr[95:64] |
486 | | | | |
487 |DW8 |I | |ingress::hdr.ipv6.dst_addr[95:64] ARA |
488 | | | | |
489 |MW9 |I | |ingress::hdr.inner_ipv6.src_addr[95:64] |
490 | | | | |
491 |... | | | |
492 | | | | |
493 |MW10 |I | |ingress::hdr.ipv6.src_addr[95:64] |
494 | | | | |
495 |... | | | |
496 | | | | |
497 |MW11 |I | |ingress::meta.nat_ingress_tgt[95:64] |
498 | | | | |
499 |... | | | |
500 | | | | |
501 |W24 |I | |ingress::hdr.ipv6.dst_addr[95:64] |
502 | | | |ingress::hdr.ipv6.dst_addr[95:64] ARA |
503 | | | |ingress::meta.nexthop_ipv6[63:32] ARA |
504 | | | | |
505 |W25 |I | |ingress::hdr.inner_tcp.ack_no |
506 | | | |ingress::hdr.tcp.ack_no |
507 | | | | |
508 |W26 |I | |ingress::hdr.sidecar.sc_payload[63:32] |
509 | | | | |
510 |... | | | |
511 | | | | |
512 |W28 |I | |ingress::l3_router_Router4_fwd.nexthop6[63:32] |
513 | | | |ingress::l3_router_Router6_fwd.nexthop[63:32] |
514 | | |[0] |ingress::meta.uplink_ingress |
515 | | | | |
516 |... | | | |
517 | | | | |
518 |MW12 |I | |ingress::hdr.inner_ipv6.dst_addr[127:96] |
519 | | | | |
520 |DW12 |I | |ingress::hdr.ipv6.dst_addr[127:96] ARA |
521 | | | | |
522 |MW13 |I | |ingress::hdr.inner_ipv6.src_addr[127:96] |
523 | | | | |
524 |... | | | |
525 | | | | |
526 |MW14 |I | |ingress::hdr.ipv6.src_addr[127:96] |
527 | | | | |
528 |... | | | |
529 | | | | |
530 |MW15 |I | |ingress::meta.nat_ingress_tgt[127:96] |
531 | | | | |
532 |... | | | |
533 | | | | |
534 |W36 |I | |ingress::hdr.ipv6.dst_addr[127:96] |
535 | | | |ingress::hdr.ipv6.dst_addr[127:96] ARA |
536 | | | |ingress::meta.nexthop_ipv6[95:64] ARA |
537 | | | | |
538 |W37 |I | |ingress::hdr.inner_tcp.seq_no |
539 | | | |ingress::hdr.tcp.seq_no |
540 | | | | |
541 |W38 |I | |ingress::hdr.sidecar.sc_payload[95:64] |
542 | | | | |
543 |... | | | |
544 | | | | |
545 |W40 |I | |ingress::l3_router_Router4_fwd.nexthop6[95:64] |
546 | | | |ingress::l3_router_Router6_fwd.nexthop[95:64] |
547 | | |[0] |ingress::meta.is_switch_address |
548 | | |[10:1] |ingress::meta.pkt_type |
549 | | |[11] |ingress::meta.is_link_local_mcastv6 |
550 | | |[12] |ingress::meta.nat_ingress_hit |
551 | | | | |
552 |... | | | |
553 | | | | |
554 +-----------+-------+-----------------+--------------------------------------------------------+
555 
556 
557 POV Allocation (ingress):
558 +-----------+-----------------+--------------------------------------------------------+
559 |Container |Container Slice |Field Slice |
560 +-----------+-----------------+--------------------------------------------------------+
561 |B1 |[0] |ingress::hdr.vlan.$valid |
562 | |[1] |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |
563 | |[2] |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |
564 +-----------+-----------------+--------------------------------------------------------+
565 |B2 |[0] |ingress::hdr.udp.checksum.$deparse_original_csum |
566 | |[1] |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |
567 | |[2] |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |
568 | |[3] |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |
569 | |[4] |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |
570 +-----------+-----------------+--------------------------------------------------------+
571 |W0 |[0] |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |
572 | |[1] |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |
573 | |[2] |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |
574 | |[3] |ingress::ig_intr_md_for_tm.bypass_egress.$valid |
575 | |[4] |ingress::meta.bridge_hdr.$valid |
576 | |[5] |ingress::hdr.ethernet.$valid |
577 | |[6] |ingress::hdr.sidecar.$valid |
578 | |[7] |ingress::hdr.ipv4.$valid |
579 | |[8] |ingress::hdr.icmp.$valid |
580 | |[9] |ingress::hdr.tcp.$valid |
581 | |[10] |ingress::hdr.udp.$valid |
582 | |[11] |ingress::hdr.geneve.$valid |
583 | |[12] |ingress::hdr.inner_eth.$valid |
584 | |[13] |ingress::hdr.inner_ipv4.$valid |
585 | |[14] |ingress::hdr.inner_tcp.$valid |
586 | |[15] |ingress::hdr.inner_udp.$valid |
587 | |[16] |ingress::hdr.inner_icmp.$valid |
588 | |[17] |ingress::hdr.inner_ipv6.$valid |
589 | |[18] |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |
590 | |[19] |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |
591 | |[20] |ingress::hdr.geneve_opts.oxg_mcast.$valid |
592 | |[21] |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |
593 | |[22] |ingress::hdr.geneve_opts.oxg_mss.$valid |
594 | |[23] |ingress::hdr.ipv6.$valid |
595 | |[24] |ingress::hdr.arp.$valid |
596 +-----------+-----------------+--------------------------------------------------------+
597 | |Total Bits Used |33 / 128 ( 25.8 %) |
598 | |Pack Density |33 / 48 ( 68.8 %) |
599 +-----------+-----------------+--------------------------------------------------------+
600 
601 POV Allocation (egress):
602 +-----------+-----------------+------------------------------------------------------+
603 |Container |Container Slice |Field Slice |
604 +-----------+-----------------+------------------------------------------------------+
605 |MB0 |[0] |egress::hdr.geneve_opts.oxg_mss_tag.$valid |
606 | |[1] |egress::hdr.geneve_opts.oxg_mss.$valid |
607 | |[2] |egress::hdr.ipv6.$valid |
608 +-----------+-----------------+------------------------------------------------------+
609 |MH5 |[0] |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |
610 | |[1] |egress::eg_intr_md.egress_port.$valid |
611 | |[2] |egress::hdr.ethernet.$valid |
612 | |[3] |egress::hdr.vlan.$valid |
613 | |[4] |egress::hdr.ipv4.$valid |
614 | |[5] |egress::hdr.icmp.$valid |
615 | |[6] |egress::hdr.udp.$valid |
616 | |[7] |egress::hdr.geneve.$valid |
617 | |[8] |egress::hdr.inner_eth.$valid |
618 | |[9] |egress::hdr.inner_ipv4.$valid |
619 | |[10] |egress::hdr.inner_tcp.$valid |
620 | |[11] |egress::hdr.inner_udp.$valid |
621 | |[12] |egress::hdr.inner_ipv6.$valid |
622 | |[13] |egress::hdr.geneve_opts.oxg_ext_tag.$valid |
623 | |[14] |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |
624 | |[15] |egress::hdr.geneve_opts.oxg_mcast.$valid |
625 +-----------+-----------------+------------------------------------------------------+
626 | |Total Bits Used |19 / 128 ( 14.8 %) |
627 | |Pack Density |19 / 24 ( 79.2 %) |
628 +-----------+-----------------+------------------------------------------------------+
629 
630 +--------------------------------------------------------+------------+-----------+----------------+-----------------+
631 |Field Slice |Live Range |Container |Container Type |Container Slice |
632 +--------------------------------------------------------+------------+-----------+----------------+-----------------+
633 |ingress::ig_intr_md_for_dprsr.mirror_type.$valid |[-1r, 14w] |W0 |W |[0] |
634 |ingress::ig_intr_md.ingress_port |[-1r, 14w] |H21 |H |[8:0] |
635 |ingress::meta.bridge_hdr.__pad_0 |[-1r, 14w] |H4 |H |[15:9] |
636 |ingress::meta.bridge_hdr.ingress_port |[0w, 7r] |DH0 |DH |[8:0] |
637 |ingress::meta.bridge_hdr.ingress_port |[-1w, 0r] |H4 |H |[8:0] |
638 |ingress::meta.bridge_hdr.ingress_port |[7w, 14r] |H4 |H |[8:0] |
639 |ingress::hdr.ethernet.dst_mac[39:32] |[-1r, 14w] |H25 |H |[7:0] |
640 |ingress::hdr.ethernet.dst_mac[47:40] |[-1r, 14w] |H25 |H |[15:8] |
641 |ingress::hdr.ethernet.dst_mac[23:0] |[-1r, 14w] |W15 |W |[23:0] |
642 |ingress::hdr.ethernet.dst_mac[31:24] |[-1r, 14w] |W15 |W |[31:24] |
643 |ingress::hdr.ethernet.src_mac[15:0] |[-1r, 14w] |MH2 |MH | |
644 |ingress::hdr.ethernet.src_mac[47:16] |[-1r, 14w] |W6 |W | |
645 |ingress::hdr.ethernet.ether_type |[-1r, 14w] |MH17 |MH | |
646 |ingress::meta.dropped |[-1r, 14w] |B2 |B |[5] |
647 |ingress::meta.ipv4_checksum_err |[-1r, 14w] |MH4 |MH |[0] |
648 |ingress::meta.is_switch_address |[-1r, 14w] |W40 |W |[0] |
649 |ingress::meta.is_mcast |[-1r, 14w] |W0 |W |[25] |
650 |ingress::meta.is_link_local_mcastv6 |[-1r, 14w] |W40 |W |[11] |
651 |ingress::meta.service_routed |[-1r, 14w] |B2 |B |[6] |
652 |ingress::meta.nat_egress_hit |[-1r, 14w] |B2 |B |[7] |
653 |ingress::meta.nat_ingress_hit |[-1r, 14w] |W40 |W |[12] |
654 |ingress::meta.uplink_ingress |[-1r, 14w] |W28 |W |[0] |
655 |ingress::meta.encap_needed |[-1r, 14w] |B1 |B |[7] |
656 |ingress::meta.resolve_nexthop |[-1r, 14w] |W0 |W |[27] |
657 |ingress::meta.nexthop_ipv4[31:24] |[-1r, 14w] |B8 |B | |
658 |ingress::meta.nexthop_ipv4[7:0] |[-1r, 14w] |B24 |B | |
659 |ingress::meta.nexthop_ipv4[23:8] |[-1r, 14w] |H65 |H | |
660 |ingress::meta.nexthop_ipv6[7:0] |[-1r, 14w] |MB10 |MB | |
661 |ingress::meta.nexthop_ipv6[127:112] |[-1r, 14w] |MH13 |MH | |
662 |ingress::meta.nexthop_ipv6[31:24] |[4w, 11r] |B3 |B | |
663 |ingress::meta.nexthop_ipv6[111:96] |[4w, 11r] |H24 |H | |
664 |ingress::meta.nexthop_ipv6[23:8] |[4w, 11r] |H62 |H | |
665 |ingress::meta.nexthop_ipv6[63:32] |[6w, 11r] |W24 |W | |
666 |ingress::meta.nexthop_ipv6[95:64] |[6w, 11r] |W36 |W | |
667 |ingress::meta.pkt_type |[-1r, 14w] |W40 |W |[10:1] |
668 |ingress::meta.drop_reason |[-1r, 14w] |MB12 |MB | |
669 |ingress::meta.l4_src_port |[-1r, 14w] |H8 |H | |
670 |ingress::meta.l4_dst_port |[-1r, 14w] |MH7 |MH | |
671 |ingress::meta.flow_hash[5:0] |[-1r, 14w] |H60 |H |[5:0] |
672 |ingress::meta.flow_hash[15:6] |[-1r, 14w] |H60 |H |[15:6] |
673 |ingress::meta.nat_ingress_tgt[63:32] |[-1r, 14w] |MW7 |MW | |
674 |ingress::meta.nat_ingress_tgt[95:64] |[-1r, 14w] |MW11 |MW | |
675 |ingress::meta.nat_ingress_tgt[127:96] |[-1r, 14w] |MW15 |MW | |
676 |ingress::meta.nat_ingress_tgt[31:0] |[-1r, 14w] |W4 |W | |
677 |ingress::meta.nat_inner_mac[31:16] |[-1r, 14w] |MH9 |MH | |
678 |ingress::meta.nat_inner_mac[47:32] |[-1r, 14w] |MH11 |MH | |
679 |ingress::meta.nat_inner_mac[15:0] |[-1r, 14w] |H64 |H | |
680 |ingress::meta.nat_geneve_vni[23:16] |[-1r, 14w] |MB1 |MB | |
681 |ingress::meta.nat_geneve_vni[15:0] |[-1r, 14w] |H61 |H | |
682 |ingress::meta.icmp_recalc |[-1r, 14w] |W0 |W |[26] |
683 |ingress::meta.icmp_csum |[-1r, 14w] |MH0 |MH | |
684 |ingress::meta.body_checksum |[-1r, 14w] |MH1 |MH | |
685 |ingress::meta.l4_length |[-1r, 14w] |H14 |H | |
686 |ingress::meta.orig_src_mac[39:32] |[-1r, 14w] |MH10 |MH |[7:0] |
687 |ingress::meta.orig_src_mac[47:40] |[-1r, 14w] |MH10 |MH |[15:8] |
688 |ingress::meta.orig_src_mac[23:0] |[-1r, 14w] |W16 |W |[23:0] |
689 |ingress::meta.orig_src_mac[31:24] |[-1r, 14w] |W16 |W |[31:24] |
690 |ingress::meta.orig_src_ipv4 |[-1r, 14w] |MW0 |MW | |
691 |ingress::meta.orig_dst_ipv4 |[-1r, 14w] |W8 |W | |
692 |ingress::meta.nat_ingress_csum |[-1r, 14w] |H6 |H | |
693 |ingress::hdr.sidecar.sc_code |[-1r, 14w] |H5 |H |[15:8] |
694 |ingress::hdr.sidecar.sc_pad |[-1r, 14w] |H5 |H |[7:0] |
695 |ingress::hdr.sidecar.sc_ingress[8:0] |[-1r, 14w] |H19 |H |[8:0] |
696 |ingress::hdr.sidecar.sc_ingress[15:9] |[-1r, 14w] |H19 |H |[15:9] |
697 |ingress::hdr.sidecar.sc_egress[8:0] |[-1r, 14w] |H18 |H |[8:0] |
698 |ingress::hdr.sidecar.sc_egress[15:9] |[-1r, 14w] |H18 |H |[15:9] |
699 |ingress::hdr.sidecar.sc_ether_type |[-1r, 14w] |MH16 |MH | |
700 |ingress::hdr.sidecar.sc_payload[7:0] |[-1r, 14w] |MB9 |MB | |
701 |ingress::hdr.sidecar.sc_payload[127:112] |[-1r, 14w] |MH12 |MH | |
702 |ingress::hdr.sidecar.sc_payload[31:24] |[-1r, 14w] |B4 |B | |
703 |ingress::hdr.sidecar.sc_payload[111:96] |[-1r, 14w] |H29 |H | |
704 |ingress::hdr.sidecar.sc_payload[23:8] |[-1r, 14w] |H63 |H | |
705 |ingress::hdr.sidecar.sc_payload[63:32] |[-1r, 14w] |W26 |W | |
706 |ingress::hdr.sidecar.sc_payload[95:64] |[-1r, 14w] |W38 |W | |
707 |ingress::hdr.vlan.pcp |[-1r, 14w] |H23 |H |[15:13] |
708 |ingress::hdr.vlan.dei |[-1r, 14w] |H23 |H |[12] |
709 |ingress::hdr.vlan.vlan_id |[-1r, 14w] |H23 |H |[11:0] |
710 |ingress::hdr.vlan.ether_type |[-1r, 14w] |MH18 |MH | |
711 |ingress::hdr.ipv4.version |[-1r, 14w] |H2 |H |[15:12] |
712 |ingress::hdr.ipv4.ihl |[-1r, 14w] |H2 |H |[11:8] |
713 |ingress::hdr.ipv4.diffserv |[-1r, 14w] |H2 |H |[7:0] |
714 |ingress::hdr.ipv4.total_len |[-1r, 14w] |H13 |H | |
715 |ingress::hdr.ipv4.identification |[-1r, 14w] |W12 |W |[31:16] |
716 |ingress::hdr.ipv4.flags |[-1r, 14w] |W12 |W |[15:13] |
717 |ingress::hdr.ipv4.frag_offset |[-1r, 14w] |W12 |W |[12:0] |
718 |ingress::hdr.ipv4.ttl |[-1r, 14w] |B12 |B | |
719 |ingress::hdr.ipv4.protocol |[-1r, 14w] |MB7 |MB | |
720 |ingress::hdr.ipv4.hdr_checksum |[6w, 10r] |DH10 |DH | |
721 |ingress::hdr.ipv4.hdr_checksum |[-1w, 6r] |H27 |H | |
722 |ingress::hdr.ipv4.hdr_checksum |[10w, 14r] |H27 |H | |
723 |ingress::hdr.ipv4.src_addr |[-1r, 14w] |W2 |W | |
724 |ingress::hdr.ipv4.dst_addr |[-1r, 14w] |MW2 |MW | |
725 |ingress::hdr.icmp.type |[-1r, 14w] |H0 |H |[15:8] |
726 |ingress::hdr.icmp.code |[-1r, 14w] |H0 |H |[7:0] |
727 |ingress::hdr.icmp.hdr_checksum |[-1r, 14w] |MH22 |MH | |
728 |ingress::hdr.icmp.data[15:0] |[-1r, 14w] |MH3 |MH | |
729 |ingress::hdr.icmp.data[31:16] |[-1r, 14w] |MH20 |MH | |
730 |ingress::hdr.tcp.src_port |[-1r, 14w] |W3 |W |[31:16] |
731 |ingress::hdr.tcp.dst_port |[-1r, 14w] |W3 |W |[15:0] |
732 |ingress::hdr.tcp.seq_no |[-1r, 14w] |W37 |W | |
733 |ingress::hdr.tcp.ack_no |[-1r, 14w] |W25 |W | |
734 |ingress::hdr.tcp.data_offset |[-1r, 14w] |H0 |H |[15:12] |
735 |ingress::hdr.tcp.res |[-1r, 14w] |H0 |H |[11:8] |
736 |ingress::hdr.tcp.flags |[-1r, 14w] |H0 |H |[7:0] |
737 |ingress::hdr.tcp.window |[-1r, 14w] |MH20 |MH | |
738 |ingress::hdr.tcp.checksum |[-1r, 14w] |MH3 |MH | |
739 |ingress::hdr.tcp.urgent_ptr |[-1r, 14w] |MH22 |MH | |
740 |ingress::hdr.udp.src_port[5:0] |[-1r, 14w] |MH23 |MH |[5:0] |
741 |ingress::hdr.udp.src_port[15:6] |[-1r, 14w] |MH23 |MH |[15:6] |
742 |ingress::hdr.udp.dst_port |[-1r, 14w] |MH21 |MH | |
743 |ingress::hdr.udp.hdr_length |[-1r, 14w] |H16 |H | |
744 |ingress::hdr.udp.checksum |[-1r, 14w] |H3 |H | |
745 |ingress::hdr.geneve.version |[-1r, 14w] |W5 |W |[31:30] |
746 |ingress::hdr.geneve.opt_len |[-1r, 14w] |W5 |W |[29:24] |
747 |ingress::hdr.geneve.ctrl |[-1r, 14w] |W5 |W |[23] |
748 |ingress::hdr.geneve.crit |[-1r, 14w] |W5 |W |[22] |
749 |ingress::hdr.geneve.reserved |[-1r, 14w] |W5 |W |[21:16] |
750 |ingress::hdr.geneve.protocol |[-1r, 14w] |W5 |W |[15:0] |
751 |ingress::hdr.geneve.vni[23:16] |[4w, 11r] |DB0 |DB | |
752 |ingress::hdr.geneve.vni[15:0] |[4w, 11r] |DH20 |DH | |
753 |ingress::hdr.geneve.vni[23:16] |[-1w, 4r] |B3 |B | |
754 |ingress::hdr.geneve.vni[23:16] |[11w, 14r] |B3 |B | |
755 |ingress::hdr.geneve.vni[15:0] |[-1w, 4r] |H62 |H | |
756 |ingress::hdr.geneve.vni[15:0] |[11w, 14r] |H62 |H | |
757 |ingress::hdr.geneve.reserved2 |[4w, 10r] |DB8 |DB | |
758 |ingress::hdr.geneve.reserved2 |[-1w, 4r] |MB8 |MB | |
759 |ingress::hdr.geneve.reserved2 |[10w, 14r] |MB8 |MB | |
760 |ingress::hdr.inner_eth.dst_mac[31:16] |[4w, 11r] |DH8 |DH | |
761 |ingress::hdr.inner_eth.dst_mac[47:32] |[4w, 7r] |DH11 |DH | |
762 |ingress::hdr.inner_eth.dst_mac[15:0] |[4w, 7r] |DH22 |DH | |
763 |ingress::hdr.inner_eth.dst_mac[31:16] |[-1w, 4r] |H24 |H | |
764 |ingress::hdr.inner_eth.dst_mac[31:16] |[11w, 14r] |H24 |H | |
765 |ingress::hdr.inner_eth.dst_mac[47:32] |[-1w, 4r] |H28 |H | |
766 |ingress::hdr.inner_eth.dst_mac[47:32] |[7w, 14r] |H28 |H | |
767 |ingress::hdr.inner_eth.dst_mac[15:0] |[-1w, 4r] |H67 |H | |
768 |ingress::hdr.inner_eth.dst_mac[15:0] |[7w, 14r] |H67 |H | |
769 |ingress::hdr.inner_eth.src_mac[15:0] |[4w, 10r] |DH5 |DH | |
770 |ingress::hdr.inner_eth.src_mac[31:16] |[4w, 10r] |DH21 |DH | |
771 |ingress::hdr.inner_eth.src_mac[47:32] |[-1r, 14w] |MH15 |MH | |
772 |ingress::hdr.inner_eth.src_mac[15:0] |[-1w, 4r] |H22 |H | |
773 |ingress::hdr.inner_eth.src_mac[15:0] |[10w, 14r] |H22 |H | |
774 |ingress::hdr.inner_eth.src_mac[31:16] |[-1w, 4r] |H66 |H | |
775 |ingress::hdr.inner_eth.src_mac[31:16] |[10w, 14r] |H66 |H | |
776 |ingress::hdr.inner_eth.ether_type |[-1r, 14w] |MH19 |MH | |
777 |ingress::hdr.inner_ipv4.version |[-1r, 14w] |H1 |H |[15:12] |
778 |ingress::hdr.inner_ipv4.ihl |[-1r, 14w] |H1 |H |[11:8] |
779 |ingress::hdr.inner_ipv4.diffserv |[-1r, 14w] |H1 |H |[7:0] |
780 |ingress::hdr.inner_ipv4.total_len |[-1r, 14w] |H12 |H | |
781 |ingress::hdr.inner_ipv4.identification |[-1r, 14w] |W13 |W |[31:16] |
782 |ingress::hdr.inner_ipv4.flags |[-1r, 14w] |W13 |W |[15:13] |
783 |ingress::hdr.inner_ipv4.frag_offset |[-1r, 14w] |W13 |W |[12:0] |
784 |ingress::hdr.inner_ipv4.ttl |[-1r, 14w] |MB4 |MB | |
785 |ingress::hdr.inner_ipv4.protocol |[-1r, 14w] |MB6 |MB | |
786 |ingress::hdr.inner_ipv4.hdr_checksum |[5w, 10r] |DH9 |DH | |
787 |ingress::hdr.inner_ipv4.hdr_checksum |[-1w, 5r] |H26 |H | |
788 |ingress::hdr.inner_ipv4.hdr_checksum |[10w, 14r] |H26 |H | |
789 |ingress::hdr.inner_ipv4.src_addr |[-1r, 14w] |MW3 |MW | |
790 |ingress::hdr.inner_ipv4.dst_addr |[-1r, 14w] |MW1 |MW | |
791 |ingress::hdr.inner_tcp.src_port |[-1r, 14w] |W3 |W |[31:16] |
792 |ingress::hdr.inner_tcp.dst_port |[-1r, 14w] |W3 |W |[15:0] |
793 |ingress::hdr.inner_tcp.seq_no |[-1r, 14w] |W37 |W | |
794 |ingress::hdr.inner_tcp.ack_no |[-1r, 14w] |W25 |W | |
795 |ingress::hdr.inner_tcp.data_offset |[-1r, 14w] |H0 |H |[15:12] |
796 |ingress::hdr.inner_tcp.res |[-1r, 14w] |H0 |H |[11:8] |
797 |ingress::hdr.inner_tcp.flags |[-1r, 14w] |H0 |H |[7:0] |
798 |ingress::hdr.inner_tcp.window |[-1r, 14w] |MH20 |MH | |
799 |ingress::hdr.inner_tcp.checksum |[-1r, 14w] |MH3 |MH | |
800 |ingress::hdr.inner_tcp.urgent_ptr |[-1r, 14w] |MH22 |MH | |
801 |ingress::hdr.inner_udp.src_port[5:0] |[-1r, 14w] |MH22 |MH |[5:0] |
802 |ingress::hdr.inner_udp.src_port[15:6] |[-1r, 14w] |MH22 |MH |[15:6] |
803 |ingress::hdr.inner_udp.dst_port |[-1r, 14w] |MH20 |MH | |
804 |ingress::hdr.inner_udp.hdr_length |[5w, 10r] |DH4 |DH | |
805 |ingress::hdr.inner_udp.hdr_length |[-1w, 5r] |H15 |H | |
806 |ingress::hdr.inner_udp.hdr_length |[10w, 14r] |H15 |H | |
807 |ingress::hdr.inner_udp.checksum |[-1r, 14w] |MH3 |MH | |
808 |ingress::hdr.inner_icmp.type |[-1r, 14w] |H0 |H |[15:8] |
809 |ingress::hdr.inner_icmp.code |[-1r, 14w] |H0 |H |[7:0] |
810 |ingress::hdr.inner_icmp.hdr_checksum |[-1r, 14w] |MH22 |MH | |
811 |ingress::hdr.inner_icmp.data[15:0] |[-1r, 14w] |MH3 |MH | |
812 |ingress::hdr.inner_icmp.data[31:16] |[-1r, 14w] |MH20 |MH | |
813 |ingress::hdr.inner_ipv6.version |[-1r, 14w] |W13 |W |[31:28] |
814 |ingress::hdr.inner_ipv6.traffic_class |[-1r, 14w] |W13 |W |[27:20] |
815 |ingress::hdr.inner_ipv6.flow_label |[-1r, 14w] |W13 |W |[19:0] |
816 |ingress::hdr.inner_ipv6.payload_len |[-1r, 14w] |H12 |H | |
817 |ingress::hdr.inner_ipv6.next_hdr |[-1r, 14w] |MB6 |MB | |
818 |ingress::hdr.inner_ipv6.hop_limit |[-1r, 14w] |MB4 |MB | |
819 |ingress::hdr.inner_ipv6.src_addr[31:0] |[-1r, 14w] |MW3 |MW | |
820 |ingress::hdr.inner_ipv6.src_addr[63:32] |[-1r, 14w] |MW5 |MW | |
821 |ingress::hdr.inner_ipv6.src_addr[95:64] |[-1r, 14w] |MW9 |MW | |
822 |ingress::hdr.inner_ipv6.src_addr[127:96] |[-1r, 14w] |MW13 |MW | |
823 |ingress::hdr.inner_ipv6.dst_addr[31:0] |[-1r, 14w] |MW1 |MW | |
824 |ingress::hdr.inner_ipv6.dst_addr[63:32] |[-1r, 14w] |MW4 |MW | |
825 |ingress::hdr.inner_ipv6.dst_addr[95:64] |[-1r, 14w] |MW8 |MW | |
826 |ingress::hdr.inner_ipv6.dst_addr[127:96] |[-1r, 14w] |MW12 |MW | |
827 |ingress::hdr.geneve_opts.oxg_ext_tag.class |[-1r, 14w] |W1 |W |[31:16] |
828 |ingress::hdr.geneve_opts.oxg_ext_tag.crit |[-1r, 14w] |W1 |W |[15] |
829 |ingress::hdr.geneve_opts.oxg_ext_tag.type |[-1r, 14w] |W1 |W |[14:8] |
830 |ingress::hdr.geneve_opts.oxg_ext_tag.reserved |[-1r, 14w] |W1 |W |[7:5] |
831 |ingress::hdr.geneve_opts.oxg_ext_tag.opt_len |[-1r, 14w] |W1 |W |[4:0] |
832 |ingress::hdr.ipv6.version |[-1r, 14w] |W14 |W |[31:28] |
833 |ingress::hdr.ipv6.traffic_class |[-1r, 14w] |W14 |W |[27:20] |
834 |ingress::hdr.ipv6.flow_label |[-1r, 14w] |W14 |W |[19:0] |
835 |ingress::hdr.ipv6.payload_len |[-1r, 14w] |H13 |H | |
836 |ingress::hdr.ipv6.next_hdr |[-1r, 14w] |MB7 |MB | |
837 |ingress::hdr.ipv6.hop_limit |[-1r, 14w] |B12 |B | |
838 |ingress::hdr.ipv6.src_addr[31:0] |[-1r, 14w] |MW2 |MW | |
839 |ingress::hdr.ipv6.src_addr[63:32] |[-1r, 14w] |MW6 |MW | |
840 |ingress::hdr.ipv6.src_addr[95:64] |[-1r, 14w] |MW10 |MW | |
841 |ingress::hdr.ipv6.src_addr[127:96] |[-1r, 14w] |MW14 |MW | |
842 |ingress::hdr.ipv6.dst_addr[95:64] |[6w, 11r] |DW8 |DW | |
843 |ingress::hdr.ipv6.dst_addr[127:96] |[6w, 11r] |DW12 |DW | |
844 |ingress::hdr.ipv6.dst_addr[31:0] |[-1r, 14w] |W2 |W | |
845 |ingress::hdr.ipv6.dst_addr[63:32] |[-1r, 14w] |W12 |W | |
846 |ingress::hdr.ipv6.dst_addr[95:64] |[-1w, 6r] |W24 |W | |
847 |ingress::hdr.ipv6.dst_addr[95:64] |[11w, 14r] |W24 |W | |
848 |ingress::hdr.ipv6.dst_addr[127:96] |[-1w, 6r] |W36 |W | |
849 |ingress::hdr.ipv6.dst_addr[127:96] |[11w, 14r] |W36 |W | |
850 |ingress::ig_intr_md_for_tm.ucast_egress_port |[-1r, 14w] |H17 |H |[8:0] |
851 |ingress::ig_intr_md_for_tm.bypass_egress |[-1r, 14w] |B1 |B |[3] |
852 |ingress::ig_intr_md_for_tm.ucast_egress_port.$valid |[-1r, 14w] |W0 |W |[1] |
853 |ingress::l3_router_Router4_fwd.nexthop[31:24] |[-1r, 14w] |MB3 |MB | |
854 |ingress::l3_router_Router4_fwd.nexthop[7:0] |[-1r, 14w] |MB11 |MB | |
855 |ingress::l3_router_Router4_fwd.nexthop[23:8] |[4w, 10r] |H66 |H | |
856 |ingress::l3_router_Router4_fwd.nexthop6[31:24] |[-1r, 14w] |MB2 |MB | |
857 |ingress::l3_router_Router4_fwd.nexthop6[7:0] |[4w, 10r] |MB8 |MB | |
858 |ingress::l3_router_Router4_fwd.nexthop6[127:112] |[-1r, 14w] |MH14 |MH | |
859 |ingress::l3_router_Router4_fwd.nexthop6[111:96] |[5w, 10r] |H26 |H | |
860 |ingress::l3_router_Router4_fwd.nexthop6[23:8] |[-1r, 14w] |H64 |H | |
861 |ingress::l3_router_Router4_fwd.nexthop6[63:32] |[-1r, 14w] |W28 |W | |
862 |ingress::l3_router_Router4_fwd.nexthop6[95:64] |[-1r, 14w] |W40 |W | |
863 |ingress::l3_router_Router4_fwd.port |[5w, 10r] |H15 |H |[8:0] |
864 |ingress::l3_router_Router4_fwd.is_hit |[-1r, 14w] |H17 |H |[9] |
865 |ingress::l3_router_Router4_fwd.ecmp_hash[7:6] |[4w, 7r] |H28 |H |[1:0] |
866 |ingress::l3_router_Router4_fwd.ecmp_hash[5:0] |[-1r, 14w] |H61 |H |[5:0] |
867 |ingress::l3_router_Router4_fwd.idx[7:0] |[-1r, 14w] |H20 |H |[7:0] |
868 |ingress::l3_router_Router4_fwd.idx[15:8] |[-1r, 14w] |H20 |H |[15:8] |
869 |ingress::l3_router_Router4_fwd.slots |[0w, 7r] |H4 |H |[7:0] |
870 |ingress::l3_router_Router4_fwd.slot[7:0] |[-1r, 14w] |MH6 |MH |[7:0] |
871 |ingress::l3_router_Router4_fwd.slot[15:8] |[-1r, 14w] |MH6 |MH |[15:8] |
872 |ingress::l3_router_Router6_fwd.nexthop[31:24] |[-1r, 14w] |MB2 |MB | |
873 |ingress::l3_router_Router6_fwd.nexthop[7:0] |[-1r, 14w] |MB11 |MB | |
874 |ingress::l3_router_Router6_fwd.nexthop[127:112] |[-1r, 14w] |MH14 |MH | |
875 |ingress::l3_router_Router6_fwd.nexthop[111:96] |[6w, 10r] |H27 |H | |
876 |ingress::l3_router_Router6_fwd.nexthop[23:8] |[-1r, 14w] |H64 |H | |
877 |ingress::l3_router_Router6_fwd.nexthop[63:32] |[-1r, 14w] |W28 |W | |
878 |ingress::l3_router_Router6_fwd.nexthop[95:64] |[-1r, 14w] |W40 |W | |
879 |ingress::l3_router_Router6_fwd.port |[4w, 10r] |H22 |H |[8:0] |
880 |ingress::l3_router_Router6_fwd.is_hit |[-1r, 14w] |H17 |H |[9] |
881 |ingress::l3_router_Router6_fwd.ecmp_hash[5:0] |[-1r, 14w] |H61 |H |[5:0] |
882 |ingress::l3_router_Router6_fwd.ecmp_hash[7:6] |[4w, 7r] |H67 |H |[1:0] |
883 |ingress::l3_router_Router6_fwd.idx[7:0] |[-1r, 14w] |H20 |H |[7:0] |
884 |ingress::l3_router_Router6_fwd.idx[15:8] |[-1r, 14w] |H20 |H |[15:8] |
885 |ingress::l3_router_Router6_fwd.slots |[-1r, 14w] |MB3 |MB | |
886 |ingress::l3_router_Router6_fwd.slot[7:0] |[-1r, 14w] |MH6 |MH |[7:0] |
887 |ingress::l3_router_Router6_fwd.slot[15:8] |[-1r, 14w] |MH6 |MH |[15:8] |
888 |ingress::ig_intr_md_for_dprsr.drop_ctl |[-1r, 14w] |B1 |B |[6:4] |
889 |ingress::ig_intr_md_for_dprsr.mirror_type |[-1r, 14w] |MB5 |MB |[3:0] |
890 |ingress::ig_intr_md_for_dprsr.drop_ctl.$valid |[-1r, 14w] |W0 |W |[2] |
891 |ingress::ig_intr_md_for_tm.bypass_egress.$valid |[-1r, 14w] |W0 |W |[3] |
892 |ingress::hdr.udp.checksum.$deparse_original_csum |[-1r, 14w] |B2 |B |[0] |
893 |ingress::hdr.udp.checksum.$deparse_updated_csum_0 |[-1r, 14w] |B2 |B |[1] |
894 |ingress::hdr.udp.checksum.$deparse_updated_csum_1 |[-1r, 14w] |B2 |B |[2] |
895 |ingress::hdr.udp.checksum.$deparse_updated_csum_2 |[-1r, 14w] |B2 |B |[3] |
896 |ingress::hdr.udp.checksum.$deparse_updated_csum_3 |[-1r, 14w] |B2 |B |[4] |
897 |ingress::hdr.icmp.hdr_checksum.$deparse_original_csum |[-1r, 14w] |B1 |B |[1] |
898 |ingress::hdr.icmp.hdr_checksum.$deparse_updated_csum_0 |[-1r, 14w] |B1 |B |[2] |
899 |ingress::$tmp3 |[-1r, 14w] |B0 |B | |
900 |egress::eg_intr_md_for_dprsr.mirror_io_select |[-1r, 14w] |MB0 |MB |[3] |
901 |egress::eg_intr_md_for_dprsr.mirror_io_select.$valid |[-1r, 14w] |MH5 |MH |[0] |
902 |egress::eg_intr_md.egress_port |[-1r, 14w] |MH8 |MH |[8:0] |
903 |egress::eg_intr_md.egress_port.$valid |[-1r, 14w] |MH5 |MH |[1] |
904 |ingress::meta.bridge_hdr.$valid |[-1r, 14w] |W0 |W |[4] |
905 |ingress::hdr.ethernet.$valid |[-1r, 14w] |W0 |W |[5] |
906 |ingress::hdr.sidecar.$valid |[-1r, 14w] |W0 |W |[6] |
907 |ingress::hdr.vlan.$valid |[-1r, 14w] |B1 |B |[0] |
908 |ingress::hdr.ipv4.$valid |[-1r, 14w] |W0 |W |[7] |
909 |ingress::hdr.icmp.$valid |[-1r, 14w] |W0 |W |[8] |
910 |ingress::hdr.tcp.$valid |[-1r, 14w] |W0 |W |[9] |
911 |ingress::hdr.udp.$valid |[-1r, 14w] |W0 |W |[10] |
912 |ingress::hdr.geneve.$valid |[-1r, 14w] |W0 |W |[11] |
913 |ingress::hdr.inner_eth.$valid |[-1r, 14w] |W0 |W |[12] |
914 |ingress::hdr.inner_ipv4.$valid |[-1r, 14w] |W0 |W |[13] |
915 |ingress::hdr.inner_tcp.$valid |[-1r, 14w] |W0 |W |[14] |
916 |ingress::hdr.inner_udp.$valid |[-1r, 14w] |W0 |W |[15] |
917 |ingress::hdr.inner_icmp.$valid |[-1r, 14w] |W0 |W |[16] |
918 |ingress::hdr.inner_ipv6.$valid |[-1r, 14w] |W0 |W |[17] |
919 |ingress::hdr.geneve_opts.oxg_ext_tag.$valid |[-1r, 14w] |W0 |W |[18] |
920 |ingress::hdr.geneve_opts.oxg_mcast_tag.$valid |[-1r, 14w] |W0 |W |[19] |
921 |ingress::hdr.geneve_opts.oxg_mcast.$valid |[-1r, 14w] |W0 |W |[20] |
922 |ingress::hdr.geneve_opts.oxg_mss_tag.$valid |[-1r, 14w] |W0 |W |[21] |
923 |ingress::hdr.geneve_opts.oxg_mss.$valid |[-1r, 14w] |W0 |W |[22] |
924 |ingress::hdr.ipv6.$valid |[-1r, 14w] |W0 |W |[23] |
925 |ingress::hdr.arp.$valid |[-1r, 14w] |W0 |W |[24] |
926 |egress::hdr.ethernet.$valid |[-1r, 14w] |MH5 |MH |[2] |
927 |egress::hdr.vlan.$valid |[-1r, 14w] |MH5 |MH |[3] |
928 |egress::hdr.ipv4.$valid |[-1r, 14w] |MH5 |MH |[4] |
929 |egress::hdr.icmp.$valid |[-1r, 14w] |MH5 |MH |[5] |
930 |egress::hdr.udp.$valid |[-1r, 14w] |MH5 |MH |[6] |
931 |egress::hdr.geneve.$valid |[-1r, 14w] |MH5 |MH |[7] |
932 |egress::hdr.inner_eth.$valid |[-1r, 14w] |MH5 |MH |[8] |
933 |egress::hdr.inner_ipv4.$valid |[-1r, 14w] |MH5 |MH |[9] |
934 |egress::hdr.inner_tcp.$valid |[-1r, 14w] |MH5 |MH |[10] |
935 |egress::hdr.inner_udp.$valid |[-1r, 14w] |MH5 |MH |[11] |
936 |egress::hdr.inner_ipv6.$valid |[-1r, 14w] |MH5 |MH |[12] |
937 |egress::hdr.geneve_opts.oxg_ext_tag.$valid |[-1r, 14w] |MH5 |MH |[13] |
938 |egress::hdr.geneve_opts.oxg_mcast_tag.$valid |[-1r, 14w] |MH5 |MH |[14] |
939 |egress::hdr.geneve_opts.oxg_mcast.$valid |[-1r, 14w] |MH5 |MH |[15] |
940 |egress::hdr.geneve_opts.oxg_mss_tag.$valid |[-1r, 14w] |MB0 |MB |[0] |
941 |egress::hdr.geneve_opts.oxg_mss.$valid |[-1r, 14w] |MB0 |MB |[1] |
942 |egress::hdr.ipv6.$valid |[-1r, 14w] |MB0 |MB |[2] |
943 +--------------------------------------------------------+------------+-----------+----------------+-----------------+
944 
945 
946 
947 
948 
949 PHV Allocation State
950 
951 MAU Groups:
952 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
953 | Container Set | Containers Used | Bits Used | Bits Used on Ingress | Bits Used on Egress | Bits Allocated | Bits Allocated on Ingress | Bits Allocated on Egress | Available Bits |
954 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
955 | B0-11 | 6 ( 50 %) | 48 ( 50 %) | 48 ( 50 %) | 0 ( 0 %) | 64 ( 66.7 %) | 64 ( 66.7 %) | 0 ( 0 %) | 96 |
956 | MB0-3 | 4 ( 100 %) | 28 ( 87.5 %) | 24 ( 75 %) | 4 ( 12.5 %) | 44 ( 138 %) | 40 ( 125 %) | 4 ( 12.5 %) | 32 |
957 | DB0-3 | 1 ( 25 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 32 |
958 | | | | | | | | | |
959 | Usage for Group 1 | 11 ( 55 %) | 84 ( 52.5 %) | 80 ( 50 %) | 4 ( 2.5 %) | 116 ( 72.5 %) | 112 ( 70 %) | 4 ( 2.5 %) | 160 |
960 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
961 | B12-23 | 1 ( 8.33 %) | 8 ( 8.33 %) | 8 ( 8.33 %) | 0 ( 0 %) | 16 ( 16.7 %) | 16 ( 16.7 %) | 0 ( 0 %) | 96 |
962 | MB4-7 | 4 ( 100 %) | 28 ( 87.5 %) | 28 ( 87.5 %) | 0 ( 0 %) | 52 ( 162 %) | 52 ( 162 %) | 0 ( 0 %) | 32 |
963 | DB4-7 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
964 | | | | | | | | | |
965 | Usage for Group 2 | 5 ( 25 %) | 36 ( 22.5 %) | 36 ( 22.5 %) | 0 ( 0 %) | 68 ( 42.5 %) | 68 ( 42.5 %) | 0 ( 0 %) | 160 |
966 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
967 | B24-35 | 1 ( 8.33 %) | 8 ( 8.33 %) | 8 ( 8.33 %) | 0 ( 0 %) | 8 ( 8.33 %) | 8 ( 8.33 %) | 0 ( 0 %) | 96 |
968 | MB8-11 | 4 ( 100 %) | 32 ( 100 %) | 32 ( 100 %) | 0 ( 0 %) | 56 ( 175 %) | 56 ( 175 %) | 0 ( 0 %) | 32 |
969 | DB8-11 | 1 ( 25 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 32 |
970 | | | | | | | | | |
971 | Usage for Group 3 | 6 ( 30 %) | 48 ( 30 %) | 48 ( 30 %) | 0 ( 0 %) | 72 ( 45 %) | 72 ( 45 %) | 0 ( 0 %) | 160 |
972 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
973 | B36-47 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 96 |
974 | MB12-15 | 1 ( 25 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 8 ( 25 %) | 8 ( 25 %) | 0 ( 0 %) | 32 |
975 | DB12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 32 |
976 | | | | | | | | | |
977 | Usage for Group 4 | 1 ( 5 %) | 8 ( 5 %) | 8 ( 5 %) | 0 ( 0 %) | 8 ( 5 %) | 8 ( 5 %) | 0 ( 0 %) | 160 |
978 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
979 | H0-11 | 8 ( 66.7 %) | 128 ( 66.7 %) | 128 ( 66.7 %) | 0 ( 0 %) | 193 ( 101 %) | 193 ( 101 %) | 0 ( 0 %) | 192 |
980 | MH0-3 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 128 ( 200 %) | 128 ( 200 %) | 0 ( 0 %) | 64 |
981 | DH0-3 | 1 ( 25 %) | 9 ( 14.1 %) | 9 ( 14.1 %) | 0 ( 0 %) | 9 ( 14.1 %) | 9 ( 14.1 %) | 0 ( 0 %) | 64 |
982 | | | | | | | | | |
983 | Usage for Group 5 | 13 ( 65 %) | 201 ( 62.8 %) | 201 ( 62.8 %) | 0 ( 0 %) | 330 ( 103 %) | 330 ( 103 %) | 0 ( 0 %) | 320 |
984 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
985 | H12-23 | 12 ( 100 %) | 179 ( 93.2 %) | 179 ( 93.2 %) | 0 ( 0 %) | 278 ( 145 %) | 278 ( 145 %) | 0 ( 0 %) | 192 |
986 | MH4-7 | 4 ( 100 %) | 49 ( 76.6 %) | 33 ( 51.6 %) | 16 ( 25 %) | 65 ( 102 %) | 49 ( 76.6 %) | 16 ( 25 %) | 64 |
987 | DH4-7 | 2 ( 50 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 32 ( 50 %) | 32 ( 50 %) | 0 ( 0 %) | 64 |
988 | | | | | | | | | |
989 | Usage for Group 6 | 18 ( 90 %) | 260 ( 81.2 %) | 244 ( 76.2 %) | 16 ( 5 %) | 375 ( 117 %) | 359 ( 112 %) | 16 ( 5 %) | 320 |
990 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
991 | H24-35 | 6 ( 50 %) | 96 ( 50 %) | 96 ( 50 %) | 0 ( 0 %) | 210 ( 109 %) | 210 ( 109 %) | 0 ( 0 %) | 192 |
992 | MH8-11 | 4 ( 100 %) | 57 ( 89.1 %) | 48 ( 75 %) | 9 ( 14.1 %) | 57 ( 89.1 %) | 48 ( 75 %) | 9 ( 14.1 %) | 64 |
993 | DH8-11 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 |
994 | | | | | | | | | |
995 | Usage for Group 7 | 14 ( 70 %) | 217 ( 67.8 %) | 208 ( 65 %) | 9 ( 2.81 %) | 331 ( 103 %) | 322 ( 101 %) | 9 ( 2.81 %) | 320 |
996 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
997 | H36-47 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 192 |
998 | MH12-15 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 80 ( 125 %) | 80 ( 125 %) | 0 ( 0 %) | 64 |
999 | DH12-15 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
1000 | | | | | | | | | |
1001 | Usage for Group 8 | 4 ( 20 %) | 64 ( 20 %) | 64 ( 20 %) | 0 ( 0 %) | 80 ( 25 %) | 80 ( 25 %) | 0 ( 0 %) | 320 |
1002 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1003 | H48-59 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 192 |
1004 | MH16-19 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 64 |
1005 | DH16-19 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 64 |
1006 | | | | | | | | | |
1007 | Usage for Group 9 | 4 ( 20 %) | 64 ( 20 %) | 64 ( 20 %) | 0 ( 0 %) | 64 ( 20 %) | 64 ( 20 %) | 0 ( 0 %) | 320 |
1008 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1009 | H60-71 | 8 ( 66.7 %) | 128 ( 66.7 %) | 128 ( 66.7 %) | 0 ( 0 %) | 254 ( 132 %) | 254 ( 132 %) | 0 ( 0 %) | 192 |
1010 | MH20-23 | 4 ( 100 %) | 64 ( 100 %) | 64 ( 100 %) | 0 ( 0 %) | 192 ( 300 %) | 192 ( 300 %) | 0 ( 0 %) | 64 |
1011 | DH20-23 | 3 ( 75 %) | 48 ( 75 %) | 48 ( 75 %) | 0 ( 0 %) | 48 ( 75 %) | 48 ( 75 %) | 0 ( 0 %) | 64 |
1012 | | | | | | | | | |
1013 | Usage for Group 10 | 15 ( 75 %) | 240 ( 75 %) | 240 ( 75 %) | 0 ( 0 %) | 494 ( 154 %) | 494 ( 154 %) | 0 ( 0 %) | 320 |
1014 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1015 | W0-11 | 8 ( 66.7 %) | 252 ( 65.6 %) | 252 ( 65.6 %) | 0 ( 0 %) | 316 ( 82.3 %) | 316 ( 82.3 %) | 0 ( 0 %) | 384 |
1016 | MW0-3 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 224 ( 175 %) | 224 ( 175 %) | 0 ( 0 %) | 128 |
1017 | DW0-3 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 |
1018 | | | | | | | | | |
1019 | Usage for Group 11 | 12 ( 60 %) | 380 ( 59.4 %) | 380 ( 59.4 %) | 0 ( 0 %) | 540 ( 84.4 %) | 540 ( 84.4 %) | 0 ( 0 %) | 640 |
1020 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1021 | W12-23 | 5 ( 41.7 %) | 160 ( 41.7 %) | 160 ( 41.7 %) | 0 ( 0 %) | 224 ( 58.3 %) | 224 ( 58.3 %) | 0 ( 0 %) | 384 |
1022 | MW4-7 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 |
1023 | DW4-7 | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 0 ( 0 %) | 128 |
1024 | | | | | | | | | |
1025 | Usage for Group 12 | 9 ( 45 %) | 288 ( 45 %) | 288 ( 45 %) | 0 ( 0 %) | 352 ( 55 %) | 352 ( 55 %) | 0 ( 0 %) | 640 |
1026 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1027 | W24-35 | 4 ( 33.3 %) | 128 ( 33.3 %) | 128 ( 33.3 %) | 0 ( 0 %) | 257 ( 66.9 %) | 257 ( 66.9 %) | 0 ( 0 %) | 384 |
1028 | MW8-11 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 |
1029 | DW8-11 | 1 ( 25 %) | 32 ( 25 %) | 32 ( 25 %) | 0 ( 0 %) | 32 ( 25 %) | 32 ( 25 %) | 0 ( 0 %) | 128 |
1030 | | | | | | | | | |
1031 | Usage for Group 13 | 9 ( 45 %) | 288 ( 45 %) | 288 ( 45 %) | 0 ( 0 %) | 417 ( 65.2 %) | 417 ( 65.2 %) | 0 ( 0 %) | 640 |
1032 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1033 | W36-47 | 4 ( 33.3 %) | 128 ( 33.3 %) | 128 ( 33.3 %) | 0 ( 0 %) | 269 ( 70.1 %) | 269 ( 70.1 %) | 0 ( 0 %) | 384 |
1034 | MW12-15 | 4 ( 100 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 ( 100 %) | 128 ( 100 %) | 0 ( 0 %) | 128 |
1035 | DW12-15 | 1 ( 25 %) | 32 ( 25 %) | 32 ( 25 %) | 0 ( 0 %) | 32 ( 25 %) | 32 ( 25 %) | 0 ( 0 %) | 128 |
1036 | | | | | | | | | |
1037 | Usage for Group 14 | 9 ( 45 %) | 288 ( 45 %) | 288 ( 45 %) | 0 ( 0 %) | 429 ( 67 %) | 429 ( 67 %) | 0 ( 0 %) | 640 |
1038 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1039 | Usage for 8b | 23 ( 28.8 %) | 176 ( 27.5 %) | 172 ( 26.9 %) | 4 ( 0.625%) | 264 ( 41.2 %) | 260 ( 40.6 %) | 4 ( 0.625%) | 640 |
1040 | Usage for 16b | 68 ( 56.7 %) | 1046 ( 54.5 %) | 1021 ( 53.2 %) | 25 ( 1.3 %) | 1674 ( 87.2 %) | 1649 ( 85.9 %) | 25 ( 1.3 %) | 1920 |
1041 | Usage for 32b | 39 ( 48.8 %) | 1244 ( 48.6 %) | 1244 ( 48.6 %) | 0 ( 0 %) | 1738 ( 67.9 %) | 1738 ( 67.9 %) | 0 ( 0 %) | 2560 |
1042 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1043 | Usage for dark | 14 ( 25 %) | 233 ( 22.8 %) | 233 ( 22.8 %) | 0 ( 0 %) | 233 ( 22.8 %) | 233 ( 22.8 %) | 0 ( 0 %) | 1024 |
1044 | Usage for mocha | 53 ( 94.6 %) | 970 ( 94.7 %) | 941 ( 91.9 %) | 29 ( 2.83 %) | 1354 ( 132 %) | 1325 ( 129 %) | 29 ( 2.83 %) | 1024 |
1045 | Usage for normal | 63 ( 37.5 %) | 1263 ( 41.1 %) | 1263 ( 41.1 %) | 0 ( 0 %) | 2089 ( 68 %) | 2089 ( 68 %) | 0 ( 0 %) | 3072 |
1046 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1047 | Overall PHV Usage | 130 ( 46.4 %) | 2466 ( 48.2 %) | 2437 ( 47.6 %) | 29 ( 0.566%) | 3676 ( 71.8 %) | 3647 ( 71.2 %) | 29 ( 0.566%) | 5120 |
1048 +--------------------+-----------------+----------------+----------------------+---------------------+----------------+---------------------------+--------------------------+----------------+
1049 
1050 
1051 
1052